From f87b2ef9bbd0e4159c88ef1211f06e19d7807cec Mon Sep 17 00:00:00 2001
From: "iliya.saroukha" <iliya.saroukhanian@etu.hesge.ch>
Date: Tue, 3 Dec 2024 22:11:17 +0100
Subject: [PATCH] wip: reading the values of cr0 and cr4 and their respective
VMX MSRs
---
proto/hypervisor.c | 47 ++++++++++++++++++++++++++++++++++++++--------
1 file changed, 39 insertions(+), 8 deletions(-)
diff --git a/proto/hypervisor.c b/proto/hypervisor.c
index 71728b7..fe2da8b 100644
--- a/proto/hypervisor.c
+++ b/proto/hypervisor.c
@@ -1,14 +1,26 @@
+#include "asm/cpuid.h"
#include "asm/msr.h"
+#include "asm/paravirt.h"
#include "linux/kern_levels.h"
#include "linux/printk.h"
#include <linux/init.h> /* Needed for the macros */
#include <linux/module.h> /* Needed by all modules */
-#define IA32_FEATURE_CONTROL_LOCK_BIT (1 << 0)
-#define IA32_FEATURE_CONTROL_VMXON_IN_SMX (1 << 1)
-#define IA32_FEATURE_CONTROL_VMXON_OUTSIDE_SMX (1 << 2)
+#define IA32_FEATURE_CONTROL_LOCK_BIT (1UL << 0)
+#define IA32_FEATURE_CONTROL_VMXON_IN_SMX (1UL << 1)
+#define IA32_FEATURE_CONTROL_VMXON_OUTSIDE_SMX (1UL << 2)
#define IA32_FEATURE_CONTROL_MSR (0x3a)
+// Appendix 8 p. 4'592 of Intel SDM
+#define IA32_VMX_CR0_FIXED0 (0x486)
+#define IA32_VMX_CR0_FIXED1 (0x487)
+#define IA32_VMX_CR4_FIXED0 (0x488)
+#define IA32_VMX_CR4_FIXED1 (0x489)
+
+#define CR0_PE (1UL << 0)
+#define CR0_NE (1UL << 5)
+#define CR0_PG (1UL << 31)
+
/*asm ( assembler template*/
/* : output operands (optional)*/
/* : input operands (optional)*/
@@ -24,11 +36,10 @@ static void cr4_enable_vmx(void) {
}
static bool vmx_supported(void) {
- int ecx;
-
- __asm__ volatile("mov $1, %rax");
- __asm__ volatile("cpuid");
- __asm__ volatile("mov %%ecx , %0\n\t" : "=r"(ecx));
+ unsigned int ecx = cpuid_ecx(1);
+ /*__asm__ volatile("mov $1, %rax");*/
+ /*__asm__ volatile("cpuid");*/
+ /*__asm__ volatile("mov %%ecx , %0\n\t" : "=r"(ecx));*/
return (ecx >> 5) & 1;
}
@@ -52,6 +63,24 @@ static bool ia32_feature_control_flags(void) {
return true;
}
+static void reading_cr_msr(void) {
+ unsigned long long cr0, cr4;
+
+ __asm__ volatile("mov %%cr0, %0" : "=r"(cr0));
+ __asm__ volatile("mov %%cr4, %0" : "=r"(cr4));
+
+ pr_debug("CR0 = 0x%llx\n", cr0);
+ pr_debug("CR4 = 0x%llx\n\n", cr4);
+
+ /*unsigned long cr0_fixed0 = __rdmsr(IA32_VMX_CR0_FIXED0);*/
+ /*unsigned long cr0_fixed1 = __rdmsr(IA32_VMX_CR0_FIXED1);*/
+
+ pr_debug(KERN_INFO "CR0_FIXED0 = 0x%llx\n", __rdmsr(IA32_VMX_CR0_FIXED0));
+ pr_debug(KERN_INFO "CR0_FIXED1 = 0x%llx\n\n", __rdmsr(IA32_VMX_CR0_FIXED1));
+ pr_debug(KERN_INFO "CR4_FIXED0 = 0x%llx\n", __rdmsr(IA32_VMX_CR4_FIXED0));
+ pr_debug(KERN_INFO "CR4_FIXED1 = 0x%llx\n", __rdmsr(IA32_VMX_CR4_FIXED1));
+}
+
static int my_init(void) {
if (!vmx_supported()) {
printk(KERN_INFO "VMX isn't supported\n");
@@ -73,6 +102,8 @@ static int my_init(void) {
printk(KERN_INFO "IA32_FEATURE_CONTROL MSR flags allow virtualization\n");
+ reading_cr_msr();
+
return 0;
}
--
GitLab