diff --git a/2-3_asm/.cproject b/2-3_asm/.cproject
new file mode 100644
index 0000000000000000000000000000000000000000..d5614f2d4c0c5ed2daa177438f2f4c38f6f07a6c
--- /dev/null
+++ b/2-3_asm/.cproject
@@ -0,0 +1,214 @@
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+ <projectStorage><?xml version="1.0" encoding="UTF-8"?>
+<TargetConfig>
+<Properties property_2="LPC175x_6x_512.cfx" property_3="NXP" property_4="LPC1769" property_count="5" version="100300"/>
+<infoList vendor="NXP">
+<info chip="LPC1769" flash_driver="LPC175x_6x_512.cfx" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml" stub="crt_emu_cm3_nxp">
+<chip>
+<name>LPC1769</name>
+<family>LPC17xx</family>
+<vendor>NXP (formerly Philips)</vendor>
+<reset board="None" core="Real" sys="Real"/>
+<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
+<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
+<memory id="RAM" type="RAM"/>
+<memory id="Periph" is_volatile="true" type="Peripheral"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
+<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+</chip>
+<processor>
+<name gcc_name="cortex-m3">Cortex-M3</name>
+<family>Cortex-M</family>
+</processor>
+</info>
+</infoList>
+</TargetConfig></projectStorage>
+ </storageModule>
+ <storageModule moduleId="refreshScope"/>
+ <storageModule moduleId="com.crt.advproject"/>
+ <storageModule moduleId="openCmsis"/>
+ <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
\ No newline at end of file
diff --git a/2-3_asm/.gitignore b/2-3_asm/.gitignore
new file mode 100644
index 0000000000000000000000000000000000000000..28ce4ef99a07f6a1e01a52181c18c3e71230a3ae
--- /dev/null
+++ b/2-3_asm/.gitignore
@@ -0,0 +1,3 @@
+*.launch
+Debug/
+.settings/
diff --git a/2-3_asm/.project b/2-3_asm/.project
new file mode 100644
index 0000000000000000000000000000000000000000..ffa801181144d1738579ebf7929d6ac64be6852f
--- /dev/null
+++ b/2-3_asm/.project
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+ <name>2-3_asm</name>
+ <comment></comment>
+ <projects>
+ </projects>
+ <buildSpec>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+ <triggers>clean,full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ <buildCommand>
+ <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+ <triggers>full,incremental,</triggers>
+ <arguments>
+ </arguments>
+ </buildCommand>
+ </buildSpec>
+ <natures>
+ <nature>org.eclipse.cdt.core.cnature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+ <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+ </natures>
+</projectDescription>
diff --git a/2-3_asm/src/assembleur.s b/2-3_asm/src/assembleur.s
new file mode 100644
index 0000000000000000000000000000000000000000..7ec1956ab99c4ec4db6a52b4f709ed18d489fd43
--- /dev/null
+++ b/2-3_asm/src/assembleur.s
@@ -0,0 +1,79 @@
+#ifdef __USE_CMSIS
+#include "LPC17xx.h"
+#endif
+
+.section .text,"ax"
+.cpu cortex-m3
+.thumb
+.syntax unified
+
+.global funcexo1
+.global funcexo2
+.global funcexo3
+
+
+/*****************************************************
+ * function : exercice1
+ * R0: a
+ * R1: b
+ * R2: c
+ * R3: d
+ * SP: &e
+ * return value : *e = a XOR b XOR c XOR d
+ *****************************************************/
+.thumb_func
+funcexo1:
+ push {r4} // sauvegarde du registre
+ ldr r4, [sp, #4]
+ eor r0, r1
+ eor r0, r2
+ eor r0, r3
+ str r0, [r4]
+ pop {r4}
+
+ bx lr
+
+/*****************************************************
+ * 32 bits (unsigned) multiplication with overflow detection
+ * r0: multiplicand
+ * r1: multiplier
+ * return values :
+ * r0 = r0 * r1, r1=1 if 32 bits overflow (0 otherwise)
+ *****************************************************/
+.thumb_func
+mult32:
+ umull r0,r1,r0,r1
+ cmp r1,#0
+ it ne
+ movne r1,#1 // add carry to r1
+ bx lr
+
+/*****************************************************
+ * function : exercice 2
+ * R0: a
+ * R1: b
+ * R2: c
+ * R3: d
+ * return value : a*b+c*d or 0 if overflow
+ *****************************************************/
+.thumb_func
+funcexo2:
+
+ bx lr
+
+
+/*****************************************************
+ * function : exercice 3
+ * R0: a
+ * R1: b and c (c in high 16 bits)
+ * R2: d
+ * R3: e
+ * return value : addition of the elements of the structure
+ *****************************************************/
+.thumb_func
+funcexo3:
+
+ bx lr
+
+//.weak add_sat
+.ltorg
diff --git a/2-3_asm/src/cr_startup_lpc176x.c b/2-3_asm/src/cr_startup_lpc176x.c
new file mode 100644
index 0000000000000000000000000000000000000000..d84744157588a56c74058eb15a683f095833b3da
--- /dev/null
+++ b/2-3_asm/src/cr_startup_lpc176x.c
@@ -0,0 +1,421 @@
+//*****************************************************************************
+// +--+
+// | ++----+
+// +-++ |
+// | |
+// +-+--+ |
+// | +--+--+
+// +----+ Copyright (c) 2009-12 Code Red Technologies Ltd.
+//
+// Microcontroller Startup code for use with Red Suite
+//
+// Version : 120126
+//
+// Software License Agreement
+//
+// The software is owned by Code Red Technologies and/or its suppliers, and is
+// protected under applicable copyright laws. All rights are reserved. Any
+// use in violation of the foregoing restrictions may subject the user to criminal
+// sanctions under applicable laws, as well as to civil liability for the breach
+// of the terms and conditions of this license.
+//
+// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// USE OF THIS SOFTWARE FOR COMMERCIAL DEVELOPMENT AND/OR EDUCATION IS SUBJECT
+// TO A CURRENT END USER LICENSE AGREEMENT (COMMERCIAL OR EDUCATIONAL) WITH
+// CODE RED TECHNOLOGIES LTD.
+//
+//*****************************************************************************
+#if defined (__cplusplus)
+#ifdef __REDLIB__
+#error Redlib does not support C++
+#else
+//*****************************************************************************
+//
+// The entry point for the C++ library startup
+//
+//*****************************************************************************
+extern "C" {
+ extern void __libc_init_array(void);
+}
+#endif
+#endif
+
+#define WEAK __attribute__ ((weak))
+#define ALIAS(f) __attribute__ ((weak, alias (#f)))
+
+// Code Red - if CMSIS is being used, then SystemInit() routine
+// will be called by startup code rather than in application's main()
+#if defined (__USE_CMSIS)
+#include "system_LPC17xx.h"
+#endif
+
+//*****************************************************************************
+#if defined (__cplusplus)
+extern "C" {
+#endif
+
+//*****************************************************************************
+//
+// Forward declaration of the default handlers. These are aliased.
+// When the application defines a handler (with the same name), this will
+// automatically take precedence over these weak definitions
+//
+//*****************************************************************************
+ void ResetISR(void);
+WEAK void NMI_Handler(void);
+WEAK void HardFault_Handler(void);
+WEAK void MemManage_Handler(void);
+WEAK void BusFault_Handler(void);
+WEAK void UsageFault_Handler(void);
+WEAK void SVC_Handler(void);
+WEAK void DebugMon_Handler(void);
+WEAK void PendSV_Handler(void);
+WEAK void SysTick_Handler(void);
+WEAK void IntDefaultHandler(void);
+
+//*****************************************************************************
+//
+// Forward declaration of the specific IRQ handlers. These are aliased
+// to the IntDefaultHandler, which is a 'forever' loop. When the application
+// defines a handler (with the same name), this will automatically take
+// precedence over these weak definitions
+//
+//*****************************************************************************
+void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void TIMER3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void UART3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PWM1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SPI_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SSP0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void SSP1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PLL0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void RTC_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT0_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT2_IRQHandler(void) ALIAS(IntDefaultHandler);
+void EINT3_IRQHandler(void) ALIAS(IntDefaultHandler);
+void ADC_IRQHandler(void) ALIAS(IntDefaultHandler);
+void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
+void USB_IRQHandler(void) ALIAS(IntDefaultHandler);
+void CAN_IRQHandler(void) ALIAS(IntDefaultHandler);
+void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
+void I2S_IRQHandler(void) ALIAS(IntDefaultHandler);
+void ENET_IRQHandler(void) ALIAS(IntDefaultHandler);
+void RIT_IRQHandler(void) ALIAS(IntDefaultHandler);
+void MCPWM_IRQHandler(void) ALIAS(IntDefaultHandler);
+void QEI_IRQHandler(void) ALIAS(IntDefaultHandler);
+void PLL1_IRQHandler(void) ALIAS(IntDefaultHandler);
+void USBActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
+void CANActivity_IRQHandler(void) ALIAS(IntDefaultHandler);
+
+//*****************************************************************************
+//
+// The entry point for the application.
+// __main() is the entry point for Redlib based applications
+// main() is the entry point for Newlib based applications
+//
+//*****************************************************************************
+#if defined (__REDLIB__)
+extern void __main(void);
+#endif
+extern int main(void);
+//*****************************************************************************
+//
+// External declaration for the pointer to the stack top from the Linker Script
+//
+//*****************************************************************************
+extern void _vStackTop(void);
+
+//*****************************************************************************
+#if defined (__cplusplus)
+} // extern "C"
+#endif
+//*****************************************************************************
+//
+// The vector table.
+// This relies on the linker script to place at correct location in memory.
+//
+//*****************************************************************************
+extern void (* const g_pfnVectors[])(void);
+__attribute__ ((section(".isr_vector")))
+void (* const g_pfnVectors[])(void) = {
+ // Core Level - CM3
+ &_vStackTop, // The initial stack pointer
+ ResetISR, // The reset handler
+ NMI_Handler, // The NMI handler
+ HardFault_Handler, // The hard fault handler
+ MemManage_Handler, // The MPU fault handler
+ BusFault_Handler, // The bus fault handler
+ UsageFault_Handler, // The usage fault handler
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ 0, // Reserved
+ SVC_Handler, // SVCall handler
+ DebugMon_Handler, // Debug monitor handler
+ 0, // Reserved
+ PendSV_Handler, // The PendSV handler
+ SysTick_Handler, // The SysTick handler
+
+ // Chip Level - LPC17
+ WDT_IRQHandler, // 16, 0x40 - WDT
+ TIMER0_IRQHandler, // 17, 0x44 - TIMER0
+ TIMER1_IRQHandler, // 18, 0x48 - TIMER1
+ TIMER2_IRQHandler, // 19, 0x4c - TIMER2
+ TIMER3_IRQHandler, // 20, 0x50 - TIMER3
+ UART0_IRQHandler, // 21, 0x54 - UART0
+ UART1_IRQHandler, // 22, 0x58 - UART1
+ UART2_IRQHandler, // 23, 0x5c - UART2
+ UART3_IRQHandler, // 24, 0x60 - UART3
+ PWM1_IRQHandler, // 25, 0x64 - PWM1
+ I2C0_IRQHandler, // 26, 0x68 - I2C0
+ I2C1_IRQHandler, // 27, 0x6c - I2C1
+ I2C2_IRQHandler, // 28, 0x70 - I2C2
+ SPI_IRQHandler, // 29, 0x74 - SPI
+ SSP0_IRQHandler, // 30, 0x78 - SSP0
+ SSP1_IRQHandler, // 31, 0x7c - SSP1
+ PLL0_IRQHandler, // 32, 0x80 - PLL0 (Main PLL)
+ RTC_IRQHandler, // 33, 0x84 - RTC
+ EINT0_IRQHandler, // 34, 0x88 - EINT0
+ EINT1_IRQHandler, // 35, 0x8c - EINT1
+ EINT2_IRQHandler, // 36, 0x90 - EINT2
+ EINT3_IRQHandler, // 37, 0x94 - EINT3
+ ADC_IRQHandler, // 38, 0x98 - ADC
+ BOD_IRQHandler, // 39, 0x9c - BOD
+ USB_IRQHandler, // 40, 0xA0 - USB
+ CAN_IRQHandler, // 41, 0xa4 - CAN
+ DMA_IRQHandler, // 42, 0xa8 - GP DMA
+ I2S_IRQHandler, // 43, 0xac - I2S
+ ENET_IRQHandler, // 44, 0xb0 - Ethernet
+ RIT_IRQHandler, // 45, 0xb4 - RITINT
+ MCPWM_IRQHandler, // 46, 0xb8 - Motor Control PWM
+ QEI_IRQHandler, // 47, 0xbc - Quadrature Encoder
+ PLL1_IRQHandler, // 48, 0xc0 - PLL1 (USB PLL)
+ USBActivity_IRQHandler, // 49, 0xc4 - USB Activity interrupt to wakeup
+ CANActivity_IRQHandler, // 50, 0xc8 - CAN Activity interrupt to wakeup
+};
+
+//*****************************************************************************
+// Functions to carry out the initialization of RW and BSS data sections. These
+// are written as separate functions rather than being inlined within the
+// ResetISR() function in order to cope with MCUs with multiple banks of
+// memory.
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
+ unsigned int *pulDest = (unsigned int*) start;
+ unsigned int *pulSrc = (unsigned int*) romstart;
+ unsigned int loop;
+ for (loop = 0; loop < len; loop = loop + 4)
+ *pulDest++ = *pulSrc++;
+}
+
+__attribute__ ((section(".after_vectors")))
+void bss_init(unsigned int start, unsigned int len) {
+ unsigned int *pulDest = (unsigned int*) start;
+ unsigned int loop;
+ for (loop = 0; loop < len; loop = loop + 4)
+ *pulDest++ = 0;
+}
+
+#ifndef USE_OLD_STYLE_DATA_BSS_INIT
+//*****************************************************************************
+// The following symbols are constructs generated by the linker, indicating
+// the location of various points in the "Global Section Table". This table is
+// created by the linker via the Code Red managed linker script mechanism. It
+// contains the load address, execution address and length of each RW data
+// section and the execution and length of each BSS (zero initialized) section.
+//*****************************************************************************
+extern unsigned int __data_section_table;
+extern unsigned int __data_section_table_end;
+extern unsigned int __bss_section_table;
+extern unsigned int __bss_section_table_end;
+#else
+//*****************************************************************************
+// The following symbols are constructs generated by the linker, indicating
+// the load address, execution address and length of the RW data section and
+// the execution and length of the BSS (zero initialized) section.
+// Note that these symbols are not normally used by the managed linker script
+// mechanism in Red Suite/LPCXpresso 3.6 (Windows) and LPCXpresso 3.8 (Linux).
+// They are provide here simply so this startup code can be used with earlier
+// versions of Red Suite which do not support the more advanced managed linker
+// script mechanism introduced in the above version. To enable their use,
+// define "USE_OLD_STYLE_DATA_BSS_INIT".
+//*****************************************************************************
+extern unsigned int _etext;
+extern unsigned int _data;
+extern unsigned int _edata;
+extern unsigned int _bss;
+extern unsigned int _ebss;
+#endif
+
+
+//*****************************************************************************
+// Reset entry point for your code.
+// Sets up a simple runtime environment and initializes the C/C++
+// library.
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void
+ResetISR(void) {
+
+#ifndef USE_OLD_STYLE_DATA_BSS_INIT
+ //
+ // Copy the data sections from flash to SRAM.
+ //
+ unsigned int LoadAddr, ExeAddr, SectionLen;
+ unsigned int *SectionTableAddr;
+
+ // Load base address of Global Section Table
+ SectionTableAddr = &__data_section_table;
+
+ // Copy the data sections from flash to SRAM.
+ while (SectionTableAddr < &__data_section_table_end) {
+ LoadAddr = *SectionTableAddr++;
+ ExeAddr = *SectionTableAddr++;
+ SectionLen = *SectionTableAddr++;
+ data_init(LoadAddr, ExeAddr, SectionLen);
+ }
+ // At this point, SectionTableAddr = &__bss_section_table;
+ // Zero fill the bss segment
+ while (SectionTableAddr < &__bss_section_table_end) {
+ ExeAddr = *SectionTableAddr++;
+ SectionLen = *SectionTableAddr++;
+ bss_init(ExeAddr, SectionLen);
+ }
+#else
+ // Use Old Style Data and BSS section initialization.
+ // This will only initialize a single RAM bank.
+ unsigned int * LoadAddr, *ExeAddr, *EndAddr, SectionLen;
+
+ // Copy the data segment from flash to SRAM.
+ LoadAddr = &_etext;
+ ExeAddr = &_data;
+ EndAddr = &_edata;
+ SectionLen = (void*)EndAddr - (void*)ExeAddr;
+ data_init((unsigned int)LoadAddr, (unsigned int)ExeAddr, SectionLen);
+ // Zero fill the bss segment
+ ExeAddr = &_bss;
+ EndAddr = &_ebss;
+ SectionLen = (void*)EndAddr - (void*)ExeAddr;
+ bss_init ((unsigned int)ExeAddr, SectionLen);
+#endif
+
+#ifdef __USE_CMSIS
+ SystemInit();
+#endif
+
+#if defined (__cplusplus)
+ //
+ // Call C++ library initialisation
+ //
+ __libc_init_array();
+#endif
+
+#if defined (__REDLIB__)
+ // Call the Redlib library, which in turn calls main()
+ __main() ;
+#else
+ main();
+#endif
+
+ //
+ // main() shouldn't return, but if it does, we'll just enter an infinite loop
+ //
+ while (1) {
+ ;
+ }
+}
+
+//*****************************************************************************
+// Default exception handlers. Override the ones here by defining your own
+// handler routines in your application code.
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void NMI_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void HardFault_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void MemManage_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void BusFault_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void UsageFault_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void SVC_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void DebugMon_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void PendSV_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+__attribute__ ((section(".after_vectors")))
+void SysTick_Handler(void)
+{
+ while(1)
+ {
+ }
+}
+
+//*****************************************************************************
+//
+// Processor ends up here if an unexpected interrupt occurs or a specific
+// handler is not present in the application code.
+//
+//*****************************************************************************
+__attribute__ ((section(".after_vectors")))
+void IntDefaultHandler(void)
+{
+ while(1)
+ {
+ }
+}
diff --git a/2-3_asm/src/labo2.3_asm.c b/2-3_asm/src/labo2.3_asm.c
new file mode 100644
index 0000000000000000000000000000000000000000..2cc60dfcc030bf50b68671d9a8af1a971c6ebc96
--- /dev/null
+++ b/2-3_asm/src/labo2.3_asm.c
@@ -0,0 +1,54 @@
+/*
+===============================================================================
+ Name : labo2.3.c
+ Author : V. Pilloux, F. Vannel
+ Copyright : HES-SO hepia
+===============================================================================
+ */
+#ifdef __USE_CMSIS
+#include "LPC17xx.h"
+#endif
+
+#include <stdint.h>
+
+typedef struct {
+ int32_t a;
+ int8_t b;
+ int16_t c;
+ int8_t d;
+ int32_t e;
+} numbers_t;
+
+void funcexo1(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t *);
+uint32_t funcexo2(uint32_t a, uint32_t b, uint32_t c, uint32_t d);
+int funcexo3(numbers_t s);
+
+/* global variables */
+int exo = 1; // change this number with the exercise number you want to test;
+
+int main(void)
+{
+ static uint32_t res, res_ref;
+ numbers_t s;
+
+ switch(exo) // select the function corresponding to the exercise to test
+ {
+ case 1:
+ funcexo1(0xffffffff, 0xffffffff, 0xaaaa5555, 0xbaba6565, &res);
+ break;
+ case 2:
+ res=funcexo2(3, 2, 6,7); // doit retourner 48
+ res=funcexo2(0x10000, 0x10005, 6,7); // doit retourner 0
+ res=funcexo2(0xF000, 0x8805, 0x8700,0xF760); // doit retourner 0
+ break;
+ default:
+ s.a=5; s.b=-3; s.c=-1; s.d=10; s.e=3;
+ res_ref=s.a+s.b+s.c+s.d+s.e;
+ res=funcexo3(s);
+ if (res!=res_ref)
+ while(1); // error
+ break;
+ }
+
+ return 0;
+}