diff --git a/designs/vivado/scalp_firmware/2019.2/src/constrs/debug.xdc b/designs/vivado/scalp_firmware/2019.2/src/constrs/debug.xdc
index 34f7c73c9b0ad40e1f5af0bb7915f1f788f0fff0..e727a290928e20d05030666f5eb771de4badcdd5 100644
--- a/designs/vivado/scalp_firmware/2019.2/src/constrs/debug.xdc
+++ b/designs/vivado/scalp_firmware/2019.2/src/constrs/debug.xdc
@@ -2,7 +2,7 @@ create_debug_core u_ila_0 ila
 set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
 set_property ALL_PROBE_SAME_MU_CNT 1 [get_debug_cores u_ila_0]
 set_property C_ADV_TRIGGER false [get_debug_cores u_ila_0]
-set_property C_DATA_DEPTH 2048 [get_debug_cores u_ila_0]
+set_property C_DATA_DEPTH 4096 [get_debug_cores u_ila_0]
 set_property C_EN_STRG_QUAL false [get_debug_cores u_ila_0]
 set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]
 set_property C_TRIGIN_EN false [get_debug_cores u_ila_0]
@@ -14,8 +14,8 @@ set_property port_width 4 [get_debug_ports u_ila_0/probe0]
 connect_debug_port u_ila_0/probe0 [get_nets [list {SouthWritePhyStatexDP[0]} {SouthWritePhyStatexDP[1]} {SouthWritePhyStatexDP[2]} {SouthWritePhyStatexDP[3]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
-set_property port_width 4 [get_debug_ports u_ila_0/probe1]
-connect_debug_port u_ila_0/probe1 [get_nets [list {SouthRXM2SxD[KeepxD][3]} {SouthRXM2SxD[KeepxD][2]} {SouthRXM2SxD[KeepxD][1]} {SouthRXM2SxD[KeepxD][0]}]]
+set_property port_width 2 [get_debug_ports u_ila_0/probe1]
+connect_debug_port u_ila_0/probe1 [get_nets [list {SouthReadPhyStatexDP[0]} {SouthReadPhyStatexDP[1]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
 set_property port_width 32 [get_debug_ports u_ila_0/probe2]
@@ -26,8 +26,8 @@ set_property port_width 4 [get_debug_ports u_ila_0/probe3]
 connect_debug_port u_ila_0/probe3 [get_nets [list {NorthWritePhyStatexDP[0]} {NorthWritePhyStatexDP[1]} {NorthWritePhyStatexDP[2]} {NorthWritePhyStatexDP[3]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
-set_property port_width 4 [get_debug_ports u_ila_0/probe4]
-connect_debug_port u_ila_0/probe4 [get_nets [list {NorthRXM2SxD[KeepxD][3]} {NorthRXM2SxD[KeepxD][2]} {NorthRXM2SxD[KeepxD][1]} {NorthRXM2SxD[KeepxD][0]}]]
+set_property port_width 2 [get_debug_ports u_ila_0/probe4]
+connect_debug_port u_ila_0/probe4 [get_nets [list {NorthReadPhyStatexDP[0]} {NorthReadPhyStatexDP[1]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
 set_property port_width 32 [get_debug_ports u_ila_0/probe5]
@@ -38,248 +38,216 @@ set_property port_width 4 [get_debug_ports u_ila_0/probe6]
 connect_debug_port u_ila_0/probe6 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
-set_property port_width 4 [get_debug_ports u_ila_0/probe7]
-connect_debug_port u_ila_0/probe7 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[KeepxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[KeepxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[KeepxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[KeepxD][0]}]]
+set_property port_width 32 [get_debug_ports u_ila_0/probe7]
+connect_debug_port u_ila_0/probe7 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
-set_property port_width 32 [get_debug_ports u_ila_0/probe8]
-connect_debug_port u_ila_0/probe8 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[DataxD][0]}]]
+set_property port_width 4 [get_debug_ports u_ila_0/probe8]
+connect_debug_port u_ila_0/probe8 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
-set_property port_width 4 [get_debug_ports u_ila_0/probe9]
-connect_debug_port u_ila_0/probe9 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[DataxD][0]}]]
+set_property port_width 32 [get_debug_ports u_ila_0/probe9]
+connect_debug_port u_ila_0/probe9 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
-set_property port_width 4 [get_debug_ports u_ila_0/probe10]
-connect_debug_port u_ila_0/probe10 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[KeepxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[KeepxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[KeepxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[KeepxD][0]}]]
+set_property port_width 2 [get_debug_ports u_ila_0/probe10]
+connect_debug_port u_ila_0/probe10 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXFifoResetDoneStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXFifoResetDoneStatexDP[1]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
-set_property port_width 32 [get_debug_ports u_ila_0/probe11]
-connect_debug_port u_ila_0/probe11 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[DataxD][0]}]]
+set_property port_width 3 [get_debug_ports u_ila_0/probe11]
+connect_debug_port u_ila_0/probe11 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthNFCStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthNFCStatexDP[1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthNFCStatexDP[2]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
-set_property port_width 2 [get_debug_ports u_ila_0/probe12]
-connect_debug_port u_ila_0/probe12 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXFifoResetDoneStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXFifoResetDoneStatexDP[1]}]]
+set_property port_width 4 [get_debug_ports u_ila_0/probe12]
+connect_debug_port u_ila_0/probe12 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
-set_property port_width 3 [get_debug_ports u_ila_0/probe13]
-connect_debug_port u_ila_0/probe13 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthNFCStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthNFCStatexDP[1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthNFCStatexDP[2]}]]
+set_property port_width 32 [get_debug_ports u_ila_0/probe13]
+connect_debug_port u_ila_0/probe13 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
 set_property port_width 4 [get_debug_ports u_ila_0/probe14]
-connect_debug_port u_ila_0/probe14 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[DataxD][0]}]]
+connect_debug_port u_ila_0/probe14 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
-set_property port_width 4 [get_debug_ports u_ila_0/probe15]
-connect_debug_port u_ila_0/probe15 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[KeepxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[KeepxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[KeepxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[KeepxD][0]}]]
+set_property port_width 32 [get_debug_ports u_ila_0/probe15]
+connect_debug_port u_ila_0/probe15 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][0]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
-set_property port_width 32 [get_debug_ports u_ila_0/probe16]
-connect_debug_port u_ila_0/probe16 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[DataxD][0]}]]
+set_property port_width 2 [get_debug_ports u_ila_0/probe16]
+connect_debug_port u_ila_0/probe16 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXFifoResetDoneStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXFifoResetDoneStatexDP[1]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
-set_property port_width 4 [get_debug_ports u_ila_0/probe17]
-connect_debug_port u_ila_0/probe17 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[DataxD][0]}]]
+set_property port_width 3 [get_debug_ports u_ila_0/probe17]
+connect_debug_port u_ila_0/probe17 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthNFCStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthNFCStatexDP[1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthNFCStatexDP[2]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
-set_property port_width 4 [get_debug_ports u_ila_0/probe18]
-connect_debug_port u_ila_0/probe18 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[KeepxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[KeepxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[KeepxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[KeepxD][0]}]]
+set_property port_width 1 [get_debug_ports u_ila_0/probe18]
+connect_debug_port u_ila_0/probe18 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthProgEmptyxSP]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
-set_property port_width 32 [get_debug_ports u_ila_0/probe19]
-connect_debug_port u_ila_0/probe19 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][31]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][30]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][29]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][28]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][27]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][26]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][25]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][24]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][23]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][22]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][21]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][20]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][19]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][18]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][17]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][16]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][15]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][14]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][13]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][12]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][11]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][10]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][9]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][8]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][7]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][6]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][5]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][4]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][3]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][2]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[DataxD][0]}]]
+set_property port_width 1 [get_debug_ports u_ila_0/probe19]
+connect_debug_port u_ila_0/probe19 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthProgFullxSP]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
-set_property port_width 2 [get_debug_ports u_ila_0/probe20]
-connect_debug_port u_ila_0/probe20 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXFifoResetDoneStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXFifoResetDoneStatexDP[1]}]]
+set_property port_width 1 [get_debug_ports u_ila_0/probe20]
+connect_debug_port u_ila_0/probe20 [get_nets [list {NorthRXM2SxD[LastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
-set_property port_width 3 [get_debug_ports u_ila_0/probe21]
-connect_debug_port u_ila_0/probe21 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthNFCStatexDP[0]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthNFCStatexDP[1]} {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthNFCStatexDP[2]}]]
+set_property port_width 1 [get_debug_ports u_ila_0/probe21]
+connect_debug_port u_ila_0/probe21 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[LastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe22]
 set_property port_width 1 [get_debug_ports u_ila_0/probe22]
-connect_debug_port u_ila_0/probe22 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthProgEmptyxSP]]
+connect_debug_port u_ila_0/probe22 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe23]
 set_property port_width 1 [get_debug_ports u_ila_0/probe23]
-connect_debug_port u_ila_0/probe23 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthProgFullxSP]]
+connect_debug_port u_ila_0/probe23 [get_nets [list {NorthRXM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe24]
 set_property port_width 1 [get_debug_ports u_ila_0/probe24]
-connect_debug_port u_ila_0/probe24 [get_nets [list {NorthRXM2SxD[LastxS]}]]
+connect_debug_port u_ila_0/probe24 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe25]
 set_property port_width 1 [get_debug_ports u_ila_0/probe25]
-connect_debug_port u_ila_0/probe25 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[LastxS]}]]
+connect_debug_port u_ila_0/probe25 [get_nets [list {NorthRXS2MxD[ReadyxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe26]
 set_property port_width 1 [get_debug_ports u_ila_0/probe26]
-connect_debug_port u_ila_0/probe26 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe26 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[LastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe27]
 set_property port_width 1 [get_debug_ports u_ila_0/probe27]
-connect_debug_port u_ila_0/probe27 [get_nets [list {NorthRXM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe27 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe28]
 set_property port_width 1 [get_debug_ports u_ila_0/probe28]
-connect_debug_port u_ila_0/probe28 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthRXNFCM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe28 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe29]
 set_property port_width 1 [get_debug_ports u_ila_0/probe29]
-connect_debug_port u_ila_0/probe29 [get_nets [list {NorthRXS2MxD[ReadyxS]}]]
+connect_debug_port u_ila_0/probe29 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCS2MxD[ReadyxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe30]
 set_property port_width 1 [get_debug_ports u_ila_0/probe30]
-connect_debug_port u_ila_0/probe30 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[LastxS]}]]
+connect_debug_port u_ila_0/probe30 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXS2MxD[ReadyxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe31]
 set_property port_width 1 [get_debug_ports u_ila_0/probe31]
-connect_debug_port u_ila_0/probe31 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe31 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[EastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe32]
 set_property port_width 1 [get_debug_ports u_ila_0/probe32]
-connect_debug_port u_ila_0/probe32 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe32 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[NorthxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe33]
 set_property port_width 1 [get_debug_ports u_ila_0/probe33]
-connect_debug_port u_ila_0/probe33 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXNFCS2MxD[ReadyxS]}]]
+connect_debug_port u_ila_0/probe33 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[SouthxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe34]
 set_property port_width 1 [get_debug_ports u_ila_0/probe34]
-connect_debug_port u_ila_0/probe34 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/NorthTXS2MxD[ReadyxS]}]]
+connect_debug_port u_ila_0/probe34 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[WestxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe35]
 set_property port_width 1 [get_debug_ports u_ila_0/probe35]
-connect_debug_port u_ila_0/probe35 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[EastxS]}]]
+connect_debug_port u_ila_0/probe35 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[EastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe36]
 set_property port_width 1 [get_debug_ports u_ila_0/probe36]
-connect_debug_port u_ila_0/probe36 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[NorthxS]}]]
+connect_debug_port u_ila_0/probe36 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[NorthxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe37]
 set_property port_width 1 [get_debug_ports u_ila_0/probe37]
-connect_debug_port u_ila_0/probe37 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[SouthxS]}]]
+connect_debug_port u_ila_0/probe37 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[SouthxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe38]
 set_property port_width 1 [get_debug_ports u_ila_0/probe38]
-connect_debug_port u_ila_0/probe38 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDoneDelayedxD[WestxS]}]]
+connect_debug_port u_ila_0/probe38 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[WestxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe39]
 set_property port_width 1 [get_debug_ports u_ila_0/probe39]
-connect_debug_port u_ila_0/probe39 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[EastxS]}]]
+connect_debug_port u_ila_0/probe39 [get_nets [list {RXResetxR[BackPressureResetxR][EastxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe40]
 set_property port_width 1 [get_debug_ports u_ila_0/probe40]
-connect_debug_port u_ila_0/probe40 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[NorthxS]}]]
+connect_debug_port u_ila_0/probe40 [get_nets [list {RXResetxR[BackPressureResetxR][NorthxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe41]
 set_property port_width 1 [get_debug_ports u_ila_0/probe41]
-connect_debug_port u_ila_0/probe41 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[SouthxS]}]]
+connect_debug_port u_ila_0/probe41 [get_nets [list {RXResetxR[BackPressureResetxR][SouthxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe42]
 set_property port_width 1 [get_debug_ports u_ila_0/probe42]
-connect_debug_port u_ila_0/probe42 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/RXFifoResetDonexD[WestxS]}]]
+connect_debug_port u_ila_0/probe42 [get_nets [list {RXResetxR[BackPressureResetxR][WestxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe43]
 set_property port_width 1 [get_debug_ports u_ila_0/probe43]
-connect_debug_port u_ila_0/probe43 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthProgEmptyxSP]]
+connect_debug_port u_ila_0/probe43 [get_nets [list {RXResetxR[FifoResetxR][EastxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe44]
 set_property port_width 1 [get_debug_ports u_ila_0/probe44]
-connect_debug_port u_ila_0/probe44 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthProgFullxSP]]
+connect_debug_port u_ila_0/probe44 [get_nets [list {RXResetxR[FifoResetxR][NorthxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe45]
 set_property port_width 1 [get_debug_ports u_ila_0/probe45]
-connect_debug_port u_ila_0/probe45 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[LastxS]}]]
+connect_debug_port u_ila_0/probe45 [get_nets [list {RXResetxR[FifoResetxR][SouthxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe46]
 set_property port_width 1 [get_debug_ports u_ila_0/probe46]
-connect_debug_port u_ila_0/probe46 [get_nets [list {SouthRXM2SxD[LastxS]}]]
+connect_debug_port u_ila_0/probe46 [get_nets [list {RXResetxR[FifoResetxR][WestxR]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe47]
 set_property port_width 1 [get_debug_ports u_ila_0/probe47]
-connect_debug_port u_ila_0/probe47 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe47 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthProgEmptyxSP]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe48]
 set_property port_width 1 [get_debug_ports u_ila_0/probe48]
-connect_debug_port u_ila_0/probe48 [get_nets [list {SouthRXM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe48 [get_nets [list ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthProgFullxSP]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe49]
 set_property port_width 1 [get_debug_ports u_ila_0/probe49]
-connect_debug_port u_ila_0/probe49 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe49 [get_nets [list {SouthRXM2SxD[LastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe50]
 set_property port_width 1 [get_debug_ports u_ila_0/probe50]
-connect_debug_port u_ila_0/probe50 [get_nets [list {SouthRXS2MxD[ReadyxS]}]]
+connect_debug_port u_ila_0/probe50 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[LastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe51]
 set_property port_width 1 [get_debug_ports u_ila_0/probe51]
-connect_debug_port u_ila_0/probe51 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[LastxS]}]]
+connect_debug_port u_ila_0/probe51 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe52]
 set_property port_width 1 [get_debug_ports u_ila_0/probe52]
-connect_debug_port u_ila_0/probe52 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe52 [get_nets [list {SouthRXM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe53]
 set_property port_width 1 [get_debug_ports u_ila_0/probe53]
-connect_debug_port u_ila_0/probe53 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCM2SxD[ValidxS]}]]
+connect_debug_port u_ila_0/probe53 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthRXNFCM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe54]
 set_property port_width 1 [get_debug_ports u_ila_0/probe54]
-connect_debug_port u_ila_0/probe54 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCS2mxD[ReadyxS]}]]
+connect_debug_port u_ila_0/probe54 [get_nets [list {SouthRXS2MxD[ReadyxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe55]
 set_property port_width 1 [get_debug_ports u_ila_0/probe55]
-connect_debug_port u_ila_0/probe55 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXS2MxD[ReadyxS]}]]
+connect_debug_port u_ila_0/probe55 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[LastxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe56]
 set_property port_width 1 [get_debug_ports u_ila_0/probe56]
-connect_debug_port u_ila_0/probe56 [get_nets [list {DebugCounterResetxR[EastxR]}]]
+connect_debug_port u_ila_0/probe56 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe57]
 set_property port_width 1 [get_debug_ports u_ila_0/probe57]
-connect_debug_port u_ila_0/probe57 [get_nets [list {DebugCounterResetxR[NorthxR]}]]
+connect_debug_port u_ila_0/probe57 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCM2SxD[ValidxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe58]
 set_property port_width 1 [get_debug_ports u_ila_0/probe58]
-connect_debug_port u_ila_0/probe58 [get_nets [list {DebugCounterResetxR[SouthxR]}]]
+connect_debug_port u_ila_0/probe58 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXNFCS2mxD[ReadyxS]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe59]
 set_property port_width 1 [get_debug_ports u_ila_0/probe59]
-connect_debug_port u_ila_0/probe59 [get_nets [list {DebugCounterResetxR[WestxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe60]
-set_property port_width 1 [get_debug_ports u_ila_0/probe60]
-connect_debug_port u_ila_0/probe60 [get_nets [list {DebugRXFifoResetxR[EastxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe61]
-set_property port_width 1 [get_debug_ports u_ila_0/probe61]
-connect_debug_port u_ila_0/probe61 [get_nets [list {DebugRXFifoResetxR[NorthxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe62]
-set_property port_width 1 [get_debug_ports u_ila_0/probe62]
-connect_debug_port u_ila_0/probe62 [get_nets [list {DebugRXFifoResetxR[SouthxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe63]
-set_property port_width 1 [get_debug_ports u_ila_0/probe63]
-connect_debug_port u_ila_0/probe63 [get_nets [list {DebugRXFifoResetxR[WestxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe64]
-set_property port_width 1 [get_debug_ports u_ila_0/probe64]
-connect_debug_port u_ila_0/probe64 [get_nets [list {DebugBackPressureResetxR[EastxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe65]
-set_property port_width 1 [get_debug_ports u_ila_0/probe65]
-connect_debug_port u_ila_0/probe65 [get_nets [list {DebugBackPressureResetxR[NorthxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe66]
-set_property port_width 1 [get_debug_ports u_ila_0/probe66]
-connect_debug_port u_ila_0/probe66 [get_nets [list {DebugBackPressureResetxR[SouthxR]}]]
-create_debug_port u_ila_0 probe
-set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe67]
-set_property port_width 1 [get_debug_ports u_ila_0/probe67]
-connect_debug_port u_ila_0/probe67 [get_nets [list {DebugBackPressureResetxR[WestxR]}]]
+connect_debug_port u_ila_0/probe59 [get_nets [list {ProgrammableLogicxB.GTPhyxB.ScalpAuroraPhyxI/SouthTXS2MxD[ReadyxS]}]]
 set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
 set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
 set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
diff --git a/designs/vivado/scalp_firmware/2019.2/src/constrs/scalp_firmware.xdc b/designs/vivado/scalp_firmware/2019.2/src/constrs/scalp_firmware.xdc
index 9466d9aa08d4562d30bfd5d7a6b221000071e19a..78b9ac5801d7b3d7c9ffedf369cfffa4cc152945 100644
--- a/designs/vivado/scalp_firmware/2019.2/src/constrs/scalp_firmware.xdc
+++ b/designs/vivado/scalp_firmware/2019.2/src/constrs/scalp_firmware.xdc
@@ -247,3 +247,4 @@ set_operating_conditions -airflow 0 -heatsink none -board small
 
 
 
+
diff --git a/designs/vivado/scalp_firmware/2019.2/src/constrs/timing_constraints.xdc b/designs/vivado/scalp_firmware/2019.2/src/constrs/timing_constraints.xdc
index 4960acac7ff88f27f9e599140c4a946845d1cfc0..889191426e784338b0a0c8a34d73a85b1405ad71 100644
--- a/designs/vivado/scalp_firmware/2019.2/src/constrs/timing_constraints.xdc
+++ b/designs/vivado/scalp_firmware/2019.2/src/constrs/timing_constraints.xdc
@@ -27,3 +27,4 @@ create_clock -period 8.000 -waveform {0.000 4.000} [get_nets GTPRefClk0PxCI]
 
 
 
+
diff --git a/designs/vivado/scalp_firmware/2019.2/src/hdl/scalp_firmware.vhd b/designs/vivado/scalp_firmware/2019.2/src/hdl/scalp_firmware.vhd
index a5aed655008803e650c9cda7c49855491652e7d1..546fa849592cebf9ef10b28ed94a1feeec3fa4a5 100644
--- a/designs/vivado/scalp_firmware/2019.2/src/hdl/scalp_firmware.vhd
+++ b/designs/vivado/scalp_firmware/2019.2/src/hdl/scalp_firmware.vhd
@@ -15,7 +15,7 @@
 -- Tool version: 2019.2
 -- Description: scalp_firmware
 --
--- Last update: 2020-11-25
+-- Last update: 2020-11-26
 --
 ---------------------------------------------------------------------------------
 
@@ -1185,6 +1185,14 @@ begin
             attribute keep of SouthWritePhyStatexDP       : signal is "true";
             -- attribute mark_debug of WestWritePhyStatexDP  : signal is "true";
             -- attribute keep of WestWritePhyStatexDP        : signal is "true";
+            attribute mark_debug of NorthReadPhyStatexDP  : signal is "true";
+            attribute keep of NorthReadPhyStatexDP        : signal is "true";
+            -- attribute mark_debug of EastReadPhyStatexDP  : signal is "true";
+            -- attribute keep of EastReadPhyStatexDP        : signal is "true";
+            attribute mark_debug of SouthReadPhyStatexDP  : signal is "true";
+            attribute keep of SouthReadPhyStatexDP        : signal is "true";
+            -- attribute mark_debug of WestReadPhyStatexDP  : signal is "true";
+            -- attribute keep of WestReadPhyStatexDP        : signal is "true";
 
         begin  -- block DebugxB
 
@@ -1736,31 +1744,125 @@ begin
 
             end process WestWriteTXPhyxP;
 
-            -- NorthReadRXPhyxP : process (NorthRXM2SxD.ValidxS, ReadPhyStatexDP) is
-            -- begin  -- process NorthReadRXPhyxP
-            --     -- Default value
-            --     ReadPhyStatexDN      <= ReadPhyStatexDP;
-            --     NorthRXS2MxD.ReadyxS <= '0';
-
-            --     case ReadPhyStatexDP is
-            --         when E_READ_PHY_IDLE =>
-            --                 ReadPhyStatexDN <= E_READ_PHY_S0;
-            --         when E_READ_PHY_S0 =>
-            --                 if NorthRXM2SxD.ValidxS = '1' then
-            --                     ReadPhyStatexDN <= E_READ_PHY_S1;
-            --                 end if;
-            --         when E_READ_PHY_S1 =>
-            --                 if NorthRXM2SxD.ValidxS = '1' then
-            --                     ReadPhyStatexDN <= E_READ_PHY_S2;
-            --                 end if;
-            --         when E_READ_PHY_S2 =>
-            --                 if NorthRXM2SxD.ValidxS = '1' then
-            --                     NorthRXS2MxD.ReadyxS <= '1';
-            --                     ReadPhyStatexDN      <= E_READ_PHY_S0;
-            --                 end if;
-            --         when others => null;
-            --     end case;
-            -- end process NorthReadRXPhyxP;
+            NorthReadRXPhyxP : process (NorthRXFifoStatusxD.ProgEmptyxS,
+                                        NorthRXFifoStatusxD.ProgFullxS,
+                                        NorthRXM2SxD.ValidxS,
+                                        NorthReadPhyStatexDP) is
+            begin  -- process NorthReadRXPhyxP
+                -- Default value
+                NorthReadPhyStatexDN <= NorthReadPhyStatexDP;
+                NorthRXS2MxD.ReadyxS <= '0';
+
+                case NorthReadPhyStatexDP is
+                    when E_READ_PHY_IDLE =>
+                            if (NorthRXFifoStatusxD.ProgFullxS = '1') and
+                                (NorthRXFifoStatusxD.ProgEmptyxS = '0') then
+                                NorthReadPhyStatexDN <= E_READ_PHY_S0;
+                            end if;
+
+                    when E_READ_PHY_S0 =>
+                            if NorthRXM2SxD.ValidxS = '1' then
+                                NorthRXS2MxD.ReadyxS <= '1';
+                            end if;
+
+                            if (NorthRXFifoStatusxD.ProgFullxS = '0') and
+                                (NorthRXFifoStatusxD.ProgEmptyxS = '1') then
+                                NorthReadPhyStatexDN <= E_READ_PHY_IDLE;
+                            end if;
+
+                    when others => null;
+                end case;
+            end process NorthReadRXPhyxP;
+
+            EastReadRXPhyxP : process (EastRXFifoStatusxD.ProgEmptyxS,
+                                       EastRXFifoStatusxD.ProgFullxS,
+                                       EastRXM2SxD.ValidxS,
+                                       EastReadPhyStatexDP) is
+            begin  -- process EastReadRXPhyxP
+                -- Default value
+                EastReadPhyStatexDN <= EastReadPhyStatexDP;
+                EastRXS2MxD.ReadyxS <= '0';
+
+                case EastReadPhyStatexDP is
+                    when E_READ_PHY_IDLE =>
+                            if (EastRXFifoStatusxD.ProgFullxS = '1') and
+                                (EastRXFifoStatusxD.ProgEmptyxS = '0') then
+                                EastReadPhyStatexDN <= E_READ_PHY_S0;
+                            end if;
+
+                    when E_READ_PHY_S0 =>
+                            if EastRXM2SxD.ValidxS = '1' then
+                                EastRXS2MxD.ReadyxS <= '1';
+                            end if;
+
+                            if (EastRXFifoStatusxD.ProgFullxS = '0') and
+                                (EastRXFifoStatusxD.ProgEmptyxS = '1') then
+                                EastReadPhyStatexDN <= E_READ_PHY_IDLE;
+                            end if;
+
+                    when others => null;
+                end case;
+            end process EastReadRXPhyxP;
+
+            SouthReadRXPhyxP : process (SouthRXFifoStatusxD.ProgEmptyxS,
+                                        SouthRXFifoStatusxD.ProgFullxS,
+                                        SouthRXM2SxD.ValidxS,
+                                        SouthReadPhyStatexDP) is
+            begin  -- process SouthReadRXPhyxP
+                -- Default value
+                SouthReadPhyStatexDN <= SouthReadPhyStatexDP;
+                SouthRXS2MxD.ReadyxS <= '0';
+
+                case SouthReadPhyStatexDP is
+                    when E_READ_PHY_IDLE =>
+                            if (SouthRXFifoStatusxD.ProgFullxS = '1') and
+                                (SouthRXFifoStatusxD.ProgEmptyxS = '0') then
+                                SouthReadPhyStatexDN <= E_READ_PHY_S0;
+                            end if;
+
+                    when E_READ_PHY_S0 =>
+                            if SouthRXM2SxD.ValidxS = '1' then
+                                SouthRXS2MxD.ReadyxS <= '1';
+                            end if;
+
+                            if (SouthRXFifoStatusxD.ProgFullxS = '0') and
+                                (SouthRXFifoStatusxD.ProgEmptyxS = '1') then
+                                SouthReadPhyStatexDN <= E_READ_PHY_IDLE;
+                            end if;
+
+                    when others => null;
+                end case;
+            end process SouthReadRXPhyxP;
+
+            WestReadRXPhyxP : process (WestRXFifoStatusxD.ProgEmptyxS,
+                                       WestRXFifoStatusxD.ProgFullxS,
+                                       WestRXM2SxD.ValidxS,
+                                       WestReadPhyStatexDP) is
+            begin  -- process WestReadRXPhyxP
+                -- Default value
+                WestReadPhyStatexDN <= WestReadPhyStatexDP;
+                WestRXS2MxD.ReadyxS <= '0';
+
+                case WestReadPhyStatexDP is
+                    when E_READ_PHY_IDLE =>
+                            if (WestRXFifoStatusxD.ProgFullxS = '1') and
+                                (WestRXFifoStatusxD.ProgEmptyxS = '0') then
+                                WestReadPhyStatexDN <= E_READ_PHY_S0;
+                            end if;
+
+                    when E_READ_PHY_S0 =>
+                            if WestRXM2SxD.ValidxS = '1' then
+                                WestRXS2MxD.ReadyxS <= '1';
+                            end if;
+
+                            if (WestRXFifoStatusxD.ProgFullxS = '0') and
+                                (WestRXFifoStatusxD.ProgEmptyxS = '1') then
+                                WestReadPhyStatexDN <= E_READ_PHY_IDLE;
+                            end if;
+
+                    when others => null;
+                end case;
+            end process WestReadRXPhyxP;
 
         end block DebugxB;