diff --git a/peripherals/hw/scalp_hl2/component.xml b/peripherals/hw/scalp_hl2/component.xml
index 4255a781b5d15f2643b8b6097a9512b19125e47c..c70cc78df0f952e45e3571d92d158a735addfa0d 100644
--- a/peripherals/hw/scalp_hl2/component.xml
+++ b/peripherals/hw/scalp_hl2/component.xml
@@ -577,22 +577,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
- <spirit:value>1bd304d9</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_testbench</spirit:name>
- <spirit:displayName>Test Bench</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:simulation.testbench</spirit:envIdentifier>
- <spirit:modelName>scalp_hl2_ctrl_bram_tb</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_testbench_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>viewChecksum</spirit:name>
- <spirit:value>2fd2604a</spirit:value>
+ <spirit:value>85b1c87b</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@@ -606,7 +591,7 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
- <spirit:value>9903a6d8</spirit:value>
+ <spirit:value>a2be5a47</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
@@ -614,7 +599,7 @@
<spirit:name>xilinx_anylanguagebehavioralsimulation</spirit:name>
<spirit:displayName>Simulation</spirit:displayName>
<spirit:envIdentifier>:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:modelName>scalp_hl2</spirit:modelName>
+ <spirit:modelName>scalp_hl2_v1_0</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_blk_mem_gen_8_4__ref_view_fileset</spirit:localName>
</spirit:fileSetRef>
@@ -624,18 +609,18 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>viewChecksum</spirit:name>
- <spirit:value>9762637f</spirit:value>
+ <spirit:value>01a5699c</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
- <spirit:name>DMX_OUT</spirit:name>
+ <spirit:name>HL2UartxSO</spirit:name>
<spirit:wire>
<spirit:direction>out</spirit:direction>
<spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.G_PORT_COUNT')) - 1)">31</spirit:left>
+ <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.G_PORT_COUNT')) - 1)">0</spirit:left>
<spirit:right spirit:format="long">0</spirit:right>
</spirit:vector>
<spirit:wireTypeDefs>
@@ -1679,7 +1664,7 @@
<spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="integer">
<spirit:name>G_PORT_COUNT</spirit:name>
<spirit:displayName>G Port Count</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.G_PORT_COUNT">32</spirit:value>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.G_PORT_COUNT">1</spirit:value>
</spirit:modelParameter>
<spirit:modelParameter spirit:dataType="integer">
<spirit:name>G_CLK_DIV</spirit:name>
@@ -1749,44 +1734,37 @@
<spirit:fileSet>
<spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2_ctrl.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
+ <spirit:name>src/ip_core/blk_mem_gen_0/blk_mem_gen_0.xci</spirit:name>
+ <spirit:userFileType>xci</spirit:userFileType>
</spirit:file>
<spirit:file>
<spirit:name>src/hdl/scalp_hl2_pkg.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/ip_core/blk_mem_gen_0/blk_mem_gen_0.xci</spirit:name>
- <spirit:userFileType>xci</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>src/hdl/scalp_hl2_uart.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_S00_AXI.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
<spirit:name>src/hdl/scalp_hl2_S01_AXI.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
<spirit:name>src/hdl/scalp_hl2_bram.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_ctrl.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2_S00_AXI.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_uart.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ </spirit:file>
+ <spirit:file>
+ <spirit:name>src/hdl/scalp_hl2.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>CHECKSUM_a9058e85</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
+ <spirit:userFileType>CHECKSUM_fee885df</spirit:userFileType>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
@@ -1799,73 +1777,44 @@
</xilinx:subCoreRef>
</spirit:vendorExtensions>
</spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_testbench_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>src/sim/tb_scalp_hl2.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
<spirit:fileSet>
<spirit:name>xilinx_xpgui_view_fileset</spirit:name>
<spirit:file>
<spirit:name>xgui/scalp_hl2_v1_0.tcl</spirit:name>
<spirit:fileType>tclSource</spirit:fileType>
+ <spirit:userFileType>CHECKSUM_a2be5a47</spirit:userFileType>
+ <spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
<spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>src/ip_core/blk_mem_gen_0/blk_mem_gen_0.xci</spirit:name>
- <spirit:userFileType>xci</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>src/hdl/scalp_hl2_ctrl.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
<spirit:file>
<spirit:name>src/hdl/scalp_hl2_pkg.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2_uart.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_S00_AXI.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/sim/tb_scalp_hl2.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_S01_AXI.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2_S01_AXI.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_bram.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2_bram.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_ctrl.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2_uart.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
<spirit:file>
- <spirit:name>src/hdl/scalp_hl2_S00_AXI.vhd</spirit:name>
+ <spirit:name>src/hdl/scalp_hl2.vhd</spirit:name>
<spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
</spirit:file>
</spirit:fileSet>
<spirit:fileSet>
@@ -1883,12 +1832,12 @@
<spirit:parameters>
<spirit:parameter>
<spirit:name>G_PORT_COUNT</spirit:name>
- <spirit:displayName>uart port count</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.G_PORT_COUNT" spirit:minimum="1" spirit:maximum="128" spirit:rangeType="long">32</spirit:value>
+ <spirit:displayName>HL2 ports count</spirit:displayName>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.G_PORT_COUNT" spirit:minimum="1" spirit:maximum="128" spirit:rangeType="long">1</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>G_CLK_DIV</spirit:name>
- <spirit:displayName>Clock divider</spirit:displayName>
+ <spirit:displayName>Clock division value</spirit:displayName>
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.G_CLK_DIV" spirit:minimum="1" spirit:maximum="65535" spirit:rangeType="long">200</spirit:value>
</spirit:parameter>
<spirit:parameter>
@@ -1976,8 +1925,8 @@
</xilinx:xpmLibraries>
<xilinx:vendorDisplayName>HEPIA CoRES</xilinx:vendorDisplayName>
<xilinx:vendorURL>https://hepia-cores.ch/</xilinx:vendorURL>
- <xilinx:coreRevision>2</xilinx:coreRevision>
- <xilinx:coreCreationDateTime>2020-12-17T16:35:33Z</xilinx:coreCreationDateTime>
+ <xilinx:coreRevision>10</xilinx:coreRevision>
+ <xilinx:coreCreationDateTime>2020-12-21T16:08:00Z</xilinx:coreCreationDateTime>
<xilinx:tags>
<xilinx:tag xilinx:name="ui.data.coregen.dd@28bf71ef_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
<xilinx:tag xilinx:name="ui.data.coregen.dd@387c5664_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
@@ -2013,16 +1962,93 @@
<xilinx:tag xilinx:name="ui.data.coregen.dd@3530edff_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
<xilinx:tag xilinx:name="ui.data.coregen.dd@11c14c4c_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
<xilinx:tag xilinx:name="ui.data.coregen.dd@6fddf7d1_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@18aa7543_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@236a7419_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@2844ce01_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@314194f3_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@2cf5aa5e_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@46213e8d_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@53982c97_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@352133db_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@a909227_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@740cabe1_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@18684e20_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5219d0cf_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@19a5bd78_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@669a2ace_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@229d19b9_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@72a55e2f_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@40f5db59_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@6b619f95_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5c1a56_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5505d5ce_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@74a3a6ed_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5c19d118_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@aaafb59_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@2d9fc45b_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@520e0b6d_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@629616f3_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@f5609df_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@6d4efd1d_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@7f32a52_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@127bd79a_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5ea67a28_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@531e0346_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@12c80df1_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5a08adb2_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@73b7b411_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@238de4c8_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@412a12b7_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@7e8d019e_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@18c80f27_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@65e008d1_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@1ff55db_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@48a34cdf_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@15f1118_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@76d4024d_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5771bc00_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@182f44e1_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@19e562c5_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@470214ac_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5096063d_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@543b23a7_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@23cf7a06_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5d8187c_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@181efed3_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@399ea19c_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@10e63bc9_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@44535f1f_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@556e8b81_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@58c61057_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@2d350c3f_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@66d81827_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@51ae9e00_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@d757cdf_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@474fb808_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@3060cadf_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@7ad94084_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@7dff35f_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@45585f28_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@7f255cad_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@79789fb1_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@324fc112_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@62f69301_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@66986200_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@bccfa19_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@fabcbc4_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@22fe3279_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@6782aa8a_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
+ <xilinx:tag xilinx:name="ui.data.coregen.dd@5a37209c_ARCHIVE_LOCATION">/home/quentin/Dropbox/HEPIA/SOMA/scalp_firmware_uart_hl2/peripherals/hw/scalp_hl2</xilinx:tag>
</xilinx:tags>
</xilinx:coreExtensions>
<xilinx:packagingInfo>
<xilinx:xilinxVersion>2019.2_AR72614</xilinx:xilinxVersion>
<xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="b7cf672f"/>
<xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="a9994d9e"/>
- <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="f466d54d"/>
- <xilinx:checksum xilinx:scope="ports" xilinx:value="2957ca5d"/>
- <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="8ab00b99"/>
- <xilinx:checksum xilinx:scope="parameters" xilinx:value="0b47f901"/>
+ <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="7d4ccd67"/>
+ <xilinx:checksum xilinx:scope="ports" xilinx:value="08c76ac2"/>
+ <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="b6fbdf14"/>
+ <xilinx:checksum xilinx:scope="parameters" xilinx:value="dee1c1c6"/>
</xilinx:packagingInfo>
</spirit:vendorExtensions>
</spirit:component>
diff --git a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2.vhd b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2.vhd
index 578f16c1a5f3683641aa8ebaf86880cbc171f0ae..33f1c9ed2b920543ee91cf44837a2042ce5f5e75 100644
--- a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2.vhd
+++ b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2.vhd
@@ -16,7 +16,7 @@
-- Description: SCALP - HEPIALight2 interface IP
-- Work in progress, based on a DMX-512 interface
--
--- Last update: 2020/12/17 12:10:09
+-- Last update: 2020/12/21 16:29:21
--
---------------------------------------------------------------------------------
@@ -27,7 +27,7 @@ use ieee.numeric_std.all;
library xil_defaultlib;
use xil_defaultlib.scalp_hl2_pkg.all;
-entity scalp_hl2 is
+entity scalp_hl2_v1_0 is
generic (
-- Users to add parameters here
@@ -54,7 +54,7 @@ entity scalp_hl2 is
port (
-- Users to add ports here
- DMX_OUT : out std_logic_vector(G_PORT_COUNT - 1 downto 0);
+ HL2UartxSO : out std_logic_vector(G_PORT_COUNT - 1 downto 0);
-- User ports ends
-- Do not modify the ports beyond this line
@@ -129,9 +129,9 @@ entity scalp_hl2 is
S01_AXI_RVALID : out std_logic;
S01_AXI_RREADY : in std_logic
);
-end scalp_hl2;
+end scalp_hl2_v1_0;
-architecture arch of scalp_hl2 is
+architecture arch of scalp_hl2_v1_0 is
-- component declaration
component scalp_hl2_S00_AXI is
@@ -265,8 +265,8 @@ architecture arch of scalp_hl2 is
o_addr : out std_logic_vector(C_REG_CHAN_COUNT_SIZE - 1 downto 0);
o_rden : out std_logic;
- -- Dmx
- o_dmx : out std_logic_vector(G_PORT_COUNT - 1 downto 0)
+ -- Uarts vector
+ o_uart : out std_logic_vector(G_PORT_COUNT - 1 downto 0)
);
end component scalp_hl2_ctrl;
@@ -453,7 +453,7 @@ begin
o_rden => s_dmx_rden,
-- Dmx
- o_dmx => dmx_out
+ o_uart => HL2UartxSO
);
-- BRAM instance
diff --git a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_ctrl.vhd b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_ctrl.vhd
index 28872bfc212baacd0f1ae8ed0bbc5a95da243461..1ef906dcd9e93cc4c68ad26854df4158318c53b1 100755
--- a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_ctrl.vhd
+++ b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_ctrl.vhd
@@ -15,7 +15,7 @@
-- Tool version: 2019.2
-- Description: Implement serialization state-machine: DMX-512 protocol
--
--- Last update: 2020/12/17 12:09:57
+-- Last update: 2020/12/21 17:31:41
--
---------------------------------------------------------------------------------
@@ -57,8 +57,8 @@ entity scalp_hl2_ctrl is
o_addr : out std_logic_vector(C_REG_CHAN_COUNT_SIZE - 1 downto 0);
o_rden : out std_logic;
- -- Dmx
- o_dmx : out std_logic_vector(G_PORT_COUNT - 1 downto 0)
+ -- Uart output vector
+ o_uart : out std_logic_vector(G_PORT_COUNT - 1 downto 0)
);
end scalp_hl2_ctrl;
@@ -78,7 +78,7 @@ architecture Behavioral of scalp_hl2_ctrl is
signal s_uart_done : std_logic;
signal s_uart_strobe : std_logic;
- signal s_uartdmx : std_logic_vector(G_PORT_COUNT - 1 downto 0);
+ signal s_uart : std_logic_vector(G_PORT_COUNT - 1 downto 0);
signal r_tx_data : std_logic_vector((G_PORT_COUNT * 8) - 1 downto 0);
signal r_Clk_Count : unsigned(C_REG_BREAK_CLK_SIZE - 1 downto 0);
signal r_data_addr : unsigned(C_REG_CHAN_COUNT_SIZE - 1 downto 0);
@@ -93,7 +93,7 @@ architecture Behavioral of scalp_hl2_ctrl is
i_data_valid : in std_logic;
i_data : in std_logic_vector((8 * G_PORT_COUNT) - 1 downto 0);
o_active : out std_logic;
- o_dmx : out std_logic_vector(G_PORT_COUNT - 1 downto 0);
+ o_uart : out std_logic_vector(G_PORT_COUNT - 1 downto 0);
o_done : out std_logic
);
end component scalp_hl2_uart;
@@ -187,7 +187,8 @@ begin
end if;
end process p_DMX512;
- with r_SM_Main select s_uart_strobe <= '1' when s_StartOfFrame,
+ with r_SM_Main select s_uart_strobe <=
+ '1' when s_StartOfFrame,
'1' when s_DataFrame,
'0' when others;
@@ -207,7 +208,7 @@ begin
i_data_valid => s_uart_strobe,
i_data => r_tx_data,
o_active => open,
- o_dmx => s_uartdmx,
+ o_uart => s_uart,
o_done => s_uart_done
);
@@ -218,17 +219,21 @@ begin
-- s_uartdmx when others;
-- DMX512 State machine
- p_DMX_OUT : process (r_SM_Main, ir_chan_en, ir_idl_value, s_uartdmx)
+ p_DMX_OUT : process (r_SM_Main, ir_chan_en, ir_idl_value, s_uart)
begin
for I in 0 to G_PORT_COUNT - 1 loop
if ir_chan_en(I) = '0' then
- o_dmx(I) <= ir_idl_value(I);
+ o_uart(I) <= ir_idl_value(I);
else
case r_SM_Main is
- when s_Init => o_dmx(I) <= '0';
- when s_Break => o_dmx(I) <= '0';
- when s_MarkAfterBreak => o_dmx(I) <= '1';
- when others => o_dmx(I) <= s_uartdmx(I);
+ when s_Init =>
+ o_uart(I) <= '0';
+ when s_Break =>
+ o_uart(I) <= '0';
+ when s_MarkAfterBreak =>
+ o_uart(I) <= '1';
+ when others =>
+ o_uart(I) <= s_uart(I);
end case;
end if;
end loop;
diff --git a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_pkg.vhd b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_pkg.vhd
index d26c84e8d262a6e3d619f2372605abfd08fc50ff..1e337b46d65eb940744d40734f260c7de400a724 100755
--- a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_pkg.vhd
+++ b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_pkg.vhd
@@ -15,7 +15,7 @@
-- Tool version: 2019.2
-- Description: SCALP - HEPIALight2 configuration package
--
--- Last update: 2020/12/17 12:09:59
+-- Last update: 2020/12/21 17:32:11
--
---------------------------------------------------------------------------------
@@ -43,11 +43,13 @@ package scalp_hl2_pkg is
constant C_REG_IP_REV_MIN_RESET_VAL : integer := 0;
-- Global clock config register -------------------------------------------
-
-- BIT_CLK
+ -- Standard DMX-512 use a 250kbit bit clock
+ -- With a 125MHz AXI clock must divide by 500
+ -- With a 50MHz AXI clock must divide by 200
constant C_REG_BIT_CLK_SIZE : integer := 16;
constant C_REG_BIT_CLK_POS : integer := 0;
- constant C_REG_BIT_CLK_RESET_VAL : integer := 200;
+ constant C_REG_BIT_CLK_RESET_VAL : integer := 500;
-- Global break config register -------------------------------------------
diff --git a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_uart.vhd b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_uart.vhd
index 83e4daa23d7c3cd720cc5439b250554c2edba2e5..383ceeb3121009b8d20e79c46a2af1668ed89c52 100755
--- a/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_uart.vhd
+++ b/peripherals/hw/scalp_hl2/src/hdl/scalp_hl2_uart.vhd
@@ -16,7 +16,7 @@
-- Description: Simple unidirectional UART, with configurable port count.
-- Implemented with DMX-512 in mind..
--
--- Last update: 2020/12/17 12:10:06
+-- Last update: 2020/12/21 16:31:35
--
---------------------------------------------------------------------------------
@@ -37,7 +37,7 @@ entity scalp_hl2_uart is
i_data_valid : in std_logic;
i_data : in std_logic_vector((8 * G_PORT_COUNT) - 1 downto 0);
o_active : out std_logic;
- o_dmx : out std_logic_vector(G_PORT_COUNT - 1 downto 0);
+ o_uart : out std_logic_vector(G_PORT_COUNT - 1 downto 0);
o_done : out std_logic
);
end scalp_hl2_uart;
@@ -69,7 +69,7 @@ begin
when s_Idle =>
o_active <= '0';
- o_dmx <= (others => '1'); -- Drive Line High for Idle
+ o_uart <= (others => '1'); -- Drive Line High for Idle
r_done <= '0';
r_clk_counter <= (others => '0');
r_bit_index <= 0;
@@ -84,7 +84,7 @@ begin
-- Send out Start Bit. Start bit = 0
when s_TX_Start_Bit =>
o_active <= '1';
- o_dmx <= (others => '0');
+ o_uart <= (others => '0');
-- Wait ir_bit_clk clock cycles for start bit to finish
if r_clk_counter < unsigned(ir_bit_clk) - 1 then
@@ -97,7 +97,7 @@ begin
-- Wait ir_bit_clk clock cycles for data bits to finish
when s_TX_Data_Bits =>
for I in 0 to G_PORT_COUNT - 1 loop
- o_dmx(I) <= r_data(r_bit_index + (8 * I));
+ o_uart(I) <= r_data(r_bit_index + (8 * I));
end loop;
if r_clk_counter < unsigned(ir_bit_clk) - 1 then
@@ -117,7 +117,7 @@ begin
end if;
-- Send out first stop bit
when s_TX_Stop_Bit1 =>
- o_dmx <= (others => '1');
+ o_uart <= (others => '1');
-- Wait ir_bit_clk clock cycles for Stop bit to finish
if r_clk_counter < unsigned(ir_bit_clk) - 1 then
@@ -129,7 +129,7 @@ begin
end if;
-- Send out second stop bit
when s_TX_Stop_Bit2 =>
- o_dmx <= (others => '1');
+ o_uart <= (others => '1');
-- Wait ir_bit_clk clock cycles for Stop bit to finish
if r_clk_counter < unsigned(ir_bit_clk) - 2 then
diff --git a/peripherals/hw/scalp_hl2/src/ip_core/blk_mem_gen_0/blk_mem_gen_0.xml b/peripherals/hw/scalp_hl2/src/ip_core/blk_mem_gen_0/blk_mem_gen_0.xml
new file mode 100644
index 0000000000000000000000000000000000000000..89f551ca7e74e50f61713efcffe738021e928fa0
--- /dev/null
+++ b/peripherals/hw/scalp_hl2/src/ip_core/blk_mem_gen_0/blk_mem_gen_0.xml
@@ -0,0 +1,4260 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+ <spirit:vendor>xilinx.com</spirit:vendor>
+ <spirit:library>customized_ip</spirit:library>
+ <spirit:name>blk_mem_gen_0</spirit:name>
+ <spirit:version>1.0</spirit:version>
+ <spirit:busInterfaces>
+ <spirit:busInterface>
+ <spirit:name>CLK.ACLK</spirit:name>
+ <spirit:displayName>ACLK</spirit:displayName>
+ <spirit:description>AXI4 Interconnect Clock Input</spirit:description>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
+ <spirit:slave/>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>CLK</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_aclk</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>ASSOCIATED_BUSIF</spirit:name>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.CLK.ACLK.ASSOCIATED_BUSIF">AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI</spirit:value>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ASSOCIATED_RESET</spirit:name>
+ <spirit:value spirit:id="BUSIFPARAM_VALUE.CLK.ACLK.ASSOCIATED_RESET">s_aresetn</spirit:value>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>FREQ_HZ</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CLK.ACLK.FREQ_HZ">100000000</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>PHASE</spirit:name>
+ <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CLK.ACLK.PHASE">0.000</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>CLK_DOMAIN</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CLK.ACLK.CLK_DOMAIN"/>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>INSERT_VIP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.CLK.ACLK.INSERT_VIP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ </spirit:parameters>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>RST.ARESETN</spirit:name>
+ <spirit:displayName>ARESETN</spirit:displayName>
+ <spirit:description>AXI4 Interconnect Reset Input</spirit:description>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
+ <spirit:slave/>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_aresetn</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
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+ <spirit:value spirit:id="BUSIFPARAM_VALUE.RST.ARESETN.POLARITY">ACTIVE_LOW</spirit:value>
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+ <spirit:name>INSERT_VIP</spirit:name>
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+ <spirit:vendorExtensions>
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+ <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
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+ </spirit:parameter>
+ </spirit:parameters>
+ </spirit:busInterface>
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+ <spirit:name>AXI_SLAVE_S_AXI</spirit:name>
+ <spirit:displayName>AXI_SLAVE</spirit:displayName>
+ <spirit:description>AXI_SLAVE</spirit:description>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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+ <spirit:name>s_axi_araddr</spirit:name>
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+ <spirit:name>ARID</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_arid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
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+ <spirit:name>ARLEN</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>ARREADY</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>ARSIZE</spirit:name>
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+ <spirit:name>s_axi_arsize</spirit:name>
+ </spirit:physicalPort>
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+ <spirit:portMap>
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+ <spirit:name>ARVALID</spirit:name>
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+ <spirit:name>s_axi_arvalid</spirit:name>
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+ <spirit:name>s_axi_awid</spirit:name>
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+ <spirit:name>AWREADY</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>AWSIZE</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_bid</spirit:name>
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+ <spirit:name>BREADY</spirit:name>
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+ <spirit:name>BVALID</spirit:name>
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+ <spirit:name>RDATA</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_rdata</spirit:name>
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+ </spirit:portMap>
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+ <spirit:logicalPort>
+ <spirit:name>RID</spirit:name>
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+ <spirit:physicalPort>
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+ <spirit:logicalPort>
+ <spirit:name>RLAST</spirit:name>
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+ <spirit:portMap>
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+ <spirit:name>RRESP</spirit:name>
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+ <spirit:name>s_axi_rresp</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>RVALID</spirit:name>
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+ <spirit:name>s_axi_rvalid</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>WDATA</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_wdata</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>WLAST</spirit:name>
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+ <spirit:name>s_axi_wlast</spirit:name>
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+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WREADY</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_wready</spirit:name>
+ </spirit:physicalPort>
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+ <spirit:logicalPort>
+ <spirit:name>WSTRB</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_wstrb</spirit:name>
+ </spirit:physicalPort>
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+ <spirit:logicalPort>
+ <spirit:name>WVALID</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_wvalid</spirit:name>
+ </spirit:physicalPort>
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+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>DATA_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.DATA_WIDTH">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>PROTOCOL</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.PROTOCOL">AXI4LITE</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>FREQ_HZ</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.FREQ_HZ">100000000</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ID_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ID_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ADDR_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ADDR_WIDTH">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>AWUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.AWUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
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+ <spirit:parameter>
+ <spirit:name>ARUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ARUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
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+ <spirit:parameter>
+ <spirit:name>WUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.WUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>RUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.RUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>BUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.BUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>READ_WRITE_MODE</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_BURST</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_BURST">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_LOCK</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_LOCK">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_PROT</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_PROT">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_CACHE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_CACHE">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_QOS</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_QOS">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_REGION</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_REGION">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_WSTRB</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_WSTRB">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_BRESP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_BRESP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_RRESP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_RRESP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_READ_OUTSTANDING">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_WRITE_OUTSTANDING">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>MAX_BURST_LENGTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.MAX_BURST_LENGTH">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>PHASE</spirit:name>
+ <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.PHASE">0.000</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>CLK_DOMAIN</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.CLK_DOMAIN"/>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_READ_THREADS</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_READ_THREADS">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
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+ <spirit:parameter>
+ <spirit:name>NUM_WRITE_THREADS</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.NUM_WRITE_THREADS">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
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+ <spirit:parameter>
+ <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.RUSER_BITS_PER_BYTE">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
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+ <spirit:parameter>
+ <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.WUSER_BITS_PER_BYTE">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>INSERT_VIP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.INSERT_VIP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
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+ <spirit:vendorExtensions>
+ <xilinx:busInterfaceInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.AXI_SLAVE_S_AXI" xilinx:dependency="(((spirit:decode(id('MODELPARAM_VALUE.C_INTERFACE_TYPE')))=1) and ((spirit:decode(id('MODELPARAM_VALUE.C_AXI_TYPE')))= 1))">false</xilinx:isEnabled>
+ </xilinx:enablement>
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+ </spirit:vendorExtensions>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>AXILite_SLAVE_S_AXI</spirit:name>
+ <spirit:displayName>AXILite_SLAVE</spirit:displayName>
+ <spirit:description>AXILite_SLAVE</spirit:description>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
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+ <spirit:portMaps>
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+ <spirit:logicalPort>
+ <spirit:name>ARADDR</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_araddr</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>ARBURST</spirit:name>
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+ <spirit:physicalPort>
+ <spirit:name>s_axi_arburst</spirit:name>
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+ <spirit:logicalPort>
+ <spirit:name>ARID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARLEN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arlen</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARSIZE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arsize</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ARVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_arvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awaddr</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWBURST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awburst</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWLEN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awlen</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWSIZE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awsize</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>AWVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_awvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>BVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_bvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RLAST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rlast</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RRESP</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rresp</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_rvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WDATA</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wdata</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WLAST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wlast</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WREADY</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wready</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WSTRB</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wstrb</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WVALID</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>s_axi_wvalid</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>DATA_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.DATA_WIDTH">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>PROTOCOL</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.PROTOCOL">AXI4LITE</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>FREQ_HZ</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.FREQ_HZ">100000000</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ID_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ID_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ADDR_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ADDR_WIDTH">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>AWUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.AWUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ARUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ARUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>WUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.WUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>RUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.RUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>BUSER_WIDTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.BUSER_WIDTH">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>READ_WRITE_MODE</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_BURST</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_BURST">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_LOCK</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_LOCK">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_PROT</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_PROT">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_CACHE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_CACHE">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_QOS</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_QOS">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_REGION</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_REGION">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_WSTRB</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_WSTRB">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_BRESP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_BRESP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>HAS_RRESP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_RRESP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_READ_OUTSTANDING">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_WRITE_OUTSTANDING">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>MAX_BURST_LENGTH</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.MAX_BURST_LENGTH">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>PHASE</spirit:name>
+ <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.PHASE">0.000</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>CLK_DOMAIN</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.CLK_DOMAIN"/>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_READ_THREADS</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_READ_THREADS">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>NUM_WRITE_THREADS</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.NUM_WRITE_THREADS">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.RUSER_BITS_PER_BYTE">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.WUSER_BITS_PER_BYTE">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>INSERT_VIP</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.INSERT_VIP">0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ </spirit:parameters>
+ <spirit:vendorExtensions>
+ <xilinx:busInterfaceInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.AXILite_SLAVE_S_AXI" xilinx:dependency="(((spirit:decode(id('MODELPARAM_VALUE.C_INTERFACE_TYPE')))=1) and ((spirit:decode(id('MODELPARAM_VALUE.C_AXI_TYPE')))= 0))">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:busInterfaceInfo>
+ </spirit:vendorExtensions>
+ </spirit:busInterface>
+ <spirit:busInterface>
+ <spirit:name>BRAM_PORTA</spirit:name>
+ <spirit:displayName>BRAM_PORTA</spirit:displayName>
+ <spirit:description>BRAM_PORTA</spirit:description>
+ <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="bram" spirit:version="1.0"/>
+ <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="bram_rtl" spirit:version="1.0"/>
+ <spirit:slave/>
+ <spirit:portMaps>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>ADDR</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>addra</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>CLK</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>clka</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>DIN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>dina</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>DOUT</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>douta</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>EN</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>ena</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>RST</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>rsta</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ <spirit:portMap>
+ <spirit:logicalPort>
+ <spirit:name>WE</spirit:name>
+ </spirit:logicalPort>
+ <spirit:physicalPort>
+ <spirit:name>wea</spirit:name>
+ </spirit:physicalPort>
+ </spirit:portMap>
+ </spirit:portMaps>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>MEM_SIZE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.BRAM_PORTA.MEM_SIZE">8192</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:parameterUsage>none</xilinx:parameterUsage>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
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+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_READ_LATENCY_B</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_READ_LATENCY_B">1</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_HAS_INJECTERR</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_HAS_INJECTERR">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="STRING">
+ <spirit:name>C_SIM_COLLISION_CHECK</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_SIM_COLLISION_CHECK">ALL</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_COMMON_CLK</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_COMMON_CLK">1</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_DISABLE_WARN_BHV_COLL</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_DISABLE_WARN_BHV_COLL">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_EN_SLEEP_PIN</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_SLEEP_PIN">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_USE_URAM</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_USE_URAM">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_EN_RDADDRA_CHG</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_RDADDRA_CHG">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_EN_RDADDRB_CHG</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_RDADDRB_CHG">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_EN_DEEPSLEEP_PIN</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_DEEPSLEEP_PIN">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_EN_SHUTDOWN_PIN</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_SHUTDOWN_PIN">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_EN_SAFETY_CKT</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_SAFETY_CKT">1</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="INTEGER">
+ <spirit:name>C_DISABLE_WARN_BHV_RANGE</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_DISABLE_WARN_BHV_RANGE">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="STRING">
+ <spirit:name>C_COUNT_36K_BRAM</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_COUNT_36K_BRAM">1</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="STRING">
+ <spirit:name>C_COUNT_18K_BRAM</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_COUNT_18K_BRAM">0</spirit:value>
+ </spirit:modelParameter>
+ <spirit:modelParameter spirit:dataType="STRING">
+ <spirit:name>C_EST_POWER_SUMMARY</spirit:name>
+ <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EST_POWER_SUMMARY">Estimated Power for IP : 4.971749 mW</spirit:value>
+ </spirit:modelParameter>
+ </spirit:modelParameters>
+ </spirit:model>
+ <spirit:choices>
+ <spirit:choice>
+ <spirit:name>choice_list_302d3091</spirit:name>
+ <spirit:enumeration>16kx1</spirit:enumeration>
+ <spirit:enumeration>8kx2</spirit:enumeration>
+ <spirit:enumeration>4kx4</spirit:enumeration>
+ <spirit:enumeration>2kx9</spirit:enumeration>
+ <spirit:enumeration>1kx18</spirit:enumeration>
+ <spirit:enumeration>512x36</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_5453281d</spirit:name>
+ <spirit:enumeration>Native</spirit:enumeration>
+ <spirit:enumeration>AXI4</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_6e3ded9c</spirit:name>
+ <spirit:enumeration>0</spirit:enumeration>
+ <spirit:enumeration>1</spirit:enumeration>
+ <spirit:enumeration>2</spirit:enumeration>
+ <spirit:enumeration>3</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_8112d406</spirit:name>
+ <spirit:enumeration>8</spirit:enumeration>
+ <spirit:enumeration>16</spirit:enumeration>
+ <spirit:enumeration>32</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_89a27b2f</spirit:name>
+ <spirit:enumeration>8</spirit:enumeration>
+ <spirit:enumeration>9</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_9ad8826b</spirit:name>
+ <spirit:enumeration>8</spirit:enumeration>
+ <spirit:enumeration>16</spirit:enumeration>
+ <spirit:enumeration>32</spirit:enumeration>
+ <spirit:enumeration>64</spirit:enumeration>
+ <spirit:enumeration>128</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_bdf7387e</spirit:name>
+ <spirit:enumeration>BRAM</spirit:enumeration>
+ <spirit:enumeration>URAM</spirit:enumeration>
+ <spirit:enumeration>AUTO</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_list_c8df20f0</spirit:name>
+ <spirit:enumeration>NONE</spirit:enumeration>
+ <spirit:enumeration>ECCH32-7</spirit:enumeration>
+ <spirit:enumeration>ECCH64-8</spirit:enumeration>
+ <spirit:enumeration>ECCHSIAO32-7</spirit:enumeration>
+ <spirit:enumeration>ECCHSIAO64-8</spirit:enumeration>
+ <spirit:enumeration>ECCHSIAO128-9</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_246d8066</spirit:name>
+ <spirit:enumeration spirit:text="Write First">WRITE_FIRST</spirit:enumeration>
+ <spirit:enumeration spirit:text="Read First">READ_FIRST</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_27c66b0d</spirit:name>
+ <spirit:enumeration spirit:text="Stand Alone">Stand_Alone</spirit:enumeration>
+ <spirit:enumeration spirit:text="BRAM Controller">BRAM_Controller</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_2adcaf32</spirit:name>
+ <spirit:enumeration spirit:text="Synchronous">SYNC</spirit:enumeration>
+ <spirit:enumeration spirit:text="Asynchronous">ASYNC</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_2d73cdeb</spirit:name>
+ <spirit:enumeration spirit:text="Always Enabled">Always_Enabled</spirit:enumeration>
+ <spirit:enumeration spirit:text="Use ENB Pin">Use_ENB_Pin</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_3949ecbf</spirit:name>
+ <spirit:enumeration spirit:text="Always Enabled">Always_Enabled</spirit:enumeration>
+ <spirit:enumeration spirit:text="Use ENA Pin">Use_ENA_Pin</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_3e9ce7ae</spirit:name>
+ <spirit:enumeration spirit:text="Minimum Area">Minimum_Area</spirit:enumeration>
+ <spirit:enumeration spirit:text="Low Power">Low_Power</spirit:enumeration>
+ <spirit:enumeration spirit:text="Fixed Primitives">Fixed_Primitives</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_44b9b2d1</spirit:name>
+ <spirit:enumeration spirit:text="All">ALL</spirit:enumeration>
+ <spirit:enumeration spirit:text="None">NONE</spirit:enumeration>
+ <spirit:enumeration spirit:text="Warning Only">WARNING_ONLY</spirit:enumeration>
+ <spirit:enumeration spirit:text="Generate X-Only">GENERATE_X_ONLY</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_63de7f78</spirit:name>
+ <spirit:enumeration spirit:text="CE (Latch or Register Enable)">CE</spirit:enumeration>
+ <spirit:enumeration spirit:text="SR (Set Reset)">SR</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_716d2fba</spirit:name>
+ <spirit:enumeration spirit:text="Single Bit Error Injection">Single_Bit_Error_Injection</spirit:enumeration>
+ <spirit:enumeration spirit:text="Double Bit Error Injection">Double_Bit_Error_Injection</spirit:enumeration>
+ <spirit:enumeration spirit:text="Single and Double Bit Error Injection">Single_and_Double_Bit_Error_Injection</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_b91edaa2</spirit:name>
+ <spirit:enumeration spirit:text="Memory Slave">Memory_Slave</spirit:enumeration>
+ <spirit:enumeration spirit:text="Peripheral Slave">Peripheral_Slave</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_c1013cbe</spirit:name>
+ <spirit:enumeration spirit:text="No ECC">No_ECC</spirit:enumeration>
+ <spirit:enumeration spirit:text="Soft ECC">Soft_ECC</spirit:enumeration>
+ <spirit:enumeration spirit:text="BuiltIn ECC">BuiltIn_ECC</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_e4c322cb</spirit:name>
+ <spirit:enumeration spirit:text="AXI4">AXI4_Full</spirit:enumeration>
+ <spirit:enumeration spirit:text="AXI4 Lite">AXI4_Lite</spirit:enumeration>
+ </spirit:choice>
+ <spirit:choice>
+ <spirit:name>choice_pairs_e932d933</spirit:name>
+ <spirit:enumeration spirit:text="Single Port RAM">Single_Port_RAM</spirit:enumeration>
+ <spirit:enumeration spirit:text="Simple Dual Port RAM">Simple_Dual_Port_RAM</spirit:enumeration>
+ <spirit:enumeration spirit:text="True Dual Port RAM">True_Dual_Port_RAM</spirit:enumeration>
+ <spirit:enumeration spirit:text="Single Port ROM">Single_Port_ROM</spirit:enumeration>
+ <spirit:enumeration spirit:text="Dual Port ROM">Dual_Port_ROM</spirit:enumeration>
+ </spirit:choice>
+ </spirit:choices>
+ <spirit:fileSets>
+ <spirit:fileSet>
+ <spirit:name>xilinx_vhdlsynthesis_view_fileset</spirit:name>
+ <spirit:file>
+ <spirit:name>blk_mem_gen_0_ooc.xdc</spirit:name>
+ <spirit:userFileType>xdc</spirit:userFileType>
+ <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
+ <spirit:userFileType>USED_IN_out_of_context</spirit:userFileType>
+ <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
+ </spirit:file>
+ <spirit:file>
+ <spirit:name>hdl/blk_mem_gen_v8_4_vhsyn_rfs.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ <spirit:logicalName>blk_mem_gen_v8_4_4</spirit:logicalName>
+ </spirit:file>
+ </spirit:fileSet>
+ <spirit:fileSet>
+ <spirit:name>xilinx_vhdlsynthesiswrapper_view_fileset</spirit:name>
+ <spirit:file>
+ <spirit:name>synth/blk_mem_gen_0.vhd</spirit:name>
+ <spirit:fileType>vhdlSource</spirit:fileType>
+ <spirit:logicalName>xil_defaultlib</spirit:logicalName>
+ </spirit:file>
+ </spirit:fileSet>
+ </spirit:fileSets>
+ <spirit:description>The Xilinx LogiCORE IP Block Memory Generator replaces the Dual Port Block Memory and Single Port Block Memory LogiCOREs, but is not a direct drop-in replacement. It should be used in all new Xilinx designs. The core supports RAM and ROM functions over a wide range of widths and depths. Use this core to generate block memories with symmetric or asymmetric read and write port widths, as well as cores which can perform simultaneous write operations to separate locations, and simultaneous read operations from the same location. For more information on differences in interface and feature support between this core and the Dual Port Block Memory and Single Port Block Memory LogiCOREs, please consult the data sheet.</spirit:description>
+ <spirit:parameters>
+ <spirit:parameter>
+ <spirit:name>Component_Name</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">blk_mem_gen_0</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Component_Name">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Interface_Type</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Interface_Type" spirit:choiceRef="choice_list_5453281d" spirit:order="2">Native</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Interface_Type">true</xilinx:isEnabled>
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+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>AXI_Type</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_Type" spirit:choiceRef="choice_pairs_e4c322cb" spirit:order="4">AXI4_Full</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.AXI_Type">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>AXI_Slave_Type</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_Slave_Type" spirit:choiceRef="choice_pairs_b91edaa2" spirit:order="5">Memory_Slave</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.AXI_Slave_Type">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Use_AXI_ID</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.Use_AXI_ID" spirit:order="6">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Use_AXI_ID">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>AXI_ID_Width</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.AXI_ID_Width" spirit:order="7" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.AXI_ID_Width">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Memory_Type</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Memory_Type" spirit:choiceRef="choice_pairs_e932d933" spirit:order="8">True_Dual_Port_RAM</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Memory_Type">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>PRIM_type_to_Implement</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PRIM_type_to_Implement" spirit:choiceRef="choice_list_bdf7387e" spirit:order="8.001">BRAM</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PRIM_type_to_Implement">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Enable_32bit_Address</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.Enable_32bit_Address" spirit:order="9">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Enable_32bit_Address">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ecctype</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.ecctype" spirit:choiceRef="choice_pairs_c1013cbe" spirit:order="10">No_ECC</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.ecctype">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>ECC</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.ECC" spirit:order="11">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.ECC">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>softecc</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.softecc" spirit:order="12">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.softecc">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>EN_SLEEP_PIN</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.EN_SLEEP_PIN" spirit:order="13">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.EN_SLEEP_PIN">true</xilinx:isEnabled>
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+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>EN_DEEPSLEEP_PIN</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.EN_DEEPSLEEP_PIN" spirit:order="14">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.EN_DEEPSLEEP_PIN">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>EN_SHUTDOWN_PIN</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.EN_SHUTDOWN_PIN" spirit:order="15">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.EN_SHUTDOWN_PIN">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>EN_ECC_PIPE</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.EN_ECC_PIPE" spirit:order="16">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.EN_ECC_PIPE">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>RD_ADDR_CHNG_A</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.RD_ADDR_CHNG_A" spirit:order="17">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.RD_ADDR_CHNG_A">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>RD_ADDR_CHNG_B</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.RD_ADDR_CHNG_B" spirit:order="18">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.RD_ADDR_CHNG_B">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Use_Error_Injection_Pins</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.Use_Error_Injection_Pins" spirit:order="13">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Use_Error_Injection_Pins">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Error_Injection_Type</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Error_Injection_Type" spirit:choiceRef="choice_pairs_716d2fba" spirit:order="14">Single_Bit_Error_Injection</spirit:value>
+ <spirit:vendorExtensions>
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+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.Port_A_Enable_Rate" spirit:order="56" spirit:minimum="0" spirit:maximum="100" spirit:rangeType="long">100</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Port_A_Enable_Rate">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Port_B_Enable_Rate</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.Port_B_Enable_Rate" spirit:order="57" spirit:minimum="0" spirit:maximum="100" spirit:rangeType="long">100</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Port_B_Enable_Rate">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Collision_Warnings</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Collision_Warnings" spirit:choiceRef="choice_pairs_44b9b2d1" spirit:order="58">ALL</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Collision_Warnings">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Disable_Collision_Warnings</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.Disable_Collision_Warnings" spirit:order="59">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Disable_Collision_Warnings">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>Disable_Out_of_Range_Warnings</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.Disable_Out_of_Range_Warnings" spirit:order="60">false</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.Disable_Out_of_Range_Warnings">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>use_bram_block</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.use_bram_block" spirit:choiceRef="choice_pairs_27c66b0d" spirit:order="3">Stand_Alone</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.use_bram_block">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>MEM_FILE</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.MEM_FILE" spirit:order="61">no_mem_loaded</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.MEM_FILE">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>CTRL_ECC_ALGO</spirit:name>
+ <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.CTRL_ECC_ALGO" spirit:choiceRef="choice_list_c8df20f0" spirit:order="62">NONE</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.CTRL_ECC_ALGO">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>EN_SAFETY_CKT</spirit:name>
+ <spirit:value spirit:format="bool" spirit:resolve="user" spirit:id="PARAM_VALUE.EN_SAFETY_CKT" spirit:order="63">true</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.EN_SAFETY_CKT">true</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>READ_LATENCY_A</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.READ_LATENCY_A" spirit:order="63" spirit:minimum="1" spirit:maximum="128" spirit:rangeType="long">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.READ_LATENCY_A">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ <spirit:parameter>
+ <spirit:name>READ_LATENCY_B</spirit:name>
+ <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.READ_LATENCY_B" spirit:order="63" spirit:minimum="1" spirit:maximum="128" spirit:rangeType="long">1</spirit:value>
+ <spirit:vendorExtensions>
+ <xilinx:parameterInfo>
+ <xilinx:enablement>
+ <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.READ_LATENCY_B">false</xilinx:isEnabled>
+ </xilinx:enablement>
+ </xilinx:parameterInfo>
+ </spirit:vendorExtensions>
+ </spirit:parameter>
+ </spirit:parameters>
+ <spirit:vendorExtensions>
+ <xilinx:coreExtensions>
+ <xilinx:displayName>Block Memory Generator</xilinx:displayName>
+ <xilinx:xpmLibraries>
+ <xilinx:xpmLibrary>XPM_MEMORY</xilinx:xpmLibrary>
+ </xilinx:xpmLibraries>
+ <xilinx:coreRevision>4</xilinx:coreRevision>
+ <xilinx:configElementInfos>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ADDR_WIDTH" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.ARUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.AWUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.BUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.DATA_WIDTH" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_BRESP" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_BURST" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_CACHE" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_LOCK" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_PROT" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_QOS" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_REGION" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.PROTOCOL" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXILITE_SLAVE_S_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ADDR_WIDTH" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.ARUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.AWUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.BUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.DATA_WIDTH" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_BRESP" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_BURST" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_CACHE" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_LOCK" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_PROT" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_QOS" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_REGION" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.PROTOCOL" xilinx:valueSource="auto"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.AXI_SLAVE_S_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Algorithm" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Assume_Synchronous_Clk" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Byte_Size" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.EN_SAFETY_CKT" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Enable_B" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Memory_Type" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Port_B_Clock" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Port_B_Enable_Rate" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Port_B_Write_Rate" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Primitive" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Read_Width_A" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Read_Width_B" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Register_PortB_Output_of_Memory_Primitives" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Use_Byte_Write_Enable" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Use_RSTA_Pin" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Use_RSTB_Pin" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Write_Depth_A" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Write_Width_A" xilinx:valueSource="user"/>
+ <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Write_Width_B" xilinx:valueSource="user"/>
+ </xilinx:configElementInfos>
+ </xilinx:coreExtensions>
+ <xilinx:packagingInfo>
+ <xilinx:xilinxVersion>2019.2</xilinx:xilinxVersion>
+ <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="52ed1045"/>
+ <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="a1d35893"/>
+ <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="4ba6d99f"/>
+ <xilinx:checksum xilinx:scope="ports" xilinx:value="3031f2fd"/>
+ <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="9c3516e3"/>
+ <xilinx:checksum xilinx:scope="parameters" xilinx:value="e6bad347"/>
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+ </spirit:vendorExtensions>
+</spirit:component>