diff --git a/tools/config/scalp_aurora_phy.json b/tools/config/scalp_aurora_phy.json
new file mode 100644
index 0000000000000000000000000000000000000000..06c46fed7e53561ad384e5371cbf58bda086acbb
--- /dev/null
+++ b/tools/config/scalp_aurora_phy.json
@@ -0,0 +1,25 @@
+{
+    "author" : {
+        "name"  : "Joachim Schmidt",
+        "email" : "<joachim.schmidt@hesge.ch"
+    },
+    "project" : {
+        "name"            : "scalp_aurora_phy",
+        "type"            : "COMP_PRJ_TYPE",
+        "category"        : "IPS",
+        "vivado_version"  : "2019.2",
+        "target_language" : "VHDL",
+        "vhdl_version"    : "VHDL 2008"
+    },
+    "hardware" : {
+        "part_name"  : "xc7z015clg485-2",
+        "board_name" : "SCALP"
+    },
+    "components" : {
+        "packages" : {
+            "aurora_drp_pkg"    : "enable",
+            "aurora_status_pkg" : "enable",
+            "axi4_pkg"          : "enable"
+        }
+    }
+}
diff --git a/tools/config/scalp_firmware.json b/tools/config/scalp_firmware.json
index 1e259d2d86de5d3d8ac3895b321a4c1daf25262b..b57d97c0b7374db673d72b9b1a3cd5314ba40aff 100644
--- a/tools/config/scalp_firmware.json
+++ b/tools/config/scalp_firmware.json
@@ -11,16 +11,16 @@
         "target_language" : "VHDL",
         "vhdl_version"    : "VHDL 2008"
     },
+    "hardware" : {
+        "part_name"  : "xc7z015clg485-2",
+        "board_name" : "SCALP"
+    },
     "constraints" : {
         "scalp_firmware"     : "enable",
         "ibert_constraints"  : "disable",
         "debug"              : "enable",
         "timing_constraints" : "enable"
-    },
-    "hardware" : {
-        "part_name"  : "xc7z015clg485-2",
-        "board_name" : "SCALP"
-    },
+    },   
     "components" : {
         "packages" : {
             "aurora_drp_pkg"    : "enable",