From 86f7995d539c478069fcaaa7293ddaa091fb6842 Mon Sep 17 00:00:00 2001
From: "joachim.schmidt" <joachim.schmidt@hesge.ch>
Date: Tue, 13 Oct 2020 14:10:24 +0200
Subject: [PATCH] Addition of Zynq SoC.
---
.../scalp_zynqps/hdl/scalp_zynqps_wrapper.vhd | 109 -
.../hw_handoff/scalp_zynqps_bd.tcl | 646 -
.../scalp_zynqps_gnd_constant_0.xci | 48 -
.../scalp_zynqps_gnd_constant_0.xml | 265 -
.../sim/scalp_zynqps_gnd_constant_0.h | 67 -
.../sim/scalp_zynqps_gnd_constant_0.v | 68 -
.../sim/xlconstant_v1_1_6.h | 69 -
.../synth/scalp_zynqps_gnd_constant_0.v | 69 -
...ocessing_system7_v5_5_processing_system7.v | 3935 --
.../ps7_init.c | 12433 -----
.../ps7_init.h | 135 -
.../ps7_init.tcl | 835 -
.../ps7_init_gpl.c | 12431 -----
.../ps7_init_gpl.h | 131 -
.../ps7_parameters.xml | 643 -
.../scalp_zynqps_processing_system7_0_0.dcp | Bin 218914 -> 0 bytes
.../scalp_zynqps_processing_system7_0_0.xci | 1925 -
.../scalp_zynqps_processing_system7_0_0.xdc | 723 -
.../scalp_zynqps_processing_system7_0_0.xml | 40057 ----------------
...ynqps_processing_system7_0_0_sim_netlist.v | 5232 --
...scalp_zynqps_processing_system7_0_0_stub.v | 111 -
.../sim/scalp_zynqps_processing_system7_0_0.h | 178 -
.../sim/scalp_zynqps_processing_system7_0_0.v | 612 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../sim_tlm/b_transport_converter.h | 170 -
.../sim_tlm/processing_system7_v5_5_tlm.h | 232 -
.../sim_tlm/xilinx-zynq.h | 104 -
.../scalp_zynqps_processing_system7_0_0.v | 1039 -
.../scalp_zynqps_util_vector_logic_0_0.dcp | Bin 6415 -> 0 bytes
.../scalp_zynqps_util_vector_logic_0_0.xci | 51 -
.../scalp_zynqps_util_vector_logic_0_0.xml | 324 -
...zynqps_util_vector_logic_0_0_sim_netlist.v | 105 -
.../scalp_zynqps_util_vector_logic_0_0_stub.v | 22 -
.../sim/scalp_zynqps_util_vector_logic_0_0.v | 74 -
.../scalp_zynqps_util_vector_logic_0_0.v | 75 -
.../scalp_zynqps_util_vector_logic_1_0.dcp | Bin 6338 -> 0 bytes
.../scalp_zynqps_util_vector_logic_1_0.xci | 51 -
.../scalp_zynqps_util_vector_logic_1_0.xml | 324 -
...zynqps_util_vector_logic_1_0_sim_netlist.v | 101 -
.../scalp_zynqps_util_vector_logic_1_0_stub.v | 21 -
.../sim/scalp_zynqps_util_vector_logic_1_0.v | 72 -
.../scalp_zynqps_util_vector_logic_1_0.v | 73 -
.../scalp_zynqps_vio_0_0.dcp | Bin 114693 -> 0 bytes
.../scalp_zynqps_vio_0_0.xci | 832 -
.../scalp_zynqps_vio_0_0.xdc | 67 -
.../scalp_zynqps_vio_0_0.xml | 20730 --------
.../scalp_zynqps_vio_0_0_ooc.xdc | 57 -
.../scalp_zynqps_vio_0_0_sim_netlist.v | 7221 ---
.../scalp_zynqps_vio_0_0_stub.v | 21 -
.../sim/scalp_zynqps_vio_0_0.vhd | 62 -
.../synth/scalp_zynqps_vio_0_0.v | 1378 -
.../ipshared/122e/hdl/xsdbs_v1_0_vl_rfs.v | 520 -
.../ipshared/1b7e/hdl/ltlib_v1_0_vl_rfs.v | 1209 -
.../2137/hdl/util_vector_logic_v2_0_vl_rfs.v | 80 -
.../hdl/processing_system7_vip_v1_0_8_apis.v | 842 -
.../processing_system7_vip_v1_0_8_axi_acp.v | 94 -
.../processing_system7_vip_v1_0_8_axi_gp.v | 311 -
.../processing_system7_vip_v1_0_8_axi_hp.v | 350 -
...ocessing_system7_vip_v1_0_8_local_params.v | 244 -
.../processing_system7_vip_v1_0_8_reg_init.v | 2924 --
...processing_system7_vip_v1_0_8_reg_params.v | 10519 ----
...ocessing_system7_vip_v1_0_8_unused_ports.v | 433 -
.../34f7/hdl/xlconstant_v1_1_vl_rfs.v | 31 -
.../46fd/hdl/vio_v3_0_19_vio_include.v | 292 -
.../ipshared/46fd/hdl/vio_v3_0_syn_rfs.v | 5008 --
.../hdl/verilog/processing_system7_v5_5_atc.v | 409 -
.../verilog/processing_system7_v5_5_aw_atc.v | 298 -
.../verilog/processing_system7_v5_5_b_atc.v | 413 -
.../processing_system7_v5_5_trace_buffer.v | 310 -
.../verilog/processing_system7_v5_5_w_atc.v | 244 -
.../ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v | 670 -
.../.scripts/scalp_zynqps/scalp_zynqps.bd | 1097 -
.../.scripts/scalp_zynqps/scalp_zynqps.bxml | 89 -
.../scalp_zynqps/scalp_zynqps_ooc.xdc | 11 -
.../scalp_zynqps/sim/scalp_zynqps.vhd | 361 -
.../scalp_zynqps/synth/scalp_zynqps.vhd | 361 -
.../.scripts/scalp_zynqps/ui/bd_bb8b562f.ui | 37 -
.../0e76e0055f23d5f9/0e76e0055f23d5f9.xci | 40 -
.../scalp_zynqps_util_vector_logic_1_0.dcp | Bin 6354 -> 0 bytes
...zynqps_util_vector_logic_1_0_sim_netlist.v | 101 -
.../scalp_zynqps_util_vector_logic_1_0_stub.v | 21 -
.../2e46931808b7c212/2e46931808b7c212.xci | 40 -
.../scalp_zynqps_util_vector_logic_0_0.dcp | Bin 6431 -> 0 bytes
...zynqps_util_vector_logic_0_0_sim_netlist.v | 105 -
.../scalp_zynqps_util_vector_logic_0_0_stub.v | 22 -
.../afab8f8185921798/afab8f8185921798.xci | 810 -
.../afab8f8185921798/scalp_zynqps_vio_0_0.dcp | Bin 114411 -> 0 bytes
.../scalp_zynqps_vio_0_0_sim_netlist.v | 7217 ---
.../scalp_zynqps_vio_0_0_stub.v | 21 -
.../b32362bd6ba3a9e9/b32362bd6ba3a9e9.xci | 916 -
.../scalp_zynqps_processing_system7_0_0.dcp | Bin 218853 -> 0 bytes
...ynqps_processing_system7_0_0_sim_netlist.v | 5232 --
...scalp_zynqps_processing_system7_0_0_stub.v | 111 -
.../scalp_zynqps.cache/wt/webtalk_pa.xml | 52 -
.../scalp_zynqps.ip_user_files/README.txt | 1 -
.../sim/scalp_zynqps_gnd_constant_0.v | 68 -
.../sim/scalp_zynqps_processing_system7_0_0.v | 612 -
.../sim/scalp_zynqps_util_vector_logic_0_0.v | 74 -
.../sim/scalp_zynqps_util_vector_logic_1_0.v | 72 -
.../sim/scalp_zynqps_vio_0_0.vhd | 62 -
.../scalp_zynqps/sim/scalp_zynqps.vhd | 361 -
.../mem_init_files/b_transport_converter.h | 170 -
.../processing_system7_v5_5_tlm.h | 232 -
.../mem_init_files/ps7_init.tcl | 835 -
.../scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../mem_init_files/xilinx-zynq.h | 104 -
.../mem_init_files/xlconstant_v1_1_6.h | 69 -
.../sim_scripts/scalp_zynqps/README.txt | 83 -
.../scalp_zynqps/activehdl/README.txt | 49 -
.../activehdl/b_transport_converter.h | 170 -
.../scalp_zynqps/activehdl/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/activehdl/glbl.v | 71 -
.../activehdl/processing_system7_v5_5_tlm.h | 232 -
.../scalp_zynqps/activehdl/ps7_init.tcl | 835 -
.../scalp_zynqps/activehdl/scalp_zynqps.sh | 152 -
.../activehdl/scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/activehdl/xilinx-zynq.h | 104 -
.../activehdl/xlconstant_v1_1_6.h | 69 -
.../sim_scripts/scalp_zynqps/ies/README.txt | 48 -
.../scalp_zynqps/ies/b_transport_converter.h | 170 -
.../scalp_zynqps/ies/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/ies/glbl.v | 71 -
.../ies/processing_system7_v5_5_tlm.h | 232 -
.../sim_scripts/scalp_zynqps/ies/ps7_init.tcl | 835 -
.../scalp_zynqps/ies/scalp_zynqps.sh | 184 -
.../ies/scalp_zynqps_gnd_constant_0.h | 67 -
.../ies/scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/ies/xilinx-zynq.h | 104 -
.../scalp_zynqps/ies/xlconstant_v1_1_6.h | 69 -
.../scalp_zynqps/modelsim/README.txt | 49 -
.../modelsim/b_transport_converter.h | 170 -
.../scalp_zynqps/modelsim/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/modelsim/glbl.v | 71 -
.../modelsim/processing_system7_v5_5_tlm.h | 232 -
.../scalp_zynqps/modelsim/ps7_init.tcl | 835 -
.../scalp_zynqps/modelsim/scalp_zynqps.sh | 167 -
.../modelsim/scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/modelsim/xilinx-zynq.h | 104 -
.../scalp_zynqps/modelsim/xlconstant_v1_1_6.h | 69 -
.../scalp_zynqps/questa/README.txt | 49 -
.../questa/b_transport_converter.h | 170 -
.../scalp_zynqps/questa/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/questa/glbl.v | 71 -
.../questa/processing_system7_v5_5_tlm.h | 232 -
.../scalp_zynqps/questa/ps7_init.tcl | 835 -
.../scalp_zynqps/questa/scalp_zynqps.sh | 174 -
.../questa/scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/questa/xilinx-zynq.h | 104 -
.../scalp_zynqps/questa/xlconstant_v1_1_6.h | 69 -
.../scalp_zynqps/riviera/README.txt | 49 -
.../riviera/b_transport_converter.h | 170 -
.../scalp_zynqps/riviera/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/riviera/glbl.v | 71 -
.../riviera/processing_system7_v5_5_tlm.h | 232 -
.../scalp_zynqps/riviera/ps7_init.tcl | 835 -
.../scalp_zynqps/riviera/scalp_zynqps.sh | 153 -
.../riviera/scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/riviera/xilinx-zynq.h | 104 -
.../scalp_zynqps/riviera/xlconstant_v1_1_6.h | 69 -
.../sim_scripts/scalp_zynqps/vcs/README.txt | 49 -
.../scalp_zynqps/vcs/b_transport_converter.h | 170 -
.../scalp_zynqps/vcs/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/vcs/glbl.v | 71 -
.../vcs/processing_system7_v5_5_tlm.h | 232 -
.../sim_scripts/scalp_zynqps/vcs/ps7_init.tcl | 835 -
.../scalp_zynqps/vcs/scalp_zynqps.sh | 267 -
.../vcs/scalp_zynqps_gnd_constant_0.h | 67 -
.../vcs/scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/vcs/xilinx-zynq.h | 104 -
.../scalp_zynqps/vcs/xlconstant_v1_1_6.h | 69 -
.../scalp_zynqps/xcelium/README.txt | 48 -
.../xcelium/b_transport_converter.h | 170 -
.../scalp_zynqps/xcelium/file_info.txt | 21 -
.../sim_scripts/scalp_zynqps/xcelium/glbl.v | 71 -
.../xcelium/processing_system7_v5_5_tlm.h | 232 -
.../scalp_zynqps/xcelium/ps7_init.tcl | 835 -
.../scalp_zynqps/xcelium/scalp_zynqps.sh | 184 -
.../xcelium/scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../scalp_zynqps/xcelium/xilinx-zynq.h | 104 -
.../scalp_zynqps/xcelium/xlconstant_v1_1_6.h | 69 -
.../sim_scripts/scalp_zynqps/xsim/README.txt | 49 -
.../scalp_zynqps/xsim/b_transport_converter.h | 170 -
.../sim_scripts/scalp_zynqps/xsim/cmd.tcl | 12 -
.../scalp_zynqps/xsim/file_info.txt | 7 -
.../sim_scripts/scalp_zynqps/xsim/glbl.v | 71 -
.../xsim/processing_system7_v5_5_tlm.h | 232 -
.../scalp_zynqps/xsim/ps7_init.tcl | 835 -
.../scalp_zynqps/xsim/scalp_zynqps.sh | 214 -
.../xsim/scalp_zynqps_gnd_constant_0.h | 67 -
.../scalp_zynqps_processing_system7_0_0.h | 178 -
.../scalp_zynqps_processing_system7_0_0_sc.h | 93 -
.../sim_scripts/scalp_zynqps/xsim/vhdl.prj | 5 -
.../sim_scripts/scalp_zynqps/xsim/vlog.prj | 9 -
.../scalp_zynqps/xsim/xilinx-zynq.h | 104 -
.../scalp_zynqps/xsim/xlconstant_v1_1_6.h | 69 -
.../scalp_zynqps.runs/.jobs/vrs_config_1.xml | 12 -
.../scalp_zynqps.runs/.jobs/vrs_config_2.xml | 18 -
...zynqps_processing_system7_0_0_propImpl.xdc | 264 -
.../ISEWrap.sh | 67 -
.../dont_touch.xdc | 16 -
.../gen_run.xml | 54 -
.../htr.txt | 9 -
.../runme.sh | 39 -
.../scalp_zynqps_processing_system7_0_0.dcp | Bin 218914 -> 0 bytes
.../scalp_zynqps_processing_system7_0_0.tcl | 171 -
.../scalp_zynqps_processing_system7_0_0.vds | 442 -
...rocessing_system7_0_0_utilization_synth.pb | Bin 276 -> 0 bytes
...ocessing_system7_0_0_utilization_synth.rpt | 175 -
.../vivado.jou | 12 -
.../vivado.pb | Bin 60212 -> 0 bytes
.../ISEWrap.sh | 67 -
.../gen_run.xml | 54 -
.../htr.txt | 9 -
.../runme.sh | 39 -
.../scalp_zynqps_util_vector_logic_0_0.dcp | Bin 6415 -> 0 bytes
.../scalp_zynqps_util_vector_logic_0_0.tcl | 168 -
.../scalp_zynqps_util_vector_logic_0_0.vds | 232 -
...util_vector_logic_0_0_utilization_synth.pb | Bin 276 -> 0 bytes
...til_vector_logic_0_0_utilization_synth.rpt | 172 -
.../vivado.jou | 12 -
.../vivado.pb | Bin 26501 -> 0 bytes
.../ISEWrap.sh | 67 -
.../gen_run.xml | 54 -
.../htr.txt | 9 -
.../runme.sh | 39 -
.../scalp_zynqps_util_vector_logic_1_0.dcp | Bin 6338 -> 0 bytes
.../scalp_zynqps_util_vector_logic_1_0.tcl | 168 -
.../scalp_zynqps_util_vector_logic_1_0.vds | 233 -
...util_vector_logic_1_0_utilization_synth.pb | Bin 276 -> 0 bytes
...til_vector_logic_1_0_utilization_synth.rpt | 172 -
.../vivado.jou | 12 -
.../vivado.pb | Bin 26666 -> 0 bytes
.../scalp_zynqps_vio_0_0_synth_1/ISEWrap.sh | 67 -
.../scalp_zynqps_vio_0_0_synth_1/gen_run.xml | 54 -
.../scalp_zynqps_vio_0_0_synth_1/htr.txt | 9 -
.../scalp_zynqps_vio_0_0_synth_1/runme.sh | 39 -
.../scalp_zynqps_vio_0_0.dcp | Bin 114693 -> 0 bytes
.../scalp_zynqps_vio_0_0.tcl | 170 -
.../scalp_zynqps_vio_0_0.vds | 495 -
.../scalp_zynqps_vio_0_0_utilization_synth.pb | Bin 276 -> 0 bytes
...scalp_zynqps_vio_0_0_utilization_synth.rpt | 177 -
.../scalp_zynqps_vio_0_0_synth_1/vivado.jou | 12 -
.../scalp_zynqps_vio_0_0_synth_1/vivado.pb | Bin 64534 -> 0 bytes
.../scalp_zynqps.runs/synth_1/ISEWrap.sh | 67 -
.../scalp_zynqps.runs/synth_1/dont_touch.xdc | 22 -
.../scalp_zynqps.runs/synth_1/gen_run.xml | 53 -
.../scalp_zynqps.runs/synth_1/htr.txt | 9 -
.../scalp_zynqps.runs/synth_1/runme.sh | 39 -
.../synth_1/scalp_zynqps.dcp | Bin 43538 -> 0 bytes
.../synth_1/scalp_zynqps.tcl | 61 -
.../synth_1/scalp_zynqps.vds | 557 -
.../synth_1/scalp_zynqps_utilization_synth.pb | Bin 276 -> 0 bytes
.../scalp_zynqps_utilization_synth.rpt | 178 -
.../scalp_zynqps.runs/synth_1/vivado.jou | 12 -
.../scalp_zynqps.runs/synth_1/vivado.pb | Bin 40421 -> 0 bytes
.../lin64/scalp_zynqps/scalp_zynqps.xpr | 357 -
270 files changed, 180728 deletions(-)
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hdl/scalp_zynqps_wrapper.vhd
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hw_handoff/scalp_zynqps_bd.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/synth/scalp_zynqps_gnd_constant_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/hdl/verilog/processing_system7_v5_5_processing_system7.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.c
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.c
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_parameters.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xdc
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_sim_netlist.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/xilinx-zynq.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/synth/scalp_zynqps_processing_system7_0_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/synth/scalp_zynqps_util_vector_logic_0_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/synth/scalp_zynqps_util_vector_logic_1_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xdc
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_ooc.xdc
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_sim_netlist.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/synth/scalp_zynqps_vio_0_0.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/122e/hdl/xsdbs_v1_0_vl_rfs.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/1b7e/hdl/ltlib_v1_0_vl_rfs.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_apis.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_acp.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_gp.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_hp.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_local_params.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_init.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_params.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_unused_ports.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_19_vio_include.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_syn_rfs.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_atc.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_aw_atc.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_b_atc.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_trace_buffer.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_w_atc.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bd
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bxml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps_ooc.xdc
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/synth/scalp_zynqps.vhd
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ui/bd_bb8b562f.ui
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/0e76e0055f23d5f9.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0.dcp
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/2e46931808b7c212.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0.dcp
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/afab8f8185921798.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0.dcp
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_sim_netlist.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/b32362bd6ba3a9e9.xci
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0.dcp
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_sim_netlist.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_stub.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/wt/webtalk_pa.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/README.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/b_transport_converter.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/README.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/README.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/b_transport_converter.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/cmd.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/file_info.txt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/glbl.v
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/processing_system7_v5_5_tlm.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/ps7_init.tcl
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/scalp_zynqps.sh
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/scalp_zynqps_gnd_constant_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/scalp_zynqps_processing_system7_0_0.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/scalp_zynqps_processing_system7_0_0_sc.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/vhdl.prj
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/vlog.prj
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/xilinx-zynq.h
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/xlconstant_v1_1_6.h
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/.jobs/vrs_config_1.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/.jobs/vrs_config_2.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/.Xil/scalp_zynqps_processing_system7_0_0_propImpl.xdc
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/ISEWrap.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/dont_touch.xdc
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/gen_run.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/htr.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/runme.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/scalp_zynqps_processing_system7_0_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/scalp_zynqps_processing_system7_0_0.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/scalp_zynqps_processing_system7_0_0.vds
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/scalp_zynqps_processing_system7_0_0_utilization_synth.pb
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/scalp_zynqps_processing_system7_0_0_utilization_synth.rpt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/vivado.jou
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_processing_system7_0_0_synth_1/vivado.pb
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/ISEWrap.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/gen_run.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/htr.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/runme.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/scalp_zynqps_util_vector_logic_0_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/scalp_zynqps_util_vector_logic_0_0.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/scalp_zynqps_util_vector_logic_0_0.vds
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/scalp_zynqps_util_vector_logic_0_0_utilization_synth.pb
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/scalp_zynqps_util_vector_logic_0_0_utilization_synth.rpt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/vivado.jou
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_0_0_synth_1/vivado.pb
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/ISEWrap.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/gen_run.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/htr.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/runme.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/scalp_zynqps_util_vector_logic_1_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/scalp_zynqps_util_vector_logic_1_0.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/scalp_zynqps_util_vector_logic_1_0.vds
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/scalp_zynqps_util_vector_logic_1_0_utilization_synth.pb
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/scalp_zynqps_util_vector_logic_1_0_utilization_synth.rpt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/vivado.jou
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_util_vector_logic_1_0_synth_1/vivado.pb
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/ISEWrap.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/gen_run.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/htr.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/runme.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/scalp_zynqps_vio_0_0.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/scalp_zynqps_vio_0_0.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/scalp_zynqps_vio_0_0.vds
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/scalp_zynqps_vio_0_0_utilization_synth.pb
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/scalp_zynqps_vio_0_0_utilization_synth.rpt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/vivado.jou
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/scalp_zynqps_vio_0_0_synth_1/vivado.pb
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/ISEWrap.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/dont_touch.xdc
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/gen_run.xml
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/htr.txt
delete mode 100755 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/runme.sh
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/scalp_zynqps.dcp
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/scalp_zynqps.tcl
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/scalp_zynqps.vds
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/scalp_zynqps_utilization_synth.pb
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/scalp_zynqps_utilization_synth.rpt
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/vivado.jou
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.runs/synth_1/vivado.pb
delete mode 100644 soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.xpr
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hdl/scalp_zynqps_wrapper.vhd b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hdl/scalp_zynqps_wrapper.vhd
deleted file mode 100644
index f77bbbf..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hdl/scalp_zynqps_wrapper.vhd
+++ /dev/null
@@ -1,109 +0,0 @@
---Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-----------------------------------------------------------------------------------
---Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
---Date : Mon Sep 7 11:52:31 2020
---Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
---Command : generate_target scalp_zynqps_wrapper.bd
---Design : scalp_zynqps_wrapper
---Purpose : IP block netlist
-----------------------------------------------------------------------------------
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-library UNISIM;
-use UNISIM.VCOMPONENTS.ALL;
-entity scalp_zynqps_wrapper is
- port (
- DDR_addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_ba : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_cas_n : inout STD_LOGIC;
- DDR_ck_n : inout STD_LOGIC;
- DDR_ck_p : inout STD_LOGIC;
- DDR_cke : inout STD_LOGIC;
- DDR_cs_n : inout STD_LOGIC;
- DDR_dm : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dq : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_dqs_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dqs_p : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_odt : inout STD_LOGIC;
- DDR_ras_n : inout STD_LOGIC;
- DDR_reset_n : inout STD_LOGIC;
- DDR_we_n : inout STD_LOGIC;
- FIXED_IO_ddr_vrn : inout STD_LOGIC;
- FIXED_IO_ddr_vrp : inout STD_LOGIC;
- FIXED_IO_mio : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- FIXED_IO_ps_clk : inout STD_LOGIC;
- FIXED_IO_ps_porb : inout STD_LOGIC;
- FIXED_IO_ps_srstb : inout STD_LOGIC;
- FclkClk0xCO : out STD_LOGIC;
- FclkReset0xRO : out STD_LOGIC_VECTOR ( 0 to 0 );
- Spi1MOSIxSO : out STD_LOGIC;
- Spi1SSxSO : out STD_LOGIC;
- Spi1SclkxCO : out STD_LOGIC;
- Usb0VBusPwrFaultxSI : in STD_LOGIC
- );
-end scalp_zynqps_wrapper;
-
-architecture STRUCTURE of scalp_zynqps_wrapper is
- component scalp_zynqps is
- port (
- FclkClk0xCO : out STD_LOGIC;
- FclkReset0xRO : out STD_LOGIC_VECTOR ( 0 to 0 );
- Spi1MOSIxSO : out STD_LOGIC;
- Spi1SSxSO : out STD_LOGIC;
- Spi1SclkxCO : out STD_LOGIC;
- Usb0VBusPwrFaultxSI : in STD_LOGIC;
- FIXED_IO_mio : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- FIXED_IO_ddr_vrn : inout STD_LOGIC;
- FIXED_IO_ddr_vrp : inout STD_LOGIC;
- FIXED_IO_ps_srstb : inout STD_LOGIC;
- FIXED_IO_ps_clk : inout STD_LOGIC;
- FIXED_IO_ps_porb : inout STD_LOGIC;
- DDR_cas_n : inout STD_LOGIC;
- DDR_cke : inout STD_LOGIC;
- DDR_ck_n : inout STD_LOGIC;
- DDR_ck_p : inout STD_LOGIC;
- DDR_cs_n : inout STD_LOGIC;
- DDR_reset_n : inout STD_LOGIC;
- DDR_odt : inout STD_LOGIC;
- DDR_ras_n : inout STD_LOGIC;
- DDR_we_n : inout STD_LOGIC;
- DDR_ba : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_dm : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dq : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_dqs_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dqs_p : inout STD_LOGIC_VECTOR ( 3 downto 0 )
- );
- end component scalp_zynqps;
-begin
-scalp_zynqps_i: component scalp_zynqps
- port map (
- DDR_addr(14 downto 0) => DDR_addr(14 downto 0),
- DDR_ba(2 downto 0) => DDR_ba(2 downto 0),
- DDR_cas_n => DDR_cas_n,
- DDR_ck_n => DDR_ck_n,
- DDR_ck_p => DDR_ck_p,
- DDR_cke => DDR_cke,
- DDR_cs_n => DDR_cs_n,
- DDR_dm(3 downto 0) => DDR_dm(3 downto 0),
- DDR_dq(31 downto 0) => DDR_dq(31 downto 0),
- DDR_dqs_n(3 downto 0) => DDR_dqs_n(3 downto 0),
- DDR_dqs_p(3 downto 0) => DDR_dqs_p(3 downto 0),
- DDR_odt => DDR_odt,
- DDR_ras_n => DDR_ras_n,
- DDR_reset_n => DDR_reset_n,
- DDR_we_n => DDR_we_n,
- FIXED_IO_ddr_vrn => FIXED_IO_ddr_vrn,
- FIXED_IO_ddr_vrp => FIXED_IO_ddr_vrp,
- FIXED_IO_mio(53 downto 0) => FIXED_IO_mio(53 downto 0),
- FIXED_IO_ps_clk => FIXED_IO_ps_clk,
- FIXED_IO_ps_porb => FIXED_IO_ps_porb,
- FIXED_IO_ps_srstb => FIXED_IO_ps_srstb,
- FclkClk0xCO => FclkClk0xCO,
- FclkReset0xRO(0) => FclkReset0xRO(0),
- Spi1MOSIxSO => Spi1MOSIxSO,
- Spi1SSxSO => Spi1SSxSO,
- Spi1SclkxCO => Spi1SclkxCO,
- Usb0VBusPwrFaultxSI => Usb0VBusPwrFaultxSI
- );
-end STRUCTURE;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hw_handoff/scalp_zynqps_bd.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hw_handoff/scalp_zynqps_bd.tcl
deleted file mode 100644
index 4858b24..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/hw_handoff/scalp_zynqps_bd.tcl
+++ /dev/null
@@ -1,646 +0,0 @@
-
-################################################################
-# This is a generated script based on design: scalp_zynqps
-#
-# Though there are limitations about the generated script,
-# the main purpose of this utility is to make learning
-# IP Integrator Tcl commands easier.
-################################################################
-
-namespace eval _tcl {
-proc get_script_folder {} {
- set script_path [file normalize [info script]]
- set script_folder [file dirname $script_path]
- return $script_folder
-}
-}
-variable script_folder
-set script_folder [_tcl::get_script_folder]
-
-################################################################
-# Check if script is running in correct Vivado version.
-################################################################
-set scripts_vivado_version 2019.2
-set current_vivado_version [version -short]
-
-if { [string first $scripts_vivado_version $current_vivado_version] == -1 } {
- puts ""
- catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."}
-
- return 1
-}
-
-################################################################
-# START
-################################################################
-
-# To test this script, run the following commands from Vivado Tcl console:
-# source scalp_zynqps_script.tcl
-
-# If there is no project opened, this script will create a
-# project, but make sure you do not have an existing project
-# <./myproj/project_1.xpr> in the current working folder.
-
-set list_projs [get_projects -quiet]
-if { $list_projs eq "" } {
- create_project project_1 myproj -part xc7z015clg485-2
-}
-
-
-# CHANGE DESIGN NAME HERE
-variable design_name
-set design_name scalp_zynqps
-
-# This script was generated for a remote BD. To create a non-remote design,
-# change the variable <run_remote_bd_flow> to <0>.
-
-set run_remote_bd_flow 1
-if { $run_remote_bd_flow == 1 } {
- # Set the reference directory for source file relative paths (by default
- # the value is script directory path)
- set origin_dir .
-
- # Use origin directory path location variable, if specified in the tcl shell
- if { [info exists ::origin_dir_loc] } {
- set origin_dir $::origin_dir_loc
- }
-
- set str_bd_folder [file normalize ${origin_dir}]
- set str_bd_filepath ${str_bd_folder}/${design_name}/${design_name}.bd
-
- # Check if remote design exists on disk
- if { [file exists $str_bd_filepath ] == 1 } {
- catch {common::send_msg_id "BD_TCL-110" "ERROR" "The remote BD file path <$str_bd_filepath> already exists!"}
- common::send_msg_id "BD_TCL-008" "INFO" "To create a non-remote BD, change the variable <run_remote_bd_flow> to <0>."
- common::send_msg_id "BD_TCL-009" "INFO" "Also make sure there is no design <$design_name> existing in your current project."
-
- return 1
- }
-
- # Check if design exists in memory
- set list_existing_designs [get_bd_designs -quiet $design_name]
- if { $list_existing_designs ne "" } {
- catch {common::send_msg_id "BD_TCL-111" "ERROR" "The design <$design_name> already exists in this project! Will not create the remote BD <$design_name> at the folder <$str_bd_folder>."}
-
- common::send_msg_id "BD_TCL-010" "INFO" "To create a non-remote BD, change the variable <run_remote_bd_flow> to <0> or please set a different value to variable <design_name>."
-
- return 1
- }
-
- # Check if design exists on disk within project
- set list_existing_designs [get_files -quiet */${design_name}.bd]
- if { $list_existing_designs ne "" } {
- catch {common::send_msg_id "BD_TCL-112" "ERROR" "The design <$design_name> already exists in this project at location:
- $list_existing_designs"}
- catch {common::send_msg_id "BD_TCL-113" "ERROR" "Will not create the remote BD <$design_name> at the folder <$str_bd_folder>."}
-
- common::send_msg_id "BD_TCL-011" "INFO" "To create a non-remote BD, change the variable <run_remote_bd_flow> to <0> or please set a different value to variable <design_name>."
-
- return 1
- }
-
- # Now can create the remote BD
- # NOTE - usage of <-dir> will create <$str_bd_folder/$design_name/$design_name.bd>
- create_bd_design -dir $str_bd_folder $design_name
-} else {
-
- # Create regular design
- if { [catch {create_bd_design $design_name} errmsg] } {
- common::send_msg_id "BD_TCL-012" "INFO" "Please set a different value to variable <design_name>."
-
- return 1
- }
-}
-
-current_bd_design $design_name
-
-##################################################################
-# DESIGN PROCs
-##################################################################
-
-
-
-# Procedure to create entire design; Provide argument to make
-# procedure reusable. If parentCell is "", will use root.
-proc create_root_design { parentCell } {
-
- variable script_folder
- variable design_name
-
- if { $parentCell eq "" } {
- set parentCell [get_bd_cells /]
- }
-
- # Get object for parentCell
- set parentObj [get_bd_cells $parentCell]
- if { $parentObj == "" } {
- catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"}
- return
- }
-
- # Make sure parentObj is hier blk
- set parentType [get_property TYPE $parentObj]
- if { $parentType ne "hier" } {
- catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be <hier>."}
- return
- }
-
- # Save current instance; Restore later
- set oldCurInst [current_bd_instance .]
-
- # Set parent object as current
- current_bd_instance $parentObj
-
-
- # Create interface ports
- set DDR [ create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 DDR ]
-
- set FIXED_IO [ create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 FIXED_IO ]
-
-
- # Create ports
- set FclkClk0xCO [ create_bd_port -dir O -type clk FclkClk0xCO ]
- set_property -dict [ list \
- CONFIG.FREQ_HZ {125000000} \
- ] $FclkClk0xCO
- set FclkReset0xRO [ create_bd_port -dir O -from 0 -to 0 FclkReset0xRO ]
- set Spi1MOSIxSO [ create_bd_port -dir O Spi1MOSIxSO ]
- set Spi1SSxSO [ create_bd_port -dir O Spi1SSxSO ]
- set Spi1SclkxCO [ create_bd_port -dir O Spi1SclkxCO ]
- set Usb0VBusPwrFaultxSI [ create_bd_port -dir I Usb0VBusPwrFaultxSI ]
-
- # Create instance: gnd_constant, and set properties
- set gnd_constant [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 gnd_constant ]
- set_property -dict [ list \
- CONFIG.CONST_VAL {0} \
- ] $gnd_constant
-
- # Create instance: processing_system7_0, and set properties
- set processing_system7_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.5 processing_system7_0 ]
- set_property -dict [ list \
- CONFIG.PCW_ACT_APU_PERIPHERAL_FREQMHZ {750.000000} \
- CONFIG.PCW_ACT_CAN_PERIPHERAL_FREQMHZ {97.222221} \
- CONFIG.PCW_ACT_DCI_PERIPHERAL_FREQMHZ {10.204082} \
- CONFIG.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ {10.000000} \
- CONFIG.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ {10.000000} \
- CONFIG.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ {10.000000} \
- CONFIG.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ {10.000000} \
- CONFIG.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ {194.444443} \
- CONFIG.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ {134.615387} \
- CONFIG.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ {97.222221} \
- CONFIG.PCW_ACT_SMC_PERIPHERAL_FREQMHZ {10.000000} \
- CONFIG.PCW_ACT_SPI_PERIPHERAL_FREQMHZ {159.090912} \
- CONFIG.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ {200.000000} \
- CONFIG.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_ACT_UART_PERIPHERAL_FREQMHZ {97.222221} \
- CONFIG.PCW_ACT_WDT_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_APU_PERIPHERAL_FREQMHZ {750} \
- CONFIG.PCW_ARMPLL_CTRL_FBDIV {30} \
- CONFIG.PCW_CAN1_CAN1_IO {MIO 52 .. 53} \
- CONFIG.PCW_CAN1_GRP_CLK_ENABLE {0} \
- CONFIG.PCW_CAN1_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_CAN_PERIPHERAL_DIVISOR0 {18} \
- CONFIG.PCW_CAN_PERIPHERAL_DIVISOR1 {1} \
- CONFIG.PCW_CAN_PERIPHERAL_FREQMHZ {100} \
- CONFIG.PCW_CAN_PERIPHERAL_VALID {1} \
- CONFIG.PCW_CLK0_FREQ {125000000} \
- CONFIG.PCW_CLK1_FREQ {10000000} \
- CONFIG.PCW_CLK2_FREQ {10000000} \
- CONFIG.PCW_CLK3_FREQ {10000000} \
- CONFIG.PCW_CPU_CPU_PLL_FREQMHZ {1500.000} \
- CONFIG.PCW_CPU_PERIPHERAL_DIVISOR0 {2} \
- CONFIG.PCW_CRYSTAL_PERIPHERAL_FREQMHZ {50} \
- CONFIG.PCW_DCI_PERIPHERAL_DIVISOR0 {49} \
- CONFIG.PCW_DCI_PERIPHERAL_DIVISOR1 {2} \
- CONFIG.PCW_DDRPLL_CTRL_FBDIV {20} \
- CONFIG.PCW_DDR_DDR_PLL_FREQMHZ {1000.000} \
- CONFIG.PCW_DDR_PERIPHERAL_DIVISOR0 {2} \
- CONFIG.PCW_DDR_RAM_HIGHADDR {0x0FFFFFFF} \
- CONFIG.PCW_ENET0_ENET0_IO {MIO 16 .. 27} \
- CONFIG.PCW_ENET0_GRP_MDIO_ENABLE {0} \
- CONFIG.PCW_ENET0_PERIPHERAL_CLKSRC {IO PLL} \
- CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR0 {14} \
- CONFIG.PCW_ENET0_PERIPHERAL_DIVISOR1 {1} \
- CONFIG.PCW_ENET0_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_ENET0_PERIPHERAL_FREQMHZ {1000 Mbps} \
- CONFIG.PCW_ENET0_RESET_ENABLE {0} \
- CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR0 {1} \
- CONFIG.PCW_ENET1_PERIPHERAL_DIVISOR1 {1} \
- CONFIG.PCW_ENET1_RESET_ENABLE {0} \
- CONFIG.PCW_ENET_RESET_ENABLE {1} \
- CONFIG.PCW_ENET_RESET_SELECT {Share reset pin} \
- CONFIG.PCW_EN_CAN1 {1} \
- CONFIG.PCW_EN_EMIO_CAN1 {0} \
- CONFIG.PCW_EN_EMIO_CD_SDIO1 {0} \
- CONFIG.PCW_EN_EMIO_ENET0 {0} \
- CONFIG.PCW_EN_EMIO_I2C0 {0} \
- CONFIG.PCW_EN_EMIO_SDIO1 {0} \
- CONFIG.PCW_EN_EMIO_SPI0 {0} \
- CONFIG.PCW_EN_EMIO_SPI1 {1} \
- CONFIG.PCW_EN_EMIO_UART0 {0} \
- CONFIG.PCW_EN_EMIO_WP_SDIO1 {0} \
- CONFIG.PCW_EN_ENET0 {1} \
- CONFIG.PCW_EN_GPIO {1} \
- CONFIG.PCW_EN_I2C0 {1} \
- CONFIG.PCW_EN_QSPI {1} \
- CONFIG.PCW_EN_SDIO1 {1} \
- CONFIG.PCW_EN_SPI0 {1} \
- CONFIG.PCW_EN_SPI1 {1} \
- CONFIG.PCW_EN_UART0 {1} \
- CONFIG.PCW_EN_UART1 {1} \
- CONFIG.PCW_EN_USB0 {1} \
- CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR0 {7} \
- CONFIG.PCW_FCLK0_PERIPHERAL_DIVISOR1 {2} \
- CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR0 {1} \
- CONFIG.PCW_FCLK1_PERIPHERAL_DIVISOR1 {1} \
- CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR0 {1} \
- CONFIG.PCW_FCLK2_PERIPHERAL_DIVISOR1 {1} \
- CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR0 {1} \
- CONFIG.PCW_FCLK3_PERIPHERAL_DIVISOR1 {1} \
- CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {125} \
- CONFIG.PCW_FPGA_FCLK0_ENABLE {1} \
- CONFIG.PCW_FPGA_FCLK1_ENABLE {0} \
- CONFIG.PCW_FPGA_FCLK2_ENABLE {0} \
- CONFIG.PCW_FPGA_FCLK3_ENABLE {0} \
- CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} \
- CONFIG.PCW_GPIO_MIO_GPIO_IO {MIO} \
- CONFIG.PCW_I2C0_GRP_INT_ENABLE {0} \
- CONFIG.PCW_I2C0_I2C0_IO {MIO 50 .. 51} \
- CONFIG.PCW_I2C0_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_I2C0_RESET_ENABLE {0} \
- CONFIG.PCW_I2C1_RESET_ENABLE {0} \
- CONFIG.PCW_I2C_PERIPHERAL_FREQMHZ {125.000000} \
- CONFIG.PCW_I2C_RESET_ENABLE {1} \
- CONFIG.PCW_I2C_RESET_SELECT {Share reset pin} \
- CONFIG.PCW_IOPLL_CTRL_FBDIV {35} \
- CONFIG.PCW_IO_IO_PLL_FREQMHZ {1750.000} \
- CONFIG.PCW_MIO_0_DIRECTION {inout} \
- CONFIG.PCW_MIO_0_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_0_PULLUP {enabled} \
- CONFIG.PCW_MIO_0_SLEW {slow} \
- CONFIG.PCW_MIO_10_DIRECTION {inout} \
- CONFIG.PCW_MIO_10_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_10_PULLUP {enabled} \
- CONFIG.PCW_MIO_10_SLEW {slow} \
- CONFIG.PCW_MIO_11_DIRECTION {inout} \
- CONFIG.PCW_MIO_11_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_11_PULLUP {enabled} \
- CONFIG.PCW_MIO_11_SLEW {slow} \
- CONFIG.PCW_MIO_12_DIRECTION {inout} \
- CONFIG.PCW_MIO_12_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_12_PULLUP {enabled} \
- CONFIG.PCW_MIO_12_SLEW {slow} \
- CONFIG.PCW_MIO_13_DIRECTION {inout} \
- CONFIG.PCW_MIO_13_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_13_PULLUP {enabled} \
- CONFIG.PCW_MIO_13_SLEW {slow} \
- CONFIG.PCW_MIO_14_DIRECTION {inout} \
- CONFIG.PCW_MIO_14_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_14_PULLUP {enabled} \
- CONFIG.PCW_MIO_14_SLEW {slow} \
- CONFIG.PCW_MIO_15_DIRECTION {inout} \
- CONFIG.PCW_MIO_15_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_15_PULLUP {enabled} \
- CONFIG.PCW_MIO_15_SLEW {slow} \
- CONFIG.PCW_MIO_16_DIRECTION {out} \
- CONFIG.PCW_MIO_16_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_16_PULLUP {enabled} \
- CONFIG.PCW_MIO_16_SLEW {slow} \
- CONFIG.PCW_MIO_17_DIRECTION {out} \
- CONFIG.PCW_MIO_17_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_17_PULLUP {enabled} \
- CONFIG.PCW_MIO_17_SLEW {slow} \
- CONFIG.PCW_MIO_18_DIRECTION {out} \
- CONFIG.PCW_MIO_18_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_18_PULLUP {enabled} \
- CONFIG.PCW_MIO_18_SLEW {slow} \
- CONFIG.PCW_MIO_19_DIRECTION {out} \
- CONFIG.PCW_MIO_19_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_19_PULLUP {enabled} \
- CONFIG.PCW_MIO_19_SLEW {slow} \
- CONFIG.PCW_MIO_1_DIRECTION {out} \
- CONFIG.PCW_MIO_1_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_1_PULLUP {enabled} \
- CONFIG.PCW_MIO_1_SLEW {slow} \
- CONFIG.PCW_MIO_20_DIRECTION {out} \
- CONFIG.PCW_MIO_20_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_20_PULLUP {enabled} \
- CONFIG.PCW_MIO_20_SLEW {slow} \
- CONFIG.PCW_MIO_21_DIRECTION {out} \
- CONFIG.PCW_MIO_21_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_21_PULLUP {enabled} \
- CONFIG.PCW_MIO_21_SLEW {slow} \
- CONFIG.PCW_MIO_22_DIRECTION {in} \
- CONFIG.PCW_MIO_22_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_22_PULLUP {enabled} \
- CONFIG.PCW_MIO_22_SLEW {slow} \
- CONFIG.PCW_MIO_23_DIRECTION {in} \
- CONFIG.PCW_MIO_23_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_23_PULLUP {enabled} \
- CONFIG.PCW_MIO_23_SLEW {slow} \
- CONFIG.PCW_MIO_24_DIRECTION {in} \
- CONFIG.PCW_MIO_24_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_24_PULLUP {enabled} \
- CONFIG.PCW_MIO_24_SLEW {slow} \
- CONFIG.PCW_MIO_25_DIRECTION {in} \
- CONFIG.PCW_MIO_25_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_25_PULLUP {enabled} \
- CONFIG.PCW_MIO_25_SLEW {slow} \
- CONFIG.PCW_MIO_26_DIRECTION {in} \
- CONFIG.PCW_MIO_26_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_26_PULLUP {enabled} \
- CONFIG.PCW_MIO_26_SLEW {slow} \
- CONFIG.PCW_MIO_27_DIRECTION {in} \
- CONFIG.PCW_MIO_27_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_27_PULLUP {enabled} \
- CONFIG.PCW_MIO_27_SLEW {slow} \
- CONFIG.PCW_MIO_28_DIRECTION {inout} \
- CONFIG.PCW_MIO_28_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_28_PULLUP {enabled} \
- CONFIG.PCW_MIO_28_SLEW {slow} \
- CONFIG.PCW_MIO_29_DIRECTION {in} \
- CONFIG.PCW_MIO_29_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_29_PULLUP {enabled} \
- CONFIG.PCW_MIO_29_SLEW {slow} \
- CONFIG.PCW_MIO_2_DIRECTION {inout} \
- CONFIG.PCW_MIO_2_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_2_PULLUP {disabled} \
- CONFIG.PCW_MIO_2_SLEW {slow} \
- CONFIG.PCW_MIO_30_DIRECTION {out} \
- CONFIG.PCW_MIO_30_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_30_PULLUP {enabled} \
- CONFIG.PCW_MIO_30_SLEW {slow} \
- CONFIG.PCW_MIO_31_DIRECTION {in} \
- CONFIG.PCW_MIO_31_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_31_PULLUP {enabled} \
- CONFIG.PCW_MIO_31_SLEW {slow} \
- CONFIG.PCW_MIO_32_DIRECTION {inout} \
- CONFIG.PCW_MIO_32_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_32_PULLUP {enabled} \
- CONFIG.PCW_MIO_32_SLEW {slow} \
- CONFIG.PCW_MIO_33_DIRECTION {inout} \
- CONFIG.PCW_MIO_33_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_33_PULLUP {enabled} \
- CONFIG.PCW_MIO_33_SLEW {slow} \
- CONFIG.PCW_MIO_34_DIRECTION {inout} \
- CONFIG.PCW_MIO_34_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_34_PULLUP {enabled} \
- CONFIG.PCW_MIO_34_SLEW {slow} \
- CONFIG.PCW_MIO_35_DIRECTION {inout} \
- CONFIG.PCW_MIO_35_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_35_PULLUP {enabled} \
- CONFIG.PCW_MIO_35_SLEW {slow} \
- CONFIG.PCW_MIO_36_DIRECTION {in} \
- CONFIG.PCW_MIO_36_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_36_PULLUP {enabled} \
- CONFIG.PCW_MIO_36_SLEW {slow} \
- CONFIG.PCW_MIO_37_DIRECTION {inout} \
- CONFIG.PCW_MIO_37_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_37_PULLUP {enabled} \
- CONFIG.PCW_MIO_37_SLEW {slow} \
- CONFIG.PCW_MIO_38_DIRECTION {inout} \
- CONFIG.PCW_MIO_38_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_38_PULLUP {enabled} \
- CONFIG.PCW_MIO_38_SLEW {slow} \
- CONFIG.PCW_MIO_39_DIRECTION {inout} \
- CONFIG.PCW_MIO_39_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_39_PULLUP {enabled} \
- CONFIG.PCW_MIO_39_SLEW {slow} \
- CONFIG.PCW_MIO_3_DIRECTION {inout} \
- CONFIG.PCW_MIO_3_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_3_PULLUP {disabled} \
- CONFIG.PCW_MIO_3_SLEW {slow} \
- CONFIG.PCW_MIO_40_DIRECTION {inout} \
- CONFIG.PCW_MIO_40_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_40_PULLUP {enabled} \
- CONFIG.PCW_MIO_40_SLEW {slow} \
- CONFIG.PCW_MIO_41_DIRECTION {inout} \
- CONFIG.PCW_MIO_41_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_41_PULLUP {enabled} \
- CONFIG.PCW_MIO_41_SLEW {slow} \
- CONFIG.PCW_MIO_42_DIRECTION {inout} \
- CONFIG.PCW_MIO_42_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_42_PULLUP {enabled} \
- CONFIG.PCW_MIO_42_SLEW {slow} \
- CONFIG.PCW_MIO_43_DIRECTION {inout} \
- CONFIG.PCW_MIO_43_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_43_PULLUP {enabled} \
- CONFIG.PCW_MIO_43_SLEW {slow} \
- CONFIG.PCW_MIO_44_DIRECTION {inout} \
- CONFIG.PCW_MIO_44_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_44_PULLUP {enabled} \
- CONFIG.PCW_MIO_44_SLEW {slow} \
- CONFIG.PCW_MIO_45_DIRECTION {inout} \
- CONFIG.PCW_MIO_45_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_45_PULLUP {enabled} \
- CONFIG.PCW_MIO_45_SLEW {slow} \
- CONFIG.PCW_MIO_46_DIRECTION {in} \
- CONFIG.PCW_MIO_46_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_46_PULLUP {enabled} \
- CONFIG.PCW_MIO_46_SLEW {slow} \
- CONFIG.PCW_MIO_47_DIRECTION {out} \
- CONFIG.PCW_MIO_47_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_47_PULLUP {enabled} \
- CONFIG.PCW_MIO_47_SLEW {slow} \
- CONFIG.PCW_MIO_48_DIRECTION {out} \
- CONFIG.PCW_MIO_48_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_48_PULLUP {enabled} \
- CONFIG.PCW_MIO_48_SLEW {slow} \
- CONFIG.PCW_MIO_49_DIRECTION {in} \
- CONFIG.PCW_MIO_49_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_49_PULLUP {enabled} \
- CONFIG.PCW_MIO_49_SLEW {slow} \
- CONFIG.PCW_MIO_4_DIRECTION {inout} \
- CONFIG.PCW_MIO_4_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_4_PULLUP {disabled} \
- CONFIG.PCW_MIO_4_SLEW {slow} \
- CONFIG.PCW_MIO_50_DIRECTION {inout} \
- CONFIG.PCW_MIO_50_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_50_PULLUP {enabled} \
- CONFIG.PCW_MIO_50_SLEW {slow} \
- CONFIG.PCW_MIO_51_DIRECTION {inout} \
- CONFIG.PCW_MIO_51_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_51_PULLUP {enabled} \
- CONFIG.PCW_MIO_51_SLEW {slow} \
- CONFIG.PCW_MIO_52_DIRECTION {out} \
- CONFIG.PCW_MIO_52_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_52_PULLUP {enabled} \
- CONFIG.PCW_MIO_52_SLEW {slow} \
- CONFIG.PCW_MIO_53_DIRECTION {in} \
- CONFIG.PCW_MIO_53_IOTYPE {LVCMOS 2.5V} \
- CONFIG.PCW_MIO_53_PULLUP {enabled} \
- CONFIG.PCW_MIO_53_SLEW {slow} \
- CONFIG.PCW_MIO_5_DIRECTION {inout} \
- CONFIG.PCW_MIO_5_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_5_PULLUP {disabled} \
- CONFIG.PCW_MIO_5_SLEW {slow} \
- CONFIG.PCW_MIO_6_DIRECTION {out} \
- CONFIG.PCW_MIO_6_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_6_PULLUP {disabled} \
- CONFIG.PCW_MIO_6_SLEW {slow} \
- CONFIG.PCW_MIO_7_DIRECTION {out} \
- CONFIG.PCW_MIO_7_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_7_PULLUP {disabled} \
- CONFIG.PCW_MIO_7_SLEW {slow} \
- CONFIG.PCW_MIO_8_DIRECTION {out} \
- CONFIG.PCW_MIO_8_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_8_PULLUP {disabled} \
- CONFIG.PCW_MIO_8_SLEW {slow} \
- CONFIG.PCW_MIO_9_DIRECTION {in} \
- CONFIG.PCW_MIO_9_IOTYPE {LVCMOS 3.3V} \
- CONFIG.PCW_MIO_9_PULLUP {enabled} \
- CONFIG.PCW_MIO_9_SLEW {slow} \
- CONFIG.PCW_MIO_TREE_PERIPHERALS {GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#GPIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SPI 0#SPI 0#SPI 0#GPIO#GPIO#SPI 0#UART 0#UART 0#UART 1#UART 1#I2C 0#I2C 0#CAN 1#CAN 1} \
- CONFIG.PCW_MIO_TREE_SIGNALS {gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#gpio[8]#cd#data[0]#cmd#clk#data[1]#data[2]#data[3]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#sclk#miso#ss[0]#gpio[43]#gpio[44]#mosi#rx#tx#tx#rx#scl#sda#tx#rx} \
- CONFIG.PCW_NAND_GRP_D8_ENABLE {0} \
- CONFIG.PCW_NAND_PERIPHERAL_ENABLE {0} \
- CONFIG.PCW_NOR_GRP_A25_ENABLE {0} \
- CONFIG.PCW_NOR_GRP_CS0_ENABLE {0} \
- CONFIG.PCW_NOR_GRP_CS1_ENABLE {0} \
- CONFIG.PCW_NOR_GRP_SRAM_CS0_ENABLE {0} \
- CONFIG.PCW_NOR_GRP_SRAM_CS1_ENABLE {0} \
- CONFIG.PCW_NOR_GRP_SRAM_INT_ENABLE {0} \
- CONFIG.PCW_NOR_PERIPHERAL_ENABLE {0} \
- CONFIG.PCW_PCAP_PERIPHERAL_DIVISOR0 {9} \
- CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 2.5V} \
- CONFIG.PCW_QSPI_GRP_FBCLK_ENABLE {0} \
- CONFIG.PCW_QSPI_GRP_IO1_ENABLE {0} \
- CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE {1} \
- CONFIG.PCW_QSPI_GRP_SINGLE_SS_IO {MIO 1 .. 6} \
- CONFIG.PCW_QSPI_GRP_SS1_ENABLE {0} \
- CONFIG.PCW_QSPI_PERIPHERAL_DIVISOR0 {13} \
- CONFIG.PCW_QSPI_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_QSPI_PERIPHERAL_FREQMHZ {133} \
- CONFIG.PCW_QSPI_QSPI_IO {MIO 1 .. 6} \
- CONFIG.PCW_SD1_GRP_CD_ENABLE {1} \
- CONFIG.PCW_SD1_GRP_CD_IO {MIO 9} \
- CONFIG.PCW_SD1_GRP_POW_ENABLE {0} \
- CONFIG.PCW_SD1_GRP_WP_ENABLE {0} \
- CONFIG.PCW_SD1_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_SD1_SD1_IO {MIO 10 .. 15} \
- CONFIG.PCW_SDIO_PERIPHERAL_DIVISOR0 {18} \
- CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {100} \
- CONFIG.PCW_SDIO_PERIPHERAL_VALID {1} \
- CONFIG.PCW_SINGLE_QSPI_DATA_MODE {x4} \
- CONFIG.PCW_SMC_PERIPHERAL_DIVISOR0 {1} \
- CONFIG.PCW_SPI0_GRP_SS0_ENABLE {1} \
- CONFIG.PCW_SPI0_GRP_SS0_IO {MIO 42} \
- CONFIG.PCW_SPI0_GRP_SS1_ENABLE {0} \
- CONFIG.PCW_SPI0_GRP_SS2_ENABLE {0} \
- CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_SPI0_SPI0_IO {MIO 40 .. 45} \
- CONFIG.PCW_SPI1_GRP_SS0_ENABLE {1} \
- CONFIG.PCW_SPI1_GRP_SS0_IO {EMIO} \
- CONFIG.PCW_SPI1_GRP_SS1_ENABLE {1} \
- CONFIG.PCW_SPI1_GRP_SS1_IO {EMIO} \
- CONFIG.PCW_SPI1_GRP_SS2_ENABLE {1} \
- CONFIG.PCW_SPI1_GRP_SS2_IO {EMIO} \
- CONFIG.PCW_SPI1_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_SPI1_SPI1_IO {EMIO} \
- CONFIG.PCW_SPI_PERIPHERAL_DIVISOR0 {11} \
- CONFIG.PCW_SPI_PERIPHERAL_FREQMHZ {166.666666} \
- CONFIG.PCW_SPI_PERIPHERAL_VALID {1} \
- CONFIG.PCW_TPIU_PERIPHERAL_DIVISOR0 {1} \
- CONFIG.PCW_UART0_GRP_FULL_ENABLE {0} \
- CONFIG.PCW_UART0_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_UART0_UART0_IO {MIO 46 .. 47} \
- CONFIG.PCW_UART1_GRP_FULL_ENABLE {0} \
- CONFIG.PCW_UART1_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_UART1_UART1_IO {MIO 48 .. 49} \
- CONFIG.PCW_UART_PERIPHERAL_DIVISOR0 {18} \
- CONFIG.PCW_UART_PERIPHERAL_FREQMHZ {100} \
- CONFIG.PCW_UART_PERIPHERAL_VALID {1} \
- CONFIG.PCW_UIPARAM_ACT_DDR_FREQ_MHZ {500.000000} \
- CONFIG.PCW_UIPARAM_DDR_BANK_ADDR_COUNT {3} \
- CONFIG.PCW_UIPARAM_DDR_BL {8} \
- CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH {16 Bit} \
- CONFIG.PCW_UIPARAM_DDR_CL {7} \
- CONFIG.PCW_UIPARAM_DDR_COL_ADDR_COUNT {10} \
- CONFIG.PCW_UIPARAM_DDR_CWL {6} \
- CONFIG.PCW_UIPARAM_DDR_DEVICE_CAPACITY {2048 MBits} \
- CONFIG.PCW_UIPARAM_DDR_DRAM_WIDTH {16 Bits} \
- CONFIG.PCW_UIPARAM_DDR_ECC {Disabled} \
- CONFIG.PCW_UIPARAM_DDR_FREQ_MHZ {500} \
- CONFIG.PCW_UIPARAM_DDR_MEMORY_TYPE {DDR 3 (Low Voltage)} \
- CONFIG.PCW_UIPARAM_DDR_PARTNO {MT41K128M16 JT-125} \
- CONFIG.PCW_UIPARAM_DDR_ROW_ADDR_COUNT {14} \
- CONFIG.PCW_UIPARAM_DDR_SPEED_BIN {DDR3_1066F} \
- CONFIG.PCW_UIPARAM_DDR_T_FAW {40.0} \
- CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN {35.0} \
- CONFIG.PCW_UIPARAM_DDR_T_RC {48.75} \
- CONFIG.PCW_UIPARAM_DDR_T_RCD {7} \
- CONFIG.PCW_UIPARAM_DDR_T_RP {7} \
- CONFIG.PCW_USB0_PERIPHERAL_ENABLE {1} \
- CONFIG.PCW_USB0_PERIPHERAL_FREQMHZ {60} \
- CONFIG.PCW_USB0_RESET_ENABLE {0} \
- CONFIG.PCW_USB0_USB0_IO {MIO 28 .. 39} \
- CONFIG.PCW_USB1_RESET_ENABLE {0} \
- CONFIG.PCW_USB_RESET_ENABLE {1} \
- CONFIG.PCW_USB_RESET_SELECT {Share reset pin} \
- ] $processing_system7_0
-
- # Create instance: util_vector_logic_0, and set properties
- set util_vector_logic_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_vector_logic:2.0 util_vector_logic_0 ]
- set_property -dict [ list \
- CONFIG.C_OPERATION {or} \
- CONFIG.C_SIZE {1} \
- CONFIG.LOGO_FILE {data/sym_orgate.png} \
- ] $util_vector_logic_0
-
- # Create instance: util_vector_logic_1, and set properties
- set util_vector_logic_1 [ create_bd_cell -type ip -vlnv xilinx.com:ip:util_vector_logic:2.0 util_vector_logic_1 ]
- set_property -dict [ list \
- CONFIG.C_OPERATION {not} \
- CONFIG.C_SIZE {1} \
- CONFIG.LOGO_FILE {data/sym_notgate.png} \
- ] $util_vector_logic_1
-
- # Create instance: vio_0, and set properties
- set vio_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:vio:3.0 vio_0 ]
- set_property -dict [ list \
- CONFIG.C_EN_PROBE_IN_ACTIVITY {0} \
- CONFIG.C_NUM_PROBE_IN {0} \
- ] $vio_0
-
- # Create interface connections
- connect_bd_intf_net -intf_net processing_system7_0_DDR [get_bd_intf_ports DDR] [get_bd_intf_pins processing_system7_0/DDR]
- connect_bd_intf_net -intf_net processing_system7_0_FIXED_IO [get_bd_intf_ports FIXED_IO] [get_bd_intf_pins processing_system7_0/FIXED_IO]
-
- # Create port connections
- connect_bd_net -net USB0_VBUS_PWRFAULT_0_1 [get_bd_ports Usb0VBusPwrFaultxSI] [get_bd_pins processing_system7_0/USB0_VBUS_PWRFAULT]
- connect_bd_net -net gnd_constant_dout [get_bd_pins gnd_constant/dout] [get_bd_pins processing_system7_0/SPI1_MISO_I] [get_bd_pins processing_system7_0/SPI1_MOSI_I] [get_bd_pins processing_system7_0/SPI1_SCLK_I] [get_bd_pins processing_system7_0/SPI1_SS_I]
- connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_ports FclkClk0xCO] [get_bd_pins processing_system7_0/FCLK_CLK0] [get_bd_pins processing_system7_0/M_AXI_GP0_ACLK] [get_bd_pins vio_0/clk]
- connect_bd_net -net processing_system7_0_FCLK_RESET0_N [get_bd_pins processing_system7_0/FCLK_RESET0_N] [get_bd_pins util_vector_logic_1/Op1]
- connect_bd_net -net processing_system7_0_SPI1_MOSI_O [get_bd_ports Spi1MOSIxSO] [get_bd_pins processing_system7_0/SPI1_MOSI_O]
- connect_bd_net -net processing_system7_0_SPI1_SCLK_O [get_bd_ports Spi1SclkxCO] [get_bd_pins processing_system7_0/SPI1_SCLK_O]
- connect_bd_net -net processing_system7_0_SPI1_SS_O [get_bd_ports Spi1SSxSO] [get_bd_pins processing_system7_0/SPI1_SS_O]
- connect_bd_net -net util_vector_logic_0_Res [get_bd_ports FclkReset0xRO] [get_bd_pins util_vector_logic_0/Res]
- connect_bd_net -net util_vector_logic_1_Res [get_bd_pins util_vector_logic_0/Op1] [get_bd_pins util_vector_logic_1/Res]
- connect_bd_net -net vio_0_probe_out0 [get_bd_pins util_vector_logic_0/Op2] [get_bd_pins vio_0/probe_out0]
-
- # Create address segments
-
-
- # Restore current instance
- current_bd_instance $oldCurInst
-
- validate_bd_design
- save_bd_design
-}
-# End of create_root_design()
-
-
-##################################################################
-# MAIN FLOW
-##################################################################
-
-create_root_design ""
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xci
deleted file mode 100644
index adce14d..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xci
+++ /dev/null
@@ -1,48 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>xci</spirit:library>
- <spirit:name>unknown</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_gnd_constant_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="xlconstant" spirit:version="1.1"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_VAL">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.CONST_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_gnd_constant_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- <spirit:vendorExtensions>
- <xilinx:componentInstanceExtensions>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.CONST_VAL" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:componentInstanceExtensions>
- </spirit:vendorExtensions>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xml
deleted file mode 100644
index 14c8dcc..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xml
+++ /dev/null
@@ -1,265 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>customized_ip</spirit:library>
- <spirit:name>scalp_zynqps_gnd_constant_0</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesis</spirit:name>
- <spirit:displayName>Verilog Synthesis</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>xlconstant_v1_1_6_xlconstant</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesis_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:31 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9de780d2</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_synthesisconstraints</spirit:name>
- <spirit:displayName>Synthesis Constraints</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis.constraints</spirit:envIdentifier>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9de780d2</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesiswrapper</spirit:name>
- <spirit:displayName>Verilog Synthesis Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_gnd_constant_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesiswrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:31 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9de780d2</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogbehavioralsimulation</spirit:name>
- <spirit:displayName>Verilog Simulation</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>xlconstant_v1_1_6_xlconstant</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogbehavioralsimulation_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:31 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9c0e4d15</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_systemcsimulation</spirit:name>
- <spirit:displayName>SystemC Simulation</spirit:displayName>
- <spirit:envIdentifier>systemCSource:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:language>systemc</spirit:language>
- <spirit:modelName>xlconstant_v1_1_6</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_systemcsimulation_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:31 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9c0e4d15</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sim_type</spirit:name>
- <spirit:value>tlm</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsimulationwrapper</spirit:name>
- <spirit:displayName>Verilog Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_gnd_constant_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:31 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9c0e4d15</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_systemcsimulationwrapper</spirit:name>
- <spirit:displayName>SystemC Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>systemCSource:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:language>systemc</spirit:language>
- <spirit:modelName>scalp_zynqps_gnd_constant_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_systemcsimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:31 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9c0e4d15</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sim_type</spirit:name>
- <spirit:value>tlm</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>dout</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.CONST_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- <spirit:modelParameters>
- <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="integer">
- <spirit:name>CONST_WIDTH</spirit:name>
- <spirit:displayName>Const Width</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.CONST_WIDTH">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>CONST_VAL</spirit:name>
- <spirit:displayName>Const Val</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.CONST_VAL" spirit:bitStringLength="1">0x0</spirit:value>
- </spirit:modelParameter>
- </spirit:modelParameters>
- </spirit:model>
- <spirit:fileSets>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesis_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xlconstant_v1_1_6</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesiswrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>synth/scalp_zynqps_gnd_constant_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogbehavioralsimulation_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>xlconstant_v1_1_6</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_systemcsimulation_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/xlconstant_v1_1_6.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_gnd_constant_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_systemcsimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_gnd_constant_0.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- </spirit:file>
- </spirit:fileSet>
- </spirit:fileSets>
- <spirit:description>Gives a constant signed value.</spirit:description>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>Component_Name</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="2">scalp_zynqps_gnd_constant_0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CONST_WIDTH</spirit:name>
- <spirit:displayName>Const Width</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.CONST_WIDTH" spirit:order="3" spirit:minimum="1" spirit:maximum="4096" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CONST_VAL</spirit:name>
- <spirit:displayName>Const Val</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.CONST_VAL" spirit:order="4">0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:coreExtensions>
- <xilinx:displayName>Constant</xilinx:displayName>
- <xilinx:coreRevision>6</xilinx:coreRevision>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.CONST_VAL" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:coreExtensions>
- <xilinx:packagingInfo>
- <xilinx:xilinxVersion>2019.2</xilinx:xilinxVersion>
- <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="2c73a505"/>
- <xilinx:checksum xilinx:scope="ports" xilinx:value="905deaa3"/>
- <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="0fa77f35"/>
- <xilinx:checksum xilinx:scope="parameters" xilinx:value="f74432fe"/>
- </xilinx:packagingInfo>
- </spirit:vendorExtensions>
-</spirit:component>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.h
deleted file mode 100644
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v
deleted file mode 100644
index efcfe97..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v
+++ /dev/null
@@ -1,68 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 6
-
-`timescale 1ns/1ps
-
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_gnd_constant_0 (
- dout
-);
-
-output wire [0 : 0] dout;
-
- xlconstant_v1_1_6_xlconstant #(
- .CONST_WIDTH(1),
- .CONST_VAL('H0)
- ) inst (
- .dout(dout)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/xlconstant_v1_1_6.h
deleted file mode 100644
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/synth/scalp_zynqps_gnd_constant_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/synth/scalp_zynqps_gnd_constant_0.v
deleted file mode 100644
index ddbbd68..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/synth/scalp_zynqps_gnd_constant_0.v
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 6
-
-(* X_CORE_INFO = "xlconstant_v1_1_6_xlconstant,Vivado 2019.2" *)
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_gnd_constant_0,xlconstant_v1_1_6_xlconstant,{}" *)
-(* CORE_GENERATION_INFO = "scalp_zynqps_gnd_constant_0,xlconstant_v1_1_6_xlconstant,{x_ipProduct=Vivado 2019.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=xlconstant,x_ipVersion=1.1,x_ipCoreRevision=6,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED,CONST_WIDTH=1,CONST_VAL=0x0}" *)
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_gnd_constant_0 (
- dout
-);
-
-output wire [0 : 0] dout;
-
- xlconstant_v1_1_6_xlconstant #(
- .CONST_WIDTH(1),
- .CONST_VAL('H0)
- ) inst (
- .dout(dout)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/hdl/verilog/processing_system7_v5_5_processing_system7.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/hdl/verilog/processing_system7_v5_5_processing_system7.v
deleted file mode 100644
index 062c752..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/hdl/verilog/processing_system7_v5_5_processing_system7.v
+++ /dev/null
@@ -1,3935 +0,0 @@
-
-//-----------------------------------------------------------------------------
-// processing_system7
-// processor sub system wrapper
-//-----------------------------------------------------------------------------
-//
-// ************************************************************************
-// ** DISCLAIMER OF LIABILITY **
-// ** **
-// ** This file contains proprietary and confidential information of **
-// ** Xilinx, Inc. ("Xilinx"), that is distributed under a license **
-// ** from Xilinx, and may be used, copied and/or diSCLosed only **
-// ** pursuant to the terms of a valid license agreement with Xilinx. **
-// ** **
-// ** XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION **
-// ** ("MATERIALS") "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER **
-// ** EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING WITHOUT **
-// ** LIMITATION, ANY WARRANTY WITH RESPECT TO NONINFRINGEMENT, **
-// ** MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. Xilinx **
-// ** does not warrant that functions included in the Materials will **
-// ** meet the requirements of Licensee, or that the operation of the **
-// ** Materials will be uninterrupted or error-free, or that defects **
-// ** in the Materials will be corrected. Furthermore, Xilinx does **
-// ** not warrant or make any representations regarding use, or the **
-// ** results of the use, of the Materials in terms of correctness, **
-// ** accuracy, reliability or otherwise. **
-// ** **
-// ** Xilinx products are not designed or intended to be fail-safe, **
-// ** or for use in any application requiring fail-safe performance, **
-// ** such as life-support or safety devices or systems, Class III **
-// ** medical devices, nuclear facilities, applications related to **
-// ** the deployment of airbags, or any other applications that could **
-// ** lead to death, personal injury or severe property or **
-// ** environmental damage (individually and collectively, "critical **
-// ** applications"). Customer assumes the sole risk and liability **
-// ** of any use of Xilinx products in critical applications, **
-// ** subject only to applicable laws and regulations governing **
-// ** limitations on product liability. **
-// ** **
-// ** Copyright 2010 Xilinx, Inc. **
-// ** All rights reserved. **
-// ** **
-// ** This disclaimer and copyright notice must be retained as part **
-// ** of this file at all times. **
-// ************************************************************************
-//
-//-----------------------------------------------------------------------------
-// Filename: processing_system7_v5_5_processing_system7.v
-// Version: v1.00.a
-// Description: This is the wrapper file for PSS.
-//-----------------------------------------------------------------------------
-// Structure: This section shows the hierarchical structure of
-// pss_wrapper.
-//
-// --processing_system7_v5_5_processing_system7.v
-// --PS7.v - Unisim component
-//-----------------------------------------------------------------------------
-// Author: SD
-//
-// History:
-//
-// SD 09/20/11 -- First version
-// ~~~~~~
-// Created the first version v2.00.a
-// ^^^^^^
-//------------------------------------------------------------------------------
-// ^^^^^^
-// SR 11/25/11 -- v3.00.a version
-// ~~~~~~~
-// Key changes are
-// 1. Changed all clock, reset and clktrig ports to be individual
-// signals instead of vectors. This is required for modeling of tools.
-// 2. Interrupts are now defined as individual signals as well.
-// 3. Added Clk buffer logic for FCLK_CLK
-// 4. Includes the ACP related changes done
-//
-// TODO:
-// 1. C_NUM_F2P_INTR_INPUTS needs to have control on the
-// number of interrupt ports connected for IRQ_F2P.
-//
-//------------------------------------------------------------------------------
-// ^^^^^^
-// KP 12/07/11 -- v3.00.a version
-// ~~~~~~~
-// Key changes are
-// C_NUM_F2P_INTR_INPUTS taken into account for IRQ_F2P
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 12/09/11 -- v3.00.a version
-// ~~~~~~~
-// Key changes are
-// C_FCLK_CLK0_BUF to C_FCLK_CLK3_BUF parameters were updated
-// to STRING and fix for CR 640523
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 12/13/11 -- v3.00.a version
-// ~~~~~~~
-// Key changes are
-// Updated IRQ_F2P logic to address CR 641523.
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 02/01/12 -- v3.01.a version
-// ~~~~~~~
-// Key changes are
-// Updated SDIO logic to address CR 636210.
-// |
-// Added C_PS7_SI_REV parameter to track SI Rev
-// Removed compress/decompress logic to address CR 642527.
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 02/27/12 -- v3.01.a version
-// ~~~~~~~
-// Key changes are
-// TTC(0,1)_WAVE_OUT and TTC(0,1)_CLK_IN vector signals are made as individual
-// ports as fix for CR 646379
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 03/05/12 -- v3.01.a version
-// ~~~~~~~
-// Key changes are
-// Added/updated compress/decompress logic to address 648393
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 03/14/12 -- v4.00.a version
-// ~~~~~~~
-// Unused parameters deleted CR 651120
-// Addressed CR 651751
-//------------------------------------------------------------------------------
-// ^^^^^^
-// NR 04/17/12 -- v4.01.a version
-// ~~~~~~~
-// Added FTM trace buffer functionality
-// Added support for ACP AxUSER ports local update
-//------------------------------------------------------------------------------
-// ^^^^^^
-// VR 05/18/12 -- v4.01.a version
-// ~~~~~~~
-// Fixed CR#659157
-//------------------------------------------------------------------------------
-// ^^^^^^
-// VR 07/25/12 -- v4.01.a version
-// ~~~~~~~
-// Changed S_AXI_HP{1,2}_WACOUNT port's width to 6 from 8 to match unisim model
-// Changed fclk_clktrig_gnd width to 4 from 16 to match unisim model
-//------------------------------------------------------------------------------
-// ^^^^^^
-// VR 11/06/12 -- v5.00 version
-// ~~~~~~~
-// CR #682573
-// Added BIBUF to fixed IO ports and IBUF to fixed input ports
-//------------------------------------------------------------------------------
-(*POWER= "<PROCESSOR name={system} numA9Cores={2} clockFreq={750} load={0.5} /><MEMORY name={code} memType={DDR3(LowVoltage)} dataWidth={16} clockFreq={500} readRate={0.5} writeRate={0.5} /><IO interface={GPIO_Bank_1} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={1} usageRate={0.5} /><IO interface={GPIO_Bank_0} ioStandard={LVCMOS33} bidis={3} ioBank={Vcco_p0} clockFreq={1} usageRate={0.5} /><IO interface={CAN} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SPI} ioStandard={} bidis={2} ioBank={} clockFreq={159.090912} usageRate={0.5} /><IO interface={SPI} ioStandard={LVCMOS25} bidis={5} ioBank={Vcco_p1} clockFreq={159.090912} usageRate={0.5} /><IO interface={I2C} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SD} ioStandard={LVCMOS33} bidis={7} ioBank={Vcco_p0} clockFreq={97.222221} usageRate={0.5} /><IO interface={USB} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={60} usageRate={0.5} /><IO interface={GigE} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={QSPI} ioStandard={LVCMOS33} bidis={6} ioBank={Vcco_p0} clockFreq={133} usageRate={0.5} /><PLL domain={Processor} vco={1500.000} /><PLL domain={Memory} vco={1000.000} /><PLL domain={IO} vco={1750.000} /><AXI interface={M_AXI_GP0} dataWidth={32} clockFreq={125} usageRate={0.5} />/>" *)
-(* CORE_GENERATION_INFO = "processing_system7_v5.5 ,processing_system7_v5.5_user_configuration,{ PCW_UIPARAM_DDR_FREQ_MHZ=500, PCW_UIPARAM_DDR_BANK_ADDR_COUNT=3, PCW_UIPARAM_DDR_ROW_ADDR_COUNT=14, PCW_UIPARAM_DDR_COL_ADDR_COUNT=10, PCW_UIPARAM_DDR_CL=7, PCW_UIPARAM_DDR_CWL=6, PCW_UIPARAM_DDR_T_RCD=7, PCW_UIPARAM_DDR_T_RP=7, PCW_UIPARAM_DDR_T_RC=48.75, PCW_UIPARAM_DDR_T_RAS_MIN=35.0, PCW_UIPARAM_DDR_T_FAW=40.0, PCW_UIPARAM_DDR_AL=0, PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0=0.0, PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1=0.0, PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2=0.0, PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3=0.0, PCW_UIPARAM_DDR_BOARD_DELAY0=0.25, PCW_UIPARAM_DDR_BOARD_DELAY1=0.25, PCW_UIPARAM_DDR_BOARD_DELAY2=0.25, PCW_UIPARAM_DDR_BOARD_DELAY3=0.25, PCW_UIPARAM_DDR_DQS_0_LENGTH_MM=0, PCW_UIPARAM_DDR_DQS_1_LENGTH_MM=0, PCW_UIPARAM_DDR_DQS_2_LENGTH_MM=0, PCW_UIPARAM_DDR_DQS_3_LENGTH_MM=0, PCW_UIPARAM_DDR_DQ_0_LENGTH_MM=0, PCW_UIPARAM_DDR_DQ_1_LENGTH_MM=0, PCW_UIPARAM_DDR_DQ_2_LENGTH_MM=0, PCW_UIPARAM_DDR_DQ_3_LENGTH_MM=0, PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM=0, PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM=0, PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM=0, PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM=0, PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH=76.687, PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH=77.8025, PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH=72.8405, PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH=111.904, PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH=73.119, PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH=63.8935, PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH=77.045, PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH=111.903, PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH=76.428, PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH=76.428, PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH=76.428, PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH=76.428, PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY=160\
-, PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY=160, PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY=160, PCW_CRYSTAL_PERIPHERAL_FREQMHZ=50, PCW_APU_PERIPHERAL_FREQMHZ=750, PCW_DCI_PERIPHERAL_FREQMHZ=10.159, PCW_QSPI_PERIPHERAL_FREQMHZ=133, PCW_SMC_PERIPHERAL_FREQMHZ=100, PCW_USB0_PERIPHERAL_FREQMHZ=60, PCW_USB1_PERIPHERAL_FREQMHZ=60, PCW_SDIO_PERIPHERAL_FREQMHZ=100, PCW_UART_PERIPHERAL_FREQMHZ=100, PCW_SPI_PERIPHERAL_FREQMHZ=166.666666, PCW_CAN_PERIPHERAL_FREQMHZ=100, PCW_CAN0_PERIPHERAL_FREQMHZ=-1, PCW_CAN1_PERIPHERAL_FREQMHZ=-1, PCW_WDT_PERIPHERAL_FREQMHZ=133.333333, PCW_TTC_PERIPHERAL_FREQMHZ=50, PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ=133.333333, PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ=133.333333, PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ=133.333333, PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ=133.333333, PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ=133.333333, PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ=133.333333, PCW_PCAP_PERIPHERAL_FREQMHZ=200, PCW_TPIU_PERIPHERAL_FREQMHZ=200, PCW_FPGA0_PERIPHERAL_FREQMHZ=125, PCW_FPGA1_PERIPHERAL_FREQMHZ=50, PCW_FPGA2_PERIPHERAL_FREQMHZ=50, PCW_FPGA3_PERIPHERAL_FREQMHZ=50, PCW_OVERRIDE_BASIC_CLOCK=0, PCW_ARMPLL_CTRL_FBDIV=30, PCW_IOPLL_CTRL_FBDIV=35, PCW_DDRPLL_CTRL_FBDIV=20, PCW_CPU_CPU_PLL_FREQMHZ=1500.000, PCW_IO_IO_PLL_FREQMHZ=1750.000, PCW_DDR_DDR_PLL_FREQMHZ=1000.000, PCW_USE_M_AXI_GP0=1, PCW_USE_M_AXI_GP1=0, PCW_USE_S_AXI_GP0=0, PCW_USE_S_AXI_GP1=0, PCW_USE_S_AXI_ACP=0, PCW_USE_S_AXI_HP0=0, PCW_USE_S_AXI_HP1=0, PCW_USE_S_AXI_HP2=0, PCW_USE_S_AXI_HP3=0, PCW_M_AXI_GP0_FREQMHZ=125\
-, PCW_M_AXI_GP1_FREQMHZ=10, PCW_S_AXI_GP0_FREQMHZ=10, PCW_S_AXI_GP1_FREQMHZ=10, PCW_S_AXI_ACP_FREQMHZ=10, PCW_S_AXI_HP0_FREQMHZ=10, PCW_S_AXI_HP1_FREQMHZ=10, PCW_S_AXI_HP2_FREQMHZ=10, PCW_S_AXI_HP3_FREQMHZ=10, PCW_USE_CROSS_TRIGGER=0, PCW_FTM_CTI_IN0=DISABLED, PCW_FTM_CTI_IN1=DISABLED, PCW_FTM_CTI_IN2=DISABLED, PCW_FTM_CTI_IN3=DISABLED, PCW_FTM_CTI_OUT0=DISABLED, PCW_FTM_CTI_OUT1=DISABLED, PCW_FTM_CTI_OUT2=DISABLED, PCW_FTM_CTI_OUT3=DISABLED, PCW_UART0_BAUD_RATE=115200, PCW_UART1_BAUD_RATE=115200, PCW_S_AXI_HP0_DATA_WIDTH=64, PCW_S_AXI_HP1_DATA_WIDTH=64, PCW_S_AXI_HP2_DATA_WIDTH=64, PCW_S_AXI_HP3_DATA_WIDTH=64, PCW_IRQ_F2P_MODE=DIRECT, PCW_PRESET_BANK0_VOLTAGE=LVCMOS 3.3V, PCW_PRESET_BANK1_VOLTAGE=LVCMOS 2.5V, PCW_UIPARAM_DDR_ENABLE=1, PCW_UIPARAM_DDR_ADV_ENABLE=0, PCW_UIPARAM_DDR_MEMORY_TYPE=DDR 3 (Low Voltage), PCW_UIPARAM_DDR_ECC=Disabled, PCW_UIPARAM_DDR_BUS_WIDTH=16 Bit, PCW_UIPARAM_DDR_BL=8, PCW_UIPARAM_DDR_HIGH_TEMP=Normal (0-85), PCW_UIPARAM_DDR_PARTNO=MT41K128M16 JT-125, PCW_UIPARAM_DDR_DRAM_WIDTH=16 Bits, PCW_UIPARAM_DDR_DEVICE_CAPACITY=2048 MBits, PCW_UIPARAM_DDR_SPEED_BIN=DDR3_1066F, PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL=1, PCW_UIPARAM_DDR_TRAIN_READ_GATE=1, PCW_UIPARAM_DDR_TRAIN_DATA_EYE=1, PCW_UIPARAM_DDR_CLOCK_STOP_EN=0, PCW_UIPARAM_DDR_USE_INTERNAL_VREF=0, PCW_DDR_PORT0_HPR_ENABLE=0, PCW_DDR_PORT1_HPR_ENABLE=0, PCW_DDR_PORT2_HPR_ENABLE=0, PCW_DDR_PORT3_HPR_ENABLE=0, PCW_DDR_HPRLPR_QUEUE_PARTITION=HPR(0)/LPR(32), PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL=2, PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL=15, PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL=2\
-, PCW_NAND_PERIPHERAL_ENABLE=0, PCW_NAND_GRP_D8_ENABLE=0, PCW_NOR_PERIPHERAL_ENABLE=0, PCW_NOR_GRP_A25_ENABLE=0, PCW_NOR_GRP_CS0_ENABLE=0, PCW_NOR_GRP_SRAM_CS0_ENABLE=0, PCW_NOR_GRP_CS1_ENABLE=0, PCW_NOR_GRP_SRAM_CS1_ENABLE=0, PCW_NOR_GRP_SRAM_INT_ENABLE=0, PCW_QSPI_PERIPHERAL_ENABLE=1, PCW_QSPI_QSPI_IO=MIO 1 .. 6, PCW_QSPI_GRP_SINGLE_SS_ENABLE=1, PCW_QSPI_GRP_SINGLE_SS_IO=MIO 1 .. 6, PCW_QSPI_GRP_SS1_ENABLE=0, PCW_QSPI_GRP_IO1_ENABLE=0, PCW_QSPI_GRP_FBCLK_ENABLE=0, PCW_QSPI_INTERNAL_HIGHADDRESS=0xFCFFFFFF, PCW_SINGLE_QSPI_DATA_MODE=x4, PCW_ENET0_PERIPHERAL_ENABLE=1, PCW_ENET0_ENET0_IO=MIO 16 .. 27, PCW_ENET0_GRP_MDIO_ENABLE=0, PCW_ENET0_RESET_ENABLE=0, PCW_ENET1_PERIPHERAL_ENABLE=0, PCW_ENET1_GRP_MDIO_ENABLE=0, PCW_ENET1_RESET_ENABLE=0, PCW_SD0_PERIPHERAL_ENABLE=0, PCW_SD0_GRP_CD_ENABLE=0, PCW_SD0_GRP_WP_ENABLE=0, PCW_SD0_GRP_POW_ENABLE=0, PCW_SD1_PERIPHERAL_ENABLE=1, PCW_SD1_SD1_IO=MIO 10 .. 15, PCW_SD1_GRP_CD_ENABLE=1, PCW_SD1_GRP_CD_IO=MIO 9, PCW_SD1_GRP_WP_ENABLE=0, PCW_SD1_GRP_POW_ENABLE=0, PCW_UART0_PERIPHERAL_ENABLE=1, PCW_UART0_UART0_IO=MIO 46 .. 47, PCW_UART0_GRP_FULL_ENABLE=0, PCW_UART1_PERIPHERAL_ENABLE=1, PCW_UART1_UART1_IO=MIO 48 .. 49, PCW_UART1_GRP_FULL_ENABLE=0, PCW_SPI0_PERIPHERAL_ENABLE=1, PCW_SPI0_SPI0_IO=MIO 40 .. 45, PCW_SPI0_GRP_SS0_ENABLE=1, PCW_SPI0_GRP_SS0_IO=MIO 42, PCW_SPI0_GRP_SS1_ENABLE=0, PCW_SPI0_GRP_SS2_ENABLE=0, PCW_SPI1_PERIPHERAL_ENABLE=1, PCW_SPI1_SPI1_IO=EMIO, PCW_SPI1_GRP_SS0_ENABLE=1\
-, PCW_SPI1_GRP_SS0_IO=EMIO, PCW_SPI1_GRP_SS1_ENABLE=1, PCW_SPI1_GRP_SS1_IO=EMIO, PCW_SPI1_GRP_SS2_ENABLE=1, PCW_SPI1_GRP_SS2_IO=EMIO, PCW_CAN0_PERIPHERAL_ENABLE=0, PCW_CAN0_GRP_CLK_ENABLE=0, PCW_CAN1_PERIPHERAL_ENABLE=1, PCW_CAN1_CAN1_IO=MIO 52 .. 53, PCW_CAN1_GRP_CLK_ENABLE=0, PCW_TRACE_PERIPHERAL_ENABLE=0, PCW_TRACE_GRP_2BIT_ENABLE=0, PCW_TRACE_GRP_4BIT_ENABLE=0, PCW_TRACE_GRP_8BIT_ENABLE=0, PCW_TRACE_GRP_16BIT_ENABLE=0, PCW_TRACE_GRP_32BIT_ENABLE=0, PCW_WDT_PERIPHERAL_ENABLE=0, PCW_TTC0_PERIPHERAL_ENABLE=0, PCW_TTC1_PERIPHERAL_ENABLE=0, PCW_PJTAG_PERIPHERAL_ENABLE=0, PCW_USB0_PERIPHERAL_ENABLE=1, PCW_USB0_USB0_IO=MIO 28 .. 39, PCW_USB0_RESET_ENABLE=0, PCW_USB1_PERIPHERAL_ENABLE=0, PCW_USB1_RESET_ENABLE=0, PCW_I2C0_PERIPHERAL_ENABLE=1, PCW_I2C0_I2C0_IO=MIO 50 .. 51, PCW_I2C0_GRP_INT_ENABLE=0, PCW_I2C0_RESET_ENABLE=0, PCW_I2C1_PERIPHERAL_ENABLE=0, PCW_I2C1_GRP_INT_ENABLE=0, PCW_I2C1_RESET_ENABLE=0, PCW_GPIO_PERIPHERAL_ENABLE=0, PCW_GPIO_MIO_GPIO_ENABLE=1, PCW_GPIO_MIO_GPIO_IO=MIO, PCW_GPIO_EMIO_GPIO_ENABLE=0, PCW_APU_CLK_RATIO_ENABLE=6:2:1, PCW_ENET0_PERIPHERAL_FREQMHZ=1000 Mbps, PCW_ENET1_PERIPHERAL_FREQMHZ=1000 Mbps, PCW_CPU_PERIPHERAL_CLKSRC=ARM PLL, PCW_DDR_PERIPHERAL_CLKSRC=DDR PLL, PCW_SMC_PERIPHERAL_CLKSRC=IO PLL, PCW_QSPI_PERIPHERAL_CLKSRC=IO PLL, PCW_SDIO_PERIPHERAL_CLKSRC=IO PLL, PCW_UART_PERIPHERAL_CLKSRC=IO PLL, PCW_SPI_PERIPHERAL_CLKSRC=IO PLL, PCW_CAN_PERIPHERAL_CLKSRC=IO PLL, PCW_FCLK0_PERIPHERAL_CLKSRC=IO PLL, PCW_FCLK1_PERIPHERAL_CLKSRC=IO PLL, PCW_FCLK2_PERIPHERAL_CLKSRC=IO PLL\
-, PCW_FCLK3_PERIPHERAL_CLKSRC=IO PLL, PCW_ENET0_PERIPHERAL_CLKSRC=IO PLL, PCW_ENET1_PERIPHERAL_CLKSRC=IO PLL, PCW_CAN0_PERIPHERAL_CLKSRC=External, PCW_CAN1_PERIPHERAL_CLKSRC=External, PCW_TPIU_PERIPHERAL_CLKSRC=External, PCW_TTC0_CLK0_PERIPHERAL_CLKSRC=CPU_1X, PCW_TTC0_CLK1_PERIPHERAL_CLKSRC=CPU_1X, PCW_TTC0_CLK2_PERIPHERAL_CLKSRC=CPU_1X, PCW_TTC1_CLK0_PERIPHERAL_CLKSRC=CPU_1X, PCW_TTC1_CLK1_PERIPHERAL_CLKSRC=CPU_1X, PCW_TTC1_CLK2_PERIPHERAL_CLKSRC=CPU_1X, PCW_WDT_PERIPHERAL_CLKSRC=CPU_1X, PCW_DCI_PERIPHERAL_CLKSRC=DDR PLL, PCW_PCAP_PERIPHERAL_CLKSRC=IO PLL, PCW_USB_RESET_POLARITY=Active Low, PCW_ENET_RESET_POLARITY=Active Low, PCW_I2C_RESET_POLARITY=Active Low, PCW_FPGA_FCLK0_ENABLE=1, PCW_FPGA_FCLK1_ENABLE=0, PCW_FPGA_FCLK2_ENABLE=0, PCW_FPGA_FCLK3_ENABLE=0, PCW_NOR_SRAM_CS0_T_TR=1, PCW_NOR_SRAM_CS0_T_PC=1, PCW_NOR_SRAM_CS0_T_WP=1, PCW_NOR_SRAM_CS0_T_CEOE=1, PCW_NOR_SRAM_CS0_T_WC=11, PCW_NOR_SRAM_CS0_T_RC=11, PCW_NOR_SRAM_CS0_WE_TIME=0, PCW_NOR_SRAM_CS1_T_TR=1, PCW_NOR_SRAM_CS1_T_PC=1, PCW_NOR_SRAM_CS1_T_WP=1, PCW_NOR_SRAM_CS1_T_CEOE=1, PCW_NOR_SRAM_CS1_T_WC=11, PCW_NOR_SRAM_CS1_T_RC=11, PCW_NOR_SRAM_CS1_WE_TIME=0, PCW_NOR_CS0_T_TR=1, PCW_NOR_CS0_T_PC=1, PCW_NOR_CS0_T_WP=1, PCW_NOR_CS0_T_CEOE=1, PCW_NOR_CS0_T_WC=11, PCW_NOR_CS0_T_RC=11, PCW_NOR_CS0_WE_TIME=0, PCW_NOR_CS1_T_TR=1, PCW_NOR_CS1_T_PC=1, PCW_NOR_CS1_T_WP=1, PCW_NOR_CS1_T_CEOE=1, PCW_NOR_CS1_T_WC=11, PCW_NOR_CS1_T_RC=11, PCW_NOR_CS1_WE_TIME=0\
-, PCW_NAND_CYCLES_T_RR=1, PCW_NAND_CYCLES_T_AR=1, PCW_NAND_CYCLES_T_CLR=1, PCW_NAND_CYCLES_T_WP=1, PCW_NAND_CYCLES_T_REA=1, PCW_NAND_CYCLES_T_WC=11, PCW_NAND_CYCLES_T_RC=11 }" *)
-(* HW_HANDOFF = "scalp_zynqps_processing_system7_0_0.hwdef" *)
-
-module processing_system7_v5_5_processing_system7
-
-#(
- parameter integer C_USE_DEFAULT_ACP_USER_VAL = 1,
- parameter integer C_S_AXI_ACP_ARUSER_VAL = 31,
- parameter integer C_S_AXI_ACP_AWUSER_VAL = 31,
- parameter integer C_M_AXI_GP0_THREAD_ID_WIDTH = 12,
- parameter integer C_M_AXI_GP1_THREAD_ID_WIDTH = 12,
- parameter integer C_M_AXI_GP0_ENABLE_STATIC_REMAP = 1,
- parameter integer C_M_AXI_GP1_ENABLE_STATIC_REMAP = 1,
- parameter integer C_M_AXI_GP0_ID_WIDTH = 12,
- parameter integer C_M_AXI_GP1_ID_WIDTH = 12,
- parameter integer C_S_AXI_GP0_ID_WIDTH = 6,
- parameter integer C_S_AXI_GP1_ID_WIDTH = 6,
- parameter integer C_S_AXI_HP0_ID_WIDTH = 6,
- parameter integer C_S_AXI_HP1_ID_WIDTH = 6,
- parameter integer C_S_AXI_HP2_ID_WIDTH = 6,
- parameter integer C_S_AXI_HP3_ID_WIDTH = 6,
- parameter integer C_S_AXI_ACP_ID_WIDTH = 3,
- parameter integer C_S_AXI_HP0_DATA_WIDTH = 64,
- parameter integer C_S_AXI_HP1_DATA_WIDTH = 64,
- parameter integer C_S_AXI_HP2_DATA_WIDTH = 64,
- parameter integer C_S_AXI_HP3_DATA_WIDTH = 64,
- parameter integer C_INCLUDE_ACP_TRANS_CHECK = 0,
- parameter integer C_NUM_F2P_INTR_INPUTS = 1,
- parameter C_FCLK_CLK0_BUF = "TRUE",
- parameter C_FCLK_CLK1_BUF = "TRUE",
- parameter C_FCLK_CLK2_BUF = "TRUE",
- parameter C_FCLK_CLK3_BUF = "TRUE",
- parameter integer C_EMIO_GPIO_WIDTH = 64,
- parameter integer C_INCLUDE_TRACE_BUFFER = 0,
- parameter integer C_TRACE_BUFFER_FIFO_SIZE = 128,
- parameter integer C_TRACE_BUFFER_CLOCK_DELAY = 12,
- parameter integer USE_TRACE_DATA_EDGE_DETECTOR = 0,
- parameter integer C_TRACE_PIPELINE_WIDTH = 8,
- parameter C_PS7_SI_REV = "PRODUCTION",
- parameter integer C_EN_EMIO_ENET0 = 0,
- parameter integer C_EN_EMIO_ENET1 = 0,
- parameter integer C_EN_EMIO_TRACE = 0,
- parameter integer C_DQ_WIDTH = 32,
- parameter integer C_DQS_WIDTH = 4,
- parameter integer C_DM_WIDTH = 4,
- parameter integer C_MIO_PRIMITIVE = 54,
- parameter C_PACKAGE_NAME = "clg484",
- parameter C_IRQ_F2P_MODE = "DIRECT",
- parameter C_TRACE_INTERNAL_WIDTH = 32,
- parameter integer C_EN_EMIO_PJTAG = 0,
-
- // Enable and disable AFI Secure transaction
- parameter C_USE_AXI_NONSECURE = 0,
-
- //parameters for HP enable ports
- parameter C_USE_S_AXI_HP0 = 0,
- parameter C_USE_S_AXI_HP1 = 0,
- parameter C_USE_S_AXI_HP2 = 0,
- parameter C_USE_S_AXI_HP3 = 0,
-
- //parameters for GP and ACP enable ports */
- parameter C_USE_M_AXI_GP0 = 0,
- parameter C_USE_M_AXI_GP1 = 0,
- parameter C_USE_S_AXI_GP0 = 0,
- parameter C_USE_S_AXI_GP1 = 0,
- parameter C_USE_S_AXI_ACP = 0,
- parameter C_GP0_EN_MODIFIABLE_TXN=0,
- parameter C_GP1_EN_MODIFIABLE_TXN=0
-
-)
-(
- //FMIO =========================================
-
- //FMIO CAN0
- output CAN0_PHY_TX,
- input CAN0_PHY_RX,
-
- //FMIO CAN1
- output CAN1_PHY_TX,
- input CAN1_PHY_RX,
-
- //FMIO ENET0
- output reg ENET0_GMII_TX_EN = 'b0,
- output reg ENET0_GMII_TX_ER = 'b0,
- output ENET0_MDIO_MDC,
- output ENET0_MDIO_O,
- output ENET0_MDIO_T,
- output ENET0_PTP_DELAY_REQ_RX,
- output ENET0_PTP_DELAY_REQ_TX,
- output ENET0_PTP_PDELAY_REQ_RX,
- output ENET0_PTP_PDELAY_REQ_TX,
- output ENET0_PTP_PDELAY_RESP_RX,
- output ENET0_PTP_PDELAY_RESP_TX,
- output ENET0_PTP_SYNC_FRAME_RX,
- output ENET0_PTP_SYNC_FRAME_TX,
- output ENET0_SOF_RX,
- output ENET0_SOF_TX,
-
-
- output reg [7:0] ENET0_GMII_TXD,
-
-
- input ENET0_GMII_COL,
- input ENET0_GMII_CRS,
- input ENET0_GMII_RX_CLK,
- input ENET0_GMII_RX_DV,
- input ENET0_GMII_RX_ER,
- input ENET0_GMII_TX_CLK,
- input ENET0_MDIO_I,
- input ENET0_EXT_INTIN,
- input [7:0] ENET0_GMII_RXD,
-
- //FMIO ENET1
- output reg ENET1_GMII_TX_EN = 'b0,
- output reg ENET1_GMII_TX_ER = 'b0,
- output ENET1_MDIO_MDC,
- output ENET1_MDIO_O,
- output ENET1_MDIO_T,
- output ENET1_PTP_DELAY_REQ_RX,
- output ENET1_PTP_DELAY_REQ_TX,
- output ENET1_PTP_PDELAY_REQ_RX,
- output ENET1_PTP_PDELAY_REQ_TX,
- output ENET1_PTP_PDELAY_RESP_RX,
- output ENET1_PTP_PDELAY_RESP_TX,
- output ENET1_PTP_SYNC_FRAME_RX,
- output ENET1_PTP_SYNC_FRAME_TX,
- output ENET1_SOF_RX,
- output ENET1_SOF_TX,
- output reg [7:0] ENET1_GMII_TXD,
-
- input ENET1_GMII_COL,
- input ENET1_GMII_CRS,
- input ENET1_GMII_RX_CLK,
- input ENET1_GMII_RX_DV,
- input ENET1_GMII_RX_ER,
- input ENET1_GMII_TX_CLK,
- input ENET1_MDIO_I,
- input ENET1_EXT_INTIN,
- input [7:0] ENET1_GMII_RXD,
-
- //FMIO GPIO
- input [(C_EMIO_GPIO_WIDTH-1):0] GPIO_I,
- output [(C_EMIO_GPIO_WIDTH-1):0] GPIO_O,
- output [(C_EMIO_GPIO_WIDTH-1):0] GPIO_T,
-
- //FMIO I2C0
- input I2C0_SDA_I,
- output I2C0_SDA_O,
- output I2C0_SDA_T,
- input I2C0_SCL_I,
- output I2C0_SCL_O,
- output I2C0_SCL_T,
-
- //FMIO I2C1
- input I2C1_SDA_I,
- output I2C1_SDA_O,
- output I2C1_SDA_T,
- input I2C1_SCL_I,
- output I2C1_SCL_O,
- output I2C1_SCL_T,
-
- //FMIO PJTAG
- input PJTAG_TCK,
- input PJTAG_TMS,
- input PJTAG_TDI,
- output PJTAG_TDO,
-
-
- //FMIO SDIO0
- output SDIO0_CLK,
- input SDIO0_CLK_FB,
- output SDIO0_CMD_O,
- input SDIO0_CMD_I,
- output SDIO0_CMD_T,
- input [3:0] SDIO0_DATA_I,
- output [3:0] SDIO0_DATA_O,
- output [3:0] SDIO0_DATA_T,
- output SDIO0_LED,
- input SDIO0_CDN,
- input SDIO0_WP,
- output SDIO0_BUSPOW,
- output [2:0] SDIO0_BUSVOLT,
-
- //FMIO SDIO1
- output SDIO1_CLK,
- input SDIO1_CLK_FB,
- output SDIO1_CMD_O,
- input SDIO1_CMD_I,
- output SDIO1_CMD_T,
- input [3:0] SDIO1_DATA_I,
- output [3:0] SDIO1_DATA_O,
- output [3:0] SDIO1_DATA_T,
- output SDIO1_LED,
- input SDIO1_CDN,
- input SDIO1_WP,
- output SDIO1_BUSPOW,
- output [2:0] SDIO1_BUSVOLT,
-
- //FMIO SPI0
- input SPI0_SCLK_I,
- output SPI0_SCLK_O,
- output SPI0_SCLK_T,
- input SPI0_MOSI_I,
- output SPI0_MOSI_O,
- output SPI0_MOSI_T,
- input SPI0_MISO_I,
- output SPI0_MISO_O,
- output SPI0_MISO_T,
- input SPI0_SS_I,
- output SPI0_SS_O,
- output SPI0_SS1_O,
- output SPI0_SS2_O,
- output SPI0_SS_T,
-
- //FMIO SPI1
- input SPI1_SCLK_I,
- output SPI1_SCLK_O,
- output SPI1_SCLK_T,
- input SPI1_MOSI_I,
- output SPI1_MOSI_O,
- output SPI1_MOSI_T,
- input SPI1_MISO_I,
- output SPI1_MISO_O,
- output SPI1_MISO_T,
- input SPI1_SS_I,
- output SPI1_SS_O,
- output SPI1_SS1_O,
- output SPI1_SS2_O,
- output SPI1_SS_T,
-
- //FMIO UART0
- output UART0_DTRN,
- output UART0_RTSN,
- output UART0_TX,
- input UART0_CTSN,
- input UART0_DCDN,
- input UART0_DSRN,
- input UART0_RIN,
- input UART0_RX,
-
- //FMIO UART1
- output UART1_DTRN,
- output UART1_RTSN,
- output UART1_TX,
- input UART1_CTSN,
- input UART1_DCDN,
- input UART1_DSRN,
- input UART1_RIN,
- input UART1_RX,
-
- //FMIO TTC0
- output TTC0_WAVE0_OUT,
- output TTC0_WAVE1_OUT,
- output TTC0_WAVE2_OUT,
- input TTC0_CLK0_IN,
- input TTC0_CLK1_IN,
- input TTC0_CLK2_IN,
-
- //FMIO TTC1
- output TTC1_WAVE0_OUT,
- output TTC1_WAVE1_OUT,
- output TTC1_WAVE2_OUT,
- input TTC1_CLK0_IN,
- input TTC1_CLK1_IN,
- input TTC1_CLK2_IN,
-
- //WDT
- input WDT_CLK_IN,
- output WDT_RST_OUT,
-
- //FTPORT
- input TRACE_CLK,
- output TRACE_CTL,
- output [(C_TRACE_INTERNAL_WIDTH)-1:0] TRACE_DATA,
- output reg TRACE_CLK_OUT,
-
- // USB
- output [1:0] USB0_PORT_INDCTL,
- output USB0_VBUS_PWRSELECT,
- input USB0_VBUS_PWRFAULT,
-
- output [1:0] USB1_PORT_INDCTL,
- output USB1_VBUS_PWRSELECT,
- input USB1_VBUS_PWRFAULT,
-
- input SRAM_INTIN,
-
- //AIO ===================================================
-
- //M_AXI_GP0
-
- // -- Output
-
- output M_AXI_GP0_ARESETN,
- output M_AXI_GP0_ARVALID,
- output M_AXI_GP0_AWVALID,
- output M_AXI_GP0_BREADY,
- output M_AXI_GP0_RREADY,
- output M_AXI_GP0_WLAST,
- output M_AXI_GP0_WVALID,
- output [(C_M_AXI_GP0_THREAD_ID_WIDTH - 1):0] M_AXI_GP0_ARID,
- output [(C_M_AXI_GP0_THREAD_ID_WIDTH - 1):0] M_AXI_GP0_AWID,
- output [(C_M_AXI_GP0_THREAD_ID_WIDTH - 1):0] M_AXI_GP0_WID,
- output [1:0] M_AXI_GP0_ARBURST,
- output [1:0] M_AXI_GP0_ARLOCK,
- output [2:0] M_AXI_GP0_ARSIZE,
- output [1:0] M_AXI_GP0_AWBURST,
- output [1:0] M_AXI_GP0_AWLOCK,
- output [2:0] M_AXI_GP0_AWSIZE,
- output [2:0] M_AXI_GP0_ARPROT,
- output [2:0] M_AXI_GP0_AWPROT,
- output [31:0] M_AXI_GP0_ARADDR,
- output [31:0] M_AXI_GP0_AWADDR,
- output [31:0] M_AXI_GP0_WDATA,
- output [3:0] M_AXI_GP0_ARCACHE,
- output [3:0] M_AXI_GP0_ARLEN,
- output [3:0] M_AXI_GP0_ARQOS,
- output [3:0] M_AXI_GP0_AWCACHE,
- output [3:0] M_AXI_GP0_AWLEN,
- output [3:0] M_AXI_GP0_AWQOS,
- output [3:0] M_AXI_GP0_WSTRB,
-
- // -- Input
-
- input M_AXI_GP0_ACLK,
- input M_AXI_GP0_ARREADY,
- input M_AXI_GP0_AWREADY,
- input M_AXI_GP0_BVALID,
- input M_AXI_GP0_RLAST,
- input M_AXI_GP0_RVALID,
- input M_AXI_GP0_WREADY,
- input [(C_M_AXI_GP0_THREAD_ID_WIDTH - 1):0] M_AXI_GP0_BID,
- input [(C_M_AXI_GP0_THREAD_ID_WIDTH - 1):0] M_AXI_GP0_RID,
- input [1:0] M_AXI_GP0_BRESP,
- input [1:0] M_AXI_GP0_RRESP,
- input [31:0] M_AXI_GP0_RDATA,
-
-
- //M_AXI_GP1
-
- // -- Output
-
- output M_AXI_GP1_ARESETN,
- output M_AXI_GP1_ARVALID,
- output M_AXI_GP1_AWVALID,
- output M_AXI_GP1_BREADY,
- output M_AXI_GP1_RREADY,
- output M_AXI_GP1_WLAST,
- output M_AXI_GP1_WVALID,
- output [(C_M_AXI_GP1_THREAD_ID_WIDTH - 1):0] M_AXI_GP1_ARID,
- output [(C_M_AXI_GP1_THREAD_ID_WIDTH - 1):0] M_AXI_GP1_AWID,
- output [(C_M_AXI_GP1_THREAD_ID_WIDTH - 1):0] M_AXI_GP1_WID,
- output [1:0] M_AXI_GP1_ARBURST,
- output [1:0] M_AXI_GP1_ARLOCK,
- output [2:0] M_AXI_GP1_ARSIZE,
- output [1:0] M_AXI_GP1_AWBURST,
- output [1:0] M_AXI_GP1_AWLOCK,
- output [2:0] M_AXI_GP1_AWSIZE,
- output [2:0] M_AXI_GP1_ARPROT,
- output [2:0] M_AXI_GP1_AWPROT,
- output [31:0] M_AXI_GP1_ARADDR,
- output [31:0] M_AXI_GP1_AWADDR,
- output [31:0] M_AXI_GP1_WDATA,
- output [3:0] M_AXI_GP1_ARCACHE,
- output [3:0] M_AXI_GP1_ARLEN,
- output [3:0] M_AXI_GP1_ARQOS,
- output [3:0] M_AXI_GP1_AWCACHE,
- output [3:0] M_AXI_GP1_AWLEN,
- output [3:0] M_AXI_GP1_AWQOS,
- output [3:0] M_AXI_GP1_WSTRB,
-
- // -- Input
-
- input M_AXI_GP1_ACLK,
- input M_AXI_GP1_ARREADY,
- input M_AXI_GP1_AWREADY,
- input M_AXI_GP1_BVALID,
- input M_AXI_GP1_RLAST,
- input M_AXI_GP1_RVALID,
- input M_AXI_GP1_WREADY,
- input [(C_M_AXI_GP1_THREAD_ID_WIDTH - 1):0] M_AXI_GP1_BID,
- input [(C_M_AXI_GP1_THREAD_ID_WIDTH - 1):0] M_AXI_GP1_RID,
- input [1:0] M_AXI_GP1_BRESP,
- input [1:0] M_AXI_GP1_RRESP,
- input [31:0] M_AXI_GP1_RDATA,
-
-
- // S_AXI_GP0
-
- // -- Output
-
- output S_AXI_GP0_ARESETN,
- output S_AXI_GP0_ARREADY,
- output S_AXI_GP0_AWREADY,
- output S_AXI_GP0_BVALID,
- output S_AXI_GP0_RLAST,
- output S_AXI_GP0_RVALID,
- output S_AXI_GP0_WREADY,
- output [1:0] S_AXI_GP0_BRESP,
- output [1:0] S_AXI_GP0_RRESP,
- output [31:0] S_AXI_GP0_RDATA,
- output [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] S_AXI_GP0_BID,
- output [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] S_AXI_GP0_RID,
-
- // -- Input
- input S_AXI_GP0_ACLK,
- input S_AXI_GP0_ARVALID,
- input S_AXI_GP0_AWVALID,
- input S_AXI_GP0_BREADY,
- input S_AXI_GP0_RREADY,
- input S_AXI_GP0_WLAST,
- input S_AXI_GP0_WVALID,
- input [1:0] S_AXI_GP0_ARBURST,
- input [1:0] S_AXI_GP0_ARLOCK,
- input [2:0] S_AXI_GP0_ARSIZE,
- input [1:0] S_AXI_GP0_AWBURST,
- input [1:0] S_AXI_GP0_AWLOCK,
- input [2:0] S_AXI_GP0_AWSIZE,
- input [2:0] S_AXI_GP0_ARPROT,
- input [2:0] S_AXI_GP0_AWPROT,
- input [31:0] S_AXI_GP0_ARADDR,
- input [31:0] S_AXI_GP0_AWADDR,
- input [31:0] S_AXI_GP0_WDATA,
- input [3:0] S_AXI_GP0_ARCACHE,
- input [3:0] S_AXI_GP0_ARLEN,
- input [3:0] S_AXI_GP0_ARQOS,
- input [3:0] S_AXI_GP0_AWCACHE,
- input [3:0] S_AXI_GP0_AWLEN,
- input [3:0] S_AXI_GP0_AWQOS,
- input [3:0] S_AXI_GP0_WSTRB,
- input [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] S_AXI_GP0_ARID,
- input [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] S_AXI_GP0_AWID,
- input [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] S_AXI_GP0_WID,
-
- // S_AXI_GP1
-
- // -- Output
- output S_AXI_GP1_ARESETN,
- output S_AXI_GP1_ARREADY,
- output S_AXI_GP1_AWREADY,
- output S_AXI_GP1_BVALID,
- output S_AXI_GP1_RLAST,
- output S_AXI_GP1_RVALID,
- output S_AXI_GP1_WREADY,
- output [1:0] S_AXI_GP1_BRESP,
- output [1:0] S_AXI_GP1_RRESP,
- output [31:0] S_AXI_GP1_RDATA,
- output [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] S_AXI_GP1_BID,
- output [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] S_AXI_GP1_RID,
-
- // -- Input
- input S_AXI_GP1_ACLK,
- input S_AXI_GP1_ARVALID,
- input S_AXI_GP1_AWVALID,
- input S_AXI_GP1_BREADY,
- input S_AXI_GP1_RREADY,
- input S_AXI_GP1_WLAST,
- input S_AXI_GP1_WVALID,
- input [1:0] S_AXI_GP1_ARBURST,
- input [1:0] S_AXI_GP1_ARLOCK,
- input [2:0] S_AXI_GP1_ARSIZE,
- input [1:0] S_AXI_GP1_AWBURST,
- input [1:0] S_AXI_GP1_AWLOCK,
- input [2:0] S_AXI_GP1_AWSIZE,
- input [2:0] S_AXI_GP1_ARPROT,
- input [2:0] S_AXI_GP1_AWPROT,
- input [31:0] S_AXI_GP1_ARADDR,
- input [31:0] S_AXI_GP1_AWADDR,
- input [31:0] S_AXI_GP1_WDATA,
- input [3:0] S_AXI_GP1_ARCACHE,
- input [3:0] S_AXI_GP1_ARLEN,
- input [3:0] S_AXI_GP1_ARQOS,
- input [3:0] S_AXI_GP1_AWCACHE,
- input [3:0] S_AXI_GP1_AWLEN,
- input [3:0] S_AXI_GP1_AWQOS,
- input [3:0] S_AXI_GP1_WSTRB,
- input [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] S_AXI_GP1_ARID,
- input [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] S_AXI_GP1_AWID,
- input [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] S_AXI_GP1_WID,
-
- //S_AXI_ACP
-
- // -- Output
-
- output S_AXI_ACP_ARESETN,
- output S_AXI_ACP_ARREADY,
- output S_AXI_ACP_AWREADY,
- output S_AXI_ACP_BVALID,
- output S_AXI_ACP_RLAST,
- output S_AXI_ACP_RVALID,
- output S_AXI_ACP_WREADY,
- output [1:0] S_AXI_ACP_BRESP,
- output [1:0] S_AXI_ACP_RRESP,
- output [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ACP_BID,
- output [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ACP_RID,
- output [63:0] S_AXI_ACP_RDATA,
-
- // -- Input
-
- input S_AXI_ACP_ACLK,
- input S_AXI_ACP_ARVALID,
- input S_AXI_ACP_AWVALID,
- input S_AXI_ACP_BREADY,
- input S_AXI_ACP_RREADY,
- input S_AXI_ACP_WLAST,
- input S_AXI_ACP_WVALID,
- input [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ACP_ARID,
- input [2:0] S_AXI_ACP_ARPROT,
- input [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ACP_AWID,
- input [2:0] S_AXI_ACP_AWPROT,
- input [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ACP_WID,
- input [31:0] S_AXI_ACP_ARADDR,
- input [31:0] S_AXI_ACP_AWADDR,
- input [3:0] S_AXI_ACP_ARCACHE,
- input [3:0] S_AXI_ACP_ARLEN,
- input [3:0] S_AXI_ACP_ARQOS,
- input [3:0] S_AXI_ACP_AWCACHE,
- input [3:0] S_AXI_ACP_AWLEN,
- input [3:0] S_AXI_ACP_AWQOS,
- input [1:0] S_AXI_ACP_ARBURST,
- input [1:0] S_AXI_ACP_ARLOCK,
- input [2:0] S_AXI_ACP_ARSIZE,
- input [1:0] S_AXI_ACP_AWBURST,
- input [1:0] S_AXI_ACP_AWLOCK,
- input [2:0] S_AXI_ACP_AWSIZE,
- input [4:0] S_AXI_ACP_ARUSER,
- input [4:0] S_AXI_ACP_AWUSER,
- input [63:0] S_AXI_ACP_WDATA,
- input [7:0] S_AXI_ACP_WSTRB,
-
- // S_AXI_HP_0
-
- // -- Output
- output S_AXI_HP0_ARESETN,
- output S_AXI_HP0_ARREADY,
- output S_AXI_HP0_AWREADY,
- output S_AXI_HP0_BVALID,
- output S_AXI_HP0_RLAST,
- output S_AXI_HP0_RVALID,
- output S_AXI_HP0_WREADY,
- output [1:0] S_AXI_HP0_BRESP,
- output [1:0] S_AXI_HP0_RRESP,
- output [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] S_AXI_HP0_BID,
- output [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] S_AXI_HP0_RID,
- output [(C_S_AXI_HP0_DATA_WIDTH - 1) :0] S_AXI_HP0_RDATA,
- output [7:0] S_AXI_HP0_RCOUNT,
- output [7:0] S_AXI_HP0_WCOUNT,
- output [2:0] S_AXI_HP0_RACOUNT,
- output [5:0] S_AXI_HP0_WACOUNT,
-
- // -- Input
- input S_AXI_HP0_ACLK,
- input S_AXI_HP0_ARVALID,
- input S_AXI_HP0_AWVALID,
- input S_AXI_HP0_BREADY,
- input S_AXI_HP0_RDISSUECAP1_EN,
- input S_AXI_HP0_RREADY,
- input S_AXI_HP0_WLAST,
- input S_AXI_HP0_WRISSUECAP1_EN,
- input S_AXI_HP0_WVALID,
- input [1:0] S_AXI_HP0_ARBURST,
- input [1:0] S_AXI_HP0_ARLOCK,
- input [2:0] S_AXI_HP0_ARSIZE,
- input [1:0] S_AXI_HP0_AWBURST,
- input [1:0] S_AXI_HP0_AWLOCK,
- input [2:0] S_AXI_HP0_AWSIZE,
- input [2:0] S_AXI_HP0_ARPROT,
- input [2:0] S_AXI_HP0_AWPROT,
- input [31:0] S_AXI_HP0_ARADDR,
- input [31:0] S_AXI_HP0_AWADDR,
- input [3:0] S_AXI_HP0_ARCACHE,
- input [3:0] S_AXI_HP0_ARLEN,
- input [3:0] S_AXI_HP0_ARQOS,
- input [3:0] S_AXI_HP0_AWCACHE,
- input [3:0] S_AXI_HP0_AWLEN,
- input [3:0] S_AXI_HP0_AWQOS,
- input [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] S_AXI_HP0_ARID,
- input [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] S_AXI_HP0_AWID,
- input [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] S_AXI_HP0_WID,
- input [(C_S_AXI_HP0_DATA_WIDTH - 1) :0] S_AXI_HP0_WDATA,
- input [((C_S_AXI_HP0_DATA_WIDTH/8)-1):0] S_AXI_HP0_WSTRB,
-
- // S_AXI_HP1
- // -- Output
- output S_AXI_HP1_ARESETN,
- output S_AXI_HP1_ARREADY,
- output S_AXI_HP1_AWREADY,
- output S_AXI_HP1_BVALID,
- output S_AXI_HP1_RLAST,
- output S_AXI_HP1_RVALID,
- output S_AXI_HP1_WREADY,
- output [1:0] S_AXI_HP1_BRESP,
- output [1:0] S_AXI_HP1_RRESP,
- output [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] S_AXI_HP1_BID,
- output [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] S_AXI_HP1_RID,
- output [(C_S_AXI_HP1_DATA_WIDTH - 1) :0] S_AXI_HP1_RDATA,
- output [7:0] S_AXI_HP1_RCOUNT,
- output [7:0] S_AXI_HP1_WCOUNT,
- output [2:0] S_AXI_HP1_RACOUNT,
- output [5:0] S_AXI_HP1_WACOUNT,
-
-
- // -- Input
- input S_AXI_HP1_ACLK,
- input S_AXI_HP1_ARVALID,
- input S_AXI_HP1_AWVALID,
- input S_AXI_HP1_BREADY,
- input S_AXI_HP1_RDISSUECAP1_EN,
- input S_AXI_HP1_RREADY,
- input S_AXI_HP1_WLAST,
- input S_AXI_HP1_WRISSUECAP1_EN,
- input S_AXI_HP1_WVALID,
- input [1:0] S_AXI_HP1_ARBURST,
- input [1:0] S_AXI_HP1_ARLOCK,
- input [2:0] S_AXI_HP1_ARSIZE,
- input [1:0] S_AXI_HP1_AWBURST,
- input [1:0] S_AXI_HP1_AWLOCK,
- input [2:0] S_AXI_HP1_AWSIZE,
- input [2:0] S_AXI_HP1_ARPROT,
- input [2:0] S_AXI_HP1_AWPROT,
- input [31:0] S_AXI_HP1_ARADDR,
- input [31:0] S_AXI_HP1_AWADDR,
- input [3:0] S_AXI_HP1_ARCACHE,
- input [3:0] S_AXI_HP1_ARLEN,
- input [3:0] S_AXI_HP1_ARQOS,
- input [3:0] S_AXI_HP1_AWCACHE,
- input [3:0] S_AXI_HP1_AWLEN,
- input [3:0] S_AXI_HP1_AWQOS,
- input [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] S_AXI_HP1_ARID,
- input [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] S_AXI_HP1_AWID,
- input [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] S_AXI_HP1_WID,
- input [(C_S_AXI_HP1_DATA_WIDTH - 1) :0] S_AXI_HP1_WDATA,
- input [((C_S_AXI_HP1_DATA_WIDTH/8)-1):0] S_AXI_HP1_WSTRB,
-
- // S_AXI_HP2
- // -- Output
- output S_AXI_HP2_ARESETN,
- output S_AXI_HP2_ARREADY,
- output S_AXI_HP2_AWREADY,
- output S_AXI_HP2_BVALID,
- output S_AXI_HP2_RLAST,
- output S_AXI_HP2_RVALID,
- output S_AXI_HP2_WREADY,
- output [1:0] S_AXI_HP2_BRESP,
- output [1:0] S_AXI_HP2_RRESP,
- output [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] S_AXI_HP2_BID,
- output [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] S_AXI_HP2_RID,
- output [(C_S_AXI_HP2_DATA_WIDTH - 1) :0] S_AXI_HP2_RDATA,
- output [7:0] S_AXI_HP2_RCOUNT,
- output [7:0] S_AXI_HP2_WCOUNT,
- output [2:0] S_AXI_HP2_RACOUNT,
- output [5:0] S_AXI_HP2_WACOUNT,
-
-
- // -- Input
- input S_AXI_HP2_ACLK,
- input S_AXI_HP2_ARVALID,
- input S_AXI_HP2_AWVALID,
- input S_AXI_HP2_BREADY,
- input S_AXI_HP2_RDISSUECAP1_EN,
- input S_AXI_HP2_RREADY,
- input S_AXI_HP2_WLAST,
- input S_AXI_HP2_WRISSUECAP1_EN,
- input S_AXI_HP2_WVALID,
- input [1:0] S_AXI_HP2_ARBURST,
- input [1:0] S_AXI_HP2_ARLOCK,
- input [2:0] S_AXI_HP2_ARSIZE,
- input [1:0] S_AXI_HP2_AWBURST,
- input [1:0] S_AXI_HP2_AWLOCK,
- input [2:0] S_AXI_HP2_AWSIZE,
- input [2:0] S_AXI_HP2_ARPROT,
- input [2:0] S_AXI_HP2_AWPROT,
- input [31:0] S_AXI_HP2_ARADDR,
- input [31:0] S_AXI_HP2_AWADDR,
- input [3:0] S_AXI_HP2_ARCACHE,
- input [3:0] S_AXI_HP2_ARLEN,
- input [3:0] S_AXI_HP2_ARQOS,
- input [3:0] S_AXI_HP2_AWCACHE,
- input [3:0] S_AXI_HP2_AWLEN,
- input [3:0] S_AXI_HP2_AWQOS,
- input [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] S_AXI_HP2_ARID,
- input [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] S_AXI_HP2_AWID,
- input [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] S_AXI_HP2_WID,
- input [(C_S_AXI_HP2_DATA_WIDTH - 1) :0] S_AXI_HP2_WDATA,
- input [((C_S_AXI_HP2_DATA_WIDTH/8)-1):0] S_AXI_HP2_WSTRB,
-
- // S_AXI_HP_3
-
- // -- Output
- output S_AXI_HP3_ARESETN,
- output S_AXI_HP3_ARREADY,
- output S_AXI_HP3_AWREADY,
- output S_AXI_HP3_BVALID,
- output S_AXI_HP3_RLAST,
- output S_AXI_HP3_RVALID,
- output S_AXI_HP3_WREADY,
- output [1:0] S_AXI_HP3_BRESP,
- output [1:0] S_AXI_HP3_RRESP,
- output [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] S_AXI_HP3_BID,
- output [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] S_AXI_HP3_RID,
- output [(C_S_AXI_HP3_DATA_WIDTH - 1) :0] S_AXI_HP3_RDATA,
- output [7:0] S_AXI_HP3_RCOUNT,
- output [7:0] S_AXI_HP3_WCOUNT,
- output [2:0] S_AXI_HP3_RACOUNT,
- output [5:0] S_AXI_HP3_WACOUNT,
-
-
- // -- Input
- input S_AXI_HP3_ACLK,
- input S_AXI_HP3_ARVALID,
- input S_AXI_HP3_AWVALID,
- input S_AXI_HP3_BREADY,
- input S_AXI_HP3_RDISSUECAP1_EN,
- input S_AXI_HP3_RREADY,
- input S_AXI_HP3_WLAST,
- input S_AXI_HP3_WRISSUECAP1_EN,
- input S_AXI_HP3_WVALID,
- input [1:0] S_AXI_HP3_ARBURST,
- input [1:0] S_AXI_HP3_ARLOCK,
- input [2:0] S_AXI_HP3_ARSIZE,
- input [1:0] S_AXI_HP3_AWBURST,
- input [1:0] S_AXI_HP3_AWLOCK,
- input [2:0] S_AXI_HP3_AWSIZE,
- input [2:0] S_AXI_HP3_ARPROT,
- input [2:0] S_AXI_HP3_AWPROT,
- input [31:0] S_AXI_HP3_ARADDR,
- input [31:0] S_AXI_HP3_AWADDR,
- input [3:0] S_AXI_HP3_ARCACHE,
- input [3:0] S_AXI_HP3_ARLEN,
- input [3:0] S_AXI_HP3_ARQOS,
- input [3:0] S_AXI_HP3_AWCACHE,
- input [3:0] S_AXI_HP3_AWLEN,
- input [3:0] S_AXI_HP3_AWQOS,
- input [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] S_AXI_HP3_ARID,
- input [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] S_AXI_HP3_AWID,
- input [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] S_AXI_HP3_WID,
- input [(C_S_AXI_HP3_DATA_WIDTH - 1) :0] S_AXI_HP3_WDATA,
- input [((C_S_AXI_HP3_DATA_WIDTH/8)-1):0] S_AXI_HP3_WSTRB,
-
- //FIO ========================================
-
- //IRQ
- //output [28:0] IRQ_P2F,
- output IRQ_P2F_DMAC_ABORT ,
- output IRQ_P2F_DMAC0,
- output IRQ_P2F_DMAC1,
- output IRQ_P2F_DMAC2,
- output IRQ_P2F_DMAC3,
- output IRQ_P2F_DMAC4,
- output IRQ_P2F_DMAC5,
- output IRQ_P2F_DMAC6,
- output IRQ_P2F_DMAC7,
- output IRQ_P2F_SMC,
- output IRQ_P2F_QSPI,
- output IRQ_P2F_CTI,
- output IRQ_P2F_GPIO,
- output IRQ_P2F_USB0,
- output IRQ_P2F_ENET0,
- output IRQ_P2F_ENET_WAKE0,
- output IRQ_P2F_SDIO0,
- output IRQ_P2F_I2C0,
- output IRQ_P2F_SPI0,
- output IRQ_P2F_UART0,
- output IRQ_P2F_CAN0,
- output IRQ_P2F_USB1,
- output IRQ_P2F_ENET1,
- output IRQ_P2F_ENET_WAKE1,
- output IRQ_P2F_SDIO1,
- output IRQ_P2F_I2C1,
- output IRQ_P2F_SPI1,
- output IRQ_P2F_UART1,
- output IRQ_P2F_CAN1,
- input [(C_NUM_F2P_INTR_INPUTS-1):0] IRQ_F2P,
- input Core0_nFIQ,
- input Core0_nIRQ,
- input Core1_nFIQ,
- input Core1_nIRQ,
-
- //DMA
-
- output [1:0] DMA0_DATYPE,
- output DMA0_DAVALID,
- output DMA0_DRREADY,
- output DMA0_RSTN,
- output [1:0] DMA1_DATYPE,
- output DMA1_DAVALID,
- output DMA1_DRREADY,
- output DMA1_RSTN,
- output [1:0] DMA2_DATYPE,
- output DMA2_DAVALID,
- output DMA2_DRREADY,
- output DMA2_RSTN,
- output [1:0] DMA3_DATYPE,
- output DMA3_DAVALID,
- output DMA3_DRREADY,
- output DMA3_RSTN,
- input DMA0_ACLK,
- input DMA0_DAREADY,
- input DMA0_DRLAST,
- input DMA0_DRVALID,
- input DMA1_ACLK,
- input DMA1_DAREADY,
- input DMA1_DRLAST,
- input DMA1_DRVALID,
- input DMA2_ACLK,
- input DMA2_DAREADY,
- input DMA2_DRLAST,
- input DMA2_DRVALID,
- input DMA3_ACLK,
- input DMA3_DAREADY,
- input DMA3_DRLAST,
- input DMA3_DRVALID,
- input [1:0] DMA0_DRTYPE,
- input [1:0] DMA1_DRTYPE,
- input [1:0] DMA2_DRTYPE,
- input [1:0] DMA3_DRTYPE,
-
- //FCLK
- output FCLK_CLK3,
- output FCLK_CLK2,
- output FCLK_CLK1,
- output FCLK_CLK0,
-
- input FCLK_CLKTRIG3_N,
- input FCLK_CLKTRIG2_N,
- input FCLK_CLKTRIG1_N,
- input FCLK_CLKTRIG0_N,
-
- output FCLK_RESET3_N,
- output FCLK_RESET2_N,
- output FCLK_RESET1_N,
- output FCLK_RESET0_N,
-
- //FTMD
- input [31:0] FTMD_TRACEIN_DATA,
- input FTMD_TRACEIN_VALID,
- input FTMD_TRACEIN_CLK,
- input [3:0] FTMD_TRACEIN_ATID,
-
- //FTMT
- input FTMT_F2P_TRIG_0,
- output FTMT_F2P_TRIGACK_0,
- input FTMT_F2P_TRIG_1,
- output FTMT_F2P_TRIGACK_1,
- input FTMT_F2P_TRIG_2,
- output FTMT_F2P_TRIGACK_2,
- input FTMT_F2P_TRIG_3,
- output FTMT_F2P_TRIGACK_3,
- input [31:0] FTMT_F2P_DEBUG,
- input FTMT_P2F_TRIGACK_0,
- output FTMT_P2F_TRIG_0,
- input FTMT_P2F_TRIGACK_1,
- output FTMT_P2F_TRIG_1,
- input FTMT_P2F_TRIGACK_2,
- output FTMT_P2F_TRIG_2,
- input FTMT_P2F_TRIGACK_3,
- output FTMT_P2F_TRIG_3,
- output [31:0] FTMT_P2F_DEBUG,
-
- //FIDLE
- input FPGA_IDLE_N,
-
- //EVENT
-
- output EVENT_EVENTO,
- output [1:0] EVENT_STANDBYWFE,
- output [1:0] EVENT_STANDBYWFI,
- input EVENT_EVENTI,
-
-
- //DARB
- input [3:0] DDR_ARB,
- inout [C_MIO_PRIMITIVE - 1:0] MIO,
-
- //DDR
- inout DDR_CAS_n, // CASB
- inout DDR_CKE, // CKE
- inout DDR_Clk_n, // CKN
- inout DDR_Clk, // CKP
- inout DDR_CS_n, // CSB
- inout DDR_DRSTB, // DDR_DRSTB
- inout DDR_ODT, // ODT
- inout DDR_RAS_n, // RASB
- inout DDR_WEB,
- inout [2:0] DDR_BankAddr, // BA
- inout [14:0] DDR_Addr, // A
-
- inout DDR_VRN,
- inout DDR_VRP,
- inout [C_DM_WIDTH - 1:0] DDR_DM, // DM
- inout [C_DQ_WIDTH - 1:0] DDR_DQ, // DQ
- inout [C_DQS_WIDTH -1:0] DDR_DQS_n, // DQSN
- inout [C_DQS_WIDTH - 1:0] DDR_DQS, // DQSP
-
- inout PS_SRSTB, // SRSTB
- inout PS_CLK, // CLK
- inout PS_PORB // PORB
-
-
-);
-
-wire [11:0] M_AXI_GP0_AWID_FULL;
-wire [11:0] M_AXI_GP0_WID_FULL;
-wire [11:0] M_AXI_GP0_ARID_FULL;
-
-wire [11:0] M_AXI_GP0_BID_FULL;
-wire [11:0] M_AXI_GP0_RID_FULL;
-
-wire [11:0] M_AXI_GP1_AWID_FULL;
-wire [11:0] M_AXI_GP1_WID_FULL;
-wire [11:0] M_AXI_GP1_ARID_FULL;
-
-wire [11:0] M_AXI_GP1_BID_FULL;
-wire [11:0] M_AXI_GP1_RID_FULL;
-
-wire [3:0] M_AXI_GP0_ARCACHE_t;
-wire [3:0] M_AXI_GP1_ARCACHE_t;
-wire [3:0] M_AXI_GP0_AWCACHE_t;
-wire [3:0] M_AXI_GP1_AWCACHE_t;
-
-
-// Wires for connecting to the PS7
-wire ENET0_GMII_TX_EN_i;
-wire ENET0_GMII_TX_ER_i;
-reg ENET0_GMII_COL_i;
-reg ENET0_GMII_CRS_i;
-reg ENET0_GMII_RX_DV_i;
-reg ENET0_GMII_RX_ER_i;
-reg [7:0] ENET0_GMII_RXD_i;
-wire [7:0] ENET0_GMII_TXD_i;
-
-wire ENET1_GMII_TX_EN_i;
-wire ENET1_GMII_TX_ER_i;
-reg ENET1_GMII_COL_i;
-reg ENET1_GMII_CRS_i;
-reg ENET1_GMII_RX_DV_i;
-reg ENET1_GMII_RX_ER_i;
-reg [7:0] ENET1_GMII_RXD_i;
-wire [7:0] ENET1_GMII_TXD_i;
-
-reg [31:0] FTMD_TRACEIN_DATA_notracebuf;
-reg FTMD_TRACEIN_VALID_notracebuf;
-reg [3:0] FTMD_TRACEIN_ATID_notracebuf;
-
-wire [31:0] FTMD_TRACEIN_DATA_i;
-wire FTMD_TRACEIN_VALID_i;
-wire [3:0] FTMD_TRACEIN_ATID_i;
-
-wire [31:0] FTMD_TRACEIN_DATA_tracebuf;
-wire FTMD_TRACEIN_VALID_tracebuf;
-wire [3:0] FTMD_TRACEIN_ATID_tracebuf;
-
-wire [5:0] S_AXI_GP0_BID_out;
-wire [5:0] S_AXI_GP0_RID_out;
-wire [5:0] S_AXI_GP0_ARID_in;
-wire [5:0] S_AXI_GP0_AWID_in;
-wire [5:0] S_AXI_GP0_WID_in;
-
-wire [5:0] S_AXI_GP1_BID_out;
-wire [5:0] S_AXI_GP1_RID_out;
-wire [5:0] S_AXI_GP1_ARID_in;
-wire [5:0] S_AXI_GP1_AWID_in;
-wire [5:0] S_AXI_GP1_WID_in;
-
-wire [5:0] S_AXI_HP0_BID_out;
-wire [5:0] S_AXI_HP0_RID_out;
-wire [5:0] S_AXI_HP0_ARID_in;
-wire [5:0] S_AXI_HP0_AWID_in;
-wire [5:0] S_AXI_HP0_WID_in;
-
-wire [5:0] S_AXI_HP1_BID_out;
-wire [5:0] S_AXI_HP1_RID_out;
-wire [5:0] S_AXI_HP1_ARID_in;
-wire [5:0] S_AXI_HP1_AWID_in;
-wire [5:0] S_AXI_HP1_WID_in;
-
-wire [5:0] S_AXI_HP2_BID_out;
-wire [5:0] S_AXI_HP2_RID_out;
-wire [5:0] S_AXI_HP2_ARID_in;
-wire [5:0] S_AXI_HP2_AWID_in;
-wire [5:0] S_AXI_HP2_WID_in;
-
-wire [5:0] S_AXI_HP3_BID_out;
-wire [5:0] S_AXI_HP3_RID_out;
-wire [5:0] S_AXI_HP3_ARID_in;
-wire [5:0] S_AXI_HP3_AWID_in;
-wire [5:0] S_AXI_HP3_WID_in;
-
-wire [2:0] S_AXI_ACP_BID_out;
-wire [2:0] S_AXI_ACP_RID_out;
-wire [2:0] S_AXI_ACP_ARID_in;
-wire [2:0] S_AXI_ACP_AWID_in;
-wire [2:0] S_AXI_ACP_WID_in;
-
-wire [63:0] S_AXI_HP0_WDATA_in;
-wire [7:0] S_AXI_HP0_WSTRB_in;
-wire [63:0] S_AXI_HP0_RDATA_out;
-
-wire [63:0] S_AXI_HP1_WDATA_in;
-wire [7:0] S_AXI_HP1_WSTRB_in;
-wire [63:0] S_AXI_HP1_RDATA_out;
-
-wire [63:0] S_AXI_HP2_WDATA_in;
-wire [7:0] S_AXI_HP2_WSTRB_in;
-wire [63:0] S_AXI_HP2_RDATA_out;
-
-wire [63:0] S_AXI_HP3_WDATA_in;
-wire [7:0] S_AXI_HP3_WSTRB_in;
-wire [63:0] S_AXI_HP3_RDATA_out;
-
-wire [1:0] M_AXI_GP0_ARSIZE_i;
-wire [1:0] M_AXI_GP0_AWSIZE_i;
-
-wire [1:0] M_AXI_GP1_ARSIZE_i;
-wire [1:0] M_AXI_GP1_AWSIZE_i;
-
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] SAXIACPBID_W;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] SAXIACPRID_W;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] SAXIACPARID_W;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] SAXIACPAWID_W;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] SAXIACPWID_W;
-
-
-wire SAXIACPARREADY_W;
-wire SAXIACPAWREADY_W;
-wire SAXIACPBVALID_W;
-wire SAXIACPRLAST_W;
-wire SAXIACPRVALID_W;
-wire SAXIACPWREADY_W;
-wire [1:0] SAXIACPBRESP_W;
-wire [1:0] SAXIACPRRESP_W;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ATC_BID;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ATC_RID;
-wire [63:0] SAXIACPRDATA_W;
-
-wire S_AXI_ATC_ARVALID;
-wire S_AXI_ATC_AWVALID;
-wire S_AXI_ATC_BREADY;
-wire S_AXI_ATC_RREADY;
-wire S_AXI_ATC_WLAST;
-wire S_AXI_ATC_WVALID;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ATC_ARID;
-wire [2:0] S_AXI_ATC_ARPROT;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ATC_AWID;
-wire [2:0] S_AXI_ATC_AWPROT;
-wire [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] S_AXI_ATC_WID;
-wire [31:0] S_AXI_ATC_ARADDR;
-wire [31:0] S_AXI_ATC_AWADDR;
-wire [3:0] S_AXI_ATC_ARCACHE;
-wire [3:0] S_AXI_ATC_ARLEN;
-wire [3:0] S_AXI_ATC_ARQOS;
-wire [3:0] S_AXI_ATC_AWCACHE;
-wire [3:0] S_AXI_ATC_AWLEN;
-wire [3:0] S_AXI_ATC_AWQOS;
-wire [1:0] S_AXI_ATC_ARBURST;
-wire [1:0] S_AXI_ATC_ARLOCK;
-wire [2:0] S_AXI_ATC_ARSIZE;
-wire [1:0] S_AXI_ATC_AWBURST;
-wire [1:0] S_AXI_ATC_AWLOCK;
-wire [2:0] S_AXI_ATC_AWSIZE;
-wire [4:0] S_AXI_ATC_ARUSER;
-wire [4:0] S_AXI_ATC_AWUSER;
-wire [63:0] S_AXI_ATC_WDATA;
-wire [7:0] S_AXI_ATC_WSTRB;
-
-
-wire SAXIACPARVALID_W;
-wire SAXIACPAWVALID_W;
-wire SAXIACPBREADY_W;
-wire SAXIACPRREADY_W;
-wire SAXIACPWLAST_W;
-wire SAXIACPWVALID_W;
-wire [2:0] SAXIACPARPROT_W;
-wire [2:0] SAXIACPAWPROT_W;
-wire [31:0] SAXIACPARADDR_W;
-wire [31:0] SAXIACPAWADDR_W;
-wire [3:0] SAXIACPARCACHE_W;
-wire [3:0] SAXIACPARLEN_W;
-wire [3:0] SAXIACPARQOS_W;
-wire [3:0] SAXIACPAWCACHE_W;
-wire [3:0] SAXIACPAWLEN_W;
-wire [3:0] SAXIACPAWQOS_W;
-wire [1:0] SAXIACPARBURST_W;
-wire [1:0] SAXIACPARLOCK_W;
-wire [2:0] SAXIACPARSIZE_W;
-wire [1:0] SAXIACPAWBURST_W;
-wire [1:0] SAXIACPAWLOCK_W;
-wire [2:0] SAXIACPAWSIZE_W;
-wire [4:0] SAXIACPARUSER_W;
-wire [4:0] SAXIACPAWUSER_W;
-wire [63:0] SAXIACPWDATA_W;
-wire [7:0] SAXIACPWSTRB_W;
-
-// AxUSER signal update
-wire [4:0] param_aruser;
-wire [4:0] param_awuser;
-
-// Added to address CR 651751
-wire [3:0] fclk_clktrig_gnd = 4'h0;
-
-
-wire [19:0] irq_f2p_i;
-wire [15:0] irq_f2p_null = 16'h0000;
-
-// EMIO I2C0
-wire I2C0_SDA_T_n;
-wire I2C0_SCL_T_n;
-// EMIO I2C1
-wire I2C1_SDA_T_n;
-wire I2C1_SCL_T_n;
-// EMIO SPI0
-wire SPI0_SCLK_T_n;
-wire SPI0_MOSI_T_n;
-wire SPI0_MISO_T_n;
-wire SPI0_SS_T_n;
-// EMIO SPI1
-wire SPI1_SCLK_T_n;
-wire SPI1_MOSI_T_n;
-wire SPI1_MISO_T_n;
-wire SPI1_SS_T_n;
-
-// EMIO GEM0
-wire ENET0_MDIO_T_n;
-
-// EMIO GEM1
-wire ENET1_MDIO_T_n;
-
-// EMIO GPIO
-wire [(C_EMIO_GPIO_WIDTH-1):0] GPIO_T_n;
-
-wire [63:0] gpio_out_t_n;
-wire [63:0] gpio_out;
-wire [63:0] gpio_in63_0;
-
-//For Clock buffering
-wire [3:0] FCLK_CLK_unbuffered;
-wire [3:0] FCLK_CLK_buffered;
-wire FCLK_CLK0_temp;
-
-// EMIO PJTAG
-wire PJTAG_TDO_O;
-wire PJTAG_TDO_T;
-wire PJTAG_TDO_T_n;
-
-// EMIO SDIO0
-wire SDIO0_CMD_T_n;
-wire [3:0] SDIO0_DATA_T_n;
-
-// EMIO SDIO1
-wire SDIO1_CMD_T_n;
-wire [3:0] SDIO1_DATA_T_n;
-
-// buffered IO
-wire [C_MIO_PRIMITIVE - 1:0] buffered_MIO;
-wire buffered_DDR_WEB;
-wire buffered_DDR_CAS_n;
-wire buffered_DDR_CKE;
-wire buffered_DDR_Clk_n;
-wire buffered_DDR_Clk;
-wire buffered_DDR_CS_n;
-wire buffered_DDR_DRSTB;
-wire buffered_DDR_ODT;
-wire buffered_DDR_RAS_n;
-wire [2:0] buffered_DDR_BankAddr;
-wire [14:0] buffered_DDR_Addr;
-
-wire buffered_DDR_VRN;
-wire buffered_DDR_VRP;
-wire [C_DM_WIDTH - 1:0] buffered_DDR_DM;
-wire [C_DQ_WIDTH - 1:0] buffered_DDR_DQ;
-wire [C_DQS_WIDTH -1:0] buffered_DDR_DQS_n;
-wire [C_DQS_WIDTH - 1:0] buffered_DDR_DQS;
-
-wire buffered_PS_SRSTB;
-wire buffered_PS_CLK;
-wire buffered_PS_PORB;
-
-wire S_AXI_HP0_ACLK_temp;
-wire S_AXI_HP1_ACLK_temp;
-wire S_AXI_HP2_ACLK_temp;
-wire S_AXI_HP3_ACLK_temp;
-wire M_AXI_GP0_ACLK_temp;
-wire M_AXI_GP1_ACLK_temp;
-wire S_AXI_GP0_ACLK_temp;
-wire S_AXI_GP1_ACLK_temp;
-wire S_AXI_ACP_ACLK_temp;
-
-wire [31:0] TRACE_DATA_i;
-wire TRACE_CTL_i;
-(* keep = "true" *) reg TRACE_CTL_PIPE [(C_TRACE_PIPELINE_WIDTH - 1):0];
-(* keep = "true" *) reg [(C_TRACE_INTERNAL_WIDTH)-1:0] TRACE_DATA_PIPE [(C_TRACE_PIPELINE_WIDTH - 1):0];
-
-// fixed CR #665394
-integer j;
-generate
- if (C_EN_EMIO_TRACE == 1) begin
- always @(posedge TRACE_CLK)
- begin
- TRACE_CTL_PIPE[C_TRACE_PIPELINE_WIDTH - 1] <= TRACE_CTL_i;
- TRACE_DATA_PIPE[C_TRACE_PIPELINE_WIDTH - 1] <= TRACE_DATA_i[(C_TRACE_INTERNAL_WIDTH-1):0];
- for (j=(C_TRACE_PIPELINE_WIDTH-1); j>0; j=j-1) begin
- TRACE_CTL_PIPE[j-1] <= TRACE_CTL_PIPE[j];
- TRACE_DATA_PIPE[j-1] <= TRACE_DATA_PIPE[j];
- end
- TRACE_CLK_OUT <= ~TRACE_CLK_OUT;
- end
- end
-else
-begin
-always @*
-begin
-TRACE_CTL_PIPE[C_TRACE_PIPELINE_WIDTH - 1] <= 1'b0;
- TRACE_DATA_PIPE[C_TRACE_PIPELINE_WIDTH - 1] <= 1'b0;
- for (j=(C_TRACE_PIPELINE_WIDTH-1); j>0; j=j-1) begin
- TRACE_CTL_PIPE[j-1] <= 1'b0;
- TRACE_DATA_PIPE[j-1] <= 1'b0;
- end
- TRACE_CLK_OUT <= 1'b0;
- end
-end
-endgenerate
-
-assign TRACE_CTL = TRACE_CTL_PIPE[0];
-
-assign TRACE_DATA = TRACE_DATA_PIPE[0];
-
-//irq_p2f
-
-// Updated IRQ_F2P logic to address CR 641523
-generate
- if(C_NUM_F2P_INTR_INPUTS == 0) begin : irq_f2p_select_null
- assign irq_f2p_i[19:0] = {Core1_nFIQ,Core0_nFIQ,Core1_nIRQ,Core0_nIRQ,irq_f2p_null[15:0]};
- end else if(C_NUM_F2P_INTR_INPUTS == 16) begin : irq_f2p_select_all
- assign irq_f2p_i[19:0] = {Core1_nFIQ,Core0_nFIQ,Core1_nIRQ,Core0_nIRQ,IRQ_F2P[15:0]};
- end else begin : irq_f2p_select
- if (C_IRQ_F2P_MODE == "DIRECT") begin
- assign irq_f2p_i[19:0] = {Core1_nFIQ,Core0_nFIQ,Core1_nIRQ,Core0_nIRQ,
- irq_f2p_null[(15-C_NUM_F2P_INTR_INPUTS):0],
- IRQ_F2P[(C_NUM_F2P_INTR_INPUTS-1):0]};
- end else begin
- assign irq_f2p_i[19:0] = {Core1_nFIQ,Core0_nFIQ,Core1_nIRQ,Core0_nIRQ,
- IRQ_F2P[(C_NUM_F2P_INTR_INPUTS-1):0],
- irq_f2p_null[(15-C_NUM_F2P_INTR_INPUTS):0]};
- end
- end
-endgenerate
-
-assign M_AXI_GP0_ARSIZE[2:0] = {1'b0, M_AXI_GP0_ARSIZE_i[1:0]};
-assign M_AXI_GP0_AWSIZE[2:0] = {1'b0, M_AXI_GP0_AWSIZE_i[1:0]};
-assign M_AXI_GP1_ARSIZE[2:0] = {1'b0, M_AXI_GP1_ARSIZE_i[1:0]};
-assign M_AXI_GP1_AWSIZE[2:0] = {1'b0, M_AXI_GP1_AWSIZE_i[1:0]};
-
-
-
-// Compress Function
-
-
-// Modified as per CR 631955
-//function [11:0] uncompress_id;
-// input [5:0] id;
-// begin
-// case (id[5:0])
-// // dmac0
-// 6'd1 : uncompress_id = 12'b010000_1000_00 ;
-// 6'd2 : uncompress_id = 12'b010000_0000_00 ;
-// 6'd3 : uncompress_id = 12'b010000_0001_00 ;
-// 6'd4 : uncompress_id = 12'b010000_0010_00 ;
-// 6'd5 : uncompress_id = 12'b010000_0011_00 ;
-// 6'd6 : uncompress_id = 12'b010000_0100_00 ;
-// 6'd7 : uncompress_id = 12'b010000_0101_00 ;
-// 6'd8 : uncompress_id = 12'b010000_0110_00 ;
-// 6'd9 : uncompress_id = 12'b010000_0111_00 ;
-// // ioum
-// 6'd10 : uncompress_id = 12'b0100000_000_01 ;
-// 6'd11 : uncompress_id = 12'b0100000_001_01 ;
-// 6'd12 : uncompress_id = 12'b0100000_010_01 ;
-// 6'd13 : uncompress_id = 12'b0100000_011_01 ;
-// 6'd14 : uncompress_id = 12'b0100000_100_01 ;
-// 6'd15 : uncompress_id = 12'b0100000_101_01 ;
-// // devci
-// 6'd16 : uncompress_id = 12'b1000_0000_0000 ;
-// // dap
-// 6'd17 : uncompress_id = 12'b1000_0000_0001 ;
-// // l2m1 (CPU000)
-// 6'd18 : uncompress_id = 12'b11_000_000_00_00 ;
-// 6'd19 : uncompress_id = 12'b11_010_000_00_00 ;
-// 6'd20 : uncompress_id = 12'b11_011_000_00_00 ;
-// 6'd21 : uncompress_id = 12'b11_100_000_00_00 ;
-// 6'd22 : uncompress_id = 12'b11_101_000_00_00 ;
-// 6'd23 : uncompress_id = 12'b11_110_000_00_00 ;
-// 6'd24 : uncompress_id = 12'b11_111_000_00_00 ;
-// // l2m1 (CPU001)
-// 6'd25 : uncompress_id = 12'b11_000_001_00_00 ;
-// 6'd26 : uncompress_id = 12'b11_010_001_00_00 ;
-// 6'd27 : uncompress_id = 12'b11_011_001_00_00 ;
-// 6'd28 : uncompress_id = 12'b11_100_001_00_00 ;
-// 6'd29 : uncompress_id = 12'b11_101_001_00_00 ;
-// 6'd30 : uncompress_id = 12'b11_110_001_00_00 ;
-// 6'd31 : uncompress_id = 12'b11_111_001_00_00 ;
-// // l2m1 (L2CC)
-// 6'd32 : uncompress_id = 12'b11_000_00101_00 ;
-// 6'd33 : uncompress_id = 12'b11_000_01001_00 ;
-// 6'd34 : uncompress_id = 12'b11_000_01101_00 ;
-// 6'd35 : uncompress_id = 12'b11_000_10011_00 ;
-// 6'd36 : uncompress_id = 12'b11_000_10111_00 ;
-// 6'd37 : uncompress_id = 12'b11_000_11011_00 ;
-// 6'd38 : uncompress_id = 12'b11_000_11111_00 ;
-// 6'd39 : uncompress_id = 12'b11_000_00011_00 ;
-// 6'd40 : uncompress_id = 12'b11_000_00111_00 ;
-// 6'd41 : uncompress_id = 12'b11_000_01011_00 ;
-// 6'd42 : uncompress_id = 12'b11_000_01111_00 ;
-// 6'd43 : uncompress_id = 12'b11_000_00001_00 ;
-// // l2m1 (ACP)
-// 6'd44 : uncompress_id = 12'b11_000_10000_00 ;
-// 6'd45 : uncompress_id = 12'b11_001_10000_00 ;
-// 6'd46 : uncompress_id = 12'b11_010_10000_00 ;
-// 6'd47 : uncompress_id = 12'b11_011_10000_00 ;
-// 6'd48 : uncompress_id = 12'b11_100_10000_00 ;
-// 6'd49 : uncompress_id = 12'b11_101_10000_00 ;
-// 6'd50 : uncompress_id = 12'b11_110_10000_00 ;
-// 6'd51 : uncompress_id = 12'b11_111_10000_00 ;
-// default : uncompress_id = ~0;
-// endcase
-// end
-//endfunction
-//
-//function [5:0] compress_id;
-// input [11:0] id;
-// begin
-// case (id[11:0])
-// // dmac0
-// 12'b010000_1000_00 : compress_id = 'd1 ;
-// 12'b010000_0000_00 : compress_id = 'd2 ;
-// 12'b010000_0001_00 : compress_id = 'd3 ;
-// 12'b010000_0010_00 : compress_id = 'd4 ;
-// 12'b010000_0011_00 : compress_id = 'd5 ;
-// 12'b010000_0100_00 : compress_id = 'd6 ;
-// 12'b010000_0101_00 : compress_id = 'd7 ;
-// 12'b010000_0110_00 : compress_id = 'd8 ;
-// 12'b010000_0111_00 : compress_id = 'd9 ;
-// // ioum
-// 12'b0100000_000_01 : compress_id = 'd10 ;
-// 12'b0100000_001_01 : compress_id = 'd11 ;
-// 12'b0100000_010_01 : compress_id = 'd12 ;
-// 12'b0100000_011_01 : compress_id = 'd13 ;
-// 12'b0100000_100_01 : compress_id = 'd14 ;
-// 12'b0100000_101_01 : compress_id = 'd15 ;
-// // devci
-// 12'b1000_0000_0000 : compress_id = 'd16 ;
-// // dap
-// 12'b1000_0000_0001 : compress_id = 'd17 ;
-// // l2m1 (CPU000)
-// 12'b11_000_000_00_00 : compress_id = 'd18 ;
-// 12'b11_010_000_00_00 : compress_id = 'd19 ;
-// 12'b11_011_000_00_00 : compress_id = 'd20 ;
-// 12'b11_100_000_00_00 : compress_id = 'd21 ;
-// 12'b11_101_000_00_00 : compress_id = 'd22 ;
-// 12'b11_110_000_00_00 : compress_id = 'd23 ;
-// 12'b11_111_000_00_00 : compress_id = 'd24 ;
-// // l2m1 (CPU001)
-// 12'b11_000_001_00_00 : compress_id = 'd25 ;
-// 12'b11_010_001_00_00 : compress_id = 'd26 ;
-// 12'b11_011_001_00_00 : compress_id = 'd27 ;
-// 12'b11_100_001_00_00 : compress_id = 'd28 ;
-// 12'b11_101_001_00_00 : compress_id = 'd29 ;
-// 12'b11_110_001_00_00 : compress_id = 'd30 ;
-// 12'b11_111_001_00_00 : compress_id = 'd31 ;
-// // l2m1 (L2CC)
-// 12'b11_000_00101_00 : compress_id = 'd32 ;
-// 12'b11_000_01001_00 : compress_id = 'd33 ;
-// 12'b11_000_01101_00 : compress_id = 'd34 ;
-// 12'b11_000_10011_00 : compress_id = 'd35 ;
-// 12'b11_000_10111_00 : compress_id = 'd36 ;
-// 12'b11_000_11011_00 : compress_id = 'd37 ;
-// 12'b11_000_11111_00 : compress_id = 'd38 ;
-// 12'b11_000_00011_00 : compress_id = 'd39 ;
-// 12'b11_000_00111_00 : compress_id = 'd40 ;
-// 12'b11_000_01011_00 : compress_id = 'd41 ;
-// 12'b11_000_01111_00 : compress_id = 'd42 ;
-// 12'b11_000_00001_00 : compress_id = 'd43 ;
-// // l2m1 (ACP)
-// 12'b11_000_10000_00 : compress_id = 'd44 ;
-// 12'b11_001_10000_00 : compress_id = 'd45 ;
-// 12'b11_010_10000_00 : compress_id = 'd46 ;
-// 12'b11_011_10000_00 : compress_id = 'd47 ;
-// 12'b11_100_10000_00 : compress_id = 'd48 ;
-// 12'b11_101_10000_00 : compress_id = 'd49 ;
-// 12'b11_110_10000_00 : compress_id = 'd50 ;
-// 12'b11_111_10000_00 : compress_id = 'd51 ;
-// default: compress_id = ~0;
-// endcase
-// end
-//endfunction
-
-// Modified as per CR 648393
-
- function [5:0] compress_id;
- input [11:0] id;
- begin
- compress_id[0] = id[7] | (id[4] & id[2]) | (~id[11] & id[2]) | (id[11] & id[0]);
- compress_id[1] = id[8] | id[5] | (~id[11] & id[3]);
- compress_id[2] = id[9] | (id[6] & id[3] & id[2]) | (~id[11] & id[4]);
- compress_id[3] = (id[11] & id[10] & id[4]) | (id[11] & id[10] & id[2]) | (~id[11] & id[10] & ~id[5] & ~id[0]);
- compress_id[4] = (id[11] & id[3]) | (id[10] & id[0]) | (id[11] & id[10] & ~id[2] &~id[6]);
- compress_id[5] = id[11] & id[10] & ~id[3];
- end
- endfunction
-
- function [11:0] uncompress_id;
- input [5:0] id;
- begin
- case (id[5:0])
- // dmac0
- 6'b000_010 : uncompress_id = 12'b010000_1000_00 ;
- 6'b001_000 : uncompress_id = 12'b010000_0000_00 ;
- 6'b001_001 : uncompress_id = 12'b010000_0001_00 ;
- 6'b001_010 : uncompress_id = 12'b010000_0010_00 ;
- 6'b001_011 : uncompress_id = 12'b010000_0011_00 ;
- 6'b001_100 : uncompress_id = 12'b010000_0100_00 ;
- 6'b001_101 : uncompress_id = 12'b010000_0101_00 ;
- 6'b001_110 : uncompress_id = 12'b010000_0110_00 ;
- 6'b001_111 : uncompress_id = 12'b010000_0111_00 ;
- // ioum
- 6'b010_000 : uncompress_id = 12'b0100000_000_01 ;
- 6'b010_001 : uncompress_id = 12'b0100000_001_01 ;
- 6'b010_010 : uncompress_id = 12'b0100000_010_01 ;
- 6'b010_011 : uncompress_id = 12'b0100000_011_01 ;
- 6'b010_100 : uncompress_id = 12'b0100000_100_01 ;
- 6'b010_101 : uncompress_id = 12'b0100000_101_01 ;
- // devci
- 6'b000_000 : uncompress_id = 12'b1000_0000_0000 ;
- // dap
- 6'b000_001 : uncompress_id = 12'b1000_0000_0001 ;
- // l2m1 (CPU000)
- 6'b110_000 : uncompress_id = 12'b11_000_000_00_00 ;
- 6'b110_010 : uncompress_id = 12'b11_010_000_00_00 ;
- 6'b110_011 : uncompress_id = 12'b11_011_000_00_00 ;
- 6'b110_100 : uncompress_id = 12'b11_100_000_00_00 ;
- 6'b110_101 : uncompress_id = 12'b11_101_000_00_00 ;
- 6'b110_110 : uncompress_id = 12'b11_110_000_00_00 ;
- 6'b110_111 : uncompress_id = 12'b11_111_000_00_00 ;
- // l2m1 (CPU001)
- 6'b111_000 : uncompress_id = 12'b11_000_001_00_00 ;
- 6'b111_010 : uncompress_id = 12'b11_010_001_00_00 ;
- 6'b111_011 : uncompress_id = 12'b11_011_001_00_00 ;
- 6'b111_100 : uncompress_id = 12'b11_100_001_00_00 ;
- 6'b111_101 : uncompress_id = 12'b11_101_001_00_00 ;
- 6'b111_110 : uncompress_id = 12'b11_110_001_00_00 ;
- 6'b111_111 : uncompress_id = 12'b11_111_001_00_00 ;
- // l2m1 (L2CC)
- 6'b101_001 : uncompress_id = 12'b11_000_00101_00 ;
- 6'b101_010 : uncompress_id = 12'b11_000_01001_00 ;
- 6'b101_011 : uncompress_id = 12'b11_000_01101_00 ;
- 6'b011_100 : uncompress_id = 12'b11_000_10011_00 ;
- 6'b011_101 : uncompress_id = 12'b11_000_10111_00 ;
- 6'b011_110 : uncompress_id = 12'b11_000_11011_00 ;
- 6'b011_111 : uncompress_id = 12'b11_000_11111_00 ;
- 6'b011_000 : uncompress_id = 12'b11_000_00011_00 ;
- 6'b011_001 : uncompress_id = 12'b11_000_00111_00 ;
- 6'b011_010 : uncompress_id = 12'b11_000_01011_00 ;
- 6'b011_011 : uncompress_id = 12'b11_000_01111_00 ;
- 6'b101_000 : uncompress_id = 12'b11_000_00001_00 ;
- // l2m1 (ACP)
- 6'b100_000 : uncompress_id = 12'b11_000_10000_00 ;
- 6'b100_001 : uncompress_id = 12'b11_001_10000_00 ;
- 6'b100_010 : uncompress_id = 12'b11_010_10000_00 ;
- 6'b100_011 : uncompress_id = 12'b11_011_10000_00 ;
- 6'b100_100 : uncompress_id = 12'b11_100_10000_00 ;
- 6'b100_101 : uncompress_id = 12'b11_101_10000_00 ;
- 6'b100_110 : uncompress_id = 12'b11_110_10000_00 ;
- 6'b100_111 : uncompress_id = 12'b11_111_10000_00 ;
- default : uncompress_id = 12'hx ;
- endcase
- end
- endfunction
-
-
-// Static Remap logic Enablement and Disablement for C_M_AXI0 port
-
- assign M_AXI_GP0_AWID = (C_M_AXI_GP0_ENABLE_STATIC_REMAP == 1) ? compress_id(M_AXI_GP0_AWID_FULL) : M_AXI_GP0_AWID_FULL;
- assign M_AXI_GP0_WID = (C_M_AXI_GP0_ENABLE_STATIC_REMAP == 1) ? compress_id(M_AXI_GP0_WID_FULL) : M_AXI_GP0_WID_FULL;
- assign M_AXI_GP0_ARID = (C_M_AXI_GP0_ENABLE_STATIC_REMAP == 1) ? compress_id(M_AXI_GP0_ARID_FULL) : M_AXI_GP0_ARID_FULL;
- assign M_AXI_GP0_BID_FULL = (C_M_AXI_GP0_ENABLE_STATIC_REMAP == 1) ? uncompress_id(M_AXI_GP0_BID) : M_AXI_GP0_BID;
- assign M_AXI_GP0_RID_FULL = (C_M_AXI_GP0_ENABLE_STATIC_REMAP == 1) ? uncompress_id(M_AXI_GP0_RID) : M_AXI_GP0_RID;
-
- // Static Remap logic Enablement and Disablement for C_M_AXI1 port
-
- assign M_AXI_GP1_AWID = (C_M_AXI_GP1_ENABLE_STATIC_REMAP == 1) ? compress_id(M_AXI_GP1_AWID_FULL) : M_AXI_GP1_AWID_FULL;
- assign M_AXI_GP1_WID = (C_M_AXI_GP1_ENABLE_STATIC_REMAP == 1) ? compress_id(M_AXI_GP1_WID_FULL) : M_AXI_GP1_WID_FULL;
- assign M_AXI_GP1_ARID = (C_M_AXI_GP1_ENABLE_STATIC_REMAP == 1) ? compress_id(M_AXI_GP1_ARID_FULL) : M_AXI_GP1_ARID_FULL;
- assign M_AXI_GP1_BID_FULL = (C_M_AXI_GP1_ENABLE_STATIC_REMAP == 1) ? uncompress_id(M_AXI_GP1_BID) : M_AXI_GP1_BID;
- assign M_AXI_GP1_RID_FULL = (C_M_AXI_GP1_ENABLE_STATIC_REMAP == 1) ? uncompress_id(M_AXI_GP1_RID) : M_AXI_GP1_RID;
-
-
-//// Compress_id and uncompress_id has been removed to address CR 642527
-//// AXI interconnect v1.05.a and beyond implements dynamic ID compression/decompression.
-// assign M_AXI_GP0_AWID = M_AXI_GP0_AWID_FULL;
-// assign M_AXI_GP0_WID = M_AXI_GP0_WID_FULL;
-// assign M_AXI_GP0_ARID = M_AXI_GP0_ARID_FULL;
-// assign M_AXI_GP0_BID_FULL = M_AXI_GP0_BID;
-// assign M_AXI_GP0_RID_FULL = M_AXI_GP0_RID;
-//
-// assign M_AXI_GP1_AWID = M_AXI_GP1_AWID_FULL;
-// assign M_AXI_GP1_WID = M_AXI_GP1_WID_FULL;
-// assign M_AXI_GP1_ARID = M_AXI_GP1_ARID_FULL;
-// assign M_AXI_GP1_BID_FULL = M_AXI_GP1_BID;
-// assign M_AXI_GP1_RID_FULL = M_AXI_GP1_RID;
-
-
-// Pipeline Stage for ENET0
-
-generate
- if (C_EN_EMIO_ENET0 == 1) begin
- always @(posedge ENET0_GMII_TX_CLK)
- begin
- ENET0_GMII_TXD <= ENET0_GMII_TXD_i;
- ENET0_GMII_TX_EN <= ENET0_GMII_TX_EN_i; //1'b0; //ENET0_GMII_TX_EN_i;
- ENET0_GMII_TX_ER <= ENET0_GMII_TX_ER_i; //1'b0;//ENET0_GMII_TX_ER_i;
- ENET0_GMII_COL_i <= ENET0_GMII_COL;
- ENET0_GMII_CRS_i <= ENET0_GMII_CRS;
- end
- end
- else
- always@*
- begin
- ENET0_GMII_TXD <= 'b0;//ENET0_GMII_TXD_i;
- ENET0_GMII_TX_EN <= 'b0;//ENET0_GMII_TX_EN_i; //1'b0; //ENET0_GMII_TX_EN_i;
- ENET0_GMII_TX_ER <= 'b0;//ENET0_GMII_TX_ER_i; //1'b0;//ENET0_GMII_TX_ER_i;
- ENET0_GMII_COL_i <= 'b0;
- ENET0_GMII_CRS_i <= 'b0;
- end
-endgenerate
-
-generate
- if (C_EN_EMIO_ENET0 == 1) begin
- always @(posedge ENET0_GMII_RX_CLK)
- begin
- ENET0_GMII_RXD_i <= ENET0_GMII_RXD;
- ENET0_GMII_RX_DV_i <= ENET0_GMII_RX_DV;
- ENET0_GMII_RX_ER_i <= ENET0_GMII_RX_ER;
- end
- end
- else
- begin
- always @*
- begin
- ENET0_GMII_RXD_i <= 0;
- ENET0_GMII_RX_DV_i <= 0;
- ENET0_GMII_RX_ER_i <= 0;
- end
- end
-endgenerate
-
-// Pipeline Stage for ENET1
-
-generate
- if (C_EN_EMIO_ENET1 == 1) begin
- always @(posedge ENET1_GMII_TX_CLK)
- begin
- ENET1_GMII_TXD <= ENET1_GMII_TXD_i;
- ENET1_GMII_TX_EN <= ENET1_GMII_TX_EN_i;
- ENET1_GMII_TX_ER <= ENET1_GMII_TX_ER_i;
- ENET1_GMII_COL_i <= ENET1_GMII_COL;
- ENET1_GMII_CRS_i <= ENET1_GMII_CRS;
- end
- end
- else
- begin
- always@*
- begin
- ENET1_GMII_TXD <= 'b0;//ENET0_GMII_TXD_i;
- ENET1_GMII_TX_EN <= 'b0;//ENET0_GMII_TX_EN_i; //1'b0; //ENET0_GMII_TX_EN_i;
- ENET1_GMII_TX_ER <= 'b0;//ENET0_GMII_TX_ER_i; //1'b0;//ENET0_GMII_TX_ER_i;
- ENET1_GMII_COL_i <= 0;
- ENET1_GMII_CRS_i <= 0;
- end
- end
-endgenerate
-
-generate
- if (C_EN_EMIO_ENET1 == 1) begin
- always @(posedge ENET1_GMII_RX_CLK)
- begin
- ENET1_GMII_RXD_i <= ENET1_GMII_RXD;
- ENET1_GMII_RX_DV_i <= ENET1_GMII_RX_DV;
- ENET1_GMII_RX_ER_i <= ENET1_GMII_RX_ER;
- end
- end
-else
- begin
- always @*
- begin
- ENET1_GMII_RXD_i <= 'b0;
- ENET1_GMII_RX_DV_i <= 'b0;
- ENET1_GMII_RX_ER_i <= 'b0;
- end
- end
-endgenerate
-
-// Trace buffer instantiated when C_INCLUDE_TRACE_BUFFER is 1.
-
-generate
- if (C_EN_EMIO_TRACE == 1) begin
- if (C_INCLUDE_TRACE_BUFFER == 0) begin : gen_no_trace_buffer
-
- // Pipeline Stage for Traceport ATID
- always @(posedge FTMD_TRACEIN_CLK)
- begin
- FTMD_TRACEIN_DATA_notracebuf <= FTMD_TRACEIN_DATA;
- FTMD_TRACEIN_VALID_notracebuf <= FTMD_TRACEIN_VALID;
- FTMD_TRACEIN_ATID_notracebuf <= FTMD_TRACEIN_ATID;
- end
-
- assign FTMD_TRACEIN_DATA_i = FTMD_TRACEIN_DATA_notracebuf;
- assign FTMD_TRACEIN_VALID_i = FTMD_TRACEIN_VALID_notracebuf;
- assign FTMD_TRACEIN_ATID_i = FTMD_TRACEIN_ATID_notracebuf;
-
- end else begin : gen_trace_buffer
-
- processing_system7_v5_5_trace_buffer #(.FIFO_SIZE (C_TRACE_BUFFER_FIFO_SIZE),
- .USE_TRACE_DATA_EDGE_DETECTOR(USE_TRACE_DATA_EDGE_DETECTOR),
- .C_DELAY_CLKS(C_TRACE_BUFFER_CLOCK_DELAY)
- )
- trace_buffer_i (
- .TRACE_CLK(FTMD_TRACEIN_CLK),
- .RST(~FCLK_RESET0_N),
- .TRACE_VALID_IN(FTMD_TRACEIN_VALID),
- .TRACE_DATA_IN(FTMD_TRACEIN_DATA),
- .TRACE_ATID_IN(FTMD_TRACEIN_ATID),
- .TRACE_ATID_OUT(FTMD_TRACEIN_ATID_tracebuf),
- .TRACE_VALID_OUT(FTMD_TRACEIN_VALID_tracebuf),
- .TRACE_DATA_OUT(FTMD_TRACEIN_DATA_tracebuf)
- );
-
- assign FTMD_TRACEIN_DATA_i = FTMD_TRACEIN_DATA_tracebuf;
- assign FTMD_TRACEIN_VALID_i = FTMD_TRACEIN_VALID_tracebuf;
- assign FTMD_TRACEIN_ATID_i = FTMD_TRACEIN_ATID_tracebuf;
-
- end
- end
- else
- begin
- assign FTMD_TRACEIN_DATA_i = 1'b0;
- assign FTMD_TRACEIN_VALID_i = 1'b0;
- assign FTMD_TRACEIN_ATID_i = 1'b0;
- end
-endgenerate
-
-
- // ID Width Control on AXI Slave ports
- // S_AXI_GP0
-
- function [5:0] id_in_gp0;
- input [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] axi_id_gp0_in;
- begin
- case (C_S_AXI_GP0_ID_WIDTH)
- 1: id_in_gp0 = {5'b0, axi_id_gp0_in};
- 2: id_in_gp0 = {4'b0, axi_id_gp0_in};
- 3: id_in_gp0 = {3'b0, axi_id_gp0_in};
- 4: id_in_gp0 = {2'b0, axi_id_gp0_in};
- 5: id_in_gp0 = {1'b0, axi_id_gp0_in};
- 6: id_in_gp0 = axi_id_gp0_in;
- default : id_in_gp0 = axi_id_gp0_in;
- endcase
- end
- endfunction
-
- assign S_AXI_GP0_ARID_in = id_in_gp0(S_AXI_GP0_ARID);
- assign S_AXI_GP0_AWID_in = id_in_gp0(S_AXI_GP0_AWID);
- assign S_AXI_GP0_WID_in = id_in_gp0(S_AXI_GP0_WID);
-
- function [5:0] id_out_gp0;
- input [(C_S_AXI_GP0_ID_WIDTH - 1) : 0] axi_id_gp0_out;
- begin
- case (C_S_AXI_GP0_ID_WIDTH)
- 1: id_out_gp0 = axi_id_gp0_out[0];
- 2: id_out_gp0 = axi_id_gp0_out[1:0];
- 3: id_out_gp0 = axi_id_gp0_out[2:0];
- 4: id_out_gp0 = axi_id_gp0_out[3:0];
- 5: id_out_gp0 = axi_id_gp0_out[4:0];
- 6: id_out_gp0 = axi_id_gp0_out;
- default : id_out_gp0 = axi_id_gp0_out;
- endcase
- end
- endfunction
-
- assign S_AXI_GP0_BID = id_out_gp0(S_AXI_GP0_BID_out);
- assign S_AXI_GP0_RID = id_out_gp0(S_AXI_GP0_RID_out);
-
- // S_AXI_GP1
-
- function [5:0] id_in_gp1;
- input [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] axi_id_gp1_in;
- begin
- case (C_S_AXI_GP1_ID_WIDTH)
- 1: id_in_gp1 = {5'b0, axi_id_gp1_in};
- 2: id_in_gp1 = {4'b0, axi_id_gp1_in};
- 3: id_in_gp1 = {3'b0, axi_id_gp1_in};
- 4: id_in_gp1 = {2'b0, axi_id_gp1_in};
- 5: id_in_gp1 = {1'b0, axi_id_gp1_in};
- 6: id_in_gp1 = axi_id_gp1_in;
- default : id_in_gp1 = axi_id_gp1_in;
- endcase
- end
- endfunction
-
- assign S_AXI_GP1_ARID_in = id_in_gp1(S_AXI_GP1_ARID);
- assign S_AXI_GP1_AWID_in = id_in_gp1(S_AXI_GP1_AWID);
- assign S_AXI_GP1_WID_in = id_in_gp1(S_AXI_GP1_WID);
-
- function [5:0] id_out_gp1;
- input [(C_S_AXI_GP1_ID_WIDTH - 1) : 0] axi_id_gp1_out;
- begin
- case (C_S_AXI_GP1_ID_WIDTH)
- 1: id_out_gp1 = axi_id_gp1_out[0];
- 2: id_out_gp1 = axi_id_gp1_out[1:0];
- 3: id_out_gp1 = axi_id_gp1_out[2:0];
- 4: id_out_gp1 = axi_id_gp1_out[3:0];
- 5: id_out_gp1 = axi_id_gp1_out[4:0];
- 6: id_out_gp1 = axi_id_gp1_out;
- default : id_out_gp1 = axi_id_gp1_out;
- endcase
- end
- endfunction
-
- assign S_AXI_GP1_BID = id_out_gp1(S_AXI_GP1_BID_out);
- assign S_AXI_GP1_RID = id_out_gp1(S_AXI_GP1_RID_out);
-
-// S_AXI_HP0
-
- function [5:0] id_in_hp0;
- input [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] axi_id_hp0_in;
- begin
- case (C_S_AXI_HP0_ID_WIDTH)
- 1: id_in_hp0 = {5'b0, axi_id_hp0_in};
- 2: id_in_hp0 = {4'b0, axi_id_hp0_in};
- 3: id_in_hp0 = {3'b0, axi_id_hp0_in};
- 4: id_in_hp0 = {2'b0, axi_id_hp0_in};
- 5: id_in_hp0 = {1'b0, axi_id_hp0_in};
- 6: id_in_hp0 = axi_id_hp0_in;
- default : id_in_hp0 = axi_id_hp0_in;
- endcase
- end
- endfunction
-
- assign S_AXI_HP0_ARID_in = id_in_hp0(S_AXI_HP0_ARID);
- assign S_AXI_HP0_AWID_in = id_in_hp0(S_AXI_HP0_AWID);
- assign S_AXI_HP0_WID_in = id_in_hp0(S_AXI_HP0_WID);
-
- function [5:0] id_out_hp0;
- input [(C_S_AXI_HP0_ID_WIDTH - 1) : 0] axi_id_hp0_out;
- begin
- case (C_S_AXI_HP0_ID_WIDTH)
- 1: id_out_hp0 = axi_id_hp0_out[0];
- 2: id_out_hp0 = axi_id_hp0_out[1:0];
- 3: id_out_hp0 = axi_id_hp0_out[2:0];
- 4: id_out_hp0 = axi_id_hp0_out[3:0];
- 5: id_out_hp0 = axi_id_hp0_out[4:0];
- 6: id_out_hp0 = axi_id_hp0_out;
- default : id_out_hp0 = axi_id_hp0_out;
- endcase
- end
- endfunction
-
- assign S_AXI_HP0_BID = id_out_hp0(S_AXI_HP0_BID_out);
- assign S_AXI_HP0_RID = id_out_hp0(S_AXI_HP0_RID_out);
-
- assign S_AXI_HP0_WDATA_in = (C_S_AXI_HP0_DATA_WIDTH == 64) ? S_AXI_HP0_WDATA : {32'b0,S_AXI_HP0_WDATA};
- assign S_AXI_HP0_WSTRB_in = (C_S_AXI_HP0_DATA_WIDTH == 64) ? S_AXI_HP0_WSTRB : {4'b0,S_AXI_HP0_WSTRB};
- assign S_AXI_HP0_RDATA = (C_S_AXI_HP0_DATA_WIDTH == 64) ? S_AXI_HP0_RDATA_out : S_AXI_HP0_RDATA_out[31:0];
-
-// S_AXI_HP1
-
- function [5:0] id_in_hp1;
- input [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] axi_id_hp1_in;
- begin
- case (C_S_AXI_HP1_ID_WIDTH)
- 1: id_in_hp1 = {5'b0, axi_id_hp1_in};
- 2: id_in_hp1 = {4'b0, axi_id_hp1_in};
- 3: id_in_hp1 = {3'b0, axi_id_hp1_in};
- 4: id_in_hp1 = {2'b0, axi_id_hp1_in};
- 5: id_in_hp1 = {1'b0, axi_id_hp1_in};
- 6: id_in_hp1 = axi_id_hp1_in;
- default : id_in_hp1 = axi_id_hp1_in;
- endcase
- end
- endfunction
-
-
-
- assign S_AXI_HP1_ARID_in = id_in_hp1(S_AXI_HP1_ARID);
- assign S_AXI_HP1_AWID_in = id_in_hp1(S_AXI_HP1_AWID);
- assign S_AXI_HP1_WID_in = id_in_hp1(S_AXI_HP1_WID);
-
- function [5:0] id_out_hp1;
- input [(C_S_AXI_HP1_ID_WIDTH - 1) : 0] axi_id_hp1_out;
- begin
- case (C_S_AXI_HP1_ID_WIDTH)
- 1: id_out_hp1 = axi_id_hp1_out[0];
- 2: id_out_hp1 = axi_id_hp1_out[1:0];
- 3: id_out_hp1 = axi_id_hp1_out[2:0];
- 4: id_out_hp1 = axi_id_hp1_out[3:0];
- 5: id_out_hp1 = axi_id_hp1_out[4:0];
- 6: id_out_hp1 = axi_id_hp1_out;
- default : id_out_hp1 = axi_id_hp1_out;
- endcase
- end
- endfunction
-
- assign S_AXI_HP1_BID = id_out_hp1(S_AXI_HP1_BID_out);
- assign S_AXI_HP1_RID = id_out_hp1(S_AXI_HP1_RID_out);
-
- assign S_AXI_HP1_WDATA_in = (C_S_AXI_HP1_DATA_WIDTH == 64) ? S_AXI_HP1_WDATA : {32'b0,S_AXI_HP1_WDATA};
- assign S_AXI_HP1_WSTRB_in = (C_S_AXI_HP1_DATA_WIDTH == 64) ? S_AXI_HP1_WSTRB : {4'b0,S_AXI_HP1_WSTRB};
- assign S_AXI_HP1_RDATA = (C_S_AXI_HP1_DATA_WIDTH == 64) ? S_AXI_HP1_RDATA_out : S_AXI_HP1_RDATA_out[31:0];
-
-
-// S_AXI_HP2
-
- function [5:0] id_in_hp2;
- input [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] axi_id_hp2_in;
- begin
- case (C_S_AXI_HP2_ID_WIDTH)
- 1: id_in_hp2 = {5'b0, axi_id_hp2_in};
- 2: id_in_hp2 = {4'b0, axi_id_hp2_in};
- 3: id_in_hp2 = {3'b0, axi_id_hp2_in};
- 4: id_in_hp2 = {2'b0, axi_id_hp2_in};
- 5: id_in_hp2 = {1'b0, axi_id_hp2_in};
- 6: id_in_hp2 = axi_id_hp2_in;
- default : id_in_hp2 = axi_id_hp2_in;
- endcase
- end
- endfunction
-
- assign S_AXI_HP2_ARID_in = id_in_hp2(S_AXI_HP2_ARID);
- assign S_AXI_HP2_AWID_in = id_in_hp2(S_AXI_HP2_AWID);
- assign S_AXI_HP2_WID_in = id_in_hp2(S_AXI_HP2_WID);
-
-
- function [5:0] id_out_hp2;
- input [(C_S_AXI_HP2_ID_WIDTH - 1) : 0] axi_id_hp2_out;
- begin
- case (C_S_AXI_HP2_ID_WIDTH)
- 1: id_out_hp2 = axi_id_hp2_out[0];
- 2: id_out_hp2 = axi_id_hp2_out[1:0];
- 3: id_out_hp2 = axi_id_hp2_out[2:0];
- 4: id_out_hp2 = axi_id_hp2_out[3:0];
- 5: id_out_hp2 = axi_id_hp2_out[4:0];
- 6: id_out_hp2 = axi_id_hp2_out;
- default : id_out_hp2 = axi_id_hp2_out;
- endcase
- end
- endfunction
-
- assign S_AXI_HP2_BID = id_out_hp2(S_AXI_HP2_BID_out);
- assign S_AXI_HP2_RID = id_out_hp2(S_AXI_HP2_RID_out);
-
- assign S_AXI_HP2_WDATA_in = (C_S_AXI_HP2_DATA_WIDTH == 64) ? S_AXI_HP2_WDATA : {32'b0,S_AXI_HP2_WDATA};
- assign S_AXI_HP2_WSTRB_in = (C_S_AXI_HP2_DATA_WIDTH == 64) ? S_AXI_HP2_WSTRB : {4'b0,S_AXI_HP2_WSTRB};
- assign S_AXI_HP2_RDATA = (C_S_AXI_HP2_DATA_WIDTH == 64) ? S_AXI_HP2_RDATA_out : S_AXI_HP2_RDATA_out[31:0];
-
-
-// S_AXI_HP3
-
- function [5:0] id_in_hp3;
- input [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] axi_id_hp3_in;
- begin
- case (C_S_AXI_HP3_ID_WIDTH)
- 1: id_in_hp3 = {5'b0, axi_id_hp3_in};
- 2: id_in_hp3 = {4'b0, axi_id_hp3_in};
- 3: id_in_hp3 = {3'b0, axi_id_hp3_in};
- 4: id_in_hp3 = {2'b0, axi_id_hp3_in};
- 5: id_in_hp3 = {1'b0, axi_id_hp3_in};
- 6: id_in_hp3 = axi_id_hp3_in;
- default : id_in_hp3 = axi_id_hp3_in;
- endcase
- end
- endfunction
-
- assign S_AXI_HP3_ARID_in = id_in_hp3(S_AXI_HP3_ARID);
- assign S_AXI_HP3_AWID_in = id_in_hp3(S_AXI_HP3_AWID);
- assign S_AXI_HP3_WID_in = id_in_hp3(S_AXI_HP3_WID);
-
-
-
- function [5:0] id_out_hp3;
- input [(C_S_AXI_HP3_ID_WIDTH - 1) : 0] axi_id_hp3_out;
- begin
- case (C_S_AXI_HP3_ID_WIDTH)
- 1: id_out_hp3 = axi_id_hp3_out[0];
- 2: id_out_hp3 = axi_id_hp3_out[1:0];
- 3: id_out_hp3 = axi_id_hp3_out[2:0];
- 4: id_out_hp3 = axi_id_hp3_out[3:0];
- 5: id_out_hp3 = axi_id_hp3_out[4:0];
- 6: id_out_hp3 = axi_id_hp3_out;
- default : id_out_hp3 = axi_id_hp3_out;
- endcase
- end
- endfunction
-
- assign S_AXI_HP3_BID = id_out_hp3(S_AXI_HP3_BID_out);
- assign S_AXI_HP3_RID = id_out_hp3(S_AXI_HP3_RID_out);
-
- assign S_AXI_HP3_WDATA_in = (C_S_AXI_HP3_DATA_WIDTH == 64) ? S_AXI_HP3_WDATA : {32'b0,S_AXI_HP3_WDATA};
- assign S_AXI_HP3_WSTRB_in = (C_S_AXI_HP3_DATA_WIDTH == 64) ? S_AXI_HP3_WSTRB : {4'b0,S_AXI_HP3_WSTRB};
- assign S_AXI_HP3_RDATA = (C_S_AXI_HP3_DATA_WIDTH == 64) ? S_AXI_HP3_RDATA_out : S_AXI_HP3_RDATA_out[31:0];
-
-
-// S_AXI_ACP
-
- function [2:0] id_in_acp;
- input [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] axi_id_acp_in;
- begin
- case (C_S_AXI_ACP_ID_WIDTH)
- 1: id_in_acp = {2'b0, axi_id_acp_in};
- 2: id_in_acp = {1'b0, axi_id_acp_in};
- 3: id_in_acp = axi_id_acp_in;
- default : id_in_acp = axi_id_acp_in;
- endcase
- end
- endfunction
-
- assign S_AXI_ACP_ARID_in = id_in_acp(SAXIACPARID_W);
- assign S_AXI_ACP_AWID_in = id_in_acp(SAXIACPAWID_W);
- assign S_AXI_ACP_WID_in = id_in_acp(SAXIACPWID_W);
-
- function [2:0] id_out_acp;
- input [(C_S_AXI_ACP_ID_WIDTH - 1) : 0] axi_id_acp_out;
- begin
- case (C_S_AXI_ACP_ID_WIDTH)
- 1: id_out_acp = axi_id_acp_out[0];
- 2: id_out_acp = axi_id_acp_out[1:0];
- 3: id_out_acp = axi_id_acp_out;
- default : id_out_acp = axi_id_acp_out;
- endcase
- end
- endfunction
-
- assign SAXIACPBID_W = id_out_acp(S_AXI_ACP_BID_out);
- assign SAXIACPRID_W = id_out_acp(S_AXI_ACP_RID_out);
-
-// FMIO Tristate Inversion logic
-
-//FMIO I2C0
-assign I2C0_SDA_T = ~ I2C0_SDA_T_n;
-assign I2C0_SCL_T = ~ I2C0_SCL_T_n;
-//FMIO I2C1
-assign I2C1_SDA_T = ~ I2C1_SDA_T_n;
-assign I2C1_SCL_T = ~ I2C1_SCL_T_n;
-//FMIO SPI0
-assign SPI0_SCLK_T = ~ SPI0_SCLK_T_n;
-assign SPI0_MOSI_T = ~ SPI0_MOSI_T_n;
-assign SPI0_MISO_T = ~ SPI0_MISO_T_n;
-assign SPI0_SS_T = ~ SPI0_SS_T_n;
-//FMIO SPI1
-assign SPI1_SCLK_T = ~ SPI1_SCLK_T_n;
-assign SPI1_MOSI_T = ~ SPI1_MOSI_T_n;
-assign SPI1_MISO_T = ~ SPI1_MISO_T_n;
-assign SPI1_SS_T = ~ SPI1_SS_T_n;
-
-
-
-// EMIO GEM0 MDIO
-assign ENET0_MDIO_T = ~ ENET0_MDIO_T_n;
-
-// EMIO GEM1 MDIO
-assign ENET1_MDIO_T = ~ ENET1_MDIO_T_n;
-
-// EMIO GPIO
-assign GPIO_T = ~ GPIO_T_n;
-
-// EMIO GPIO Width Control
-
- function [63:0] gpio_width_adjust_in;
- input [(C_EMIO_GPIO_WIDTH - 1) : 0] gpio_in;
- begin
- case (C_EMIO_GPIO_WIDTH)
- 1: gpio_width_adjust_in = {63'b0, gpio_in};
- 2: gpio_width_adjust_in = {62'b0, gpio_in};
- 3: gpio_width_adjust_in = {61'b0, gpio_in};
- 4: gpio_width_adjust_in = {60'b0, gpio_in};
- 5: gpio_width_adjust_in = {59'b0, gpio_in};
- 6: gpio_width_adjust_in = {58'b0, gpio_in};
- 7: gpio_width_adjust_in = {57'b0, gpio_in};
- 8: gpio_width_adjust_in = {56'b0, gpio_in};
- 9: gpio_width_adjust_in = {55'b0, gpio_in};
- 10: gpio_width_adjust_in = {54'b0, gpio_in};
- 11: gpio_width_adjust_in = {53'b0, gpio_in};
- 12: gpio_width_adjust_in = {52'b0, gpio_in};
- 13: gpio_width_adjust_in = {51'b0, gpio_in};
- 14: gpio_width_adjust_in = {50'b0, gpio_in};
- 15: gpio_width_adjust_in = {49'b0, gpio_in};
- 16: gpio_width_adjust_in = {48'b0, gpio_in};
- 17: gpio_width_adjust_in = {47'b0, gpio_in};
- 18: gpio_width_adjust_in = {46'b0, gpio_in};
- 19: gpio_width_adjust_in = {45'b0, gpio_in};
- 20: gpio_width_adjust_in = {44'b0, gpio_in};
- 21: gpio_width_adjust_in = {43'b0, gpio_in};
- 22: gpio_width_adjust_in = {42'b0, gpio_in};
- 23: gpio_width_adjust_in = {41'b0, gpio_in};
- 24: gpio_width_adjust_in = {40'b0, gpio_in};
- 25: gpio_width_adjust_in = {39'b0, gpio_in};
- 26: gpio_width_adjust_in = {38'b0, gpio_in};
- 27: gpio_width_adjust_in = {37'b0, gpio_in};
- 28: gpio_width_adjust_in = {36'b0, gpio_in};
- 29: gpio_width_adjust_in = {35'b0, gpio_in};
- 30: gpio_width_adjust_in = {34'b0, gpio_in};
- 31: gpio_width_adjust_in = {33'b0, gpio_in};
- 32: gpio_width_adjust_in = {32'b0, gpio_in};
- 33: gpio_width_adjust_in = {31'b0, gpio_in};
- 34: gpio_width_adjust_in = {30'b0, gpio_in};
- 35: gpio_width_adjust_in = {29'b0, gpio_in};
- 36: gpio_width_adjust_in = {28'b0, gpio_in};
- 37: gpio_width_adjust_in = {27'b0, gpio_in};
- 38: gpio_width_adjust_in = {26'b0, gpio_in};
- 39: gpio_width_adjust_in = {25'b0, gpio_in};
- 40: gpio_width_adjust_in = {24'b0, gpio_in};
- 41: gpio_width_adjust_in = {23'b0, gpio_in};
- 42: gpio_width_adjust_in = {22'b0, gpio_in};
- 43: gpio_width_adjust_in = {21'b0, gpio_in};
- 44: gpio_width_adjust_in = {20'b0, gpio_in};
- 45: gpio_width_adjust_in = {19'b0, gpio_in};
- 46: gpio_width_adjust_in = {18'b0, gpio_in};
- 47: gpio_width_adjust_in = {17'b0, gpio_in};
- 48: gpio_width_adjust_in = {16'b0, gpio_in};
- 49: gpio_width_adjust_in = {15'b0, gpio_in};
- 50: gpio_width_adjust_in = {14'b0, gpio_in};
- 51: gpio_width_adjust_in = {13'b0, gpio_in};
- 52: gpio_width_adjust_in = {12'b0, gpio_in};
- 53: gpio_width_adjust_in = {11'b0, gpio_in};
- 54: gpio_width_adjust_in = {10'b0, gpio_in};
- 55: gpio_width_adjust_in = {9'b0, gpio_in};
- 56: gpio_width_adjust_in = {8'b0, gpio_in};
- 57: gpio_width_adjust_in = {7'b0, gpio_in};
- 58: gpio_width_adjust_in = {6'b0, gpio_in};
- 59: gpio_width_adjust_in = {5'b0, gpio_in};
- 60: gpio_width_adjust_in = {4'b0, gpio_in};
- 61: gpio_width_adjust_in = {3'b0, gpio_in};
- 62: gpio_width_adjust_in = {2'b0, gpio_in};
- 63: gpio_width_adjust_in = {1'b0, gpio_in};
- 64: gpio_width_adjust_in = gpio_in;
- default : gpio_width_adjust_in = gpio_in;
- endcase
- end
- endfunction
-
- assign gpio_in63_0 = gpio_width_adjust_in(GPIO_I);
-
-
- function [63:0] gpio_width_adjust_out;
- input [(C_EMIO_GPIO_WIDTH - 1) : 0] gpio_o;
- begin
- case (C_EMIO_GPIO_WIDTH)
- 1: gpio_width_adjust_out = gpio_o[0];
- 2: gpio_width_adjust_out = gpio_o[1:0];
- 3: gpio_width_adjust_out = gpio_o[2:0];
- 4: gpio_width_adjust_out = gpio_o[3:0];
- 5: gpio_width_adjust_out = gpio_o[4:0];
- 6: gpio_width_adjust_out = gpio_o[5:0];
- 7: gpio_width_adjust_out = gpio_o[6:0];
- 8: gpio_width_adjust_out = gpio_o[7:0];
- 9: gpio_width_adjust_out = gpio_o[8:0];
- 10: gpio_width_adjust_out = gpio_o[9:0];
- 11: gpio_width_adjust_out = gpio_o[10:0];
- 12: gpio_width_adjust_out = gpio_o[11:0];
- 13: gpio_width_adjust_out = gpio_o[12:0];
- 14: gpio_width_adjust_out = gpio_o[13:0];
- 15: gpio_width_adjust_out = gpio_o[14:0];
- 16: gpio_width_adjust_out = gpio_o[15:0];
- 17: gpio_width_adjust_out = gpio_o[16:0];
- 18: gpio_width_adjust_out = gpio_o[17:0];
- 19: gpio_width_adjust_out = gpio_o[18:0];
- 20: gpio_width_adjust_out = gpio_o[19:0];
- 21: gpio_width_adjust_out = gpio_o[20:0];
- 22: gpio_width_adjust_out = gpio_o[21:0];
- 23: gpio_width_adjust_out = gpio_o[22:0];
- 24: gpio_width_adjust_out = gpio_o[23:0];
- 25: gpio_width_adjust_out = gpio_o[24:0];
- 26: gpio_width_adjust_out = gpio_o[25:0];
- 27: gpio_width_adjust_out = gpio_o[26:0];
- 28: gpio_width_adjust_out = gpio_o[27:0];
- 29: gpio_width_adjust_out = gpio_o[28:0];
- 30: gpio_width_adjust_out = gpio_o[29:0];
- 31: gpio_width_adjust_out = gpio_o[30:0];
- 32: gpio_width_adjust_out = gpio_o[31:0];
- 33: gpio_width_adjust_out = gpio_o[32:0];
- 34: gpio_width_adjust_out = gpio_o[33:0];
- 35: gpio_width_adjust_out = gpio_o[34:0];
- 36: gpio_width_adjust_out = gpio_o[35:0];
- 37: gpio_width_adjust_out = gpio_o[36:0];
- 38: gpio_width_adjust_out = gpio_o[37:0];
- 39: gpio_width_adjust_out = gpio_o[38:0];
- 40: gpio_width_adjust_out = gpio_o[39:0];
- 41: gpio_width_adjust_out = gpio_o[40:0];
- 42: gpio_width_adjust_out = gpio_o[41:0];
- 43: gpio_width_adjust_out = gpio_o[42:0];
- 44: gpio_width_adjust_out = gpio_o[43:0];
- 45: gpio_width_adjust_out = gpio_o[44:0];
- 46: gpio_width_adjust_out = gpio_o[45:0];
- 47: gpio_width_adjust_out = gpio_o[46:0];
- 48: gpio_width_adjust_out = gpio_o[47:0];
- 49: gpio_width_adjust_out = gpio_o[48:0];
- 50: gpio_width_adjust_out = gpio_o[49:0];
- 51: gpio_width_adjust_out = gpio_o[50:0];
- 52: gpio_width_adjust_out = gpio_o[51:0];
- 53: gpio_width_adjust_out = gpio_o[52:0];
- 54: gpio_width_adjust_out = gpio_o[53:0];
- 55: gpio_width_adjust_out = gpio_o[54:0];
- 56: gpio_width_adjust_out = gpio_o[55:0];
- 57: gpio_width_adjust_out = gpio_o[56:0];
- 58: gpio_width_adjust_out = gpio_o[57:0];
- 59: gpio_width_adjust_out = gpio_o[58:0];
- 60: gpio_width_adjust_out = gpio_o[59:0];
- 61: gpio_width_adjust_out = gpio_o[60:0];
- 62: gpio_width_adjust_out = gpio_o[61:0];
- 63: gpio_width_adjust_out = gpio_o[62:0];
- 64: gpio_width_adjust_out = gpio_o;
- default : gpio_width_adjust_out = gpio_o;
- endcase
- end
- endfunction
-
- assign GPIO_O[(C_EMIO_GPIO_WIDTH - 1) : 0] = gpio_width_adjust_out(gpio_out);
- assign GPIO_T_n[(C_EMIO_GPIO_WIDTH - 1) : 0] = gpio_width_adjust_out(gpio_out_t_n);
-
-// Adding OBUFT to JTAG out port
-generate
- if ( C_EN_EMIO_PJTAG == 1 ) begin : PJTAG_OBUFT_TRUE
- OBUFT jtag_obuft_inst (
- .O(PJTAG_TDO),
- .I(PJTAG_TDO_O),
- .T(PJTAG_TDO_T)
- );
- end
- else
- begin
- assign PJTAG_TDO = 1'b0;
- end
-endgenerate
-// -------
-// EMIO PJTAG
-assign PJTAG_TDO_T = ~ PJTAG_TDO_T_n;
-
-// EMIO SDIO0 : No negation required as per CR#636210 for 1.0 version of Silicon,
-// FOR Other SI REV, inversion is required
-
-assign SDIO0_CMD_T = (C_PS7_SI_REV == "1.0") ? (SDIO0_CMD_T_n) : (~ SDIO0_CMD_T_n);
-assign SDIO0_DATA_T[3:0] = (C_PS7_SI_REV == "1.0") ? (SDIO0_DATA_T_n[3:0]) : (~ SDIO0_DATA_T_n[3:0]);
-
-// EMIO SDIO1 : No negation required as per CR#636210 for 1.0 version of Silicon,
-// FOR Other SI REV, inversion is required
-assign SDIO1_CMD_T = (C_PS7_SI_REV == "1.0") ? (SDIO1_CMD_T_n) : (~ SDIO1_CMD_T_n);
-assign SDIO1_DATA_T[3:0] = (C_PS7_SI_REV == "1.0") ? (SDIO1_DATA_T_n[3:0]) : (~ SDIO1_DATA_T_n[3:0]);
-
-// FCLK_CLK optional clock buffers
-
-generate
- if (C_FCLK_CLK0_BUF == "TRUE" | C_FCLK_CLK0_BUF == "true") begin : buffer_fclk_clk_0
- BUFG FCLK_CLK_0_BUFG (.I(FCLK_CLK_unbuffered[0]), .O(FCLK_CLK_buffered[0]));
- end
- if (C_FCLK_CLK1_BUF == "TRUE" | C_FCLK_CLK1_BUF == "true") begin : buffer_fclk_clk_1
- BUFG FCLK_CLK_1_BUFG (.I(FCLK_CLK_unbuffered[1]), .O(FCLK_CLK_buffered[1]));
- end
- if (C_FCLK_CLK2_BUF == "TRUE" | C_FCLK_CLK2_BUF == "true") begin : buffer_fclk_clk_2
- BUFG FCLK_CLK_2_BUFG (.I(FCLK_CLK_unbuffered[2]), .O(FCLK_CLK_buffered[2]));
- end
- if (C_FCLK_CLK3_BUF == "TRUE" | C_FCLK_CLK3_BUF == "true") begin : buffer_fclk_clk_3
- BUFG FCLK_CLK_3_BUFG (.I(FCLK_CLK_unbuffered[3]), .O(FCLK_CLK_buffered[3]));
- end
-endgenerate
-
-assign FCLK_CLK0_temp = (C_FCLK_CLK0_BUF == "TRUE" | C_FCLK_CLK0_BUF == "true") ? FCLK_CLK_buffered[0] : FCLK_CLK_unbuffered[0];
-assign FCLK_CLK1 = (C_FCLK_CLK1_BUF == "TRUE" | C_FCLK_CLK1_BUF == "true") ? FCLK_CLK_buffered[1] : FCLK_CLK_unbuffered[1];
-assign FCLK_CLK2 = (C_FCLK_CLK2_BUF == "TRUE" | C_FCLK_CLK2_BUF == "true") ? FCLK_CLK_buffered[2] : FCLK_CLK_unbuffered[2];
-assign FCLK_CLK3 = (C_FCLK_CLK3_BUF == "TRUE" | C_FCLK_CLK3_BUF == "true") ? FCLK_CLK_buffered[3] : FCLK_CLK_unbuffered[3];
-
-assign FCLK_CLK0 = FCLK_CLK0_temp;
-
-// Adding BIBUF for fixed IO Ports and IBUF for fixed Input Ports
-
-BIBUF DDR_CAS_n_BIBUF (.PAD(DDR_CAS_n), .IO(buffered_DDR_CAS_n));
-BIBUF DDR_CKE_BIBUF (.PAD(DDR_CKE), .IO(buffered_DDR_CKE));
-BIBUF DDR_Clk_n_BIBUF (.PAD(DDR_Clk_n), .IO(buffered_DDR_Clk_n));
-BIBUF DDR_Clk_BIBUF (.PAD(DDR_Clk), .IO(buffered_DDR_Clk));
-BIBUF DDR_CS_n_BIBUF (.PAD(DDR_CS_n), .IO(buffered_DDR_CS_n));
-BIBUF DDR_DRSTB_BIBUF (.PAD(DDR_DRSTB), .IO(buffered_DDR_DRSTB));
-BIBUF DDR_ODT_BIBUF (.PAD(DDR_ODT), .IO(buffered_DDR_ODT));
-BIBUF DDR_RAS_n_BIBUF (.PAD(DDR_RAS_n), .IO(buffered_DDR_RAS_n));
-BIBUF DDR_WEB_BIBUF (.PAD(DDR_WEB), .IO(buffered_DDR_WEB));
-BIBUF DDR_VRN_BIBUF (.PAD(DDR_VRN), .IO(buffered_DDR_VRN));
-BIBUF DDR_VRP_BIBUF (.PAD(DDR_VRP), .IO(buffered_DDR_VRP));
-BIBUF PS_SRSTB_BIBUF (.PAD(PS_SRSTB), .IO(buffered_PS_SRSTB));
-BIBUF PS_CLK_BIBUF (.PAD(PS_CLK), .IO(buffered_PS_CLK));
-BIBUF PS_PORB_BIBUF (.PAD(PS_PORB), .IO(buffered_PS_PORB));
-
-genvar i;
-generate
- for (i=0; i < C_MIO_PRIMITIVE; i=i+1) begin
- BIBUF MIO_BIBUF (.PAD(MIO[i]), .IO(buffered_MIO[i]));
- end
-endgenerate
-
-generate
- for (i=0; i < 3; i=i+1) begin
- BIBUF DDR_BankAddr_BIBUF (.PAD(DDR_BankAddr[i]), .IO(buffered_DDR_BankAddr[i]));
- end
-endgenerate
-
-generate
- for (i=0; i < 15; i=i+1) begin
- BIBUF DDR_Addr_BIBUF (.PAD(DDR_Addr[i]), .IO(buffered_DDR_Addr[i]));
- end
-endgenerate
-
-generate
- for (i=0; i < C_DM_WIDTH; i=i+1) begin
- BIBUF DDR_DM_BIBUF (.PAD(DDR_DM[i]), .IO(buffered_DDR_DM[i]));
- end
-endgenerate
-
-generate
- for (i=0; i < C_DQ_WIDTH; i=i+1) begin
- BIBUF DDR_DQ_BIBUF (.PAD(DDR_DQ[i]), .IO(buffered_DDR_DQ[i]));
- end
-endgenerate
-
-generate
- for (i=0; i < C_DQS_WIDTH; i=i+1) begin
- BIBUF DDR_DQS_n_BIBUF (.PAD(DDR_DQS_n[i]), .IO(buffered_DDR_DQS_n[i]));
- end
-endgenerate
-
-generate
- for (i=0; i < C_DQS_WIDTH; i=i+1) begin
- BIBUF DDR_DQS_BIBUF (.PAD(DDR_DQS[i]), .IO(buffered_DDR_DQS[i]));
- end
-endgenerate
-
-// Connect FCLK in case of disable the AXI port for non Secure Transaction
-//Start
-
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_HP0 == 0) begin
- assign S_AXI_HP0_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_HP0_ACLK_temp = S_AXI_HP0_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_HP1 == 0) begin
- assign S_AXI_HP1_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_HP1_ACLK_temp = S_AXI_HP1_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_HP2 == 0) begin
- assign S_AXI_HP2_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_HP2_ACLK_temp = S_AXI_HP2_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_HP3 == 0) begin
- assign S_AXI_HP3_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_HP3_ACLK_temp = S_AXI_HP3_ACLK;
- end
-endgenerate
-
-//Start
-
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_M_AXI_GP0 == 0) begin
- assign M_AXI_GP0_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign M_AXI_GP0_ACLK_temp = M_AXI_GP0_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_M_AXI_GP1 == 0) begin
- assign M_AXI_GP1_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign M_AXI_GP1_ACLK_temp = M_AXI_GP1_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_GP0 == 0) begin
- assign S_AXI_GP0_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_GP0_ACLK_temp = S_AXI_GP0_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_GP1 == 0) begin
- assign S_AXI_GP1_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_GP1_ACLK_temp = S_AXI_GP1_ACLK;
- end
-endgenerate
-
-generate
- if ( C_USE_AXI_NONSECURE == 1 && C_USE_S_AXI_ACP == 0) begin
- assign S_AXI_ACP_ACLK_temp = FCLK_CLK0_temp;
- end
- else begin
- assign S_AXI_ACP_ACLK_temp = S_AXI_ACP_ACLK;
- end
-endgenerate
-
-assign M_AXI_GP0_ARCACHE=(C_GP0_EN_MODIFIABLE_TXN==1)?{{M_AXI_GP0_ARCACHE_t[3:2]},{1'b1},{M_AXI_GP0_ARCACHE_t[0]}}:M_AXI_GP0_ARCACHE_t ;
-assign M_AXI_GP1_ARCACHE=(C_GP1_EN_MODIFIABLE_TXN==1)?{{M_AXI_GP1_ARCACHE_t[3:2]},{1'b1},{M_AXI_GP1_ARCACHE_t[0]}}:M_AXI_GP1_ARCACHE_t ;
-assign M_AXI_GP0_AWCACHE=(C_GP0_EN_MODIFIABLE_TXN==1)?{{M_AXI_GP0_AWCACHE_t[3:2]},{1'b1},{M_AXI_GP0_AWCACHE_t[0]}}:M_AXI_GP0_AWCACHE_t ;
-assign M_AXI_GP1_AWCACHE=(C_GP1_EN_MODIFIABLE_TXN==1)?{{M_AXI_GP1_AWCACHE_t[3:2]},{1'b1},{M_AXI_GP1_AWCACHE_t[0]}}:M_AXI_GP1_AWCACHE_t ;
-
-
-//END
-//====================
-//PSS TOP
-//====================
-generate
-if (C_PACKAGE_NAME == "clg225" ) begin
- wire [21:0] dummy;
- PS7 PS7_i (
- .DMA0DATYPE (DMA0_DATYPE ),
- .DMA0DAVALID (DMA0_DAVALID),
- .DMA0DRREADY (DMA0_DRREADY),
- .DMA0RSTN (DMA0_RSTN ),
- .DMA1DATYPE (DMA1_DATYPE ),
- .DMA1DAVALID (DMA1_DAVALID),
- .DMA1DRREADY (DMA1_DRREADY),
- .DMA1RSTN (DMA1_RSTN ),
- .DMA2DATYPE (DMA2_DATYPE ),
- .DMA2DAVALID (DMA2_DAVALID),
- .DMA2DRREADY (DMA2_DRREADY),
- .DMA2RSTN (DMA2_RSTN ),
- .DMA3DATYPE (DMA3_DATYPE ),
- .DMA3DAVALID (DMA3_DAVALID),
- .DMA3DRREADY (DMA3_DRREADY),
- .DMA3RSTN (DMA3_RSTN ),
- .EMIOCAN0PHYTX (CAN0_PHY_TX ),
- .EMIOCAN1PHYTX (CAN1_PHY_TX ),
- .EMIOENET0GMIITXD (ENET0_GMII_TXD_i), // (ENET0_GMII_TXD_i ),
- .EMIOENET0GMIITXEN (ENET0_GMII_TX_EN_i), // (ENET0_GMII_TX_EN_i),
- .EMIOENET0GMIITXER (ENET0_GMII_TX_ER_i), // (ENET0_GMII_TX_ER_i),
- .EMIOENET0MDIOMDC (ENET0_MDIO_MDC),
- .EMIOENET0MDIOO (ENET0_MDIO_O ),
- .EMIOENET0MDIOTN (ENET0_MDIO_T_n ),
- .EMIOENET0PTPDELAYREQRX (ENET0_PTP_DELAY_REQ_RX),
- .EMIOENET0PTPDELAYREQTX (ENET0_PTP_DELAY_REQ_TX),
- .EMIOENET0PTPPDELAYREQRX (ENET0_PTP_PDELAY_REQ_RX),
- .EMIOENET0PTPPDELAYREQTX (ENET0_PTP_PDELAY_REQ_TX),
- .EMIOENET0PTPPDELAYRESPRX(ENET0_PTP_PDELAY_RESP_RX),
- .EMIOENET0PTPPDELAYRESPTX(ENET0_PTP_PDELAY_RESP_TX),
- .EMIOENET0PTPSYNCFRAMERX (ENET0_PTP_SYNC_FRAME_RX),
- .EMIOENET0PTPSYNCFRAMETX (ENET0_PTP_SYNC_FRAME_TX),
- .EMIOENET0SOFRX (ENET0_SOF_RX),
- .EMIOENET0SOFTX (ENET0_SOF_TX),
- .EMIOENET1GMIITXD (ENET1_GMII_TXD_i), //(ENET1_GMII_TXD_i),
- .EMIOENET1GMIITXEN (ENET1_GMII_TX_EN_i), // (ENET1_GMII_TX_EN_i),
- .EMIOENET1GMIITXER (ENET1_GMII_TX_ER_i), // (ENET1_GMII_TX_ER_i),
- .EMIOENET1MDIOMDC (ENET1_MDIO_MDC),
- .EMIOENET1MDIOO (ENET1_MDIO_O),
- .EMIOENET1MDIOTN (ENET1_MDIO_T_n),
- .EMIOENET1PTPDELAYREQRX (ENET1_PTP_DELAY_REQ_RX),
- .EMIOENET1PTPDELAYREQTX (ENET1_PTP_DELAY_REQ_TX),
- .EMIOENET1PTPPDELAYREQRX (ENET1_PTP_PDELAY_REQ_RX),
- .EMIOENET1PTPPDELAYREQTX (ENET1_PTP_PDELAY_REQ_TX),
- .EMIOENET1PTPPDELAYRESPRX(ENET1_PTP_PDELAY_RESP_RX),
- .EMIOENET1PTPPDELAYRESPTX(ENET1_PTP_PDELAY_RESP_TX),
- .EMIOENET1PTPSYNCFRAMERX (ENET1_PTP_SYNC_FRAME_RX),
- .EMIOENET1PTPSYNCFRAMETX (ENET1_PTP_SYNC_FRAME_TX),
- .EMIOENET1SOFRX (ENET1_SOF_RX),
- .EMIOENET1SOFTX (ENET1_SOF_TX),
- .EMIOGPIOO (gpio_out),
- .EMIOGPIOTN (gpio_out_t_n),
- .EMIOI2C0SCLO (I2C0_SCL_O),
- .EMIOI2C0SCLTN (I2C0_SCL_T_n),
- .EMIOI2C0SDAO (I2C0_SDA_O),
- .EMIOI2C0SDATN (I2C0_SDA_T_n),
- .EMIOI2C1SCLO (I2C1_SCL_O),
- .EMIOI2C1SCLTN (I2C1_SCL_T_n),
- .EMIOI2C1SDAO (I2C1_SDA_O),
- .EMIOI2C1SDATN (I2C1_SDA_T_n),
- .EMIOPJTAGTDO (PJTAG_TDO_O),
- .EMIOPJTAGTDTN (PJTAG_TDO_T_n),
- .EMIOSDIO0BUSPOW (SDIO0_BUSPOW),
- .EMIOSDIO0CLK (SDIO0_CLK ),
- .EMIOSDIO0CMDO (SDIO0_CMD_O ),
- .EMIOSDIO0CMDTN (SDIO0_CMD_T_n ),
- .EMIOSDIO0DATAO (SDIO0_DATA_O),
- .EMIOSDIO0DATATN (SDIO0_DATA_T_n),
- .EMIOSDIO0LED (SDIO0_LED),
- .EMIOSDIO1BUSPOW (SDIO1_BUSPOW),
- .EMIOSDIO1CLK (SDIO1_CLK ),
- .EMIOSDIO1CMDO (SDIO1_CMD_O ),
- .EMIOSDIO1CMDTN (SDIO1_CMD_T_n ),
- .EMIOSDIO1DATAO (SDIO1_DATA_O),
- .EMIOSDIO1DATATN (SDIO1_DATA_T_n),
- .EMIOSDIO1LED (SDIO1_LED),
- .EMIOSPI0MO (SPI0_MOSI_O),
- .EMIOSPI0MOTN (SPI0_MOSI_T_n),
- .EMIOSPI0SCLKO (SPI0_SCLK_O),
- .EMIOSPI0SCLKTN (SPI0_SCLK_T_n),
- .EMIOSPI0SO (SPI0_MISO_O),
- .EMIOSPI0STN (SPI0_MISO_T_n),
- .EMIOSPI0SSON ({SPI0_SS2_O,SPI0_SS1_O,SPI0_SS_O}),
- .EMIOSPI0SSNTN (SPI0_SS_T_n),
- .EMIOSPI1MO (SPI1_MOSI_O),
- .EMIOSPI1MOTN (SPI1_MOSI_T_n),
- .EMIOSPI1SCLKO (SPI1_SCLK_O),
- .EMIOSPI1SCLKTN (SPI1_SCLK_T_n),
- .EMIOSPI1SO (SPI1_MISO_O),
- .EMIOSPI1STN (SPI1_MISO_T_n),
- .EMIOSPI1SSON ({SPI1_SS2_O,SPI1_SS1_O,SPI1_SS_O}),
- .EMIOSPI1SSNTN (SPI1_SS_T_n),
- .EMIOTRACECTL (TRACE_CTL_i),
- .EMIOTRACEDATA (TRACE_DATA_i),
- .EMIOTTC0WAVEO ({TTC0_WAVE2_OUT,TTC0_WAVE1_OUT,TTC0_WAVE0_OUT}),
- .EMIOTTC1WAVEO ({TTC1_WAVE2_OUT,TTC1_WAVE1_OUT,TTC1_WAVE0_OUT}),
- .EMIOUART0DTRN (UART0_DTRN),
- .EMIOUART0RTSN (UART0_RTSN),
- .EMIOUART0TX (UART0_TX ),
- .EMIOUART1DTRN (UART1_DTRN),
- .EMIOUART1RTSN (UART1_RTSN),
- .EMIOUART1TX (UART1_TX ),
- .EMIOUSB0PORTINDCTL (USB0_PORT_INDCTL),
- .EMIOUSB0VBUSPWRSELECT (USB0_VBUS_PWRSELECT),
- .EMIOUSB1PORTINDCTL (USB1_PORT_INDCTL),
- .EMIOUSB1VBUSPWRSELECT (USB1_VBUS_PWRSELECT),
- .EMIOWDTRSTO (WDT_RST_OUT),
- .EVENTEVENTO (EVENT_EVENTO),
- .EVENTSTANDBYWFE (EVENT_STANDBYWFE),
- .EVENTSTANDBYWFI (EVENT_STANDBYWFI),
- .FCLKCLK (FCLK_CLK_unbuffered),
- .FCLKRESETN ({FCLK_RESET3_N,FCLK_RESET2_N,FCLK_RESET1_N,FCLK_RESET0_N}),
- .EMIOSDIO0BUSVOLT (SDIO0_BUSVOLT),
- .EMIOSDIO1BUSVOLT (SDIO1_BUSVOLT),
- .FTMTF2PTRIGACK ({FTMT_F2P_TRIGACK_3,FTMT_F2P_TRIGACK_2,FTMT_F2P_TRIGACK_1,FTMT_F2P_TRIGACK_0}),
- .FTMTP2FDEBUG (FTMT_P2F_DEBUG ),
- .FTMTP2FTRIG ({FTMT_P2F_TRIG_3,FTMT_P2F_TRIG_2,FTMT_P2F_TRIG_1,FTMT_P2F_TRIG_0}),
- .IRQP2F ({IRQ_P2F_DMAC_ABORT, IRQ_P2F_DMAC7, IRQ_P2F_DMAC6, IRQ_P2F_DMAC5, IRQ_P2F_DMAC4, IRQ_P2F_DMAC3, IRQ_P2F_DMAC2, IRQ_P2F_DMAC1, IRQ_P2F_DMAC0, IRQ_P2F_SMC, IRQ_P2F_QSPI, IRQ_P2F_CTI, IRQ_P2F_GPIO, IRQ_P2F_USB0, IRQ_P2F_ENET0, IRQ_P2F_ENET_WAKE0, IRQ_P2F_SDIO0, IRQ_P2F_I2C0, IRQ_P2F_SPI0, IRQ_P2F_UART0, IRQ_P2F_CAN0, IRQ_P2F_USB1, IRQ_P2F_ENET1, IRQ_P2F_ENET_WAKE1, IRQ_P2F_SDIO1, IRQ_P2F_I2C1, IRQ_P2F_SPI1, IRQ_P2F_UART1, IRQ_P2F_CAN1}),
- .MAXIGP0ARADDR (M_AXI_GP0_ARADDR),
- .MAXIGP0ARBURST (M_AXI_GP0_ARBURST),
- .MAXIGP0ARCACHE (M_AXI_GP0_ARCACHE_t),
- .MAXIGP0ARESETN (M_AXI_GP0_ARESETN),
- .MAXIGP0ARID (M_AXI_GP0_ARID_FULL ),
- .MAXIGP0ARLEN (M_AXI_GP0_ARLEN ),
- .MAXIGP0ARLOCK (M_AXI_GP0_ARLOCK ),
- .MAXIGP0ARPROT (M_AXI_GP0_ARPROT ),
- .MAXIGP0ARQOS (M_AXI_GP0_ARQOS ),
- .MAXIGP0ARSIZE (M_AXI_GP0_ARSIZE_i ),
- .MAXIGP0ARVALID (M_AXI_GP0_ARVALID),
- .MAXIGP0AWADDR (M_AXI_GP0_AWADDR ),
- .MAXIGP0AWBURST (M_AXI_GP0_AWBURST),
- .MAXIGP0AWCACHE (M_AXI_GP0_AWCACHE_t),
- .MAXIGP0AWID (M_AXI_GP0_AWID_FULL ),
- .MAXIGP0AWLEN (M_AXI_GP0_AWLEN ),
- .MAXIGP0AWLOCK (M_AXI_GP0_AWLOCK ),
- .MAXIGP0AWPROT (M_AXI_GP0_AWPROT ),
- .MAXIGP0AWQOS (M_AXI_GP0_AWQOS ),
- .MAXIGP0AWSIZE (M_AXI_GP0_AWSIZE_i ),
- .MAXIGP0AWVALID (M_AXI_GP0_AWVALID),
- .MAXIGP0BREADY (M_AXI_GP0_BREADY ),
- .MAXIGP0RREADY (M_AXI_GP0_RREADY ),
- .MAXIGP0WDATA (M_AXI_GP0_WDATA ),
- .MAXIGP0WID (M_AXI_GP0_WID_FULL ),
- .MAXIGP0WLAST (M_AXI_GP0_WLAST ),
- .MAXIGP0WSTRB (M_AXI_GP0_WSTRB ),
- .MAXIGP0WVALID (M_AXI_GP0_WVALID ),
- .MAXIGP1ARADDR (M_AXI_GP1_ARADDR ),
- .MAXIGP1ARBURST (M_AXI_GP1_ARBURST),
- .MAXIGP1ARCACHE (M_AXI_GP1_ARCACHE_t),
- .MAXIGP1ARESETN (M_AXI_GP1_ARESETN),
- .MAXIGP1ARID (M_AXI_GP1_ARID_FULL ),
- .MAXIGP1ARLEN (M_AXI_GP1_ARLEN ),
- .MAXIGP1ARLOCK (M_AXI_GP1_ARLOCK ),
- .MAXIGP1ARPROT (M_AXI_GP1_ARPROT ),
- .MAXIGP1ARQOS (M_AXI_GP1_ARQOS ),
- .MAXIGP1ARSIZE (M_AXI_GP1_ARSIZE_i ),
- .MAXIGP1ARVALID (M_AXI_GP1_ARVALID),
- .MAXIGP1AWADDR (M_AXI_GP1_AWADDR ),
- .MAXIGP1AWBURST (M_AXI_GP1_AWBURST),
- .MAXIGP1AWCACHE (M_AXI_GP1_AWCACHE_t),
- .MAXIGP1AWID (M_AXI_GP1_AWID_FULL ),
- .MAXIGP1AWLEN (M_AXI_GP1_AWLEN ),
- .MAXIGP1AWLOCK (M_AXI_GP1_AWLOCK ),
- .MAXIGP1AWPROT (M_AXI_GP1_AWPROT ),
- .MAXIGP1AWQOS (M_AXI_GP1_AWQOS ),
- .MAXIGP1AWSIZE (M_AXI_GP1_AWSIZE_i ),
- .MAXIGP1AWVALID (M_AXI_GP1_AWVALID),
- .MAXIGP1BREADY (M_AXI_GP1_BREADY ),
- .MAXIGP1RREADY (M_AXI_GP1_RREADY ),
- .MAXIGP1WDATA (M_AXI_GP1_WDATA ),
- .MAXIGP1WID (M_AXI_GP1_WID_FULL ),
- .MAXIGP1WLAST (M_AXI_GP1_WLAST ),
- .MAXIGP1WSTRB (M_AXI_GP1_WSTRB ),
- .MAXIGP1WVALID (M_AXI_GP1_WVALID ),
- .SAXIACPARESETN (S_AXI_ACP_ARESETN),
- .SAXIACPARREADY (SAXIACPARREADY_W),
- .SAXIACPAWREADY (SAXIACPAWREADY_W),
- .SAXIACPBID (S_AXI_ACP_BID_out ),
- .SAXIACPBRESP (SAXIACPBRESP_W ),
- .SAXIACPBVALID (SAXIACPBVALID_W ),
- .SAXIACPRDATA (SAXIACPRDATA_W ),
- .SAXIACPRID (S_AXI_ACP_RID_out),
- .SAXIACPRLAST (SAXIACPRLAST_W ),
- .SAXIACPRRESP (SAXIACPRRESP_W ),
- .SAXIACPRVALID (SAXIACPRVALID_W ),
- .SAXIACPWREADY (SAXIACPWREADY_W ),
- .SAXIGP0ARESETN (S_AXI_GP0_ARESETN),
- .SAXIGP0ARREADY (S_AXI_GP0_ARREADY),
- .SAXIGP0AWREADY (S_AXI_GP0_AWREADY),
- .SAXIGP0BID (S_AXI_GP0_BID_out),
- .SAXIGP0BRESP (S_AXI_GP0_BRESP ),
- .SAXIGP0BVALID (S_AXI_GP0_BVALID ),
- .SAXIGP0RDATA (S_AXI_GP0_RDATA ),
- .SAXIGP0RID (S_AXI_GP0_RID_out ),
- .SAXIGP0RLAST (S_AXI_GP0_RLAST ),
- .SAXIGP0RRESP (S_AXI_GP0_RRESP ),
- .SAXIGP0RVALID (S_AXI_GP0_RVALID ),
- .SAXIGP0WREADY (S_AXI_GP0_WREADY ),
- .SAXIGP1ARESETN (S_AXI_GP1_ARESETN),
- .SAXIGP1ARREADY (S_AXI_GP1_ARREADY),
- .SAXIGP1AWREADY (S_AXI_GP1_AWREADY),
- .SAXIGP1BID (S_AXI_GP1_BID_out ),
- .SAXIGP1BRESP (S_AXI_GP1_BRESP ),
- .SAXIGP1BVALID (S_AXI_GP1_BVALID ),
- .SAXIGP1RDATA (S_AXI_GP1_RDATA ),
- .SAXIGP1RID (S_AXI_GP1_RID_out ),
- .SAXIGP1RLAST (S_AXI_GP1_RLAST ),
- .SAXIGP1RRESP (S_AXI_GP1_RRESP ),
- .SAXIGP1RVALID (S_AXI_GP1_RVALID ),
- .SAXIGP1WREADY (S_AXI_GP1_WREADY ),
- .SAXIHP0ARESETN (S_AXI_HP0_ARESETN),
- .SAXIHP0ARREADY (S_AXI_HP0_ARREADY),
- .SAXIHP0AWREADY (S_AXI_HP0_AWREADY),
- .SAXIHP0BID (S_AXI_HP0_BID_out ),
- .SAXIHP0BRESP (S_AXI_HP0_BRESP ),
- .SAXIHP0BVALID (S_AXI_HP0_BVALID ),
- .SAXIHP0RACOUNT (S_AXI_HP0_RACOUNT),
- .SAXIHP0RCOUNT (S_AXI_HP0_RCOUNT),
- .SAXIHP0RDATA (S_AXI_HP0_RDATA_out),
- .SAXIHP0RID (S_AXI_HP0_RID_out ),
- .SAXIHP0RLAST (S_AXI_HP0_RLAST),
- .SAXIHP0RRESP (S_AXI_HP0_RRESP),
- .SAXIHP0RVALID (S_AXI_HP0_RVALID),
- .SAXIHP0WCOUNT (S_AXI_HP0_WCOUNT),
- .SAXIHP0WACOUNT (S_AXI_HP0_WACOUNT),
- .SAXIHP0WREADY (S_AXI_HP0_WREADY),
- .SAXIHP1ARESETN (S_AXI_HP1_ARESETN),
- .SAXIHP1ARREADY (S_AXI_HP1_ARREADY),
- .SAXIHP1AWREADY (S_AXI_HP1_AWREADY),
- .SAXIHP1BID (S_AXI_HP1_BID_out ),
- .SAXIHP1BRESP (S_AXI_HP1_BRESP ),
- .SAXIHP1BVALID (S_AXI_HP1_BVALID ),
- .SAXIHP1RACOUNT (S_AXI_HP1_RACOUNT ),
- .SAXIHP1RCOUNT (S_AXI_HP1_RCOUNT ),
- .SAXIHP1RDATA (S_AXI_HP1_RDATA_out),
- .SAXIHP1RID (S_AXI_HP1_RID_out ),
- .SAXIHP1RLAST (S_AXI_HP1_RLAST ),
- .SAXIHP1RRESP (S_AXI_HP1_RRESP ),
- .SAXIHP1RVALID (S_AXI_HP1_RVALID),
- .SAXIHP1WACOUNT (S_AXI_HP1_WACOUNT),
- .SAXIHP1WCOUNT (S_AXI_HP1_WCOUNT),
- .SAXIHP1WREADY (S_AXI_HP1_WREADY),
- .SAXIHP2ARESETN (S_AXI_HP2_ARESETN),
- .SAXIHP2ARREADY (S_AXI_HP2_ARREADY),
- .SAXIHP2AWREADY (S_AXI_HP2_AWREADY),
- .SAXIHP2BID (S_AXI_HP2_BID_out ),
- .SAXIHP2BRESP (S_AXI_HP2_BRESP),
- .SAXIHP2BVALID (S_AXI_HP2_BVALID),
- .SAXIHP2RACOUNT (S_AXI_HP2_RACOUNT),
- .SAXIHP2RCOUNT (S_AXI_HP2_RCOUNT),
- .SAXIHP2RDATA (S_AXI_HP2_RDATA_out),
- .SAXIHP2RID (S_AXI_HP2_RID_out ),
- .SAXIHP2RLAST (S_AXI_HP2_RLAST),
- .SAXIHP2RRESP (S_AXI_HP2_RRESP),
- .SAXIHP2RVALID (S_AXI_HP2_RVALID),
- .SAXIHP2WACOUNT (S_AXI_HP2_WACOUNT),
- .SAXIHP2WCOUNT (S_AXI_HP2_WCOUNT),
- .SAXIHP2WREADY (S_AXI_HP2_WREADY),
- .SAXIHP3ARESETN (S_AXI_HP3_ARESETN),
- .SAXIHP3ARREADY (S_AXI_HP3_ARREADY),
- .SAXIHP3AWREADY (S_AXI_HP3_AWREADY),
- .SAXIHP3BID (S_AXI_HP3_BID_out),
- .SAXIHP3BRESP (S_AXI_HP3_BRESP),
- .SAXIHP3BVALID (S_AXI_HP3_BVALID),
- .SAXIHP3RACOUNT (S_AXI_HP3_RACOUNT),
- .SAXIHP3RCOUNT (S_AXI_HP3_RCOUNT),
- .SAXIHP3RDATA (S_AXI_HP3_RDATA_out),
- .SAXIHP3RID (S_AXI_HP3_RID_out),
- .SAXIHP3RLAST (S_AXI_HP3_RLAST),
- .SAXIHP3RRESP (S_AXI_HP3_RRESP),
- .SAXIHP3RVALID (S_AXI_HP3_RVALID),
- .SAXIHP3WCOUNT (S_AXI_HP3_WCOUNT),
- .SAXIHP3WACOUNT (S_AXI_HP3_WACOUNT),
- .SAXIHP3WREADY (S_AXI_HP3_WREADY),
- .DDRARB (DDR_ARB),
- .DMA0ACLK (DMA0_ACLK ),
- .DMA0DAREADY (DMA0_DAREADY),
- .DMA0DRLAST (DMA0_DRLAST ),
- .DMA0DRTYPE (DMA0_DRTYPE),
- .DMA0DRVALID (DMA0_DRVALID),
- .DMA1ACLK (DMA1_ACLK ),
- .DMA1DAREADY (DMA1_DAREADY),
- .DMA1DRLAST (DMA1_DRLAST ),
- .DMA1DRTYPE (DMA1_DRTYPE),
- .DMA1DRVALID (DMA1_DRVALID),
- .DMA2ACLK (DMA2_ACLK ),
- .DMA2DAREADY (DMA2_DAREADY),
- .DMA2DRLAST (DMA2_DRLAST ),
- .DMA2DRTYPE (DMA2_DRTYPE),
- .DMA2DRVALID (DMA2_DRVALID),
- .DMA3ACLK (DMA3_ACLK ),
- .DMA3DAREADY (DMA3_DAREADY),
- .DMA3DRLAST (DMA3_DRLAST ),
- .DMA3DRTYPE (DMA3_DRTYPE),
- .DMA3DRVALID (DMA3_DRVALID),
- .EMIOCAN0PHYRX (CAN0_PHY_RX),
- .EMIOCAN1PHYRX (CAN1_PHY_RX),
- .EMIOENET0EXTINTIN (ENET0_EXT_INTIN),
- .EMIOENET0GMIICOL (ENET0_GMII_COL_i),
- .EMIOENET0GMIICRS (ENET0_GMII_CRS_i),
- .EMIOENET0GMIIRXCLK (ENET0_GMII_RX_CLK),
- .EMIOENET0GMIIRXD (ENET0_GMII_RXD_i),
- .EMIOENET0GMIIRXDV (ENET0_GMII_RX_DV_i),
- .EMIOENET0GMIIRXER (ENET0_GMII_RX_ER_i),
- .EMIOENET0GMIITXCLK (ENET0_GMII_TX_CLK),
- .EMIOENET0MDIOI (ENET0_MDIO_I),
- .EMIOENET1EXTINTIN (ENET1_EXT_INTIN),
- .EMIOENET1GMIICOL (ENET1_GMII_COL_i),
- .EMIOENET1GMIICRS (ENET1_GMII_CRS_i),
- .EMIOENET1GMIIRXCLK (ENET1_GMII_RX_CLK),
- .EMIOENET1GMIIRXD (ENET1_GMII_RXD_i),
- .EMIOENET1GMIIRXDV (ENET1_GMII_RX_DV_i),
- .EMIOENET1GMIIRXER (ENET1_GMII_RX_ER_i),
- .EMIOENET1GMIITXCLK (ENET1_GMII_TX_CLK),
- .EMIOENET1MDIOI (ENET1_MDIO_I),
- .EMIOGPIOI (gpio_in63_0 ),
- .EMIOI2C0SCLI (I2C0_SCL_I),
- .EMIOI2C0SDAI (I2C0_SDA_I),
- .EMIOI2C1SCLI (I2C1_SCL_I),
- .EMIOI2C1SDAI (I2C1_SDA_I),
- .EMIOPJTAGTCK (PJTAG_TCK),
- .EMIOPJTAGTDI (PJTAG_TDI),
- .EMIOPJTAGTMS (PJTAG_TMS),
- .EMIOSDIO0CDN (SDIO0_CDN),
- .EMIOSDIO0CLKFB (SDIO0_CLK_FB ),
- .EMIOSDIO0CMDI (SDIO0_CMD_I ),
- .EMIOSDIO0DATAI (SDIO0_DATA_I ),
- .EMIOSDIO0WP (SDIO0_WP),
- .EMIOSDIO1CDN (SDIO1_CDN),
- .EMIOSDIO1CLKFB (SDIO1_CLK_FB ),
- .EMIOSDIO1CMDI (SDIO1_CMD_I ),
- .EMIOSDIO1DATAI (SDIO1_DATA_I ),
- .EMIOSDIO1WP (SDIO1_WP),
- .EMIOSPI0MI (SPI0_MISO_I),
- .EMIOSPI0SCLKI (SPI0_SCLK_I),
- .EMIOSPI0SI (SPI0_MOSI_I),
- .EMIOSPI0SSIN (SPI0_SS_I),
- .EMIOSPI1MI (SPI1_MISO_I),
- .EMIOSPI1SCLKI (SPI1_SCLK_I),
- .EMIOSPI1SI (SPI1_MOSI_I),
- .EMIOSPI1SSIN (SPI1_SS_I),
- .EMIOSRAMINTIN (SRAM_INTIN),
- .EMIOTRACECLK (TRACE_CLK),
- .EMIOTTC0CLKI ({TTC0_CLK2_IN, TTC0_CLK1_IN, TTC0_CLK0_IN}),
- .EMIOTTC1CLKI ({TTC1_CLK2_IN, TTC1_CLK1_IN, TTC1_CLK0_IN}),
- .EMIOUART0CTSN (UART0_CTSN),
- .EMIOUART0DCDN (UART0_DCDN),
- .EMIOUART0DSRN (UART0_DSRN),
- .EMIOUART0RIN (UART0_RIN ),
- .EMIOUART0RX (UART0_RX ),
- .EMIOUART1CTSN (UART1_CTSN),
- .EMIOUART1DCDN (UART1_DCDN),
- .EMIOUART1DSRN (UART1_DSRN),
- .EMIOUART1RIN (UART1_RIN ),
- .EMIOUART1RX (UART1_RX ),
- .EMIOUSB0VBUSPWRFAULT (USB0_VBUS_PWRFAULT),
- .EMIOUSB1VBUSPWRFAULT (USB1_VBUS_PWRFAULT),
- .EMIOWDTCLKI (WDT_CLK_IN),
- .EVENTEVENTI (EVENT_EVENTI),
- .FCLKCLKTRIGN (fclk_clktrig_gnd),
- .FPGAIDLEN (FPGA_IDLE_N),
- .FTMDTRACEINATID (FTMD_TRACEIN_ATID_i),
- .FTMDTRACEINCLOCK (FTMD_TRACEIN_CLK),
- .FTMDTRACEINDATA (FTMD_TRACEIN_DATA_i),
- .FTMDTRACEINVALID (FTMD_TRACEIN_VALID_i),
- .FTMTF2PDEBUG (FTMT_F2P_DEBUG ),
- .FTMTF2PTRIG ({FTMT_F2P_TRIG_3,FTMT_F2P_TRIG_2,FTMT_F2P_TRIG_1,FTMT_F2P_TRIG_0}),
- .FTMTP2FTRIGACK ({FTMT_P2F_TRIGACK_3,FTMT_P2F_TRIGACK_2,FTMT_P2F_TRIGACK_1,FTMT_P2F_TRIGACK_0}),
- .IRQF2P (irq_f2p_i),
- .MAXIGP0ACLK (M_AXI_GP0_ACLK_temp),
- .MAXIGP0ARREADY (M_AXI_GP0_ARREADY),
- .MAXIGP0AWREADY (M_AXI_GP0_AWREADY),
- .MAXIGP0BID (M_AXI_GP0_BID_FULL ),
- .MAXIGP0BRESP (M_AXI_GP0_BRESP ),
- .MAXIGP0BVALID (M_AXI_GP0_BVALID ),
- .MAXIGP0RDATA (M_AXI_GP0_RDATA ),
- .MAXIGP0RID (M_AXI_GP0_RID_FULL ),
- .MAXIGP0RLAST (M_AXI_GP0_RLAST ),
- .MAXIGP0RRESP (M_AXI_GP0_RRESP ),
- .MAXIGP0RVALID (M_AXI_GP0_RVALID ),
- .MAXIGP0WREADY (M_AXI_GP0_WREADY ),
- .MAXIGP1ACLK (M_AXI_GP1_ACLK_temp ),
- .MAXIGP1ARREADY (M_AXI_GP1_ARREADY),
- .MAXIGP1AWREADY (M_AXI_GP1_AWREADY),
- .MAXIGP1BID (M_AXI_GP1_BID_FULL ),
- .MAXIGP1BRESP (M_AXI_GP1_BRESP ),
- .MAXIGP1BVALID (M_AXI_GP1_BVALID ),
- .MAXIGP1RDATA (M_AXI_GP1_RDATA ),
- .MAXIGP1RID (M_AXI_GP1_RID_FULL ),
- .MAXIGP1RLAST (M_AXI_GP1_RLAST ),
- .MAXIGP1RRESP (M_AXI_GP1_RRESP ),
- .MAXIGP1RVALID (M_AXI_GP1_RVALID ),
- .MAXIGP1WREADY (M_AXI_GP1_WREADY ),
- .SAXIACPACLK (S_AXI_ACP_ACLK_temp ),
- .SAXIACPARADDR (SAXIACPARADDR_W ),
- .SAXIACPARBURST (SAXIACPARBURST_W),
- .SAXIACPARCACHE (SAXIACPARCACHE_W),
- .SAXIACPARID (S_AXI_ACP_ARID_in ),
- .SAXIACPARLEN (SAXIACPARLEN_W ),
- .SAXIACPARLOCK (SAXIACPARLOCK_W ),
- .SAXIACPARPROT (SAXIACPARPROT_W ),
- .SAXIACPARQOS (S_AXI_ACP_ARQOS ),
- .SAXIACPARSIZE (SAXIACPARSIZE_W[1:0] ),
- .SAXIACPARUSER (SAXIACPARUSER_W ),
- .SAXIACPARVALID (SAXIACPARVALID_W),
- .SAXIACPAWADDR (SAXIACPAWADDR_W ),
- .SAXIACPAWBURST (SAXIACPAWBURST_W),
- .SAXIACPAWCACHE (SAXIACPAWCACHE_W),
- .SAXIACPAWID (S_AXI_ACP_AWID_in ),
- .SAXIACPAWLEN (SAXIACPAWLEN_W ),
- .SAXIACPAWLOCK (SAXIACPAWLOCK_W ),
- .SAXIACPAWPROT (SAXIACPAWPROT_W ),
- .SAXIACPAWQOS (S_AXI_ACP_AWQOS ),
- .SAXIACPAWSIZE (SAXIACPAWSIZE_W[1:0] ),
- .SAXIACPAWUSER (SAXIACPAWUSER_W ),
- .SAXIACPAWVALID (SAXIACPAWVALID_W),
- .SAXIACPBREADY (SAXIACPBREADY_W ),
- .SAXIACPRREADY (SAXIACPRREADY_W ),
- .SAXIACPWDATA (SAXIACPWDATA_W ),
- .SAXIACPWID (S_AXI_ACP_WID_in ),
- .SAXIACPWLAST (SAXIACPWLAST_W ),
- .SAXIACPWSTRB (SAXIACPWSTRB_W ),
- .SAXIACPWVALID (SAXIACPWVALID_W ),
- .SAXIGP0ACLK (S_AXI_GP0_ACLK_temp ),
- .SAXIGP0ARADDR (S_AXI_GP0_ARADDR ),
- .SAXIGP0ARBURST (S_AXI_GP0_ARBURST),
- .SAXIGP0ARCACHE (S_AXI_GP0_ARCACHE),
- .SAXIGP0ARID (S_AXI_GP0_ARID_in ),
- .SAXIGP0ARLEN (S_AXI_GP0_ARLEN ),
- .SAXIGP0ARLOCK (S_AXI_GP0_ARLOCK ),
- .SAXIGP0ARPROT (S_AXI_GP0_ARPROT ),
- .SAXIGP0ARQOS (S_AXI_GP0_ARQOS ),
- .SAXIGP0ARSIZE (S_AXI_GP0_ARSIZE[1:0] ),
- .SAXIGP0ARVALID (S_AXI_GP0_ARVALID),
- .SAXIGP0AWADDR (S_AXI_GP0_AWADDR ),
- .SAXIGP0AWBURST (S_AXI_GP0_AWBURST),
- .SAXIGP0AWCACHE (S_AXI_GP0_AWCACHE),
- .SAXIGP0AWID (S_AXI_GP0_AWID_in ),
- .SAXIGP0AWLEN (S_AXI_GP0_AWLEN ),
- .SAXIGP0AWLOCK (S_AXI_GP0_AWLOCK ),
- .SAXIGP0AWPROT (S_AXI_GP0_AWPROT ),
- .SAXIGP0AWQOS (S_AXI_GP0_AWQOS ),
- .SAXIGP0AWSIZE (S_AXI_GP0_AWSIZE[1:0] ),
- .SAXIGP0AWVALID (S_AXI_GP0_AWVALID),
- .SAXIGP0BREADY (S_AXI_GP0_BREADY ),
- .SAXIGP0RREADY (S_AXI_GP0_RREADY ),
- .SAXIGP0WDATA (S_AXI_GP0_WDATA ),
- .SAXIGP0WID (S_AXI_GP0_WID_in ),
- .SAXIGP0WLAST (S_AXI_GP0_WLAST ),
- .SAXIGP0WSTRB (S_AXI_GP0_WSTRB ),
- .SAXIGP0WVALID (S_AXI_GP0_WVALID ),
- .SAXIGP1ACLK (S_AXI_GP1_ACLK_temp ),
- .SAXIGP1ARADDR (S_AXI_GP1_ARADDR ),
- .SAXIGP1ARBURST (S_AXI_GP1_ARBURST),
- .SAXIGP1ARCACHE (S_AXI_GP1_ARCACHE),
- .SAXIGP1ARID (S_AXI_GP1_ARID_in ),
- .SAXIGP1ARLEN (S_AXI_GP1_ARLEN ),
- .SAXIGP1ARLOCK (S_AXI_GP1_ARLOCK ),
- .SAXIGP1ARPROT (S_AXI_GP1_ARPROT ),
- .SAXIGP1ARQOS (S_AXI_GP1_ARQOS ),
- .SAXIGP1ARSIZE (S_AXI_GP1_ARSIZE[1:0] ),
- .SAXIGP1ARVALID (S_AXI_GP1_ARVALID),
- .SAXIGP1AWADDR (S_AXI_GP1_AWADDR ),
- .SAXIGP1AWBURST (S_AXI_GP1_AWBURST),
- .SAXIGP1AWCACHE (S_AXI_GP1_AWCACHE),
- .SAXIGP1AWID (S_AXI_GP1_AWID_in ),
- .SAXIGP1AWLEN (S_AXI_GP1_AWLEN ),
- .SAXIGP1AWLOCK (S_AXI_GP1_AWLOCK ),
- .SAXIGP1AWPROT (S_AXI_GP1_AWPROT ),
- .SAXIGP1AWQOS (S_AXI_GP1_AWQOS ),
- .SAXIGP1AWSIZE (S_AXI_GP1_AWSIZE[1:0] ),
- .SAXIGP1AWVALID (S_AXI_GP1_AWVALID),
- .SAXIGP1BREADY (S_AXI_GP1_BREADY ),
- .SAXIGP1RREADY (S_AXI_GP1_RREADY ),
- .SAXIGP1WDATA (S_AXI_GP1_WDATA ),
- .SAXIGP1WID (S_AXI_GP1_WID_in ),
- .SAXIGP1WLAST (S_AXI_GP1_WLAST ),
- .SAXIGP1WSTRB (S_AXI_GP1_WSTRB ),
- .SAXIGP1WVALID (S_AXI_GP1_WVALID ),
- .SAXIHP0ACLK (S_AXI_HP0_ACLK_temp ),
- .SAXIHP0ARADDR (S_AXI_HP0_ARADDR),
- .SAXIHP0ARBURST (S_AXI_HP0_ARBURST),
- .SAXIHP0ARCACHE (S_AXI_HP0_ARCACHE),
- .SAXIHP0ARID (S_AXI_HP0_ARID_in),
- .SAXIHP0ARLEN (S_AXI_HP0_ARLEN),
- .SAXIHP0ARLOCK (S_AXI_HP0_ARLOCK),
- .SAXIHP0ARPROT (S_AXI_HP0_ARPROT),
- .SAXIHP0ARQOS (S_AXI_HP0_ARQOS),
- .SAXIHP0ARSIZE (S_AXI_HP0_ARSIZE[1:0]),
- .SAXIHP0ARVALID (S_AXI_HP0_ARVALID),
- .SAXIHP0AWADDR (S_AXI_HP0_AWADDR),
- .SAXIHP0AWBURST (S_AXI_HP0_AWBURST),
- .SAXIHP0AWCACHE (S_AXI_HP0_AWCACHE),
- .SAXIHP0AWID (S_AXI_HP0_AWID_in),
- .SAXIHP0AWLEN (S_AXI_HP0_AWLEN),
- .SAXIHP0AWLOCK (S_AXI_HP0_AWLOCK),
- .SAXIHP0AWPROT (S_AXI_HP0_AWPROT),
- .SAXIHP0AWQOS (S_AXI_HP0_AWQOS),
- .SAXIHP0AWSIZE (S_AXI_HP0_AWSIZE[1:0]),
- .SAXIHP0AWVALID (S_AXI_HP0_AWVALID),
- .SAXIHP0BREADY (S_AXI_HP0_BREADY),
- .SAXIHP0RDISSUECAP1EN (S_AXI_HP0_RDISSUECAP1_EN),
- .SAXIHP0RREADY (S_AXI_HP0_RREADY),
- .SAXIHP0WDATA (S_AXI_HP0_WDATA_in),
- .SAXIHP0WID (S_AXI_HP0_WID_in),
- .SAXIHP0WLAST (S_AXI_HP0_WLAST),
- .SAXIHP0WRISSUECAP1EN (S_AXI_HP0_WRISSUECAP1_EN),
- .SAXIHP0WSTRB (S_AXI_HP0_WSTRB_in),
- .SAXIHP0WVALID (S_AXI_HP0_WVALID),
- .SAXIHP1ACLK (S_AXI_HP1_ACLK_temp),
- .SAXIHP1ARADDR (S_AXI_HP1_ARADDR),
- .SAXIHP1ARBURST (S_AXI_HP1_ARBURST),
- .SAXIHP1ARCACHE (S_AXI_HP1_ARCACHE),
- .SAXIHP1ARID (S_AXI_HP1_ARID_in),
- .SAXIHP1ARLEN (S_AXI_HP1_ARLEN),
- .SAXIHP1ARLOCK (S_AXI_HP1_ARLOCK),
- .SAXIHP1ARPROT (S_AXI_HP1_ARPROT),
- .SAXIHP1ARQOS (S_AXI_HP1_ARQOS),
- .SAXIHP1ARSIZE (S_AXI_HP1_ARSIZE[1:0]),
- .SAXIHP1ARVALID (S_AXI_HP1_ARVALID),
- .SAXIHP1AWADDR (S_AXI_HP1_AWADDR),
- .SAXIHP1AWBURST (S_AXI_HP1_AWBURST),
- .SAXIHP1AWCACHE (S_AXI_HP1_AWCACHE),
- .SAXIHP1AWID (S_AXI_HP1_AWID_in),
- .SAXIHP1AWLEN (S_AXI_HP1_AWLEN),
- .SAXIHP1AWLOCK (S_AXI_HP1_AWLOCK),
- .SAXIHP1AWPROT (S_AXI_HP1_AWPROT),
- .SAXIHP1AWQOS (S_AXI_HP1_AWQOS),
- .SAXIHP1AWSIZE (S_AXI_HP1_AWSIZE[1:0]),
- .SAXIHP1AWVALID (S_AXI_HP1_AWVALID),
- .SAXIHP1BREADY (S_AXI_HP1_BREADY),
- .SAXIHP1RDISSUECAP1EN (S_AXI_HP1_RDISSUECAP1_EN),
- .SAXIHP1RREADY (S_AXI_HP1_RREADY),
- .SAXIHP1WDATA (S_AXI_HP1_WDATA_in),
- .SAXIHP1WID (S_AXI_HP1_WID_in),
- .SAXIHP1WLAST (S_AXI_HP1_WLAST),
- .SAXIHP1WRISSUECAP1EN (S_AXI_HP1_WRISSUECAP1_EN),
- .SAXIHP1WSTRB (S_AXI_HP1_WSTRB_in),
- .SAXIHP1WVALID (S_AXI_HP1_WVALID),
- .SAXIHP2ACLK (S_AXI_HP2_ACLK_temp),
- .SAXIHP2ARADDR (S_AXI_HP2_ARADDR),
- .SAXIHP2ARBURST (S_AXI_HP2_ARBURST),
- .SAXIHP2ARCACHE (S_AXI_HP2_ARCACHE),
- .SAXIHP2ARID (S_AXI_HP2_ARID_in),
- .SAXIHP2ARLEN (S_AXI_HP2_ARLEN),
- .SAXIHP2ARLOCK (S_AXI_HP2_ARLOCK),
- .SAXIHP2ARPROT (S_AXI_HP2_ARPROT),
- .SAXIHP2ARQOS (S_AXI_HP2_ARQOS),
- .SAXIHP2ARSIZE (S_AXI_HP2_ARSIZE[1:0]),
- .SAXIHP2ARVALID (S_AXI_HP2_ARVALID),
- .SAXIHP2AWADDR (S_AXI_HP2_AWADDR),
- .SAXIHP2AWBURST (S_AXI_HP2_AWBURST),
- .SAXIHP2AWCACHE (S_AXI_HP2_AWCACHE),
- .SAXIHP2AWID (S_AXI_HP2_AWID_in),
- .SAXIHP2AWLEN (S_AXI_HP2_AWLEN),
- .SAXIHP2AWLOCK (S_AXI_HP2_AWLOCK),
- .SAXIHP2AWPROT (S_AXI_HP2_AWPROT),
- .SAXIHP2AWQOS (S_AXI_HP2_AWQOS),
- .SAXIHP2AWSIZE (S_AXI_HP2_AWSIZE[1:0]),
- .SAXIHP2AWVALID (S_AXI_HP2_AWVALID),
- .SAXIHP2BREADY (S_AXI_HP2_BREADY),
- .SAXIHP2RDISSUECAP1EN (S_AXI_HP2_RDISSUECAP1_EN),
- .SAXIHP2RREADY (S_AXI_HP2_RREADY),
- .SAXIHP2WDATA (S_AXI_HP2_WDATA_in),
- .SAXIHP2WID (S_AXI_HP2_WID_in),
- .SAXIHP2WLAST (S_AXI_HP2_WLAST),
- .SAXIHP2WRISSUECAP1EN (S_AXI_HP2_WRISSUECAP1_EN),
- .SAXIHP2WSTRB (S_AXI_HP2_WSTRB_in),
- .SAXIHP2WVALID (S_AXI_HP2_WVALID),
- .SAXIHP3ACLK (S_AXI_HP3_ACLK_temp),
- .SAXIHP3ARADDR (S_AXI_HP3_ARADDR ),
- .SAXIHP3ARBURST (S_AXI_HP3_ARBURST),
- .SAXIHP3ARCACHE (S_AXI_HP3_ARCACHE),
- .SAXIHP3ARID (S_AXI_HP3_ARID_in ),
- .SAXIHP3ARLEN (S_AXI_HP3_ARLEN),
- .SAXIHP3ARLOCK (S_AXI_HP3_ARLOCK),
- .SAXIHP3ARPROT (S_AXI_HP3_ARPROT),
- .SAXIHP3ARQOS (S_AXI_HP3_ARQOS),
- .SAXIHP3ARSIZE (S_AXI_HP3_ARSIZE[1:0]),
- .SAXIHP3ARVALID (S_AXI_HP3_ARVALID),
- .SAXIHP3AWADDR (S_AXI_HP3_AWADDR),
- .SAXIHP3AWBURST (S_AXI_HP3_AWBURST),
- .SAXIHP3AWCACHE (S_AXI_HP3_AWCACHE),
- .SAXIHP3AWID (S_AXI_HP3_AWID_in),
- .SAXIHP3AWLEN (S_AXI_HP3_AWLEN),
- .SAXIHP3AWLOCK (S_AXI_HP3_AWLOCK),
- .SAXIHP3AWPROT (S_AXI_HP3_AWPROT),
- .SAXIHP3AWQOS (S_AXI_HP3_AWQOS),
- .SAXIHP3AWSIZE (S_AXI_HP3_AWSIZE[1:0]),
- .SAXIHP3AWVALID (S_AXI_HP3_AWVALID),
- .SAXIHP3BREADY (S_AXI_HP3_BREADY),
- .SAXIHP3RDISSUECAP1EN (S_AXI_HP3_RDISSUECAP1_EN),
- .SAXIHP3RREADY (S_AXI_HP3_RREADY),
- .SAXIHP3WDATA (S_AXI_HP3_WDATA_in),
- .SAXIHP3WID (S_AXI_HP3_WID_in),
- .SAXIHP3WLAST (S_AXI_HP3_WLAST),
- .SAXIHP3WRISSUECAP1EN (S_AXI_HP3_WRISSUECAP1_EN),
- .SAXIHP3WSTRB (S_AXI_HP3_WSTRB_in),
- .SAXIHP3WVALID (S_AXI_HP3_WVALID),
- .DDRA (buffered_DDR_Addr),
- .DDRBA (buffered_DDR_BankAddr),
- .DDRCASB (buffered_DDR_CAS_n),
- .DDRCKE (buffered_DDR_CKE),
- .DDRCKN (buffered_DDR_Clk_n),
- .DDRCKP (buffered_DDR_Clk),
- .DDRCSB (buffered_DDR_CS_n),
- .DDRDM (buffered_DDR_DM),
- .DDRDQ (buffered_DDR_DQ),
- .DDRDQSN (buffered_DDR_DQS_n),
- .DDRDQSP (buffered_DDR_DQS),
- .DDRDRSTB (buffered_DDR_DRSTB),
- .DDRODT (buffered_DDR_ODT),
- .DDRRASB (buffered_DDR_RAS_n),
- .DDRVRN (buffered_DDR_VRN),
- .DDRVRP (buffered_DDR_VRP),
- .DDRWEB (buffered_DDR_WEB),
- .MIO ({buffered_MIO[31:30],dummy[21:20],buffered_MIO[29:28],dummy[19:12],buffered_MIO[27:16],dummy[11:0],buffered_MIO[15:0]}),
- .PSCLK (buffered_PS_CLK),
- .PSPORB (buffered_PS_PORB),
- .PSSRSTB (buffered_PS_SRSTB)
-
-
-);
- end
- else begin
- PS7 PS7_i (
- .DMA0DATYPE (DMA0_DATYPE ),
- .DMA0DAVALID (DMA0_DAVALID),
- .DMA0DRREADY (DMA0_DRREADY),
- .DMA0RSTN (DMA0_RSTN ),
- .DMA1DATYPE (DMA1_DATYPE ),
- .DMA1DAVALID (DMA1_DAVALID),
- .DMA1DRREADY (DMA1_DRREADY),
- .DMA1RSTN (DMA1_RSTN ),
- .DMA2DATYPE (DMA2_DATYPE ),
- .DMA2DAVALID (DMA2_DAVALID),
- .DMA2DRREADY (DMA2_DRREADY),
- .DMA2RSTN (DMA2_RSTN ),
- .DMA3DATYPE (DMA3_DATYPE ),
- .DMA3DAVALID (DMA3_DAVALID),
- .DMA3DRREADY (DMA3_DRREADY),
- .DMA3RSTN (DMA3_RSTN ),
- .EMIOCAN0PHYTX (CAN0_PHY_TX ),
- .EMIOCAN1PHYTX (CAN1_PHY_TX ),
- .EMIOENET0GMIITXD (ENET0_GMII_TXD_i), // (ENET0_GMII_TXD_i ),
- .EMIOENET0GMIITXEN (ENET0_GMII_TX_EN_i), // (ENET0_GMII_TX_EN_i),
- .EMIOENET0GMIITXER (ENET0_GMII_TX_ER_i), // (ENET0_GMII_TX_ER_i),
- .EMIOENET0MDIOMDC (ENET0_MDIO_MDC),
- .EMIOENET0MDIOO (ENET0_MDIO_O ),
- .EMIOENET0MDIOTN (ENET0_MDIO_T_n ),
- .EMIOENET0PTPDELAYREQRX (ENET0_PTP_DELAY_REQ_RX),
- .EMIOENET0PTPDELAYREQTX (ENET0_PTP_DELAY_REQ_TX),
- .EMIOENET0PTPPDELAYREQRX (ENET0_PTP_PDELAY_REQ_RX),
- .EMIOENET0PTPPDELAYREQTX (ENET0_PTP_PDELAY_REQ_TX),
- .EMIOENET0PTPPDELAYRESPRX(ENET0_PTP_PDELAY_RESP_RX),
- .EMIOENET0PTPPDELAYRESPTX(ENET0_PTP_PDELAY_RESP_TX),
- .EMIOENET0PTPSYNCFRAMERX (ENET0_PTP_SYNC_FRAME_RX),
- .EMIOENET0PTPSYNCFRAMETX (ENET0_PTP_SYNC_FRAME_TX),
- .EMIOENET0SOFRX (ENET0_SOF_RX),
- .EMIOENET0SOFTX (ENET0_SOF_TX),
- .EMIOENET1GMIITXD (ENET1_GMII_TXD_i), // (ENET1_GMII_TXD_i),
- .EMIOENET1GMIITXEN (ENET1_GMII_TX_EN_i), // (ENET1_GMII_TX_EN_i),
- .EMIOENET1GMIITXER (ENET1_GMII_TX_ER_i), // (ENET1_GMII_TX_ER_i),
- .EMIOENET1MDIOMDC (ENET1_MDIO_MDC),
- .EMIOENET1MDIOO (ENET1_MDIO_O ),
- .EMIOENET1MDIOTN (ENET1_MDIO_T_n),
- .EMIOENET1PTPDELAYREQRX (ENET1_PTP_DELAY_REQ_RX),
- .EMIOENET1PTPDELAYREQTX (ENET1_PTP_DELAY_REQ_TX),
- .EMIOENET1PTPPDELAYREQRX (ENET1_PTP_PDELAY_REQ_RX),
- .EMIOENET1PTPPDELAYREQTX (ENET1_PTP_PDELAY_REQ_TX),
- .EMIOENET1PTPPDELAYRESPRX(ENET1_PTP_PDELAY_RESP_RX),
- .EMIOENET1PTPPDELAYRESPTX(ENET1_PTP_PDELAY_RESP_TX),
- .EMIOENET1PTPSYNCFRAMERX (ENET1_PTP_SYNC_FRAME_RX),
- .EMIOENET1PTPSYNCFRAMETX (ENET1_PTP_SYNC_FRAME_TX),
- .EMIOENET1SOFRX (ENET1_SOF_RX),
- .EMIOENET1SOFTX (ENET1_SOF_TX),
- .EMIOGPIOO (gpio_out),
- .EMIOGPIOTN (gpio_out_t_n),
- .EMIOI2C0SCLO (I2C0_SCL_O),
- .EMIOI2C0SCLTN (I2C0_SCL_T_n),
- .EMIOI2C0SDAO (I2C0_SDA_O),
- .EMIOI2C0SDATN (I2C0_SDA_T_n),
- .EMIOI2C1SCLO (I2C1_SCL_O),
- .EMIOI2C1SCLTN (I2C1_SCL_T_n),
- .EMIOI2C1SDAO (I2C1_SDA_O),
- .EMIOI2C1SDATN (I2C1_SDA_T_n),
- .EMIOPJTAGTDO (PJTAG_TDO_O),
- .EMIOPJTAGTDTN (PJTAG_TDO_T_n),
- .EMIOSDIO0BUSPOW (SDIO0_BUSPOW),
- .EMIOSDIO0CLK (SDIO0_CLK ),
- .EMIOSDIO0CMDO (SDIO0_CMD_O ),
- .EMIOSDIO0CMDTN (SDIO0_CMD_T_n ),
- .EMIOSDIO0DATAO (SDIO0_DATA_O),
- .EMIOSDIO0DATATN (SDIO0_DATA_T_n),
- .EMIOSDIO0LED (SDIO0_LED),
- .EMIOSDIO1BUSPOW (SDIO1_BUSPOW),
- .EMIOSDIO1CLK (SDIO1_CLK ),
- .EMIOSDIO1CMDO (SDIO1_CMD_O ),
- .EMIOSDIO1CMDTN (SDIO1_CMD_T_n ),
- .EMIOSDIO1DATAO (SDIO1_DATA_O),
- .EMIOSDIO1DATATN (SDIO1_DATA_T_n),
- .EMIOSDIO1LED (SDIO1_LED),
- .EMIOSPI0MO (SPI0_MOSI_O),
- .EMIOSPI0MOTN (SPI0_MOSI_T_n),
- .EMIOSPI0SCLKO (SPI0_SCLK_O),
- .EMIOSPI0SCLKTN (SPI0_SCLK_T_n),
- .EMIOSPI0SO (SPI0_MISO_O),
- .EMIOSPI0STN (SPI0_MISO_T_n),
- .EMIOSPI0SSON ({SPI0_SS2_O,SPI0_SS1_O,SPI0_SS_O}),
- .EMIOSPI0SSNTN (SPI0_SS_T_n),
- .EMIOSPI1MO (SPI1_MOSI_O),
- .EMIOSPI1MOTN (SPI1_MOSI_T_n),
- .EMIOSPI1SCLKO (SPI1_SCLK_O),
- .EMIOSPI1SCLKTN (SPI1_SCLK_T_n),
- .EMIOSPI1SO (SPI1_MISO_O),
- .EMIOSPI1STN (SPI1_MISO_T_n),
- .EMIOSPI1SSON ({SPI1_SS2_O,SPI1_SS1_O,SPI1_SS_O}),
- .EMIOSPI1SSNTN (SPI1_SS_T_n),
- .EMIOTRACECTL (TRACE_CTL_i),
- .EMIOTRACEDATA (TRACE_DATA_i),
- .EMIOTTC0WAVEO ({TTC0_WAVE2_OUT,TTC0_WAVE1_OUT,TTC0_WAVE0_OUT}),
- .EMIOTTC1WAVEO ({TTC1_WAVE2_OUT,TTC1_WAVE1_OUT,TTC1_WAVE0_OUT}),
- .EMIOUART0DTRN (UART0_DTRN),
- .EMIOUART0RTSN (UART0_RTSN),
- .EMIOUART0TX (UART0_TX ),
- .EMIOUART1DTRN (UART1_DTRN),
- .EMIOUART1RTSN (UART1_RTSN),
- .EMIOUART1TX (UART1_TX ),
- .EMIOUSB0PORTINDCTL (USB0_PORT_INDCTL),
- .EMIOUSB0VBUSPWRSELECT (USB0_VBUS_PWRSELECT),
- .EMIOUSB1PORTINDCTL (USB1_PORT_INDCTL),
- .EMIOUSB1VBUSPWRSELECT (USB1_VBUS_PWRSELECT),
- .EMIOWDTRSTO (WDT_RST_OUT),
- .EVENTEVENTO (EVENT_EVENTO),
- .EVENTSTANDBYWFE (EVENT_STANDBYWFE),
- .EVENTSTANDBYWFI (EVENT_STANDBYWFI),
- .FCLKCLK (FCLK_CLK_unbuffered),
- .FCLKRESETN ({FCLK_RESET3_N,FCLK_RESET2_N,FCLK_RESET1_N,FCLK_RESET0_N}),
- .EMIOSDIO0BUSVOLT (SDIO0_BUSVOLT),
- .EMIOSDIO1BUSVOLT (SDIO1_BUSVOLT),
- .FTMTF2PTRIGACK ({FTMT_F2P_TRIGACK_3,FTMT_F2P_TRIGACK_2,FTMT_F2P_TRIGACK_1,FTMT_F2P_TRIGACK_0}),
- .FTMTP2FDEBUG (FTMT_P2F_DEBUG ),
- .FTMTP2FTRIG ({FTMT_P2F_TRIG_3,FTMT_P2F_TRIG_2,FTMT_P2F_TRIG_1,FTMT_P2F_TRIG_0}),
- .IRQP2F ({IRQ_P2F_DMAC_ABORT, IRQ_P2F_DMAC7, IRQ_P2F_DMAC6, IRQ_P2F_DMAC5, IRQ_P2F_DMAC4, IRQ_P2F_DMAC3, IRQ_P2F_DMAC2, IRQ_P2F_DMAC1, IRQ_P2F_DMAC0, IRQ_P2F_SMC, IRQ_P2F_QSPI, IRQ_P2F_CTI, IRQ_P2F_GPIO, IRQ_P2F_USB0, IRQ_P2F_ENET0, IRQ_P2F_ENET_WAKE0, IRQ_P2F_SDIO0, IRQ_P2F_I2C0, IRQ_P2F_SPI0, IRQ_P2F_UART0, IRQ_P2F_CAN0, IRQ_P2F_USB1, IRQ_P2F_ENET1, IRQ_P2F_ENET_WAKE1, IRQ_P2F_SDIO1, IRQ_P2F_I2C1, IRQ_P2F_SPI1, IRQ_P2F_UART1, IRQ_P2F_CAN1}),
- .MAXIGP0ARADDR (M_AXI_GP0_ARADDR),
- .MAXIGP0ARBURST (M_AXI_GP0_ARBURST),
- .MAXIGP0ARCACHE (M_AXI_GP0_ARCACHE_t),
- .MAXIGP0ARESETN (M_AXI_GP0_ARESETN),
- .MAXIGP0ARID (M_AXI_GP0_ARID_FULL ),
- .MAXIGP0ARLEN (M_AXI_GP0_ARLEN ),
- .MAXIGP0ARLOCK (M_AXI_GP0_ARLOCK ),
- .MAXIGP0ARPROT (M_AXI_GP0_ARPROT ),
- .MAXIGP0ARQOS (M_AXI_GP0_ARQOS ),
- .MAXIGP0ARSIZE (M_AXI_GP0_ARSIZE_i ),
- .MAXIGP0ARVALID (M_AXI_GP0_ARVALID),
- .MAXIGP0AWADDR (M_AXI_GP0_AWADDR ),
- .MAXIGP0AWBURST (M_AXI_GP0_AWBURST),
- .MAXIGP0AWCACHE (M_AXI_GP0_AWCACHE_t),
- .MAXIGP0AWID (M_AXI_GP0_AWID_FULL ),
- .MAXIGP0AWLEN (M_AXI_GP0_AWLEN ),
- .MAXIGP0AWLOCK (M_AXI_GP0_AWLOCK ),
- .MAXIGP0AWPROT (M_AXI_GP0_AWPROT ),
- .MAXIGP0AWQOS (M_AXI_GP0_AWQOS ),
- .MAXIGP0AWSIZE (M_AXI_GP0_AWSIZE_i ),
- .MAXIGP0AWVALID (M_AXI_GP0_AWVALID),
- .MAXIGP0BREADY (M_AXI_GP0_BREADY ),
- .MAXIGP0RREADY (M_AXI_GP0_RREADY ),
- .MAXIGP0WDATA (M_AXI_GP0_WDATA ),
- .MAXIGP0WID (M_AXI_GP0_WID_FULL ),
- .MAXIGP0WLAST (M_AXI_GP0_WLAST ),
- .MAXIGP0WSTRB (M_AXI_GP0_WSTRB ),
- .MAXIGP0WVALID (M_AXI_GP0_WVALID ),
- .MAXIGP1ARADDR (M_AXI_GP1_ARADDR ),
- .MAXIGP1ARBURST (M_AXI_GP1_ARBURST),
- .MAXIGP1ARCACHE (M_AXI_GP1_ARCACHE_t),
- .MAXIGP1ARESETN (M_AXI_GP1_ARESETN),
- .MAXIGP1ARID (M_AXI_GP1_ARID_FULL ),
- .MAXIGP1ARLEN (M_AXI_GP1_ARLEN ),
- .MAXIGP1ARLOCK (M_AXI_GP1_ARLOCK ),
- .MAXIGP1ARPROT (M_AXI_GP1_ARPROT ),
- .MAXIGP1ARQOS (M_AXI_GP1_ARQOS ),
- .MAXIGP1ARSIZE (M_AXI_GP1_ARSIZE_i ),
- .MAXIGP1ARVALID (M_AXI_GP1_ARVALID),
- .MAXIGP1AWADDR (M_AXI_GP1_AWADDR ),
- .MAXIGP1AWBURST (M_AXI_GP1_AWBURST),
- .MAXIGP1AWCACHE (M_AXI_GP1_AWCACHE_t),
- .MAXIGP1AWID (M_AXI_GP1_AWID_FULL ),
- .MAXIGP1AWLEN (M_AXI_GP1_AWLEN ),
- .MAXIGP1AWLOCK (M_AXI_GP1_AWLOCK ),
- .MAXIGP1AWPROT (M_AXI_GP1_AWPROT ),
- .MAXIGP1AWQOS (M_AXI_GP1_AWQOS ),
- .MAXIGP1AWSIZE (M_AXI_GP1_AWSIZE_i ),
- .MAXIGP1AWVALID (M_AXI_GP1_AWVALID),
- .MAXIGP1BREADY (M_AXI_GP1_BREADY ),
- .MAXIGP1RREADY (M_AXI_GP1_RREADY ),
- .MAXIGP1WDATA (M_AXI_GP1_WDATA ),
- .MAXIGP1WID (M_AXI_GP1_WID_FULL ),
- .MAXIGP1WLAST (M_AXI_GP1_WLAST ),
- .MAXIGP1WSTRB (M_AXI_GP1_WSTRB ),
- .MAXIGP1WVALID (M_AXI_GP1_WVALID ),
- .SAXIACPARESETN (S_AXI_ACP_ARESETN),
- .SAXIACPARREADY (SAXIACPARREADY_W),
- .SAXIACPAWREADY (SAXIACPAWREADY_W),
- .SAXIACPBID (S_AXI_ACP_BID_out ),
- .SAXIACPBRESP (SAXIACPBRESP_W ),
- .SAXIACPBVALID (SAXIACPBVALID_W ),
- .SAXIACPRDATA (SAXIACPRDATA_W ),
- .SAXIACPRID (S_AXI_ACP_RID_out),
- .SAXIACPRLAST (SAXIACPRLAST_W ),
- .SAXIACPRRESP (SAXIACPRRESP_W ),
- .SAXIACPRVALID (SAXIACPRVALID_W ),
- .SAXIACPWREADY (SAXIACPWREADY_W ),
- .SAXIGP0ARESETN (S_AXI_GP0_ARESETN),
- .SAXIGP0ARREADY (S_AXI_GP0_ARREADY),
- .SAXIGP0AWREADY (S_AXI_GP0_AWREADY),
- .SAXIGP0BID (S_AXI_GP0_BID_out),
- .SAXIGP0BRESP (S_AXI_GP0_BRESP ),
- .SAXIGP0BVALID (S_AXI_GP0_BVALID ),
- .SAXIGP0RDATA (S_AXI_GP0_RDATA ),
- .SAXIGP0RID (S_AXI_GP0_RID_out ),
- .SAXIGP0RLAST (S_AXI_GP0_RLAST ),
- .SAXIGP0RRESP (S_AXI_GP0_RRESP ),
- .SAXIGP0RVALID (S_AXI_GP0_RVALID ),
- .SAXIGP0WREADY (S_AXI_GP0_WREADY ),
- .SAXIGP1ARESETN (S_AXI_GP1_ARESETN),
- .SAXIGP1ARREADY (S_AXI_GP1_ARREADY),
- .SAXIGP1AWREADY (S_AXI_GP1_AWREADY),
- .SAXIGP1BID (S_AXI_GP1_BID_out ),
- .SAXIGP1BRESP (S_AXI_GP1_BRESP ),
- .SAXIGP1BVALID (S_AXI_GP1_BVALID ),
- .SAXIGP1RDATA (S_AXI_GP1_RDATA ),
- .SAXIGP1RID (S_AXI_GP1_RID_out ),
- .SAXIGP1RLAST (S_AXI_GP1_RLAST ),
- .SAXIGP1RRESP (S_AXI_GP1_RRESP ),
- .SAXIGP1RVALID (S_AXI_GP1_RVALID ),
- .SAXIGP1WREADY (S_AXI_GP1_WREADY ),
- .SAXIHP0ARESETN (S_AXI_HP0_ARESETN),
- .SAXIHP0ARREADY (S_AXI_HP0_ARREADY),
- .SAXIHP0AWREADY (S_AXI_HP0_AWREADY),
- .SAXIHP0BID (S_AXI_HP0_BID_out ),
- .SAXIHP0BRESP (S_AXI_HP0_BRESP ),
- .SAXIHP0BVALID (S_AXI_HP0_BVALID ),
- .SAXIHP0RACOUNT (S_AXI_HP0_RACOUNT),
- .SAXIHP0RCOUNT (S_AXI_HP0_RCOUNT),
- .SAXIHP0RDATA (S_AXI_HP0_RDATA_out),
- .SAXIHP0RID (S_AXI_HP0_RID_out ),
- .SAXIHP0RLAST (S_AXI_HP0_RLAST),
- .SAXIHP0RRESP (S_AXI_HP0_RRESP),
- .SAXIHP0RVALID (S_AXI_HP0_RVALID),
- .SAXIHP0WCOUNT (S_AXI_HP0_WCOUNT),
- .SAXIHP0WACOUNT (S_AXI_HP0_WACOUNT),
- .SAXIHP0WREADY (S_AXI_HP0_WREADY),
- .SAXIHP1ARESETN (S_AXI_HP1_ARESETN),
- .SAXIHP1ARREADY (S_AXI_HP1_ARREADY),
- .SAXIHP1AWREADY (S_AXI_HP1_AWREADY),
- .SAXIHP1BID (S_AXI_HP1_BID_out ),
- .SAXIHP1BRESP (S_AXI_HP1_BRESP ),
- .SAXIHP1BVALID (S_AXI_HP1_BVALID ),
- .SAXIHP1RACOUNT (S_AXI_HP1_RACOUNT ),
- .SAXIHP1RCOUNT (S_AXI_HP1_RCOUNT ),
- .SAXIHP1RDATA (S_AXI_HP1_RDATA_out),
- .SAXIHP1RID (S_AXI_HP1_RID_out ),
- .SAXIHP1RLAST (S_AXI_HP1_RLAST ),
- .SAXIHP1RRESP (S_AXI_HP1_RRESP ),
- .SAXIHP1RVALID (S_AXI_HP1_RVALID),
- .SAXIHP1WACOUNT (S_AXI_HP1_WACOUNT),
- .SAXIHP1WCOUNT (S_AXI_HP1_WCOUNT),
- .SAXIHP1WREADY (S_AXI_HP1_WREADY),
- .SAXIHP2ARESETN (S_AXI_HP2_ARESETN),
- .SAXIHP2ARREADY (S_AXI_HP2_ARREADY),
- .SAXIHP2AWREADY (S_AXI_HP2_AWREADY),
- .SAXIHP2BID (S_AXI_HP2_BID_out ),
- .SAXIHP2BRESP (S_AXI_HP2_BRESP),
- .SAXIHP2BVALID (S_AXI_HP2_BVALID),
- .SAXIHP2RACOUNT (S_AXI_HP2_RACOUNT),
- .SAXIHP2RCOUNT (S_AXI_HP2_RCOUNT),
- .SAXIHP2RDATA (S_AXI_HP2_RDATA_out),
- .SAXIHP2RID (S_AXI_HP2_RID_out ),
- .SAXIHP2RLAST (S_AXI_HP2_RLAST),
- .SAXIHP2RRESP (S_AXI_HP2_RRESP),
- .SAXIHP2RVALID (S_AXI_HP2_RVALID),
- .SAXIHP2WACOUNT (S_AXI_HP2_WACOUNT),
- .SAXIHP2WCOUNT (S_AXI_HP2_WCOUNT),
- .SAXIHP2WREADY (S_AXI_HP2_WREADY),
- .SAXIHP3ARESETN (S_AXI_HP3_ARESETN),
- .SAXIHP3ARREADY (S_AXI_HP3_ARREADY),
- .SAXIHP3AWREADY (S_AXI_HP3_AWREADY),
- .SAXIHP3BID (S_AXI_HP3_BID_out),
- .SAXIHP3BRESP (S_AXI_HP3_BRESP),
- .SAXIHP3BVALID (S_AXI_HP3_BVALID),
- .SAXIHP3RACOUNT (S_AXI_HP3_RACOUNT),
- .SAXIHP3RCOUNT (S_AXI_HP3_RCOUNT),
- .SAXIHP3RDATA (S_AXI_HP3_RDATA_out),
- .SAXIHP3RID (S_AXI_HP3_RID_out),
- .SAXIHP3RLAST (S_AXI_HP3_RLAST),
- .SAXIHP3RRESP (S_AXI_HP3_RRESP),
- .SAXIHP3RVALID (S_AXI_HP3_RVALID),
- .SAXIHP3WCOUNT (S_AXI_HP3_WCOUNT),
- .SAXIHP3WACOUNT (S_AXI_HP3_WACOUNT),
- .SAXIHP3WREADY (S_AXI_HP3_WREADY),
- .DDRARB (DDR_ARB),
- .DMA0ACLK (DMA0_ACLK ),
- .DMA0DAREADY (DMA0_DAREADY),
- .DMA0DRLAST (DMA0_DRLAST ),
- .DMA0DRTYPE (DMA0_DRTYPE),
- .DMA0DRVALID (DMA0_DRVALID),
- .DMA1ACLK (DMA1_ACLK ),
- .DMA1DAREADY (DMA1_DAREADY),
- .DMA1DRLAST (DMA1_DRLAST ),
- .DMA1DRTYPE (DMA1_DRTYPE),
- .DMA1DRVALID (DMA1_DRVALID),
- .DMA2ACLK (DMA2_ACLK ),
- .DMA2DAREADY (DMA2_DAREADY),
- .DMA2DRLAST (DMA2_DRLAST ),
- .DMA2DRTYPE (DMA2_DRTYPE),
- .DMA2DRVALID (DMA2_DRVALID),
- .DMA3ACLK (DMA3_ACLK ),
- .DMA3DAREADY (DMA3_DAREADY),
- .DMA3DRLAST (DMA3_DRLAST ),
- .DMA3DRTYPE (DMA3_DRTYPE),
- .DMA3DRVALID (DMA3_DRVALID),
- .EMIOCAN0PHYRX (CAN0_PHY_RX),
- .EMIOCAN1PHYRX (CAN1_PHY_RX),
- .EMIOENET0EXTINTIN (ENET0_EXT_INTIN),
- .EMIOENET0GMIICOL (ENET0_GMII_COL_i),
- .EMIOENET0GMIICRS (ENET0_GMII_CRS_i),
- .EMIOENET0GMIIRXCLK (ENET0_GMII_RX_CLK),
- .EMIOENET0GMIIRXD (ENET0_GMII_RXD_i),
- .EMIOENET0GMIIRXDV (ENET0_GMII_RX_DV_i),
- .EMIOENET0GMIIRXER (ENET0_GMII_RX_ER_i),
- .EMIOENET0GMIITXCLK (ENET0_GMII_TX_CLK),
- .EMIOENET0MDIOI (ENET0_MDIO_I),
- .EMIOENET1EXTINTIN (ENET1_EXT_INTIN),
- .EMIOENET1GMIICOL (ENET1_GMII_COL_i),
- .EMIOENET1GMIICRS (ENET1_GMII_CRS_i),
- .EMIOENET1GMIIRXCLK (ENET1_GMII_RX_CLK),
- .EMIOENET1GMIIRXD (ENET1_GMII_RXD_i),
- .EMIOENET1GMIIRXDV (ENET1_GMII_RX_DV_i),
- .EMIOENET1GMIIRXER (ENET1_GMII_RX_ER_i),
- .EMIOENET1GMIITXCLK (ENET1_GMII_TX_CLK),
- .EMIOENET1MDIOI (ENET1_MDIO_I),
- .EMIOGPIOI (gpio_in63_0 ),
- .EMIOI2C0SCLI (I2C0_SCL_I),
- .EMIOI2C0SDAI (I2C0_SDA_I),
- .EMIOI2C1SCLI (I2C1_SCL_I),
- .EMIOI2C1SDAI (I2C1_SDA_I),
- .EMIOPJTAGTCK (PJTAG_TCK),
- .EMIOPJTAGTDI (PJTAG_TDI),
- .EMIOPJTAGTMS (PJTAG_TMS),
- .EMIOSDIO0CDN (SDIO0_CDN),
- .EMIOSDIO0CLKFB (SDIO0_CLK_FB ),
- .EMIOSDIO0CMDI (SDIO0_CMD_I ),
- .EMIOSDIO0DATAI (SDIO0_DATA_I ),
- .EMIOSDIO0WP (SDIO0_WP),
- .EMIOSDIO1CDN (SDIO1_CDN),
- .EMIOSDIO1CLKFB (SDIO1_CLK_FB ),
- .EMIOSDIO1CMDI (SDIO1_CMD_I ),
- .EMIOSDIO1DATAI (SDIO1_DATA_I ),
- .EMIOSDIO1WP (SDIO1_WP),
- .EMIOSPI0MI (SPI0_MISO_I),
- .EMIOSPI0SCLKI (SPI0_SCLK_I),
- .EMIOSPI0SI (SPI0_MOSI_I),
- .EMIOSPI0SSIN (SPI0_SS_I),
- .EMIOSPI1MI (SPI1_MISO_I),
- .EMIOSPI1SCLKI (SPI1_SCLK_I),
- .EMIOSPI1SI (SPI1_MOSI_I),
- .EMIOSPI1SSIN (SPI1_SS_I),
- .EMIOSRAMINTIN (SRAM_INTIN),
- .EMIOTRACECLK (TRACE_CLK),
- .EMIOTTC0CLKI ({TTC0_CLK2_IN, TTC0_CLK1_IN, TTC0_CLK0_IN}),
- .EMIOTTC1CLKI ({TTC1_CLK2_IN, TTC1_CLK1_IN, TTC1_CLK0_IN}),
- .EMIOUART0CTSN (UART0_CTSN),
- .EMIOUART0DCDN (UART0_DCDN),
- .EMIOUART0DSRN (UART0_DSRN),
- .EMIOUART0RIN (UART0_RIN ),
- .EMIOUART0RX (UART0_RX ),
- .EMIOUART1CTSN (UART1_CTSN),
- .EMIOUART1DCDN (UART1_DCDN),
- .EMIOUART1DSRN (UART1_DSRN),
- .EMIOUART1RIN (UART1_RIN ),
- .EMIOUART1RX (UART1_RX ),
- .EMIOUSB0VBUSPWRFAULT (USB0_VBUS_PWRFAULT),
- .EMIOUSB1VBUSPWRFAULT (USB1_VBUS_PWRFAULT),
- .EMIOWDTCLKI (WDT_CLK_IN),
- .EVENTEVENTI (EVENT_EVENTI),
- .FCLKCLKTRIGN (fclk_clktrig_gnd),
- .FPGAIDLEN (FPGA_IDLE_N),
- .FTMDTRACEINATID (FTMD_TRACEIN_ATID_i),
- .FTMDTRACEINCLOCK (FTMD_TRACEIN_CLK),
- .FTMDTRACEINDATA (FTMD_TRACEIN_DATA_i),
- .FTMDTRACEINVALID (FTMD_TRACEIN_VALID_i),
- .FTMTF2PDEBUG (FTMT_F2P_DEBUG ),
- .FTMTF2PTRIG ({FTMT_F2P_TRIG_3,FTMT_F2P_TRIG_2,FTMT_F2P_TRIG_1,FTMT_F2P_TRIG_0}),
- .FTMTP2FTRIGACK ({FTMT_P2F_TRIGACK_3,FTMT_P2F_TRIGACK_2,FTMT_P2F_TRIGACK_1,FTMT_P2F_TRIGACK_0}),
- .IRQF2P (irq_f2p_i),
- .MAXIGP0ACLK (M_AXI_GP0_ACLK_temp),
- .MAXIGP0ARREADY (M_AXI_GP0_ARREADY),
- .MAXIGP0AWREADY (M_AXI_GP0_AWREADY),
- .MAXIGP0BID (M_AXI_GP0_BID_FULL ),
- .MAXIGP0BRESP (M_AXI_GP0_BRESP ),
- .MAXIGP0BVALID (M_AXI_GP0_BVALID ),
- .MAXIGP0RDATA (M_AXI_GP0_RDATA ),
- .MAXIGP0RID (M_AXI_GP0_RID_FULL ),
- .MAXIGP0RLAST (M_AXI_GP0_RLAST ),
- .MAXIGP0RRESP (M_AXI_GP0_RRESP ),
- .MAXIGP0RVALID (M_AXI_GP0_RVALID ),
- .MAXIGP0WREADY (M_AXI_GP0_WREADY ),
- .MAXIGP1ACLK (M_AXI_GP1_ACLK_temp ),
- .MAXIGP1ARREADY (M_AXI_GP1_ARREADY),
- .MAXIGP1AWREADY (M_AXI_GP1_AWREADY),
- .MAXIGP1BID (M_AXI_GP1_BID_FULL ),
- .MAXIGP1BRESP (M_AXI_GP1_BRESP ),
- .MAXIGP1BVALID (M_AXI_GP1_BVALID ),
- .MAXIGP1RDATA (M_AXI_GP1_RDATA ),
- .MAXIGP1RID (M_AXI_GP1_RID_FULL ),
- .MAXIGP1RLAST (M_AXI_GP1_RLAST ),
- .MAXIGP1RRESP (M_AXI_GP1_RRESP ),
- .MAXIGP1RVALID (M_AXI_GP1_RVALID ),
- .MAXIGP1WREADY (M_AXI_GP1_WREADY ),
- .SAXIACPACLK (S_AXI_ACP_ACLK_temp),
- .SAXIACPARADDR (SAXIACPARADDR_W ),
- .SAXIACPARBURST (SAXIACPARBURST_W),
- .SAXIACPARCACHE (SAXIACPARCACHE_W),
- .SAXIACPARID (S_AXI_ACP_ARID_in ),
- .SAXIACPARLEN (SAXIACPARLEN_W ),
- .SAXIACPARLOCK (SAXIACPARLOCK_W ),
- .SAXIACPARPROT (SAXIACPARPROT_W ),
- .SAXIACPARQOS (S_AXI_ACP_ARQOS ),
- .SAXIACPARSIZE (SAXIACPARSIZE_W[1:0] ),
- .SAXIACPARUSER (SAXIACPARUSER_W ),
- .SAXIACPARVALID (SAXIACPARVALID_W),
- .SAXIACPAWADDR (SAXIACPAWADDR_W ),
- .SAXIACPAWBURST (SAXIACPAWBURST_W),
- .SAXIACPAWCACHE (SAXIACPAWCACHE_W),
- .SAXIACPAWID (S_AXI_ACP_AWID_in ),
- .SAXIACPAWLEN (SAXIACPAWLEN_W ),
- .SAXIACPAWLOCK (SAXIACPAWLOCK_W ),
- .SAXIACPAWPROT (SAXIACPAWPROT_W ),
- .SAXIACPAWQOS (S_AXI_ACP_AWQOS ),
- .SAXIACPAWSIZE (SAXIACPAWSIZE_W[1:0] ),
- .SAXIACPAWUSER (SAXIACPAWUSER_W ),
- .SAXIACPAWVALID (SAXIACPAWVALID_W),
- .SAXIACPBREADY (SAXIACPBREADY_W ),
- .SAXIACPRREADY (SAXIACPRREADY_W ),
- .SAXIACPWDATA (SAXIACPWDATA_W ),
- .SAXIACPWID (S_AXI_ACP_WID_in ),
- .SAXIACPWLAST (SAXIACPWLAST_W ),
- .SAXIACPWSTRB (SAXIACPWSTRB_W ),
- .SAXIACPWVALID (SAXIACPWVALID_W ),
- .SAXIGP0ACLK (S_AXI_GP0_ACLK_temp ),
- .SAXIGP0ARADDR (S_AXI_GP0_ARADDR ),
- .SAXIGP0ARBURST (S_AXI_GP0_ARBURST),
- .SAXIGP0ARCACHE (S_AXI_GP0_ARCACHE),
- .SAXIGP0ARID (S_AXI_GP0_ARID_in ),
- .SAXIGP0ARLEN (S_AXI_GP0_ARLEN ),
- .SAXIGP0ARLOCK (S_AXI_GP0_ARLOCK ),
- .SAXIGP0ARPROT (S_AXI_GP0_ARPROT ),
- .SAXIGP0ARQOS (S_AXI_GP0_ARQOS ),
- .SAXIGP0ARSIZE (S_AXI_GP0_ARSIZE[1:0] ),
- .SAXIGP0ARVALID (S_AXI_GP0_ARVALID),
- .SAXIGP0AWADDR (S_AXI_GP0_AWADDR ),
- .SAXIGP0AWBURST (S_AXI_GP0_AWBURST),
- .SAXIGP0AWCACHE (S_AXI_GP0_AWCACHE),
- .SAXIGP0AWID (S_AXI_GP0_AWID_in ),
- .SAXIGP0AWLEN (S_AXI_GP0_AWLEN ),
- .SAXIGP0AWLOCK (S_AXI_GP0_AWLOCK ),
- .SAXIGP0AWPROT (S_AXI_GP0_AWPROT ),
- .SAXIGP0AWQOS (S_AXI_GP0_AWQOS ),
- .SAXIGP0AWSIZE (S_AXI_GP0_AWSIZE[1:0] ),
- .SAXIGP0AWVALID (S_AXI_GP0_AWVALID),
- .SAXIGP0BREADY (S_AXI_GP0_BREADY ),
- .SAXIGP0RREADY (S_AXI_GP0_RREADY ),
- .SAXIGP0WDATA (S_AXI_GP0_WDATA ),
- .SAXIGP0WID (S_AXI_GP0_WID_in ),
- .SAXIGP0WLAST (S_AXI_GP0_WLAST ),
- .SAXIGP0WSTRB (S_AXI_GP0_WSTRB ),
- .SAXIGP0WVALID (S_AXI_GP0_WVALID ),
- .SAXIGP1ACLK (S_AXI_GP1_ACLK_temp ),
- .SAXIGP1ARADDR (S_AXI_GP1_ARADDR ),
- .SAXIGP1ARBURST (S_AXI_GP1_ARBURST),
- .SAXIGP1ARCACHE (S_AXI_GP1_ARCACHE),
- .SAXIGP1ARID (S_AXI_GP1_ARID_in ),
- .SAXIGP1ARLEN (S_AXI_GP1_ARLEN ),
- .SAXIGP1ARLOCK (S_AXI_GP1_ARLOCK ),
- .SAXIGP1ARPROT (S_AXI_GP1_ARPROT ),
- .SAXIGP1ARQOS (S_AXI_GP1_ARQOS ),
- .SAXIGP1ARSIZE (S_AXI_GP1_ARSIZE[1:0] ),
- .SAXIGP1ARVALID (S_AXI_GP1_ARVALID),
- .SAXIGP1AWADDR (S_AXI_GP1_AWADDR ),
- .SAXIGP1AWBURST (S_AXI_GP1_AWBURST),
- .SAXIGP1AWCACHE (S_AXI_GP1_AWCACHE),
- .SAXIGP1AWID (S_AXI_GP1_AWID_in ),
- .SAXIGP1AWLEN (S_AXI_GP1_AWLEN ),
- .SAXIGP1AWLOCK (S_AXI_GP1_AWLOCK ),
- .SAXIGP1AWPROT (S_AXI_GP1_AWPROT ),
- .SAXIGP1AWQOS (S_AXI_GP1_AWQOS ),
- .SAXIGP1AWSIZE (S_AXI_GP1_AWSIZE[1:0] ),
- .SAXIGP1AWVALID (S_AXI_GP1_AWVALID),
- .SAXIGP1BREADY (S_AXI_GP1_BREADY ),
- .SAXIGP1RREADY (S_AXI_GP1_RREADY ),
- .SAXIGP1WDATA (S_AXI_GP1_WDATA ),
- .SAXIGP1WID (S_AXI_GP1_WID_in ),
- .SAXIGP1WLAST (S_AXI_GP1_WLAST ),
- .SAXIGP1WSTRB (S_AXI_GP1_WSTRB ),
- .SAXIGP1WVALID (S_AXI_GP1_WVALID ),
- .SAXIHP0ACLK (S_AXI_HP0_ACLK_temp ),
- .SAXIHP0ARADDR (S_AXI_HP0_ARADDR),
- .SAXIHP0ARBURST (S_AXI_HP0_ARBURST),
- .SAXIHP0ARCACHE (S_AXI_HP0_ARCACHE),
- .SAXIHP0ARID (S_AXI_HP0_ARID_in),
- .SAXIHP0ARLEN (S_AXI_HP0_ARLEN),
- .SAXIHP0ARLOCK (S_AXI_HP0_ARLOCK),
- .SAXIHP0ARPROT (S_AXI_HP0_ARPROT),
- .SAXIHP0ARQOS (S_AXI_HP0_ARQOS),
- .SAXIHP0ARSIZE (S_AXI_HP0_ARSIZE[1:0]),
- .SAXIHP0ARVALID (S_AXI_HP0_ARVALID),
- .SAXIHP0AWADDR (S_AXI_HP0_AWADDR),
- .SAXIHP0AWBURST (S_AXI_HP0_AWBURST),
- .SAXIHP0AWCACHE (S_AXI_HP0_AWCACHE),
- .SAXIHP0AWID (S_AXI_HP0_AWID_in),
- .SAXIHP0AWLEN (S_AXI_HP0_AWLEN),
- .SAXIHP0AWLOCK (S_AXI_HP0_AWLOCK),
- .SAXIHP0AWPROT (S_AXI_HP0_AWPROT),
- .SAXIHP0AWQOS (S_AXI_HP0_AWQOS),
- .SAXIHP0AWSIZE (S_AXI_HP0_AWSIZE[1:0]),
- .SAXIHP0AWVALID (S_AXI_HP0_AWVALID),
- .SAXIHP0BREADY (S_AXI_HP0_BREADY),
- .SAXIHP0RDISSUECAP1EN (S_AXI_HP0_RDISSUECAP1_EN),
- .SAXIHP0RREADY (S_AXI_HP0_RREADY),
- .SAXIHP0WDATA (S_AXI_HP0_WDATA_in),
- .SAXIHP0WID (S_AXI_HP0_WID_in),
- .SAXIHP0WLAST (S_AXI_HP0_WLAST),
- .SAXIHP0WRISSUECAP1EN (S_AXI_HP0_WRISSUECAP1_EN),
- .SAXIHP0WSTRB (S_AXI_HP0_WSTRB_in),
- .SAXIHP0WVALID (S_AXI_HP0_WVALID),
- .SAXIHP1ACLK (S_AXI_HP1_ACLK_temp),
- .SAXIHP1ARADDR (S_AXI_HP1_ARADDR),
- .SAXIHP1ARBURST (S_AXI_HP1_ARBURST),
- .SAXIHP1ARCACHE (S_AXI_HP1_ARCACHE),
- .SAXIHP1ARID (S_AXI_HP1_ARID_in),
- .SAXIHP1ARLEN (S_AXI_HP1_ARLEN),
- .SAXIHP1ARLOCK (S_AXI_HP1_ARLOCK),
- .SAXIHP1ARPROT (S_AXI_HP1_ARPROT),
- .SAXIHP1ARQOS (S_AXI_HP1_ARQOS),
- .SAXIHP1ARSIZE (S_AXI_HP1_ARSIZE[1:0]),
- .SAXIHP1ARVALID (S_AXI_HP1_ARVALID),
- .SAXIHP1AWADDR (S_AXI_HP1_AWADDR),
- .SAXIHP1AWBURST (S_AXI_HP1_AWBURST),
- .SAXIHP1AWCACHE (S_AXI_HP1_AWCACHE),
- .SAXIHP1AWID (S_AXI_HP1_AWID_in),
- .SAXIHP1AWLEN (S_AXI_HP1_AWLEN),
- .SAXIHP1AWLOCK (S_AXI_HP1_AWLOCK),
- .SAXIHP1AWPROT (S_AXI_HP1_AWPROT),
- .SAXIHP1AWQOS (S_AXI_HP1_AWQOS),
- .SAXIHP1AWSIZE (S_AXI_HP1_AWSIZE[1:0]),
- .SAXIHP1AWVALID (S_AXI_HP1_AWVALID),
- .SAXIHP1BREADY (S_AXI_HP1_BREADY),
- .SAXIHP1RDISSUECAP1EN (S_AXI_HP1_RDISSUECAP1_EN),
- .SAXIHP1RREADY (S_AXI_HP1_RREADY),
- .SAXIHP1WDATA (S_AXI_HP1_WDATA_in),
- .SAXIHP1WID (S_AXI_HP1_WID_in),
- .SAXIHP1WLAST (S_AXI_HP1_WLAST),
- .SAXIHP1WRISSUECAP1EN (S_AXI_HP1_WRISSUECAP1_EN),
- .SAXIHP1WSTRB (S_AXI_HP1_WSTRB_in),
- .SAXIHP1WVALID (S_AXI_HP1_WVALID),
- .SAXIHP2ACLK (S_AXI_HP2_ACLK_temp),
- .SAXIHP2ARADDR (S_AXI_HP2_ARADDR),
- .SAXIHP2ARBURST (S_AXI_HP2_ARBURST),
- .SAXIHP2ARCACHE (S_AXI_HP2_ARCACHE),
- .SAXIHP2ARID (S_AXI_HP2_ARID_in),
- .SAXIHP2ARLEN (S_AXI_HP2_ARLEN),
- .SAXIHP2ARLOCK (S_AXI_HP2_ARLOCK),
- .SAXIHP2ARPROT (S_AXI_HP2_ARPROT),
- .SAXIHP2ARQOS (S_AXI_HP2_ARQOS),
- .SAXIHP2ARSIZE (S_AXI_HP2_ARSIZE[1:0]),
- .SAXIHP2ARVALID (S_AXI_HP2_ARVALID),
- .SAXIHP2AWADDR (S_AXI_HP2_AWADDR),
- .SAXIHP2AWBURST (S_AXI_HP2_AWBURST),
- .SAXIHP2AWCACHE (S_AXI_HP2_AWCACHE),
- .SAXIHP2AWID (S_AXI_HP2_AWID_in),
- .SAXIHP2AWLEN (S_AXI_HP2_AWLEN),
- .SAXIHP2AWLOCK (S_AXI_HP2_AWLOCK),
- .SAXIHP2AWPROT (S_AXI_HP2_AWPROT),
- .SAXIHP2AWQOS (S_AXI_HP2_AWQOS),
- .SAXIHP2AWSIZE (S_AXI_HP2_AWSIZE[1:0]),
- .SAXIHP2AWVALID (S_AXI_HP2_AWVALID),
- .SAXIHP2BREADY (S_AXI_HP2_BREADY),
- .SAXIHP2RDISSUECAP1EN (S_AXI_HP2_RDISSUECAP1_EN),
- .SAXIHP2RREADY (S_AXI_HP2_RREADY),
- .SAXIHP2WDATA (S_AXI_HP2_WDATA_in),
- .SAXIHP2WID (S_AXI_HP2_WID_in),
- .SAXIHP2WLAST (S_AXI_HP2_WLAST),
- .SAXIHP2WRISSUECAP1EN (S_AXI_HP2_WRISSUECAP1_EN),
- .SAXIHP2WSTRB (S_AXI_HP2_WSTRB_in),
- .SAXIHP2WVALID (S_AXI_HP2_WVALID),
- .SAXIHP3ACLK (S_AXI_HP3_ACLK_temp),
- .SAXIHP3ARADDR (S_AXI_HP3_ARADDR ),
- .SAXIHP3ARBURST (S_AXI_HP3_ARBURST),
- .SAXIHP3ARCACHE (S_AXI_HP3_ARCACHE),
- .SAXIHP3ARID (S_AXI_HP3_ARID_in ),
- .SAXIHP3ARLEN (S_AXI_HP3_ARLEN),
- .SAXIHP3ARLOCK (S_AXI_HP3_ARLOCK),
- .SAXIHP3ARPROT (S_AXI_HP3_ARPROT),
- .SAXIHP3ARQOS (S_AXI_HP3_ARQOS),
- .SAXIHP3ARSIZE (S_AXI_HP3_ARSIZE[1:0]),
- .SAXIHP3ARVALID (S_AXI_HP3_ARVALID),
- .SAXIHP3AWADDR (S_AXI_HP3_AWADDR),
- .SAXIHP3AWBURST (S_AXI_HP3_AWBURST),
- .SAXIHP3AWCACHE (S_AXI_HP3_AWCACHE),
- .SAXIHP3AWID (S_AXI_HP3_AWID_in),
- .SAXIHP3AWLEN (S_AXI_HP3_AWLEN),
- .SAXIHP3AWLOCK (S_AXI_HP3_AWLOCK),
- .SAXIHP3AWPROT (S_AXI_HP3_AWPROT),
- .SAXIHP3AWQOS (S_AXI_HP3_AWQOS),
- .SAXIHP3AWSIZE (S_AXI_HP3_AWSIZE[1:0]),
- .SAXIHP3AWVALID (S_AXI_HP3_AWVALID),
- .SAXIHP3BREADY (S_AXI_HP3_BREADY),
- .SAXIHP3RDISSUECAP1EN (S_AXI_HP3_RDISSUECAP1_EN),
- .SAXIHP3RREADY (S_AXI_HP3_RREADY),
- .SAXIHP3WDATA (S_AXI_HP3_WDATA_in),
- .SAXIHP3WID (S_AXI_HP3_WID_in),
- .SAXIHP3WLAST (S_AXI_HP3_WLAST),
- .SAXIHP3WRISSUECAP1EN (S_AXI_HP3_WRISSUECAP1_EN),
- .SAXIHP3WSTRB (S_AXI_HP3_WSTRB_in),
- .SAXIHP3WVALID (S_AXI_HP3_WVALID),
- .DDRA (buffered_DDR_Addr),
- .DDRBA (buffered_DDR_BankAddr),
- .DDRCASB (buffered_DDR_CAS_n),
- .DDRCKE (buffered_DDR_CKE),
- .DDRCKN (buffered_DDR_Clk_n),
- .DDRCKP (buffered_DDR_Clk),
- .DDRCSB (buffered_DDR_CS_n),
- .DDRDM (buffered_DDR_DM),
- .DDRDQ (buffered_DDR_DQ),
- .DDRDQSN (buffered_DDR_DQS_n),
- .DDRDQSP (buffered_DDR_DQS),
- .DDRDRSTB (buffered_DDR_DRSTB),
- .DDRODT (buffered_DDR_ODT),
- .DDRRASB (buffered_DDR_RAS_n),
- .DDRVRN (buffered_DDR_VRN),
- .DDRVRP (buffered_DDR_VRP),
- .DDRWEB (buffered_DDR_WEB),
- .MIO (buffered_MIO),
- .PSCLK (buffered_PS_CLK),
- .PSPORB (buffered_PS_PORB),
- .PSSRSTB (buffered_PS_SRSTB)
-
-
- );
-
- end
- endgenerate
-
-
-// Generating the AxUSER Values locally when the C_USE_DEFAULT_ACP_USER_VAL is enabled.
-// Otherwise a master connected to the ACP port will drive the AxUSER Ports
-assign param_aruser = C_USE_DEFAULT_ACP_USER_VAL? C_S_AXI_ACP_ARUSER_VAL : S_AXI_ACP_ARUSER;
-assign param_awuser = C_USE_DEFAULT_ACP_USER_VAL? C_S_AXI_ACP_AWUSER_VAL : S_AXI_ACP_AWUSER;
-
- assign SAXIACPARADDR_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARADDR : S_AXI_ACP_ARADDR;
- assign SAXIACPARBURST_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARBURST : S_AXI_ACP_ARBURST;
- assign SAXIACPARCACHE_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARCACHE : S_AXI_ACP_ARCACHE;
- assign SAXIACPARLEN_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARLEN : S_AXI_ACP_ARLEN;
- assign SAXIACPARLOCK_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARLOCK : S_AXI_ACP_ARLOCK;
- assign SAXIACPARPROT_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARPROT : S_AXI_ACP_ARPROT;
- assign SAXIACPARSIZE_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARSIZE : S_AXI_ACP_ARSIZE;
- //assign SAXIACPARUSER_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARUSER : S_AXI_ACP_ARUSER;
- assign SAXIACPARUSER_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARUSER : param_aruser;
-
- assign SAXIACPARVALID_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARVALID : S_AXI_ACP_ARVALID ;
- assign SAXIACPAWADDR_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWADDR : S_AXI_ACP_AWADDR;
- assign SAXIACPAWBURST_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWBURST : S_AXI_ACP_AWBURST;
-
-
- assign SAXIACPAWCACHE_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWCACHE : S_AXI_ACP_AWCACHE;
- assign SAXIACPAWLEN_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWLEN : S_AXI_ACP_AWLEN;
- assign SAXIACPAWLOCK_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWLOCK : S_AXI_ACP_AWLOCK;
- assign SAXIACPAWPROT_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWPROT : S_AXI_ACP_AWPROT;
- assign SAXIACPAWSIZE_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWSIZE : S_AXI_ACP_AWSIZE;
- //assign SAXIACPAWUSER_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWUSER : S_AXI_ACP_AWUSER;
- assign SAXIACPAWUSER_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWUSER : param_awuser;
- assign SAXIACPAWVALID_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWVALID : S_AXI_ACP_AWVALID;
- assign SAXIACPBREADY_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_BREADY : S_AXI_ACP_BREADY;
- assign SAXIACPRREADY_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_RREADY : S_AXI_ACP_RREADY;
- assign SAXIACPWDATA_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_WDATA : S_AXI_ACP_WDATA;
- assign SAXIACPWLAST_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_WLAST : S_AXI_ACP_WLAST;
- assign SAXIACPWSTRB_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_WSTRB : S_AXI_ACP_WSTRB;
- assign SAXIACPWVALID_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_WVALID : S_AXI_ACP_WVALID;
-
- assign SAXIACPARID_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_ARID : S_AXI_ACP_ARID;
- assign SAXIACPAWID_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_AWID : S_AXI_ACP_AWID;
- assign SAXIACPWID_W = (C_INCLUDE_ACP_TRANS_CHECK == 1) ? S_AXI_ATC_WID : S_AXI_ACP_WID;
-
-
- generate
- if (C_INCLUDE_ACP_TRANS_CHECK == 0) begin : gen_no_atc
-
- assign S_AXI_ACP_AWREADY = SAXIACPAWREADY_W;
- assign S_AXI_ACP_WREADY = SAXIACPWREADY_W;
- assign S_AXI_ACP_BID = SAXIACPBID_W;
- assign S_AXI_ACP_BRESP = SAXIACPBRESP_W;
- assign S_AXI_ACP_BVALID = SAXIACPBVALID_W;
- assign S_AXI_ACP_RDATA = SAXIACPRDATA_W;
- assign S_AXI_ACP_RID = SAXIACPRID_W;
- assign S_AXI_ACP_RLAST = SAXIACPRLAST_W;
- assign S_AXI_ACP_RRESP = SAXIACPRRESP_W;
- assign S_AXI_ACP_RVALID = SAXIACPRVALID_W;
- assign S_AXI_ACP_ARREADY = SAXIACPARREADY_W;
-
-
- end else begin : gen_atc
-
- processing_system7_v5_5_atc #(
- .C_AXI_ID_WIDTH (C_S_AXI_ACP_ID_WIDTH),
- .C_AXI_AWUSER_WIDTH (5),
- .C_AXI_ARUSER_WIDTH (5)
- )
-
- atc_i (
-
- // Global Signals
- .ACLK (S_AXI_ACP_ACLK_temp),
- .ARESETN (S_AXI_ACP_ARESETN),
-
- // Slave Interface Write Address Ports
- .S_AXI_AWID (S_AXI_ACP_AWID),
- .S_AXI_AWADDR (S_AXI_ACP_AWADDR),
- .S_AXI_AWLEN (S_AXI_ACP_AWLEN),
- .S_AXI_AWSIZE (S_AXI_ACP_AWSIZE),
- .S_AXI_AWBURST (S_AXI_ACP_AWBURST),
- .S_AXI_AWLOCK (S_AXI_ACP_AWLOCK),
- .S_AXI_AWCACHE (S_AXI_ACP_AWCACHE),
- .S_AXI_AWPROT (S_AXI_ACP_AWPROT),
- //.S_AXI_AWUSER (S_AXI_ACP_AWUSER),
- .S_AXI_AWUSER (param_awuser),
- .S_AXI_AWVALID (S_AXI_ACP_AWVALID),
- .S_AXI_AWREADY (S_AXI_ACP_AWREADY),
- // Slave Interface Write Data Ports
- .S_AXI_WID (S_AXI_ACP_WID),
- .S_AXI_WDATA (S_AXI_ACP_WDATA),
- .S_AXI_WSTRB (S_AXI_ACP_WSTRB),
- .S_AXI_WLAST (S_AXI_ACP_WLAST),
- .S_AXI_WUSER (),
- .S_AXI_WVALID (S_AXI_ACP_WVALID),
- .S_AXI_WREADY (S_AXI_ACP_WREADY),
- // Slave Interface Write Response Ports
- .S_AXI_BID (S_AXI_ACP_BID),
- .S_AXI_BRESP (S_AXI_ACP_BRESP),
- .S_AXI_BUSER (),
- .S_AXI_BVALID (S_AXI_ACP_BVALID),
- .S_AXI_BREADY (S_AXI_ACP_BREADY),
- // Slave Interface Read Address Ports
- .S_AXI_ARID (S_AXI_ACP_ARID),
- .S_AXI_ARADDR (S_AXI_ACP_ARADDR),
- .S_AXI_ARLEN (S_AXI_ACP_ARLEN),
- .S_AXI_ARSIZE (S_AXI_ACP_ARSIZE),
- .S_AXI_ARBURST (S_AXI_ACP_ARBURST),
- .S_AXI_ARLOCK (S_AXI_ACP_ARLOCK),
- .S_AXI_ARCACHE (S_AXI_ACP_ARCACHE),
- .S_AXI_ARPROT (S_AXI_ACP_ARPROT),
- //.S_AXI_ARUSER (S_AXI_ACP_ARUSER),
- .S_AXI_ARUSER (param_aruser),
- .S_AXI_ARVALID (S_AXI_ACP_ARVALID),
- .S_AXI_ARREADY (S_AXI_ACP_ARREADY),
- // Slave Interface Read Data Ports
- .S_AXI_RID (S_AXI_ACP_RID),
- .S_AXI_RDATA (S_AXI_ACP_RDATA),
- .S_AXI_RRESP (S_AXI_ACP_RRESP),
- .S_AXI_RLAST (S_AXI_ACP_RLAST),
- .S_AXI_RUSER (),
- .S_AXI_RVALID (S_AXI_ACP_RVALID),
- .S_AXI_RREADY (S_AXI_ACP_RREADY),
-
- // Slave Interface Write Address Ports
- .M_AXI_AWID (S_AXI_ATC_AWID),
- .M_AXI_AWADDR (S_AXI_ATC_AWADDR),
- .M_AXI_AWLEN (S_AXI_ATC_AWLEN),
- .M_AXI_AWSIZE (S_AXI_ATC_AWSIZE),
- .M_AXI_AWBURST (S_AXI_ATC_AWBURST),
- .M_AXI_AWLOCK (S_AXI_ATC_AWLOCK),
- .M_AXI_AWCACHE (S_AXI_ATC_AWCACHE),
- .M_AXI_AWPROT (S_AXI_ATC_AWPROT),
- .M_AXI_AWUSER (S_AXI_ATC_AWUSER),
- .M_AXI_AWVALID (S_AXI_ATC_AWVALID),
- .M_AXI_AWREADY (SAXIACPAWREADY_W),
- // Slave Interface Write Data Ports
- .M_AXI_WID (S_AXI_ATC_WID),
- .M_AXI_WDATA (S_AXI_ATC_WDATA),
- .M_AXI_WSTRB (S_AXI_ATC_WSTRB),
- .M_AXI_WLAST (S_AXI_ATC_WLAST),
- .M_AXI_WUSER (),
- .M_AXI_WVALID (S_AXI_ATC_WVALID),
- .M_AXI_WREADY (SAXIACPWREADY_W),
- // Slave Interface Write Response Ports
- .M_AXI_BID (SAXIACPBID_W),
- .M_AXI_BRESP (SAXIACPBRESP_W),
- .M_AXI_BUSER (),
- .M_AXI_BVALID (SAXIACPBVALID_W),
- .M_AXI_BREADY (S_AXI_ATC_BREADY),
- // Slave Interface Read Address Ports
- .M_AXI_ARID (S_AXI_ATC_ARID),
- .M_AXI_ARADDR (S_AXI_ATC_ARADDR),
- .M_AXI_ARLEN (S_AXI_ATC_ARLEN),
- .M_AXI_ARSIZE (S_AXI_ATC_ARSIZE),
- .M_AXI_ARBURST (S_AXI_ATC_ARBURST),
- .M_AXI_ARLOCK (S_AXI_ATC_ARLOCK),
- .M_AXI_ARCACHE (S_AXI_ATC_ARCACHE),
- .M_AXI_ARPROT (S_AXI_ATC_ARPROT),
- .M_AXI_ARUSER (S_AXI_ATC_ARUSER),
- .M_AXI_ARVALID (S_AXI_ATC_ARVALID),
- .M_AXI_ARREADY (SAXIACPARREADY_W),
- // Slave Interface Read Data Ports
- .M_AXI_RID (SAXIACPRID_W),
- .M_AXI_RDATA (SAXIACPRDATA_W),
- .M_AXI_RRESP (SAXIACPRRESP_W),
- .M_AXI_RLAST (SAXIACPRLAST_W),
- .M_AXI_RUSER (),
- .M_AXI_RVALID (SAXIACPRVALID_W),
- .M_AXI_RREADY (S_AXI_ATC_RREADY),
-
-
- .ERROR_TRIGGER(),
- .ERROR_TRANSACTION_ID()
- );
-
-
-
- end
- endgenerate
-
-
-
-
-endmodule
-
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.c b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.c
deleted file mode 100644
index f16072f..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.c
+++ /dev/null
@@ -1,12433 +0,0 @@
-/******************************************************************************
-*
-* Copyright (C) 2010-2019 Xilinx, Inc. All rights reserved.
-*
-* Permission is hereby granted, free of charge, to any person obtaining a copy of this
-* software and associated documentation files (the "Software"), to deal in the Software
-* without restriction, including without limitation the rights to use, copy, modify, merge,
-* publish, distribute, sublicense, and/or sell copies of the Software, and to permit
-* persons to whom the Software is furnished to do so, subject to the following conditions:
-*
-* The above copyright notice and this permission notice shall be included in all copies or
-* substantial portions of the Software.
-*
-* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
-* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
-* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-*
-******************************************************************************/
-/****************************************************************************/
-/**
-*
-* @file ps7_init.c
-*
-* This file is automatically generated
-*
-*****************************************************************************/
-
-#include "ps7_init.h"
-
-unsigned long ps7_pll_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: PLL SLCR REGISTERS
- // .. .. START: ARM PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000110[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000110[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x145
- // .. .. ==> 0XF8000110[21:12] = 0x00000145U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U
- // .. ..
- EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x001452C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x1e
- // .. .. .. ==> 0XF8000100[18:12] = 0x0000001EU
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x0001E000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. ARM_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000001U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. SRCSEL = 0x0
- // .. .. .. ==> 0XF8000120[5:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. .. DIVISOR = 0x2
- // .. .. .. ==> 0XF8000120[13:8] = 0x00000002U
- // .. .. .. ==> MASK : 0x00003F00U VAL : 0x00000200U
- // .. .. .. CPU_6OR4XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[24:24] = 0x00000001U
- // .. .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. .. .. CPU_3OR2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[25:25] = 0x00000001U
- // .. .. .. ==> MASK : 0x02000000U VAL : 0x02000000U
- // .. .. .. CPU_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[26:26] = 0x00000001U
- // .. .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. .. CPU_1XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[27:27] = 0x00000001U
- // .. .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. .. CPU_PERI_CLKACT = 0x1
- // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U
- // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U),
- // .. .. FINISH: ARM PLL INIT
- // .. .. START: DDR PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000114[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000114[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x1f4
- // .. .. ==> 0XF8000114[21:12] = 0x000001F4U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x001F4000U
- // .. ..
- EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x001F42C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x14
- // .. .. .. ==> 0XF8000104[18:12] = 0x00000014U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00014000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00014000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. DDR_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000002U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. DDR_3XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. .. DDR_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. .. DDR_3XCLK_DIVISOR = 0x2
- // .. .. .. ==> 0XF8000124[25:20] = 0x00000002U
- // .. .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. .. .. DDR_2XCLK_DIVISOR = 0x3
- // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U
- // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U),
- // .. .. FINISH: DDR PLL INIT
- // .. .. START: IO PLL INIT
- // .. .. PLL_RES = 0x2
- // .. .. ==> 0XF8000118[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000118[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x113
- // .. .. ==> 0XF8000118[21:12] = 0x00000113U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00113000U
- // .. ..
- EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x00113220U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x23
- // .. .. .. ==> 0XF8000108[18:12] = 0x00000023U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00023000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x00023000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. IO_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000004U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. FINISH: IO PLL INIT
- // .. FINISH: PLL SLCR REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_clock_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: CLOCK CONTROL SLCR REGISTERS
- // .. CLKACT = 0x1
- // .. ==> 0XF8000128[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. DIVISOR0 = 0x31
- // .. ==> 0XF8000128[13:8] = 0x00000031U
- // .. ==> MASK : 0x00003F00U VAL : 0x00003100U
- // .. DIVISOR1 = 0x2
- // .. ==> 0XF8000128[25:20] = 0x00000002U
- // .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // ..
- EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00203101U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000138[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000138[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000138, 0x00000011U ,0x00000001U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000140[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000140[6:4] = 0x00000000U
- // .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. DIVISOR = 0xe
- // .. ==> 0XF8000140[13:8] = 0x0000000EU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000E00U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF8000140[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF8000140, 0x03F03F71U ,0x00100E01U),
- // .. CLKACT = 0x1
- // .. ==> 0XF800014C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800014C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xd
- // .. ==> 0XF800014C[13:8] = 0x0000000DU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000D00U
- // ..
- EMIT_MASKWRITE(0XF800014C, 0x00003F31U ,0x00000D01U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF8000150[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000150[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000150[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000150[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000150, 0x00003F33U ,0x00001202U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000154[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000154[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000154[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000154[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001203U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000158[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000158[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000158[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xb
- // .. ==> 0XF8000158[13:8] = 0x0000000BU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000B00U
- // ..
- EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000B03U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF800015C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF800015C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800015C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR0 = 0x12
- // .. ==> 0XF800015C[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF800015C[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00101202U),
- // .. CAN0_MUX = 0x0
- // .. ==> 0XF8000160[5:0] = 0x00000000U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000000U
- // .. CAN0_REF_SEL = 0x0
- // .. ==> 0XF8000160[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. CAN1_MUX = 0x0
- // .. ==> 0XF8000160[21:16] = 0x00000000U
- // .. ==> MASK : 0x003F0000U VAL : 0x00000000U
- // .. CAN1_REF_SEL = 0x0
- // .. ==> 0XF8000160[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U),
- // .. .. START: TRACE CLOCK
- // .. .. FINISH: TRACE CLOCK
- // .. .. CLKACT = 0x1
- // .. .. ==> 0XF8000168[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000168[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR = 0x9
- // .. .. ==> 0XF8000168[13:8] = 0x00000009U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000900U
- // .. ..
- EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000901U),
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000170[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR0 = 0x7
- // .. .. ==> 0XF8000170[13:8] = 0x00000007U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000700U
- // .. .. DIVISOR1 = 0x2
- // .. .. ==> 0XF8000170[25:20] = 0x00000002U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00200700U),
- // .. .. CLK_621_TRUE = 0x1
- // .. .. ==> 0XF80001C4[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U),
- // .. .. DMA_CPU_2XCLKACT = 0x1
- // .. .. ==> 0XF800012C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. USB0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[2:2] = 0x00000001U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. USB1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. .. GEM0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[6:6] = 0x00000001U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000040U
- // .. .. GEM1_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. SDI0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. SDI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[11:11] = 0x00000001U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // .. .. SPI0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. SPI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. CAN0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. CAN1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. .. I2C0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[18:18] = 0x00000001U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00040000U
- // .. .. I2C1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. .. UART0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[20:20] = 0x00000001U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00100000U
- // .. .. UART1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. GPIO_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[22:22] = 0x00000001U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00400000U
- // .. .. LQSPI_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[23:23] = 0x00000001U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00800000U
- // .. .. SMC_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[24:24] = 0x00000001U
- // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. ..
- EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x01FEC84DU),
- // .. FINISH: CLOCK CONTROL SLCR REGISTERS
- // .. START: THIS SHOULD BE BLANK
- // .. FINISH: THIS SHOULD BE BLANK
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_ddr_init_data_3_0[] = {
- // START: top
- // .. START: DDR INITIALIZATION
- // .. .. START: LOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0
- // .. .. ==> 0XF8006000[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 0x1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000084U),
- // .. .. FINISH: LOCK DDR
- // .. .. reg_ddrc_t_rfc_nom_x32 = 0x79
- // .. .. ==> 0XF8006004[11:0] = 0x00000079U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000079U
- // .. .. reserved_reg_ddrc_active_ranks = 0x1
- // .. .. ==> 0XF8006004[13:12] = 0x00000001U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00001000U
- // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0
- // .. .. ==> 0XF8006004[18:14] = 0x00000000U
- // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006004, 0x0007FFFFU ,0x00001079U),
- // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf
- // .. .. ==> 0XF8006008[10:0] = 0x0000000FU
- // .. .. ==> MASK : 0x000007FFU VAL : 0x0000000FU
- // .. .. reg_ddrc_hpr_max_starve_x32 = 0xf
- // .. .. ==> 0XF8006008[21:11] = 0x0000000FU
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00007800U
- // .. .. reg_ddrc_hpr_xact_run_length = 0xf
- // .. .. ==> 0XF8006008[25:22] = 0x0000000FU
- // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U
- // .. ..
- EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU),
- // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF800600C[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_lpr_max_starve_x32 = 0x2
- // .. .. ==> 0XF800600C[21:11] = 0x00000002U
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00001000U
- // .. .. reg_ddrc_lpr_xact_run_length = 0x8
- // .. .. ==> 0XF800600C[25:22] = 0x00000008U
- // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U
- // .. ..
- EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U),
- // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF8006010[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_w_xact_run_length = 0x8
- // .. .. ==> 0XF8006010[14:11] = 0x00000008U
- // .. .. ==> MASK : 0x00007800U VAL : 0x00004000U
- // .. .. reg_ddrc_w_max_starve_x32 = 0x2
- // .. .. ==> 0XF8006010[25:15] = 0x00000002U
- // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U
- // .. ..
- EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U),
- // .. .. reg_ddrc_t_rc = 0x19
- // .. .. ==> 0XF8006014[5:0] = 0x00000019U
- // .. .. ==> MASK : 0x0000003FU VAL : 0x00000019U
- // .. .. reg_ddrc_t_rfc_min = 0x50
- // .. .. ==> 0XF8006014[13:6] = 0x00000050U
- // .. .. ==> MASK : 0x00003FC0U VAL : 0x00001400U
- // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10
- // .. .. ==> 0XF8006014[20:14] = 0x00000010U
- // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x00041419U),
- // .. .. reg_ddrc_wr2pre = 0x12
- // .. .. ==> 0XF8006018[4:0] = 0x00000012U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000012U
- // .. .. reg_ddrc_powerdown_to_x32 = 0x6
- // .. .. ==> 0XF8006018[9:5] = 0x00000006U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000C0U
- // .. .. reg_ddrc_t_faw = 0x14
- // .. .. ==> 0XF8006018[15:10] = 0x00000014U
- // .. .. ==> MASK : 0x0000FC00U VAL : 0x00005000U
- // .. .. reg_ddrc_t_ras_max = 0x22
- // .. .. ==> 0XF8006018[21:16] = 0x00000022U
- // .. .. ==> MASK : 0x003F0000U VAL : 0x00220000U
- // .. .. reg_ddrc_t_ras_min = 0x12
- // .. .. ==> 0XF8006018[26:22] = 0x00000012U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x04800000U
- // .. .. reg_ddrc_t_cke = 0x4
- // .. .. ==> 0XF8006018[31:28] = 0x00000004U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44A250D2U),
- // .. .. reg_ddrc_write_latency = 0x5
- // .. .. ==> 0XF800601C[4:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000005U
- // .. .. reg_ddrc_rd2wr = 0x7
- // .. .. ==> 0XF800601C[9:5] = 0x00000007U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000E0U
- // .. .. reg_ddrc_wr2rd = 0xe
- // .. .. ==> 0XF800601C[14:10] = 0x0000000EU
- // .. .. ==> MASK : 0x00007C00U VAL : 0x00003800U
- // .. .. reg_ddrc_t_xp = 0x4
- // .. .. ==> 0XF800601C[19:15] = 0x00000004U
- // .. .. ==> MASK : 0x000F8000U VAL : 0x00020000U
- // .. .. reg_ddrc_pad_pd = 0x0
- // .. .. ==> 0XF800601C[22:20] = 0x00000000U
- // .. .. ==> MASK : 0x00700000U VAL : 0x00000000U
- // .. .. reg_ddrc_rd2pre = 0x4
- // .. .. ==> 0XF800601C[27:23] = 0x00000004U
- // .. .. ==> MASK : 0x0F800000U VAL : 0x02000000U
- // .. .. reg_ddrc_t_rcd = 0x7
- // .. .. ==> 0XF800601C[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U),
- // .. .. reg_ddrc_t_ccd = 0x4
- // .. .. ==> 0XF8006020[4:2] = 0x00000004U
- // .. .. ==> MASK : 0x0000001CU VAL : 0x00000010U
- // .. .. reg_ddrc_t_rrd = 0x5
- // .. .. ==> 0XF8006020[7:5] = 0x00000005U
- // .. .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. .. reg_ddrc_refresh_margin = 0x2
- // .. .. ==> 0XF8006020[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_rp = 0x7
- // .. .. ==> 0XF8006020[15:12] = 0x00000007U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00007000U
- // .. .. reg_ddrc_refresh_to_x32 = 0x8
- // .. .. ==> 0XF8006020[20:16] = 0x00000008U
- // .. .. ==> MASK : 0x001F0000U VAL : 0x00080000U
- // .. .. reg_ddrc_mobile = 0x0
- // .. .. ==> 0XF8006020[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reg_ddrc_en_dfi_dram_clk_disable = 0x0
- // .. .. ==> 0XF8006020[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reg_ddrc_read_latency = 0x7
- // .. .. ==> 0XF8006020[28:24] = 0x00000007U
- // .. .. ==> MASK : 0x1F000000U VAL : 0x07000000U
- // .. .. reg_phy_mode_ddr1_ddr2 = 0x1
- // .. .. ==> 0XF8006020[29:29] = 0x00000001U
- // .. .. ==> MASK : 0x20000000U VAL : 0x20000000U
- // .. .. reg_ddrc_dis_pad_pd = 0x0
- // .. .. ==> 0XF8006020[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006020, 0x7FDFFFFCU ,0x270872B0U),
- // .. .. reg_ddrc_en_2t_timing_mode = 0x0
- // .. .. ==> 0XF8006024[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_prefer_write = 0x0
- // .. .. ==> 0XF8006024[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_wr = 0x0
- // .. .. ==> 0XF8006024[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_addr = 0x0
- // .. .. ==> 0XF8006024[8:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_data = 0x0
- // .. .. ==> 0XF8006024[24:9] = 0x00000000U
- // .. .. ==> MASK : 0x01FFFE00U VAL : 0x00000000U
- // .. .. ddrc_reg_mr_wr_busy = 0x0
- // .. .. ==> 0XF8006024[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_type = 0x0
- // .. .. ==> 0XF8006024[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_rdata_valid = 0x0
- // .. .. ==> 0XF8006024[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006024, 0x0FFFFFC3U ,0x00000000U),
- // .. .. reg_ddrc_final_wait_x32 = 0x7
- // .. .. ==> 0XF8006028[6:0] = 0x00000007U
- // .. .. ==> MASK : 0x0000007FU VAL : 0x00000007U
- // .. .. reg_ddrc_pre_ocd_x32 = 0x0
- // .. .. ==> 0XF8006028[10:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000780U VAL : 0x00000000U
- // .. .. reg_ddrc_t_mrd = 0x4
- // .. .. ==> 0XF8006028[13:11] = 0x00000004U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U
- // .. ..
- EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U),
- // .. .. reg_ddrc_emr2 = 0x8
- // .. .. ==> 0XF800602C[15:0] = 0x00000008U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000008U
- // .. .. reg_ddrc_emr3 = 0x0
- // .. .. ==> 0XF800602C[31:16] = 0x00000000U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U),
- // .. .. reg_ddrc_mr = 0x930
- // .. .. ==> 0XF8006030[15:0] = 0x00000930U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000930U
- // .. .. reg_ddrc_emr = 0x4
- // .. .. ==> 0XF8006030[31:16] = 0x00000004U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U),
- // .. .. reg_ddrc_burst_rdwr = 0x4
- // .. .. ==> 0XF8006034[3:0] = 0x00000004U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000004U
- // .. .. reg_ddrc_pre_cke_x1024 = 0x156
- // .. .. ==> 0XF8006034[13:4] = 0x00000156U
- // .. .. ==> MASK : 0x00003FF0U VAL : 0x00001560U
- // .. .. reg_ddrc_post_cke_x1024 = 0x1
- // .. .. ==> 0XF8006034[25:16] = 0x00000001U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00010000U
- // .. .. reg_ddrc_burstchop = 0x0
- // .. .. ==> 0XF8006034[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x00011564U),
- // .. .. reg_ddrc_force_low_pri_n = 0x0
- // .. .. ==> 0XF8006038[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_dq = 0x0
- // .. .. ==> 0XF8006038[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006038, 0x00000003U ,0x00000000U),
- // .. .. reg_ddrc_addrmap_bank_b0 = 0x6
- // .. .. ==> 0XF800603C[3:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000006U
- // .. .. reg_ddrc_addrmap_bank_b1 = 0x6
- // .. .. ==> 0XF800603C[7:4] = 0x00000006U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000060U
- // .. .. reg_ddrc_addrmap_bank_b2 = 0x6
- // .. .. ==> 0XF800603C[11:8] = 0x00000006U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000600U
- // .. .. reg_ddrc_addrmap_col_b5 = 0x0
- // .. .. ==> 0XF800603C[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b6 = 0x0
- // .. .. ==> 0XF800603C[19:16] = 0x00000000U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000666U),
- // .. .. reg_ddrc_addrmap_col_b2 = 0x0
- // .. .. ==> 0XF8006040[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b3 = 0x0
- // .. .. ==> 0XF8006040[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b4 = 0x0
- // .. .. ==> 0XF8006040[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b7 = 0x0
- // .. .. ==> 0XF8006040[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b8 = 0xf
- // .. .. ==> 0XF8006040[19:16] = 0x0000000FU
- // .. .. ==> MASK : 0x000F0000U VAL : 0x000F0000U
- // .. .. reg_ddrc_addrmap_col_b9 = 0xf
- // .. .. ==> 0XF8006040[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_col_b10 = 0xf
- // .. .. ==> 0XF8006040[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. .. reg_ddrc_addrmap_col_b11 = 0xf
- // .. .. ==> 0XF8006040[31:28] = 0x0000000FU
- // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFFF0000U),
- // .. .. reg_ddrc_addrmap_row_b0 = 0x5
- // .. .. ==> 0XF8006044[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_addrmap_row_b1 = 0x5
- // .. .. ==> 0XF8006044[7:4] = 0x00000005U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000050U
- // .. .. reg_ddrc_addrmap_row_b2_11 = 0x5
- // .. .. ==> 0XF8006044[11:8] = 0x00000005U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000500U
- // .. .. reg_ddrc_addrmap_row_b12 = 0x5
- // .. .. ==> 0XF8006044[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_addrmap_row_b13 = 0x5
- // .. .. ==> 0XF8006044[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_addrmap_row_b14 = 0xf
- // .. .. ==> 0XF8006044[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_row_b15 = 0xf
- // .. .. ==> 0XF8006044[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0FF55555U),
- // .. .. reg_phy_rd_local_odt = 0x0
- // .. .. ==> 0XF8006048[13:12] = 0x00000000U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00000000U
- // .. .. reg_phy_wr_local_odt = 0x3
- // .. .. ==> 0XF8006048[15:14] = 0x00000003U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x0000C000U
- // .. .. reg_phy_idle_local_odt = 0x3
- // .. .. ==> 0XF8006048[17:16] = 0x00000003U
- // .. .. ==> MASK : 0x00030000U VAL : 0x00030000U
- // .. .. reserved_reg_ddrc_rank0_wr_odt = 0x1
- // .. .. ==> 0XF8006048[5:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000038U VAL : 0x00000008U
- // .. .. reserved_reg_ddrc_rank0_rd_odt = 0x0
- // .. .. ==> 0XF8006048[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006048, 0x0003F03FU ,0x0003C008U),
- // .. .. reg_phy_rd_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_wr_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_phy_rdc_we_to_re_delay = 0x8
- // .. .. ==> 0XF8006050[11:8] = 0x00000008U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000800U
- // .. .. reg_phy_rdc_fifo_rst_disable = 0x0
- // .. .. ==> 0XF8006050[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_phy_use_fixed_re = 0x1
- // .. .. ==> 0XF8006050[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_rdc_fifo_rst_err_cnt_clr = 0x0
- // .. .. ==> 0XF8006050[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_dis_phy_ctrl_rstn = 0x0
- // .. .. ==> 0XF8006050[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_phy_clk_stall_level = 0x0
- // .. .. ==> 0XF8006050[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[27:24] = 0x00000007U
- // .. .. ==> MASK : 0x0F000000U VAL : 0x07000000U
- // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U),
- // .. .. reg_ddrc_dis_dll_calib = 0x0
- // .. .. ==> 0XF8006058[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006058, 0x00010000U ,0x00000000U),
- // .. .. reg_ddrc_rd_odt_delay = 0x3
- // .. .. ==> 0XF800605C[3:0] = 0x00000003U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000003U
- // .. .. reg_ddrc_wr_odt_delay = 0x0
- // .. .. ==> 0XF800605C[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_rd_odt_hold = 0x0
- // .. .. ==> 0XF800605C[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_hold = 0x5
- // .. .. ==> 0XF800605C[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U),
- // .. .. reg_ddrc_pageclose = 0x0
- // .. .. ==> 0XF8006060[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_lpr_num_entries = 0x1f
- // .. .. ==> 0XF8006060[6:1] = 0x0000001FU
- // .. .. ==> MASK : 0x0000007EU VAL : 0x0000003EU
- // .. .. reg_ddrc_auto_pre_en = 0x0
- // .. .. ==> 0XF8006060[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_ddrc_refresh_update_level = 0x0
- // .. .. ==> 0XF8006060[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_wc = 0x0
- // .. .. ==> 0XF8006060[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_collision_page_opt = 0x0
- // .. .. ==> 0XF8006060[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_ddrc_selfref_en = 0x0
- // .. .. ==> 0XF8006060[12:12] = 0x00000000U
- // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU),
- // .. .. reg_ddrc_go2critical_hysteresis = 0x0
- // .. .. ==> 0XF8006064[12:5] = 0x00000000U
- // .. .. ==> MASK : 0x00001FE0U VAL : 0x00000000U
- // .. .. reg_arb_go2critical_en = 0x1
- // .. .. ==> 0XF8006064[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. ..
- EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U),
- // .. .. reg_ddrc_wrlvl_ww = 0x41
- // .. .. ==> 0XF8006068[7:0] = 0x00000041U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000041U
- // .. .. reg_ddrc_rdlvl_rr = 0x41
- // .. .. ==> 0XF8006068[15:8] = 0x00000041U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00004100U
- // .. .. reg_ddrc_dfi_t_wlmrd = 0x28
- // .. .. ==> 0XF8006068[25:16] = 0x00000028U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U
- // .. ..
- EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U),
- // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10
- // .. .. ==> 0XF800606C[7:0] = 0x00000010U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000010U
- // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16
- // .. .. ==> 0XF800606C[15:8] = 0x00000016U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U
- // .. ..
- EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U),
- // .. .. reg_ddrc_dfi_t_ctrl_delay = 0x1
- // .. .. ==> 0XF8006078[3:0] = 0x00000001U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000001U
- // .. .. reg_ddrc_dfi_t_dram_clk_disable = 0x1
- // .. .. ==> 0XF8006078[7:4] = 0x00000001U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000010U
- // .. .. reg_ddrc_dfi_t_dram_clk_enable = 0x1
- // .. .. ==> 0XF8006078[11:8] = 0x00000001U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000100U
- // .. .. reg_ddrc_t_cksre = 0x5
- // .. .. ==> 0XF8006078[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_t_cksrx = 0x5
- // .. .. ==> 0XF8006078[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_t_ckesr = 0x4
- // .. .. ==> 0XF8006078[25:20] = 0x00000004U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U
- // .. ..
- EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU ,0x00455111U),
- // .. .. reg_ddrc_t_ckpde = 0x2
- // .. .. ==> 0XF800607C[3:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000002U
- // .. .. reg_ddrc_t_ckpdx = 0x2
- // .. .. ==> 0XF800607C[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. reg_ddrc_t_ckdpde = 0x2
- // .. .. ==> 0XF800607C[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_ckdpdx = 0x2
- // .. .. ==> 0XF800607C[15:12] = 0x00000002U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00002000U
- // .. .. reg_ddrc_t_ckcsx = 0x3
- // .. .. ==> 0XF800607C[19:16] = 0x00000003U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00030000U
- // .. ..
- EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU ,0x00032222U),
- // .. .. reg_ddrc_dis_auto_zq = 0x0
- // .. .. ==> 0XF80060A4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_ddr3 = 0x1
- // .. .. ==> 0XF80060A4[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reg_ddrc_t_mod = 0x200
- // .. .. ==> 0XF80060A4[11:2] = 0x00000200U
- // .. .. ==> MASK : 0x00000FFCU VAL : 0x00000800U
- // .. .. reg_ddrc_t_zq_long_nop = 0x200
- // .. .. ==> 0XF80060A4[21:12] = 0x00000200U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00200000U
- // .. .. reg_ddrc_t_zq_short_nop = 0x40
- // .. .. ==> 0XF80060A4[31:22] = 0x00000040U
- // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U),
- // .. .. t_zq_short_interval_x1024 = 0xbebc
- // .. .. ==> 0XF80060A8[19:0] = 0x0000BEBCU
- // .. .. ==> MASK : 0x000FFFFFU VAL : 0x0000BEBCU
- // .. .. dram_rstn_x1024 = 0x62
- // .. .. ==> 0XF80060A8[27:20] = 0x00000062U
- // .. .. ==> MASK : 0x0FF00000U VAL : 0x06200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0620BEBCU),
- // .. .. deeppowerdown_en = 0x0
- // .. .. ==> 0XF80060AC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. deeppowerdown_to_x1024 = 0xf5
- // .. .. ==> 0XF80060AC[8:1] = 0x000000F5U
- // .. .. ==> MASK : 0x000001FEU VAL : 0x000001EAU
- // .. ..
- EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001EAU),
- // .. .. dfi_wrlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000FFFU
- // .. .. dfi_rdlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[23:12] = 0x00000FFFU
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00FFF000U
- // .. .. ddrc_reg_twrlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. ddrc_reg_trdlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_dfi_wr_level_en = 0x1
- // .. .. ==> 0XF80060B0[26:26] = 0x00000001U
- // .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. reg_ddrc_dfi_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF80060B0[27:27] = 0x00000001U
- // .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1
- // .. .. ==> 0XF80060B0[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU),
- // .. .. reg_ddrc_skip_ocd = 0x1
- // .. .. ==> 0XF80060B4[9:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. ..
- EMIT_MASKWRITE(0XF80060B4, 0x00000200U ,0x00000200U),
- // .. .. reg_ddrc_dfi_t_rddata_en = 0x6
- // .. .. ==> 0XF80060B8[4:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000006U
- // .. .. reg_ddrc_dfi_t_ctrlup_min = 0x3
- // .. .. ==> 0XF80060B8[14:5] = 0x00000003U
- // .. .. ==> MASK : 0x00007FE0U VAL : 0x00000060U
- // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40
- // .. .. ==> 0XF80060B8[24:15] = 0x00000040U
- // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U),
- // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. Clear_Correctable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U),
- // .. .. CORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060C8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ECC_CORRECTED_BIT_NUM = 0x0
- // .. .. ==> 0XF80060C8[7:1] = 0x00000000U
- // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U),
- // .. .. UNCORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060DC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U),
- // .. .. STAT_NUM_CORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[15:8] = 0x00000000U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000000U
- // .. .. STAT_NUM_UNCORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[7:0] = 0x00000000U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U),
- // .. .. reg_ddrc_ecc_mode = 0x0
- // .. .. ==> 0XF80060F4[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_scrub = 0x1
- // .. .. ==> 0XF80060F4[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. ..
- EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U),
- // .. .. reg_phy_dif_on = 0x0
- // .. .. ==> 0XF8006114[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_dif_off = 0x0
- // .. .. ==> 0XF8006114[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF8006118[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006118[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006118[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006118[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006118, 0x7FFFFFCFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF800611C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF800611C[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF800611C[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF800611C[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF800611C, 0x7FFFFFCFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006120, 0x7FFFFFCFU ,0x40000000U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006124[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006124[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006124[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006124[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006124, 0x7FFFFFCFU ,0x40000000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF800612C[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF800612C[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006130[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006130[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006134[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006134[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006138[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006138[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006140[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006140[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006140[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006144[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006144[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006144[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006148[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006148[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006148[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF800614C[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF800614C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800614C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006154[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006154[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006154[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006158[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006158[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006158[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF800615C[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF800615C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800615C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006160[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006160[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006160[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006168[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006168[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006168[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF800616C[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF800616C[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF800616C[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006170[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006170[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006170[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006174[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006174[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006174[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF800617C[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF800617C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF800617C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006180[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006180[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006180[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006184[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006184[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006184[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006188[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006188[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006188[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_bl2 = 0x0
- // .. .. ==> 0XF8006190[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_at_spd_atpg = 0x0
- // .. .. ==> 0XF8006190[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_bist_enable = 0x0
- // .. .. ==> 0XF8006190[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_force_err = 0x0
- // .. .. ==> 0XF8006190[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_bist_mode = 0x0
- // .. .. ==> 0XF8006190[6:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. .. reg_phy_invert_clkout = 0x1
- // .. .. ==> 0XF8006190[7:7] = 0x00000001U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. .. reg_phy_sel_logic = 0x0
- // .. .. ==> 0XF8006190[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_ratio = 0x100
- // .. .. ==> 0XF8006190[19:10] = 0x00000100U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00040000U
- // .. .. reg_phy_ctrl_slave_force = 0x0
- // .. .. ==> 0XF8006190[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006190[27:21] = 0x00000000U
- // .. .. ==> MASK : 0x0FE00000U VAL : 0x00000000U
- // .. .. reg_phy_lpddr = 0x0
- // .. .. ==> 0XF8006190[29:29] = 0x00000000U
- // .. .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // .. .. reg_phy_cmd_latency = 0x0
- // .. .. ==> 0XF8006190[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006190, 0x6FFFFEFEU ,0x00040080U),
- // .. .. reg_phy_wr_rl_delay = 0x2
- // .. .. ==> 0XF8006194[4:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000002U
- // .. .. reg_phy_rd_rl_delay = 0x4
- // .. .. ==> 0XF8006194[9:5] = 0x00000004U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x00000080U
- // .. .. reg_phy_dll_lock_diff = 0xf
- // .. .. ==> 0XF8006194[13:10] = 0x0000000FU
- // .. .. ==> MASK : 0x00003C00U VAL : 0x00003C00U
- // .. .. reg_phy_use_wr_level = 0x1
- // .. .. ==> 0XF8006194[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. reg_phy_use_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF8006194[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. reg_phy_use_rd_data_eye_level = 0x1
- // .. .. ==> 0XF8006194[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_dis_calib_rst = 0x0
- // .. .. ==> 0XF8006194[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006194[19:18] = 0x00000000U
- // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U),
- // .. .. reg_arb_page_addr_mask = 0x0
- // .. .. ==> 0XF8006204[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006208[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006208[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006208[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006208[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006208, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF800620C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF800620C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF800620C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF800620C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800620C, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006210[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006210[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006210[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006210[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006210, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006214[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006214[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006214[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006214[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006214, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006218[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006218[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006218[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006218[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006218[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF800621C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF800621C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF800621C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF800621C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF800621C[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006220[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006220[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006220[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006220[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006220[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006224[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006224[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006224[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006224[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006224[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_ddrc_lpddr2 = 0x0
- // .. .. ==> 0XF80062A8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_derate_enable = 0x0
- // .. .. ==> 0XF80062A8[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_ddrc_mr4_margin = 0x0
- // .. .. ==> 0XF80062A8[11:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062A8, 0x00000FF5U ,0x00000000U),
- // .. .. reg_ddrc_mr4_read_interval = 0x0
- // .. .. ==> 0XF80062AC[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_ddrc_min_stable_clock_x1 = 0x5
- // .. .. ==> 0XF80062B0[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_idle_after_reset_x32 = 0x11
- // .. .. ==> 0XF80062B0[11:4] = 0x00000011U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000110U
- // .. .. reg_ddrc_t_mrw = 0x5
- // .. .. ==> 0XF80062B0[21:12] = 0x00000005U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005115U),
- // .. .. reg_ddrc_max_auto_init_x1024 = 0x9e
- // .. .. ==> 0XF80062B4[7:0] = 0x0000009EU
- // .. .. ==> MASK : 0x000000FFU VAL : 0x0000009EU
- // .. .. reg_ddrc_dev_zqinit_x32 = 0x11
- // .. .. ==> 0XF80062B4[17:8] = 0x00000011U
- // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001100U
- // .. ..
- EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x0000119EU),
- // .. .. START: POLL ON DCI STATUS
- // .. .. DONE = 1
- // .. .. ==> 0XF8000B74[13:13] = 0x00000001U
- // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U
- // .. ..
- EMIT_MASKPOLL(0XF8000B74, 0x00002000U),
- // .. .. FINISH: POLL ON DCI STATUS
- // .. .. START: UNLOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0x1
- // .. .. ==> 0XF8006000[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000085U),
- // .. .. FINISH: UNLOCK DDR
- // .. .. START: CHECK DDR STATUS
- // .. .. ddrc_reg_operating_mode = 1
- // .. .. ==> 0XF8006054[2:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U
- // .. ..
- EMIT_MASKPOLL(0XF8006054, 0x00000007U),
- // .. .. FINISH: CHECK DDR STATUS
- // .. FINISH: DDR INITIALIZATION
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_mio_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: OCM REMAPPING
- // .. FINISH: OCM REMAPPING
- // .. START: DDRIOB SETTINGS
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B40[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B40[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B40[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B40[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B40[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B40[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B40[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B44[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B44[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B44[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B44[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B44[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B44[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B44[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B48[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x1
- // .. ==> 0XF8000B48[2:1] = 0x00000001U
- // .. ==> MASK : 0x00000006U VAL : 0x00000002U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B48[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B48[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCI_TYPE = 0x3
- // .. ==> 0XF8000B48[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B48[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B48[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B4C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B4C[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B4C[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B4C[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B4C[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B4C[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B4C[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000800U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B50[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x2
- // .. ==> 0XF8000B50[2:1] = 0x00000002U
- // .. ==> MASK : 0x00000006U VAL : 0x00000004U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B50[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B50[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCI_TYPE = 0x3
- // .. ==> 0XF8000B50[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B50[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B50[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B54[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B54[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B54[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B54[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B54[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B54[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B54[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000800U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B58[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B58[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B58[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B58[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B58[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B58[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B58[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B5C[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B5C[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x3
- // .. ==> 0XF8000B5C[18:14] = 0x00000003U
- // .. ==> MASK : 0x0007C000U VAL : 0x0000C000U
- // .. reserved_SLEW_N = 0x3
- // .. ==> 0XF8000B5C[23:19] = 0x00000003U
- // .. ==> MASK : 0x00F80000U VAL : 0x00180000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B5C[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B5C[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C068U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B60[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B60[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x6
- // .. ==> 0XF8000B60[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. reserved_SLEW_N = 0x1f
- // .. ==> 0XF8000B60[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B60[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B60[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F98068U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B64[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B64[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x6
- // .. ==> 0XF8000B64[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. reserved_SLEW_N = 0x1f
- // .. ==> 0XF8000B64[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B64[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B64[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F98068U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B68[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B68[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x6
- // .. ==> 0XF8000B68[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. reserved_SLEW_N = 0x1f
- // .. ==> 0XF8000B68[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B68[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B68[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F98068U),
- // .. VREF_INT_EN = 0x0
- // .. ==> 0XF8000B6C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. VREF_SEL = 0x0
- // .. ==> 0XF8000B6C[4:1] = 0x00000000U
- // .. ==> MASK : 0x0000001EU VAL : 0x00000000U
- // .. VREF_EXT_EN = 0x1
- // .. ==> 0XF8000B6C[6:5] = 0x00000001U
- // .. ==> MASK : 0x00000060U VAL : 0x00000020U
- // .. reserved_VREF_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[8:7] = 0x00000000U
- // .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. REFIO_EN = 0x1
- // .. ==> 0XF8000B6C[9:9] = 0x00000001U
- // .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. reserved_REFIO_TEST = 0x0
- // .. ==> 0XF8000B6C[11:10] = 0x00000000U
- // .. ==> MASK : 0x00000C00U VAL : 0x00000000U
- // .. reserved_REFIO_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. reserved_DRST_B_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. reserved_CKE_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[14:14] = 0x00000000U
- // .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B6C, 0x00007FFFU ,0x00000220U),
- // .. .. START: ASSERT RESET
- // .. .. RESET = 1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000001U ,0x00000001U),
- // .. .. FINISH: ASSERT RESET
- // .. .. START: DEASSERT RESET
- // .. .. RESET = 0
- // .. .. ==> 0XF8000B70[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reserved_VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U),
- // .. .. FINISH: DEASSERT RESET
- // .. .. RESET = 0x1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ENABLE = 0x1
- // .. .. ==> 0XF8000B70[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reserved_VRP_TRI = 0x0
- // .. .. ==> 0XF8000B70[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reserved_VRN_TRI = 0x0
- // .. .. ==> 0XF8000B70[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reserved_VRP_OUT = 0x0
- // .. .. ==> 0XF8000B70[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reserved_VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. .. NREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[7:6] = 0x00000000U
- // .. .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. .. NREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[10:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000700U VAL : 0x00000000U
- // .. .. NREF_OPT4 = 0x1
- // .. .. ==> 0XF8000B70[13:11] = 0x00000001U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00000800U
- // .. .. PREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[15:14] = 0x00000000U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. .. PREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[19:17] = 0x00000000U
- // .. .. ==> MASK : 0x000E0000U VAL : 0x00000000U
- // .. .. UPDATE_CONTROL = 0x0
- // .. .. ==> 0XF8000B70[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reserved_INIT_COMPLETE = 0x0
- // .. .. ==> 0XF8000B70[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. reserved_TST_CLK = 0x0
- // .. .. ==> 0XF8000B70[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reserved_TST_HLN = 0x0
- // .. .. ==> 0XF8000B70[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reserved_TST_HLP = 0x0
- // .. .. ==> 0XF8000B70[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. reserved_TST_RST = 0x0
- // .. .. ==> 0XF8000B70[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reserved_INT_DCI_EN = 0x0
- // .. .. ==> 0XF8000B70[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x07FEFFFFU ,0x00000823U),
- // .. FINISH: DDRIOB SETTINGS
- // .. START: MIO PROGRAMMING
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000700[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000700[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000700[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000700[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000700[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000700[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000700[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000700[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000700[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000704[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000704[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000704[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000704[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000704[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000704[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000704[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000704[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000704[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000704, 0x00003FFFU ,0x00001602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000708[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000708[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000708[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000708[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000708[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000708[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000708[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000708[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000708[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800070C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800070C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800070C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800070C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800070C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800070C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800070C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800070C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800070C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000710[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000710[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000710[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000710[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000710[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000710[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000710[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000710[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000710[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000714[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000714[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000714[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000714[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000714[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000714[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000714[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000714[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000714[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000718[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000718[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000718[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000718[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000718[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000718[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000718[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000718[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000718[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800071C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800071C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800071C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800071C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800071C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800071C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800071C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800071C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800071C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000720[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000720[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000720[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000720[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000720[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000720[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000720[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000720[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000720[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000724[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. Speed = 0
- // .. ==> 0XF8000724[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000724[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000724[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000724[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000724, 0x00003F01U ,0x00001601U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000728[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000728[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000728[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000728[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000728[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000728[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000728[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000728[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000728[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800072C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800072C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800072C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800072C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800072C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800072C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800072C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800072C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800072C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000730[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000730[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000730[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000730[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000730[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000730[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000730[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000730[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000730[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000734[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000734[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000734[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000734[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000734[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000734[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000734[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000734[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000734[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000738[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000738[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000738[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000738[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000738[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000738[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000738[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000738[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000738[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800073C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800073C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800073C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800073C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800073C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800073C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800073C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800073C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800073C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800073C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000740[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000740[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000740[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000740[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000740[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000740[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000740[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000740[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000740[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000740, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000744[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000744[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000744[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000744[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000744[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000744[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000744[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000744[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000744[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000744, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000748[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000748[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000748[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000748[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000748[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000748[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000748[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000748[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000748[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000748, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800074C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800074C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800074C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800074C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800074C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800074C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800074C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800074C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800074C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800074C, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000750[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000750[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000750[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000750[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000750[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000750[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000750[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000750[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000750[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000750, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000754[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000754[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000754[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000754[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000754[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000754[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000754[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000754[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000754[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000754, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000758[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000758[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000758[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000758[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000758[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000758[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000758[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000758[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000758[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000758, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800075C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800075C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800075C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800075C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800075C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800075C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800075C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800075C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800075C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800075C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000760[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000760[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000760[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000760[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000760[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000760[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000760[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000760[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000760[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000764[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000764[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000764[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000764[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000764[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000764[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000764[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000764[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000764[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000768[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000768[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000768[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000768[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000768[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000768[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000768[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000768[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000768[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800076C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800076C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800076C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800076C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800076C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800076C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800076C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800076C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800076C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000770[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000770[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000770[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000770[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000770[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000770[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000770[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000770[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000770[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000774[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000774[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000774[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000774[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000774[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000774[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000774[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000774[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000774[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000778[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000778[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000778[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000778[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000778[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000778[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000778[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000778[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000778[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800077C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF800077C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800077C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800077C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800077C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800077C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800077C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800077C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800077C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000780[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000780[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000780[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000780[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000780[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000780[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000780[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000780[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000780[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000784[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000784[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000784[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000784[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000784[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000784[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000784[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000784[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000784[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000788[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000788[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000788[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000788[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000788[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000788[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000788[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000788[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000788[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800078C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800078C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800078C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800078C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800078C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800078C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800078C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800078C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800078C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000790[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000790[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000790[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000790[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000790[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000790[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000790[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000790[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000790[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000794[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000794[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000794[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000794[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000794[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000794[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000794[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000794[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000794[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000798[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000798[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000798[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000798[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000798[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000798[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000798[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000798[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000798[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800079C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800079C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800079C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800079C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800079C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800079C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800079C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800079C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800079C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A0[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A8[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007AC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007AC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007AC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007AC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007AC[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007AC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007AC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007AC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007AC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007B0[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007B0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007B4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007B4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007B8[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007B8[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007B8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007BC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007BC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007BC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007BC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007BC[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007BC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007BC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007BC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007BC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C0[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007C4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C4[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007C8[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007C8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007CC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007CC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007CC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007CC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007CC[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007CC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007CC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007CC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007CC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007D0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D0[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00001420U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007D4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D4[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00001421U),
- // .. SDIO1_WP_SEL = 57
- // .. ==> 0XF8000834[5:0] = 0x00000039U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000039U
- // .. SDIO1_CD_SEL = 9
- // .. ==> 0XF8000834[21:16] = 0x00000009U
- // .. ==> MASK : 0x003F0000U VAL : 0x00090000U
- // ..
- EMIT_MASKWRITE(0XF8000834, 0x003F003FU ,0x00090039U),
- // .. FINISH: MIO PROGRAMMING
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_peripherals_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000000U),
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000000U),
- // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // .. START: SRAM/NOR SET OPMODE
- // .. FINISH: SRAM/NOR SET OPMODE
- // .. START: UART REGISTERS
- // .. BDIV = 0x6
- // .. ==> 0XE0001034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0001018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0001000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0001000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0001000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0001000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0001000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0001000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0001000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0001000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0001000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U),
- // .. CHMODE = 0x0
- // .. ==> 0XE0001004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0001004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0001004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0001004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0001004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0001004, 0x000003FFU ,0x00000020U),
- // .. BDIV = 0x6
- // .. ==> 0XE0000034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0000034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0000018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0000018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0000000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0000000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0000000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0000000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0000000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0000000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0000000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0000000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0000000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0000000, 0x000001FFU ,0x00000017U),
- // .. CHMODE = 0x0
- // .. ==> 0XE0000004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0000004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0000004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0000004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0000004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0000004, 0x000003FFU ,0x00000020U),
- // .. FINISH: UART REGISTERS
- // .. START: QSPI REGISTERS
- // .. Holdb_dr = 1
- // .. ==> 0XE000D000[19:19] = 0x00000001U
- // .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // ..
- EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U),
- // .. FINISH: QSPI REGISTERS
- // .. START: PL POWER ON RESET REGISTERS
- // .. PCFG_POR_CNT_4K = 0
- // .. ==> 0XF8007000[29:29] = 0x00000000U
- // .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U),
- // .. FINISH: PL POWER ON RESET REGISTERS
- // .. START: SMC TIMING CALCULATION REGISTER UPDATE
- // .. .. START: NAND SET CYCLE
- // .. .. FINISH: NAND SET CYCLE
- // .. .. START: OPMODE
- // .. .. FINISH: OPMODE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: SRAM/NOR CS0 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS0 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS0 BASE ADDRESS
- // .. .. FINISH: NOR CS0 BASE ADDRESS
- // .. .. START: SRAM/NOR CS1 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS1 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS1 BASE ADDRESS
- // .. .. FINISH: NOR CS1 BASE ADDRESS
- // .. .. START: USB RESET
- // .. .. FINISH: USB RESET
- // .. .. START: ENET RESET
- // .. .. FINISH: ENET RESET
- // .. .. START: I2C RESET
- // .. .. FINISH: I2C RESET
- // .. .. START: NOR CHIP SELECT
- // .. .. .. START: DIR MODE BANK 0
- // .. .. .. FINISH: DIR MODE BANK 0
- // .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. FINISH: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. START: OUTPUT ENABLE BANK 0
- // .. .. .. FINISH: OUTPUT ENABLE BANK 0
- // .. .. FINISH: NOR CHIP SELECT
- // .. FINISH: SMC TIMING CALCULATION REGISTER UPDATE
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_post_config_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: ENABLING LEVEL SHIFTER
- // .. USER_LVL_INP_EN_0 = 1
- // .. ==> 0XF8000900[3:3] = 0x00000001U
- // .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. USER_LVL_OUT_EN_0 = 1
- // .. ==> 0XF8000900[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. USER_LVL_INP_EN_1 = 1
- // .. ==> 0XF8000900[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. USER_LVL_OUT_EN_1 = 1
- // .. ==> 0XF8000900[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU),
- // .. FINISH: ENABLING LEVEL SHIFTER
- // .. START: FPGA RESETS TO 0
- // .. reserved_3 = 0
- // .. ==> 0XF8000240[31:25] = 0x00000000U
- // .. ==> MASK : 0xFE000000U VAL : 0x00000000U
- // .. reserved_FPGA_ACP_RST = 0
- // .. ==> 0XF8000240[24:24] = 0x00000000U
- // .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS3_RST = 0
- // .. ==> 0XF8000240[23:23] = 0x00000000U
- // .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS2_RST = 0
- // .. ==> 0XF8000240[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS1_RST = 0
- // .. ==> 0XF8000240[21:21] = 0x00000000U
- // .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS0_RST = 0
- // .. ==> 0XF8000240[20:20] = 0x00000000U
- // .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. reserved_2 = 0
- // .. ==> 0XF8000240[19:18] = 0x00000000U
- // .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. reserved_FSSW1_FPGA_RST = 0
- // .. ==> 0XF8000240[17:17] = 0x00000000U
- // .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. reserved_FSSW0_FPGA_RST = 0
- // .. ==> 0XF8000240[16:16] = 0x00000000U
- // .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. reserved_1 = 0
- // .. ==> 0XF8000240[15:14] = 0x00000000U
- // .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. reserved_FPGA_FMSW1_RST = 0
- // .. ==> 0XF8000240[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. reserved_FPGA_FMSW0_RST = 0
- // .. ==> 0XF8000240[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. reserved_FPGA_DMA3_RST = 0
- // .. ==> 0XF8000240[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. reserved_FPGA_DMA2_RST = 0
- // .. ==> 0XF8000240[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. reserved_FPGA_DMA1_RST = 0
- // .. ==> 0XF8000240[9:9] = 0x00000000U
- // .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. reserved_FPGA_DMA0_RST = 0
- // .. ==> 0XF8000240[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. reserved = 0
- // .. ==> 0XF8000240[7:4] = 0x00000000U
- // .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. FPGA3_OUT_RST = 0
- // .. ==> 0XF8000240[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. FPGA2_OUT_RST = 0
- // .. ==> 0XF8000240[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. FPGA1_OUT_RST = 0
- // .. ==> 0XF8000240[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. FPGA0_OUT_RST = 0
- // .. ==> 0XF8000240[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U),
- // .. FINISH: FPGA RESETS TO 0
- // .. START: AFI REGISTERS
- // .. .. START: AFI0 REGISTERS
- // .. .. FINISH: AFI0 REGISTERS
- // .. .. START: AFI1 REGISTERS
- // .. .. FINISH: AFI1 REGISTERS
- // .. .. START: AFI2 REGISTERS
- // .. .. FINISH: AFI2 REGISTERS
- // .. .. START: AFI3 REGISTERS
- // .. .. FINISH: AFI3 REGISTERS
- // .. .. START: AFI2 SECURE REGISTER
- // .. .. FINISH: AFI2 SECURE REGISTER
- // .. FINISH: AFI REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_debug_3_0[] = {
- // START: top
- // .. START: CROSS TRIGGER CONFIGURATIONS
- // .. .. START: UNLOCKING CTI REGISTERS
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
- // .. .. FINISH: UNLOCKING CTI REGISTERS
- // .. .. START: ENABLING CTI MODULES AND CHANNELS
- // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
- // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. FINISH: CROSS TRIGGER CONFIGURATIONS
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_pll_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: PLL SLCR REGISTERS
- // .. .. START: ARM PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000110[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000110[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x145
- // .. .. ==> 0XF8000110[21:12] = 0x00000145U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U
- // .. ..
- EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x001452C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x1e
- // .. .. .. ==> 0XF8000100[18:12] = 0x0000001EU
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x0001E000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. ARM_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000001U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. SRCSEL = 0x0
- // .. .. .. ==> 0XF8000120[5:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. .. DIVISOR = 0x2
- // .. .. .. ==> 0XF8000120[13:8] = 0x00000002U
- // .. .. .. ==> MASK : 0x00003F00U VAL : 0x00000200U
- // .. .. .. CPU_6OR4XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[24:24] = 0x00000001U
- // .. .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. .. .. CPU_3OR2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[25:25] = 0x00000001U
- // .. .. .. ==> MASK : 0x02000000U VAL : 0x02000000U
- // .. .. .. CPU_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[26:26] = 0x00000001U
- // .. .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. .. CPU_1XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[27:27] = 0x00000001U
- // .. .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. .. CPU_PERI_CLKACT = 0x1
- // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U
- // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U),
- // .. .. FINISH: ARM PLL INIT
- // .. .. START: DDR PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000114[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000114[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x1f4
- // .. .. ==> 0XF8000114[21:12] = 0x000001F4U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x001F4000U
- // .. ..
- EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x001F42C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x14
- // .. .. .. ==> 0XF8000104[18:12] = 0x00000014U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00014000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00014000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. DDR_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000002U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. DDR_3XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. .. DDR_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. .. DDR_3XCLK_DIVISOR = 0x2
- // .. .. .. ==> 0XF8000124[25:20] = 0x00000002U
- // .. .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. .. .. DDR_2XCLK_DIVISOR = 0x3
- // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U
- // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U),
- // .. .. FINISH: DDR PLL INIT
- // .. .. START: IO PLL INIT
- // .. .. PLL_RES = 0x2
- // .. .. ==> 0XF8000118[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000118[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x113
- // .. .. ==> 0XF8000118[21:12] = 0x00000113U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00113000U
- // .. ..
- EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x00113220U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x23
- // .. .. .. ==> 0XF8000108[18:12] = 0x00000023U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00023000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x00023000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. IO_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000004U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. FINISH: IO PLL INIT
- // .. FINISH: PLL SLCR REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_clock_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: CLOCK CONTROL SLCR REGISTERS
- // .. CLKACT = 0x1
- // .. ==> 0XF8000128[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. DIVISOR0 = 0x31
- // .. ==> 0XF8000128[13:8] = 0x00000031U
- // .. ==> MASK : 0x00003F00U VAL : 0x00003100U
- // .. DIVISOR1 = 0x2
- // .. ==> 0XF8000128[25:20] = 0x00000002U
- // .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // ..
- EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00203101U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000138[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000138[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000138, 0x00000011U ,0x00000001U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000140[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000140[6:4] = 0x00000000U
- // .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. DIVISOR = 0xe
- // .. ==> 0XF8000140[13:8] = 0x0000000EU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000E00U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF8000140[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF8000140, 0x03F03F71U ,0x00100E01U),
- // .. CLKACT = 0x1
- // .. ==> 0XF800014C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800014C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xd
- // .. ==> 0XF800014C[13:8] = 0x0000000DU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000D00U
- // ..
- EMIT_MASKWRITE(0XF800014C, 0x00003F31U ,0x00000D01U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF8000150[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000150[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000150[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000150[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000150, 0x00003F33U ,0x00001202U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000154[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000154[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000154[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000154[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001203U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000158[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000158[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000158[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xb
- // .. ==> 0XF8000158[13:8] = 0x0000000BU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000B00U
- // ..
- EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000B03U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF800015C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF800015C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800015C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR0 = 0x12
- // .. ==> 0XF800015C[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF800015C[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00101202U),
- // .. CAN0_MUX = 0x0
- // .. ==> 0XF8000160[5:0] = 0x00000000U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000000U
- // .. CAN0_REF_SEL = 0x0
- // .. ==> 0XF8000160[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. CAN1_MUX = 0x0
- // .. ==> 0XF8000160[21:16] = 0x00000000U
- // .. ==> MASK : 0x003F0000U VAL : 0x00000000U
- // .. CAN1_REF_SEL = 0x0
- // .. ==> 0XF8000160[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U),
- // .. .. START: TRACE CLOCK
- // .. .. FINISH: TRACE CLOCK
- // .. .. CLKACT = 0x1
- // .. .. ==> 0XF8000168[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000168[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR = 0x9
- // .. .. ==> 0XF8000168[13:8] = 0x00000009U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000900U
- // .. ..
- EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000901U),
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000170[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR0 = 0x7
- // .. .. ==> 0XF8000170[13:8] = 0x00000007U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000700U
- // .. .. DIVISOR1 = 0x2
- // .. .. ==> 0XF8000170[25:20] = 0x00000002U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00200700U),
- // .. .. CLK_621_TRUE = 0x1
- // .. .. ==> 0XF80001C4[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U),
- // .. .. DMA_CPU_2XCLKACT = 0x1
- // .. .. ==> 0XF800012C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. USB0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[2:2] = 0x00000001U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. USB1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. .. GEM0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[6:6] = 0x00000001U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000040U
- // .. .. GEM1_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. SDI0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. SDI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[11:11] = 0x00000001U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // .. .. SPI0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. SPI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. CAN0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. CAN1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. .. I2C0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[18:18] = 0x00000001U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00040000U
- // .. .. I2C1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. .. UART0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[20:20] = 0x00000001U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00100000U
- // .. .. UART1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. GPIO_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[22:22] = 0x00000001U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00400000U
- // .. .. LQSPI_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[23:23] = 0x00000001U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00800000U
- // .. .. SMC_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[24:24] = 0x00000001U
- // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. ..
- EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x01FEC84DU),
- // .. FINISH: CLOCK CONTROL SLCR REGISTERS
- // .. START: THIS SHOULD BE BLANK
- // .. FINISH: THIS SHOULD BE BLANK
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_ddr_init_data_2_0[] = {
- // START: top
- // .. START: DDR INITIALIZATION
- // .. .. START: LOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0
- // .. .. ==> 0XF8006000[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 0x1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000084U),
- // .. .. FINISH: LOCK DDR
- // .. .. reg_ddrc_t_rfc_nom_x32 = 0x79
- // .. .. ==> 0XF8006004[11:0] = 0x00000079U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000079U
- // .. .. reg_ddrc_active_ranks = 0x1
- // .. .. ==> 0XF8006004[13:12] = 0x00000001U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00001000U
- // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0
- // .. .. ==> 0XF8006004[18:14] = 0x00000000U
- // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_block = 0x1
- // .. .. ==> 0XF8006004[20:19] = 0x00000001U
- // .. .. ==> MASK : 0x00180000U VAL : 0x00080000U
- // .. .. reg_ddrc_diff_rank_rd_2cycle_gap = 0x0
- // .. .. ==> 0XF8006004[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_cs_bit1 = 0x0
- // .. .. ==> 0XF8006004[26:22] = 0x00000000U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_open_bank = 0x0
- // .. .. ==> 0XF8006004[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_4bank_ram = 0x0
- // .. .. ==> 0XF8006004[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006004, 0x1FFFFFFFU ,0x00081079U),
- // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf
- // .. .. ==> 0XF8006008[10:0] = 0x0000000FU
- // .. .. ==> MASK : 0x000007FFU VAL : 0x0000000FU
- // .. .. reg_ddrc_hpr_max_starve_x32 = 0xf
- // .. .. ==> 0XF8006008[21:11] = 0x0000000FU
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00007800U
- // .. .. reg_ddrc_hpr_xact_run_length = 0xf
- // .. .. ==> 0XF8006008[25:22] = 0x0000000FU
- // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U
- // .. ..
- EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU),
- // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF800600C[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_lpr_max_starve_x32 = 0x2
- // .. .. ==> 0XF800600C[21:11] = 0x00000002U
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00001000U
- // .. .. reg_ddrc_lpr_xact_run_length = 0x8
- // .. .. ==> 0XF800600C[25:22] = 0x00000008U
- // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U
- // .. ..
- EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U),
- // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF8006010[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_w_xact_run_length = 0x8
- // .. .. ==> 0XF8006010[14:11] = 0x00000008U
- // .. .. ==> MASK : 0x00007800U VAL : 0x00004000U
- // .. .. reg_ddrc_w_max_starve_x32 = 0x2
- // .. .. ==> 0XF8006010[25:15] = 0x00000002U
- // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U
- // .. ..
- EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U),
- // .. .. reg_ddrc_t_rc = 0x19
- // .. .. ==> 0XF8006014[5:0] = 0x00000019U
- // .. .. ==> MASK : 0x0000003FU VAL : 0x00000019U
- // .. .. reg_ddrc_t_rfc_min = 0x50
- // .. .. ==> 0XF8006014[13:6] = 0x00000050U
- // .. .. ==> MASK : 0x00003FC0U VAL : 0x00001400U
- // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10
- // .. .. ==> 0XF8006014[20:14] = 0x00000010U
- // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x00041419U),
- // .. .. reg_ddrc_wr2pre = 0x12
- // .. .. ==> 0XF8006018[4:0] = 0x00000012U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000012U
- // .. .. reg_ddrc_powerdown_to_x32 = 0x6
- // .. .. ==> 0XF8006018[9:5] = 0x00000006U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000C0U
- // .. .. reg_ddrc_t_faw = 0x14
- // .. .. ==> 0XF8006018[15:10] = 0x00000014U
- // .. .. ==> MASK : 0x0000FC00U VAL : 0x00005000U
- // .. .. reg_ddrc_t_ras_max = 0x22
- // .. .. ==> 0XF8006018[21:16] = 0x00000022U
- // .. .. ==> MASK : 0x003F0000U VAL : 0x00220000U
- // .. .. reg_ddrc_t_ras_min = 0x12
- // .. .. ==> 0XF8006018[26:22] = 0x00000012U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x04800000U
- // .. .. reg_ddrc_t_cke = 0x4
- // .. .. ==> 0XF8006018[31:28] = 0x00000004U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44A250D2U),
- // .. .. reg_ddrc_write_latency = 0x5
- // .. .. ==> 0XF800601C[4:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000005U
- // .. .. reg_ddrc_rd2wr = 0x7
- // .. .. ==> 0XF800601C[9:5] = 0x00000007U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000E0U
- // .. .. reg_ddrc_wr2rd = 0xe
- // .. .. ==> 0XF800601C[14:10] = 0x0000000EU
- // .. .. ==> MASK : 0x00007C00U VAL : 0x00003800U
- // .. .. reg_ddrc_t_xp = 0x4
- // .. .. ==> 0XF800601C[19:15] = 0x00000004U
- // .. .. ==> MASK : 0x000F8000U VAL : 0x00020000U
- // .. .. reg_ddrc_pad_pd = 0x0
- // .. .. ==> 0XF800601C[22:20] = 0x00000000U
- // .. .. ==> MASK : 0x00700000U VAL : 0x00000000U
- // .. .. reg_ddrc_rd2pre = 0x4
- // .. .. ==> 0XF800601C[27:23] = 0x00000004U
- // .. .. ==> MASK : 0x0F800000U VAL : 0x02000000U
- // .. .. reg_ddrc_t_rcd = 0x7
- // .. .. ==> 0XF800601C[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U),
- // .. .. reg_ddrc_t_ccd = 0x4
- // .. .. ==> 0XF8006020[4:2] = 0x00000004U
- // .. .. ==> MASK : 0x0000001CU VAL : 0x00000010U
- // .. .. reg_ddrc_t_rrd = 0x5
- // .. .. ==> 0XF8006020[7:5] = 0x00000005U
- // .. .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. .. reg_ddrc_refresh_margin = 0x2
- // .. .. ==> 0XF8006020[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_rp = 0x7
- // .. .. ==> 0XF8006020[15:12] = 0x00000007U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00007000U
- // .. .. reg_ddrc_refresh_to_x32 = 0x8
- // .. .. ==> 0XF8006020[20:16] = 0x00000008U
- // .. .. ==> MASK : 0x001F0000U VAL : 0x00080000U
- // .. .. reg_ddrc_sdram = 0x1
- // .. .. ==> 0XF8006020[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. reg_ddrc_mobile = 0x0
- // .. .. ==> 0XF8006020[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reg_ddrc_clock_stop_en = 0x0
- // .. .. ==> 0XF8006020[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reg_ddrc_read_latency = 0x7
- // .. .. ==> 0XF8006020[28:24] = 0x00000007U
- // .. .. ==> MASK : 0x1F000000U VAL : 0x07000000U
- // .. .. reg_phy_mode_ddr1_ddr2 = 0x1
- // .. .. ==> 0XF8006020[29:29] = 0x00000001U
- // .. .. ==> MASK : 0x20000000U VAL : 0x20000000U
- // .. .. reg_ddrc_dis_pad_pd = 0x0
- // .. .. ==> 0XF8006020[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_ddrc_loopback = 0x0
- // .. .. ==> 0XF8006020[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006020, 0xFFFFFFFCU ,0x272872B0U),
- // .. .. reg_ddrc_en_2t_timing_mode = 0x0
- // .. .. ==> 0XF8006024[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_prefer_write = 0x0
- // .. .. ==> 0XF8006024[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_max_rank_rd = 0xf
- // .. .. ==> 0XF8006024[5:2] = 0x0000000FU
- // .. .. ==> MASK : 0x0000003CU VAL : 0x0000003CU
- // .. .. reg_ddrc_mr_wr = 0x0
- // .. .. ==> 0XF8006024[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_addr = 0x0
- // .. .. ==> 0XF8006024[8:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_data = 0x0
- // .. .. ==> 0XF8006024[24:9] = 0x00000000U
- // .. .. ==> MASK : 0x01FFFE00U VAL : 0x00000000U
- // .. .. ddrc_reg_mr_wr_busy = 0x0
- // .. .. ==> 0XF8006024[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_type = 0x0
- // .. .. ==> 0XF8006024[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_rdata_valid = 0x0
- // .. .. ==> 0XF8006024[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006024, 0x0FFFFFFFU ,0x0000003CU),
- // .. .. reg_ddrc_final_wait_x32 = 0x7
- // .. .. ==> 0XF8006028[6:0] = 0x00000007U
- // .. .. ==> MASK : 0x0000007FU VAL : 0x00000007U
- // .. .. reg_ddrc_pre_ocd_x32 = 0x0
- // .. .. ==> 0XF8006028[10:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000780U VAL : 0x00000000U
- // .. .. reg_ddrc_t_mrd = 0x4
- // .. .. ==> 0XF8006028[13:11] = 0x00000004U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U
- // .. ..
- EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U),
- // .. .. reg_ddrc_emr2 = 0x8
- // .. .. ==> 0XF800602C[15:0] = 0x00000008U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000008U
- // .. .. reg_ddrc_emr3 = 0x0
- // .. .. ==> 0XF800602C[31:16] = 0x00000000U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U),
- // .. .. reg_ddrc_mr = 0x930
- // .. .. ==> 0XF8006030[15:0] = 0x00000930U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000930U
- // .. .. reg_ddrc_emr = 0x4
- // .. .. ==> 0XF8006030[31:16] = 0x00000004U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U),
- // .. .. reg_ddrc_burst_rdwr = 0x4
- // .. .. ==> 0XF8006034[3:0] = 0x00000004U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000004U
- // .. .. reg_ddrc_pre_cke_x1024 = 0x156
- // .. .. ==> 0XF8006034[13:4] = 0x00000156U
- // .. .. ==> MASK : 0x00003FF0U VAL : 0x00001560U
- // .. .. reg_ddrc_post_cke_x1024 = 0x1
- // .. .. ==> 0XF8006034[25:16] = 0x00000001U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00010000U
- // .. .. reg_ddrc_burstchop = 0x0
- // .. .. ==> 0XF8006034[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x00011564U),
- // .. .. reg_ddrc_force_low_pri_n = 0x0
- // .. .. ==> 0XF8006038[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_dq = 0x0
- // .. .. ==> 0XF8006038[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_debug_mode = 0x0
- // .. .. ==> 0XF8006038[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_phy_wr_level_start = 0x0
- // .. .. ==> 0XF8006038[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_phy_rd_level_start = 0x0
- // .. .. ==> 0XF8006038[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_dq0_wait_t = 0x0
- // .. .. ==> 0XF8006038[12:9] = 0x00000000U
- // .. .. ==> MASK : 0x00001E00U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006038, 0x00001FC3U ,0x00000000U),
- // .. .. reg_ddrc_addrmap_bank_b0 = 0x6
- // .. .. ==> 0XF800603C[3:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000006U
- // .. .. reg_ddrc_addrmap_bank_b1 = 0x6
- // .. .. ==> 0XF800603C[7:4] = 0x00000006U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000060U
- // .. .. reg_ddrc_addrmap_bank_b2 = 0x6
- // .. .. ==> 0XF800603C[11:8] = 0x00000006U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000600U
- // .. .. reg_ddrc_addrmap_col_b5 = 0x0
- // .. .. ==> 0XF800603C[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b6 = 0x0
- // .. .. ==> 0XF800603C[19:16] = 0x00000000U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000666U),
- // .. .. reg_ddrc_addrmap_col_b2 = 0x0
- // .. .. ==> 0XF8006040[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b3 = 0x0
- // .. .. ==> 0XF8006040[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b4 = 0x0
- // .. .. ==> 0XF8006040[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b7 = 0x0
- // .. .. ==> 0XF8006040[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b8 = 0xf
- // .. .. ==> 0XF8006040[19:16] = 0x0000000FU
- // .. .. ==> MASK : 0x000F0000U VAL : 0x000F0000U
- // .. .. reg_ddrc_addrmap_col_b9 = 0xf
- // .. .. ==> 0XF8006040[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_col_b10 = 0xf
- // .. .. ==> 0XF8006040[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. .. reg_ddrc_addrmap_col_b11 = 0xf
- // .. .. ==> 0XF8006040[31:28] = 0x0000000FU
- // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFFF0000U),
- // .. .. reg_ddrc_addrmap_row_b0 = 0x5
- // .. .. ==> 0XF8006044[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_addrmap_row_b1 = 0x5
- // .. .. ==> 0XF8006044[7:4] = 0x00000005U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000050U
- // .. .. reg_ddrc_addrmap_row_b2_11 = 0x5
- // .. .. ==> 0XF8006044[11:8] = 0x00000005U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000500U
- // .. .. reg_ddrc_addrmap_row_b12 = 0x5
- // .. .. ==> 0XF8006044[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_addrmap_row_b13 = 0x5
- // .. .. ==> 0XF8006044[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_addrmap_row_b14 = 0xf
- // .. .. ==> 0XF8006044[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_row_b15 = 0xf
- // .. .. ==> 0XF8006044[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0FF55555U),
- // .. .. reg_ddrc_rank0_rd_odt = 0x0
- // .. .. ==> 0XF8006048[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_rank0_wr_odt = 0x1
- // .. .. ==> 0XF8006048[5:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000038U VAL : 0x00000008U
- // .. .. reg_ddrc_rank1_rd_odt = 0x1
- // .. .. ==> 0XF8006048[8:6] = 0x00000001U
- // .. .. ==> MASK : 0x000001C0U VAL : 0x00000040U
- // .. .. reg_ddrc_rank1_wr_odt = 0x1
- // .. .. ==> 0XF8006048[11:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000E00U VAL : 0x00000200U
- // .. .. reg_phy_rd_local_odt = 0x0
- // .. .. ==> 0XF8006048[13:12] = 0x00000000U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00000000U
- // .. .. reg_phy_wr_local_odt = 0x3
- // .. .. ==> 0XF8006048[15:14] = 0x00000003U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x0000C000U
- // .. .. reg_phy_idle_local_odt = 0x3
- // .. .. ==> 0XF8006048[17:16] = 0x00000003U
- // .. .. ==> MASK : 0x00030000U VAL : 0x00030000U
- // .. .. reg_ddrc_rank2_rd_odt = 0x0
- // .. .. ==> 0XF8006048[20:18] = 0x00000000U
- // .. .. ==> MASK : 0x001C0000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank2_wr_odt = 0x0
- // .. .. ==> 0XF8006048[23:21] = 0x00000000U
- // .. .. ==> MASK : 0x00E00000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_rd_odt = 0x0
- // .. .. ==> 0XF8006048[26:24] = 0x00000000U
- // .. .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_wr_odt = 0x0
- // .. .. ==> 0XF8006048[29:27] = 0x00000000U
- // .. .. ==> MASK : 0x38000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006048, 0x3FFFFFFFU ,0x0003C248U),
- // .. .. reg_phy_rd_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_wr_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_phy_rdc_we_to_re_delay = 0x8
- // .. .. ==> 0XF8006050[11:8] = 0x00000008U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000800U
- // .. .. reg_phy_rdc_fifo_rst_disable = 0x0
- // .. .. ==> 0XF8006050[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_phy_use_fixed_re = 0x1
- // .. .. ==> 0XF8006050[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_rdc_fifo_rst_err_cnt_clr = 0x0
- // .. .. ==> 0XF8006050[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_dis_phy_ctrl_rstn = 0x0
- // .. .. ==> 0XF8006050[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_phy_clk_stall_level = 0x0
- // .. .. ==> 0XF8006050[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[27:24] = 0x00000007U
- // .. .. ==> MASK : 0x0F000000U VAL : 0x07000000U
- // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U),
- // .. .. reg_ddrc_dll_calib_to_min_x1024 = 0x1
- // .. .. ==> 0XF8006058[7:0] = 0x00000001U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000001U
- // .. .. reg_ddrc_dll_calib_to_max_x1024 = 0x1
- // .. .. ==> 0XF8006058[15:8] = 0x00000001U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000100U
- // .. .. reg_ddrc_dis_dll_calib = 0x0
- // .. .. ==> 0XF8006058[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006058, 0x0001FFFFU ,0x00000101U),
- // .. .. reg_ddrc_rd_odt_delay = 0x3
- // .. .. ==> 0XF800605C[3:0] = 0x00000003U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000003U
- // .. .. reg_ddrc_wr_odt_delay = 0x0
- // .. .. ==> 0XF800605C[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_rd_odt_hold = 0x0
- // .. .. ==> 0XF800605C[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_hold = 0x5
- // .. .. ==> 0XF800605C[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U),
- // .. .. reg_ddrc_pageclose = 0x0
- // .. .. ==> 0XF8006060[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_lpr_num_entries = 0x1f
- // .. .. ==> 0XF8006060[6:1] = 0x0000001FU
- // .. .. ==> MASK : 0x0000007EU VAL : 0x0000003EU
- // .. .. reg_ddrc_auto_pre_en = 0x0
- // .. .. ==> 0XF8006060[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_ddrc_refresh_update_level = 0x0
- // .. .. ==> 0XF8006060[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_wc = 0x0
- // .. .. ==> 0XF8006060[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_collision_page_opt = 0x0
- // .. .. ==> 0XF8006060[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_ddrc_selfref_en = 0x0
- // .. .. ==> 0XF8006060[12:12] = 0x00000000U
- // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU),
- // .. .. reg_ddrc_go2critical_hysteresis = 0x0
- // .. .. ==> 0XF8006064[12:5] = 0x00000000U
- // .. .. ==> MASK : 0x00001FE0U VAL : 0x00000000U
- // .. .. reg_arb_go2critical_en = 0x1
- // .. .. ==> 0XF8006064[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. ..
- EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U),
- // .. .. reg_ddrc_wrlvl_ww = 0x41
- // .. .. ==> 0XF8006068[7:0] = 0x00000041U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000041U
- // .. .. reg_ddrc_rdlvl_rr = 0x41
- // .. .. ==> 0XF8006068[15:8] = 0x00000041U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00004100U
- // .. .. reg_ddrc_dfi_t_wlmrd = 0x28
- // .. .. ==> 0XF8006068[25:16] = 0x00000028U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U
- // .. ..
- EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U),
- // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10
- // .. .. ==> 0XF800606C[7:0] = 0x00000010U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000010U
- // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16
- // .. .. ==> 0XF800606C[15:8] = 0x00000016U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U
- // .. ..
- EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U),
- // .. .. reg_ddrc_dfi_t_ctrl_delay = 0x1
- // .. .. ==> 0XF8006078[3:0] = 0x00000001U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000001U
- // .. .. reg_ddrc_dfi_t_dram_clk_disable = 0x1
- // .. .. ==> 0XF8006078[7:4] = 0x00000001U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000010U
- // .. .. reg_ddrc_dfi_t_dram_clk_enable = 0x1
- // .. .. ==> 0XF8006078[11:8] = 0x00000001U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000100U
- // .. .. reg_ddrc_t_cksre = 0x5
- // .. .. ==> 0XF8006078[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_t_cksrx = 0x5
- // .. .. ==> 0XF8006078[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_t_ckesr = 0x4
- // .. .. ==> 0XF8006078[25:20] = 0x00000004U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U
- // .. ..
- EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU ,0x00455111U),
- // .. .. reg_ddrc_t_ckpde = 0x2
- // .. .. ==> 0XF800607C[3:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000002U
- // .. .. reg_ddrc_t_ckpdx = 0x2
- // .. .. ==> 0XF800607C[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. reg_ddrc_t_ckdpde = 0x2
- // .. .. ==> 0XF800607C[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_ckdpdx = 0x2
- // .. .. ==> 0XF800607C[15:12] = 0x00000002U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00002000U
- // .. .. reg_ddrc_t_ckcsx = 0x3
- // .. .. ==> 0XF800607C[19:16] = 0x00000003U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00030000U
- // .. ..
- EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU ,0x00032222U),
- // .. .. refresh_timer0_start_value_x32 = 0x0
- // .. .. ==> 0XF80060A0[11:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000000U
- // .. .. refresh_timer1_start_value_x32 = 0x8
- // .. .. ==> 0XF80060A0[23:12] = 0x00000008U
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00008000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A0, 0x00FFFFFFU ,0x00008000U),
- // .. .. reg_ddrc_dis_auto_zq = 0x0
- // .. .. ==> 0XF80060A4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_ddr3 = 0x1
- // .. .. ==> 0XF80060A4[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reg_ddrc_t_mod = 0x200
- // .. .. ==> 0XF80060A4[11:2] = 0x00000200U
- // .. .. ==> MASK : 0x00000FFCU VAL : 0x00000800U
- // .. .. reg_ddrc_t_zq_long_nop = 0x200
- // .. .. ==> 0XF80060A4[21:12] = 0x00000200U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00200000U
- // .. .. reg_ddrc_t_zq_short_nop = 0x40
- // .. .. ==> 0XF80060A4[31:22] = 0x00000040U
- // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U),
- // .. .. t_zq_short_interval_x1024 = 0xbebc
- // .. .. ==> 0XF80060A8[19:0] = 0x0000BEBCU
- // .. .. ==> MASK : 0x000FFFFFU VAL : 0x0000BEBCU
- // .. .. dram_rstn_x1024 = 0x62
- // .. .. ==> 0XF80060A8[27:20] = 0x00000062U
- // .. .. ==> MASK : 0x0FF00000U VAL : 0x06200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0620BEBCU),
- // .. .. deeppowerdown_en = 0x0
- // .. .. ==> 0XF80060AC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. deeppowerdown_to_x1024 = 0xf5
- // .. .. ==> 0XF80060AC[8:1] = 0x000000F5U
- // .. .. ==> MASK : 0x000001FEU VAL : 0x000001EAU
- // .. ..
- EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001EAU),
- // .. .. dfi_wrlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000FFFU
- // .. .. dfi_rdlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[23:12] = 0x00000FFFU
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00FFF000U
- // .. .. ddrc_reg_twrlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. ddrc_reg_trdlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_dfi_wr_level_en = 0x1
- // .. .. ==> 0XF80060B0[26:26] = 0x00000001U
- // .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. reg_ddrc_dfi_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF80060B0[27:27] = 0x00000001U
- // .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1
- // .. .. ==> 0XF80060B0[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU),
- // .. .. reg_ddrc_2t_delay = 0x0
- // .. .. ==> 0XF80060B4[8:0] = 0x00000000U
- // .. .. ==> MASK : 0x000001FFU VAL : 0x00000000U
- // .. .. reg_ddrc_skip_ocd = 0x1
- // .. .. ==> 0XF80060B4[9:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. .. reg_ddrc_dis_pre_bypass = 0x0
- // .. .. ==> 0XF80060B4[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B4, 0x000007FFU ,0x00000200U),
- // .. .. reg_ddrc_dfi_t_rddata_en = 0x6
- // .. .. ==> 0XF80060B8[4:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000006U
- // .. .. reg_ddrc_dfi_t_ctrlup_min = 0x3
- // .. .. ==> 0XF80060B8[14:5] = 0x00000003U
- // .. .. ==> MASK : 0x00007FE0U VAL : 0x00000060U
- // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40
- // .. .. ==> 0XF80060B8[24:15] = 0x00000040U
- // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U),
- // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. Clear_Correctable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U),
- // .. .. CORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060C8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ECC_CORRECTED_BIT_NUM = 0x0
- // .. .. ==> 0XF80060C8[7:1] = 0x00000000U
- // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U),
- // .. .. UNCORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060DC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U),
- // .. .. STAT_NUM_CORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[15:8] = 0x00000000U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000000U
- // .. .. STAT_NUM_UNCORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[7:0] = 0x00000000U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U),
- // .. .. reg_ddrc_ecc_mode = 0x0
- // .. .. ==> 0XF80060F4[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_scrub = 0x1
- // .. .. ==> 0XF80060F4[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. ..
- EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U),
- // .. .. reg_phy_dif_on = 0x0
- // .. .. ==> 0XF8006114[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_dif_off = 0x0
- // .. .. ==> 0XF8006114[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF8006118[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006118[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006118[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006118[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006118[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006118[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006118, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF800611C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF800611C[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF800611C[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF800611C[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF800611C[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF800611C[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF800611C, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006120[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006120[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006120[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006120[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006120, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006124[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006124[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006124[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006124[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006124[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006124[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006124, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF800612C[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF800612C[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006130[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006130[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006134[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006134[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006138[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006138[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006140[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006140[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006140[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006144[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006144[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006144[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006148[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006148[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006148[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF800614C[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF800614C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800614C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006154[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006154[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006154[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006158[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006158[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006158[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF800615C[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF800615C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800615C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006160[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006160[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006160[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006168[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006168[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006168[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF800616C[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF800616C[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF800616C[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006170[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006170[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006170[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006174[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006174[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006174[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF800617C[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF800617C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF800617C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006180[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006180[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006180[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006184[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006184[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006184[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006188[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006188[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006188[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_loopback = 0x0
- // .. .. ==> 0XF8006190[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_bl2 = 0x0
- // .. .. ==> 0XF8006190[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_at_spd_atpg = 0x0
- // .. .. ==> 0XF8006190[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_bist_enable = 0x0
- // .. .. ==> 0XF8006190[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_force_err = 0x0
- // .. .. ==> 0XF8006190[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_bist_mode = 0x0
- // .. .. ==> 0XF8006190[6:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. .. reg_phy_invert_clkout = 0x1
- // .. .. ==> 0XF8006190[7:7] = 0x00000001U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. .. reg_phy_all_dq_mpr_rd_resp = 0x0
- // .. .. ==> 0XF8006190[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_sel_logic = 0x0
- // .. .. ==> 0XF8006190[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_ratio = 0x100
- // .. .. ==> 0XF8006190[19:10] = 0x00000100U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00040000U
- // .. .. reg_phy_ctrl_slave_force = 0x0
- // .. .. ==> 0XF8006190[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006190[27:21] = 0x00000000U
- // .. .. ==> MASK : 0x0FE00000U VAL : 0x00000000U
- // .. .. reg_phy_use_rank0_delays = 0x1
- // .. .. ==> 0XF8006190[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. reg_phy_lpddr = 0x0
- // .. .. ==> 0XF8006190[29:29] = 0x00000000U
- // .. .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // .. .. reg_phy_cmd_latency = 0x0
- // .. .. ==> 0XF8006190[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_phy_int_lpbk = 0x0
- // .. .. ==> 0XF8006190[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006190, 0xFFFFFFFFU ,0x10040080U),
- // .. .. reg_phy_wr_rl_delay = 0x2
- // .. .. ==> 0XF8006194[4:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000002U
- // .. .. reg_phy_rd_rl_delay = 0x4
- // .. .. ==> 0XF8006194[9:5] = 0x00000004U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x00000080U
- // .. .. reg_phy_dll_lock_diff = 0xf
- // .. .. ==> 0XF8006194[13:10] = 0x0000000FU
- // .. .. ==> MASK : 0x00003C00U VAL : 0x00003C00U
- // .. .. reg_phy_use_wr_level = 0x1
- // .. .. ==> 0XF8006194[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. reg_phy_use_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF8006194[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. reg_phy_use_rd_data_eye_level = 0x1
- // .. .. ==> 0XF8006194[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_dis_calib_rst = 0x0
- // .. .. ==> 0XF8006194[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006194[19:18] = 0x00000000U
- // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U),
- // .. .. reg_arb_page_addr_mask = 0x0
- // .. .. ==> 0XF8006204[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006208[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006208[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006208[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006208[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006208[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006208, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF800620C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF800620C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF800620C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF800620C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF800620C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF800620C, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006210[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006210[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006210[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006210[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006210[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006210, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006214[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006214[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006214[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006214[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006214[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006214, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006218[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006218[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006218[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006218[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006218[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF800621C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF800621C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF800621C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF800621C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF800621C[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006220[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006220[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006220[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006220[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006220[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006224[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006224[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006224[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006224[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006224[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_ddrc_lpddr2 = 0x0
- // .. .. ==> 0XF80062A8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_per_bank_refresh = 0x0
- // .. .. ==> 0XF80062A8[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_derate_enable = 0x0
- // .. .. ==> 0XF80062A8[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_ddrc_mr4_margin = 0x0
- // .. .. ==> 0XF80062A8[11:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062A8, 0x00000FF7U ,0x00000000U),
- // .. .. reg_ddrc_mr4_read_interval = 0x0
- // .. .. ==> 0XF80062AC[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_ddrc_min_stable_clock_x1 = 0x5
- // .. .. ==> 0XF80062B0[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_idle_after_reset_x32 = 0x11
- // .. .. ==> 0XF80062B0[11:4] = 0x00000011U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000110U
- // .. .. reg_ddrc_t_mrw = 0x5
- // .. .. ==> 0XF80062B0[21:12] = 0x00000005U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005115U),
- // .. .. reg_ddrc_max_auto_init_x1024 = 0x9e
- // .. .. ==> 0XF80062B4[7:0] = 0x0000009EU
- // .. .. ==> MASK : 0x000000FFU VAL : 0x0000009EU
- // .. .. reg_ddrc_dev_zqinit_x32 = 0x11
- // .. .. ==> 0XF80062B4[17:8] = 0x00000011U
- // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001100U
- // .. ..
- EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x0000119EU),
- // .. .. START: POLL ON DCI STATUS
- // .. .. DONE = 1
- // .. .. ==> 0XF8000B74[13:13] = 0x00000001U
- // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U
- // .. ..
- EMIT_MASKPOLL(0XF8000B74, 0x00002000U),
- // .. .. FINISH: POLL ON DCI STATUS
- // .. .. START: UNLOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0x1
- // .. .. ==> 0XF8006000[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000085U),
- // .. .. FINISH: UNLOCK DDR
- // .. .. START: CHECK DDR STATUS
- // .. .. ddrc_reg_operating_mode = 1
- // .. .. ==> 0XF8006054[2:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U
- // .. ..
- EMIT_MASKPOLL(0XF8006054, 0x00000007U),
- // .. .. FINISH: CHECK DDR STATUS
- // .. FINISH: DDR INITIALIZATION
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_mio_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: OCM REMAPPING
- // .. FINISH: OCM REMAPPING
- // .. START: DDRIOB SETTINGS
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B40[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B40[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B40[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B40[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B40[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B40[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B40[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B44[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B44[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B44[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B44[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B44[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B44[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B44[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B48[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x1
- // .. ==> 0XF8000B48[2:1] = 0x00000001U
- // .. ==> MASK : 0x00000006U VAL : 0x00000002U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B48[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B48[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B48[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B48[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B48[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B4C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B4C[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B4C[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B4C[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B4C[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B4C[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B4C[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B50[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x2
- // .. ==> 0XF8000B50[2:1] = 0x00000002U
- // .. ==> MASK : 0x00000006U VAL : 0x00000004U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B50[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B50[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B50[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B50[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B50[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B54[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B54[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B54[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B54[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B54[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B54[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B54[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B58[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B58[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B58[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B58[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B58[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B58[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B58[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B5C[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B5C[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x3
- // .. ==> 0XF8000B5C[18:14] = 0x00000003U
- // .. ==> MASK : 0x0007C000U VAL : 0x0000C000U
- // .. SLEW_N = 0x3
- // .. ==> 0XF8000B5C[23:19] = 0x00000003U
- // .. ==> MASK : 0x00F80000U VAL : 0x00180000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B5C[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B5C[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B60[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B60[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B60[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B60[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B60[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B60[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B64[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B64[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B64[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B64[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B64[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B64[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B68[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B68[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B68[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B68[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B68[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B68[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F98068U),
- // .. VREF_INT_EN = 0x0
- // .. ==> 0XF8000B6C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. VREF_SEL = 0x0
- // .. ==> 0XF8000B6C[4:1] = 0x00000000U
- // .. ==> MASK : 0x0000001EU VAL : 0x00000000U
- // .. VREF_EXT_EN = 0x1
- // .. ==> 0XF8000B6C[6:5] = 0x00000001U
- // .. ==> MASK : 0x00000060U VAL : 0x00000020U
- // .. VREF_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[8:7] = 0x00000000U
- // .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. REFIO_EN = 0x1
- // .. ==> 0XF8000B6C[9:9] = 0x00000001U
- // .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. REFIO_TEST = 0x0
- // .. ==> 0XF8000B6C[11:10] = 0x00000000U
- // .. ==> MASK : 0x00000C00U VAL : 0x00000000U
- // .. REFIO_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DRST_B_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. CKE_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[14:14] = 0x00000000U
- // .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B6C, 0x00007FFFU ,0x00000220U),
- // .. .. START: ASSERT RESET
- // .. .. RESET = 1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000021U),
- // .. .. FINISH: ASSERT RESET
- // .. .. START: DEASSERT RESET
- // .. .. RESET = 0
- // .. .. ==> 0XF8000B70[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U),
- // .. .. FINISH: DEASSERT RESET
- // .. .. RESET = 0x1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ENABLE = 0x1
- // .. .. ==> 0XF8000B70[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. VRP_TRI = 0x0
- // .. .. ==> 0XF8000B70[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. VRN_TRI = 0x0
- // .. .. ==> 0XF8000B70[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. VRP_OUT = 0x0
- // .. .. ==> 0XF8000B70[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. .. NREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[7:6] = 0x00000000U
- // .. .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. .. NREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[10:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000700U VAL : 0x00000000U
- // .. .. NREF_OPT4 = 0x1
- // .. .. ==> 0XF8000B70[13:11] = 0x00000001U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00000800U
- // .. .. PREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[16:14] = 0x00000000U
- // .. .. ==> MASK : 0x0001C000U VAL : 0x00000000U
- // .. .. PREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[19:17] = 0x00000000U
- // .. .. ==> MASK : 0x000E0000U VAL : 0x00000000U
- // .. .. UPDATE_CONTROL = 0x0
- // .. .. ==> 0XF8000B70[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. INIT_COMPLETE = 0x0
- // .. .. ==> 0XF8000B70[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. TST_CLK = 0x0
- // .. .. ==> 0XF8000B70[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. TST_HLN = 0x0
- // .. .. ==> 0XF8000B70[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. TST_HLP = 0x0
- // .. .. ==> 0XF8000B70[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. TST_RST = 0x0
- // .. .. ==> 0XF8000B70[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. INT_DCI_EN = 0x0
- // .. .. ==> 0XF8000B70[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x07FFFFFFU ,0x00000823U),
- // .. FINISH: DDRIOB SETTINGS
- // .. START: MIO PROGRAMMING
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000700[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000700[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000700[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000700[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000700[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000700[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000700[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000700[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000700[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000704[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000704[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000704[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000704[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000704[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000704[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000704[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000704[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000704[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000704, 0x00003FFFU ,0x00001602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000708[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000708[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000708[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000708[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000708[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000708[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000708[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000708[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000708[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800070C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800070C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800070C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800070C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800070C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800070C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800070C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800070C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800070C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000710[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000710[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000710[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000710[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000710[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000710[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000710[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000710[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000710[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000714[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000714[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000714[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000714[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000714[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000714[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000714[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000714[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000714[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000718[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000718[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000718[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000718[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000718[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000718[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000718[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000718[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000718[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800071C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800071C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800071C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800071C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800071C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800071C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800071C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800071C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800071C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000720[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000720[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000720[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000720[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000720[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000720[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000720[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000720[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000720[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000724[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. Speed = 0
- // .. ==> 0XF8000724[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000724[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000724[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000724[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000724, 0x00003F01U ,0x00001601U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000728[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000728[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000728[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000728[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000728[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000728[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000728[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000728[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000728[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800072C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800072C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800072C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800072C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800072C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800072C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800072C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800072C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800072C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000730[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000730[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000730[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000730[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000730[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000730[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000730[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000730[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000730[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000734[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000734[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000734[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000734[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000734[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000734[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000734[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000734[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000734[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000738[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000738[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000738[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000738[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000738[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000738[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000738[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000738[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000738[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800073C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800073C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800073C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800073C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800073C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800073C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800073C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800073C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800073C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800073C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000740[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000740[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000740[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000740[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000740[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000740[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000740[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000740[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000740[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000740, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000744[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000744[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000744[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000744[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000744[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000744[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000744[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000744[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000744[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000744, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000748[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000748[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000748[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000748[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000748[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000748[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000748[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000748[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000748[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000748, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800074C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800074C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800074C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800074C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800074C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800074C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800074C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800074C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800074C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800074C, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000750[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000750[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000750[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000750[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000750[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000750[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000750[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000750[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000750[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000750, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000754[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000754[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000754[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000754[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000754[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000754[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000754[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000754[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000754[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000754, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000758[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000758[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000758[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000758[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000758[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000758[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000758[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000758[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000758[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000758, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800075C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800075C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800075C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800075C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800075C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800075C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800075C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800075C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800075C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800075C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000760[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000760[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000760[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000760[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000760[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000760[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000760[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000760[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000760[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000764[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000764[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000764[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000764[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000764[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000764[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000764[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000764[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000764[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000768[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000768[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000768[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000768[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000768[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000768[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000768[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000768[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000768[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800076C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800076C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800076C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800076C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800076C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800076C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800076C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800076C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800076C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000770[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000770[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000770[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000770[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000770[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000770[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000770[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000770[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000770[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000774[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000774[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000774[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000774[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000774[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000774[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000774[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000774[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000774[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000778[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000778[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000778[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000778[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000778[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000778[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000778[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000778[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000778[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800077C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF800077C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800077C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800077C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800077C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800077C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800077C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800077C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800077C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000780[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000780[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000780[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000780[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000780[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000780[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000780[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000780[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000780[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000784[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000784[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000784[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000784[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000784[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000784[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000784[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000784[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000784[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000788[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000788[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000788[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000788[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000788[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000788[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000788[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000788[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000788[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800078C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800078C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800078C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800078C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800078C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800078C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800078C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800078C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800078C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000790[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000790[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000790[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000790[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000790[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000790[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000790[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000790[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000790[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000794[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000794[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000794[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000794[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000794[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000794[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000794[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000794[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000794[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000798[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000798[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000798[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000798[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000798[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000798[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000798[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000798[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000798[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800079C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800079C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800079C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800079C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800079C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800079C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800079C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800079C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800079C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A0[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A8[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007AC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007AC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007AC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007AC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007AC[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007AC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007AC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007AC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007AC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007B0[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007B0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007B4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007B4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007B8[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007B8[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007B8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007BC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007BC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007BC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007BC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007BC[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007BC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007BC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007BC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007BC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C0[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007C4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C4[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007C8[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007C8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007CC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007CC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007CC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007CC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007CC[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007CC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007CC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007CC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007CC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007D0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D0[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00001420U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007D4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D4[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00001421U),
- // .. SDIO1_WP_SEL = 57
- // .. ==> 0XF8000834[5:0] = 0x00000039U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000039U
- // .. SDIO1_CD_SEL = 9
- // .. ==> 0XF8000834[21:16] = 0x00000009U
- // .. ==> MASK : 0x003F0000U VAL : 0x00090000U
- // ..
- EMIT_MASKWRITE(0XF8000834, 0x003F003FU ,0x00090039U),
- // .. FINISH: MIO PROGRAMMING
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_peripherals_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000000U),
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000000U),
- // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // .. START: SRAM/NOR SET OPMODE
- // .. FINISH: SRAM/NOR SET OPMODE
- // .. START: UART REGISTERS
- // .. BDIV = 0x6
- // .. ==> 0XE0001034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0001018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0001000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0001000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0001000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0001000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0001000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0001000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0001000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0001000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0001000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0001004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0001004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0001004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0001004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0001004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0001004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0001004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0001004, 0x00000FFFU ,0x00000020U),
- // .. BDIV = 0x6
- // .. ==> 0XE0000034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0000034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0000018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0000018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0000000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0000000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0000000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0000000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0000000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0000000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0000000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0000000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0000000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0000000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0000004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0000004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0000004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0000004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0000004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0000004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0000004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0000004, 0x00000FFFU ,0x00000020U),
- // .. FINISH: UART REGISTERS
- // .. START: QSPI REGISTERS
- // .. Holdb_dr = 1
- // .. ==> 0XE000D000[19:19] = 0x00000001U
- // .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // ..
- EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U),
- // .. FINISH: QSPI REGISTERS
- // .. START: PL POWER ON RESET REGISTERS
- // .. PCFG_POR_CNT_4K = 0
- // .. ==> 0XF8007000[29:29] = 0x00000000U
- // .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U),
- // .. FINISH: PL POWER ON RESET REGISTERS
- // .. START: SMC TIMING CALCULATION REGISTER UPDATE
- // .. .. START: NAND SET CYCLE
- // .. .. FINISH: NAND SET CYCLE
- // .. .. START: OPMODE
- // .. .. FINISH: OPMODE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: SRAM/NOR CS0 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS0 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS0 BASE ADDRESS
- // .. .. FINISH: NOR CS0 BASE ADDRESS
- // .. .. START: SRAM/NOR CS1 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS1 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS1 BASE ADDRESS
- // .. .. FINISH: NOR CS1 BASE ADDRESS
- // .. .. START: USB RESET
- // .. .. FINISH: USB RESET
- // .. .. START: ENET RESET
- // .. .. FINISH: ENET RESET
- // .. .. START: I2C RESET
- // .. .. FINISH: I2C RESET
- // .. .. START: NOR CHIP SELECT
- // .. .. .. START: DIR MODE BANK 0
- // .. .. .. FINISH: DIR MODE BANK 0
- // .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. FINISH: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. START: OUTPUT ENABLE BANK 0
- // .. .. .. FINISH: OUTPUT ENABLE BANK 0
- // .. .. FINISH: NOR CHIP SELECT
- // .. FINISH: SMC TIMING CALCULATION REGISTER UPDATE
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_post_config_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: ENABLING LEVEL SHIFTER
- // .. USER_INP_ICT_EN_0 = 3
- // .. ==> 0XF8000900[1:0] = 0x00000003U
- // .. ==> MASK : 0x00000003U VAL : 0x00000003U
- // .. USER_INP_ICT_EN_1 = 3
- // .. ==> 0XF8000900[3:2] = 0x00000003U
- // .. ==> MASK : 0x0000000CU VAL : 0x0000000CU
- // ..
- EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU),
- // .. FINISH: ENABLING LEVEL SHIFTER
- // .. START: FPGA RESETS TO 0
- // .. reserved_3 = 0
- // .. ==> 0XF8000240[31:25] = 0x00000000U
- // .. ==> MASK : 0xFE000000U VAL : 0x00000000U
- // .. FPGA_ACP_RST = 0
- // .. ==> 0XF8000240[24:24] = 0x00000000U
- // .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. FPGA_AXDS3_RST = 0
- // .. ==> 0XF8000240[23:23] = 0x00000000U
- // .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. FPGA_AXDS2_RST = 0
- // .. ==> 0XF8000240[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. FPGA_AXDS1_RST = 0
- // .. ==> 0XF8000240[21:21] = 0x00000000U
- // .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. FPGA_AXDS0_RST = 0
- // .. ==> 0XF8000240[20:20] = 0x00000000U
- // .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. reserved_2 = 0
- // .. ==> 0XF8000240[19:18] = 0x00000000U
- // .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. FSSW1_FPGA_RST = 0
- // .. ==> 0XF8000240[17:17] = 0x00000000U
- // .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. FSSW0_FPGA_RST = 0
- // .. ==> 0XF8000240[16:16] = 0x00000000U
- // .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. reserved_1 = 0
- // .. ==> 0XF8000240[15:14] = 0x00000000U
- // .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. FPGA_FMSW1_RST = 0
- // .. ==> 0XF8000240[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. FPGA_FMSW0_RST = 0
- // .. ==> 0XF8000240[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. FPGA_DMA3_RST = 0
- // .. ==> 0XF8000240[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. FPGA_DMA2_RST = 0
- // .. ==> 0XF8000240[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. FPGA_DMA1_RST = 0
- // .. ==> 0XF8000240[9:9] = 0x00000000U
- // .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. FPGA_DMA0_RST = 0
- // .. ==> 0XF8000240[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. reserved = 0
- // .. ==> 0XF8000240[7:4] = 0x00000000U
- // .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. FPGA3_OUT_RST = 0
- // .. ==> 0XF8000240[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. FPGA2_OUT_RST = 0
- // .. ==> 0XF8000240[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. FPGA1_OUT_RST = 0
- // .. ==> 0XF8000240[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. FPGA0_OUT_RST = 0
- // .. ==> 0XF8000240[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U),
- // .. FINISH: FPGA RESETS TO 0
- // .. START: AFI REGISTERS
- // .. .. START: AFI0 REGISTERS
- // .. .. FINISH: AFI0 REGISTERS
- // .. .. START: AFI1 REGISTERS
- // .. .. FINISH: AFI1 REGISTERS
- // .. .. START: AFI2 REGISTERS
- // .. .. FINISH: AFI2 REGISTERS
- // .. .. START: AFI3 REGISTERS
- // .. .. FINISH: AFI3 REGISTERS
- // .. FINISH: AFI REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_debug_2_0[] = {
- // START: top
- // .. START: CROSS TRIGGER CONFIGURATIONS
- // .. .. START: UNLOCKING CTI REGISTERS
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
- // .. .. FINISH: UNLOCKING CTI REGISTERS
- // .. .. START: ENABLING CTI MODULES AND CHANNELS
- // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
- // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. FINISH: CROSS TRIGGER CONFIGURATIONS
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_pll_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: PLL SLCR REGISTERS
- // .. .. START: ARM PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000110[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000110[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x145
- // .. .. ==> 0XF8000110[21:12] = 0x00000145U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U
- // .. ..
- EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x001452C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x1e
- // .. .. .. ==> 0XF8000100[18:12] = 0x0000001EU
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x0001E000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. ARM_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000001U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. SRCSEL = 0x0
- // .. .. .. ==> 0XF8000120[5:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. .. DIVISOR = 0x2
- // .. .. .. ==> 0XF8000120[13:8] = 0x00000002U
- // .. .. .. ==> MASK : 0x00003F00U VAL : 0x00000200U
- // .. .. .. CPU_6OR4XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[24:24] = 0x00000001U
- // .. .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. .. .. CPU_3OR2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[25:25] = 0x00000001U
- // .. .. .. ==> MASK : 0x02000000U VAL : 0x02000000U
- // .. .. .. CPU_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[26:26] = 0x00000001U
- // .. .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. .. CPU_1XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[27:27] = 0x00000001U
- // .. .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. .. CPU_PERI_CLKACT = 0x1
- // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U
- // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U),
- // .. .. FINISH: ARM PLL INIT
- // .. .. START: DDR PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000114[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000114[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x1f4
- // .. .. ==> 0XF8000114[21:12] = 0x000001F4U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x001F4000U
- // .. ..
- EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x001F42C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x14
- // .. .. .. ==> 0XF8000104[18:12] = 0x00000014U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00014000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00014000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. DDR_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000002U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. DDR_3XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. .. DDR_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. .. DDR_3XCLK_DIVISOR = 0x2
- // .. .. .. ==> 0XF8000124[25:20] = 0x00000002U
- // .. .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. .. .. DDR_2XCLK_DIVISOR = 0x3
- // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U
- // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U),
- // .. .. FINISH: DDR PLL INIT
- // .. .. START: IO PLL INIT
- // .. .. PLL_RES = 0x2
- // .. .. ==> 0XF8000118[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000118[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x113
- // .. .. ==> 0XF8000118[21:12] = 0x00000113U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00113000U
- // .. ..
- EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x00113220U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x23
- // .. .. .. ==> 0XF8000108[18:12] = 0x00000023U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00023000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x00023000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. IO_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000004U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. FINISH: IO PLL INIT
- // .. FINISH: PLL SLCR REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_clock_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: CLOCK CONTROL SLCR REGISTERS
- // .. CLKACT = 0x1
- // .. ==> 0XF8000128[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. DIVISOR0 = 0x31
- // .. ==> 0XF8000128[13:8] = 0x00000031U
- // .. ==> MASK : 0x00003F00U VAL : 0x00003100U
- // .. DIVISOR1 = 0x2
- // .. ==> 0XF8000128[25:20] = 0x00000002U
- // .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // ..
- EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00203101U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000138[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000138[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000138, 0x00000011U ,0x00000001U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000140[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000140[6:4] = 0x00000000U
- // .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. DIVISOR = 0xe
- // .. ==> 0XF8000140[13:8] = 0x0000000EU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000E00U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF8000140[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF8000140, 0x03F03F71U ,0x00100E01U),
- // .. CLKACT = 0x1
- // .. ==> 0XF800014C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800014C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xd
- // .. ==> 0XF800014C[13:8] = 0x0000000DU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000D00U
- // ..
- EMIT_MASKWRITE(0XF800014C, 0x00003F31U ,0x00000D01U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF8000150[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000150[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000150[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000150[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000150, 0x00003F33U ,0x00001202U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000154[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000154[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000154[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000154[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001203U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000158[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000158[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000158[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xb
- // .. ==> 0XF8000158[13:8] = 0x0000000BU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000B00U
- // ..
- EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000B03U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF800015C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF800015C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800015C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR0 = 0x12
- // .. ==> 0XF800015C[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF800015C[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00101202U),
- // .. CAN0_MUX = 0x0
- // .. ==> 0XF8000160[5:0] = 0x00000000U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000000U
- // .. CAN0_REF_SEL = 0x0
- // .. ==> 0XF8000160[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. CAN1_MUX = 0x0
- // .. ==> 0XF8000160[21:16] = 0x00000000U
- // .. ==> MASK : 0x003F0000U VAL : 0x00000000U
- // .. CAN1_REF_SEL = 0x0
- // .. ==> 0XF8000160[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U),
- // .. .. START: TRACE CLOCK
- // .. .. FINISH: TRACE CLOCK
- // .. .. CLKACT = 0x1
- // .. .. ==> 0XF8000168[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000168[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR = 0x9
- // .. .. ==> 0XF8000168[13:8] = 0x00000009U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000900U
- // .. ..
- EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000901U),
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000170[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR0 = 0x7
- // .. .. ==> 0XF8000170[13:8] = 0x00000007U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000700U
- // .. .. DIVISOR1 = 0x2
- // .. .. ==> 0XF8000170[25:20] = 0x00000002U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00200700U),
- // .. .. CLK_621_TRUE = 0x1
- // .. .. ==> 0XF80001C4[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U),
- // .. .. DMA_CPU_2XCLKACT = 0x1
- // .. .. ==> 0XF800012C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. USB0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[2:2] = 0x00000001U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. USB1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. .. GEM0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[6:6] = 0x00000001U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000040U
- // .. .. GEM1_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. SDI0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. SDI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[11:11] = 0x00000001U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // .. .. SPI0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. SPI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. CAN0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. CAN1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. .. I2C0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[18:18] = 0x00000001U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00040000U
- // .. .. I2C1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. .. UART0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[20:20] = 0x00000001U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00100000U
- // .. .. UART1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. GPIO_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[22:22] = 0x00000001U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00400000U
- // .. .. LQSPI_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[23:23] = 0x00000001U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00800000U
- // .. .. SMC_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[24:24] = 0x00000001U
- // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. ..
- EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x01FEC84DU),
- // .. FINISH: CLOCK CONTROL SLCR REGISTERS
- // .. START: THIS SHOULD BE BLANK
- // .. FINISH: THIS SHOULD BE BLANK
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_ddr_init_data_1_0[] = {
- // START: top
- // .. START: DDR INITIALIZATION
- // .. .. START: LOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0
- // .. .. ==> 0XF8006000[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 0x1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000084U),
- // .. .. FINISH: LOCK DDR
- // .. .. reg_ddrc_t_rfc_nom_x32 = 0x79
- // .. .. ==> 0XF8006004[11:0] = 0x00000079U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000079U
- // .. .. reg_ddrc_active_ranks = 0x1
- // .. .. ==> 0XF8006004[13:12] = 0x00000001U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00001000U
- // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0
- // .. .. ==> 0XF8006004[18:14] = 0x00000000U
- // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_block = 0x1
- // .. .. ==> 0XF8006004[20:19] = 0x00000001U
- // .. .. ==> MASK : 0x00180000U VAL : 0x00080000U
- // .. .. reg_ddrc_diff_rank_rd_2cycle_gap = 0x0
- // .. .. ==> 0XF8006004[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_cs_bit1 = 0x0
- // .. .. ==> 0XF8006004[26:22] = 0x00000000U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_open_bank = 0x0
- // .. .. ==> 0XF8006004[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_4bank_ram = 0x0
- // .. .. ==> 0XF8006004[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006004, 0x1FFFFFFFU ,0x00081079U),
- // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf
- // .. .. ==> 0XF8006008[10:0] = 0x0000000FU
- // .. .. ==> MASK : 0x000007FFU VAL : 0x0000000FU
- // .. .. reg_ddrc_hpr_max_starve_x32 = 0xf
- // .. .. ==> 0XF8006008[21:11] = 0x0000000FU
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00007800U
- // .. .. reg_ddrc_hpr_xact_run_length = 0xf
- // .. .. ==> 0XF8006008[25:22] = 0x0000000FU
- // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U
- // .. ..
- EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU),
- // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF800600C[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_lpr_max_starve_x32 = 0x2
- // .. .. ==> 0XF800600C[21:11] = 0x00000002U
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00001000U
- // .. .. reg_ddrc_lpr_xact_run_length = 0x8
- // .. .. ==> 0XF800600C[25:22] = 0x00000008U
- // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U
- // .. ..
- EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U),
- // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF8006010[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_w_xact_run_length = 0x8
- // .. .. ==> 0XF8006010[14:11] = 0x00000008U
- // .. .. ==> MASK : 0x00007800U VAL : 0x00004000U
- // .. .. reg_ddrc_w_max_starve_x32 = 0x2
- // .. .. ==> 0XF8006010[25:15] = 0x00000002U
- // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U
- // .. ..
- EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U),
- // .. .. reg_ddrc_t_rc = 0x19
- // .. .. ==> 0XF8006014[5:0] = 0x00000019U
- // .. .. ==> MASK : 0x0000003FU VAL : 0x00000019U
- // .. .. reg_ddrc_t_rfc_min = 0x50
- // .. .. ==> 0XF8006014[13:6] = 0x00000050U
- // .. .. ==> MASK : 0x00003FC0U VAL : 0x00001400U
- // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10
- // .. .. ==> 0XF8006014[20:14] = 0x00000010U
- // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x00041419U),
- // .. .. reg_ddrc_wr2pre = 0x12
- // .. .. ==> 0XF8006018[4:0] = 0x00000012U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000012U
- // .. .. reg_ddrc_powerdown_to_x32 = 0x6
- // .. .. ==> 0XF8006018[9:5] = 0x00000006U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000C0U
- // .. .. reg_ddrc_t_faw = 0x14
- // .. .. ==> 0XF8006018[15:10] = 0x00000014U
- // .. .. ==> MASK : 0x0000FC00U VAL : 0x00005000U
- // .. .. reg_ddrc_t_ras_max = 0x22
- // .. .. ==> 0XF8006018[21:16] = 0x00000022U
- // .. .. ==> MASK : 0x003F0000U VAL : 0x00220000U
- // .. .. reg_ddrc_t_ras_min = 0x12
- // .. .. ==> 0XF8006018[26:22] = 0x00000012U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x04800000U
- // .. .. reg_ddrc_t_cke = 0x4
- // .. .. ==> 0XF8006018[31:28] = 0x00000004U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44A250D2U),
- // .. .. reg_ddrc_write_latency = 0x5
- // .. .. ==> 0XF800601C[4:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000005U
- // .. .. reg_ddrc_rd2wr = 0x7
- // .. .. ==> 0XF800601C[9:5] = 0x00000007U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000E0U
- // .. .. reg_ddrc_wr2rd = 0xe
- // .. .. ==> 0XF800601C[14:10] = 0x0000000EU
- // .. .. ==> MASK : 0x00007C00U VAL : 0x00003800U
- // .. .. reg_ddrc_t_xp = 0x4
- // .. .. ==> 0XF800601C[19:15] = 0x00000004U
- // .. .. ==> MASK : 0x000F8000U VAL : 0x00020000U
- // .. .. reg_ddrc_pad_pd = 0x0
- // .. .. ==> 0XF800601C[22:20] = 0x00000000U
- // .. .. ==> MASK : 0x00700000U VAL : 0x00000000U
- // .. .. reg_ddrc_rd2pre = 0x4
- // .. .. ==> 0XF800601C[27:23] = 0x00000004U
- // .. .. ==> MASK : 0x0F800000U VAL : 0x02000000U
- // .. .. reg_ddrc_t_rcd = 0x7
- // .. .. ==> 0XF800601C[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U),
- // .. .. reg_ddrc_t_ccd = 0x4
- // .. .. ==> 0XF8006020[4:2] = 0x00000004U
- // .. .. ==> MASK : 0x0000001CU VAL : 0x00000010U
- // .. .. reg_ddrc_t_rrd = 0x5
- // .. .. ==> 0XF8006020[7:5] = 0x00000005U
- // .. .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. .. reg_ddrc_refresh_margin = 0x2
- // .. .. ==> 0XF8006020[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_rp = 0x7
- // .. .. ==> 0XF8006020[15:12] = 0x00000007U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00007000U
- // .. .. reg_ddrc_refresh_to_x32 = 0x8
- // .. .. ==> 0XF8006020[20:16] = 0x00000008U
- // .. .. ==> MASK : 0x001F0000U VAL : 0x00080000U
- // .. .. reg_ddrc_sdram = 0x1
- // .. .. ==> 0XF8006020[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. reg_ddrc_mobile = 0x0
- // .. .. ==> 0XF8006020[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reg_ddrc_clock_stop_en = 0x0
- // .. .. ==> 0XF8006020[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reg_ddrc_read_latency = 0x7
- // .. .. ==> 0XF8006020[28:24] = 0x00000007U
- // .. .. ==> MASK : 0x1F000000U VAL : 0x07000000U
- // .. .. reg_phy_mode_ddr1_ddr2 = 0x1
- // .. .. ==> 0XF8006020[29:29] = 0x00000001U
- // .. .. ==> MASK : 0x20000000U VAL : 0x20000000U
- // .. .. reg_ddrc_dis_pad_pd = 0x0
- // .. .. ==> 0XF8006020[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_ddrc_loopback = 0x0
- // .. .. ==> 0XF8006020[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006020, 0xFFFFFFFCU ,0x272872B0U),
- // .. .. reg_ddrc_en_2t_timing_mode = 0x0
- // .. .. ==> 0XF8006024[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_prefer_write = 0x0
- // .. .. ==> 0XF8006024[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_max_rank_rd = 0xf
- // .. .. ==> 0XF8006024[5:2] = 0x0000000FU
- // .. .. ==> MASK : 0x0000003CU VAL : 0x0000003CU
- // .. .. reg_ddrc_mr_wr = 0x0
- // .. .. ==> 0XF8006024[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_addr = 0x0
- // .. .. ==> 0XF8006024[8:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_data = 0x0
- // .. .. ==> 0XF8006024[24:9] = 0x00000000U
- // .. .. ==> MASK : 0x01FFFE00U VAL : 0x00000000U
- // .. .. ddrc_reg_mr_wr_busy = 0x0
- // .. .. ==> 0XF8006024[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_type = 0x0
- // .. .. ==> 0XF8006024[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_rdata_valid = 0x0
- // .. .. ==> 0XF8006024[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006024, 0x0FFFFFFFU ,0x0000003CU),
- // .. .. reg_ddrc_final_wait_x32 = 0x7
- // .. .. ==> 0XF8006028[6:0] = 0x00000007U
- // .. .. ==> MASK : 0x0000007FU VAL : 0x00000007U
- // .. .. reg_ddrc_pre_ocd_x32 = 0x0
- // .. .. ==> 0XF8006028[10:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000780U VAL : 0x00000000U
- // .. .. reg_ddrc_t_mrd = 0x4
- // .. .. ==> 0XF8006028[13:11] = 0x00000004U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U
- // .. ..
- EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U),
- // .. .. reg_ddrc_emr2 = 0x8
- // .. .. ==> 0XF800602C[15:0] = 0x00000008U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000008U
- // .. .. reg_ddrc_emr3 = 0x0
- // .. .. ==> 0XF800602C[31:16] = 0x00000000U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U),
- // .. .. reg_ddrc_mr = 0x930
- // .. .. ==> 0XF8006030[15:0] = 0x00000930U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000930U
- // .. .. reg_ddrc_emr = 0x4
- // .. .. ==> 0XF8006030[31:16] = 0x00000004U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U),
- // .. .. reg_ddrc_burst_rdwr = 0x4
- // .. .. ==> 0XF8006034[3:0] = 0x00000004U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000004U
- // .. .. reg_ddrc_pre_cke_x1024 = 0x156
- // .. .. ==> 0XF8006034[13:4] = 0x00000156U
- // .. .. ==> MASK : 0x00003FF0U VAL : 0x00001560U
- // .. .. reg_ddrc_post_cke_x1024 = 0x1
- // .. .. ==> 0XF8006034[25:16] = 0x00000001U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00010000U
- // .. .. reg_ddrc_burstchop = 0x0
- // .. .. ==> 0XF8006034[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x00011564U),
- // .. .. reg_ddrc_force_low_pri_n = 0x0
- // .. .. ==> 0XF8006038[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_dq = 0x0
- // .. .. ==> 0XF8006038[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_debug_mode = 0x0
- // .. .. ==> 0XF8006038[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_phy_wr_level_start = 0x0
- // .. .. ==> 0XF8006038[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_phy_rd_level_start = 0x0
- // .. .. ==> 0XF8006038[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_dq0_wait_t = 0x0
- // .. .. ==> 0XF8006038[12:9] = 0x00000000U
- // .. .. ==> MASK : 0x00001E00U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006038, 0x00001FC3U ,0x00000000U),
- // .. .. reg_ddrc_addrmap_bank_b0 = 0x6
- // .. .. ==> 0XF800603C[3:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000006U
- // .. .. reg_ddrc_addrmap_bank_b1 = 0x6
- // .. .. ==> 0XF800603C[7:4] = 0x00000006U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000060U
- // .. .. reg_ddrc_addrmap_bank_b2 = 0x6
- // .. .. ==> 0XF800603C[11:8] = 0x00000006U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000600U
- // .. .. reg_ddrc_addrmap_col_b5 = 0x0
- // .. .. ==> 0XF800603C[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b6 = 0x0
- // .. .. ==> 0XF800603C[19:16] = 0x00000000U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000666U),
- // .. .. reg_ddrc_addrmap_col_b2 = 0x0
- // .. .. ==> 0XF8006040[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b3 = 0x0
- // .. .. ==> 0XF8006040[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b4 = 0x0
- // .. .. ==> 0XF8006040[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b7 = 0x0
- // .. .. ==> 0XF8006040[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b8 = 0xf
- // .. .. ==> 0XF8006040[19:16] = 0x0000000FU
- // .. .. ==> MASK : 0x000F0000U VAL : 0x000F0000U
- // .. .. reg_ddrc_addrmap_col_b9 = 0xf
- // .. .. ==> 0XF8006040[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_col_b10 = 0xf
- // .. .. ==> 0XF8006040[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. .. reg_ddrc_addrmap_col_b11 = 0xf
- // .. .. ==> 0XF8006040[31:28] = 0x0000000FU
- // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFFF0000U),
- // .. .. reg_ddrc_addrmap_row_b0 = 0x5
- // .. .. ==> 0XF8006044[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_addrmap_row_b1 = 0x5
- // .. .. ==> 0XF8006044[7:4] = 0x00000005U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000050U
- // .. .. reg_ddrc_addrmap_row_b2_11 = 0x5
- // .. .. ==> 0XF8006044[11:8] = 0x00000005U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000500U
- // .. .. reg_ddrc_addrmap_row_b12 = 0x5
- // .. .. ==> 0XF8006044[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_addrmap_row_b13 = 0x5
- // .. .. ==> 0XF8006044[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_addrmap_row_b14 = 0xf
- // .. .. ==> 0XF8006044[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_row_b15 = 0xf
- // .. .. ==> 0XF8006044[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0FF55555U),
- // .. .. reg_ddrc_rank0_rd_odt = 0x0
- // .. .. ==> 0XF8006048[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_rank0_wr_odt = 0x1
- // .. .. ==> 0XF8006048[5:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000038U VAL : 0x00000008U
- // .. .. reg_ddrc_rank1_rd_odt = 0x1
- // .. .. ==> 0XF8006048[8:6] = 0x00000001U
- // .. .. ==> MASK : 0x000001C0U VAL : 0x00000040U
- // .. .. reg_ddrc_rank1_wr_odt = 0x1
- // .. .. ==> 0XF8006048[11:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000E00U VAL : 0x00000200U
- // .. .. reg_phy_rd_local_odt = 0x0
- // .. .. ==> 0XF8006048[13:12] = 0x00000000U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00000000U
- // .. .. reg_phy_wr_local_odt = 0x3
- // .. .. ==> 0XF8006048[15:14] = 0x00000003U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x0000C000U
- // .. .. reg_phy_idle_local_odt = 0x3
- // .. .. ==> 0XF8006048[17:16] = 0x00000003U
- // .. .. ==> MASK : 0x00030000U VAL : 0x00030000U
- // .. .. reg_ddrc_rank2_rd_odt = 0x0
- // .. .. ==> 0XF8006048[20:18] = 0x00000000U
- // .. .. ==> MASK : 0x001C0000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank2_wr_odt = 0x0
- // .. .. ==> 0XF8006048[23:21] = 0x00000000U
- // .. .. ==> MASK : 0x00E00000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_rd_odt = 0x0
- // .. .. ==> 0XF8006048[26:24] = 0x00000000U
- // .. .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_wr_odt = 0x0
- // .. .. ==> 0XF8006048[29:27] = 0x00000000U
- // .. .. ==> MASK : 0x38000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006048, 0x3FFFFFFFU ,0x0003C248U),
- // .. .. reg_phy_rd_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_wr_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_phy_rdc_we_to_re_delay = 0x8
- // .. .. ==> 0XF8006050[11:8] = 0x00000008U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000800U
- // .. .. reg_phy_rdc_fifo_rst_disable = 0x0
- // .. .. ==> 0XF8006050[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_phy_use_fixed_re = 0x1
- // .. .. ==> 0XF8006050[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_rdc_fifo_rst_err_cnt_clr = 0x0
- // .. .. ==> 0XF8006050[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_dis_phy_ctrl_rstn = 0x0
- // .. .. ==> 0XF8006050[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_phy_clk_stall_level = 0x0
- // .. .. ==> 0XF8006050[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[27:24] = 0x00000007U
- // .. .. ==> MASK : 0x0F000000U VAL : 0x07000000U
- // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U),
- // .. .. reg_ddrc_dll_calib_to_min_x1024 = 0x1
- // .. .. ==> 0XF8006058[7:0] = 0x00000001U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000001U
- // .. .. reg_ddrc_dll_calib_to_max_x1024 = 0x1
- // .. .. ==> 0XF8006058[15:8] = 0x00000001U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000100U
- // .. .. reg_ddrc_dis_dll_calib = 0x0
- // .. .. ==> 0XF8006058[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006058, 0x0001FFFFU ,0x00000101U),
- // .. .. reg_ddrc_rd_odt_delay = 0x3
- // .. .. ==> 0XF800605C[3:0] = 0x00000003U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000003U
- // .. .. reg_ddrc_wr_odt_delay = 0x0
- // .. .. ==> 0XF800605C[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_rd_odt_hold = 0x0
- // .. .. ==> 0XF800605C[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_hold = 0x5
- // .. .. ==> 0XF800605C[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U),
- // .. .. reg_ddrc_pageclose = 0x0
- // .. .. ==> 0XF8006060[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_lpr_num_entries = 0x1f
- // .. .. ==> 0XF8006060[6:1] = 0x0000001FU
- // .. .. ==> MASK : 0x0000007EU VAL : 0x0000003EU
- // .. .. reg_ddrc_auto_pre_en = 0x0
- // .. .. ==> 0XF8006060[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_ddrc_refresh_update_level = 0x0
- // .. .. ==> 0XF8006060[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_wc = 0x0
- // .. .. ==> 0XF8006060[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_collision_page_opt = 0x0
- // .. .. ==> 0XF8006060[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_ddrc_selfref_en = 0x0
- // .. .. ==> 0XF8006060[12:12] = 0x00000000U
- // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU),
- // .. .. reg_ddrc_go2critical_hysteresis = 0x0
- // .. .. ==> 0XF8006064[12:5] = 0x00000000U
- // .. .. ==> MASK : 0x00001FE0U VAL : 0x00000000U
- // .. .. reg_arb_go2critical_en = 0x1
- // .. .. ==> 0XF8006064[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. ..
- EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U),
- // .. .. reg_ddrc_wrlvl_ww = 0x41
- // .. .. ==> 0XF8006068[7:0] = 0x00000041U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000041U
- // .. .. reg_ddrc_rdlvl_rr = 0x41
- // .. .. ==> 0XF8006068[15:8] = 0x00000041U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00004100U
- // .. .. reg_ddrc_dfi_t_wlmrd = 0x28
- // .. .. ==> 0XF8006068[25:16] = 0x00000028U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U
- // .. ..
- EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U),
- // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10
- // .. .. ==> 0XF800606C[7:0] = 0x00000010U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000010U
- // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16
- // .. .. ==> 0XF800606C[15:8] = 0x00000016U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U
- // .. ..
- EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U),
- // .. .. refresh_timer0_start_value_x32 = 0x0
- // .. .. ==> 0XF80060A0[11:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000000U
- // .. .. refresh_timer1_start_value_x32 = 0x8
- // .. .. ==> 0XF80060A0[23:12] = 0x00000008U
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00008000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A0, 0x00FFFFFFU ,0x00008000U),
- // .. .. reg_ddrc_dis_auto_zq = 0x0
- // .. .. ==> 0XF80060A4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_ddr3 = 0x1
- // .. .. ==> 0XF80060A4[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reg_ddrc_t_mod = 0x200
- // .. .. ==> 0XF80060A4[11:2] = 0x00000200U
- // .. .. ==> MASK : 0x00000FFCU VAL : 0x00000800U
- // .. .. reg_ddrc_t_zq_long_nop = 0x200
- // .. .. ==> 0XF80060A4[21:12] = 0x00000200U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00200000U
- // .. .. reg_ddrc_t_zq_short_nop = 0x40
- // .. .. ==> 0XF80060A4[31:22] = 0x00000040U
- // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U),
- // .. .. t_zq_short_interval_x1024 = 0xbebc
- // .. .. ==> 0XF80060A8[19:0] = 0x0000BEBCU
- // .. .. ==> MASK : 0x000FFFFFU VAL : 0x0000BEBCU
- // .. .. dram_rstn_x1024 = 0x62
- // .. .. ==> 0XF80060A8[27:20] = 0x00000062U
- // .. .. ==> MASK : 0x0FF00000U VAL : 0x06200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0620BEBCU),
- // .. .. deeppowerdown_en = 0x0
- // .. .. ==> 0XF80060AC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. deeppowerdown_to_x1024 = 0xf5
- // .. .. ==> 0XF80060AC[8:1] = 0x000000F5U
- // .. .. ==> MASK : 0x000001FEU VAL : 0x000001EAU
- // .. ..
- EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001EAU),
- // .. .. dfi_wrlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000FFFU
- // .. .. dfi_rdlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[23:12] = 0x00000FFFU
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00FFF000U
- // .. .. ddrc_reg_twrlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. ddrc_reg_trdlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_dfi_wr_level_en = 0x1
- // .. .. ==> 0XF80060B0[26:26] = 0x00000001U
- // .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. reg_ddrc_dfi_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF80060B0[27:27] = 0x00000001U
- // .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1
- // .. .. ==> 0XF80060B0[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU),
- // .. .. reg_ddrc_2t_delay = 0x0
- // .. .. ==> 0XF80060B4[8:0] = 0x00000000U
- // .. .. ==> MASK : 0x000001FFU VAL : 0x00000000U
- // .. .. reg_ddrc_skip_ocd = 0x1
- // .. .. ==> 0XF80060B4[9:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. .. reg_ddrc_dis_pre_bypass = 0x0
- // .. .. ==> 0XF80060B4[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B4, 0x000007FFU ,0x00000200U),
- // .. .. reg_ddrc_dfi_t_rddata_en = 0x6
- // .. .. ==> 0XF80060B8[4:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000006U
- // .. .. reg_ddrc_dfi_t_ctrlup_min = 0x3
- // .. .. ==> 0XF80060B8[14:5] = 0x00000003U
- // .. .. ==> MASK : 0x00007FE0U VAL : 0x00000060U
- // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40
- // .. .. ==> 0XF80060B8[24:15] = 0x00000040U
- // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U),
- // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. Clear_Correctable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U),
- // .. .. CORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060C8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ECC_CORRECTED_BIT_NUM = 0x0
- // .. .. ==> 0XF80060C8[7:1] = 0x00000000U
- // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U),
- // .. .. UNCORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060DC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U),
- // .. .. STAT_NUM_CORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[15:8] = 0x00000000U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000000U
- // .. .. STAT_NUM_UNCORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[7:0] = 0x00000000U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U),
- // .. .. reg_ddrc_ecc_mode = 0x0
- // .. .. ==> 0XF80060F4[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_scrub = 0x1
- // .. .. ==> 0XF80060F4[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. ..
- EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U),
- // .. .. reg_phy_dif_on = 0x0
- // .. .. ==> 0XF8006114[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_dif_off = 0x0
- // .. .. ==> 0XF8006114[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF8006118[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006118[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006118[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006118[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006118[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006118[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006118, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF800611C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF800611C[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF800611C[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF800611C[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF800611C[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF800611C[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF800611C, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006120[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006120[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006120, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006124[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006124[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006124[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006124[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006124[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006124[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006124, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF800612C[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF800612C[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006130[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006130[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006134[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006134[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006138[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006138[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006140[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006140[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006140[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006144[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006144[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006144[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006148[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006148[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006148[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF800614C[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF800614C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800614C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006154[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006154[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006154[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006158[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006158[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006158[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF800615C[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF800615C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800615C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006160[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006160[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006160[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006168[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006168[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006168[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF800616C[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF800616C[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF800616C[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006170[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006170[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006170[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006174[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006174[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006174[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF800617C[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF800617C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF800617C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006180[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006180[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006180[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006184[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006184[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006184[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006188[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006188[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006188[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_loopback = 0x0
- // .. .. ==> 0XF8006190[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_bl2 = 0x0
- // .. .. ==> 0XF8006190[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_at_spd_atpg = 0x0
- // .. .. ==> 0XF8006190[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_bist_enable = 0x0
- // .. .. ==> 0XF8006190[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_force_err = 0x0
- // .. .. ==> 0XF8006190[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_bist_mode = 0x0
- // .. .. ==> 0XF8006190[6:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. .. reg_phy_invert_clkout = 0x1
- // .. .. ==> 0XF8006190[7:7] = 0x00000001U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. .. reg_phy_all_dq_mpr_rd_resp = 0x0
- // .. .. ==> 0XF8006190[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_sel_logic = 0x0
- // .. .. ==> 0XF8006190[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_ratio = 0x100
- // .. .. ==> 0XF8006190[19:10] = 0x00000100U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00040000U
- // .. .. reg_phy_ctrl_slave_force = 0x0
- // .. .. ==> 0XF8006190[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006190[27:21] = 0x00000000U
- // .. .. ==> MASK : 0x0FE00000U VAL : 0x00000000U
- // .. .. reg_phy_use_rank0_delays = 0x1
- // .. .. ==> 0XF8006190[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. reg_phy_lpddr = 0x0
- // .. .. ==> 0XF8006190[29:29] = 0x00000000U
- // .. .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // .. .. reg_phy_cmd_latency = 0x0
- // .. .. ==> 0XF8006190[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_phy_int_lpbk = 0x0
- // .. .. ==> 0XF8006190[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006190, 0xFFFFFFFFU ,0x10040080U),
- // .. .. reg_phy_wr_rl_delay = 0x2
- // .. .. ==> 0XF8006194[4:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000002U
- // .. .. reg_phy_rd_rl_delay = 0x4
- // .. .. ==> 0XF8006194[9:5] = 0x00000004U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x00000080U
- // .. .. reg_phy_dll_lock_diff = 0xf
- // .. .. ==> 0XF8006194[13:10] = 0x0000000FU
- // .. .. ==> MASK : 0x00003C00U VAL : 0x00003C00U
- // .. .. reg_phy_use_wr_level = 0x1
- // .. .. ==> 0XF8006194[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. reg_phy_use_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF8006194[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. reg_phy_use_rd_data_eye_level = 0x1
- // .. .. ==> 0XF8006194[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_dis_calib_rst = 0x0
- // .. .. ==> 0XF8006194[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006194[19:18] = 0x00000000U
- // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U),
- // .. .. reg_arb_page_addr_mask = 0x0
- // .. .. ==> 0XF8006204[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006208[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006208[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006208[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006208[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006208[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006208, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF800620C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF800620C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF800620C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF800620C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF800620C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF800620C, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006210[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006210[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006210[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006210[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006210[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006210, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006214[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006214[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006214[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006214[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006214[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006214, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006218[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006218[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006218[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006218[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006218[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF800621C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF800621C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF800621C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF800621C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF800621C[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006220[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006220[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006220[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006220[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006220[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006224[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006224[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006224[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006224[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006224[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_ddrc_lpddr2 = 0x0
- // .. .. ==> 0XF80062A8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_per_bank_refresh = 0x0
- // .. .. ==> 0XF80062A8[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_derate_enable = 0x0
- // .. .. ==> 0XF80062A8[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_ddrc_mr4_margin = 0x0
- // .. .. ==> 0XF80062A8[11:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062A8, 0x00000FF7U ,0x00000000U),
- // .. .. reg_ddrc_mr4_read_interval = 0x0
- // .. .. ==> 0XF80062AC[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_ddrc_min_stable_clock_x1 = 0x5
- // .. .. ==> 0XF80062B0[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_idle_after_reset_x32 = 0x11
- // .. .. ==> 0XF80062B0[11:4] = 0x00000011U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000110U
- // .. .. reg_ddrc_t_mrw = 0x5
- // .. .. ==> 0XF80062B0[21:12] = 0x00000005U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005115U),
- // .. .. reg_ddrc_max_auto_init_x1024 = 0x9e
- // .. .. ==> 0XF80062B4[7:0] = 0x0000009EU
- // .. .. ==> MASK : 0x000000FFU VAL : 0x0000009EU
- // .. .. reg_ddrc_dev_zqinit_x32 = 0x11
- // .. .. ==> 0XF80062B4[17:8] = 0x00000011U
- // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001100U
- // .. ..
- EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x0000119EU),
- // .. .. START: POLL ON DCI STATUS
- // .. .. DONE = 1
- // .. .. ==> 0XF8000B74[13:13] = 0x00000001U
- // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U
- // .. ..
- EMIT_MASKPOLL(0XF8000B74, 0x00002000U),
- // .. .. FINISH: POLL ON DCI STATUS
- // .. .. START: UNLOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0x1
- // .. .. ==> 0XF8006000[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000085U),
- // .. .. FINISH: UNLOCK DDR
- // .. .. START: CHECK DDR STATUS
- // .. .. ddrc_reg_operating_mode = 1
- // .. .. ==> 0XF8006054[2:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U
- // .. ..
- EMIT_MASKPOLL(0XF8006054, 0x00000007U),
- // .. .. FINISH: CHECK DDR STATUS
- // .. FINISH: DDR INITIALIZATION
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_mio_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: OCM REMAPPING
- // .. FINISH: OCM REMAPPING
- // .. START: DDRIOB SETTINGS
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B40[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B40[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B40[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B40[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B40[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B40[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B40[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B44[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B44[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B44[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B44[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B44[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B44[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B44[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B48[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x1
- // .. ==> 0XF8000B48[2:1] = 0x00000001U
- // .. ==> MASK : 0x00000006U VAL : 0x00000002U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B48[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B48[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B48[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B48[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B48[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B4C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B4C[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B4C[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B4C[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B4C[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B4C[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B4C[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B50[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x2
- // .. ==> 0XF8000B50[2:1] = 0x00000002U
- // .. ==> MASK : 0x00000006U VAL : 0x00000004U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B50[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B50[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B50[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B50[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B50[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B54[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B54[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B54[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B54[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B54[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B54[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B54[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B58[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B58[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B58[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B58[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B58[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B58[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B58[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B5C[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B5C[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x3
- // .. ==> 0XF8000B5C[18:14] = 0x00000003U
- // .. ==> MASK : 0x0007C000U VAL : 0x0000C000U
- // .. SLEW_N = 0x3
- // .. ==> 0XF8000B5C[23:19] = 0x00000003U
- // .. ==> MASK : 0x00F80000U VAL : 0x00180000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B5C[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B5C[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B60[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B60[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B60[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B60[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B60[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B60[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B64[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B64[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B64[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B64[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B64[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B64[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B68[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B68[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B68[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B68[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B68[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B68[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F98068U),
- // .. VREF_INT_EN = 0x0
- // .. ==> 0XF8000B6C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. VREF_SEL = 0x0
- // .. ==> 0XF8000B6C[4:1] = 0x00000000U
- // .. ==> MASK : 0x0000001EU VAL : 0x00000000U
- // .. VREF_EXT_EN = 0x1
- // .. ==> 0XF8000B6C[6:5] = 0x00000001U
- // .. ==> MASK : 0x00000060U VAL : 0x00000020U
- // .. VREF_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[8:7] = 0x00000000U
- // .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. REFIO_EN = 0x1
- // .. ==> 0XF8000B6C[9:9] = 0x00000001U
- // .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. REFIO_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DRST_B_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. CKE_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[14:14] = 0x00000000U
- // .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B6C, 0x000073FFU ,0x00000220U),
- // .. .. START: ASSERT RESET
- // .. .. RESET = 1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000021U),
- // .. .. FINISH: ASSERT RESET
- // .. .. START: DEASSERT RESET
- // .. .. RESET = 0
- // .. .. ==> 0XF8000B70[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U),
- // .. .. FINISH: DEASSERT RESET
- // .. .. RESET = 0x1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ENABLE = 0x1
- // .. .. ==> 0XF8000B70[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. VRP_TRI = 0x0
- // .. .. ==> 0XF8000B70[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. VRN_TRI = 0x0
- // .. .. ==> 0XF8000B70[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. VRP_OUT = 0x0
- // .. .. ==> 0XF8000B70[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. .. NREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[7:6] = 0x00000000U
- // .. .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. .. NREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[10:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000700U VAL : 0x00000000U
- // .. .. NREF_OPT4 = 0x1
- // .. .. ==> 0XF8000B70[13:11] = 0x00000001U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00000800U
- // .. .. PREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[16:14] = 0x00000000U
- // .. .. ==> MASK : 0x0001C000U VAL : 0x00000000U
- // .. .. PREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[19:17] = 0x00000000U
- // .. .. ==> MASK : 0x000E0000U VAL : 0x00000000U
- // .. .. UPDATE_CONTROL = 0x0
- // .. .. ==> 0XF8000B70[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. INIT_COMPLETE = 0x0
- // .. .. ==> 0XF8000B70[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. TST_CLK = 0x0
- // .. .. ==> 0XF8000B70[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. TST_HLN = 0x0
- // .. .. ==> 0XF8000B70[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. TST_HLP = 0x0
- // .. .. ==> 0XF8000B70[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. TST_RST = 0x0
- // .. .. ==> 0XF8000B70[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. INT_DCI_EN = 0x0
- // .. .. ==> 0XF8000B70[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x07FFFFFFU ,0x00000823U),
- // .. FINISH: DDRIOB SETTINGS
- // .. START: MIO PROGRAMMING
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000700[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000700[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000700[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000700[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000700[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000700[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000700[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000700[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000700[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000704[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000704[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000704[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000704[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000704[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000704[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000704[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000704[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000704[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000704, 0x00003FFFU ,0x00001602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000708[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000708[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000708[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000708[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000708[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000708[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000708[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000708[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000708[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800070C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800070C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800070C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800070C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800070C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800070C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800070C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800070C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800070C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000710[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000710[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000710[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000710[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000710[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000710[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000710[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000710[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000710[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000714[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000714[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000714[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000714[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000714[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000714[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000714[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000714[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000714[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000718[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000718[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000718[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000718[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000718[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000718[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000718[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000718[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000718[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800071C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800071C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800071C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800071C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800071C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800071C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800071C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800071C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800071C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000720[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000720[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000720[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000720[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000720[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000720[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000720[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000720[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000720[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000724[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. Speed = 0
- // .. ==> 0XF8000724[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000724[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000724[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000724[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000724, 0x00003F01U ,0x00001601U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000728[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000728[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000728[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000728[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000728[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000728[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000728[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000728[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000728[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800072C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800072C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800072C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800072C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800072C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800072C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800072C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800072C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800072C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000730[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000730[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000730[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000730[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000730[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000730[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000730[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000730[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000730[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000734[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000734[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000734[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000734[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000734[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000734[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000734[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000734[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000734[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000738[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000738[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000738[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000738[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000738[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000738[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000738[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000738[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000738[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800073C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800073C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800073C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800073C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800073C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800073C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800073C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800073C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800073C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800073C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000740[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000740[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000740[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000740[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000740[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000740[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000740[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000740[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000740[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000740, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000744[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000744[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000744[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000744[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000744[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000744[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000744[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000744[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000744[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000744, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000748[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000748[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000748[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000748[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000748[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000748[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000748[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000748[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000748[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000748, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800074C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800074C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800074C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800074C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800074C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800074C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800074C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800074C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800074C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800074C, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000750[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000750[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000750[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000750[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000750[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000750[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000750[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000750[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000750[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000750, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000754[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000754[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000754[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000754[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000754[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000754[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000754[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000754[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000754[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000754, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000758[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000758[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000758[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000758[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000758[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000758[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000758[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000758[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000758[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000758, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800075C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800075C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800075C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800075C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800075C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800075C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800075C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800075C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800075C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800075C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000760[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000760[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000760[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000760[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000760[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000760[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000760[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000760[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000760[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000764[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000764[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000764[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000764[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000764[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000764[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000764[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000764[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000764[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000768[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000768[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000768[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000768[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000768[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000768[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000768[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000768[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000768[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800076C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800076C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800076C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800076C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800076C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800076C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800076C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800076C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800076C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000770[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000770[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000770[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000770[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000770[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000770[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000770[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000770[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000770[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000774[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000774[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000774[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000774[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000774[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000774[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000774[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000774[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000774[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000778[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000778[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000778[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000778[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000778[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000778[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000778[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000778[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000778[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800077C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF800077C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800077C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800077C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800077C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800077C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800077C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800077C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800077C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000780[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000780[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000780[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000780[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000780[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000780[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000780[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000780[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000780[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000784[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000784[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000784[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000784[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000784[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000784[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000784[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000784[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000784[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000788[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000788[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000788[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000788[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000788[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000788[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000788[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000788[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000788[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800078C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800078C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800078C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800078C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800078C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800078C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800078C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800078C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800078C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000790[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000790[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000790[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000790[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000790[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000790[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000790[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000790[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000790[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000794[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000794[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000794[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000794[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000794[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000794[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000794[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000794[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000794[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000798[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000798[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000798[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000798[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000798[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000798[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000798[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000798[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000798[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800079C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800079C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800079C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800079C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800079C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800079C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800079C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800079C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800079C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A0[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A8[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007AC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007AC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007AC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007AC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007AC[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007AC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007AC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007AC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007AC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007B0[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007B0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007B4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007B4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007B8[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007B8[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007B8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007BC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007BC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007BC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007BC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007BC[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007BC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007BC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007BC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007BC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C0[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007C4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C4[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007C8[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007C8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007CC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007CC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007CC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007CC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007CC[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007CC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007CC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007CC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007CC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007D0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D0[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00001420U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007D4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D4[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00001421U),
- // .. SDIO1_WP_SEL = 57
- // .. ==> 0XF8000834[5:0] = 0x00000039U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000039U
- // .. SDIO1_CD_SEL = 9
- // .. ==> 0XF8000834[21:16] = 0x00000009U
- // .. ==> MASK : 0x003F0000U VAL : 0x00090000U
- // ..
- EMIT_MASKWRITE(0XF8000834, 0x003F003FU ,0x00090039U),
- // .. FINISH: MIO PROGRAMMING
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_peripherals_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000000U),
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000000U),
- // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // .. START: SRAM/NOR SET OPMODE
- // .. FINISH: SRAM/NOR SET OPMODE
- // .. START: UART REGISTERS
- // .. BDIV = 0x6
- // .. ==> 0XE0001034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0001018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0001000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0001000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0001000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0001000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0001000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0001000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0001000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0001000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0001000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0001004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0001004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0001004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0001004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0001004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0001004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0001004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0001004, 0x00000FFFU ,0x00000020U),
- // .. BDIV = 0x6
- // .. ==> 0XE0000034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0000034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0000018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0000018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0000000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0000000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0000000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0000000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0000000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0000000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0000000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0000000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0000000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0000000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0000004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0000004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0000004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0000004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0000004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0000004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0000004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0000004, 0x00000FFFU ,0x00000020U),
- // .. FINISH: UART REGISTERS
- // .. START: QSPI REGISTERS
- // .. Holdb_dr = 1
- // .. ==> 0XE000D000[19:19] = 0x00000001U
- // .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // ..
- EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U),
- // .. FINISH: QSPI REGISTERS
- // .. START: PL POWER ON RESET REGISTERS
- // .. PCFG_POR_CNT_4K = 0
- // .. ==> 0XF8007000[29:29] = 0x00000000U
- // .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U),
- // .. FINISH: PL POWER ON RESET REGISTERS
- // .. START: SMC TIMING CALCULATION REGISTER UPDATE
- // .. .. START: NAND SET CYCLE
- // .. .. FINISH: NAND SET CYCLE
- // .. .. START: OPMODE
- // .. .. FINISH: OPMODE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: SRAM/NOR CS0 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS0 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS0 BASE ADDRESS
- // .. .. FINISH: NOR CS0 BASE ADDRESS
- // .. .. START: SRAM/NOR CS1 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS1 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS1 BASE ADDRESS
- // .. .. FINISH: NOR CS1 BASE ADDRESS
- // .. .. START: USB RESET
- // .. .. FINISH: USB RESET
- // .. .. START: ENET RESET
- // .. .. FINISH: ENET RESET
- // .. .. START: I2C RESET
- // .. .. FINISH: I2C RESET
- // .. .. START: NOR CHIP SELECT
- // .. .. .. START: DIR MODE BANK 0
- // .. .. .. FINISH: DIR MODE BANK 0
- // .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. FINISH: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. START: OUTPUT ENABLE BANK 0
- // .. .. .. FINISH: OUTPUT ENABLE BANK 0
- // .. .. FINISH: NOR CHIP SELECT
- // .. FINISH: SMC TIMING CALCULATION REGISTER UPDATE
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_post_config_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: ENABLING LEVEL SHIFTER
- // .. USER_INP_ICT_EN_0 = 3
- // .. ==> 0XF8000900[1:0] = 0x00000003U
- // .. ==> MASK : 0x00000003U VAL : 0x00000003U
- // .. USER_INP_ICT_EN_1 = 3
- // .. ==> 0XF8000900[3:2] = 0x00000003U
- // .. ==> MASK : 0x0000000CU VAL : 0x0000000CU
- // ..
- EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU),
- // .. FINISH: ENABLING LEVEL SHIFTER
- // .. START: FPGA RESETS TO 0
- // .. reserved_3 = 0
- // .. ==> 0XF8000240[31:25] = 0x00000000U
- // .. ==> MASK : 0xFE000000U VAL : 0x00000000U
- // .. FPGA_ACP_RST = 0
- // .. ==> 0XF8000240[24:24] = 0x00000000U
- // .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. FPGA_AXDS3_RST = 0
- // .. ==> 0XF8000240[23:23] = 0x00000000U
- // .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. FPGA_AXDS2_RST = 0
- // .. ==> 0XF8000240[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. FPGA_AXDS1_RST = 0
- // .. ==> 0XF8000240[21:21] = 0x00000000U
- // .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. FPGA_AXDS0_RST = 0
- // .. ==> 0XF8000240[20:20] = 0x00000000U
- // .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. reserved_2 = 0
- // .. ==> 0XF8000240[19:18] = 0x00000000U
- // .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. FSSW1_FPGA_RST = 0
- // .. ==> 0XF8000240[17:17] = 0x00000000U
- // .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. FSSW0_FPGA_RST = 0
- // .. ==> 0XF8000240[16:16] = 0x00000000U
- // .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. reserved_1 = 0
- // .. ==> 0XF8000240[15:14] = 0x00000000U
- // .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. FPGA_FMSW1_RST = 0
- // .. ==> 0XF8000240[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. FPGA_FMSW0_RST = 0
- // .. ==> 0XF8000240[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. FPGA_DMA3_RST = 0
- // .. ==> 0XF8000240[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. FPGA_DMA2_RST = 0
- // .. ==> 0XF8000240[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. FPGA_DMA1_RST = 0
- // .. ==> 0XF8000240[9:9] = 0x00000000U
- // .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. FPGA_DMA0_RST = 0
- // .. ==> 0XF8000240[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. reserved = 0
- // .. ==> 0XF8000240[7:4] = 0x00000000U
- // .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. FPGA3_OUT_RST = 0
- // .. ==> 0XF8000240[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. FPGA2_OUT_RST = 0
- // .. ==> 0XF8000240[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. FPGA1_OUT_RST = 0
- // .. ==> 0XF8000240[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. FPGA0_OUT_RST = 0
- // .. ==> 0XF8000240[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U),
- // .. FINISH: FPGA RESETS TO 0
- // .. START: AFI REGISTERS
- // .. .. START: AFI0 REGISTERS
- // .. .. FINISH: AFI0 REGISTERS
- // .. .. START: AFI1 REGISTERS
- // .. .. FINISH: AFI1 REGISTERS
- // .. .. START: AFI2 REGISTERS
- // .. .. FINISH: AFI2 REGISTERS
- // .. .. START: AFI3 REGISTERS
- // .. .. FINISH: AFI3 REGISTERS
- // .. FINISH: AFI REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_debug_1_0[] = {
- // START: top
- // .. START: CROSS TRIGGER CONFIGURATIONS
- // .. .. START: UNLOCKING CTI REGISTERS
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
- // .. .. FINISH: UNLOCKING CTI REGISTERS
- // .. .. START: ENABLING CTI MODULES AND CHANNELS
- // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
- // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. FINISH: CROSS TRIGGER CONFIGURATIONS
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-
-#include "xil_io.h"
-#define PS7_MASK_POLL_TIME 100000000
-
-char*
-getPS7MessageInfo(unsigned key) {
-
- char* err_msg = "";
- switch (key) {
- case PS7_INIT_SUCCESS: err_msg = "PS7 initialization successful"; break;
- case PS7_INIT_CORRUPT: err_msg = "PS7 init Data Corrupted"; break;
- case PS7_INIT_TIMEOUT: err_msg = "PS7 init mask poll timeout"; break;
- case PS7_POLL_FAILED_DDR_INIT: err_msg = "Mask Poll failed for DDR Init"; break;
- case PS7_POLL_FAILED_DMA: err_msg = "Mask Poll failed for PLL Init"; break;
- case PS7_POLL_FAILED_PLL: err_msg = "Mask Poll failed for DMA done bit"; break;
- default: err_msg = "Undefined error status"; break;
- }
-
- return err_msg;
-}
-
-unsigned long
-ps7GetSiliconVersion () {
- // Read PS version from MCTRL register [31:28]
- unsigned long mask = 0xF0000000;
- unsigned long *addr = (unsigned long*) 0XF8007080;
- unsigned long ps_version = (*addr & mask) >> 28;
- return ps_version;
-}
-
-void mask_write (unsigned long add , unsigned long mask, unsigned long val ) {
- volatile unsigned long *addr = (volatile unsigned long*) add;
- *addr = ( val & mask ) | ( *addr & ~mask);
- //xil_printf("MaskWrite : 0x%x--> 0x%x \n \r" ,add, *addr);
-}
-
-
-int mask_poll(unsigned long add , unsigned long mask ) {
- volatile unsigned long *addr = (volatile unsigned long*) add;
- int i = 0;
- while (!(*addr & mask)) {
- if (i == PS7_MASK_POLL_TIME) {
- return -1;
- }
- i++;
- }
- return 1;
- //xil_printf("MaskPoll : 0x%x --> 0x%x \n \r" , add, *addr);
-}
-
-unsigned long mask_read(unsigned long add , unsigned long mask ) {
- volatile unsigned long *addr = (volatile unsigned long*) add;
- unsigned long val = (*addr & mask);
- //xil_printf("MaskRead : 0x%x --> 0x%x \n \r" , add, val);
- return val;
-}
-
-
-
-int
-ps7_config(unsigned long * ps7_config_init)
-{
- unsigned long *ptr = ps7_config_init;
-
- unsigned long opcode; // current instruction ..
- unsigned long args[16]; // no opcode has so many args ...
- int numargs; // number of arguments of this instruction
- int j; // general purpose index
-
- volatile unsigned long *addr; // some variable to make code readable
- unsigned long val,mask; // some variable to make code readable
-
- int finish = -1 ; // loop while this is negative !
- int i = 0; // Timeout variable
-
- while( finish < 0 ) {
- numargs = ptr[0] & 0xF;
- opcode = ptr[0] >> 4;
-
- for( j = 0 ; j < numargs ; j ++ )
- args[j] = ptr[j+1];
- ptr += numargs + 1;
-
-
- switch ( opcode ) {
-
- case OPCODE_EXIT:
- finish = PS7_INIT_SUCCESS;
- break;
-
- case OPCODE_CLEAR:
- addr = (unsigned long*) args[0];
- *addr = 0;
- break;
-
- case OPCODE_WRITE:
- addr = (unsigned long*) args[0];
- val = args[1];
- *addr = val;
- break;
-
- case OPCODE_MASKWRITE:
- addr = (unsigned long*) args[0];
- mask = args[1];
- val = args[2];
- *addr = ( val & mask ) | ( *addr & ~mask);
- break;
-
- case OPCODE_MASKPOLL:
- addr = (unsigned long*) args[0];
- mask = args[1];
- i = 0;
- while (!(*addr & mask)) {
- if (i == PS7_MASK_POLL_TIME) {
- finish = PS7_INIT_TIMEOUT;
- break;
- }
- i++;
- }
- break;
- case OPCODE_MASKDELAY:
- {
- addr = (unsigned long*) args[0];
- mask = args[1];
- int delay = get_number_of_cycles_for_delay(mask);
- perf_reset_and_start_timer();
- while ((*addr < delay)) {
- }
- }
- break;
- default:
- finish = PS7_INIT_CORRUPT;
- break;
- }
- }
- return finish;
-}
-
-unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
-unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;
-unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;
-unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;
-unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;
-
-int
-ps7_post_config()
-{
- // Get the PS_VERSION on run time
- unsigned long si_ver = ps7GetSiliconVersion ();
- int ret = -1;
- if (si_ver == PCW_SILICON_VERSION_1) {
- ret = ps7_config (ps7_post_config_1_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else if (si_ver == PCW_SILICON_VERSION_2) {
- ret = ps7_config (ps7_post_config_2_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else {
- ret = ps7_config (ps7_post_config_3_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- }
- return PS7_INIT_SUCCESS;
-}
-
-int
-ps7_debug()
-{
- // Get the PS_VERSION on run time
- unsigned long si_ver = ps7GetSiliconVersion ();
- int ret = -1;
- if (si_ver == PCW_SILICON_VERSION_1) {
- ret = ps7_config (ps7_debug_1_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else if (si_ver == PCW_SILICON_VERSION_2) {
- ret = ps7_config (ps7_debug_2_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else {
- ret = ps7_config (ps7_debug_3_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- }
- return PS7_INIT_SUCCESS;
-}
-
-
-int
-ps7_init()
-{
- // Get the PS_VERSION on run time
- unsigned long si_ver = ps7GetSiliconVersion ();
- int ret;
- //int pcw_ver = 0;
-
- if (si_ver == PCW_SILICON_VERSION_1) {
- ps7_mio_init_data = ps7_mio_init_data_1_0;
- ps7_pll_init_data = ps7_pll_init_data_1_0;
- ps7_clock_init_data = ps7_clock_init_data_1_0;
- ps7_ddr_init_data = ps7_ddr_init_data_1_0;
- ps7_peripherals_init_data = ps7_peripherals_init_data_1_0;
- //pcw_ver = 1;
-
- } else if (si_ver == PCW_SILICON_VERSION_2) {
- ps7_mio_init_data = ps7_mio_init_data_2_0;
- ps7_pll_init_data = ps7_pll_init_data_2_0;
- ps7_clock_init_data = ps7_clock_init_data_2_0;
- ps7_ddr_init_data = ps7_ddr_init_data_2_0;
- ps7_peripherals_init_data = ps7_peripherals_init_data_2_0;
- //pcw_ver = 2;
-
- } else {
- ps7_mio_init_data = ps7_mio_init_data_3_0;
- ps7_pll_init_data = ps7_pll_init_data_3_0;
- ps7_clock_init_data = ps7_clock_init_data_3_0;
- ps7_ddr_init_data = ps7_ddr_init_data_3_0;
- ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;
- //pcw_ver = 3;
- }
-
- // MIO init
- ret = ps7_config (ps7_mio_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
- // PLL init
- ret = ps7_config (ps7_pll_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
- // Clock init
- ret = ps7_config (ps7_clock_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
- // DDR init
- ret = ps7_config (ps7_ddr_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
-
-
- // Peripherals init
- ret = ps7_config (ps7_peripherals_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
- //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
- return PS7_INIT_SUCCESS;
-}
-
-
-
-
-/* For delay calculation using global timer */
-
-/* start timer */
- void perf_start_clock(void)
-{
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_CONTROL = ((1 << 0) | // Timer Enable
- (1 << 3) | // Auto-increment
- (0 << 8) // Pre-scale
- );
-}
-
-/* stop timer and reset timer count regs */
- void perf_reset_clock(void)
-{
- perf_disable_clock();
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_COUNT_L32 = 0;
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_COUNT_U32 = 0;
-}
-
-/* Compute mask for given delay in miliseconds*/
-int get_number_of_cycles_for_delay(unsigned int delay)
-{
- // GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- return (APU_FREQ*delay/(2*1000));
-
-}
-
-/* stop timer */
- void perf_disable_clock(void)
-{
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_CONTROL = 0;
-}
-
-void perf_reset_and_start_timer()
-{
- perf_reset_clock();
- perf_start_clock();
-}
-
-
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.h
deleted file mode 100644
index c2236f6..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/******************************************************************************
-*
-* Copyright (C) 2010-2019 Xilinx, Inc. All rights reserved.
-*
-* Permission is hereby granted, free of charge, to any person obtaining a copy
-* of this software and associated documentation files (the "Software"), to deal
-* in the Software without restriction, including without limitation the rights
-* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-* copies of the Software, and to permit persons to whom the Software is
-* furnished to do so, subject to the following conditions:
-*
-* The above copyright notice and this permission notice shall be included in
-* all copies or substantial portions of the Software.
-*
-* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
-* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-* SOFTWARE.
-*
-******************************************************************************/
-/****************************************************************************/
-/**
-*
-* @file ps7_init.h
-*
-* This file can be included in FSBL code
-* to get prototype of ps7_init() function
-* and error codes
-*
-*****************************************************************************/
-
-
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-//typedef unsigned int u32;
-
-
-/** do we need to make this name more unique ? **/
-//extern u32 ps7_init_data[];
-extern unsigned long * ps7_ddr_init_data;
-extern unsigned long * ps7_mio_init_data;
-extern unsigned long * ps7_pll_init_data;
-extern unsigned long * ps7_clock_init_data;
-extern unsigned long * ps7_peripherals_init_data;
-
-
-
-#define OPCODE_EXIT 0U
-#define OPCODE_CLEAR 1U
-#define OPCODE_WRITE 2U
-#define OPCODE_MASKWRITE 3U
-#define OPCODE_MASKPOLL 4U
-#define OPCODE_MASKDELAY 5U
-#define NEW_PS7_ERR_CODE 1
-
-/* Encode number of arguments in last nibble */
-#define EMIT_EXIT() ( (OPCODE_EXIT << 4 ) | 0 )
-#define EMIT_CLEAR(addr) ( (OPCODE_CLEAR << 4 ) | 1 ) , addr
-#define EMIT_WRITE(addr,val) ( (OPCODE_WRITE << 4 ) | 2 ) , addr, val
-#define EMIT_MASKWRITE(addr,mask,val) ( (OPCODE_MASKWRITE << 4 ) | 3 ) , addr, mask, val
-#define EMIT_MASKPOLL(addr,mask) ( (OPCODE_MASKPOLL << 4 ) | 2 ) , addr, mask
-#define EMIT_MASKDELAY(addr,mask) ( (OPCODE_MASKDELAY << 4 ) | 2 ) , addr, mask
-
-/* Returns codes of PS7_Init */
-#define PS7_INIT_SUCCESS (0) // 0 is success in good old C
-#define PS7_INIT_CORRUPT (1) // 1 the data is corrupted, and slcr reg are in corrupted state now
-#define PS7_INIT_TIMEOUT (2) // 2 when a poll operation timed out
-#define PS7_POLL_FAILED_DDR_INIT (3) // 3 when a poll operation timed out for ddr init
-#define PS7_POLL_FAILED_DMA (4) // 4 when a poll operation timed out for dma done bit
-#define PS7_POLL_FAILED_PLL (5) // 5 when a poll operation timed out for pll sequence init
-
-
-/* Silicon Versions */
-#define PCW_SILICON_VERSION_1 0
-#define PCW_SILICON_VERSION_2 1
-#define PCW_SILICON_VERSION_3 2
-
-/* This flag to be used by FSBL to check whether ps7_post_config() proc exixts */
-#define PS7_POST_CONFIG
-
-/* Freq of all peripherals */
-
-#define APU_FREQ 750000000
-#define DDR_FREQ 500000000
-#define DCI_FREQ 10204082
-#define QSPI_FREQ 134615387
-#define SMC_FREQ 10000000
-#define ENET0_FREQ 125000000
-#define ENET1_FREQ 10000000
-#define USB0_FREQ 60000000
-#define USB1_FREQ 60000000
-#define SDIO_FREQ 97222221
-#define UART_FREQ 97222221
-#define SPI_FREQ 159090912
-#define I2C_FREQ 125000000
-#define WDT_FREQ 125000000
-#define TTC_FREQ 50000000
-#define CAN_FREQ 97222221
-#define PCAP_FREQ 194444443
-#define TPIU_FREQ 200000000
-#define FPGA0_FREQ 125000000
-#define FPGA1_FREQ 10000000
-#define FPGA2_FREQ 10000000
-#define FPGA3_FREQ 10000000
-
-
-/* For delay calculation using global registers*/
-#define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
-#define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
-#define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
-#define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
-
-int ps7_config( unsigned long*);
-int ps7_init();
-int ps7_post_config();
-int ps7_debug();
-char* getPS7MessageInfo(unsigned key);
-
-void perf_start_clock(void);
-void perf_disable_clock(void);
-void perf_reset_clock(void);
-void perf_reset_and_start_timer();
-int get_number_of_cycles_for_delay(unsigned int delay);
-#ifdef __cplusplus
-}
-#endif
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.tcl
deleted file mode 100644
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.c b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.c
deleted file mode 100644
index 7fed4b7..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.c
+++ /dev/null
@@ -1,12431 +0,0 @@
-/******************************************************************************
-* Copyright (C) 2010-2019 <Xilinx Inc.>
-*
-* This program is free software; you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation; either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, see <http://www.gnu.org/licenses/>
-*
-*
-******************************************************************************/
-/****************************************************************************/
-/**
-*
-* @file ps7_init_gpl.c
-*
-* This file is automatically generated
-*
-*****************************************************************************/
-
-#include "ps7_init_gpl.h"
-
-unsigned long ps7_pll_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: PLL SLCR REGISTERS
- // .. .. START: ARM PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000110[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000110[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x145
- // .. .. ==> 0XF8000110[21:12] = 0x00000145U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U
- // .. ..
- EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x001452C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x1e
- // .. .. .. ==> 0XF8000100[18:12] = 0x0000001EU
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x0001E000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. ARM_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000001U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. SRCSEL = 0x0
- // .. .. .. ==> 0XF8000120[5:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. .. DIVISOR = 0x2
- // .. .. .. ==> 0XF8000120[13:8] = 0x00000002U
- // .. .. .. ==> MASK : 0x00003F00U VAL : 0x00000200U
- // .. .. .. CPU_6OR4XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[24:24] = 0x00000001U
- // .. .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. .. .. CPU_3OR2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[25:25] = 0x00000001U
- // .. .. .. ==> MASK : 0x02000000U VAL : 0x02000000U
- // .. .. .. CPU_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[26:26] = 0x00000001U
- // .. .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. .. CPU_1XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[27:27] = 0x00000001U
- // .. .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. .. CPU_PERI_CLKACT = 0x1
- // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U
- // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U),
- // .. .. FINISH: ARM PLL INIT
- // .. .. START: DDR PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000114[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000114[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x1f4
- // .. .. ==> 0XF8000114[21:12] = 0x000001F4U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x001F4000U
- // .. ..
- EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x001F42C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x14
- // .. .. .. ==> 0XF8000104[18:12] = 0x00000014U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00014000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00014000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. DDR_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000002U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. DDR_3XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. .. DDR_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. .. DDR_3XCLK_DIVISOR = 0x2
- // .. .. .. ==> 0XF8000124[25:20] = 0x00000002U
- // .. .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. .. .. DDR_2XCLK_DIVISOR = 0x3
- // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U
- // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U),
- // .. .. FINISH: DDR PLL INIT
- // .. .. START: IO PLL INIT
- // .. .. PLL_RES = 0x2
- // .. .. ==> 0XF8000118[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000118[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x113
- // .. .. ==> 0XF8000118[21:12] = 0x00000113U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00113000U
- // .. ..
- EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x00113220U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x23
- // .. .. .. ==> 0XF8000108[18:12] = 0x00000023U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00023000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x00023000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. IO_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000004U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. FINISH: IO PLL INIT
- // .. FINISH: PLL SLCR REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_clock_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: CLOCK CONTROL SLCR REGISTERS
- // .. CLKACT = 0x1
- // .. ==> 0XF8000128[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. DIVISOR0 = 0x31
- // .. ==> 0XF8000128[13:8] = 0x00000031U
- // .. ==> MASK : 0x00003F00U VAL : 0x00003100U
- // .. DIVISOR1 = 0x2
- // .. ==> 0XF8000128[25:20] = 0x00000002U
- // .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // ..
- EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00203101U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000138[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000138[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000138, 0x00000011U ,0x00000001U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000140[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000140[6:4] = 0x00000000U
- // .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. DIVISOR = 0xe
- // .. ==> 0XF8000140[13:8] = 0x0000000EU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000E00U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF8000140[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF8000140, 0x03F03F71U ,0x00100E01U),
- // .. CLKACT = 0x1
- // .. ==> 0XF800014C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800014C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xd
- // .. ==> 0XF800014C[13:8] = 0x0000000DU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000D00U
- // ..
- EMIT_MASKWRITE(0XF800014C, 0x00003F31U ,0x00000D01U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF8000150[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000150[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000150[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000150[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000150, 0x00003F33U ,0x00001202U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000154[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000154[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000154[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000154[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001203U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000158[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000158[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000158[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xb
- // .. ==> 0XF8000158[13:8] = 0x0000000BU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000B00U
- // ..
- EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000B03U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF800015C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF800015C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800015C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR0 = 0x12
- // .. ==> 0XF800015C[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF800015C[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00101202U),
- // .. CAN0_MUX = 0x0
- // .. ==> 0XF8000160[5:0] = 0x00000000U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000000U
- // .. CAN0_REF_SEL = 0x0
- // .. ==> 0XF8000160[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. CAN1_MUX = 0x0
- // .. ==> 0XF8000160[21:16] = 0x00000000U
- // .. ==> MASK : 0x003F0000U VAL : 0x00000000U
- // .. CAN1_REF_SEL = 0x0
- // .. ==> 0XF8000160[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U),
- // .. .. START: TRACE CLOCK
- // .. .. FINISH: TRACE CLOCK
- // .. .. CLKACT = 0x1
- // .. .. ==> 0XF8000168[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000168[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR = 0x9
- // .. .. ==> 0XF8000168[13:8] = 0x00000009U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000900U
- // .. ..
- EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000901U),
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000170[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR0 = 0x7
- // .. .. ==> 0XF8000170[13:8] = 0x00000007U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000700U
- // .. .. DIVISOR1 = 0x2
- // .. .. ==> 0XF8000170[25:20] = 0x00000002U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00200700U),
- // .. .. CLK_621_TRUE = 0x1
- // .. .. ==> 0XF80001C4[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U),
- // .. .. DMA_CPU_2XCLKACT = 0x1
- // .. .. ==> 0XF800012C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. USB0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[2:2] = 0x00000001U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. USB1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. .. GEM0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[6:6] = 0x00000001U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000040U
- // .. .. GEM1_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. SDI0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. SDI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[11:11] = 0x00000001U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // .. .. SPI0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. SPI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. CAN0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. CAN1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. .. I2C0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[18:18] = 0x00000001U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00040000U
- // .. .. I2C1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. .. UART0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[20:20] = 0x00000001U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00100000U
- // .. .. UART1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. GPIO_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[22:22] = 0x00000001U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00400000U
- // .. .. LQSPI_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[23:23] = 0x00000001U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00800000U
- // .. .. SMC_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[24:24] = 0x00000001U
- // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. ..
- EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x01FEC84DU),
- // .. FINISH: CLOCK CONTROL SLCR REGISTERS
- // .. START: THIS SHOULD BE BLANK
- // .. FINISH: THIS SHOULD BE BLANK
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_ddr_init_data_3_0[] = {
- // START: top
- // .. START: DDR INITIALIZATION
- // .. .. START: LOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0
- // .. .. ==> 0XF8006000[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 0x1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000084U),
- // .. .. FINISH: LOCK DDR
- // .. .. reg_ddrc_t_rfc_nom_x32 = 0x79
- // .. .. ==> 0XF8006004[11:0] = 0x00000079U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000079U
- // .. .. reserved_reg_ddrc_active_ranks = 0x1
- // .. .. ==> 0XF8006004[13:12] = 0x00000001U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00001000U
- // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0
- // .. .. ==> 0XF8006004[18:14] = 0x00000000U
- // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006004, 0x0007FFFFU ,0x00001079U),
- // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf
- // .. .. ==> 0XF8006008[10:0] = 0x0000000FU
- // .. .. ==> MASK : 0x000007FFU VAL : 0x0000000FU
- // .. .. reg_ddrc_hpr_max_starve_x32 = 0xf
- // .. .. ==> 0XF8006008[21:11] = 0x0000000FU
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00007800U
- // .. .. reg_ddrc_hpr_xact_run_length = 0xf
- // .. .. ==> 0XF8006008[25:22] = 0x0000000FU
- // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U
- // .. ..
- EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU),
- // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF800600C[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_lpr_max_starve_x32 = 0x2
- // .. .. ==> 0XF800600C[21:11] = 0x00000002U
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00001000U
- // .. .. reg_ddrc_lpr_xact_run_length = 0x8
- // .. .. ==> 0XF800600C[25:22] = 0x00000008U
- // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U
- // .. ..
- EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U),
- // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF8006010[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_w_xact_run_length = 0x8
- // .. .. ==> 0XF8006010[14:11] = 0x00000008U
- // .. .. ==> MASK : 0x00007800U VAL : 0x00004000U
- // .. .. reg_ddrc_w_max_starve_x32 = 0x2
- // .. .. ==> 0XF8006010[25:15] = 0x00000002U
- // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U
- // .. ..
- EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U),
- // .. .. reg_ddrc_t_rc = 0x19
- // .. .. ==> 0XF8006014[5:0] = 0x00000019U
- // .. .. ==> MASK : 0x0000003FU VAL : 0x00000019U
- // .. .. reg_ddrc_t_rfc_min = 0x50
- // .. .. ==> 0XF8006014[13:6] = 0x00000050U
- // .. .. ==> MASK : 0x00003FC0U VAL : 0x00001400U
- // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10
- // .. .. ==> 0XF8006014[20:14] = 0x00000010U
- // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x00041419U),
- // .. .. reg_ddrc_wr2pre = 0x12
- // .. .. ==> 0XF8006018[4:0] = 0x00000012U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000012U
- // .. .. reg_ddrc_powerdown_to_x32 = 0x6
- // .. .. ==> 0XF8006018[9:5] = 0x00000006U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000C0U
- // .. .. reg_ddrc_t_faw = 0x14
- // .. .. ==> 0XF8006018[15:10] = 0x00000014U
- // .. .. ==> MASK : 0x0000FC00U VAL : 0x00005000U
- // .. .. reg_ddrc_t_ras_max = 0x22
- // .. .. ==> 0XF8006018[21:16] = 0x00000022U
- // .. .. ==> MASK : 0x003F0000U VAL : 0x00220000U
- // .. .. reg_ddrc_t_ras_min = 0x12
- // .. .. ==> 0XF8006018[26:22] = 0x00000012U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x04800000U
- // .. .. reg_ddrc_t_cke = 0x4
- // .. .. ==> 0XF8006018[31:28] = 0x00000004U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44A250D2U),
- // .. .. reg_ddrc_write_latency = 0x5
- // .. .. ==> 0XF800601C[4:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000005U
- // .. .. reg_ddrc_rd2wr = 0x7
- // .. .. ==> 0XF800601C[9:5] = 0x00000007U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000E0U
- // .. .. reg_ddrc_wr2rd = 0xe
- // .. .. ==> 0XF800601C[14:10] = 0x0000000EU
- // .. .. ==> MASK : 0x00007C00U VAL : 0x00003800U
- // .. .. reg_ddrc_t_xp = 0x4
- // .. .. ==> 0XF800601C[19:15] = 0x00000004U
- // .. .. ==> MASK : 0x000F8000U VAL : 0x00020000U
- // .. .. reg_ddrc_pad_pd = 0x0
- // .. .. ==> 0XF800601C[22:20] = 0x00000000U
- // .. .. ==> MASK : 0x00700000U VAL : 0x00000000U
- // .. .. reg_ddrc_rd2pre = 0x4
- // .. .. ==> 0XF800601C[27:23] = 0x00000004U
- // .. .. ==> MASK : 0x0F800000U VAL : 0x02000000U
- // .. .. reg_ddrc_t_rcd = 0x7
- // .. .. ==> 0XF800601C[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U),
- // .. .. reg_ddrc_t_ccd = 0x4
- // .. .. ==> 0XF8006020[4:2] = 0x00000004U
- // .. .. ==> MASK : 0x0000001CU VAL : 0x00000010U
- // .. .. reg_ddrc_t_rrd = 0x5
- // .. .. ==> 0XF8006020[7:5] = 0x00000005U
- // .. .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. .. reg_ddrc_refresh_margin = 0x2
- // .. .. ==> 0XF8006020[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_rp = 0x7
- // .. .. ==> 0XF8006020[15:12] = 0x00000007U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00007000U
- // .. .. reg_ddrc_refresh_to_x32 = 0x8
- // .. .. ==> 0XF8006020[20:16] = 0x00000008U
- // .. .. ==> MASK : 0x001F0000U VAL : 0x00080000U
- // .. .. reg_ddrc_mobile = 0x0
- // .. .. ==> 0XF8006020[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reg_ddrc_en_dfi_dram_clk_disable = 0x0
- // .. .. ==> 0XF8006020[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reg_ddrc_read_latency = 0x7
- // .. .. ==> 0XF8006020[28:24] = 0x00000007U
- // .. .. ==> MASK : 0x1F000000U VAL : 0x07000000U
- // .. .. reg_phy_mode_ddr1_ddr2 = 0x1
- // .. .. ==> 0XF8006020[29:29] = 0x00000001U
- // .. .. ==> MASK : 0x20000000U VAL : 0x20000000U
- // .. .. reg_ddrc_dis_pad_pd = 0x0
- // .. .. ==> 0XF8006020[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006020, 0x7FDFFFFCU ,0x270872B0U),
- // .. .. reg_ddrc_en_2t_timing_mode = 0x0
- // .. .. ==> 0XF8006024[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_prefer_write = 0x0
- // .. .. ==> 0XF8006024[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_wr = 0x0
- // .. .. ==> 0XF8006024[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_addr = 0x0
- // .. .. ==> 0XF8006024[8:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_data = 0x0
- // .. .. ==> 0XF8006024[24:9] = 0x00000000U
- // .. .. ==> MASK : 0x01FFFE00U VAL : 0x00000000U
- // .. .. ddrc_reg_mr_wr_busy = 0x0
- // .. .. ==> 0XF8006024[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_type = 0x0
- // .. .. ==> 0XF8006024[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_rdata_valid = 0x0
- // .. .. ==> 0XF8006024[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006024, 0x0FFFFFC3U ,0x00000000U),
- // .. .. reg_ddrc_final_wait_x32 = 0x7
- // .. .. ==> 0XF8006028[6:0] = 0x00000007U
- // .. .. ==> MASK : 0x0000007FU VAL : 0x00000007U
- // .. .. reg_ddrc_pre_ocd_x32 = 0x0
- // .. .. ==> 0XF8006028[10:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000780U VAL : 0x00000000U
- // .. .. reg_ddrc_t_mrd = 0x4
- // .. .. ==> 0XF8006028[13:11] = 0x00000004U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U
- // .. ..
- EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U),
- // .. .. reg_ddrc_emr2 = 0x8
- // .. .. ==> 0XF800602C[15:0] = 0x00000008U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000008U
- // .. .. reg_ddrc_emr3 = 0x0
- // .. .. ==> 0XF800602C[31:16] = 0x00000000U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U),
- // .. .. reg_ddrc_mr = 0x930
- // .. .. ==> 0XF8006030[15:0] = 0x00000930U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000930U
- // .. .. reg_ddrc_emr = 0x4
- // .. .. ==> 0XF8006030[31:16] = 0x00000004U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U),
- // .. .. reg_ddrc_burst_rdwr = 0x4
- // .. .. ==> 0XF8006034[3:0] = 0x00000004U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000004U
- // .. .. reg_ddrc_pre_cke_x1024 = 0x156
- // .. .. ==> 0XF8006034[13:4] = 0x00000156U
- // .. .. ==> MASK : 0x00003FF0U VAL : 0x00001560U
- // .. .. reg_ddrc_post_cke_x1024 = 0x1
- // .. .. ==> 0XF8006034[25:16] = 0x00000001U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00010000U
- // .. .. reg_ddrc_burstchop = 0x0
- // .. .. ==> 0XF8006034[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x00011564U),
- // .. .. reg_ddrc_force_low_pri_n = 0x0
- // .. .. ==> 0XF8006038[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_dq = 0x0
- // .. .. ==> 0XF8006038[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006038, 0x00000003U ,0x00000000U),
- // .. .. reg_ddrc_addrmap_bank_b0 = 0x6
- // .. .. ==> 0XF800603C[3:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000006U
- // .. .. reg_ddrc_addrmap_bank_b1 = 0x6
- // .. .. ==> 0XF800603C[7:4] = 0x00000006U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000060U
- // .. .. reg_ddrc_addrmap_bank_b2 = 0x6
- // .. .. ==> 0XF800603C[11:8] = 0x00000006U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000600U
- // .. .. reg_ddrc_addrmap_col_b5 = 0x0
- // .. .. ==> 0XF800603C[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b6 = 0x0
- // .. .. ==> 0XF800603C[19:16] = 0x00000000U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000666U),
- // .. .. reg_ddrc_addrmap_col_b2 = 0x0
- // .. .. ==> 0XF8006040[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b3 = 0x0
- // .. .. ==> 0XF8006040[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b4 = 0x0
- // .. .. ==> 0XF8006040[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b7 = 0x0
- // .. .. ==> 0XF8006040[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b8 = 0xf
- // .. .. ==> 0XF8006040[19:16] = 0x0000000FU
- // .. .. ==> MASK : 0x000F0000U VAL : 0x000F0000U
- // .. .. reg_ddrc_addrmap_col_b9 = 0xf
- // .. .. ==> 0XF8006040[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_col_b10 = 0xf
- // .. .. ==> 0XF8006040[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. .. reg_ddrc_addrmap_col_b11 = 0xf
- // .. .. ==> 0XF8006040[31:28] = 0x0000000FU
- // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFFF0000U),
- // .. .. reg_ddrc_addrmap_row_b0 = 0x5
- // .. .. ==> 0XF8006044[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_addrmap_row_b1 = 0x5
- // .. .. ==> 0XF8006044[7:4] = 0x00000005U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000050U
- // .. .. reg_ddrc_addrmap_row_b2_11 = 0x5
- // .. .. ==> 0XF8006044[11:8] = 0x00000005U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000500U
- // .. .. reg_ddrc_addrmap_row_b12 = 0x5
- // .. .. ==> 0XF8006044[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_addrmap_row_b13 = 0x5
- // .. .. ==> 0XF8006044[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_addrmap_row_b14 = 0xf
- // .. .. ==> 0XF8006044[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_row_b15 = 0xf
- // .. .. ==> 0XF8006044[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0FF55555U),
- // .. .. reg_phy_rd_local_odt = 0x0
- // .. .. ==> 0XF8006048[13:12] = 0x00000000U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00000000U
- // .. .. reg_phy_wr_local_odt = 0x3
- // .. .. ==> 0XF8006048[15:14] = 0x00000003U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x0000C000U
- // .. .. reg_phy_idle_local_odt = 0x3
- // .. .. ==> 0XF8006048[17:16] = 0x00000003U
- // .. .. ==> MASK : 0x00030000U VAL : 0x00030000U
- // .. .. reserved_reg_ddrc_rank0_wr_odt = 0x1
- // .. .. ==> 0XF8006048[5:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000038U VAL : 0x00000008U
- // .. .. reserved_reg_ddrc_rank0_rd_odt = 0x0
- // .. .. ==> 0XF8006048[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006048, 0x0003F03FU ,0x0003C008U),
- // .. .. reg_phy_rd_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_wr_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_phy_rdc_we_to_re_delay = 0x8
- // .. .. ==> 0XF8006050[11:8] = 0x00000008U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000800U
- // .. .. reg_phy_rdc_fifo_rst_disable = 0x0
- // .. .. ==> 0XF8006050[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_phy_use_fixed_re = 0x1
- // .. .. ==> 0XF8006050[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_rdc_fifo_rst_err_cnt_clr = 0x0
- // .. .. ==> 0XF8006050[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_dis_phy_ctrl_rstn = 0x0
- // .. .. ==> 0XF8006050[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_phy_clk_stall_level = 0x0
- // .. .. ==> 0XF8006050[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[27:24] = 0x00000007U
- // .. .. ==> MASK : 0x0F000000U VAL : 0x07000000U
- // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U),
- // .. .. reg_ddrc_dis_dll_calib = 0x0
- // .. .. ==> 0XF8006058[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006058, 0x00010000U ,0x00000000U),
- // .. .. reg_ddrc_rd_odt_delay = 0x3
- // .. .. ==> 0XF800605C[3:0] = 0x00000003U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000003U
- // .. .. reg_ddrc_wr_odt_delay = 0x0
- // .. .. ==> 0XF800605C[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_rd_odt_hold = 0x0
- // .. .. ==> 0XF800605C[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_hold = 0x5
- // .. .. ==> 0XF800605C[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U),
- // .. .. reg_ddrc_pageclose = 0x0
- // .. .. ==> 0XF8006060[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_lpr_num_entries = 0x1f
- // .. .. ==> 0XF8006060[6:1] = 0x0000001FU
- // .. .. ==> MASK : 0x0000007EU VAL : 0x0000003EU
- // .. .. reg_ddrc_auto_pre_en = 0x0
- // .. .. ==> 0XF8006060[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_ddrc_refresh_update_level = 0x0
- // .. .. ==> 0XF8006060[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_wc = 0x0
- // .. .. ==> 0XF8006060[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_collision_page_opt = 0x0
- // .. .. ==> 0XF8006060[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_ddrc_selfref_en = 0x0
- // .. .. ==> 0XF8006060[12:12] = 0x00000000U
- // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU),
- // .. .. reg_ddrc_go2critical_hysteresis = 0x0
- // .. .. ==> 0XF8006064[12:5] = 0x00000000U
- // .. .. ==> MASK : 0x00001FE0U VAL : 0x00000000U
- // .. .. reg_arb_go2critical_en = 0x1
- // .. .. ==> 0XF8006064[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. ..
- EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U),
- // .. .. reg_ddrc_wrlvl_ww = 0x41
- // .. .. ==> 0XF8006068[7:0] = 0x00000041U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000041U
- // .. .. reg_ddrc_rdlvl_rr = 0x41
- // .. .. ==> 0XF8006068[15:8] = 0x00000041U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00004100U
- // .. .. reg_ddrc_dfi_t_wlmrd = 0x28
- // .. .. ==> 0XF8006068[25:16] = 0x00000028U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U
- // .. ..
- EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U),
- // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10
- // .. .. ==> 0XF800606C[7:0] = 0x00000010U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000010U
- // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16
- // .. .. ==> 0XF800606C[15:8] = 0x00000016U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U
- // .. ..
- EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U),
- // .. .. reg_ddrc_dfi_t_ctrl_delay = 0x1
- // .. .. ==> 0XF8006078[3:0] = 0x00000001U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000001U
- // .. .. reg_ddrc_dfi_t_dram_clk_disable = 0x1
- // .. .. ==> 0XF8006078[7:4] = 0x00000001U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000010U
- // .. .. reg_ddrc_dfi_t_dram_clk_enable = 0x1
- // .. .. ==> 0XF8006078[11:8] = 0x00000001U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000100U
- // .. .. reg_ddrc_t_cksre = 0x5
- // .. .. ==> 0XF8006078[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_t_cksrx = 0x5
- // .. .. ==> 0XF8006078[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_t_ckesr = 0x4
- // .. .. ==> 0XF8006078[25:20] = 0x00000004U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U
- // .. ..
- EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU ,0x00455111U),
- // .. .. reg_ddrc_t_ckpde = 0x2
- // .. .. ==> 0XF800607C[3:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000002U
- // .. .. reg_ddrc_t_ckpdx = 0x2
- // .. .. ==> 0XF800607C[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. reg_ddrc_t_ckdpde = 0x2
- // .. .. ==> 0XF800607C[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_ckdpdx = 0x2
- // .. .. ==> 0XF800607C[15:12] = 0x00000002U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00002000U
- // .. .. reg_ddrc_t_ckcsx = 0x3
- // .. .. ==> 0XF800607C[19:16] = 0x00000003U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00030000U
- // .. ..
- EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU ,0x00032222U),
- // .. .. reg_ddrc_dis_auto_zq = 0x0
- // .. .. ==> 0XF80060A4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_ddr3 = 0x1
- // .. .. ==> 0XF80060A4[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reg_ddrc_t_mod = 0x200
- // .. .. ==> 0XF80060A4[11:2] = 0x00000200U
- // .. .. ==> MASK : 0x00000FFCU VAL : 0x00000800U
- // .. .. reg_ddrc_t_zq_long_nop = 0x200
- // .. .. ==> 0XF80060A4[21:12] = 0x00000200U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00200000U
- // .. .. reg_ddrc_t_zq_short_nop = 0x40
- // .. .. ==> 0XF80060A4[31:22] = 0x00000040U
- // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U),
- // .. .. t_zq_short_interval_x1024 = 0xbebc
- // .. .. ==> 0XF80060A8[19:0] = 0x0000BEBCU
- // .. .. ==> MASK : 0x000FFFFFU VAL : 0x0000BEBCU
- // .. .. dram_rstn_x1024 = 0x62
- // .. .. ==> 0XF80060A8[27:20] = 0x00000062U
- // .. .. ==> MASK : 0x0FF00000U VAL : 0x06200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0620BEBCU),
- // .. .. deeppowerdown_en = 0x0
- // .. .. ==> 0XF80060AC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. deeppowerdown_to_x1024 = 0xf5
- // .. .. ==> 0XF80060AC[8:1] = 0x000000F5U
- // .. .. ==> MASK : 0x000001FEU VAL : 0x000001EAU
- // .. ..
- EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001EAU),
- // .. .. dfi_wrlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000FFFU
- // .. .. dfi_rdlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[23:12] = 0x00000FFFU
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00FFF000U
- // .. .. ddrc_reg_twrlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. ddrc_reg_trdlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_dfi_wr_level_en = 0x1
- // .. .. ==> 0XF80060B0[26:26] = 0x00000001U
- // .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. reg_ddrc_dfi_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF80060B0[27:27] = 0x00000001U
- // .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1
- // .. .. ==> 0XF80060B0[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU),
- // .. .. reg_ddrc_skip_ocd = 0x1
- // .. .. ==> 0XF80060B4[9:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. ..
- EMIT_MASKWRITE(0XF80060B4, 0x00000200U ,0x00000200U),
- // .. .. reg_ddrc_dfi_t_rddata_en = 0x6
- // .. .. ==> 0XF80060B8[4:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000006U
- // .. .. reg_ddrc_dfi_t_ctrlup_min = 0x3
- // .. .. ==> 0XF80060B8[14:5] = 0x00000003U
- // .. .. ==> MASK : 0x00007FE0U VAL : 0x00000060U
- // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40
- // .. .. ==> 0XF80060B8[24:15] = 0x00000040U
- // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U),
- // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. Clear_Correctable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U),
- // .. .. CORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060C8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ECC_CORRECTED_BIT_NUM = 0x0
- // .. .. ==> 0XF80060C8[7:1] = 0x00000000U
- // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U),
- // .. .. UNCORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060DC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U),
- // .. .. STAT_NUM_CORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[15:8] = 0x00000000U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000000U
- // .. .. STAT_NUM_UNCORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[7:0] = 0x00000000U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U),
- // .. .. reg_ddrc_ecc_mode = 0x0
- // .. .. ==> 0XF80060F4[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_scrub = 0x1
- // .. .. ==> 0XF80060F4[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. ..
- EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U),
- // .. .. reg_phy_dif_on = 0x0
- // .. .. ==> 0XF8006114[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_dif_off = 0x0
- // .. .. ==> 0XF8006114[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF8006118[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006118[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006118[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006118[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006118, 0x7FFFFFCFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF800611C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF800611C[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF800611C[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF800611C[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF800611C, 0x7FFFFFCFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006120, 0x7FFFFFCFU ,0x40000000U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006124[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006124[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006124[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006124[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006124, 0x7FFFFFCFU ,0x40000000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF800612C[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF800612C[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006130[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006130[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006134[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006134[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006138[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006138[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006140[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006140[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006140[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006144[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006144[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006144[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006148[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006148[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006148[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF800614C[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF800614C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800614C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006154[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006154[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006154[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006158[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006158[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006158[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF800615C[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF800615C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800615C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006160[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006160[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006160[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006168[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006168[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006168[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF800616C[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF800616C[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF800616C[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006170[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006170[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006170[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006174[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006174[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006174[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF800617C[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF800617C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF800617C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006180[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006180[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006180[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006184[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006184[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006184[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006188[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006188[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006188[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_bl2 = 0x0
- // .. .. ==> 0XF8006190[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_at_spd_atpg = 0x0
- // .. .. ==> 0XF8006190[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_bist_enable = 0x0
- // .. .. ==> 0XF8006190[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_force_err = 0x0
- // .. .. ==> 0XF8006190[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_bist_mode = 0x0
- // .. .. ==> 0XF8006190[6:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. .. reg_phy_invert_clkout = 0x1
- // .. .. ==> 0XF8006190[7:7] = 0x00000001U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. .. reg_phy_sel_logic = 0x0
- // .. .. ==> 0XF8006190[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_ratio = 0x100
- // .. .. ==> 0XF8006190[19:10] = 0x00000100U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00040000U
- // .. .. reg_phy_ctrl_slave_force = 0x0
- // .. .. ==> 0XF8006190[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006190[27:21] = 0x00000000U
- // .. .. ==> MASK : 0x0FE00000U VAL : 0x00000000U
- // .. .. reg_phy_lpddr = 0x0
- // .. .. ==> 0XF8006190[29:29] = 0x00000000U
- // .. .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // .. .. reg_phy_cmd_latency = 0x0
- // .. .. ==> 0XF8006190[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006190, 0x6FFFFEFEU ,0x00040080U),
- // .. .. reg_phy_wr_rl_delay = 0x2
- // .. .. ==> 0XF8006194[4:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000002U
- // .. .. reg_phy_rd_rl_delay = 0x4
- // .. .. ==> 0XF8006194[9:5] = 0x00000004U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x00000080U
- // .. .. reg_phy_dll_lock_diff = 0xf
- // .. .. ==> 0XF8006194[13:10] = 0x0000000FU
- // .. .. ==> MASK : 0x00003C00U VAL : 0x00003C00U
- // .. .. reg_phy_use_wr_level = 0x1
- // .. .. ==> 0XF8006194[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. reg_phy_use_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF8006194[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. reg_phy_use_rd_data_eye_level = 0x1
- // .. .. ==> 0XF8006194[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_dis_calib_rst = 0x0
- // .. .. ==> 0XF8006194[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006194[19:18] = 0x00000000U
- // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U),
- // .. .. reg_arb_page_addr_mask = 0x0
- // .. .. ==> 0XF8006204[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006208[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006208[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006208[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006208[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006208, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF800620C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF800620C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF800620C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF800620C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800620C, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006210[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006210[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006210[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006210[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006210, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006214[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006214[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006214[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006214[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006214, 0x000703FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006218[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006218[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006218[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006218[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006218[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF800621C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF800621C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF800621C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF800621C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF800621C[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006220[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006220[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006220[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006220[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006220[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006224[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006224[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006224[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006224[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006224[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_ddrc_lpddr2 = 0x0
- // .. .. ==> 0XF80062A8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_derate_enable = 0x0
- // .. .. ==> 0XF80062A8[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_ddrc_mr4_margin = 0x0
- // .. .. ==> 0XF80062A8[11:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062A8, 0x00000FF5U ,0x00000000U),
- // .. .. reg_ddrc_mr4_read_interval = 0x0
- // .. .. ==> 0XF80062AC[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_ddrc_min_stable_clock_x1 = 0x5
- // .. .. ==> 0XF80062B0[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_idle_after_reset_x32 = 0x11
- // .. .. ==> 0XF80062B0[11:4] = 0x00000011U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000110U
- // .. .. reg_ddrc_t_mrw = 0x5
- // .. .. ==> 0XF80062B0[21:12] = 0x00000005U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005115U),
- // .. .. reg_ddrc_max_auto_init_x1024 = 0x9e
- // .. .. ==> 0XF80062B4[7:0] = 0x0000009EU
- // .. .. ==> MASK : 0x000000FFU VAL : 0x0000009EU
- // .. .. reg_ddrc_dev_zqinit_x32 = 0x11
- // .. .. ==> 0XF80062B4[17:8] = 0x00000011U
- // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001100U
- // .. ..
- EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x0000119EU),
- // .. .. START: POLL ON DCI STATUS
- // .. .. DONE = 1
- // .. .. ==> 0XF8000B74[13:13] = 0x00000001U
- // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U
- // .. ..
- EMIT_MASKPOLL(0XF8000B74, 0x00002000U),
- // .. .. FINISH: POLL ON DCI STATUS
- // .. .. START: UNLOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0x1
- // .. .. ==> 0XF8006000[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000085U),
- // .. .. FINISH: UNLOCK DDR
- // .. .. START: CHECK DDR STATUS
- // .. .. ddrc_reg_operating_mode = 1
- // .. .. ==> 0XF8006054[2:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U
- // .. ..
- EMIT_MASKPOLL(0XF8006054, 0x00000007U),
- // .. .. FINISH: CHECK DDR STATUS
- // .. FINISH: DDR INITIALIZATION
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_mio_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: OCM REMAPPING
- // .. FINISH: OCM REMAPPING
- // .. START: DDRIOB SETTINGS
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B40[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B40[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B40[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B40[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B40[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B40[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B40[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B44[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B44[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B44[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B44[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B44[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B44[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B44[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B48[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x1
- // .. ==> 0XF8000B48[2:1] = 0x00000001U
- // .. ==> MASK : 0x00000006U VAL : 0x00000002U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B48[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B48[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCI_TYPE = 0x3
- // .. ==> 0XF8000B48[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B48[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B48[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B4C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B4C[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B4C[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B4C[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B4C[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B4C[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B4C[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000800U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B50[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x2
- // .. ==> 0XF8000B50[2:1] = 0x00000002U
- // .. ==> MASK : 0x00000006U VAL : 0x00000004U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B50[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B50[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCI_TYPE = 0x3
- // .. ==> 0XF8000B50[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B50[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B50[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B54[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B54[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B54[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B54[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B54[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B54[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B54[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000800U),
- // .. reserved_INP_POWER = 0x0
- // .. ==> 0XF8000B58[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B58[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE_B = 0x0
- // .. ==> 0XF8000B58[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B58[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCI_TYPE = 0x0
- // .. ==> 0XF8000B58[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B58[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B58[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B5C[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B5C[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x3
- // .. ==> 0XF8000B5C[18:14] = 0x00000003U
- // .. ==> MASK : 0x0007C000U VAL : 0x0000C000U
- // .. reserved_SLEW_N = 0x3
- // .. ==> 0XF8000B5C[23:19] = 0x00000003U
- // .. ==> MASK : 0x00F80000U VAL : 0x00180000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B5C[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B5C[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C068U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B60[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B60[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x6
- // .. ==> 0XF8000B60[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. reserved_SLEW_N = 0x1f
- // .. ==> 0XF8000B60[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B60[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B60[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F98068U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B64[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B64[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x6
- // .. ==> 0XF8000B64[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. reserved_SLEW_N = 0x1f
- // .. ==> 0XF8000B64[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B64[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B64[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F98068U),
- // .. reserved_DRIVE_P = 0x68
- // .. ==> 0XF8000B68[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. reserved_DRIVE_N = 0x0
- // .. ==> 0XF8000B68[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. reserved_SLEW_P = 0x6
- // .. ==> 0XF8000B68[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. reserved_SLEW_N = 0x1f
- // .. ==> 0XF8000B68[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. reserved_GTL = 0x0
- // .. ==> 0XF8000B68[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. reserved_RTERM = 0x0
- // .. ==> 0XF8000B68[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F98068U),
- // .. VREF_INT_EN = 0x0
- // .. ==> 0XF8000B6C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. VREF_SEL = 0x0
- // .. ==> 0XF8000B6C[4:1] = 0x00000000U
- // .. ==> MASK : 0x0000001EU VAL : 0x00000000U
- // .. VREF_EXT_EN = 0x1
- // .. ==> 0XF8000B6C[6:5] = 0x00000001U
- // .. ==> MASK : 0x00000060U VAL : 0x00000020U
- // .. reserved_VREF_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[8:7] = 0x00000000U
- // .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. REFIO_EN = 0x1
- // .. ==> 0XF8000B6C[9:9] = 0x00000001U
- // .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. reserved_REFIO_TEST = 0x0
- // .. ==> 0XF8000B6C[11:10] = 0x00000000U
- // .. ==> MASK : 0x00000C00U VAL : 0x00000000U
- // .. reserved_REFIO_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. reserved_DRST_B_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. reserved_CKE_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[14:14] = 0x00000000U
- // .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B6C, 0x00007FFFU ,0x00000220U),
- // .. .. START: ASSERT RESET
- // .. .. RESET = 1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000001U ,0x00000001U),
- // .. .. FINISH: ASSERT RESET
- // .. .. START: DEASSERT RESET
- // .. .. RESET = 0
- // .. .. ==> 0XF8000B70[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reserved_VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U),
- // .. .. FINISH: DEASSERT RESET
- // .. .. RESET = 0x1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ENABLE = 0x1
- // .. .. ==> 0XF8000B70[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reserved_VRP_TRI = 0x0
- // .. .. ==> 0XF8000B70[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reserved_VRN_TRI = 0x0
- // .. .. ==> 0XF8000B70[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reserved_VRP_OUT = 0x0
- // .. .. ==> 0XF8000B70[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reserved_VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. .. NREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[7:6] = 0x00000000U
- // .. .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. .. NREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[10:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000700U VAL : 0x00000000U
- // .. .. NREF_OPT4 = 0x1
- // .. .. ==> 0XF8000B70[13:11] = 0x00000001U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00000800U
- // .. .. PREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[15:14] = 0x00000000U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. .. PREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[19:17] = 0x00000000U
- // .. .. ==> MASK : 0x000E0000U VAL : 0x00000000U
- // .. .. UPDATE_CONTROL = 0x0
- // .. .. ==> 0XF8000B70[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reserved_INIT_COMPLETE = 0x0
- // .. .. ==> 0XF8000B70[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. reserved_TST_CLK = 0x0
- // .. .. ==> 0XF8000B70[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reserved_TST_HLN = 0x0
- // .. .. ==> 0XF8000B70[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reserved_TST_HLP = 0x0
- // .. .. ==> 0XF8000B70[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. reserved_TST_RST = 0x0
- // .. .. ==> 0XF8000B70[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reserved_INT_DCI_EN = 0x0
- // .. .. ==> 0XF8000B70[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x07FEFFFFU ,0x00000823U),
- // .. FINISH: DDRIOB SETTINGS
- // .. START: MIO PROGRAMMING
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000700[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000700[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000700[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000700[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000700[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000700[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000700[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000700[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000700[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000704[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000704[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000704[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000704[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000704[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000704[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000704[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000704[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000704[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000704, 0x00003FFFU ,0x00001602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000708[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000708[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000708[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000708[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000708[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000708[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000708[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000708[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000708[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800070C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800070C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800070C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800070C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800070C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800070C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800070C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800070C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800070C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000710[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000710[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000710[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000710[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000710[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000710[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000710[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000710[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000710[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000714[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000714[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000714[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000714[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000714[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000714[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000714[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000714[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000714[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000718[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000718[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000718[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000718[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000718[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000718[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000718[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000718[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000718[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800071C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800071C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800071C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800071C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800071C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800071C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800071C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800071C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800071C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000720[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000720[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000720[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000720[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000720[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000720[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000720[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000720[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000720[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000724[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. Speed = 0
- // .. ==> 0XF8000724[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000724[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000724[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000724[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000724, 0x00003F01U ,0x00001601U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000728[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000728[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000728[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000728[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000728[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000728[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000728[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000728[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000728[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800072C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800072C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800072C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800072C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800072C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800072C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800072C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800072C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800072C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000730[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000730[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000730[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000730[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000730[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000730[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000730[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000730[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000730[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000734[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000734[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000734[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000734[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000734[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000734[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000734[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000734[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000734[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000738[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000738[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000738[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000738[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000738[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000738[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000738[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000738[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000738[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800073C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800073C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800073C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800073C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800073C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800073C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800073C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800073C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800073C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800073C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000740[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000740[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000740[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000740[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000740[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000740[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000740[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000740[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000740[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000740, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000744[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000744[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000744[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000744[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000744[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000744[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000744[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000744[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000744[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000744, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000748[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000748[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000748[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000748[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000748[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000748[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000748[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000748[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000748[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000748, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800074C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800074C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800074C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800074C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800074C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800074C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800074C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800074C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800074C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800074C, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000750[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000750[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000750[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000750[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000750[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000750[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000750[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000750[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000750[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000750, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000754[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000754[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000754[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000754[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000754[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000754[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000754[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000754[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000754[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000754, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000758[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000758[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000758[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000758[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000758[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000758[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000758[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000758[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000758[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000758, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800075C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800075C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800075C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800075C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800075C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800075C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800075C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800075C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800075C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800075C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000760[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000760[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000760[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000760[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000760[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000760[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000760[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000760[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000760[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000764[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000764[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000764[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000764[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000764[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000764[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000764[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000764[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000764[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000768[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000768[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000768[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000768[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000768[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000768[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000768[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000768[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000768[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800076C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800076C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800076C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800076C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800076C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800076C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800076C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800076C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800076C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000770[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000770[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000770[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000770[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000770[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000770[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000770[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000770[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000770[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000774[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000774[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000774[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000774[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000774[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000774[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000774[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000774[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000774[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000778[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000778[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000778[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000778[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000778[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000778[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000778[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000778[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000778[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800077C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF800077C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800077C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800077C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800077C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800077C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800077C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800077C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800077C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000780[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000780[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000780[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000780[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000780[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000780[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000780[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000780[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000780[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000784[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000784[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000784[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000784[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000784[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000784[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000784[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000784[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000784[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000788[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000788[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000788[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000788[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000788[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000788[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000788[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000788[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000788[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800078C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800078C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800078C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800078C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800078C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800078C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800078C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800078C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800078C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000790[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000790[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000790[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000790[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000790[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000790[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000790[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000790[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000790[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000794[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000794[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000794[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000794[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000794[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000794[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000794[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000794[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000794[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000798[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000798[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000798[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000798[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000798[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000798[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000798[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000798[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000798[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800079C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800079C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800079C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800079C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800079C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800079C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800079C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800079C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800079C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A0[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A8[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007AC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007AC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007AC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007AC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007AC[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007AC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007AC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007AC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007AC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007B0[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007B0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007B4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007B4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007B8[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007B8[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007B8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007BC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007BC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007BC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007BC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007BC[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007BC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007BC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007BC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007BC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C0[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007C4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C4[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007C8[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007C8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007CC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007CC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007CC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007CC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007CC[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007CC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007CC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007CC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007CC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007D0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D0[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00001420U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007D4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D4[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00001421U),
- // .. SDIO1_WP_SEL = 57
- // .. ==> 0XF8000834[5:0] = 0x00000039U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000039U
- // .. SDIO1_CD_SEL = 9
- // .. ==> 0XF8000834[21:16] = 0x00000009U
- // .. ==> MASK : 0x003F0000U VAL : 0x00090000U
- // ..
- EMIT_MASKWRITE(0XF8000834, 0x003F003FU ,0x00090039U),
- // .. FINISH: MIO PROGRAMMING
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_peripherals_init_data_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000000U),
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000000U),
- // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // .. START: SRAM/NOR SET OPMODE
- // .. FINISH: SRAM/NOR SET OPMODE
- // .. START: UART REGISTERS
- // .. BDIV = 0x6
- // .. ==> 0XE0001034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0001018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0001000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0001000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0001000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0001000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0001000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0001000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0001000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0001000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0001000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U),
- // .. CHMODE = 0x0
- // .. ==> 0XE0001004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0001004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0001004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0001004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0001004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0001004, 0x000003FFU ,0x00000020U),
- // .. BDIV = 0x6
- // .. ==> 0XE0000034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0000034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0000018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0000018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0000000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0000000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0000000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0000000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0000000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0000000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0000000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0000000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0000000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0000000, 0x000001FFU ,0x00000017U),
- // .. CHMODE = 0x0
- // .. ==> 0XE0000004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0000004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0000004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0000004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0000004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0000004, 0x000003FFU ,0x00000020U),
- // .. FINISH: UART REGISTERS
- // .. START: QSPI REGISTERS
- // .. Holdb_dr = 1
- // .. ==> 0XE000D000[19:19] = 0x00000001U
- // .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // ..
- EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U),
- // .. FINISH: QSPI REGISTERS
- // .. START: PL POWER ON RESET REGISTERS
- // .. PCFG_POR_CNT_4K = 0
- // .. ==> 0XF8007000[29:29] = 0x00000000U
- // .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U),
- // .. FINISH: PL POWER ON RESET REGISTERS
- // .. START: SMC TIMING CALCULATION REGISTER UPDATE
- // .. .. START: NAND SET CYCLE
- // .. .. FINISH: NAND SET CYCLE
- // .. .. START: OPMODE
- // .. .. FINISH: OPMODE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: SRAM/NOR CS0 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS0 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS0 BASE ADDRESS
- // .. .. FINISH: NOR CS0 BASE ADDRESS
- // .. .. START: SRAM/NOR CS1 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS1 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS1 BASE ADDRESS
- // .. .. FINISH: NOR CS1 BASE ADDRESS
- // .. .. START: USB RESET
- // .. .. FINISH: USB RESET
- // .. .. START: ENET RESET
- // .. .. FINISH: ENET RESET
- // .. .. START: I2C RESET
- // .. .. FINISH: I2C RESET
- // .. .. START: NOR CHIP SELECT
- // .. .. .. START: DIR MODE BANK 0
- // .. .. .. FINISH: DIR MODE BANK 0
- // .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. FINISH: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. START: OUTPUT ENABLE BANK 0
- // .. .. .. FINISH: OUTPUT ENABLE BANK 0
- // .. .. FINISH: NOR CHIP SELECT
- // .. FINISH: SMC TIMING CALCULATION REGISTER UPDATE
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_post_config_3_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: ENABLING LEVEL SHIFTER
- // .. USER_LVL_INP_EN_0 = 1
- // .. ==> 0XF8000900[3:3] = 0x00000001U
- // .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. USER_LVL_OUT_EN_0 = 1
- // .. ==> 0XF8000900[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. USER_LVL_INP_EN_1 = 1
- // .. ==> 0XF8000900[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. USER_LVL_OUT_EN_1 = 1
- // .. ==> 0XF8000900[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU),
- // .. FINISH: ENABLING LEVEL SHIFTER
- // .. START: FPGA RESETS TO 0
- // .. reserved_3 = 0
- // .. ==> 0XF8000240[31:25] = 0x00000000U
- // .. ==> MASK : 0xFE000000U VAL : 0x00000000U
- // .. reserved_FPGA_ACP_RST = 0
- // .. ==> 0XF8000240[24:24] = 0x00000000U
- // .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS3_RST = 0
- // .. ==> 0XF8000240[23:23] = 0x00000000U
- // .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS2_RST = 0
- // .. ==> 0XF8000240[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS1_RST = 0
- // .. ==> 0XF8000240[21:21] = 0x00000000U
- // .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. reserved_FPGA_AXDS0_RST = 0
- // .. ==> 0XF8000240[20:20] = 0x00000000U
- // .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. reserved_2 = 0
- // .. ==> 0XF8000240[19:18] = 0x00000000U
- // .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. reserved_FSSW1_FPGA_RST = 0
- // .. ==> 0XF8000240[17:17] = 0x00000000U
- // .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. reserved_FSSW0_FPGA_RST = 0
- // .. ==> 0XF8000240[16:16] = 0x00000000U
- // .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. reserved_1 = 0
- // .. ==> 0XF8000240[15:14] = 0x00000000U
- // .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. reserved_FPGA_FMSW1_RST = 0
- // .. ==> 0XF8000240[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. reserved_FPGA_FMSW0_RST = 0
- // .. ==> 0XF8000240[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. reserved_FPGA_DMA3_RST = 0
- // .. ==> 0XF8000240[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. reserved_FPGA_DMA2_RST = 0
- // .. ==> 0XF8000240[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. reserved_FPGA_DMA1_RST = 0
- // .. ==> 0XF8000240[9:9] = 0x00000000U
- // .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. reserved_FPGA_DMA0_RST = 0
- // .. ==> 0XF8000240[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. reserved = 0
- // .. ==> 0XF8000240[7:4] = 0x00000000U
- // .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. FPGA3_OUT_RST = 0
- // .. ==> 0XF8000240[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. FPGA2_OUT_RST = 0
- // .. ==> 0XF8000240[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. FPGA1_OUT_RST = 0
- // .. ==> 0XF8000240[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. FPGA0_OUT_RST = 0
- // .. ==> 0XF8000240[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U),
- // .. FINISH: FPGA RESETS TO 0
- // .. START: AFI REGISTERS
- // .. .. START: AFI0 REGISTERS
- // .. .. FINISH: AFI0 REGISTERS
- // .. .. START: AFI1 REGISTERS
- // .. .. FINISH: AFI1 REGISTERS
- // .. .. START: AFI2 REGISTERS
- // .. .. FINISH: AFI2 REGISTERS
- // .. .. START: AFI3 REGISTERS
- // .. .. FINISH: AFI3 REGISTERS
- // .. .. START: AFI2 SECURE REGISTER
- // .. .. FINISH: AFI2 SECURE REGISTER
- // .. FINISH: AFI REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_debug_3_0[] = {
- // START: top
- // .. START: CROSS TRIGGER CONFIGURATIONS
- // .. .. START: UNLOCKING CTI REGISTERS
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
- // .. .. FINISH: UNLOCKING CTI REGISTERS
- // .. .. START: ENABLING CTI MODULES AND CHANNELS
- // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
- // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. FINISH: CROSS TRIGGER CONFIGURATIONS
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_pll_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: PLL SLCR REGISTERS
- // .. .. START: ARM PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000110[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000110[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x145
- // .. .. ==> 0XF8000110[21:12] = 0x00000145U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U
- // .. ..
- EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x001452C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x1e
- // .. .. .. ==> 0XF8000100[18:12] = 0x0000001EU
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x0001E000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. ARM_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000001U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. SRCSEL = 0x0
- // .. .. .. ==> 0XF8000120[5:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. .. DIVISOR = 0x2
- // .. .. .. ==> 0XF8000120[13:8] = 0x00000002U
- // .. .. .. ==> MASK : 0x00003F00U VAL : 0x00000200U
- // .. .. .. CPU_6OR4XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[24:24] = 0x00000001U
- // .. .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. .. .. CPU_3OR2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[25:25] = 0x00000001U
- // .. .. .. ==> MASK : 0x02000000U VAL : 0x02000000U
- // .. .. .. CPU_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[26:26] = 0x00000001U
- // .. .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. .. CPU_1XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[27:27] = 0x00000001U
- // .. .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. .. CPU_PERI_CLKACT = 0x1
- // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U
- // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U),
- // .. .. FINISH: ARM PLL INIT
- // .. .. START: DDR PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000114[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000114[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x1f4
- // .. .. ==> 0XF8000114[21:12] = 0x000001F4U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x001F4000U
- // .. ..
- EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x001F42C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x14
- // .. .. .. ==> 0XF8000104[18:12] = 0x00000014U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00014000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00014000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. DDR_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000002U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. DDR_3XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. .. DDR_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. .. DDR_3XCLK_DIVISOR = 0x2
- // .. .. .. ==> 0XF8000124[25:20] = 0x00000002U
- // .. .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. .. .. DDR_2XCLK_DIVISOR = 0x3
- // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U
- // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U),
- // .. .. FINISH: DDR PLL INIT
- // .. .. START: IO PLL INIT
- // .. .. PLL_RES = 0x2
- // .. .. ==> 0XF8000118[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000118[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x113
- // .. .. ==> 0XF8000118[21:12] = 0x00000113U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00113000U
- // .. ..
- EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x00113220U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x23
- // .. .. .. ==> 0XF8000108[18:12] = 0x00000023U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00023000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x00023000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. IO_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000004U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. FINISH: IO PLL INIT
- // .. FINISH: PLL SLCR REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_clock_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: CLOCK CONTROL SLCR REGISTERS
- // .. CLKACT = 0x1
- // .. ==> 0XF8000128[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. DIVISOR0 = 0x31
- // .. ==> 0XF8000128[13:8] = 0x00000031U
- // .. ==> MASK : 0x00003F00U VAL : 0x00003100U
- // .. DIVISOR1 = 0x2
- // .. ==> 0XF8000128[25:20] = 0x00000002U
- // .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // ..
- EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00203101U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000138[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000138[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000138, 0x00000011U ,0x00000001U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000140[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000140[6:4] = 0x00000000U
- // .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. DIVISOR = 0xe
- // .. ==> 0XF8000140[13:8] = 0x0000000EU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000E00U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF8000140[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF8000140, 0x03F03F71U ,0x00100E01U),
- // .. CLKACT = 0x1
- // .. ==> 0XF800014C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800014C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xd
- // .. ==> 0XF800014C[13:8] = 0x0000000DU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000D00U
- // ..
- EMIT_MASKWRITE(0XF800014C, 0x00003F31U ,0x00000D01U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF8000150[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000150[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000150[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000150[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000150, 0x00003F33U ,0x00001202U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000154[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000154[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000154[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000154[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001203U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000158[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000158[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000158[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xb
- // .. ==> 0XF8000158[13:8] = 0x0000000BU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000B00U
- // ..
- EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000B03U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF800015C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF800015C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800015C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR0 = 0x12
- // .. ==> 0XF800015C[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF800015C[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00101202U),
- // .. CAN0_MUX = 0x0
- // .. ==> 0XF8000160[5:0] = 0x00000000U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000000U
- // .. CAN0_REF_SEL = 0x0
- // .. ==> 0XF8000160[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. CAN1_MUX = 0x0
- // .. ==> 0XF8000160[21:16] = 0x00000000U
- // .. ==> MASK : 0x003F0000U VAL : 0x00000000U
- // .. CAN1_REF_SEL = 0x0
- // .. ==> 0XF8000160[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U),
- // .. .. START: TRACE CLOCK
- // .. .. FINISH: TRACE CLOCK
- // .. .. CLKACT = 0x1
- // .. .. ==> 0XF8000168[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000168[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR = 0x9
- // .. .. ==> 0XF8000168[13:8] = 0x00000009U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000900U
- // .. ..
- EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000901U),
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000170[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR0 = 0x7
- // .. .. ==> 0XF8000170[13:8] = 0x00000007U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000700U
- // .. .. DIVISOR1 = 0x2
- // .. .. ==> 0XF8000170[25:20] = 0x00000002U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00200700U),
- // .. .. CLK_621_TRUE = 0x1
- // .. .. ==> 0XF80001C4[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U),
- // .. .. DMA_CPU_2XCLKACT = 0x1
- // .. .. ==> 0XF800012C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. USB0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[2:2] = 0x00000001U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. USB1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. .. GEM0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[6:6] = 0x00000001U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000040U
- // .. .. GEM1_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. SDI0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. SDI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[11:11] = 0x00000001U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // .. .. SPI0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. SPI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. CAN0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. CAN1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. .. I2C0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[18:18] = 0x00000001U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00040000U
- // .. .. I2C1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. .. UART0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[20:20] = 0x00000001U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00100000U
- // .. .. UART1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. GPIO_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[22:22] = 0x00000001U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00400000U
- // .. .. LQSPI_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[23:23] = 0x00000001U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00800000U
- // .. .. SMC_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[24:24] = 0x00000001U
- // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. ..
- EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x01FEC84DU),
- // .. FINISH: CLOCK CONTROL SLCR REGISTERS
- // .. START: THIS SHOULD BE BLANK
- // .. FINISH: THIS SHOULD BE BLANK
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_ddr_init_data_2_0[] = {
- // START: top
- // .. START: DDR INITIALIZATION
- // .. .. START: LOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0
- // .. .. ==> 0XF8006000[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 0x1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000084U),
- // .. .. FINISH: LOCK DDR
- // .. .. reg_ddrc_t_rfc_nom_x32 = 0x79
- // .. .. ==> 0XF8006004[11:0] = 0x00000079U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000079U
- // .. .. reg_ddrc_active_ranks = 0x1
- // .. .. ==> 0XF8006004[13:12] = 0x00000001U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00001000U
- // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0
- // .. .. ==> 0XF8006004[18:14] = 0x00000000U
- // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_block = 0x1
- // .. .. ==> 0XF8006004[20:19] = 0x00000001U
- // .. .. ==> MASK : 0x00180000U VAL : 0x00080000U
- // .. .. reg_ddrc_diff_rank_rd_2cycle_gap = 0x0
- // .. .. ==> 0XF8006004[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_cs_bit1 = 0x0
- // .. .. ==> 0XF8006004[26:22] = 0x00000000U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_open_bank = 0x0
- // .. .. ==> 0XF8006004[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_4bank_ram = 0x0
- // .. .. ==> 0XF8006004[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006004, 0x1FFFFFFFU ,0x00081079U),
- // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf
- // .. .. ==> 0XF8006008[10:0] = 0x0000000FU
- // .. .. ==> MASK : 0x000007FFU VAL : 0x0000000FU
- // .. .. reg_ddrc_hpr_max_starve_x32 = 0xf
- // .. .. ==> 0XF8006008[21:11] = 0x0000000FU
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00007800U
- // .. .. reg_ddrc_hpr_xact_run_length = 0xf
- // .. .. ==> 0XF8006008[25:22] = 0x0000000FU
- // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U
- // .. ..
- EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU),
- // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF800600C[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_lpr_max_starve_x32 = 0x2
- // .. .. ==> 0XF800600C[21:11] = 0x00000002U
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00001000U
- // .. .. reg_ddrc_lpr_xact_run_length = 0x8
- // .. .. ==> 0XF800600C[25:22] = 0x00000008U
- // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U
- // .. ..
- EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U),
- // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF8006010[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_w_xact_run_length = 0x8
- // .. .. ==> 0XF8006010[14:11] = 0x00000008U
- // .. .. ==> MASK : 0x00007800U VAL : 0x00004000U
- // .. .. reg_ddrc_w_max_starve_x32 = 0x2
- // .. .. ==> 0XF8006010[25:15] = 0x00000002U
- // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U
- // .. ..
- EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U),
- // .. .. reg_ddrc_t_rc = 0x19
- // .. .. ==> 0XF8006014[5:0] = 0x00000019U
- // .. .. ==> MASK : 0x0000003FU VAL : 0x00000019U
- // .. .. reg_ddrc_t_rfc_min = 0x50
- // .. .. ==> 0XF8006014[13:6] = 0x00000050U
- // .. .. ==> MASK : 0x00003FC0U VAL : 0x00001400U
- // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10
- // .. .. ==> 0XF8006014[20:14] = 0x00000010U
- // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x00041419U),
- // .. .. reg_ddrc_wr2pre = 0x12
- // .. .. ==> 0XF8006018[4:0] = 0x00000012U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000012U
- // .. .. reg_ddrc_powerdown_to_x32 = 0x6
- // .. .. ==> 0XF8006018[9:5] = 0x00000006U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000C0U
- // .. .. reg_ddrc_t_faw = 0x14
- // .. .. ==> 0XF8006018[15:10] = 0x00000014U
- // .. .. ==> MASK : 0x0000FC00U VAL : 0x00005000U
- // .. .. reg_ddrc_t_ras_max = 0x22
- // .. .. ==> 0XF8006018[21:16] = 0x00000022U
- // .. .. ==> MASK : 0x003F0000U VAL : 0x00220000U
- // .. .. reg_ddrc_t_ras_min = 0x12
- // .. .. ==> 0XF8006018[26:22] = 0x00000012U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x04800000U
- // .. .. reg_ddrc_t_cke = 0x4
- // .. .. ==> 0XF8006018[31:28] = 0x00000004U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44A250D2U),
- // .. .. reg_ddrc_write_latency = 0x5
- // .. .. ==> 0XF800601C[4:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000005U
- // .. .. reg_ddrc_rd2wr = 0x7
- // .. .. ==> 0XF800601C[9:5] = 0x00000007U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000E0U
- // .. .. reg_ddrc_wr2rd = 0xe
- // .. .. ==> 0XF800601C[14:10] = 0x0000000EU
- // .. .. ==> MASK : 0x00007C00U VAL : 0x00003800U
- // .. .. reg_ddrc_t_xp = 0x4
- // .. .. ==> 0XF800601C[19:15] = 0x00000004U
- // .. .. ==> MASK : 0x000F8000U VAL : 0x00020000U
- // .. .. reg_ddrc_pad_pd = 0x0
- // .. .. ==> 0XF800601C[22:20] = 0x00000000U
- // .. .. ==> MASK : 0x00700000U VAL : 0x00000000U
- // .. .. reg_ddrc_rd2pre = 0x4
- // .. .. ==> 0XF800601C[27:23] = 0x00000004U
- // .. .. ==> MASK : 0x0F800000U VAL : 0x02000000U
- // .. .. reg_ddrc_t_rcd = 0x7
- // .. .. ==> 0XF800601C[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U),
- // .. .. reg_ddrc_t_ccd = 0x4
- // .. .. ==> 0XF8006020[4:2] = 0x00000004U
- // .. .. ==> MASK : 0x0000001CU VAL : 0x00000010U
- // .. .. reg_ddrc_t_rrd = 0x5
- // .. .. ==> 0XF8006020[7:5] = 0x00000005U
- // .. .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. .. reg_ddrc_refresh_margin = 0x2
- // .. .. ==> 0XF8006020[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_rp = 0x7
- // .. .. ==> 0XF8006020[15:12] = 0x00000007U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00007000U
- // .. .. reg_ddrc_refresh_to_x32 = 0x8
- // .. .. ==> 0XF8006020[20:16] = 0x00000008U
- // .. .. ==> MASK : 0x001F0000U VAL : 0x00080000U
- // .. .. reg_ddrc_sdram = 0x1
- // .. .. ==> 0XF8006020[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. reg_ddrc_mobile = 0x0
- // .. .. ==> 0XF8006020[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reg_ddrc_clock_stop_en = 0x0
- // .. .. ==> 0XF8006020[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reg_ddrc_read_latency = 0x7
- // .. .. ==> 0XF8006020[28:24] = 0x00000007U
- // .. .. ==> MASK : 0x1F000000U VAL : 0x07000000U
- // .. .. reg_phy_mode_ddr1_ddr2 = 0x1
- // .. .. ==> 0XF8006020[29:29] = 0x00000001U
- // .. .. ==> MASK : 0x20000000U VAL : 0x20000000U
- // .. .. reg_ddrc_dis_pad_pd = 0x0
- // .. .. ==> 0XF8006020[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_ddrc_loopback = 0x0
- // .. .. ==> 0XF8006020[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006020, 0xFFFFFFFCU ,0x272872B0U),
- // .. .. reg_ddrc_en_2t_timing_mode = 0x0
- // .. .. ==> 0XF8006024[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_prefer_write = 0x0
- // .. .. ==> 0XF8006024[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_max_rank_rd = 0xf
- // .. .. ==> 0XF8006024[5:2] = 0x0000000FU
- // .. .. ==> MASK : 0x0000003CU VAL : 0x0000003CU
- // .. .. reg_ddrc_mr_wr = 0x0
- // .. .. ==> 0XF8006024[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_addr = 0x0
- // .. .. ==> 0XF8006024[8:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_data = 0x0
- // .. .. ==> 0XF8006024[24:9] = 0x00000000U
- // .. .. ==> MASK : 0x01FFFE00U VAL : 0x00000000U
- // .. .. ddrc_reg_mr_wr_busy = 0x0
- // .. .. ==> 0XF8006024[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_type = 0x0
- // .. .. ==> 0XF8006024[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_rdata_valid = 0x0
- // .. .. ==> 0XF8006024[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006024, 0x0FFFFFFFU ,0x0000003CU),
- // .. .. reg_ddrc_final_wait_x32 = 0x7
- // .. .. ==> 0XF8006028[6:0] = 0x00000007U
- // .. .. ==> MASK : 0x0000007FU VAL : 0x00000007U
- // .. .. reg_ddrc_pre_ocd_x32 = 0x0
- // .. .. ==> 0XF8006028[10:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000780U VAL : 0x00000000U
- // .. .. reg_ddrc_t_mrd = 0x4
- // .. .. ==> 0XF8006028[13:11] = 0x00000004U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U
- // .. ..
- EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U),
- // .. .. reg_ddrc_emr2 = 0x8
- // .. .. ==> 0XF800602C[15:0] = 0x00000008U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000008U
- // .. .. reg_ddrc_emr3 = 0x0
- // .. .. ==> 0XF800602C[31:16] = 0x00000000U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U),
- // .. .. reg_ddrc_mr = 0x930
- // .. .. ==> 0XF8006030[15:0] = 0x00000930U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000930U
- // .. .. reg_ddrc_emr = 0x4
- // .. .. ==> 0XF8006030[31:16] = 0x00000004U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U),
- // .. .. reg_ddrc_burst_rdwr = 0x4
- // .. .. ==> 0XF8006034[3:0] = 0x00000004U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000004U
- // .. .. reg_ddrc_pre_cke_x1024 = 0x156
- // .. .. ==> 0XF8006034[13:4] = 0x00000156U
- // .. .. ==> MASK : 0x00003FF0U VAL : 0x00001560U
- // .. .. reg_ddrc_post_cke_x1024 = 0x1
- // .. .. ==> 0XF8006034[25:16] = 0x00000001U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00010000U
- // .. .. reg_ddrc_burstchop = 0x0
- // .. .. ==> 0XF8006034[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x00011564U),
- // .. .. reg_ddrc_force_low_pri_n = 0x0
- // .. .. ==> 0XF8006038[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_dq = 0x0
- // .. .. ==> 0XF8006038[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_debug_mode = 0x0
- // .. .. ==> 0XF8006038[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_phy_wr_level_start = 0x0
- // .. .. ==> 0XF8006038[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_phy_rd_level_start = 0x0
- // .. .. ==> 0XF8006038[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_dq0_wait_t = 0x0
- // .. .. ==> 0XF8006038[12:9] = 0x00000000U
- // .. .. ==> MASK : 0x00001E00U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006038, 0x00001FC3U ,0x00000000U),
- // .. .. reg_ddrc_addrmap_bank_b0 = 0x6
- // .. .. ==> 0XF800603C[3:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000006U
- // .. .. reg_ddrc_addrmap_bank_b1 = 0x6
- // .. .. ==> 0XF800603C[7:4] = 0x00000006U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000060U
- // .. .. reg_ddrc_addrmap_bank_b2 = 0x6
- // .. .. ==> 0XF800603C[11:8] = 0x00000006U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000600U
- // .. .. reg_ddrc_addrmap_col_b5 = 0x0
- // .. .. ==> 0XF800603C[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b6 = 0x0
- // .. .. ==> 0XF800603C[19:16] = 0x00000000U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000666U),
- // .. .. reg_ddrc_addrmap_col_b2 = 0x0
- // .. .. ==> 0XF8006040[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b3 = 0x0
- // .. .. ==> 0XF8006040[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b4 = 0x0
- // .. .. ==> 0XF8006040[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b7 = 0x0
- // .. .. ==> 0XF8006040[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b8 = 0xf
- // .. .. ==> 0XF8006040[19:16] = 0x0000000FU
- // .. .. ==> MASK : 0x000F0000U VAL : 0x000F0000U
- // .. .. reg_ddrc_addrmap_col_b9 = 0xf
- // .. .. ==> 0XF8006040[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_col_b10 = 0xf
- // .. .. ==> 0XF8006040[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. .. reg_ddrc_addrmap_col_b11 = 0xf
- // .. .. ==> 0XF8006040[31:28] = 0x0000000FU
- // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFFF0000U),
- // .. .. reg_ddrc_addrmap_row_b0 = 0x5
- // .. .. ==> 0XF8006044[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_addrmap_row_b1 = 0x5
- // .. .. ==> 0XF8006044[7:4] = 0x00000005U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000050U
- // .. .. reg_ddrc_addrmap_row_b2_11 = 0x5
- // .. .. ==> 0XF8006044[11:8] = 0x00000005U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000500U
- // .. .. reg_ddrc_addrmap_row_b12 = 0x5
- // .. .. ==> 0XF8006044[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_addrmap_row_b13 = 0x5
- // .. .. ==> 0XF8006044[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_addrmap_row_b14 = 0xf
- // .. .. ==> 0XF8006044[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_row_b15 = 0xf
- // .. .. ==> 0XF8006044[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0FF55555U),
- // .. .. reg_ddrc_rank0_rd_odt = 0x0
- // .. .. ==> 0XF8006048[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_rank0_wr_odt = 0x1
- // .. .. ==> 0XF8006048[5:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000038U VAL : 0x00000008U
- // .. .. reg_ddrc_rank1_rd_odt = 0x1
- // .. .. ==> 0XF8006048[8:6] = 0x00000001U
- // .. .. ==> MASK : 0x000001C0U VAL : 0x00000040U
- // .. .. reg_ddrc_rank1_wr_odt = 0x1
- // .. .. ==> 0XF8006048[11:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000E00U VAL : 0x00000200U
- // .. .. reg_phy_rd_local_odt = 0x0
- // .. .. ==> 0XF8006048[13:12] = 0x00000000U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00000000U
- // .. .. reg_phy_wr_local_odt = 0x3
- // .. .. ==> 0XF8006048[15:14] = 0x00000003U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x0000C000U
- // .. .. reg_phy_idle_local_odt = 0x3
- // .. .. ==> 0XF8006048[17:16] = 0x00000003U
- // .. .. ==> MASK : 0x00030000U VAL : 0x00030000U
- // .. .. reg_ddrc_rank2_rd_odt = 0x0
- // .. .. ==> 0XF8006048[20:18] = 0x00000000U
- // .. .. ==> MASK : 0x001C0000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank2_wr_odt = 0x0
- // .. .. ==> 0XF8006048[23:21] = 0x00000000U
- // .. .. ==> MASK : 0x00E00000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_rd_odt = 0x0
- // .. .. ==> 0XF8006048[26:24] = 0x00000000U
- // .. .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_wr_odt = 0x0
- // .. .. ==> 0XF8006048[29:27] = 0x00000000U
- // .. .. ==> MASK : 0x38000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006048, 0x3FFFFFFFU ,0x0003C248U),
- // .. .. reg_phy_rd_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_wr_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_phy_rdc_we_to_re_delay = 0x8
- // .. .. ==> 0XF8006050[11:8] = 0x00000008U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000800U
- // .. .. reg_phy_rdc_fifo_rst_disable = 0x0
- // .. .. ==> 0XF8006050[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_phy_use_fixed_re = 0x1
- // .. .. ==> 0XF8006050[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_rdc_fifo_rst_err_cnt_clr = 0x0
- // .. .. ==> 0XF8006050[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_dis_phy_ctrl_rstn = 0x0
- // .. .. ==> 0XF8006050[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_phy_clk_stall_level = 0x0
- // .. .. ==> 0XF8006050[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[27:24] = 0x00000007U
- // .. .. ==> MASK : 0x0F000000U VAL : 0x07000000U
- // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U),
- // .. .. reg_ddrc_dll_calib_to_min_x1024 = 0x1
- // .. .. ==> 0XF8006058[7:0] = 0x00000001U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000001U
- // .. .. reg_ddrc_dll_calib_to_max_x1024 = 0x1
- // .. .. ==> 0XF8006058[15:8] = 0x00000001U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000100U
- // .. .. reg_ddrc_dis_dll_calib = 0x0
- // .. .. ==> 0XF8006058[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006058, 0x0001FFFFU ,0x00000101U),
- // .. .. reg_ddrc_rd_odt_delay = 0x3
- // .. .. ==> 0XF800605C[3:0] = 0x00000003U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000003U
- // .. .. reg_ddrc_wr_odt_delay = 0x0
- // .. .. ==> 0XF800605C[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_rd_odt_hold = 0x0
- // .. .. ==> 0XF800605C[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_hold = 0x5
- // .. .. ==> 0XF800605C[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U),
- // .. .. reg_ddrc_pageclose = 0x0
- // .. .. ==> 0XF8006060[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_lpr_num_entries = 0x1f
- // .. .. ==> 0XF8006060[6:1] = 0x0000001FU
- // .. .. ==> MASK : 0x0000007EU VAL : 0x0000003EU
- // .. .. reg_ddrc_auto_pre_en = 0x0
- // .. .. ==> 0XF8006060[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_ddrc_refresh_update_level = 0x0
- // .. .. ==> 0XF8006060[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_wc = 0x0
- // .. .. ==> 0XF8006060[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_collision_page_opt = 0x0
- // .. .. ==> 0XF8006060[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_ddrc_selfref_en = 0x0
- // .. .. ==> 0XF8006060[12:12] = 0x00000000U
- // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU),
- // .. .. reg_ddrc_go2critical_hysteresis = 0x0
- // .. .. ==> 0XF8006064[12:5] = 0x00000000U
- // .. .. ==> MASK : 0x00001FE0U VAL : 0x00000000U
- // .. .. reg_arb_go2critical_en = 0x1
- // .. .. ==> 0XF8006064[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. ..
- EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U),
- // .. .. reg_ddrc_wrlvl_ww = 0x41
- // .. .. ==> 0XF8006068[7:0] = 0x00000041U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000041U
- // .. .. reg_ddrc_rdlvl_rr = 0x41
- // .. .. ==> 0XF8006068[15:8] = 0x00000041U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00004100U
- // .. .. reg_ddrc_dfi_t_wlmrd = 0x28
- // .. .. ==> 0XF8006068[25:16] = 0x00000028U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U
- // .. ..
- EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U),
- // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10
- // .. .. ==> 0XF800606C[7:0] = 0x00000010U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000010U
- // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16
- // .. .. ==> 0XF800606C[15:8] = 0x00000016U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U
- // .. ..
- EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U),
- // .. .. reg_ddrc_dfi_t_ctrl_delay = 0x1
- // .. .. ==> 0XF8006078[3:0] = 0x00000001U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000001U
- // .. .. reg_ddrc_dfi_t_dram_clk_disable = 0x1
- // .. .. ==> 0XF8006078[7:4] = 0x00000001U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000010U
- // .. .. reg_ddrc_dfi_t_dram_clk_enable = 0x1
- // .. .. ==> 0XF8006078[11:8] = 0x00000001U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000100U
- // .. .. reg_ddrc_t_cksre = 0x5
- // .. .. ==> 0XF8006078[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_t_cksrx = 0x5
- // .. .. ==> 0XF8006078[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_t_ckesr = 0x4
- // .. .. ==> 0XF8006078[25:20] = 0x00000004U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00400000U
- // .. ..
- EMIT_MASKWRITE(0XF8006078, 0x03FFFFFFU ,0x00455111U),
- // .. .. reg_ddrc_t_ckpde = 0x2
- // .. .. ==> 0XF800607C[3:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000002U
- // .. .. reg_ddrc_t_ckpdx = 0x2
- // .. .. ==> 0XF800607C[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. reg_ddrc_t_ckdpde = 0x2
- // .. .. ==> 0XF800607C[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_ckdpdx = 0x2
- // .. .. ==> 0XF800607C[15:12] = 0x00000002U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00002000U
- // .. .. reg_ddrc_t_ckcsx = 0x3
- // .. .. ==> 0XF800607C[19:16] = 0x00000003U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00030000U
- // .. ..
- EMIT_MASKWRITE(0XF800607C, 0x000FFFFFU ,0x00032222U),
- // .. .. refresh_timer0_start_value_x32 = 0x0
- // .. .. ==> 0XF80060A0[11:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000000U
- // .. .. refresh_timer1_start_value_x32 = 0x8
- // .. .. ==> 0XF80060A0[23:12] = 0x00000008U
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00008000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A0, 0x00FFFFFFU ,0x00008000U),
- // .. .. reg_ddrc_dis_auto_zq = 0x0
- // .. .. ==> 0XF80060A4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_ddr3 = 0x1
- // .. .. ==> 0XF80060A4[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reg_ddrc_t_mod = 0x200
- // .. .. ==> 0XF80060A4[11:2] = 0x00000200U
- // .. .. ==> MASK : 0x00000FFCU VAL : 0x00000800U
- // .. .. reg_ddrc_t_zq_long_nop = 0x200
- // .. .. ==> 0XF80060A4[21:12] = 0x00000200U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00200000U
- // .. .. reg_ddrc_t_zq_short_nop = 0x40
- // .. .. ==> 0XF80060A4[31:22] = 0x00000040U
- // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U),
- // .. .. t_zq_short_interval_x1024 = 0xbebc
- // .. .. ==> 0XF80060A8[19:0] = 0x0000BEBCU
- // .. .. ==> MASK : 0x000FFFFFU VAL : 0x0000BEBCU
- // .. .. dram_rstn_x1024 = 0x62
- // .. .. ==> 0XF80060A8[27:20] = 0x00000062U
- // .. .. ==> MASK : 0x0FF00000U VAL : 0x06200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0620BEBCU),
- // .. .. deeppowerdown_en = 0x0
- // .. .. ==> 0XF80060AC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. deeppowerdown_to_x1024 = 0xf5
- // .. .. ==> 0XF80060AC[8:1] = 0x000000F5U
- // .. .. ==> MASK : 0x000001FEU VAL : 0x000001EAU
- // .. ..
- EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001EAU),
- // .. .. dfi_wrlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000FFFU
- // .. .. dfi_rdlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[23:12] = 0x00000FFFU
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00FFF000U
- // .. .. ddrc_reg_twrlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. ddrc_reg_trdlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_dfi_wr_level_en = 0x1
- // .. .. ==> 0XF80060B0[26:26] = 0x00000001U
- // .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. reg_ddrc_dfi_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF80060B0[27:27] = 0x00000001U
- // .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1
- // .. .. ==> 0XF80060B0[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU),
- // .. .. reg_ddrc_2t_delay = 0x0
- // .. .. ==> 0XF80060B4[8:0] = 0x00000000U
- // .. .. ==> MASK : 0x000001FFU VAL : 0x00000000U
- // .. .. reg_ddrc_skip_ocd = 0x1
- // .. .. ==> 0XF80060B4[9:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. .. reg_ddrc_dis_pre_bypass = 0x0
- // .. .. ==> 0XF80060B4[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B4, 0x000007FFU ,0x00000200U),
- // .. .. reg_ddrc_dfi_t_rddata_en = 0x6
- // .. .. ==> 0XF80060B8[4:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000006U
- // .. .. reg_ddrc_dfi_t_ctrlup_min = 0x3
- // .. .. ==> 0XF80060B8[14:5] = 0x00000003U
- // .. .. ==> MASK : 0x00007FE0U VAL : 0x00000060U
- // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40
- // .. .. ==> 0XF80060B8[24:15] = 0x00000040U
- // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U),
- // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. Clear_Correctable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U),
- // .. .. CORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060C8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ECC_CORRECTED_BIT_NUM = 0x0
- // .. .. ==> 0XF80060C8[7:1] = 0x00000000U
- // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U),
- // .. .. UNCORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060DC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U),
- // .. .. STAT_NUM_CORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[15:8] = 0x00000000U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000000U
- // .. .. STAT_NUM_UNCORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[7:0] = 0x00000000U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U),
- // .. .. reg_ddrc_ecc_mode = 0x0
- // .. .. ==> 0XF80060F4[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_scrub = 0x1
- // .. .. ==> 0XF80060F4[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. ..
- EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U),
- // .. .. reg_phy_dif_on = 0x0
- // .. .. ==> 0XF8006114[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_dif_off = 0x0
- // .. .. ==> 0XF8006114[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF8006118[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006118[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006118[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006118[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006118[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006118[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006118, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF800611C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF800611C[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF800611C[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF800611C[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF800611C[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF800611C[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF800611C, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006120[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006120[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006120[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006120[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006120, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006124[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006124[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006124[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006124[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006124[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006124[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006124, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF800612C[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF800612C[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006130[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006130[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006134[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006134[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006138[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006138[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006140[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006140[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006140[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006144[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006144[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006144[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006148[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006148[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006148[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF800614C[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF800614C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800614C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006154[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006154[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006154[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006158[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006158[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006158[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF800615C[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF800615C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800615C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006160[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006160[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006160[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006168[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006168[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006168[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF800616C[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF800616C[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF800616C[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006170[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006170[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006170[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006174[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006174[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006174[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF800617C[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF800617C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF800617C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006180[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006180[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006180[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006184[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006184[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006184[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006188[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006188[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006188[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_loopback = 0x0
- // .. .. ==> 0XF8006190[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_bl2 = 0x0
- // .. .. ==> 0XF8006190[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_at_spd_atpg = 0x0
- // .. .. ==> 0XF8006190[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_bist_enable = 0x0
- // .. .. ==> 0XF8006190[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_force_err = 0x0
- // .. .. ==> 0XF8006190[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_bist_mode = 0x0
- // .. .. ==> 0XF8006190[6:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. .. reg_phy_invert_clkout = 0x1
- // .. .. ==> 0XF8006190[7:7] = 0x00000001U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. .. reg_phy_all_dq_mpr_rd_resp = 0x0
- // .. .. ==> 0XF8006190[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_sel_logic = 0x0
- // .. .. ==> 0XF8006190[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_ratio = 0x100
- // .. .. ==> 0XF8006190[19:10] = 0x00000100U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00040000U
- // .. .. reg_phy_ctrl_slave_force = 0x0
- // .. .. ==> 0XF8006190[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006190[27:21] = 0x00000000U
- // .. .. ==> MASK : 0x0FE00000U VAL : 0x00000000U
- // .. .. reg_phy_use_rank0_delays = 0x1
- // .. .. ==> 0XF8006190[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. reg_phy_lpddr = 0x0
- // .. .. ==> 0XF8006190[29:29] = 0x00000000U
- // .. .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // .. .. reg_phy_cmd_latency = 0x0
- // .. .. ==> 0XF8006190[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_phy_int_lpbk = 0x0
- // .. .. ==> 0XF8006190[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006190, 0xFFFFFFFFU ,0x10040080U),
- // .. .. reg_phy_wr_rl_delay = 0x2
- // .. .. ==> 0XF8006194[4:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000002U
- // .. .. reg_phy_rd_rl_delay = 0x4
- // .. .. ==> 0XF8006194[9:5] = 0x00000004U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x00000080U
- // .. .. reg_phy_dll_lock_diff = 0xf
- // .. .. ==> 0XF8006194[13:10] = 0x0000000FU
- // .. .. ==> MASK : 0x00003C00U VAL : 0x00003C00U
- // .. .. reg_phy_use_wr_level = 0x1
- // .. .. ==> 0XF8006194[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. reg_phy_use_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF8006194[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. reg_phy_use_rd_data_eye_level = 0x1
- // .. .. ==> 0XF8006194[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_dis_calib_rst = 0x0
- // .. .. ==> 0XF8006194[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006194[19:18] = 0x00000000U
- // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U),
- // .. .. reg_arb_page_addr_mask = 0x0
- // .. .. ==> 0XF8006204[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006208[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006208[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006208[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006208[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006208[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006208, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF800620C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF800620C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF800620C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF800620C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF800620C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF800620C, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006210[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006210[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006210[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006210[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006210[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006210, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006214[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006214[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006214[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006214[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006214[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006214, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006218[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006218[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006218[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006218[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006218[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF800621C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF800621C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF800621C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF800621C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF800621C[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006220[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006220[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006220[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006220[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006220[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006224[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006224[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006224[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006224[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006224[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_ddrc_lpddr2 = 0x0
- // .. .. ==> 0XF80062A8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_per_bank_refresh = 0x0
- // .. .. ==> 0XF80062A8[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_derate_enable = 0x0
- // .. .. ==> 0XF80062A8[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_ddrc_mr4_margin = 0x0
- // .. .. ==> 0XF80062A8[11:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062A8, 0x00000FF7U ,0x00000000U),
- // .. .. reg_ddrc_mr4_read_interval = 0x0
- // .. .. ==> 0XF80062AC[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_ddrc_min_stable_clock_x1 = 0x5
- // .. .. ==> 0XF80062B0[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_idle_after_reset_x32 = 0x11
- // .. .. ==> 0XF80062B0[11:4] = 0x00000011U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000110U
- // .. .. reg_ddrc_t_mrw = 0x5
- // .. .. ==> 0XF80062B0[21:12] = 0x00000005U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005115U),
- // .. .. reg_ddrc_max_auto_init_x1024 = 0x9e
- // .. .. ==> 0XF80062B4[7:0] = 0x0000009EU
- // .. .. ==> MASK : 0x000000FFU VAL : 0x0000009EU
- // .. .. reg_ddrc_dev_zqinit_x32 = 0x11
- // .. .. ==> 0XF80062B4[17:8] = 0x00000011U
- // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001100U
- // .. ..
- EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x0000119EU),
- // .. .. START: POLL ON DCI STATUS
- // .. .. DONE = 1
- // .. .. ==> 0XF8000B74[13:13] = 0x00000001U
- // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U
- // .. ..
- EMIT_MASKPOLL(0XF8000B74, 0x00002000U),
- // .. .. FINISH: POLL ON DCI STATUS
- // .. .. START: UNLOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0x1
- // .. .. ==> 0XF8006000[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000085U),
- // .. .. FINISH: UNLOCK DDR
- // .. .. START: CHECK DDR STATUS
- // .. .. ddrc_reg_operating_mode = 1
- // .. .. ==> 0XF8006054[2:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U
- // .. ..
- EMIT_MASKPOLL(0XF8006054, 0x00000007U),
- // .. .. FINISH: CHECK DDR STATUS
- // .. FINISH: DDR INITIALIZATION
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_mio_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: OCM REMAPPING
- // .. FINISH: OCM REMAPPING
- // .. START: DDRIOB SETTINGS
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B40[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B40[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B40[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B40[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B40[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B40[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B40[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B44[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B44[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B44[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B44[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B44[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B44[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B44[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B48[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x1
- // .. ==> 0XF8000B48[2:1] = 0x00000001U
- // .. ==> MASK : 0x00000006U VAL : 0x00000002U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B48[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B48[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B48[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B48[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B48[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B4C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B4C[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B4C[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B4C[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B4C[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B4C[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B4C[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B50[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x2
- // .. ==> 0XF8000B50[2:1] = 0x00000002U
- // .. ==> MASK : 0x00000006U VAL : 0x00000004U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B50[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B50[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B50[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B50[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B50[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B54[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B54[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B54[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B54[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B54[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B54[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B54[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B58[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B58[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B58[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B58[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B58[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B58[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B58[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B5C[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B5C[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x3
- // .. ==> 0XF8000B5C[18:14] = 0x00000003U
- // .. ==> MASK : 0x0007C000U VAL : 0x0000C000U
- // .. SLEW_N = 0x3
- // .. ==> 0XF8000B5C[23:19] = 0x00000003U
- // .. ==> MASK : 0x00F80000U VAL : 0x00180000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B5C[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B5C[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B60[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B60[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B60[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B60[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B60[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B60[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B64[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B64[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B64[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B64[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B64[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B64[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B68[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B68[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B68[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B68[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B68[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B68[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F98068U),
- // .. VREF_INT_EN = 0x0
- // .. ==> 0XF8000B6C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. VREF_SEL = 0x0
- // .. ==> 0XF8000B6C[4:1] = 0x00000000U
- // .. ==> MASK : 0x0000001EU VAL : 0x00000000U
- // .. VREF_EXT_EN = 0x1
- // .. ==> 0XF8000B6C[6:5] = 0x00000001U
- // .. ==> MASK : 0x00000060U VAL : 0x00000020U
- // .. VREF_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[8:7] = 0x00000000U
- // .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. REFIO_EN = 0x1
- // .. ==> 0XF8000B6C[9:9] = 0x00000001U
- // .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. REFIO_TEST = 0x0
- // .. ==> 0XF8000B6C[11:10] = 0x00000000U
- // .. ==> MASK : 0x00000C00U VAL : 0x00000000U
- // .. REFIO_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DRST_B_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. CKE_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[14:14] = 0x00000000U
- // .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B6C, 0x00007FFFU ,0x00000220U),
- // .. .. START: ASSERT RESET
- // .. .. RESET = 1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000021U),
- // .. .. FINISH: ASSERT RESET
- // .. .. START: DEASSERT RESET
- // .. .. RESET = 0
- // .. .. ==> 0XF8000B70[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U),
- // .. .. FINISH: DEASSERT RESET
- // .. .. RESET = 0x1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ENABLE = 0x1
- // .. .. ==> 0XF8000B70[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. VRP_TRI = 0x0
- // .. .. ==> 0XF8000B70[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. VRN_TRI = 0x0
- // .. .. ==> 0XF8000B70[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. VRP_OUT = 0x0
- // .. .. ==> 0XF8000B70[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. .. NREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[7:6] = 0x00000000U
- // .. .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. .. NREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[10:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000700U VAL : 0x00000000U
- // .. .. NREF_OPT4 = 0x1
- // .. .. ==> 0XF8000B70[13:11] = 0x00000001U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00000800U
- // .. .. PREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[16:14] = 0x00000000U
- // .. .. ==> MASK : 0x0001C000U VAL : 0x00000000U
- // .. .. PREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[19:17] = 0x00000000U
- // .. .. ==> MASK : 0x000E0000U VAL : 0x00000000U
- // .. .. UPDATE_CONTROL = 0x0
- // .. .. ==> 0XF8000B70[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. INIT_COMPLETE = 0x0
- // .. .. ==> 0XF8000B70[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. TST_CLK = 0x0
- // .. .. ==> 0XF8000B70[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. TST_HLN = 0x0
- // .. .. ==> 0XF8000B70[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. TST_HLP = 0x0
- // .. .. ==> 0XF8000B70[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. TST_RST = 0x0
- // .. .. ==> 0XF8000B70[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. INT_DCI_EN = 0x0
- // .. .. ==> 0XF8000B70[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x07FFFFFFU ,0x00000823U),
- // .. FINISH: DDRIOB SETTINGS
- // .. START: MIO PROGRAMMING
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000700[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000700[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000700[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000700[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000700[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000700[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000700[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000700[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000700[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000704[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000704[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000704[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000704[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000704[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000704[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000704[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000704[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000704[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000704, 0x00003FFFU ,0x00001602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000708[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000708[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000708[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000708[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000708[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000708[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000708[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000708[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000708[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800070C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800070C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800070C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800070C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800070C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800070C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800070C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800070C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800070C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000710[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000710[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000710[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000710[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000710[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000710[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000710[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000710[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000710[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000714[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000714[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000714[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000714[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000714[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000714[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000714[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000714[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000714[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000718[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000718[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000718[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000718[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000718[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000718[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000718[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000718[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000718[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800071C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800071C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800071C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800071C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800071C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800071C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800071C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800071C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800071C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000720[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000720[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000720[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000720[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000720[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000720[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000720[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000720[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000720[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000724[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. Speed = 0
- // .. ==> 0XF8000724[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000724[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000724[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000724[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000724, 0x00003F01U ,0x00001601U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000728[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000728[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000728[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000728[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000728[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000728[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000728[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000728[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000728[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800072C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800072C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800072C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800072C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800072C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800072C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800072C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800072C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800072C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000730[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000730[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000730[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000730[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000730[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000730[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000730[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000730[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000730[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000734[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000734[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000734[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000734[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000734[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000734[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000734[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000734[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000734[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000738[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000738[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000738[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000738[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000738[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000738[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000738[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000738[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000738[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800073C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800073C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800073C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800073C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800073C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800073C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800073C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800073C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800073C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800073C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000740[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000740[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000740[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000740[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000740[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000740[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000740[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000740[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000740[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000740, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000744[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000744[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000744[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000744[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000744[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000744[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000744[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000744[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000744[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000744, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000748[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000748[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000748[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000748[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000748[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000748[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000748[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000748[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000748[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000748, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800074C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800074C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800074C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800074C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800074C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800074C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800074C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800074C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800074C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800074C, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000750[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000750[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000750[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000750[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000750[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000750[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000750[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000750[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000750[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000750, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000754[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000754[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000754[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000754[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000754[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000754[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000754[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000754[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000754[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000754, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000758[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000758[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000758[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000758[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000758[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000758[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000758[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000758[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000758[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000758, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800075C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800075C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800075C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800075C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800075C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800075C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800075C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800075C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800075C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800075C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000760[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000760[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000760[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000760[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000760[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000760[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000760[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000760[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000760[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000764[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000764[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000764[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000764[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000764[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000764[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000764[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000764[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000764[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000768[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000768[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000768[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000768[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000768[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000768[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000768[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000768[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000768[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800076C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800076C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800076C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800076C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800076C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800076C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800076C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800076C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800076C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000770[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000770[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000770[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000770[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000770[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000770[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000770[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000770[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000770[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000774[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000774[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000774[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000774[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000774[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000774[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000774[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000774[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000774[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000778[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000778[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000778[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000778[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000778[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000778[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000778[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000778[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000778[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800077C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF800077C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800077C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800077C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800077C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800077C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800077C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800077C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800077C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000780[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000780[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000780[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000780[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000780[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000780[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000780[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000780[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000780[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000784[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000784[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000784[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000784[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000784[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000784[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000784[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000784[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000784[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000788[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000788[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000788[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000788[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000788[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000788[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000788[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000788[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000788[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800078C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800078C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800078C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800078C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800078C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800078C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800078C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800078C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800078C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000790[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000790[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000790[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000790[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000790[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000790[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000790[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000790[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000790[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000794[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000794[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000794[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000794[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000794[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000794[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000794[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000794[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000794[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000798[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000798[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000798[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000798[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000798[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000798[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000798[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000798[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000798[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800079C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800079C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800079C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800079C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800079C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800079C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800079C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800079C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800079C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A0[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A8[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007AC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007AC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007AC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007AC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007AC[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007AC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007AC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007AC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007AC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007B0[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007B0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007B4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007B4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007B8[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007B8[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007B8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007BC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007BC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007BC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007BC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007BC[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007BC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007BC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007BC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007BC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C0[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007C4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C4[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007C8[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007C8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007CC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007CC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007CC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007CC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007CC[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007CC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007CC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007CC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007CC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007D0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D0[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00001420U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007D4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D4[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00001421U),
- // .. SDIO1_WP_SEL = 57
- // .. ==> 0XF8000834[5:0] = 0x00000039U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000039U
- // .. SDIO1_CD_SEL = 9
- // .. ==> 0XF8000834[21:16] = 0x00000009U
- // .. ==> MASK : 0x003F0000U VAL : 0x00090000U
- // ..
- EMIT_MASKWRITE(0XF8000834, 0x003F003FU ,0x00090039U),
- // .. FINISH: MIO PROGRAMMING
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_peripherals_init_data_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000000U),
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000000U),
- // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // .. START: SRAM/NOR SET OPMODE
- // .. FINISH: SRAM/NOR SET OPMODE
- // .. START: UART REGISTERS
- // .. BDIV = 0x6
- // .. ==> 0XE0001034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0001018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0001000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0001000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0001000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0001000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0001000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0001000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0001000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0001000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0001000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0001004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0001004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0001004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0001004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0001004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0001004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0001004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0001004, 0x00000FFFU ,0x00000020U),
- // .. BDIV = 0x6
- // .. ==> 0XE0000034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0000034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0000018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0000018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0000000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0000000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0000000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0000000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0000000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0000000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0000000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0000000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0000000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0000000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0000004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0000004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0000004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0000004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0000004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0000004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0000004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0000004, 0x00000FFFU ,0x00000020U),
- // .. FINISH: UART REGISTERS
- // .. START: QSPI REGISTERS
- // .. Holdb_dr = 1
- // .. ==> 0XE000D000[19:19] = 0x00000001U
- // .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // ..
- EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U),
- // .. FINISH: QSPI REGISTERS
- // .. START: PL POWER ON RESET REGISTERS
- // .. PCFG_POR_CNT_4K = 0
- // .. ==> 0XF8007000[29:29] = 0x00000000U
- // .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U),
- // .. FINISH: PL POWER ON RESET REGISTERS
- // .. START: SMC TIMING CALCULATION REGISTER UPDATE
- // .. .. START: NAND SET CYCLE
- // .. .. FINISH: NAND SET CYCLE
- // .. .. START: OPMODE
- // .. .. FINISH: OPMODE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: SRAM/NOR CS0 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS0 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS0 BASE ADDRESS
- // .. .. FINISH: NOR CS0 BASE ADDRESS
- // .. .. START: SRAM/NOR CS1 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS1 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS1 BASE ADDRESS
- // .. .. FINISH: NOR CS1 BASE ADDRESS
- // .. .. START: USB RESET
- // .. .. FINISH: USB RESET
- // .. .. START: ENET RESET
- // .. .. FINISH: ENET RESET
- // .. .. START: I2C RESET
- // .. .. FINISH: I2C RESET
- // .. .. START: NOR CHIP SELECT
- // .. .. .. START: DIR MODE BANK 0
- // .. .. .. FINISH: DIR MODE BANK 0
- // .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. FINISH: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. START: OUTPUT ENABLE BANK 0
- // .. .. .. FINISH: OUTPUT ENABLE BANK 0
- // .. .. FINISH: NOR CHIP SELECT
- // .. FINISH: SMC TIMING CALCULATION REGISTER UPDATE
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_post_config_2_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: ENABLING LEVEL SHIFTER
- // .. USER_INP_ICT_EN_0 = 3
- // .. ==> 0XF8000900[1:0] = 0x00000003U
- // .. ==> MASK : 0x00000003U VAL : 0x00000003U
- // .. USER_INP_ICT_EN_1 = 3
- // .. ==> 0XF8000900[3:2] = 0x00000003U
- // .. ==> MASK : 0x0000000CU VAL : 0x0000000CU
- // ..
- EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU),
- // .. FINISH: ENABLING LEVEL SHIFTER
- // .. START: FPGA RESETS TO 0
- // .. reserved_3 = 0
- // .. ==> 0XF8000240[31:25] = 0x00000000U
- // .. ==> MASK : 0xFE000000U VAL : 0x00000000U
- // .. FPGA_ACP_RST = 0
- // .. ==> 0XF8000240[24:24] = 0x00000000U
- // .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. FPGA_AXDS3_RST = 0
- // .. ==> 0XF8000240[23:23] = 0x00000000U
- // .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. FPGA_AXDS2_RST = 0
- // .. ==> 0XF8000240[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. FPGA_AXDS1_RST = 0
- // .. ==> 0XF8000240[21:21] = 0x00000000U
- // .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. FPGA_AXDS0_RST = 0
- // .. ==> 0XF8000240[20:20] = 0x00000000U
- // .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. reserved_2 = 0
- // .. ==> 0XF8000240[19:18] = 0x00000000U
- // .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. FSSW1_FPGA_RST = 0
- // .. ==> 0XF8000240[17:17] = 0x00000000U
- // .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. FSSW0_FPGA_RST = 0
- // .. ==> 0XF8000240[16:16] = 0x00000000U
- // .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. reserved_1 = 0
- // .. ==> 0XF8000240[15:14] = 0x00000000U
- // .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. FPGA_FMSW1_RST = 0
- // .. ==> 0XF8000240[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. FPGA_FMSW0_RST = 0
- // .. ==> 0XF8000240[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. FPGA_DMA3_RST = 0
- // .. ==> 0XF8000240[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. FPGA_DMA2_RST = 0
- // .. ==> 0XF8000240[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. FPGA_DMA1_RST = 0
- // .. ==> 0XF8000240[9:9] = 0x00000000U
- // .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. FPGA_DMA0_RST = 0
- // .. ==> 0XF8000240[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. reserved = 0
- // .. ==> 0XF8000240[7:4] = 0x00000000U
- // .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. FPGA3_OUT_RST = 0
- // .. ==> 0XF8000240[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. FPGA2_OUT_RST = 0
- // .. ==> 0XF8000240[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. FPGA1_OUT_RST = 0
- // .. ==> 0XF8000240[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. FPGA0_OUT_RST = 0
- // .. ==> 0XF8000240[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U),
- // .. FINISH: FPGA RESETS TO 0
- // .. START: AFI REGISTERS
- // .. .. START: AFI0 REGISTERS
- // .. .. FINISH: AFI0 REGISTERS
- // .. .. START: AFI1 REGISTERS
- // .. .. FINISH: AFI1 REGISTERS
- // .. .. START: AFI2 REGISTERS
- // .. .. FINISH: AFI2 REGISTERS
- // .. .. START: AFI3 REGISTERS
- // .. .. FINISH: AFI3 REGISTERS
- // .. FINISH: AFI REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_debug_2_0[] = {
- // START: top
- // .. START: CROSS TRIGGER CONFIGURATIONS
- // .. .. START: UNLOCKING CTI REGISTERS
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
- // .. .. FINISH: UNLOCKING CTI REGISTERS
- // .. .. START: ENABLING CTI MODULES AND CHANNELS
- // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
- // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. FINISH: CROSS TRIGGER CONFIGURATIONS
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_pll_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: PLL SLCR REGISTERS
- // .. .. START: ARM PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000110[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000110[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x145
- // .. .. ==> 0XF8000110[21:12] = 0x00000145U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00145000U
- // .. ..
- EMIT_MASKWRITE(0XF8000110, 0x003FFFF0U ,0x001452C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x1e
- // .. .. .. ==> 0XF8000100[18:12] = 0x0000001EU
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x0001E000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x0007F000U ,0x0001E000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000100[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. ARM_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000001U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000100[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000100, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. SRCSEL = 0x0
- // .. .. .. ==> 0XF8000120[5:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. .. DIVISOR = 0x2
- // .. .. .. ==> 0XF8000120[13:8] = 0x00000002U
- // .. .. .. ==> MASK : 0x00003F00U VAL : 0x00000200U
- // .. .. .. CPU_6OR4XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[24:24] = 0x00000001U
- // .. .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. .. .. CPU_3OR2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[25:25] = 0x00000001U
- // .. .. .. ==> MASK : 0x02000000U VAL : 0x02000000U
- // .. .. .. CPU_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[26:26] = 0x00000001U
- // .. .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. .. CPU_1XCLKACT = 0x1
- // .. .. .. ==> 0XF8000120[27:27] = 0x00000001U
- // .. .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. .. CPU_PERI_CLKACT = 0x1
- // .. .. .. ==> 0XF8000120[28:28] = 0x00000001U
- // .. .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000120, 0x1F003F30U ,0x1F000200U),
- // .. .. FINISH: ARM PLL INIT
- // .. .. START: DDR PLL INIT
- // .. .. PLL_RES = 0xc
- // .. .. ==> 0XF8000114[7:4] = 0x0000000CU
- // .. .. ==> MASK : 0x000000F0U VAL : 0x000000C0U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000114[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x1f4
- // .. .. ==> 0XF8000114[21:12] = 0x000001F4U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x001F4000U
- // .. ..
- EMIT_MASKWRITE(0XF8000114, 0x003FFFF0U ,0x001F42C0U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x14
- // .. .. .. ==> 0XF8000104[18:12] = 0x00000014U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00014000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x0007F000U ,0x00014000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000104[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. DDR_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000002U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000104[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000104, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. .. DDR_3XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. .. DDR_2XCLKACT = 0x1
- // .. .. .. ==> 0XF8000124[1:1] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. .. DDR_3XCLK_DIVISOR = 0x2
- // .. .. .. ==> 0XF8000124[25:20] = 0x00000002U
- // .. .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. .. .. DDR_2XCLK_DIVISOR = 0x3
- // .. .. .. ==> 0XF8000124[31:26] = 0x00000003U
- // .. .. .. ==> MASK : 0xFC000000U VAL : 0x0C000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000124, 0xFFF00003U ,0x0C200003U),
- // .. .. FINISH: DDR PLL INIT
- // .. .. START: IO PLL INIT
- // .. .. PLL_RES = 0x2
- // .. .. ==> 0XF8000118[7:4] = 0x00000002U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000020U
- // .. .. PLL_CP = 0x2
- // .. .. ==> 0XF8000118[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. LOCK_CNT = 0x113
- // .. .. ==> 0XF8000118[21:12] = 0x00000113U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00113000U
- // .. ..
- EMIT_MASKWRITE(0XF8000118, 0x003FFFF0U ,0x00113220U),
- // .. .. .. START: UPDATE FB_DIV
- // .. .. .. PLL_FDIV = 0x23
- // .. .. .. ==> 0XF8000108[18:12] = 0x00000023U
- // .. .. .. ==> MASK : 0x0007F000U VAL : 0x00023000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x0007F000U ,0x00023000U),
- // .. .. .. FINISH: UPDATE FB_DIV
- // .. .. .. START: BY PASS PLL
- // .. .. .. PLL_BYPASS_FORCE = 1
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000010U),
- // .. .. .. FINISH: BY PASS PLL
- // .. .. .. START: ASSERT RESET
- // .. .. .. PLL_RESET = 1
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000001U),
- // .. .. .. FINISH: ASSERT RESET
- // .. .. .. START: DEASSERT RESET
- // .. .. .. PLL_RESET = 0
- // .. .. .. ==> 0XF8000108[0:0] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000001U ,0x00000000U),
- // .. .. .. FINISH: DEASSERT RESET
- // .. .. .. START: CHECK PLL STATUS
- // .. .. .. IO_PLL_LOCK = 1
- // .. .. .. ==> 0XF800010C[2:2] = 0x00000001U
- // .. .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. ..
- EMIT_MASKPOLL(0XF800010C, 0x00000004U),
- // .. .. .. FINISH: CHECK PLL STATUS
- // .. .. .. START: REMOVE PLL BY PASS
- // .. .. .. PLL_BYPASS_FORCE = 0
- // .. .. .. ==> 0XF8000108[4:4] = 0x00000000U
- // .. .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. ..
- EMIT_MASKWRITE(0XF8000108, 0x00000010U ,0x00000000U),
- // .. .. .. FINISH: REMOVE PLL BY PASS
- // .. .. FINISH: IO PLL INIT
- // .. FINISH: PLL SLCR REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_clock_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: CLOCK CONTROL SLCR REGISTERS
- // .. CLKACT = 0x1
- // .. ==> 0XF8000128[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. DIVISOR0 = 0x31
- // .. ==> 0XF8000128[13:8] = 0x00000031U
- // .. ==> MASK : 0x00003F00U VAL : 0x00003100U
- // .. DIVISOR1 = 0x2
- // .. ==> 0XF8000128[25:20] = 0x00000002U
- // .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // ..
- EMIT_MASKWRITE(0XF8000128, 0x03F03F01U ,0x00203101U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000138[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000138[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000138, 0x00000011U ,0x00000001U),
- // .. CLKACT = 0x1
- // .. ==> 0XF8000140[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000140[6:4] = 0x00000000U
- // .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. DIVISOR = 0xe
- // .. ==> 0XF8000140[13:8] = 0x0000000EU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000E00U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF8000140[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF8000140, 0x03F03F71U ,0x00100E01U),
- // .. CLKACT = 0x1
- // .. ==> 0XF800014C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800014C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xd
- // .. ==> 0XF800014C[13:8] = 0x0000000DU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000D00U
- // ..
- EMIT_MASKWRITE(0XF800014C, 0x00003F31U ,0x00000D01U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF8000150[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000150[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000150[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000150[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000150, 0x00003F33U ,0x00001202U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000154[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000154[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000154[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0x12
- // .. ==> 0XF8000154[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // ..
- EMIT_MASKWRITE(0XF8000154, 0x00003F33U ,0x00001203U),
- // .. CLKACT0 = 0x1
- // .. ==> 0XF8000158[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF8000158[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF8000158[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR = 0xb
- // .. ==> 0XF8000158[13:8] = 0x0000000BU
- // .. ==> MASK : 0x00003F00U VAL : 0x00000B00U
- // ..
- EMIT_MASKWRITE(0XF8000158, 0x00003F33U ,0x00000B03U),
- // .. CLKACT0 = 0x0
- // .. ==> 0XF800015C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. CLKACT1 = 0x1
- // .. ==> 0XF800015C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. SRCSEL = 0x0
- // .. ==> 0XF800015C[5:4] = 0x00000000U
- // .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. DIVISOR0 = 0x12
- // .. ==> 0XF800015C[13:8] = 0x00000012U
- // .. ==> MASK : 0x00003F00U VAL : 0x00001200U
- // .. DIVISOR1 = 0x1
- // .. ==> 0XF800015C[25:20] = 0x00000001U
- // .. ==> MASK : 0x03F00000U VAL : 0x00100000U
- // ..
- EMIT_MASKWRITE(0XF800015C, 0x03F03F33U ,0x00101202U),
- // .. CAN0_MUX = 0x0
- // .. ==> 0XF8000160[5:0] = 0x00000000U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000000U
- // .. CAN0_REF_SEL = 0x0
- // .. ==> 0XF8000160[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. CAN1_MUX = 0x0
- // .. ==> 0XF8000160[21:16] = 0x00000000U
- // .. ==> MASK : 0x003F0000U VAL : 0x00000000U
- // .. CAN1_REF_SEL = 0x0
- // .. ==> 0XF8000160[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000160, 0x007F007FU ,0x00000000U),
- // .. .. START: TRACE CLOCK
- // .. .. FINISH: TRACE CLOCK
- // .. .. CLKACT = 0x1
- // .. .. ==> 0XF8000168[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000168[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR = 0x9
- // .. .. ==> 0XF8000168[13:8] = 0x00000009U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000900U
- // .. ..
- EMIT_MASKWRITE(0XF8000168, 0x00003F31U ,0x00000901U),
- // .. .. SRCSEL = 0x0
- // .. .. ==> 0XF8000170[5:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000030U VAL : 0x00000000U
- // .. .. DIVISOR0 = 0x7
- // .. .. ==> 0XF8000170[13:8] = 0x00000007U
- // .. .. ==> MASK : 0x00003F00U VAL : 0x00000700U
- // .. .. DIVISOR1 = 0x2
- // .. .. ==> 0XF8000170[25:20] = 0x00000002U
- // .. .. ==> MASK : 0x03F00000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF8000170, 0x03F03F30U ,0x00200700U),
- // .. .. CLK_621_TRUE = 0x1
- // .. .. ==> 0XF80001C4[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. ..
- EMIT_MASKWRITE(0XF80001C4, 0x00000001U ,0x00000001U),
- // .. .. DMA_CPU_2XCLKACT = 0x1
- // .. .. ==> 0XF800012C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. USB0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[2:2] = 0x00000001U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. .. USB1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. .. GEM0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[6:6] = 0x00000001U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000040U
- // .. .. GEM1_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. SDI0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. SDI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[11:11] = 0x00000001U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // .. .. SPI0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. SPI1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. CAN0_CPU_1XCLKACT = 0x0
- // .. .. ==> 0XF800012C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. CAN1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. .. I2C0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[18:18] = 0x00000001U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00040000U
- // .. .. I2C1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. .. UART0_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[20:20] = 0x00000001U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00100000U
- // .. .. UART1_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. GPIO_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[22:22] = 0x00000001U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00400000U
- // .. .. LQSPI_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[23:23] = 0x00000001U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00800000U
- // .. .. SMC_CPU_1XCLKACT = 0x1
- // .. .. ==> 0XF800012C[24:24] = 0x00000001U
- // .. .. ==> MASK : 0x01000000U VAL : 0x01000000U
- // .. ..
- EMIT_MASKWRITE(0XF800012C, 0x01FFCCCDU ,0x01FEC84DU),
- // .. FINISH: CLOCK CONTROL SLCR REGISTERS
- // .. START: THIS SHOULD BE BLANK
- // .. FINISH: THIS SHOULD BE BLANK
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_ddr_init_data_1_0[] = {
- // START: top
- // .. START: DDR INITIALIZATION
- // .. .. START: LOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0
- // .. .. ==> 0XF8006000[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 0x1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000084U),
- // .. .. FINISH: LOCK DDR
- // .. .. reg_ddrc_t_rfc_nom_x32 = 0x79
- // .. .. ==> 0XF8006004[11:0] = 0x00000079U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000079U
- // .. .. reg_ddrc_active_ranks = 0x1
- // .. .. ==> 0XF8006004[13:12] = 0x00000001U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00001000U
- // .. .. reg_ddrc_addrmap_cs_bit0 = 0x0
- // .. .. ==> 0XF8006004[18:14] = 0x00000000U
- // .. .. ==> MASK : 0x0007C000U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_block = 0x1
- // .. .. ==> 0XF8006004[20:19] = 0x00000001U
- // .. .. ==> MASK : 0x00180000U VAL : 0x00080000U
- // .. .. reg_ddrc_diff_rank_rd_2cycle_gap = 0x0
- // .. .. ==> 0XF8006004[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_cs_bit1 = 0x0
- // .. .. ==> 0XF8006004[26:22] = 0x00000000U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_open_bank = 0x0
- // .. .. ==> 0XF8006004[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_4bank_ram = 0x0
- // .. .. ==> 0XF8006004[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006004, 0x1FFFFFFFU ,0x00081079U),
- // .. .. reg_ddrc_hpr_min_non_critical_x32 = 0xf
- // .. .. ==> 0XF8006008[10:0] = 0x0000000FU
- // .. .. ==> MASK : 0x000007FFU VAL : 0x0000000FU
- // .. .. reg_ddrc_hpr_max_starve_x32 = 0xf
- // .. .. ==> 0XF8006008[21:11] = 0x0000000FU
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00007800U
- // .. .. reg_ddrc_hpr_xact_run_length = 0xf
- // .. .. ==> 0XF8006008[25:22] = 0x0000000FU
- // .. .. ==> MASK : 0x03C00000U VAL : 0x03C00000U
- // .. ..
- EMIT_MASKWRITE(0XF8006008, 0x03FFFFFFU ,0x03C0780FU),
- // .. .. reg_ddrc_lpr_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF800600C[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_lpr_max_starve_x32 = 0x2
- // .. .. ==> 0XF800600C[21:11] = 0x00000002U
- // .. .. ==> MASK : 0x003FF800U VAL : 0x00001000U
- // .. .. reg_ddrc_lpr_xact_run_length = 0x8
- // .. .. ==> 0XF800600C[25:22] = 0x00000008U
- // .. .. ==> MASK : 0x03C00000U VAL : 0x02000000U
- // .. ..
- EMIT_MASKWRITE(0XF800600C, 0x03FFFFFFU ,0x02001001U),
- // .. .. reg_ddrc_w_min_non_critical_x32 = 0x1
- // .. .. ==> 0XF8006010[10:0] = 0x00000001U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x00000001U
- // .. .. reg_ddrc_w_xact_run_length = 0x8
- // .. .. ==> 0XF8006010[14:11] = 0x00000008U
- // .. .. ==> MASK : 0x00007800U VAL : 0x00004000U
- // .. .. reg_ddrc_w_max_starve_x32 = 0x2
- // .. .. ==> 0XF8006010[25:15] = 0x00000002U
- // .. .. ==> MASK : 0x03FF8000U VAL : 0x00010000U
- // .. ..
- EMIT_MASKWRITE(0XF8006010, 0x03FFFFFFU ,0x00014001U),
- // .. .. reg_ddrc_t_rc = 0x19
- // .. .. ==> 0XF8006014[5:0] = 0x00000019U
- // .. .. ==> MASK : 0x0000003FU VAL : 0x00000019U
- // .. .. reg_ddrc_t_rfc_min = 0x50
- // .. .. ==> 0XF8006014[13:6] = 0x00000050U
- // .. .. ==> MASK : 0x00003FC0U VAL : 0x00001400U
- // .. .. reg_ddrc_post_selfref_gap_x32 = 0x10
- // .. .. ==> 0XF8006014[20:14] = 0x00000010U
- // .. .. ==> MASK : 0x001FC000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006014, 0x001FFFFFU ,0x00041419U),
- // .. .. reg_ddrc_wr2pre = 0x12
- // .. .. ==> 0XF8006018[4:0] = 0x00000012U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000012U
- // .. .. reg_ddrc_powerdown_to_x32 = 0x6
- // .. .. ==> 0XF8006018[9:5] = 0x00000006U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000C0U
- // .. .. reg_ddrc_t_faw = 0x14
- // .. .. ==> 0XF8006018[15:10] = 0x00000014U
- // .. .. ==> MASK : 0x0000FC00U VAL : 0x00005000U
- // .. .. reg_ddrc_t_ras_max = 0x22
- // .. .. ==> 0XF8006018[21:16] = 0x00000022U
- // .. .. ==> MASK : 0x003F0000U VAL : 0x00220000U
- // .. .. reg_ddrc_t_ras_min = 0x12
- // .. .. ==> 0XF8006018[26:22] = 0x00000012U
- // .. .. ==> MASK : 0x07C00000U VAL : 0x04800000U
- // .. .. reg_ddrc_t_cke = 0x4
- // .. .. ==> 0XF8006018[31:28] = 0x00000004U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006018, 0xF7FFFFFFU ,0x44A250D2U),
- // .. .. reg_ddrc_write_latency = 0x5
- // .. .. ==> 0XF800601C[4:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000005U
- // .. .. reg_ddrc_rd2wr = 0x7
- // .. .. ==> 0XF800601C[9:5] = 0x00000007U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x000000E0U
- // .. .. reg_ddrc_wr2rd = 0xe
- // .. .. ==> 0XF800601C[14:10] = 0x0000000EU
- // .. .. ==> MASK : 0x00007C00U VAL : 0x00003800U
- // .. .. reg_ddrc_t_xp = 0x4
- // .. .. ==> 0XF800601C[19:15] = 0x00000004U
- // .. .. ==> MASK : 0x000F8000U VAL : 0x00020000U
- // .. .. reg_ddrc_pad_pd = 0x0
- // .. .. ==> 0XF800601C[22:20] = 0x00000000U
- // .. .. ==> MASK : 0x00700000U VAL : 0x00000000U
- // .. .. reg_ddrc_rd2pre = 0x4
- // .. .. ==> 0XF800601C[27:23] = 0x00000004U
- // .. .. ==> MASK : 0x0F800000U VAL : 0x02000000U
- // .. .. reg_ddrc_t_rcd = 0x7
- // .. .. ==> 0XF800601C[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF800601C, 0xFFFFFFFFU ,0x720238E5U),
- // .. .. reg_ddrc_t_ccd = 0x4
- // .. .. ==> 0XF8006020[4:2] = 0x00000004U
- // .. .. ==> MASK : 0x0000001CU VAL : 0x00000010U
- // .. .. reg_ddrc_t_rrd = 0x5
- // .. .. ==> 0XF8006020[7:5] = 0x00000005U
- // .. .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. .. reg_ddrc_refresh_margin = 0x2
- // .. .. ==> 0XF8006020[11:8] = 0x00000002U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000200U
- // .. .. reg_ddrc_t_rp = 0x7
- // .. .. ==> 0XF8006020[15:12] = 0x00000007U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00007000U
- // .. .. reg_ddrc_refresh_to_x32 = 0x8
- // .. .. ==> 0XF8006020[20:16] = 0x00000008U
- // .. .. ==> MASK : 0x001F0000U VAL : 0x00080000U
- // .. .. reg_ddrc_sdram = 0x1
- // .. .. ==> 0XF8006020[21:21] = 0x00000001U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00200000U
- // .. .. reg_ddrc_mobile = 0x0
- // .. .. ==> 0XF8006020[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. reg_ddrc_clock_stop_en = 0x0
- // .. .. ==> 0XF8006020[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. reg_ddrc_read_latency = 0x7
- // .. .. ==> 0XF8006020[28:24] = 0x00000007U
- // .. .. ==> MASK : 0x1F000000U VAL : 0x07000000U
- // .. .. reg_phy_mode_ddr1_ddr2 = 0x1
- // .. .. ==> 0XF8006020[29:29] = 0x00000001U
- // .. .. ==> MASK : 0x20000000U VAL : 0x20000000U
- // .. .. reg_ddrc_dis_pad_pd = 0x0
- // .. .. ==> 0XF8006020[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_ddrc_loopback = 0x0
- // .. .. ==> 0XF8006020[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006020, 0xFFFFFFFCU ,0x272872B0U),
- // .. .. reg_ddrc_en_2t_timing_mode = 0x0
- // .. .. ==> 0XF8006024[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_prefer_write = 0x0
- // .. .. ==> 0XF8006024[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_max_rank_rd = 0xf
- // .. .. ==> 0XF8006024[5:2] = 0x0000000FU
- // .. .. ==> MASK : 0x0000003CU VAL : 0x0000003CU
- // .. .. reg_ddrc_mr_wr = 0x0
- // .. .. ==> 0XF8006024[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_addr = 0x0
- // .. .. ==> 0XF8006024[8:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_data = 0x0
- // .. .. ==> 0XF8006024[24:9] = 0x00000000U
- // .. .. ==> MASK : 0x01FFFE00U VAL : 0x00000000U
- // .. .. ddrc_reg_mr_wr_busy = 0x0
- // .. .. ==> 0XF8006024[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_type = 0x0
- // .. .. ==> 0XF8006024[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. .. reg_ddrc_mr_rdata_valid = 0x0
- // .. .. ==> 0XF8006024[27:27] = 0x00000000U
- // .. .. ==> MASK : 0x08000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006024, 0x0FFFFFFFU ,0x0000003CU),
- // .. .. reg_ddrc_final_wait_x32 = 0x7
- // .. .. ==> 0XF8006028[6:0] = 0x00000007U
- // .. .. ==> MASK : 0x0000007FU VAL : 0x00000007U
- // .. .. reg_ddrc_pre_ocd_x32 = 0x0
- // .. .. ==> 0XF8006028[10:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000780U VAL : 0x00000000U
- // .. .. reg_ddrc_t_mrd = 0x4
- // .. .. ==> 0XF8006028[13:11] = 0x00000004U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00002000U
- // .. ..
- EMIT_MASKWRITE(0XF8006028, 0x00003FFFU ,0x00002007U),
- // .. .. reg_ddrc_emr2 = 0x8
- // .. .. ==> 0XF800602C[15:0] = 0x00000008U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000008U
- // .. .. reg_ddrc_emr3 = 0x0
- // .. .. ==> 0XF800602C[31:16] = 0x00000000U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800602C, 0xFFFFFFFFU ,0x00000008U),
- // .. .. reg_ddrc_mr = 0x930
- // .. .. ==> 0XF8006030[15:0] = 0x00000930U
- // .. .. ==> MASK : 0x0000FFFFU VAL : 0x00000930U
- // .. .. reg_ddrc_emr = 0x4
- // .. .. ==> 0XF8006030[31:16] = 0x00000004U
- // .. .. ==> MASK : 0xFFFF0000U VAL : 0x00040000U
- // .. ..
- EMIT_MASKWRITE(0XF8006030, 0xFFFFFFFFU ,0x00040930U),
- // .. .. reg_ddrc_burst_rdwr = 0x4
- // .. .. ==> 0XF8006034[3:0] = 0x00000004U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000004U
- // .. .. reg_ddrc_pre_cke_x1024 = 0x156
- // .. .. ==> 0XF8006034[13:4] = 0x00000156U
- // .. .. ==> MASK : 0x00003FF0U VAL : 0x00001560U
- // .. .. reg_ddrc_post_cke_x1024 = 0x1
- // .. .. ==> 0XF8006034[25:16] = 0x00000001U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00010000U
- // .. .. reg_ddrc_burstchop = 0x0
- // .. .. ==> 0XF8006034[28:28] = 0x00000000U
- // .. .. ==> MASK : 0x10000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006034, 0x13FF3FFFU ,0x00011564U),
- // .. .. reg_ddrc_force_low_pri_n = 0x0
- // .. .. ==> 0XF8006038[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_dq = 0x0
- // .. .. ==> 0XF8006038[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_debug_mode = 0x0
- // .. .. ==> 0XF8006038[6:6] = 0x00000000U
- // .. .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. .. reg_phy_wr_level_start = 0x0
- // .. .. ==> 0XF8006038[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_phy_rd_level_start = 0x0
- // .. .. ==> 0XF8006038[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_dq0_wait_t = 0x0
- // .. .. ==> 0XF8006038[12:9] = 0x00000000U
- // .. .. ==> MASK : 0x00001E00U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006038, 0x00001FC3U ,0x00000000U),
- // .. .. reg_ddrc_addrmap_bank_b0 = 0x6
- // .. .. ==> 0XF800603C[3:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000006U
- // .. .. reg_ddrc_addrmap_bank_b1 = 0x6
- // .. .. ==> 0XF800603C[7:4] = 0x00000006U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000060U
- // .. .. reg_ddrc_addrmap_bank_b2 = 0x6
- // .. .. ==> 0XF800603C[11:8] = 0x00000006U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000600U
- // .. .. reg_ddrc_addrmap_col_b5 = 0x0
- // .. .. ==> 0XF800603C[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b6 = 0x0
- // .. .. ==> 0XF800603C[19:16] = 0x00000000U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800603C, 0x000FFFFFU ,0x00000666U),
- // .. .. reg_ddrc_addrmap_col_b2 = 0x0
- // .. .. ==> 0XF8006040[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b3 = 0x0
- // .. .. ==> 0XF8006040[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b4 = 0x0
- // .. .. ==> 0XF8006040[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b7 = 0x0
- // .. .. ==> 0XF8006040[15:12] = 0x00000000U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00000000U
- // .. .. reg_ddrc_addrmap_col_b8 = 0xf
- // .. .. ==> 0XF8006040[19:16] = 0x0000000FU
- // .. .. ==> MASK : 0x000F0000U VAL : 0x000F0000U
- // .. .. reg_ddrc_addrmap_col_b9 = 0xf
- // .. .. ==> 0XF8006040[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_col_b10 = 0xf
- // .. .. ==> 0XF8006040[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. .. reg_ddrc_addrmap_col_b11 = 0xf
- // .. .. ==> 0XF8006040[31:28] = 0x0000000FU
- // .. .. ==> MASK : 0xF0000000U VAL : 0xF0000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006040, 0xFFFFFFFFU ,0xFFFF0000U),
- // .. .. reg_ddrc_addrmap_row_b0 = 0x5
- // .. .. ==> 0XF8006044[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_addrmap_row_b1 = 0x5
- // .. .. ==> 0XF8006044[7:4] = 0x00000005U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000050U
- // .. .. reg_ddrc_addrmap_row_b2_11 = 0x5
- // .. .. ==> 0XF8006044[11:8] = 0x00000005U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000500U
- // .. .. reg_ddrc_addrmap_row_b12 = 0x5
- // .. .. ==> 0XF8006044[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. .. reg_ddrc_addrmap_row_b13 = 0x5
- // .. .. ==> 0XF8006044[19:16] = 0x00000005U
- // .. .. ==> MASK : 0x000F0000U VAL : 0x00050000U
- // .. .. reg_ddrc_addrmap_row_b14 = 0xf
- // .. .. ==> 0XF8006044[23:20] = 0x0000000FU
- // .. .. ==> MASK : 0x00F00000U VAL : 0x00F00000U
- // .. .. reg_ddrc_addrmap_row_b15 = 0xf
- // .. .. ==> 0XF8006044[27:24] = 0x0000000FU
- // .. .. ==> MASK : 0x0F000000U VAL : 0x0F000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006044, 0x0FFFFFFFU ,0x0FF55555U),
- // .. .. reg_ddrc_rank0_rd_odt = 0x0
- // .. .. ==> 0XF8006048[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_rank0_wr_odt = 0x1
- // .. .. ==> 0XF8006048[5:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000038U VAL : 0x00000008U
- // .. .. reg_ddrc_rank1_rd_odt = 0x1
- // .. .. ==> 0XF8006048[8:6] = 0x00000001U
- // .. .. ==> MASK : 0x000001C0U VAL : 0x00000040U
- // .. .. reg_ddrc_rank1_wr_odt = 0x1
- // .. .. ==> 0XF8006048[11:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000E00U VAL : 0x00000200U
- // .. .. reg_phy_rd_local_odt = 0x0
- // .. .. ==> 0XF8006048[13:12] = 0x00000000U
- // .. .. ==> MASK : 0x00003000U VAL : 0x00000000U
- // .. .. reg_phy_wr_local_odt = 0x3
- // .. .. ==> 0XF8006048[15:14] = 0x00000003U
- // .. .. ==> MASK : 0x0000C000U VAL : 0x0000C000U
- // .. .. reg_phy_idle_local_odt = 0x3
- // .. .. ==> 0XF8006048[17:16] = 0x00000003U
- // .. .. ==> MASK : 0x00030000U VAL : 0x00030000U
- // .. .. reg_ddrc_rank2_rd_odt = 0x0
- // .. .. ==> 0XF8006048[20:18] = 0x00000000U
- // .. .. ==> MASK : 0x001C0000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank2_wr_odt = 0x0
- // .. .. ==> 0XF8006048[23:21] = 0x00000000U
- // .. .. ==> MASK : 0x00E00000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_rd_odt = 0x0
- // .. .. ==> 0XF8006048[26:24] = 0x00000000U
- // .. .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. .. reg_ddrc_rank3_wr_odt = 0x0
- // .. .. ==> 0XF8006048[29:27] = 0x00000000U
- // .. .. ==> MASK : 0x38000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006048, 0x3FFFFFFFU ,0x0003C248U),
- // .. .. reg_phy_rd_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_wr_cmd_to_data = 0x0
- // .. .. ==> 0XF8006050[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_phy_rdc_we_to_re_delay = 0x8
- // .. .. ==> 0XF8006050[11:8] = 0x00000008U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000800U
- // .. .. reg_phy_rdc_fifo_rst_disable = 0x0
- // .. .. ==> 0XF8006050[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_phy_use_fixed_re = 0x1
- // .. .. ==> 0XF8006050[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_rdc_fifo_rst_err_cnt_clr = 0x0
- // .. .. ==> 0XF8006050[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_dis_phy_ctrl_rstn = 0x0
- // .. .. ==> 0XF8006050[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_phy_clk_stall_level = 0x0
- // .. .. ==> 0XF8006050[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[27:24] = 0x00000007U
- // .. .. ==> MASK : 0x0F000000U VAL : 0x07000000U
- // .. .. reg_phy_wrlvl_num_of_dq0 = 0x7
- // .. .. ==> 0XF8006050[31:28] = 0x00000007U
- // .. .. ==> MASK : 0xF0000000U VAL : 0x70000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006050, 0xFF0F8FFFU ,0x77010800U),
- // .. .. reg_ddrc_dll_calib_to_min_x1024 = 0x1
- // .. .. ==> 0XF8006058[7:0] = 0x00000001U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000001U
- // .. .. reg_ddrc_dll_calib_to_max_x1024 = 0x1
- // .. .. ==> 0XF8006058[15:8] = 0x00000001U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000100U
- // .. .. reg_ddrc_dis_dll_calib = 0x0
- // .. .. ==> 0XF8006058[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006058, 0x0001FFFFU ,0x00000101U),
- // .. .. reg_ddrc_rd_odt_delay = 0x3
- // .. .. ==> 0XF800605C[3:0] = 0x00000003U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000003U
- // .. .. reg_ddrc_wr_odt_delay = 0x0
- // .. .. ==> 0XF800605C[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. .. reg_ddrc_rd_odt_hold = 0x0
- // .. .. ==> 0XF800605C[11:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000F00U VAL : 0x00000000U
- // .. .. reg_ddrc_wr_odt_hold = 0x5
- // .. .. ==> 0XF800605C[15:12] = 0x00000005U
- // .. .. ==> MASK : 0x0000F000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF800605C, 0x0000FFFFU ,0x00005003U),
- // .. .. reg_ddrc_pageclose = 0x0
- // .. .. ==> 0XF8006060[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_lpr_num_entries = 0x1f
- // .. .. ==> 0XF8006060[6:1] = 0x0000001FU
- // .. .. ==> MASK : 0x0000007EU VAL : 0x0000003EU
- // .. .. reg_ddrc_auto_pre_en = 0x0
- // .. .. ==> 0XF8006060[7:7] = 0x00000000U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. .. reg_ddrc_refresh_update_level = 0x0
- // .. .. ==> 0XF8006060[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_wc = 0x0
- // .. .. ==> 0XF8006060[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_collision_page_opt = 0x0
- // .. .. ==> 0XF8006060[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_ddrc_selfref_en = 0x0
- // .. .. ==> 0XF8006060[12:12] = 0x00000000U
- // .. .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006060, 0x000017FFU ,0x0000003EU),
- // .. .. reg_ddrc_go2critical_hysteresis = 0x0
- // .. .. ==> 0XF8006064[12:5] = 0x00000000U
- // .. .. ==> MASK : 0x00001FE0U VAL : 0x00000000U
- // .. .. reg_arb_go2critical_en = 0x1
- // .. .. ==> 0XF8006064[17:17] = 0x00000001U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00020000U
- // .. ..
- EMIT_MASKWRITE(0XF8006064, 0x00021FE0U ,0x00020000U),
- // .. .. reg_ddrc_wrlvl_ww = 0x41
- // .. .. ==> 0XF8006068[7:0] = 0x00000041U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000041U
- // .. .. reg_ddrc_rdlvl_rr = 0x41
- // .. .. ==> 0XF8006068[15:8] = 0x00000041U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00004100U
- // .. .. reg_ddrc_dfi_t_wlmrd = 0x28
- // .. .. ==> 0XF8006068[25:16] = 0x00000028U
- // .. .. ==> MASK : 0x03FF0000U VAL : 0x00280000U
- // .. ..
- EMIT_MASKWRITE(0XF8006068, 0x03FFFFFFU ,0x00284141U),
- // .. .. dfi_t_ctrlupd_interval_min_x1024 = 0x10
- // .. .. ==> 0XF800606C[7:0] = 0x00000010U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000010U
- // .. .. dfi_t_ctrlupd_interval_max_x1024 = 0x16
- // .. .. ==> 0XF800606C[15:8] = 0x00000016U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00001600U
- // .. ..
- EMIT_MASKWRITE(0XF800606C, 0x0000FFFFU ,0x00001610U),
- // .. .. refresh_timer0_start_value_x32 = 0x0
- // .. .. ==> 0XF80060A0[11:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000000U
- // .. .. refresh_timer1_start_value_x32 = 0x8
- // .. .. ==> 0XF80060A0[23:12] = 0x00000008U
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00008000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A0, 0x00FFFFFFU ,0x00008000U),
- // .. .. reg_ddrc_dis_auto_zq = 0x0
- // .. .. ==> 0XF80060A4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_ddr3 = 0x1
- // .. .. ==> 0XF80060A4[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. reg_ddrc_t_mod = 0x200
- // .. .. ==> 0XF80060A4[11:2] = 0x00000200U
- // .. .. ==> MASK : 0x00000FFCU VAL : 0x00000800U
- // .. .. reg_ddrc_t_zq_long_nop = 0x200
- // .. .. ==> 0XF80060A4[21:12] = 0x00000200U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00200000U
- // .. .. reg_ddrc_t_zq_short_nop = 0x40
- // .. .. ==> 0XF80060A4[31:22] = 0x00000040U
- // .. .. ==> MASK : 0xFFC00000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A4, 0xFFFFFFFFU ,0x10200802U),
- // .. .. t_zq_short_interval_x1024 = 0xbebc
- // .. .. ==> 0XF80060A8[19:0] = 0x0000BEBCU
- // .. .. ==> MASK : 0x000FFFFFU VAL : 0x0000BEBCU
- // .. .. dram_rstn_x1024 = 0x62
- // .. .. ==> 0XF80060A8[27:20] = 0x00000062U
- // .. .. ==> MASK : 0x0FF00000U VAL : 0x06200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060A8, 0x0FFFFFFFU ,0x0620BEBCU),
- // .. .. deeppowerdown_en = 0x0
- // .. .. ==> 0XF80060AC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. deeppowerdown_to_x1024 = 0xf5
- // .. .. ==> 0XF80060AC[8:1] = 0x000000F5U
- // .. .. ==> MASK : 0x000001FEU VAL : 0x000001EAU
- // .. ..
- EMIT_MASKWRITE(0XF80060AC, 0x000001FFU ,0x000001EAU),
- // .. .. dfi_wrlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[11:0] = 0x00000FFFU
- // .. .. ==> MASK : 0x00000FFFU VAL : 0x00000FFFU
- // .. .. dfi_rdlvl_max_x1024 = 0xfff
- // .. .. ==> 0XF80060B0[23:12] = 0x00000FFFU
- // .. .. ==> MASK : 0x00FFF000U VAL : 0x00FFF000U
- // .. .. ddrc_reg_twrlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. ddrc_reg_trdlvl_max_error = 0x0
- // .. .. ==> 0XF80060B0[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. reg_ddrc_dfi_wr_level_en = 0x1
- // .. .. ==> 0XF80060B0[26:26] = 0x00000001U
- // .. .. ==> MASK : 0x04000000U VAL : 0x04000000U
- // .. .. reg_ddrc_dfi_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF80060B0[27:27] = 0x00000001U
- // .. .. ==> MASK : 0x08000000U VAL : 0x08000000U
- // .. .. reg_ddrc_dfi_rd_data_eye_train = 0x1
- // .. .. ==> 0XF80060B0[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B0, 0x1FFFFFFFU ,0x1CFFFFFFU),
- // .. .. reg_ddrc_2t_delay = 0x0
- // .. .. ==> 0XF80060B4[8:0] = 0x00000000U
- // .. .. ==> MASK : 0x000001FFU VAL : 0x00000000U
- // .. .. reg_ddrc_skip_ocd = 0x1
- // .. .. ==> 0XF80060B4[9:9] = 0x00000001U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. .. reg_ddrc_dis_pre_bypass = 0x0
- // .. .. ==> 0XF80060B4[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B4, 0x000007FFU ,0x00000200U),
- // .. .. reg_ddrc_dfi_t_rddata_en = 0x6
- // .. .. ==> 0XF80060B8[4:0] = 0x00000006U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000006U
- // .. .. reg_ddrc_dfi_t_ctrlup_min = 0x3
- // .. .. ==> 0XF80060B8[14:5] = 0x00000003U
- // .. .. ==> MASK : 0x00007FE0U VAL : 0x00000060U
- // .. .. reg_ddrc_dfi_t_ctrlup_max = 0x40
- // .. .. ==> 0XF80060B8[24:15] = 0x00000040U
- // .. .. ==> MASK : 0x01FF8000U VAL : 0x00200000U
- // .. ..
- EMIT_MASKWRITE(0XF80060B8, 0x01FFFFFFU ,0x00200066U),
- // .. .. Clear_Uncorrectable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. Clear_Correctable_DRAM_ECC_error = 0x0
- // .. .. ==> 0XF80060C4[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C4, 0x00000003U ,0x00000000U),
- // .. .. CORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060C8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. ECC_CORRECTED_BIT_NUM = 0x0
- // .. .. ==> 0XF80060C8[7:1] = 0x00000000U
- // .. .. ==> MASK : 0x000000FEU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060C8, 0x000000FFU ,0x00000000U),
- // .. .. UNCORR_ECC_LOG_VALID = 0x0
- // .. .. ==> 0XF80060DC[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060DC, 0x00000001U ,0x00000000U),
- // .. .. STAT_NUM_CORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[15:8] = 0x00000000U
- // .. .. ==> MASK : 0x0000FF00U VAL : 0x00000000U
- // .. .. STAT_NUM_UNCORR_ERR = 0x0
- // .. .. ==> 0XF80060F0[7:0] = 0x00000000U
- // .. .. ==> MASK : 0x000000FFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80060F0, 0x0000FFFFU ,0x00000000U),
- // .. .. reg_ddrc_ecc_mode = 0x0
- // .. .. ==> 0XF80060F4[2:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_scrub = 0x1
- // .. .. ==> 0XF80060F4[3:3] = 0x00000001U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000008U
- // .. ..
- EMIT_MASKWRITE(0XF80060F4, 0x0000000FU ,0x00000008U),
- // .. .. reg_phy_dif_on = 0x0
- // .. .. ==> 0XF8006114[3:0] = 0x00000000U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000000U
- // .. .. reg_phy_dif_off = 0x0
- // .. .. ==> 0XF8006114[7:4] = 0x00000000U
- // .. .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006114, 0x000000FFU ,0x00000000U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF8006118[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006118[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006118[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006118[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006118[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006118[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006118[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006118, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x1
- // .. .. ==> 0XF800611C[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF800611C[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF800611C[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF800611C[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF800611C[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF800611C[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF800611C[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF800611C, 0x7FFFFFFFU ,0x40000001U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006120[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006120[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006120[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006120[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006120[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006120[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006120[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006120, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_data_slice_in_use = 0x0
- // .. .. ==> 0XF8006124[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_rdlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_wrlvl_inc_mode = 0x0
- // .. .. ==> 0XF8006124[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_tx = 0x0
- // .. .. ==> 0XF8006124[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_board_lpbk_rx = 0x0
- // .. .. ==> 0XF8006124[5:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. .. reg_phy_bist_shift_dq = 0x0
- // .. .. ==> 0XF8006124[14:6] = 0x00000000U
- // .. .. ==> MASK : 0x00007FC0U VAL : 0x00000000U
- // .. .. reg_phy_bist_err_clr = 0x0
- // .. .. ==> 0XF8006124[23:15] = 0x00000000U
- // .. .. ==> MASK : 0x00FF8000U VAL : 0x00000000U
- // .. .. reg_phy_dq_offset = 0x40
- // .. .. ==> 0XF8006124[30:24] = 0x00000040U
- // .. .. ==> MASK : 0x7F000000U VAL : 0x40000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006124, 0x7FFFFFFFU ,0x40000000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF800612C[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF800612C[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF800612C, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006130[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006130[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006130, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006134[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006134[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006134, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_wrlvl_init_ratio = 0x0
- // .. .. ==> 0XF8006138[9:0] = 0x00000000U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000000U
- // .. .. reg_phy_gatelvl_init_ratio = 0xa0
- // .. .. ==> 0XF8006138[19:10] = 0x000000A0U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00028000U
- // .. ..
- EMIT_MASKWRITE(0XF8006138, 0x000FFFFFU ,0x00028000U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006140[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006140[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006140[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006140, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006144[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006144[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006144[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006144, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF8006148[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006148[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006148[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006148, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_rd_dqs_slave_ratio = 0x35
- // .. .. ==> 0XF800614C[9:0] = 0x00000035U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000035U
- // .. .. reg_phy_rd_dqs_slave_force = 0x0
- // .. .. ==> 0XF800614C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_rd_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800614C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800614C, 0x000FFFFFU ,0x00000035U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006154[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006154[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006154[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006154, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006158[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006158[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006158[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006158, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF800615C[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF800615C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF800615C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800615C, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_wr_dqs_slave_ratio = 0x80
- // .. .. ==> 0XF8006160[9:0] = 0x00000080U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x00000080U
- // .. .. reg_phy_wr_dqs_slave_force = 0x0
- // .. .. ==> 0XF8006160[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_dqs_slave_delay = 0x0
- // .. .. ==> 0XF8006160[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006160, 0x000FFFFFU ,0x00000080U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006168[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006168[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006168[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006168, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF800616C[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF800616C[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF800616C[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800616C, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006170[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006170[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006170[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006170, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_fifo_we_slave_ratio = 0xf5
- // .. .. ==> 0XF8006174[10:0] = 0x000000F5U
- // .. .. ==> MASK : 0x000007FFU VAL : 0x000000F5U
- // .. .. reg_phy_fifo_we_in_force = 0x0
- // .. .. ==> 0XF8006174[11:11] = 0x00000000U
- // .. .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. .. reg_phy_fifo_we_in_delay = 0x0
- // .. .. ==> 0XF8006174[20:12] = 0x00000000U
- // .. .. ==> MASK : 0x001FF000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006174, 0x001FFFFFU ,0x000000F5U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF800617C[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF800617C[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF800617C[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800617C, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006180[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006180[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006180[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006180, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006184[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006184[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006184[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006184, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_wr_data_slave_ratio = 0xc0
- // .. .. ==> 0XF8006188[9:0] = 0x000000C0U
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000000C0U
- // .. .. reg_phy_wr_data_slave_force = 0x0
- // .. .. ==> 0XF8006188[10:10] = 0x00000000U
- // .. .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. .. reg_phy_wr_data_slave_delay = 0x0
- // .. .. ==> 0XF8006188[19:11] = 0x00000000U
- // .. .. ==> MASK : 0x000FF800U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006188, 0x000FFFFFU ,0x000000C0U),
- // .. .. reg_phy_loopback = 0x0
- // .. .. ==> 0XF8006190[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_phy_bl2 = 0x0
- // .. .. ==> 0XF8006190[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_phy_at_spd_atpg = 0x0
- // .. .. ==> 0XF8006190[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_phy_bist_enable = 0x0
- // .. .. ==> 0XF8006190[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. reg_phy_bist_force_err = 0x0
- // .. .. ==> 0XF8006190[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. reg_phy_bist_mode = 0x0
- // .. .. ==> 0XF8006190[6:5] = 0x00000000U
- // .. .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. .. reg_phy_invert_clkout = 0x1
- // .. .. ==> 0XF8006190[7:7] = 0x00000001U
- // .. .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. .. reg_phy_all_dq_mpr_rd_resp = 0x0
- // .. .. ==> 0XF8006190[8:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. .. reg_phy_sel_logic = 0x0
- // .. .. ==> 0XF8006190[9:9] = 0x00000000U
- // .. .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_ratio = 0x100
- // .. .. ==> 0XF8006190[19:10] = 0x00000100U
- // .. .. ==> MASK : 0x000FFC00U VAL : 0x00040000U
- // .. .. reg_phy_ctrl_slave_force = 0x0
- // .. .. ==> 0XF8006190[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006190[27:21] = 0x00000000U
- // .. .. ==> MASK : 0x0FE00000U VAL : 0x00000000U
- // .. .. reg_phy_use_rank0_delays = 0x1
- // .. .. ==> 0XF8006190[28:28] = 0x00000001U
- // .. .. ==> MASK : 0x10000000U VAL : 0x10000000U
- // .. .. reg_phy_lpddr = 0x0
- // .. .. ==> 0XF8006190[29:29] = 0x00000000U
- // .. .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // .. .. reg_phy_cmd_latency = 0x0
- // .. .. ==> 0XF8006190[30:30] = 0x00000000U
- // .. .. ==> MASK : 0x40000000U VAL : 0x00000000U
- // .. .. reg_phy_int_lpbk = 0x0
- // .. .. ==> 0XF8006190[31:31] = 0x00000000U
- // .. .. ==> MASK : 0x80000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006190, 0xFFFFFFFFU ,0x10040080U),
- // .. .. reg_phy_wr_rl_delay = 0x2
- // .. .. ==> 0XF8006194[4:0] = 0x00000002U
- // .. .. ==> MASK : 0x0000001FU VAL : 0x00000002U
- // .. .. reg_phy_rd_rl_delay = 0x4
- // .. .. ==> 0XF8006194[9:5] = 0x00000004U
- // .. .. ==> MASK : 0x000003E0U VAL : 0x00000080U
- // .. .. reg_phy_dll_lock_diff = 0xf
- // .. .. ==> 0XF8006194[13:10] = 0x0000000FU
- // .. .. ==> MASK : 0x00003C00U VAL : 0x00003C00U
- // .. .. reg_phy_use_wr_level = 0x1
- // .. .. ==> 0XF8006194[14:14] = 0x00000001U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00004000U
- // .. .. reg_phy_use_rd_dqs_gate_level = 0x1
- // .. .. ==> 0XF8006194[15:15] = 0x00000001U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00008000U
- // .. .. reg_phy_use_rd_data_eye_level = 0x1
- // .. .. ==> 0XF8006194[16:16] = 0x00000001U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00010000U
- // .. .. reg_phy_dis_calib_rst = 0x0
- // .. .. ==> 0XF8006194[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_phy_ctrl_slave_delay = 0x0
- // .. .. ==> 0XF8006194[19:18] = 0x00000000U
- // .. .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006194, 0x000FFFFFU ,0x0001FC82U),
- // .. .. reg_arb_page_addr_mask = 0x0
- // .. .. ==> 0XF8006204[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006204, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006208[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006208[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006208[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006208[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006208[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006208, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF800620C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF800620C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF800620C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF800620C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF800620C[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF800620C, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006210[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006210[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006210[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006210[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006210[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006210, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_wr_portn = 0x3ff
- // .. .. ==> 0XF8006214[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_wr_portn = 0x0
- // .. .. ==> 0XF8006214[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_wr_portn = 0x0
- // .. .. ==> 0XF8006214[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_wr_portn = 0x0
- // .. .. ==> 0XF8006214[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_dis_rmw_portn = 0x1
- // .. .. ==> 0XF8006214[19:19] = 0x00000001U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // .. ..
- EMIT_MASKWRITE(0XF8006214, 0x000F03FFU ,0x000803FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006218[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006218[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006218[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006218[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006218[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006218, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF800621C[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF800621C[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF800621C[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF800621C[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF800621C[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF800621C, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006220[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006220[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006220[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006220[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006220[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006220, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_arb_pri_rd_portn = 0x3ff
- // .. .. ==> 0XF8006224[9:0] = 0x000003FFU
- // .. .. ==> MASK : 0x000003FFU VAL : 0x000003FFU
- // .. .. reg_arb_disable_aging_rd_portn = 0x0
- // .. .. ==> 0XF8006224[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. .. reg_arb_disable_urgent_rd_portn = 0x0
- // .. .. ==> 0XF8006224[17:17] = 0x00000000U
- // .. .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. .. reg_arb_dis_page_match_rd_portn = 0x0
- // .. .. ==> 0XF8006224[18:18] = 0x00000000U
- // .. .. ==> MASK : 0x00040000U VAL : 0x00000000U
- // .. .. reg_arb_set_hpr_rd_portn = 0x0
- // .. .. ==> 0XF8006224[19:19] = 0x00000000U
- // .. .. ==> MASK : 0x00080000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006224, 0x000F03FFU ,0x000003FFU),
- // .. .. reg_ddrc_lpddr2 = 0x0
- // .. .. ==> 0XF80062A8[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. reg_ddrc_per_bank_refresh = 0x0
- // .. .. ==> 0XF80062A8[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_derate_enable = 0x0
- // .. .. ==> 0XF80062A8[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. reg_ddrc_mr4_margin = 0x0
- // .. .. ==> 0XF80062A8[11:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062A8, 0x00000FF7U ,0x00000000U),
- // .. .. reg_ddrc_mr4_read_interval = 0x0
- // .. .. ==> 0XF80062AC[31:0] = 0x00000000U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF80062AC, 0xFFFFFFFFU ,0x00000000U),
- // .. .. reg_ddrc_min_stable_clock_x1 = 0x5
- // .. .. ==> 0XF80062B0[3:0] = 0x00000005U
- // .. .. ==> MASK : 0x0000000FU VAL : 0x00000005U
- // .. .. reg_ddrc_idle_after_reset_x32 = 0x11
- // .. .. ==> 0XF80062B0[11:4] = 0x00000011U
- // .. .. ==> MASK : 0x00000FF0U VAL : 0x00000110U
- // .. .. reg_ddrc_t_mrw = 0x5
- // .. .. ==> 0XF80062B0[21:12] = 0x00000005U
- // .. .. ==> MASK : 0x003FF000U VAL : 0x00005000U
- // .. ..
- EMIT_MASKWRITE(0XF80062B0, 0x003FFFFFU ,0x00005115U),
- // .. .. reg_ddrc_max_auto_init_x1024 = 0x9e
- // .. .. ==> 0XF80062B4[7:0] = 0x0000009EU
- // .. .. ==> MASK : 0x000000FFU VAL : 0x0000009EU
- // .. .. reg_ddrc_dev_zqinit_x32 = 0x11
- // .. .. ==> 0XF80062B4[17:8] = 0x00000011U
- // .. .. ==> MASK : 0x0003FF00U VAL : 0x00001100U
- // .. ..
- EMIT_MASKWRITE(0XF80062B4, 0x0003FFFFU ,0x0000119EU),
- // .. .. START: POLL ON DCI STATUS
- // .. .. DONE = 1
- // .. .. ==> 0XF8000B74[13:13] = 0x00000001U
- // .. .. ==> MASK : 0x00002000U VAL : 0x00002000U
- // .. ..
- EMIT_MASKPOLL(0XF8000B74, 0x00002000U),
- // .. .. FINISH: POLL ON DCI STATUS
- // .. .. START: UNLOCK DDR
- // .. .. reg_ddrc_soft_rstb = 0x1
- // .. .. ==> 0XF8006000[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. reg_ddrc_powerdown_en = 0x0
- // .. .. ==> 0XF8006000[1:1] = 0x00000000U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. .. reg_ddrc_data_bus_width = 0x1
- // .. .. ==> 0XF8006000[3:2] = 0x00000001U
- // .. .. ==> MASK : 0x0000000CU VAL : 0x00000004U
- // .. .. reg_ddrc_burst8_refresh = 0x0
- // .. .. ==> 0XF8006000[6:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000070U VAL : 0x00000000U
- // .. .. reg_ddrc_rdwr_idle_gap = 1
- // .. .. ==> 0XF8006000[13:7] = 0x00000001U
- // .. .. ==> MASK : 0x00003F80U VAL : 0x00000080U
- // .. .. reg_ddrc_dis_rd_bypass = 0x0
- // .. .. ==> 0XF8006000[14:14] = 0x00000000U
- // .. .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_act_bypass = 0x0
- // .. .. ==> 0XF8006000[15:15] = 0x00000000U
- // .. .. ==> MASK : 0x00008000U VAL : 0x00000000U
- // .. .. reg_ddrc_dis_auto_refresh = 0x0
- // .. .. ==> 0XF8006000[16:16] = 0x00000000U
- // .. .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8006000, 0x0001FFFFU ,0x00000085U),
- // .. .. FINISH: UNLOCK DDR
- // .. .. START: CHECK DDR STATUS
- // .. .. ddrc_reg_operating_mode = 1
- // .. .. ==> 0XF8006054[2:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000007U VAL : 0x00000001U
- // .. ..
- EMIT_MASKPOLL(0XF8006054, 0x00000007U),
- // .. .. FINISH: CHECK DDR STATUS
- // .. FINISH: DDR INITIALIZATION
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_mio_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: OCM REMAPPING
- // .. FINISH: OCM REMAPPING
- // .. START: DDRIOB SETTINGS
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B40[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B40[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B40[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B40[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B40[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B40[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B40[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B40[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B40, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B44[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B44[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B44[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B44[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B44[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B44[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B44[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B44[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B44, 0x00000FFFU ,0x00000600U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B48[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x1
- // .. ==> 0XF8000B48[2:1] = 0x00000001U
- // .. ==> MASK : 0x00000006U VAL : 0x00000002U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B48[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B48[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B48[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B48[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B48[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B48[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000FFFU ,0x00000672U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B4C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B4C[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B4C[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B4C[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B4C[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B4C[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B4C[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B50[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x2
- // .. ==> 0XF8000B50[2:1] = 0x00000002U
- // .. ==> MASK : 0x00000006U VAL : 0x00000004U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B50[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x1
- // .. ==> 0XF8000B50[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. DCR_TYPE = 0x3
- // .. ==> 0XF8000B50[6:5] = 0x00000003U
- // .. ==> MASK : 0x00000060U VAL : 0x00000060U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B50[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B50[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B50[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000FFFU ,0x00000674U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B54[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B54[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B54[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B54[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B54[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x0
- // .. ==> 0XF8000B54[10:9] = 0x00000000U
- // .. ==> MASK : 0x00000600U VAL : 0x00000000U
- // .. PULLUP_EN = 0x1
- // .. ==> 0XF8000B54[11:11] = 0x00000001U
- // .. ==> MASK : 0x00000800U VAL : 0x00000800U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000FFFU ,0x00000800U),
- // .. INP_POWER = 0x0
- // .. ==> 0XF8000B58[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. INP_TYPE = 0x0
- // .. ==> 0XF8000B58[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. DCI_UPDATE = 0x0
- // .. ==> 0XF8000B58[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. TERM_EN = 0x0
- // .. ==> 0XF8000B58[4:4] = 0x00000000U
- // .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. DCR_TYPE = 0x0
- // .. ==> 0XF8000B58[6:5] = 0x00000000U
- // .. ==> MASK : 0x00000060U VAL : 0x00000000U
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B58[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. OUTPUT_EN = 0x3
- // .. ==> 0XF8000B58[10:9] = 0x00000003U
- // .. ==> MASK : 0x00000600U VAL : 0x00000600U
- // .. PULLUP_EN = 0x0
- // .. ==> 0XF8000B58[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B58, 0x00000FFFU ,0x00000600U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B5C[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B5C[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x3
- // .. ==> 0XF8000B5C[18:14] = 0x00000003U
- // .. ==> MASK : 0x0007C000U VAL : 0x0000C000U
- // .. SLEW_N = 0x3
- // .. ==> 0XF8000B5C[23:19] = 0x00000003U
- // .. ==> MASK : 0x00F80000U VAL : 0x00180000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B5C[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B5C[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B5C, 0xFFFFFFFFU ,0x0018C068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B60[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B60[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B60[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B60[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B60[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B60[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B60, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B64[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B64[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B64[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B64[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B64[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B64[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B64, 0xFFFFFFFFU ,0x00F98068U),
- // .. DRIVE_P = 0x68
- // .. ==> 0XF8000B68[6:0] = 0x00000068U
- // .. ==> MASK : 0x0000007FU VAL : 0x00000068U
- // .. DRIVE_N = 0x0
- // .. ==> 0XF8000B68[13:7] = 0x00000000U
- // .. ==> MASK : 0x00003F80U VAL : 0x00000000U
- // .. SLEW_P = 0x6
- // .. ==> 0XF8000B68[18:14] = 0x00000006U
- // .. ==> MASK : 0x0007C000U VAL : 0x00018000U
- // .. SLEW_N = 0x1f
- // .. ==> 0XF8000B68[23:19] = 0x0000001FU
- // .. ==> MASK : 0x00F80000U VAL : 0x00F80000U
- // .. GTL = 0x0
- // .. ==> 0XF8000B68[26:24] = 0x00000000U
- // .. ==> MASK : 0x07000000U VAL : 0x00000000U
- // .. RTERM = 0x0
- // .. ==> 0XF8000B68[31:27] = 0x00000000U
- // .. ==> MASK : 0xF8000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B68, 0xFFFFFFFFU ,0x00F98068U),
- // .. VREF_INT_EN = 0x0
- // .. ==> 0XF8000B6C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. VREF_SEL = 0x0
- // .. ==> 0XF8000B6C[4:1] = 0x00000000U
- // .. ==> MASK : 0x0000001EU VAL : 0x00000000U
- // .. VREF_EXT_EN = 0x1
- // .. ==> 0XF8000B6C[6:5] = 0x00000001U
- // .. ==> MASK : 0x00000060U VAL : 0x00000020U
- // .. VREF_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[8:7] = 0x00000000U
- // .. ==> MASK : 0x00000180U VAL : 0x00000000U
- // .. REFIO_EN = 0x1
- // .. ==> 0XF8000B6C[9:9] = 0x00000001U
- // .. ==> MASK : 0x00000200U VAL : 0x00000200U
- // .. REFIO_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DRST_B_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. CKE_PULLUP_EN = 0x0
- // .. ==> 0XF8000B6C[14:14] = 0x00000000U
- // .. ==> MASK : 0x00004000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B6C, 0x000073FFU ,0x00000220U),
- // .. .. START: ASSERT RESET
- // .. .. RESET = 1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000021U),
- // .. .. FINISH: ASSERT RESET
- // .. .. START: DEASSERT RESET
- // .. .. RESET = 0
- // .. .. ==> 0XF8000B70[0:0] = 0x00000000U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x00000021U ,0x00000020U),
- // .. .. FINISH: DEASSERT RESET
- // .. .. RESET = 0x1
- // .. .. ==> 0XF8000B70[0:0] = 0x00000001U
- // .. .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. .. ENABLE = 0x1
- // .. .. ==> 0XF8000B70[1:1] = 0x00000001U
- // .. .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. .. VRP_TRI = 0x0
- // .. .. ==> 0XF8000B70[2:2] = 0x00000000U
- // .. .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. .. VRN_TRI = 0x0
- // .. .. ==> 0XF8000B70[3:3] = 0x00000000U
- // .. .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. .. VRP_OUT = 0x0
- // .. .. ==> 0XF8000B70[4:4] = 0x00000000U
- // .. .. ==> MASK : 0x00000010U VAL : 0x00000000U
- // .. .. VRN_OUT = 0x1
- // .. .. ==> 0XF8000B70[5:5] = 0x00000001U
- // .. .. ==> MASK : 0x00000020U VAL : 0x00000020U
- // .. .. NREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[7:6] = 0x00000000U
- // .. .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. .. NREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[10:8] = 0x00000000U
- // .. .. ==> MASK : 0x00000700U VAL : 0x00000000U
- // .. .. NREF_OPT4 = 0x1
- // .. .. ==> 0XF8000B70[13:11] = 0x00000001U
- // .. .. ==> MASK : 0x00003800U VAL : 0x00000800U
- // .. .. PREF_OPT1 = 0x0
- // .. .. ==> 0XF8000B70[16:14] = 0x00000000U
- // .. .. ==> MASK : 0x0001C000U VAL : 0x00000000U
- // .. .. PREF_OPT2 = 0x0
- // .. .. ==> 0XF8000B70[19:17] = 0x00000000U
- // .. .. ==> MASK : 0x000E0000U VAL : 0x00000000U
- // .. .. UPDATE_CONTROL = 0x0
- // .. .. ==> 0XF8000B70[20:20] = 0x00000000U
- // .. .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. .. INIT_COMPLETE = 0x0
- // .. .. ==> 0XF8000B70[21:21] = 0x00000000U
- // .. .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. .. TST_CLK = 0x0
- // .. .. ==> 0XF8000B70[22:22] = 0x00000000U
- // .. .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. .. TST_HLN = 0x0
- // .. .. ==> 0XF8000B70[23:23] = 0x00000000U
- // .. .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. .. TST_HLP = 0x0
- // .. .. ==> 0XF8000B70[24:24] = 0x00000000U
- // .. .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. .. TST_RST = 0x0
- // .. .. ==> 0XF8000B70[25:25] = 0x00000000U
- // .. .. ==> MASK : 0x02000000U VAL : 0x00000000U
- // .. .. INT_DCI_EN = 0x0
- // .. .. ==> 0XF8000B70[26:26] = 0x00000000U
- // .. .. ==> MASK : 0x04000000U VAL : 0x00000000U
- // .. ..
- EMIT_MASKWRITE(0XF8000B70, 0x07FFFFFFU ,0x00000823U),
- // .. FINISH: DDRIOB SETTINGS
- // .. START: MIO PROGRAMMING
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000700[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000700[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000700[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000700[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000700[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000700[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000700[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000700[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000700[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000700, 0x00003FFFU ,0x00001600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000704[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000704[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000704[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000704[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000704[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000704[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000704[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000704[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000704[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000704, 0x00003FFFU ,0x00001602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000708[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000708[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000708[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000708[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000708[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000708[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000708[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000708[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000708[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000708, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800070C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800070C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800070C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800070C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800070C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800070C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800070C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800070C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800070C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800070C, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000710[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000710[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000710[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000710[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000710[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000710[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000710[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000710[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000710[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000710, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000714[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000714[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000714[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000714[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000714[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000714[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000714[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000714[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000714[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000714, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000718[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000718[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000718[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000718[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000718[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000718[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000718[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000718[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000718[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000718, 0x00003FFFU ,0x00000602U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800071C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800071C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800071C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800071C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800071C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800071C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800071C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF800071C[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800071C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800071C, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000720[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000720[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000720[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000720[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000720[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000720[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000720[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 0
- // .. ==> 0XF8000720[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000720[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000720, 0x00003FFFU ,0x00000600U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000724[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. Speed = 0
- // .. ==> 0XF8000724[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000724[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000724[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000724[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000724, 0x00003F01U ,0x00001601U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000728[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000728[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000728[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000728[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000728[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000728[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000728[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000728[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000728[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000728, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800072C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800072C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800072C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800072C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800072C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800072C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800072C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800072C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800072C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800072C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000730[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000730[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000730[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000730[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000730[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000730[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000730[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000730[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000730[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000730, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000734[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000734[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000734[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000734[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000734[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000734[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000734[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000734[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000734[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000734, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000738[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000738[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF8000738[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000738[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF8000738[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF8000738[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF8000738[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF8000738[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000738[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000738, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800073C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800073C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF800073C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800073C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 4
- // .. ==> 0XF800073C[7:5] = 0x00000004U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000080U
- // .. Speed = 0
- // .. ==> 0XF800073C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 3
- // .. ==> 0XF800073C[11:9] = 0x00000003U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000600U
- // .. PULLUP = 1
- // .. ==> 0XF800073C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800073C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800073C, 0x00003FFFU ,0x00001680U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000740[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000740[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000740[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000740[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000740[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000740[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000740[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000740[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000740[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000740, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000744[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000744[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000744[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000744[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000744[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000744[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000744[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000744[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000744[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000744, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000748[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000748[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000748[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000748[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000748[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000748[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000748[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000748[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000748[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000748, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800074C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF800074C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800074C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800074C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800074C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800074C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800074C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800074C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800074C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800074C, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000750[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000750[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000750[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000750[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000750[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000750[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000750[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000750[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000750[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000750, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000754[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 1
- // .. ==> 0XF8000754[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000754[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000754[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000754[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000754[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000754[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000754[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000754[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000754, 0x00003FFFU ,0x00001402U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000758[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000758[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000758[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000758[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000758[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000758[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000758[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000758[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000758[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000758, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800075C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800075C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800075C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800075C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800075C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800075C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800075C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800075C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800075C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800075C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000760[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000760[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000760[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000760[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000760[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000760[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000760[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000760[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000760[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000760, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000764[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000764[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000764[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000764[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000764[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000764[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000764[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000764[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000764[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000764, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000768[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF8000768[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF8000768[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF8000768[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000768[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000768[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000768[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000768[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000768[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000768, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800076C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 1
- // .. ==> 0XF800076C[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. L1_SEL = 0
- // .. ==> 0XF800076C[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF800076C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800076C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800076C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800076C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800076C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800076C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800076C, 0x00003FFFU ,0x00001403U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000770[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000770[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000770[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000770[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000770[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000770[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000770[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000770[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000770[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000770, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000774[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000774[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000774[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000774[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000774[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000774[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000774[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000774[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000774[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000774, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000778[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000778[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000778[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000778[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000778[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000778[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000778[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000778[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000778[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000778, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF800077C[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF800077C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800077C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800077C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800077C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800077C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800077C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800077C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800077C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800077C, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000780[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000780[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000780[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000780[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000780[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000780[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000780[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000780[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000780[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000780, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000784[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000784[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000784[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000784[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000784[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000784[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000784[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000784[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000784[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000784, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000788[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000788[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000788[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000788[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000788[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000788[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000788[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000788[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000788[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000788, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800078C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800078C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800078C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800078C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800078C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800078C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800078C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800078C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800078C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800078C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF8000790[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF8000790[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000790[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000790[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000790[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000790[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000790[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000790[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000790[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000790, 0x00003FFFU ,0x00001405U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000794[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000794[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000794[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000794[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000794[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000794[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000794[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000794[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000794[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000794, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF8000798[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF8000798[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF8000798[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF8000798[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF8000798[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF8000798[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF8000798[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF8000798[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF8000798[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000798, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF800079C[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF800079C[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 1
- // .. ==> 0XF800079C[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. L2_SEL = 0
- // .. ==> 0XF800079C[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF800079C[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF800079C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF800079C[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF800079C[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF800079C[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF800079C, 0x00003FFFU ,0x00001404U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A0[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A0, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007A8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007A8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007A8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007A8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007A8[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007A8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007A8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007A8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007A8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007A8, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007AC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007AC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007AC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007AC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007AC[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007AC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007AC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007AC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007AC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007AC, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 0
- // .. ==> 0XF80007B0[7:5] = 0x00000000U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000000U
- // .. Speed = 0
- // .. ==> 0XF80007B0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B0, 0x00003FFFU ,0x00001400U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007B4[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 5
- // .. ==> 0XF80007B4[7:5] = 0x00000005U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000A0U
- // .. Speed = 0
- // .. ==> 0XF80007B4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B4, 0x00003FFFU ,0x000014A0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007B8[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007B8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007B8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007B8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007B8[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007B8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007B8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007B8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007B8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007B8, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007BC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007BC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007BC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007BC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007BC[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007BC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007BC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007BC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007BC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007BC, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C0[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C0, 0x00003FFFU ,0x000014E0U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007C4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 7
- // .. ==> 0XF80007C4[7:5] = 0x00000007U
- // .. ==> MASK : 0x000000E0U VAL : 0x000000E0U
- // .. Speed = 0
- // .. ==> 0XF80007C4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C4, 0x00003FFFU ,0x000014E1U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007C8[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007C8[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007C8[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007C8[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007C8[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007C8[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007C8[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007C8[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007C8[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007C8, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007CC[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007CC[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007CC[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007CC[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 2
- // .. ==> 0XF80007CC[7:5] = 0x00000002U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000040U
- // .. Speed = 0
- // .. ==> 0XF80007CC[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007CC[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007CC[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007CC[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007CC, 0x00003FFFU ,0x00001440U),
- // .. TRI_ENABLE = 0
- // .. ==> 0XF80007D0[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D0[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D0[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D0[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D0[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D0[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D0[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D0[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D0[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D0, 0x00003FFFU ,0x00001420U),
- // .. TRI_ENABLE = 1
- // .. ==> 0XF80007D4[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // .. L0_SEL = 0
- // .. ==> 0XF80007D4[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. L1_SEL = 0
- // .. ==> 0XF80007D4[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. L2_SEL = 0
- // .. ==> 0XF80007D4[4:3] = 0x00000000U
- // .. ==> MASK : 0x00000018U VAL : 0x00000000U
- // .. L3_SEL = 1
- // .. ==> 0XF80007D4[7:5] = 0x00000001U
- // .. ==> MASK : 0x000000E0U VAL : 0x00000020U
- // .. Speed = 0
- // .. ==> 0XF80007D4[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. IO_Type = 2
- // .. ==> 0XF80007D4[11:9] = 0x00000002U
- // .. ==> MASK : 0x00000E00U VAL : 0x00000400U
- // .. PULLUP = 1
- // .. ==> 0XF80007D4[12:12] = 0x00000001U
- // .. ==> MASK : 0x00001000U VAL : 0x00001000U
- // .. DisableRcvr = 0
- // .. ==> 0XF80007D4[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF80007D4, 0x00003FFFU ,0x00001421U),
- // .. SDIO1_WP_SEL = 57
- // .. ==> 0XF8000834[5:0] = 0x00000039U
- // .. ==> MASK : 0x0000003FU VAL : 0x00000039U
- // .. SDIO1_CD_SEL = 9
- // .. ==> 0XF8000834[21:16] = 0x00000009U
- // .. ==> MASK : 0x003F0000U VAL : 0x00090000U
- // ..
- EMIT_MASKWRITE(0XF8000834, 0x003F003FU ,0x00090039U),
- // .. FINISH: MIO PROGRAMMING
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_peripherals_init_data_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B48[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B48, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B4C[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B4C, 0x00000180U ,0x00000000U),
- // .. IBUF_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[7:7] = 0x00000001U
- // .. ==> MASK : 0x00000080U VAL : 0x00000080U
- // .. TERM_DISABLE_MODE = 0x1
- // .. ==> 0XF8000B50[8:8] = 0x00000001U
- // .. ==> MASK : 0x00000100U VAL : 0x00000100U
- // ..
- EMIT_MASKWRITE(0XF8000B50, 0x00000180U ,0x00000180U),
- // .. IBUF_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. TERM_DISABLE_MODE = 0x0
- // .. ==> 0XF8000B54[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000B54, 0x00000180U ,0x00000000U),
- // .. FINISH: DDR TERM/IBUF_DISABLE_MODE SETTINGS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // .. START: SRAM/NOR SET OPMODE
- // .. FINISH: SRAM/NOR SET OPMODE
- // .. START: UART REGISTERS
- // .. BDIV = 0x6
- // .. ==> 0XE0001034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0001034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0001018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0001018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0001000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0001000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0001000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0001000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0001000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0001000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0001000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0001000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0001000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0001000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0001004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0001004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0001004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0001004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0001004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0001004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0001004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0001004, 0x00000FFFU ,0x00000020U),
- // .. BDIV = 0x6
- // .. ==> 0XE0000034[7:0] = 0x00000006U
- // .. ==> MASK : 0x000000FFU VAL : 0x00000006U
- // ..
- EMIT_MASKWRITE(0XE0000034, 0x000000FFU ,0x00000006U),
- // .. CD = 0x7c
- // .. ==> 0XE0000018[15:0] = 0x0000007CU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000007CU
- // ..
- EMIT_MASKWRITE(0XE0000018, 0x0000FFFFU ,0x0000007CU),
- // .. STPBRK = 0x0
- // .. ==> 0XE0000000[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. STTBRK = 0x0
- // .. ==> 0XE0000000[7:7] = 0x00000000U
- // .. ==> MASK : 0x00000080U VAL : 0x00000000U
- // .. RSTTO = 0x0
- // .. ==> 0XE0000000[6:6] = 0x00000000U
- // .. ==> MASK : 0x00000040U VAL : 0x00000000U
- // .. TXDIS = 0x0
- // .. ==> 0XE0000000[5:5] = 0x00000000U
- // .. ==> MASK : 0x00000020U VAL : 0x00000000U
- // .. TXEN = 0x1
- // .. ==> 0XE0000000[4:4] = 0x00000001U
- // .. ==> MASK : 0x00000010U VAL : 0x00000010U
- // .. RXDIS = 0x0
- // .. ==> 0XE0000000[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. RXEN = 0x1
- // .. ==> 0XE0000000[2:2] = 0x00000001U
- // .. ==> MASK : 0x00000004U VAL : 0x00000004U
- // .. TXRES = 0x1
- // .. ==> 0XE0000000[1:1] = 0x00000001U
- // .. ==> MASK : 0x00000002U VAL : 0x00000002U
- // .. RXRES = 0x1
- // .. ==> 0XE0000000[0:0] = 0x00000001U
- // .. ==> MASK : 0x00000001U VAL : 0x00000001U
- // ..
- EMIT_MASKWRITE(0XE0000000, 0x000001FFU ,0x00000017U),
- // .. IRMODE = 0x0
- // .. ==> 0XE0000004[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. UCLKEN = 0x0
- // .. ==> 0XE0000004[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. CHMODE = 0x0
- // .. ==> 0XE0000004[9:8] = 0x00000000U
- // .. ==> MASK : 0x00000300U VAL : 0x00000000U
- // .. NBSTOP = 0x0
- // .. ==> 0XE0000004[7:6] = 0x00000000U
- // .. ==> MASK : 0x000000C0U VAL : 0x00000000U
- // .. PAR = 0x4
- // .. ==> 0XE0000004[5:3] = 0x00000004U
- // .. ==> MASK : 0x00000038U VAL : 0x00000020U
- // .. CHRL = 0x0
- // .. ==> 0XE0000004[2:1] = 0x00000000U
- // .. ==> MASK : 0x00000006U VAL : 0x00000000U
- // .. CLKS = 0x0
- // .. ==> 0XE0000004[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XE0000004, 0x00000FFFU ,0x00000020U),
- // .. FINISH: UART REGISTERS
- // .. START: QSPI REGISTERS
- // .. Holdb_dr = 1
- // .. ==> 0XE000D000[19:19] = 0x00000001U
- // .. ==> MASK : 0x00080000U VAL : 0x00080000U
- // ..
- EMIT_MASKWRITE(0XE000D000, 0x00080000U ,0x00080000U),
- // .. FINISH: QSPI REGISTERS
- // .. START: PL POWER ON RESET REGISTERS
- // .. PCFG_POR_CNT_4K = 0
- // .. ==> 0XF8007000[29:29] = 0x00000000U
- // .. ==> MASK : 0x20000000U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8007000, 0x20000000U ,0x00000000U),
- // .. FINISH: PL POWER ON RESET REGISTERS
- // .. START: SMC TIMING CALCULATION REGISTER UPDATE
- // .. .. START: NAND SET CYCLE
- // .. .. FINISH: NAND SET CYCLE
- // .. .. START: OPMODE
- // .. .. FINISH: OPMODE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: SRAM/NOR CS0 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS0 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS0 BASE ADDRESS
- // .. .. FINISH: NOR CS0 BASE ADDRESS
- // .. .. START: SRAM/NOR CS1 SET CYCLE
- // .. .. FINISH: SRAM/NOR CS1 SET CYCLE
- // .. .. START: DIRECT COMMAND
- // .. .. FINISH: DIRECT COMMAND
- // .. .. START: NOR CS1 BASE ADDRESS
- // .. .. FINISH: NOR CS1 BASE ADDRESS
- // .. .. START: USB RESET
- // .. .. FINISH: USB RESET
- // .. .. START: ENET RESET
- // .. .. FINISH: ENET RESET
- // .. .. START: I2C RESET
- // .. .. FINISH: I2C RESET
- // .. .. START: NOR CHIP SELECT
- // .. .. .. START: DIR MODE BANK 0
- // .. .. .. FINISH: DIR MODE BANK 0
- // .. .. .. START: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. FINISH: MASK_DATA_0_LSW HIGH BANK [15:0]
- // .. .. .. START: OUTPUT ENABLE BANK 0
- // .. .. .. FINISH: OUTPUT ENABLE BANK 0
- // .. .. FINISH: NOR CHIP SELECT
- // .. FINISH: SMC TIMING CALCULATION REGISTER UPDATE
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_post_config_1_0[] = {
- // START: top
- // .. START: SLCR SETTINGS
- // .. UNLOCK_KEY = 0XDF0D
- // .. ==> 0XF8000008[15:0] = 0x0000DF0DU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000DF0DU
- // ..
- EMIT_WRITE(0XF8000008, 0x0000DF0DU),
- // .. FINISH: SLCR SETTINGS
- // .. START: ENABLING LEVEL SHIFTER
- // .. USER_INP_ICT_EN_0 = 3
- // .. ==> 0XF8000900[1:0] = 0x00000003U
- // .. ==> MASK : 0x00000003U VAL : 0x00000003U
- // .. USER_INP_ICT_EN_1 = 3
- // .. ==> 0XF8000900[3:2] = 0x00000003U
- // .. ==> MASK : 0x0000000CU VAL : 0x0000000CU
- // ..
- EMIT_MASKWRITE(0XF8000900, 0x0000000FU ,0x0000000FU),
- // .. FINISH: ENABLING LEVEL SHIFTER
- // .. START: FPGA RESETS TO 0
- // .. reserved_3 = 0
- // .. ==> 0XF8000240[31:25] = 0x00000000U
- // .. ==> MASK : 0xFE000000U VAL : 0x00000000U
- // .. FPGA_ACP_RST = 0
- // .. ==> 0XF8000240[24:24] = 0x00000000U
- // .. ==> MASK : 0x01000000U VAL : 0x00000000U
- // .. FPGA_AXDS3_RST = 0
- // .. ==> 0XF8000240[23:23] = 0x00000000U
- // .. ==> MASK : 0x00800000U VAL : 0x00000000U
- // .. FPGA_AXDS2_RST = 0
- // .. ==> 0XF8000240[22:22] = 0x00000000U
- // .. ==> MASK : 0x00400000U VAL : 0x00000000U
- // .. FPGA_AXDS1_RST = 0
- // .. ==> 0XF8000240[21:21] = 0x00000000U
- // .. ==> MASK : 0x00200000U VAL : 0x00000000U
- // .. FPGA_AXDS0_RST = 0
- // .. ==> 0XF8000240[20:20] = 0x00000000U
- // .. ==> MASK : 0x00100000U VAL : 0x00000000U
- // .. reserved_2 = 0
- // .. ==> 0XF8000240[19:18] = 0x00000000U
- // .. ==> MASK : 0x000C0000U VAL : 0x00000000U
- // .. FSSW1_FPGA_RST = 0
- // .. ==> 0XF8000240[17:17] = 0x00000000U
- // .. ==> MASK : 0x00020000U VAL : 0x00000000U
- // .. FSSW0_FPGA_RST = 0
- // .. ==> 0XF8000240[16:16] = 0x00000000U
- // .. ==> MASK : 0x00010000U VAL : 0x00000000U
- // .. reserved_1 = 0
- // .. ==> 0XF8000240[15:14] = 0x00000000U
- // .. ==> MASK : 0x0000C000U VAL : 0x00000000U
- // .. FPGA_FMSW1_RST = 0
- // .. ==> 0XF8000240[13:13] = 0x00000000U
- // .. ==> MASK : 0x00002000U VAL : 0x00000000U
- // .. FPGA_FMSW0_RST = 0
- // .. ==> 0XF8000240[12:12] = 0x00000000U
- // .. ==> MASK : 0x00001000U VAL : 0x00000000U
- // .. FPGA_DMA3_RST = 0
- // .. ==> 0XF8000240[11:11] = 0x00000000U
- // .. ==> MASK : 0x00000800U VAL : 0x00000000U
- // .. FPGA_DMA2_RST = 0
- // .. ==> 0XF8000240[10:10] = 0x00000000U
- // .. ==> MASK : 0x00000400U VAL : 0x00000000U
- // .. FPGA_DMA1_RST = 0
- // .. ==> 0XF8000240[9:9] = 0x00000000U
- // .. ==> MASK : 0x00000200U VAL : 0x00000000U
- // .. FPGA_DMA0_RST = 0
- // .. ==> 0XF8000240[8:8] = 0x00000000U
- // .. ==> MASK : 0x00000100U VAL : 0x00000000U
- // .. reserved = 0
- // .. ==> 0XF8000240[7:4] = 0x00000000U
- // .. ==> MASK : 0x000000F0U VAL : 0x00000000U
- // .. FPGA3_OUT_RST = 0
- // .. ==> 0XF8000240[3:3] = 0x00000000U
- // .. ==> MASK : 0x00000008U VAL : 0x00000000U
- // .. FPGA2_OUT_RST = 0
- // .. ==> 0XF8000240[2:2] = 0x00000000U
- // .. ==> MASK : 0x00000004U VAL : 0x00000000U
- // .. FPGA1_OUT_RST = 0
- // .. ==> 0XF8000240[1:1] = 0x00000000U
- // .. ==> MASK : 0x00000002U VAL : 0x00000000U
- // .. FPGA0_OUT_RST = 0
- // .. ==> 0XF8000240[0:0] = 0x00000000U
- // .. ==> MASK : 0x00000001U VAL : 0x00000000U
- // ..
- EMIT_MASKWRITE(0XF8000240, 0xFFFFFFFFU ,0x00000000U),
- // .. FINISH: FPGA RESETS TO 0
- // .. START: AFI REGISTERS
- // .. .. START: AFI0 REGISTERS
- // .. .. FINISH: AFI0 REGISTERS
- // .. .. START: AFI1 REGISTERS
- // .. .. FINISH: AFI1 REGISTERS
- // .. .. START: AFI2 REGISTERS
- // .. .. FINISH: AFI2 REGISTERS
- // .. .. START: AFI3 REGISTERS
- // .. .. FINISH: AFI3 REGISTERS
- // .. FINISH: AFI REGISTERS
- // .. START: LOCK IT BACK
- // .. LOCK_KEY = 0X767B
- // .. ==> 0XF8000004[15:0] = 0x0000767BU
- // .. ==> MASK : 0x0000FFFFU VAL : 0x0000767BU
- // ..
- EMIT_WRITE(0XF8000004, 0x0000767BU),
- // .. FINISH: LOCK IT BACK
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-unsigned long ps7_debug_1_0[] = {
- // START: top
- // .. START: CROSS TRIGGER CONFIGURATIONS
- // .. .. START: UNLOCKING CTI REGISTERS
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8898FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8898FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8899FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8899FB0, 0xC5ACCE55U),
- // .. .. KEY = 0XC5ACCE55
- // .. .. ==> 0XF8809FB0[31:0] = 0xC5ACCE55U
- // .. .. ==> MASK : 0xFFFFFFFFU VAL : 0xC5ACCE55U
- // .. ..
- EMIT_WRITE(0XF8809FB0, 0xC5ACCE55U),
- // .. .. FINISH: UNLOCKING CTI REGISTERS
- // .. .. START: ENABLING CTI MODULES AND CHANNELS
- // .. .. FINISH: ENABLING CTI MODULES AND CHANNELS
- // .. .. START: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. .. FINISH: MAPPING CPU0, CPU1 AND FTM EVENTS TO CTM CHANNELS
- // .. FINISH: CROSS TRIGGER CONFIGURATIONS
- // FINISH: top
- //
- EMIT_EXIT(),
-
- //
-};
-
-
-#include "xil_io.h"
-#define PS7_MASK_POLL_TIME 100000000
-
-char*
-getPS7MessageInfo(unsigned key) {
-
- char* err_msg = "";
- switch (key) {
- case PS7_INIT_SUCCESS: err_msg = "PS7 initialization successful"; break;
- case PS7_INIT_CORRUPT: err_msg = "PS7 init Data Corrupted"; break;
- case PS7_INIT_TIMEOUT: err_msg = "PS7 init mask poll timeout"; break;
- case PS7_POLL_FAILED_DDR_INIT: err_msg = "Mask Poll failed for DDR Init"; break;
- case PS7_POLL_FAILED_DMA: err_msg = "Mask Poll failed for PLL Init"; break;
- case PS7_POLL_FAILED_PLL: err_msg = "Mask Poll failed for DMA done bit"; break;
- default: err_msg = "Undefined error status"; break;
- }
-
- return err_msg;
-}
-
-unsigned long
-ps7GetSiliconVersion () {
- // Read PS version from MCTRL register [31:28]
- unsigned long mask = 0xF0000000;
- unsigned long *addr = (unsigned long*) 0XF8007080;
- unsigned long ps_version = (*addr & mask) >> 28;
- return ps_version;
-}
-
-void mask_write (unsigned long add , unsigned long mask, unsigned long val ) {
- volatile unsigned long *addr = (volatile unsigned long*) add;
- *addr = ( val & mask ) | ( *addr & ~mask);
- //xil_printf("MaskWrite : 0x%x--> 0x%x \n \r" ,add, *addr);
-}
-
-
-int mask_poll(unsigned long add , unsigned long mask ) {
- volatile unsigned long *addr = (volatile unsigned long*) add;
- int i = 0;
- while (!(*addr & mask)) {
- if (i == PS7_MASK_POLL_TIME) {
- return -1;
- }
- i++;
- }
- return 1;
- //xil_printf("MaskPoll : 0x%x --> 0x%x \n \r" , add, *addr);
-}
-
-unsigned long mask_read(unsigned long add , unsigned long mask ) {
- volatile unsigned long *addr = (volatile unsigned long*) add;
- unsigned long val = (*addr & mask);
- //xil_printf("MaskRead : 0x%x --> 0x%x \n \r" , add, val);
- return val;
-}
-
-
-
-int
-ps7_config(unsigned long * ps7_config_init)
-{
- unsigned long *ptr = ps7_config_init;
-
- unsigned long opcode; // current instruction ..
- unsigned long args[16]; // no opcode has so many args ...
- int numargs; // number of arguments of this instruction
- int j; // general purpose index
-
- volatile unsigned long *addr; // some variable to make code readable
- unsigned long val,mask; // some variable to make code readable
-
- int finish = -1 ; // loop while this is negative !
- int i = 0; // Timeout variable
-
- while( finish < 0 ) {
- numargs = ptr[0] & 0xF;
- opcode = ptr[0] >> 4;
-
- for( j = 0 ; j < numargs ; j ++ )
- args[j] = ptr[j+1];
- ptr += numargs + 1;
-
-
- switch ( opcode ) {
-
- case OPCODE_EXIT:
- finish = PS7_INIT_SUCCESS;
- break;
-
- case OPCODE_CLEAR:
- addr = (unsigned long*) args[0];
- *addr = 0;
- break;
-
- case OPCODE_WRITE:
- addr = (unsigned long*) args[0];
- val = args[1];
- *addr = val;
- break;
-
- case OPCODE_MASKWRITE:
- addr = (unsigned long*) args[0];
- mask = args[1];
- val = args[2];
- *addr = ( val & mask ) | ( *addr & ~mask);
- break;
-
- case OPCODE_MASKPOLL:
- addr = (unsigned long*) args[0];
- mask = args[1];
- i = 0;
- while (!(*addr & mask)) {
- if (i == PS7_MASK_POLL_TIME) {
- finish = PS7_INIT_TIMEOUT;
- break;
- }
- i++;
- }
- break;
- case OPCODE_MASKDELAY:
- {
- addr = (unsigned long*) args[0];
- mask = args[1];
- int delay = get_number_of_cycles_for_delay(mask);
- perf_reset_and_start_timer();
- while ((*addr < delay)) {
- }
- }
- break;
- default:
- finish = PS7_INIT_CORRUPT;
- break;
- }
- }
- return finish;
-}
-
-unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
-unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0;
-unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0;
-unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0;
-unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;
-
-int
-ps7_post_config()
-{
- // Get the PS_VERSION on run time
- unsigned long si_ver = ps7GetSiliconVersion ();
- int ret = -1;
- if (si_ver == PCW_SILICON_VERSION_1) {
- ret = ps7_config (ps7_post_config_1_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else if (si_ver == PCW_SILICON_VERSION_2) {
- ret = ps7_config (ps7_post_config_2_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else {
- ret = ps7_config (ps7_post_config_3_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- }
- return PS7_INIT_SUCCESS;
-}
-
-int
-ps7_debug()
-{
- // Get the PS_VERSION on run time
- unsigned long si_ver = ps7GetSiliconVersion ();
- int ret = -1;
- if (si_ver == PCW_SILICON_VERSION_1) {
- ret = ps7_config (ps7_debug_1_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else if (si_ver == PCW_SILICON_VERSION_2) {
- ret = ps7_config (ps7_debug_2_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- } else {
- ret = ps7_config (ps7_debug_3_0);
- if (ret != PS7_INIT_SUCCESS) return ret;
- }
- return PS7_INIT_SUCCESS;
-}
-
-
-int
-ps7_init()
-{
- // Get the PS_VERSION on run time
- unsigned long si_ver = ps7GetSiliconVersion ();
- int ret;
- //int pcw_ver = 0;
-
- if (si_ver == PCW_SILICON_VERSION_1) {
- ps7_mio_init_data = ps7_mio_init_data_1_0;
- ps7_pll_init_data = ps7_pll_init_data_1_0;
- ps7_clock_init_data = ps7_clock_init_data_1_0;
- ps7_ddr_init_data = ps7_ddr_init_data_1_0;
- ps7_peripherals_init_data = ps7_peripherals_init_data_1_0;
- //pcw_ver = 1;
-
- } else if (si_ver == PCW_SILICON_VERSION_2) {
- ps7_mio_init_data = ps7_mio_init_data_2_0;
- ps7_pll_init_data = ps7_pll_init_data_2_0;
- ps7_clock_init_data = ps7_clock_init_data_2_0;
- ps7_ddr_init_data = ps7_ddr_init_data_2_0;
- ps7_peripherals_init_data = ps7_peripherals_init_data_2_0;
- //pcw_ver = 2;
-
- } else {
- ps7_mio_init_data = ps7_mio_init_data_3_0;
- ps7_pll_init_data = ps7_pll_init_data_3_0;
- ps7_clock_init_data = ps7_clock_init_data_3_0;
- ps7_ddr_init_data = ps7_ddr_init_data_3_0;
- ps7_peripherals_init_data = ps7_peripherals_init_data_3_0;
- //pcw_ver = 3;
- }
-
- // MIO init
- ret = ps7_config (ps7_mio_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
- // PLL init
- ret = ps7_config (ps7_pll_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
- // Clock init
- ret = ps7_config (ps7_clock_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
- // DDR init
- ret = ps7_config (ps7_ddr_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
-
-
-
- // Peripherals init
- ret = ps7_config (ps7_peripherals_init_data);
- if (ret != PS7_INIT_SUCCESS) return ret;
- //xil_printf ("\n PCW Silicon Version : %d.0", pcw_ver);
- return PS7_INIT_SUCCESS;
-}
-
-
-
-
-/* For delay calculation using global timer */
-
-/* start timer */
- void perf_start_clock(void)
-{
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_CONTROL = ((1 << 0) | // Timer Enable
- (1 << 3) | // Auto-increment
- (0 << 8) // Pre-scale
- );
-}
-
-/* stop timer and reset timer count regs */
- void perf_reset_clock(void)
-{
- perf_disable_clock();
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_COUNT_L32 = 0;
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_COUNT_U32 = 0;
-}
-
-/* Compute mask for given delay in miliseconds*/
-int get_number_of_cycles_for_delay(unsigned int delay)
-{
- // GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- return (APU_FREQ*delay/(2*1000));
-
-}
-
-/* stop timer */
- void perf_disable_clock(void)
-{
- *(volatile unsigned int*)SCU_GLOBAL_TIMER_CONTROL = 0;
-}
-
-void perf_reset_and_start_timer()
-{
- perf_reset_clock();
- perf_start_clock();
-}
-
-
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.h
deleted file mode 100644
index e5c0eec..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_init_gpl.h
+++ /dev/null
@@ -1,131 +0,0 @@
-/******************************************************************************
-*
-* Copyright (C) 2010-2019 <Xilinx Inc.>
-*
-* This program is free software; you can redistribute it and/or modify
-* it under the terms of the GNU General Public License as published by
-* the Free Software Foundation; either version 2 of the License, or
-* (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, see <http://www.gnu.org/licenses/>
-*
-*
-******************************************************************************/
-/****************************************************************************/
-/**
-*
-* @file ps7_init_gpl.h
-*
-* This file can be included in FSBL code
-* to get prototype of ps7_init() function
-* and error codes
-*
-*****************************************************************************/
-
-
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-//typedef unsigned int u32;
-
-
-/** do we need to make this name more unique ? **/
-//extern u32 ps7_init_data[];
-extern unsigned long * ps7_ddr_init_data;
-extern unsigned long * ps7_mio_init_data;
-extern unsigned long * ps7_pll_init_data;
-extern unsigned long * ps7_clock_init_data;
-extern unsigned long * ps7_peripherals_init_data;
-
-
-
-#define OPCODE_EXIT 0U
-#define OPCODE_CLEAR 1U
-#define OPCODE_WRITE 2U
-#define OPCODE_MASKWRITE 3U
-#define OPCODE_MASKPOLL 4U
-#define OPCODE_MASKDELAY 5U
-#define NEW_PS7_ERR_CODE 1
-
-/* Encode number of arguments in last nibble */
-#define EMIT_EXIT() ( (OPCODE_EXIT << 4 ) | 0 )
-#define EMIT_CLEAR(addr) ( (OPCODE_CLEAR << 4 ) | 1 ) , addr
-#define EMIT_WRITE(addr,val) ( (OPCODE_WRITE << 4 ) | 2 ) , addr, val
-#define EMIT_MASKWRITE(addr,mask,val) ( (OPCODE_MASKWRITE << 4 ) | 3 ) , addr, mask, val
-#define EMIT_MASKPOLL(addr,mask) ( (OPCODE_MASKPOLL << 4 ) | 2 ) , addr, mask
-#define EMIT_MASKDELAY(addr,mask) ( (OPCODE_MASKDELAY << 4 ) | 2 ) , addr, mask
-
-/* Returns codes of PS7_Init */
-#define PS7_INIT_SUCCESS (0) // 0 is success in good old C
-#define PS7_INIT_CORRUPT (1) // 1 the data is corrupted, and slcr reg are in corrupted state now
-#define PS7_INIT_TIMEOUT (2) // 2 when a poll operation timed out
-#define PS7_POLL_FAILED_DDR_INIT (3) // 3 when a poll operation timed out for ddr init
-#define PS7_POLL_FAILED_DMA (4) // 4 when a poll operation timed out for dma done bit
-#define PS7_POLL_FAILED_PLL (5) // 5 when a poll operation timed out for pll sequence init
-
-
-/* Silicon Versions */
-#define PCW_SILICON_VERSION_1 0
-#define PCW_SILICON_VERSION_2 1
-#define PCW_SILICON_VERSION_3 2
-
-/* This flag to be used by FSBL to check whether ps7_post_config() proc exixts */
-#define PS7_POST_CONFIG
-
-/* Freq of all peripherals */
-
-#define APU_FREQ 750000000
-#define DDR_FREQ 500000000
-#define DCI_FREQ 10204082
-#define QSPI_FREQ 134615387
-#define SMC_FREQ 10000000
-#define ENET0_FREQ 125000000
-#define ENET1_FREQ 10000000
-#define USB0_FREQ 60000000
-#define USB1_FREQ 60000000
-#define SDIO_FREQ 97222221
-#define UART_FREQ 97222221
-#define SPI_FREQ 159090912
-#define I2C_FREQ 125000000
-#define WDT_FREQ 125000000
-#define TTC_FREQ 50000000
-#define CAN_FREQ 97222221
-#define PCAP_FREQ 194444443
-#define TPIU_FREQ 200000000
-#define FPGA0_FREQ 125000000
-#define FPGA1_FREQ 10000000
-#define FPGA2_FREQ 10000000
-#define FPGA3_FREQ 10000000
-
-
-/* For delay calculation using global registers*/
-#define SCU_GLOBAL_TIMER_COUNT_L32 0xF8F00200
-#define SCU_GLOBAL_TIMER_COUNT_U32 0xF8F00204
-#define SCU_GLOBAL_TIMER_CONTROL 0xF8F00208
-#define SCU_GLOBAL_TIMER_AUTO_INC 0xF8F00218
-
-int ps7_config( unsigned long*);
-int ps7_init();
-int ps7_post_config();
-int ps7_debug();
-char* getPS7MessageInfo(unsigned key);
-
-void perf_start_clock(void);
-void perf_disable_clock(void);
-void perf_reset_clock(void);
-void perf_reset_and_start_timer();
-int get_number_of_cycles_for_delay(unsigned int delay);
-#ifdef __cplusplus
-}
-#endif
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_parameters.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_parameters.xml
deleted file mode 100644
index ed64844..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/ps7_parameters.xml
+++ /dev/null
@@ -1,643 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" ?>
-<!DOCTYPE designInfo PUBLIC "designInfo" "designInfo.dtd" >
-<designInfo version="1.0" >
- <MODULE IP_TYPE="SOC" MOD_CLASS="CONFIGURABLE" MODTYPE="processing_system7" >
- <PARAMETERS >
- <PARAMETER NAME="PCW_APU_CLK_RATIO_ENABLE" VALUE="6:2:1" />
- <PARAMETER NAME="PCW_APU_PERIPHERAL_FREQMHZ" VALUE="750" />
- <PARAMETER NAME="PCW_ARMPLL_CTRL_FBDIV" VALUE="30" />
- <PARAMETER NAME="PCW_CAN0_CAN0_IO" VALUE="" />
- <PARAMETER NAME="PCW_CAN0_GRP_CLK_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_CAN0_GRP_CLK_IO" VALUE="" />
- <PARAMETER NAME="PCW_CAN0_PERIPHERAL_CLKSRC" VALUE="External" />
- <PARAMETER NAME="PCW_CAN0_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_CAN0_PERIPHERAL_FREQMHZ" VALUE="" />
- <PARAMETER NAME="PCW_CAN1_CAN1_IO" VALUE="MIO 52 .. 53" />
- <PARAMETER NAME="PCW_CAN1_GRP_CLK_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_CAN1_GRP_CLK_IO" VALUE="" />
- <PARAMETER NAME="PCW_CAN1_PERIPHERAL_CLKSRC" VALUE="External" />
- <PARAMETER NAME="PCW_CAN1_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_CAN1_PERIPHERAL_FREQMHZ" VALUE="" />
- <PARAMETER NAME="PCW_CAN_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_CAN_PERIPHERAL_DIVISOR0" VALUE="18" />
- <PARAMETER NAME="PCW_CAN_PERIPHERAL_DIVISOR1" VALUE="1" />
- <PARAMETER NAME="PCW_CAN_PERIPHERAL_FREQMHZ" VALUE="100" />
- <PARAMETER NAME="PCW_CPU_CPU_PLL_FREQMHZ" VALUE="1500.000" />
- <PARAMETER NAME="PCW_CPU_PERIPHERAL_CLKSRC" VALUE="ARM PLL" />
- <PARAMETER NAME="PCW_CPU_PERIPHERAL_DIVISOR0" VALUE="2" />
- <PARAMETER NAME="PCW_CRYSTAL_PERIPHERAL_FREQMHZ" VALUE="50" />
- <PARAMETER NAME="PCW_DCI_PERIPHERAL_CLKSRC" VALUE="DDR PLL" />
- <PARAMETER NAME="PCW_DCI_PERIPHERAL_DIVISOR0" VALUE="49" />
- <PARAMETER NAME="PCW_DCI_PERIPHERAL_DIVISOR1" VALUE="2" />
- <PARAMETER NAME="PCW_DCI_PERIPHERAL_FREQMHZ" VALUE="10.159" />
- <PARAMETER NAME="PCW_DDRPLL_CTRL_FBDIV" VALUE="20" />
- <PARAMETER NAME="PCW_DDR_DDR_PLL_FREQMHZ" VALUE="1000.000" />
- <PARAMETER NAME="PCW_DDR_HPRLPR_QUEUE_PARTITION" VALUE="HPR(0)/LPR(32)" />
- <PARAMETER NAME="PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL" VALUE="15" />
- <PARAMETER NAME="PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL" VALUE="2" />
- <PARAMETER NAME="PCW_DDR_PERIPHERAL_CLKSRC" VALUE="DDR PLL" />
- <PARAMETER NAME="PCW_DDR_PERIPHERAL_DIVISOR0" VALUE="2" />
- <PARAMETER NAME="PCW_DDR_PORT0_HPR_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PORT1_HPR_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PORT2_HPR_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PORT3_HPR_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_0" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_1" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_2" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_READPORT_3" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_0" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_1" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_2" VALUE="" />
- <PARAMETER NAME="PCW_DDR_PRIORITY_WRITEPORT_3" VALUE="" />
- <PARAMETER NAME="PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL" VALUE="2" />
- <PARAMETER NAME="PCW_DUAL_PARALLEL_QSPI_DATA_MODE" VALUE="" />
- <PARAMETER NAME="PCW_DUAL_STACK_QSPI_DATA_MODE" VALUE="" />
- <PARAMETER NAME="PCW_ENET0_ENET0_IO" VALUE="MIO 16 .. 27" />
- <PARAMETER NAME="PCW_ENET0_GRP_MDIO_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_ENET0_GRP_MDIO_IO" VALUE="" />
- <PARAMETER NAME="PCW_ENET0_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_ENET0_PERIPHERAL_DIVISOR0" VALUE="14" />
- <PARAMETER NAME="PCW_ENET0_PERIPHERAL_DIVISOR1" VALUE="1" />
- <PARAMETER NAME="PCW_ENET0_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_ENET0_PERIPHERAL_FREQMHZ" VALUE="1000 Mbps" />
- <PARAMETER NAME="PCW_ENET0_RESET_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_ENET0_RESET_IO" VALUE="" />
- <PARAMETER NAME="PCW_ENET1_ENET1_IO" VALUE="" />
- <PARAMETER NAME="PCW_ENET1_GRP_MDIO_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_ENET1_GRP_MDIO_IO" VALUE="" />
- <PARAMETER NAME="PCW_ENET1_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_ENET1_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_ENET1_PERIPHERAL_DIVISOR1" VALUE="1" />
- <PARAMETER NAME="PCW_ENET1_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_ENET1_PERIPHERAL_FREQMHZ" VALUE="1000 Mbps" />
- <PARAMETER NAME="PCW_ENET1_RESET_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_ENET1_RESET_IO" VALUE="" />
- <PARAMETER NAME="PCW_ENET_RESET_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_ENET_RESET_POLARITY" VALUE="Active Low" />
- <PARAMETER NAME="PCW_ENET_RESET_SELECT" VALUE="Share reset pin" />
- <PARAMETER NAME="PCW_EN_4K_TIMER" VALUE="0" />
- <PARAMETER NAME="PCW_EN_CLK0_PORT" VALUE="1" />
- <PARAMETER NAME="PCW_EN_CLK1_PORT" VALUE="0" />
- <PARAMETER NAME="PCW_EN_CLK2_PORT" VALUE="0" />
- <PARAMETER NAME="PCW_EN_CLK3_PORT" VALUE="0" />
- <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_DIVISOR0" VALUE="7" />
- <PARAMETER NAME="PCW_FCLK0_PERIPHERAL_DIVISOR1" VALUE="2" />
- <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_FCLK1_PERIPHERAL_DIVISOR1" VALUE="1" />
- <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_FCLK2_PERIPHERAL_DIVISOR1" VALUE="1" />
- <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_FCLK3_PERIPHERAL_DIVISOR1" VALUE="1" />
- <PARAMETER NAME="PCW_FCLK_CLK0_BUF" VALUE="TRUE" />
- <PARAMETER NAME="PCW_FCLK_CLK1_BUF" VALUE="FALSE" />
- <PARAMETER NAME="PCW_FCLK_CLK2_BUF" VALUE="FALSE" />
- <PARAMETER NAME="PCW_FCLK_CLK3_BUF" VALUE="FALSE" />
- <PARAMETER NAME="PCW_FPGA0_PERIPHERAL_FREQMHZ" VALUE="125" />
- <PARAMETER NAME="PCW_FPGA1_PERIPHERAL_FREQMHZ" VALUE="50" />
- <PARAMETER NAME="PCW_FPGA2_PERIPHERAL_FREQMHZ" VALUE="50" />
- <PARAMETER NAME="PCW_FPGA3_PERIPHERAL_FREQMHZ" VALUE="50" />
- <PARAMETER NAME="PCW_FTM_CTI_IN0" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_IN1" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_IN2" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_IN3" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_OUT0" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_OUT1" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_OUT2" VALUE="" />
- <PARAMETER NAME="PCW_FTM_CTI_OUT3" VALUE="" />
- <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_GPIO_EMIO_GPIO_IO" VALUE="" />
- <PARAMETER NAME="PCW_GPIO_MIO_GPIO_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_GPIO_MIO_GPIO_IO" VALUE="MIO" />
- <PARAMETER NAME="PCW_GPIO_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_I2C0_GRP_INT_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_I2C0_GRP_INT_IO" VALUE="" />
- <PARAMETER NAME="PCW_I2C0_I2C0_IO" VALUE="MIO 50 .. 51" />
- <PARAMETER NAME="PCW_I2C0_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_I2C0_RESET_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_I2C0_RESET_IO" VALUE="" />
- <PARAMETER NAME="PCW_I2C1_GRP_INT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_I2C1_GRP_INT_IO" VALUE="" />
- <PARAMETER NAME="PCW_I2C1_I2C1_IO" VALUE="" />
- <PARAMETER NAME="PCW_I2C1_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_I2C1_RESET_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_I2C1_RESET_IO" VALUE="" />
- <PARAMETER NAME="PCW_I2C_RESET_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_I2C_RESET_POLARITY" VALUE="Active Low" />
- <PARAMETER NAME="PCW_I2C_RESET_SELECT" VALUE="Share reset pin" />
- <PARAMETER NAME="PCW_IOPLL_CTRL_FBDIV" VALUE="35" />
- <PARAMETER NAME="PCW_IO_IO_PLL_FREQMHZ" VALUE="1750.000" />
- <PARAMETER NAME="PCW_IRQ_F2P_MODE" VALUE="DIRECT" />
- <PARAMETER NAME="PCW_MIO_0_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_0_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_0_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_0_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_10_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_10_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_10_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_10_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_11_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_11_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_11_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_11_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_12_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_12_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_12_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_12_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_13_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_13_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_13_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_13_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_14_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_14_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_14_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_14_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_15_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_15_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_15_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_15_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_16_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_16_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_16_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_16_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_17_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_17_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_17_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_17_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_18_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_18_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_18_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_18_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_19_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_19_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_19_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_19_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_1_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_1_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_1_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_1_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_20_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_20_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_20_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_20_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_21_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_21_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_21_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_21_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_22_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_22_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_22_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_22_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_23_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_23_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_23_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_23_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_24_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_24_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_24_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_24_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_25_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_25_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_25_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_25_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_26_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_26_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_26_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_26_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_27_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_27_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_27_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_27_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_28_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_28_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_28_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_28_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_29_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_29_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_29_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_29_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_2_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_2_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_2_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_2_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_30_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_30_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_30_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_30_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_31_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_31_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_31_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_31_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_32_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_32_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_32_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_32_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_33_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_33_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_33_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_33_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_34_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_34_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_34_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_34_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_35_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_35_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_35_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_35_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_36_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_36_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_36_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_36_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_37_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_37_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_37_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_37_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_38_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_38_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_38_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_38_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_39_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_39_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_39_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_39_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_3_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_3_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_3_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_3_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_40_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_40_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_40_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_40_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_41_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_41_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_41_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_41_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_42_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_42_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_42_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_42_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_43_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_43_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_43_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_43_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_44_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_44_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_44_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_44_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_45_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_45_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_45_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_45_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_46_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_46_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_46_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_46_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_47_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_47_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_47_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_47_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_48_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_48_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_48_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_48_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_49_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_49_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_49_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_49_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_4_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_4_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_4_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_4_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_50_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_50_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_50_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_50_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_51_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_51_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_51_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_51_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_52_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_52_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_52_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_52_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_53_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_53_IOTYPE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_MIO_53_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_53_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_5_DIRECTION" VALUE="inout" />
- <PARAMETER NAME="PCW_MIO_5_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_5_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_5_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_6_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_6_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_6_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_6_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_7_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_7_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_7_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_7_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_8_DIRECTION" VALUE="out" />
- <PARAMETER NAME="PCW_MIO_8_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_8_PULLUP" VALUE="disabled" />
- <PARAMETER NAME="PCW_MIO_8_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_MIO_9_DIRECTION" VALUE="in" />
- <PARAMETER NAME="PCW_MIO_9_IOTYPE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_MIO_9_PULLUP" VALUE="enabled" />
- <PARAMETER NAME="PCW_MIO_9_SLEW" VALUE="slow" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_AR" VALUE="1" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_CLR" VALUE="1" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_RC" VALUE="11" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_REA" VALUE="1" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_RR" VALUE="1" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_WC" VALUE="11" />
- <PARAMETER NAME="PCW_NAND_CYCLES_T_WP" VALUE="1" />
- <PARAMETER NAME="PCW_NAND_GRP_D8_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NAND_GRP_D8_IO" VALUE="" />
- <PARAMETER NAME="PCW_NAND_NAND_IO" VALUE="" />
- <PARAMETER NAME="PCW_NAND_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_NOR_CS0_T_CEOE" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS0_T_PC" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS0_T_RC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_CS0_T_TR" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS0_T_WC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_CS0_T_WP" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS0_WE_TIME" VALUE="0" />
- <PARAMETER NAME="PCW_NOR_CS1_T_CEOE" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS1_T_PC" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS1_T_RC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_CS1_T_TR" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS1_T_WC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_CS1_T_WP" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_CS1_WE_TIME" VALUE="0" />
- <PARAMETER NAME="PCW_NOR_GRP_A25_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_A25_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_CS0_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_CS0_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_CS1_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_CS1_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS0_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS0_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS1_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_SRAM_CS1_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_SRAM_INT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_NOR_GRP_SRAM_INT_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_NOR_IO" VALUE="" />
- <PARAMETER NAME="PCW_NOR_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_CEOE" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_PC" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_RC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_TR" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_WC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_T_WP" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS0_WE_TIME" VALUE="0" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_CEOE" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_PC" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_RC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_TR" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_WC" VALUE="11" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_T_WP" VALUE="1" />
- <PARAMETER NAME="PCW_NOR_SRAM_CS1_WE_TIME" VALUE="0" />
- <PARAMETER NAME="PCW_OVERRIDE_BASIC_CLOCK" VALUE="0" />
- <PARAMETER NAME="PCW_PCAP_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_PCAP_PERIPHERAL_DIVISOR0" VALUE="9" />
- <PARAMETER NAME="PCW_PCAP_PERIPHERAL_FREQMHZ" VALUE="200" />
- <PARAMETER NAME="PCW_PJTAG_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_PJTAG_PJTAG_IO" VALUE="" />
- <PARAMETER NAME="PCW_PLL_BYPASSMODE_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_PRESET_BANK0_VOLTAGE" VALUE="LVCMOS 3.3V" />
- <PARAMETER NAME="PCW_PRESET_BANK1_VOLTAGE" VALUE="LVCMOS 2.5V" />
- <PARAMETER NAME="PCW_QSPI_GRP_FBCLK_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_QSPI_GRP_FBCLK_IO" VALUE="" />
- <PARAMETER NAME="PCW_QSPI_GRP_IO1_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_QSPI_GRP_IO1_IO" VALUE="" />
- <PARAMETER NAME="PCW_QSPI_GRP_SINGLE_SS_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_QSPI_GRP_SINGLE_SS_IO" VALUE="MIO 1 .. 6" />
- <PARAMETER NAME="PCW_QSPI_GRP_SS1_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_QSPI_GRP_SS1_IO" VALUE="" />
- <PARAMETER NAME="PCW_QSPI_INTERNAL_HIGHADDRESS" VALUE="0xFCFFFFFF" />
- <PARAMETER NAME="PCW_QSPI_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_QSPI_PERIPHERAL_DIVISOR0" VALUE="13" />
- <PARAMETER NAME="PCW_QSPI_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_QSPI_PERIPHERAL_FREQMHZ" VALUE="133" />
- <PARAMETER NAME="PCW_QSPI_QSPI_IO" VALUE="MIO 1 .. 6" />
- <PARAMETER NAME="PCW_SD0_GRP_CD_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_SD0_GRP_CD_IO" VALUE="" />
- <PARAMETER NAME="PCW_SD0_GRP_POW_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_SD0_GRP_POW_IO" VALUE="" />
- <PARAMETER NAME="PCW_SD0_GRP_WP_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_SD0_GRP_WP_IO" VALUE="" />
- <PARAMETER NAME="PCW_SD0_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_SD0_SD0_IO" VALUE="" />
- <PARAMETER NAME="PCW_SD1_GRP_CD_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SD1_GRP_CD_IO" VALUE="MIO 9" />
- <PARAMETER NAME="PCW_SD1_GRP_POW_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_SD1_GRP_POW_IO" VALUE="" />
- <PARAMETER NAME="PCW_SD1_GRP_WP_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_SD1_GRP_WP_IO" VALUE="" />
- <PARAMETER NAME="PCW_SD1_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SD1_SD1_IO" VALUE="MIO 10 .. 15" />
- <PARAMETER NAME="PCW_SDIO_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_SDIO_PERIPHERAL_DIVISOR0" VALUE="18" />
- <PARAMETER NAME="PCW_SDIO_PERIPHERAL_FREQMHZ" VALUE="100" />
- <PARAMETER NAME="PCW_SINGLE_QSPI_DATA_MODE" VALUE="x4" />
- <PARAMETER NAME="PCW_SMC_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_SMC_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_SMC_PERIPHERAL_FREQMHZ" VALUE="100" />
- <PARAMETER NAME="PCW_SPI0_GRP_SS0_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SPI0_GRP_SS0_IO" VALUE="MIO 42" />
- <PARAMETER NAME="PCW_SPI0_GRP_SS1_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_SPI0_GRP_SS1_IO" VALUE="" />
- <PARAMETER NAME="PCW_SPI0_GRP_SS2_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_SPI0_GRP_SS2_IO" VALUE="" />
- <PARAMETER NAME="PCW_SPI0_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SPI0_SPI0_IO" VALUE="MIO 40 .. 45" />
- <PARAMETER NAME="PCW_SPI1_GRP_SS0_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SPI1_GRP_SS0_IO" VALUE="EMIO" />
- <PARAMETER NAME="PCW_SPI1_GRP_SS1_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SPI1_GRP_SS1_IO" VALUE="EMIO" />
- <PARAMETER NAME="PCW_SPI1_GRP_SS2_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SPI1_GRP_SS2_IO" VALUE="EMIO" />
- <PARAMETER NAME="PCW_SPI1_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_SPI1_SPI1_IO" VALUE="EMIO" />
- <PARAMETER NAME="PCW_SPI_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_SPI_PERIPHERAL_DIVISOR0" VALUE="11" />
- <PARAMETER NAME="PCW_SPI_PERIPHERAL_FREQMHZ" VALUE="166.666666" />
- <PARAMETER NAME="PCW_S_AXI_HP0_DATA_WIDTH" VALUE="64" />
- <PARAMETER NAME="PCW_S_AXI_HP1_DATA_WIDTH" VALUE="64" />
- <PARAMETER NAME="PCW_S_AXI_HP2_DATA_WIDTH" VALUE="64" />
- <PARAMETER NAME="PCW_S_AXI_HP3_DATA_WIDTH" VALUE="64" />
- <PARAMETER NAME="PCW_TPIU_PERIPHERAL_CLKSRC" VALUE="External" />
- <PARAMETER NAME="PCW_TPIU_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TPIU_PERIPHERAL_FREQMHZ" VALUE="200" />
- <PARAMETER NAME="PCW_TRACE_GRP_16BIT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_16BIT_IO" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_2BIT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_2BIT_IO" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_32BIT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_32BIT_IO" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_4BIT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_4BIT_IO" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_8BIT_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_GRP_8BIT_IO" VALUE="" />
- <PARAMETER NAME="PCW_TRACE_INTERNAL_WIDTH" VALUE="2" />
- <PARAMETER NAME="PCW_TRACE_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_TRACE_TRACE_IO" VALUE="" />
- <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_TTC0_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_TTC0_TTC0_IO" VALUE="" />
- <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_TTC1_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_TTC1_TTC1_IO" VALUE="" />
- <PARAMETER NAME="PCW_TTC_PERIPHERAL_FREQMHZ" VALUE="50" />
- <PARAMETER NAME="PCW_UART0_BAUD_RATE" VALUE="115200" />
- <PARAMETER NAME="PCW_UART0_GRP_FULL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_UART0_GRP_FULL_IO" VALUE="" />
- <PARAMETER NAME="PCW_UART0_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_UART0_UART0_IO" VALUE="MIO 46 .. 47" />
- <PARAMETER NAME="PCW_UART1_BAUD_RATE" VALUE="115200" />
- <PARAMETER NAME="PCW_UART1_GRP_FULL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_UART1_GRP_FULL_IO" VALUE="" />
- <PARAMETER NAME="PCW_UART1_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_UART1_UART1_IO" VALUE="MIO 48 .. 49" />
- <PARAMETER NAME="PCW_UART_PERIPHERAL_CLKSRC" VALUE="IO PLL" />
- <PARAMETER NAME="PCW_UART_PERIPHERAL_DIVISOR0" VALUE="18" />
- <PARAMETER NAME="PCW_UART_PERIPHERAL_FREQMHZ" VALUE="100" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_ADV_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_AL" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BANK_ADDR_COUNT" VALUE="3" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BL" VALUE="8" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY0" VALUE="0.25" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY1" VALUE="0.25" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY2" VALUE="0.25" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BOARD_DELAY3" VALUE="0.25" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_BUS_WIDTH" VALUE="16 Bit" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CL" VALUE="7" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH" VALUE="76.428" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH" VALUE="76.428" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH" VALUE="76.428" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH" VALUE="76.428" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CLOCK_STOP_EN" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_COL_ADDR_COUNT" VALUE="10" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_CWL" VALUE="6" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DEVICE_CAPACITY" VALUE="2048 MBits" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH" VALUE="76.687" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH" VALUE="77.8025" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH" VALUE="72.8405" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH" VALUE="111.904" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0" VALUE="0.0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1" VALUE="0.0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2" VALUE="0.0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3" VALUE="0.0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH" VALUE="73.119" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH" VALUE="63.8935" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH" VALUE="77.045" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_LENGTH_MM" VALUE="0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH" VALUE="111.903" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY" VALUE="160" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_DRAM_WIDTH" VALUE="16 Bits" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_ECC" VALUE="Disabled" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_FREQ_MHZ" VALUE="500" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_HIGH_TEMP" VALUE="Normal (0-85)" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_MEMORY_TYPE" VALUE="DDR 3 (Low Voltage)" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_PARTNO" VALUE="MT41K128M16 JT-125" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_ROW_ADDR_COUNT" VALUE="14" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_SPEED_BIN" VALUE="DDR3_1066F" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_DATA_EYE" VALUE="1" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_READ_GATE" VALUE="1" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL" VALUE="1" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_T_FAW" VALUE="40.0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_T_RAS_MIN" VALUE="35.0" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_T_RC" VALUE="48.75" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_T_RCD" VALUE="7" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_T_RP" VALUE="7" />
- <PARAMETER NAME="PCW_UIPARAM_DDR_USE_INTERNAL_VREF" VALUE="0" />
- <PARAMETER NAME="PCW_USB0_PERIPHERAL_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_USB0_PERIPHERAL_FREQMHZ" VALUE="60" />
- <PARAMETER NAME="PCW_USB0_RESET_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_USB0_RESET_IO" VALUE="" />
- <PARAMETER NAME="PCW_USB0_USB0_IO" VALUE="MIO 28 .. 39" />
- <PARAMETER NAME="PCW_USB1_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_USB1_PERIPHERAL_FREQMHZ" VALUE="60" />
- <PARAMETER NAME="PCW_USB1_RESET_ENABLE" VALUE="" />
- <PARAMETER NAME="PCW_USB1_RESET_IO" VALUE="" />
- <PARAMETER NAME="PCW_USB1_USB1_IO" VALUE="" />
- <PARAMETER NAME="PCW_USB_RESET_ENABLE" VALUE="1" />
- <PARAMETER NAME="PCW_USB_RESET_POLARITY" VALUE="Active Low" />
- <PARAMETER NAME="PCW_USB_RESET_SELECT" VALUE="Share reset pin" />
- <PARAMETER NAME="PCW_USE_AXI_NONSECURE" VALUE="0" />
- <PARAMETER NAME="PCW_USE_CROSS_TRIGGER" VALUE="0" />
- <PARAMETER NAME="PCW_USE_M_AXI_GP0" VALUE="1" />
- <PARAMETER NAME="PCW_USE_M_AXI_GP1" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_ACP" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_GP0" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_GP1" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_HP0" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_HP1" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_HP2" VALUE="0" />
- <PARAMETER NAME="PCW_USE_S_AXI_HP3" VALUE="0" />
- <PARAMETER NAME="PCW_WDT_PERIPHERAL_CLKSRC" VALUE="CPU_1X" />
- <PARAMETER NAME="PCW_WDT_PERIPHERAL_DIVISOR0" VALUE="1" />
- <PARAMETER NAME="PCW_WDT_PERIPHERAL_ENABLE" VALUE="0" />
- <PARAMETER NAME="PCW_WDT_PERIPHERAL_FREQMHZ" VALUE="133.333333" />
- <PARAMETER NAME="PCW_WDT_WDT_IO" VALUE="" />
- </PARAMETERS>
- <BUSINTERFACES >
- <BUSINTERFACE NAME="M_AXI_GP0" TYPE="MASTER" WIDTH="32" PARAMTOENABLE="PCW_USE_M_AXI_GP0" VALUE="1" />
- <BUSINTERFACE NAME="M_AXI_GP1" TYPE="MASTER" WIDTH="32" PARAMTOENABLE="PCW_USE_M_AXI_GP1" VALUE="0" />
- <BUSINTERFACE NAME="S_AXI_GP0" TYPE="TARGET" WIDTH="32" PARAMTOENABLE="PCW_USE_S_AXI_GP0" VALUE="0" />
- <BUSINTERFACE NAME="S_AXI_GP0" TYPE="TARGET" WIDTH="32" PARAMTOENABLE="PCW_USE_S_AXI_GP1" VALUE="0" />
- <BUSINTERFACE NAME="S_AXI_HP0" TYPE="TARGET" WIDTH="64" PARAMTOENABLE="PCW_USE_S_AXI_HP0" VALUE="0" />
- <BUSINTERFACE NAME="S_AXI_HP1" TYPE="TARGET" WIDTH="64" PARAMTOENABLE="PCW_USE_S_AXI_HP1" VALUE="0" />
- <BUSINTERFACE NAME="S_AXI_HP2" TYPE="TARGET" WIDTH="64" PARAMTOENABLE="PCW_USE_S_AXI_HP2" VALUE="0" />
- <BUSINTERFACE NAME="S_AXI_HP3" TYPE="TARGET" WIDTH="64" PARAMTOENABLE="PCW_USE_S_AXI_HP1" VALUE="0" />
- </BUSINTERFACES>
- <CLOCKOUTS >
- <CLOCKOUT NAME="FCLK_CLK0" FREQUENCY="125.000000" />
- <CLOCKOUT NAME="FCLK_CLK1" FREQUENCY="10.000000" />
- <CLOCKOUT NAME="FCLK_CLK2" FREQUENCY="10.000000" />
- <CLOCKOUT NAME="FCLK_CLK3" FREQUENCY="10.000000" />
- </CLOCKOUTS>
- </MODULE>
-</designInfo>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.dcp
deleted file mode 100644
index e81d6690a9a631b5127cd968836d28866827def0..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 218914
zcmWIWW@Zs#U|`^22#!||oVwHP$R0)ph5%Lu26hGphLq$2y^7qNxl>~EXB$Ykt)CvB
zShzLTgmqTS60e}veiIKCCA(R7B3XQrdvBaE>-lnBUvtZB6W^x0zbb3`{ziTJv(oPQ
z0;is2FR@8RQ<g4&nvgdq;M3j(GdMncnrZ8i(9N03?Ky2)vwpGdCRyQK7sIyKJUEuV
zWkQJWJio1-CH1GTPkemfd(dpQ>IKs+{2im2r!?4lHF|3^s5ykn$*1+7;>c+hSh2|{
z+raw1v9fZGr2dYsV6Iisb|D9^pM3GI<LLHnQpOj*y>h9ZJhgDr{=Q|8t+$?Zj@n}A
z|7cG`zWArb4>ly2IL=A_#Pze4yX4veo~LQuos~6bF0K-}^6iV!>2;4YB)u+w@Oqfa
zrpk0x{*&28?tZm8&v}B5I%3;r|C7u=6D!x<v#EIZJ+12&?h1QEw%?B0_qO7^0f%zz
ztGbdCu9Y%j*S{~y?6^Pm@y(niD`y$~y}i+J?thUvm-ftloFH|fY~jP53rjhEcNjE!
z8sAQwt9Cc%VA|HrRUU1BM8sD}-!^(%DsSSoIqyO9ZT9HNc_Ft=|JcR&2wm%aGkdjN
z!n9*|cT{h_UQ=H-cYQu<+!OY&3+?9wmaFbo`(JYAef|Hbrw=|5M~&d9w@l5!3=9l?
z3=9k!3=9m#$%#1y@l}<1g$2d&1x5MEsl~;adFk=RmBl5gx#sZ(@dkRCdC5iGC(oQc
z<K18GspHvGep<il`x$RNud}{qwLQ-io<6Cs@2zWe#n{{^NW)L}l+T%yYrJ$$o;kmH
zlb4Ryxf43xp#~<Q1_1`lNeYM9dIKvYE@e#MW<YgV*F%%s7aj}@DvMbdG>LRraYkZ6
z>f5>O4dO??9-rx)5P9oyc|*5o$dSI14f4kWm&g<?NU{zL6wHa(IFI$s-q}Z_lD$o)
zsnq|LjDBPLO|H5-Hu?AY?`Ln{KYK22(Tl>E%FpNH@6~<#JzICX_2+xDZ{FRzdrRi$
zk8fLhx6QFF|0c)&ZKloZ2D{MR=k8>O&A({;eeTY~XKK^dUR_>ue($sMv-h4}_xqdV
zmUjmfYfn8p_x5o2?=LgWv*$;C{x*N>WvkQrSC{$DuKV`?_L{rb{-r;#GG)lU)l>66
zBz?--qLs$SW`4UEE`Rr1=<=tF<S!?2-F2JptG!yzw)D?4(aEdbLwnu|ZPhH96J@rt
z>UeDWxqHn@!7ps)il@KZ{P@h=w9-y5E?M_*-@?_qU30nT9t-bVB^PhGD=Fz_&$^32
ztuv-qZj8R-7Zx7sBO4odRW~dCMaavX-;)EE2DUqGf3)fMc9SlyyGPa~%f2r8l%FXQ
zJ@<CbDs7j!T(NhTy$(q44!U{d)W*lBce}@O#RiE^zO*7cHa4hU@m1K1S*}Y3D|f%X
zCc5Zd*tB=E7BsoW6s~$DH&tvGM^Vbm748eeD<eZIZ@%cdShTBabyd~sOR>-Ey%xun
zxi6n`Grnh*U0TW28<~%{y^+z4?U>O!H%)w!Q_BCf>$Ws3y4QMcQ`()h%Z$@BOT=c2
z-d&vfcIAY<+fDn{zY)?6f6-wtsbAVZZTss~@fiVIn${XKhv}4j6OCPL*Se$P$KqYC
zwS~MV0z>*<Nv%x@ukO}9EqZvrhRf;)=S^2ttuCA@?7ms6^OtDVj;)W6_k0YS;<ox)
ztY+Ee$;+mNmvsNyt?f6B`(oBnZKr_DExYC%-gtT2Dv6LtyR|t<nOoczM&DJMKU?qO
zEDK=)zm-z=l%rNVl>WA?3V6CgGI(0wHN7cm>r{?cyS^6TlKeQsQ0#jjn@Ck#QQYQ|
zEqM#KygRWf_@1#;#EW@PWBw{c*Dh<ys?OrNm{7fD^4r8uR|D;GUmc0NIKe4#OYHQc
zcNZ<JnWh%HyY%j>pr$u<T*FPz#eflL+q&MLKi&#mIo7k;LgW5BfE>^V$NnBo~
zJ~h;L^$e}jFJ0I4MP$~`ir7}!`rzF~wr^dNy31o@X53xO`}%}~yO~zW#{XfDpRai>
zmpez5*?Y0?2XX1}Si5yOpPqDeUj6nyL~82QyYn|KZp{e!n5HA=V=3?Rb;ZZatJM1R
z*DuH@Sy;TQp?i~iNZ<mc3G+*PkKN!d|MTQ*rTVhc{$pwUNA5j&yoo*OWW}3rJpUcc
z&I(m42p1?A|6zV9>#OtSOJtz$#U)P93m3o6Tfgq&6Q>x{#aTg5Q~qqq4vFkI9y+ym
zn|5U(mzewXrQNfacJEl{y?Et~FH2sn6iq&*?w8=188S6-o$SoEw8L?{mrqyxw{pLn
zJGuGw?RVkNGm5u2%zY!4o48)(W^^^zF4t%=t4M9z2EU6vPVFD3UXAvXOt<b{%k}Y!
zVd?K(red$ZmCi1?`1bX-o9k93eR|P%v8=UBc)7o{@v`KQv)7(@isZ(>I1^TSb<4`f
zr{Bt*(J9f=pKUeu{Iee?Wf#kGz1_BEPL$o^<Soey?=E>6-6wg`@Yc!5!`5z_=a_DC
z-cr0U_v)3-xr<`CWKXI49bf8uab1k%ufu`D+NYP5cBF~lx^-_u@s?=CO(hRD=(2~E
z_B|63f3tGdY(1V$*=7FXZ8utNFSQDmCHlun*mP*$SiK`b`-XL_1MBBYtRWlxcNr|w
z>ied<<$0^;+{J%eZtt>o|NZ&U2E~|<j7M3cKQ_KRr11Om&p)3Noz+Ua__Rt2o^|M5
zJotu(N5<sPzdhb19(O0@%JV;6>gZf}A$HN>SJU3?I$W9g!a>G=`if&Wd_#B1mv#0P
zc<U^E;Sv1eN!}LE)ThC@>?KnUetj~n%Edie{AjH0yHA_bmS;3-ZYdY9RgB7b^=?;T
zhTXKzKErKur&gz|+FPo<YI*PG|9!I4U5-oLj#^rK?8vE4oG)s%-M@DA8MnU6GnR`}
zw7Mr!75%ef_tQV?t=!aS91057eIYkDLw0H4w+XACMs+Tp?6dH$#_eu@y<R`F)^(|&
z#%k03*Gjy$S>AV1^V{;^Q^&(gdi_jmHocKga=9wDckyMPh3-$MWL|x&ep}aXbM&V0
zI|p7FCTm#Tou~DkUEU(+%N0S}#l}93r;de(_|J^6UAZgg^vBR|Jl}iHtyvtZx%7q3
z@8sy<trcQ(7jO1mc=*dnVYTo)!<{OIxo_nc)t1~+-ClQ<^VzMyv%9y~MLOkX@b9`E
zz<GAbdEUJ_8T!BLx3(#1ZT+C?eEM>i=j?A6H!i>1C%-Ry(F)$Jp0~baUbZ#*QgHG7
zn(0#-Y$jb!;mDRdn`zWy+W*u<^3bf~#j|)4&k9@mwrzNJa*mpF#ODyd$%<<#t(Kn@
zxc0{wMA}RSX_^PtbRMkfIam`nSkqCkrXa8;OOWzCU_0W#%GZOHUk59f1}l#TlV`!2
z!oZrW!J5E!+yiTR57zV@tce}0{4iK~AV~R73y|_ZU`;h(o9w`v=7Tkz2Wt`sYdQ_q
z6bjY^_D#)vkU#29WEw3|+0<ga;7Y=wM^_SpCJ9OS+*-!MHhF0fQ?uvpDF+fR*{K@L
zDDmLrQ491+FnBpbNW$k4NLUjj?8nKY77J2&9VDcyYA_=Jq-dUygb$Zy<H02+ss=N@
zfb`l1Gc|jzpK>5!Q;AoCfhS1Idl1jZE5RVrOx0k9&U7IOpK1P_JZjoYSlA|ug4E9k
z8EUR-Fk{UWAqk%_kY%eul69Jm2UD(sB<(?x(?F6So!KBs(_p6NlTjcQZ$TFLc_kP~
zP7sptx#r8sqs9!9TrlN8f{}%)!3-WxP98O9kkAH@kd3Orj2@6<l|e#PAS3>QjBxZy
zFt}-;YA_=Q<P0;AGiHNq+62<1rD`x^%5oOA$rnNXRZ=zZvNQO&yKVCBwF_Td+;(S?
z`|Toc&nsyTA;0A=ajK>q=D+QEA*SloFR3lUu?f<-**5tvB$`DID}Gt@QHU!)U6^Z@
z&IeOW>|y$0iD{$)o3O7~$3d6LtVsqJQyL|FW<_s$U@N>o*XjPARx#Ua(;~k_M5k$X
z-s0)Xn&;lNfH^ktuGFqu+oHbgTWFo@-C4<|FKxwsv++33Tj%AsEpAstHoe~**|fVT
zF1~F;dPO-XdF)gNrKvl!LCNFYX;9wye*#2)e-6qa>_wm)(hN>h3qfgW@n!3p-n1NS
z_(;McNom6w8OPjs)MjlIZ1(g%bK}aCBll+;gk*)fo^P1PXv<v1=C#P|wcFPJ``(@w
zdgbvuxOZVbZ)~2mmDRZmVId26GkJfV`t|nO++!`1Zu=TqhY0cNs<mI(wCb}4+vI2O
zZTR}z+rm$u*V6r4o_Fo)%^j&$mnXNCEh#*)d|#5jz%54euGok+w@bopep}?EY_28Q
zef7Utv+CIEeQu9S;}?J2CE*k0KAGG3ajD^qj6Hg6ldnmw|9|sHy-}k5oh9AxK0eal
zb-a6jM0)w$70>S7Uc32r>p3HnseFr`u9)>NF~jWa0&(8nrQJNf%lSXf=k5`g)w_FW
z(cya^FFm|D@lr(gos_=i1~V6P-%WfG;_NT|tNGxTUg4Z@r^zp+ZpU5T^d;O`{r0sh
z|3ddXNOts8`>{j$c|sb8^}?;-z&!^F+|S=Z<l@QRHNAd%A5E=x9=ZPFiBLRTVAh&X
zrnA-vJr=KOFffT!WfS%d>pbW(IW);2bM47h$=;7xRTE!a)9Rkrx#h)74=Bamzv8-0
ztKiqXEsS3eZuUq|e(^`d`KpPuzCq=^3p!fvw?4Aw&FPLjwl+Fqnqb?n8A%3#^1(c6
zybqJ}r1NF(HStDl`Sw3dEdQ-dNN_c4)J3@vSJ{<4-<JJ0&?&GvmMdrU#ozh4^sVL_
zTA$t6&Ykk}zI3Kh!e>jUcys5rS4jq$UTdv*&dPKgT(UEj@0{t!NVS}6vt2IQMt@mU
zz3s)(Uk1#JZ`B`cf9V-7b*uN;;p(3UF09)kuV%g{d$+CC;e<yg53^mCX{+3r(0Z)N
z=}NXh^T|garH&mFefacuch|Mg`@3_6uk~f=xzE0EnoU3UMgBK`r_UMMdv-1By0-m@
z8SC_0uiN}Kzikn}HfJ(#cFBbh9<^H?od=g}HA^xu`6Afd*=Cnykh$i<^BUp#$%m%x
z?-aSaJwB}DeqH3l^iA1zZHG7O^fsm!uU+^&huKs8;lUi~FFO8vS04FgZDwL6b#bCN
zGw*c?50BRc@@~ftAAbEjecH88-rqS+&o8uI+pzEnH}6}Y&mVKXsr){F&#XnlhdY<u
z{qTnq-_lFXgKxiR*~P%59`jz!aK@G+yE)se9w!+DrpNH8>0Xqyzj;J`#)gYAO|IXc
z*Nfks|37xl?>{{ACdEwrwj^$g{N3aifqsI0i}&B&Czzl6^U8z$#u??iF1`QQuW@n-
z&)1u7@r%!!{gSHPcJca)&At1cO$8?`WFfcqmq!v7&15v3k&))Wqc%%Ypt&=R?MT9=
z7c&_pZYJ(p?EOgj%S=^UZjCCjfG;`=UPL++`ah^?KXX~DMD2Wltncm%HLo1mAMeiI
zZ~BFUEkAsb_ZoZm-IbNg-8TncHF@^cRO<6Dsou)k-eY_Axh2OL&d4~U%_iJic{E{>
z;d%)llV_sMo@UQ#4;|^Bb>V9EGuQr=l_Ivwo(0}9_9}m9dUJJ<6Y~eZH_e%{Rddy)
zWYRPAbbY7JXg8Qzw!nGs&t0cq^Ei8l^-SmY&s?VS@~hsadZ~$jSDDPXb$Oi$PyfQY
zq!;JeE^n~DaB7R~-mDjeuTLKg*K+&jJ~c(Dx_0rl^%o=6_qnCd{UJ5C^ij46^K&Gu
z?$-TPEHQ)4k4J4*qi}O)+Jhqrm;M+RaC<*mTvD>rSK5|;-HXZs*YnNVRdO+f{&stx
zYzk4Ath#VPWRK=s!`t&OD{e8#?bOs{{=o8O;g5<t#m7zu*G`_>xX4mIelc!rI3wen
zJCE9|&w|aJ&uWe&T(T;%yFc@Xv@n~++GQ^;zP`Bq+@)Rp^NcOF@+ZjM%qnT>ow@eA
zv%A!;L%$?S81^-#{ogL-%P`x$`U2BqUsdf~x8Rdi$Cf_acze^172Z8}Tf!OEwTVPn
zTlJhXEm>;o^Sj>uL*!lYcn_<qRbD0b<+G1ouBtG$T5E9SzgTnUulq>`f&Zg<)O>IM
zw>xyCy`48wS^O@m$X!;E=d)@$4lcc#DK6D%cezS&@rC($E#}Y5mPIw!pFb>c*{vjc
zZuTX!DrM^(OPHnhxv`tnoYe*uaUfPNU&aq9*$W>`trjS<3G=QvlCX$zs)Ucp0-<J4
zZ=MwiIy)JAxBL8Q<DC0SEaHnrblAnmIgv+?e%$Y>S5vx6V&m_|Ee9^Fz4mb7#vgX)
zWZU=-i!U!*F3ywd$1kPdw_iv4`0Dj<v#(qSdEi!(L126|kJ_v3?t?D1xrQ@LTGrRL
zcIq1^9>1>A{Vwyc_}$BG`tMjR$`5A8G*?|H(OP&rXR+Jw3kpU*rafZVb^U_xw)soy
zrFPw^_^kfz+D~DpE3AUeox2p03^F_QPS}0CmuS7|Mt5HE$Em6tea%bXYn9k!U#vB2
zF#ED`;m0q%3$tc<Kh9v=oBB8C_IsOz7b(v2S4(Yk7aMPS$;G?%Xu_hub0mDW%olF%
z{8pS~@N;DypIbKX*7If`CDn4a%yzi=H)_kG-&-?|vL10ipdZ=JcR0P(`eMzl+xJdh
zk^cB0@5`EnmL<Cu8h(hpRTX#gZ{&Ix^>aU^=2|?@E_pO({l$ZOLYm)&EAtr6$Y@by
z6Ye!QlCVgy4b*^W`8c8Tz4^l5S97}Md@t)(nfPwMQIYKs65L#oE%5hZnaUSAIXh|p
z<q|zEWy`bIXgfWZnB_LvaAq#6{(~w5>4KM+efGIE8^tenoVotuf-~1M0@T=qc~2cl
zSmZcU!pB5I7!;GI<P1MHt9`jRtMKCE%v-Mg%QMCK&S&L2SD4MXx8)q`*G0J}FXZR&
z`)-&1vtE9ljuo?V@^$H1k9`H^t`~M`UBRx(Cj525k%UEZQzU#g$z3`4@y`awtSyUf
z=l$8FvOTwYS7YE=?-wuIF6y@F8Gq58H@8+W|A5trvYP12v233m`Ifr#*k-;cef+g_
z>aFXX7x($`sGVKA{<h9Kp8THp$Sud(G`H1C30>Xy_SW)x=~?~XIqoNXSn;1ZqbEb#
zYVzzg%^x~fOy-^2cAdN0H)N(+pwpI4q2`l|%mbemMpl&S6<xI2boAc6=Ebw>AAF0G
z-|Ve#@@3OPuU$7UY;4<SVD@TT-ti(6-sT1Al2)fK%>8%Q*8P2+VpVzf!IX>d^CY~_
zF*aU|YJPk7v1Q`s4HDgXYZrPw&g-2Yu)?zTVRnU0QMT6M<GfZERIGU7r%L!KXL7yu
zc`jWw^>=6XU%y4k&E-OKAN3uTjSjhO%T&d`YfoT_LC{I>hpLyaOZhOq@@Hcgyv+4w
z<-)lyn4Hspw{J>smgnMm`~FD6qQ7$`e75WtZuWHkQf^SEwR2DTp7f0eGv+Lcj*(gV
zar=ulz4=Gmc~9lCf8uxEeZk0N8r!3tdqXqJcXhSv>pxF<ckPQ??E6b*zYMK6e|f)C
zGD-5#<`eHuftrftpr)eKUx)4MFY=fCmijxdb^XQnkw2v7GQP_$VcW6(qU3{pZs`r(
z2VI<f3}<9?XtGVdCYW?6!shez1e5KO58S66v7coyEi2XaeB(T35nJ{uz5uU9X3dLk
zeKrURY&`FEKT9_LU&nW*nswER{UJF{^~ah|ub2F_dLi>eU(wB;;c1&ar5t}q^(uf;
zd5eUPNs~Zxr<*{M!9@-y9yMRhrXPzt*PA4Y-%9Cz_x6$YuI=6HcRUZ(Yw)*f3p*C=
zIenq;$GP8>dH!Zpi@oYUX`+AIj61&QfA_-dp68R|W|ewg_5EV{O0Dal%Uu`487pRM
zunCt6A5B=4w@AXL?v(GJ=1zUn#P!!$y5FTA7Q1`CP4`{zSN-I9w=Hb+wy3Sm`2XK#
z-rv3EUk}?Kzj3U!Y#HN~+q340{|LRteI+w>pWE`OKc(h|J<BeMnz{ZWOrZB$ZLiz!
zB!i0?@jPl$Z@Uk=EUq=2Ve&uYzrEVOQ!NX<wKc2Wtlj)#<MwlpjEv?dX5<C0GA)ta
zml@-@G$q5#*Uju%jC1hEnBVVtWSi<X{)qVPP`f79qqvxl{W$aC*ALXay?^)a{cyc6
z%g#-!h%5G>zUD0%^8+@o+BGLNPwdX|md%XqKAyhJW8bv1E?M7BU(dk6-aKlr9&{W`
zxhN|mG3&2Tb7$KABMFOc>Ko2T*&P4h=wr6pmub;47Z>MPy7q5+Dq<e`$NYr5@79SG
z^0Pc9XENPWuUW`@C1=lReWCj6R#z%k8pvhcImLZe|9soCS8czgN)LlVc!z|~6<+b?
z&Rq|a3<Aw#c+`5Iw#BDDI_-PI+U(+@-@7Wh-o1XL`DfSFS?dkIZMJ;dckpa_?rLA_
zi>AkZ&0a3K>;8p^suSD3i3CRPI$5Fj>~f@du)AkXZ{MUJQnIQaO|85hWt-RtH+QzB
zCmCG);KQR<8_a~n>lK}6oBe3H?~Cwl9gEzr{ppg6{H$%p5v#qblG*Wv*cQpPe$fwq
z%Pr11^K;q4nPz;pJ!%)v{U~~6ey3Yh`GWr@!4-CM-(-JznG(NvCVTv3#WfetG_Oa(
z5<VuM71)H&+H@RrG3HM)xOk>n!beK!^M{?C_J)ZD7aw)YmA=-jy0Uipj_3XH&SELv
zQPbTn-E8YS`n&P><?gm+7bE^$ZZkXj`1taI{Ma+iHPg;EznFceruUf_Hhd&u(M}=5
z85!$bpdNkZ1r;(0Tld6UxIXRBgvFvFw(qWme%TQnUKly~^@k~Mu9+~dUmrD-?b1S%
ziT92_pHi3q;lm;BZLgP}eVLo5-yJ#m@vBX08ERLBMVdRSnvx6x{R4Q^UU7CET%uXo
zq(1A1g|OK~?=>&({rSGA`tyD6?=MZ~FY>?Nb}EClMl9X#>$0^O8ebQ_&%N)qU81T#
zzVRdL_HRecH}YN6i}m>Y{!;s~=EK^L)2B@PrTyJ%hHznUPWIlL`=(r&|AW`y_~-ie
z3oqHqkN(=CbvNUMr89T$^Vjz#$tqqEWR72~%(l<Xou{U^Pom@ClAq;T1}1(Y&7H?O
zlMFIt3zd52OBwFCdu02J3*4D*uHWlVirxLM8l7{%z+#mxC*$F7C9~iDddcUkE`6)<
zov}&dzswigZ6<!OZQ<I&7We0~{Nq+0^HgUxUiO;aHs*b9hZzlLY_Kq$kzt|0Cd|uz
zBw^9R1_>V%8G&ZcU@rDN(~rJtUkqpYUfdgB<odntr0Dm$^Y@iGZZz^O$bBi~eEDU7
zPgi7jn1jHFoeP^^@HTH>y=Cd+9&v_0YSIiVCabdvi!EmpF8y>QVUgcF37;z`g_}FA
zDw7N{z5MR6s{QNb{5?S}q~w2H?8U#oOONgfe(h$OZ&Cg#yV>&CwbEO&?itR=tZ80&
z*g!T}E7##~hHurp+vgtLS+dc}+_PhsNRmOO&h(@j8?!z0>Ju-{s*5W;d-QRJUfB}C
z45_}2a}EE>t}p&!Y^VKy?!vz>|MTqI@Yn8HUg^hK-C4PMEg8j%Y?F^==_PDA!jX~|
zBYST-Z%hfd{c@dux*s?y&VJ6QOMmEWb}iKU{DZ59mP_oKZJ)cDF*fbJppWK#+1!r;
zR<|m23#M*6;IxHRtl85$r*Zl5(1&j?Gq`5Q+HAcwEjJ+KbNH5=-GSmJNzso>6Cb~*
za$YZ0v;B3Lv%S=s3gO(_XKVJ08~=8HIeES2#c94gYPuU!n=eM}Q{_3E2dZ&5-{$tM
znZhZ(M>U|tev|8W<!FnY!M}T7H}fxg`ci*e^Mb7(UCVCYy*1&HM|1zy_x_hJ2-lx3
zuQ%Kh5o?{G*n5?6z2thif2{wrGxMU%Pd}C{*OW{CZ5wq|>h=ZKH(dXYT}VErw{`it
zD|~W~cGpeV-5S^FB=y>>W#PI75<asgX<I1YQ`)mvYDLD`y2u*S&yzoGjbCIsr#my3
zn|E&Z3ptxFMiYNszV~IxUYpFwl8ffW%#p9Rw`XTpYb?>++RprF>tXxP|8>sBzIWq$
zANga}#_J#Mf1LliqRz2iYw6Y(7S8DsyAE7fxlMb)-xb`o&*Klt);(3dWB5*C_s3%0
z?_%3l7oL9Wn*2iB`F5acn~DF%a2wgC^fPJE^N-vsEdJ2@GcHc=)s{Cp!E-livQ2(g
z|M*aVyBny8J#pZ|oM{q1(_;L%-6BB)YEy+Id`^Kz$zDu3kPtLcNJ2Gz)(;cqwFQ?o
zcZJ*Ue-Zch&!Nt~Tig%DWRqe$=WVh2^W8R6%6HM~+|}JCv%h|Q|1|w}|I=rCUWk_d
zni?nAGyfC+t|N2z?ESmc``qkZg7>Z{e&O8zaJ6yorg`^LqR#%ao-og#M5Awe+x&a;
zpH&8Pm!#;czGCe>=(1PAaK;L86}HK$&sk-&AF&?G{y8n?qU}lXyOV1+)_%Sfc$WQ#
z*ZssRQ*Q-S&&rmau=7R7_RX;+YZvnK7@5W2ZsXzg+n8NvJp083{;NNw{szole-Xr}
zJwIjr#qT~prD|ClC45Y#fNF%IB!i0qemrVYr#cTVQFOAD;GKA(?)Z`XSr=aCO?2(w
z@>JCJ(zNh93l4wuI4<9|lK1qbe_JHy-LjKiEU@=Qe#M;I|DNl&@h!0X()Y3H-|bC~
z``JAAxizcAFLs=?{-S~>kD8Q9=Rucd6~h@B6I4JgB9*JNewYdW(mcEBg`m#QMeZA(
zbXRwMh?nrUxnyQ`r7vtzZDy&BQN{j+w|`1cKb^#Oq4r17@rtJP!999*=iJ2kpV%zn
zNz{LJ5Y*NG8~_^Is|1f1L&m*JB(7Y4VX$KT#l(R4#e)0RU*x!dJ)=dRO}O{N(S${U
z`y_l!4v9B+y8QqZD}w))tNpvta?puezv|4|#V-uE_dP0-{(kpek@S1XTax;__R0Gj
zuXTQXap^V1Mee!T-ohViFWoPCA5{~xy1cu7LgvjK<rT-emTtVh)9~GOgJZQ@-uA!L
ztr302+`OI7<x9`o{~4B6Ez2&8vMJwvo2ma^-*n&6|4S2AH0!ZVUiNl@f5-85@gMqn
zQP&rV*8TQ7E1Tgd_G$5IeTk~u7xcD>>`hVTztuj^P0f0t{F}G^;j`|f?b-H(A=kSl
zBU*`Vvg-9|2QDPUgBpG}=F7_qm^t)@l$`F3oOWkgZ2dRpUz?ME{<aN2EPb!xUvfrc
zZeNDj)Q73B{Xgugm$)^D@58UnQ@7d+Z+h`Ja(~6s5B-7unX9zEf1LPR@Q>W-^DO?$
z+j;lx{%yPeL@wXlGwYw%v%XiVVPBvA*WUSeb-3U8wA!aSvfp|9Ii?>yd-raY_PcA3
zEkgcEmA`)Y<ICx(JEHd=agTd<`1XssBfk~i-n@Ux`Z>G#>tep-lXuq|T=@;ELFa=y
znD^9s=1XN+nb=w6ERovy;@b3($W77Z>ji%ET;}p`X%F;L-NK*S?^hrh)xRz=zck*e
z#n0$keeFs;*2`v9iq<Ow)OY`sn)~KicFCsM>o1<n+vf%mP-7GBbpW-JJ0yHem;{?W
zom~_RW_?T9KHc|E6KCuVv5+r6W|d!joPF=8+hONLx1v&7b4~tCT<Fa+H$S@MjN=X&
zV}TdWw~G@tUA|_fQ8#J-x=(XH3LXBPnH15nD>ca=aJvtW+S;qS)(ZFZa|)%Fz9^Gk
zuCwy(r`^l4-yakBbn-{nZ<||e_czb>juyCQvsKqN+hD^^ooClezuYs871F)U^?UWx
z$Ek;fUrbfqI!!(7`W=Srk4u^}uSQ?$`r_^!dWBtH`{snajl5Q0kLsNK_hZ`0b#ZF{
zB>v8D_qy^{pt*CGENCb+kG*HvTwbetM~=_f;2PuP`hDrYMZbgUH_Coru;Lka&w}}l
z{>zk$KWxf9e<ApO{%xICP0uC8KB??mn#tw6`R>l^<@VEMU9Srk#V=NVvd_)^L~U>1
zgx^xKir-DGob=d)dpnOLEHa!Z;bWpE)a)7D)tR94i{odvTHU!8y{vA{s*<zYUtBc3
z|7c#|Z-$dEjdPj1G`>4K*Bh0zFO2=@G%f$9_N~~Dj&DEn&g}|pUwF^p@UL0(#TM<G
zA)zXL>~;I}n@Urz{mQNj4LUo&Kz-in^X>Z%d=B|_IVH>8Iw;@9qRQ4jwMK#E@PoG^
z#lFi^ihZTbI}f_N4>g>TaYuzsxOeuEgiAt?mtFR)>Ee{Wtr}A@zb@`#?XSwCy&<(-
z6IXraxp(2a$-ONV{R=xwro3%?$;3SUA+z)Pn`~XvmglaW|Gtu6KXotrUxudj7X|g>
z7c0l@b93KQ)7w|^Q%d%uP;;kSUXsDZ6TUoZQad{jx+t3)dc~Q3^j0e=jSjh}ob%7M
zf5T7l?=zdSCshBRTN?O5>Dcrfm!|7#TNmg5ko}>3scj2u(Wk>74=s7S=fzKzS~q3Y
zS93w-y0PJm73FH6LH@aOvmQ<MxiLZS;-cy=mtDWVSk9e(Is1L9dBMiLiXF?3)g*q{
z_ul-0Y>wC4ha!7YKj<#j<~_Sez1Lhdt-O@IWrei@n{X-nk%UWk?ljsyzI(VVX`|TP
zxWm(q-J4ha>i_!}E_#L`orO0%x9EReEH@)Lv%1&MY);Mj2f`KQx738E=Wk@c>0T|M
zc&oYNpi8xY;S7`QaxBLdu}}GZ^mmJ|x3b9HSC90((^ls#x^Vr))STm=b@sEp&vBk?
zczpk2-qN-UT|a(3|5nm+(A+-vf5|NQTWeOzPM)B8-Egh!ddYvG|J^g!WtA_q>k^Ou
zd+%GPNweMdvxaJ$Y-j)SiH-=*imf^Fe14l9_q}U3QafW-+<l}sv-!u?(|<G<-#T5e
zJuYp<wEH2MbC2)liA||Cxpih<gT2&m{~mGgT<`EgvyB#dg>hwJ^Ut*jJ{JF1n3$oh
z!X{kWe>7pyyNwb)Qm1X(E?OOnuFHP(*=JdGhL`L2chkl1?v9VU6TYsmt@{gm^NOYH
zy$2$ERqtkG<lk!1%8>ZFi1*{tYi~K@oG;q%QhzPKchYB5qn5vdb6wwOmx%3Me=+jQ
zKDWngproh3CfqB1Bw<luvxJXHo<Osw^AX<v1|MzJN@mYWy{Md7<=VgGrRcn>fNGwk
zMW=b+x^I4=&GYfg^2#k%b|N2@_q#q*y50YHs^8`nr?|V`ondp8I`cz{H?5|Z&3K<%
zv!vmS3<G60VcxVO35yQ)Ncfn{5Ntl_&uUyg`-h+KFYB}GUId!VUF3eTglm7#wr{B{
zdf^f2Oq-YVo0m*J_`tV!;e81!4&iJ29=R9Zx>U1j!SNpR*XfspW`1RMu2nLevBF=4
zZSwq2om!7QANGD&-F5Bz>#l0SeBEVox7c1}IRCzItK#RoQz3q{AMsXcU+&uWbZ1Af
z#{7q-jB&zO!e=We+FxZ^EAyTAe9bx&)85@C_YPHytv@6!#(kylS&+R{xB1ffXZBv*
zXe0mC{>45!Lz83PYinotuC<-P{o1(2`F}fjj_ojLjP%(=aOIr=uDo?X6LU86KofKG
zz*BO+#Ju7c=P&$XI;-d#5*Aw=SSu|d71wz%<z#EPfyq-HHep}O?t@R32c7$G_OV@!
zhb5}yqH^9(*Zv((#lPonFP`Z4f3c(4BfVyuqnq1~UF>dqb|IqXX|9aia@&r+&34Nd
zuI`z>VTaZ14Hps)T+c9=kaZzA%K+4|VFLv}sAD4`(Ck^v&9=_)<5jgc>9Y$i{*B$^
z`n~+4SlyoO&$xGNxc-5?Lp#I!*SQNkvs^cSY+IywZHwO<390=5@2ej79^tz%F+$Pz
zwxgs3Kga)9_JL8S^zUSRa-NY<u=lILi-I%eGu-?m=ePe$v(~HG@IL3Y*~OGw)8!1l
z?5VFT&)+n?JoApN%_TG5vu{>LTd&$H|F+4t^!|<RyW5yqs|4n&$8#GWb5mMndq?l+
z7CFB475CE2Z+>QTp3MqMs7jz&zwKu_)7!WIPtxACHa=deI6Cjxhr=(N@(s34uW3qu
zvN!#O=pOO+S@X>H*vA~toUx{S`@;7>kLi44yF1Gx|AOs1F_}nb!S6~(%P$81yLv(H
z!@{-u_sGR9sMvBaoAvwR{x`n8oY%kI$>}lqnDU+__l}F70MA>!qY0O`>^{Az;_(Bg
zm@A7+cN_|IdfUFEF*o2sTiKGnFKYF3av0o-*BO+|U)a3zmeqlN$y;sjzAkQ=SoNDL
zbM5x`zdoM$(Dm!)(yf1|{XTWe{b`u?!E}c31)VR<=No@9y=T9N?{3nE&I6q#OBVL?
z&V6}5$M|cS@TI7HGl}kd;fF3<2;xz*7ma!+ah~V>T{it)z4POxlBNF`eVHZy;muiJ
zo6e;?=O4&;6~8d6j=#LT&CbMx=inJjw)oqUZq-%Ak#gtGrCw}Tuj#e3d6@m>A!q#J
z&r551&rKI<?zC!8G6;Mgz@z4U&a&mAz+*mxl6_Oq`wRUue<TW56`kGnLeTW@BKIp_
zx~n~3N}kwy_t5%pKhKq={W!nw$9bDoi>g27UCLd-&bHF3s@UR|+x66D%hFf1y;fiM
zxy`LIoUtNUpG~;*)zO4SetRW+uB;Sq_Pn-o|HUKMXKt|1|K$38*T=4RrH@6Qd+cv0
zoVc5(&ED<e<ZYJA_I{Z6pZTT0o{#@cn>Cf0S5B!~D5z(3>3*8*%iYC(er+3+OZ-83
zZl^gY&)u00%5(oFg2;F0K_i^}PfR2aN!7~EUVriW#-9*|plkf%lk6~TI3weeBahmw
z8iD3cHTfe6i%zl|&PbWeZ$INlwD2*9wJTnHeEsqD$L;qX&8w*4f4r<bvR*n~eaFPj
z*7_0Y?P-@zxA|=~v^(GQSN&dppeJ|F_X&sEeobf+_$qZYVbWJA^FDJP{XMQ)YyW<?
ziQN0m`p(ktQcsetFGODBToU?H@LzySxm0`gmy9~a<b0!&-Sz$7E?0+mINw?P_i^3B
z`OEKJx>EW_Z^<p|k86H2@5t~wcscX(%aYecmnEugdk<{=I^pl;3rE}d798Hgo#ncB
zK}(AMihUou9!Bzc1qbf1|9Ahw0-KEF>{rgI6)Y7xQ4@uv+QjA09J^m%xr_b%fy~#u
zpJW2fPc$=M-@i}7M{KWU<3*v}H4?Klgql0mx{f4V66jpC*te#IbM`hj{axavuHP4}
z+wuM5Uai_SfA5#<x__a@>ez*fs?!eyFBj*EyZpW^cV+sth1xaqYn#e8Ic=FN+Uyzp
zDn<RM@S*H~;Ua6_P8a<i*>?Hj8JiySjt5VbQq7un_f2MeeW|nHwZ8F;?WR-n%qmu&
z?=98!z5Sx?%@W<YOCDsGOln$x(UU95;9_1NkJ>HWu7fVg{-Al+8^XubKubAvK&wH#
zIC<2bYBnBB0j*kD>A~4EY5%MrY{K7upIz{x&OGnp-@H4I*v{`ivRSDA!}AO43@iL=
z!lOhT|M^z%zpJbGdjBe0-}l2defxGjud<(9y0>)RuJsoyU+r^yzVf#eFJo<QTSJmT
zVquoSMS%bwH7Ta9gD%bvhBGoaG}tCD6JfH;f0XX?qJG<iMaQq%bjwA5*7?&>f3{G<
za1-N8$+m3^7GAmd@4M6MqtdIEG5#n!J*$MH_dv=A;a>4g_a^d2nzDQ{m16oS#oJiZ
z+vbpDa8bYmWJl*g7iR^K9V%`o@B7xYbJosG3;QB5%k5%vhSbsC1$!F;o@h3kf4}wr
zUUo+QtM>H3<pJ?h+*yk!yyp4aIluID&4fJTxoX-jwu*)`OzQntXx-D<6IoY!(Mo#T
zj(m@~t=C>l{tNn0QKL}7YU5eHcH!eS`OfMeRQ`v)RP{M3%XfU$46mJLv%M~cG_HqY
z37;*^BF&!JZxs?VR)OZ8wFDMFsS=LQK6Gzar}*9H$251H?+w25czyo?%Q`;&NfoCr
zyxTJ8Yv1&xd0)0H{QqJ4vwX8H`bz&g{EXvb_Afs6)#*wuXlhP3$sp1u@AR6A;~(PU
zcwDz{TCucnThi>eTNll0&Da+Ipj_mSU}mr27Us~)bzA1<?p^Pcz0Y>7<L(8a8q18|
zomysGGHLJni;`;l+%CI;FlY)CG|FAyd2mVTk9Y%<Toty-$GoKPW<T2P^FqM%@S@`v
zw{*$5U)C}^7HPcdFWdRt{TaIzq&&TqWv|}<cUk=Kw)TrQQr@pGSy+kqxf>p-G?ISw
zqWIcAHRp)MiVN0X6u59bgX2ZE35!T`Cn#y4CJPf6jvxNQ_L)xg8(Bqc*F6jUvSU{G
zM#ZNKRy+&k)I4o?|GTjB?n_Z$n!lEQFgUEet^YuEh3>w?R^ne~epEWGziHyqy0dq#
zzqo#;ws)WEx$7C<4k2MD9yJ|5UbR_!1)4k4^g#pn+=eqUzJaGpsy}Y++;5PWaY?I7
zuJW~Z)swaBKYV#|Yqt2lv<XR?%m2P$b1u%%edQi5G0W9iS97Uj3CG`=dsjaaR(&h>
zvU3t&q4m8x{(nzr&cEet5dBNkx%{@oiMG5O{fl}3%KOi+W4X-vZ9#wU-}4R|c=v2M
z|9(@ZeCgxb-d!J)3<AyLc+_4U>ptjmw*r*f%>O9~|36po|58ZzyNB!bceU@|_d&WM
zYku4RuUdZ`UJK{BKR;|(bI8hM#-&Pyxv49znLWQUz3)Kw5u5o1$CQ4y7+l#c(A-%i
z4(?JPz4o!^!?f%Ti%OrLezfNH-fw?(w@l4{Fg0bm<Sg&xm*3m?mR4@z?|C_6&j&%N
z)6aR%evUd-l&jgA;jPIwxh+Fe`_ZQlL4R3YvsdolaeaeK>+XNPzn3p5{-L^Rcc6UL
z%=iOIiPF{k`<F#}gv#b;r0d(4#+%tM4c4yd^;`SF)N1RY>luDwJZi7FI}W<kGJ?vU
z6`XC)QjR8E`cu4#f5s0xVXN@7TV8B5IlJiiC6n&oUPo_N?076It#C27O>Xm9HD1S6
zKdbr{wq3Ms+qd=H=7TmZ_7b;Fb1%MkzAf<Al9u%s)m3YH?KB@|o6PxcDs}F+6z}ue
z-nP$41{VwBc+{lMbsuy&TxmFC%e8`k%EJ5eo$U9sire0s7W<_lx=ge4)*9KX^STo6
zl=J4gu_r7$CKEL;?ZUM$JKx%@m{qofF{IVzNcb^tyFaS4Yc4b#y`FL4QMO5fU~?y%
zPLjdJ23H<6sSO<mU6{oTXG~ej!Zx{$BjVrrBlU(0!!PJ`y{mjIe)sb+{dbWMxF0U6
z@A1E}KQBYShW}TDv#`PAs!E?dTTUl`ocP<D_wJFuK^Oh^TfAPr`u~gUEA=AHoxl1)
z`7n@2?UjAkL6^VohF*2~kGg$tq?+zrRDH9+_4}rWUDfA)+@Hbt&Cp(Tvyp7Fwan`q
zwP*4xJ6||A_e=F3x_r$0;?z4nqOrTfH?5m{Zt^EnEB{m1U)X5IFFwq-&#hgyrnjv(
z$>8FKKpr(Iv#x_KhusWkWZckTn>?ROI^O)Fw%V7r=!lESIg+mZ8&gH<QeEE)8%_Ac
zwCI)e$5UO=x!QiGFZG$ddbYjls)W_qgsYABW@l}?YJQa?(A<|t?bWi*gHM*<+48F5
z_J?&j7Z!c}|9;bs*X8rIcT4!b+0Sd6x!!w^ezoqeGY`(jI~xY=ot0atzkQ$Syu!b8
z7jEyFeqoQn><d>~n$}-zX_D~SvRtUS^IJ%gL1xE1t~NE1BMFzb2y;!J@xw{D%-wg*
z3p+EPi?um34&~>q-79(T*7CNpg~xf%F1CGHS?#U(M|bh!oaWBTw)x4f^*aQPR{RL)
zZEsyMU6D=rtI?5!MR9EsK4N!ITiDo{<ZO}J`r=#k_iuNj`}Vu?|6IDzH&bWpVf7tm
zhfnX|nKxst!>Sv4Ul!{cTEC7z_FCz8wzy`>$C8PwkN-Wq|9ZXVS=X0wOY6Dxwy)>0
zP06so#h70o%^0uvv-_{{g|3S2-@>+V$$G55$XXg6efvfJ%{w#w=6y1?syuZ)V_h(h
z+N~p92VE8m7|!_O%gLiA)!K1zNvVsX!K|QlpVNf@pKaOaY^=HKz4x*g`}Aif#r{$Z
zeCu5Ba=&BW*Tm-kvdIQ)cD(ZC|C$$G|IoVT^pC?$@eiDv=S%8$%~=|_M4+_rNWvn$
zK2U%7=uOpmqW2zlFMUx~7n!-{?T#Z4nlrBbKdk@CUTXdE#fLLlf8Dyk+g7$^?QgSf
zy7reY$bVElViq@fU$@yyr!Ai1&7Ed1lMFJ~sL8sSWzCg+FLdvH_sSR3>U=Zz=<b{;
zbbis!|JM{G?Pp(G!2Pq-TlV3;^}bIfShM`4Z@T@L@(UD+{{8aSE$)lg;&{~7F5Y@y
zX`b9YAKsuXap7X&d-F6teQI6*@%i$5#w7xw7m7|q#pGl(9{gTczRmC5sw@4^lJn~A
z*B{OPZ6CF#tS~zIcm416)pZY|_wYY;=c&Gzk-`1z-~;JL>e4o|P3KNKe(l@Q4ZrWd
z)%DQ7`qb-|TYvg-hp$T&_PND#J<2YLxqbb`j&18N7UmkxSaDv1P57(i(S%JEHEt5V
z*3Jyh$G09$Fv48+I?w3iW3|Vv+gcX6U#;nq3;nEV7N+Cr^ZUii)p^brGS|)$U-x@Q
z?(Y|Sq;m`;+)e#!s`EQbXZD!d|9Q7j=(YCLBY|&E&##Y3n!9A%w0+#S#J*h3w%<~s
zdEr*S!|jdVN;7V6{>FTPZ_QufErQwgd%j;3di^<~>f+J<y11mdvKceW9!b^l-<rAg
zeskGFsecT&roJp+aMvMw9gFI+_@=V-w^tXiuA82zdA*u7gMV3k!?%<w-3<M84~s7>
zof*eJ%iu517W2!}j?*7X&Comj`$PDJr!(rfcG<|^{@=LnfN2fWE~WQ3&n~E)@lSe-
z{`CU87hW;Um#6M*W8Ho~IO#6ig?`81g}lp~*PSx0VYxN`W#od@hJOW0N|(+5|M8*F
zYn}yc%d(61_BXFP`i1$z*2rr87gjNce=lI3v9Ii5u<EvM_FDcDh57B*9oY+ceb_$-
z-l=R{>O5l~x7C#F3Z@c?>mT@D6kLm|KUJ%`Z8cl1bcsr~K4WZucET>ZY=7pv4KJe?
zNE_8Y&ha*XBz2GF?u_gTkrLr$|Cw|jEC1sw5xM?>Eo0|m{=G3tyF)YL+1Eah+Q%+?
z_>1X<jcfi2mdIQdcRc>tPNs2nRq(p+U#)fL9!P)gaiP;^|6y5!&eyhFB}SLeJ818`
z$GRYRN8G;qX31}zF05Qr%f6-SwXImmtlRMyUaqm_D=EIVk7XC@^=hUU)7I3om9S;|
zv)t|4>ffAq_SR&_?TK%L7u??TP2|Gch|^nUZC&1&cm9^TWBR6VB^P8tA+4N!p5<<5
zc7j#+`I|QvSa1F&d?EJ7jdP55r*8F0FW&pS>D{qg_08uVR-I>`dpc^_?&7`sS?@M)
zec$-*<gNRS?~Z;+zOZ-aJ#L5Rg}grBAJ*>RD2czekAIhZ_IkFv^S55V_dSDC_CRzs
z+uA#gK9Sb*w_bOw7P$UF?8QMJ`QJA#InOBSuF%MT%X#7Oj<&^t?;m=4E?@CY@PgFj
zEpJ7x>M+<HGN_mM<MC|knf|1>&jLR#`qlINV0yORj$z-0kI4u76YDPieQ<nN)eQOP
zulDo*sW{%xY=7`-z5b8Rb@Lt{^e_6g`=Ec>FX03Jg}-(m@Gt!(e9*u6*X_bIzw)YQ
z=@xO^e`og1XQ`WZyZ+kzx34TE|HvHAXSKinaeblkyyriBA3Wb(wU6n4ul2p?1NE=J
zxG$J@f9KnOynmRM+Y9}13O^rzK)>jZ#)s}$Tl1#)N3SZS>yLQP{g?FNzP0V=(=z)-
z{_yvG)~(t3czR>}LyPjI;Z}8)KSI~lz4KXLcDq*e`b~M+=cj-9`_-#{xxS++Ys38O
zyB=4`J^y^(??3Ok!=-)p+;w{&*X%JjSYOHZ$1R-y_5Vj-{G0z@{rJD(|Jk?aoo~$l
zU;MR(yKeIB`RoVs%jWEU9zEw@-G^w||BQdk!vEJk*uMLhcvAhlf<JN}qK^N3U$^{m
zdGr6fSBtrR#OD2f&$R#c%bE8de<^Re|N6(u2j4Agb${5$*e-9r|Nh&5cA59ge&_!<
zF8?q0NAdW1hWZ;H^AE}wex1YlZ^h&PjP++eZayGi{`<4(58-uk&-|_ahClGPtTX#@
z+3!E=5Bpf#=MDCczszs8fBj?UgY%Yump?eayK2V%2Vdql?0@m2@`1kP-{TMTcUPTb
zuRr?Io~i!o$NLTYpM8;U*#GWT;=i`b`}zOrAFt>Bx9swM?tjx(KQDifZ~fQ$!F!83
z#vi-i{n^j@Z{F(mpTF15yMDmF;E&S>{#e`pO#e?@EjIjdyl+3>zx?It|2RK)$Fcsu
z^3nT%eevyD$v?&6=a)W+-%%CE^#9V!dj5Y?ANxQ2_4C%p)d%+%ezoEICm()({(=3a
zw`+O+ST9fixA(F=)4%4+#eeOs{xMbfa=u>AXuqiCXYm7ft2)sifqnLzbz7dQu9kd#
zv%Jf?Z~dGgvt3nQR|{V6`Mzk@^1Q!7H_s}c$x?kSm+ZFX=8+!bGT+}XChg8Y`r&-j
zq;Kb5ukU87FfGq!eEd&0;m*ZYt1lG``C{WwTwrgz?V2v}>VkHg)t9D)e0x()yt-Jp
zUef5xyoZGg#Cc0!m@*&Ro3-O^Rmq*xZ9IE(ckq7MrRe-#`k&a|f)f{{+xNS!mofTs
z=wbfF*KKR;WUJmzSoodqe7x<~!hE?`7go1heR;Q#Z*R?x*e~B0AII6R;on>TBf5f7
z(fPeZo_L(&iso{GJn=ZE9kCUxiM1c34*hy{`CvCk=?66@**#qW?C+JX96ZhOo&TO&
zh0F&lC)qvy8|*3+AC^7rZQ+UYjF8{c8^Erwdgbcp?+NQw|K!$wJ=o1Dxo75wiicNQ
zZa0(*%jxf#6TqIYzJ@=}e?{|m;dk777ECxO%_X^K(S)nT@*Ag%<cY@xo_Ju|x__<v
z@wku^4}4p{9$d{Oxo5?PKL<~9y<Y8pJT81i^LNo#4_aG!?nRt<FtwE@E@B67MW!N1
zE_y}tcQK=i!iV_}&$jZ!#h!R@wDs%3)7+7^R^NU($?n-d;UG6pJ$JrA$_FlIHhqIN
z{BcPqUR~UHUE<XP+cuuKlpoO*lNFo8C5<X3GA8RA-*L0G`ex<K_TKmo+nx&(4!-7*
z+;eHezN(TpOWUj}RzEB}kj=ZD@x5uvhor;59^|%JRcu|zcQ1EGY{kxp`46wQ9cNr`
zzGl6gZ1us!+OKcqtB)que&}<S-SZ@XJ>T-m!EC<m-B0{ZOnA!qdi8mIw?2(Ox<cL$
z^Cu>9McP`O^Kac%^(+2dUh8dFFP)SVy{%ubE`EF_>PPgF$A|tp$LWC#PXBu7*90ye
z$)cu*`L8b)x*1+k<du9U|7qewvk6CdUOSr^gH%0tI{a&b1Mh2RHPbcxFRyQ~dy;tg
z*MvR1ubsur*YK~rzrpTF!{J}AJ_=hl%NQ-0d-&IcdcN1rm#psCr>u9D4Z4?Dd!n}8
zO6APqTE}NLDIVL~_q*P+y`mT?|4x3>w}pHw{}ue7@R@&mV`I|>yB>*_uZc4hms|hd
zH{qj#>yFr-u$J3L1>8><ToW|nnb5+ctopF*^~H}C-YX72@QILj%XDg6ICq0x&&L)k
z9-dYnWf!pYkDwC<8lrjPi-RAU87vWfWw1^3m4Skoft)1w_UQh;<5!(z*&aK|x;;Jg
zHc3PON}`Ycl|%)DJN7*sZMWCDAAj7rkgs{d!!koD$$w(bGai;1PLq6Pz#wJR(*luS
zp?LT~_6Y+n={#oV?F;#mcP!*%-oKDf`2Z*#JwCp0-8_qa_xaAUZEFtyGANV%C&qm5
zVZPxf*-cd?HhFT_!u{)d-R~a$^{VrG<r%v*>-YU(bo=8RYx|e|y!Z)&Kl)jh?W$fY
z&MUvLEO*NVu3IJL(@Pc}Uh;8jG=F6IZM$W=cT37h+FTO6<L2ZRap|V2&g7-PwnUy?
z_blxETDg|1cVmC69SJ?CJ2OOaw&QK>S&4qlVPPi<)b8|gOTMaWo#yhYu;n(7;ySrJ
z*_H+K&aGSTee333-Is5ywk+AJv*5ay)d{9u%T$WE@BCMhP35(ksWOfAi;AcE#D%*(
ztWGoC`n9C{M8(3@ItxnucXjgkRyb{H_-6i6&nQmg1XI+VB_SypVUy)HHJBN`)HI5F
zp~{`XI(eyU+cG`R6vnq9m!eblZ0ONhkm@x}RC3n*6w645+Y@#4jp8C4#V$mtXm|1W
zI$d%XE3j9ubv?$deUizj_2elf=PJWUSFs7!UcWkf#KWetrgTsGr{wIV5$P*-K~80L
zcaQkB39MTfPR>$tzNH@NEmokfo(&S5$eMC?5~GsyDx=77u?hdZ*t&Ye*-kPUO*ok_
zQ89NO&qUTIdnPYbdfb}0so_nKQA~<QrMhwo<Ih(qOHNcI+D1CGSw+UDcsQ#|pOAVo
zYcg*tuh7wxZkyV~&8D#~X`Afp(zYiwNG-b}ampG;HZ9HRrh5#c#3mGbX}Pqu1RA+r
z`*0{C(xFR3Qr+lD<D`$98dUr?tvpeY*rcP7JK0A>vdH+PN~A-Q>P#J@xD``amjq4H
zRC3;@a??j_!W)leT|MHfQW#(Mrp!7q;jqWD(@a7FC!Z-jZq-d;)ND`jo~Rf<;micn
zJsYO#C^%2Z(KTAaI4L)UabwA*wI?bPts@;m=7gMPa{8N6{ge06my~5|9=6J+FbbA$
zT6{u4Pu=>Y)RBafI+4u`S~nxFeK@4IiA^zh)9N*jF;mV=Gv%n8bT@@pX--O?PC|v|
zOl_klCnn!b<<)<qm@V*DrTUaq+zsz*3*^1OO*7qN;D1eFk>9t8rh7K5U*p&_|BZTf
zMPhwqbDWu_!?h2G8aJ{1O)!eT_TiA@CN|r=q77>vwmPTqCjEaB5P6up{iKx3^OFxF
zUOaO8y5!gnRlXCGl~Xzozk70`M7HVKlNBYh`m%G^IWtVx@t7{KOqIKG<?iA$OHWHZ
zu`=B8#fi;|DLwjxfZCg7+>$!7%XlX&Ib0&ex3;B&&2gr{c3r;bEjw}x6*OFSWw%V|
z<0*-?VxRA{<hJ__ts|umWIk|BJSVwulfcUZf+^e+YuzgJT)s&*?iH}K_u%9x{C(ym
zi{g#+qRbAbYJoRKJO8vY-$*X%<Y(V-_=%AkUqb!KrBN~m-c34v(V}6m>hwE>4A$Oy
z+D{n1O^vZS$@oTVr_B`R8<&I36+&NFRDHSf>eHrGuWWyC82$)(aUjQub+y46l~p^7
zU0M}Y1JBOAd|c$tf&j&&L!nc5{h9Im;fs}_m)$<{Kb*ZwKCExvF|CT}ex_S@2ul=}
zt<u$c^S)}g;Wj7p34zAnX9RD%?DzSHLG|vyT?xE>+qX+U=f3vfK=n?+qfY5-3ajQ^
zj>}`Xc-&(1-a8gc`!_zEmv>{!g_Rv2kH34$W?yUgZRvDr>#v4oOO{J7`ugg?*Nc~V
zKU9f`d-|K(ya|law7vUalY8OLFD1^G<&J**TEcu=?&!m>C5Io$O<jC=!7leg3ER69
z_P9UQJ9=RM@8Vp$QltBg5|8{(iu{>b8Q`ba=DFu-kokh}lpA>~rFnFWa<*RKRS}ci
zcJr|6PHw}^XJeAD9!@>+dO>he)m{!uqZbd0{+0?n-_-7X<GSM?!>S!Q^|D9qFKU+#
zTG4Fr()Lb;i|i50_Yc{OUn%hIX_w|)*=+GiE>B`9-!A1xhBK^Q^mVWobWM;xCYSeR
zIp40i&lfJXdQmp-_}o_utjpxKtZFWDk@yHE^;Uz}*{hr1byO@^$9GCFamso=FYgvb
zr=Q&U$I63NO2_FK$@s67o~2_X<F``!nvRi-?@DPQT_YKvmC}B?Ml#+jrMq;E%0oXH
z<W1bUdQy8s_nFwKHZ?IRmo_A19KQQ(vH9j+$?%(}dwYIJZ2eZmtZg@KwZvnQmy)Z5
zbosCSh}y|(5Ei(+w4O&!U}bZVwp;Kkg}S%`#cIV_L7}lvqcVy%GjP4t)tYb7_&#+B
zCzq_wj3CRY(uIB|JMHp2zBGCGS{PmVI(N<$0i{~?ONvfQ_PZy!y(+A=Tps44oXb7Q
zXi=dY!}8h|kNW<Wi2~Q}7q9Z{c>UheQ}xK#?{n@6J^D6NIN52#dDYjmzFoX~{NA_F
z<=-xb`v3phtvBb)j;Gq$TYLMAM2>I%ek1)pWALiB@bk--PTE)dI92kEQFg!VvvZOb
z65n52ZQJ%L@UgqEyz|>h7b}lC#9y>qc|x1*XBXee8GDj8tnZk#vGS-u{6#~_>ES$I
zMGKAW)=NCowo;w_O!RQA>+=++IKxBXC7x=}M3rk@ucrk08Cn$k?N*)qx$BJO(j`Xg
zPt3Xe?&Op`O2vNMC(|ljpUs)377UVmJ2B*`=*;3<#xtjdr<}`NpHdY!(Q>)B`t0YT
zGmB@bL_ZO6HhR9Ld{Zh&__T`gr>--Wv1T{5Kn6aYv=(GUtldpD5La|kE|_b0QxC+o
z^DG7Fsh#{5EUGzkXV#tL;XJO#ckoF?|L|0bw!CStFFk4U+DS4SiuUZ$mrlD~5Y{_S
zWmetEKXcs7BCf2NB_os3c028UrkSws|0fgXsND@)6{%}!vRqOmBg~)g^xVY@XRglb
zO=;hwR2;f?=9?L}{i=LkmR<AWJAZxB&QI6;%1&t;h2OI}x#rGJ@AKYO@7Pq>*U7Da
zlijvtmdP}Mr@Ky`+j;BK=E>L03@kOmXU}=MV4LGfJ<Fw6#5CB|cYo^+KNIJ(seN9S
zhmrO2NxIdm7M{$roSJhrnAiK+8liu+PhRQ%t8G&^RSOUO=O;1o%-NNn%nzMN`93Er
z!*6TcCU-wmo#j#XH;tD|%?r+*@Mdao?}?RWKHtu*bbA&et@`;>dG$a2Erpx><EH%=
z&YkpT_VlO!-BM51?c6_c&ZbBAGeU}5PIf-&5p{ifa$@DgIU5#bloW-;sXSk;vC5<G
zT=$a_QP<>2tlxG;Dr$S34+}Iki;U>k%2|I*_4t*=T+wSjp4|9##i4I$m!IsY3V9f6
zuV}eXF0|sFx|;fx#a#Y>mOMF974mTA{5f+%`n7DnPCa?@>xx6g_Ntbu>ziKB3e250
zC#qk|=6mqu%dY}kpYPMM+$$Ga@ou?l`jy38=l_0ra;7Te;m-Ruma9R++da;$a~GZW
zTX%9XNOhfCQJ(Fp4|npX&Y2#5@aWkU+x*V02g&D7y5F*DVySH1)D_!&^^E>*);-A)
zzqS3vHt)LG>(~Bh_sL%Er+4yt*qx2LZf*0gn|{4=>(X5_PqJ3Vemu0|^4ke9GwxgG
z@Ali8TvQnM^y;$^Yt`wq>^>Up%QBE!Vbz})W@Pj{ctPQ+;5T#DOb<`lGdp(D*Uw!&
z&o^ana*Uh!F(yr2`kAQY{L1Yqi}xr!Ha_oZ=J$w6yFkipzExz{8Q*I$YVQJL4oW6Q
zZmr%l>Hq9coT8hO`ct0%d1l1-W8O)%nNbrRr-fFluKuyw;<xtdZ+>Ctb1wWlwRXnz
zFRx{%Ut7E4_er~xt9IHaJ^S)*HqWQmcNQg0S#v`_^6-8BbD^hK{hj>pU%r;R|71~i
zmDQ=|ABjX3CTt4Z)tnjTdhLw=wR7`V`)Cve1Z^w1WBWJv=Mm0B{C?Lw&DA0$A`3l?
z6w1%cJpJiH%H25%#i4T3c+PMdO~3Q-<b!<+6^f5uosr_<H*x2qK7*4N<|q|Ul*ycw
zXzBXwicIRHhnB8tUe>o%l*3NVz2B44=;`)Ub*6RgLeEpy#{;jvsZIBtz5lvS*6xry
zZMVvLZh!n-8gfZ7&w6Q=#mv0I<vTZ*Ys@z-*E{XC=1^!r$RB&u<C01_FG$^FW?=Zt
z%fO&T+;K_q#U-UldS$KQvBitcL~6gUzwqYrJHJ;q@-CO{zRcd}dHM*ai;~(~Klj5@
zlMECeF!^2o`}L~0Tl_-)&eHQczsKk-sXq4n`GNdz$G6qgygK;l@_GBZ?NK`RjlVZ(
zz0OZpSW{liu$oI@+6Bgt64&2RPd?v#^G8O-Kb5^}dTl+6zHi+Mt`Gh<?Hg+^e^bye
z3%!<Bd-KYJg-fpJS(mu7?@GRFFDk41X7;kA|BjLNBDyCIT-Um7+r0j)`G*Tz6ndVo
zagPy=3~#8t_LX(P)L8|Qmp}33bZ=WT%l(3Bds%o#S%~84;<$s4*Dyz(T`(y$ZK}__
z^Y`jmz8~oia5yykG{+yVdv9;2g_p!e+E04taeLn%mpJ_stQ$XW&iy&-DQ`lxS^QpR
zdHXX@+)8$@xiz`I|LgtV=K?*%Qa;KZe>f?jzS#AUu>speDV6jDHkTUNhaaY#Y*w7i
zeo~;tLh5ovfmiau32lbnQd=@hvbv|As#>}x@~!MQF_pdmr}FH#>e8J#d#!yQi9AdY
z{_$w0=^vqcxf(UT4{AN?y2V)*>E3C{=JnD&;mjEG|KL+M0nY-LOT0&B?OMw+@n+A_
zS$ghQxZd-<+$4~z^xw<9;79rb?$buT(#yh9vqBe1xK{1I;v^8Wexj<L!_(Dk5}CeQ
z$^Y6f{nqSYFW()v8<V!Z4%)2uwA8D7j)MQ`1?o3Nw%u3q(LJ&Gp0d#TD0_jhY0f7n
zY&<8~=NsCn*>K~EcbV?X`%Ze9Q4@4HZcmzUPxO~s2fyLUr=PSYbibOJxTUp6rRG%3
z<>1GisayPxF!efRDtPLzo}V~xyOLCRbV>1~`->vF;!dBx{jm5=xp#b252sk|%dY*Z
zzdYA(|NhW;s@Chj3&Yz2PaJr5;dRCn7hz`yAARG{9z*pk&JR1&mVRP<?&8a6_VJ91
z+4r2BmrUV$0VWe~On<81z5fj3$`5^>mUfG5^`?4#z4zhpyJtsk6c;5;veGORo+~21
zChu6z*VL2y_WoLMxx~tI_8P^r?r%bvW^dElZ&YDct^VpL&wQ^R^Vw>4_<yLm;{T!M
z!|FfZpP8p9*K0LaA97*Z&e3Zw_2HoXREOMzu4T&%9J%9Xdd--YKJT;HS=o+@kMcB2
zOH3?3eiVwBVjwK8`sU=(g4snv`O{|Pp3#1|GF44e|F*-c)-xyWrR+Sbxu(!($4gD=
z+9G>l>6`!$Q=eB&`=?Ck_hl?Ro;)wjA^eYu27|FTw-JMPoAnC5K=rGP?^am3%nhx~
zC=-;ly0OMdw|>H$KI4{I>p4&OKAoDQ{6jcywZiSpzI(fZW(M#6C@A|T+S$)N=Gd8Y
z_UF5-#O;04{xhN$5Q}(vW#m{H7`96=FsKt(K<E{vBwmd;ou}+7a+EQ1iV|aB7fS?F
zWRt4r?!RR%5;E3)Mjx}^q@)QrE%hoty6%Ghs#SASuKi(?X5nVh{-z_qp{OGEhq1b@
z>Gs=*mq!fW8YXA%*>pFw^wpf|cY9->N`+3j66?5YtJmG4^X)!QwqME!-5GZ($vI7R
z|CNi?mljNOpBHBpUoolTkm-ymcU}rtYKm^|R`I=bvfj>N{Yh_k-dA^$bhC^*r88Xp
zAMbir<yC!1_gzdz|Bnf?)=l$#{d8?l+M##13KF7biL^blzO$^YVC&qxrJhynYxf@0
z%M4p}_nX+6gX|5<9>1!|aNp|3vWhc6a?kfO0aw2jzRuY0E%nw*m#LhiAaakj`JKS8
zVi9?K8}7C*xs_L@bvNV8w~JnCz2%P%%y=;E_WsWBl~=2dTPN$>VT-D)5okAYTwNEC
zKlxVS(!ks;tJ?*$_#0;RWfwM-2TDIZzI8F<w78DryJp9{pB!fLZ-Vqp$)aSd_0pBy
z<&9B-_xqb?FJODUcn#BxOEw0_dlyGLo<GK(wQ7flWb4<6zV*j<Z&292=vM)E#?ue~
zYy!%srd+5n`uXG7=lF{2rk$@dRA(QPKi@3IYkw?b?bF-W-xjLQ=bI_^EZHjZ17lQJ
zzk7E|=aX$$Sb{^o%;b9cYN>jarq8tB8Veu4eVK4c;7;&{nBD^Sf+v9ov{+s=>`<yR
zkWJjRWA|;hfH^lMyNu%!^i_TcdZiRpTHP{foqKq1;req^9#wx0X}ox?x!$8;ht5B<
zg}gDdGt<|F74zOt;}dwn@xABZbGy$LSKZb>4%T~9tTjU|)>*o5TkpOV$7LGA6qo1r
zZoM<(kgX*HN3izXS&_ONw`aVO&HtG=?+K@^dWfXMcjqZ59z7~~8Jv{9W1IP^l|Gf{
zW_6YIy>DLd^n<y6*#*CKNo=B1tEY86>PtGbP|R>f>dB3F{&ee=&rzypxE&+)f0M*E
zbGJqI+gje=sWEzb#_P~$t&4}-9Br~{{C@jnRqdR^8|<ew`9+nY__ZoI)lU|-yUVSQ
ze^u@{Sl*b-`sZs>(uX}V-9MJ<Z;roWxYA&K-@Z<#KQB`r9WePPRN4DiA|j&YR<uXN
zyy>l80nHPI|9_dn`Qg*~1E+cZ<r*##f4`JDhSi+oN<zjVIWLjN`bNTK_pCCRF2py^
zRz2~xl_hP~?9DAHYO~enH{aaPo|gXceD}pI6`MtO2i)O(yK=D$XZW*^mPOI5bK;q2
zpZ>A@Xv>rOn=)+4(`G)NHYfVtv^6_q*L*mpTiM3_xMlnH^}icL+En*{NwnN4790_0
zIB&z%fVfJTE=|3?GdhfyJ{4s?+`_eP-O(x2qj?-YI`|avE-a|>4^*98zrW|2+iG96
z%KHbI_A-grb)Gj{e{Z=#!715kP5iH-v#Ngw9}jh@I`d%poSE~Nnl;z&2{yjqlUo(C
zBIMN}4Ljf0m4{zF_xgF(him=f(8=6s8g?l^RQI&K3$>N!n)}d2YJcOkKDMU7;AJ%@
zeR#e*%((D%?!}gvPpd_@2u^j#S@z(Ma`V)!aqf1{vI<Vj5O3Jqe{bu~Ee|i)C8QlS
zss87AJGn_K+~(ObDUUsyR<hTdN4~3^9Cu~q<6l}e-^^}h{QS02IbwdZl0`yU%)%6g
zSuWCSQ`bCQwJSeTce`0v$c{IqTexmVhWSS*zu7J@?Srkt)znEV+ipL1v-reUCG59O
z><v$>wZwXj3x$ug#rT?EFs3hx%xAA&x42q;55KVc3WtTPkrHdNK5?h@b+jj+Ed7%8
zJ+c2lo`csvZqy<+c15m&Y78R-lbkToMQmzH+LOJx#kVcC>HVtx&lPTWXYS8Ux0k3`
z-z<F{c5>RJYn{28Lc-<muf&Az-;ut@`t29bOSa3;ul#*q|DzWJi>FQYMIV>Bo70cE
zbhJKa+^|7z68DA6yXU{JxBU6#GXMMf`~TnXm;3kp{rqqH>;HVXe0RD3cmDr3>VLhy
z{CxNQbKjT$zFco@S*i8z@8@@qm;dJHSO0nP<;j=#eO_L@JHPz>*RSi#>;Jw!e0+ZW
z?}z2TzgPb~U;lgi^7(fEKm6?X|6lg$OT7Gh`}%#=0;YEN|Ceq5{pWE0{`pUqS7v_u
zdGh5?&uMed%$w^o&vUlwvih1o54TTN&wu~_&%@{Z{(keMWc)u}e)F^biT^*f_rG5r
z&fkC6w#Kfq=;QIfzt5{b-T(jh+q>u0&E@~uSXx@2-28uz&HwW`RYiNX{ap6e*9)!w
z`Z!+w|G)ipI{*Jf{`r0R{yV$>ANKpjtywp1xw`6~{?y}hY<@nQFJHI&_p|->HJg8Y
zxGcZu)AD>XdHX-#V}I_yfA4SI|HJ01yz6)V|8aYN-H(dzXP5Ka*M44pWZi$)(r@Nm
zf6d>&mp`}c{-5K^=iA-;A2;hm-p>DbcjrmW&$s*g^~2Bkn&tnF&tJ4zChF#OpV#y4
z_y1oe^ZNI9`F|gMpG>n){~ftx)uW0}+v_Jkt}gxm__(~?ztT_V=f6K){l0$p|C;~L
zV=dYJUu_OQb8Pqge?LDg%z3|l@^b$AKi?kTJ%04A{&)V=rA1aJGsDi!*!}&zf80Ht
zEAjLH|N8sx$<t41J7Z(Dl%M|Dv;X(?lZWp<|Necx-D>U1>t{FZh<eLa8(w+;@8RdW
z`}cz)yi-#v{dar+eE+z4Hh+Kqdwkb_)6K85lRhsC=<WW${Qrdij}@w_D}Q!$n6bEs
zukJS2mlM34^|mSM?wVL1w(m6;i-MUytTuQ3*0IC(Mq<2F-g3J)Q~uq1b536H>t%Vn
zx<3m`y8Fxd?f;aOZ;HryuI_)Ne*fuZ|0{oeSFg7|nO2|u^0k|>_^ES8|HQ6)<0Eut
zim2Z6-Q8QH<8_7K@Alkt{&U;2-$5U){!T8`{heI+H*e9e<XIQw1&!C2o1Y5!$$tCF
zu^G1td^4TjtId>qYjbeIicNP#IsZo9+ZiX~`8_vS{le|sTSqE(`_7iwe!8WsdEaim
z@ZIW9>-Wxn`EUMGo&#y+m0z`<ZaZ5wyCHM)?WMg=79XyEzI=4gkGjn|?)U%w^*hf{
z&$Q+-_o7wb%Ida$68o}k_x9UQYd+RKx~r<6KS4Tgt?+4?q+j_{BG?2^D<nzIjCdz-
zxqk7HqK*hY!P6&?sPP&8HTTM45}fUDM6L74w5M4GmisO5*8Hyh82jsQ<g34q$2(sw
zU83O^AGbd2XnFT!^~96Ai?4Q`53({`vBxL%&9$3KrR&63fBpJMXze7WYkRm(CaY)X
zbe&DAH2q(<yJoMi<dle`OD>jZUz+`7`_9`Fr0?cF2rIvTKW5*JbL*!UEZ(Me?OEPm
zrtDQ~CR}l9HcvCnH&Io|zcN)Z-=tI^|4c#tlu&{EDWVGbXI9*M5#}T1yIpCoXWi@t
z=D$K8hGpJ+arMY8m%V`@9$AWydiBkds=Umn)bF#t?DY4H_^TO5i~dDTKFXUB91`<%
z`tqmF4yzu&xIOu<+r9lWoS%80WSw!|;LD@3Gd3-8cjo2PeYWrVc{*ugR^0u0Id$Rd
z@|TO}pGx0;yG3duXBy9**m%*bSvyrfUN_{umizQU<>t@dUO#zf_+9<0zwqs%FVAjy
zuYUbQo3|<T@mfE|l-t+#MlG|6nsM9sor(b4AI}6YkI4#$)g0OUm<sLFg*uj(lnbrM
z&RB3uXZK_WaffZWu?a#sVau<djMd2Zd*x8PyP~^ghWPhnUWaSt=AOrrn^jh?Kg;n_
zyJk{%m#4&+yOKs$l4e#)j}#XxzdtV3ux7KH`e!%yxIi~`Z~3`N*85}P#KJkZyDOZ&
zb?BsMTJ_B@Rni+`V&>gDcVF+TQ>y;LcOAFS*6e;Iv`IT_-^~2(%dQXiOTXV$AN^**
z@5xto?6hXSn4&OChtqe-`TKA5{LEkHZrl~wF;mU@o_=$j!>m{Nu6Op|eK#%qDU06<
zarbGi6D(6jQY5>4uI$!z&ktA8HO-%H-uh?#l-<tP7TsGn<GzmGzWucubu@po3fvF7
zz52qpuH@gYJF~cBzq<Tq%<Sq|`-!tobBWhi^V3O%v3pLKA1(V@RHx}sbv@?v>_117
zDnCA3x+!~IMfRF)DgsfPA2l_XZmo@tvaDS6?|bY&AO7#fO>1BOEMGl+_T`^t`yz7u
z=T%I%d3No}(b<<C%3S_5%h-MG($hbmZudUEX-`|#wXo33TXs7MPq}*N;Kryur%m?v
zxPHj0d^|&Uy+ToM*!4r@drrr-C2x-1{a8nDVZr^B?_aB)&(K|8^|JNutNnL&D(fwb
z+h7`Of6<g-=T}?*xNnauw>Lgtnca~x`RRerS4!m%7rnN+lpEhy^4fCJj#sR!-+O%8
zH2vOJS<kp{4?VWeQ|??HS9P#lrIPb&)7qJ@Ja!#&eRVyrw*J%gj}{lBzy5g|_w~`T
zcRk0|_pGci)wkXI`x_g_?xgC#MuG4PXADGx*$ujsKAU#zd$YKEvqSTY?2Kt<k>A3c
zihW<~?OEw)6yAJ-yFkq}vUHkXDeJ`SEw6Ou{@OJCVZn62+LQ5C#{SJKK-R}veO0}}
zy-n@%XB*x{`oBNg#5d1?`ry|kg_)}zpSarhJ;@R%y~-VSe`3`og_-Lezog1TguL~C
z^toJBkX+?x6wsVv!#k-`$|V-==o1$eW-fQUB5GpnbMy-1ovGi?>zls}ydLHu>lFOZ
zY^&1+!(IPcC1$_M?-Q2NR$9Akljb^wbVJeL-Bx``tDkMEW>uSKa-;N@_X>q2`+ZDr
z`Iv3p`)+FZly|;;FMs`elBxDi{CxC<Gt)&ch)q&-wF<I%Fmqx^{r=f6Pfonl$t$*c
zp<(!k3msi6orT>Wo~bE58hx}^b@~1yXWW0C4q1G@Ch+#_xLaq$MT2*T-=A-D_R8M_
zlc%k1*fxPj^VY<f#-ESgzu;jOQPS=fE7+#?`0SrEvwyx?)jxB-rE&Zp-mlYF9-H~o
z>AK}z@3}uEEk17sx#quE?B`V0Ev+dY6Z`&Li~M{QY{HthV=)Jvm9>`f`N|wEtJ_&u
z92_C@ODag6cN+8IQ+ku8-A~y5DYW?L_4GrNj1P&#i(Y-PPb;fhxaryIMN0Wjci4oT
z;+^kaOt3WQ@#hFOzB={l--MW{5I^r;*0uUoeqH+R!mBZYYQoy<rd@5mdNk&9`1CXJ
zv0qe8W=g%;wYocu$##w2RH1-+XXTt#g<<01oHMjfwLDm>7r9~AjO-QGQabEyA2}1V
zmhIZK%icYFx=d_r(X&^RtXFscn0^1|&h5KaXdg;BRk_+*ZjIivS^IZA`S)s({=$=2
z60XO_UI~?7?fq_z-lP1C7GKkIuO?Nm?%uV?hvVL>N$jh;ced?Xe6T1%V!pt#v{l-x
zf2+TEW#kw>owK-frUk@w;r!CT@RpM%57+8VPAE0J{^x4yqxE{fgl75hmfgMT8vAwQ
zE}uD9UH|a*ZdiFNGFI*0t3~THgqybS@@cwyGzJkalV6<bK3b-?uW04}-unAoeh)9T
z9eHT@`Ie@&Z@Jzx(*|Ah>uSD#?oH@klhto=vHtjT?>h@th0fOLHBUb&J3&!)!bNL^
zVk?LLyk!n;B@XlMFj`(>wA{;Fw4C|N{RH+W9_&7otP`3_4z%236o!cTOtN;!iNEOn
z@yB!CE%)^N9(nGKo#R)q>(9D~yHozNhX|$@$E@3XHdoVhoAric-*zwg$p1>`URgM&
zo7t8H+jMrSe%v5vE_dbYc>~WCK@D4uPE=X_<+pLok*AqD7dlo;o#;3%^`PUmRga*#
z*eXGD)hUA4OD76mXTO`UMcCcuP^8RH#cdO2+RvVnb7#SdW&EE#GVa~mJ7f8MT{9u&
za`oF`?1?dIWt;8Hm^anVwYdE>k!O0h%m3i=_`Owvb0*xV`(MiS<;0&2?LIF&gJP9G
zUA?x4_uRUi-ImR}Tx8fAOFAv?H{MhIbb@uc_Z8En-kYB2394(UD42ck;{9>r?TNj+
zuOuk)OL=V9@#l5ObARW{zISdsGh^V}xBijql_z_?*)e_2+ke%CqV>NUB}Cr^NKOs!
z2n_Vk>)p>|w!Zw%K96sarN8xTzHIyYE%()g6}yE)*WW4W|9Hk=p5!s(=8CkFHmlG6
z(SMe|PH0|viSFi$aw|%AYY5rie7DJehvke{RsFke_^;hQW43mRV%^3{%XnRvvbyJM
z6MrB5>SXo*Ra#uf^m0eWmPM<oG>d;(XPYz!zE^K<TIRBPN8$3KN0&2Y`)<s7pR>X|
zTw=nGn_2dI_c`pcN(y>^YI{3Z$aS8>tKYsBntNw?{J;0R-|Vc@FPN3!wRE%kzE8&H
z*X=#G+>fvCmE3RtVCm}9{6bgn`_5)lnEZ-$OLglWU&F5%#$ng5<$u4ceXYl|ZO*-{
zn{&j?Gha=-7c}!!-2H8P?(|EWeiiy1c7LAL;VW-D^()Svy;0Jy%765I|F`+4WLNz=
z#<t<$5^I&*lg@>Um&HAraKy0U@?Kk2aiiB?#0qy^7cP8MZqD%G*EEZ}%9$2xw=X|u
z@KMq;hu3S?J4XB9@b}Zc=|w81>%P>T{m=ALrElBUKHvYd1QXUOetsAdufT8RtM)X{
z_xmdTIa!;RmEUyVziRKSd#UoV3fr@Gh1Zre-dg!G_S;3){4($Bl1H9e|7~`B_@4FX
znOj|*|L!q3zhC@Kull3s=H6TT-z|K6Mlb9CuJ*=h(Oz@A<<yqka(o;2wej-zlhb&w
z%!s_N9{tTfIn8!{&ON(c$*;AWQooy|UHk4?>G|>GuW9$L{np<gF-J@3vC7xBobOz}
z8!jbWE0nuX?xQ=Y%xLP>xSa1?KYygYVtlMN&uwLr$Cc6}6ZWR)@3}N-^M|nOKJO>A
z&1v1fE3Im?Ny@XneI3tz6V=`x%3k;DK&0-TZ=3q-){4bdcmD979J%|$tkrhA7DQFN
zRlUTzEosqm(*p$|-Fx30t&F)E6sycLn}_|}<?gJBZ86UUwe{~;YF$lQ_v^q*Yk&Dw
zuD3qUUCw`1>21Zi%gtF6(`ueKhIX%=@xta;olD%FDerGi%Ilw8@}za=tHXwOBl-M_
zg1dF}U7mWy&CpJ<n^ARPhw8ql9;S0Ol?(N&B|3B_h(D8>dCa$Mujr*1<-2!McFeN=
z#5B{!S8c9nQ0&*n%dv`IQ|14@S~ua>q`gjQ^Y#RQqGPwyEAJ)TIY(Xmvl||s<gUHh
z{rShILorZyPu_DPrczPAsz5G0ZpCW5f?ww@_wP9Ywh$_`>p;2OqCF=ZDg`YA)_pCT
zw#VT3$(`Y~7R#(pAN0)2GJMi%>3MFi)3fH4>^--)OaHpf9e91B__s;60+%Ljb_%<G
z!X(e=&6){UO)s7GZ99ACqWFm?nMRr69>rJL&t<i4nO^%Pd#lqe?`K?^Z*PcRiurnx
z^(t4U{zSbEqQbUo8QYZg-=ylFdwi<<l~m%56pMm+aZg%Jo>=kk_+&Qo%bexxl?%^Q
zoV(n<XF^%c^Ow$X9@g_de^Jn1B6+{k<C9aEPl;Tuy^{Vu(VPCO@4h?xsc7HHpi9cW
zYmc}+ihbN6RDAT`5+xqXeT=)>R!&v(I&(LA#cL^t@StNc3+0nsY%}^U+@I31Yu=QL
z({0xri&RKGWBSO*w{7p$8!?+>ZHkxn>~UBYGuboUG%URKK}mRW?M?UnyH;=9m$LrY
zO!d?&q4Kd0)*bsL^pYvs@Zx2ugo+@y_-~JF_DwOo&T&}naO3AMDyc@{r%rUs%{e~R
z=+!FzIr~0;QBF0AKlS1?RH$F?!`ya_RHJ}X4*6dDL}#uIurb>zB;8rwtDgGhx9Gkp
zEAOpev0w1I!Bzpy$zK&y?`$`E#x>pOLG;WcpN$qZ6oZWldu%ho=$TaEOtr)JvU1kl
z)SI_E$SqDGc-_e*o26E-wkrU+`OV_^yH_LPH-$gGGui0Xs(!tK@Z{RglE$?&US#qb
z*k~@+uP&5}KQ$w}C2{h@1C>>ijCN|LK5^wg_t;Ca^eVgG{mNexjdtp%eo2K2xr_fe
z=RC#8QX}=q!Firq&iDN$89mx?VhJeZJta%8HcvSjd!Hfp@D-;eKKI(EoV3+kyskiV
za&ocC$0w^b9(00@TK!Q4)#-MH_(EOS|I~`rcDoM5_I`!u)elR0_Pse;S)-Y}PO#0l
zjrsXY&r?1zn#$lb4^j?J^HXO20L9J&n{`tHLAmC=jf<u+<I)}rR}0V77q>lw+~)Yq
zzT&Yb+eUNox~d6A!q?3mz@cvZ()pARNU%WD_~jhsU;IDqKkc9QujKo`zbB8*7T3Qz
zA9<AG)$IBID(k<mpWMFt{QLLzwPE3(*3C{W+<Hs&+PBNU+s~KF*Z+LDeD`FAySH4g
z6ga%+a^JhF^0snDw>o2h&_;o+Kh9rX{afDt--nOuC)d~h__6xW_vPjG_x~4_et&-V
z_vGNv$1k6Qhff~<ZLgoQ`N_ln`*nMM@7VGC>A#0@+ZMf9&G&<-VX&wF`$hg+-afDN
zRJJy9{e>Kjg}V=1DxC|yo4@aGU3^8m#!J7oR&jU!e?0uYT;BeF>8HC_&zApQef4b7
z|D@8bA;<m~e*gI7O^(rQ-#HIg{o|7Ao_pg;ee}%<M?#XB1tzP{d3RKCrs~$c`@h)o
z?Ox#eUg!MroIsgZk^ingUGVnkwQ0w*&vKXd-@LW##vAd|t1B&Cr>}3$w2Im7{3Ge=
zyJy~lWm5l~ddg?(yY9@Xj5xRZeZJmz{cWFLKRqyIZd-fup6LA&6P9J<a^y8yd}s3e
z8S*gxIBS*mhIoJfd3C@3Y!vZU_y70xJpcRmb$=dT{$Kt7^Z$>G|Ld1tTrU6bYk*Rn
z(!Zyj%{Pp{KhNxqPChze)nV1Dx{5unMdx>&J<2CvzvtPu`)?Po&ynAH^v1#G{kIa{
zq<lV}y+LA=|5Aren?75w<kRoFY7b95Y`gvXo@*<D-|v0>BkFS7YwhT)O$X<T%n@U+
z3Od177j)q*@0TSDqNQJWD*krz=Stk|yrOT_UHuPB0<wQ_8_Ip~TzK!(hB^BWOm<rP
z@Sz0%&m{|@q?@8us%|$dUR+)(+kbEEfqmyb*j}03l$p0co%QaW27j*5Zf0A}5MI77
zO9D==fB389fO_kj({`FS9)7t#%eg*?V@8+!A+6(|JAd8()_=IrAl`EO)@R%D9+hbr
zD!Hw@@TALGUA;~#cYpL5_K2vQU}l>uH@C4>ED6qyjpM!6ni||(nt1b?LF^1(bMDaK
z!zBx|vN!0-WQna>#`gM9V%ow#jz??1T$hqxzVt@Ext*W)#(2e=CDYhuh<pl{bAJ2x
zgzwwr{l9-$^v3G9eOR+<<MH{@q0!7c3TL!x+!m9Z;gq*KJXdl<p-=q8g6y=N-y+sM
z)`{NzPa&gACG+{K4VhYM;okZOw~E@_wB4eAtS;(PU{u%NFK-r`sMOgP)&Bk=D=~Lc
z>f`+D;bnfWPFFmt(_XVaCn)W3Yvj!<0f}bPMrT$XYvbI!YOTI-nz8<wS*w4Xx^s;&
zej>lg<|~QUVva^`EBots;fnXHomM%sx=tn}nn~-NNpo(!`Nq2~@@9o-+S{j%?KjVQ
z?aQb(b!pj<%PaURCz-iL`R0wURokUjiKj+8e_fQ5vmq|#ZQGA45nD|o^t+C=y*hd~
zZ-t#swA3p0^4&QHwtZr}EtL^>V){+ywO@9vP5c#LZWf}?xBb%VZEdfPGKT-kIWRSD
zyJ-YSD7|^@mrY9-Ru$}+8n?ytikJTGf`-bEY5R2jzIP{CA82E^dTrYc-fPzcJXfq*
zdb;82;vLiE)+o-qS{iI!A7_&ke4DZ8M~U~nB^6uRHZktilD@Ed)4@Gj(&tuhdI+IF
zyhE$I9(^jQx31r9b9egWcORcG$kmtLvA5>Hw^Qj0FaKrOe8glL@68CifaIG8E(dKj
zzq2LeEw8!mQ}JsHmo3f7S&^wJEu9i|Pmk;8+^Pl3w(U+@@N(nac)i2@fBT)hw}({R
zUMtrg@`2ZL>zcl2tN-=QkGR40Li<-$%JJM8nL=M)%)Wc{W!>g`U2mPZ4VU;InsoSG
z?8#?ukIueZSG@bK?)qudnZInj{-XQmZ0+@D-9MiEwIOY5;#V)ex`@sChHF9>ALe<T
zXT4u8L;3#Kx_@`G{udSRnx8*?cdFrm<juEJ-j-Z&&)-z1@G{vv(*FCmjnQl5n||NW
zy>@PS?H4w7sbdMPrO(${T)Do#Zu-lorq*Y^Zk@Tt=HQL}a=JGgUe8#0OFnajsO+|Y
z48=8l_59v$-r=%e<)+D$J&QGt{k)lT>!OW)>;IWHZ%Elvl6^VyZ^c26<(vPxPTP>O
zrsQjWMvH3l($)2qnmU=k{?0h8zNTJRT}M(k@o%=0<H3xVx8$F#5|#b-ZnD^+PwZVy
zO&2FkwRaT}>6yCb=gc)x7c)59gLnRXzRk_SY|g2(_G?N%q<lSZ!OGh1drfku;=Y<)
z*>P{rzDnL+VO`QKzSVqn|D6YBHRXS9yyf*RSfH2_!=(2|e3tlGeUsY-wXXl}pD?LV
zzyHbW--VfR9nOpP28yzN{BGBNu2i~cDy#BSDLdm+P0P}cF(+o<Ncnxx-l$tG`}N<&
z=9X8kpImivp}kRhbA8IWwtpw))V}OLlk{#Eqi?La>z1&L_=`ywe6Iceuxg#Vx7h=$
zv{hUC&ur6>JLK+g<G)tAmz(!>F!l4Un~wL_mo|_3&oss6TJ?Wd-mDNl``qKdCv<AA
z{(qI_b<E5B$B7&mHA_x|e}2J-i8rV8Oe^>>F;cu|THagb&AL`^{H1hT_Uae!O4yPD
zrq-k!?mx3FV@u27l{UBf&oo6_Om+V~(URNV=ylU!wbwm&Cdkh`IxD<-^RFAad|z5O
zWfeZ?KXdbd{LIZDPsRUGE`C;@GHtpqW-zhI&n$KPv-kYMVqQC=*G&_Pc;`zV|1hy~
z`OOZUwT*U0yM3=syYHUAY2PFJvdLdp{Jo)j?a;Ty<`x!57q%Hj@XiSg)s7Dki2oV2
zu-3KPQ8{w&8FtoW)z#O2E?AH`*S=y`P*c_P_i0@(Z|>;uVto}WXBMcwg7@Q!w<h87
z@8owMt@695yglMPPxTYF*Fi5PO0Rj^YFk!)m?v@Z@7pc2q5^IDwl4hL71k)WPm57e
zM^Za_YQ4a;Bl`p7ZK5ap25U>beDNw})`pZdIoZWKRi{6DaPw8jtPLqka!S>FBaDK!
zSxr>a$*h`TRk6>iUrk3+JASU4ut?9;wPzQt6g|5Crkq{;%t`@~o~f&SY&f{wPF-Dc
z;Y!!BQ|5DypOrLeKW{qc_*qVq_H&`n&$F;TezNM@mY>%@UZ2i>J|yqcr}f8AnkZDg
zu;CS+*lqe@`IC%a*Fg!%`~)Z=sk$2-klTCkpeCPb5AW*+UkNU*NAI^m!|3LN;G*nf
z7amUjI=|mKsEu#ly6>8ism5;1w+;$_Ju<^9%_d`!Ux4(d;7uI2w?6&1F<Rz@^^)zg
z_<yE`uUm20%;L@RCpS2i`!6Ld{(ap}_4c9)nQZ6pqHCFSYyO_kUzV~a2Tb+M&p1*Q
zG5_@Azf*KhTz&Q_!(Np;Z|hE*TmB~x`Ty--y)0!(PP6|>7`5bO;;RQg+2&93JsAO_
zto>3fO15qFKe;WVXTCm*<$K{ddJ@{<U`q4)hu}@RQrh<m<odq`Z(1OB?(xPtuWjyz
zpip{M?-d3Kr7OP=ty%{SCDF-0pQhP=Se|k<<?Y{>uz*UmSM3&K|2suTT4v6pfWs28
z>`zwgiVx3q{Bt)<d&~L^!wi+zwO-p;l~rHYL|>i$@w*MX|CK=XUqx$N?wZSOdvJHA
z*xdB?N`@K2SK5A0(V4wk|9k)4M-KND_g<~pp})JzRd(A!MSIoL-`XS(9dkWUD`9;7
z<JWb(*TbLu*Y&x3UNrQi$4x8$lxJ0Ie6k-~T{<67wD&`M>7K=}YV%fm9sA+vcJ`*!
z{fl*Z!HZw+-BI3k?E9tQiN$euZZ~Z#Dg{v!i@w@BSh^-Zl|J{lu&yEK%Arb|bNm6P
zT=$yTEZ6vF_xi)nU6~c3CnIixDUYp-=LfwK=`AVQJLS?UaH6eTqPg^x|NS@9qVE^G
zp4`1M$y!?c_HC)?NF%>(ai<pQW>hiOf5^EjA|CzWUChMVvW^(h>G@9!IhvPou29Q<
ze@uSw$%Xs$!+rT?t0_dunD{!FL2~9Uu@ix%`{&$l+7Xx8`b|`qtv6+_31hTD&?diG
z4f}f3n`CVQpYNWzPewa1eCdrQwW&ovO7ySi=e^mS94aKP#qR%on_KwQo+<Cj;vTQ=
ze$?O3?*C((Uxc{qx1!LCk_Knp&BCW=gTmTU$?wX#mxtZ+3U)`lEz6%a{j=}3_$vRv
z{<|M8__UwVpY%3&f53S@lT2yxeGi)3f<?mb<-XXrsC0en`rkr3v?R5ozpEC63iUr?
zKY#82f`{P1;g<ph*|le%JnS<x>`O0yT{UUqrmvHPSA(f<t0oz$ZCtr=%}3eXOY@|B
z^>3ckl!_1PQF^XoeG?Qjlji0e^w{~!v)b=s#Lu?R6>~hRyP_=mkI&q)Jm$)O4#RVk
zMXo5Y`SAa3X>?o0c=6*W9((Oxv!AY$iYLeCIQ~&S-B@56bA(ZkS$%(pTDE>3D2z9$
ztx{|EtCRfkTr8!zIanr3Li$?MgXdy7NJ&*%Wq;52=VDJBc5SR)v)^8U{i6CU4Qu}S
zE7k{{;m<HxG3D@bX%+4nlXe7HR_sdr)U7G0c{l1)w{F+|KD&xTTc3zWm)tlV>Y9Gx
ziMZnK?4q|Dqh&Pu4|Lu#t^IL=w{GE+>5cWvU9IAOlzhDLwsz)|>H5E!4Nv(uw=hN{
z1?qf*1g~SKuK7zCsD9L_`;c?^iFmZhrHj0i;(bm=+`RVeQ^w@@mifP4Du6To6Y*f9
zplyyIx1<|&NSv0sFQ~r1<08)_ww#L+_Ilh!ahDoE*<L@>LA+;5_KZJC-QeOe*|$y*
zl-RF55r4SopL@qfwf!BAJTv-CG>`n26s)xjn)fh$si69P7W=#u?nm;Gd@ZXVPI}Mo
zUnl5$E$)t8)nw;X-w<EExql|{gYdjRlj>hSnQr4#caimDdGy)~`xYHtFfnJspGDkm
zUe~<qCQko&qxOS~?Ojd%<6c+7HFquWTq<LCS0VDilq0RD4qoP+9Pe||<K?wU@i~Ei
zO1~TwUZ=YM#-hV<>$I$z)%J7TjGYWltCcL!wEBTtb-#zEna<_J$?+{${yW)PUs#eG
z^CRn|{x*$udv0H-b$uPj9dDm_U`o%_wV)7v6!_=C&9;;J+cK6cmR8w6W75V=YtKHt
zsJ5TO{_AB&pOYRp*-q-iL-bsVfZ;ULeae1yf{P_pcyBB+tcwwQvS$fntU=g1aENMN
zH~4u}taoa@MgQ?xf0S0Vey&(^QvZ<a-+lp5&^AjL$Yut4yi?zQ;`Bst^0fG=%0D^2
z1eQA0ejl71?=pF-`1byLPXZ!^Lnk|{@Aql*tDDI)?~l>XODFXw8~k(?KXN~JtJCi;
zv1YeTj-R^qBs3%Sf4asUOa6XP_-o1XJu=#X@k?JoGJkUlV=y@5oBPxmswyvy_O9FL
z`tkZjcK;pI{v>ttRqtH&f@jvBAXvVyWC`sCWsnJ<T!T!Oh)7R+x#6U~)2sT0^JFtF
znd#MllJg)+mMM>r!!lJ!ZU2j=AMVqbAMU!f?_T~V@!v<k{wcEGACb>J-Q{&Ti+nDx
zQ`GF`hs~z*-j1=$DW04-dp6(gJ2^L=oomZ|SF__;+4bp%O}|xbkL106E7dR|S>Js1
z*MhZsZ^rWMh|tTQcJ#p6xB1W4Ph;M;GkVQ6X0z?5+Ih;BUgy1WYxd8w6E}-2_e*Zr
zdg&wE6y8I^Y<YfG_Zo7!j!SRYdFdlt&f1bajM2h<<_X11AM;+ARrx_^?Y<M{zc2qi
zDg5`l_0J_w6)YwkUvrvY{=MIKe*LiZ!3QT-`<sWB-B9pNJ-qQ$TcW7Vzv++ul<c1&
zem{Sjy8oQ+AL(zx`hRq(El~^dexG^N|6S14C|lpxg3-6%wcR)oJYRdJb@-X12hWQ-
zrtH``iPtK8lfGGaQTe(V-Ocm0n@$uItIC(GdlH|s&gag~Bt5>mbsS2E&rUtLpg7g&
zLd?X6c@zFr-n^6)_xg}~&YErgpAB!XI(y`JmX37J9+wAlIeT30$Yt$uiEi!<x4Ti%
z`M~l<MduC6D;1sF*reB=On9uybR*%h>Z9uck5z9;rR{kY<-X?VyU*M9bY#ypbBUjL
zWo5C*>*>GeSh)2adVcr$Y{Mdvx<{`*9e(~}QH<61r}b<n)C_!iC#WaRl6vrWYv!wx
z9m~4jzIvMS|A#g6-EW^7Z=Yt%dtb8R+mn^f2VdAeDw%kewfXyvv#iM=!uh+!S=NmY
zTnqQ!5WoHNX;G<i-1#&9^R9I9)p&OvPnRfsVOnX~uq<EtYNg_(s%%&Gxzpk{X+8-L
z+xX<|-U(NaHQd=BSN-{Pc-`dw$1CmJ{TX=<7jj&DSonqIs)0=Vg#tNu|M`4}3mH6P
z;_F3Pj(&P{)_dm<i|g(3{#-M|g<`pHc}&=SJ-cYb*5gktE__P1<lFjfhYWjEozC%v
z*W{)@b~xSt^hfJ8xr_UDf4lK|+1BNvx2|vbkrQ|B`|6`tiyDsad3yV)@5br>Z5@tP
z81$_A7;CscGNz{fcT(ji6`jug>#|tCi}I#e-wo}3_iDpStK!VBFNDo&?(e+u?s*dT
zoPUoO%&%d}yT1DC$;qGg-#crvGV(-LEytQ8Ct}W(|85U?^JJ%Dbk$awWplsp=R5l1
z@A|`AjIRjjZrlARX~MK?-49MbQQo>)HmB;op8WpjO5Sgd^7HRMSO4$l;;8hqp_enA
z&(7GlC{^>&rX-D<sll%Lvt^a+9Us3n3z&5F#L3OBTQ^sJDN}m9bw}9Ztvm9#exJ42
zw`gLQVfEUXd-JMRSf=D9ZM^d3l>Kq@GV9at7VOL|`+Zko;jWw&-xQw~&bql~d%wr=
ze;>ar=YM*Zf4+U_w9~KV+x`FWVe%~HApZCIVdD95b8P;8{`W3k{(YTg<&NKf{{0KK
zTwb@U`hT3ri~9Qd|KMd=s$Tzoe*XLKd;j<SckB24|NQRq{aJ2*lm6a~Th?%6<(8Z4
z)`cH^^>$O?GLwt7cGYE8v(MehIyawjZTRVCMN`|^X_-s-GFHr+Z+m|J@{L;a<M~=c
z{^dOS6>Yt;S#ovy`E%;eJ-0kzzT9}h%KEI|=Pg$k)mT|e1Z~#wkJf#%_`$&oRrAs_
zgE!PnvJeTn`SXiOF0YP!G+%4Tyt96n_q-~rH1Kvco0)Q#d$-Mx)cU;<Yrh|@E8VPp
z#Ql<6R(SrAkIWXEuby4CBI4=)f9HABzPx!;SvJo@!<xhC`SQz`FTX2&|Mcvl)`maV
z&He<=e%9$FlNnNW`Q^PYSA;`9z5DWhmx~RTso6i*YJKa|^GnyeFkW8cXDY3Gea$&j
zY3=KK&Y8+<U-z8*I%Q4F^3rveHx|vky7SzzQ(xDd`<k;R=KSlJ^T$tpjhy>>^Twju
zxaYrW*2KIHaX)3UUi(PR8ZN{2{MmN53fDq8q*6k0?x#wE!aF8!)H>oBtLS%Zm4NzJ
zO&iI#GV8RDoQx2Cv}B!tdU9yT<Xuj4dO{WbUU3x~g|%9t$Hbk1X@-)pWytFTs!
zwc1BsMu<MzvQA)ma%jipUAz6<U#~B1wUAxyH0PS=qmngTg;C)hmp5u1$&6L>JHAR_
zIf|s=CZ7H&FW0OSNKX#!*u2YWPH(8<xmR3;W?`)stF@2Zj1YaaW}nGfx7}t}MIYs?
z;VKLZ@7TOi>qum*;<;n11ky`eEu>dF&4EZ7ZZhee@-i}3ab9nz;=HS(k3iZ{xk<4e
zJ)!PbQjbK0y2QHlggReQJ(3}EL~Fmz-S>Lyzs3J7d$9S<pP!rG#lGk|m-O%J<(W3#
z(sSP^xTP1(n(r_4Qs%&mCr?XW+s#SZY<>U!_5h9la}O;z-^{n^&!3-fDi3|+eI>KT
z*>bO9ecd;k)S4#?quZUbj4bQ#y>)(;vc)-Z>iKg*eT6r4!(LzhyYz?d%=J~76?Sve
zes0dQb92y$dvv|eE9so^>ga!8<<$c>&GQu!JED>O{N>f;zgO)KZHllyzftb>`hSVj
zj^3(V^fjXXYyZ}jYgkvmQMk4;=-`~h*HeC!zPVwQdWt`BuGMVY*`@tSQ%X1ZMP6gy
z;Aa@Y{(4GkEyHV(W|+{@jrVfHmj8Zz)o;(<AG5BnOi#bOd2@>0>$|UBKM&@*_pUVj
z)6Guxb?fJze-df=ROsiMeN|?gFBiZ6^Tf^UW@5$po0ZcFCaiu`%yF;S%+l9FD)N&h
z$NQPK)$<DKwm$m&wfcPJH1#=cf4+U%1j{mNUH^X^*WZ7q_RjxLmw(59e`LSB`m^%Y
zr}M@0<M!B82JL=o-xM8{ynD;VF8zC%d-s{lw6mY9R<h;gl=?fie}4SCo}<+A`)k(P
z`#iRWN0;XP=a0VQ_wRK@s>$qSdwkYy6ki^G>_z(VL-yGZ=F4*a-_uxMr}9Ug_m8^!
zq54|~>Z?@#r1SnscR%!hP2>NY6F=DJKL9D1Z~CFWOy$pf^A8}N^b2|R>O!ORp1L}f
zSK)K6Nj|ODd3=9C-Dl;%{f|P<Yy1b%OQ7@@DD83qB0dF5KY`LF7s2Ab5C2=-=ni&I
z{-W-_sP3relE8l;`sI?qf5(mfOJ8~a#N*0(i=!r|{)6b7Q2H&DW;BI}i$ZBlFr6R#
z!<z5gBbTcZe_u{q5np&JYs!BR{Rv7-Wl#CP@kf30ueoxazeJaBbNeaZ`AbxNCxl+U
z8$zq^gV4(lfa%<*fBnsSEp*M?>dQdBSCD>M52Cf8v<aBr?)XQx^IP_WI`>6?q+0Gz
ze6f%1X1U6$^^RX;Tc6GD+8ft>w5<N);lt}c&#(U{QF1sW=hv$LzZJh6|G7E+^1I0w
zv;Iyj{o-Dh@^@nS7x%i5zlO&DgkE;f{5ZAwRr}}5Cr#epi;8*8zR`QrM&%=6Cm+A$
z+?#Tw+G)M`@r%M$8#}(Y#A)^|R#(flHMCqdZ^pK-N50IcTC`TVZ-x9VvCiZu<y+G_
zlA{!FiFG7L$*1Z5HLzY(XOaD~eY5hb_RrJmEbJH6Rb0Eof4*;p{Jia74u4+!vfcPI
z%f20aRS(bD)X%QBY_U5rf3BKLcI<2BwW`Xs3#L91{L*-B;zYX(TAw(6Ib@&kkk4SX
z{AFjc{q@1u3;55yty=K^slcy<Y3GId`qzDJtdtgi$?{q6okZ0^o$iTo2Cp9perbx7
zP~Mvmc1-yN>t++Ts)K8K-7j$edT4cx``6815><}&QOBzs?IY!#^<S{Rj?jPc{8jP`
z*1r+5uUY?w)bi|IAipYk?}GU&`xlCTQ7&C0{zdq!;TNZ3bs1mzj^OiBR*o_?WjcE=
z*oYqan11{c_t{^OGEE?XHS>=KW<UixpaL6V0)0>c!Az)%DNunzu)y2`lUjvyzS%EW
z3QKNn{Nl8^PK<qpthc^N`Jszn95?6K$X&gmBh~M2Z03FJabVBcrjHe0k~YWK$Zfr$
zBi8S#ZMV8ewCs2L0_l07FS)+S^Dk6CcYbrr{6lNLwoLWfIB!GJONpvOcJ@cA4%s=$
zIQvIDm3YmmEqDCB@cFx?hu*h8f2UQbvG>Cp6YKL2_f9*1*Hq~ZYkI3hwZ6q`=NsJT
zUKxCgE4bFSL43~C#FV`S_Gj{cJTqwAy!oU~V(jkw>Fs_0AFw}o;I3d_!Zg`g-N3el
zX|uC>LD>tIbNq7;Y<5=v@aF)hOqIk5{#ef^?dw!NHP3fyU#G$+`~S;<kMg_ttV$$H
zUTD3z;CjI^Yk|<pTG?;)Z|i>rT(Z17-=^~W_y5s<|Nigz9{d0A!+#Ior7yp^e1H9q
zACVU#;?`d~Jv+7V*QctjyJF%)WtIMwg6fIt3Tdsp@-1Dr-;3o>&bIse_T6^*(|nw|
zbLRZ-&40XxU3#-zj!*Rl!<Pr$?lt$WVV7S1(yVFMY26s(#Z`@~JU%c*PJGIGjOjS{
z8s0YX2x%Vu4Q3K?3AqM)4%|wpXxw`615<YM1J+%74_KFd6`vly{?vc%ZL6o7Pl@~T
zO1SF6YX29u>+LQSZ>uZZtFi6#>8G#K;?{TwYnnK|Y(2oTRGCS5&%TH=-9JyZush#6
z@q5EX=IL)L`OW5iO=#XwbUjBP?A<KhL#JXlJ4WoxHml%Up7X)R@9bB*XA%6xwyzo8
z`Gfbi&%Afo<$dD3?*?b9XFRp_`6TzO;@;sSFA}@H8yx;D_bmP1VV1MiGZt3z2b;W4
z?0Z)06O=H`s`UQ3^<GCOMSWaa|NQi9*FXENuB?Cj_n*mExA$*0UX#A;yX^Lv$?w11
z6WMyt(s$ow>-LRb&uxBUz4y<HYu58s@4tNNv-R%GJ98^PB|JOXJahT>c{Vdnnyc|w
zeVU=pU-_v+oxkF6#q6aSTWkL+-4EE(zs{3GbC;Upgcq|~J}k@@YHC~O$sxK+?di|s
zAxpmtKFtJCLQiiV3sGeW3Ks2{pBUO?WE{%b<+HE)ZufP+-%k7bUEbwIxJtdti<ko<
zK7$A^>34Y%r={QJbqMm7n;(&TzwYlRwWrH+zo>1$%Ohp^{9Vh$;&*-$SQ*nMZZ6;2
zJEu7K_lel|&+o7Orf<Id_s_EJzt*P)pPu+Tf8uZB3w75L>%nWmYd1!?{|~ieextuW
z?(Ow_uJ3%$^PitzKCyqn%+G=*uYYjt`Z#^p_UY3LFDQCmd^!E|>HO)j#V6mEu4sBu
zw#8{n>$JYzbMDW1XMVqK|NXk_*E}EXZrZVRPw<@?64Ek{HRdRZ_U#aC4Q43V^yS{k
z2lot*1zLFSReq4LH@Ro|p`RZ<zAO3vA?fQb-rku@+@hCwcb~FjTam-bz|yh#lpTYH
zb2W!R{M1?=foskUY-``BGYRe9toMBPUuWrgXKgAZQ?gga#un;)Q)4-`T9xm~)lI_3
zR;w~KU6Iw?%UE{ocYLA5`}(&oAOD5(uq-uqS<9jjP_MIX_amk@rR-A2iRO#}*SeY5
zg08)63cSbEaAVS+uxqcFl=7Jt?74gIfWs-PSc6m13Ifth9lqurybO=ZI{hzh@)Pg)
zG%ZBn`sbjR(?0FxZQJ2_cd|spnoyRbN&8~YiQg}0+_+saqC}Oa@87zMtn9!4JiOKR
zAZPuv-PclG7F{fNOh}RC@xJ9T^R|J>50Bi-Zl~_F9c*-8#lyGu^z0p;cbgdmO)mwe
zXxhzPXt#EalE$SPE9D<sw)P(MoT({!aQWI?4!<t{^d0`vrzNIsnRux7)~#a?mh_6e
zyL`=zN&Vn*<15RjUM&%+?DBuU!e4teN0-U`bDVa$xyc1VX<mLGGP9+dCO^7t`R?*D
zqc+vtB?a@hZ8NmURBrvfWoz#N&krwUzGkMH${tlYx?CNmf1W@M*pf3-IAQkt7tA-C
zW~c+zchFN>^Um_Mxh#H7{{8{;!@`6ESLE+J{l4q(t7Q>elMHv;`<>qX^=#*YCO3tQ
zPsvZeS${mL$2n(5{cqV#3|DU*{3t51uc^y_EAzwMaci#q4iz#fe9hIe^vvUqb>h=c
z&UmudV$~+8zU;X@S-uCK)K2zuzOt*2UExmF()Dk<mdS*CcVk-eO?-2lIb(MCjF#(1
zmkGaF240}?^ZW0&pGpsfhefVlqw;!6Xv6unAK4@`cH19n%V=D`@grN}mQ|S>iYxcN
zHa*EW=idH3eBWj*VZN8k5xeL1hhGt9rw;Xe|CD$5b=pmhp33ik&p!Qkw5)C~%dW_f
zNu?fp-+(n87c*Gdy;n`~!0xZzSMqf8TdRX-whO9$i>}nZ6MM?0LF2GWh1;YDe#!zS
z0Zp&(K3s9+>#c(ymwFd;@=t#dXDzU=gmd0Qp*u5<3#xh*baGC85Gri3PK8r1FcB=c
zQ0Pubcjq+;6_=*y+nz!(Wx~Nt+c&;s(Pm;_CA670vgx{X$^u_*0lg@LfGg517Y_-=
z9C-RwFSO};*7EQA>zh{!*{qnWb1?SE29|zPkbjJH4kq^=nvuw<rx2`KvBZ<_!56z_
zULQOr3p{|j1mt>Yy@S0!LtOHwn;(t)SH9a%xO~R#pobRQ3N79yojAleWkRyGV4uYo
zkB)nn&2$)><p2M8I(>Kl@A$f^|F7fzJTJ*#Go?OmPvu9WzH?@*PN#1znAuWXTOmBD
zFz;=1MG*`ChRlPv*gyIR*c=dJ%$7eG?8fnN!ku4BUMEfZ?tHwp^6Y^NMiNq1i+zj@
zw#c-#`RQHe;mKukc78rHQ%&^Nv!^xtqhfS#H+J4W68n<hv+rSu#?h}y>;2_lR{1`Z
z2`Q@Fy3eQHQ_yTu-`X4dPk5i*7Q1&&{63-me=hf&<4cZQy=KX4hkcRR{ahxw7r!?u
z&5Hstb)|kd2<~6I)tz;gm|D$(4)N=^7BjS}YgCq9TBc^Be{%99Gv$XbJ?3?9>Et-?
z^hxB%v-@iGjq4|-sy^0uq4VX|VkX~t-FyKhR#k5U8`b>1*fp&5_kLU9FgblWv&h^9
zan&LVKCq~s_q%na<+*BQ(4{mL8`+b^6U_u4MtaO^I{7(&YW%!+<<rCO#_u{Z_i69y
z6o;vqBHq7WPv-Le^?ULulP=buT_K@ewWTYYJ^wa6x$*W--ICpHAHS}c>#Ba{s7;}s
z?z0y$LdybmGK(_}-Jee~=uJBKe9{UL=~gR=96it7AmQ}$OVz~Q8f<=2s_A@PHCO8B
zB%|ppVi|gwmo>x+^j>;x3|!I7_-xX~*+$b{u77wI#NF*Tqw{r8+dA)CCS9tzdX29q
znSqQAn(Ti4U_!BGWvo!_;d$P^I=2$?;=L!Tp6ktO&O8!RSzl@W<uyy5u*E8s&b$D|
z^wM3v3s&5+KhL^gg0a?IF$bUS*FRN_8d~N}@)bx>ROXm7<CUpn!_+T1OA{HFZ>;ha
zNKmy6%8WSRxjs&qB_fzXte|Vnbr!~JJPoXSqCd=1IAFz`z_?yyj~d5@bBqx!q26YW
z4O{2Oui3uV(E5NIhh3<(g2Tk)jXG;iNS=z5W{Ej*s_Tze<8?O1>;KCBWpS2DC91BL
zTBOvntA9gP2yY`td|uevBC9vHhc0xfIfN`d)^co$z-d=u3#|+pPGesa#zj?oZ?9np
zIg$7zPgr5q-K4E;Z4(w$r%1EJTu>0Y7IBlU>-DbEe5VGkAEIo_8AUF++5A#XcB<QZ
zAeYIVwO2khZmMs?ihF0aN4!w$S&-A*!2L?^keAkNhr+jd3*ITUxLjoE<9emjR3PfB
zvZ#p9>ivlYyY%vP-Z%R#{J8e<gc7f4Caq$1KA)>939oG$k0u@FOI*3t@xZl8neL-)
zb58_iGaoOTeJB5!pUmu4o(HCZSWIS7`(u}s&E6^KwoL2MfuP@K?sPCO{u=ST&{s;l
zEFm~S-hHZ7-;>bh9T_U?C7-A^??}3%*0*>cf1B#-hbw}PPu$ZbD8BKDY0sXPiD4Vw
zZO#zYd1DcE--=H&G$AFVG4ZxSg7=(6$<TxwW*j$!)Fa(QCARU(M6XIugG#<LUsQg}
zEFotlld>`w&t)b)ovr6Pm=14YVD=V~kn~N+_-(Q3N}<YnsUxn+m1h<7C69<I2PUML
zG%kGm7}b79?HT_Ptu`)QEjjUo*F^JEzl9hhPfJX4eLedVSLY6X=S>lb9_z|8J&x2$
zOnM!wH7WM`xjnbm&t9RGYoE91orn8|$o!4+5f@9X3_7AOIlg%iuVggUD&a)6P~nO7
zlE1sncc1;WjkkM-^ryJu>_=Y;-a1dv6JM)!=h4LPjtQrvBqn`(8KuZ57rZ7_<m5ls
z*Ha1)c31~mEUo0Z_;r!BXE5U~wrS?aEqIoHJ-mrq-8S&DA>ZN5tAdOy%foa|8#bwj
zy6%`}z1h^4ozZ`L;;uCI$$m@1Plwqi2A=vYWEgc?VA5@0A%Q~amd9pazaKdAR&s+=
zdW-0-8|@0J>n=#{a`HYcF=>mam2-GTrljkn9ZuW^54dvABzFXbzu<{mxV2Ei?-G~p
zg9Pm@W_*Vo!!u&Fx2<#iprE~F<D4x{-F!*wF6jDLO;m##B>*ytIXolLT=ZC4>8|~8
zZ-xBiMYqQ>$Av|<Z7ivdtbEN^u<?{p4{OoJRbe?vZXZ;3&q&^R`>4zNf<LS0x~ZS}
znm5&KZrO{HNz)Q_JTJeLn(KGTsE2jF-=?q}8KsI1FPG@3`!3HuC%948W>>+xmJ*NI
z{!iyVm=bg>(ZVy>>kj8RtyGyd=JQ&i+GbLMHW$`hnl?FY>W=Bw>u1d@QM#M@_Ho9h
z>pFMtN?GZy&0=kyDxARRc`8&}VvURZ9me!?(We!J_S83+)ZFIa;3_{9Tl47Jgakf~
zHOqG1f7kZ5mRIDKW7^9}#)nmwZ{$hNoEyl-t!CMqD#2|r(P!-q3zrWJlTSwZ&GeHD
zF4}hSMaxVrOJkoRsnZ72mb`57^h=gJ*5tq3ZKc@3X5Zx{CubI_rc3wh%{e(KSjM=~
z(=S=3ZL-PIgp-*)hYKD=Ue&pxRIwnE)x+<m<DJT@XO;+SYFHXKJ-M<rVS~ZRl?jQH
zg10vv^!nl$P^1NRw86=hQjCrd{cbF{p5<Y{?lX0cWOR{Pa0c_vx$*BO*I9Yr>HM1$
zmTE29<HI{EKF?}$NBPs<r?mk>8}nt`ugrDH325{@vek^^hSla1I%Yb(Yp$^|MyD&y
zJld8z>FTWm8%xvgOXei}ie1agwCzb9v+;+l+ygguP3|x?G3d0&VPv0nD?LG|@CFml
z8spB0$A>0$F#pELe~Zzil8(6QRPrk8C$@<C<m7n?O6VWVy|AxTCTP|HffXK1hclZS
zbTivLbEarM+v0d&n#oBOvr{_7w+?JvTDk0iTaoW_uv?TXmtSV<(e+K()3V*MUH8F(
zpx-?z2CKvp5<Hn6tM1~p+R(q)OV<6<D#sX;N!NKkO>&GeoWyd>yF|JKR!H^i=ulms
z_(Zj5OH*lnbJ&Ir5NE79(6HU{`Ymut^ug>!lr&3D=VYFHY_ZwQ$EUrT2^Bi|*X@g6
ziF8S*erUpi+Y1hh6(p>zbrX?zVD@5F)S?3n+a1}z6^5*Q>=9?$(e3tWmSdbzhqfDv
z#L<rKh)+^(afdjxZ)~5v#a!b4q<aYxuPv6CG%5y6WNEw1#u$BxXYvh=;4|PbndF%>
zCGy#p#$@l$K8?LkX8B38<edEL_Q`KKuSE2$13#wyU|XC8juVx}z^x3-xAnqy-<|#R
z>7E$jqx@XuOeI<j_6~QhDD;`DPT-o+;*bR@5}(UfPF2<`I+-m~*{Qs)z_aN^^et)e
zY-l+?eaDM?d5-3#S`+SE$rm_2+v@!Z#U>HOOZNn7y{nv4);yjN#47WVcOuBCi`)h7
z3s~j~Y*6(xdL*s1oL46Lm6ubE^Ak`k-pO})zhtkX(AOYVnYX-wSD^)W-<LLz5NFny
zW5NZA%@+5z9PqDNoQlO+olJdS+)m#*9=Nnmx$>&2-mVo5rz@EBau81X<ia?8GRvGz
zea>E@1(u-)Zh|ThTczb(7Pr|LqaUf9UdeQBTVt|!tY^`xhRq;XewV&zohxmyErfBp
zFzcL5aKO1Rrbjh2E@aYs&becQqfCC(gY%h8ez%VYE<I=cNy|Ov$)xKRpM>0F9tyF>
z_z4%>vg^|-l{vXuukfNPYs@)_C$3bw^9e5DF!U5D5T4W!e67%9B~zZ0Xu&pKrfn|$
zGXhxW<Tf|x7EbbA0dtXB2xB^^=0j9&c}^k)%UES1vgQkdoW|D1wS&|DKr8Q~ipxy@
zThtzGsg((RwMTh<(Ggd@%3fvt!Xu)3fd_muAZ~?+(d-W_F*g+Y%uDZ0bY>Az?0WmB
zXl9YkmOX-k`PYh+CM}nLFIV^D?YS%3>%Pstnzqv(JXln||HIvv_vimv%Ue*OcC_}g
zp~$s0{TFv?y#M>-;rHGB^Z#4joVIp<l%Bb|zkTh$ivJ(_C#%o5|5y0^$ksV0G`kB=
z1^At}_3Q7q>R)&+@XC2MH`~sI^A@Z)&+ca1yKvs36(EuBh4U7!NM~Mb*S*lrInbZo
ztya#twr|lq8?jf5c1*FKUbHLUp7*%zC66mRMV`-LbeG!s_D4ukebogcE|UinbhgV1
zMENzc$xL~=t=VDs-2Jih-d)d+`kKk%7ZP<iIcv7l$5fM=7YA-F3#hT=mABfpZDmQ#
zr|ZTJ?V|RV8m-pkvbV5Vt!ZlOT@7RLuFPd`bSu2k^Js%#u!h~0L{qzx1WvxyS_}DB
ze_Xh@+v?5ipW8IVKPFwb`pBYIxqO$QU_h!g(`Jt!2bC+A?-FEEUX_qgcH70^lN*mu
zBr9|9lBS8~NeNs6XSUU@-4yYpR$xl*r&mkf`_J9`%8iHHs(SnVrH()OSU<_KEcR$t
z%xg{%;pow+Og#CZ)%9lEfhBr6l6y92+?JSeq*b+9Tr5?ZdGd}8DIX3k%5hE*5}(Es
z8?hvn$Me;jR*2k_i;_DwaO@W7+0v@YEG`DBh~GUb`Ty<F*}VNb@9vwie`i)`s8B$p
zbI6K!{;px!T}_4C_e8}hDfqH-d4-zGrm>Z$y1hNMK$Gj(lXWHvAJ_3nd$&~X)_Ahs
zt!#bl)488^>WT)ZN;Yh|D;j%VTFSdJ{g>pQzLzcr_WwSf)?a#c{&&y_y5;??^Y_Hw
z3%NJ>U-sP947+kwKApaMQXyV<w?db-1xLKD<qx4>6K=Pjk*oQiEq)+eTJFI2{hvOR
zmOotmrQu%7gv;&S>*Uw!=U@765a7klGv&4GYoXwKO79aCbY2^O$Q2fwqg#G(Vy}V2
zzTE5gp6Y($V>`6Tj{E*HVfpiOPygbn*?wBjePX%6hpAsXf0*rFx29u*ZK(34Icqlx
z+P@SE<NB%6bbHPAwR6QC)mLpf9PCzoaQo{hHf4s?xn(W4bR-x3oTa69e2+@?rzdxx
z*!%xqr@wmr@_O&B3c?{@?$52%eCAtNxj&<3(!Z`7D>Vz-<@1v3-5z$`5oX@5{Zyra
zyGD@X;j@q(N-vKbczeo}^8u4Qhtm#8(RC-x3=4Ko@?qL>;Cqum-Y5Ml6$PN_@frVa
zUODrB6GK_UCcmeQPhFRD=R9-tyKVnYuCC^Pwwd<X6AKi4x2<86t30U49ju>Je{5oO
zy1<FudlpJoy1Dv&PP*9hmAi4zX~S6)pNBj#X%{;iAuf1gcg+&XpDkT;p50y~IdMwr
z#B$YSQ|0+V6DQw|QA>+_63ZER_C&hNlf-37Z_Zm3Oq`wCSpGD{l-XXHiGQ+aa{aN!
z?k_srd$e^|Oa8DFteCN0;<qv1pPAf$Bqe_sD}69XHT;$?^P^b&N3qd|=PnNtuYrvD
zaHe~{q-{gm6^>IJ3+h->TLQ9pmbPCw)4fpAwj=F|h8O>$nc}X-RT5`U6i(^8+r3!Q
zc0$?}4==7I;`TOww6dqqvb;X&=9Gn-ZeH1Z>88kpr=PE!NYA#~=&YlADP_yrnWYDW
z7V5DEFJ5-i#l!gWwlpzT@0MM9KD|5CgcW@+AKm)fFS)SS@9fd7bEkA?e=4ytzP!<7
zy2ox7zo^rv#m+p@W(;0_cjnA8frLrtr|8b`3}ag6x8B%zufhS9`x?;(50|m{^qQtW
zo5;)L^SSZ*C3d67Eb9~1D`G7VW^WRn6Rln`_soy4CtJ+i)@$om_<n0De$6V7^hhBz
z@58J&Y|pRp3LLR~*|{a>(658po8;$2+cyYImUBI=)^kHkFnH><ot3GLifXpa(|l)4
z7gbGqwYsbL^C~81pQ;}^vkme!y^dTd7kU0nmbGohmn)HGiE;i@I#%kdpF4Y+lgIF7
z<mQ}1d!}m$2H*FZGkd#`MA9s+%G`L5DIF`<E1x_2nuEvCciNtH_gp#zocgPt*|M<B
zlKFOL$8nCDDJP}}E6=a}uHbMvd4A<*hQ@O%4xZmvBCz1)!}EKJ4mboqo?m-g!Qry<
zg39X+jmz2&oat<owB<;fqA??Ial*5fgFSNW#$F0%Rx}zED<!(|w@RvtU9yYey5MJU
z=EX&W#VyXa%)J?Jb+${|Dx^*6@c11QX*SVX&~Ul?kvT$wnekez8R|;UzI4n8R#JMa
zyp-Xs9nU4@B)`s%D-AQO84Z`SADJU0u=1lp`J+U?{&q`MxuC;|?^+Jek>e}&vRLAF
z_)ce=rLEMnDH$HTZ99c|imMFHXdav(#a*l}_Uuc<jNl|iQ;}zW8fRWEG+5r^l%+Dq
zVq$?)e~WOC%95lqriU$Z9O_dXJbId~-@iWlI=0pF>)Eg8Dogh&@84Y)w|DowrJL^s
z#wI=Av-jS__;~yEaq-RzI_)+V$0fW!k-uSnc>V^(3ogrVSiav-{$%=%^Q))d5Xe{+
z{zjf@{|);9o5u&g_WotQX+3Y}J;B?Km##3X@^5Ol*<lydw7lx1@pW&94=MhY1+`0A
z{J&01U$?#C!AZH#4}SS@&U<BgK4v}R!N>E8ZSC*sKRfz;_EMkEV*7$c9q$E)2LB6=
zEw7rO8g%Vqf=1;}KJgk6*&mmhWq!oki8T73yj=c3_;_KoynAFz|Kc^zdKT|Fb}X<_
zv48POzxN#JGNLsZGNHep6q;Nu{1JIq-dE6~Z`mwK_u}53<YS-QPq!NNiS3hf=a!dn
zXP$4?CuUbD<6Ljz`op5?U&gwPg-?Dge(EISeqLU;CPT*ZU&h1WV}|R0FV<u_elf)O
zamKodg=ZrFW$X+%cJa{l#~BZqA7?zceC*;O^}gg6{mVGy-OtOPH8ty#soxUQ@%Y8h
z#jX6k%E#q(Yff4Cz518Yb)eAX>KTh!*(oyWI`vy(G#+O>d|kNZLt~-Ihs?(r4~35#
zesK?O>0kW3|CyAud!K!j-jTvDe=Z(sKQ{4kznGm(-|6kAXD98~erDd?{XReb#zCIb
z69su+pGxHAo_stktb{>`%_2uy{^^A#nO7SOD)%^hwK($MPV4`(D)C8p&&2qnZgs9Q
zl`kedZ_5)hn{ih}`lo2&lZA&DN^2fe{_iA{p!Dza@n*}@&OHAzEq_d`cRFSt6zkXM
zQTa(np!8^?)&WB)?f-sPpZuFX|K9&y;{Pr0M%yg^-EFQPcStrOM*O$<&$Rs!aeFE=
z%N2hd4cK348alnw_2u5sFzsy31mULREO$QCaxscO)MK0;lKye0K#b~>rs}Tqu6yqA
z?I_v%u&?Ok{LMQbR7*4IJ&G+qu=I6n`JB_ncH$PNRUar#ie=J^wbU=vdtReg@Xh;x
ztI9!^m|aDQk7CaKh<UJPMnktpALoverzei=Jo6*wLC(yEZjV_YfpbT8`uvP}pfjtX
z+hZ9>;L4Gm42C;9x&JIQd7v~Yhe<DXr&*z1OYwRqy$|J=8@$Ch|ID>Ed6e^GqWt|;
zf}1*9>w?~#|G82A{$asQoh<*)*~$i*N!tH<JlopIY~qLeJ8vqVYm@)~F;-r2b_c_Y
zJFG(Khr=0uluel6>%vr$$KSd6VKzg}e2)`qN=#PYdym}w5X!KxQ6)uqBI8_XuSYpQ
ztQhV`3T^7-XgoJpt<bDSwISb<^QOxZhv#BbETs2|9r(V8CFjY!DGk2Q??D92SGMFR
zMJ*`4>@|lsp8LV>a3?cC-3vQstDb7pXWikY(67;WE><s4uSW5}RmP(0-X~g@F#j-W
zSk3e#Z^i^}Pu35v4B^ZtVvQ8VC$T;7W?08GVRyQdo(k&$afUlT^vkcd#CUw1FaK}n
z#rSvIICoB1WN-hYIC=k_R^ft|cY1}NUUGi%yr|RV-?><;K)pW){JVe8{?oedeeH{l
zM@6R|;kVtE_I2TLF-Q5TQ&C(JKb`%L_WoG7{87^JosXJ$ijTHho#PXK<`6DlrKQ)g
zXLHO65aS5Ht*H3w_aKqgI|9DWJ>07HK}#>}erSw9Wq9GjSJv&^z7IlU*6droL*di9
zM^0DE`NU@(SiK{nHoVaBN$k<qRqti=Od7)rH~w1psOiM+F7D9#mN6Mj>mMb3jXlab
zv0PMq)xP2#7g*ws9(}dDi(BcvmR?Bh^MZw(d%8gJeW86`7q9&%Vf!x@IY|rWi~K$*
zUnOI9=SF<(i^3Zd7TJS*(e`8E@kC+H{}8qRz-pD47=B#{-uO_P;ZeI>yRQqAgM5{i
zSq-nlp9_ySbapVjaP~jiww|d2WSXEPL+y)|H$Idye01(Vtfs`WfZtYBdY_O&-HXB-
zE=w4`EL@&+_&O6PC}zKM_CLx7HaVLSVlp?xWL=2K8H_KS`%@23XNpk`sC`kmW5N`M
zc#eWnhp!8dKXkgpSR;8Ll<{i2TsthXL*%Pu^i+5cOlOE;g=i3Ah-WBxTo2aJ_5aU@
z^S%GT8Z>`>Znii729BN!?Q*A=wqH2^RH*Y0h}|mx<Kd3~MVq7EKNZ_yT=-|ot~CqF
z>u&^_K4F*rn*OPM&eN}1x~taso#QySv~m8yxTTEUj+YyPkDp@n`JlioQ6|e9p<%>p
z5!zwdz?qlCaQNRsM(&$S8JDlpWj8n|&Xcf6_(Z>sRKcnxs~FC6IE6FMJIEEzEXL%;
z?040dFQI9cX+xsqYDVs<OBk1TDYF|mZjw5%A?#{HtH`B>V9^Q8GZuLBCPYlgI^gs^
z<G@Oz<BUE6^Vtm6SeYg$W|=$)(S6LIrs2aZF>RXEhCeL}1=Z_!6)0RzzS|@7`c6W-
z`)*0wTW42X^sDPJnDDW}eDU$!lBV}g>hrM~$$d=w(qX>X&E{w1L5E|>_om2wUUp@M
z`hHo76BSoxUs`-`iqzL9>`cs({nf!$cV-7Yp7)0<LE-Vle6RkR;H)Q;*Z<;8vH9lv
za$~+%Z|$ereT_Zt`!#KU`L4X^zi-R+36tZmSx<O*G2g4V?$g;l$dYyD6F$B$U+TVJ
z)AZNL?QhtO<o+)E^1^(noBdCtyAH<|-*1uot9Ipu`u&;GCn~<ozOeXyi`3sIs|%SW
z`|E_OzRV6-JimrHPvP;!e5d|8;jAx{^>^{6*!=Q+aWUVix9(HzHjrhUw!eH=T=d_!
z?b?LN@!?>XfF$2;K}hC5a@o%*_gABui6<rN%j_Nc)*oNEd;T?_u<{~IO7fqS(Y%}a
z3f33%o80Zal=e6J^wtTh|MLCt!u{lRWR;me*^Eqo`ObM^esHn8>hF6F%iQ*N3jbBB
z__A2#ru2y`FU(69-52Svn-WvSJX7lLGQTggA6@L9WR$NEy!if=&bnZmUxA+<@q!#;
zbuquo-QMfdZjfcc-;?F#{%T0R134rQ<PeaY6huz_m+!|H?k7XR4teFWUsLX{2Iot#
zL*~9PKe||6_4OT)Lskm^T~_gB@sep^hZHZm&(mKw<xe5VA!&YJW<R{xKS?DI<d8F+
zb;dTo0*wxW9b$Pgzs=p=Yu9#=LyXmbo&E5_oxkqN4fEpQ*bg_{`D?G7FfUfR&(mM?
z<$!x{wXyoUvmbW2^H*P4VP3rG9#4POmj&*<mB#AN&VHET&R=<@qx_l69%GwF7n$Wu
z@6EOR_>QN){7Zp*Z&|wE7Hee}Yomm$HP*#RcO~UszgXBO_VQX?(&t@=X3w~>XPwaO
z>jg=lXU)5zvwD(5c<0${i;b1O{yEb^GaJ_OuX%XnnW^o@$gri1+w3;93D3U%<w#oO
zRJI$d_L|PQv1ggO+38g#2g2U2MN*fQ&#P{>{$=OcO<KGgLaUL@yA^%7^K5oi(&jZ@
z%sE%@N%`f(T^6358Y=ZbYhz_EOqbv$={FxT-2HN<g?3JuTfmMG7yj@7>K;|6GAB8h
z3tUe4U1)~6jpHU~HOxaoiq?(%FiVtD)V~~rS>N)8#UAd_39FAhGo1(Zj>`$ZFGz;f
z-Z;Ei-g0APn5t9RB6%bmkrj2;A=!8l*~VW;HoCxV?3^(71>9S_MN@C=IfigPPQ$*Z
zs>}U70SZ^aO~QYXLV_Z9HOHu$t^bG!R-z2sE&uz&3s?*xyh6IWE-8SLoDDR|p@a)T
z!=4;T3!Kbx!?*Ncvb^n=K;?L7I6}oc!O39G4V^3@M(aROq)Zl`?dq$Pp#BULDMd+}
zS9mhRJa4%%@`?&m*(2FGH}<Hhn|04}IpDVilnh{om4adzWLOY`cwJI);6q=Z9KBUX
zo-H!oSowDHX0~suXUG2B&uPP*Wmg>d)L4A(&ohN{B-<vNJ?+-&-TA^Nx$p5A!#P`K
z#)aHG?VA3rNai`qVb3`aLN66voVi8jxMgdBQ1R4mt?->M&V=?oo|9;id1&p5pefzw
zM4nolGv-nET`wA%R&;UZOqt`AeGiwM+_K2aL(fWh(qoJHi58i!)~xt6q5GW86N_`t
zCH!V-XwUibc#-vAi$0UXPC|xncNARe>wdT8G24oW5T#|(;(ogdFV4-o!ywA-bHwEF
zAx~qyU6*^L7bI=$oDmme@$#r^c~v2Eh>nfm<t}dZwL4z;Y3DU`xoRX?6+T=dEPnUp
z5#E4}3a&oNdUH%3Ewb+2!Kfv+yyNBJ*2#7;CCmBE9gaGQ8s_dOxYXADZp%Zq6%kvM
zmT`;w?JBr9S5KyWR`SKJ8EP>WnTK4<XB9Aq=tK!#Zsu0E-SNVYA7qVoQdGgiC9L9i
zGY|3xY|L==Vb_~e@?ep*EXbO*9hnDOC$q(rEN3)#IJ!vG@bC75OZDCFzTAgc^H<F8
zR{q7g-)=LAc847)xqry>yY8;bwbBccE_Tg$7HyHa&$WD3KE%>$ZuPy}U--T6b)K7W
zv1`V)Xp79fuH{is*-CEpx!Yg(J<o0Ea@9_f%73`zquAZdJrF0|*PZj_?jq~j?TlJt
zYdbP`w@%&`U9$YG8Q4j&+Y2t0cE2mR3vtp*F~3=P7w0a6IO)rsL!Re#cU>-qIB8n6
zMdnV|@~AwBlM1=jWw*cZJKpO&7v$i!Xp77puH{lt*?eyGzuR8;?T0w&R_?<kcg5~z
zZihH&yY8Hl+l#F4Zi6^!TkGVs=#u3(Ax_%6t>992_q#8*AWpg}<`<QFac&sINhP-q
zc`n!8bvYB_B)4db%q_0vQn?T(rE{y-ZhPT3zt?$g;>E5RX3-Xzn_bIq<v?Upxz%I0
zz3`h3anh`uhf7Y1-ObztaZ<nToG&*PS=)l0wBq2ZQ{B3|J|{^}NIKXhwR%;{jYZaq
z+ZZ*)R<BsN>QsyFF5^V$2}ujPq*ksHxv|Ka6(qHCMdPYdwYs~C<E1AgHFilYU$x}=
zBI}o?eP4LGgRdBbrtTKIdvhJH$3_F!-k{J~*%#+NyVW4l6BM$<Z^ElH`MC~VteO^X
zYqzccuK%g`M2_v>^OyI(KFyU`p0;|OQgHOw`*U}$Wh<@RpCNPee}pN!(cZX|&7J8=
z_1phQFO0aS_j2n0+n%|`@jqhz6@LHl_;>u~PLI2yZF-=+F-LaJ%o7awXrq}JW3kcU
z=F<abHH>*w-yAu#qadMi)9K3DfzKqoZZx(QKHS5UI{mTP;yDQ#iO)rkweAqn*xiz9
zd`h!L=zOQpvDOVD8oOOmjZaCo35iWRv_oJjQ|j~uIc}A03tL>58tAbsb-1ajHal=$
zvPPn#W)HWaW<VL|$+Riw4W?|EA#$vB0!Vv`@u}w$UJ)K#kBz*;54`cYn0rj~Qi<S#
zEgzB}^D8qX3Uc^YPjc|(c;$0Gm$8dg(dMNmlWE`zW6SNV8e;7qrl@mXVOezU${n!<
z5gLbt=cxn;cUuV;M>iy0<nS+_<lt-Z%I7plql(Q<PbO2rmByMNjgvowfHW>WHwC0I
z;*juMl>p)CR>DQm4M`I@{fmW;rMj(SxHYryHc!ZsCrS>U6Fr|j_FC}ego;p+;DRM5
zR5ll?22`a8z1+bO5R@`$=MEtaTcggD7#0mpqmw={oKxgxx@hS!i1_DCa_~)g<#Q;P
zvCCD>W~(QY>BN=BtRN@M{BT5#^NP!|b1Wbyq#U|DOC>;frq$(qh!e6P8uvjoF7=d{
zeseohM*6E<<A8~E-3+R(YBQ^~8!stO_SomzFiC0hnLSe-UQYB}au4FzyAa3bLmZn2
zc5LQ$h5(z15GOp`#;PGU^MeV*2_?717DS{RnmhySgvq%OCnQ3guodEjMu^6X5RG3{
z6JyeDaV?mex$Ufj>ndHQDIzmd=B;J%>i1E)D8}g3<zsX@jA^O6+Qc-7W0N6{-2`#$
z28d&CFgbWOdM>-}HRsC#l~37>bC&E-Db7~)tBMgixs|~$C}L9QRv~p;oz62+4C<O%
zC)Y%EPL`YM5~bTPS!7Cz*V-eV{9a1S#SVCOc^b_Rd+^3*S?)1Sp)AHZOD3pH&Q$fQ
z@({YYg~2b#Wzx(oLh80kogpA|6i%9e%$eXKr`sUh@BaH|`Rc!?&%UhNH&<UQdg4*z
zlP+TZANWNZTc*rgu<q1*PA==owL0rJ#YOr)Ui>G;=Z4ACr8yp+zq~wFp3axj5Ih&f
zGke*deY~2U+qpDLcSg(+da9m&Xql#dm9y6+W@oS1dp8_93ycbHm^__Y;NjVId_vIl
z2{{W~EOuMu%=+}nVu?y=n#W4-VzU6HIe9W>zLjTXf+kHeS#m|yUs^-(oIT&{WqT&@
zX?lK@3VIc^iFXQzx=Ooma9nKrlqDB<HA_41v3a!^PdU6yQ-7zkSCDY~lwDs6nN<&I
zo=&_x<@!TK)u{_bi(dI$&r-PBUZ=3fYW>76ZjM<^3;yW%-!OY>THPBG;#9J%@u;U_
z=j+}j9P6KCFIl9t$T)RPV~D&~(}!RC+_bcmtuCLI^7y(?nPdI0>?Mnw78#4KZ48n3
zYWfhlz)ed_)#~y!khChte1WVbi;@-@9|cKgHGSB*&`nEA-Rkl~khD6-e6_44i<%Z0
zm#%9Jk?(5yAgQdf)abQS(A>;2-X*^RL|XjiOoIYlFV38F-C-5KtK$!wAZ5`|k-0Cc
z3xjGoxc1Ep*ja1pWnz1=ea?f`oKsmN7P|xs*LHC3n-=i1$<)h4_hS2$2ilxdBS8{E
zwH%!L`T{IFOubBGFShqQSj{nYEl5JJwu56|TR>&6sh0`w#rBp5+8k3EC4*l1wD$zR
za&`Ei>H5_<{ZY!CAo)*?OXc+L<&=LiUwWuN@{_!l*Ny8skvqRxdQW?Ff3t|ovj@`3
zch;?{y%4nI!Nu^38He+G3_N1b>F<v{wSMNoAE)aV^zC00BV8Za)xW>#M9iXI!MyOR
z`~GPLZMYCtF=O&AiNwiVOSdVpdgr#bTdwRCWLtUFX<f#{N!y|Vo`22?oPB0BtKDSp
zm^;f8Qk$-tZ&h8hglT;|6MON3sho0CFGzc9ZP1=(F~fh)C8mCl7mccdH~xA_oOvFT
z+32oPb40iE!1?W}JkKt#-Eu%#$nM58mj}yl39)^i85Z?GkW)V0Tj|5*9M0ySD%!dq
zI$HQQstW$#+}3iirf#ZOh07uL>ytSC+=)7r;H3mME<v~Rfd6V$o@bj^Z8@ME^t((i
zNlA0x=9L>3SL^Hveq?RGXY-=pS3jwJiwP174vmT2s`mJlQOt4944>!0Y87{bg^QYa
zY%VczUS^!isWvm<6sOUKX~G^e^j7#7oNOubo6z`mj>Dl6r_?6rwA!Cq->N*OO#ZuJ
zO?3H@O%on;GRc)6n97@`esyl3z@fc?4G;NtZ91s1<>tDl-Un?YN(235O9Qu?y;>w7
zU&`6PGc8m4jNhu>T`Da7yI2m-Id+R}dcY1IZ>JAdItLAwZ`^iJ;Y-!tZqJTQGpssK
zui9!EGwoq;ghR3yM{3h`+pRyfPaL=$u8_EEvC%;l;d8N$Z1Z+8ab6Y$JKKrFXhVyD
z$BeucJ_aY=g#B0DZ_py-G$r_Nz?HR@i!_ed1|CZ0+p*=~tbLOLUi3^7c+)GyQ+%Ox
z`326qr~D^Rj4k>k-*H&)b=zS*?uUutKW6NHvPLk?zLj~s#zN-x7eBb&lX@7$buG!2
zGqy)m>Y1Kpc8j-W#6(fm63=TH75cB%3hFI=kh^zL%f9v3Gb+}<0rU5Q_&cv>ROr74
z^Lh6zYT0)fB>xf2j|K71g5<w|`D;P^>(?_X`q{2=Ob_}{7a!<!|3kLP9(ERxbv2jQ
zTO54<%XFUI7v}8gbJRq|1x#2E-ce2O-Qek}%Cg7X?_uJ*Nt@knELo()bWe5p$1e+&
zB6dG9S-GO8q5Nc~P3;SgYkHQxT3RX(VvD5w<-MA=dizc8^5U$RKIhow_Gt-kCtY5$
zC<&@n4We}pR4XS$s|G}C7f9<wuJV(bK_B!idzbUO9y}#*Wyzv0sAi3bolUbsLIMx$
zej+l@j)gVezh(Cm6V+MsUO4-GxazXQ+b?+0%1*l@Eb-nDiD@sKy*^BZNN9H2wXnpy
zLnQiMIJ<oag-ERIuybLFcZNu`y>NE=APSNQY$`vgX|b1s!*1z{x&{!t_5}O1s*GEz
z%l|E0)KYu4>)oW_r9Zx}u`4?n2`Lp8y`6NqV#eX~_f^YpZ}Il~%Ut?r@$M%fns)zc
z-%Q%<wj(z5_b>O`s>?qbsGHV<g4!$hmY!vAyXDHCyPxERUyLo<{v@_&``6f_?JcoI
zOyb`)BW5Oi_08o}eluyZ#SG@PJ|9-J-1E4hs$O6)zhWt?+{6paoV%Z}@H{JC2hQ`4
zgvw5GN}O394bH+FRNqVzHkfgK3#hpGVc~s4RXxFAehNt62gPX{y!{R&*zNb?wo!Vx
zSUYk0oQ8u_T)-+1ctKQ#f>hqxUVKW=l5t7<hjUAXxZh9tagP7}niqOzKV0T{uRF2(
ziObblJ;JxAKPVKtFyq{EpAWm1t36?ntXRS-w2WCx*vDw$6ycNvUG)hDu>ms^CUHKU
zqrm*yva#i5%PE$2pPK1&bku(*rc9rsqf((%KYh-|gKw7XG7c&`scCS>@%g(+yK`@-
zs-IrDSnjr}I`_xG_lXcCw^mFBDLIpQ=AP<uj@Hu#nbYSm9iDUSO>EKjq-K8?r#))#
zCkcmU7f0m8H!a`LaBPaeDVFusS)aovG%jE7aHzyRwaHU$&h922n^IPxW!hkewg{vo
za4JqPxEnAtVL~R@-Z}}8y@md75~t7Eba2+bjj=^t0&jY4-%K)|>!en)v1@PB{ssFQ
z_pjL7u>ZjQ{oFo#uD`#<v^>1YP|V~2<1~ec!>e^SWc=`6yMR$|3lq!ht-Fm5C_U8Q
z*u=8q02j}i@OP&ex?BDqik-l4e>*qNn(J@D{7oSKR&Jg(;Sl~J5PvgB{tZ}u5{SPM
zBoE;?f%xmWd2}k*@oez;p?{r~^TXX;2M$bndWxaj<wH{J28a8rxkdhLIJ-oU^LERQ
zvwXMbtk@g-&a6~cue)=VPY7@6OpWHLGh2>HC+9X@w_Rv8Ipsp(G>;19wZ0Qh=7@hz
zlCxawH0?55bQmvN^t6S|Yd3s6w|s+Hg{=tB_C?Hm+uIIF<!3j09v6Sw#iwyvROH@H
zk!x&|`}EI?$_6aR*3jwA%QblU!zuP6<I-Jihk{;%C2xw#25iaJ(76kid=z_;@#*fi
zLqQ+Fl8;4Y15RXX=;-EybT-9ZWK`YTb|~m8Sn{o?Y`~pt4V_w$B#Tn~N5|BCY?qt$
z9>`cP<aBLi^pyN?Zq5d?9W6<h7;Foi8XwLzPs}agJbHw&>P8FO<z}k~GNubTk3M0n
zx&Y$ZJ&-Y8$a$27sp<rX>-0dza3SYW6{e~KAg<d38U2NvM_rhzc7V8E4`g%~avn`#
zs@eeJ`aO`*UdVa0g{f)<h#T}kMspzttGbtl(~CwSDIb2X#?OZS!d;rIUko^Tm$5HB
z@N>;_&ZAS9swT8BU2YCYc-`_qgwwZuiEz~f&YY<Na}*Z7oDkx~uhh6!u<5e0iR>h|
z7mi9BM4bwXT9!EnaoBROY_sF=>%CCo@oNEl<$*BvgPnr2_&jC5DDd65rC_1!bXhU8
zS#Akqv?PnVtA^DJM?o%c`9lr9>dUw<I4g-vlS^TA7hRJyGbTDqZTb({^$ANp`sn>k
zPTCU~CT6i$sLtk)@lF+vdoQ%Ob)*{a9X8&{!ZGj4WVQ$urm5}eMVve~jq1D`JXmh=
zoqr-EQL)KSDq$jri0r(Rss<m9%rQBjB>2L@X0ms}15b<023Mtk{0g<{2M!45U1I2V
zS#a}%k6vS=`t>D@Vx0~vAI^+nV)kF+$*d#v&|S_+ZMwrj{@XrM6F2yF+<vp+Z0D_y
zK6;TpA*mC6^di}`jqB8=8y<W;FJNw<(M}PedmhEcJM)&-txqpHS#&Gm^s0jir;SQB
zh?>QzP2YO(^}>W5qOt`$Ohv9$L`(Zv?b8S^afn>E;Dgc5HN0xF@$<B;7C2lFh>*H_
zE8)_|)?JI3y-ImomtI>7lH8<iwIJhqK*TPv<k8)Wm`|1Swk~}DmOQ3ywP3>afQYDj
zAf2px7cqNP@wP5~1(v*}ZM9&>^?-<9AW2S_eUF+?)$lH3k3Dem$)%P>hZ>gfRLqRI
z#x^~`M{2>$7%m?D$)|5U5bEk=Hks_*{L)djz-Xt*!WlLW#yd@B$bDf{pX@E%#mNGZ
zRD?*nKqO6=)IpM+P)SvYqz^>01R}}F3el-qV6;<Yp~7TuK_{@mQ<$D7&r=f#=E_i;
z&UU#u=t0f3%PmP>jAx$&B~%G;<;)dGDay1`nR}txCt-Dq!esBuiYr^>T$rMjS!Tw}
z;`3Dgq9AyKOYy{$OC=s$3)veFTw`}so4(BX61(jQ=51CSMmtSpCt1C4l-aP=al*-^
zFDGnq<iFIgmZ!-_&z1e`lc0!S0&F=}hOrH4MVdOcCz$%QB90pE%v(7#=Fys$;N)2O
zz%+l#R93(BE%N;zeDpY*%y*q)>ULZ3{ezDlW0U$<aQb-)Nk0!j>8EiUD50{=TLVt0
zu8@Rk2u`S0kc27(PN-L;!3nixHYlNHn1K`ONmFn_&4MJ<Oi)7oF|mEZN!5T4hs`Ft
zspJShGPBMpUi59<jkqiQE2bTF2~}Iww##SA!Baj?kAKcK11CyPqZbz5DmMEstIbGZ
z>Qy_rK+9L@VdZ?YgDS!qrk-q}*+QJ>*|%~k&CIdCf9if9@8maU>;q&jUioTsQKV_z
zjLe!jF4o?Y=4Ga9?);abnaG!^X~?#3(Gj_-^V+(qXLNa0{SM7t>T-U^<|#4vw@fj3
zzGaF;f3T?PC*`S2pV);)dfjNAy7WlJj#U~H<u~Z4ewREQbVzQqj_R?+VXmEjcBE?V
z^pBY)^zA~brlH&(Ew3l-`rapN|81JG!QH^S^P@yqppt!8q}RL4GnTg4PKfm4nHUkM
zblS!HWUbleDI1O(dv_{|YI~(@%+Rd#&zdIuV?&zf*M;&gBr8Q%?r2z`$>A3i=i0Si
zVb7L5T_V2D1wx;7G^^6$T(z{64&1TvUd1o!c>dgK57$(d8S~RUzb;gMAz3B5a>WFO
z;x9TY?WVBUdaqX!ohp<tZ=UMa_Gt^!Uxk92i)XHGUh*qI_)E^-u8<JFhM!f_LgcHO
z=4}k0*u}+VkbZvBE9bxqo4@I3>gS%H#Ps=_&PqEG*1wN)UA0ze9Jpia4eCz*pAtQ>
zON+~({``bj&H*33woE@19=Pabr`;2lc;AZ58d23*vtBs+eAwDD{Zx41qRdXaB`oot
z6)!;&lU_J`d?;<1ehH+b!!Cs--nAmLR#bIX*9&Kt52h{CZ-I1l*r~9@J661`ohCHn
zetL5*|CArU4tjrFt#R>-Gom+nefMFKdXrP_cf3{;y+L|!GSs#_QZ)E^@r1o=x<1U*
zxin*j^E#gmzm{!lIjDJN78k4^`OqZIwe{x_a6eFvW4V#G61)@HdU>X(AiN8CNb_tL
z2fPFMa7&tN3%vVSkhNLq5UleUZm~B~FcH>uYz>|xDhTg5_AR%3z2L;MLw)Zye(>vj
z|L4QGu6N<5XWuCHjPwaDOuag*NBeYvtoj1Ox&AXBl=}Og;57Q+!L8!M9-=lQ#Yt2B
z#DOS3g~VM8K;5%bmX2)KikUbsb57;toB8$W>Km^W1O2`o-jsJ&@U&BtI#<OV#&EM4
zb3@AA967$bF}7L1IK|d{A#L|Geb&zjS6nSiuejd5wW8ap=8CG#vsp`X4Xjt1y_zIo
z^Gb-PSSnjO#_6Gv4(Gww8zBA2<_oXC>ZvK7N_wTDxBA+%g2*=iM8;lC#VMR|->*Dd
zufXgd-`Mi9?-a{qAB%EU$%<E8Dn8+0XLBl^I3VPtkhp81(LsgH(SN7^IV9l45$N~T
zIdJ>4jzt3BT{!zKA6#O~{^jMg(AdjqgSnT%8OQ5$ozzRT?S0+KPM)k+;M=`Mns2vG
zOMC3YWKa)m#$OS>J&RiS_P8CEt^{@6BDzIYOANy@z}-r{r3tQKQ!c1RE`GRo#dfzH
zQ<}Da?GpO6FK+R}y_>-N@87zFemw*6_kj84Ke~i|@x?EGxc3;CU;eX8=$9FYe*w(j
z{;NyqS6uw!hqh7?$}wICf7iNl)*fDe@q?Ve8bQ6KAAI*eV%h)tdd05`{A*&1W`)E!
zTo7R?o<7I)kecXJfe(6?t?fI#&q*at?&{)zbOyU1ok1gLe@+?F8Jqy=3~E3-gQ}3u
zU=*k`IJv6}+K-$C(OLx6st(b*0IHSinx3Vr)*aR59tU?nF_~v4!m8~YFu6;M3u5o0
zgr{6tL4mG}?<WOU{1OnUu@!tb>GG6}szv;k2g8LQ>RI}BE>rs@AY7vhk%(HvuX!+B
z2qK~KOF*bb79wG_h+pzxxFAGA>6d_D4KGAOY7sx@!Ek|xdX}!7_f(fZ_@bonW6Gjm
zj9|8+e8j7TnbYU|YVQ*IW~#l*+i&Wl`<s8=P)+YG*uCnTWA`?1zsHGu_Vv^6<X+aZ
z{K|jjV?Vfe`Q!UW?{iWQ%R=A2md~9&=h)#nSN?#4T4QVG?k6U4&z3xUKS_9bpnKWL
zyOYXKb|!B-eA4HJsyhGgG`^ii2Vc#;CFFKPRlU%FJ!<BIK+e4rH+cI!NU-||>hvvS
zhjbQU!$*+LqW^Yq7cc?ZS<D1=0Y4N%JBuel`W`y#fIExutba()lCfE{a|x^5#1D;A
zA>GQ=AeCG5pHGP`V)EdBIM-WM?4IVwx$^fSFUID4=(L$0GqL<+=PFZ4^=<kGAM22j
z_kZYFM*4j_d_vDM(&K~6KRwIj=9`|S=}X>B3QpM3eD1Dl`Rxtfe$#^8ZMS**i9K3;
z?=VEk)<E^QlY$dwT%NJl+fR^ddg3KLOV&2a-kZCh<Q-+3-_cUxdrwt;)wO3EZtP<r
zE4N<;+xyo5Z121qhxIH|n@wwzcRvwPydhnELp9y1)#pW$Xf<oSV=Z%iU^QcX<NkW_
z85QgAZ)Npc&yuW@(ZH<ZxS=gPI^p7n=~0f%F&V5J*Rsn~8(a^?C$VxCG>S?@tiLmr
zQH=9{>uv?cefi=N5$kV*`Kcg&Hi&-<%y$Lx(?R^3V7@AdpA6#P0P|Tv{CIJRh)*$+
z2@^lWuj3Yau)DOeQT6mxMzPKZM|UMO?h6;!_>nl<Q(0&mXW?wwZI*%6yYJ+_vWgKC
z4xPC|>XlI-o3=4$ulccCEbFVCO4Uv-c&sz=gIm;Wg~>Pdo*lI*a%<ID&bw`m6wfvt
zXZGmC$8-G?b3asRNaVS)%jEI4n%=tx>MNcSl?|Att+A(Ab3oeYmSs-DU0lqQj2_Ij
z1a}sfFjhTiVLEJ`e+be@|FQwpfh#>=ndKzhb&~nZ0uZ<MfMuE!sFnU@0*Kpsz%t26
zxXY8}O9P18d%!ZzNw}+%<x2sGJN1BN6i6@2mjn=Z?g7g%kY3g=0U++u1C~Kff?R%6
z0$MIGtD4M^gE!P)Btm<Vk&vFG0w?P-_Js$oaURqZn#Jd-{zXCfhL)m*qZ6W~zT7>-
zN~QNgvrB?@%Y!EzzU@l{ssuQ4Y6a#<EqpoQizEN1hP8Z6!k`W&w5eVY)w0a_5}U0D
z^EM+6zpj9i3(ZO*)9hLpXZ!hxFKBnsK(y7jUGdTTXdQRZ<MGUxPsfi`EMB8iP^J2(
zq9wh^Q((`<P_YOTroEs>xPZ+{a3frc|2(L-$m9>|EpCDI7E|Ve8sQpN;6`|-C8!a8
zp%B~%pIiWHgfF-U=`G#?xAr$fTKnt3t^FWKYu^LZ+CS89)8eDo*d)JgrioJGY=P}J
z6K4x=eLOQ}(~K3TlxD_k;t5Op<D-`h9@SW!QlzP}XX3N8qPt#y<IX>s^mNO?X`#&r
zr=`9~(9YT8qnF)$-T7dFw$+1zY>hP^x0%f-sR>;7qG3~v<HOXVNKjAGCcMO<aoxfV
zCcCyCT=JN^)Rle8D=9ATwcu`MN_dIG#dQlel<Wpcc9*-dPkArJ<$Vw=*%MykptyeF
zhAn$QlH66U>{Gr-ad}?_OKu4-aVT8BaKo3qTMsS~?x;D+KJ}-R5C5))$tRaWM>Ifv
zSG|QZOdO1Nib#OFxvC<<?2t~J)q|9xOee$2hP0wg1KStOernUzM1(mYl1>oGPKaa%
ziyv5$6C&vak(>#Ud;yh&_YG5uG@TsPrYp684c1^icihHTW0}YWA3fy3j9Dj_9{8dl
za>EMJE3{h3KJ!2rC%9J_#A(~Xvds<BD};_^fO~}^PW()bYx$de^nBZw@K;S>&nbm;
zJWDS$TO?#RgFBwEp^TX^U3{}nF5U1&k>^H9(k=#2H?nF1t4!#IuGFHtLB>0eL|%p@
z#{=2-G_<+r#BtioJ)9XM#FAe!l~t_Q;XNq*u=u|Mr=L@h^m71|ewcDW36;kt5}Z)G
zAic#TaBs0h2Haaz0S{}eFb5}8PIGWV&4DD;Y;Z!o0!gTsKneAOGQZ+v?*$LqbJco1
zZm1o}ExYl|<!$W7y({Dcby0`fKAWQqwbd>6H8{y4<vYnSbe7AZ&vv;@o@y7eCh@Gg
zrXn<tKTB9)=G~;Nc6a0V+}s-*e^cK21D7EG7cH;<pS>pS&9B@Wb$S+?MB=4iXC7$2
z4i>!kJlON=UMbN-Q@*Y|Abf4PQqB40lU`MtYPE2_4p#IF|LK;Ls?-+U<{uV%e&*^`
z4D(kly4NM7W#d;c=R-uu<&ez{=_`{Q%goO<y~v&AYU*stUD2c^mg0X|r=xFKWXFaF
z8$EhC8M!x2&J>f8k9M!g@%^%~^hI*^tp2q#?bKcwSE+p2XnOYeH6MB5ua-JY^3j)T
za?XA+44i*h=>uHirOuL9Ts1ukyF&I}IKE5u`mJ<1iQDV*j`-hDFLymyq!*r^`6Kq+
zRW^I&1J5g_u3l^MM{j*r^L*h4#dlV6++F#iWVzW7VWygC@^9sn=5480_<hOw?Cfv+
zbN`9NCUU))ZWO*;_pa1;&mF6?=7j~l{<Kvs%Rwc3so3}MIZ-cKRk!Nd=PY7t*&dcv
z7=LVKt6Wsj>rWTevK-EUlzeu{ihOgmS=Yt(df1k}Z105qXJ@RJ(@I-1At=zWFDlUS
z@0B3NwBk8jntMV*dXmFJ0`_kSX}Br9+-c6bqD$55<$NUVB13J{*R5izS=CkbB%FVm
zu;<Q5v8yImbsj{nikNWMce6s(?6knM0cV-!E$CvsdD(<}(c(-oHLnP<jGhZRC;XO0
z7Sx=n{+e*A!!B%Zl>w`Xyz>644Rb6&ybU@Yc5ZcF6Cw+0)>M5>h@4Q<^XJvUO%HxV
ze0_CrlfqAlpI4hx4}LU!f3;at`PYoqJ3}0o_q)!MlT9`Zy?IUaNI3ttqX%~GN)40#
z^JB4(bxmLR&RbrG-+x+V_T%I6sbxQ8%2&nNM*N6<cZJRVpT{M>`A^;dt!`g6<&F2%
z)$OZRT%Ny3o9F-4W>*17=(<&WO<2J=an01IJMo2C3&n-vY$dWBDnJ35Iw$JI!j^FU
zHYtJ6Q7e!BwP~H@GkZpS-nY+hYc}4vwYc?AeS?g}iq$a|8a`!@Vk6hDS@tooPn>JE
z+8lk6Spn;$gS<-bH3%7S&(hr39=9{cL-T58t=E*~wnNJ}pYyb;O<CPGC1|ec0v8V@
z{@H4COhsl**!d(evB;{@p>slzoSCmhzJ`gS@#({do;>-~Af$NECTCW`vw#ezXEWPd
zPp*8%sOq$<@`lO7I}0zgoU!8Po-BNx*{kKr=M9;MZaOdIoY^cVrnY<``xJ)Un?9WN
z1>BmQJzq8$SZdlXV97X@=Jn%njECp5<?TyfYQADzY4?S>jxR97DRp)G(wCgC8CTkg
zu+)hKW;n^ZiA-BI-|fldMKbOp+k7qhHB1)rsc?B;_E+KZ__|Q(gK?*m@T-7D8%+L&
zENTdmw_>uN4pO29QlbV@qVi!gNJ#-mNeM_v6qEgYkP;1$5)F_NwGYN!PQtGyfRs!D
zDXC(zUk*~D1yZ5~Qljx;Gf2q>kdiGRC0$JSH_6QkU>9p$`chqt6*MFNgYDae7OO29
zI==Q>PpDsQU+~~HXJtWP#H_laiT*3Wy`@hdKn8qKnja*e)U;mp38PzL<}Xe+yQSdK
zlM~K8hc0~y?y2ztPsdMSmjoFu`E$yz34%4Eiu}eP=NNy|{Hmz*L&`}m0~9nFPl8{8
zrrla>u7E7Qs==|%HsH}~_R0+)i#LHR{&^sXUp#-C^~|e+b!R614+uQ8FYV;1t>+^*
ziTt0pRKbY-z67Y3)I3dzwSV8C!!mWrEsn2>>VCex^h~Mczk_Uj<W94Hn?&U6Stssv
zkp@lI_3l?<?caasaLkfkL9>+~UOG-}nlC3Jw`{qTa!%00&&^7#_VyY!KK`a|5=+89
zNm%WCdQf}muN8Lf=kyQlom^(%@6cn~`qi_9QSgRxru%0Wmx#+@^IgRS8uv~pv+#Fl
zF%4Zm&3xm8AhBTe?8vQV(Wi}Sc5!8#30MT0BQr~8m8>|$r2?8PpOJDX5;O-LrjTd_
z9^`1_b!6j{LK@_lu}S=CioMS3YqA@4R4NuV9GCs@fByFExqVNp&TZLmzdz~F{3jgx
zwhrORCwk}h9+382lg2iKtu5jucavJC?qQ>qs+zZ>TL1mNTxs+=BsA=s$-6z1i`Hx{
zDlPYm3oSjjbJwpFr{oFhnYI$F9P+)Bc&aa&vN4uy-#s@=`R>Ozq0`T=TenN*$oeYp
z{yCd<*eWN5h3{oN7`|84`Q9<HX4X%a3z(apKb*!>DILwj^y2T^+9d+N58s?!@&Dpg
z+dcMe_YX~yS}7paWNo|pcX+~s+u=rv?TgzK694SgHu$hsd*%e^K<5btaf&Q#VH_u0
zWZI;f8g}mgSzB%KMAWG-{rJL~GE;%43U)%#RZm#+4OiUW&iM1-jfMvoZ%k6u-!)f+
z>BZr{rP>7&cS5H>zPVa&er#;1Wk>wiX>vc6ryN!Azw~OAxx$ZC+fz=69!=WdP$!k=
z@WJNJB*k#i?t@G}SMFduSX}7cHYY=ejr+-V0TYD^c1JMRP430Uzcr#EL0iQq8T<ZT
zGe7f|W5u$Ie@=L<l54T?uUi+WQnGGi&JOMS%^N)Owgsw`Y`d5PmUJ!p+^e+kb8qV5
z+^AQM5h~`7HH54lN0{ANwp6agwP^M<5zf1tQ*IW_o>nCwb}~0ANTuZbB$(punVu6b
z*m_Uneco-$(f!0sS5s(L`pHcXdp5EsPQ0^B)z#^{PNdl!<8KN&lh!W@Qrj`<)Tfmn
z*jG(DwIHeSgd|I(=hfy50SlcDObwaE59PQVm>M$8ztuHhY6zQX7E6q0>d%l0mQc^s
zfQ23qDNnG}Du~n$h?EaR$`>s43L^CbA{79U3JjPU!u3>pr3lx$C7WurdYV=(F<Nm!
z<AImf>E(wsR(NSObM-Q<TXLyJtEK5XXS`>shvobg7dY>!)u>KYe44Y!Nv&e~hp8cL
zQ;IveratgJ6doiQbWTOfrRh5dSaJV~3mo^9z>0MiIVn}NLlk##wLaiI6dt506yv${
z<rEH<evx0yAZEx5=2ZT6t(9L|IXQouYOh&xY4MNuk)l&WY&oh|h1q93)mo_||LN1`
zsUiJQk2c=hyi7l3{r+j2e!O14ROiFj>mnyLt9TC0TXpqoxW<oP*>+D<Y}pnr{Ii|C
zwQ0X?hTRhn+2#uY|9&?+9lS4ZB44zm&yi!rhDomsV?9;tLvHh5a8V8Y<UhyS;FVZh
zc+l4UeDfF--^Xm4<mK?k!6zh0_5Ycj%nS2EHJLc4O)-DzrS<d0tGuZ~;y=o!UOBPU
z#kpX4dg*a4o|@BMYEK?q7EtNgpUuj)FIQE#h#`wZ=$O7V6SKb5Bu+~XQx<07@Sv@a
zUlvM)1Z{2ZoOmKUsMqks<SlYNGrhEY+xEW5QN8-O(Q8$iP4(5qUaQIk_P=7C8j{TO
zNoDQ2s#TM`CM)JA@0#S*_{U_<swJ0FPTZccZb{V?r3ns-_m*p~e6o0Tb%a;UgXoAL
zWl<-vv;K4O)cp2Rds1)(<g9X5wtc0l!bKV&XKA+_IKZVibHd>OX8{9tt(CVvzOm@h
zT6xQ{Mnx<nD3j;aw_dH4A{=tPtW!fCdnz{Ad2}AxHEEUX`MA=bZ(glB?f7Ta_Ae*o
z7owCZ>okx{m7S|1c*IWlALZqk*Bx#2#3k7<LScXF0>*>Z98qBIB?s|~!e_hRFrV$d
z`uPm^pTcEJT<&g{YOqwz^AqGKaGEHyqB@j0K;U$xi^2g<m!bvl{COv|--x|`f9=)f
zvVQj#d<v}ZK4thrEq7&M_zkCm<;U-@;$_<#8Lf6_>NbJQ8FT;4wcU9w{q*|TZ!6v<
zZSUXJeYbC+cyzJ#;x`M9KR7pG_nj{0xIFLHS;^HrLg|+7ntT@Cky=+G-WYn!S^83g
zPs3^&m#Gv;?xkfHb5`H7O-r|J{wASvu4wj>M-8)8bVakYv-=$%>1_AV;@jbPDQMxg
zjbQ0&khHR{Xcjj_+D(gZhapIMJy<##B(0<?`f8<PzvH7FR=!UiPn+n@WYWL!DNdlv
z@f6QC*0c>v&mOp%E){T!cN=TohNX88TuqY-IK{V(wQR%Ew+F7KN(G$aZ)38T$gnRk
zoyj)EsAb^+0k&HLF}BMXm&zn+6tpy!v4nSLI%s-JaOos2&^>rHQ7Yh+a2u1qM23HX
z=?u0hMy(4Eh_KxfiTS&fY2nl9(|j5=dA4ZoxaH04HS<tF0vB^G*SdF?8iJM?h|D<T
zFuQ5>E|UdQG<jH;8C+QQAWM%|Bb945Q}B%o%N}SUb6)8p$*e-=WFd33kU6h(L^*Uf
zZ%N_uNpzmww0aZBq8u>ikeX4e?<tWT_vYEMaf{46q?XDRlYU;VnYGI&ak3HXy7lS(
z2bo-#ZSb7Qbp7h);|YyQ!8expG`@a$GkJr<M9rL_Wd};XyfKVea6-gPGx));%5M@n
z0V!Owr)U=3wW;P2%INS(^q9$X{WL_c1W5fSi2AlEngy{o)jVPvMy-meTruoWYeCBQ
zA}N1|q}&>z{P;PDD?!TFA}N3M#?WIyZVK0JknvU!^|_}+cJR%G_|PnsE2bQ(ceWAh
zI%B90eP=o~YFwDNq1PsH_NNvm-vzpf(vgSEQaM>CIanVuD{9F-CCDYxXx5UO!f|_w
zq6i1mTlU*0__t}=Yg}Ny#dl80+QR#$W24N4yaKVE2P04Ma$RXKYu<c<=Uh?RfyWo(
z3dAZ8MxNs4+S0JGX~na`>1!+Rtj&@uuQ<DS$&tI8V$Lph*m1D^x{Vj#o!(PdZMa&b
ziz?18esbXMyqL3(_10D9v`;qA2>5)X@1VJ6{AY`{2Y&tgLyb-QXK|J<y*canakI&5
zv*m7oymK^9zEpg-th4^MXUDGEe3Q5%Su{Pm@WAQZl>x;$puF^4<0xagrgy7Uw=G-e
z<||A`8P^^NTIiMxl9LzH;QO)0A^2gI94J@*+~81nAf0s@*VhdTjw=*S<L4G(uL(<7
z8Nkn7#UqqXnsm(B#h(_K_D}O^6gM#KXA=SC!yU7ZgCg+?!`jL%DO`6NR#uuU@Zh^J
z%iVj~0lpct+?l(+Fs!Y-k^)u7!U$H!(+E~42vH{pR;L1y(t$_`L!^YkQZ5iFpT?Dy
zAqwH2S2$#xU91|Mz~ysxF{A6UhHExaMy$&YT(OY~Na4aSrFIw;qM-DRUmao7nRd={
zXLZV!)1Ao_oRB5Qt6{{t<=Mqang*=Po?UEE3U<INWh%Mu*+y_)#IKI9>7pmD+Gq(x
zea<*3GJ`4jbB4o2O-LMRg5zi=6JDtmCkssb!MO^*I>M%}a9H;&un`h#BH&o_LByKL
zf)gV6rF@q;h=5An{<g`Gtb6dPjg;RhAubhADg8OaLepI%faR7z%-O{cm+&lf5CE0x
zAjQp0whP`KxN4)t7xj6?PLUIgZ`sy8yI2sE7qEbBi{y@3?uSp#WbAjYZd_eyGG~go
zNCsmvYv9?($=jZNEDZhpqvN`bm)9NL)8PDC1Ie!|z*$)ll9k_{ylP{2&;E_xlW#R!
z_t-uy_{27~|5tQK-$C<C@7~Ee+z02%)vq>__>z`8v!E+g(L<vAw3)=0Ww|p8nn1km
zZYB~Xof$I=szAK&dp90j5HB6AHYX;ML+Ds-c8<Y|>BpvVZubLo({l`7goC(oU~Y1b
z!3%K^H!re7<cxT^{`_<0&%?v5BX^kv@BR0MX<vo!{JCr6E<0xYyj6eZ)9L&>Gab{)
z-<_GT%rvL1MJLI4$(Ppo$`_~CZJTs<!i1$cPN(wk%~VV+e}87evacW&8OBS#T;66G
z^r`YTPiEBBG>;RT%$&VWKakN}*=)QdGk3P4V)tzx&9yDXOO}Y7o3KnYudPL=(0Iuf
ziE|StWm!1Sy0%kNXw!wW6E0O*xO;Iu;>oPCvT}Bs*LQBhrAZd<URfX!Cy>a5a}zGD
zvT*l0^@t}k?2T=5)2hAc0iypV+&ypH-o>hvF7Q*=wpinyLYnLS;uUk8pKSknX2GW4
zRnGzzx;RX|Z@hx5`^3AqGo4$d7(?sNFVM14+Py!WPqd3Agwd{fl|knlx%rkMD}(|>
zfAFk2q`K*M&9i`oJ`PhK7_Z=(ed68Mna-_NjG@iv7iiTe?Y^JRC(6YdA_&sh^=96D
z$t!C#YS>sqThA}h>QUPLKAlfgiZw(MB7JYZWk`ldK<N*bP(_hF{%1}dehzEtr?EaN
zUNXlw<OIumq0K@cErZUfYK1hJcScV9A)}ctB&u|<`p6oen!YKYJGgou=q80}*twsI
zbZK?@z-Oo}I$!yz%pxbnisl)j-RCDP$oj~+(nX<S$p!fZRUbK5I>~EP@A$D{cYTD}
z{CRr~6chKSZRKBIcP`8Q<NeJhuAd(DJKhN1`peOK;e*xde@>WQ&*S6}J1@Sj@^0PP
zlI#2TPT2eJ?cvq0@Ao~r9v`f-{DmQ?mvB9P;e*%fe@>YEMWUtc(|tJ+u7BSa{G6a%
z%H!nx^F2QoYkmENniCVP*c2C(SU<nUd-+V=xsQ`qGjhFqk+VE~zSzqhx=f`>Va-B!
zu39!tNV~06pirmKWNqy(P_!vW&_cle$2Wx!Cz8v!%LTH^?lk{c|E5~t$8W36$vc_@
zj33DzsSmv0eBl12nX!juTV}D|kJ;aylUi?K&Hv7R*DQ|j$3M&r2vTOB*Y?2ge3p@j
zM1|QDpA!d{D|$%SD{}GJD0`_rVYnio(lcL#m2IA=s&J7&76;q2Z=bebobF~hPp<v<
z`E~4%{v{--cvZb&y)N;@Gm77h@sRssmBVo*y^aib-{#$3+_Z8@hSj{iuRh(p8aloC
zM`-@biN(`UI?}gqAa|tmle--m_U_-?FOpPmQ7!!5e%G${@5euo(SP`EzCZuG>|Uo6
zAKzF^Ilqo=k<1bIB=7z`4|Lf|f14@TOGpdYNJSexaos+75_?sSeFV!^<F~C(QuF73
zoxWGLMSu4*_iN|AC_JhBBpx^M0(bt+g7AHyUUSSEj~6LxZcf;04C+#+rMNmRPdVLo
zd)cMt4Ib}iPFGs!zgI^(Z?+fzA*G$m<GWhy{%^|Jk*ft#ylth1&@S(zn;yzN{H~xg
z>GrZk9xwDnPq$Ui0C)RmcPTC09ik)sZnYywbFNlb%e$bBIXm<@K$^4Dr*N*DyRk;=
zPvfe&hASczir5@M4m1f_AyDwP=b1Bvqaj%Ew&!VZqF~6|9>-QG#_Q)I>_p`pubz_#
z(GY@234x`wAX0h|DPf3|Fj&e8B4r1W5`jpGguLx>`gu#TwJAGYXFk{B1zG7lS|(gO
z%8q?nX~4Cr?AQXQ#SPi%CiA%#KBzr({hUP5Id!d)rtO^Z*2x~0vsX;uyr)|8wny=4
z%pxb%ipd|g8n;a`?&O;Iz!sudS<9qpI|o>C_lgM|_Y}d3AvyNLR^u*~>*q48RGAJc
zxBg=QF-3nl+&sMSmSk<B)1kVvT-oVgH2zhGxxV$`2lcx7qjuhsJl($MPtDsii}PN^
z=c`^6-*i2`Tl~-0>yKD}{L1cnB4W#y=zsOqFKv;Uzozm<ljJ}h^4p*exg4ZJo}uyo
zuj9f8@A+r(TLv9hU<rw^p8TrSuCB<`L3pe2B(aw}Qr@1~q*%q?=&llLy%>}q1wayP
zmXVXT8Z$j&k6%>gc1c0qV^f)%!=LbPE^m95IQn&^yzOcDq5rD$mZWF%9FCK>X1d?}
zCV%79?2@-VH6^BkUV+Ru!d_WV4qO(v^D@%6jfweu+aylQA0{lEkJVio8`E7*w#YO{
zHMM-4yy(Dz&5Kf;_?&nT9yqeq_-#d%4BJ-Yw+TrqpSBu<yXfr6%gWp)C+b^8TYs)t
zP_|6=eB9R+Wy@rbtgmu>dq$$!#&h-Rd8_7LOab-V=LRa+^DfUyH<A2gwk$hcF7<Z(
z0)h9Jw;F%Cc-2<NmG^_L&dP~g3l(=<-n^@xm2F?Gs&J77sNa5nHxu*yU6VL1MNC;Z
zAB#FAB(zTOIgz+Rkz)ok$XR7FZd;AtD%c5eXQi94mHu|yYRtvbf2`@&%#TZ!H0mu%
zj}X7<9wEM3Jwp5kvyNwHRozm?8NrYAHaIkdhZilF7n{kzm1KFEi^bx&7vGgz%NaE~
zp1#o%cyLF{G9Y^%+X97Y{%cs6Y7$f}1A^y+xvN>2Y9drE11`^HJK_9h-TU{~xMQs6
z%z6K0aow@W$sgui4|=?AL+b;-{`o(pc&xr}_1U4Ft9Z#^_qX!A>#7S;d*+W%Iac$$
z<Joz7t;K_<+d@{nzMDM3;<T!N;Q?3w;D@IiK&}3rKQ#Gv{E5`Ml6P9J`ADQ*a~HE-
z%QUX7mp6g>0NjfnHFz&t>hyLKs2BfK&ig21c|?@fl)c|U{r38$j~aGs>x!Ow3^r+d
zP~m~OQ>SsIegXA0?u4(jc(BgPyS3=IT=S8_)_JFzuT@4FvBn(;sgw%PVAC{y;AI2q
zumv%1*%v(d;VE!$ZxZvCZI>r$ZeU)v>2iaTt;1_8-I+}G39GDlHH28UEW12O(|~2!
zqRS0Rt`4s)b!RfUC#<sM)tJPxWg18q%d$zA8<cz<UR&tSWb#i~Wx=Z<#JZ&oq>FV~
zQ*dJp<8r2jUuRGAY1A~hI-5;oCR5bzOmJg(XC|mITsnJ}52#!Cpv#O`{V6BwEQjbO
z?HeX@rl^W|Fumni7jd~Ds4rjv#}>sMPQHgdC7l`-F4R5fGT~K!%FbHlaJy0ag2|jI
zvXGXg#btQQ@{rF_$Ja)t)42>66e{UEWE+`IXVOhrqi{=U<LSJK6ZX%1sAsaz)hX!F
zGxxmi7Ka_DyYnYbkl7JA@wSqpfZx{-x<Zqf&BcqNRag#j%I$M?DteIS08(hN_V9KO
z557Blj^|Dk;7~9AA;x*KarWCCx<b1vx?MoYrb$=mt%S|<kI^c}1n#{2XdIu`-I8`F
zHnXhzNOH8q^=Oq_sGZ2%i7yOy7(db5{-|O4?VyG0%0V5)={83h#ch3CZ!28{C7`4J
zg$JIV4_Y`c?+YjuNQTH1C~gT^v0NGy?J)wP>@h;RqOV@Mfwa!g)8PA2a5!k;o4ug)
z<Zmv*Ub7={Wq{m$kV(s>yO{0nYzWa<{NB)G&eO}hM;YbwBDAL5{w|@?cUx(p%?mM3
z?_~$LXXpw+yO6p<pdQFd#$B#XlOJyL_#&Ybpu!GO#RpdPl5v;op-Gw_nA5sj7+sqh
z@+NLb;o@n$sg&q2QE5T6iVi5vZ1a!^P~n7V69Q|?WP)g80c%?X(dN^5Q)wY6pqUne
zH3lbuG^TJtG>U*V&SU~PMN@$Fmhc@h&cmLSPK|08rajo^Apz@=Y<E2bPc^ziZIg{!
zm>d`UJ&-%mV9peIkr#})?0MZS50|`I;J}w*UJ$LqqyChQHOpak<87sd7B9p&&n|W1
z$(VD3`+}~}Ebm4!gD`>Ii4|w^CQi84@y_XSw2F#qUfq*z9vm&Z_dw!bbf>Nm)58${
z`$~$I1;vWnU7Zx>Ja`zbqQaiX23C04s;0Z;$$_)gcf>dw3yj*qiS1_JZKaPD|2OQ8
zDA&$zpZs}l&6V>NMLhF9M`hiK*bGTL&5qCaP2)6wro+PdIPCyi^SMS{;k-AX{>RxC
zUbea1(Q0=jwg`C6n7sUR>~Cl3y6>lcIHf7{&5!Ll@=?J;#9zlgjorKbOn%}^kIx@(
zOx(bDb7BX#z2e2`b%t8jLS{PdDrxH8?x*roUwVArcyr>0gEuF3um=hU{R#|mpJnas
zerU^5WkLSMYD>O6UeRY_KBKS2)5l#&&coN^rF)QU=0A^B%8C6;tb{%;&35vt|M<$|
z^YI{A&T5^j6Fb%?2nYSjj&Pr4KkJppjm0bbTs$7NOu2TX&!pbw>ckDlgJnAdj&f@1
zcFSgNJipYqQ99Ntq}Be(_FX;!8y%kTG~Ik_<oJ<o<Bj)5j!$KpZhpM9@Kbc0+KK?B
z1HSsQs}3oBx((tfALs?~ls`qstE~u7IdB%lQ~7io#8W-MYaqMokm{%C1ho|bY6pBl
zJhe}^K|J*Xy&#_Yr|3kr6#*It&VqOvpKd2wT}iU{X=gG&QnG?;@rnG-nG2j2GngNR
z@VX(qV?6<)P6vM<Ny<OdGUan8*W3rWNgM6coKD?zY4!P_xABIuF|6$p@n-VO2}Npw
zib8wbb-tbQ@vwwUE{Oe3Ra-L0HN=DEy+F6Ev2f5iMJ<sg^NyqYX7;h<&3W0K%P91o
zzk4r8MqcYn<EHix`TM?$tEs%XzUJ%wn)jft#*6(w?Fxg!>;IbHSJ(LQ>T><(+NMS8
z_Wv`?+P-qZ{t0{k{c_*__v>~0UA*!2z7yvxI<D|$WmIf^Yt#Du&z$`(B@0NMs;>^v
z_;I`WnRDM2Lk`}j`|UME{`__PtmytqqNO3~eaV%@Hw|BXvwEdiQ&O~Bmbb?!X8Zk%
z4i5xRzO673IF)^Oo;!1+yW;lO7adm2y!5u(M4;kHp|w13%PiTu_uQEq_pdMB4dMyj
z{RiSLEw)zRZJEXT^n57$wohu`&F{Zmyt*^spM*I%%@~&Y&$Tx5<l6t`@9Sq5R-X80
z_IufhyC40_-&d|sV=}4!^Iqn_aNA$A-#`BNCN%!<+3z0}>aO10|MQ;UO3&=C=J%}y
zYQWsa6}KzETpRw)U`^XM{@MA;LGj-6f6sQ;mXz|JmVexqpXk{e!ohoR?!2piwGBSJ
z)t))wFlhGh-#t-@AJ?Y(oLIO*(L-Xr028xzONtYpGq2+T7qI(e+gI=ZX(xBYUFo;^
zeQTxC-|PN8t7dO<R|atfin;B#$?G)Tn)%J?)28j`f1SR^cW8R-XXWhlDuGWnKe^X?
zylCAHo9ojHQz<dJmUH6POwe?m@g}8(!JASK=LWxYj8OT0#(Uz0<#E$^xBD&ybv-WY
zyE@IUk2JeuHWj4!c8Cb)-K9x43;I7)gXaE%164|<ccmV-J@ei%LS?(J>%<GOTGM#H
zUtIvwY$odJRK7C8?2dSgT#M_ct;VNVz<q;%4xqk)j(}ye0?2_<S|J=e%G^FHLO4@6
zzzzHj9N-3iZv(jP-w$s4i*SOa3^>73Qz25*!BSHoQX3#rb0Jdm!BQfK9)sJ$nzubp
z2e%qe^KT6d*lNrsD#aROo%}OIf;H4SIbdPnfvv`~{96M)*gecn=h1vFENXS|cFX#?
zhOjY!ePzcc6zK&n6x!qY<CdiJshKXV9v|c&iUmcb4n{*1Loy^-F<;<9fjy2tZb`Z}
zWv83W6>5Ai(WxHPYnjVcyWq{kfVVySz+L~=t;SU%|7}+<DqF@5>LjqQjd|Pi)H$wh
zU)i%j^RMf-PkO<9^Y!|p-2Z-Me`KopYwB9mCD*)Rc~<FPQLcUeX7O8k_B&>1{D14X
z@IgMb|6nrZ|GxzRAHK7nZI@Y@EWo6-W^Sd=^>ZH9iS~&8L{GyH$C)eUPBih@teTz9
za)kc~q}MPF+-o>E9VB&vbJCi*f&%}i+6G!HXHJ-`6ltxj@UOcH(%W#_RQ4=z+h0&#
zjI~ylkM(T{y25b2Ws;QT2NRa^s<6om4;<LMFvW?_j@R+f56-}Z2a<tCitGzObLdMn
z3_h&Um^q<2z}di{@U4&aJh^tqw?5W0Bsyy#-G$c&XRMriG37@0xohWa<W|hhJia;H
zcGcWW_K&OM0<4XXfv3n3eF%{g{)boIlJsrc)B6(A(a|{a8{E+;<@XL`uHp91TH=(!
z@$So-ckzvl`SB-PWcol|oA2um9N4}t#fi_A*YQwAtAIp=qKa^lL>33rGY62fWZMJZ
z`dD}LA8EQJ+3R?BU*Ovwrh|(&E+|X0(ac=X{X+7Z>o>t`M_+MXWBteA9kgg(d?v%Q
zDLc4z1Rh+SDzhRzT&kfd;@l=C#&a7dF>n0_?qBTYVzJon#dl>ExPKw6-N+yx;mLR9
z3YdFYtC2xI%#-g*$#TX|0=r-T-u;#7I-mM;>z^y;e|#cg^L*=-9ojjHJ1##?-^bQ`
zu2xt0omX^+$(eP3Id7DDW?0YLedF!ocS+lmUmU%5XGhTmxn^tUcSYKK6+3lBUsZwo
z0VjiH3NBs_*<o}6+=Zy?V%Dpl#<le}xC?Q5!J`K5g-e~@ZUJ{8npRjmn3S<HV7Csq
z&u~1b@PO>JX<VuAL5;^d@hdGJyz}yI{qzH5(z~@GG6m^NmpVz-g4&YbL$&yJtiBYq
z@Xo&D3WYHXmw#GNI&T_ih9Ptww0S55o>jWSu=f3xlpUYI^FB`)*1p}6!u6(M<r|X)
z9{d+}`FSrpz&~S^A9EKA<Jy;7K&``-FH9DA2wtcHNeRx#@?-8&VO;xkOA41x<H{!{
z3p|7`Sb?O3XK48`ceyaGeYhos%cpVWgAj%A11lXe{w@R00eoEso?*xX&oG4KfoB-*
zE>jCu;M$_TW05bsZOCQDs}7lHYSO-DGG~gihz3(G$GU*a1wm~A3LIPHcPRND_WbGC
zD0iXk0hbA{dMZ0>k;Cpr?Q<q`rbvsdV9aG(XAoR?VV4iQX*kR0>{17A3GI$;9&a{9
zt31h1+rizNKXJm89Y4W+h<BeJf!lv!;PzjzEu{U|3U2>3LE3+k6TqE~*O1P}`$AA>
z<D?9vvtgareMIk`(nUV?=erZSU98#8SN;*}G-N5S`g3ObO{Il13&LmJRr+{C?ATYa
z&N7?wjkn$J9?d&`p?mGl!f2H$9-MtpPzzq=T+zp1nS!62;avzeQT7-Pco#z4<tXEH
z7w^`pUEtmayw6aL+GjWpN{XLewmoX#H`ft8^#YW<ewH{F9%z@I#`W}@EnDZ~Z5|r@
zkY+v;sF~lIG{J~DuiFJQ=b6=zH}OKs4oLUnB%}|q0n&%4f^-J{G=TdM3Xnd8Gq@|T
zgagtQ5CnGxJRyCE4Uj&>EQmH6NY_IHq7Br8(3o&rX`ur|Bccy+2s9l8a+T{cuv55P
z8o#lCyAJaL7I1D+-2v)4Y-(ZhTp)W8+;xDY8gSPEI>!O-IzalNx0MntG_5rzFyG<@
z_eyp;HcDMcd$7$zgKw9sQ}IdxW-0YgOeNhd&w>`P_K3PftH^DRR#{@YX!nI5Vw|3x
zv*p2k2t9pB{JVlXn^z&7&6pG5&SnLqv%v^fxP=eg+4w96?rfZabT+m<-sWKgnhv>k
z_tdS2PioZVzZ%bzX@0(Enw0r99dP2go^WC3`qV?cmfVhqc1UhGxS%-Ubc=MgSW`=(
zabmOM^Fz}(&DnHaxSpNfJ>CEL?r-g8({_h16aUa?QCnsvw7mI3z#Y(J#`}bsj%nLB
zoSCrfqlL2*+Y=tm+K10QzAT;JdrDHsNJo9iAHQjmL1o&fc`~JD8>^%goSSfof6+6K
zlkS1WOHM|nd30<$GvN~d;%6QwkAp-K(mXnjfJByn)C3tXc{%Y44`-!{sk2x8%UQ~*
z`zy{)Sav+fSmnvaD?FNiMRWS5{E;$qo+amdcESYrVB;lQRL)JDG|R$ymYo0D2@{Tk
zM6}LLoV3ZpdDh$FnTC$iv1#BLjaNp{8I8Mo;2DkIvCjf5+fTf&nCY0heb1SNPMr;A
zd(SM;(ox#|HkD5_i)G8lRJPEEf;ZRd7q19VS#Vb0cm>zw6M6MBom;gSa~ozlhVF1F
z<31y!HH9-n_zcggLu#9DCp-&S=;t7vm=+*vH}Ni)aXVKl(=8t3=2Zq=Z^~v!UdgdP
z!^3q;03tAL251uF!m=5XA+3Qa+mD`E=(M=O?3fRvi;<ImMh4oPIg(R<Mn*GTSk&m?
z?jt$<AaNm4t%I|V<je<&L*_Jc)`P^sEt(@a`$6J@qCy9)kK~*Oi3^Bw9h5$jbN>tv
z=Pe6k#i@`bOj|0`oK{_6KPA_+|EFCwc#QN@{pZ>;k^i>ce`dcg_Ivf}_x_)D?M>_L
zewyEZ9&qLBb$hqHH$n`m6|4V#?a%xDdVPI~^uB+ylq_ArQy;tjak0kNpKYJB<hX*#
zl>grr1bo;IZOTZUs;>{w`0*Rs<zReTZq?_$Ik{xx^+KDLe!sNs$?S`H$~WHM*nB{F
z(#?-I95vR*zNvhp@IfP`%(hG*Ygx>j>Nntt47)Octg@IlwQm$Yd@oJ=p3J^5?a0x8
z$N8A*z0=Da$^^2+rr3we-Z(Y;%>A18ptjAY<2xRbF^iG*)%^bQ$1e+a{F(j!^1&k>
zOa49k%`<WLqtp9;+A$w;SN>{#Ki%O<X#D@P-(OaITeW-tPdnKo>#e?<-%szjvg9d9
zHOIbJckb8BXAIoF@%QZa#tId3&p^T*yLv%AA+C>hpUv<8b`Sr);g4b753y-iJX$Y+
z26XT4XJWp;ZxW}a3}~$MeQaZ6e(cE>nJ!SPhfC35gOi8a6N4)PEN6b@@AE&t`SFFn
zXTQHxuoK$3|EHbvlDv436C6HdJOSIavsL~!znJ4&pK8U*o43>drslIhJiYGcM9|zs
z<-9+w;VNGaMVsB33hED-i)#y6NoJd+fJVrbc1lK0yr6k=)5C2mzbNQTs(!ZA<3+GO
zd>-TFbftyo_rvEg;8PLqKR{Cvh<S`>DDxP<vo17m@W_MDV{kk1A5!{xOEMKQWl#_9
z0El(WaRg7E@QP}@x>3FUaPfZP5NEa0}k+W~O5z#ZHz=z>VifJk{kq`bjWryx={
zAX0u1DSxmO7osz<IAC9y+rkI8B*9AwZ%Kle5`yMZdYV9UDHk*z+>$)I+)1NiK6qLJ
z()))@OQ>n3G?hc<Fs82v;Jl|&1DeC|S>&Wr(GO7!o@<0CR?<>wDu>Krw66%@xTjF_
zwnypUR^wTIoem#77TSY4G=8mi0pAK%l)1&vn6M#!^PyXkwq5_{g$7z*2K67lHixY%
zJN8LY-#*^@^NQKOu19-*X?+8lv#9^OwStkn{3v?uoXxWA^d)mQ$S(j*J9L-CfTtuD
z_*^;XA+_WtWVRv+(tq#<OFi%gNj+ilympSG<Nv97;C_ea#5JIPhbyGtA*>i_{aNGo
zKj!Gl$?N7$>|dwmq?y%_?&R4kQvqI|dom#5!OZ|8MfUlizD0|M!G|7=nG=`;oF^F6
z1&K&hgiY}|;kZIkV#bcLWwQSLhe7ibK0Pk`%F=oq=Pmh~aOTRn45K%$>DlRW{8!Fx
zd3<xV+|_eintz1qub3+dT47vzHF&G>ES^f~%Ug}Po-BVD^0r6K`QEXTw`UgT{N@*V
zRJ*Ip&2HDO_N6Nr_qD2;1}TC&K;PFNIIw+viW8qZr~_0Tp70<Vw1{|7n?m9qCk~!9
z0+To`c}!Uti$U%=-**^1U*ewR__pWRg1q}H%G??sT#N{?Hl8=d<bvxLp4UphIbJ7y
zWqHk1-=L})cz(SJL$TK#Rxyqbue|uKY}V#=aMVeUY-D&Iak4S$w+RF5#yPR9Omm`D
z*|W}GW)L~@sdK7B1OFNo_N-T6ZYGGkT7^Ap*JXyvj=Nv~-mPjxA4wG5hCGs3zEsym
zDy_V(^7q5o4|i|Gorul<y<zvGGLgN{lDn=vF=0*gpSt^#vPi|-<25UyE4iGUb*~=~
z<ceVjajUo{wZHoQW%X0rvv)2%l%2bKp{Z?_cuK$HJe7L$=Xq(qZMT>~>(<`+ox6Kt
z7EkJRTQ=@3Cf3YMPtQ$S=(GEHLgTb)=?)8CL>f&g{Vt(%;nEKtjwyEDZP8DTN$6ZC
zlHSPJxVuAFGOtlOd4t1g-y>`+?-aMC>^Pd+Gm(9lRlUXZrEhb7itLc}*USABxPQ}0
z!-~Z0opTGDi+T>uRouVMRHh{Ia>x!v%VP?KcUE01xZvs={E+R5MDvlt?5M+z(@lI^
zrTdb3gpRMx;AM}!5TzBps$u1Eg~B^k*9tB?^$A|sHN6TXo5sr?d&Wf6@8)p{mA>fH
zQhd9nWNOXX&~NB5C)Kd$QNvP$X<W-+C-VrUM{+E-NRaGVdg$aYkS%j9r?BUqNjxc1
zad6uArU0Ixv<<oj&APd4>y+CWm)=Q;e!v!ei#NuckJ;<y!EFclwr!E!;U~j3<x}&*
z1N>~a_+!NRn7t$q1tf4V=W?uLZbz(yyk2{_A!wR`NW>wB=%&|u5*;-CCAe%77uX&w
zy=#D2)o7KcA#khU@FY!x)<!ed>$!&!s~=x)Np#Q*mf-S9T;O}~>rEt0yK*D~PKlVY
zF59rs_u$tXAekKS+Qp{V8$fz)h|D<DX2yCw9%R}EO@mh6T&{Jy+ZdPnBnBsNN#7EQ
z$>#+vxm<QY#B7V^j&o96EoRp?K-WUPUX3uK)fc*O@eXJb3bHOT?j2}$0kSSq{X1x}
z8f0B$e>JF&09hA#bT4=<7I<Cc!+VHzkp=G&>ms**mr%JNF!Rs^Bi41*5WNPVb(D7@
z>UltGC%1hEubp&0C9-4QTZpwF<?%?$uOcbmf>17pq}(1!`PqBP6C7@z5ZMMYeiKAJ
zXkDc3O^6Rc>muvkK&%3-i`4%H@!@QvR;IuOwu#b}hs+?8UWd#!wd6t;RJG(j;kXU$
zqTW6suuaohLxANL|F((pIl*-S3)r{F&T%a(n6{~z$#TKn2RcQ~o2Nj!sOb|W=R7^r
zaD3t32RfgcHp7-vou3@L?fJ>PtDjTazuQclvg7B(*Of{Fc^@9y`m3<#g*~a7#{pUl
zd0zNr<81Do^VFFhvPs?h>{9d~&0*d1P6vyZ$ExRnXS}}J2y!gHRRLD`cE>#R-8-Ip
zf@i$uslNryc-i_NgA_H(o_B&~ytX|*`S{A`l%3mda_@YdD_<6Vr*F~q8lQ<#ua_yj
zSy>cb*TS^^?+pH}-+Uc2Ry>umaB6)0U<UtIF+UJ@7Kr<32LDzwFjvabsqyub8T_V`
z!Q5FO?z0*Eri=X?KLto7UM+I(S5FVI_0My<db#D?@>z0UAFMvE;6G`;k0{4nZ&S%v
z7sLAxGVSaPX}nMwGWns{9z!<nCu)JLPR|2;+oInblhBzk+d-6LuDz*b-a=6EllLh^
zq2%3_lpU^lJqMX|=f9H{_)&6y(nGNwhHTthYWC$jJosGe-4=c4m_+4*Zwk40i<X1R
zrMI37qi^17b}C8C-dU(y4(f>iEM5C>!RcAc4)LBeWb1q!wzaKUFKZT;xdOO&xh%!E
zYe}ZoodTKU2^M*-*%mLFt_3}ediMoX_MDgE+chUs>q`DrP-i-9b6c}s+AOZ+Z@`6E
zDldENDHBn@8^<M7&VAaRb(FDw)wU3eSb5Mq-~Cmh?0;6?3VN7Q+vE6X$299x&D-v5
zOySzokhwG2VWGs5GY#20FN5-u)B@ddotaGL2~qDP0#w*DPRoK9hfcF*6M4yatH^ya
z*fBZ*DjX0gff*nvO{QB#$0unPuq=Dp$LKn#0c^NVBgpWHY7i6sAtrJ`w291^X3g~^
z>YauFSfc?eSmQE?MjwbqO^C)|u*MW5jcg(_nUI`<DRmswmnX%<QKx`b#)6_8IWQ>>
z74WQV%xPKp$XnDq_^j;pqT}#c*=g4BS=p_33}Lgf>z?*KTA*8QG96U19RN!}O15=R
z`yM_4muwJG=t9xcbC2hoo_jp>^j!BnPy3b}Iols|TDGyEnLmH0vSq<$rRzoR3U?+P
zj(+FCcPHk=);oe6<`+Ipv!29k&RnEh&T`1p{9ciJ(Sv8U>z?*GSX?~@R+w{q>z&Fy
z^*3T!WSO576z!Yb|4Y)p?_hD9cW-eSXg#U@XH$uiciA%wj^!zONSHI5NtE#A%q)04
zu~i}Qj?ayR3p+QY9$M=S9#KhZc6@$h8s~PqNDiT6XM1?r=1NDa-LV2MHsx4!aDl%<
zl-eE0+Ea!_2N#@|k5ap{D^+olfx7?m-Je&lo~si(yK?uAkF94OnbwtUtm<Vy`1JLW
zPs!gJOHcf9+t6ncf7nWBTSuwNqeK24UzWzNNs;A@KINv8rXS&cDxdAO$LFtWloPq5
z+?C|+`FXrNzFjtR->OoToXFQ6Ej)f6nX+#@K5t#CoY)=ht~8~<$;&&@eb)K{S<dK3
zRziwx!a-5I)|YDLzV^7`bbTU+?VJghnr=*d#(&#d=-Y<9%7T+D6qlNAR6Z-eqg>@p
zW3{_dNTHM0=_L24FMKb25<WNZg+Ao}`8H8F1T<rmP}boau*XrSio++svOS@!vvkED
zvyGfuQ#dwEbZB3-q2o{3Moz6O92;gjw6FTm@uzGfr<MrkhJ_C8s|-5-Oxwt*6~eh;
zr9=Cwg3dqNK>9d0Yy|1+{BsSYk8{ILkiO18-$44fHXH=$>-r<MiErx*!wU-!s4>f~
zI;8RG_6fBW7c>sIL3q(8!MrqP<&f5Z4|W@0m>DQOty$!xUNJl3i}Z{MMP`AD!h5`R
ztoVF9EFoPwF<W-EC38GOI#}KdcCTX=4mt;3jMm|LzmZcj9WvIk=<|V=DaGL3Vo4XP
z7brKLW&f2F-Eidh;YGg>v`qQj4xT`IbokxAzc1PTCx=yohg`Dc<NnUM+V^OGdS=&?
zqw<g*-ZZC!;qjjp_5Vw>H0-k3|L4=Lzq4Mhs|O9d+-?uQzF+p}`u)p1{4OR7d<$8-
zZokvP>+zoz)n9_=a&0w4{=9|G<+gpgFE7IN?;mtUsl(cG_SYBRNR<9={wiQ+wNv&G
zo15gi+sZi#A3C0taY}PM-I_OlL*s$P6K-qfC|vP*`Hf4O!{*bDyNB4E&i3W)-_UsA
z{`H-*huNIYcI2H0@h<I*1@W5l*WGvBw#k0ZT=wsvF_+)TKYTP+PGt56?dLL;<l?cB
zhHW#OFTlz+PY|}v%)g6?`Ft02n^|%7&)YA&7t8qfAO4$uow=~yz)(ol_FGdnXe$}}
zVupu{11BZw?>eT?@UCq8+rWb>cfTsKslNJj^Xk=l>>pR(yQKVFr`vJflB=Ql4j)4E
zPfpmr@n}NhACo%`4=Q&+Hjgq?)mO`F9{E@BP3>NNNh$yP{)gK)EOFCn0j+R-^-omd
z$G53ICmw<(b?e`A@zlKbQhO2rTHzYb(by>JWTe=>uuUQ1U4GsDdDc~}6CU3z)R-U3
z>tfl_e`K0m<-us4SKo3S>I}>jDonPeoaoL|SLOe5qizF7R{AaOlc(?5z1FX`=7=vl
z+rMV+OUDzRpXl#VS}1;R)5CQ&p!J+PBPL!r8L=5Wu_|`*?1`=xzmwBoQ@h5Xsog60
z)UN-25zg9wsW%I5hk&<r!l!l*frfGrQ@aNHQKojon^ES4;{`yPub<Np1`n<LU<M7X
zfY)Jw9GI~pKoK<V(GKM(LB>avR)EGwOqsxIO>MyABLON9DHX6(C`2j-BBchAQUgns
zLZoUSQlL>4=zvS>r>(|Ztl;@(H}I;`45U@1j;(Ht*Ux3xftFuDW^DaKUa;f~gJ*0Z
zxfMLUyVIrB>w_A2dKa?T8=}}fB!eYi5Uf}%P*HG?Ggz^uORLidwujm2BAn~yUM%rq
zX>#ZK%LrnE7hX7THU4#|rRDD|(QD^k1pfKHrVBIyZyUN=eoN6-<7xbrKY!ku>3;Xh
z{(D}FKpQ*7^nZY+dq0r5v9s)%VXU>X?vB3<zE{q9L@jv?8FEPl54oJ31{zkeA6+{-
zwAYS)K7E`2ebf76-<;l6-EO}tx_$8rQ~BT}YRfe_s#o2aD!=eRw*52byQhK$q_TFh
z^#wezvUuiv_fqf#n~?p>pV!|nvzfPN>0xWDa_8)-D|#p7nr%G)<(<2GW){y@_D#nV
z8t=@VvwNbc<f(PlJYpG{Wo#^`=Bhf+EbBkWq^o<r!QtZO6ph#K3?mjS{U|A*Q9F%i
z`-xt|hy_p0l9-vw1*47bFqt1qXq+~?gO}rubI!?v?%NW|{3WIT3iP~h-~6OmU_CG9
z)|16`sgsjG9J*Fy{g~~kM6<PXU2L|+i%rW`7C0Ay`W&HaA1>$yb$d>Lx;@vnv^DEx
z&f+qc0e5>YO7ZPlur*{`2xBm43+dN24;P%Cxy(sa|0}59b5@FP*NjZ9Ih*<oJ!G~|
zGnFaPyc}YY2=3V=NgQSLPSg?gyAJC2Y!YxQJYXc@-8%Uz$QG+&4gOm*4o}kj(4_mG
z71Yg1h)!UOzQq&c&d2Pv^We4vyxX=&@5qy3o3g1nw^24H)4E`;1&_v4cIQTUo-Oh_
z^kk6sqO$Wbds!X|c)-E@mSf%THpZnoi5eSP8n>}ruRPokG|xb!;*dji)9YQJAr9!s
zO6i>dg)I-;K(o`J{inCV!z3Dz;h0R&019+7>g&zOn!v*`utArNAQ{-8OCm@QY|v#t
z*fi*%OF8nO%RMR3epuf|&76$jg1M$59Jy-}PeR9S!jX)a4cSJzYbRu^0<?{EFVbj?
zAJS-yJkn@PH)PCXgXc`9>xYp>V;(?;OF+9+zvjO;^jM$>*=qV7I?e&wJGvX99<(#{
zYwmmSh)vrR%>vuokRcM#&eZ)#%2y*P&qPvw3!%IoN%`!(#}yj4P1MW@UUuMXDnvbK
zG^Pq^H0JLOh+fcWOdMh~hINrc^&zuQExD(Jxl9_jwdAI7-i9tazI{S)8+1$Cwuy>4
z!H`7)Im-4omi<}az@K4l(f#Iu4rGzQ!N@0U>6+#m0nE2}&M6sNoCa@bI~e(dHC<C*
z;{ww$u0`|Icjug+e0SCJlYH+hl{5=KD_{TYqHyQIVer7pniHUb74s(_=BZBttvR;!
zXF0@cvgdi{lLKcPV$KUU7F_E6ZZlD4M`b@~;Kpz3N3g=%g|_}>h36-iSy<j@we`Pc
zSaI%g^}HU)vJ#*3!e?7{U&=W@`S{A`CyR17ix*wLZTDu~4q4arKW8Xyz2@t9BlzjM
zKOC%azYXQH-p+2i5OCVGpoQuBK|}d0-8o=xVGGmsqlWTXxe#tq3)A(JhVofzbHTF3
zElk(X8p>z6&24(J(B#mnr+sq%=T=nByVJ62Ip<t|Q`=Vu!$Bj%_A|8vtfprfU0J+d
zu9>w+cqP-q&nwgp>sBQ5h@J3V#MN?c;Vho*H+l^t6wDj71gz?_jP5vrik~}ARyw@6
zv+`s?_Z^95)+oEX<_aHP?o&OiTae5nmhrRZe#3$1zo+qR-_dLM$>FWztzA$3K;_b{
z$xhohZDntLap+pnW6(It9m!9xqYgVxH}!3mo&+8_$>L>?y<#Go=g<c#UY424lz3ha
z+40Z<G;Z8=t>6Od+NFoK-gya<oM$RiVtF}a#r;*)1crv6=3nh%{uh$FvS63pF@?fu
z`$M()egtoYjScITPhrp9nS4^Dg7I?E@dhVDkC}|ui<W~%HccI(-$fX)<{j8_$8doM
z--T(`(|j6b4Rp(SG%hi3dD^FT8046U1s(zrDMheU5X+XQeX79^IDAgaGIyykf(?&g
z0vWF43o&sX#6%H@HcbQFa*-2T?*uA<H70O@HTpm_&VXnPhG<*{)_4L*BM)c?Ey5{S
zq(DU;DJG6O1+*<16y?Z)NpYw^);@v8SD-s}!NVxf-4svz9xjnt=pdNkT%cRdqn^sa
z+T`%NF?(mS1$38v%xT%9j?wQj^uWuXz!H#>4K$_$-Kq-~g_dm7tov_Hv+iF#&APwh
zv@CcP%QS1IhivlTft55@(7?(L#rExYCd%yCIU#$evOwN~hq~q9b@5T}I9ev>?RnY<
zS{Dx<xLMT;R(P{7d*^4+x_AyNwiBqUSf0NTYqGYjdzNkR;?8xWhdp<lCK%+g<rut>
zxncD1nlflj%S_Okmc-L7(bK_e=8v#7pX<~W&a2%dpwcs2Qkuuge4EdX(o;?o4BiR4
zG&|0B*y6L}E11g&;@WTV*-?7hNhQ$_v7PsGS>a>unMbq#yh-{h#ou)L`pT!r-!Q+P
z@Uu5THgjKFsY;IEYmXzX^C!IU-XC$&N@&}ZUXL?z8~Uc)=eaiV+3QI6Lt<O{Tx|Bt
zop7l?-}+Kb=xdJ~o32gdkeoB&lGTlg&$6T44~cE>bJ2L%GG*GKK9l%|Rzlm3l&U!K
zs4v+fRkq}()%A%RTGuHHR#_-6Wd#kmY%5oJlUVJpq*CbQm7U~1%f8^f#|`H1eJ(2=
zwM?0Iv~SA`*$XodJY$qybx8ix?Zax|Er18#2+Uqk(H!wbV8((XzJqUsUI+ZlO%e{#
z5KK^R<O@v{{JAzsIAn!jf^j2X=tIGuZ$WZG3C<unp`W_R!XYb!5`sZ;LO*kpg+nxi
z6Ouu4!avu7<b)H7L2|-B--6^s5}HABB0qIgWV0?NFK}-3WwQ!t4SceFqHn;$z=mEZ
zZxWbymd$MiXfI&W#oPp^Q$Jl={XUp&d|_??JFF+7L}mtT`L0eCXf$T>3IWc0%3`sg
z(HKatu6rM7GzL7a-r@SZkyG<IWVOqp?+)%vv-!Uq-Nw-Qz1{UYNQNK0Bk*YZ-P+%m
zdH)?>^9|g;yK1-Rm*r~NqxI)6iJa`V2XFaf*KKWDzweoI+&@DO#?s2VpHEAFn_iCn
z|IO*!ukHNn*VS8hk-NB_?;3b<J^O3W;(F^A@Zx&+8{ozDLS_P|vhUg@f*02Z-vBSJ
z7c~PduHW4XUR+<72wq%o-NxH8OYrVI5N~PmZV+!^w(bU(UwvBfZPn@Y@bFl^N8x*y
zx}S>_18*6;*YIHVy-AAs$)HoOGIuZ@{9NGOwx?H@jq%IBZ+1Z)e;>Z_-Shv&E4h2}
zhsjuEf9L+6eYWLaxD=0XejH%8TdJc-K)zGg_EXb#i7Rh!H~dM+arlstb8>?CT|Y0-
z!CDD|SI%t_pEP}M?X~!CWdi%&%#x3^zT7<F`N{YSS10{FsfS~Kf(Ay4H!3ZhyfF>D
zQ&wlv?1`eBb0_J-_Ufj`b+y=ih40m!SEniT>(6P}0vW_!-4@inx`}n5u^spVne}Wa
z3uN{wfL7P6pBtzKUMv5BeO1{p=+Ro%mmx=MZ8e_74|45=fQ2rQ<twh><ttf`l`R!4
zph2639uO%{u+%Du)DDQ04@AlrEcFT^^#dXm0FeSMuIGB1oi4%!9@Ifv^a358fvktQ
zSOYm)3$$MsdbHNt9$0P#uXTYQtp(oP3q4v3q_`h)v=&IQ4&-Pp(B@vqVCkXj=QM<3
ztQW(N*0Nsw5^}UwRyyoxt+^M$M{9vrEkTaf%1Q?xt+my-f7i<Ty;EJ{PsG*h#(lUR
z-!1;&^?J=o!Cxd=Y(rPSULWw`>-Cxwo>idz^!fZ;to7B9{qzeL{`n3%Y0EwXeA1Rc
zK;qjo$-Bzjq6&U9&RQ{d;ueqNkmdEKz{~4r>4KKf*D0uFrK|83ZBhZRyx#|w@|yr&
zdB6S*XyHur9Fdc^BpE-(UxDoN6`ZuyxPQ}I`wdggU*3}Z`65ec$|AN3wJBFlG%g2i
zlbyxG$~KQzRk-LwCWp{5{|+YR^Bt2oEg3*dztmkD8`E7+w#c+dH8pl-r{DVc#eyd*
z{no)F9#68<kAb(-AM<(Jqjos1WLw#@kKlFhdtZUqy~lrTx;4`fe0H8~sP*EL6Sf=1
zS}%5}lk&TIF2m?auFv&zHmA1z2c5x{o&E%L23MC9S!Zx%rGwAl%1Q^H!FA<a2Ivf~
ztaK638C+Y9AA5Q-$GV)~ptq@igI<{b2E7mL5tD?z{_$cqSbiinp^;(zx+e~{yDu?_
z94VS6%2CiaRc6Ijf6(DsH$xQ;><lehaLop^JZ63bC(DlmUPTL**@3xXoGd>!fVkGM
zqqW3$fVxB{-T(HeAAexEe(AB;M3iZp@LNtx63d=X-!6ZT^?vW$);nLf@$c5obHA8v
zx6H%WFIeDP$WCp0r^f4bXWDm7U9MnqrHEH%;epbEGwr*UE?1~rQRjdD|Gu{sHkID(
z<t6Xhu6<b%JHeK%a?+o>b9T=(mCWK#0ZlbqTb3(l8%>D?FLZgs!!gC$yUpmWTr+D_
z)I7$<Md>F4uH8-E;Nbn(SRvq-j%40M(5&<6T+pHyrEMuYSi#fI=7Q1!JKAqddMLKt
z&`s{et3MB8rfu8&H26W8&CV?+-T$6aJN}?`?bEVjyr&G=%G>_zx>j%@)i?NI8+g^r
z>Zrqx;-GHN1aP+}lb1dAl8I=Z1-RR@$W*4pF?(gsN~UF?-NLUU4?9jb_HEUQdj;zE
z%rccJF}xgNkqR1f$<xiYcoDR0Wx*kE&*rE>7xT135n6NBftSQ6_B?7xHJHYw4q6g(
zy!2Us+!n)j)!+xL(f7DP-JFBl4)AQ-BDteahHXkwb8e$_PNsRmT?-zKRQB6U);BJd
zJ+La2K%52^3zFe*ZdByiqPT+(q^D)!0YSD~f-&EDnY|(p1tf4X=W?$5+{U=nCQ;)<
zOXD||>!qL}4%o=bj)e{xhk3o1K@JDo4jv|f9tU<AJb(fnj!8$>v<Z38B^e|G8+17g
z)&m`MsRx?|UFq^p3Te<~uPKiP{6I0QYz={15#V(=pv5xlk&G~d9_m#L8LI#t>Q#j_
z8Z#GZG{z2TG)5e0G^QPCH0B^=xCFd5=00dOigOAVXo1T+q!laW5cS~oFt;HiHlXz|
zRY>b$>X4L&BPqX(q#S8I%s=QT3TXL^d3C=dQ?7FGjb%QKuTMkNgGXahAU*_*#{Aj{
z8E*oujoFJBjRCE=Z^?bad3%bwNCs0b=j{_h+cdp3Ca~NR+%{1;Cm6EvJ4f01#xlr)
z`x|a`8+;+#Gz!FS9*jK2$MvM4ta<YZ-gD3+h32@X6-+Z`mTUjkwD|=0xuCd!1)$aT
zw*F-|=c(@wJwI9Y-e(uku5ZxNmK_H{D`G&qzCi;kc_$z%V)P&@Vlp5LT^PYDVwOn1
zuT-)u_$&t+xS5mn7`$|5+vBQvZywE4e_K$rkGpE#mgEm}j(@k2bS_wa{Cv&KdFtS!
z!{({?2cMt(^j4bwlXcr`Z^RZ_cg1}+bj?~jyJ^GnQ?Wk<x%PZZw!3o6oOR*CY1t1r
zSl2Zt+g*vW0COL4u&(O{$wIhKI9S(BPPV(^V+EFd#=*L7cCy`-9xK+9&Y3Ntr)6#D
z%?bQ!vy(H_U)XAXR@If}^`MdAI-^j961}S_E8OF4L91SZSe>2+`nE-X0Izy+5#^Zc
zY$}<z5mf%<F@-9W{JWB}qZL&A>^vFVcwuMo<cDHA!HZsY<vTpM3|jQ^0JL83)6ad3
zjpx7XO6C<xCqHSt)x4$j^juK6v{k(|FEyK=>tgHLr^i4;7dwofTnDXs$)3e!t^ywZ
zy(-1GYelBkod)o#7vF4)7n7E)EI3>U8aEbQ`)~nwly@s=eaZxjJlkxG7e&if2J8?0
zPH1TOK5WrT324!aPW|dInGegeU}M8k?=<*t6&;_X`GE<vQUtsgW!+Oh&^og$$TE~W
z;KeZ$WgyE?tP?=XBbI<x#Q3&>9J9e;q5?$986pK;5hDm*5#tG25wiiZB4!rEL>tJ$
z77d6t(83mt3E4XrJ7j=Y*?`u>K$f-~Cwlz~+$jVW%MfAWs8c|D%D_vOkOGt9P=TD4
z1{z<1EbVIo512rTHPA4Mr=?S)(uKAM;H5DFTr7>>n88b9AZz<}OtbE4-gf6=45(y-
zNI(xu1C8l`OExC3a%jn>TQ0X*w_Gk<w_NVyH0w!1=Jw#FExdM+ft4=sz=|^;ctuRH
zB6vlN17t-E&k4|q81=gqr)5tz&i=jwG;k9l4OX~W_IlCtkN*<O1xt7)96tHe&+b*a
zjV0UpN?p@)H+5M+o6w;9h$MG|R=x1tNVs4LTJ_=%UiAXqN3>lJyy~Tcmu;?awA!6t
zDT*Ev=Ei0cC3&FbGE+brl{?s)?HV&?7QCJc;xdD{^&sxFR*yqD^WX=nVT`~W8(jl4
zx(25D@8}ws(KRrj(VEdUFr#Z=%0|ymGk#k!bk0v3T>~?^1_rSusdRJ=Of%?Ec+irW
z(KRrmYhXs#z>KbeQ5s#2L)Idt(KRqsSp(Bxz`y(R>DSA@)jodr>|N9~$=Bk~<099X
z9lyT5^v<@Hwas#|NAsquKmEP@>D}#Cs+a9I?%J~XfAasG^XvXxF1P>tX}b9Cc60yz
zd-v_D{y2Mn{m+-b<^O$nBwzRQ<@x)65C7TBuyjo><I{~#b6t0y`I|iD->m<yrl_;O
zpJ=IC*FWdT_Y<Da<UW3Wd;j5*mg)ag3SWlr)~x&b#GgOz;?9!~!oQg8TeN(p_OEjJ
zGs{1U+MbQMxc|4rU70<Lisv3)|3YowqS;48W8XgbVLfNchps%K@RF_3kHh`zEGk@|
z`*p`(RNS}7`B~Sm{I>e`$wF}#6^mW}njeg}{rUEwwv~AGpRT;e+Plui1pe>+^u8eI
z5QNS9Dct|xn+KwE>vtbq|01%+^}JE|m-l&Y=^sUHPsd!`zgu#zRfX&G_>Uj7e`)Po
zv>qb6{*m@Ctzy^uQsZ9*^&daId{_4UL&@iNuRc9ITVeaR@JZIM^V_mt^2_a=^tgQI
z>+R;-KPCQL^K?eVx`+RNUfq8G#s0cEUV5ACE4~QTw`hHAIQ;+f>ipdo>%WGmv#<OA
z$fDw}_<Y&*{~sw-{q=wGdjFF%G5=Mk#{O3ot@!&qWasPsOPbdI-~Z=l{QuJb>uZ0P
zly0rI`v2|r{9C*RZ{9at)jpxS;a9<K_AvMPwZd=g8{RhVEi8U1zwh_M_<uk0)uSsp
zt`_gwvGd0V%i3eNdN)}8dSmT)v7!A1`$fN37oR+zef47c|AxgG2b8}yXDt7k@hSP-
zs~4N=&jp$!C|PxETj@S|ep#6N{J)R;7BOzV=(uH}oNwKWNZHzN{<gflH%zN1<V5?c
z?f<o=&+d2md^fh71-2e#Vg73NjBESse!DMlWBa35KjBTN?aUnaSlQaL__J<oe?00Z
zyt!OubaUn|t6y)#X7}>^IQmcFX8PBZwb!4$`tW&ouGuy&VauPUAx|2*9gKn=DeZ6S
z*&;V*_2KjH58ZsAmGk6D_=Snr`io0{{FJqnj%n?m^M}i+NJ#qR=H10+JGhiBSB6gN
zUSI#ioKrP^mfzp<Wgm}z`M%8Xz^~nxe{g;J`*P8vd-BKL``d2cHF?KBxvPeaFJCW8
z65)AVzA~P<*tEOUCqZfV3JLzhKlZK?`21=u58KbxlJ5$tBx3f)@;9vBeq!zZ^PTaR
z&mD`dpYMM(GwS}kYK;eO_nkjJ{+YAq;_3xq=HKPGcC7s#@aKiCbpC6t6<06qX=l3j
z)K<hk?EEoyR?~p@w>74!?|oNMH)9`v+so>V8T;CQ&5*SST>s0WHoj<4Q{gW;span%
zrlqm3Jk}WHvQ=)y`-P3a<X&ZzO~{g2=^FBS;x9R=mG2jB11VS-<+63tb6e2`=bVn(
zJ5-w5om;&q%J$UlU`GB=EnW2$pR#JEgu8C7>e;@WN$wG+=>G>#uKti%-<9>1Bj2CZ
z=76x)zlkSTe-w-pz543o-FaLU73v{-!uLtZ-wzF3D|h$p$_Dmwr=#6ZSAV=1D|+?U
z#<@C&XT&P(J<nIv+yC~|0jK>3SeRcnmPxF+VQ{VgH49HM&l2%li5rqmM%b?sHt;c?
zFfXJ1V3%$3-x+=f3@$rVEtX}|4(t84yd*4PMvj8*CBA0S+it%nTWK4dF`p2Z*?zFA
z^|6XkU;6({S?1LNeUp=(XVfR9v$jRLAIzH=KFLEj;)(3}f5FylVTy9<N1t8%_oR=#
z`rG_Fh8ws(Tj-kge_LK2mN27I<c)BpYUh<E*JmH!*dJV+Ao{2<N=NRk{>L>t3_h;-
z(04iMeMbF+^rNkn?yY5W#IoIg@3zs_^Rd=i^LWb*t6TG*M;0bt3sjU{e)Q7Ce_rRi
zxF`2<J-5&;>-%=RDlBG3afrt8%#B4`_TSw6=+KnKhb;WMdl&zGDR=(s8~eM9V?+;a
z)D-LcCSDU3Gov8n$FXJC%-_Yg?626rfBudK_b<I$EPwgk#`w$c-gCLVO}~6T^Sf!f
z_Ake`a=%@3{g3tEKEG`Kl~pI0-tReH7kYd0N9FIEU#4%>+H}C?{l@rf-%|eE_?z=9
zb8Xj~cIU<4U$STY`6tl#V7dGO!$0d1c<Qa>58H>#-CiK`{^y2?f7T_a)LY4)EUmei
zaqn~D<DanyEB=+(&3pZ0k>TFwhuyyJZVLSSvL<A6P5$@)C+b}C#ht6_4NPZzpC8Tl
z_;2H4<{u1C-P{(k#C%?RZmmO3KYz`KJv#1d7RX4iW)Ji;nDRJT#x;`1&(YFMhkwzW
zB#q<k#$B5v+M9}USma!8CTJXY*X!C;F+o}5xZEQd7fFRF4}Uzi5=s5|#x0=FcDrTA
zrlSFU_6wZ@#rm^Zp59nIt63vm;?&3XB8^jzIC~e!R9h7bJQZy#`eP~6wW&e_WXuT}
zm!Bfemj7Pxx<=Zx3r<NspTM`Mrfs22{jIh|I^Sn<oWAI*#-5n6n#1X{w$6{&qW1fr
zBxnB%*#Atwe2U4eFRS!tI|<DCm0G{Ecge*i;&nGUn=V{g|L62x<zBVD-%fwyZ%7N?
z|3lxr$7I%*Px{q%0<(U7t>5Xr<l+)u2eT>#ldoI_n~EA1|90ZLoFKMg<@ScBbraks
ze`C0Lsqw;<?gK@_9*aF!H@tc5knt)uVdrP(jJ~|z79Ps8%>`yviAUsp&oIdppCBvE
z;k%bx=X-_8tS#Ip?08$2-DC9&*DENAKAtFbhIL-x9G1&#VjjFm>pN^RgWG1Y2IsQK
zod+)J%Cu)1h*!873i)g<YFsRB&UZOM??aE0%8az9OzzvWWtJU`c_4Yz-Qesg*1o(;
z7Cy~84;Xj#CCr-2EpvBP;S9Fo#&i+sg(jzMC7p^(oR2w5-3)KMaAo&_B6YXLp1T{~
zECaiGb5W!3Emkv-#Y;Fq7OTBwk_NfT9ptKn$z_ea&zR0@$Tek#>22`beE?)^2+u(i
zZSfmRViQ1io@xQvnR7{R1IR&J9YGE<%M`x>a&40W$hEV#aOZ%$A}Zizye1~WWA}lE
zod=A)>OuN=GQ}l8a(nqf-c)?c#0;|TQ)6bBp23pXgaa`TB&XVfjBMM&%`=1h%IX6f
zf*KXqGBGb>`l@EI#wWpJ_JM|(4tqIxv;`$DDH$Xv1-xfGe2Tek3p>vY_AA*3He6~@
zT+7J3jPa}3hS<mhX1R>fXP928ChVTnkQ>FcZ3fE~>jPy^8E$W3&T(X4(H^OJz-%o;
zv=5^f&jbGYU;mCTm;e9g^kw~BSO58#Jv+zmr*qu=**W{`Ahyii8P=Ol%HRL-=-sn#
z5ASwwe(aoSwN`(6{!{^f{!OdDKfC+)-~aS;KDTG>Zm=}_qcr2O^Gk^{o}4{B`&rLy
zd?<cUM&9dqf}eLn${*c?KHmKt&wd10v2E6D6l9J+AS3*NA+0)QS^q&ERfD7l+%uAy
z<POSAf0=A>TS&t21M3+>#{Pu9(_ai{Y)0dUqp6=i?LbGPenKB-1xqo=yqYkk%Vw|j
zGWzna^%hjHPnf$;)FzwTBjbSas@%R$S1KHCZ`l3BbH)K<ue`obS5_Q22})o$dn+m=
zEmm%9+?H8>a`K19bdmcqPge>yZObh`IXR#yJ>-GR)0Kry+X~B1PTtUzKINgz)0G#S
zww0EjoGj3se&vzO)0KwJ+bYXXPA+Ip7kMJ{bmhe6ZMEemCtqkz4|yu{bmhn9ZH?sz
zi%XdEj~xEp_~zf*2a!JyUew(q$p4;w)Bo*F=}+0+%|E)??2$jg_ke5ORC$@Z$D}`g
zs8gtJ(5?upD=1OUKk&Kd*PO*Rrgay#ebTEGs{7ExH5be^`wZbqLAcwXTrCLK><dKJ
z3c}q6<$6K5W?%Ix`tn}&R#ezekUc1Bqit`oYpwaChkqTuv4nqE^XI{fWA{4Rzcb$y
zjXAjaQ}g2JYGt{5{3-DTtmjYh_vO9gt(X_Mxp>O*WBj+i-Ba~H#6K@^D}>8-AHv-Z
z=9+;FJ_<58A^0(S?&SBA)E}~+Uvby+6o@+;%Do5SE`Hzi{Ds?nu)V5Kduze=&WGCj
z4ea2#hae8V3o_T?8yCdEZTB0VOP1QWS7!ZL@b+iyCzU@BB&R~SxxXRYtq|_pKM?L!
z2sig1g!>i3efuB66}1H$mCG3SLFO)#3@B25w?iUDyZ{uNIg0DRvDte79Gl%cz_IzA
z$sH7%ZjV5*nIl|x;Pt_6Zv5M{ZEvW3Y1rPJ+bf$BUbeya2BSXvZ7Ite>z*Xcp1^#M
zcbjS6hS;44%^tGtk;=)wlCV3dIoFA|!uZCu83%8k;yEXjcA)!UWUs`WwMQQ4D6;Jl
zpL4b1;LTIq=ZxYGJid}~@TM2{IiaWn(FbpSUi(1)|NfiO-x}+Gee}Qo_si+{xI1_4
z;@-#odG<WM?$^I|`#nF}{}*oGy?4*P{rm6k6?k*K{_jtH`~RQr?*ISxD1ZIG@1M`>
z)&F_9dw%@?uV3=@_x*g_fB(<z=k~SV>*N1_z54Cx{kT6LkFVcf`}g|v`8of;J(~aj
z`TvUQzu(HfTX%mr+ke0A`*!i_KkfVfWd5&@i+yXhzw-0r`ns==<?Da`;=lj*@%^}(
z-(U6P?d$%()&KweYrOwCv4z|9zb~x+_3m|kdHnxRb6fwPpTF<_)7>}!@BRNgFE764
z|6%?6f4{7cuitEc>)hF+*X{q@zI^h2T+RQ-fB!A1{r%Pd_nUh)r9Z!Y`&aURX8q59
zx8F~F{9FF%-1Yx|T{XY|=f{`jlaKD-_kaJtKcDT6KL4AnzqmeU^UMD?j{Q&8e^~$K
z)1TNc{WkMoY!074=hT0j=kmMv?~eSJe9?ZB%Z<8kCr_V`t1By-#koJ}X5AdtU)S^e
z^!xv0yPvyr^5wV5)8E$5`?$W=;=XOcf0?3%|MvaA^*8iO{@Hh*!~flny7&CV{;v=J
zDg8R0mQeK3-mUE0oYP;Aey`u5_FwkJw~G1)_vX(%V*LO7&XZ2}r2bf!=il4&<J<B2
z|G$3A$Nm5MZn^yapYNW}umAHhU;p3Z+48A-_S9%vuDkc++wS`RAD8d%d0$oeAl7{Q
zW9x69YwM5y{J(GJ<h`}G<STwXdiOLb=)TVNZeh#yub=$?S^w{FlHlyMfz!9|e!X0O
z-Tm12=j8M9?!TSB=Y0Nh)z|)9yZ*oT-xaa9>R10;_1ohAOCGc?xBvg=uD}2NKR*ud
zulwI_|NqNZ{rmra9Jc@a_2}KFk1w~+-u?OR&)eUo7uwyA-Ctkz`|11m_x`u-*T(I&
zsQ-R@dGXJD&>~mcJ@?k!-?Y1S&i=<K5&NHh`gZn_?m_#KpU=Loe(>V)?Ca^T5A*x)
zKE3+I-{0cz_+<9i*w*|yxjOg9t)G7{-=1B*-u!p9b=BX`pO0TZeEP-K&*tl!7k@h5
zCYSf!V}I?gU3JC(b}yg4{;>c0d*z?be4lIgxpwxCTJi1AcWc*nr<6&}nQ}8)Wu<cd
z#G1Z6u0fsmlq~nxR2Bby*WIo^|K2{^5-b0{{ZGIAh&DTZugGTV<C!x4Pa@=|=jZ9y
zSL=w@UY?lq#n)ZvlDX_j&-It@{(PE$e*cbb+xOL#emi+{`N4wA+RyI)c{SNTUTznw
zU-)~wzfUedeA-x^|7W+qpP${&H>n1nw|KvD&bPC){Has(UhC!Nv+DEfwsBtOD60E<
z^0Z>z`^KK;mnD0C*nPXHe)#3`_IvwI{eGMupZ@RS_VttOzm)CvEZbhbJ^lsPwPXKY
zPu|R2eueYXv*0IZXFuOB=_z?q!t=+^pWl8nSN`6-`Q3N+Pv82V)$RO!_wV7KvzPCF
zefR9$>D8MnFHdpqb-rIz_g%5-=hYv-u0Hks^6TVj|8MtuzvwQS^|0E^?8v+Oac%3%
zU+&yrA-Q*9@csBXHE+KDUj6s`;|E_~%HOE3{`o?hPjJp#^_$=9%k0kIZ_SrJ{3f2?
z@!xIFdRrFB`1(Cvm+$1*-Q4p3;&xk`mgmKLQhra5@9Jn-$+Gd*?8AHb_Wt}bGvChf
zQbvAVp48j3=e-`k`}9Yz>i)}$i*oPs4k=!^|KaCd@#ls|b}Tw&edx?_Z>4;W&2#rB
ze%@$)r>=DG?Yl9t@Ar$|xgYcDfqd-4n(t-*bzi;wl(_x>ougOJhOamOcIxcf`h!OI
z{1x6!z5G$`o<GN@{hx~1x2`Wu4)|H$ef{n0sQ$bE%0Ke`KDGS)kAnKYSN0#<yKQ!T
z-G?RF7ydn{txqp7sCfSK>D^xsre8e1zsK(1)4Q1^1;%o3I@iB%p7*aOI{qaOd%WeB
znYL#e!}r-pygl7~@mm3V{LM9Sg8xq6ef#&{>a*{jb?dJye{A{V&%?L>?(Mu;?^*Zr
z*Q;m${yaMSb!z?7Cl9ojv&Y|*sd)PB@Zp8^8UHUWtj`1yS^p>f-<~qDVyAqZ{JL-P
zUh?a{PuuY}xM5FO(SxlolVaxD&#||?7t^_W7Qg@X$IANi>fRjn{qpGSyT6y8FE97c
z&tJdpyTtC-r`c;C=9Smh|Ggk5yQk*Yt8Zry-;;@dJ$b(P@5+y>ukQByv)j-9=B?e&
zHWmK$I~O9qYIFFx_4}maW&N+c39a?`|K-E(-L><=cZ<&!{}l1>=#QAXzm2a?pS~V`
z|Noz_`~Q60oqv6OT+NQ{#)U=S9zFUU-&DS*Quf5h>E`h@Kfe_G{r2wbZu$CO-`D^D
z@yJ~N|Lx_sAI!i1e|vlR_VxGec+~gXTK@g=_TT)U@%;bS@_%TxI8{GW{d4h$d9T;!
z>3vUrQKSFSoPYmq|4oON>)$)}e((O>`}S4s+EJ;l?)C4?gPS*>zb?0Zb1wg$t?j!!
zxhK*G!>{Kr%3hRzD|UXoZSBRp>(2R^+pm3nf2e##{5|_S_uj70FUd_U+fn(wU~l#I
z`1Sj4#n#*HTRHbcw4`tRy|2;7_m+K{c-_zb)2(L*vVSkm|E9m^f5G2}yJC+@3qHF3
z`|$qCpZ)*$)W0;J9lZPAr?SfRHtTNAKR)|(?XU9Pvv2>c|37!`<;$)Q`uBcLi3)hT
zs^-aAv2S;O?q2;fYX6eV^>rI}SMU0DWq;A`-zScL(?7NRod0(AxSf0ID<4d)-npbb
ze%~H@%MV?(9~SGs&lmi@>Hnb(b7F3-eruoijX7|a{=OeiCX1&%cw50;`}tkB`R}Vg
z?S6gv#4FFc`PAP1CB@YrmY&ytVj2G-NuJN>;fdhuuYdo(uK)k_=hNqJ|9@evyZKwA
z8N+RzfAMBp<M;2bi@5P@l7IZQ|1t;9wY<49kM*VZq^Hq8qqg`2#b3Eu|M!$r;^OJ{
zLSI#Ss_I1-o{7uZe*J2rxLoS9&bS@Br`DJJ^qR6~u5o4HzjB*+{iij(%;9knX@<Y2
z>`jp0@_zSYZpW%$hpcQ%yPG**o&GidTR!jGMSPE$_k9c6{nc*I$LE1hpDaG;|Hl6K
zgZbMYJTBhx?NZ}|-?P6ccWw{AUEeeD_D)&(BU{5uW_;b5`tRh&r5_KQ*`JI1>|F5e
z(#u~<`{%TN%lh5_*Iw<na#}lon#JCd7tXf(zqa%J_qP4~wcT&J{3m{qX-D2(E$d#F
zru=_N;!pl<;kWB=%)CGERO;<p;m^K#$&|0>t)3sr9=AtF-gfVfkCP96dGukUxc%Q7
z-RkM`)uqCJR==Cs^?QZQg&#LoU-aA({{G+fxY_*s-^gd_u6L;3`nNr{@v@nU`Qr&w
z!WVH~wddlF>$NK@mMV%edK>zef4A%{jeF<fr(ND1ck;G3`@e(zPj1H9N*KCj%ue8Q
z%US;}`1=1%N22#F>)0HgvPIV}P4Vf;6+8{!sz3a=b+g|7@B8kl71J*Mi9FuD{r@NR
z;y+hURXwPEyYTdvb${(^_wTN$-B<nl(Yv$Kwce8-T#f$bzI^+R^tIon{WX32{=+xX
zJxA>Wc<()uU&)ql`S1OX=PM6d+kNL3;NO#8*u=jl{UgJ>1Jz>ZA2fYmqxY-vyUgk1
z{%^ibd;R~{)7|sye*EhH>l--d>Fhs`Pyg_}sGL~6{7$+0|LULnUd->kCq6gm`@XNn
z5Bm4Km;C?k*U9`3cIGeH-xuu9zF{rqeA3=>+jkwegMV9n!^*ekpL;s{-s{i#bwB^v
z@2md!?D+pV@7j{z-}J9Keou+NBiBSHefz(r@TLEn#Fzd%bZoCe{Ow=i2iyPdvic|e
zu66fmW__D`vK0?M{o1Df#(p!u*#1q{A5J~~XZ`K$ZH?EHog+_kCtmyHG-K<Y0)^M#
zW*V4Rs-F9$a>~l;>_y2wzr32b!@*MX&N8bTS+!q$*?lgi=F*|hqVrb0&^ftz!s+|5
z`*!Y|{@p)Qw{O0@McvP52e>!yng0L4*UCSKZ2mq~f6^*mZ@pvno72aa>wlNu@%PW?
zO#PeZ@7Mf2Zg2Z{|NcK8>i>WF9K50a&C|=L{r{b>uls#>zg$n%&3SucW9#ewJv{6D
zyEWl|{rh?Qtm>7mchvuU$AACtm!zH1)gK?eY;XO1_gC}m$?3J91b;vIvijuV>2D7{
z`G5c3cC+odDYxtF_cu-D-#%xTocjakZNZCIF7h~WXof!XlobCgJ@1J#d(<{PQMOz^
z`BeS>7wipgiyf2RU#&T#nWomolCVB*_eQDe@7x`2Ss%6-@ZWlUmidfLb%oxf%2`)C
z+u!Z5&kjjvWfXbXane@dmT0hF=<df~)7Cw@HmfsIV4CFSEoSG}95xhQwSHFVwV6}Z
z+j>6jdaZjlQhC-=%cU-xO`gx573ntl;EN=QQ(RuZA5Bg%wBTpYmp1J>c{IW=WvT2z
zi@%1uXQ;RBdi~br*CL_Qm$@HbwCdMCB<g?mjFv|9+^_DQ!kf*`uW>fk{<XNLdciTL
zOP|giX`9Vve!wJRj%)g5SE0YkCi4x}OG&N%skD>nq{;ftVuC(5S9`8_C@pyL*~0|8
zr3Uj|Hy4QbI_=&Rwm~d<!6c2^qIfa$R5AZ{ac0BREw9e`Tsb>&?g2L$-|mJK#l6`n
zhBfKG@2y;0Qn+=Vqpn`O;_8L-9_Ey6TwvS1xX`3ukN4GHQMH@5j(OJ0h?zfr_U`z*
z)%Uuj6aDJN)3W4hT4x6N*tsWHZd-I|(`=>oKT>x^7Uq4lnd_tOX|bbY_T5vLibOZL
z8aGZA+ciPgs#o_@$?^>mA8pKaSJX{8m6747tK6I0s}s_t*&;dD)yRL&{`n@W7^g;E
z(p_HoMXh$)+{oM)#arV)dgos({$idbedhPYCx4ynqR%gysQBRVW54y&pWA-2|8#uw
z?5B5QS3ACUi~afZ`}xz;?i2{~nq1o)pErHKnX^E+SId`^R$Y@S-!(7M+|ISNX!{ef
z>(gd22{~G3+5WEhy<?By?V>27*DF>tecfUae4e-1`9l8o^6lUE@7+=P<4bPbgYEwF
z^Y`<{$#hN<bJX@coanOdZrS$lpKgRie4PFE*p-sxD#QB=<S+aFGQ2-e{_8`=&&f8v
z#$9huXw8z#^$EMwt9#Px$41RaPy1~u+7FK(OA%GQy!NEljX7&tq@yQ?Zm^8xwBM$-
zIw5(JQ1_y3N?L&zp4Hr#w8+I%x>)JPJn`At;z@T;UAvQ!f1x+mG%s*cz52XZd%L**
z^Y;6?t#z1r?DLfS1qSk4_igI05wFp{AFmSk@bZPX^ZU5m>;GOqeD~Au`SbtXe|y~i
z)RO-q?^jm-_-dE>cdAA3>(}~j*L{CqKl5Svf(M1aKW_go&B1p~H}l*f2IF`4j^AE>
zzWn-r>t71@|NZ&$_w4lJ)|K9uqkLBzznvmsdV9;0`L|Nd`xMN1HuUaJ?Do%k9i($%
ze(X_C3oiC~w}r0u8co0DmArl1q{BsO=dwMX?$Vz5<NLN5dtV)&{x{I%OLcKK`_r%a
z+vnSPUhfiAiGAX>ch{|b;j2#gR+VZ!^RmymtQq=9t+s3XyUALGlkH-Ae|0`T{xoZP
zN~84GjMrx~gV&xswdxFe;;RSYPxtTVF7XomlYe5R*~E~w`#Kl#%@#{|?srgal6rrM
zb?UD5ird(3q}?bxofGev!@J?^hPP91?rXUrl`uQ8Iwq}}XQSx>v%}v~XXf%JWjExu
zy<Kf|Tkps<hTA;1ucvO4?O4mWO>$eK;0l(zW-ixVZVSX)FG#F0m%G5UelerkEd6~)
z^IuO|tgUUi%Sy$4>FmQh&BL|d`>t%L_2|<mDW5MBc;lU&<)RIDYl~bGcmICUaj5M3
zNx{~)?<OmA-M*{tF0$?S1eu9HZZYyc-u<y*8~@3RS^JLWXHQbrHn&>h_B8tN4&&AN
zKAiRZM#@~b=c>DjY_dMzt&vhbPb~1nI~(mq6Yf?9xhU@bJg38{?7603>l?Wg7nNOQ
z5{F;pS@pbiwA(T(@8j)RB`f6T#~nGj$7Z@3zpR)>>h|`+@)B7y-NWa)4QvaaY?)`^
z7?fn56dCyFgk!*j1umjyx=He1wzTOx`W1!ec=|m$QJ$-+{?YUJ{{qX#gELF3K`IVS
z6IQFAH^-x9ZJ)GSz2EU%-TTiz?O(-~QTpP8jjL3{s>91tZ|E`vi>zi{qv|suMAhN6
zGP|Q=Q<U%rFV{EC^R9hRJ+V?~!PAM(4Q)@hs5MOK+VHgH<a~8?q5F5)UzFC&K5akm
zXz*%g-9DKo{U_qX5-%%#bNFYnZ};^7R{PFAtq+~J-==7Sy;6N-t8e!W=AV~;yo>wy
z`iI%{dL28{z`9@E%J)l4jPCx7pWs_=;JPuYVa?HHt~YcSG<$YkWyxq+t9IeuzdJ?~
zH<<3dbMN0D5aZ~bd;esNCvGr3d*|Li8xZ5_oqPXcK#aS0?)|F)F`nMJ_iv8z#DdgY
zl4s`f?C1^Lw%OL;My}$mo0re$>fG7*Z2rnAYa7H97|*xdmPplp!WwbH_@SBGO|B|N
zu`fO#^@rjbT5W~%lBcXaAfC_&QTBy3;sr!m9i!MEpB=t|dC?d34=kF`x!v&8w<DZl
zf5BSYtv9?#Ka|_E>H5?oYPXI_RLA<|EXwWKc-{0Ugc||jUWIa#Al%YpYPXh2l)v$l
zKXSw6wnVb^tHhq|0$;4+#Cc|9{F4yhzgF60zmUgMOXb2R1{rY|5;DE6C0$nfmUv-~
zTLnMc+02&j351wQ7v^|W%CnvAobo-9SZ3yw?;veA<?IeDlFvuzO1LoR1jydb9+17*
zna3(Xmi4?{(QbIp>B8-H$Iqob-S@BY%!=>KH=Q0AtHvkOc7|I@#`UCEPShc}o*9>a
zysJAf=UDmo$4^c6?UvVD{_*bL49nj4@7Pag)|A_a`90qKdts5({aOi4b)$RDjYUe2
zZ6(w}%tSC#6~uG|GnGM1MKDtl#AGazdR!|ZuWq!BoomC4<5F@U!Hb1TkMHvL33I-$
z%bDX*@!k2c%c0%!lIlYD{vNQH_~G60qn$0~_Bwvbd)OC0ayeAC<}gRT-IccoXZ)}_
zbTmJ^?a1$s3+yen-{aNhue~0)_|e_<|39-IT_}A-aLPJR&RYB^V)j#xF0UJM`VAb#
zLF!tG+U19C>8O`R`OmnJ;r{SQm34)MrAfq!gUd{BY-y>@SSPZp`a*<e$@c{-*DdqT
zSn+<D=gx)8*!g%xvsPsCn&~FWOKG*flQRk7x@()UV)aY2{1xF>O(JBiOv09ITxFFL
zbxh7AT<PIm^9T@eb88D{?=`>Xqm9nZtx|7Zomn1o$j&4jq<0O-qLA>*swN@UykZaw
zRvXU`;{1If0A&5bpcn5Ponw8s7dr3tdiF6hvvG?>LB<LP=cyov-Zc-Ax;qy_Tq!Mi
z+m_{W=HQF9H-9bitbJ@;JL~J?e-=LfwQlU|cRR{D`OBKnGoQokJ(o4Fu;*{@zTB;1
zrL9+S&#L=ydH3h~Elp+bJ^p>(V`}|gJ@NI6)<4Ru5j@Ku*O_G6-i^6m8~5k@`|tn%
z{>+@XX?LWZ?NS~w|NZv0k#$u&Exi7htF80@@2k7mQ|Q>|qp2p@vRA`)*Y2NV{_y3u
z<G)|;&d+}*msh8CpE0!m<^Hd%Q|1LsJ?^)-TJ(5g{g1}t-C40wYqet^xy{{mYgh29
zBfeIpRX62b59|I~!gXhf_s13U&uo7&Q73;fU+!<Yl}zR@FI}5`X<1ZIu2SW!dxpxr
zKL7vdUD*Am>66~>(0T8(#W>d;d$MHWa_#-0afh}~_9#(()^@Whw)NymMa`78JVMcp
zCr>J9rtDp}?}^U7B@@2x`ZQ_the=M?Ua#^#x5%3-a=o^mCAS_(!L}zl+m=jN`(|nL
zjZNDwO?+`Hk!SJlmj-F?7acw%ku7{TYuC~I>`e=I%;7!So^xW4Vb5=&^?USH|Ja^r
z)5s~G#|x@;q(QZg8K~CD0o6J;1zO*n+pNfSb8fn`$foKEyl_*uvERG^HSn^9PukLp
ziiHoX=L-DQKheIy`tT0JO-!?=C8)d1m|$TQ<-UF6q@-xiPX`=5YgA8i<wPBNH+4&2
zUa@ND-x5{TPUh15w%`6&F7d_jsK4Hj$+>Mt*@q+xsrc2)w>66&zW5_*?pE175`D+Y
zzw5Ux{&@Fq_rr{u^8ZN|Qupufm*_io{nhTb4~`a??3?=Tw%)INlVf2Ww~ux|?C4pm
zu)SOSu%P5^?>`$1j#nAVOx!5?qU>Xmh0<f&3PYKRALaH)^qr{SkK=Jq*~6~irfjs$
z>7HI3k9+bSelV|{W5W!HzUQ1f&K}<b*0te!r^U7IhaD|@{f=#n<8fDcQ|i?BHOWFL
zasA|?HR6W_IjiT+NZu>a=W*lp6PedX3rr4Ge*j5aUrTH;mw)x`!O;SjLt#r+^9Vh^
z-OjOv_l#(C@4W4kx^L!4ou7PkiTv@)tB<~PopUDoW#`GG6@{Yip9>84&QSmSFGa%l
z-j=wP!bz&TYh!-w+0oVZ`E%Ivzk5u(mw$elV3oDhwRDd4v_%W|*?8!S$4@t0^E+JJ
zbB3(P`nSiQ?q7TP+RfnCYZ6x1Ncy)g{P_LzwMzSocI>bEFP3~T`yKmZ!rygqzKi|~
zSg-uLzVL_IEI${+NBUdKgXaeouen)zQ~vS4>d;3?B7XNczW48ad+*fyvwvd#sAra*
zmClq25iOHiYF?*S_tSvCJ8P|sUOrd0+QIo&VRj)iy&s&ob-?DtFNN2!CvMFX+GwpN
z6Dd7|JyJepFL&f^<MgucQ<bxsKP$X$UQ@1^UEOq5?g@&H_U-M5EH;@L@Ncp^Q6;`<
z+w|-k%*)_LFh`cZHH@#0n5&pA3^(KHblabYCT?x4obc80+U^Nk_u5>Tx9BmFGwx|U
zOq_P{2+URY0v{uD<9gpAbMI|>fWp202!;FS2?|&7Ih-qdVpn?p;x7iLGm_*|YA1Zv
zOUZq2{|T9!f8rZ5cmK*`hjkWr!kqorN|}FikJ>ZGYwVHlovvNeS={dFCj4o^tL9bZ
z3$wB(T|6wan6onAtK-$(0b5Ovzew!5*kZHd*Me8ED{jq7`eJZ6!$~frHsGsXNbXsK
zsu>9;iu|kWR#dUCvfHL6VS7e@)&%xY`H;Qbp||H}d|dGA@Rvu9SFOXg?(MwTyo!Hw
zH+$&&h^yb;EMgCpR}<%7b#LRUwI^Nqi@VjHI9_EB&3C<eH2;-#zop^l)x9gTUfJJ%
z5%O0{ReGPb$g`DUr{9?`(7R_4x54b5)W4G7kN<wXyWPB;-`xIWc$;|Wlz%IZ%gu~m
zyQZeA=&Y<qtN6KovB|vmTi49ka%=hGI;|c2YyTz4#kOTm-gV1C)lP5zwD>NsGkbla
z!))!gE4}rf=63m7_{;wHRkB|*FU5U-{b{-9@~vBUub;2>_NHw7t?EyA-+%pI@%ziq
zcfZQrm4AP0zkPq2e7^h@*`9mthh3vqX3jO!z4$LA^ZdI<7k=!H|GeMxUzpzQ&66Xg
z>c4-_H9L9#R8&>jEvLut|J^yO_A@#=e%H50;!^eBujiYcydU-S!q(}Q7k=!vZ`<to
z?^;dS^?4VTeJrn+PM`eet^d;-!P8Ctz4L#XGikr6`_--LD>MGwjX!r&rT%yD%GheV
zre_Xkmj{`@Y7}kSoxpLgj%S<w(pyKH3eGMM0SUJ4j*wXQbIU6?+YL;G;@n3}=SSUL
z!5*gZE@9!0XO~w?e?7o;OjbwYdQDg9V!4QiJDOV`&+^}#cZFG7p?pI_%;%NYdaDxZ
z&+u`dG@YM!cM1Eq<uTR~KI?u?dF^JqVR`e$88M$TulH6Z9DTwkHaXkw>#jilYqbLX
zFAjc7-t<@Z#;NV+JLGcg)o#nTudR931rgqQ<CJ(WM0kGx+L}FW5MkS!r^>w`!tyiL
z)=X*w2^T%>-VCzu$s0G@i0_Lk7qQ>&Kl#l(Q~SM$dew%%Gji&eZ2R;p10ww0Lpz^K
z4I*5%=~GYyL^zyH`~80vh;YEVPpjM^!rKpP<$qO%2&=97#AFT;7H`yg|7uZX!lB&L
z&86#8l^_b9FaE?P2T`CdtEC^U2o~PIcmJn2UWjn_t&J0M7UiC9G~NBQlP||!>9&6S
zF{VwO+jQBly=hdn+VHm`XMcbw_i?pb(_}Wp&+T+g7S4_4yRrD%4CdSX$G*M(umRK_
zKh0<@mdux9FLHbRjzdZtJGU9Kciq3D<-4)1=7PW2ci-ztxBgjLc3+*^Zy$4CXaC<H
zA3vI()Yo01$~EgsSi^!-QJGq`71DV}o3}q~`*Hv8mZjAn%96J~c(+{F(%|+4=G$3p
z(%GzsEoRQoJIuPXq$W7dr~Py8j|pO%CI5ZgHgEZ&1-y5gR~Kko?cy?j*s%4h!;j*s
z+W*1!y1Twk{dv7ScdPiq&!xfX-%GWbrv2GD`TDHtvRnCG+3(E{2-%c3bxq!~DL|*Q
zSbd?)Bwm+Tj;Jon7h0z5d;eEhHaG89vF)y%;yY2h>sVE<is$5tTd~@2emVr1b}qM_
z(P^u6$5un$=540S8_kDuo4y>pEH(2;Ti9LZ$#xl0kNa;htg8NTk=-|YilDSwDZkOL
z1)067NzDu2Ep(ALd3#s=#*Fl{&xG||-ukLZTs-TlT&>S3)|<6$QiWoce(S-GJUzLa
z*3KI$LN*&7;SSVRN@QG__Mg2!<74#2`Fnc2XTJ=8x@4QUU)q(xz_Satv9<88*|&^o
z-rL4vX$jHdFP3e|S079C?Y}Jj^Z)1XADjDqpWCj<v^rcE9J70Mqpgu=e;JeK?)i)p
zRcx<us_gZ<JVEZIwx?NU?)#GL>hH1Y7m`EY{{Qo>?PSZf2lq^mZk3kV#hB`>^VWy!
z^`nckVv47QO=dQqbm3M^@w9JkvTK^%Pc7uodFyK#@xSlNO7#s}%<m=awGNs;@4%&d
zG0mlKJz}evysMdcr!AOJ^@U|xS-sqyg^sT;1XtWDR!#VEGvv?4>dz1IxTDJF9lGrI
zYlDEx>$AZXw`wbOI4)X!7Mb_$fst5SMr|dRf3-T7SVz{q8xI<n@4e5$?P~fy^}~V7
z_d=Uk7th+RU-2OGz3jn5foHA73g&&AEpotf{Va3MiU*ngWl0}bJgeoDtGG3JZiLOM
zO6?~0d0{q(4h5cF&2MvI%OOFr-mH814;q(=_HIZB`7FfDZ?ZO_<>;bW=Asn~GLI_h
zh+N&%cYxXV_t_eWv%aoMzt1v7D6Fd7$l$m6(=UdOw6nLFZ7ytiEZ|lgoOq&6kU^|9
z>mKugg^_=@CH)E0VZG|S<K_BxOW~tUD@1pm*($lkwyS%q?V<<`o40-@M<&nM98mGD
z;8P0k`LwtC`L*raj^|WwUUtDculj7|yKQexpYOcA?fRVMS5r59J^4ebyD{Q#g_GBZ
z%IpjCb=n@jJUaUt|MhbJ)6dsdn((D3%J{Z-M=I^l{J6)I@A%~(hm-y#ifv=N{4vLh
zQ~mRjFHfh2pFi3*N90F|2w!x(Tz%ZD%a7|mU9+0kv+Q%&q)oe`z23C`VLQFUKD(3u
zAkVVJ-5*m5Z_VE$Dj#CFFMQH8MLYS+{r-z9@630<d{RkrPWwvj&krMZOww`tTWKL#
zlfl~fE4sFRiN&og&$KqX{@80E!2i9eME^~r$DcTfj`nKDUE*Q<*XyPky=!f(*dd<%
z&h_K$Q&-bYDt+7+IdNB>o^oJycdPiC)?&?1317;tpUZv1?5X)KM{09k%w~P%Om?lc
z%kNF)4V_=Gd0#-$->3U+c2|1n@B9BLL}B?e|M+$9^QWyfpPcymrvCQR@$%E{x4fGk
z|1NL-rFm!1etPF8Ga>zb-v0VMb$??2{9WI_eWm;M`FZ>A{M%IX>sR*V+{Q{vi8TkN
zq@SGeXgbrDsMX!^Ro(LzZ|g3aT@!SsaEI9Sf``}JkI(nobJp5?#<7Qwd@VS?2CvhZ
zsZ|v9s5|a;<=M`o=lxF~cdc@--|_e3^W)hU<>vjrIE#0knE1piznyIAo=(4Z?D>C-
zmnZwzM5Z6T9AUeR{c`uoKTCr5y4dXQ)o#lBI_b;BxLrpAFC>(Fx>Wcjt3=6eMY`-f
z{YM8cl-5=yg%#HnT&n&0DD`}$9<RjXjG{{~_ZAq;)<5?vT>Y-{^_~A-94QR>67Vee
zV~@AI(BgmXM=y3>-c=NP;lr-7!>_I0z4lxFw_=5!;F()}UWR&tORmKz{aCZpC7>`?
z$wL06!+weW*Q<;p>OHIfs?IH)zGnHRc_*usURUrON!Pv}7%09raj{;Mvq$Wfw#mEv
zH~)K(``>qkzHMdYpGQBYF5bD)IxYUsr=zPETXAmD4&NTX=at;mn7bR-^EEv<`daz;
zWcPbP(z`w@al~1#Upv9>-JXiCyB;rj_~6f{qk-3Jb9s}GKQ`I@)9l;F?!4cjcb|&h
zTdlv|D890?wdU^AD3y;TX0?lzX5{=<KUmnii0RbP+*3#AJ`)et2$l%uFn>P#b#qZ=
z^0l3I8q?Q5vFor``TWnLrpav9+~qURdMuOCdK@tQOS<^F%lex?A9j3VB`>p=qiUDz
ze($t**;czcRUbEgu9^2mWx4x0?xOXRFDG36nIhpE`@Ea!*T<Tttfg`?%lRXJ_OCm?
z<@Li|I?bNvt!00DPnchBHEHgCsa=_6R{B<-<V$bXyjyer&9tS<`(2bCEqQcclDKu{
z)z~|E6@?B974`GHoa63v9Lu>df9JaFbn{%h?m4~+`yb?dTlT(8se8pEF7?lErgd=7
z$vMkywOVgRTw9?G@8K=s6I__D{@5I|P`*EX@x>&A{@~r06H6*DT})rJvewDiPhR2L
z%(7(<zcecR6J1{He)(VLuWy@~ME~p0^_LevTKO}?_rGpzVTw|W%0s39CBHhw_E#F5
zxV+#?!ld|@7B6;evY!#kKX3P$^RdsKZ{GGgLEU<W@cLH@%kzJ%J@>@!%Dk1EJ@>A(
zERO3gi|d|d6<)n8*i!kA{E^ElZ*LvBINLmN&eelAYvyFBds&}!S3j&Vk-7KV%mv?k
zc7O9({_M<`q`2^as#WWjd<lsSe5tuxM^L5j(z8-SAM2%`4bBQx|5SFE!<}_b)O@kT
zEL+QKKMM-&!{+3yx4Kz4x93rL_vUXohV%FiU+J}wIdiphW)<sf2`h`J7(e&VCdD?A
zv3$oaFPUm5uCE==`YrUWxNYs!nK>&CKH0NUD*e~t({FOZB9BETi~LskyZdUUt+ef*
zTf1s@{4V<Y_|xlEjusMgc=G43+rK}$Zp}Q~y&fgLEXUVgzOCP<?WW%M<cCdF@xB@D
zk8hrQ^6=y3ud%OhUW||XDsy!C{<G?rCx6@{y@&VK`eT`f_4EI$=08|^B=Aqtq{^Zg
z;W)SEExcbZtJuw|_mJOoH+=2J-?vi4+72JhG!YcN8p+~*{CN7+)z1p;XQep5d6;TZ
zbXT}EQ07~Ew|UUI(&-+Vt@3liSNt)W>7V}cZ|U9Wk0leF*Gx8vi#_%*vTWj-6Du=(
zpKp$_y0$an=+19l#dBvBzq}Y&_2{l^g`)eE=Mz0T{4X6o-?#6dn(fy$m#=+~j?r5u
zde}76)~$KUKb^j1FW<|T%-!aFVD&nlu7*|bPjz*hzFA@~Icwv-H@!B$)#mB8t$$;D
zxuP|)Dk$RX?Y*;%o1d(B=A)FC`S+!x(3LqC+qC_c3vKkfE!+0#u<N|3_KUVCx?K*t
zQ1x-qQsaWk7$^71=8H|N(m%(mzW&6jov3x^bMVD2->%$TDe=5`&Y9WG6%RTBuN!#!
z_0?HR&pBCtW$LV%CIOdAA8G!ZUALuuazWfFv(x`pUVfGS?8e3qYt|lbx}tfoNN1O8
z>ZDgos(yu^pAr;t{iW!NMqyLQT``7!UX{GreleZu{jZPYXmRPzFPwP2RL!ree)BIY
zp|4X-V+t3YIke%D`j&<7-lwU{e7Vx8Wji(cicrY%tNyWJ;rFiOnH^B~_k0=K^QJ1~
z<Vmj&4*$;_i1+-EBjY!36{ElFuBII}+Vv?XHsx(@w5W75-TdcfQdHV<qvXFeCg*PY
zUa+{jZeCO%_op>~CW?vm9d${n+c7P%aMd}D=i#QS^flAtOtYr<zF}<Lbo|qrDH%^Q
zQ~FJ&a8F5p${+iA@3tMews%vfrQg|+c}pQJNBh9i%ZIkqO5Nmdew0#v^<?;JKepqm
z&y~q6jY`&<wo>9kMCrBA&R=idywAK9Q-4eDiq?I`%CLVI$`|O)PEpUE^r+``V-|m_
z<+)vF7Hzxi@9Q=%)P9RhiuSvi%U!>QDetri4Sv8i?^BNMqT8+Jn?EVcf1KkL`!}d;
zeU0DFj5&g9*QP8}JbGe921AjZg?0I#+~2o@RLmr1Cd;n<_<eq9Uwr2p)9WW4r$1V?
z<%NpeoG*_Hv(2PddZ!4*>{PLhib?9-`pWyrsn$1K*1wBllK59x>1}Kek)6Iq|G1QY
zX-r`nzrwYc;8hQ1WqUCfm|mZ9?19Ynki4q1rmuh8;4iE7{Be8w)5m|m#@0>bUS2cN
zw&vx&6Q(L_){E@ozBhe+vFPhv=R%iWE4^y?K=it)#&)YuuXmiQdSSh8!!y$_qDz;h
z^vk@?_FAi8d6j?l&5|qPwtFZ4>y1#jEM@yAYDMB*)0fWqcU6-bBDS}Ex~yxTxZLX}
zr*+^d|B^Mri*8RVXMLU-bN18*zcXy6>g&=>)!81JsOQ{XlJL&B@a)XhTl!^tW7jlW
zU3=6rd8@_46kWe78>X50<vr?|UHTyD?W(kJ-rZW)W7nV4D!rEG>$>aJh0xk{vx>uK
zZQeI0^yw;9LouTt1`@5EJN7LIwYs<7(oW*)9D|DK+#J8(39J3x)M|0@*XA<Y2MLB(
znp=)W9eCH(egEahvu)wG#mjGf4HvKMOD);6sH0%fo0L1+K4+%(XzMUdYV}#+DQ5IJ
zKSfclTuWeX+#J!<zn*<`{X4yyYxRPh(rfanzGrUPZ00-b<D<1y)My^x;>{j5=fppM
zpS&ojDRi1rT7k~ulL;k;JWrp5R0*q{Oe&D$yJxmbbmrPu+m^1I*Ew~+FHf&$|DviZ
zZ;p5Uns})TGDW`eOW2BiGadyq7EL^J*{`AFV$#7H;dQJ|CR=VtZ&)-@tn72KW!-t>
z^F@qy9~)wgx_>-L(s`eIOR?v&{O0b;OCB9JA8G7#v$=lc?A`vm;d@1A%}~`B_nZ=T
zIyKRxd->t+#u=s&i4kW`etX=l(jz|oZ=mCr%}py4E01nnb1gG{?#$?><FC)gFhyjC
z&0{s?2{+kxXj13`%gtWe6J9Q~jP};va8~=m9L8m$Hx`O!*i97A`sJ^uk$tVj`&#<N
zn<lx5{|)4JIR3tB^|<EOkw<&BU5PZ|e!7nPbb)JU(zl>1mr|@e4;^&9qth=CcKE}Z
zdc#?##UgW0X7_w%-xFwfR%e!K@X}NRmu{ieZDJu|&z~5blT6)mQfw}p*rTeY=BD{}
zHOfZ}{4e)sPUd;`C#!H?ncT8;x1#F_+fR4b|NT|?(>d2?mhbvAbA#)B58qJmnKWf$
z#odD^<+)y-zxMb1{9o(Y`TI{VpKO1tep?=Bz}>1k=HK^|^7_^8_1oUbt+Su^r|`?7
z@9D2+@BbUBd;0>1Iluh$`fYZ)_Gjz=&-rI5b4+$)hjR4ckLj-;f1Un%_3i%nf2E(?
z3u2ny$u7OnfBJR*$FI|uw*CM5@!RQ3Kdg22W^HqMdy@CLdi@Ezt{-Bzm40k4{XL;(
z=f3|He`jn8)(*L~^6dBR^7&KcxAQ+bHQ8P-KTl3<esj>vm+|)YOGRdjmOas0bNM9q
z>l>}I6S<|osIPOHRsH4H)9!6QmU||i)X@@urnTga)BCU8i?6${Z#HA!_sBbctNxNp
zi@qiJW@cyUWqd#K>#(xoiLFaJ59Y41IMsVAFZ1Mu&}j=lPcMs1of~{=mxo_$t7Kp2
z?ER-UKUUlR`s~|&#Rxu6xg@ruq4NSekCzo*JM0wmN+aD&YO9@H&8~fW?SCdOTXgX7
z<N0gj^W<Er1HCh}#rvkumy@eMzwQ!uu6DTV<u_b=Bf{e*ve{qWY-6oyd&T-`g<wb3
z+DZSP<!?1yl^33Kq4uuzt7%NjKEB@k`|0#QTW$Zl=PaxFRkS6e_Um2y|Euc$&%P1)
z?|u92-%s5a$Ly4k%=sQttn*x6>|=G{l3NS4{5tM?hxkrz$ePr4W%1F!kze{U1dpn8
zH^jI(Xg!XUda&RBedmniH^-NMdc54m`=ct?ywn5RMBe*krCG{+@4s{>BImHW1kdlJ
z0OxNlvu+<*TxXP@HK}@u&(msoiLZ$f!mm>#mj9iR;jw{p#aE4AudY<_{P?Qj^YiPB
z=*h1FBLZJ<^j+(2$l|#6xY>TWR?Yo##o0l&T-sT-Wh=gFxP`6wdgI~s#RgBWC+GRD
za!+(!<-Yg8m%lMR$6Si67VNw^yHKRloUdR_lI5e@N3>Rp9JZ>n&)J(3qi@P^T%+N~
zAtM%rI42Iq3yZh0I`H2UV~D*i=1^QYo#*Ho$@2vjCpQOQ4s+RU*}NjANH#EsDUO*h
zg4bg6Bh!T3v-t<u7}hgNGwfl@VfY}mf$=~#lE4M2f;^90@m9sPjN)Zm*w(y#!E3R=
z?7`^(oo-Qk>DwvU>__a*E_QwFmOqQt2E1;_K=}35MGrM{@+N71&asnQrT9Bz(~I-U
ze!o{GU6>sq+I;WSDv7hwQ75M<#HZg(`sC~r@mL{OU*YWPg>ottZ<(J=<rk<DDQUQ%
zypXv?j#pOUOUDZa#^|+7jI-BH+AF^C=Y-k^&7J&Le+%s8Kl^*a9{!`h1@`do{XL=j
zcDqB(io5MMZre?{^-b~WHvYBSYCE>RbzYmRUzEG<`Xs~5g3}sxde@~_iJ$y5Nm96R
z`pGE*5klsI6_!4njaQw#IMzH1bV}ITE5x)qaf(31+C?n~vV>Gyp1obj);N9j6pI6^
zo~3H4G3jJQT;8xG(e-ds+gF~`l3~XBqMDh4tPNYwoObZy*dS54)18xXnzH_D4aEmd
zIqOc`3F3*-eex@G*UXqBUgndvBVVQ!S!O41j{NO2>+8|mzBi|t@cVktn!GGE+5YLV
zO^*(lPhR+YmyhnNSjM%<yUuM%?a#j%Gjp5jU%}~-m*(f*+T>lYmp<*w^29XHdakr-
zUzW$GdDg#5o%UsU>@vG;Lc4Olmi|oLboF}b>h*`i;@j8m<BP79-S*2W=WFSYSIPI!
zL%0&PKh8{AYv<-SD{|A-<0lx5y|?|6kc>||87}{S-G-~~CpdFKB9HBEO)|VU8Kg$y
z{z;viuabM7r%cQF`t?WY=`i`^BkG$|R`(m)E!Mp$dgPj1bXCsNjjhM8%kD0_vFY*Z
zzU&j%V)}I(<>Hxh1i#E$?Xb^XU$Q4id(zPj{+l>Xq;`le4?1;W{R@jIldT%}q#Yx7
z=SCb|!g{Ceq3B72-P>6Ytc*D7oX;%Akl~;274}nu!Io#r+n48eZ?gT{8L(}+z4)nb
zUzR)H-1pP?P_BRdo9S;~`qv+}<C`q0me_eArnyZu``-2q{a3BHTlO?1r2G@@cqSUa
ze((i%h{A+rD-<VOTcJ3CZKdJ_vz3Yy(pD-?n6^@J!m*XC?;N9c99XEaSfQZy@uy=~
zd%LBto9X4o+}yE2(mCIZWnFg6wVuKQTr7It$4(@$GKs4tui3!#&~erTvx|0(EDUcI
zLl@ODF*2C?Ztz!lvyhGP8)u8{6_EpWjT_pf7+3ly+$j9!BK@o&+)2@7`np8VS6(7z
zTNqis?(EoE<*9WrK|+xCSnu}4uIqo~b=eLdyS-}5!542Iy_u3>EN3R~dMa<7k*I&_
zwI69G_v~CY_gP8mv@^3$2hEH<8UEdLuib)s&OiBTAKCK!_#Uu-(d26W;^KR@XU<lB
zH!xp*_i#fI|55keV}VL+y`E~9Rg`9_JUS-qE7a8Z??LqE+~+@cYk5B2|C3j1P4dT`
zrso>`Sep$O1s}~=H!X_i*bG0>=6T+shA)1Gh&Im)4mEsH87kU5FFMpvqJJY7+vCWz
zWP@X6S`t0yyhIN(^YaINUr@sD^nF1wztQ&vMf^(N7Ze^d@Mk^Te8g5`j^U-?qaPFk
zjz##39&UD#Tx=W4Bd>Hcq^e4A`QJF7BrfL5Hx}4i@E>$rZLr~2fJ8*C2G1HhkHZqC
z3^T;nOtcVA5b--8ttGG_N`NE6l!Il1+_L8F8k~%c8)qE7Y#A|Ah^g4cDWPxAY_$bz
zSeU|unHX1dG&Wpq{$s`ZtgYq1p9umpl*K(e(rSd5gj-t<tO|BYxT>i*D|~sTmlSK+
zl-i}2(mM7ZI>4r2;`Z5V#ZeH0ZOXSS9*wtGB?4}(He9eJJlTOaG}%EnG}*y7H2ZG*
zF`Eoo>4pFaxh3x$U&^(-b9^qB^3L(8oXb1M$2S;SuBr1qbbNS&q2<^Ig@7Cer{szW
z8fFX&4Qo0?f>*XPa`ZN4o;l3Wa_qpX!w`yDwn2blhWHDHBce78ih>)W8rT(7m?HQ;
zFtjush<Ly(z{OO|BHys12_zgQ{DGmx<-jXO`Gx?28S+0ETK>$@o$=9=!$(AjX|*3`
zW9aghjJUbWG&30%8Q7@mI%~hlkbb^uU);&3n|j2b+z{w7e;T4N;rBX45T14ayA{W=
z+a+289`n{KPB4jgR*2l!<}j&-x6x+mmIH;EhH=M&8$TRi61RA4Yiq{xxYbsaBj!O*
z_>T~Uf=1)GSHX=R6bfR*d%ph#2{=2ymtqpPFiBXVSkUOqYzpT1ELODPxO3R|C@UZD
z=M0XR2N$+XXlh7nHDS>!$nf)Ue!$e8)&k-jJKdGTk>TYD5>aagiR>{etbF|H*wNnX
z+s#`(t~xUHt>X;?CcW%qrzdL($howx?)ng?%Fbe;*UxwQvfEQ$>vR9S4%^H;zWhe8
ztC9oL1da=Tr*m9*JDuZ#vZIoN&?Jrt9V$%TZat32%r`G)tuLOo<yth?4m)XyH!?Sl
zWW*J3m3X6b<H!RxbK&OO%Y1qAR+|~_czf%}gKas&&9}Gt^5nfX+xpHqS#Ha@bM3r5
z*pmIXfaxp!WeznTx~ZI}*2dnr>G&NV9)6+J{#`RA>|DB5ibPANCM8H6zUDSlBBC}S
zd$AAC8at(P)<rrDJ_`k(>spF2l<7CrrSLV}WlgCJZ)~{Av}w<32Zq;-k@r#^5_A?k
zjb&qb#<69Ox1+-8-CQhd)FwQQWn~KEzwk+qndx)$jy<PMRCz@$PF*|wL-Ai#=NA5+
zXHx^Z8%uwgvQ5d#;?cNzMIvC;O2Y*j>kJn-tTSBjy!TkctX0=`@%L6<u)6j#9BZnM
zSRVgcxc$R|f;E@d8`^M)y#A8S!!LBy>aWz{b`Qg;RWH6YOD_^>YxlF?p?K=Zfmer}
zm&g0mBq_OC|7Bv>Et|1iex}Vi#tpj}%6~1i1v!_uV7dJ5%ODSZ@U!2x{B*+snMUis
z7v`-4<=!2a``^AaQZTUpF}LpBFNSk!Dv9kmPD0<RI>m!xt9qxicRVwVV`t<w$ly>}
zeO16CXtm;mIbqHUH=EiVKC$vP+FUhZ`DAl}>AQk%%!3OXnwk!L?L93WZmyRXb9={@
z!qmry+T4V<XeF}5T)Pm^)OH}1lUF5!BWA`0gQm6*3cen*6XHeRu3BUpx@B?Kx8TgX
zA&2|+pNO30++EGhvf|Z(qkCDIR{x4PY5n%}ZnOB0tZ}ARXTMt>XPESXX>sM*t4R!*
z6^#e^Ia%54)kGxzEC@*WAm7Hy_P;SA;lu5+#)J8HTd&n-oN2z+*kW`1gF-34*LQ^y
zeyi^a#r#^|6^i(!*o{6r&9`V_Z)HAN+4#_LfkRbXLd67)2@Av_DQNC<Z3Bbeg`aC!
z*}~*s*u*zBUS+>heu-g*)53d`*$%v8y;6UP;YRF%XFrWt)`)GW+{eSXhCOGVe*1xl
zhR-#YEYCPB&Z{ec#aDCY%+q&1@QQKH^V5n3_A@@$9GYSh@<1b6-?RD0>!)^h2D8GQ
zblI-Gybeh;A;HNGE0-N>ShV9<1Jll94fD*Un6p+zy|y!X=J+~dd3<8Ugk9`Qs|9wk
z&#j)YlYMHnz)tqw<hgZg!C7LX-+oY$2u?#D;4}oP2VO0_%&-4WR6@?`?}tbCn3z}d
z^UtlzITXU2z~yTF_r{!+YzOjKZoOm||DMJXp?hF%T|wb`mj>&<FCN7)HkSXocyuqw
zOLw3OTo25xD=Ez9Yy5fe{g>kF>>tFwvpslpPa%3)Tgdb{o+pfpDtoUxIxzD{F`djZ
zWtns(i$i7kRRND}3lt~RI65o%oANf=@NYR_>%lE<VX|fcX1ieFMV7T*5{%PLO{OeR
zEQoYs=9FR*S2O8ZplIVEd`ay_xa;m!8UCVgS1kG)5@mjMgR|Iowhxc)@i4BkDk#iv
zJFv>m?NgndHIvwPuk5`ly{|Vn9`rlp+w;scy!)WvVPBp+4+Fy;h6j&4U}F_-{%v4l
zxP#vXz4Y-rfxYx8OUru&&ZlKXc}W!l8rHVvhBh8k<}R2GNjkHi8ygz*CVs9_V+)hN
zVKcw8@hba;@>7fktxS8D%P{N~clfW#e&8LG(fM$Ngslx{K8tcB*eZOkVPiSQH0!ys
zf`R*jN;}p@ka&cz!si-r!DBO@vGM1@S<i!)Em_FqezVF`>PWo)_m7Pi_XuSfZt&ZG
ztRcv^mvQMVDP}KIQ#O&Krfec7OxeEdxhN43d^PI(LPP$j<5qvU4mV%1)wtVy!S=<S
z<}<b{?lhmU&5(KhCA;>KfSgEQ=`YhZ_Qs^Sb-fQA7ey?OPyQjGxh#kuoEi>&xB!a%
zSrQSo6)(Oh3oo-|SQfD5a{rl`&lqm>I#~a`@aP^B<7(C&m-%(yUF9fPE+2howF0Q%
z*>N3O@PHL??6};o`_2?m@H~o36z5;8vXg`TZ{!A#+a`DCh2(8r_a({JWmnbKdF&i6
z=2A=-d)qSB&9>^$yX1O7z$0&+;)E+P&I&VkwmB5Z@iwN|Mm^ZEW!H`ayX7JtFui}o
z^!@=Vst~YP*UhK*flsd>V@C|A=3}b_)qEKRt{_fZm`MwJWA%=eI}R*dD9PK%Ei>y>
zpuh#6zP1Cbd}kknYf~K%=icW6_ku>}%?{uyw|=q0hg(OU_O6x|H(!^_f9cq2q3~_&
ziHA9Mtf}6ytO`_fu3|sQCFAYhe(B=Gk`e`3S@-3<i>1q^oON%DJR|v}=)$zybqmB4
z1Q)O=2r7K^WbvrGptg>QagxH8&eaYHCnuPCNIT5l5tP06Ys35EKE^MMT;LSU_=Sm!
zr>;QX;79JR0}r;pVrss>j+>|Mw4T9_+}#HrY=7qjDJvZ66|k3mZNIp{5zg0RAtoWm
z!qsCbCLyQ7)ng?FNx`w_LlY9DoUa#)N<`Eyc)gR0XN}zgyA^B)M7X{>nKG2=FQ{9=
zcHkY;wt3pl2eKHW&rels_}Z}c`6)#Mu?JP_WSELsV$Q27Z1@@@$rL7hqiP)w<7)N-
z+i*~U5p!PE$J3d$Z`0Rn%pLpVuDxYmT&a2`DPe9MBKd;r(5`GAjS1O2FDe%sE?Bk-
z(jw?9{UzGQzOp)C7yH8M3p?3oRtM~4pICjt;@ZpWzm6!{Xn@i(4?h#Q(rk7CmxYQ!
zK1)Hxo|<0c!-bdm^B-v$Z20xz!pq}o^GqR0_^fR<!yC5+bL$F(!`m9JGTnK}ZeHlg
zvg2}p-XkG_iskZmk4$w==mV9CAO)c;cV4=i7d{o3A^*qEzPy$pUpSm0@6n-s9~9nv
zjdFC^RTVf5CE0Q$2#51EK6xg^<aySVWzx)S4wdH@1w5`TX6^IlzHwx#b45ZUx6F+r
zQym#*?<nGkd2m2&oeYz>#fDDpc5uTF$~TEw2Ws&(+klhbjzu7jv$oWs<^#5OLSi0V
zxX=Siu)a?<I5O1SK?(a=Avl$bfjI1Dg->;eO1zD}F_tatfe%+PnH91=P}588pT@5#
zB;(<J{9@+e7j3fX!r>1xg~J*0ADt3dz{ZgG=#+rM&&Jt1j95IH9;mJ3X;gK-rjRRr
z>&Voo*K65p<`?rU;15VJS-&%iXMuP?!iVPS#)J8nS=si7ic9<{i%s|t4XUtjv$E|k
z6^E2m?7x^Tu|~7OmGBqfqBr5l#seP|0us)EsKA6P8xMQ{#q*1*bxh2cC3ekQec-?=
zW^gk8%J|h06wfQfS21p=X8h`G%1|Z_NtxW>l(~jI2b3~5GF&fyDlkL&L6sh3<J#w^
z1UAe%aIH9%Bf_@f_0A%WGyKo0^b)<Kv<jxI-7e?w=j*0Cd5N>y3&og0%`|v}4^(#t
z#w0s5#w0tOm+oaW4P9F*FZFpr>6**y4QxE_Hea&kxZ8Zr_Qaj$Q??y<nvZSt+Yjl=
zfQs7+0S!<qKu)C#R1)(~Ow#&#;bpsdAtw+2+`0<k@W#fg?d^W{W*^ru8niB&TbJ`L
zk~zVg>Ft+hQ0T7_d*ElkqtjanR67e#Z#ZE6_XQ{+6|=m9Do}dhXTPgcyZykQ2j#zZ
zzGkkNz2nvcwRL7YI#<tKE9$ajwRmb}gG0$;MS;5+9nW^HY-TVke2S~QZ2%_|u^k5*
zePbk9Kxy>=D__o|Q;G$R%%Eh<&vd+$5yE#q{1lvIPb>x{*=B7pXUif)kL4`5j1B2)
zYDg;rCs{dAl5I}|r{4tO@N=O44mY^J^Vyt>X}xdEy&by>3m@P5rjWZwt1z`%z^td?
zwA2kyUJ?*pr<EWaE`8_7(l-}BDY`Z>zkFd~l`C;~!{eMsS=G0WTx~NiOyvk*W&lwW
z{v7a)kz`VF1m*n$lN7TjY-7%S<hAzeHRgTiE!i%xYZ%PB9;3^4fm_4i$HBb^9&CTf
z)O>#xH&5MeJ%b;*pyKu|Q}g{@#XJcrOCLORe2u5jE#l!9`o5rGH0@F;?OHuhTgSJf
zbM@rmmUh{(rrlQ+w~kzG1SMJ=X*Y91ncR2whfN#mv+d+%I$!sT1txDyGh;lw%y%=V
z#GNI)6K8K(Sg`xW@y}NlRyu8w;A;!%R#A&OVq(s;Nt*FyZ^IimhazQ5Ua{%R#ZM-c
ziO&D3@761SC;afv9baF+-}7-dWSZdG=HpNQeqEmW`oB(|T+rr(i@#p&uKySM_uuyQ
zm(2b{CJVwpZZ29my}5DrvV9xhU!SlgyWs9u?Kx6>kB=^xuk$YaqPbpFq~FzsLyvNI
zOl#iJa^OL(hvt4y)qvLx5v=9*Yf}~U6a{wt?hLDIwh9oRXfYuxQ9}Lm<x-t5u4f}X
zn3=j?7VPV5-m}EA`Ad=0&%()WEA_L^IZ6pc#B?qHnZ@^M(lee*r#+vZzcxMJHum~d
zd*vzhqU%Bz?O9U!^W{_C)AquQ-cMXtOGt>DKAs>Q5OE|?Xjx<CQn5AMoH<5|+j@=}
zW!4#6U&=RFu{<UIW>4_VE<dg4{TDjKb2mC4op8{v++@~9<*!~^Z6#&lQ+A!!Q`;Qe
z##1(B*W#})wAxb2ZWhf|dy?T@onvif>a;iY`lOW~vvk7_+xyOV>AmvE63MyZ5A%xV
zE1q%Zc*=RGw!vV&e3ij^PUA~E=BK(ncil1j&T^^G3*9Q070PEWQNN`V$Q=E(Ws~--
zivi*0`ZZ>~;m>M*s`hq^PdC@MkG%d@b6w^chq(I_oQ%4gj#_vv>&_7EzLa{lLqaV@
z?{ZqqvJ$;uqv=!qXIx4R(es_Jb1G?;i|@OM`+5$!&YG~(WQY4NBQ5b;wnAdOAi-0u
zCH+E{FLq4xE|YBRHc~8(tnc4+dPR)KcaNww``vG*hUjgnp2Fh0$~D$CQAsDm<yLRU
ziPau1w?dSBO|<ouE-Jh-%?y!#a!TR4EA!k_-5ENwvc4!;+HO*}ef4t3y1Zknvra0`
zXjxovVNPP1W%DAV+!KbgcMB>P{Oy;Qk6yceANQ{Na(|7j1J2y9xhs)UxFw@@>feud
zFWQHnXH4CE)Uvg~E<W#;k!^fO<?1;l4r;#h7n$eoTyk6OrP)lA+R%o~)2eq3J<Crl
zdC4v46Rr1ho#!rZwYxQMn@>;k-jzP-U7+XX>!DK1Von`bdz!43`s<bR;VIrfmwNtG
zooZCuJ2~;x(m$t`{OR(Vxo^cOgQr1txj}WlOMT*xrp_qRWMAqaF+o{TfTPhOg0JO?
z2M3E&oeYmxqk)3ElY+pf#|Z&kEsVB8pFBT9n3h6JjT1!K{nx**pL8uV?e?|K+_Iio
zchbr#n`X-@sP42>p7(;Mc!AZY67%xLOBagyY&fN!b#O<{J|DZl<o6tA{|RlDhg%;;
zoY=VdsfA2%tA)&SA(=kUN8aAgY!@t5Jbg7LOEa|V#3i9hT^FfOE7B%;tqeLcW!i~s
z&Px;AO}XVXL%p7Oct6pMlPX%VZ*mmB(Z>DC-G5^hzm=P8-2eEEp`K3UJ+Y#C_sPGl
z&*eQkG|Ame{Ezjl2lorV`HD}o*|hV?{fjF9`!+l8-tc7N*-uNR=%{)MxqjN!a%z&h
znY4z-$)Gk)mx+7ME!gyA;@LKipiNU4nF3YTORvzWOxb*}af(iAhJ(n-*Z(xV<!<Ig
zD5!c%iU_zGZRW~6sXUvPV@ZnUVa7!sX>p3Wl_{SWG6;%x81{UWYCJT_^Eyw`5shON
zsg8*!mt?mX20gdeo$|4&1ti0fvLtW6#uV9;OnEA&cmHY9Gn{4^_d6iM=%v&_9R)Yz
zW7=w5-fFSRb6Ag59IKe?3NnFZOM}EkrZN}q9fG<BPEig$nP)6*Q%^3*X4%>xadpP#
z%2Sivx97TSH8Wgg`26D()yeAwuiiSc;@F&n!P9(pr9JPFxO&5}SNifTH=k_bWGU+<
zh00O4J2G;UT$0&M@@%rDKd$lZNq<vttT!!JdDhm>i#@Vuc5Gaedt{TD;k1p;lID}P
z_Ig}Xb2BPaczkT*Ho@b!j#wPyOTMFV&2UjfyVTJgDLW0<Bp=zpXV|vUS;DwUb!lW@
zxu@f{mnZU*c>by#*%*H=dKb6%yu-&H<U7gyeY!_z&xVvsx<)-M7XMCH{;x<pxg`3D
z1ZN@3jL(}sADZO({obYjkLF!wdUw`r!;a<Knx?Ssmi35U_c<-vBU3oqIm%?Wtw*$3
z?qc61TRPV&>CU>Vw?udLwu@##w~kz!D0Vha{?as$Y8hYG+b=qgP5kGVDfaT|CdVcJ
zbMJ__6!vVtmTkN%Kj>FeLh!}YlU`I^PvdEFdeW2-TzPuZi&NJ?ymL(n!HTCRy^sR&
z7IABGn7y^@nj{g=eIbpfY0+&B4zssLrzX9KEzCWpps}l~DdBS7BAw2Af5FPDLDEtn
z={&G>OH;z-cMEhn@0|rpOM|4DK+@SD>E};b4j-Fbv`HsU=jEp)PdOiri!C1+xpI#!
zoY6Y@*yQ|8I&n5HH$Cc{Q#@HjQ?T_TBQIEL%CX5gi*$~$TWyhSPZA4}@?UduQ$^s?
z!(CcMcD_MNj))#(cLPgBNck@~xv65}(!*UkMfZGymK+f~#vTNgijnf4a&l9}#ifV4
z^or_y0&;9D)lNThozADd>x8AD=R~1ciTL`9X);}v>8(Ps6594#L3YJT`PYJUweGtS
z9CT)p_hU}|K(XYh%gr7KfOwgDkz)G0E{K<Tbw!qB+U!(4{m51PSCOBmVYgoI@+~Qm
zdtNxjAJNoIySVhD%QT&C@z@vM=Bh_^cA3oEH!1bwBJSFQ%NA%nU(0gz*yONHI&mcn
z^)F8m+5F;C#VW69N4xdD9Gy8SNi5cC%8Nr0lUJU#5cz!2z^f#2&EYF)GF_1+F9Q~F
zC%;_^aZI~Vti)?wh^xUGl0h0azqqu}Mf}(<FHk_bPUlnIWpFJh%b4$|&aM)Ti>eP?
zr#Fbk?usmV8MKHy`Ro#iQPV+2sX&a{1+rTjYSdB}@ncmUAfx=Z1uWv$-?1Ud+q_#h
z)+^^>t5{gd%e0A0y*qXG95~daeOG5)iDqG|cvwW>(%G(4^;B1VXyVddR<e1<rKLwi
z;ye;vr^JZ`R!!+R#I3QW;?n6yp8Z1p6%SiPeXAl(UQS%Z*{z^G?aQW!ON);P#c3>b
zpY-SG>AySdWsd#aSMuBC;GTm;BB#UF`flVii(iox{G=zz%HY7Ppx2Q(%caaGaVZ|-
zEl*hBck)<@_0=7TH(M-}m-6vk(Y(o!yIjir7?+}3*P{atb0@u=|2E`t$Ofm5iPtO)
z0+y$o%CNp_QM*PUX^9g^`OLIiex`nw+AR_<Co?mbdM#VFEx7mc6)r`$Q%}L#*SrmR
zd}W(c$HZlpAnjZ^)>kcL*9jyoDFbQW>UQ$ms-I0uxm5WrS(6oZKbmH}G9g`b&c{4<
zwl~v^*JkW9IJNAEq;h$}fjmp$?q}UAwWipli1j#r>xw>iWzkQjHC(FvJ6V$x_C1<r
zyfb58#%iaN&SeKB&aB_@)JK1o{+Cq&pC-f`s4-~eSqk?&>pl$9F2Oi2afNA$==K|y
zZ0UIi8yR;$^)Z^I@3cDL(}Yw5HT9hBSE5XBuYJaS9i&>ahqJdU`kc<<pGn)fRQV&>
zl7*H$nr3`DW1qvhWlt1O9w_G7+O_VHi1qOg6OtZCwndeP7k14}tne`S@W*NGmDLtU
z&*|GN5w9p)c<o#0oTPMdxk=nM+XGfJYWr<0=H_3?Ixlj?*Jjb>H)giBA7MJLeWmMg
zSMZxXhn%At(?zp-7rhPn%-U_HEbqzsZi?~pjD1Hgrae(y+F;amx!YpqX@C33$%&s_
z9*X3e`ACH?JNzW@TFs24PELix4%(}Y6qnt3q~Q>FNM%AILmuz1=FbMz@vcu<!kI7a
zSj1R4WhvuPq3W1)iHy`xlLdDkWjF*LlDi?v_Ga4M%>j9ZRbpL2*OH8RZs_jLUwG%y
z7hMt6HAmAV8lo=-*ll{7US{&d>{>=d=E{o`uKEOLC47%pbl4i4Ie(?`oMW0R63n9&
z6VBaOYgF2HStVF2B0QccVciW~!_wBvJi%%a>|k!~?<=By$L&&^N?)roJnOo<*gy7R
z$@5^fi1av+>c2m(i2A96q#uH%t3lFtgViFA$AYA5zg-daYqw2pdRi~UP<-^=%H`_{
zcD>XT)_FdeVTSh9qpV6^Mag!rcw|1tD$bYu{BQ!l>z_c2!qQ`x4&QmBXS#Mt`AfsF
zI`tcgy#a~|q9L9iTCC^n);*EH8>rau?uO>Pg7(ReIgKKMLpT;#m(5bY^YBS!6VEjX
zQKm=dN<LgOwNvZcd^<TSI(NcL$GC10o`bX3DICaJW#;uzXmu!;-Gkn6fd=o*6<Y3Y
zN0&RleSF7SKS#SfPA27U<w=3+s!Wazv$V?Nb{*OIc@n=`8gJvS6#Gd_z2~HFdeYn(
z>CB+FclNXVC)@anm(H0LHf4@nGH2w5!;`pL8$ttIj~<fk>tK~!6RE{=K{oo}A=$nL
zR>?J<AfEL~fp-OyxE$HC`?wej)I0wvs>i&!pww4<d+~;~CLV<ot}3ZI`y7^HTC>b+
z@f5wnsHIPuUq(1D(7VYSyz5Bj%t`#qQh5)Szx48Rvi=r)O4!HLJ39L8Ck6MjT}s>L
z8y#oJK6Pz#QP;wBUyfbBE!kd8S(@=w#Q9>E07%kd?k1+bqAtNg6UB^UO2-}MZd#^0
zCAg=P+m~b3?h}Rq%hz!7JQYdiau#k%Gc4k{qM5DbY<YCXnF}ooe)h;Pm!6t+CBV;c
znW>3lMw&8MyZMyh9!@@Aj#r#dB~}Dqb7?Q?GQ7Hw({X1?U!zs3f2GEHi^+1cCbiFD
zy5+y}Zjrj^n>9?g{bwd0$g{l6b*|3Kl@rPn<~~>F<$KaOjq&aBD|wc|P;MTCI~mF?
zgK#fHxpfe(Fb_m;o8SY<w!QO%b{{=wxZ&><OHcuI^1++sSEkscNM5M(dOB_I{Ggpj
zZ~Cv)tUO_~Ky~UZ-SlY(Vcer|u12MY(Fd8s_xxARO?oaN7sO+8c*FPLtmQW(+uB)}
z&+EVWJLQ&US=~d$y$3dPSKBWw>zW%|;i328&LM~vF}Waao6Qg{&@uy}CGMf(+5?-p
zs_mB+b#0y>WcX=f$OAviVo*RFJ>l%dm?~2GTk~q?A<bJkGm7n(TAiB3|9QiFqvPO`
z;@Ca^m70k{2fhc#t>lfnde!U|OE`0u_UyHcTc`FeCa<8FSZx1PwA%h@XsP{E(R}-*
z3)ss3i!y~+PyKfCw!h{|SQ#;C`~0AQgS&o#a&cbgp1)I?IIkU?&M-r}?Ebv%^Mecy
z?)nOndUx^jw_q-K;ZSj}&g&q{>qFiQXGC{@KX=<-b4G$}IcLMpr0+K?e`~S|>--0m
z17-em!DbZMaW?D>ii|mM$6s^D14a4LW1^pC8p`wi3^*bleL!aJM!{<Pr3P!4lqYpd
zKab-si%<^Xh+qvBvU$k&JdfKb!Wmo)bb*S2iYA_GBBD$$`sP04EVrnfr_gNb*4nV+
z@jZXd{>`@+C)+QzIgvf_L)|GJrZvm57N@*h9#V5ay8qqsJ*#f|YxWnv-;)hevg`8?
zh>}xtpM#Vb7#{wuIo11{^32`ygFYTS!t;Ll9--(1GM-1RztwpqMg?xV@#vV~ri6A?
zQ7*>S3%a^mtz`tcjUqOKT(+&L)mny;+bCi(h*uV*c;}&tXcNyh8BwMOerM~vD(Bpm
zi~X(n)G@64$oJqhfdtb~Db;fOrH`6lO5F2b8M8@R4b01wyz5^nwey*h-_Bsc<x^*N
z1YdJ$S-^VMIfG$IoX$%w_ZPdS+DwRE!>HhXs!6o(!d0ybh0pw_<cb!{IJQWC`JtGh
zPz>hUd{(%#z~6>L>cpPrP3?Cy&RcPqznIL|#Aft-!5c;MQ^tIUcz?AtFK9etu2FrW
z_ft-DL9^XWg$#vaUXW=vmqFT1IHWxCU2Zz(O-Yw*k^bVz=E!{V!4%skZKj76{v`Mq
za3~dMu*(*<6vgSdJ6j5!d~7f?^tjQ}#I$W{K5uJ$Wge&GOp+~`Z^{(rSawbAZsMJ6
zPqtmRr5fM**}OUbyU%>?iN|}S^?cV#>-8Jv?O4RV_o+(zfmbJXJw2uPOZR%tgz9<D
z4SZ9D%bp6@riSM%*gpG-zyjx|S7I$){O_4ctJI%YbZ9^2xu>XO-mz>m54HIq)t4)u
z3fL~Zo-<*NT|0xUmio6-id9+bZz|lZ<zuu8@%uQ{`HM>YX2(x|WSB};%z2~T{^I4n
zwC0pQmMkv<EZ>InT@<cA%Xac_F~<eP)yxZQl1dm&<ZZ$o;^G#?7O8RH$ziN2_T+2a
z^~6hDV!du)&4TUIo(Qb)Uf0t2@s!Y6_VW@G#HVFUkI`g)T&g;Yf1a^|zV=1Eos-y(
zt@bjJx5;*h3t1Ffw3N5!`jia2ihB)vmbmPG;w2-oUgKiThck)|#_X^Es@zh|d&jVM
zu1dQ@Y>_H|Px#~vyNYiOduF)oOxZi#W#^F!-Ogvt>HH^J7L=WwYHJYZx#;JEo6JV0
zD`JaM`FpNU)Ud1g#PFQ&+HQ|6&UfxG`pZ5zbFhlPv#evb<%3S<Ipz`X6)y4>erB`D
zZP?8A`mgdW#k^|`>bwQ#682WRSRXkn`C$s<If*sj`!d>hNHWheIPkOS>p8)<0_O1t
zF0)!hZ@6c^NG54dp3B9L6Lb#n?JQzFw%ScZ)+W@!sP)8FFP&%WgoNcUY<_2!J$1&P
z3GyY&MHzzhzdaGoo;u?R<K0A72Fs+UjcY=an%Ji>c~zg_)&8BlR!G=n!4dyk&Uq1*
z^4U{oEMQz(eMzq9@To5mtB<hoYMh+>ZGv=I-SH?@wG4-qbGNkL*|5p#nwFs>v)79y
zwolrop57SN$te{erT$jYd<{?ERxh6m4U^0>`FAGz3w;dh<U~uTcUK>Il9;ybS%j)u
zf1#0C#ngzlhR_Lfw;G0bY8qX*>lWS_d-Be{U0yzN&+iswX5B5Q>?u4fYMU`Ng0J!F
z#M0AKoxen{yQ%Qq2Ass+oKmbhweE()>LW!Q7Zw)1S|_te{rxQ7N&BCJlB-IbrHlV#
zQ)!jS;N<!elw2=ln|b(wldEv`Qvutp*K;Pk0VmhxKTauDO<I3bp|TE~T)$0q{!$XZ
z+0p19IJth)Zhz6aKdt%6KTDPu6Rt7_$QkZpn8iO&TVeH)E#Bu+8fWW*U2#P<eAj^p
z)nz|myh9+~&j*sso4kB>Kk<^3SbfAq-X`54tTS_Zj3;yQ)EUp3(|J#58NQvQotv;m
z=yJ`6J&cj6%VLXE`FcW=X7SInWGQ%-uvX}@USTmiI2?98@sfiWQ|%DesX2X3XwoUw
zV_Jr1+0V;O;B<UDNxK?i&>O~?QdjhLZel;CWq6d`U+%%3gHfu>WFI}_t9Zqb&Ua1A
z@U4J(@d06Wi~J2?otf=BDw*e*9f)k+>g8j7<gC<(C5-1J*MuhBQp`Kou$-sh7|0cT
zg~n_)i4C7wv!~7|>zJ+o;3d->-H6pkra1S6CUy0-r!bbCn5u0M)~RV#v8o}3Yhw1)
z8=~b?XH@9!DBT{p`pA>lCl^|;WtdR4QGI^I>LV)rFZi?>P6%rAr>qqcwpkz&07{BC
zAxTlS4xAK!LXzTLa8g_bNs6BHKuPhFH6$s%1t-O;kfi7YPKq&*q<F~!loV47K&hT>
z${x?^6TH=vI<|ZH2sAodzUWY%@;S*;>eNJ!d1oG9ekFYrtpvUD&IGvx&8nATEIEGa
z?h@;sH@=e^qZYa`+}&7Y@sdxudveNxZ7T#j-o>aackjMwGEaZe$pQoU)NZr4kEeXg
zxP6K(Q$FX8Qm*qc-*ShBt18k<Yc~|G-oh(sevfhExuxs>pWdP1T2u35PtBiC)vy01
z8T1|&d7g8t>f4v6AHV%Oel7gv&Dl>c2mkv0=;in2`ltQ%#rJ=?B(k&W&(EiC^{>mz
zN4;JA;A{7{a8)Tc&F0SqAIc27*dD5Iiht(cyg}p5%V)pdeSTD5xBvh9^ZtE8L4Rdz
z%VpLne>pz?t4_=E{6n4+-=AMBNwR!9`*?o$?em+DxA)uMud&p;da1bZSyAQxj}JdS
z*?xQX?cev~?%32!a(CZ;-#*U%UtQ7f$bXieSIZwA2xI8?-_HMCeXqFf&+iW&7E0>Z
z@0`lsFM8|i-+ue}|2u4U+Q|1knfT;ea9x4SUjFv;?A-;MIF4T|G5q~|&;MsnPFPI3
zcID5CA{7nUnaBS+YV^BI2A$ElO1b-T_vXz8)6~x}cW-`?vrAxok3HwD_4DF6Oix@c
zQqhvx=ULDF{9%HfX>R&O9U0fj0Z(K;f1Vs}_QIjgCPSj{mwZsfLBD`%WAA#6?#JsK
zH`veM{Oq}D!lo%tIh3GVWj?>W|MAf#`$_7;Kj(<H|1PXsBs}GO%+&KD=bxD*2CJxS
zepF%ca(>?-S0n$U77<4t?y#S{G&P*XbeiMZrAfhBpKn;?Fo?CYe*aUTZeR0`O|bpx
zT%%Q{){k4n+h6nC%4;rL>v%l(!b%B|sW$fghyQKZrZ#uEy7=Rxk=ARcowV_*Kcn~T
zWao~hfq(qu<o(+po;2tRp1RDv{r#p>!rKm)cm50hAko)rpCa82-pO=$@;r+rE_0>{
zADjHoBVIe9MTYhGNt4<*KE0%?hmKslW9oU*X3?#s7L#5tC_1w5*`A`aJ0H&~d+KrA
zYSJnXxtXf^mygZ$`t&J940PJ)$2q?J^LgF!FNgj5=CS3*<jNXBDR$<{4{Pkb&MeM-
ze$nsci#7HYxBcZMC;zjs*}3!g#^0-^%Z2uO-&yuTXOeE}zdEJW-lp?T&HUA2So7oS
zzvIVW_n*!XtBtu=zw__IvY#Jc{rYHED`hXb@bUMj!MaBvXM^rJw<u6U>F@NX{h2)Z
z<<<KApLgi~SFWr18-M;%!Us*=)n7yR{89AfxU^=0X?@1o|66l-r<IqleaXM}^KJS6
zTWfw@lG3e@yjQF0{Cji%>E*ZO-$(N<nxXUYrf-*OQ5PHA+VpZQz0TM5wH1FnH|x!j
z>0j1;+Q82x#CP`jObPL+i<|B}Dh+cEySl{c=WnH4-`0cX|Eqp%`Sa{P|9u|$ygD({
zk6(PH-2d<O`Cq;7PfhjT-bH^7zkR$se!cwk`!=?BYCd=KZ1~kv^h`SRgL!6y?Yn8`
zLT1+NtNRlq@Z;^Xr~hSGZB<w7f3fD->;J!g?f+*V;LXe;!oa}5!4Mp;9$5A{=N>CF
z1H%=51_oUQ28QC~#GHcos>-~=g5vmsqWt94;^NG_^!Vb+;*!){^LT@JgZSc-(j>jI
zjFg<E(_`~z8;G>M|E#?xZf%gX<FAcdcN)pR4e(rO#(6hSheK!UAqD2;+23BLtLM5i
zOStJNxmMjj{`^OQ#j)kf9nOc%o})KUB4GW#n0b97U%6~9wJg(DKj8J;nPD=ELZSvk
zSGPrd-{OY~3lrs@NGHr(W+}I(yW)3#hi&tXb8D9hhwinJce*Xd&sKO!<90)moQn3R
z^vVCCL{p}wf8L>yu}k6TvV@Q4&$}pcEjY@+V18Qi2g?t8h7H*(SzdpW-FU!sfo4U&
z!M)3}>(aBY<$O?S>ulDIY+0+<y}{H&IpW4dH-TLyO$H~F5_F>HuikXkFf95@VE4T#
zw?(qK3T2-NzP@+Cw)(zn+Ol_+9rgvHE;rv#Np)a6u3EOt*RZg*#do&#_m5JKdFR|Z
z6u$OI%K`W9JG;0VGuU!ZuZUlp^4a>PNs80s=-J$*ML*4s@b1=`X|<F!@M^GD`PO?+
zd%wH=o-B|V9CCNh8s}3R-o7ZWjm)VvpM7&;&sToWTlNZ>{~MM}?3VF77j(_O!S#Yc
zfN{0j{SS;A@*ViUr6^un_%Af*m9b{d?C-S~+1bCl{B;ic_Ivr8?|wIr%U$}laKile
z3vwUq_l;k9`u(Fz_m-_c(-QZ5$Cb;e3-dHXr)lyEM&`fo>yT5h|GeRLkC(@l`8Bnj
zuTRb@|KV2i<Kz5I_rq0ZrYBc%tu*<QUEp2w?ZTFY+WM<<Po|4pR8-5HsxA5M$nKju
z>Zir*BE6nY`@m+u@yPCL83jGD@6ArE$gSU}85_raNwsIuo>xD^Z@scqI$`EzyZ&gJ
zht2(CHE9{wC-81ET)Aq~$t|gJOMJG5mj~p=-cIhE`CEQMH|Mmi4A<|wW$is>{~|kK
zom{?tP2lv~a^-A4|8#DuICrg*hie<3<G01!T6$fK$(Fp=dzxoYY4J3OpJY(|FtRmr
z+7U-9y~um1o4AxVEn0MfRs6E+&98-u6T3WKO4WEw7HfF=ddC@Cp}UT1`ybrtNDPeK
zzQ%lgRmkS+&$){NgPSKy*77al>A3x?pu|M3<zv&bMIRm?j7QB+Mn{uwFJoX}5N2aw
zP$w=w>6NFX9i6<9@2~=o%lA6po{yFv->WE;W-bYP_5J&$jlta+0zAiVRJE7doc>#Q
zH(ycw0B`H*4aclwVm2mhesxorr8Rwl(LIHEmEnOoUppm}uU@xpJfg6Xap9s>!9K_B
zA`c&I4?f7TYqLrFGQl@j&l=A^d-JpaYfhl7NhQ0;t<+CvRz9EqqQ0PRa+kBC`upu4
ze(&7hdhhmsUMZ`84Pw8J%WG8k-kfw!skn*}&8xfiFAZX0V0hrpz+gn2SK~AD;*<09
zN>VFI^eR%4*WQWEz8t{N{_%HhS52eW_hp}pYMU>uTj{y{gvP=xfo|T$mo<L8%`IhS
zuY6S5B!2H~dwlt+`vq3p^*)DAO@AG`@t)h<<$G#$%r2gtowr@uw&v{WH!C$(J72je
z9vQl>?#WZdez(6bRjmKL)H~0&e7#2Z<M`EeZgcbR%YW9AIv)AH&O}P>=A+Lw5@#RX
z{1E!;d^j(gXW8zXQ~2+u)-JQ}{XO}A(4+;$uPOwW>AaM&()F0KX$kj>Eee6BCh0A_
z+~lI^y{pNOTWF~cr;)Bpz$68$TK+|oST5eI7MQBi;difjg^J_#2_F@-JTF9_s1TT{
z@<KMnro&69gjo`#Zf|=Jd!VMwmFTzI_XmG@zt!pQ=4(uD(YN{Bwu%|tx>IJbs`c=%
z?U~!w_iF?>yC<j}{?)QLz}4ZyQ47vAmelQQ{Vg~{MOxx|mj<ZI81Fc|HDE?t-=Pam
z5j>?LZD9wKRxCF7;*)N8MQ{ecrrfs6CM`1UebL1lPb^9v%yL#dzEJtP440<gw&Tv*
z7qm@Ly?Agt$XhQyL{HF2_58w?;kamu;=`BT{AD6+`FGc_IrllgcRsst!s83o0U$%Z
z{JSi}WyyDULIz)}O#3@`lXj;*=k3a1lXnY(6`t*Q7I32QMVt#ry}(7O7aC_+b$4G)
zI8pe*H4~(3S}aIr%Nww!)axMgba#XFWZX0b8FzY}rAU!XR2kT`P1$^{GVDrG%(AUJ
zm!xi&;<4m|C{|cxdLdBaR$%wSzC#zfqCmbky8`n4mIY$YvaJjMZjpGU!LxSx(E#^^
zNhKFo_gnCkA2R%y5I8?TWKD~+&_9EKKq;$-Gx|@iv0JDSVK||(*2!ss5Z_OemhH2e
z5>$DL%=<q6GP-e5gfsoY-latet`09E4?C_<QuyNWLLo#@pz1-Pz$y+7+cy>*p)4(O
zB{D5qOiuikd`_Z_3)yAZ7j`vVINaMD;Og+=;4zT4fC9db7UK`s0xdTvDSU|nE5G~(
zWYVlOuxb-)kU`6Cf)tya1)Gyu2C~9;Gsu{XS+Xr!OiZlL8$2wS-}6jm)@E{o=>N6M
ziU^%h#SqIJ4q7S*o!hY}GmLKy2M4kRPRm~t@1_M0WCS?VV=kL$vxl*?U~#(09A>45
zJhPmSF7U8uJ{Dl8A#`qmW(ZGLi*W{rXtPpcPi56FUHz}E32wnEGYtEMf8<=V*dfH@
z`SZ9`&k{vrzs(<Qx*ykFllNPGQE6v=-kQ&M-`&vIx5w+>-|EVF+{@2zivRcf=chN~
zs3p`aCZ)_$1_p-N3`93>^oml8^Gl18Q;TD}4EYZ!2)KR!ZF+|>G@n^V*5*>%v?FVq
zGkcm}Uid$sW0z&^`@J<mVs0vCvYM<xV&y0P)!6<^zIAVnMDI$)@6J!TP5YLIyu0d=
zy!rEafwiFzHhaI#cxdInwv3BSa_?l*6B2o=^$ovOrlt5!2+GLkoqVDkt#S6czGKtj
z>5L2urZY0A5m&<MRpc?qJ3QDQky8<7XyNLlprD|TmS|uAqKzz!45}SIuG5<nt$pNH
z+7{dMOo_c>H(E{wtUBnY@<RIdZ_D4;!{p{`-}&N{C>J^H!6o&rev0Awy>Vvu6%IT}
zUc5i1=-yY~yDn4zR11lfYdwGT@cg2Qj@4?({%W#S;s-*_Ihf1DzMkG%wPnR@nQyYD
z*N*mYV)XcX_IyP1l6SXk-UnsP^!vf`@Cbv=tsOa=v!h?-XMeiX8+Gd-cih_Z+rnb+
z@A=4mbX#7aj-*PbmW*4u2$P}pqkT4cTf1!ApYEK;fAH?nbqjs3y}#Q!^Y&t`_-o!8
zTc(KwFs&^RY7}q$v@d6Ep}5qSX#%fn?yX)SJniQ3oEI0Pn}g#VPOM+>>t46;p@`xj
z!5g9nQg@s7e~PQ0x#scu)t5`JXw5tIC;L-Whk3<BmtE()my2@TPun|<qtnW0r|E?7
zg<J~E1^aZ9m#=Dap7V6qPWSJ!Ps9DUp1JqKFyA*<?ODVkRlSIW+|%mu(dzCcO>19T
zZ_VvFHlObtqvF)IJyxaWm#V`S2Y96Htoho|w))pSn;rkvUab7rx0l!1>*rF(r>e=O
zR#o>7?=3i9yKD6y;lP7kuirg+n<OuPLXC6fb<ebS@vR=0KJI;-KXai%(}beSvuu;*
z32i>5necD>^(jlT^F&OwFU`~ZeB#UQ2Z`rrOf~%JlF5BN^WCkl^@;gDs!pdFV?RpG
z^x<%Ob>!_Ksh97PAF6~`&F<2ht?<9;%=^`8w>>T{l5t7rnk}+5J=~?kf<HRE_ovSB
z&z0SW=W4u7eLLe~U6}qUhK$NjLGu(vQ#xW=cl`Qpk?-R*`>dFW!X95W*1FKH45d!H
z_2O(_&sB$+HrH)2eHe15RD1q1E~|`VW-PnhzWrF%tap0Ds<@fC6Eis8pNc70SD0cW
zY~pqJN={2#b+!us>(-C^?9Z&^Yrm83AD7bJu(~zlTlKjGKP%pBI?uE++N=6t)x4cH
z2lmQ-F1Z%@+jhQ@v)WE=)tUEeKKi`3|L{Pt!qsut`lAzd<as)x_|HD}5uRsus=xL5
zy4BNX9oo5Qt&(_$_T?{AQnlSa&CVCGeDz`VA|ZRB-7`)Za30Or`_}Wyyi#6SE}N!j
zb%r@yh6_#_M<kZ$PF%5WhICf*%f~YL@B4jEI{o|}F0jUb`kLY#pUF1y+H%1U&;3<7
zTkUoCKz!5J%1YZB#j_`_n08df)|f8mJ@VB4L-EzAQG9ym+uF@?dEad3<N0TGOa6<8
zom0bJ2?H+GpK=S-0zISJ^sZ>?wwrhQuy(A`ca=Sv$a8Ru|0c06q1)GmlKhXl3*_c%
z-G1kkbxQMCN}xxUY5bgtX@_fXnF{2yCEd9BVg{$M)!pe)KihKb+zwBb5A$4ld8r7?
ze%a1lt_DBuA2yopzHY%R>GNW<3}$g<I<l^1?(Ne1ap@p;*z_v<d3%<n$Q<A}R_8xs
z;k~Ne8Y-q6l=t3Dn<b}qtTf5~&7^nzPqmF+v~el#^E<t;aP~schY8CgbCg*Z$85gF
z==1UOQtN{ciX2^wyk5n;i`jVgBUhaGsYi<x3**=VR_s6BU=uI6NNVu`Ei<LA(=-0(
zmjrAG-Q&r2;mMo)OgCw>toPPW7@cOgmp;jlF`PVmN50ol+o$vNg6zKDFyGEA-kLH|
z`LXJo2QQ8OO`6+s`N<WZ18N^6jxJPJsrM2;*(SJHY>kk?gnRpSbr!a4eSEj<{Zp3|
zH(pcgg$6-=Q-8ZjHdwESxuAD%6`OC|kBG;8cV3_MGg@W1tX}8m(}nVSmUq@Y=c`jq
z=}JkC+uihN#i<7-2_nnWWvAp6$G;2ae8lK`VmaFaX8EZ7TW%JLUOO7<(m(kqN1n2D
z&MnDJ3bpB1qw7_Ea0zd3)XkBtzNzUlcUty|Vz)%W>h7BD|F@o>Z*TSIW^Me<sa4yR
z8WzueJ@uy7WcE5E6aT=4r;mS^_FQ<C`=7dLl;ew;Vh?0KRV4{moKBMeXLk2ce%1<4
z<<cup^9{pq)@hfNS4=SvzIo17ZH{xT>KBcF|JG%xF8A`%I=9;9`ft8DDgR~#H@JP8
zu<6e+Cj<SHat6EKM`e|To(Nm>fo+Y!eLlM_5^NtE^$WJjT-tq0F}YA_Lge=S&s~-#
zo>cK}^yCY^CNlSe!uJF%gNi?kd^0(cmj3&vxN*Y4<rY~jt1H_LE(mH>1b_FPzdZPr
zZTgf;YjV`NuDtM$n!<2TJhUK{#o|2UOY?b_$|Wm24u(5FnH{y)N^_p+vEn@pFNzp5
z%44%WK6F|dw&uDTN80!8*KVF-*wlI9S)RR~3+F>dWrcYc?d7kWI;V8ygn>|5y!`r|
z*R+@UAHSsF`YwU_%|3~|&slpP9rzH`!aJj9;^EyMmBOVl-x#&rpYEG|>Z&wT`_z4Z
zCqI_2tgyPFl4p5ApxkZOgB9O4?yx?1!>Ev9x>m<k-K_oj=1I*P-?%2sV?E=rWzm$i
z`87)x8227ur*M7p^6e7q4SMS<`e&XzrCD*xOrYpVVEgXbO&4F!HIH>^*gMI4ddgv=
z>es6se>dl=$&|}2%(gmw!^UzF$ENKYmP}nA!T!Twj!J5R$(rSd4z`|O{Z2lVdyjo;
z)rQ)qCGA^S7rGgXGc)zNJmtE3{q;e2%gBnP9)15;%$_mpRHr&F&X#y)@K7mz(Znm$
z<DPkRR`LDbcPV=QUEi}lg7<{qSC@Nl&=<S>>XCi%>p6}3{by1F^}O5Wb!>Uu9=|hc
z!nK!AvjU6`hCX-S8(BPCY-1GT(j)WTTQ%dQoaR~@ajw|0GDO<WbJ@am8z+=c<^MfT
z<J+EhSJUd{roUPud%IF&U)PTJTImNSo}Dl9!u@O3eCLYL&KdgrR=-=4Svh$HrY&<@
zQ)jw@<KtpYKEs*M7ce}$p*W-EBZI<A%|9~=1vc>(a-4YK?HrWZuk^96C4W`<!!pY&
zZ_*MT&B`ymQ8*#8+-sL1|K=w@%{TIHNH``UQuOv*@b}Gm73;1Sc5i%{D6ZP9^fiF{
zl=P}}CvL6_A65!ir%9wYu)cHLTlCiJ!1izZ?};qtZ*>rS-D702S1d(&xg~=`V&ug>
zlftW)*(Px>^n1N~g4Z>HkGieLG?TAA<hFS7FZ3d#U6TK_Ppj|fbI$wvKdeWgUu@A^
zZe!NYTX(leSS*&7Px+mkmwbKUnv?2LM_#rIsmwU;75`r3+dm^IqvwBk1SL*i?(#_A
zQ><ONOQVzdWymbUNg4lFo)vwxWBby#uk$*3EoQnuGW#=GV$Zzmue?oV&(vAwFO4t$
zzBNDTtn<%A^~^|v!;dY4_?LBR-?kMIi8tEcWm!{u$wTeuQxluI{s_rOae6v$9!$_X
zS)EzhBT#(lqsNJLj#>T;aS9@F`U@prM&`O^em6OB@5j~&kNz@=u`a&5cf-l^Mb%ky
zUY0p0Z2q*(J;b~!aQ7XJ?zw)JWxHE%EIry_5vw2dBBHqU+(G72tI+lk?Foy{Z`m8`
zvR&!vr3LdV9-WbH`2It~(@&`CgTOQu)63D@?KQKa9BzEpcxzJF!<<<8KZ~O$etuX~
zcw@nI?VJtnQ)7g7DJ=h7R<LcVp^wDgx#s;ZZDvWGyV|6;WOdddR(;oGi%-JQJ6}JJ
zIrVT6!-Sg;s&byVZr-r<r?X+a!H(TM3xBAmU;3DMeBBM@D`vJbn?eH3W<Bpcq++vK
zA+*V=F+i$;<I8NhZ|QsG{(fxS>m0{>YGbI$9Pv5pSKFHKe~&u6z_8jdjI}|*zlwds
zUGDuV7VKyDu-{&O$zb2@PsT1{LYo_`_gGIVxtY(wKI=*I+1FbbHvjAGWz=JySD7~B
zOAd>V)rSjH6Bu7D|9M2H!mwE};j#ar*C&*e14M6W<Zw(Wc-|yC>68o$8_z1K$J052
zoECZ6>NVsEeB+h2`Mo)_$!hOMgVM)bxk;WAQ)2#Xw0r+I-9_u3;BL_+5&j(Z-<Qti
z4*Km>5^CixQsL_re<JI0-)2#vh~FA<b7Q6j=+_ne<?!lS{^Q32W7#P=cf@7y-_%pw
ztipSB@d|;m3qt*od#cVemWp`?T+odPKCtY|6*K>){8ORzwjr4pG8UP!m_C)i(a4jS
z@L{#dCcnz1zJW$ewNLgR{hD)1=&OZM?UrRyBC2=iL`mO!&6M_F)xXT;@%6b?nN5nq
z`!~fbb9%hcN+Rp6yL8U4I_XV&G}(`}Je$XUIxaR#UP*G&(G~A<H@sXIn~^AVG@)1g
zi~2j+p0sz|JgYN~|E)<s&MTa?`TWJeq=()C6SZ#4Fnf{s^prr4-!z>y=bH_$TWWde
zM>Nb1;O&}bmo%AIW&51gR>j26R~^<f*N7@E6cV|XGdX60O8kq8#j`SFYOCk!hIg)s
z`pMmF+#<`Ua!upgME)RUzZmwtjjK!hOxjg7uG==9DSnc$an{1fqtfNdyS4HYgqja$
zZ!vyw-+cXA`|I9oa}OT4w)FnvhQm`%i*DF^IgqEjMY>6K(JXz>^Jzcc*RFqdZ|CD$
zOBIIr@aPFe`nt_dE=3b=InS-xl6C&J#R-ptR&0qTGhaS_+T%Y<q3V+Jb*_#j%~ng?
z<XCh)Eq_@})1T;9@qYI;HN9yWJf)%@!7U+|_a|h3-ZeL0RGLdSW=bm8kGCtP`)AKN
zk+f^(%Bd4P>XPbZyZGy4w{&PnT|B2-yq|URDWCXa_nq5PjZA0E3b7Vqy(Q$Zu-ZY{
z>N)dM&eV{Tb2!d2=Um^rbeHhQhR~qW$kwlpZf_X{T)TX3I{xsBTg&1&@l$v}{<6w<
zXDw7bYEnx+O}=5w;Kw;x#@hAa1Sf};9Z4mA0urKu8#JD*P1*7G$)`&a>Ce`_?eo~)
zpXh&L*^}>IeGBt-m!4eG-1sZ`#<Pv5^?zDz3X5MGKWAfN&CZC+LA7%n4X&<S`eDDP
zI}=~H$LE<hT-vNV^Plh64p^bZR}z*PvVh-m@0ruAA=i@sPHX$HP596KC)a<w`Y+oo
ztapgfYllwEf$dId@-eT%Ik#;~T3Yn5&dmHojK#a^Vm~p*L%~PYMB?1pCoWf>(3Yqn
zwLiQvapyMmSWVeqYb~VryezVKuzt7ul#tspoF!K-7JOQ?QmFR0*si|Znu}o*KIrDm
z6T2w<SLuy`p8E_wW9#QEIp^NlZ=K1%c8!j1!uKfcUK=NYS<k0svN}qXetKb$62AZD
z%d?N0JjGv6msb0EGyTYw)eo&7tL~7EkH5CBb5X9+&F}1o!_zoQvOF)xHvag&^yHbt
z4<GWx>V*Bbdj6l`!QbO~Iu9>w>`hzrX0}#DO#Q)q(;e+MbZ`2w$haoiW9j=Eh7$^E
zJDwd}dW5Ow>06^7j)sXFG$It%+if|UJoTEO!?nmh%YZo-KSfL3;BQ#2ymDd42LDxu
z!)lbiCO&>YUxRU5eb0sZRrL`KM;X>6e{Z^2J)>rMdh3etI(3hLsyq&-9~1S8>|Z36
z>K`#V&7H{@x~k~tiJ4le$4ajqRcSk9<PqQ`3Sac~>$rYYycx6gDr-TGqbd<?1tA
z+;wJJOlowk?}@1Q;o3NN#_z~;Y0`!dwHX7S`h9VCS(9S0F#fFa$1QSo0@_KFAKeme
z+Ur+rl6`e%yZgBbhS%k5mtDMC8R4%#<=x@HY_k)ECd`vk->O8-wq{N12$-?AW$`At
z#r|K*?yIZZ($>B2^KldJ?qk}obuF6m_gVg0Snr{IciBpY>(f*3dY(`Bd8wQ}VNur4
zSc47frGlN=o286)?O4Cc`QB?@)-s0x9@n)-8n<tGzgCP~RxfIOP$6pemUsI65^JL?
z{ybdPSX!YweW67~z@nJ8be{W0>o(n+_S&+Qb*4`6As>OmFaJG`n&NKx<lLG|<=5CN
zC;F|^s}Fs<BXjqkZFMUrZQk<Y)5c%v%$pQf83*$zrY1@~xgX$cWwZ7B=S4!A(>8Z+
zD0D3j%3rTvd1}SmJB~3ymPu(l9%d+ZM$T55td*_&@@fC(nY;Jd?^2Fb)VTFkXZwVr
z)nR+9+C;UKil;xyh<T-V;l_D;?iM=>mc<>fwhFm6bUqe)DSB7VKWN95yBz6Z?Z;nf
z2frvgKhZaNk?uJ&llnX5(awUEXKra8s$%7Rb;bJR%;mys?rpa1iVAl-aBY6_{wc5D
zDmfiKW3ldCyjRh^X)khfD~_i+*nF;XyQcJ(fvJ@5^Nj>cxoff6d!)-VA3L(^O*Q{2
z^QSmhQSnDZ^^(Q|rpX7l-|+d+UCg`6<zaqt?Z-6k<R+O#VwdM@XVo5<8=d&_fX_i@
z&&lNpw*wQlMiqX`u_`s<GrE~SyRh4yC#2H%yTjYr>)*7^-N6!HUaRM#%{#sF|5u~Z
z>oZsUoHwUk`S-VSW8UpYx-{mVyxs4-;HlDjMaB>ZHBlkGuc1ryRa;%o&o5Cl&p7^c
zc{ckRONM6$<~^Kft)PBai6>#<hVrLYXODBTWqEG4IWgC4Rnf{o@0^W%5|bKSjD>d8
z-|Sn`$C3B?(+ckJ=T~=4>-_d;nr-^34@K1*PZ)1V4YhZ?&uDwOk*T4B?NsAu=aUoi
z%O>6XBQw)+&8ZD#OL>EvFYOf+|DcoGp|CVd&7r>g<-J!n|L-SAE&9*8+im+lmorNa
zob%qYDNIE9ozKd-vwJuvEPuW>O{<wVC4Bv}$y2@`4`_UHPy0k1r`e1TKl#1CN}k(%
zWz*{o({~nmHOk!at$ptot@e)L_N7bOGq#+&p{un-JWFAfYi|gjjJ#yM5clO(-5og}
zOnycrJX*x0ud?ZSTmAD#Z+aJYbO-75y;;&y@^Y&C#MOc8jz(xsle_1)Ctmlz82?+d
zd&=&bS>-S0tXEk1`RdY@t%A$Sw`}<@pdagNTd?|=or|woIcw2LPa%bm>VGBjVq4qJ
zIhstltCeTTXL|CIeOaM{Mao-0-gAjIeS7k@r+wW%|2d1UQ1?qE`@Vhq4$E_irF=U6
znt{!~a#zsj=~I?n`h7X=-%|7aN?)zNKk$#Qskc>bb6qrP=`6lqT8kd~Ul;7H|Mo4p
zWx`(NhSC)~WB4Y7eNE;yVZ0^$K%DRG`r=sj<8L+MZ&yEO6h9wbc{Soz*&5kR&pr5g
z&N=UpPczxF%e~fgN<@W#lz}iqfXrU@<1gcr4>;L4IJRcYk>CF5+|)IC*Vf!RIPHz^
ztI%s_)C9L5Ik#rUO6j?hQORB>lxpfS+@>6motHX|=aI<~tvjX14la!O7rN}|BeQLK
zq3h2aOZGW5bzRgOoB!JTriaS~n=mnIb{8J}^x^korBt2uaj$;X9Jmx&w^h*TRogug
zjdSI{|NfpNX1QZeG_%q5_`p4vJ3o7;UoBaGZ|mH-!j|jyb9v2O?&f)8uNec^{w<<b
zMNKi2w(-uHWh-nDWiVOQR5s09{&C69SW$<07bXO*o|w3>=g?B^n+NWR=HKM)7xvJ(
z5o7N9U#IAvZ~C-XJ|U|1oRWNRUmeloC_E+h_rAf56RS7b_3}NMXR^8a{Q3`Hip^HC
zmY)8myuIbOTAIhE^XGr8JJLGyInU-Px>Y#=vl{MCWerm1kP4oDqw4Dd*H?!XR@?GL
z{V1>7pemSUz07Y(+=P$IKVHaT?nn&!HLs(}K{cF(Ra$&oZrsA99ygbI?3;4#@o_0#
zqrI-I2Q62({d_aUVNc?FmHl#xQ>N6O7Fs8rU?DSg;lX=ayt>~x{=J)Ra7LP|v^u|+
zVaZJQ!!A7;-1f$P`m40|U(hu^-nskIE|Wlc%iC&e>Ms5E)(Lshzb#&`*Rb*S;eZ`%
zbq6b>{w>jZte)jEBdk(_ZT7^NV{<O<5?}WxW1;XTi)G6qRKKW9%{#OEZLYC-85d&*
zvrEa_<F+3T?Vj{f`k-CY#Quwh2PRKeKGwsckRQ2t+Sc9280=*|oW4C=;(uX&_RPXR
zk9fp$S~h(7UTz|Gj&DhUl!tlaH~m@Vzc;xDxb2QO@1$VzCrc#UMc|*-YYm2$c^uD*
z`Am*_{W$jQ_^G6&UJSwNMlL5cqBnf<es|!z#(|3So(E=I&azYYv~<e+*dgq9^y#v`
zosro)1hyZLpI7R8@8Q$wSDpt3vGOW~sBNj)_+hfh8vjHi0f(wJ{w_Q3x-Dp4(Q2Oa
z_{|0JgBpP)S3ETSoVg*w<;Kc%;fltgO-DBUzLNK%HfwpGk#}i-Y2iEm=K;5G<W4)_
z%I;n$Z*}ZzV{Tc(gkoK`e>`k;^RCoA(pdHOkdf8NU*Fvy?^``}nbG>ER+~AVhVEi{
z(=H?BBx|~9+45t{*bjb<@mbq6ZMJLw?=#tQp$q@KWaMDkJL&4(;`cLG{hF@KaGx!G
zb%i3o<i!UiR_8-D@7B&wxzPN0{+@|l`C6Ql{=UwPm+4(F(KbRlKTg0^z3cN{HO_6d
ztA9jH{<P<pulI}Nn<fc&%-x&1;ZeY!zsEw_wO`JO_;I?q)#IB-gZa+mdnBhM*78Lq
zYew9d&dJ~={HL#b;~dF`&goi=5wYuouQM+TmRqswf$r3HnMuLxpQvu;-fC%MwlBTB
zdSzT)hp4`~<$3NqeK#hZSfv@bYvTJ{p@Nil&4(8ZTPzAX#ckXAyqKaa-o1QxYKfFG
ze+C!l+RYB9xr*<*uKRyWF<_U&bCZ8*+CO&wn}4hIg<>gV$g+*kuQ@LBHBpWdym6~k
zNo(G3@tY|(W<9pMme&2+g<Wj%?hQAiT*Ci_@Kv?lubm^gELkFM^6l1y_1k&AY51Po
zKS5~K^ht*gI<GH@vujM<y>R!&ir3T1qRwY36x=9Z`gGxvql|Z}CAZuP;D}{tTx>Y|
z=&jHHH)ycV4Nez5Ih~!)y!!C5`?;C&HnlmG66LA;Z}Vmzy)gaq(dg+d@1r=Uy}O%P
znd2V4XSutbPiC0zilg&O7rdGJHsmAc^bWNUyA8L0C!7?C)#<3|i3`8-sXrn%_IzS@
zNzX&YgT~2wnC9=xoU+l2>;0CqvsA6QUukD*&XG95<=ka;@^D(xnR_7}MdkPEBx@Qw
z3SXH$($=3;E-inzAaat7UWV5F<g;O1q5pl`#b0_AX6#IGOELNWbG~qw^dFP`mO`Qj
z9nM)e>vEjkocg4G!~Mu5%Rj7r*jBS>v2@Xtq*oGLALj=v?Rfp%Qb9SQ(x>#%#=XAv
z9lOo0Kiatat@8QHr%coH=ig)B%dtZ`Au#vlV=m{7F|rMh77F~?5VLB}|Dba$_gLQa
zeeCXFUR|@xcGVh&kP{*opI@!#uFU>&Yp+CP>m=XDo8zj~-^=Xq7oWWH#O&e#?wSdK
zuQzWFdab?2T{?As#O9vzRFO?ya#4a$6%OB&XX8oOsj*-V>)Zny?^H>t$sc_^>#)#C
zy}kMDmr^1%({q0;<GlW9eTiwe_QKOKr%ugI@)R_fxxIXsz4ol_UyP(J4i(jFCzv0r
z4wCGh_+$HT`}KQ|D0i9dZ9S-TD}I&9tICgQoS}(Z4VyfUJiGtpN5KAYqw7*m?TOs!
z$6r1TJ@Pnh>*pF1Q#H-Hk~Ez&D?TfIT<q{#^nyY8!+XMAEbOm~In}b??oeQQEVH~K
z@jg$(cZS)=)nxWgPoMikjO$%uxb@P!wz&4b_cNVXSh6mC>1-4i@cU%LrPw;pYlTQh
z)9d(Rh9ip{BbMqP=KB3NVpFi=uAm!AKQ@;<E6$GbVfNKMJn=&J{}0oZzb|&2Ud|*l
z{oE4IiE#(id$$!kb#3<-YcEclcED}hlDM@yQxxvM%2-t_`b?l``_EJ7(}iX0r)+%H
z;o_MfQGGhAAx<k-IPy$GHuqGaZKrIj(=?l2O}QKN$=}ZWzWTYpqDR=K_%E7!>B~;*
zhPAA2^WK&xEIXIFVRiiPM@u-flXAagu-pz}&+9Pg()_&nRLs9+zfL+tZn^$lP;06s
zPwp0ld2HUQO|9i&b@l(Rze$nLZ@b7SEGO5-;k`R&^}2<I5`Ui^G%hH95FDV#k`ljH
z@$$jaM7N56rHKoErWfv>f9&HWi`p*<e`nWMGQK`-&@?4-(&kvdeEGYZ=U(prn=|{7
zUX<?ZPw(zUP82j`j{5P^R>;sabfQs%gU7r#nc_+9%-h!3rTkKNtFGkkS+{h@Q&!h)
z8~<p|i(PtZfob)(c<c18l4Z7Re?HFMd*Sb!&>NXfhn(Ih@0eAbptZnw@5;;-s|EYc
z9o<zJaDD%k?hqwe?>*oCHO^WtDmEkh|GhUdMGqT41xpwPO+NDQNH2$kPuE4h;H6a|
zL31|VJm-=fQTI_IXOi@u6XkcB^)0hG6%DNPZhzS?d^PkK%hee%VGS{JB_Ca0d-?O)
z`Ro5q`CCx=+mJQAtzv8U-<QH0QVm|FD#o<G-jfz^=aH+X)cg}3Zy!!8fB5R|X+w#|
zGq-Ztn?$9fuEZQoHg}o&s&rmYwAkWjNgje#$LGgPTk!wn`NW0lbviQV{zs~s2q)ID
zJ}kOap4K|`p~pG)^=wQo+{aY%+-Ce*7URBd`QLwK&v|mMZHj69wmYhM<L^@s&gifG
zaIDsR(#LLtgpHpbe>>S~)W~!v^~QZaj&n!F`IZ`T=UKk)W2&?Jxl#U~SN<9fFLlS*
zZQE{4C^P@oV4vqJaQ2N!<(&xy>*{VN={&M5yRkDpF1=wc8&}qZCGVDAv|D`h=e55^
z=NHa;mpw1P-O{5kB0ibni~Zx6LLZX@J{&7=-Vv3F3JjT5dh&sKQ8X8~=+&PU2KJuw
zw)So5x;N)f|MNuuIgK9M8C|X_Tj+lhHrs8q^~CNb9WQnEL+)!NtnW`w-messKUwEV
zVC!C4lOJBS+duNH(f^>OF0-b9wKCF7DfH}uWy`{kbx7$SIN*Gy^yd6y5_{Dr@~F2R
zzjwvJ<C-5+^wQhggEIWyWh{5RDWRY%Xra7Hr{H$0_1``3w*FB(xUeT!XQABpJIwM^
z@8r&x{_&{0;ndxp0&ZW?wvL8p)d!w@t$R5Ar-=Id^at+uuS)#SydF6*UgG!Uz?o)=
zL1lJ_1P-5LoAWK}&Yn9b6bqTXIBzRdy+7#uc2Dml?W64{^v|9Wb6URLpCdV~YHG8>
z$!nhv{`<GRVZ*1YZ5n<bl?=L4m8#-m((8KKE^skyTX|vm+&tbt)ysU{CrB^X&^))f
z+fkrbHZ*VDpXtu&ccl!pKa1Rb?zy(>`V8UZb4=_!Ne83zzLeG)ZP_|Q`)A<kIrC*b
zSWOSqrm}vD?QxLVVo{kUwLA6YIStzn4GN$3UDN+8&Uj((V@Wp+yLH~0g4s=%j^FmZ
z^SArgo|V>r!&}4ln7Z}eK9fIl`R_N=^oux`={wvzrL~@W-Jc&nFRs0I_wkw+d*_C3
z70^3m;~4R9es%Zbpjexdt7_XG{5MkjVV^f+=Rco~Ofp-mT>`(y2g@awUypCjyYygt
zW$8Jej9>B@u9r>j-P2sKBH1|GFLdS%RV^zme%@Oz4>PuupQ_0e{h>5_&V=<k#uL8_
z{8)doVab$hPY<xmzmC-4>{VK_r~L)nd!8$C&mP`u{CMcp&EQ|lWv``PDqsBPoB|_H
z^{voX4_AGV+O_^!(Y%e5XV&~b_(*UEM@y)#yP9~;wydP59S?Ga<UJ1`+18)-g8Q+T
zYxb_?R%ce-<>*NYWOr2dcw};9p5(=830+GY{*;{LI5yq0@93)QYd5$z1$;bfIpx-m
z-%cL;%$~lmToyj3@4}ajPtEmK++R^7v1DuFky{Pfn^yg(-|=<!g@<P@9xZU|f4pHr
zThJ5Dyn|~u&p+QK@>^IcMsQ6-O|`mZCS%}qw~{MY{jORU%K964e%;#O)bUfANxAe#
z(ZTk_d7a7A#ScH?GW>Xd;&}mXQ3YxHstvxk-)`?@m1Mtv*7?#ivjW?x$Dhpeb!{qr
z9e-?whtx&}V|~p?hm(f_EF?HQBukD=nX~`#jDML$kHaH=uIUL1Hr{J8QR&UKOXt!P
zxmR0U4|}b{x@GIazdjFMweIyb@7Lg+VE3icd8N`L)|-zv`~ELG5w^TeKG08(;l}*n
zN9Xe+p1UhvIb>^QnPYR>^o@JwW<eIq1A6(a%M+(-h~EgD=dtbKXWMWSPp;o<LRH-t
zX-~~%EPnOc^!x?0+`T;-r<{YYRljpG@;z}&@ZJ_pN$Y2t`fa~=GUWOwO`Ok|$}PSy
zNV4kK79l3vzfBjMW{1uF8zCUkJ->hQJPphA*E3cfSp1&tBBw@21a}ALy<-c_`=WAw
z-+S7pl*@41_7?XUm*&6Gf*Q+NPDH8qsr|pzHM{?_c<%Zo#|*1_PWjDh3i+~D>-H%J
z+seCE>fxtv-Km<yCQ{PAVb<9W-#=2DLXR;zi$+Z0ReH(#B*;l>x4{9UPurupOg4-E
z4gIz-n8mxTAhkb8rRNPFb7h>0Ap@_0O2(P>%f0VpKQrZ#EZ7!ocEnOu>cZ4Dn+`4A
z$<WMDz<jpN+1bZ6?6Fyw!<@HUK6!j#(OgjYV)=~Q#vb=4)_qer8513F?$WyVI@0cX
zsp8^XXAZ~zGyHHR+(g~;$^8c_rpD~k{TTlHczI-9!}BkJ*2hvBZr|YgGd1~*zHP|;
z`eZAEKIxQmyjQd$6m;~{R_^e!47%fX)sNXTvh~dC<VpvRQ#@~`aNM?AaCR2U;<UM&
zdAPPsI3FoxzBTr{6w`dB+uz=*Ol`b%MZSOj*Ya=P8TslQ{?qrZ+Nyu@-||P-lb+3&
zHre!O(hLK|)(X};@%FqC?$ug}>lXIK#~8&g%L@*dEt|c&`qe{eUS-$i4H}FFYfNwY
z#x1*Lu+L?SjFPxVq~eqn_wA29`F~(bfcJrm4}a{bYY0A*wz{_Uk#p(Q`BPQXH}<z~
z4H56zc2u?4=YmLfzJq^>#NkuHoFNZh8L!=`;koVmv|pLN#x*B1*J#`>UehbH+2H4d
z&5H_?O}qHtvAk2T+a^C*%<;k12=DqCE$+vr`Q`Bm-Y<J!)9zRBbw-Ewhg%YB>bxR~
zE=@nJ+$FlI^Y%)qb1d%rbWY7|X<Hb&JNd%jkI9yHi3J*G&lX%YIr#nP{zYHclugcE
zx%S%hMVk&JdcXRV{P0)JjYVGbV$Luf{mCd3%`+plqDdon>(BCE?d#ihWIw-;-)^RA
zabokTl+ptMH+EmVdgr#I;<cZ@92j@7GcC~b6i(s4Uo`o-`o<kme$Q5)`uD7(Dx~@Z
zN7%-d_bWO%t#Vd2A7xun`=&uBx_au2gZ-=9R~%BR&v%-`bz%O;h0k(U7cnd6MeV#{
z@>-vHwu*$|j#826Fr}I06_P~)->)956;#Yf{c5?8=lz%1J&DEo1zu67b}!dhx>Gc3
z3gecW%-@-k9$$TU*KhhJm1Wt>Sn8yo9&EeJw|%e0Jr(A!|C$Y(bL-cO^>TUt-|e9A
z^t#}cD-4pSFLL?*o7%*CL{~;>&O4z@&yp=`Dmj}Pu5Fq!OD{MsPO0qVYmpw=;y(p0
zo7%g!h3=8dO|NBIFz;IL#e%KnY?_mOpZ-XX4;Bc1o!P3rM%Djd@!DN`zZgwj*ywir
zx+muYE!h*QF+S{NQ|>05>`=S0=5L++d7-T8jbh(aXWfmvyE=bQ{^wYk9_@dIQaRtg
zI{Z}(xqXw-L;d5_U3SL1e9s79m)*GiTJE2tYi0H3#~$1J<Umf$qdDct8#p6=%>DcD
zWBuHpO*@`<b~Jc;{MS~08d6{;Xmim@VzGbBL8YJBca79^*=JUjxu!2RI`aAU&g#0w
z@?3A(r>C~vtJ)veo)X2Z(ye{<0{;&yUvv4B??d=r+%m25p388i)MUpCfAQE1!J{kg
z1WkJ<>MwGedFP^+7uT?)e$iytUCmPS$LgTpj4j;d7K;^DOk1Cpsr>5NHODQ-ou=(#
zlm0b-3V*oJY5t3^=L<yDGX*Ir-JMk_Gv%Ia(f#IT4g-}2caLdX_Ah<Osrcv(L&b+q
zr~P8z&wkl)<m0D168Qy3Mb(Pz_}mwrD9tgLHKYG+XLrw8tL`tg8MkV-{jyCEFI4OJ
z`t9Ps^xND#OAngO7VPDD7*^fF-m7hzv|YxCAuRD*8tX~ZTk9HCT3qj551DcA+IpRr
z&aVEF@9w-_S{Auu%XJ@)&#gay@OUfl;FR=MT<7<C`hnL1TW8;y81yBxV%6aT?YlR;
z<p?*uyD9l^+MYS=3RCYa+A5|#Wxng}SBd)f4V3C`{m4lu%b#_6uJcv-*h{Zi>yJ$F
z^pnK8ZZIj;Ky*%<*~IIQOK&#im>xIcwqZ{3zootT*{g^5o!YuM%Uz6lpIaz*-TbmZ
zHgnDdS?)^5g-NWp=d5}0O}4szTjEB}$@iC=C|+BlJGt@NkAwx<cUx~i75Ha(@$Koh
zX<jjbEfUL%c9gqX{$WXL=jKawefT0=T%#aT?z^B{u)FmmuDL~?cW?2{aHw*cApOOQ
z<3{&~Kc#E0tm^hS;J~eVv-t6@JqgO{o9?RYzj=9?oJWe}XHOmX*JT+C?<>YD^J~l5
z+%x}s>~>%LiKC)c44<Wb*YDG*$+^e2KX%IY<Ix;j6*)W)T}qnh+%Rd{RpB~K$=TWh
z=O=&NJFURz<>?u<uipnSpKtkQ=702HMOBk-_2iI3!=kD@uBAr8&35HQpW^hn7i;CS
zt%}@R@nJ#1gY~ce7lpr4U|Bi&bkLg2W4}a2cl$*x;;pV~6kVUo@p=v4=gXSP*M8qw
zv*+8BeUBf$KC$$$;c<;H_oyeEF0(Nm=VbkM;PJ7aX&b~=Y^d*6T>QvfnQc<M&ck|(
z*G4IMH}@BX*u76`jb3y4#pfpvH2bD-#289!bTnDL;XqVu#^xs<e(B5hyWDO0o%hD<
z9iKGgzk>B?M-SXLP7d26clL?b-2S+xZ{iFJxAsp7vdLGUFZfI4-OQFL0gJB5?g&(m
zSl_&+`$=WD%=`6Thvskim|G&Q%Y5hgImQzfpZo15S5~Gs*|;qzy`RG$^w^J;Jv{Tl
zt^L0W_qE*Tu0Nn=H%qsWamLJhMTbtzTWPN0IIT%6^6|PiJWsU`9bGTyrMP&B%}So0
zhyMDn7AZ_slL|gAtiJEa31Q~N3si%(IxPMD7CU;}Yy9aplYNKRn{@xmG{+U)2VX?I
zp4OW)vG7{Mr3Y&1(p&z-#^`mdQ4%_P;a={isx`Z#eZ|9ebOs%o`BT!{&1O;dPoGmQ
zr#`uSp3N?OLU&WEVb^CVnZRvb8JiA?YKHxLaYCo=qvZyDu74+6wldpg#;OIl=eWHp
zUp4LTgAkLj+x;_t?)k&Cu}?($Mt$Ry_o7Rx%kR%*d7pcF<=!=~D%bFxSW~$Egk5WR
zgk*))dTCGnxz4kmozbj*_`^`k-{z{r{ETBA4ZB?S<{V_`_ue;sLdfxjH4e+w4lGiN
zar0~Kc$#Q))hb9my3z898}o%*rQ0qjD%o$F-p`TyyLyJ8m;XhHi*7el+m6k3U$|_U
zbgR?q?CPmEjJUo`{OxouFJ-o3?*EljWz?@0Jec{pSmu?@xBYrQypls@1ODx`*E=P)
zT#&`Tz+`Qxgz=7hTf1Ln{`|N5BHO(P#d($P0rxFW7TBCp`TbmGbMC1aW;X+~{GEGx
zr>s`{_TGA0)}#fk-|u9)vDTZ1sY@};^q-<rp1tP&r{r1_i>?m4@KYOOIYs;Vcx)g4
z=C^WE6m$wH+V6Ty@N{L_DaCJpv=#mua6H(3ZuQTcf`rXyeK!7l8op<VidxS5GslbB
z7^Y8tfB%+_@eZq{=@;8n=l|zaGJCdw;Zm2})my96cz>j;8Q$$`uzGvaKFsD`PU^Bd
zKfis<e*ABdMK#aVhvLowcXe0A9%&V}$=<PFr|EL<y9+ZrUj1b{s-1e{ax+(_>YTmT
zKAJAkvOZ%n$6#~X)a+B)``6g}UY{l|_hn~#JEzo(+3LFbWueb6DRRVh=uIw)d!2EW
zpY8iYPrfa!Z>(mW)agBF=+fe16S$yQc7{;le)*?WSED{ZymoaTcl6`D-lDvsO=g-L
z30#?TZiorZ<#~1b-@1|mVu!dR6g+<kOC?9HTqN*xK37WH!#7_zUaYvET6HH=S#8hn
zqCS<CQKy~W8K&m+pWIhJ_0^;QCaba@GzP~-q)j=jX|PjuN1N~4^le)=zjQn(^+I=H
zPT57r`4gE$E>wET#=W2T{NRJMMf*&At5&@&+mWu2eZF}Mk5^H+8~aA5^*1IOT;1m}
znQ7rY6(5c_f%bL*9=>;&9N#xCG@t+I>)LmxlkC%Puie|p9&fhh@vQpuH+!FaW4Dk@
z);*RK)AoC%{9}u|(U(%E3oh4=zJ9f48h<Lc#4*#Ky<cP(ee7Lx`|iXi^Nt&5pB9++
zw{~Oi!~P=^yj!G0a`w#ry=1A+EvCNEZ_%AUi=8(l1qA*#S+Q5=VDg34Kis`9D5^3F
zKE8cD;N#Rh$;+P%8>8P|wzAl8(Z+obi>r9WzFkIhH=XLdmA2h$k>b5+4qN0T?j<g3
zE3OFTC}-ZjT-s;xoZA|=*E{z3J;`#b(vN!lt+Tk=-o3j@DBpLV=n=ifGZxvbuO0>c
z&O0yoea-CDta(kA%v;qhl0I&hEPW$zt}?r>S;@gU!eZ~t1JQ*$GW#rg*Dcx4wdeSm
zOGbt+r+#~V>w0=yu6=LvkG=jc0t=f179G^Tw8TeDVClu{W-F~0aPZnamEV?|cK7%K
z@#lYT=&er9P1QRbX;39}yX>}lelbVzWt)I2JX5&LdnQ{dy_oQ>m1A4}*FEl1n`)BN
zS6`^G@_rI3^ZjX*@H<nRw;R303nUNvx>_9g?JBPB<y<x;W&TskO(ms9+;<LK(7CpE
zgAUuwr4Fu(4m>+9lruf_VejX(+RL01v&6YKZm+Y{VDV|OKhq!nFK*YiR;S=_t#`{-
zy7AqZRrB2F!`xr-+N<Yru1q?}Q8n3MU!(W?a<z}K727wpUU%2*ynXr%?-Z8PJxqrl
zuI&4JckSAwCE=T2@Y=gh{>nD5(z^S{UdgLV7W;DtUHR8spy0Il^U{d(N3N*z9N|(;
z*k;1i__QMBRUO}+j%mxCy%(=L5NJLx-_1Z|f@YPYg}arfR_kor>h+U8G{?@{vR_2A
zD(32)l2f8~;cjt3s~oD8H_3dfUt$n;c2=R2QH<KU&rvqM4qm)ZidwmK@9q>YdfELz
z&sTF@i-_8Oo}Cp|uJ;w$W-sSx_gH_i-uprR9a$yCecul)JpK6L)C@O~`-_tcQxxQS
z&U|^NWpM7J-?Y%!aOqW7iZ+(?TY7Iu&kIN@>0NkZL;Vk)V_P<Re)xO8-15ef(9=3g
zCumG&(#-uYZoq$ZohTRog!LP?X+9Bi-8<WeW&b7l#T;|oKYh46Tf5-OXZD}k6VjM3
zp4!lMPeNire)N>dZkb1wrluLJIBW8;R%c<6TwC(;H=Dj)_@K?Y=g`62*Uaq2M-^to
z-Llxban5=VK|dd5<yDO~Tyk<UWx32(zpbk<sn{@QGWW#K&wY<6{k+9=SUFQId}+q2
z$@ivDdYkC`$$a&BW#`8cUZ<kJYgMr8^u3mOt@$L6Pa@&y&Vpa>&!?TQYw<dkB)R8*
z`PnrsIsdh<ZDva{n=c@}FiH2dcDa4ck@G@XGQE>`pPzd2`y1A$s<GFU-*xU=mVbQb
zG!-k64M`dGE|pn5U!H7XV-B9#A3u2wi*Taoq|=33$EEgURq@VBNjb0Q*m8Q2*UDE*
zGmU*#>O{UfK6B!0ck9c!%5P7f3{9Iqoss7<Z|t%Zv&qjF3;l_`FWu5M$+P^)_FLK8
zZe~6_)n@tc?*A!n|4rF1|0(jiVlL@*ifu!|_qTC(1anUdX>a+Yz#+l3bE`dvjaa?!
z1xId{V>wdttWkTTeEydI*r(yN`NsjDs+2b^pIg%(2d%vrH2v__&+0qw%A`3<$P`Y_
z3eKK#nAyMIJ>STt>SKNVEa|UrwKuE3E_7e`^J(o8yX6NMH_r1ppSpGy^Sw3=@te|-
z&fiw{IJFncm}PvF{1}q{@y*lApKia2*ZJN2ZEtc*gzjdIJN~cVuMCoi<(wy`xBSAn
z^HI9fmVBA{>M@_jT>sL53IpqTvo7V-T(tH-s<^*PD_ne=^e^?D+S$QD_w(FTclUH0
z(o6F@;xQ?ykcoHy8r`eLA~%+s_?p;TO>AMi)F*x6LQ%ugd)m5wHe$Dx?2H8zH_TI4
zJbuf?Mcw&;zGcCg@GgVx4-YQf`sb@p*Ik=N(;4e`gdRAy{A<yiaBj1sg2FFYdJ@)h
zU9w<bzfY@nG550G&bR)I34OB+SIj;2KSfjTxr}>9f3w}6HP^SCnxwG%DX%qm&Bca&
zrh)d8e;g7yQ>=V@$+-=>lOG)NzCQE4-~mbFyn@<@=)b$Z@;%u$@#ECQFDqPyAC{?T
zwXeHe{$X{Zbx4_d$B&91iZW3)5&|*5=F2Xe(sX%J;~UqthfYQI%u!tVJwG+q<=fq9
zbN1~~)?Bb&q+`ik-u)YAvHX(0CRKLfdCL*be5M!g+Gg3DP@Mf`@wCvY$ex4Gqi)`E
zbSXQ;`c?CaiE87G!c*TJcDYwQ@hNkBb8~STEB|(pP_5TnUGGg{No}~k_vh08&(qEt
zbuL|@k$Ug+mZ*zUBh3_8s)XZ~bT05>^P2Jc?*qBO1GitzE@;>{<EV3~chc(LZs$_`
z)P(-+yn8^C&7fYnWMSOY!;_qHPN`~$oHQ?Fd&3gGwEq5bA<lo(p1w=HzPT#mk*Xg5
zOy!ue880%N&U9#hVdL2nsA6)h>h6DQftSAwlUIIwqbjk}%;u|N!u7L^@BSNDcBL<1
zo7Z*uve`wJB_U?t99M90ah-FVw18dz=A5gqpIly~DOAZdHFh(@@rPyt-fIf{{~Y_4
z-F3p{N8y&KoC{xiTeV#;wGDcjx2SH{HdcQ@y?c-9(>`c*g|EEVtL1QGDqDT0>-Hz<
zGXB9APli9RZ?<346#1rJuzBT=$*ddKq!ypN!g<xgHI6Ur%(W-};R$z&kN^AN|M1hZ
zpEplj<kl<IoX&nqoX@G=&(?wWs-?MPhw#IUA4d13Ziju!tC<yeGJe5@iHa9exb}ul
zI@#jdd298V%njS)Qy!h3rkcX?W|~u+o?62_{i1ijN*2FX>5qNc#1O^l-N_>S@K1G~
z%e?D#tqOOJv^_DDk(XgIp31D@zrOShixK<7WBVTowq<SE6yhwYH~+Wpl3(VF=Vt5a
zIxRo!o!w@2a7V&5-Nyf|6WN4rUfP;_AfItXz_wy#uV@FS8FM^N%)GQH!TZ?KU!0RJ
zZZ;7UZ#ld4>fhBW-E9hwtJf{lv(pNQeK7I4!hcr-zH3Q8W!Gt*D)w8Ltg`aT+51UH
z-Z&gObo5Gl^iDzUb>B}H7vy)AHr&}~{>p^q#(tyOYKehI>)lEl7G2lcppeFyZRdNs
zp@Q{XlU8)L_P+lzJqz5ftY0=)(dk#k>%|A=?%f{0;M%g%wC^|7H+;{Q6L>cB{G-4N
z^N&pl)v&I}`tZ^3IMaNoNe-)hXP+{P`1sK4Mzljld7pO90>*~df7K1|IP5c6&nUkl
zcgy3YTP#ClmdHMzS-CH_O26w9ufKFt=;3s(f2rBCr)O`?KJ8e`G=0|7qc`p__ifIx
zSl6Had1GE*MBvo>O`ZQ{>{*!=w({ru>ZOZ5h>FkB)_ykOz|52P9{ypy)i1Iy<LaFK
z{1?}!sV8YS+ppGLb!&xNeYwzGXZdHYHfO}OZ%y?wa1vWCxVv^knt9^O6LY^dP1w}?
zyV{<~cGcWVvr_f8zv%9mSKi^B`1D0pU8G8?n3>EUsYJufP3+uq*=OIIF4pwaUT2tm
zXsfzWNBa6@b?0v<@}<n|Y<e^8wa~Pag@65-r>rqAzgEp;_~(1Tr;5T4fm^l+nReZ>
zxmonv%Z&fTRnDotdoDiP-hJ|;bKUWLt?REY&d;)!^Y;{=6cWTJw(EHA$Ic~;iOakG
zs4CsepJXZ;xa4$I#?m*(^8;O8JYRNZc71^48;!y>&NC)kZ5NPYRE>(ADzaL;D4enS
zrP}G}xD{NpHmrO#N3-c@K!QN>eartw3!{JUP?=gW-Q$<#3uj%w8nejRJGbumtToY|
z`SUbK)g6mWQff`bXG?c@-de-Ww&D+W;=2n@ynF7P`?BWVyQ9<g?f)x3%l?Ygl3&c_
z?^4`m<bVHidVgFsqtQ3xqOUy*SGRXsu5L(q%=}k}MVzBW?)EC{Tj#glOz6&2E7=%-
z(vWYa@#R95^;^BNZZn2VYprH^d240f2fl#aP0j~baZD}uNoM7I<uh|LLwB;X-jWYJ
z=bKYEzB9RT-+O6;u0FG!N4|IUqf-vk;$OVucg*AY{@A37M=SMw^1j%*Q+!&l<7~up
zmVWas^H5^qdeHxQ@?)1z2b8wO2HTr^yf4$>b=&tiv1sG7gvi>9-3pxX>x6gye)Bfx
z_6Pq*a_YZRdTiMOjBIM}&QG^By)j|w|Jz4<zs{Arc1V7sX#I!Ju6Ng|l$kBB{22T4
zzSYe*`4icX(`G4LyUye9x6ZiTdu?}=rqsUEf9792Ey^ZwWa^~<tDDX|@z7}ARN_>@
z=_BWUYNAR>NvPI>Kl|IJEST7=_o@1amh*Xy=FPlii_FyCid>#ybxG0p{f@Gi_8HsV
z*R)LGE;%Ub-t2LFzsR91k>>Z?*=O3yy%Jfzz~{lLnt9cQ_gEiE{eM<D>2S7A{QoC<
zbq;@$<JOD)$vgPZNywsct=8#}wF?$!PjkB%B*n5?_jV@tF<btJksC_FAAhMVd!8r1
z@z&&8VTQ>M7fsasG~vg`2A*B|=YxN4Za(tz(fy#<`H^Ya-<M80e)h5C;iI#}6xNp?
zuMX?Ex}m+hT0G;}A;JA`h1$v{7QB4lon^{-JXQ8k>}MIKNlR<ZuXcB){n?oI<4?}T
zY<o@aat*t49)-Pm4$dKau9Vj?f4CF5kb~j$Y;ntXmS(3N`cpU#aT)MC&0ev4ZMgN;
z)7xJ?GUHRQS<TaN?TX)zB=ZB;GJe`@;PlylWJ~N<zcX_=#fmNn3+KPzT6p+%_un}}
zOL$%XwQE-_e;@MVnEeU4**~ld-<7mF*0|Td{ieKOOS!;op1oJ}lDB#7yz7~IdF}5o
zJ~ah(6`!xMT8=tjb`+htny>%bdiN9S{Ot$L6WS(!%w}<FJYbT!c@{&x@_}!xY3$sa
zC&-nhE$d9vxuah6YeSPVi@kC7o!=z|zFDUZ9SIF8-C*NkI`yzIyTYGeG6&4BbFZ1a
zj7wue{<ieao&R)8|7a<PvAy!T!L}ePcJ+gED$17s`gZFZJyUzI(>mx-{X>I)j`#U5
zEW2u%_QL*7oa#%iYe&Psum-&Sn!t42a+TloNdgK_m?XG+%1#7}xhV>_@|4a{X|7hg
z%jPP~{40vDBR?UqbW1gJ0Q;`5?mymL6nrN?F<1NDm0RrT38$rJe_h;hZi4WlFG&#z
zhRvLbKO3*T72COWs@K+yeqEZ<>py>wQ#q1yJJa@N&*tvjEeT)Np3OR|sgU_=g@ozv
zZ(>YKCOeA9uGh9!4FB_Q`<}vF!;Td}6^Re5ib|bb%$jGueD&VV@}|L!vt7dc4-cP_
zi=W9h;d70DOwF-a`)+oNZC;Nzs!cdkEWdlv4y{8`dFs<{1vD?p)74{sH9?W3h&ShL
zj+`Z<0GrDN`+a}qw)}b>$*p?rJNJQ(*8FZ$=1v1~{Rycj-+Vf<?Dz7t6=HG!S51ij
ztXR2jQoE?b(Y2Ci4ARw}?oQ5`a<rjYxUYHP%6oiW6?U($&fmy+_IIqqGH;(VL5Ggk
zl@;op;Hc*nt=w-`kz%^-<%c~x+-Jl*+v5Lc(}l+A{+V2@HRgX`o3X0-W<2=#F7Oyj
zwnu<KW9RJ|XOpg0Ur`YGuwc^WxBu7pZJpoEbwjZ++-FtfH_zLC_QnPcc2+CnPwf=H
zx&N1w;Q1#G-yNlW@&v`ppBU99FfBi}>0o>3LfH^~XQLN$@7ykNShViQ>&*R3N~z}x
zZaEycurIB2ddMag@#x9b@8!I^7YEJyoyhfI>gtJJjs}m8E@9@Ka-U`O^5?qAtB$Je
z+|S=<=O7?6_m=hIHP>ybJLUy{u+lTD?5YmhYQ_|>^X9@S7DoQlofj%`=$>|e6mzP1
z``M<V#}&I>FJI0%n7chqIfwV@^UuYmL6w5{N^?W)Rs3J;{rsZ)nSXP1Y>?U&<>fj{
z<dk-9&5M&+Q+}6OXj|yq`9aw}N9Q*i#pdO&Qhk#0@4=BqH5H@0^J^MIbW_ZycCPzS
ztdT0W)-i9Tt)Gyd&#{Edg5exDShV8=5_YfTJ8~r}f3K?e+T}v$+Ttvda#&fmM9RAC
zP4syt?OEpF@Z&Xylg~T_TU{v=Zr@82{vY17UeuI%SI5)Bu<D(sY|a}oM~1N_&yn`E
zE)!YJpk%SZr!i!MmGQwtvEK?);+L$Pw9apiSoIf;5an2R6S=P|75|qn_urNOe8J~g
zJYE47PkY_-IPdPcE-qYtXU*>ozgtw|KYM5AEn+yRJB>R?^rY?HwE+P;?Q-tDPVY?E
z@FMDKfP=|rEw0<UI{&}B^y^3d!Y2Ezy}qSkr3%Y0cfY#!d*9|e?{~6GF#9G=^N9Pr
z;i#>2%!NpvJ<Nx^tz7fnUPy>%9@#HCBP1-pZ(*RO%4h!HX%>;)3{nnH_uF<aepxYj
zu2JpVfb3MqmsX7V-}S}+1mz~|e`I)RwZQKyIi5%UD3&Ts3o*5O=o8JBT3jsmVfCMj
zw;Y&4U7lqI@XTNmKahE3+mod%K@LB70-biszTsjMUl6=+uJ<=Ng}YH3?HLpKI8zq9
znQt5T<HT9Mswp;8s{HmFT~_qow<^*hJaXmN)q<x#h~{(}-0@M`SgdR-&!NcDbHiea
zOW^&VTaWrnZ<m{paj)g`86B1{ZOb2S-+7_@`*NL={}p-n<t<?2Z(mp9Zkcmw#<p!C
z-xgk1*!0L-GIX)n|3t<cD<<a@ez9_M37q?qf3G0li~hjvE1S-lX15sxN=xJ(X_}X`
z;~-mkS?<<_U#2lFpS$Vq`m9Zj*Vwp!^e+x`TvV$4_|Rb^)%fV6niJb3kMDRqYs(|w
zTM70Biv)CQG76s=ZZ)}Ra9DpQm;UW~zV!d!3RC9j{WUaWc{%4%J@fv@YR`Yn_xY75
z`?WQby~ORfeer@s<~cdbN@EH=Q`lo>ufOK9WbyHhZ<9CI{Q6fpN6c9A*<a_+7Hib3
z%+@Er6&G<VxMf<pa>c6no98!e+SB}V{n=FCwe##=E#RAf;m-k&J30Gr<gRKhF*XUV
z{+%|#mwUOm#zn6Hi%*Q9c^AZXxwZT&viZFvzhLLaJy+LX6<*5x_Q<h%{WEb&c3&p#
z=7<!J{J&vymW_o_3j5JVg+<G@*b664RaSW_v^?@+(!=0YrH;qkk0rMEyRGPryE)ft
z)oE?5aKnR>Hmvn~pTxcQ+5V^OJ2y^#ot_(^e!04FYiX#<^go}bdNp+gD1`?FN#0y5
znZ?hoBJ#&QX7vT0XE8hGroUA>ayaJFE&0NCuG`erw%qi(Gd0mhe`(Dd<-EAAt*km#
z%O>B+xxvD9XPJcB76&&or-xgsJJwXNX(+wfv*K&`!wbgu_Oi`fYG@ebGAo_Me!^OR
zj(<5<l}wknW_Pif9AI2}@okVM&+jM?GoDTQsv@3Inok1X8427rE|UIx+b!{^y=|%0
za?9hjD>5^WWjC(8yINA8Yx!<=m%sWwXHwkvU1^;)u{FzxYn#_4uV<!QW_nK1FJ?ac
z!Mu1<{LNS8aUZ#&HMMVvA7&^r3iG&S`my5VzlyeVe-bCL-)+D2pjU$_u;IMSjfd-X
z=h&DWHWdw-x%i#l3|0Ti`i8YLeq3(f)O`65i{@#|^~;K?%O>!#KAtS~|IbAMak&f6
zG8poejEeQwYnuMse&*=T*eD*`xJ`Pxi<DJk&m1ezn4-66`Wg*G$I98igD0)NtIz&+
z$!SNSVqshN?hfzC4JXfS-M6Q}<@vw7^U*pF-hJEDbn=|=qg2joN{7EiiKpE2OEXbc
z-To)#cDU&MTYdbD_KSsmpUmFd|NU5g@0vK)h`GO}1Q(n;$h#!J;deyTH?x~gJB7Es
zJ(2Rc_ujOhDU<E^J3n?TwU^@VdpYgual==3p$AzVY|mfh-D{n<!uI}}WPxZmv-9F&
z6AwD{?XLKL`lP_Y2UgD}oj&$2Okn0x12*A@^`*P5r*AlMRFiEs!<Vj4hcfKsmVPWW
z?SJMWquT$R>H9wK|0irtuxw-fmUsDnfRcD}u5x+H`vi~QUb{K3CO5r0?EWM|r03GC
zd*8!8uPU3eR6N(A{?hI9htxlX?lUyG@0inamp}1ntF!9a#D1Z|l8yg*=iC0!7cujd
zl5f1YX!p6#8dJ}<tk`~KYsA4bOZa!*y;;rbwdI<6me$tDSuYACUzN;hw)Vd-pS5w>
zCpLaHd#Sw(%YL^Un&QZ*wsyy?%Wo&>$~qbDdau7?X-naZ%sKyUy|hi5E`9kJ<Pw&%
zctf1$Z0n`#S|6M|V_P_7woK5gv-cd#7Tx~!qe<?J{#!HiRo}fN?KU1NU(5FVY(~a>
z_j{t5A6qX+uQt3dmzeS-*p1Eogq^EaUECK*_6>iXwQuQXbZlK1cqu<up)%mCg536c
zqcc9aA+?uWOq$<6-|OOBvsV9YrMG+=$E{<Nx942bdwDUuBwoO^(b{*4sK>>tySU3$
zZ#-R6rF*(cC2`jcJ-zQ%7cO)EciHcoDCS!*SvOt0WWn_vSKh7L>a8iJ7ge}-p?T?A
z(*+()j|3WjUg=bBE)Mr-YFY9zYQiitwmYAu3w?0557(Sh;jlQbciG{2vvr=A-#B%3
z*KXad6CQg^esbZh{>xwdY(1<|KJ^V9e^%~m7oCwI^8U2yw?`Wu2E0kvk`xnFdVS~W
zmH)CXT`Nw1d;QO9+K&lFhd)UOvkD%OY?!}D<o%q(W{k<Il{%>xZBzZ5|J?E2BOmx(
zQNVo8uQSSrN;|VRzT=)gbHNPdN1uX~j04J~b-iDSdc;4vvsmq4UqFh+$M2Rw!iO%u
zy_Mo*Iyqz=?{hu2i{CGvz9PRr*)K1A-qSU&_+vKCzP2KNm2}|Kz}=g7p8WE6T1(N?
z-k?u{PsJvx3ZIt9(z5fLpcLTwi+xhpne%nCa}yt2SX}jI*$?w`<&x(Yosr#?rea|5
zLt;gZrGtr0YT$m&WZu#PkrLuNc1@{VF7Yhb#`FW1hjd7aonHUHXWvXkQ(mx^|6lNU
zvd3lVrYCt(wiC8{fBIdY_A$F;)&5%o(RQt~`49T1_b*$&@L-r;{Vgw@UxBlXPWdz?
z9-Y+r!g=?CKZ&_ZVj>scfByY&_=4!>b_22Pa&u?(`OVzIJ!PfS>qq4$BL200WZ2Gf
z{_DQ=ZaLx`vhB_VDP;@X_RxC4<#yR2E&lB9<*SoY@-_GDO`Em3@msp}hj5Xf%6bbE
zj1zN~J^8(S?z8{16Iv1<&&^+1bA(B}Z`SSGr)AEwE&4n0$QqV)X3y94DCIv1{%ARe
z^Q(S~-=0^&kAHr=b8@+M{q(=Dtk#Kghl)(i+%hwu;~>+_O2?K@MQ3&-vk9+d_%`$Q
zvPDOC_-wKL)l_huUE-@)xt-;<4H+}jRhD{HKGa^BrDW%}g=Lqr5<}*HDOro`E7|cS
zQ3gUz0%GUqh#D|d9!OymsSs4zs`K+d^ZzTm=bzpj&Mag3`anW>{0!sZQ*REmv#{6v
zm@HDRvZ*5KP}hR3Zx{ss?hG;2Hjxj%FSt-Ko_~G9!~DsaSMM#qE5G1!y=EeNuF1QY
z<0Xfz5|nD&zblwspKSIyYxS{+E{`4m{vY}=y~l<7@48gKJDJjjdA-F=g?a`3Z8C1c
z_V$z7wb!lN@$P2xo>Tj_zvHa1V_8ss`yuCsMxM_*R9w3EpC}i&s1@_vR4(>l&gC|l
zg3q;ejZK{Ej*D#Dd@oe*#AlwDEPPKAn0L$HeA;u>vi{2dY5Sx#dcQxi{I!7f_bzc$
zOM}VJG71)lU3Y31Sl6NajAI?Qg=grgUtHW$;VivEZ#<U<i>7T~`1Q#~Ua?;1UraIo
zCNw=V@5okJ!?eHVLO^NPAqDY0e-*MlxUS8v4BpqXXj65$^fyj7hI6m(2uX1j+Afcs
z&?3jxbaQ*yMiEtq#hi^Uo)Xeqe)$TyxW16DEbshR^!C`9-&So$SoxEc?q}@k7m#O+
zkD0U1`|+y334uS<rkcIlb$HJG)A!%rI9>g0`GhM|elfeKX4$iIZM_(r@^1P4%XYI4
z39S9X#h|?LLuPkYi{pje2OmE*E}qTd)fakPKlN(2;M5rn>_<Z;o(hUjem~1BLA`g<
zPlg2>L;Sg0EtI+@?ThdFucF?sHAk|x+&qANucNJT-%7LFzG24y4xNxGj^TT2Q?pvR
zrAA?j>tz{D+qDii&HQgSy!K1cdL^<b?()i=ej<x)nsT*!TaFn`dF;h_I!4|-c1OUy
z<T@7a$~~WRo}Cx{VchW5<@MB%1efm46PulmtZQ?Ux})T^@6yl3t`cWAZMY{czVGKE
zH^Y$gc?PEwmkU4j+*)uaLEQAD>w*I-uPmSDCI0Wo(p?7Sf9~wI*>gc+nYwRrR>iXT
zRbFbYzcyU`p<(~_^4=}s#<v<0UnTyV@KNaA|8Fl$&$M$oJPqLcww2*P_WL7exBvZe
zCO6l>dFEAyFZsU~Zg4u_>cjARJ$wBL&-*DytyfJlsSyox^7C21zGAnV+Nb8H@(<k~
z=bZk0aC2*knf71V-|{=8D~-Rf*oseG+<oQWr33T27I`XvJb69s+0)~4k8Ijj+qO36
z`NW>!$tnJnXUOuF^U;sj<?q}wEc_atv)eP?N(h~I?!TG2{?nZ^m-|gxU9R!-j{?U9
zPLE#(#qxcXcPky<WfUyY^wNA3c(mx#hl33sg7MRSZY<EepL&C1#*#JPx4tvqeYCW@
zf$!sW_3vR3p*uWyW&ZL0OZ3cpSd#g%aa!d^7hRXL7W>Sn91rsPw_xq>iali+3wSku
z36{-pOaHmL`|J&GyVlNyqA%N{S*MpQu8nyuvpeSJ{UvTS$Lk)oOa3+zSzzdKOzP^X
zPltUUwFNC&Qypr$;f1>47A<ZLftE7)<tEk|AJjhmV0yiT^I52&aqNtH@jmBs4jAhE
z(L0z{s4shxckA{Ivr6;hEGGR4e5Q5kk#6G?R>NpljZ;(idQ3n3#pS+i$Hb+Ftxk(r
zcB-Wwd~)d5j>9*~a$3Cn%ypjes3{65A7Gd=T~4FkE{UJ(hxfMdlBrhVvFCITUEG$S
zW46G#w{3Zsa;=4Z=&Pr8Mcw+%>{6XZ8v4tRmu0;;sg+T(y5noa*3zCUJB{upepzYn
z`poRwtbG%Y%y{{_cKMXI;)i%V>Mz-U<@@m8DY4<~)6Y?B6iaQcZnOAtr0@A(53@6!
z#s2K#le_|V*DRQr`sTxv$G@30pRw0)ojG@U%9r}CYa6!JE}OgS-40v+;*~2H7{lz=
zE&9KtFV(FjY|5jx%}&RTKd|R!?u}gJ(!8qlv+Ik*U60OXsg$W|q^35m7Co1h^SzTh
zrecw;fGzX?y{{s7rn(jvU5YtheB#=g$oz`jYd3!?v?xVgSZpP}<Fbmgh}ZIpTle%Y
zs8#G_;#nTP%BZF_%wEMN{lbNM)AQ%bHe5SdJyCqy+SbJdw!Z~-O`5Rz$=N=OZTubW
zhO9m|2B(&^H|&?b<GU>9qn6TJ0jG$A2V^#}Oey|cc$>pTu|K5Pb&1o775O2T*^i%0
zy~(ynYyQ0A{x?Odns@W2KR;$V$I#;E7OtIFi`ORAx^qrV64+?!aH={n>SQlNsD75!
z#$zp-N>{f=&3rY@_`@=59<x(=?Pc$0|Jk$l=j)$=vM&W+GBW+Uw<`ScY!>(Uy@vAy
zZIhxcIqdJL9aR#ZcBs$PE=M7!Ib~I&lOXT89pMck0bQ$;KR=sb(Q|vA?76QVf|7Ty
z3wfPu-jm}zGyL#@hS!zX6hGWITl2Ov;L>#4jb^b|CUO0<RbDam;>?+o&ZV4ta<l1E
zbn$P+<#Se=D9q|<dY5v}Wrkqf@ziUTQ)|<<m$xb|jreJD?CA6lX1k^ZT;05BW|GhB
z7n+mZO5H8DsmkokzB{pa)kD!T#<FWli_|-}mai7N{ouXWao2wukJGF_`lr7y-qOa+
zmDce@G_d5+@uiNlw#_-YdrnPr&xcSebtZ<S%x1PdWx3WY7K>SLP08>MKFqnWB9S3v
z`+I(y?={y>%#>c+H;L!-&t;2ErzCy)Y$Y!-_xrTZqEl<rS^fmZ6)l_??!eDlI4Sx|
zdc5<pl*c<Qr=K-9S-r(hURCLtjoWQU-j-~s#Sd?57bq;*^5v*3;|8V`Z!TMUNF}a*
zH|qwAf%0Veg05x<llePbYQKNVdePuwq<Ea!xL$3t?W}3}YHoej4rzv;TgwEj88@u;
zdim`}dTrN{u3O5v?@st_ve90{ai};vo+(&p5%W8fg|SP-D&DlO%k~QK-ljZv?>pC?
z-oW=f8@I=3eKY-T)vzw=|9#Wf@0zbH-KZp8v3N-&+s)%Qrf4SWKND`S4p5uyZ`;4;
zMCylI`_|VP-97hcb<n$-f3qY`#Y9}5<yQ6Vgw%xmMDdmPmwVM*GiIK9<@clh2E!Xk
z-0zE&xKD>pcY8AP*73^D`-ZKVf*=2W60B7^S@%QlMbgj6%aM1)GFP4m*!!<2>F-a!
zX)&|2b!+}?e)zW{<b;W<A@}92GuxRyR$oipq;6lkz`k$$36|%tC$F<~%xhM8*s^i<
zPs8;l<_i7pS5of$b=W%pf^tM-hQ51BY<gms^XXd;_?egYSMRwtp{LZ^>16ig*!R;6
zjXrYj&3}IV%j62)7@KvvDeoKC9pnkscxT*HFzLD@Lu)smN!Go4FSa!r#?`#9sOJoH
zFR@=YdF>Xb{BOrLXl00=typ!Rc>%{%x%tZ5@10;YKYpYvn<tX@7w7!;pY@u3pPXKF
z%rH?4tMO~zSJP2B?N^^~Hn;cdok{!8UVL^tMlNlA<CCAvmTWJSz2oJtyRFPO<@Vb0
z|KK$3ugpu%Pigc#=c^%Qek3BvjPvVOnGX?J&Pp~bMHTK&I#p|!Z9cbbu6J(GPcLy6
zhIu~uGbRh>Fw6Gl#;q6FYQh;VwEF1QcUi)|3zzA*?k)P~J}I#B#@Fi%ioX6ILVm{|
zJ-)xU+A+E-_jZGy4ri>T>pbSaN`>KG5`w0@LAJLF0)!Ozy!<Vc<7Iv|Cgo9&>X%hb
z_wO`XnAR5UmVfc5;(UtDQ<LbAQg7eR+I2MR%F=J9;UY_~uD<!w|M26fUp)4U+N)V+
zuG9Ox|6$K{7tdct8>GJab{9svd7iPViS2i^=X&bHY0R=J-d|$5^$xLVQOiS)8SlC2
zy<U9=-`Wi|eGbzX>=8DNvh?k^U&|y}^Kp?l_a<q{g;pz{UtcP>LFt6eBgYrVs_#yj
zlJ562+AZn=yP0O^HxrXT)s8C<b{%C@IB>v!%1o96pLt@ozn!W6$<6NTmTBsZ&KK?;
zncKVi*XDwUd+HX|KQA=Dp0O;@?cSef`}$1_-Bv2xdnCSWe%ZIP_a+9i7{BRgP+NE`
z$+;l>z)!2N$PdA5e)--wFZQT(SwQ29X%Qj?-=0qBb!hJ_-@W`yWZ<ny9(Rk3COo{m
z?No+3Ps6vptKT+O?~qL??q{2rsQ+Z)KE8`fj5w4R9$&ssx<5Jbr|9?c?RTed-MQ2+
zg1N~yAKT(zQ!{e|)`Q$mN9}iQUiQMm=99OV@~<BY=dyd8oZ0F+ZHmLzaI3y$f?I9{
zuhvZT&MN)Qkydghee?Y7XZk%??O$-a&N?xvehZfjOO;-hjm7SA1H-a8>Y-<RMeom5
z%(ZdV%CR&&CzA2G!Ou-e_U_E!M0-n(nB!qrwl6+fIQ7rAYKCv$0+$xv<9Od1{pF_1
z9shgVSok;oIjkPjf9;sjiu8>~<nHg>w^q+C`$eW}?**yN+zx-6S90H5AiL&```gnm
z`{yx!>fBTlzN)zQYpLlq(`&(b?wJcesJ&^m6;5|BUGr+Ipl4faR-*9qfb$!A13qzw
zPhzY2qx$br{KrK9`U0-SqMnQDK5iG3?K~``UENZUr7!(BD8QjW_ksANl{U-D4}FQv
zIx+i$hElY<xpdt8ugwi7io#vD{p-^B>RYa+y!2}Ox({WU<r4+%Dvsrs@8}Ow4r7=$
z)4AV$TjAB(+KKTm_%6PVUcKe{=AH$byIyu2O_BNVJ52wy;)$7M(OXt?9gXy`(br4e
zC3_>-;kEMeJ-<2PzHFHk{eN*$wEKyjojVI<#7iqZy50!RUB+SYcHfTNp1VO@CRu-4
zKK$fqmEc=(_ZEli+Wj^Qi*6h~+xpm2eomcZ;DG{ho80Q{kCR@nZT8K6bYJ*y-id#T
z&CCW1eY~swa<i|Rz4zOX>)#r_=XkZn->rA}^1(}3Zuh3JJ$#ZIet*81`{%auuU8lN
zq88qkD7ybPD{t|G8~O>6>#~dgUYt;Nv(#$QCF?^CbKUe-6z|x=w&MSXSKFG`uKKce
zKd-p)@%n=gig><@I!uwiS+F4f`pMcE%YMANCl|`eJfWBS=<<TVZDk8w6Hf6-e4lTA
z=F-`Qzl>b6nM{wD_V$NXpNX%oHfVjYcf(D_J5lFkznsmQQ_T@p@?$~u`IiS0zn!qX
z&OU#B+>IMu$G_hccUrq4@y439zb9W+*?nA5dX0_lbxZeq*I6BYb?AI~bJg1GQp2>q
zy{4Cqer&0hj98?2x9$2&m(BAE{xz>JpA?vpb?2jNbkUc0Z{N!B`MuBJetJ5{H~y2|
z`z2);o-J7*SH^#ov)#bzi01m!N(q;{_$BHOO!Ik~I@4G8=~K@m8Y`FZWf$x-us<0+
zS#BfW{d51K>?6;wE4Nb4WD?x@vh=&52-}Q3dM(e448Gl~kNFk*nCC^$Z}*P6vh{zq
zPv3v#Sc;D0yF0Ae^-q&$TkYScCfPJ&VV&2F*B`9@iGB{@?o{e{+i2RJGx1bxCEH)I
zlnb?m@$IgizZD;xKQsB6M671IQ%3%_r`@xqgZ_Sz{ug;lLp*K&fuF9sVk=r+tPMPn
z<@iJ6^6O6`k0WolF6EYxO72<`H#yY&Wvi2%*vzj+%QJFb^eHTt<h*B~u~u7kVgHHu
z7mKRo!xAK$?|tC7Kea;t`o=rb4Az=2k}@y7?{3~S=jXTOC65djUln~cYvJF*seNI5
zuJ4vJNk0@l{cl!e!cwdC@jc(!l=4gKQ<Nji-Dc+3h<GpcPMx{E>Bszgu{Xk(*qo_s
zasR|OC1LO5;thL)wKD7enl0;ToZPhcW!S6k_o}mG-BvtEpC9UN@yA*5Ft1+5>r>|p
zUe<CSnh<k3$1qk%vupi}#s@3=%vs}79>zU-!_3mPBDnjIR8Hm3W&hS%ZNK2e_I_R9
zLDBQm$}atGUFi5)Wb?{$|6PWT$r{UQA3r|naQxBfsG|~VgabUDF*O@?HD=`8`)yq?
zw|95t_DkuK?`}xE+uobPyFWn4+%i?)=;j=Yy#eeoJxQ?}7B3da-KzI&&axBF-4{Gm
z-?HfOoEZl1cQM@j^H|zIr=wCa(Ks+*wr<k0@SmP}?QzSWeUbLCbn8sLefsAXo@E7Y
z>|YK`7<_g=TlM3nmzlHROO5D>J(8|lt}yzWJP(>F^o8&C4fjQ|9{=acOy6)eXzS(K
z$>$D9O^Up*N%yb(4Tn?e5^wz1^_{qU-u#VzljU-qqhDw1yScvBcoO3AY{wBz2C<7?
zdd_keq*On*JuePxx-{#E)P;=-i*|p%EvL27j`dh{%bus6&a&m&`==CU1W0(5EdF_3
zCjO@HqHV`g`)2BAI7HP;)f~DIds?jYPl~QucI4CVt>P~WFUK9YBXgi;)~^Zrd*TiD
zi%wZ(pf4Q$cKNeD{<Z3t-daqG_+Tx#{p3}dzpweKN<!WQy4lPwUdzCp^2&!fMCa_r
zS)xyLkKNjud98H$$7x;3ZAJSuvddH-Rtr?Heu(s}dy)Qd%@u9W3NDi`x18UftyK`+
z*5CE#^pwxfif0r&O<i?S*U(LbOLLq50~Y&w-dMNw1^fBFN{e54(YfbV)n8806(+0~
zgD0)XfA#jk;zN=exo<_1cD?9)v2d$*V9h*f`ItR16OH8g8swIp%$Bn<So&khttjTq
z&AgA=nNN80{|jVEp1;mIn)CIG?5sbJdepOH^=C)lO0VEkFw;t$zvY1V_m~b1UIq8i
z5T5Mi1@8Me|MjXoC<=DW>sfv7)q0oxcK>GbO=fA_Sgvqs$$73RQ$)L-C?u~f)@zyk
zi|r-TstGv(n@>)<uymDbe(e8kmkYG7o62vVyEx71U%+4f*^1n3OI}$%toYe5^^4o)
zl|?h6Jey{@gnXNB^DJ#!&5ys=vxK;#yRP)OP5;pO*u}ml{8HKmx4?$>$$a-D-|Bws
z{P)9mPJQ%(pYI=pr+ySr2xB`tLr*wWH|p|dz08c~(yKzNfATLBGAew<ygcB3lkERx
zM=q?nE55-*W~%%#j*7!<FCtbelowjwo^iB}@5}4Of?q5S2v0VbtC+c8<D&Xr`^Rn_
z{2BkV9&2g-bMRf4zSDSD^gl64mZe{x%w4oCOJ2n>QJW!qne~o}W2w3;*bl0@O_yP1
z>IrbnWA4j~XSHi$Nf6g~wA}ghuN|lEX9R4vICj@cY5!EO(<(aeXA6t_Psl0o|G(!;
zXsBED`n*<;(|V!HXS9Fb@bc}(LwS|fKOZf-(L0lQgQmplNvU4D>W}{2zi^Wwcdp59
zS=ApxC(E^(**M#~J(nsm->Yz)tf3jRrS>LcQPPI3vhOzESNa<A=it7MS4X?w&Efw1
z|6}garm3?SH|F29?9BMO+n2wj`0uan`roYA|Bh6X+u8c-fRW#xo)@d$`HQ}0w0hqg
zd||^fF_G;DTIW9ab)8$)ZTY(IrfzfkTaW)d^HYy)!OlrGJM)jJeP5@u<-@C4j3UXW
z_Oyw86Jc2yFItu(df>2AetmS$(pR^q{oLJC${n_CtE<-CH*VjB%l`Z{_{sB#bH{w<
z-@>oAn&jA-eiy%g&R;>WxSHo4^O{$CRv5l5nDw%Z%iLK#Mg3}8!?tS8#FIYPzWfO<
znkFg1v$d1Wxb1C{^8ap**vYL$GER$MhVRP@xG?3n48w%XJ-&9QR3<IFp}}Pp!8e&z
zse4vjTToJimEjyt<CTe-A}P-oZxvz`aanfn%Q<7dQ)ZVICLG<evP*C8l8o)wuT5CX
zkX~VGUKDy{FN4>`oXAjD$;0`olbMoc-&AkB$}Smu?rUW?+XCN>9CrVv+!nl&XZJE)
zuWliSdS761(@Ej}^0yArAMNiyxh?#By}bF$Do0KSfuIE{>$b?Jd2c-P#OPJy<q1F1
zBd^xH==i=~!o1Ds*Ib1(Q`M#0-ibO-QkpWWwr7R;?mk0%=B&c~b3VHr|EIOuFnigB
z_$+s$g)Oh<rA$4)WrxW=FBZFyq$z!zH!?y?&*$BZPG~&Zw8Jq>vD-RsR#enh@r-qH
zH`bXiQLkLdF!T5i0nUt!ZM?RdOm4B6-u9iFeSeM1TfQ8vZ|lCt`L5ZwPpT}kX2Kou
z%&^`0OOO00db~TVW8XFA)9IVe{7SsQed%%j-*x|frChU?s{Uln@^q#3^<}L-mf9PC
zRbOQ5FnsN4*s(3DXO&Fqu7zLzE~!^mzxS8zj<t@ZI9ut4xoKT{sxPh2e^uWuv%l21
z@x+9i$(3&n6~r5(PO|!aeJPk`Y-jFvXj1*;Vy1~UM_aC@-6)wS)&J+rhh*LZ%e+@}
zyjA#G6ZU6?!1k4=7Q_bdraE`b+Ma(y&oS+QhOt=VJ8Kt%o8?RyD)VHHT};n8!FbV#
z_o?&C0P(2c^&R)c?OZ2+TFc?cBCH>_seQ?X^;Xg@5s7=W3!mNRkbWDtV5SWdkMSnM
zOSx<r8|1rQbYFVD`1B0!?45aqZ(e&nG7~%`mYKd<gWLLNLYMgDv(IdboVUCEz5nQ+
zhA-d4l9Md4?9<x2s*}`Jm%UH=>m=Q}O?`XVk%birUsEDHR<*L(DZII@vGu86*DcRU
z=jNY0)qRsC;`9Gm%W6eeEb*OQ?{v>_u~y-ktR|0-Gd<5_SJ-ZG^iUG;+s4XcFISg*
zFevux?0-?k2VZlko#sfciJZ!CW%c4sY`@;TJ@w`X*FFBSrcKwHRZSk=+&@V-TV+B`
z_uPlUXIDMkHfPCIwv9j2d8V8cl;5&K=l;fw;>qp8Pye~doS6M)+XC^k$-!4MHkR;s
z8r$AZ*jP}r_RW5=l)%~9Y0=`BuD+JJ*V$>ZEVkp&ud*wz4wWdoaV)tv$t-X?i||7}
z!^!e($sNmrL*)L&=`GOh)6Y;6{u5x&u7BmpcFR-klVZ1XP3zX59It!z|Erq&9X%g<
zeQY_MD(#|O>IM7Q0}lOS`yp`1L4}WVx4C14v@5%kdZ~5n6y6iZZC`9Zd6d!FuE9cd
z*F_%o`WvZ@hcv&t9F&sr{&rQ}!nT67)cKkllh6jcwv4y0*##DRuAHd2&TjAL2a8Mo
zSZA|eUh+w?)8W&y3N=?7z89tZfn3M)vgd8%y&#voZz(@t?TY==o_NM5$q2SqEB$x8
zv3i;N?NzGF;@ADK+G!+WF8}YQe!K|(o|pY6FL5Ola@<(op!8E%O>nmoSN!$7b|Lmm
zkCSU2Uhn;ornlgNcSORsXXlSQ$i0cu<9vSc$PS(I(+5{strx#wem8$l$}*|>6FisR
zUQ?a8_kyJ(>ulpsRnwb7*o4AL>=QqqD7k#Fv+wu2Q1M%nC4cQ})^c7F%~z9?D#M;x
z?qo2#^ULLe-zSbu-Yw=;Bh)7DT(jrHuYV{1E??Wr^JDj%l|NV?`0||15aYFOc0TcQ
z?XP>0;a6w%NVflHT_Pk?ol<oDRNo)Rmshnm1XyKyN|Y!sxhgR4r}D`?GoD?2H_a;U
z;rEIedaarB)*U$aJ;_}&{kB@;@`Zm*r~5zD^4hzcCv}HRoSVy+cRIbwtG3KL$Se?%
zsTi_SAZ`Ct_w>w=&2kQp?rw3_d1q;7bI0e4UV_ff!yLSOo%o;oN#sj2nFgC~k4{Ky
zV_ccZwV*6~LCTCLem51jJbAg*-g((e+0a|vU6v1v3X54byQQDq%JFPc?74}m`#pT+
z6>?5LoMH8;Z^i0wxmn9Ht%ZZmoQ^vy>Mqr<aL7Bh(`&zd#s;A!b1po-xcc{8PjBOL
zk@A{vx03qr6@U0xZg=wgrJoTpQ9P6W{k<7*?SXE^=H?9-t^}NO`=g|^{7PovN3lF#
z)+a~o{3KaEs=uyTb8wgK;jFKZr%v8g){}0rP-YFwGLK0Xhbp;+eFL@me&`>)IQLiB
za^+V2$?2?@LKlaIUzu*Q=HLd2U6IeM4)<R>7XSG9pQ)SF=B-;{?`d&;dfMdVb2ees
zNo$w`j!vCDt@Nc1U$CC&yC142wdPIS&+z^1*ZAV%P&Ur;-~)QIJFcJ0;hdRxD!%oF
z)2~8{-8QR@G+lE(EqKr!@K|!~{PmuV8%6FK=>Csd*<A2KF~7!uf#uAJd%F+hmTX<H
zL|>r!*o?jz?(P#~kEgk%PG-E7+`7?BCS3o(y(Oo1o%tT?SCxI$Lw9$vpUoq$D?5&}
z@pngF^;`1VVrSTdxl=bvtd<gH=AFKK{|A$+!Qx@BHN}qKw6%Y{CY@!IO7l{ND8siR
zxtF)jyQ6NW;=!oN#K@<{b$IPI%jGvGpKO!$iu*dH@QswzMX9<A|6j$MN%ia8eaQIt
z!$Y}<`Swe89Q)BOv23q<*vW*TPp%$|PjYt{{hfXHF8^#>1)I#MZL<rn#)dSoJBqkJ
zEj!?RCowwZ>&4jiGw&o$n<U<MS2*1NWV8DvrR7&Me%*Dm)V&e2fO!>DOhoyskOQ3k
zk8V$S=CF0^-1Tcc=OksGyKtv&G2ha6Ihyk&+;;s}p6cu-xG4MKT-VQ`Q`9BC`}-#s
zeqEw{%$|MA<Z0@680>X-6<u1ABzX6({&xfCEbZ-&H!hFY=d!!~DW+5-#$07%XujoH
z%}Viw{K_|+LZTN6U4GuS=l!hkX`f=}zBMmteAyM>wnLfmkM*5Dp)2x>Rl~NV-DGU8
zKP>g;`5L(c)5?Bl&X}Jpt1l3I{zX=P$)kotmDAEz$Ha8T=}1XGW!e_E?dKZtDM9bj
zOS~@a+NQBtzb!sFUas=+Vxh=n?$ehPJDz=1c-yBhv!m*QY4e7}zihf~7Vq6FS4t*6
zKQ3s^VHNM(n%UmWx#?s6ksA!E5lPIlIoJN_yuJR(JaHla$JN&t{a>w7cY5Qbdza?q
zp2*o^!}{o0--)w)G7B#%)pH&C!9QDTW5WJ-7nQDm_vY$hP@5)kPitXA+JdBi3;Q2c
z@jq~7GmAdEzC`2a)ra@mFT7r(cO~zu<&+m(`z{?dv7dZ+r||7bZ6{{j75i5rf7Lc5
z+1~bf=5b})64pP<T2=@~J9l3aZ(Yx}q38G8#yfAcd7s@4@F`9CZ^?htDZ$Y**33@h
z!Qrhlo108)-ug(HY4lmz?>3Zt;g>4$qT#FV<Chu<hZ1$Tv+cO{i|j4xytdf+qMg;l
z#^W2iGWN|BNmyC=_xkdt(8JgFSt~3M-{x?^?ZU?w#XmmFn_W(~x_Wl?-?rpqy8<8h
zCLS*SVehu0bk`aGJWu=0=eOUV>i#`R+gMh1<>C`h4?0_~-*(qr>g%=4Z*v>Yu<x;K
ztgJrz`MPM<TAP=t$tOa$8T;Iw*p|5IdGz$4expfo&95#lUC;5QPl!S2r^WC44_-H4
zV{d5={QG2c+l+*n+gLswVL1|ZHB;^HhpfaNnN3`6j>3~zC;i|IeGwCK<L+MHt37>R
zE0{REI@4B9iF3FRHiLW7s?YmR_FsHqy7bnZ+m}xq*p<}6^=2VMbJF^UB{k2Fg;(@6
zrEIdFu<Wi$ed^it`bObZ2WGSVuXpO;m|vIYktx1>bL6FG?U&hFLhowdJMk%tPc@VC
za7XUH+H+mMLmVxORlcz8PPzQixYj~CDvUdCxfO$7?v2U26fX3YyIQ?TymD&qq4#qt
zq8*>T6~8n&sd?UeBevW9lcfVbIGRiD(S5mi9#`O#w+k=wyqfNJb$O@r>TPGf^|ZFw
zYR3v*obv2u`1kDTuNd#FzMFM$_rEpKDHCF4G*%nl|M2MdyZ3H~a?WovY}s~S$t=1@
z?*6RGqi-!1rQMo!v`;XpJTIr<n%K5q=VN4wx1C)5z~k^l&1WZ{KjYs#XH#(T1LHNb
z`IcXNx~N64S)etqw67rM($<Z3Y;s-RyG1&#zT7|Og-`SPjA*?rX$;*--0|C!zxbMe
z=`Rc4|D)GLP9kvO-J1czON`#_-CEzaFX!cYt~GVHa;_Ydob0ly^0&k772gaPlZv<U
z-@ToFV5@_%#ue*_%8nvC?0cm3R%Qr(y1RL*)FvTqA7$^w39Ktpe*9@`IDE(~XMx4$
z2OAOtZm{@lK5iE79F)4Er15g-%pJ?GZ)x}IX1*Z(!e;xup!`z1sF{0?H%;fN%nMhT
zW*EO!CSWmJ|86~@gx7kpzk9Nae((SCbk-rE`EP_?erZ{<*j#g8%PcdgfB9l|w@%Dk
zEVW8JM8xdgW{2dnhYKEGSQp`P;?C=BT;0DJ*2o>~<5pMCFmP>NU+;V)VOgt8V0&=g
zzEZx-%bVCD^scl#k<WW_GdlOjwG~Ybymy0t^Bk4*uVX5z-*(e9u~j!~*TIGa--+RS
z1dRg!6h05FDSlAlb#e*&ryo}Tc(}g(<BEK=Nv&hA)6#_cX^&Rq{+zPbL72x`?eDDP
zS5kb>ZjmfHF4^RKjqOREL&UP89djb$H<_G2qcZV5+y0%MT^Wp5u01<yyf$LdPyNRw
zk1if9y|3sUboff~*Yg)^FLix+`HHz^nSj|DnciYS`JP=?Pd|4o(miDmQol*_$VaKg
zqN^qTyl43=cU$1l#*DPNiAxKPCO(a5cG>Uyjp@;PlU%c7AFbwRNSYe|)>84=FTnJn
zOVNq_!yV~wmsZ|dynR;kO~EJYBwg2cuvTn}Ir>kgRVrp<tNWDu+q|A^er_LFF<-B7
zsv?hioyhKmi;f@5yIq$Zb4*AjX3i!TiSOL*uZuPpG05*!uHCrd2Z#60dy3*W+x8l+
zOlrGq;wlxjVWG}_PE`%Q$DXzV*PWJ6ITpL~QOCNdM2D?0eG~Iv|8SVLJ1K<i#~0B%
zCfC~YuP*P1zO^Ou{M1I_W&fvt?ce_QoRh7=;X{#+bLQ%u;_6_!@hjqx?8+vS6Z$dv
z{An)lub$qrZ^MMh*N3+3+M9WJmvv!Dr0HDtjYiQ=cvw;mbR*j~q#X$^n0(OT($VA`
z_RuG8?E(fG>)H61Zdy?LS3_E9!Ta~K7=zvZd0tt!!FKXHFNdvdxk8_ANLnvDet6N&
zJ(5k1viaRCEDq7TnKw&3czN^BE6;~lvQ95}eY}B5AdD*@bd&0~U91Vkr^>&+^V9j6
zctHPhXK=_{cWW!z6Fk00w9LZHSUDs#D&I%UFtocJT>aiB_Ip+-quaq4mmAY1ma4~d
z82Mx!bNqYN^xx)+DbIfzcgsFCyYNWETy5@T$+`>yzn5uxEsN&F6cj!@_->2t!sH*C
zT@m%qmvG111U4I#KVy=6>~6btVVy`(akAh;&QnP%)_#8&|E+X&OCE>I`wN*XyKX4%
zKKroBY~`DG{kL5{l{^m1jJ>&H!}gm$3wwmS71=na?JC`L=ykfl^Jy`M88<ZgNb+iE
zB(Qqj3;vsSqUhK;%kEuf7SV6-oD12l&OWC!_0%SBk#0v_|A%vBPh>nTeLU%1mv2V(
zTAPI_M>2BG*@RY3(ULyOKP4kY-MxC1-c%jM_XSVWgHOCXs&>$2rqiq*^Vew_?`t$0
z=HAKrJ@wD58}Cf{7EJyn{om}j0{^!7wafg41%G<aYPfv3TE0LdCNA?SoAWWh%3X5H
zZn6j*TT*k*>BZUSV*jW7RrXrie1vOvyWK{!jsw~kc4U887;%QVyYzdvh}Eu=ApgF;
zORZZw4lh1$b2I&DFZ*5lA0nI|-p~BQm2Wt0QRmMm_4PIDFM0;rEn)2NsZyEu@b3bj
z!@u1;Z!ML*Rh1Q8H23b>$@j}sHru^)eJ{Lo$IHdB=U3NE<V#woVO1?_J?F;M44#Z`
zX4!(89rCA4=I^|{=~5)8!<yoq6<VT|tnu@i({K0t=5H#rwsT%$AY-;sQKOOPUVuo{
z7K^H8?bF-V{%8LeKTB+0k>9tM25Sz>oMIC8-1pML==FW$?%R8h=-VmD{haoKcR>V?
z)Q9Vz*lTv|v<qDNqmglLbjiDWyO&FeANF1JU!m?@^F4#^%eo8d_@&CP2nA(_miKG1
zzHbytXAaHoz7y<nb-l~ilg~0Te=;|ga&Y{+{5n?Qvt39GH;3w;(@H+47yjMTAa?Q2
z;>b!S-&qnx`IGIw**OWnEKD{@t!wOA?qHg4&v^3ohSRIscFzhGk}+Y|mF#_Nw@e`F
z?ZU|i|8HNTtUO7__;KQLNjtNg`&`^d|6h;Zd(KPx$h3xPYkrnjJcm<C#2C#~&erR4
z8CS-~$1SiFyq@$d<MDyz;j-@B`}FT8{|i-dytgzXLF(I*`6i}ug744ooPP4-iS2@_
zXL-)O3M@*K|8&Ped8+B$q|nv3E`6E5YN1%9^rc+ELu!AH$ecf1FZqV={OtC-XYPdU
zDO|XyYG3{f`Mdk?3P>ogZk(>&|MHCbSv&2vno8xZ%>R#m*ErR<bF=H8Wv#v(ewzQ+
zit4r*g{*q;hJ8tL$SqUWJ=2yRYt2}mwcesSyQ$b|W{H2yXY)!Y^A}srUX<FNwrxf8
zg%i8D6rbnsVY8hdrkT`W{3CMHQoVq!%b6B9&GXQ>+d4H>X-3YZ<HcJ|J04Dc<@x2u
zOBcE53bpDvZ~i$Qd|EKyIJT|U;IW+CI))u*W?MgYG}6&M$~#f&`c&Pusjioe+2?To
zIp(tE$ZgSW+dL-3F|RkOUoODlA@wx%!R$Nt`?kyOYneFRM#x0Hxck!`mWN@F=Bz$p
zRq{;d>Bjq7UcXIV-79hbH>tJ1U^+vK#gmEO<UV|yrPy}mxA%%5xxIb2cyeD%y7VW7
z*;dcjJSP6w()ZKm*RJhqWE4O7eOrvX(~VUJT8=w$Wd3H~9#_2B;(?;b`I!0V&lM*=
zXjp&Z(VDYSMZt3V<=W2zigs)MI``1ZQe6FX;hh<36Rp}S`1uy|-?)FHC0#i(;d-ZE
z*JYjJUG@3j-M#v`5BBZNTK=mpKx<!(3(M_v87JOv(%ikjeR~fvg{}MTqANCgX*gfS
zUZV|@Rti`JaeSR&Dxbqv%lv6hg@Z-N<HuJUndSHBRG#~`Ed7wjYl)S8;l2Miy|>?0
z#JT>;wpxih9t*tpA6UDbf&I&`Gs-X5aV05VDd+m0%(v07YTpd!C2byMjXNH`>Ep?~
zS8w)D>nZPjol}1%6)hFD$XsvAw(jj>=d>eH_nnu#UdL&)$CPE+x>+k`b-Vq}DcBHT
zHS5uiW7WZDQ;Ve;e2-@*ewPfq^308Kjl~43#NSb>w{~c=H7!oQrL4RARKwJr55(Ce
z%w9$7voDCd>2D`JuZVp<Z$(k)kz)&1Ggllxs_E%l8@2R9%|!O{^HoM#o95+2?a|og
z^Idt(+qnlO=*P-@uM-n|GgH;z=${2f4;Gd7rF%X9RBNqe5wpXQm+|oK?#t17c0YoD
zJ*(TsbgjIhF}s_s>-fI?`-+amI_;b*e&^1Fur|*p9bwl*93K_VS#N!-@!B4>_SPCZ
z#oqz7eM=`+AM9OfH+eCatVB|9mz~|=mB-J_Gky7*ZPH=8wfpW{KihY)V}IT9$jeWq
zWXil}%~<zQ+CJ~TvEZfp6JB!?Z<aMQT>me0<CmAk?a-)IN*m^|{eHXlv`6n<7UN#O
zRUcUe3|g-x_sg&g3Kk1E|JYyRaM0k}qNnOFrvF~{JvTf1$e%5BSw>n49nrd<+#mBE
z$;i4k(dnann%b{Zv+|f9>~eCEREm{woq46>&E?(?4KkaBjq^X{FfR+$J5bB!{pUK*
zrn%|jvG>o{eqO?56LrLD?LF?2+k5m)KCM-L<NZh^*eX@oTIH<)%gtqT&p(P-%Nx9E
zLj0ZQW;0$W?DGoaNZ6o$y*#pW@w@q|*M+@0_Dct{)o`zx8RNTk?uBU?dF6i;wzYhb
zW){-3e(b^W^V74Sb8Wis<?iP6GuLf+tyCQOmajGP*r6#lS3i{gabBD^w}ow;$+`ZY
zKdV^srky&ve&z1j9!q+)1C35TUoT_Cz~`eYEy1<OZ_O@mf#q7QCja*C_IP>bUDb|~
zkQYILUA=q<8V{^s-|{8$h~b(9w~LSVY-3h!Jk#`jU)$S%`8`f72U;CI%O!n}czavo
zsha%3|6AfG{N3T@*%(_d6A|UHIHe=<jgf!lBR$3M{w*#AZy3cU9}t`{<G1OYlfR-3
zPi~wyMLb(H>&U$8VaICS4oHOU?|sE}zv5tb{~X32M!$|s_g?1n!(#KQ^;spI?q8ls
z7TGYrdCRJ~Y~K8>)-#IYY`jxX`ki?GE49&dA*b-$Q~PH-F7!T}xViAsj%@D9H&ge>
zwCmiE@QP~9lzzB*d+^y!Qh}mreb;KTKIv&ZD7DKn+Ik~q4ev&-SAXUnyLK_t;^oOm
zmQ?<I#gi2(>YnbiG-8cu^HFokbN;hzy_mZ7{?Z40a@=Qc@tl{)5@bGd`+EM)1zO_o
zQ}r|EerwT)SfyQ|^(E|A+n@fE7H`r!>`ojDlys2p^?B0dvw-u|yHlGMigG^Hi{#ur
zcijOW&AOv0337I(d|}0ES{4p&9hcM=U!Ejmppok+)~Y(8DZ<O|X=pj`!ds85jtl+w
zf2eKrIQ^6QJhA&nV|^d4U!%KY*4bazO?R{QM|z$S$V_stuWF4?e(EIOCs-ZfDd8+~
z^le4grp)WV+LHdB_PYCQn%=xGZh^;C`2N0<VLIlX{_Xk4yv9@VUf&z<|6`jgWG{5(
z?|;|*>sR~kyYX*nL9X(){fx1~t9C6^dnbQ{`*2%wn1rWB+~2ic4Q|5IW>0FXivK2G
zzjW1IS)Hz=S?^}fbMJmzsyA)H1BHy2yQ;hYa|+J$m*U-1xTw@hq9^TpV9&;xE`L?N
zPxj2Z-o0RInZ*l(|E?QM&g6W&Y`sfs9h2K))$q1V%OmH@TqK)|rs%kPrm){%ckO4^
z(}cyvmpANuw$(eqJK*Uj`+dzJafQ7_0_B<v6EsRpj+}q#A8@tDCd)&%-u{Qwb=jrU
z7w%5c?mq8XKSk8$tNHWH)Z%4q1p)h>WaoX~miN=Lk$a((Ym;MD^y&YRO|=fM>sPp4
zyjjkte(UX$-L>*brq8x5ta@?c(*(f>-zNzwY^whLDcI$%gRbI?>Q`Go9Wc6@^3T#e
z$!LuhufUhztx*+!g<h|mnW$&ASm#Ewzh35qGATJhgPo}-)^jEO)819JX6ZII*Tp>#
z_)PDo1tqQJ&-!wgH>fnH@8+UgP4i{nE`7Oz!*FZ=AzKeE#%&#q*R4d)o|DU}3h6tP
zrc?7=`RuG!d)w++-UW7@4wk6fT6DT5ys`Cq_|2$;)ebJ!hp&CC@-W@&ao3<?Rr!nu
zimzlEyLTj2sW0EVMSEe%`b(14UT5V0mw$dT_rJXC%^UMV5-ud`b)Sfvz<Sh+r}uJl
zOafQWud@y(MLMNbc>?AoKU3#ed9-Cwg!X-LiPg0i9$2;rc=K(!7;^mC7O%M$)1KMO
zzu3;Exc;9`k08^oXwh!pKc>BGeFv0x%2#hKc6ye$yWpc{%N30Pg_qJVp4;YrUOD0A
zv3<N*O_p)H#c!;ul~I4lpTC09Rrpr=r;usKw9MjlY?nN~=%CfXeci}io0)TmhHkO7
z!NMK?=f)NI1{Wk&Jvfxqp>MJ}BsPsl>L8<tyl%YIokd&ncpfi)v{!h7&!S51+K}Rk
z4L2{`%?zCVhiks>kqPN}>;7^_3)bwq^Jw$R&y$24G9o93t85oGby6}4<ox-`{dkJn
z^Rz(A3y;i2|E^6n)?M@6Q1#=t9b0PMZSFm-h_uVNnsz9I^WwU16?-qcM=ard`0DJ_
zME>*pdRy1B?krbbX=Qt$?ndXLCtt4c&y)Sb`d;$%<O?B-b{XxjuuQn=Rc-oDU1RO_
zutv7~-HQ(!1-$pUAo2I#mPr3no4ab+MHg=@aBi}ey_bD0>L81)XMaUupNL78`SB28
zo_S(BZ~o0}Ytt*t)7bHSm&Y^Fv?o5-t$#HacpZ;n^N8Itu~fIJ`BBK(r0{ts`7OTf
z%C`+DzjSKZ!YiGHE+IvtZ@YUpY?oVF95-_p=gz$9Nn$?7nHMa);K2St&sZ+GCj5)Z
z&Cl1bsBL+o@_SY9mS+Zccip=wKjE^i$tlYTpO@&}-%@cVX6c(Z^15I5cic;8|DW?{
z#;fNxu^FvXF3-NP{8`VG=6gB&Wz}Wu-sr5m9b%exRK)6|b5X^|uMJ8~mshj)78qBj
z)gMX;nedKr+N&Q+TRJ(v8On0_{5PMy;-v)VYB4`~ZHHiyNm<St-+4{m66zcEUqMP<
z=I;DYd|%cxNwJx~k`7AI+_c(xbN`W=50(+V*Bt|X6<s(hZZ##@`Bu#3)YCWT^;#vr
zyf~@FsY<tH?cd9?|8zdCu|4|W0E^_KqD_<co!)x=Kw<#Hl68L!Vz?8n7ps&6+`RZD
zc$R>AtZw>}gjD6=kZ%cg2mY@3wc@e!w3v-=W&1VU?cbhNQcrvP_vx!s_FFpcf5@`C
z?7AX)Wz_G#s?WY&X1{a0xK#0%LhiM5Gm}EM%3R-YD^YN9$-=Jk<cNdO^Z81RxKo(K
ziz@fJW!ok!ig?@Z@p<(G`wHJJr<VL~nj!C}Qg%4!XXtir!^4X+VmKXZ<`w*Z-SF$5
zO9Xe}<jd2ZC`?S&P3H0GS$6rQ_U3A(2v^}%8C`Zc`EyV7B`ImHNVwd#=+~MrDQ`ZX
zS-HYdxnu5+?=h3ER6TrCwk0IGYVvnpyT|dKI>+`tzIWHN=*f(-Rr8yl>K3vUDR!~`
z2s)FkCsF$C@hOu`o}~e^m@aer-c~rc^#1fi=?=o@7x#UB)b;eS`vO^;oQZ3WERCzE
zS^f2FsMfnZ|0Zv?U9a(By2*n1rT-F(zAV|@;B>Ha;`E|TUyf%Q{)u1NdhAY}%Cn2%
zABF!K&fF;O5x2C%tR=v%=6>dz3k~5ylg!P1Yz=F-|2?ylam$YBf={mBi8=88<@%S0
z_MHgUTfKYQ`j5J6Ca~VOHrnV>+J0x9SNO}FGBszuFqny#?9!acGk@~4-HB^i{vInl
zzWzt-{EO54zW!7&nSY<zwf0ACkbr;r_9u~&3`fk<e@~S7`Y}3VTkPS(;d%xaj?L1Y
zossi;(q)bVtF*jhW>!va%FMP7WLkW(rfqA*-^Fs=M}PMmYY@Ct65wnh@_&1L=!=^(
z3zXt=9*QTWWPb5EIc2u|-in1Y48Hp9tKV_Oaq(seLB2I}*?Xct)jvyLy5Vf%zM2y<
zwx5potW8pwSdnX+@FnNFC;LUe;Iz3$37)YbOJ08TTX^Vc*wlX)U+Z7nJ9WqA(sS{P
z>>hZi%kC7(%Mw_7{fmZB(Zo}nJ$LTA-)Ph<N*2l7`pNb3scgv~Pu9QAUdH+2YWY`Q
z-bi<&Amh5_l{bWT6knOsw$17A(N#N6r7f{Nebaq!`lN{Eb*EJ>l)6T5*7NLbc;r>w
z(%e|@V!cc}`QvGev^Dqa8tyyAL`Sv9GKg8ea_e^U+yD8-m(+Xv1pE#dr`$62YCn2q
zy@F_wU)G0%{U@i$IbGd#ZEDn<(l6QXgwLK*xRQSKOw`7+2UqUuTArU(dwTKlK%w4s
zD%&q8N!ssOKIh2)q)p0a&C@N<ow_MEKlzcMx|Z^c?FsFk{P$j13N79c{2*qUv)+~J
z|5k2MlMmRPiT@sDa7e?OL$;)6N?_Zff7?VE`pUmlKI+^m&huT2eR5Cv<?q|%nN9X8
z`kBr%&GkBb&m>zwZC+Wrye!-C)Cb{f0^b&QZRWY;7$$Z~e}SFD9i7&O?VtaJhi3Pr
z-Cwv(isx_t!Ot5KoE|>++HylW<i3xj+cx`4m6uG`a-2z*lU}MceesjOE6*FAUVJ|+
zM{e!%exI(5x^Z*(OTr4X-E;POW}ZK7#W79zyz%L8YZ#Xa&Qmg}o~C6J$+daroS8xC
zRpsrAUOPA5iheV%E<@MDS>bN;-`V`N;Nt<-ojd(vgKF}_6D2WufB3%oMD4z4DY|6x
z<H_O=4ejnm&Au2|E@!dleN4#hbid6@ihRV3j_oiB<5R47>z>09dfe*fhL9cn1@4dY
z4mnl*epGixb9Ll_MK|82TtBg5<7`Hiw=3s}Y%S7ree!v4h?=vEp{kY1Lu=1vrz~#!
ziq8EvJGyR?+13}PPjAfIRn+w9tI3^$W$zP?l*tF%7tB2&_Cx9A8hf2j-=Z%j-niVs
z<uZ4=(f4ygUk};}zu$0!%kF}f>5*sg;mZq-ye<CyD&N@YYU<;aIgZ*#Uk9J=irRj5
znoHG^n}7G28?<cV{!%Q)`dp!Z+S66ne=>+#YrN4pRa<+SW0lbLib5~eq8D@Gd}7q@
zuPj-*a{HPKb0b3j#z^hCtX?Ct<GwqydYHw=B_3_Mrh0z&x(W_lU-h}O)V4%_ZLZR1
z`$)#7d(W&&CHQWK`Sp~2Pz_hH-|+8B?^m0iAn#?>`g&!0KN*%>uC08drJq}IN@epE
zuCrPxw}Or}1q%yS9!)99i&<W|H`;x{Iqr!wm-+Wh{&-KMSn$tbUvsm?g>r7<^-)b<
z4{iM7z3^eY;q=}VS--h6IOo3k|9;ztcgc6#s(a`EH4~T83e&j%R>u5IxMSBLiRkK8
zyQZ&w*AVEuLZxa!t^L1?^0T!b`*|*%xB20ko$LWtyeV4Vv5(g`#4Eo#_+J0;%=Sa2
z^*@fT5&e{}(|X3V?%LmVJPGw~w-}dtO<H?>Rr0q#pJtSEXQoe;|6L<~(_zQnl@9gM
z@1jd)&bQ8XP}smZCo^xB*q6Si@2;+#oU^raOF_{Y@da<Jz6Hp!6yDa6@DrXkXWo|J
z#7{pZJ}nabdV;f!!DgB8-!m_6AKc)%T3bay?{@t9c?BE$#kxOz%=uJ5=YXYm^?B_M
z-x;glMb?`yj-MBMGt(yWn_MVggX`yJ)>9LOTN(UM9Nnv$SU7i4*o%E)w!hQEo;QCE
z+Tk_v*%_Z%+{{4}Tgx6<$WJ;V@!*L#v(Y&z!yn9ZUUix`u6wa7!~UYndqZuHjZ^Zr
zZC3n#@TijSvH#5<r6wpA+*LdHF))FVi{bqHE;oCoy1%uSm#>|42;U|@b4tbJ%fFoO
z1W(Yu8qOoH6r#GEGx1`|@9(wd^F0rBi+Eje)&02P+dY#LH&<~#+#VYw5G$7^5UzbF
zH^cm!^r^%Pm*!bU{a0jA(`(;s<lG`wmiMPzW=i3MO7kScV-Yd86U*{?r&sJ+xM@LX
zZSaBjYefn;quLf$JG{SDdRVdbzWu{Xg|8xBZSZUqSgm!>XZexWt9;%14ZKPgwZ&d6
z`mW>e(j2iPk*i5wkhfEuQFcc9g*`Plw`sBRFS+ts*S?=Cq4wuf@rc{k#eO*``h?z8
zzv9v5)hiJ5V9T8KrzIcuOq_Un;e-hj?Cv|S6&0{g|Fh&Zt30Ff#79@3I(o%8D#YJ*
zQ4!z2ar>z~rr&w}Q(qXpZ;DYn-Tk^)$#vZ>VZDH@7f%>-GrzoU^E$C_sffDfrrQ7I
zN&!*j>(>|MKTH45rugMnrpFzN-#eK@RxVHZUpnQ4Tus;SCn}vUL>`r%KNIWyt&7*;
zcl)oT0DVF8UX?G|S~7+AWc2c0H2QL8zfqgDVb6@8M_0eQo^F4x(INQUbp`1;({E;O
zdcD`eLH5_u#TpKGTy&32GrF@RiB0W=>V+$<6Lf?F+1hWF7>0#xpEf1(#!bCInV1^e
zx#jbCI#a&KPwl^)>hVO&ZH~ZuZo7-~Pj~J6F!v4jujRi)-<Yh@esZ$gQuJ&z<Dyfi
zE;V!sn3~GG?^rgW{Qg;)P1>D>)4OKytCYp>`nP_Hz~Ofd@_lhLbp1a+ZeG5kG3BhG
zbmbo514+VfE(!kHvG|kC1ILmKHkHfXYu6QZgr~`$zqY=}(Nkq*W!0j0I}WYgRos_v
zf8Z@+LiJuA$*Q><qfHW*ME=`RmY2Wp#?@uq%EA^IQVh0h0-oC4J-=J)4)ei%&cCi4
zSvq<74)eG2$y4@epIuxyRsUli`-*wC|Cf2EUE6!ixybkM$sfxbp1D80*UQ@f$GYfW
zx9z!oTMI4csV_F)`K_<*o=i%a&)YjWn}r=u_*F?d>l;XSZo9cC^vk*Yb?*$#qCYgG
zE?2QXt^84+Z}(xzsNd77e@!>o=HsR5kh(mQeeRR)JFDhS<|&qszjsx(<B+OCea&8-
zLq@S?jCXx_Iist1PK4+(3qSejILWcV?8#l;`)4gTSk!HLw0V^ZN1>$K#I-`tFN9@s
z2#1{Oy%JpT%vG_GgP$YnaG%cJlqrqtRf6v<>fGqqrlRBU{a330pOWgbx(JR$n<7Dm
zsjC`QtzF6`s_q|PeVzKPyg0;cV%F1mGqG^?wPzpfk*F*`61sBtVXIXW+kzv41-JWZ
z^cj1tnWX+;`h|PD`l=G%pPzq%U548}bWzi;Sr>Qd$tE0>sm&GR`(b}#so=4Qj@h%U
z4tsKF-YhvdX~vsZ%Qb45d9M9DCgeW1^7iTU&6{tlAB|T#-SRis*ldE-(uN7gtXD7P
zj+C9$T2fqOkiIZpMYg&`S?6#5|0@^13bY;9n7r{#`2*#iXzAZ4H98c&<i1}U-m8*-
zBW#gp!Os27&%BCct~J)~`Ea=O;z#WxliiEMuBFZ9+qz+8TDVd9-DK0__bn%9Djw}R
z@OLtQ-npituCVJGO{X|G<*ZJ}efPg_$KqmBd5kNSiRta~S==eF4qbXw!#`Jh`(>H6
zrYjf!j8_xYS};|}@`Lmu)@*+RRU4j<t7nvc{*y0vcfuo=Kfj}ni|lujP295Nk1co3
zum10G!hP(wo^5PSSaiBcp~XChD^u5Uy5be>i#cEH`Ir0NFyJU?IR9x*&-9hfUkaRC
zE@h_+x!cs%@6oH$U2d|$HRtG;b!?@}(@m2Kog&j8_k4S~@QHVrWZ?cYl`RIzyE`M6
zuy-);P-S5%xTLZtM6;(?S*1hn#f5-5oNI-`V`7TZuTPX0d=tLiSYf^9sho||)=X;4
z_z-=zu5b;j?e<IWu14}{Z`7$S-gt1%%GKr%TkMOj{;ADR-Fc^9GMjG)o9LIH5(ZNy
znT9@ncyV@xfYbgKId7*sMx0mfJ=)JFb?JS<VohI$cZ$NQoduiKj3v`Q2)$a*xypCu
zr63ozEHCDjJ~vlx3hUU#+0<NDKmWqg9cwQx;n2`aOrKLezbh-OCh_pT^~!OJyO?(T
zb_%x6%r$;$d)fAin#ki;#d|SpmLFl;{L?%=icdO??WR{3^HO{Jhbf<quetbWr`zib
zMXJt;#d&EB-cOnwzAt3w&*rO1*RW!q9UQQ|YPR#%ojZ1#PUBn6V-$0~;^MFOay6Qt
zQrljo`r2p2x?PZ3oO??%dD+jr%$`k}v-kv)51)AY!2NvGTWjS~=ap&-ffJrQ|8txp
zZQYztfo@Os+<$X1ULopLN)~tQozz=Smh)V0oLv0v(UFVpQ&ubN+;&=q^G^>;mxlb}
zoYeLD8ZTrFy$@Ywa9+K{Y2J+7wM?(O*6^3U`)ao$Q@xGb|F-diN&l*s1X^Ae?YeU&
zY00`4cVo`JDTR;DSTL<NpB>&M9=h?OhPZH0^{zuNpI0m^o^(4vb?4>f=kN9QOw{XQ
z;!#aa=5L)SaMSc~W|LLHvfDEX=1AUds_%DuVj}faa=YLPHb$+f?%9dzUQ_&)(tA^{
z$(%7h73m$a>z$Nzf(OHb+KS>D<&2bh$7aYDx9d!J%qF*UPVRK)Wz(j{e)zKF<)8nn
z9+XtEpNd>7>c7={*&)lvEy^3uNJgwXp!+oO{@Qt!7LV7Y*eNtmi#`75cgKozHHEvk
za=!k`*pTx>w3_Ybv#=1A*59cOO(Om8PO8s4BXFd^FTtlnQ{vWFne;^8PfO*NrdULl
zE8YKbvr+%m!<+A|{_LF<a=vKlojkE$OL`xFcN5Rxc~~BsR~7!h@W^~&rN?J&_U>Ku
z<VD$x+pK#d=U$%eao@p0CaOJqLM@vZ(;A-@Us@ji<d0&pIumc!HeZQ5sAPed)$2b!
zHIJ18?k8EOHHo=t#n%+o{#1$%JEXjDUCWs}HqRQEQi{L5$on$a;HGlpqa5)n)s3B2
zJ39R?h0mH+y~c{;Zoa?QzKnfS7rDHbxbh-2d4E>ZHP*lCi()@-cpJdX{&F?znhVpe
zoH)B{QQM~o`BffgyWdrcKiIbA=87x#c6`j(Ip4dl;@pbQN}(^dn5zk%^ZLu1;WA^L
z`p<WpgyoY(*XSije|gULVMYBmhl$%(eB9yf$grB>So}}^`)WE|_qK5}J~jV;bK?!R
zdsXuK#zhe-TRu$kIbORYS32;h14rJ>e&*ZJvz|qXmws!mPp#X^wCL><U)D#0_p3S6
z?W@23UpGBIv)%7vN#-)EaId33=3Va5Z%la2|6|sgOWF~pX9U^j7B74n{m{Sh?yZ^S
zR|<5$O6h#xRx{_K*#w>wFH@E@O4S6jd)7`Y(lWbf(71nNa>3`Q!d+6=x5&Sl@KXKN
z<kx4fJ)SMaC{fGFx^?EdgNJr>GKw_s{>*+OhWob>-~6qQzI-+IH20EWZ&Q8Qc2V+y
zoM!3$TTb7VnqGeO4&zmkJmLQPQ}3oTYqovum;8EP!!%atE*rO@{BDaMW|C<)@}}O&
zb&YRlXYHPTaB{(9r?qUyA5~iB>~eMLW)s*krE8Yma;E3{zn;u=oXw}dlI6JFx#jPA
z=ih43{VS5Sb*<-5=f%x!U6seT-MgJ@XtQA(gFx_y=K+m>+|CNVvExacar@JeSB)MD
zTcRXSiE&PGnQyP4^e4ecF-!Mzr1{776`9fJuVlT{{h+35?tEjL)rSKDzaCe3u6wK;
zcg0Zg_cfQA!oqrs4d04-=AM!6c-5fJ7<`t|;%T~sz?a_3({4Pw{<}pq@KvSy{TJU>
z9T&8^sQv9x|BD$P*c~5i&MKb}S?!Z#$5GSswn5gnOgUYC=CzCGR=7tVN_Zn2J@bW3
zW!Us-9=fhBy4l%pe(&V7;Ynf-Re#EvQe$FOS)}ElvSQ)P`O8$#AN>2b;#jtYraAka
zI>zZYvh1D&XX{;j==ioua`xq<7j>fB3#AUuP`G~o!plr?7r{@>t<&e4JU#W|(4=|m
zb<!^d)O3nzG#3};U*y#P%=ogUe05}5L(Kd;k&dbV*v+(r66dOwo?o0Oc_(7tZf1|D
zYoYRAAKqh&>SW4uu>14wpzVh98}>c86B=^pgO2`j#?RW{uI<cNWf`^U1Lxw5gFEeK
zFG$em(Y?INxqnhvol%o`-)qS?oXx-ecXKiY?6wgQ<PCjU@1j@w&VSpC`9Ev^c}4TY
zKWaMHzE@03bz$19lXWYE&s=4VPSDlt_`Z{KtMI#Sw`aP~j>f4g`uyN2a%8n}m;3UD
zxoP*(Gv{N^R$nQPJh*Z)_fgjs%P+_?clawE?E6u^<chPLf&h1GLF~E*ES6f;pLw6E
z7%XAlH!I@X^@y9<E{^qGo~KlsSgP*uu3z?CY?6$v`CR*T-nXV#Y*_BwEV=y?E3<=&
zu9EWp=`$@Jp19n7rKfN&i`X5@{gRz4IX2tnD?a{tNP9})<B7&c?T;=h5d5dMPR8i-
zTHCg7^H+%(H9vb@Sg`KOAz^u?$6rKQpZ9EBy0dbYvsk**M%{IR9;?~>1e;dfJmH}y
zvsHid$79B=efQfowiQeWTYt={)lal>iDd()PYJ81h_`%^V0!HBZR@$0UH$3S^?l#%
z%=5R?zFy8>9{)}5hn`Qn&i~ft57+0<FU_$pee~y=*t;q9a+M!arhoroYPV|Q%)It1
zQ=Uckt$e;@%eO~+!_u~Xe{|gSMiYzOkFT2+tyld2RZp;Id6My^Cr0^YL3~$cW@c~F
z*75E5E!^{Ug<z%2?&^EL>h}q2M7HXDSDboR!M)Fm{qW_!GuOT;oMU=g*`xL&Izr>l
zmG~p)I%gy=TB_nxz{PIEl(K2<1<Re+?6-9<{$}#&&}oh<>+>g_EqPnqVb?IBOPfK?
zp-Xh>7nw@ery+M{yh<p~`1|7J{<M0o6>n~>7G9yL_|^Q<&tp2Xe&-wLiAzj5bKh`x
zi2NSCUFGlE*+t#Y^E~u_c>LAUYZW|vyw49?$@0D0)%@_gc$853zF$v%@9y1Pt9A2p
z=mC3ApZRf~Q+#b2_3FeH-8|#-KrZk%+k(I61RAefmRtOfu5kE2ee;FPe><;SN>&bC
zHECCMvYGIM49AM>lD=6y47WLUvN?Emu$78RueP83Lg=RO?~-1v%CmuaUh*rmj8|qk
zb?6?Qq1WvEK>KOw3B3s#yY2>0;n-4Xklb`^_2x{A&cG9C&urBcQg*H7$&^*@-`+C$
zyT+QVv;A2w@(v!qFUJ~gTA2K1bBy;xoqcx`-`{$_QYmV2;naiONzO-K{BX8kJtynh
z?%KXzvBGAF9F5+Q2EN9>Uh7np@NwlhecG$weN=b%v=e_9u<Y1#l(UIPT4PeQq}!4P
zoByBXSNHs{_j&yEqfGb_EtYLDD(^O@t_q*E&^Yjcyh7!p&i45#D;y751sB(--DUFe
zStU^tc;o!y*oL0AyWR{PYK5|D`A#<?lW+ZbAj3D6>C<mxAH#P^%R`@k@T##&`|x9h
zY=TaHok*?)XWNWC2}8@U*n5dHw3b)Y-s<SSuEJPc(D7wcW#QsUX}1h&=Q#ZEV0sy1
zAG77whc|)#yXI_;yK?oG;@REJV!kQ&-X2qznfdsApy$1*fk)?fS*<^*S^clb(Ihxp
zY@WjHyxL7q{aFK4bv87+{=a6}wIaU5_}S&j2kdNxmJ}CA3qSM;WS<day;FPQ=kn^G
zC)mB)#F!#q{}9#SWd6?`#~a7WXnoWzsjK%#-=Q8eF|oUUS)@&kH?2ItvqkJ7r^i-N
zvD=DM_UzP5UHrgkvBGf$R%_V_)<0$|=<Q+3id}Ir=Tdot&doE^m+~L~n%3NUX0qGn
zSF0`W>`wgJ@0;O#Vtam1($<1Tp1cRjzd7e9nVt`N&|tIh%EI6jy_l4}^+!SsZl{Xd
zJ1yI*=H?f5taZ~;>r*{5Icr`8e$Y6@-{~VW@3eZV>35&>n47=9*)5Jdpk=(ST>77<
z)N!TTOT705^R@SG{oX!9(|+waksr6L@0cg_9DKj|qw03~skfHvDJigj()Y0bBd2`s
zxsF#PgIu59_Hb*~hN@);AKZMzFi9`9AyaOv|E4)pj~c4J|FBv>dGbG{>hR@4c}E*I
zHdQP=p_|}(mSd-Q=H@$<Z)P9WFqixDdEQNytA%?DJ8M3Ld0d*Xr!~;^^MjwCbbKq8
z^{8ttR66nL^_P#Or80VbMqjFVHaRn7%@ezRH>=4*UMy^<<h0_s|7y*@KH4JRQoqjp
zcz6!q_SEmOX+{?t_-_5!Zv9eZM)=1~d+Zly&6~m*ICa*FDF@2>LmiGTT)XH+>b{h>
z<>8h~_Utz2ax{3{Ffm2!<nP(OFGU3zXG_iYKfC&ki?D-^#pI8Z-o4%{DK=@%GX0+t
z7r*c&sVc`j++?*l^rw0QWBZI|iMbz+AD8@bb9JuVhcm5nODBE3A|Si8$mMsLzp?3q
z2A#K0!kA|Ku|57Y?p&z9!Rmlsk<yq<riZy37!7vpKdxZ@_7JyAosrk3e=}}3CVB7H
z>RbFUeAdbt8ONID<er&+^Ucv(&hA@9liKo(4i%NpXbbq*zy2BX45qy-;oUY423MK$
z<}Gjhw6KrsSgPFCi4KmJW`}lZe`ncir6{eOd6DZ1^O5V{LqsNV83ylsx+7n7iB08~
zPdt0HpY>(me(4%}j?Yv1r=Na&;Y7(d={oK+|F*cVm^U%&*b4p~)%W&tPFe6`vGucO
z9~T}{-*wu7X(Ip3XAd1hcKFM_F6Mo(p*QlMNR;JPE-waY;TPSDa}<0+ek$yqvQ+Mb
zoFUiay3mN_7kPJGX83z|$CaMBJt3>Fy*DzEG1_UI_p5#5ytFM0MrCu??D45o)<0R^
z-*CMls4X*PLTbR}I$k|C-3jkwg5*<^*FGp*vUW=EujA>@%(!~29xvN1AU;3l`=Kv_
z2mP{zVpnKS&yUKR!lQY9&vE_pZ|!dLIfqSs5_<1HoABXJ=1LQ0?$IeM54f=YjG@ux
zCv_s$+f;mSPN`U@Y*BRVt(VF9AN@O{zb3~EB+74QtKbrU{Zq(ouERN(*Lhd<rtu1I
zdY$?77LzrX*5bD+ZE_V>m;TP#m%OnqI!5gI-p)A()<iLdtxY-FBYq<Bd35S~^GyC-
zikZrnpZqywv9N7ds+JG?ZpqBjH!3cPGV5cH$h=(<U}6=P>=>yOGckIK;hqO~CFLq~
znXOj@F4-49QSrd1XJ_Z|G`L>=S+mdn<^7E+JsUP(f0}rG^=7_9PTdwa*;ak|zc}&L
zZjM9tC%F!E&(fLCe9By$>Fm-X50S}Qn!oJ}>{q9`e7MV!Yx$V#SMjb}lX|$kpPF>7
zXlr@k)6p<RVE2ni-SqoaKlv>f95>0`Tfbtz>B+!%`&b05nwuv)@}2Ja({GX3gH1bl
zH?N<6@7nJ4X?}Lfvwp5>WqP4^VPe{aTgC6(_Q^l1bo5s~oXzz8sJry>j;Z(W9}@QY
zQgT`Kh1<E+_n$s~Eq3luci6l|QI~hxUYr<y_mYj`k7FKJPp!P<bhW3@W5P#8$&Xd5
zS*$p(ofB3NYq@_{qEh4VUEa{$6}G?XQac+j?0@UNJ2ux>>BtMEsEyM3Lbq!7w(JYs
zvVn=C-{srarPD6OU$JcB*2!u=_Ag<_cbU5%9)I{Gf1y2LirY*5b*_PngiRMFY)qXZ
z;Q!-K&aA5yiM8cFW_)(`DC$o&xUu}+{vDNO8~&O8wb1CCShFs#vgxPCy|Ta8m+s>&
zH?z(3aQA#Fw&jnmql|CLs`&@w>?`N+EabUxDDs1$<e{zuZ)YZ%9z1q1MSp&*q36$i
zEVI7F?%J+k-epj9zqLzrdHL&^xeMFGKL0JKDdInIciZy=O;c(g2QCv2mH5t5Sa8Sj
z<ync39D1cY4l(ZEadx_eqF-^_OLOxhf3!tTRwZ6N7o76Xr#4Y6%6!YhA65riWgJ^Q
zI!=c4ES5Y!F>0s#`Sb6zn3;p*pDD^l9N90S`e%FA=g*CQ)L)!2y=U8!eI@y|ub=FC
zp}PGB8gIV7e)*CoYVj(ymh1BNYggnbxx|!A-<bQswV3VQ?Kg#!`XiQQvR%8m`S0wF
zk$+9J&j#%>v0WMTlj~@}jTNmOdU8!c4{seXzWIImn_pE`Yg1dkMhoUNv}9;CAMpCU
zRY_?1mn8MALVBGYt)W-LGnE&$%lV5OJyP{yQFZVgt%yF>e-pNfYXsjv>m4KSlxBXw
zQ)lKCRl99w?;A|zKW{bpoYS%>{5{*7m+p2qdlW5FmDX7-sNck^e0z?~zqx;u?6i9`
zrv5oM`BQ}Mu2~z47}g$>;NKscRNlgPWk1`$U2Q*^6y7zgPk(<|j@S29Ylcehv_t7H
zB)cx}+<dIHc;Aj&9F<ZJ4=KEHRyi<r@1f7Fl8bGcpI9*+ikP<P>LS_TPfHvVraA_-
zWlk}faZxO5y-VH{;jR9ARSGPeHL@nVRA|MQpY{8AH1JVj*u2=Mk2YKK2>#7^mlVnx
zTjdvjts^t(%=DvciZA5$H7HeS?_PN&+~>hP<K-_FI@q7x`2C{N-#c&E{H3h4%BIXY
z!@XTuYa7GT--cD6xFd=ie}u06P`YuB=UYXukV&hbEAu4Wi7K72FmY?ZBAGc8T|}z6
z{dm;0qM||y{l4w^`uI7o*~Zw{tCUV0`m)eOG}1=AMxWJo@zc2pUW+{4b|$g?l+eBP
zQvCYP%$v<jh7Zc~*1nkBlfA#=_IpSFPpw+zQ)lbtc`p|b|HPiHA?m_2CByW?nz?tL
z#wfpXdH3QU(}`)lKXfy<HmqOE!X~8qwB)=tTT$tozn{Kli}S^-3Ui+t+qQRqNPbv=
zedQH{rsGrm7yVfjKId_qg`7^>?FW~GEYhsZ{X36t_uWvb(N~?v*rgGfzudt#cF|?_
z#`mH+9{*3R+IHW-P+%h~@2_`r88;PqRGyfzN_ZES|I$oB&+p>wX@@svZ0q_z(Z;*@
zZ;R)0o1Uez?ANW=1<&PPIX_1F!MSIxH{(s_A3Dyfz9nf*>Z#=n2M^w43wp(rT{DM$
z@A>=5Njrt?)tWto`uq8oE^b>c+dfk!^z^^FwI@0zpQ{Xve0Plh=f-fC3g_8g2@@ut
znK1wT=1JFz6TY&0Z+*FkXaCw(^PAE?uKt?(JG0(2gzxk6wNq|q#Bbzs`K=_ESi@*g
zH2InR6?VVN#|xMo1&uguPuBT)3O~H66sotR*wex7)_K9b4T<|2b-v7!iri?Tpu6VQ
z5zV_5OmWq3?~A_@ICtk{@+XhVE!FkAj&a-16FTI2@J_{S>t#H9KNUt+-(Q)W)jR9!
z*`hzS97cN^PKND$y-f4U7pX_ymutiHjlVZcK7PXFo8G-Gq5`d!3qAH8UiLiom94kO
zk;OOq)_tEZB=9h?INR{ftUns1tGX|~S+;!6g_PPqLU-#Tj=a4o<!5ErqL#d7icD@~
zPV$~;C+EIx9KmM!J9&2HopC?JbFjSsO8CPc*Dt@WaCv{I@TKtC&_nA^Ny~39Te~Me
zcGc5P)%FdJXSoC8p9cl4_^zE2eRA7cc`f1XOc!_LtYrw`H#FEi^_m-Zr%-a7$&qU^
zLa+RvzT}*<SSnBL`rg=pxdmMZ41YB!PP%!-Ol|KTZSJg>hVo0MXX`i=JAK+vSTudB
zsqY2DqwRZ+3*7Fs@nDb%ic`9ne?xc5F>_Uw^mQp$UtCd+5j)utm3^&Q??ZA`(9+Kn
z517_-y|OlUuAepc)11s>ejkjIx}z($mudzqU|M=xzDRY!ZH`V`k<$3H)80!@wfwdG
zso}|QD#<^JC!P~^D(JlSf8UZlmr~yL|1mf!aD~;&`xN`to4=1n#n0AU_27H|+Au3a
zwdpF8Z}RO+cekDKd|~DKLwwhNDhs?QG+*u9m3Z1l{9CTBe_Ma<zm^3ttZ6rtmMLw{
z>*#D`tl8!qIOB@V$;v{bQ_20p(pM~|ty&qT(k?jT+=}p%QYTLyDEgqD@XD(D4)b-!
zZ-rYVzvQ~`xt9xl-m&gU*O>}WwYIF&QbhtDBIaR>Ha4DY{u9z3$Z)3g>N&TX_LR4-
zDZEJ^U6OB`9h|6Fm>F!7`|$5wDf@E${8Ja>gigLN;r{R9?;Ty!^>~xE*s6_39In4x
zp%s5?s^YDWw|0jubNY4ZcVJZN#ko?9xqB||w*Sv*IpwxJufv<xvUZ0D%QCo6S>6wm
zmr=RnF`KI|z_Klb@zmbTT{?4%1(tsMWz)6EviG&tHr{{pmV1Akv%jplGxG1@v+_#a
zlHDwqY+YO&_l5paUUbBA*@hsFl$g^(&KZ95=NlIpAD-e6k(IsPd2_r+uXpJDAHPes
zSQiOy{w@5t+()Rt<wows|F0OE-{x@_~$%+NIBs@fATd-dqo;Q3wYs@2i<w!#yN
zUUt_$jk~Z}dsgMG2DP7meb<=l#;nq~{VVH<MeVkQMmq$K->k^EH78JKii2|0|IY_?
zU)o!Li($zBp`^V3g+ax`U4|=cw;a3Dm6Wycr(<HW!*Q=0C)R&;-2KZz?Q`eXw@Y<a
zEts=mfevHef(twLRs3XrzFg*XgO<Eim*3{KMiclRp08SM_F}DR^xXro*Oe2lwWl~-
zTXX&db79=8hu`KiJ)gAARj^ih$HN~RlSSKt9GIPJSP%Tr>)ObC(mVO?-?<ZR*_p5_
zl`l#-zg+mARYv6%@n8eS8PjWxma%WQ^^<uqSw7~(&+6E>!B)RSn9I8NN4m^kUOahP
zIM0UdE0+6(o4#5eU!&)e;(gU-j&0!WL*jAs&TU*N9k10<zVDu81B3Wxr{LEI`!+5u
z{Vo|1vu>7&!G34f^zY$Y%hOi;+4E&FLs;m^g?CS8*Enk@Z&<YCl#L_XEZe4<2&t?I
zy%X95RdkOWe*MEcNc5)gTxZ?j#7DB>Zd{e`w=2In;21Qs#C6sK&Ked*3Bfrc2?h`E
ztyr|&>PxMn`QGJ%vkbyLStjrPdvZ>86#LrEB2JqNXPgw-|K+Y>INOo6-vuTJ&Y7yT
zOoi8azRz<@o6M&s9ftBorkQVedu77|s=^z^R4yKSbb;ArXVtQv2b&&p7q7Uye&gek
z4Q!wGh*@-(wua0#dt-6o_V0GTqfI(dnt$#YpI!Ax_e^Nc(wC=IZ*iz{?)#tH&ZoS5
z`K5h<zD#9YUZT@(gynqX|9RW&pB(eosmr&=8h+#a^C8Fj+#dHk9Qpenp4hTYvT;vB
zN5b5CJ8|iCbLY6n3BL|{bLRK?-iUnlDVnMVE$_n~&MJGK#b><kv;F@kRo5G?hMH_j
zPrFom$Euy5E7sxs<3IM(r-@9j_T`hBb7Y3p;cG|lPF<&UBKYw9yug3kCVgk~S^7@u
zX5<7enF~7<?Bv%3d<~oPCiXP%f_YUIb4>F&?Mpj9bi7;kbhmDFA;-zToLa3{^;)VA
z-iU9Vu5qsR<>DNMAAF0$uig!r|L07v7_;o&%^Ymp%VTD4c+|Zv`$nr?w)mW`uR57c
zbDMoE6<f;VB`W55?+lGExT5M*p72XoHTPNYGrO!<-hF<LJ*-z9mVWfAcXEWylAZU<
zwx&(a7C&`z@4IL1#oJFD{8MA9R@EuIX;sObJE<Pg@<+_8f4A$!3)u7Sv1I<UG*IGU
zWnSsM4|#u;9A_y147J%LclPrAZtcr6i_@KMI&pm3Qn{V^&i42^JLUC!cjnEP{d7-z
zt||N5O(&LHsce1yF<v~8Wr<j7u!x1s{BI7ab5F58`_p&noAA791-FU~9&>ybZ9C=o
zTl|@8<OUP<G<Mer+dSnNJ<Gm%rB<zx?bj;h@U>)7xV~!1lkn9Kd6YJ`mhq@O{=SW0
z{+jTl>zi_N*1rEVeX4!@!7o8^d?t>m_wR~cD1GWyS^KVG!qGWqr_a_HJ>tF<=dx#$
z&C(4Y4hd(^zixYjO?|-wv7X%3(zQo8yI)5>2#9#fzhL$A^EMn?UVX26GX3az=EDyo
z-o1OytWgtbG5>SZlHDQu7W_G^UvFi0<mI{>Upa!BeZD{J^x8SgTbl9N>QB}|(U<0F
zu03npbi?J*)%iIg%h)-uPxSBV(KEhiE+##J!^gs-)Nanj&t~y6^<;SVFI{uz)#t+-
z*1Vs%QX_i7itp;@qrOJ}nA3Q6?WwnOe7cKS-xjZ_aeh5@U-rD@+z0(tw_g@?n=DM@
zkWtI|UwHI|BHMhYh6M`)KXd+I+K_ptuj%BTeVupZ_)OA{dffe3@JrG|P2uBFwce?<
z>v|LxE%bhwFaDsiE8x!7GmF0}@2HXVoWc50NNS7enkQZJmo2*O>Hn{lG2vDNV<+#f
zYrd+#_hpz{-ZXgi&34iOy^wV;BD0u2+&b91Z;Sk)6Hd<ZU+%x&5%k!{a?jVMyDKH4
zH5^oyYl*X6f4JuG&qKkxE4)95IvDCJA36PM0_)7E**$q2Q8hni>|fEX-GAC}yPeEE
z??bw_<>B?eW-0m3Sh;<z$!6aT3e#r_%P_>-?)c(qUs}wtZ1?rmMlV<IpRvZFd*emT
zj)n4*9!-|fNqM24bmdBYOHyy6Q{}V{quck|4OU*_UEwRGQWU6{=FTf^f6l4oYfxBV
z&E+>`9V_-4FBE?rcFEB6LP+eZO_9dInM<>NFL~OUml3=mrFe>n*9{h4sc-v#Rw<Nk
zdK~>f)+F}Eonsd43hM9Ae*WTVcwyy%-LG!(98U<~PnrI4cDHD=ovX}NRU3=gl^NB?
z7G*p($!0yZwZkP?YL>p_o+)~B@5~gNx-z6`4&(OQF|LV`0eM$+mdgLQCmdRrGxNu}
zuYx}ua{ijKy`OFN?(QayS;+?vT=1NDtMdwD&-MF}e;GC$Jg)F^>Jk0co&{RlJMv0e
z9oEd6cxKYm(!>|vc18X0wJymoxV(AIK0#N;3!z4L#J2^iGWM>j-Dg>GYxjFsdzM|l
zl`me`m8r=;p}u|HL~TbGe@l*zX98Iss@#S5@B5v3#iCYnahdtqRE~R9rw{(q6nwv7
zV|a9n@v9wP>-ns+Zx`IHe_s21?a?CpTj~pb^}G@KxOeKNU74RW%6H0MVdXt^_O{md
z;CTD%QV}_v%NG{>ohUH<&dzU(R)*Gjb6@$~YTPj2epRJpn9{Svs=M3bS}wigY15c~
z!heUQT4L?)g;jym9c%Wf`WD6M3jOL?5g~iR=0MEJ#pO3QuU3m{yP?3}H|hN9NB4x8
z!`wGTtmI}|At4wR{Aqsm_o}0dSdZ>szDC~h%jNiU`ls7`Ri}FTZnS>8;O`RUb6Yfb
zr~T(HjBt)*pFJm8GIC$COmVub<8j_3*{a_QA8bD4$=JYL9IdzN!P{>OGQV&;%e`}y
zyfX8t_Qr~=yYEyP-L5JKh#ZbT`uO+y0~vF!_ByfbUiFVT)Qxr0qc&If-EUa_TsPDR
zQ1Nh5)MQwzW**?Xok`D-NB_{GE0!T=J(;CAS8*8fgl^UUF7Wb_)T%??^=}!UZG6p9
z;+kA2zg4?IJZk0bunK><+>XbLR#6Ogw^<*YVy#WJQ@8x1DJu2o+gujGq*T7XZ{K8f
zDpj&vrgZqk^UJ>ZcRhmhoXKCFUa?bpt@(b<d+%77Z;cUP_>#eT;zW8Q>(e~`7Y=uX
z*Wa(GSr%tf_}1w`>Sr<GGh1zQt5|oW&f9-p<;s_qYR%b3ui5MGp7xyaWn0EktK5@P
z-APBf6L&7QYS{iaHuhJb(^paDqjSyv=*Lby$8p>`^stS3=ohv%(g#m{?aVgf-#jbn
zS+uPG;+x*G|D>+pYT7L=AX@cWdgWJ}$mDNAt`0`)e5)1eH58g`Ef+HdALi>`6dbs`
zVQ+e?`(HtmZGRcQOHJ6VV}Ad%pUe4$nMzACSFZn8RxAEZgmcC5lxZm|{e76ywn~Ry
zYyPI)A+#CWVYEhOX$DaORTpwL7fXNpe~4#In(xI14rAUwEoC03obL(h%O@7Jti8@&
z#GhIhD=+nLYx@!--+wi^&Av)A^LW-x;QGMNbn0&H-|%O1TfD4d0(ZSon;!P==7I&z
zSN^iR+t94R?zKnzYiQxAZtIZhiRs#rd)Q|Li<mr3?YlMi+KT&n)4h*AKK{$=!|wv6
z#Ya22r)uW}xzF~TY*iS2M)TbC?N6ha=dIilQg@E!d0~2;{H@-jsrK%A<$+mOGC#|y
zIX#uwQ>B&qZ2A(*+9kOU*{$T5bA2-R&SkuDY1Ol576&|ZCyGvc6>s)rbI*;#ejDUe
zYpq^)=5-1^_x-*2@4I&ies32168rOdNnT{x@`&fYIxMZP_A1qG-Y&Jt?rP(a%__UT
zo|jK-s<*b`W&8doH7V~&&a<R1iC+D#1*s85Q<<Z@3JhZo1zQ}lWn8a#`LfaX#+t-)
zd!Ix}zHXV^-Q?yVds#_%{dAj)>Yh42ZBK)9geqq>a&Dct<L74&mHOwuX14Z*UfN@}
zX3aCf{LhQ)?&~HpyE7$JRXG^SpR*2WzBw~zVf54J{tz|w_MDAO=S$`1DouA%`gqjW
zyWrP(X6u|=s&54Ce2kU0c*SW&bvbX@5#h4$sruKo>v@7)-2*i%UHy&U&E)3TIXf$T
zw?cgCU$q&Ret%jwH*cfuCQ0}2Aw^{lfz#y=y=D5t>wj5zo5=@-VjIS-x_Rb8O&sns
z<aK5`tjo`fd-J;a2}@+D{)AhN{ijUtE4VsOTcf>f@iYB8XXlRK2?_J;GPYT56W3aH
zHZ!8_lKfBkc}sT5?g+{IBRO|khNI;T<8KeYzwd1`d7hZ{P-co&*KgS<fh@*?l5<}|
z_!BP{@3Qe$KJL76(X)e(9)GeuQa7dD|JIt>i&W=$cDfW4pJtM8dA+%7IrF>8Hrx)$
zoW@gMnP&Q|>yLTK_R;dyx+5K;?;pPUa7BAfz3XIswOvk$c21FNl`aTbhdHIZ(3>wl
zSMukTLhl=UtJfX4zbAK!SdRJSPx*oh2~SVUWNxuxn(dlZ$dS<gb9M1wA^Era{_A<J
zFLo8x<q$ZR%5ztj)4R4prZt;;MSM8h<Qm56lR6<zPOpuREaabR`Sob0)5gO^84eGx
zUdi{jUig@4c`J`t@x(qWe#e6wQqJxOl=(G%C)3G$DVukxx;Y1KyX>`dNqWXv;kX03
zS4-2a6cr!b*+0jGuXk44VjTnKi_Re$jOjnOi0)uh3QjhV7d*9vC(PMX;w#VA^7_g-
zk^D~@Vyyn$JvL>Bo%T~h$KVF0pPb9TRk#&Quv(yB)9tr5M^5&(aZtk!X7>($xzL<;
zHL(|b=YPp9lGEy!ZCe$`Z0r;xf9RKI=4qFjQ;GJg`b756pI68Aw@TKlsV5=yeo4&6
z{GUrVl}pX}tFU5@k}q4^#v_TX@6(^nT77d<j|=zK2F9GH^9$cu9H>fR2$J}lyW~^g
zS;1>F-`}+4j$fFZzgfkvN+fE|#?L#=dHHy<UHxTW&yRiHEOP0NR@d$Rr3%-&qc&Gd
zHu8U{-jlGF`{}LQ<%{_ii`m{NYdsh|z34s5X`4fB*?xBS&jb`P>N^XZxzWOynxdFL
zQPN-3Z-3Or6UR^7OX`x}W$*CdIOhZ@)`ccEW!VCT{6{QT*_JgvuT4B0Ule-g;Pa$8
zk@tf3&#dm~vOhj&KWERaKG~2Eo8#x35@YZF*?r)Ad%x|353AZwZSj-qENPnhs@*jG
z-qh+q#XapW#lr=7<~i0>_f)OXPOzGKw5xb;*s&eEcwcSfn)E5<-^A7KIy=Scm8DKU
z@-~_xzcXf;;_Z?k#i&IdQ<|L@9tn{3*mr)@R>}OCKYps*H(Kzw<Fd!PUwfB4?b#4C
zPx@-r29ez29}^xMYAl~$rsVaN=j|Us<Ap3e-|b9u)YnPwTz37Zm33A7s<`#JKYj-*
ze|(VItXU9ReEj5j9nUrMcD|o&y)ZCBrz7?LuX%An+CQS5_&kz?f3Z}(l%1a>{^_Z8
z(#3<kbK^eCADkdtQRy@BcK)97qXA}n`X?-ESmM8m<40z}Bd^1|8{c}`F!N33VNyEG
zC1B6<WST0|Vw<h2ZCei?+FLf+tU~q4^y%gi9Fw;5u+5d=yZ`^@uhf>n&H7#M(!ysu
zEo%GNd%(p+eBL$f{F<Y=Ez_UqcI-N{_PjQ)b=I9Sag9Zm92@zH4<|nQ#1^6ZUS?^j
z_i1a#RRxo`v2L3i$$yO9bfvnNtDYYB)@v8b^Um5tPdL8s()E`mpAt7KU2ytSBpm$f
z^qmh}hvz?^{%QS>ova5B8op-fZTNaYttZ64D04nr`<|B-$F1JDzT^3GYL7wcw6CIt
zlkaAyEb!<3=6@vhSMtY@YdU6Z&95!9w#Os{xnJ5}&UR}{*7<+ZuU9$leVMTLkMOg5
zRmvYuwcXptsK8aR{H3C#knW{8KKZ-B;_CLNCP&>CN?f<-RzxQYSL59c0sFbK+}SFZ
zzum~aIFwPbhw-LiuT#SD%jZ%!_bCe;wLSiQ>NHV#|ByKIXD`h@&+eG;{A%#c+37#d
zDxPc5x_u;d>*Ua9?JNu09*I|+S2xpeow5D+i;S~sNe<#RUf(xdES&QyZlUxFi^+%X
z{?yCg`6OoVqHp)-oR~DLb6LjaTZiuo%@B0_)ZMb^(mm6}SLtiE`I@ZWer`h8pKgiy
zAJ(Uw+>!ORV=~{nDN7f0KD9k-qjyu3BP9Dc|CGqM-}#qqTBNdzZp{?z-Ek?!`L=dm
z^q0#&mnd!OwhVlHwPlN8UABCDao2|L7rWUGmU<rN`m=d+n9l)=;A`t2ofTW5zGydt
zT=tC<f977y{H(pX;aj-M^3ZiBpU;i{tami)rPp+!xw7JSs}DaH-<)<e=j)`WN&6f-
zO8H*j=Y6Iyb=l+9{+}kTkksT&>RaW&QL&nDV+ijXjhP9DHjD3bdKta$7_W|r=5)z9
z43_yR$G)z3c;)+?*9Y5Xg~`cGKXYQ{rkj6Cei}ZgkJ>R=MRwZm`%h|wcO<LV8nIt`
z>fU<2CXlh`>bXdTo12nMX8%>r;&?c(xBlwKj8&7kRVNq5brjacXB>I5ccHO}m~!9k
zZqdeS`&IWAsyy>wdO6YcO#Ei%8mYtXUzt8^tMN_Aa7>Qg5-y)PJ8Ocyjr!?r5(nR9
z``%8dVTn#WdiN*GjdK^weoQI<%FlNx`6JIMnfYmx6gzi+5EKe!{WSNM)P`?U^Se{b
zcbq>pJ0hXwy=g)`*Nr*zv@Bkq{^iVW`?tF357&jT03lXmop<ZCcB;#CX#B63vFP#D
zDLa=33NL!5=<Hz_b1Cidj6ECF@|GMt`QWN^2=^RIWB=r}qECG|T^YZbMLe07s<lD!
zp|PBl>-p35jpF-ur?`A-@eti;ZfSLZafZi5IrBGV#ec7E4{9&J|D-zcpq}IW*{_*{
zypPS^u<>n+u=08KSD%B=Fe%P%mw0_$Mn|Ywth2&FJ@v+0*(<k_7?f}Rw!1A*6tkIS
z$*t4u`=>4wIBfjgYo4;qSC_vX7pBR5ddm<w%U4ub;!C6+!=wWf7DOIUS@-f($$c9u
zu|kvkACA52y=j&*;gTTlZ}u{Y#nx=B4iaZ&eD`gZ>?m{k&#@=gxk!1HQjbIcZ)T85
zV$K})+x9ywcO=_z#t3@;a(DTedPD30r$Dxn!s{K~;w*nQm!&#$#iVY}TJ%N#({K5|
z3iY-P9f8>o`d-d(WiYu`q2Dgax8~)`oEe@IZZw~}qjJo?U{Qg7t?cs)qFRLqo(Xm_
zb^TsE@r{4~BkOC28!UonE<1ban$skKpvg~7U(Sr&Gk04kuZ>Jx@PhasFTz^>B}cPW
z@vZywW43Jc*)N~fE57S2ZhKzh@`G=0$;luF{m09UtdwqFFn%7paz5j?^;fyy-t75x
zlJDo9YtLdYcVxITXR3d&4YYDfSo4Bwz1F*XU)$q88)g+Oj#Nv#P$2!b*He}AoZ6+x
z#DyPf+V`X?1nku*J$V1*>QyWCxFVKpYu}#Gu58?*8l2YN(C}G`$4Wu;b@`*Z0t2s;
zPW~M;1I}!ival@VSf0SekCLBes|s|<XL7ryY*FQ8uC}RrY5ByTd!op^<Co7}R_WuE
z{UpC2yjO_x1W)25mKRMyZ~ouU+W1`l?z}y_lO)fak$&@gQvU<Zhe9XUwN-55oq74(
zt;7qV*Cdx|Ht(6loE)uuh&_45i`PsIQPbXB`@DfY(YI-J+mij~_BMp6KUfl-Y3<>2
zS8&PH|H-QYR;r)#&G;BFt$vo_q#rg)ylzT;A+5?i`>Zz}TY0RX!&-`~@&DXU9e+~z
zemSt1G!-TZSLM5g8k(-Uelu&Y#QfiJ^>Y$f)1r58P7Ny$aW}lUM*Gjq;A>@)tS-!l
zmgpQ8ke+WP%OmIRy>e^AmxzhmSjA;_o(fEnUE}peB*o#0`Hj52KlyjoYHz+7oU5qx
zdd<tG){@gFgWlU}*W3y3N|AW4teCN$qc<aI)yutiVp>gSUX7h<P+{wtQjy)Z?ZD-#
z-RII;qFTTC-EDsEY|QHMf+a#l{*&9hkb4EcSXuMUC$E&aoT*`ce{H&p4)et0iH(-C
zz1|9KtgB#1uU0vBve<H&%pvw)Q8oAZju<XDvwlkUN><yo+<PMgJN8><*@;HKbr+o?
zWUjVZJnF^zKivtDan_%>*L}{*T4(n=r}tIJvZK?VuY0<_NUh|?%~%$<h=kOTl!7@k
zpZO=ZM+sXbS&Bc>kroQ!J^%M<wC+kS&q;P-Q!@_n#<49t+NI2sHD}pd_M{2Vw@lo)
z;B<3A^3GcA4=cMJx#ceJkpHsJHCB)5Ow8VI#ZOzmPsnn3)3<ADpZ#Yqp(_z3hI?*i
zUa7RX+ho2@(|w}hIc5HTV)E*T8+p%4E!e>s?0h6(yUqr|U*S(@1aS2FbHDVi`Fiwf
z;hlMpBfdTHN}ZIw?$zIJH}98^1@6v#ut>^1aY>5io*(bMW?Juead;HhpmBQgwdqn-
zEa9%}c6f08ZY$-P>uF^ic(Pvjzyni;<~=ix2ff&7y0`Moh9iD#GND{|*B@6-6<c{W
zYUVlnkNHcqUUXinJaos^hso%=>UaK#$!-2e-nh#ta9iuO7+*bo@JySm&Y@ndcP;xq
z%c@x^hnQ(=q<;|da}9jAW2x0YzqNZ}Z-)tg=w6$D*z-uWOV^BLg1Z#=r97SR;XzRJ
zr@a=%;SHbUJ{QZl)UXI7Ru(6(G%~7NdqM8;H<4|pIofRg1ZHPHIsV#`Un%jt@5&`d
z?v`Bb{uzC7=X!-Vn^m3Tj@hhzW<Ep9<>X&w+fTP2U)Z!&ws?A<;w!oGc{vaMa*00Q
zWOH+Q=_Bn~i)uDK>X(@0I&WInw_`88mMPuWX*kz=o5|35Zqbz;-+1=5bKi@2D|qgn
z7)$c+&wG;=<o9izdRQ&0Z*N?j-i}MPE}P=lv@FRzaVd^JYtib`f5-IoW8Gfv^|ID!
zvF$i;#y(41*fZyq^HOD5rTnR#3zwvS%(pwS|IjtoRq+-EQn%74<e&e;oj!T>VsmeP
zq0<|lG03w1d(fvaVbXue3%)Y0y@Kn6B0m{7yq9?Ka`D}!$LYaY2k+0gKe701-+?Lq
zXZEn0JuJR*{+Hsn-;eoz-fGxUo3)?sndS6{hwC>br9QL2G1*2f{t@5S?G0-$t4VAU
zTPkI<E~liwd)?#NUn{0^C7;*cw~#Mse$EvJ<FE&J8Dpc47|xE~&RyG*7kK;s;ZxI2
z^8C@bz4?mxy80u0%R@!xF3r6tan<Cagj??o&l7Gb7VlU8u-#+Z_;TITML*MuEJSMR
zxE?Rxdiw8V3+r89nV6aidp2)x@41v4cW_?dBju&rw|7Qu>YLboPxRQt2Tm=C{r)Bj
z>M26&wAYwOT;Pe%sqKqvTs~1lZNqy;`#srHtD~1EbZG26p6=kb%kpU4+lQ+nocu4h
zR^2P;yCcJ9+dJWqqpQyEkb187K664vKL;PZdR->0F!A≀{GvSIu8*Gfm{;<6i|2
zuI^v>F>^)aBU8>J+rDiny7|sf>1O{lZP&YJ>vAtxJ5D>lJ5aUZn}pxN30D^F5UZZt
zXgqbT`QP6YTK`n|xBhz{pP?Y`nAW*z`og!}>f7ffOi0}{Yl(x9&^!4!)=z99ADvk$
z8DeKH4(6!%`sZW8F5OUuL#y2v9sOxj^E9DY;^DQn)sy&M?#YWZ`kZ%U+Pft$HVI5H
zSr|IoOH|=c?%7)D(kYKqUtZgOZ~lg96FJXXKlrNCb}4k}RxR0GJ9BO(+TDo%n{<5Z
zJ7L9?Pt58oc%vMP7dEhR%zAsKc%uH+3z8F=Qs+0c@gF;uY~Fp1(~L_=^9b7~OWkJ^
z&d)MQxNFrFlXf@hZ1ta*0^NsStp)d2%J^HpYCG_BU#4^7C(YM!yLWF}_J=dPsCU+P
z-qjw54fuWb=(i>xGYiWr&E9spdW9FOk?FI`C*B8dt$6WJ=6~v>SAF3=r}$K^?}+XE
z_}Igw_nz6z3;~bpQPV=oIBq@ja=&i%>h4;<6GdIj%htbS&fU2oA}xU@R(9&L7Yaht
zYId-@xU3hsIOEs3qqC2wIvF2${a0v(f13TZ%LT6*l-z>Nud7b2w&7Kh<i9;>R;IVk
zylIS@Z32H%gS&tG|GQhfdj*5<na=m~zs`%$Sa;#awH+R5&xJ&}7H%=(y|kWRTj+#G
zvzt+c>F-w({PQdWtT<8vH?f;2+Px@GI&|W=^#3WJmj)M`>h}xF{abM1@><Ks*P37U
zHt9GwD9f$c_e4~3h52Fe)3&Bc0b-%+w)Ib)Ep2be;QZ4k_YHI9;%{f7R5*Wg1nZYS
z2xoeq(4=$C+i6Z4*T*zD_VDZ8lh@@ayRSUsadO$7i_Z`2HT~j#(?R3WjV<k~wTj%Y
zMm>r;_Wf8yOonLt%iO7_&nA?$i=Erv#3Gy;7#SL}&g$}?rlS*+=bu<J@nLal=ebos
z<V7!Ek8ITV9yx>gPq|5rQS(Q&qG@-+PPNs#7&++$Hk7vf<u*RVbToR2o%o+zn`gQl
zHzErocbsrw^g4LUbN6eHc9ku^-L*Y;epZ|NdBLjfIzDT@hTUADA!X~#xxezYQ>&`R
zfn}4WBClQ-WO{k_Uy)qmFX4pa`#&sGO49i;gQw8wjaA#?y${Z{d|DYTzgu{I{%@Z4
zV<ExeYZ@mV*fMLyljHj*H-;~m-jF^kOVz38Vx8)f7UL8(t95c(Mf1NFsV{Wt`!Kbz
zZCm))X&PPqRq_cbClx|XFExECK6E|pwk6v$4L;lJ+XaqCS=A^pZryk$nB%hSOu41A
zQ-9=3|1c}PJy%S@%crkT^8&v{;>AOU81B7W@SlHy<I0v<eEAY=g8N(qU#u?AG>E?5
zkd+aYcB%7U=8fK#H^$GIjz^!^$uXm(XMV<Pi{3-GZXZ=&UlYGBZk8B#?QQqtA&PeI
zH1-_($E?fTYIO5p@{`CNwY3u7hJO{$-1Z8(f8|%y#(9|!zo$)6npvKvJ!kpky#Hq(
zTKL(x7Cm;-yr*(K?tswpM|!dbm!7R%`%x)8t?fpT;=e+>oR3xuq$?&J%<2Lk4`831
zm{j9(VIQyQ{i_cGU${uM#0F2`vET0XcK>a$^U{yCp0Paod|zL_Yqd%jPiRnCXX}^T
z+Mn~^vF&+1@#zhn(?UUJ?@cy5UQ!VI;_H*sr}!)#<7EE4yqGQdZ?*27ssCO04;1i(
z8Qz;|J3s5oUC9UeQ?JUzr0rdCYR9&VlMGBE%&)x`e3HfAIwfU-NTb{RE48Wfj~c&Y
zxMtq=q~`3iPtqx6+#jPaYcVZ4@tW!OnUVuR*A~B(zVuS9OXRN2v>9J!F5^x(I_c$y
z%M7nirc9RQ&|dZG+WCveGPx?;?_Rzm_v%pp58D;n9e-$MsyQe8E44|p-WVAAqwLB@
z$FMeKxo@F4kN(#x8CW{BOxSF>w7)p{g8B-JY3FJzV>(a&^ir1Q*jDqRd^+#J*L&wj
zDdx3KJ|`l6_eaH_lxdqL__S<bZ|`5ty=~4>LB^>TcXz&8SAEE}Y{R|Gh=dE5loVq2
z1r>fVa0?cQn&+^58`q`zBJm%$E#SKO)=g-?$?u1c<y8U%4({PyxQu;LnX~z;vo4xH
z)k=&!bC?a9{;r?mwaN3-|9g(@b5^~v&Rp~T>uIZ7^THx_`n1mNkUrSVzJl-FK08~p
zHQYz6T0-L0s;w=wRJhusw9FLNE)CPth||=Y9yQr?y~2i7!v7>yGfxW1-8OlW;MBKW
zF|t<CCC$~lu;k5=xj82z51eQJ;@huwXzz*tVjrXH<{n$<{a!3!U1}jGm&lHnsVYp9
zRsNZ@K0U*wZ^I~|pPkhf+ApwF^iM&Rf{3MKA=~B<9y7tOb<wGl{~qyab2Od&+T$0O
z*v7`c_48C(QhXopKhpUlb+7J}P;;K0n|2<4q~9C<D${9`*y+zJ%?}mw`+Qu*YgKiz
zMtqe(uIQT3$a<;insrmcw%!-`)Y)c~r&V$zI<SQKvT(-J^pL1eE({;P>{;+E-f31G
z&#Z+-Pai0#y2<32Y6Wpb+J(J7-4wa=AeZ)zrbP9wl9S>!6YbCa-)`F8m)5qur=K}5
z#jerZr{&fP-_q*p^@3R;vl?IX@0t)<^Cd`mRpw!l{fk~7S4_+{W;S<!`D2B2#jNbh
zy<NM43K!pM<dk?-la;E&BX~OYs>1KkZL3e!7zR5(*9o4rD1o~^_Ky3vs6}FHI-lRZ
zCUR)~%m~NEhNy~P|NZZ-z9R2+`1a?VpAo`*>rY0N`*B<;IT3o`gmc3pRjCVWg72F)
z<j$M*`8%gn$c?v)X2*0nshs$fd1UsbODW=?Q#sru|8ALIx;a-z&%W{K&Np&md$!dV
zr8iI5uCdVj!gZzPc86yqDa54DGnC(VDEC9-yrZm<;xhN7`r-~(cX_d%5TD49=T>*E
zyOaIZ#))xjmKMEFyb-&pmNnD<K+s3o`}gl|IJRz+*R2^nAA1k-sa>j@c{y=Q9rOB(
zQwr7nHTI@Encp(3YdM&;Ab!a&b@t^|`)VGqJ$GPZ+2fm+Zhi9od{(5R@85lQ=j+yo
zTpCZ`xiM+ur?smuJbtkxhvR71Wb2MHwQD&a*IT+I@8GQ|{CHN*p6mJUUw?#!?>#kc
z3ZMIOr`V5Ad581-Vk}>6V)j_}@nw3_yHkJtj+}0~)IGt5^ZTnyd-zq$uCfQ0ZC*1&
zY(~qA_XqVQ@67c49rNt2%C22+&My8ecIh(9bxCUpQ3bnSM+>6999qpTzGGWD?<7Y@
zkt|N%0=p*PcMF22cx_7A+b%9_(fsGyl*O@m#UdYP&AxKmXOpy~f!yD#iYsE%B^!B*
zyp?KRPknZIU-?q^CZ1KU^O99J{!Z44w_sSertFLQEyI7AGLBb&-?R4@JNvuQRcM{w
z1T~3#=8|TK)U_Rtf7tLD>Q39pwa4g$Z~gg$QEp+E&)T=e)t+u=?DTKXJMnja<c)Pd
zwGZgs>lRM@Rgh*F5q|4kpibsq&qhZ5t9s%!6OA@Kc;1}cn{nxc?JJ8V0;hs&z0M>T
ztZt6rmwu4jpqy}Q*UfDYLLbd7KOr+I)BgNQ+gE)%XC!Xv&S&14e{%Dpsq?>hyqL7o
zGEt;#g4dbrvF2P`{J(cA{^~C8h?4Ry=va4PV&)Of>ofTlD!ulc$F(Ep(f?Ct`zHkn
zGqHYPc=t^#?V{P$1^Ux3i`z}xpmV`<gX7s1z8#JE+e#yz@%o=Ta5c^0p5|!-<y}8Z
z&v;8zY5Xsh*tt-eeft8&>*;OnCfn=+P0k<nJS%m^z{ozFdHsf2wK>aTs;zlNFO>e@
zFS9h@(~sBMAyH-%a$jD(UC>b!bMP+X{{6{pt#5OZw7RY~RD9kpDk0S;7J1nJ4Nq#I
zr2pBS-`Z2Ob9M5s@cTd5R$h@@IVm$ac<$Pq=U0~{hu(Cki0|B-_Uc~k{zyIF@7w&O
z%Tl(j5MT(7bAEVcYFUwN-2boHS)00Fx)pCy<G*9MC2on3fmkn7<I?66F}#cH^y&|W
z75~z<sb}NS=RK8By82v^(s$8q(Qiytb7~wkKZb8R5pnzKwPi7DtR8D0UOvH|-O9Nt
z<W#{VrF32CK>xcey2bl8OZCj2sdW0$Qwg^Zp5`(ammlgka9B9K!TRAT+3Simf~E#)
zacmZ==Cx{AZ+Uo;;dnalo)eo=ZmoURUtY0<r{>o)f!<%;ESqjAzPFvD$lPfcy7uYp
zIbKU&@$IhM<aYh$5v5;k!Xge0_pN^$u0I~$t`jbJ;LUBr*Cq$%Uh-!RTP5*0TJ?cu
z+02(k3mNNWm_DW-d!n$|xOR7KaBsScm5*S^tk`SICz+no)tB-9Y`@ie)0ag(mlD4y
z&s!;V&O~5B&;O#(blZ!MZ+v|Cf4j@)bQjJ)i#ILVF+n}#?6VWMwzMqR)p`5D<>_Ld
z?w$C$&t2i}r4wFR@nVxRZ=cdMXFS_Bzg?I&C%mX5qD=3AIn&|>H-X26-iewv%Sy6&
zUo#b#zx2>Q$#18^`)r{nYfftGEEC0|Kl4qM(=3`JQr}1k|Mi`E!&$BI>WSX-yq`C@
zZWPH9wlcKy71Go@8>-Z>r!8u?=^h8y+fCf79KW%)ctpDA&W`)cB$%xpxcqGKhZ|i5
zrHdX09-i!3WV$mjG=H^AVn2(~U90&EuI-rc;mAD(?lnAD`dTN6-u%3^dEd@bK0A38
zl~A*@ZrLgSLO0C&@>eJ8@u>>-WgK&YKS(jeo^(+9w!$Xw@zcZ|FYGQ!>!t{Y-Ffl&
zqKZ3b$6k-Sa?d<?xZ@Tanxs}8-eEjp-2|tg5Aj}nh7vj-7f##Lp=1C3`|@{tjpwGE
zzSODwC`bKbnb2V^SJ{aFJvwTSwwc}SSpPgyZ~B4>jrE+n+>ch31x@S<SG7!$b)2;>
z?PROVgdM-NUCI>x^GED4Rt&3j;jxU}AyjBmks~DHEMxR7<jNLrrynQnj|6X@vAd1)
z#kvlz`*u&yA6>XHIA+$(>+e<x3vX8~IpV_k_S<jEx7Pfow>Nhl^%H;Y<sfq=Y!w&J
z+g{ggmQ$`dE-uVE?-TRS?PHe5^XwyzA**)W`S+(jc-H*mj(#CaS6o<fZ|U_N2G@GG
zOIONfrXM+ZM*H&(g&dK>dsB0|e~I(A7w%FrUdAat@#D?&lk#VT1_`X*8n|hSXWRGb
z_pc~yl=RZMqJGL=Q>CYRx2nk}RWsg#lW_qqhb-HlsGCl>VOM&;hm+f^bgn|K|H56T
zufKb+$xydDaB{2X!3|}?HJUC)e||*dPy4;Y-0tSBwo?xKuiv@d;i~-Vnct3^YuB7M
zDv@Qh3T9cC{9oKmFd_Vv#o6UG!kjr4JsIzEbWO9D7N-Z#4S793slfO{_ZOkRla+sI
z=;W{(Z8&w6<>A)GnXg}e=9HcJe%Ut`x9qT^Z?|0c6xG|*&pqM3bNcbtsK0AMC)B>n
z^GMC+TEIQ|H|HTkd!gxUUDJfVE?wFitI?Qb+4;?X@*Ump37whwH$F`A3@TlJPVMU&
z^XT4f1xm~Z#2(jXwI0oWllME|&28VModp?tx_8govM#3h58u5hOM|!Wi&oS)q}!z$
z;gZnH{L-#~+vk61`jN&8)~8LIlf#&5Ld6v)EDc<4lNylWe=fH7#J+<wri=OtR;q2T
z$bGw?S<BF;WZ%;JcP{;ke^LMbkkQh$GOro7By8@NozNNfG^|ke^=GwPy@3n&oj3mY
zN3wcD%0koY2dw;OCayTjb-mKF`KsiVoi|mVabA93X2!VYl#J$&!$Ov&TX_EX$hOT@
z>grOQxUko*GibY+-Yw>x{*1kQZ=B$K<3Hi>0-;uu@<=X)Hy;?;4Z=7k&;PU2XzkK0
zWe>6E1<Q*>oi3=|otH3KF{$vl;t`Rf#=8^m#0f0g!FciH8;<Sw?A=5hw{I=A{dRG6
z8S8;Fz6Ij$LEB%P{~w%pdi{b$9nPuyW}nYed$dU)TW;3L-yVNI8nlIYZxv;k{IBe&
zYV6L~t7n(#h}}Obu<rhQ+cN?w--7OI7du2Vt`T3k>h6^bFP|5Ed3(>`z*)cQQwKl0
zYfiqXAJVusYThJ;-Lv)On%AG;ecbZyPs^JbUlfG}?(7v4djI_CUme!&&4*LNc<!I-
zo3JL^>It_GM^E#<>EGLq?LB|^{D<}Xyk1p3@Z-#z<ZvxbW4A$PTD{fFUeUrbjzqnf
z)24BTR<k0nENWSny6NQS-A@Ay1%9o2d~V+V-6c^i9=rdfMrTY}u|aEVV!M&yNy*TT
zMQc|J|E*GB_;LQgw4`VTjvUu@4D$SMm)18QJTIuTv0>)#lixL`OU;(qe)b)A_B6iQ
zB&7?N)3-bBP)&d8-16|nY@J+|!*3%(gwBY&)s|VQg?lZXCF2*m>Vl;M4+{^2)w#)k
zCjDL@`RKFzs|}fxW=U%XTo*QyWQ$*H{io{2o}+E$X?4EUobU3B*Ux?Hz2<mUev_kO
zio9>a-kQ9JFMTw-?;VIbeZ6hE-8pd+ZpP|6v9GVD<gjl!J*WGeyQX9|+s@FJV&}g7
z`uG37>AAD7OPZ4(Z~SI@-y=2nPMLM&pC${DKIc;_jTe4#$<tJ5bU&F9^o4cf@%jR}
zCht6zu-B3{vaelh@7_3ic-^Eed0)S5wvsH{dd*9}oOf-;ImQ_q<$iydu|(IhMn>zv
zmFwU4zBuIT9^kUJuQ_VtoB%J6$;Ay-Z<&QwYw<O0GiOo0yI0uJt$2oQkKXO?3MbrK
z6wKD=+Vk3ZzWe;oH~O1h^{(w<LR$?(bQW<sO`mAsceFNIN9@kN+&9wS#V<SQM_iiV
z@GEQ4+u)a$tm%&eVgt=zNQfL-(xc6O>Wzf5>x-wkNBC6Q`Z)Ri9S`iY33+><WP1Ku
zJ>GzrfV(wO?&8~xOh4G%zID+>@ZqBmi3gVopNNTGvwx}Ax4c*40hvX=o^7~&{I<dp
zxyj!prL=?ZFD}_)w}30@@G1*~j#URXiHOckedNe@Ehjd9%an`DYbI}7c;lA9>GEeM
z_w{C9<F5VwljmgX;yVd47n8Cl`}V!nmXyEk`fm9ed*5&N-%4eV&uIP|nclw5eV%Gn
z#iAcuGEYwUkn)CM_4ks~iozalshcm<Ow&j?Q7M1t+s4giGw$*g80t;5;?L*^$Xfd&
zO{e4C{vW6NqoXqm3|L>CGJ4BC_rpDg4d$1p?|G+Wx%jf-M5%~3xeM#1F3+zhy<GE%
z_qF1I=Im&$AF`>vj})G;-OE(Bz7wSWLE}Qf<gMY=S4_8<G;GStl9(gK%eso;*vZne
z&t?|Yk2l`an{ML9o^|Za!7o8Sq)jzg_-0;6EzQt#zj}G|iitfOGuMCUSpSFf(X@GA
zYz|c3-}v+F%{QGDPb$6n!^3W`+Ld_J&B#%4(SgU4WT$PZ{IdGW9)?XTX4HP#zV*Xw
z6=%t3Ka>xgz2C7mU*}`!T<6z!-UuDKzPjAaKk15)^NKZfM*<Gpr<Mz@T&0-#?Q*HM
zvXA$Iwq>(s{`>ITVfo2@>St7yPf7IbF<oe9(DU!X{U6WDot9=;6)drt)5{vLPA=oc
z%vv*HA!p7%Hx|3g%_*IJbjJI4DVzE${1%+(_nR_Hf1g-%f7GYPo{7pSkK#I?FnX2!
z@YY?SWp;A$*~ji&-2I&kx2mxCHnqpLTvD6)phG@y)$Ma%Shw~4owEAu+3(+vXcai{
zPu?dZ<MM0QCZ#7O?<A)dMy#0g<H3xGoQg0*3s)xv1qFq)L<0j5ZIWtg@c6;z`@bWC
zW4Pz}o^BA4S!SpylhizKTUzCo{e4S!ocz4$J8Rd5Yq?F6zX(Q5KO=0Qt=pa_sO$DK
zW4}k#gaw|-WiN&9{qJ1iygF!A)A>!(>0S4D*1nDB+V2{**7l#y#`%Z&!)5b+?5*`M
z`1Io9lD(#0MkSv-oF2tY4rKfnYjgI<>&<*$bv@Jfxa7}PRBU1FocP`B(=LJN>qdw5
zCK{e)nYLT>{IUPqXPj?(I&OQxIRDmxbMko}T$`7rb}#SjXPO#)!y<mwtKC(WwHIS%
zOGi#VBWC&UvtwPDp+V(zBhh(|VRw#({<7Gm=B^^O`q7iG+kQOXb?y1-|7FeW_BYuN
zyYP9Ja_&3+vtZ_liK$$V78)5I(AjA0`Rwv@HixOfik4ZDTdaJ4S-f1pyzxhN+qZKq
zJ3CtQ*L*Iya<h{8am<;R*r-U3MOG4PQetzK?s7_gaz*xJ`C^YNtG2A~|1SKmfbHVL
zwQOcFizh7Jz|zTQ@6J45MT6y~jZ&%Wzv+tU9G@d*cKXz9XFj%K-jAK>;!957UU@wD
zR*G0n{fT1h8<qV1=a&VxoOO7++*n_3Zd%+G?hV{;Gfle}$L{)mcETCUKS7e_E4R7m
zZ~c8KivM8E!5JEy!c042?|R<)dbnWP@p(5|iyJ)aE#|y<C-La;m#p6ZKWZKw%?Ygw
z@rgdAJ4Zl#%8msQ)1LM8l|}EFzu@K6lKt*7602O3B`f;^E#z`l&PfaQP4>4*={sq^
zWbd8!r_)dTRqMNKcwMJz{dswIf$ab3`P08`oqX2mz~YkX+Cwce_x-n-x@OsTC(0$v
zKO#{6{-s$!|Fy?cxa4XqSv#NZJ(PU1X3FiX=HveVb5~w*{giQe>)hwf0pGO>A1@Gy
zxS)LHsq*U`2gK_;<gc=a*ZooJWK{cp_8Rl-Vu|f1^?lCH^xK)ovMo)1>)fKdoBZ>3
z<h@v*{vv(40!vFqq0TXe6MXqsGR{s;+Uxi7K;SWjSw*I~`3Yev7x{W+O#*-QOx_>W
z?cjARsmyA@NyAk_(`KZyUshL^vlZjrc!9I%uh{WNI)?kyQ+)267vRvV_q+C6>u_kq
zzCMH7c`e7!X>z#lmwA7*JIFR7=btaTsilFRMYxTIY2!48Q2qyBGS0B{wx{X8hz`A@
z^4PeUX^CCwvX<VZPej|>`o#6)9TJ55wu*90x)ylzPWPs?s}r~LSr=qojTH)Hd80VH
z<2X<G9p6P68x^LxwLbRyo3r2S$7TzC&!ziw3eTwV_=tV!SSO(2=$6A+Qe0=fILUPu
zdqMxBw)t(31J9qF^tkJAWw%~QY-iV-)sbg@8ckvnnp2%Q|L|<XDP4C(m-?t~eBC0s
z&MxV(tv8RD?TH-^1i98V2mbZ7Ub+5!$PyW=-1pus^9|ja*RjmBKeu4drP=E~PY-`^
zNMq6C(wz;40xDUP-+SdSwWS-f`~TkHTAA50ZSFeBD}Sw*{S`lN%Fep&dT@Jt-30E7
z?~a|D(#aHja(CZn*T3R(5?6b<So?37RdwB}eTU-z6}x{q@oqnVK4G6@)%llh2b+A9
z+&>4_dUOBsd-3jQ%j|6F((A?jL86b>A6O6@zo0k8Et~n1?8K=*L(T{te!KWGe|D0>
z0^i3@`@L2D$`?Nrv)q%LBEdhS{EV%Ns7>?Xs=8a(R=j+q*Y9@W`y!cORo}DBjDgFS
zPktXX+kHiyrI=NUX{JW0(7Izrf4D79u8F$vY0}%TjuJ*Ht6!FLUKTgG(Dr_J{!CBH
z?3oGg&rHl&RO<dxYNoN#nH4S<44L2DeDded4(B6RTuauwbG%9E`h3E=GFnc~q2}6=
zX)Rspuh{<1Ssl&Vyz$P;)V`0ARU$1Lcbe5^-dujmr(mLR%Yy=!gZ@^6W{O*GN}pq|
zoV4wawYI>?3m<Pwr#0(NDJhptZj@^^k^MBcqElybW@=S*eR4Fvn1x_OeRTGb9cevk
zs_EHV=cZI&;-4PyNn_I?hD|efgkQLQ+4l8@fM1vN>WimF@oPOvw0>b5V^A{rQE46H
zf$5U>4qcGy<!aECdDpXV##&Z2o=|pPJ=@vp5<Y)qxq?h~MA#`91}xhxU9n#14bQQI
zr{+Z8ut|P)?W4(*wmD{fyQdw0@FL*%><?LWQ+{uIzWdeO%h&CU6M~=3idhi!(8YeQ
z&4~lPFV^qf;QzlgS$5`(3-|Ia|Jd~YqtUOEUjpUb+wL!NiMf;HZEQVBs3$+Zsnn%W
zr0+^p*0!j7hd9gT%s$Fi=)CTY>WMOqm1h|~=iE3TE3;V4=~CnL46WTSWwyz`@%^T!
zams~Ti<?b%@|7IFcg>fhb+%aUyl38ejj>?fKX>6n&z8+Cc;<VqQDcsrVQvbeVbRpv
z#v1h#*(Oh1TOT{IwaF>xZlTz{g<)<>|K?}i^g1dm_xIh;pqo1dR-Zglqw<G+`GsSC
zzE)Fv?_S%z!SzK>@2o3RMe>xY`?PbPRNX5%{?4wa_v?`rv5#!Fl|N&tSXp*I>CE4_
zlM;7s)=lIsxS3ob#QJfo*ZH*j=l9vPF1K|(-h4da{mTbj{-JL-pZ}wmHziD;nb){a
zNLe*GLRelkx0x^FiIw$^lP8Okj+vGE^3=S1YrgH%O?{E(Y4x#Buggb%mkRKGH+M}>
zLgt%@x>WQ3KX#kAJe1uRIeV(<8{>YT3G>x^oa5uJT>QOE!P30tMCmN~tAcXBOF5*K
zd%9C6Ybd%iFSblse)jj|xv#z2z6x%*D%hm-)t!5C?DBO#EuNWMZ3w(<(tj-I{k4J+
zHTH}(oaYq-RBwCK>^kwLMy_Cn)%<Obia#8?+H&fRgFn;e8xnnS5AQDexs*k_=|d2w
zjm%Wtv%cFoUDdSL#4Fv^Ja_X{aQg3(P3r6aygw*-$2f+StMGl#<!g~O-ZvMg$=#o=
z{Pt&3%!PnUeUUTfG#;Guf>rpz?<Pm9o)p)moFP@YYJqQ4x<zIe$<Lh^`#M_u#_y&%
zIoy|4OGF!g?YMNVEo$bPjM~ag=RSAEew-(6t=sPV{nOK@Pxp$~v)3<LUS21;g6mJi
zeAVZr{d?!fsn-2t-@$k3j?cAyjRFQIr{3q>r`3L}!f3vPFVp{v8Xayo?tK38`(j4#
zssHOrV%54tJS<LS8FOeUXs-Ap`f}!MP0@#4KEf}LbqEK_XzX^{E`4YM^G+qVGe+{s
zi<f2fo|?F5-2r~K1uiwQ``DXg9`v?FeOTYR%=-P;d!6U%ji<fwoIS1o*NL=QJCCZr
zWWCluX^D&K4@c+k*5OgN|Gr^u4^=lbnaQ4+rgZ2XL+kY~Az2<ab0-Tw*lH1C5T2~i
z*!XzrTfW@RDbr&<{aU{9HuqQK{>2Ra{Ci&8`hU%<^v?fPXym$PfnlIi`Mh39>x@g4
zEpgrzRmS@!1t{Oz{JCH4i^cURr5y8or<#8az14l=|F7%!b)7k;f2y!EWSGKa^5mb0
zV0?+%cO91povf<gM4mH0QWd}Ye?ugXWZiG;g`w<w0s=netg;A`i;&LU=kqVQU5n|?
zt(S6Yg3hJiMRQgtS!YaHBE%D1?5NbT@1jLT-@Nxll@BcM@5p8DpA~)~V&eOCkG>b%
zXocG=o=x~4J?;BE#<>fg#D4NsFPF8Pxwmb_<HX4acbZ5UEqmtwL@9=;Hg2h1VO@Ud
zWxvKl$83FEy6%XlsMs$^DB){$uCH6<ROOm+$?(|8-_NR_o&7q$_N`zB&)4L+^P@PH
z&M7SS{4_^rlhd7;Wg5G@#Ad8*?2@Ty5-(kre)~*|?h+2+;Ki5RJibi*J1;Qpt=z)M
zW4f#D=Ww*$E#u6bbEUAekvZ;`%Cb63{+To9n_cR&uM)QqIm;=%vWfL@<m=_@V>1($
zvwoki^yPzI&Ib2glaD#16i=&lJDn-x_oB#Q;j)k4K7LJod-)KndfCBKhR>@U43x^(
zbn%rkJ87$b-Vi>s_{yf{<&mi}x{b^W1+o;YdN~93_w{ovo%Yvq^FPk3t5();3s&T8
zICxa!b7j6#@X<G??k<>N;}IH_=U4b;$-@n&CLI>|zIxu$%Zuiin{B-PZC%wy{#)5P
z<|`ft1S$ngzIsSTaFO~U_9cEcCnb^;?{-a>6+1e?lF>2!(ObLd$(L@Y?^Sc3e&1G2
zWld7V=V^=AEOT67bs^(Hkjc}%i_%=C$1Ch9kL8^^sd4V3Jk^)mJsy{Q33#t$;;(wj
z=c?1DdyjcoPnd1mxTJ9tA5+PNn_+Ja<tmcqH2<pks`u^jqhrg?Je!lNvB6-0(nW;{
z&b{jb=7(=yEc52l1#{OkFS_ms7S4=fz23LpV6~I}^6pz}U)LFI<H%jVeUs{iU*}lQ
z9QIyzp5^WC{~umztm~<Y6c0M~tAUfjOl*}~h;#ORPnKnTtJ%Xh*I!+_A<S>q<eRFw
zwM-UC>>hK~&M&;y`}>Xm(L*fE@3e06bM3!k>-<#y!PLFG_jC0e=#}X=?&qDoXXhs-
zvCwS(Zu#%G@7HlJxn>;a!0LIe!o{FK!sL$4)Mc~mTkoGXV{N!nVWsadwP12~oL%DY
zxo=;ZeTfb^psjA6Qead%dv4DeamCrn%#XVtJwEMpeRAOc8F$YtYd$(DtIlSrU+{B<
zvwyQ52J=n~ny8s2lfP`IqkvdgPUd8X>Fz7f{(Q8o<9<_X!L7LsM@&EYyN2AHz2xtb
z$1^P(_A%AZNxxfCDZcp5oUFFTdC_{W3Ll)>-&|PqX!-`u{tGWQWF)ISewmc*of~^q
z=5;pXwcmV_j1wemOBf0SRX(I-RGNpLtCuePu*dD$kH^x>XJ2daJzFI7_*bR1#Lixc
zq$z#b8m<qxN?Hv09GapGDz#0w)w%@8E17QGnX$rKulL@m=&URG8b3vz&f;Crz3SHV
z=ws7%2cB6Vt#sM*$m0q52aB#h7QZ}ua-n40<j6_ei}q$&7&2uC`D#p=dTaMlE<XRS
zPJ9Q}ynXj=p>*B}o2}pWorrv4wjkxDVewJn(v?qM>k8eBotLKG;x%*ramP&Y^Ua$l
zU9-J1@5Hh5s}~1Gug&XtBjjgmzHXLYQ0Kha0y!B;d!|O7a=f5jm-4IQQ(ydTcB|!6
zS~o9f&18PEeD{rqTMt#43!UHo>(fR3+Vtk9_5WDQru9uKRoS!tUjE$`tJ^EH`Zn48
zS>93n)l|V|=j2?DDF)XXqpcZb#pZmoQ}nTCTbETNH|f((BeTyQ=K>O3A3WI;YSMRu
z<&*yMhqwD?eW_mm=Ep82U$)gsA2?5M49Y(ua7XL*dd4W(T`37+PaCV>x;mdvotU5=
zwDW?PX4Rz^M~knv?0sR<A~NUt)$*^iPRj@Xeto(9>f^KfPW7elUo6c0J-{J+Pr&l{
zs8-MUQ)N!9@r}sJ-Bs~&#{0|5!is<2ICq41-K_BIwdHPCx~$mdE43KD{>y3ldBKji
z7v)ZV_ByGSR;8#mdCjTfH)2P5w9IWDMcD{1`MXA6Rj|^1nc=DHy?ZqMxBWY?_{fXC
zJF$tIt~CmWeVw_d>$-3Cy=fMbe3FUGX68<!to7Dzi5{h0Jc`G-)ayK+ZTb)<_d;2G
zZOO(mchQLrADTNaG`b{+aIfr4<dwU5;Pshq{s;f8Yk#ln+%K*nWBy!>uYJ+1ygLbc
zX{?3M=JDnj&sd#XR&`30r{GP6+Jm!v?vI--pE74IUBC9#9cQQIztVrz7HkmpJLRP>
z(SG^h?gy#+zBTJEZ`;dkcD=@Hh4~}9ifQGyUvlW*$h!AuTf~u&^H+98NUyvraw1pq
z$;~R=w%-1p_a_(K(b|!|zO2^x)78y#CzV<+m3)1~tUkTAE>li=nc30pOBUTQ*<;_M
zov<ppPBeOtP50J0E_&?I%l5r(-9PC}bS?+u6IbQ%Ufb56tC=3oQ|!EY>k!lWs;$zI
zCrsZaeHNGe*!!UD(fjRvFFh`u6*72m;&!2z{>0@j>$X|E3VZ&PZQI3p4-9@~EWEp=
zd)~|p)wALS;y1QlUNNz3x2GWYlI!AYf&&dU#J^>qew)jqsX@s9tBXTB*9P8MGTwJ<
zc74CbIp^nxy+zaZ-nRN_b*bgf$^6Av*e`$nlk@B79zmIm<|9^iaSL?LvEJXvJ+tup
zE|I`b*1PL2?Ac=dVZ{Mc0k@kuOxq^7)%;jsX!6DCwqxn?r!%=0a@+k@eB=E5NVfB*
z_*Y-#G7}fByW`VqELP@gDZlwrOS<KUQ{@-ueaM{1zfEc4S1a+LS1p$(UJ;6$XJw`G
zzHNr}jY9Xor}M40Z#)*}Wt5r2EY>8wY<@s<x67}EwFlR#rKhet_lm`hXP(mR0*ksG
zKNuN`p45mrMY1Qz`30!GE<LjRhQzcdUvqZ6zr5;1KF{@_DYrP=VvDZUnMUt<^Wll^
z*H=lerYj`>@7O8*Mm{A^_ndteUvK&>r#mYr<rr+yONg@CI%}naRnKlq*SYr@Cb1PB
zJKAJ>|EK-j1g9q6tqm9Lb5p-9H$3&=$>9TSMi*07IDdJ%e4hF3n|hTsS>J4r`>zwd
zANRSy*!AI>s-B;hSf+LC=j-hiJ?g}|e&v$g%!gzq?mTrUS#;75`{axb^OrXjW(hIw
z>JO_r{Ys=|MO87=>l?x+PcOY=Y!LWX+h(_SQ=rnJdnHdcojtdM>yEbFo@hH!;a@&Z
ziRo`#J9kg`U63s>>Cc>t0(0&jeARjW?Z?YDk6!e8?Ku(cw&3*dDRMC%_@71I&{*=1
zskeLCkEDy-wO=|oJms>P72@O-9tn%<8BCg8+P<`X>72l=Oe@a+R7lRyFI|6duB7v_
z$V7ucP0gS$(`N3Tx$f&1W;yqa+C7gZb$O@Ep1}F;;<D$WoI8c>=PbF;(35@t{QDhu
z?*Cgp*}ne%SC?CLbK=(4O)>6Hd7-Iv+Oe|kuCHSKpVD7<zBKQsK5{D~=b_<+V>R`E
z-2TpqTD9csl(pt&x-BusYuhjXE;a3rRXAv3$FcjkxUPwp9n*ya32(igET~;K&E(e6
zTl{<4MfNIuus)(N;gzIIK$ziaA0w-81|q6)^FH+#hWsjaI9k;G@$J*I|6goQd~EDH
z*U(a_BUEye|6ScRNt>)A8KmorDw94R^_|?HA0q!@!iTb)rY4bp(@OVz*i&{a{<o|9
zf}@O)&R1mCO3s|!p1FTD_ud;{1Cn-{xLUS-$%*?M(zxI6<Qn(C6&YJD>OEY&m|1RO
zxN=(AKF<Y{L}W{OwoK*g?0xe+%=v2Rl&HXsuZn&Ba{C?Cb3Xkkw4S%=>9ZxB0TVVp
zzRwf#c+tPQS_`g)DxyA<gY6W1?PlDQzqi1D&4DLN6&C&~UCQYY`}yt6!xMwjlB-x%
zL>domd$!uo=4E?*`0v20U$-ahne|3At-NrCS^Ul$VhQgT7A<qU-yHNKgK6!)_RpW9
zo0;ysJnbPl`)YI2mNYfLL(iu!+0M$9^4IwBgQnx60{ZcxEX5Q26;J*@Aiw0x$tTxV
zs@3k_$Q|(}Bkb9PD|1&X1YSAs>@>e`W9hRaVtcH%zp3c|7s=&m|NQm*7a0=FU*CwC
z@%_D+FlB9>+mvu?t=<1tEAWWFlYY65HCZ)vsi#}Q@?GKFKeK-LoZo$9;+F@8KUx)D
zOw9ZiGwr(t>xUNG@3lt~w}^hZJGVD<!MiWpS@%Sz)|`AiIfDP>wU%6y-7`eD3)w&2
zDVF+duhpYcS*NqNpG`Oy_Qd_j-)nrUK32_H;i<ZF+qd~oePXs-@7-};_{|;lnNlBq
z&h?ve_{Xtlj_sBVjn-H5=Sdt863K6#pOlnvWf%Vq)7S6X^?v%Ci242Gdg#0jvkEwJ
zH@uu{e53JKd|97b^uf1J*_3lLxZ3OMB#ckWrnSW1d0i^REPVX`W9J1S47+%y7f*lw
zHu=73@!smT9mkt2bk=&lE7RHcsK|fz+BUmy*J6FXSgv2Rk<X!Dd;5x=Z>5V*B+M)Q
z@w2shpU2G9v=i0!o6f0zxxX|?nX`Jmcfivm4Z(Ga)o&-~zwSM|nB9|yv+uHrzyjUJ
zS<_|}$bQl0ty&-U!L_gDMPt?;g9{4-_Aq|=u#%r;XPoFXqh*bs(gXjlw6fSTbK$Jn
zMl0>-ImyRwy50LneTVk-Y~|VSe{*<Fnx`b#x3NkmaK4U`+N~Lj%?hfo{}Pt?9{cUg
zvzcrb>T`cOuDTq|;cdX%5pPl=Tp=)hTDHRSTk5T5nq4!md9+p9ZusQaFR!!lLHDm!
z0^0&NMf$bRpBhp(hwXjtKgKyZuJPZONgPry%sA$KWqU{2!Ob<b6^B3gXV?};9A#Q+
zWU1cJ`}D~S`JyATeHShLc+Xa+3Y?Tbc{4Ay_2<zhk0MbssZGzOH3_*YFFdzV{>Jqs
z=Y?N<zv3LvBBRE{yPeVc?8cJW6Ry}4oM=9FBu6zT>QMG4heWAOYMk8fK5*|lFe^#Y
ze`Vl<nCZJX{UYBcTTR;hS<FI0;m;j+u2rEsuN2O_-CxwQwJA2m?e6XKD;X}FI3)UV
zPQChO6Q|EVna#JBD$f@!^7%CFMBvjoPYq{I>$7V;F1&WZy&1V?OC_|$R9uh!4c>5M
zr|a_Et$yb7<&T^H+LhezcBe5rX=3;Wr=y}?F8lR#4U3$age6uO9Eq5EljD2LLdEwo
zM*^2tf060WVdqI|I;nG=L$hw~{vWR{cY2$D{w7#$lK-yk<vz~+8V1uek2+1dvc+a@
z<+8+2{43VUF8H-kY4iLq=8tV+*$N9!m7IvnNRU0}kejou<gC)#5T1)yj?8<$W9Rgf
z&)#j7vT&%1E880qSo2Ix`m30==Ceu5_-Afe*v-hW&awagHZzI4#TRE^J#2KZdV6vw
zbA9!(9pB6Eh2(KgjWrf;KG?7$=xq1J%!TbeoA_euleSj+AF3-@(muf}dAY4muk=w)
z#r6+pj!aj4aO5d}Ghf}4^OHk*ude_6=0yg>!?Ldq`{iE7a<d1y${UoauP*qNvRm!(
z>xuggD5#&m;#yLm@M~iC5p&zue@yIn)z7jv&Xw`ensnvD(|by420K3`-S?^smU5Xf
z;gGmf=wqiXJ*Sp^k76@%?(0*vIK0d~_=5V^=gbLQs`&;tU3NFrM_N`SCr=4Z4|TBL
zvu|d*eHia23!^`aTA#GcRG-6gaYesU`BgR_(;a4?e?EDYD!cOkYMFv`Tfy@WH=bN<
zR#U$BRFQH|ShB!M=d<Mka$IGr)m3d<RXZh@A3ZE>7&LFI%%8w1MM*QN6IrA_b86&I
zi*oZ=-g&9L=x+c2x<?;_Jj7NwIet@ozeSl_T4(=9f3};NGrWGjtncp5J;%oXbEBR0
z6Y;daF)<wp3kp3ZEVK;Gm2Ol{o3-_m!lIQtu08?UN6KfcTEkKs`sTl%3qvOF-Ja67
z2V<5N1RBm&lYie@JK=6*=&`pSXU^@;UL&0C#dj(~`16YQ#;f9w8wq<yoLOj_=NFsz
z=2z!jiFju%C1I)4wJ+JM_iUIG@#e`5H8X{iIr5DauTTG7*7`C@>cr;%s)jwAwy&Me
z_9yDm)AW$nGbj3d2-V+Jy-LSF_n!B>ohu6F=3n<*eP!RlBU7~(tUK{?5rf37PqSqf
zY%2cqX&KYORZUV?e%|8E_VPAP|MP)kx=8w_xuM^B*PeG^yriJQyok$e^6A1?hSSPg
zo=&|o?Q~0~;+*KYk;czlcnXiqsYw-ou4qv3pv8!zoZ+J2JYV0Bzh<8jDSbKR_LSR;
zGkUvEZ<zNjqASY&&)feSgBp+c1gLxs`*uwuc<zDxPM4L1ueZ&O61y{Xtxw8nrq@Eh
zOEwFnPyH^yC;wIS>(|`>){X3r|9BVv{(ZD?%KYPhcJ}jB2L6*-p>W`z_{l2)DS8J=
z`IS=58>erK=UlDO?jn4r<yo@vvJ#^ecT&!8-u?Q5h}?-|Jb_~CJx`^ZCG@XX(%-Rm
z{=$tXC$=~EFLu0qXTO-ne$9)&kN!7uH)vXX;Pom!VXJ^oXU=$bhAl5UaWq|I#{BgK
z?2TXi`)3&!^nA$vW%hRc%Y|`gw!D2HH~I9cslO7dmWZ57+4|?;|LXpkrx-aBENdRs
zO@6kc^@{!tr-z+khcug}T8geyX87$<a%hvE?;JUYy*-j4vMP#gI;^X5vaMovUC&cF
zwVF-XFvRE5%lDTbU##(Rc9~{l)wtC;XaAJIXPcKyW;uUMi_bK3!zQJ4`--Erdvwx5
zs~b&X&Uq$gvTa=EG<$P6bK}|c;QrA29Je>xGPk@wwAyQa(-}Vzrz=a;@>ohM`1~rv
zXGR}T$_r=B2+~%5J$L!qZ8P0+m0K9*n@gQIYI^>TYS5n@8z=7y_Q~$?TEm!|d^~J>
z_fF*}9#f~yy1VP!8HPIc$_v78tmPdXG}J%-v3vdUM#8K&g+C1DJXja&q%LT6Zu`Zf
zD?J5$KkK!AKiRrn{T|nkjfwKR`%{&;W%Snae$iYyYr^Lbjnh1S73^A<I4NlBo4JvD
zzRb0oH{<5DoZ>U=(yTX3TrHnf?0)!rVy%6APQSAKqTt@c<-HtXmjXLul3uW@Z(vx-
z%c-0rsguE&`P^--`rk!IGIg&U_@nkexZ*gMT)DxS=$9+f*8c6vbXz$0z4-CAZ(nM3
z-duSz{Y-<ea_Qo0Yl`Oa*vn@;*Y|VDyqwp?=`wqn0oR^)`{Qh<Gkj;%oA-8sKR<_u
z;!UQ*@u?@)Yg$@Okk3-j&3Pd(scuJ#v0##fb57g-PGvQf?wpsB58Vx|z84h9#Y~C$
z@~_-!%h#U?vrYzD21zCz-N#|h$s%7Y7TUV&|A#QKwL&Mm1!4|*AHLPISo6S}&iiL|
zqWV>GLLSF%Pf_-0^DF(rDaW&X)8hio$;{mA9Tr;5iW6~r<|tEd@<CSO`nIWVOWzf&
z%SpFRS)`~vua&tpdnI#1ti~JmQ`(a>MW-!pO+BzGyzTsA&Y+}-Q&%3n+bi{Bn%}2O
zPP2n`*Ye)ma4duSk>dC3#YHEUde<GgR+o~zsprl4y+WK`LgpeuuJ-T0obmrRGxy3<
z_o8=~{skR;v2yO*)#ipR%6$`#zgnG8ZCG=cb<Rugdp?_&e{B$(Q<ybj>u;vubU8Qe
zPRCD=d9v2No~!V_Cgj?+TUqmJirqhZPR?s<DxWo{B5i6$S#as~;=fi0Gn&5#XD55b
zGw*nDzk6Asf^a&k$CX{vKhBy|IPs)vSK7+%X1h5Zy&Gz^En1%Zveh~~nRnB-8&2Nt
zev`}`mM^eN^<;|5sy;m@=621@J^3%5{1&%h`kTDqT*s1)%LV_1I6E$MkN>hk_0Hky
zN?BEvmVcZ7?%mOI<nH!=Te37hPJEp6BU5xq@C<);6~8-QrsPfj8<)1nVT$R)eGB={
zS+p&ck2`(!M&-4a-#=Ekx65v66zcSIF;d>nB4#>uiLXy()L)j{EelU;#fpZP^Dom*
z{_s}e;7049H4R<=+@|ZCvazV|d$YsACz;Q4g-BkpelJhl9+v&rAISeI;Bx3V-pyrr
zn6+Weq~9fB$M$vKv0Hb1OV!qA&$XG4>}%h{o5pa-Am8`=*}#iWJ_#wuFaNSkGlf6)
zyN5>Wudgevu3bLkiNBf`_s==*|2DX;y!3C=>lt~cUGH1<=gBEX^h@P(e4p@Y_wCJ_
zg%8BsJY#dKdHvFr=YQ$Slqr00*btjyH<_<#^O@iqdRh(r6+YfJ**>B*4w)V~xh}Om
z+=-imO6AU6`kGa4?HPZ3>AZ%CulXBOP1~jBUsz!j5jP>o@Vbh@UE{-NANtEIW}V0#
zoGAKFzGT|!GYih;UEJ?-W+UV3sE>c5HSTrB+^i6LZ_B;*gFw&Y=I>LsuQ~DL<%9c+
z9*Cs-yXRW(iS8Hd*3f@+LUgIsR+g0qg!c#5FFab-W5HkNvRCfQ%h`)&wC=g|fj{Y3
z=_%`$9EYHopP}5-eZRaf3(bBr=Qd0HdzZ(KS6%ge<~o-NihlnZUANNCdGnWVFMZ~D
z)a(jklVe@!F7<1H{JnFFpKN60n>lTlQ-1B=r$KcQdm~kDU+!i){BqW}T!ky&-kNMU
zbL8_*f2*3SjCOxS931<9ZsVW8+9)0u{^^5m?fSI0TbbQGyj9lfiIj#~opNsd%5wW&
zX6TO@-nTCPZ+`x+;K_QWz1?;mKNrdK2A`H#vFDMn*y5k7rf&&e@v8io7}rLnuDJ#_
zGIL9>FA=&v`^L1H)o0^)%jFNraT?dw$;fPHS)b5V`q)5~bFr&&bDQXt7Bx#bX@>_(
zM1P!3sh*VCpcQocq@h>}tJc2wg|Ukm<}CU+=Z?8Tfme~fTxQlv=19I;w%_yPb{~j%
zy?u!^YiNOA?U9vUQE^Xi{JCS9*159Tl>N)id5&TM94yUy*B*9K_q(67{Kuoh7&Ylr
zn(?<j{;Hii$F8VctlxZxck+zoe;B4ZrGE{bnSbX;_)D97PdWYalX3IyPJ|h+p2@c{
zw_PRXYsj>7iOr&4UvhredX$~cJ)uM0`sXVpR!@iD592%joS3+IADgX#R>JxFuRL_(
z{p%*J(f!dZxb#EWuUzrC*s7bEnl&=vX}9IMpPv^$tjr>MdNYe$px(s5^(^<_b1SP~
zci8+rZ6Q~UmwEI-uhX}q7F>xuUKsM<bNj|EEl=n4#ZQ~Ol4*sgrn=_UKaW2B%ktW~
zccIPOg%=}F7`9l+T3<UCcwbD@Zh^|Bp7uhuL!0j=o-k17_S})$u|mu9a-GDomcv&>
z&zw`Aosm(@v+u;Zj>XFs?mNGRwLN*&Im7uyE3L(EvdLu~4x0SOtw8@cpGidF;YW{;
zPe_UuTV>pR(Bs22jqTg+H<`L#obuScQ!byO`|~8<#kLY_kFS3q%hTqxjl-m}cwxZD
z_@-$yLN1+2E^+_rlyv0wF0b3&)3$PKlka~j^=Cq*(AQ;#yn4IxHb}PVwk7zzF*0kL
zdB#$5{R7iEJLX^cW>zxGSmLXWWRt|TIa9L#8T(x7KPOfwtEf2h=8vaxN6s@Z`@?Y6
z?wR|eQr)oPMp2;z^*AQO6*`+Z7W21X)IVDuyDP(?%Tzu5_tS;!`RiV8d!Lc}mfiMv
zwd9f2Ps<Nz2I?_qSyo@KU7vDU$%Mbn{>Ji^GbKVJW1FVvEL@Vgwc^L&yOEVa_8yxT
zul#fCO<&kOTk)i2d8<8gzCNz6npSIGTBdUDv%a{!eeY9`M<<`xMY@JB*()q$xa0lK
z@*<{w+oK!5c=|~F+!eJh*iFUj!^D+*TYow*Z%o)_eo5-^#Dt~=4?UT!D%IM$H&w4(
zy1DMi(M2)uZ63@}EoQ3LouF&-mB(TJbrr{C;o7D-lSMu*+%Kp3fu-e;8rR+KTK75i
z!9k0khBoR3?LYkebuIg;Y`f2D?t2qo{%Ofpe0DMDeD(FZU-x@MUY4%oDXC<d6?TyK
z-|C+5qw6FVnO&Y#_qR2D)255z!Ed~+p5E*H|EcM7ZvEZvH9O9IHT`VNZL96~^9@&%
zkjeSKo80e3v2RW_C~i@l-x)W7U)(_Rd}pwR-N`-%c7-JZ?+(n1a{B6WYTrEZ=Vwd*
z-j=nL5|gibp4rkZeKzUSqFK?;D~g_eIpF^Dx#K_X+qplK_w3Mf%dxw&w(-q+?W4MW
zW#K0r6}B#l;CUeRX8-bUzm_l_J#v39YtCJn(!!Iy;;Nr+Sxq?F=(I%Oh32sp0q@+|
zPOq-|rCHT@`MYMo3T1=O1sng_3BKC5qu__7Xw{PRH@f#CuQ{E2c_t%4`r)+~?zi9H
zEcpL_e}&*Fad%;pnJu3qCT})lU(l0sj8n{9Z}Y`1Tp60qU;j6FDJ<*P)}9rzdzO3q
ziLlp!aRF}Aj;3yEc-+)@{#?j=zM^f1qNgbBKeS-;oyv-O9*(Pl(^<bgk6QO7!~5(s
z(~J6?yM8bipZq4%H79d|6vM5QX(!dPHgcSh|9#4!dX2YN-NEZO6xht49CMYb+|?j9
z`O>l*&kw{js_5x*HI=PAP*N%T-1JoGHl<TPchspWeo*2#ACPFRy!Z9yZD#9kT?^v;
zzGrg;OBi!e$}88)YY*FeU&n5#Zf~}($sn|4QmV(Z&jEK*RhJv6y<PfJ<;oc&|FAj7
z53WCA$8ONLh;QagvG2c3n)|9e?W^*dSY;(9_`0~~${aiDAiYMIX@^wYulEUy{Mk8;
zcYI8E@$8m>RzSC8)K2-GY3$dzUB9VKxpMZtx!Pm*eX+kQE40)5PaR(zwB<!nL|xOA
zGnY=PSFN2ETgUr0{@_o!wJ+YSzol%#y=d0jN56l|&N-zzYpLq)^YWkMn?KepDY|{7
zbLRXwv6x#NORa0wGRynCdd+H9bP8+|)j#plz~H}oLp0;lH#6cNPLF(ZD{kt?8jqhh
z_)>cExA%lQPs>}ORTm|$JY|EV-nQl*{k?OSzL-(k$<(~+-RYM6Li3rQk8;MRan`#w
z>MZZm;9at74nx2lJD%XCRe?v9U7t;4t}9{vu>Q&UpDV>|r-pl_x)|P=zl=LK)~xB_
z2Cto5FGT+dB->6fyXo{yqi@4urFT&`?sz6&pETV>zn9_gh2PU>yyA&qy|7(f!q>p`
zm+)iBKQr5-#Ikg|!?_|(oSyZiW6`2b{`G4kROd`Al@mU4`Q=NiV9_~Re-clmnaAzv
z`Vr7;a5MfQ+v2;iRY59$w>0Rse)OtU`dsFlKJVk#Ee?gp{%_uOvE4Ra^BreO+s<Qx
zx4jNVwa7=GJ<Wf?d#Cop-6b>XL`_*gJZK2~X&73)qPFw;nK}*g&sywf_t$XOtopTl
zUGdJIPKHdglX0E%c0Ih-AULtxTzti?DSKoD_%r%9tqYF+9Cn3i-tl)S7iPblS!MTf
z*;9G50wwuZ$9Jh)>MB}xO{=+5>AlTHxTC{EvC!!5#~ai6t!92ml<3;_<YczrwwkDm
z-I^<OW?%ZY^lN{#MOeYf-LF&s^L|>ayNBP5+gUqh^+%?Qsk-b!_Q|}CsRc{38a=+A
z=Vx6NwLi(7vor9Tl&RwsZkv79oA^B9czy2Hv~UDm$((Q~OZn7=lK%}C_!i7jQIa?k
zW!kMb|20#u@04W^R9?+{IHlux$I|xN&k~IXW_RvB#9L~$FnyA`<;3`dP5SPeCrZk3
zCr{*(F4*Q^8^HW0iIwxV<EJ~H<EDhfPn#>^!mBd>HKWXm72A)pTK(F<d%M~Fu<(Nu
z_x$9=bZZ@j-LCWhD@*w}b89V=g!JXei7RePw4CxjVDdLDcICPsKNufvXtrW7H{<U-
zVzQ`F^FpH10|&pty>E2Hyq8S)C{|qew?LqxulrW`<N4lczf(;PBz@*xJX__@hav-q
z2@@ImSLkh6=)dCmwSb@%A8votNtyfV@P)#!rt|N|B<wuwz49iH=IiuG8F$es?+h{%
zgr5nQJT9`RH4nNUTXy`E!?ZN}61g?8O%ErC#j#ZwP5-dQZsq2S3qE-Xywuvrb<EYY
z&-{V$;f$l9$AU$~x*7JiFm^EYsxYW`wFcklj<lO-lM!>!%x9jvY5LQN4e4LGGiTmR
zRPa67o)V-NxA2b@>(he!N8=|uy0~xY*&M7B>)vsOQ=Wb9zMmy8$^rw9Dc-ifw8Qaw
zy3{wj$8$aJY`XrW=lJIf(RP!hb{l(t*~cjS>}>8iC%zK__a4OMM+8@g)PK<_n&|pb
z-1nM<-<;d?qhe;ccwW_NnBw<vPh)et`o_o8UTJ(b`dcVDaq2twmP7Khk6-rG%QDN5
zU-<W){qr?p3)`K(O0C`-#32>+;ornVuWYIw1ixogebMeKR`=yu>07Bo;tTV)vaTp>
zi*8DtWLogkZ`Bc5_nH;or{3mx&2jzb7Ii-+p*yc1zGa=gr)b&Ym$FP3F5lj9)#LBt
zx@qQ$|JG#sd`;S`sot*BvBKzCXtPk{g5%1}>?_=#tzYTNYBBH6!PS~Bexe~+73aId
z?{N0-_IzV{eA_zPx)zyqSJR^t*(Yu1EK5`Uu$sd&J=HuTuTVzG>f2t4k0M*M*i=8y
zeQP4!tu^0q;v3CVujQ&_^%e=~-e-_LE;-xX*z|`!k7=l7wCCan%j~1&{w960-f?up
zA^t?xKygh^cJ{tQJf?c{QUWC!N=@@3rpV3OTP_j$ulV1Y0>}B5%U20)`&Gi6>vHz~
zqhpSDgul2>Ub5z2cSHTs%jSP4KQ?k)P$=p4OPhJEqPCl5Za4Rr!~mJK@4k9l3-Bdh
z+mUkbX*b8293HLR?c2*Lcl1Zh;!o9jvU1B@wFUkx*~f~W7c-kJ4VV(@K0|2TZb6X)
zEDM9K2IT)(-M%0~Ka=rCLgvq3b*ypqPKUiC7yioJ$};C<^e6d~s@(rS$k(Lk2|d$Q
z;BxtxeQXV9$NU=xp1XZ^&Dgr8dfLr%A$9@xP47OcEELecs~`N|?ADxb@BSwU_{Ur-
zFBdCO;@f>eWK%P<{uj%`XD_n6yBoi6-Agt@p|JiZ2S0m=uI1J>WRP}vvOllWG`FfU
zGqqv)X(oAz!+A~aTc+<Vi~1)v|GwwPXw%E0U(y$U`<UI5n(SCJ?fZ>`&Mw@BFUqEd
zFrKMVQx>~h;o=m*qi3=9{IVTSz7;v{wUL;=a_N~L9TQa9pU!DeS`)1DWnW-~qxuH1
z*e`#M2_Fr-s<B_8mC?M2^U0GBo|ET4_gDDszM{v+?ab~MhvXw-Z}+@+`M*eIQr%kD
zmkp*yo#&%;6_XxJ`SRX#3$u*9rBSF!?)|y9j)Zw{E1R!j$^6UU`)>7n53*m|)N0LI
ztSF_b;by=i8(C$r&}px8mdp9Td)qfWsSQ*&-qlf(HmB)>!6}BRAqThHWZTB2U8|md
zckkt%4GuE$Ip?3foX2bubwcxAzp!Sja?*dhuHJpgvpy`-o-(sRD_OEA?U0z|O+UdY
zwqL(j{C)F&;jR_7JO$^Zvyu|8CmQaXV*PQU<?gB@J_{rS^O-+3DN0VhRLx^{XWE2+
zXP>You)Yz~E$!KT^L*qL7BP)iTW?G>TlFJl{q#BSS#GB!U5n^dOyb}9y#B1O^pw1a
zFGpObD&9NAUvCvR<#F!bXFUpc%JLMr1N1YLN}H?Y`oHv-@TMzgmd3ZNGmH|Cb7t84
zM90eW@y=L-#cuBA=9<Bo!LB)T=lEEqy$O|^yL_U#S?h`AoRhZ;`pd-Z5Y%LJQonu7
zVJ$D8*A|yG9!;tFKmT<vQ|X%_$T+jar9$w}`}<28|Ee-AU*9Ro=G>)r@q+Kxm?V`D
zv3LC6mflX9wm9BtLrtXIi{M!o9cuMw_q_j6AlMT>|J=kr@3`zhMxMG2OH8@>zPAT-
zv6lR_-Yzd5@i2HU$LCL}e7|zvPWraFXLZS~veyX{y^IW|dPlgwHvem$dLuJ3@V0nm
zPON-*-pmk}Irpj=llBLvDJ?B)Et+#w=jTQ9#(M7$st@Lg9i8(d;**Bl7q%q^s=bF7
z*QN1CKe~8UwOZ?Zh`NGTsKjbjgEAJG)dwZb4#*!A$(5S+%VJl~*Z-Tp*f?~ZjICZ;
zSO0p2)T%cR7Mxuyov?|K^Vxx=V(mIbJN@b=z3O4SdPe_5)_Uy}!}X3y|5{d7R3*O`
zJRK{z>GQ51>sI}>`S^0yBKKD<0x_zkfs$vX4(!#xy;`z*`K6?HNAKS~J>hDL*pKQ=
z;a%CHV&_})l#M0t9T)9TY}mL})$df_9NiGlm4}|%fBtT0enUUv!vDPX=W`b?ElpZ;
z{^08eFOU6eoEk2;QuaD~$r^c&1M{E!P1z|sf9txJQwwJt)#YT2NHcr*|DNo_MbdFM
zgWHvM-sC>p*TVSX(zB(J4S~}(CK@c|DPwfMCU<s`_Vp9_H<s{UE8BYHz^>nEZc#T6
zN$M~E^(E%vEFIltvcFX8#ErL1lC7P$`{&{6)i)M!xg7toQ^<V9B%_X5e&*&+<F1}>
zSY;+ZUqr^X==luy)pguovldu61t?a!?6p)D;LyLo{Pgvy@c5rfcK7>Cj&FGKLFCBg
zx!28WqW|vyR2rcENb%+Aa^vX{g6WUnyH1fx4SK$X>oN0@xt{V9FRcBgWaGi7vV{BT
zB9`N#lRdXMF1mV5l)En4w<1QNBlu>V=a>E?R%wsb0y%FkSzd9?ZjmDALEUWr;73o5
zgISNCU#@lJ{sZo%wukO*s4kP<_3csq{aINSF_M2He^08peyj4pa-XIWJ-4#bGK;HO
z^8R<24W|WGy}q@|>LT~A3G=S2RLW`!1pk`(FS!1F0Uy`%53XgdF>gQg?flHHH2-9p
zV1B9b@9XzDHEf;koi$r2Jy$&~;clN8%d=}1Y5UB*-9NkPue)}*)%)A!LyLcWG28xH
zD}5>d`NCt3?7=0$w*DzaPc+S3W#*fyYbP(*!Y`nwbE&)ffr0ir!S3p!#K$uZY<+M)
zz~I<~vw|A;wQqcTl_V+6y=Gq8-Cw6q+;4b)!mjb;tMEtKr;E2|R&S1(Dmi;X980oL
znSWM!PH2YqJZ1O!9ZUQl?LEBvf%(U-`cLlfL@!*}x#P#OZ*9Jt&ptl+&gR(?&2=0e
zH4QIjtn2xdrMXG};X`4@N`_C(+BdrN=I+_9{3mw)g(B6kTL-*@J|CDLEtruN%>Aau
z%%=X|x$KOu@3;8%9cl4adGP(^?){CEOpa%yY?+ksWk#pon~6sje-IV_VJgwEKv(Ko
zQ|N3Jt=F;pT}mb&xuSe)zg$;{kLUBqSpSXl?z8A6UHP0-nGx_MWk;XFBRhVHnb%G`
ziC)?gsU4(n;!RkH{Ud%h1-k`~rCxJaKlD1PSwHW%sMA6j1+}#Kp?$K4c)raPSuD+W
zZGPj6$2&A<+@HoJACR?aR(DB|ZgZBMriZ%pRED~`;QtFPUKP#`mi=VDZ}*k3JDg!h
z4qsmx_4!BT?ul_04+I}>xM36IV$*OrW}2srTtXp-m)^F&9VdCN^xTnV4NqIVWL18D
zXvdz#yPiBav21g$=qIsVnV;SJ9-3CIyuIe6?@z_sA7f2&4WI6s@}z!=bkV7sSIwTi
zC{?`j^ih=0mV23B+jlvJXv|mZuld@Wx%jHgl1kI>d8>}^6}{!>b35t3cHxi9Ce?fQ
zxMn!5$~UyzcKFeuYs#f!b0s?Cr+;1fBaxl?<1B~BpWL197Z_e1otLmwENX6P`zE*c
z3E|V;B)6EC)n^JH`%vCklW;nzTKIr!%khY6zowf}aV?FB^0LoN(yv^)^40PY*ZP~W
zyQTLlxQaisaQ%KyGEP6iwdS%_s{8r7mah61=2L|ZAMt+bo>=o%@p;+F@ZUcdDqY)p
z=$+=&<IB%Co!~D0f2ez{r_TwV3#$W{&Qgw<@on$czV2kz;M(u^{0_(YDYv+!r$h;L
zc74&7<1zZ2DZqFnLyJAc>x<xp55YA;hpl(roOUgD%|@w1v&HwnzPY_<`Oh15R@ov6
z22amu2km?3v+?B;UgL*9j0#uX+F!;V=j!9{EM}conyFK?^q=Q8cUG$&NsninZ@-))
zw>IOphv2LNk9BfWm%m?7rIY&UpTrcsFotEtn+ro^0{+`@1$G!coEsJ8x!&@(%Tx7o
znT3VE?;fA-jAS_VWv-NLi`V|O3K<s+Wahq`I9aXz{PMl8uL!%}aQq>7a9W+pH6x)o
zmlI6OZy#<KluNQH?6~}J?H{?>&YS#>&unOnSQ7H4f7P!&`$WrvetYM3Zm<iG-kiL;
zOHD}2EAvYDiND2Vm$l<~^#$h!2LBH<emdoSSKuBcW<|%RZbGN48_Xr+CfH=yZ9CL{
zXw?s~E7t1|1=|&i9M<Qv4tKL-Uf{kuZSj#S$D0eAjkmnbbPj!2SjM!iUHOB~-Bsax
zjMPG-=6Pp_yixsrNO`lM-Y3T?U-+IZeyDET^2=ZOznp7b+0mf$8`^D!+N_Pdj$RXC
zne$mT!{QnL^~C0h`foDIEYqx>?>7t(VClcVBkb0nPBkWmg<rj&f4_Q4eEF98iN}r_
z)R!8)UGis_{`2^|ca4g^hpkIC*VgU6xk|o#_u@-U)?FEAU+%W{54S(CCoAVr*g>7I
zYxdpn^*_uck`iLYaa6_rrSa#hvyBfMeJ(Itv`TH0*IJ25PAUh~4$fR*I^|3IF^TIj
z3b$sNUy?qzqk^saWRk<q=2KTEl`g2}7X5R({?w0O2NjuJCK_MfbnXKC-GARbdtPpt
z#Iojq)j<J`hWp*zua9ruyJ@z_nf{jWeR5k^UYPb7GE8^xHcH!hqb_yI&KFmzUomEF
zpR<d7V<qc5vjry|w=J%d+TfLSQLrH7tmWRj6JAH(o^pJ0mVEB%r{~0<Z<aUhYIwcE
zX2zv8V(T7SOnCExSGeoJ^@CToSpM9x=J2<)q$)>ond7$)UcS~}m7N+>c+ThbQJ!r(
zvUcw^WJ`KG$8ekcuDnLqwUzpHZp9oEZdj{4j@Nw{A+Y1Y-bI%0ICP}XrY-xbk@ikS
zuQvT_!f#XMRep<gIkLXoV@fR!n>e{_re}I;=aU;QT83tJQOnJ}?KGad-r2s?JZp&u
z*G=1%+xIWN74&swzyG$g3-q_yTN^lKiyZs&*H1jlwQxhoDaDG_lNF55Z4!Q}?t3ot
zZstZ$7lqBjorMjjV}ssI3j4sEk`gy{p~8NjnIguQndW(4*L|nO#reLWnJrG`xTxjT
z-&`~F3b=%YEo3(3OYz@4P;@NWZ`b#J-2zM3{rsjc-9H~lcF~hDUV2_f@b|9G%ajkk
zi+jfx^Wn_bET6XilbxJVx}hSP&OACHvrn{Clm-=4K6+X|d6&G_X1)23#6#L6FK;&Z
z(q_FSyjw$Yb8&O7iq)%(?!E^}8W$`5<D=aCgY{;3bNjD5a`VuHlTJOq{4Z7=bv9~P
zC!O$ugDGkO!$u*?^9!e6k#W7cu|I#u5AD<E67r0y|1H;i_ThnP_Dff;=IxU<ZjLHD
z<nisCm#uq2XO=+tJ(afyp1R~Y*#;agZ4G~IY26yZ|K_ymao!ZA`|C4*Bn#)?H+?=?
z%Ia*Z`1J;jE61N?r5c;WhWSeF(dyA}39UO~n!N9d{hr(Y3ue!=<eKs4(=yLHWy_>y
zB*b5>e_R^f^Y$-~Fo(+GMXayyYpf_))&BJb|D(Q|bw`)(arN7EF1aP4{9A-;*Q9m!
zjLwe7e@4}B`KEly@K=n`{5yx|FiBU=SQQl=>vCz+u0!@k{cnt3^{Qq&WSx01Mbp6i
zkx1H`r%U7Z*(~<$<Y~xAKf=qPsy4s!-gNGk&VOph_Zj7tPF_DFL+{NF$t)+&Tc_OB
zW@-2=GYCsN9g<kSs9R+7?obtr2pJU(p%DMpx7jP*lQr^mqwlfo3Evp|_7~6Xg^8@&
zWtg3REXaTPBg7}q)SHtnitn-22@M5dF=2@a1uoIM*SaoAW|q8Iwx!(fNWZtVNOa+w
zEc?yf^Yq-Gzh0i&)KILdwX>7w%4x})GsCNM;!ZsO_9kM(iEnwfA6aG``&_+y_3hHX
zi#uYBUiCloxc8>`+lk(u`Z<avz4Pt8xqHs&C6}e~Oy_&IRbGo@={}97mTmvO`eZ8W
z9gWgdnCHwNbw$3ZNat3hK*^$I<?3hBrdO|FRTFz6qoQxyWUm?DCbjCW9Z&k?soVLs
zB<?scwY2gU^NV|Gwm;n5U;ow!64nm=%H?iS|2ytL;r{HIH>&m}if?OP>HAIo`PY>%
zHXQE}w43Z*{VOSLtyt*xQ#F5hHO?PaEibvF{UwO?eRAm4t6hG(<Z7Pe&zjoG*m-B}
z@#hcB{FwYrPKWqazHUEy{N>z)-T5B{_H%{zPi;G#(Z8{?Q(=1kv_Si~$*tSi71e#-
z)hPX&F0|`sr(dPfUGAcnvu@1$U)<~A&&d{L{zSFi)4h`S`t<LYf&v;ck6*pL{<3WH
zFY~~}zxT4W+E&U(pNUwy?ps;uR;kTl6@9A?{=WM0)|%bDrf)UPf-7&XK7A_XLSNz2
z*LuGCjVwOTPAR`j`!9dLF#Utn#`8NZn<9!W-tXPE!?UJqlYsuBXS18xazttyF1Eis
zt-*5Ri+5pF{gmuOGF$;3=cPHmeqz4&$bXyStfT)+zBhO1v@f>#<C)3#LC!($@0-m6
zo_RZYl<Vs@9R9rH=~ce!8%bZjiWMBapMH6X&oi&4aJNV4oWHskRZO**m!Xz#YP?(j
zm(iNklH<D*a*urTw$%BS$uxDJWS50=&y}LPdmijrYR}el;Qe0P#L}*t-PhbKbDMq&
zU3=xswZow5{zSg+uXANQ?Y}pkkW^h~=khVi|H-NSl9GNL*G_aU%WryDdf-K{qLJWY
zkBlkXLuNRh=#aKC|MA=Pq=RkxGL0Fp?p^3PSlm3hYRT5Tr^~NS?z#VWrgm+JxGmqy
zIS+CiFK<4cda(GI&YV1Bsnc44UGJ`>7^vvRI`VYijr0AtU$Hyq<XXn7*Sk;1>ltre
zYGgmpY_8s-cpsaISDasPmQMR{DoEuW_l0|$g_DJ^GX7=kkMKYC{9ykU+kZP(PxOlE
zxnk$L{*BbF3+`X_-4{Eg`K%6l?4)~E*rIF)^V^Jr0y_)Rr<m2xv(J{Ay^yVQ2dkpr
z{Q3kPPW$!iWb(9pGv7Jf6W`@KJN;+RY-62PH4m4+OfMJB-|>I)g7odyOSa8XpTrQD
zc7n6eD8=;lVw+mA`q#Q^=h>W7KkH{Y`);7@Ez_prTB~XKm;FEJbcvtLP+HJ^Gbiti
z?sAhj3%;}U)yHOp9gmsmza}(%QLx_G85#z6%EGwroSn6pV|58*#RpmE%`MwjJ!th?
z?NKRsILRov<nDyiS3<Z7Ip%C*bl%b7#3L}R!~M+cs6_6yGtL%DZ~n6U!<Ja}#T(rf
zUe>iSNiUdp?8}1H8;(~iaQ<n$8Tr~+x4xxQW1-yow;s;V(|2#Y8GBiI9mkf6YMqdx
z6D{}uyD_uKyR5U%4k>VZb8>5*j8KK0mYnL7Rqh^jCQ-ZxO*g%CT~M{WtR-UOgw++N
zcmBN9Qapu|S3`6EWVs2K6_bQ^^{i!{t-s<{;MG}W+!OV#Kh0Ej;Osf*`)^Clzn6am
z_;R~vO?q+1Wr-d44h=zF-nTtb>n3Q$-7L0Z+2XgkTEAc7Q4!0E>mI?$lcs-EDpaqo
ze5+IVQ_<1t2cr@9-^_164?osABQ@#sme%9{(>FCgQEGqruKMNut2sWKPpPPDtKT;`
z%;)aC;C4Y@;V;M8e0)ZhX|1NQ{Y~fPBrhGC&*s7VYSB_bt(8l8c@5R?-8gpiWBaY{
zB^&nr?3wDb=XuM=C{csVrwg?64VK*1zc2pk$Q}NLD>j{av!x(jjpIP!Pm_5KnxX4-
z7ARlvt$ViT&+JC?XZu$f$~>B3a`vBC<WkR;zmIqEPl;5x^ZTo7wRPObsEvmTDz>HO
z-+D8jbE89<z|wl-{WUkWrrea=yWzPx!(O)c)rXf(^2xC4m>agMmQgI~=LXM{w_l5i
z3Nuu+SGb%oQ)^q5kw4{z#Faxk^q#IXH((Qd`1f&j@Sd%gTrMnM@_5ar&nIv1^LOM8
zk7<7)+hZ7UFt72rkJF?#+|Kq6A~rEoo-u!nUJ$OftY+f{^?4rA505eIE}GcUHk(1~
z?!||vf;VyZ)xK!o6}%*+KJ2|x*g?(Iu!yB+xSu6W-mmmc(7$`vhegJ`Gj?5b$$Gi?
zmd*<Qc{0oV9_-)u&S6iZ{=stxO`Q)4IcfWEU3%(QPuFGJL#lGc5g|sd?Jr)e&5RJb
zFID}06YsOKWxu`uGe_^+bbRNh8=Hz(U!KE!zcEF8>WO!YDkSclv~W+)oGu@~#9w~l
zQLdYt8Wv`|T{@k8Y>MmM2S?uO&3w7v_=UG)g4<@h!ZOP{YYbEwr-&?Fo^8JSv(Bvh
zQnP<~oz3p(w0YC;weC!C?ZoVv=ZpAz{9U*j4W@?0X|H7~y5}5xW~uS%FN*O@Po`g!
zyb!?Uc|!7AlG(}mKIgP=+E>rnTc3Mr`P8Phmv=us`;2>Q@s8>njyc7i-BW^|B<@_W
zYIS{PkVz)%@+iZHsf~WJsXlri1MjT7vT^P8tEFeIywE);ac0xM+txee<lBz3wiixs
z*lhOEr<c|DPA|g~#+q5}t5!Gt3=#Wmn>E$Mu5RbUU*2+25t}((wKDIERZly&N^qZP
z$ez<Y*~^){dk+2CwRmPVyGHkd=Zo%GJ=gg2O@8|<QyUYf=orf@JU@=l`;zVKeYLYR
z)vP&U-`;Ke?Yh#N4<EIxmGhqAnKHGyw24<u^+%J%-$NHX&wszZWp&Htvzs;DxBCmv
zKaw<I*A6B5LN*h}3#XP$xc#uDR{8qD6%&?BzpJvlQM+ozN`GIu8D&<V>rABCcg{b=
zy=2kbgxC*($_1PYnweQ_d*-o3F}~TCyXVA(^oNe|bEPjn6Z%jp-FE$zRq-25rhV5r
zS2mnj>9zWvdCT2!9hoW8Z|()SdY8<cotWW&WL}zAAM=x(GgZecp0EEsfAXG9HMY^4
ziVAI{GI}jy&+~6%zj#Qha^BZ>t&XXRo0Pj8@3#s3pVxbI^`@N*7yEE9@D|s|z1|r4
zXG-=H-i65%C+W`hiTro2|CMTE)E_;LW2(PZCoXz?|M0!8BGpe#JCt~gIBV|4yxI2X
z)#^*N`?@5Lhm};zsDC{9@7Ic72eTBnblvi+p0B2*kkTw5AjH0pHFC?1`Fni-K3E>G
zELA)A=T6fczAn$-EuqTI*KP!wvRLt%s0KVV^qKZ;!P~o&UhXWtD7ZXh`^kw6ZC01p
z+}h^9A~$2MwD<cz@Av1mdqunrSash?%~{dtkMI8v3*W74dw!z+_rY)j$IP%jCnI+S
zO}X%#E2$)pec6cx!k)VB8QbS|A8vZe`LcOcyxUA^ztwxAE}vNxe>&#hC!T_}OCOZv
zwy&Ap;GoU^baC#Z3E%IV@LeyeX_wd?^CbSU_{NKUb2nOWY~^0AyCv_drsAa6OP7@1
zT{vy&sTj%lM=?#G=Vm16$uT9z&wRHc)Ao`%llPW?>bZIg=2b9O`?JX&u`DX*GhA@&
zQ@c#`C-sL}&tz9WW}oiu&@+>5-Rl^iFGUK^E3$XKGi6BWmGb3tTX1Zq)dZt<&C+zM
z?gJMKE!UjW>75d4CcK+@-@Omz6GBqV%sDLf81%5!-D5htzQHJ?tl&mz>&5B0Nh?{V
z6p00{UlQxev(X~Tp@e^#ugQix*2bTIE0xIpz1Ays&`sJs$8(eXla@<P!FK19=B=6T
z_i@4gFX<W=tAf*S9!YhtsG8Wqd31TNSi8hAXM>!}52eFYW^67gwU~2VXK_?sN7(eI
zDarf+GGA_XCi_Ns|GJR<HBNN<x9T02D~^WUemcWl{PHTV<OaDgQU8h7_b=Vu|LU}f
z+o$>m@08v;Ki(1K#KWt?F)!ztU9A1JX_jS@E3!Q={4lxwzIOV9^`V73-&-UVTu+oy
ztI~Nfnf0*rukxDCyyz`zzwa|=osl`MQoQf?3(ws<B;UyYtb4Y(bIZlv2KTEM4HX($
z^kQ>sL*+F#>C|ifGTNQ7z-y)aZ=L<k53U&<2;0dn{jt2z$NAsPG7lZ=n|0zjfw6l$
zlexC0r$vaa%gs9RLc8TCU;o^Cxhn~olO5t2`FZ^{X3d@;<UiXg;g`JqMWY=`!Zx2K
zvTnR|P+;EznI+n)r_GZWAK8BKz}sK%Hw4Z+F~zO#2y@!ZwCW}Uvx38ycJm*o=jYe?
zelt?^@T#}JtzKzPGx#l+n7R3Uhw0nZdO8zszU|v3eKv1F{Ce{XUuI0QJbnAq|0NR+
zXxpDl6v;A_kUq)pduU_+;R~XMu^XK^FYf9P{8B4->O1%Sqw%&S91r<t-psQLY_z!O
zb78rxtGDD?>-cRqS({G3GJm7~<JuO*yCuKwrq<^k|GfU2{LDj^R-I<Qzo}l!QJ=}#
z5F2Q{?QC!7ne}~9MaA!T_O7rj^!sFbV!@1l+kD0MiKd4mEw}%g@JC{8r9qhV)Q8@g
za_&`2738#B4Le+49=Y12_*~EbiHHx6e(>{Yi<+lxV&{%yu<(4)v>@|bS+ZsI)1Uv1
zmYR3?&#BtVVG{MM&c#f!@>=|iopQ1JJ9tBy#4L(>e+#+fryk1vrJuJ_tyQy)VJgGx
z_O0suisz=6t!=HW)(-lnq1@qW_t#1>FJ60T`D@*xPsNH}fk!?+D7s#|?$bW0*@tT7
zuDYZ<tzK!tUeq-E<%1|WyF&|K$tu4)9n5Xt=o`3QjP)4T)5XjjU2}}egw}7InXbF4
z`P~85PYZwjmhL~ilb74N;h}`gmtdDOi{*nSe|-7hYr5ZKe#_wS#`}>SQ{39)XH<FR
z@}6PjQ!d)Jpk#q#Yr401`>xvcMb=iW3zn`<x~z5PsNPM{O;=g9^6#9Sx}{DgGkfYH
z)_)I7K6B4z%u?#CI#*LYtFL^%lfbFzJ3A_-?w?TFJ7ssyGVe>TGyU3sP2cqX_l>xM
zn{z$REZ$X<U9sbbkmKH$`Hmv|%4<!p`Tx=R=KVv4A>j30_4Q2GCdlT>-}xlB=kL<I
zCE{)3etVk*OzsP5{1yMaqv*in_PrO1tImDrRLHArPi!^5`duaLFO$Edl2o7R;`5yE
zO%`eP3;sC!Nk`Vt*5~2D*Op&xW)%M7k&T--)k8TnSm1rXuc5)I$vG+9VeZe3-!pFR
zobqr&(9HthgW^R3hyGSg@z8UuzO7^E%wK5P@yXS1v308K>vOxKLXN!hZ@e?}#P)T9
zhyTcz-xT1Q$}(ZS$qL@b$2TVLU;ld930B^X)jHp_@2Xg2zK>&g<jAS?=VDc6`sA(q
zCHpU0XYTK6($g+=&*+mX2w4)pHsS0coj%tCtjf(TSLIGDX<zDgch`jf{kJ7+E+n&9
zW!;-7A)V-VpeppO>!xcbEsmTh^vMu?@bT<z$<G0tF$TUyyNk+#)hC%~{YYGO__^lB
zuwS!Y=ZmN9zq>4Hc6shh>z_`W>H<3CG-^`3dd2pe>|ej@irL@v5+kdSg(YU0{}aMH
z<4jykd8OIpkE~LjZM446L+^X0T>05W6SbW720!WCG^O;Nsd`GFv9a$m<&AR<w@X{E
z-xm|!Eq;2&&kKQBlN$787!S7Z-6x{t^`84D#|lgN^LY<;?!B>b!+T!lLe6fT-KY0C
zFXA!@w^);;z5m*Y?@A{nOJwZVac~@B6+iN&>*cCRt&)4c=)C(bxJ&hFo7|p?PyW1u
z|6RR4`i586Uujaie^_Mp86iXCJ;|Kvv+MoZSk!LbF=<^PeNH0iwtGwNpC@V`e=_e&
z*lJUFz@=Vg;f<}Tx#zDLMsNKgew_KM`qIS7Z{OdXXWnu>bJ5@J=eMXddIx#PbV|&7
zX0ffAt5Nps8l`^~ao5%+nsjOf^*%1Yw1nBj;8a)4P5p}9T<NCLcaI1<I*I+(nDgzj
z<Guxn?@mqXWiL(s;3qOuHbJ{Qv$=y?)xEb^M_}9D=IMM%RtD+@g+Fg8t(9WUnXLW$
z71P>Fr>)xb96G`|FYaoJtStKYQ*86Q{fymz1deQ)8?1Ta4dbk<v;MI-t4-OI>3O3y
z{-{9B*>fxj#_B59r_b-G$SYUfXC2uQv$8L_@R^kUIk{5(mzEbUXs0->n-I7?B<5*i
z#I!`lXGTYEtUnp1*{>OR+tDCxZuFr)9eYi5FYS!l{3F16`;yt$|EikF=DfA^KKx?w
zHsv{gmR!_qUVFLw+g5q=q|aT)HKtBr-GKG5Ia33JxD$(4#fpl~;oV&N+~(Rb<8`;X
zlTDnNr+gG;bz6S>&ZAd9*@NVt<z{}IZ?Wg?+@)`m4={)}Ui*2(cI)l+bqCCqOJt2B
ze*U=jLXCf4fcuj8AH};5f86@$`|A(tv07XX(W}2d`mXTzMW%7(#S`X9Nl(nCw5T53
zt<LnAW6#UHndxEM)oi`fW<}jKT#@+xt)|bP$)_uL4~Uxl_U(Ui*+FQLiN$f1J)0Mq
zXsYa*l9KpZsa!y#OmcJ7H~#7S{46?F+6S)C-t{Lhwc?=T)on{8XUtHIUvoN*)l_4;
zPu%~R`MldZycv$h70%|de$XsD?~iP8!G~AfcZzjlLU`=oczqF;<%&Eu%Qd^>SzhQD
z_Dh;um#<4Mh~4$Iv-6&S`x>RlW!I9JELikU{rDL7L_>Z~!@n)xPVaH#e%X3wVN3VP
z&6l<Xx)}emPu+Va;-2O{wky^}OO_?By<EL@^JeZCKJnQHrt({4y^px!weWD0;f~ER
zwq3j4b4^s6T;UcuZ_lUT@*@ey_ziFKAMowy&=u(X5Gm%rBw^)^?qhP?1-D*rFp}Ni
zJwI$`PqW0&b<KRIeqWQ(UtaekS~ki<uJ3?xSLY4YCB_^Z^Mt+Gy8bw|YBjyc>?+a!
z`c*YF+~Kw5wXd?f7%r~=bJK6p+Rtyc9R8r5nq9Hx_pQCofAY_rYred{*|zx2?Msmr
zAFnrRN=@skNqO>o<_{ZR$MA(RzZWwZM9)ro^Ts=;JjQXG|H^Nlcm*?RO(ytWn;JBA
zd)SjVDct;XC+6P0=9<KCg4NebBcDxR%^tVLsdtt(JnHiDIC4+y<E4tof@cABZ<f7$
znRq5BFtMuZg6OJuZw_=UylGHl`SF07>h6x`)&B~%?ALoDF5_Rx*C`u!aFSNJ!MCdh
zkJeYT8+<>$+dAytp1-jls^%Xx>1qArwdnJ;b!<&l58iqo_4!_wvY5r*@@?VsIja&{
zIcD}sOymyx^jD(Fk=;Eodre5yIr+2d5gUH6E&jW(SAJdBZ0WtJjvH?=oIHADd8*`8
z1@BYa_e+=;d&%?s<`kY6dR^t<d;6aY54J~!umAP*)v9WZitS4jGPP`Tk9386ITl$L
zW1q_QjKSdZQp4?MPwsJ;QDHBu9OmBi<LTx#4kf~03}#L?VduVSV(?(Xg^e3}63p`d
ztY3P&He*wX-yzYA2divYeqIj$<j~1DSMagM!7c2Q+xyQvoWL!W(8p<UfzfNRuXvoD
zDX-7L%W4vnk`&n|f4s2!@%<gSnvN&@KfW`&^m(?n`KnECW!Uvx?GD)&)XjbI;;+wZ
znZ*I0F5CT>Sd;X3-nzmM$CAx=NtYiD<}QEWfAiG;)Rj$(4_==U{ND54Z@%Ims_&z2
z>=t79F|Q%K#aFqlFs6oU#&j0OA12c7Z?vzjpMQKtW87(Vnfnb9Pp?&YoG4D=-)dHK
z+>?C@XI`ChLXz!`HRt8Ow=9@!B(nI!jOxUnj~fynOTH0Qf1|r5s3C~=$;!?XWv36!
z_#6~@c(YCH!E#OMJLVi07KYVaEOR(jQ{KJxXx&dKTYrJ$hf+e{Ts)z>_K!iZ#cnqh
zR+sEAT{AbY+RL?vKl0#<HE${nlk+Fs*mpUi<6N0v`mT!Eix_@Ho7)^c-+nxv=UB?^
z5|>$rGIAEm^XMjUJAOF1?5OCW1)cLfY||d5e(E_;+o<(H|IKZsMNTItYWC_bw2Y3A
zVJ@}b{BikHyPwuP*19YqCwBC`FKw(#_2)XY%XXt-&GM(LPY(H%v&5~qEm0EuE%fEF
zyEFZT?iFmm_32tm{JnK4ijP$1E8q2P-_4|3V<j2s6U-m|etQz%d2?T1r6nr52j)n=
zDY^Az+m02TN{=?w9TYzkGxcEn`=?#6R@Vqyq+i+e@PD<S)ul_X4_@~#zkl>fz|l4H
zX6*{^-+J#r@caFJk|rWIkFO9j&|W5#z?@T&Eb&p-|3uX3<9E~pd(zgaPhWDn_(*cy
zj?!m;r?ThmFRA>rv+pJ|?~>kkELS+6FnzM%_7{%5#38O7e=GO(+aJvtVG~QmOO!<B
ze{&AHs~1yM`0tp9iOm@{ZQ=I#E9Fzw6YiL`?0x=s$G5q8`}%tKYTamEaO0J)_(jcU
z<?1q?E*IZ0b;qdoD!MCVJ=>K1*2dB5<DAc*J+^yPRk=LL&G>S++<8@JjDB0MYs)S<
zi?s<C&Y62_9J?f97m#(flcg=dvbB2ggTGcmE7jFJ^4knAtUvJXli&H4{!f2xPVj56
z3&>vTo$yW9>eubadHw5V)!e?8RQ0hohlRVXK#}LohRp&i(w>TmGi+ngX5=W~W6Iur
zq;<uaQwg8-m#;lt`dx9KYDw?0{qZ+h_dCUl@trMyT3F}6`Qu;Jw5bPqewI8w>Q#I_
zoqPL6w?3ngYi5^RWj&RTzj-~|^HCK4_fr+eJ{@vi!+PFRPTc>%$5%Hp-fC=|y}sD1
z>3-`I<_)H1y-iNrz5X{mlWew4uD!&+wu<qq2Y3DB94XJ4Lh8S4bJMwh@6=3kdRme;
zUvYJkSdT%Cz<u%4TlGIFO%~a@v2$yG(wd01M_c&pQtnRWy!)dvPdldDapR#trK?Bz
z0vcB=I;LG|tNQ)l;<TcF?;Nk^c;@^RDGN=`d1@Kp_F%95f@#N!wEku+l*?ZJefo+_
zp@`Sd_~!{e^!d2tZoP`eyw}xg3xe6rcTOt)@wLocSuKP|+P8x<Nk8OK{#K*8&3oSS
zoN??_=hEMGvE5?dOW&Sejq1-!*hL;*zBBnt>h9NjxbKJl-8}J&hkfNDGpT@6HIois
zwA}8=WccKpo5*=i`!?b36?d+Oh;0w_x!n2O<fyyWDZeX{J4A0^Jj1kzEBcD`t+QWG
za>f(}&M)|Kv4nT}pIHx9O<H~AeM9Jpi$^m~vHegN^z!!NFHT~+s(H^g^-I;1J&$cI
z3#<|)bnfrI7WY}zC(1JO=oY<0`#%cCsZ{kxTvK^oxb_f>R_UxYQ`bKbyZ9l_tMoUY
z$B!$a3P;lF;}*|TP;j>8)4LEAD_~~V=Dy*|2W1btCp*L?<-QAr3r$h}@vlyI=lknD
z`ZIT$UYQu6%fEZq6sKPe3ObjUs0p@BEo3SDXXh```z-pnaF@tY(M0~)x4dP=b@b2q
ziyZwMr!Eoq(blqY&$sdlMe%bk%3Tw>8&{ri*{-Hhchha+gqWAiAM@L~o>@OQ@GT_k
zU~Si_xVb9wtCp_eIvkfQ^d?$np2%~y4ONc~nR>ad3isK>#LRZ<kQF>snx@h!e5Y>z
zu2om<RqwhSSC#E_lUV3-zH7s$RVIFBEV~R1>lW8MkE*v@#MjhztTaCRg>aMl`hE_l
z>XQLxW$g!YUfdUsWxD)2@Z9|we^d5<Qw%+SV9A-Z%c5;9SH16Fvv~8c_TD*%^>ezE
zHRO4PmrdBm^fK!EWrN?6>jNuT<7ZqrtsdC5@#6QsgZF#Bt}5MbuOz<s%9|@J_nY=S
z`r7t#^|D{nu0A<AJ!q+<XkweGXxjFNKhI9lF11d{ickn{w^ArP8WiNY*s=ey(C0I|
z53wv3<f{l^d^KC7@^wK3|8)IgiPzQ}9akNA^2@f{WY3TI@SrK_fuaU6m!4}!r?1+@
z=8*92li2k>KL1I#PFbr9v}qM<ILgbP`gGe(IpJTKlT7}_<eUW#o32lub+kI*pG3kG
z&zmf&j8C_pT)oD6lj~C*uHQ$yTaStudd%l^^SGBgr$ATLVCh%m9zIsyhD#qgzec?7
z%1jK1{h$$Bk(YMr#V?h$%s+Eqr&a`sUtm*87gSlx@NJ!?;NG7qz6$(bC;#AHw_=7+
z^|?*82U>a=*Poo=SI{{1=#GG<=2-SB_KH<MS;UUcWj4HHY4aj*lHC4JXKL-PZrxKo
zWu-S)x&9uL5HrJBkD{g;{fH@Y-^6pZ`FiLcRfWgjm|p(8w(G6gt|@zdvYYt6txOC3
zw~gt?<td+I{1>EJ9TTp-u<#B~*UcB1RR@n4q-poe?-yS#>%8}E!zz|FN}jWSGThS)
zf49zF!!WWoflu4?_UU-zM<=(fu-~(+QMFCr=p~<|rn(b+UnfWIb`ngjUGBgC$UgTz
z`{NJQDnCSQ{`ASCrKA2%l&5gYFZ1Nr2SwgqsOmqRc6h$w7KWwrM{Ji&Fk{-0vG*eH
zlailYcXQ4+HlMmBdu^-n=R*5Xan0&Ob{QN`CuMR@G*qf6=vcP@apayiT*Bro3tso0
zXHbc_)@rHSaqG;nhP_57mYS5!ReCNZwpWq=!s%}c<uAG7K5%}zePZUm!xi$sd@kO)
zarc(PQQ5wOEsR%gt>T=Qm!7AyC#5_`sjoY5{j3<L=|P${cY-&@x4v&O{;+tn;UB?`
zdJL94!e=%=V9VLNOEE=_tH0*yij6-jmzrl(YVDJY|N1`s<3Aa_K%vhs?z`@i?vDH7
z^FPbz?wJm)843#LzwL`~59Bb)YT18zns%<$%7DPLeQzWWR{A~p@3>8K%H%&W?R5v{
z&Mf~JsdyyZ)8PH0f(@t2Eebwm1gt%L{Ay!?di})phi57>7wG&{-&e13URLd(rL|+m
z^fxPAGMARMS!XpIx^&%M?BTPdSXMUY#7W&dw$FDz)$+NkaM=xG18yx}xxA!_Yv)+M
z4u1Z7`RoNVpBX;zyJ%mP{qyVYxBZnxY=65hro4OOA7!*nYkHgB{}qoTqb@sch<VJ+
zx!Z}OfQxzIzEw?%0qoy+cuzh~TD8E;_;Bs34BHcVTa4aV6uwYXjyV2HT<^mFDyRGz
zD?V?R@5_DvE&B7<n}YAy)%ZT0xpTBnM@Q}V#m4K*|7vwA_IVs_SjtcyJd-;n{PT6Y
zn0=>z2U-f9`c-0U{#hfjYWK=3%O+;{CfP9EFWDU}bNa(ujXm;Rxj{^KHl0`_f4ETM
zQNq2wfxGX0nmgxqxY7|jn^?Cb4S~<UOrj6XXNxsrpLJ*H;f<O7sVlD5?oqDeXWSrs
zS8mBUyCaSke^V^NH8;s#Hm<Sw`<Hcs+>fQ^eyVN7jMBTR7p{GNeG|vzYt5@gWdEgo
zP$;m!*ejva#u@%Xy8fZD+*%=~Tj463cwU^YN?K78f6vjlGh@c7qNAFhc;268yLc$>
z8;9J3bL=IRUXrSfbs`yCb{_RmSf*urjWhoS_ZFddkq_29=dD!O_#xuXt*;V-g3sO-
zXm@3;nYeWOuh$1;9S!;C`czDMl<P6yg=g0CpZ-e6Sc{kM=+vwz+#~DrTIz0<-Xqnc
zYD;Q3yf?m-`*XVCRmev>!%v?C=6|UAw9eq$hgm6g8U7LdDW{tcNSE)q7=PyH{(n5$
zyJWpHMYwHlIR4#XcyHbN{%dmbk0$h6d~Rm*(%dGq{;+>%x=!9HiTGt7{9m;$OR4#j
z@48vB?rn`Ho63{bv6^ftZH`@=THI%ehlQ=Kcw580!=E#K4}XE|*6I{-MWN-VBb$y*
zE>SKO52?(26~(f^`fc)+<BJ}4-M`#$`_GOzQ{GzDmL=AI<>OXqZf@3LY_1IONVF02
zjQP&Bcl%_Koin8k<HTombv;=a`7ub>C+5gLqrmSGH*`0DQ7j1EV=#rykh%8jA*I)W
zqKga^-g9)9EZI2ez%Qrdv-59xFYVT>aGE?}`46kIeQR_(J&%@5`E)>V>9?F%U-!d`
z%OzwF+9^Dl{-9)45l>O)u7G<M|GiQc73|7*Jkx065wH6KzpE5)s9jzE*t25CwPFLQ
z=ce10xxc0!PJG3gX?|mi^PUx)*%^^6clbFCPaSF5URo#~awKT7T}9qBy}AF**IwS!
z!kO;-X;QQ5TGzbm3u|9YJt(zFZ3%a)WD~=IFzb+iepB4!(zsQg+2pa$-IFDru)p}S
zbLh$?%hZ2Yf1Nn{K9jV&#MXALEmtJ_4(LmUC8!+ocm1>C&&2u34<n2D8sv}J{!3EV
znr{#ltFV$m#&AvMzG9F6XFN2`1vjo=?D0V%>Ic({Ma_M-!ONNJne0X8+_~-P%KviZ
zPXB5ACmgN?C3a~Y+Ip1X-m2x(zf9wf+^?oFE%tHW!M|cZmrrZgh~Bww{^GZ9ua&?0
z9$wksnSHcwUX*xlKtj+i%g+-8SIwN}F=yu_QO6PoCZ@ihVe+gy>qA>I3_IL5>Ibjp
zymzeR&E6+j)52DYGUx|wwshjxwfm&z8KOS@6#M%dO((9f%(Jb_dmPx`-m7@PJZdX@
zPr{o<?@JF(O|(?<mrwX}>F>S=$F!nnJ!*c=u<AnejK1TUU2HyIoYviYQtsj!-LG|X
zV|SA8imgkRE4-e}*cY#VwX<^Ffvd~5^YC%~TySW{7L7#>ovJ&3aFqUK_UZ0Zxp?GO
zE}LN8u`@iH*Z*khXx*yb7E^HQisYuG*ne+QviUXUEo$KWQ}Cs9-966(4d>skWHy^J
zukTT^T@z34q3}544uR7B`tb#G^YeD`oqVxtM$WIhPEH=o43D{5n^*a#G8}Mu+)=G#
z@k#c_+;7f{o5Y?keDovg?GfoKZ~r$vI&pNeZL9B(N_U}+i|#Bd+^C#CrPqCGb;N1`
zg~v+wN*}G|e)06{Q;A|{39(Bb?yx;R`99-}>ip8>n^PENif7)5I4_gfls4VvKo@_>
z{MTPw|Nj&@-xGC1w0QZRhkyM8HgM(s{;}+A)pyZ_{t5p+zcOAIVPtW^e7Pn|`@#2Z
zX}X_yI9IqXvNm3IkjEmW=+8kO`yF3&`~<EZedapn*P39Nvcrdh&e>|tH%OVfX3J_D
zqd7i_>nG=(+4BC1%3|?_&z|P0i`;k@)EE9-Y4>#R|K&$o(_ZhM@~B~&_uJ$1BA0ZS
z?Vk1J@m;lJ*E4P$OHiBLa{IHFxP_92Eu-6xkZ{f2uC-~IyN;Y|x_e~j2PVN5tEbO7
zgnHiU8SOmoQ+a8PN9}B#&I{@_8b#+$EPe3!-PhXlLe*K>D?eUmlWETrSF%~K<MXXM
zkvZ$0tQWtzD{@2s`N!h5S$iUWH%8C6Tk%=uY1ov956-*IlVQ1L@M>Sg>$d9~KOAge
z-^8KLIpdjF*@>4;?<1v-IviYgeMeG;e~kT}LqFEO-5+y9MgQB11JTP{IWIBgx_0KZ
znV-zMA9y3|ymIub{V#KVxar^jwcA_uL#>2&2e;h9BiRj$+dDX1<u7Y_nr}>2s=koT
zQMT>0o$TBnf0&s&GLPSQ-@Px4anm^!JJ-KH%Wf=v|D|Y)lzYkRsdKvK&YI(u<&+XW
z>wTW#qbPP!^M`#h+xDc->qvcCaK)Tu(uQvqeYR~^FZOagn6c3DLU#AuH%8~ho8|BQ
z*mUKe&9~6vJ(3g7iOk=4d6U-j&Bd=bZCmZz8!D8^^djuTya|g`7OU^#)Lz~(;U?qX
zuGxI~J&X0NTJvO<GAG<>wT<(**&Drl_r1P6T_Km68wtz)9J%sTX2Hf=5*#z-rp>?a
zD!*6X{AZBezY~ufmj8TIesa0ZEmy|9zE@w{vsqqP)RD0E>D8YT@|Jj*SudaV(ph9m
z|30SFlY8y==6;Ir+T)$1wk7Y(l{Y`wHagAQ_V>B`e1jJ|J|B_nn`JPSSx1cH_MDr)
z8f~qO3TkFN`x8+S*|l26PVb|&uWiEiz6XKA6Bs#OGidm{pApNIdnZZqJp0*CNq%`(
z9Imc44cGf*wod*Am(i?4m1_GM-f4?}xERJ=7Raz<zVrVVo6l8mzb{%m(QNk~hWr1o
zF{~^uW1D}9<-jc$^|;<DY4H_$R!^ALx}IQ+ciyaZJNmPUTFePKm$`QOy=gKk3Hc9?
zx2RqDF+ofBp&!RpJr>>#d2?!xSh)T9+TyDc+__6WB-Jc-<4W0bUyXZ9-qv52eIk9@
zO>@_$oEb&}f2!B$L|pUpOr5Evrf^C8{)&|4Ykti#xp_rnzV?YzuV!sX+1(s-VFKfX
zHKDbix&OX1@ZH>_T^4@+|Dwg8UDZB3G5PQNRwr5Tx~0<Hn<rj>uyx8#vcH(3WR|mM
z``=qXN>BdD@`~YjyvR5!ym9UwR%?&9m&*cc|MSblI~BW361^^^r1y$p@kRkJo<%L6
zs_eIHQ525Ni270Y^iQ+wCyx2MI}UOms(Y&9`FHl6`AMdqEGMv-wD-g;wd!fu%JQTC
zj`ls(s3fI>YlX8I0uCQ_H>ypZvM9BNTW!gV2Yr5<&Hrpll5=jj=D=KX!C1-5QpiuK
z@xL?oW#8$`x*yDUk5J4`I^Co_r|N$8tGYjPx)f9WRZ8~W?)&tM?{w`OYspJ%MWi$4
zsPR0LU+h%#p7nlk^(4Ve=atcK+MbK`pPGN^OjzCe`imVBN<O96=BI}r$XWd;;n<q?
zNq=q~w>@3<GwRpO;4N<hPa0}9nI{ArWHdNk6WAZNRgg{5?tSgN&ziDTPVYC~mt2x(
z*8hxobC~s$?2FT7Y`!K0ivE5X`S-=U)fH6_6_58hHoM)rAAZVfN!2myZxffYo7yat
zo3-#)^xw1oP5%@<9UjZSIyO5vlXqLccJ!ik5>LA>>4w&dde7<HbX|7a#_qVq70j*=
z7`zqu1AQC5?>9QuW8Z(}XhFy4634r(*ER%+&(xc|>s#7H)}r#x`(`O^VJyWro;oVZ
zaAb2<ywiXF@6PsrM=TxWCpbHvuno?+rgC_<lD>oMZl%`>n@-+RT-s3WxwAq4ztn&A
zzlS#XT|BW={maUe8FQIm8h`z-I4AC}-`}Xcv#x{{FY<a_zt{QV+%FX|ZAoI5E7=aU
z-;LztboP_jwA;huh|>L=vvTrkmF8TD+BA384aLg~AMd_w<&rE@5q0*0Do312OoYkJ
z72;>^{|}PnIQCvYjNMc#^=y{++~$~h_mA!3xe&T!L1R;0=-EkLZfg=>6^cn2%j@mh
zRIYP)j^iBR*GK!4^`=ZqzP2vVPqFXbg0w6TnO2wh1U=1{6WJ?XIAoS}A9`;3V3nq3
zK2LCm*_1VXI@N)8*DRYf&UN{?c5T(*I()-;g0j|4AN@P57yjH<PHGeTx#dUEiS)Cj
z(sShU!$nPP?*@HT4V`M$Vcn43eBQ0+po}R?SA)Hoy^EWU^uwdG_3nuL3BGhK=gFh)
zj?&pPr8Oeov1i;B@4NlT;ku~P^Vouwc9-~;?^*HC?CQ3~rJtrKP4h1=>pve|)2<-?
zF8Jp@Bd2sDz8n2n4)fZ&pX%9(-S|<O>D?*jR#i7i`QuWNNZ+ELRbTgW@+;lD*yuOo
z(<OnNDyJC!d46ZR!#E%56<ykXE-&DB*Lh~A9W$;R-9FQ~@YPGp%J1@eR^950L^#qp
z*S>U%Shh}lDNnccSGhJHPA;GAE;Ev3RTI;D9delBk4aTlEs(hU;GWpuLYuCACnZ0>
zzAwP@TY7FESI&jmyeVntwu(Klp1MUpm(^+39f7GuyZD2z_nYj0r@JesYfqjaLqfe}
z>t7?z3$6UTZqs&_MmD|P&S27-A|jT&H~Y6zz`Wll{Ip{)+pDhNQb<}W<SA5eL)tOD
zc>k&r!`Hm52}?3&+1P&!e-hHWXy1j@7xpgBYhvRjm~EB2>A>A86%jH&ZrRK%S?2}X
zOL7CI7vFmm-|<)F*K@<77>T7vH{9K7&-Kc|bnEWv`U*4R7F=Io__qE!SC8Z3lcvX-
zws5)GPhqc`de=ea+r-P?d**F>o+=wK??e4rl^F@rF)16ull{YIPP+BI<F>or)VXFB
zeB2k7sPBrgOTAF;kj^glq~n-FsNw&EVjpE!g>3&iU$ZFrbylWAt~Af&y}BmLIRXoR
z^ZJ~2SX-UC=wIr`V~o<Zvo6?$wrbruZ1h#|jm_eaZT5CYwNs8NY**dYq<3}Mt2bJO
zWozwTh4Sw+=s9>QPP)S322&#YZS$|9#+TQ&v3`x(nYfShK=<Q!Cp+Gq$)Ej+UqW-%
zq^7sNpP%$j>i;b`qj~dJPg^O*!lix>SA2K9zE1Y7@Qu`kZMyl}*6lI;{cdrtO@W`2
z(jJ)$-|dSu&a0_1O!_H$=$(w=@?36{mu-b_c1$#zerRK*uK2QZ&CKte9==daKgaj$
zn(DR}UKxANRP<#BYgnJZ`SQW+@bq0h@85q)*HYS9#Qf^F_5ND!X>1Wko(j*I-=P?P
z-RR%ew8!6{YAHK<|D3<{!L5+=_YahRJr4733|3Zqx@%MV#19K5-Fp71Kc6+!F04qy
z@m<VW<tI8%r@VLDp3-ljz-TmY&$T^LuXde$(5!2^<J8;L8z;ZE5S_WW?9~z1Q1zJm
zyjBsP*whw1iLvS6`0hI4PFtQ6_vH=VCY*KVuO1{>@);d0J^TI5y~$k?ZL&KZV@r9C
zW|XbnSYqvD;Ir`dg=w?4JHAhIz9y7Z`Y}3wSM!r&|Ah;$g-m(2zPHy&dPAMh%#^o&
z8H(Ooho>|}6<uMRzhLtH*Ax1={Z|HD=R9^`>+FNk8zQzd-U*PBxE_+hRU|xJvB0$H
z=Yhqx@6M?lbX?UDG_56ySv5Z@X7;kTvxMUrwq<U9f9ayJy3)GSUp4!LCrSl~`X33>
z(Z2nD`v%@;%p0uy_p7vA__wO+^m?w7OG~P%+M1@h<TOuQA)zfAlhf?;M%p&(mUzVD
zi$BiRJWJW}t-r{Pm-BQ}`_wb_msI#%<Tg5QYqwJ5(NtyD{dD~3=9QB^-F1I(^VzZW
z^{+x)g-Ru&=O?;dT9LU)!rjEGN&08U%Q$z%un$hgr}_?cy_^~3=u{DRwsM1N%l`*L
z*QS2jXji#3PBFo?;c$QLmYqC&GylDHe9B_=!63;j^ycpVNgcWSuB~u>f9wvgYIYar
z9IjOMtrZ<jW~Y8JPO4%t%4-&QB$#yf_eIO{Xs!>*L5jDS<cw#y&x;O?&6dgTj#SM2
z?08CZ6LalH;YG{&7bR&v-dOo1_~{8-!w28DCK@of=VfyK-gxh>_FhG2-OijTnGspX
zR$F9u{L?(duQ+v=RFss0-}+ORTm`*Ugl&G^sK2fD;X<dG{IkUSH@`fS?Y)0svRTCL
zJZW|x*_Kact1eAvh$;Fav&ED>(D>LV>$uY|O8rw_r#G(GR{nTy!GX0&yyo9_aVw<U
zzEQbmOZ=3K43?RyAwTw7biMRGwIy!8!rjf;uK#_a=Q>RHUpm2b{i+8Elb9_&Pf1MF
zc5BW|@%?mTyFqt@#qIVb#p`}Ad$?QU)upUQCj&OF-Yng@<DuDFvvYebW1~*7?}{mj
zET8-H|LTSxH!dCHbcrhA*mw6_Sl<Ts*OHT>9^~{q*?M`;mGZ8Id5c^xdApe=p3+fI
zjDF<3r_oAb>yqx1h3W0NHF^9UQts)IojS*jt~zfvU9_rV1xIpLrR~vdErUNA^>eMH
zp6>h4A$P(0kCUgEFL%O{(^6)uILw>+>ulUCIdy*M%JZ@u7kLotD1Twa!s>5k+sxPT
zbDQ%xe{wm;Am{LKf8HLKwU3OxmhIu(k{+lWY{bK=oRPJQV;zU$jN_|jNX_C8)Aift
z7bcLsi_ceg$1&-o0*%d)`Zpf4oD)k{oOt=;ENjL$|AXtI8yi0f1wU?&Zfh=2+<Tto
zo)U|jRAT>^xm%8|IceuPQ%mjar9R<nh6mp~u+CI?H!=L%{jQmZmnAe$m3r1;5Gy!g
zg6PEOvDb~9ExOLK&1AN3yDZ7z$mFzR21CueYroW=T@F0nB)RLwlDmI?Ezp?OV6NY)
ztX5fmOmT0-|Jcjs;r5TjPo!+9_>kSS>=h$Rt4H}Fshx_KHohp}T%8+f?t1f@|GVC*
zm*LO6TduE~Vemy_{hrIxT=8o+)TQpcxchv^u9{}+-OoQRDJU+w(ieN)b*YE`cIM?P
zufLVj-qB~QJ!7}SD*w!xMjZF@>g%p=)hk<jHB@Y?&+H%X9HS##^D8ZXxmlQ(zLNUB
z^7*1@CfNt9^VXe=wq&TOlk8D5HP<tAGnRR<`L)gYXV=)$Gf)1%aec%5&GriGzh{_b
zX-_+P{=~0TuZ?26E&Z6kFWk)6`X>F(1!0k_Wark0L8&S~`uFjFezAT&XT5p+wi1_e
z>2C3S6Vpvgs~x^yULm*ROmk}J{#u91oN!OY+oe_cYd)0gRITQ&wEmm=`|@SyyWHW<
z#_iMe155R~a-AP+E#y`x+>|=oMBB3GZ*AhQ%f?&!7kzuNAWU@bjpHk4cnC8_aq=D6
z_t;B<{nIsu$>l=(?rdMTkm0F!LSPWz_V9z#9<+CV{jqbkarn;N_S=(1^FN>VI(2u#
zqUOgl-h7u}+<C>QKR@{!Pk{563Z8jC4>^Coc+fiY?TOZf``S4^sb_j9O6cu6k@qV$
z_CLFa@!zFOgY#HfWM<D@Vr?=_?#Q2s3iFfYYYWRBt`9ho{3!5{VP!9G{;w04TUj|R
zq%)jdFWlN+;l1C=XOY*U=mnxLHY!%$`0zGl&$NOUwewl0*Ot}UwQiiWyg_tps=mOh
ziLt_Yi%L(I?`M?sy=fC*B+6c3ub^GM^5(xiyWMp|b>AQT_ijz@{0YBSOWrW<{lya0
z6~wC{9{EzGH~UgceqU(3myzsRlW+45_z5@Wapi4VD1AtMjl}8e_TjlF)N3ZlF8|}T
zK0C+F+*jE=Z`-`yOL9WpN3GS)i)5Vp$NeaDd5h!D^Xbdn{_tf)F=ksDY<t3b>3Yxf
zoj3B|wXQzTTsBqy+nhR1Ubo!5E$h<W2FGsZZxc@N<D7cpy6|qNU17YT+E$5A*U#1W
zIQM^z`CSv9s-H>fYT;8?A3FQXrQkQe^e*RMfdg;8E2>W2KJC4g;x9Q~-}`x5udart
z-#vNPdQUmmhxXEMm!n&y`(#pUyr&8uy8h+c{xY_}zb9TU*v)n3%c)`$hQ((4Ys-=v
zc=P`9PuRy}^e4;u;|g)z`+L)l@rL;B)ZTZz>C)ScnKR07U*cUjZ_%?e^=hw6uNo>H
zHNMFcurQZrm9N!@V%F0WJ5pzhFS6_B(YmzSDx*B5f%)3Q2+`Wr9pc>U4!%3f{H59}
zX;EPBM6r~$3TE52=4+g9*vdZt1<&or@sVrhIQ(&ATWDgUSI@=dpm9lT@BW?=zY5l6
z2ImWwo<IKHe!&{y<4aql|G#_9d?(dI_VsVodZ)I#7T)C-o^3i{dfw}S?Xo)6;8*WE
zu3ur89V@csxNiN7kGtO-nX>QSrS)umter(uYW9WZ_~ev@26CvqxjOCp)wTnB?|NK1
zRp&D$NV@0iYfBxD%~ujnL`%148(Lg_D0AYl-Q5Kid)Hq~u2{Xxbm8*3&DI?g-;^Be
zD2R|+`FW1@xAhk)7YD66cVPOK5UC#>WzT<_`t`Njzn@+c;%4?ld&|=`9hKQ`XD4>>
zJq+>o3cTsIc9N6aiMpSjVc)ko6__cmST3o1)FrrSO6HZdF`6pg1xk%)ud+V8;Kb&|
zy3eNV26uIV(PNHf#ryqxE?ZY`{Wa%VOU4o5lB2(EuJCci?$1blY`$gbi!HkAuJf_I
zOSPW)LB?6|ZoRUMb;XKl&fzu=4@KJ<j~@t|d`h*8ch!x^I_qN&Yj#^GHl2B1&~H3J
zWFqhR`X00WzZNb_a%D|ldFD{msqps|dLRGEzI<HLI{n4*T@y>EEd8H-BU@^+udS5i
z)@c=GlJ9wD)KyF|GhB0W@nqS}3pu#C^)~P&e%O6FqS<Pf^(>JsteY&_*Y>71&X{$e
zG{$=QwfVaHJ6m19g`7Rnd1Y5hP50ufIVTy{J&00Ut-RoRjr)-~bH0CIb~_rk{m_*)
zm4|a5hA;X)C3V}46zfI1HWXD(?v+3MDn<CjyToaE_OJLizB{?;{i5ws_k*vv%O$tY
z&Yz(7=1j<qsn1zc7rdRH)LuNlVXD#cY7UbHr}yW4k2c;G$XW1u)`FP{Hraf8q)r^v
zX1}=Z%wz9Zt;SWmE_ZDy3~ruvq9Sm8WnS|3?;MG5j!ykNmsR_+Slc|drcV;w=X5@;
zI(LEVOGiQHiZ%`7?$o>6&OiHfC|R`i(v_S~GRk{5E#H{s%098nP(4jMnfI$I_f=il
zjk@PgFMjgDE&H3_lKIbqPd+#BSKLwmuk7(jGx5Sl3!VNH?`4l#eYIKHV``YKfKFt}
z-G_G$F#YzQ<exUBdXxXZ>hmW}`QF#QY4|HE%qPhknU=%&d9GjS8IInX;L2AO+=W6b
z8=1b;%R4_X)~K_Qnt8asyjVxUX|ns4vPY`Q4|PPEL*6`CkkdVlC33-a>BWhco4N$c
z8|?mXZsC3`G;8XU+@+o}nq3XTg_Udkf3`BPPPu-cXEMkB&o7TZU+<+f@$St3jl%Od
z_(gpczW8M&y72QK$SeHLosn4VBeeF<+l-av4HA1)>fdCUCe>U&e9l+-f;vm}i}xMX
ze~uf^DWCN9!9;CKlXBS{$;XO|&tKenb+W$i439MT>5aWR`_HFGHYePhwD_iE?c`jx
zwHszFSvV#3poh_cIu&om<E=Ng8sFqKW?cGnN#%(p)q7T&pK6hDczd`~a^IKNsb!77
z=UDx|^;_=zn+A@rGv_^gcfDYte7Lq(z?6kXrn6*p?^$_m@AR1biMMdxr#!E7t2OPI
z<@?I|YTwJ1+4O9j^LcjA!YSLYw7+*>@@(5QDeE<%G2IiZ62I5EJ!3l97{4OGv%%u$
z$|LS4C--e)xP4IX?0F%Zs`gLT3O8jB>(3WGR9R>gt?0FDw(sjH5huD1nI50M-LF~A
zr-_4AYoFh;+r2BT>Q08{uFx`H<}1#AOmu(x8n)~E+y%H73t8<oYTW+%vi)r3faQW5
zqF+Q`?^ZsQ75V6TZnK&5jQU9hb2Z=pU3vGlig!bS%=g0;x6ed<`*JthgFDXq%$_&Q
zf(8@Yf}Xl$Fr|KtnjN_Hfu(ZNa+4qTPJK?AadKJ`fAbWc&_k?3<x+E)EPv%}vy?OY
z^UnIG*6ky45`DjNUp8Ij-CDzJz|Xv6?!j-Dy*ZoPZY_B7e`D*1$2_*70fAPVH(DFt
zopQnHV&{HU`R`?E)hmrG9sb-nzHOV7!g{V(l_lSnnkSrm^4-fpD<$<bk7w+B$r-0F
zS53HdL?n4%Y@G<txzb6SyB(fw)^L~_!%`7!DXY(9dS!+D{9TtX+Zrb{eZHaEcG9-D
zHP|VB<BeABqBFCvFN|ejxW6>J@y5;G;6OW%c`wbvWm%o)F;uX-%gaq=+vapGlF6Pa
zVcrw**&6L%itJS1AD^>>ljGeN|CliTvuo!Zy}ahd1*LDbL3=hFufFtS!VS|3k86kg
zwNj0DpI&DfIny+8l6?;Iw|QIkOn&!&(chN;%KakCbDaBo)s5AU>1;XG73(1?cgcFf
zLAH&_m%c~7JSgrFeD}u>m8QFsJ2Y1=V%#V1F16U^U+A*Svv?T(y<ONf`{irT8O^En
z>pM1i#XLxu|L1Id+=u1at`hgfUffF#uClR?Q?g(1eOb|0@$&1d-DIk44bEI^+rhJO
z;hN5~r_P$iG_CD1zUH6(?n$gj;I^JsR~Pab`dsUqVHnXN^>lw&-rZ_vgD2YD`x{&D
z{Hcmz-6kP>sHd81>ivml!gqe*{%kHWeV51wo)sTX+13Uu>Pbwh=vZ>)zlZ*HjYAWR
zXKs-(bV}P`X6E?D`fb|M%-c`nm}fcs%yM5+^h8mn@2b<y{~EPZe1zU{35xs4Oy{cm
z_d+E2RgcPqU-F5r0vh#RZ&=Q&U+iX?`R2mzu9PpmHPP!g6f|GE%ignd@xhyc_Ya6#
zrhlH~*t^mqjn!b^e?8^^od5%6%Q&}?^fy5VqYEb-&oe!&-#%ZvIb6(o@=3qmc;_b9
z5N&Ul9jnxyifmV3AL(E@<6U9!{@Px}<<B=eMISl#Y-Uu(BaZS6q17R4O<6NbGM|d>
ze(T2|WO}E_=d=04nYNpKwBl1rTmEe^*=l(A=nUWcU&UpDvR=n*=4)7_yWv7xdLWz3
z^UZ!KULxwZf8^_SzI&+OSGGf|SM86(m(X9a<{7TLT1-=$x)%T6CZ+l{D|zL^ds1ye
zd5`aid})=*HZlHMyXoDVUuv>Xecpw*i(NC9Dqf`JX8-NZw(YHK^Upo~>wCzE;mL&`
zb2`~(iFVCqxM?HP_T^XDy1Un=JBzX_-a0ARCbnGhy<zUs2mA8Urg~g_#d7S(v};RB
z4V^@6xxasT%OsxK6mUnG%aC#5i`)C^TW{WQ{~nxB=ydOseU_Qxw5I$6PosEPLpXn*
zR9<6cm7?RQWb5^KO1OLBw2;k>YS;P<ZWqrz!PTiRH)-FIJZaT<PEKd%qKnsA9r`PS
zZmf0;2zq_-+3AUwPHkuo{;#-I|2~`3tu)(Ghq+eApNHDKy1C!Zf5rxzcQ4GoB_4JE
z>ho;IT8o`6lb?zRnZ7@EL&D&<%YCKQ`<wohUg1jlVsxEF_`r-qQ-j{so&LwUc^dQS
zzu!MQ_IHTL|Jkg|+F?BZjP{M^%26^-GvAm*b-$i#G)LT_ZQ1Tmo`xsvTN8Wj{{4K-
z8^84bl7KgBxzlq!QftNLw(Q!Z9C@|-zaM+dpWyj_PJiL4<tUw!AQ>~QEba60yAOA@
zed#(q%}?ljocOz+Cr;msk2%m`*82Wnty|xQg)OUBY^YW_`TFLefKy3tzh5vdT$8!w
z^1Q<qXZCLY`hN0U!GN30HGT>EyiGO3Lm2%6OT9P6n6n+y|2L)mPE2pav6T%L;@NkT
z+w0yn3fg_#a!cUqR3St03FkgO^UnBdy!%!c<L1(|{i@p@O~2Q%yiKxJ==Bq>I+jm%
zl1HVJ;=&(=ZxiOQxK~glr1n;6SHJpH*#q1fpR*<kPoKOsHF3kK+p12JeQ!LQIZfKp
z*G0V0-QLgPkrPv(?yiqZuZ7NOoS87cp7Z9n`D@j@mUKNWpJZ@z$9{$r$v@uf9qwHg
z+Wuvtmd!HZtpEByH6OoLRhrI}(|M)aY~_<#XFi%OkqUj>v1`^|J#N=JH`bhOos50W
zmjgq5pZHcC%5i=nT)gm*LR-`p=cJtEl_xjc^H=EEX{Xarw2NcjhVAx?j8p8x-<V8z
z&9AGqa>gs$&Wat=Kbwh7U)(F@edImMy0?+jjtR26D7cjT5pP*w_gq5PyYb9krNe9X
zWU<efzobh3^h>Fym3y4yk{OK}-`BBpe3gj1>;8XE&__Fs?+&KnB61U!EB-Hy*4gv6
z`?iTdmKST{rWfxY$(sCMy8b3(z=D;tZcmgtCdxbW==H#6(HpO%Zi@U{6ZYhda&BKc
zPZ-;jgs00AHqNP<dLT(-|G_e|7jZ66Ihq?p{3LUqPLT>b=s4#dQ!&5Wt4ResA^WZV
zTsz`fwB6+J_Q<f8xA+|O`sY`F<~zGHz{6=tQ(njKQ=xLtS{PrPG*6k}beHYRiqr8@
z3qEtJ@2I=7`NK`YDGYg8M%%859{!d6>Qni>nnTrWce`C9vN!)V%XItMqIC4X;x(aP
z${gO++6T{lu3H*s&@$b1=AYT^@7NAr&u=bF(KqxcK6d%y9b?|}mG_g)R9x=Q^xEyD
zaO?8T%f`DBoNTOl_dKl$*L~P<Pf}V<scjRp=hWTnEyOuK>+@XJ(YbJFv;NITg-f)r
zE0|BRpUPC)mlyM@F8j%2f$s1#<}dgA+|jm{l3ny8<o(=R%t@(dML*xzbNF$~XRU`f
zPcT+a$-RC^D`&T~*VSX6W>xk**!E0WzlU{t)tYSv+Ux5BzJ&y-{nR`f?6qd&$B6h<
zvM04l7M1T}d9Ki+?6`UB(TfUOUP(P{>JC?Bxt?%da-NOFm)?mdj2nxdS+=`ny;3?}
zk~OuY<b7>eVOG<dwK*Ha69fORV81oXVa=hxCl!PC8}n>+)=l~SL2sf}=8^Lf+Z|?H
z>6xGXu<&w4Nky?Z*S7<X*B%&rV*jHq78h_W`Q!_=@I78S6VHhrTUB^H)c9$cyyMDw
z5;4CD!Zi+<d=b1dJ?g`?*Lmvm{~qY)o*9#}zwX_Y16PEWzsWmsVy$Vt;^dcEFFB2y
z%5Q&Nowk4FNkLwri0u{UR>yC5yYEz!*etc0?;eBx$FR#b;&CslPiz)E^P}|hg>Va3
zWA;kxzuUzw9j#4?+fmh4F1jG^+pY7(4f5AQ9p@#cg!74}oZPcp@@n?-9bfl2d2aaq
zt9V~j&zomkZs|<FbI4ok&`b4_Lx~n!u4Wb-nJscwLS;)>NbryIbJtou`u>o^llfr4
zuFp|T3x8S~y}Y~loB4THrAqNrJrQ@G-GAJ>VZla@(mK`|*FFV_JUwR0A8DNToRd8-
zH@sD+Vx3|^786JLr?nSW1^@S9%zNVVWXps(Z`(dultm|9OTUxDwnZ)6>u-L(=I*M-
zHQS~YO>QVZbC8p1yQ*N4wPHZhH4ps<*AK1ewx3zOpJ|HZmMJ^EI*jM8dLF2>%x^=E
zsk2X;xZhVUj>;DotuDU46gW5V*t)wROVuBH)Sgg(cJtZ0hn~x=6$C3<w3M|L+M1Td
zR(G|0eOrCVSRnq{+2#5x_g<Rm<fD7m^qA({^n$D-3$HBH)HRM3TAE}p9rNdqLD1bq
zi|DymIdlWA`Y->}6v4c6#&71^bB&@o+^#*ny8f`p)xEOPnWAiMoY#zemiKLWseDIw
z=l2!U7xKnhv`Jrfx?||y@484%?Sa-G`E6bAuiOuk`dndt_Mq*r<ukRCRcj`i&kalM
z&rkWrk|g){kNGOLznRw`Y!_Rw<*3W2V+8^c(^p^MI`HSH(~cLMs!P=lJl|q_{$GDz
znD$J^{DPOR&u&CGM?d$z)c;FrQnFN&wfr@MYtyD|o3)*tbFI#;4=P{ZsCU(9y6^m>
z(Xu5q%J1E?+oF6flMnvwXf5zL<lWwVzR{!N>E!S7yev#sOBO}_PQA3t`iW1$$<GHn
zXK%m1%Hq^p+xW+R^)h_FjAwSmt@dqj?#mL4%F#OIy-6&h`-!;ZH@4?1PrTa3__gKp
zxs6#Xmh+t2TA8eNtuM-^W4g!}8@)8)6Ms)e1a?G!iIZ;KeBsN}6YnaDb|_qbJ2|R8
zuA}G434X6HR?^nHPEWnKyODACd4qVh_)z;7hoj=t)%(vU%JaB4t}DBokdnn)x8L@S
zpy(~P<#|%`>bJ3V`JQFU-|$yu$K{mhDZ&-}zqGY4HF9dNH~)2vYj*GPw<ozc*JPME
zd|Y<#@zaN<PkC-B-_*~pNt<!SlwXVEbLy14JI)q~^gQhg-Lh-rrte9cKCe9!Dzdey
zJi0bkGyg-|S{3<hjhK#KpDwTAO5MNI_)pJ-9da&V%XuUdo2%a}dnWjK?XDi1-jdm~
z3fCm9nSO@#!ztTL>8Bg=-mIH<cf0b=pqd`L2|-zAp0}<pUB&*vqIAi`>SJ%ZH#io&
zc;L&s+-lNytpk7iU-+J#@Z=!3zGeu&B4d5(a?4vanHq<UfB&7SU3TQ~Q5U_V2LBed
zO#QjBHk(OE=>L|ImJj#Xy?y36x|DiIZ>ZZU?(+Wj@9yh*Es=uq;?MXmtUa`O8}FKH
z_x_%4WSKnUokdySig<&PoRu5ang~x_u`5U67q>U>gL|(t^%IYOmRAmC_`=d8qY!*n
zq^9r+uhW6Gq0CI0%sJg({B-~9&?w$!tvao2wHe3f3C$0_O^(Q@TQ}2^!?bp15^KPk
z^!q1RGMaTRx2Qar`b*0yeUbP#SEUT`g2XqHxe}tS8_VMMvoF!Ae_Bxe{_K<^Wh$Df
z#U4{sCalqy5uSIgOFS_|k<0&;%w^-XdRt`In@8!ddX-@O+q&QB4Er>bLK$9;oAoz0
z{g}3G^P`If&9i%7K3ll*v<K%**7)n|Mb|jC$#SiD+w*L9={uKif9B2$f4I0?gXOgQ
z*PjQ!FPr?kh-0_cqZ_C8e_Gt(mbk*L>DYz~wb5}#MXS}i^_@3MT?%FLxl(;7f$596
z&b@7WZf*8pjkY)%z4L{xqHEulFI(fS9ohaXPM%qGX=Z3+dekmCkzEXh7c!Vl9$oV`
zSlqT*?et~escB0mGjo~c&p-9dFe$73_Zds61MPwf%?<WB+z3!K`E@^u|66U|lyya#
z8~jYwH}!6JoO-;1b!m=-ds%+Y%O}&P9XS4A^)cJohca{JHx+E)Jp1HZ@~!NpwaX=5
zaZKbm5@Bp0W9rv&X{FYeR+;(hA1<1}aarZ*aknQ9?SWD%dx8~e_Q@>@(HE9@9Vc{S
z#;PB#Hd2}grYxM5UXjOgROh=`+nhygm-9Y5U0BGy_{ybytaCT1teWw?-BkCD{Gkn%
z8tyikrFovIhHI^QPt86&xnY+>P9R5?Uvo>;Ee+kX0=~uG+Zq2P+W$XyY~7=0+humB
z`84_`Jh$Rt>)N8}BjQr>&*GF~lA;jHY33)o*O$jRMJJWEOv>llE89FboNtPeRQr|(
zZy$OVoneps_j%QZh<8ua%$em6-(T+Zo=f{(G?VF;x#y05=9%*S+-ITU7+01@OFpOs
zW%(}YN}aBq@3YosgQ?rp-74|@#_PA3opQRlX4URvX?!!x-+q3ee)!c#C+V}&lHs@2
z@9&G)Yb+Dxf8q@9lsNNGoxT&qjZc4Iak;wU$h;jda+|g@-(Q<+`NCrRnSk|mcUM^}
z&-^ItxcuSXBQx|<#iTT2xyr3XT646LuN<9kw&wQZ$oN%-$_2-7c{z$HUjANYEz6>8
zJvlXbqkC$Hk!L|{Xel?(rAyc3VmP0FeX02QK|{iVCL6gzKlRV8x0jf<C{#@U_TpjU
zVYk!IdG(%rx_vxBoHwQCQLbjF$dlKN{y!CilEhULe3Zqs&mWO&>{^u}p1`E`aNcio
zErY`XTm~VWFI|}5c&GJrP1wKQv;UOvL%!%BpJd0RN5Xx5o13Ry%-XBQ{$h4Wpyw88
z8(Y-{;yE52Y>xIl&u^U5e-{6lV{XLCt2`SxG?cyXY0f#AclXj>t&6TPe_qY4i9Dgh
z8p&T^WZ0@4w@sb>sr2FbK3|0X&benK)U>Tw>NczNiobE!-z$9hdc12#(ZbWtcf%$v
zwoJ|yb(6hcm3<=jUQ67Z9Vzb5qYCP{zpvTRY$aQBuq39#%KlpY(aEXJSLRNipvS~^
zXYq{FeVkK`CR-cKnO!r-tL#aaOUB|2%Puo7T^Y!*VoCD*{bHx*7A{!!{!6gF*!#E(
z*4qzd%URw&y($0ZgI}*gWAixOGO8Ze1YMZG!QA%ys8pxcrrCkbGOJmdzY4p_Yc^d8
zU%ba|?VFs3g*&7=R;^bxYI!I-=jA%Zp67SsX0|OnS`+Mk=t%6YHf_x-TjqP;T;!zW
zme-!j{@HWm(`Vn(-0a&_)9!sevh9Tq(}L_z>#`*uPo1!9)f1WS(^DB7>yO2z>S%_}
z__6!zrSl7SDOJ{Mzl?v#^KLsI8)MI<qnoC0&J<P44Q{`>`gz*kt#M3`-Z?S!M}2X<
zc}w^7*OgxBQG6})X1-pvYx1$}cNuFO<A2YXwodA;P;b9)Mxnr=_y%6NK2`w}Q<;6e
zGv21IUwMO9yI6k8F|TXu=7+rhvO)P(tlNx_UwKr;HhJz@VLDI#0gsIN!<{n|kIUP#
zD*WKebl=IvzU_F<4(6X1Rr-GUif<9?Z*y45+2>TxR5(2*&3bFZitHyjw^z>GV_>^u
zeZ!6C9EFSq*DMZc`AO~SQ(O}-cJI~pa0m51g}A<j@&7lM@Sm_+6eRIjjpfPF0PDSH
zP9ONzyyS>##p_gOUOTsym-!Q$Dti?<&+UJ&tE-?^>7Qr(lxaDyhfU@jg;S@pV~#w$
zsurQoVBMO>ys{wq=`zKY9jw<vK3)IHBYX0V^8Vd(9{>B^vcn`nt#a0vqNG(9zcc2X
z{9vBueZloe$u9OAVd`0pIbx?+FNW(cIFbHfO~Ba_cM+asn_G!%=On%=J{{6{?Tg@y
z?d2>XFLM%F-IE@!`*Ofn;K`h(??3F_IA%7jxx}8=@nqw%>J4A)*7l1|*W!L_@Xp<J
z_VsHsPf02F@@C(i<gE41r^v`mmfdnax6db$D^>~R^$f3U^x|AUe>gE=>6OJD^MhD~
z`8jN*vnL*ZwrQ=-diO@#g*gxBYM7mPWX&dd@#8${>l#z6EoWJDt@kd?{kZJOFQLA3
z-g5FbVfG9M^1Wl9FdjB@S!BH;c{TT}hq1}iZJm-@p0V8g-Ri=&JjzD?%jf8zhn+c^
zvF8oWuV^t^aHN_i!0V3IYnKf7);jZTQ@uN<xNdK`oTlY*QEWPg-PH1<W>U8nn8Yr*
z%)0TN_4Q2w5@qFYSBi!2xu{!`sQt9ne5!`R7IxN(n24~&^Cl}N%@5PRk@V%W%Zco>
zvIfhnKV4|MSgn8j!sRZpsCc%gGcV0P+<IYtm)PpB&)DtNuV$aKu(w?5*Y{#lVdUnQ
zAu1K$qnDWE#VJXiy|hqL{LQ^({Z~#g-wV;36E#bSacA?<OL9@}u}|)VWp(?g7MgF_
zYF8_xaZE&Y*G7BQ5Q*Spn-`~ln*B=gv53xQcgHJz+|!fhtxoQg{w&0Ly{_rP$q%bk
zP4Z5)6nRR|Q>~lu@Ljrlw@rHKwZ++H(+X#7$%+*E=PEeKq;KV!9R`PQU3XtLujsD9
zu6ryAdVhN>=YGuJ*0+emTlKQ|t*JAO)_uQFuGPCptH@MwmhPXehXOT~+C}#5oxS;I
z%JS1Qf|lyb9^CGDqho&itGo9V&#V>m`=R|o_|TEdFPfeQiog8iwxjIrX3;D2nP$(t
zC|gy?TKb@SPFT)C{%xHZ|E3lyMNE%~iGF)#?zLUb%Xa;LoxZL;|DsAG&)%JBdHWxK
zymireUX_A=*3M(MzusI{`LbV!amK^4*c*T63-PSr<KS(6f8~qfo}b%|oWuAJOt-e4
z*7&44V*3rN9Y?CmO)jf2OjsF`*_yi1<$zwHmrCwd&QDwi_vJ;l+*edu?qb?C>9p!&
zi#@Sd59J&VRn=Cw8@Jg??_ug8tJ8O!Zr_>v{&<+z6E-fdMNHqUuP;9*%O>f3r03eB
z-l%i(OvRF44$40}W~sP#!t&7RJ`diA{A#x5ukqeuXCZ!V?t;BDG>X@D&cAa<?B_du
znU`mN+b;T0HTfW~M0mZ)$#B&@Vp$XBuT(F#`V+eS=Ty#)G)2ZKIZh7(j~Z>XFnDui
zO-*=*rk=N=PlxQ`oEVYWe;fBdT5PsV?&yj9-SR)<Gn}43wR1W9b(uqu;N=Cieb*kJ
zOO4!jD$-b4!^YM%D!Z)VX{7b3ITiXhf~KrlasFPq_??f+JC8>Gsb4L0ZvPI+71~ud
za&x)o-VSk}eSAA_%=G2W7VC2)A0FOgdqRv&YZptL>7JzhhpM<291Z`M79t<6Gs`Cb
z(#Jg|Gj!J)N;bZlu;Tcm$7xL4q(4nRc)#wcp3B!mW_1^YsxD3bDy7M|?!0brQR|_H
zy`RP2tzek8(<yxipV0l)88&v;C9^(xWqTa_t9SpA$;__pd;((oU#$$e$hezdYm-R%
zo47UnssTStkNnNjnf7wgIp?2RJ70-jb5^_`GppoQ*VAjxQ&Ti;Bv&Lv2mX87vGMA=
zIj`rguuz`=X^wZHY<SwgrQUW9!n|{yRfx%EYTubYLvWEsv)A5dC)P5=o&0Han)Car
zkX|RRd-IwfbAG$czigT13&!KMA39pk@ow^MX}ULg`I5i)_$vC?z6t&?EO5-+-ciGy
z5U=2M|J4x__ZhMVOo}#2N7fjXr|%IyCm=1aJMY5YEVHYX@jM%z@A>#w;qV88eJy8u
zL|vZ-|J}T%tSRJz$)CE&ZR%~ibj1%RAN%+4?vv|BmVewcnYr)gZL7?gX_nugMAco{
zwC^u_v%s?Aon1NW`!|0$rjym<v5`-?V@1b|-qN$%7~g)jU&)!k8S>ZL@QI4_A%z8t
zgIC;LegE^{7Y7$z-kkZt#%@{Q#PDq^q}k`Q%0_F(Xnquva?QHty!)D)>iQ2V%zOVo
ztXsE$X`01-cV2c=>njs}_ej1}oU;789RG&3qL*I0oxben#juat-d~$><??l-JN}O6
z%XZ&f_HeC7=fXLQLe$uPh_bsdUYS-nLBuOzS0h_*?bmM%rgl5d@Rt78TD48>U}t<a
z|KF|a@}>VTJ$<3XRycUAz4fLYj7)KiM<i|2bTliq&DV9S9+7(LYPWuI!%Np${=0?V
zOPkKi$f&H7*r2AM<I;Tk(L<Lj{X6n%-DY00E)EE~&2cB~kL$BV)$CmJil4Bkq^}C+
z`j_5yPF>*9W{r0d^YS#$1nBkEb$?(Mzi{MRaDC0A(<UoLm$;r6-tX({(rC6ueYW_F
z(~6!8{s$eLz*4*0?E34UUK*Q%W8I>Re;J5gXYu@esPgT@)#9@(l8ad4?&iHVj<kFF
zPMYW5hU2ex%WhXt@JVTY9<K8`>*160P4iCp#dQ{~KlFEh+{c66+Q+|XsJL@-|K`kO
zeYN<=Yxez~(rP{b51+d;z3`hK1H-y&UzNqZ{rp2-Y8Gwpoc^&QaA{dF_lx&AGY;H&
zi0yC`BSTXI%kFsgU)(v3xjP#KFF3E1bzjf!8q5@3=4iEkX85iU0kdiE_sd2;E7Mx?
z=g9n&N}Ep^i<j=Y9Pl|Q_#ofuOSf~b+OA$-k@8R}ZO6X6ICJeI^WNJEK0P|?%KF)x
zzZS`#65_FYbcOA4QdH&PyRttP9xd7zl>Z^e+tl;Zk=;&{ruoje{lC_*^C`!oruEH}
zV!QQ^>1m0xS>F~(-7&j?V{+XU_RpF9bKWdmw1jgfm!19stqrd(eQ$7_n!odckeki4
zZ(-N-gzPUKdBhaKDstmuvW2G9yLkSnV^4LAZMn^pCv;h;Nja&%(JI{Zn15IGxqbTe
zPmY|<{^_c{Fh5Y`&gCh}2VD;b|28%f5&t&#{l{jTlH+wJKCR7qc|Xl|uDGlBmYHm+
z&Ovs&KKf>rAL4qW&O7_+&dRP?-wTwszKNQ=c4Zlp!=vEas|C21e>nZbHui9)gky?(
z1D{{+#qKwIlH^YuTygE?jAzDcTBEjRneJIS{dBKlrNQTUm2<t{ihX5$virkL)0KMd
zOBWmxUm!9^nRR34PkG<uT+Zzs6N>AO{_}k<^KaFh&V6$(t`T8)D!T3VoBYClRqe~N
zCNCnMb1wY$_rF((&W@{VmhXPRR{CnTz`=Km<8Fy58{0YkkaOZOD3jv9wCunuMb$%9
zHxJL&P~F_%AL-kB<capvJ;L8MwsJ4stgzl`;-TOF(km06$=&2%woG(_n(cmf&nQU+
zCfm+h{TL1L+Xp9#D72}SKDY0`tYiA;oxp>-Uc+j(H1*k{O_J+BzB|U>Y@yLsEwWC8
zX?44@2Ah&r=#4-BYCmiZ>igZh`Tof&mmcR04}A|M^m}TuD^5Bn`&Q@#*UyIC>HB4j
zpDS)vle2fwD$;n>VK4Ra;1fIF9oxS!S*JanyDmT}`LD32?D4suvrgY}o6CA{hZ)QF
zimE;N3E?dcoAjivpNgoNSH9|f(~GY$3zw;wE&aB#JbFQq#IhKNsD;i|-yUpU#Oo5s
zF2Q}xv~i+SXz&hq`=^HAcRtw1D0o<^s&oEFCgZ&L_a=9~-Y)Xn%C=&|G^q{Vwp+8q
zcJE0~oNz(cMVqmyn(d>(q%$|FI6thOJ@@|9E4xj(I|5nX)H1RBV@=gO|JLh$jQhu$
zvjOUCWyNk9F(sWrhv&^Gm6&lj?}6&iN3yeTS_i*dfAM7EF}ryY-luPU*wh%n6`Nt@
z8#FoOiBQE7ZKX*~SGVq8db94cK>h~VTV4lNW%pXfrCX(De$f&Mo5<^(kT|vS*`gnd
zN}|~}xGc~-zUfJieXGamcs_;q$=~t=_ztSAyWPz8J-pQ^bk?aAjeBk!YkWL$E9*Dw
zdx8yKCpkXbXhi!z^LBl9`g_dR;86a3XS0MGl$=spdA~61J{&E2dVk5$m}GNR&*=@%
zrI)dHr0q{O7M0Rn+aOhURWa4-rtHHiZc*Pe9|Wd7V~)_j!c={mce(JRnDp~`#=(K-
z@?N$c+3wdo@euc=U&lUNK6xT1_Vt;Qm;TDXnrD?Vb=jAFi@nOcx9k4iB_%NH(^RfP
z1yzH_u6m8&J{#YU46}RP)en@gXehJZ@cp&bY1Nhw3ry2pZNK@(Kj!K-+oY~>DE$An
z#s(INFE;~Uz8CYmnVNFWtoBLZvPi~jMP<L`SQqVFte$LL75?#y#KIG-EM^a%x=*_+
zv$H$dQN&R6clH&niit0mKde0v_*{SMr8!^js=fGBx#z6HHRZ_rQNBxFf8e{>x%YL+
z90g-9!%eQf(eBf}KUZ;2UUs3Jr{nEglgXOi#~f!H&3{=wWBO`m>3||8zvr<_duD71
zte+YEqE@zl@5-cV#>dB<)@%>fN!wjxzV&JD47Z}&vqGC$Ie*W4C9sLjZv~U%)c-b%
zR%?FD@3?OF-Ad+I^tP)@K6t-;v9v`qDrO>M9_#uXhvvx<7x%_^*ne6TUBr6okNl4W
zA8)=^@01raC*RL2^uA&3yoc);@0<$)69PAG(y#b!ah9=qs!xFTjdi{gtUoV!cJtuu
zPuuNIWX?UM<FvkH+oQ#z0aapiUakrFXLi)|vcUVmO>QP3yJmf#HbeRz+Y|fjz`0#p
z6?gsp@b+Ms9sm2it1>SBx+xW6-M?d#;En!HUyoTQ4Awkbc_8xK*2O!R^$K(w{U07G
z4@gkt^Gf_Hoi1@JyZ-EhM;~6qu}|Jx(Efk+i)mk?H>liR@$iQs$40ML;!d2N>Tc(@
zxA4UX&U@LxZx(Z%Z!*i>iEO$-g5EbbeN%WKxv}YbX8!NT992(wHn;80ZQE!!Bi+1q
zf3muv&y{PZ3u~@_T>jNI;8sTe*0f5gvzsq`ej;#Z;%vp;(H3`o7dx}W?!CM0SNj5M
zubB(e|J6=i$yz6SK5VP(Uy)u;7XM2O&nF$fbD}5v#f&|H=X19uWH!6oZ_bjMGC5)v
zPs{nuhL?QyZz_0tw%LFw%AU1ktBc>cIUSDKNw0p{WVu~FuT=0$<?x5!LMh8P++*Fv
zbl4|{*Y)fjvDNGk?bj-KZDo08VE&IiRPu~@!`7>rEi<n#YxuXL$6>m~hi|L75~c=<
zXQ$jr?Pc5NFUG8D{YGB!duD`xpXy<=2a6e5FU+uG5Sq7_=ipD-X&+-cpF8&?pI;>Z
z-}!o!@WiSAuL>z9h4yMpI{Ng{{ROs1*|O(;+IMAwNzw|Y)W?M{=Edn3DV%z^YJZ>1
zzUksm8;+{~TKwjtmlXffqv=b8SM^Wb8mZ8_M1W}?|B1gs=j2o0WPNj~@BZVO<59&j
z|0MT@IvvjE7N<G>_nY!gU;8qyMYi~b%%?Ncw<msi;HNZy$u}o+_a_M_7>i0Kh-;S`
z=NED<EuSqByISY;pZ9leizNDPTC@Ms(YQH!On&`57u9dn_L+#!IZ?1jR5Q@{tY4kj
zsmrs!F}yv!MzAuZ|8)PMbnY)J?z-KY*7u#EQ^QOpP$!~lYXRG{ZOcQuUKQuLuRZAf
zCfOj;uH^nQ4vo0*Ng;<9tIb$w`}I!GLH+w$;Ve=zM;3CvUdwyvM%L4A2RC<zf2Oz7
zru=>*%;E8Tp-tmPqX^qN!JigeG_U?q+h_dzH~Y&!ISbD7%szB>JJYtiH#oMG7Iobe
z5z>>|7uOW9%J<^yt#{w+8*pmxKc@6sR_5=gj8|`G7+&<;xO{TJO3?<f<_w0dy|&#`
zEOeeY>^W|hIwLcqL(o2fr{@>DiOKob;f9+1^BdP5)9+E)86P>{d%;nj3q_T6va_bQ
zw|!5`+;X|<e+R$nf+gayOZ+}_-8!>yLg?op-gB3a&$zeUEGz11>*XZI<8L@DgY^z=
zICF8mipP#;o6awtare`Y^La6!kNwN|G;QDOnZ?gJvvM-OUsltq$h=d!;*)@Ve7Q+=
zMym2^>!xL19Vw5L+@w8rtz9eHd*S{MRRuA**Tq#E1smqgcbmL$`|dr<0;YVcGJI8A
z@#1fh&D&*{SNz<=`iV(pZtwlXlBYY@9RGU8PQcB@BI3?F_trP|NB^=ZX=_LDb^Oc@
z)eQAW$}gx;-0|m}wNjFo!wKCT>-SGBde3&^(uGGiBH!HHm!P-T+;rxeqw7k_Z5Ekj
zEisJS$7UMrr=VgxIl6zRn$N{+_qaE^q`3-m^#4mgrFMe#fNX@~{e|U^-?*I6oU`O@
zTfk;T4WrZdH*Ea7joCBhREAw^`o?n)QciA|vcluoE~biiJ0I@~JUrdRZ{GVJvAb!8
z=C`jeWHtHopX+VJnPVs2d9wep#(64Qw?rT0j&naYW4rb98MVckOScua`mN>ZIwRE?
zAMO9@*W39Y+-n!bHvMbiPgPvhY<W}dx+2SR$I$r=hCintVy<R9?{?R2gJ5H9#ODjs
zE^m(L(@JOfs8@5|v{uFW-m&;eCf}N8CU775D1PUxeA@d^Q6&v63B!)uw289m*Vk-X
zH#;Q%F4w~rUa?aBC#$b7E8`K}t$t5l%$Pyp=iTNLnsUb;dgkva;)**ky)|8*XI%s1
ztN;6+q+ad6&sFx`SbyD*snI&cN=L4qJf`HUxVW!j=M01OIy@DJ*^+Lx{HgfXziRs$
zUr)JZ8oPT;en@d0i`4$_?(~$Y`%`GIN3hlYFgbhSs$E)gb6*@R&(OErIorf*@Bd9F
z*FT@%Ej4lFoQ$v_p$V@RsU9~nynE(jz}}<BFFJ_pnI?I7U6zaIn)l43J^0@&mHVrg
zzG_o)xxu!Sp*Tdl+mLBNyn@08@27m(Denxl!nS7SnkjE&Vp%JGyHH^%M^xZ5zL_&m
zS7^-&n$F|lc+M;E_N>`fTjN+d+jEzMd~XlCtXH<8;;xzSn)E;6{nkHubhT_HecV1>
zKG6HO#5#HL1)WnbUz*$0?B$!!8Z~cY!Q(3qr>a)ZSebiTqsNbF$2;%)&n7PqK9yp_
z@}{Y5gP3mdeV**)Jj-^AeCj{ARg96xa;NGI3$tA1TU|{4zmx<&sygqR^ZCxP*9r-l
zCr($MH;I4fck+FSN5eH&wOcx=U+WdLHgDeY^hyZZ{-vQ4d>boI3*|i7qQiYlp*jBI
z1@>1#7Y@x(ea8B5jkx@zPkMLO{no1IO?T08y^>_w@Wn#C$dPxV#H><Y1-;Yxp%KZM
z6?<nbc8h%O@aGP9^rz>lC8}pz3t5-)9pUuf^vo>3b3yF3VwRPDssW+B>hb}z5^}k&
zbO$>wJZqV$|8l~m8v72VL!3U6<~h!%Z1zS^HfQ&pBXU%4_EUz%6LPuper6jzX1G4z
zK02k~%l5$K`E@ZY4cAvq*!73mOLf!dcK#V3-HRP>E_SP9czoOBir+fLsdrSL{k*%k
z%SOEU7SsM+Z^b?Gz0z-1u&>+6`bO*-qsyif>r;=2mcReC_rV92^v0JxQ4d19-sLRR
zIaKSR|3&)lqm*{%B8!&lh4Z@VpItOIN<MD)K;8DaSHam@jcrz$#xu&}W_x9~t@-IY
z=l8?|&dM`#JJywY{dZTC3#>>#QrOhAVbX(}XJo!V)rdR&d#NhtYC~^}slqjXPaB7~
z3hw_e>2%5T)~$1f2646<?XDbRTkhYS+%H+T?4w=;gNnlS3+GbB477PRFtEi$l^;nx
zk+>`&+@|`AR%qP!m(Fdif4+Y{RKJz)sLuwThb@m}e&o;8mDHL$;fd_Ub(>g@=**hD
zjPdbxy_HF6>yPqGThq+Y()NC`x<QXd#ZNEkLv0~_^VjNZn)qWW`xN82<(sZ#Hp|NX
zp4%1Vq*x&6v-%P5g`XyC&vp3QaV~P@&0TzVzx%|^p_gt>inDon`R9pQjhuTvB>sBs
zahN4K_0?SU4>$F8JnGHJSl#dY>RLtqo{luTv}I-%l03G1Wuvd1Hk=(ldAr7zMZxpA
z7YMoTzgamePh2gsR^!}VfnUj;T5EUjY}{FA(KF|Hk%CyIQP(}DY}Jeli3dgW6kJSx
z-%n6GsC@WPNdKpu2R4fuO?lk!o2)P?WcL5cb=SX}=PgyJlK%7cTB>ZE$#uthO`AM!
z$WDr5*z(!&Cg)Q*4i_`S`gbeR-&v_A<?x)Y*{yQqkd{hG)$e~&@0>l8QbK#B4t@x8
zRy>n4!OOe!-kpinN+!FH>)Ec}DU%i~#wVjce|`Mf4L#pByX*3=trN|7{HRU-^?f71
z2IXLNyLZ9c6Dt<KxG|@DhEJgIHSJ9onq7|-+KDCVDBU|U-QU~zFSAd4QeSMamY4FT
ze<}xaj%W2b%szNz!t*M>h9}umUk5%3+3WTvVa4WhH|DSTR}Us06U#cpWcVfEvG^*^
zuFq0`@;$vbzCCeq$rrh-zr~9u{NXg&p3(8=ytF6t+FOfQ75<uAF|NK+<B@PFdD*Gc
z3aspWt(9BCcZ+I8+&WV`>)GmLed%6z;~6(*g=H>_|F^bk)n475kLQZTt>xWv@{~!7
z;xF0s3gtr)99Fp&QlI!wxK6Cl^1FEd&2z!y{Y&M3eTh5h$#u14>dv$5FF)@0&UkS6
z){ct*vrZKy+B|SrHRbqXn*+;E9N!yb$EquR^<||kTf&M+w_C4Yb)V3>YROR{^!>7}
z-0LN&lb4_SwElD4%k;nO7hY|?eq^EL#koPtCQSD1Rycajc0GSU|E9o_O+5ZZyC)XR
zJ$(J~f`3fwqYDmPXy8dn4H2#r=S%wIEB~m2m3`Ob-LbFBa(7Jey7SBYXwM}^wjWc?
zZ*I()bL0F1(I*N<2ZFwdE>Ppz%U=I+lDfprdWEyM1p_*?&GJ^5O19ki{z-*dZvFbZ
z`%J=j3$=dwQg>{*zL!nPmwAmQ3iGCW@NKYJ>chNG<Il<ts|7wLezv<`?U>wg_nf=@
z;cZeyudF%>9ZWN81tg|VjI`FN_@1kw$YU@3<$-C;pSSBHFLV75DL-r3*e7TrBw*Dw
z=lnbwMj?(*2V-mYzR>HD&T@BXKfdkb!Pfu#GsFF(C(WDpdD-&=o&KhUOZLfgEP8P9
z_zoSRtIrG{UV7)4CBm>!{n=ruDEIZp%Jn`q#ZEJG{Vuxjg52qId}#-SCoa&lJpZe4
ze<y4B{XaWC{yOv8$uZ!iU25%n#*ee!@cJ@7VR*jr)T&eKKAd~6edA!(!5;6NUk>@Z
zgN+sox$3?aC{p-!E+Xh0PZ$4^=(0Y;?-RBy=rOwM_rOm4tij{(&^IrOG__n;hKI1J
z?<}7xpk);@fj_Bx|5Smd{Ru2rOt0#v6s@YsO=)`eKw{NNhRn#*+B*ML=ZTm{>Aqc&
zvRG)^g^C!ZSF3U+Ogj45&f%Q>oABH244>?kKiE8V<YxN#%S1q8P41H2k8X=ZT&=0J
zO0%wQliT)sUugWi493kDM6K)tc5YZwBDMckQNmtr#~c>cU7xoYlxm*ZwtCJX)}8k`
zZtwcFMZu5#DA(>|)2Ci!T5w}edwKp>C4)x(cfadS+?#ibgDcg~q*u*2F?uWGW0f5$
z`%jw~h&@sH`}^X{i&Op^^Dv6ct?bg}SNi0hx%`-|?tHN|Uco8berg_gHu=JwRR!Cu
zCNcB&I@zofc{=a@W`DDz-W5Fwo_o(qd}95<(V`Q$y>@E<hWbakI$S)=SAToA9{X7J
zyJ*uShdDokSVfpb1^&+RWL+h2Dd+jBdutbF>@5q=*s$s0>C2s^MZ3Oe+@G4Bsn#tL
z@#@-hvD*C>C);l-3cU>9kaL{p^`+IzAA9n>Skt>=_47Tf5u0|}TzS9y)@7q-9(|5~
z<@x-$m99E1-OTRUb8^o2Pm7<vT4yq4{;jmhLEfh_>i+#tK5piGwC5>Pt=~LXkH$*j
z+13XmW7j?UG<|)A_O^;Crlvi8zXTT;oa(SRsbT-`p=!n|O|G2@xd~b}*PSb!Kb}^2
zqguOZVh#HP{|i#}_m;P53A9Xm`;<FN-p|UkuSvrve%*)kmJ3BaSseEZ7A=0oxvW)Z
zv#Yw?#N`hiL;4%V{#z#f`Fnerp}peSZ{K`cqfIB}^DFG#bM2v&*KDCJr*##agg2Jl
zR<AfTx4p(IcH`!ib<Y-Dxy^lJo@Sf*_8*LSKMLeL4?b2Y5$X|S{_Wtrw()OC!*TtL
zRb5qIcDb51p1rWb`+aF)okL6?Ym~sBc=HUmmxXcPo+ntJD)u}Yw6tMcqJwtDOx2B3
zd5UayJe1yU8lU5^DV+DAQD}N6k9W;87xAzgX=m?sO$}pv?y2J=Qq+FBD(bjj^pcVd
z9i2<o+%P+7WOnPJ+Y(iQBrc|fRmr9-(<-(f_71+!xS*?M_H&O9E6-f93s3%D8QW#;
z`KF^PI>_H3R^RNXut)=2fX76Yyj6Gqze!A;e0FKfZ@J@2-26ee-ivRkp4s`QhT{y|
zSB>hKKh`es{}6C~Mc)U#;)%A$TI=RzZC&$D@Ci$P{fD<}A}<-RzKkjVR?hl)cg6Rv
z%S&DguHWr>>P(>#e_Wf+y-((kAKf+eyCa@uc!)7-&9}G-9VxTY*m8wt$FZ)P;M()+
zYFe|1#LK0Nlzi_Qq_I8!ept8uZgi+ii_b$LZt)*AuQgg?yCM!nzTuzxrn_P7@?(e7
zcY7{KyKv#L@&D7$z5O(gYh1qG@v4AhgWR%TrvAHTS@v9;`%UAK;o^tauV~fOtoXi0
zeCF#%Jg$2p>I<gGER?P5IC;se_Gm8qt{su_?`M1dPO@{#TfJGT<ZJGy35=iClzqN*
zSk#5}U83Ei6F=wYJ>)TE6nk={cg|D(9ak)OvKvmE%IM{^eI;9)p?CC-X$zGN=Q(?y
z%UhVjcOye4#lkVQ*-CJ0hjBD}YVV&<2W~OenXNC~>Jd9B|H=F#zY_%hv9>VB6rI&v
zsg$bmJ$#e%md~y0dW0Xhhgp1++8-pKuzK&B2=!1!*%^&0vkW|U=S+Gx=f6a~{ePd3
zMZKbRFWsapoi@KcUGT}KCV1m@kHiU&F1ydOIO4^pDqJ2mYb}SywHFevZwWdm&74sk
zvQfe{f#Yw~>J5JjZhMxfhA%Yof7O<Jk}>}O^Y}QGGve2c<}c!X`>k`Q3)BCaBHg)P
za<*Rb+S=>3Lp5!FR4+@cx4oopc=z(@-`QPmJ%1t<Qt{W~-=sNp459K@%3oUwEAnu*
zo3<+M{7^dAKr+1Pqyh8iliw9?|Cw~iX;0;To8U8jww;UiaC?iK6ZEoZTQWs)=1)tW
zsa<NbJye==Y<Ok_a_iU2N?IGmn=GGvdjHoq!r^bi<-}gcU9_}XS-+%sVc^`>3$cs=
z(h~2l+b@=#cJP5y-Y-o>bMyHB3tQjJ5<59r=jG@Am?ozi&fz<BayOLzUg5tt^uq7b
zZ5~?{Pk!ff{gC>D<9(_1&x4N~UzkdTJrLXP7TLeQM%Z?RM$7$uqHk7CWDCCG=e)LG
zQToM<OChBf%}p;AbG?{8d+}C(Mb`U{497CfP6~M_N=Co9KD8t|_W0b%=I<v=JpbUq
zizTJK?UU2%7S5>rzIprkh|CGwa~GdmKA|vdoz|v%9BH>&KZZ}gTz0>;M<H+SHi4;i
z%?Vz*3llcIj(u_b^`vC&OHv$ucTPFDERa+<bS<I%c>fjdy4_EodGWB%y<E5ZvD{P-
zwT}1do#%S~L@s#ol~XUP-~I2jTi0jWHr)Fwl<CYo$>BNw$tk5@kE_m6`rpJ|d0;7D
z$NbXkr&lw~v3jyg&MVOWLrJ?CmrvGywRiK?Qzx9yR{g(A!MofstnAbawLkJwKij&F
zEx8k#qak5nb>BPB=_EV1h~J)9R()4G|DL~g;b(S7;0CWH&*STUY8<<j;qZ$0)Y4n!
z@3wz9t7|k#a;4yPXJx}93}y?T=;f`G-ywaSg}I}ptUG?wYo}7ZIU>u-_Pgu})t=fb
znz6UI?xKq}H&5u1%S8gWd9KKOE%_2<-JW_cTF`4}T)dk;n^bqTNkGi~nhn)YHPzx9
zSAI;oD;53Pd2Y&uh;9BU9f_hPXW4o8Tr7Ln?Rd%U&GbI=Ra++{?_w2?zY`Se(7VjU
zW$CTf{v@}vGap?ze?Rhk<SaR+&G#<JC%mdUy}0J-|GJrl8XJVC-?9C+@74_O-)-CG
zs0n1gtJXC)I&`4P?TX%A=Xt`<ChubD-F)s^Xz=-Kf8TB>+LqVdYiF`wfYChQ-7fd}
z=gvjQyYx<w=sOm<W5qtpfcl=iUvc(6UJ0)2>mqwhu3QV>d!(wks^b52H_o%xMU211
zSYH;*|G(Zd&7(@V*+hZ6?S*b~*2)Gw=1j+3FFyRL|1oD)Y51Wlj!)!P_y4zaS?|xj
zX1cKTZTtHVvUV(t_x-BCbGDWH2%Dn8o><Qnn=@FqWH*Ov`phmXF<9-SD^is9z`uI)
z+3m|*#J;Je=vE&T*nGff{bzCEn^NmV)<hVdIoa#<C|q#P`S-66JP_XT+-#0;{hK!y
z%X904cWwAQ`S{GmWyj{XAAE8$>rBU0-E$vir>%>%pWAzU+Of!sX{Uvl55Mv2-M4{7
zB*Td5g3+}36V}X)%++O9nl7*8T68vs|2Nw~*%Pxe|4Z@DF0L%#_Z2buyKm8~A0CR=
z^(Q#}mM!Cbwfo1rm5Hh%-a3C9iu(V&zq!&>_QLA-w&$Pj$(tPNx9bSU=bE<qn9}F`
ztNmtj&k=4ptipar$nFB~WF@haU;3rkC%LsgSh3Bua-aO`%7lu!H&;v()`)kLT)J1#
z*IjVm>gE&9)|R|W?<G}Rb_iZtl2maZu!=?b1E0_i%PA=Z#onv^c@iQk*X&(bB6j3{
zZBoOx)n~a*l&$>prgl;OCL_ViD{GeDm+iP;!}?K5Pb@&KsjRuvOKnc|g71_2cPQO#
zDqdTvb<5o`H|1n+lxWz5*-`$Vin4$2Yp#)14(Zxd>=r%GKzHZ1e}?Aii^7YHd<5hc
zi=N52)m>jBd2y$_^y^tM6D2<w%{_7^{nw#X=}BjopABT4m@ZO%FYWZX_Xn4pN!t4G
zlx)!ApH5X<We<O^Kb`VS>{h4Zi)M*M^R-m@^wVCi@qV^rzI@HHqEBA#)(7W4|Jckw
zd&l1$uMMquEp8lX`gic##vLmRH^%jRe(bLvlC$;r<yoJdR7>p6>!!^6&nzB&xaUbU
z*XK7at(x;KUu&~zPkZ(x#rfqfuess!{+GR-0_$g&Y)Xh}obp90xj>cs^p<6hw=S1j
zaM6$VV8VN=^Fd6n`TuG(&feb;7i{GD<k(KHki-8sUrce#xb>)<Goq;M<srtYp_N8z
zmc4i8b*_`@J^%CE^=a<~`}e0F+TR#<{&H>d9ap~spF6Aet`u{<t`Pd--r)`Fy)8~G
zy|np%<iiJ-n44#=F;6HtnP6eGCi_U5uT$5Be7PHIXZPhYIjEZ~XuhEvxof|S*;UsG
zslDfmyIdDU>*VI~Itc$=^|dn7v?-y(gUPe$)fZdqiE?{=S*5=J$W^>NH_?96{?DvC
zo_-AyjJkE*b@2}e@#7vvyyA{O*tf^*Xt*I@eK6^o+F!|-DSV>cv)<I39GZOm-5JkA
z^PU`c-dLYrS?zi2|Ff>=CUc(`K7AVZ^wQnJ?)(#B6(RiEa$(tQVkPETWof==9<RN#
z>4H$7UF8Ck-eYGu4=g{OmsWI7ebqmeYhE4MUYe0Rwm!MQo!P{6*(xHdp=PH0!iucL
z=`uT~P4;^%urwub$;UI1%UaX)eIIMj5WUR2RXk_yeHr5}=M9cE>F1a>#<Ts?)Onk?
z{ELR<e6#omlUoWiu0Q8c3VUAgFXYbNmtoVpQxmuCGs;-A;FpkKs{R!&trFJQi!*M$
zU4Hw9-YzYb)b=?mZ?9GqK5qPCtKKQ*txtZs{jX_$c|kb6qAbMcl+G_TCdCM*nLpDK
z)5Mzf=UiPU>QZ5`arIAywRa@HmrvX-f6T$;f>^uu<_Dou|Jl}Y+5NcBljx)2w`nt9
zWPGfsm}$t93M0!^rmr{>m(FF$SKH<BUF_j0f%N{$!?)koxisC-ED3nIUu4S@c5P$E
zmv3JBzZ2xJ*|D?1z$3!;ylqxf=lXd^kKETX+#j~$%_j?ochl{=k4fZ5tXlm`?{&(x
zWxl`6*7fn{xds3D)c@Q2?pe*bH#(RfuGD8co4HD~FZ9mY69peWt?WB>^$DlulJ_ND
zazfJ!g>P)Ud(uABr(^|Jiqh)s&RsVyHZ59N;}vWdlv!Y+b&Drp-rp?`tC^Z)B9BDw
z_1b;wxqkECvh6R=`t%9~ba6%+{bS!ef0g~k$Wxb6x7I`z8SlQbAz|OO1zR6gt$QSX
zl&SOfd(90kH}*X2Z3&ZP;Vit~aqo?z-NqEIl#f&Ae0!Ddak4mH^6?&%cD5Yr#nzim
zM31{#zOQky`dF#kfxOrv$;8lHK|w*m&>+=dXJwYn{s&UgW>t@jul^{I`>rNB_ao=8
zA7AwU@xSy?Jg|1A`MfLavQFI7rFL}GtbE9{l+kIcLFwt(SH0>^ZQ;I7^~}+{Y?baF
zX?r)EE?M(#lj%zy{$?)ji1sIkOiMQIs(QWd;=hc#pAl~+HS(CP&05T1xpvKe*>#mI
zd#cvCmj9Ns^~!GIi`Vn%KYcmw1Y7j~%cr(Ycz3m4>S15z$>Uv$vnPI^qxAgqG9j(5
zs-^WlXTvzZU0^&OFO}|fL*$TU*zPy?F0>Rrt1vTYJ^e&Lw<o`n_4M*(%KY;JryHL5
zXVk&E_JQ@BbxW=mE^?4ssQ!>e)${V6?RAF|imxnS{L*}(vhbHkZs~jVwl(`y&(yN3
zd>7nvX6MOfnazKvAF5Az<SU&a#%=szdstG_nx43%8BX^Dbx&Hf&X?{8wh=qMe^dJ@
z9qBmzUHN7rdj!8<Qm`;~^}6bBe?8Pgz*pMBeDcour<BFMA6O@L=y&#fooxzU^9=Wj
z9OhV>CU?bE=wIad8HIK?@?O8|Wk2us>HL}9O>gZsUYlglaqp;!o4lz1WxIKQ%hxw=
z*7>FSW%=V1-3~Kt)guB+3(h-cn;M_casNDVt5k1W>{(BNH`na1+p(T^dHv~~!`8d&
zcZ3{@lbWY?ZR-0oZ)I2Vr!2mFRrye%sPC8J?k#^Zsxx@?WX;aW+s)rH@A~w)t#f~V
zeH2zdMLX!uw8T|EP0V%$OG<D*a*orA*>=2I%Px!mO>QmsBjy7ZvCAGQ%L|{d<4lN~
z#67+AMUtZ-dv5%;S8fJp3x6KV-acPibeDt2r;dk>Q{(p=-t;W-bh680%6ek&x35-U
zkMx@2PmvL(cQzOZdg&c;diR2NXZYW*<(rDw>t8Etttz{-;hyJ_?Nu}OaL+3B`sVfc
zO#G{>jE)mRn^_xvA3Ydr!qM{Wy=ZjP^wOlGQT%nKK`Do<ubH@r)W6)YMcH8I`9IyV
z_goCri*q#9TI@bfe0%QX!4qk#cp5TgeLsh;lnI|G?X_%H^&{s$a((LdoExn^c70hN
zk!kaPf!vh$?N8Z`FH1>0dj9m={JHz9C11I1Nz+PFo!Xo)<htl(nM%$qeFp6*Zp)YM
z{pjOsF10Icv8|KAr?p`vCQ6(R%N%Fs#KdH~eV!0r?Ydu(|KprLU)Wi~l&2aqUN~#=
z;M~P0QP->g`$v9$z5mgLOz~{hmQv@_^7_|bFFo~j`Oy=q6{Q)UrbsG@ZtPMrT=2a1
zSl<?xGFP2cS8Z>Z-$D_4uB&{Rxk!N7$JE4NUuuYs-{BWW-u+d4!udhXIXB^+S^(QN
zU$z$JC96x;2)^2!Y4+i<&(ZWP$NB0jTrRj>-c#k^67k+-{f;xo`C50Ro>SHq+mVy>
zCi(Q&$qU?D7RWfo=E<J9|DOL<Kx50ZZzrQxlu4*^%?V17lHO;?9JocuwR-i}^HHs8
zu43s=<FcAxE!SB-DgLoj|NkwvtE6ikjyz2Gu;#@}J&~wB*NlZXdwBh_jpOp10*}rQ
z_!Ir}w#lpnl|#qgHVdA7ymw#gJ1?6y!Srb*`StC`<kl$L-Ra&vyLjczO0hyAnX3<H
z=9`wUmku`fNL0Cz6)w7@k)hFS2Xpvay}i3$98I-lUA8lQ#}v&pab>I5-yJ@G+MRl`
z=~LC(?<%~GJC+B>wa)mU_a}8<YJHZEU?kJBwWklu*02Vo-Vpm??!#`@=w{+HX~%af
zu6xFEJ0H*8oIZm&j#HdrTIJ4SwinEnK`ZKShWOa6R=%;@OzLZ&^0$eS4Kcz(FHah*
zn!CT?$m(@-Wt&z!W0_&ODA!gpetMXWokpbcqvy+8P43^h9_9IMHk<Fs#T=%~zRO-)
zRa-rkznqcdr~9+-RYgU|jCcEm?S6gnmqcO2?3pLt20mN6dUi##ZLZKRrNhGeR-UWU
z&$>M6TSIt5l}+(iv+{?s@o#_p-5>Vh%GK<Ke~icb6VJu{uW{#Tl>WFpH`ZBo&5J*8
z+T{KT?f%A8cWF<Fh-6v1j>wdnH*FD#pC?Tf(+{}5DSJ=$qbvS346QQ8!5ONr79?#v
ztv79{PJ`S;mD*Ner-NyCCh@cKGewrj=l}0rx;i}hm7B+^1v&5E)dhaeXf+FzV^5T`
ze-iccR-M_7xx6nqKS}-ce-xv5G%i<csZGkn_A}xuHz}p8I?>iwBNE!Bcy6+A@6Ux(
zi}-KG?LXdrS%8`A>mtcby3F#M44Vz#H`$+`e|NW$#qnD0sy)U#)r-7-Y1}@el+l~p
zd)WPuaMXpnJ7s3urT)Eo{eEYE^)6QB_n-FhKG@u{;G~i0j(N)S^PXR6T*|d@!{(=|
z1_cHpb5Ad4`h79e(csC!+%3EdGgzZnU1^Pdu}gLS2i7}{HhRA*nvz*IvQ2Qi(Y%<g
zWs9@P?xn?FDlbOP$?kb}E+ll5;pGUfcQ>uYk~X}tDf~Vs-(FcseHQ=adHnNBvtN}8
zC;ne_(^|tjRDk2ONK@DZC7F88{Ho=yGw<dcoVS(h=-yA(H>6j2b}xOUba&o15$T%i
zOI4<BY<G2^&%$Z>dF7d`I5|;SrR_4=)2d3dD;^&SSraQaBk-w{|K592cefpV9J1)b
zw}0h)5?vOxf0z0wpG@7x|1|r9)sE6mt>ENuYmP>j{bM|_a$}&5gHqj<U2#v3@D!;9
z*JUv?{x@_iTyJW>Z$smw!q8mx!soa5*DY4Q@2j{=cfpjvorkkbt8AJsZoSB^UaDhq
zB-z{cwdlWe<(cR9%9O2~*^{Mo$Rt?iYU+tSb~nSF4oghTuy<Se>X}RRozySaPy5V0
zvhI?!YGuu;ACI10-f-QFDeUa>*|kDH_V(9Lk(#<^o%`EAZIi8U$~1k`KXrwF?ZxN)
zS57z0G`RS}Q{xryBOcyPbyknmec1+|y)tc{#q=j0vQyA=w0_F6@a5au37(r5HAQgD
z2tTdT#C%q!{0Oh{*&ZJ=tF-@qX^-5tEq0mcdB9x5$yGY|&5EW)o(F8Wb3W_-=Lr9H
zVDgDs=@WvOuJv4Zi~kj#*La5E*;#>!I==2qeX8yHaj^&6W>qcvQ`6-%X-nR;IF8_$
zBP+Zm78Lr{bFL{Vb=3X2vhvyNY}1dIo?Me=5>I<-n!_-0N3-OfQbUn#cPrR@>a5u3
zyRudve>OS2Y|FBj$)<Ws&rkpVrtr=8@7uSTN<0t_+7@{9!s3M+?%rJY{l|GN&&G9s
z{x6hXW%ezsVpF!jmdEnn9;cqs3$k~+|G@sHW43zn5^nLC-MoD!vbzGRCZD$waGr0S
zt57ua@`b=nncXZ|0tPnxcQOszo+W?$%w060^WPk2SrG+=6$e5e-aU7suj%db8n^A?
zl~;{l+|&EkQTEHbc4gGT^C^+RGi>gA?#sKgaq|4H#t)?`H13=b5IWT?w3a=6PW2%P
zz5V{TQW80L>rd<Pm=LkSw<_$}b#8O_8MiJJ7&ScC*mddPudT+1Ol9}FZB~_4y225a
zE;RS5T{?TO^D9xFk4x(=KD=g_(7wBV)1Re$8&b|KcyBjB`cu`ub=K>RqSQ?kC$+z6
zjGwqhb`r}(l{4NSre@n@KHC_!{mx;%$Mu<wOiz}p6uiB7uWVB2`*$ytS<0W?KQi6)
z<mz?X_Ha}k{md7{IaQ!4ywc|Xu|G+ga^Y$(*?R7(&aiFyn{mg_=EZ`?a-aWPS*2T3
z)wW_s$>ePlPMm1IIeqi1{#oZ0zH032_^zxW<Rik_<T`El|K;1w<bqc&&H5Wqv70ko
zHMKW=sg=dDKPET#sEO3AcVbUFF!Au3wSu8H)Nenv$=!PEQ#Y%4x_-nV{TDhO&l5bV
zgi3T48yKAKZCJ?j_LZA!z3B^<%@@~9U+{F}i=w0%rt_}o)%?wke{nx7LI3OYdk^RA
z=IwjI6Z6`(_U5q<UMW1L;t35~COz1H>P+$jCjCb&$t#@SoLDfqY4yztxgE!LGcMKh
zmtXrsBSHM}e<$mG6PdD3M0adjtE_m)u&wDp#*B`C4^>@nCg<IG^o#9V{KLuL-c4NM
z>--=xRsW~awe_#!6Q(3b^7hP%uD8<L*<dt7Ud!0GwmRro$#Kj4Ta%ZspR`oS_^sOk
ziEXLJgIt;}yj{FRF~jWb-fa7zr0DPGd<u#u{*U_4bp6wm%`NX9u1i+_f1;S9v3&0G
zd40D3r>CwEmdKu_IE8l#>pQQ7e{JfoUzJ~1G4-+Zg`zE!Cmaag_cgfo*=B_UuG1d|
z`pfT2u&s2F-ZpQB8IyzAR?o{4mTCKn(<J_ev>9o<jd1(ob?!@b$c;s=@(cQHi@&^O
zJMhM+uIQWWOw-@yqA^EuV-3%2u<~d5&mih3eq5sGlTE#^L9DxWdw0c`eIF7g&oEWr
zeSJO4ci+z|j~&g4eJ*1y9OI%BWUsf>zOaABqM8MQs}GkZ>`?viG(h`^hgBdO@2538
zc=v1!k&rImare5HQJ03oKc*PNqnry_X5O7T`OK}5PmFqZ>aU%$kn2gEr(NwFa(7c0
z&s4r^yW}=xKU}!d&euG0>zapp>($av3IrFWl<s2jdXnB7sjS3v^SW1u9_!D#Z=Q+k
z*e*<UwP#J`P-eH&y833C`ChlZ(<|p!tq9n2chV2;z_%VAw{^mf?27;QEPLtdifX9^
z_vdJHPW4m$-#zt7ZA9*2MZISiOn<Gq98(jb`SierzrM0H1#A|3B#f*Q%igD@Do1SD
zwCtMhSB7u553P~*W0JT&>4BA+T@Xj*{No!qwI)8~<C#A_Pq*Y*?fa8G*DtH7rJ42j
zRYlzmja(<S#IgMz>%PJprsw82#qrF&b(57T>9*gulT~vM&#Yf@YR&Ad10uqc9ZC-#
zpWpO|rK@lAr;=6NIsI3EFo=0qR&wq=@y7jbM=_h(_fI=^w5=3RY-nmI-CdnF`}s40
zLTB$2^Nlr5?eDKh3d`8zQ<@vQ`QejGNxygNe8^gB@j*kTZ3df|757SQwJGy8?>?_c
zNac8(A+`VCzFvd%U2E!YuvKlFwujm5M^9dsi&NI286xxLHa7PzTB39^*zQov4gH6K
zYMu_=dGEseHh8~MSFm^O>}HoVlQ{LfcikVUKIzcO^`ANIn6_SLbmw*Xxc~5{gKITI
z4;Y-hVs%gQmEEnjCpw3Uo_i#QN15;4qHosDBq)C2mvCd!pY*%Snon}hPn>Jh^6f{T
zv(#rphd-{ij@cQ@5>0O<ryONE{A%Ci<nNAw=E`>tO^xym>)PNGwNd1;ns&0MOt`^{
z*VkVQ?T@S2t9GNKJ>ay1joPp8k{b^@Zu_ajA$Iupjh`p87x*pnPhr@o%B6Vf$C5J3
z1$}>RItY~OdX!3dyMKRP?>MKeory)`&fJ7eOU>L~OjZ;O*vlXtp%LY|Ix9SQM&xG6
zrMkw(`xh(~xc>ReN}<vxKXV1`k2Czy3Ya7ur&PaS*Y{HI;}$DtS<H5-6tkGMq~`Uk
zd+C+ox^vGZ{|Z{ve(Rsny^6}WjC%9`UV8pvhrvX~Z*g@7mCN#Zrc^w<m7LY_HEi=$
zch`3&3lDlI^dI@yHmCi^<FH#c(ta6CTUSjz^4|AVed@jhy+;$0HQF~$mRRdJMLPTE
z-1gnU$EQ08Ch@bTT5%qq=H}48HsfTUzC;-J0{N&KkL4ZbO>3>yI6pT03DIA4XxYuj
z&JkBDEO*?P_rmc__2;c(OHTJHo6UO7a^m$D#<dNJIy+Z>yRMUAUD%Xjx$(g_f4PaJ
z#pQtqd?p^d=eCVgA^6nl$2a1Y>Yuw_ELMFHEjpLIMq~YxMN%`~>n(p<JNu@U>*@d5
z+vmhj+{~Q1V|T1&I%}?tJDYgb61O9rK^v{>Ym=+D-4QA<efHr<9gpw&Yj^c$8)Wga
z`^~%0?q1LQbJD%JVLMk%5p}!uqG*FzBY#%qQ684SdmajGX>V#K&Nn#w>D&KFNB^10
zerH!HT^iuc$Rxrn!oa}5!4Mp;9yoQU+mStt3=9FR3=HfH5WvX5z_6qd#7;>r(5uMJ
zLDv-ZmZ>?Ifq|iqfq_8-q>h1s0ix+4BLhQma$-(Fd{t#$VL@?xK~a8kYH@L9UV40S
zWpPPru6evcyn$Y3UUCt-sa+3Ea$k5bFsLkMVbFw{3Zj-YRxuH0YH>zlK`OejrJNU}
zZZb14eCB0f&;pqUckD`UqKu6%E-6jYD?>MT5l^p-94iCEb_oUsb*Q-@YDwcMf1=FQ
zD@sX3H#Bxdu7YX|BLkD1Fx*f`$m)g?XJ~3l8oHrnpL6c9GBYq-;b&mb1vwEO0@F7#
z5))m}5XeZuNC`$qlWs3#U|<ktLj(fEz0bE0Wwc&7rhAQc?Oz(i!ocvroq@p!$-QqI
zFKs2t(D=-}_~iV&lGKV4y^54%^zfL)q?B38z`!t@0X;lQb`fR1UQudserZv1YB9Re
zuj@ND9iGm}uwXhPgBsN7AZkgY$!_9|uE-1UW@Q8E;b!1wSj^18U>(fNpvT~9q8*VM
t=9*Hd?^fj(Y3`O$RA!u-mt`3dkX;a*r(c|#lT%t4nB-Gb;*+0m3jl4mjPU>f
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xci
deleted file mode 100644
index 7bf63fc..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xci
+++ /dev/null
@@ -1,1925 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>xci</spirit:library>
- <spirit:name>unknown</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_processing_system7_0_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="processing_system7" spirit:version="5.5"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE0_NFIQ.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE0_NFIQ.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE0_NIRQ.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE0_NIRQ.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE1_NFIQ.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE1_NFIQ.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE1_NIRQ.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE1_NIRQ.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.AXI_ARBITRATION_SCHEME">TDM</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.BURST_LENGTH">8</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.CAN_DEBUG">false</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.CAS_LATENCY">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.CAS_WRITE_LATENCY">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.CS_ENABLED">true</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.CUSTOM_PARTS"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.DATA_MASK_ENABLED">true</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.DATA_WIDTH">8</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.MEMORY_PART"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.MEMORY_TYPE">COMPONENTS</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.MEM_ADDR_MAP">ROW_COLUMN_BANK</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.SLOT">Single</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DDR.TIMEPERIOD_PS">1250</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACK.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA0_REQ.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACK.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA1_REQ.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACK.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA2_REQ.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACK.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.DMA3_REQ.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.ENET0_EXT_INTIN.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.ENET0_EXT_INTIN.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.ENET1_EXT_INTIN.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.ENET1_EXT_INTIN.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_BUSIF"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK1.ASSOCIATED_BUSIF"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK1.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK1.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK1.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK1.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK2.ASSOCIATED_BUSIF"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK2.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK2.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK2.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK2.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK3.ASSOCIATED_BUSIF"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK3.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK3.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK3.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK3.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET0_N.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET0_N.POLARITY">ACTIVE_LOW</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET1_N.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET1_N.POLARITY">ACTIVE_LOW</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET2_N.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET2_N.POLARITY">ACTIVE_LOW</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET3_N.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_RESET3_N.POLARITY">ACTIVE_LOW</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FIXED_IO.CAN_DEBUG">false</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TKEEP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TLAST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TREADY">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TSTRB">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.LAYERED_METADATA">undef</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TDATA_NUM_BYTES">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TDEST_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_F2P.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_F2P.SENSITIVITY">LEVEL_HIGH</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_CAN0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_CAN1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_CTI.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC2.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC3.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC4.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC5.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC6.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC7.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_DMAC_ABORT.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_ENET0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_ENET1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_ENET_WAKE0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_ENET_WAKE1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_GPIO.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_I2C0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_I2C1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_QSPI.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_SDIO0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_SDIO1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_SMC.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_SPI0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_SPI1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_UART0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_UART1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_USB0.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.IRQ_P2F_USB1.PortWidth">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MDIO_ETHERNET_0.CAN_DEBUG">false</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MDIO_ETHERNET_1.CAN_DEBUG">false</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_REGION">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.MAX_BURST_LENGTH">16</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_READ_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_WRITE_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.PROTOCOL">AXI3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.SUPPORTS_NARROW_BURST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.ADDR_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.ARUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.AWUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.BUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.DATA_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_BRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_CACHE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_LOCK">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_PROT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_QOS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_REGION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_RRESP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_WSTRB">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.ID_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.NUM_READ_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.PROTOCOL">AXI4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.RUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3.WUSER_WIDTH">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.CLK_DOMAIN"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_processing_system7_0_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_APU_PERIPHERAL_FREQMHZ">750.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_CAN0_PERIPHERAL_FREQMHZ">23.8095</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_CAN1_PERIPHERAL_FREQMHZ">23.8095</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_CAN_PERIPHERAL_FREQMHZ">97.222221</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_DCI_PERIPHERAL_FREQMHZ">10.204082</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_I2C_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ">194.444443</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ">134.615387</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ">97.222221</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_SMC_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_SPI_PERIPHERAL_FREQMHZ">159.090912</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ">200.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_UART_PERIPHERAL_FREQMHZ">97.222221</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_USB0_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_USB1_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_WDT_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_APU_CLK_RATIO_ENABLE">6:2:1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_APU_PERIPHERAL_FREQMHZ">750</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ARMPLL_CTRL_FBDIV">30</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_BASEADDR">0xE0008000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_CAN0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_GRP_CLK_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_GRP_CLK_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_HIGHADDR">0xE0008FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_PERIPHERAL_CLKSRC">External</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_PERIPHERAL_FREQMHZ">-1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_BASEADDR">0xE0009000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_CAN1_IO">MIO 52 .. 53</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_GRP_CLK_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_GRP_CLK_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_HIGHADDR">0xE0009FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_CLKSRC">External</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_FREQMHZ">-1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR0">18</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK0_FREQ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK1_FREQ">10000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK2_FREQ">10000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK3_FREQ">10000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE0_FIQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE0_IRQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE1_FIQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE1_IRQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_CPU_6X4X_MAX_RANGE">767</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_CPU_PLL_FREQMHZ">1500.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_PERIPHERAL_CLKSRC">ARM PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_PERIPHERAL_DIVISOR0">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CRYSTAL_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_CLKSRC">DDR PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR0">49</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR1">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_FREQMHZ">10.159</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDRPLL_CTRL_FBDIV">20</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_DDR_PLL_FREQMHZ">1000.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_HPRLPR_QUEUE_PARTITION">HPR(0)/LPR(32)</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL">15</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PERIPHERAL_CLKSRC">DDR PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PERIPHERAL_DIVISOR0">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT0_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT1_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT2_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT3_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_0"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_1"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_2"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_3"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_0"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_1"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_2"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_3"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_RAM_BASEADDR">0x00100000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_RAM_HIGHADDR">0x0FFFFFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DM_WIDTH">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DQS_WIDTH">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DQ_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DUAL_PARALLEL_QSPI_DATA_MODE"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DUAL_STACK_QSPI_DATA_MODE"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_BASEADDR">0xE000B000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_ENET0_IO">MIO 16 .. 27</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_HIGHADDR">0xE000BFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR0">14</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_FREQMHZ">1000 Mbps</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_BASEADDR">0xE000C000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_ENET1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_HIGHADDR">0xE000CFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_FREQMHZ">1000 Mbps</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET_RESET_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET_RESET_POLARITY">Active Low</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET_RESET_SELECT">Share reset pin</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_4K_TIMER">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CAN0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CAN1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK0_PORT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK1_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK2_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK3_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG0_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG1_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG2_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG3_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_DDR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CAN0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CAN1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_ENET0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_ENET1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_GPIO">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_I2C0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_I2C1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_PJTAG">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SDIO1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SRAM_INT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_TRACE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_TTC0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_TTC1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_UART0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_UART1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_WDT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_ENET0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_ENET1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_GPIO">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_I2C0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_I2C1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_MODEM_UART0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_MODEM_UART1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_PJTAG">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_PTP_ENET0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_PTP_ENET1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_QSPI">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST0_PORT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST1_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST2_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST3_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SDIO1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SMC">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SPI0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SPI1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_TRACE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_TTC0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_TTC1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_UART0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_UART1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_USB0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_USB1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_WDT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR0">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR1">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK0_BUF">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK1_BUF">FALSE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK2_BUF">FALSE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK3_BUF">FALSE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA0_PERIPHERAL_FREQMHZ">125</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA1_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA2_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA3_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK0_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK2_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK3_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN0">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN1">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN2">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN3">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT0">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT1">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT2">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT3">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP0_EN_MODIFIABLE_TXN">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP0_NUM_READ_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP0_NUM_WRITE_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP1_EN_MODIFIABLE_TXN">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP1_NUM_READ_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP1_NUM_WRITE_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_BASEADDR">0xE000A000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_HIGHADDR">0xE000AFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_IO">MIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_BASEADDR">0xE0004000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_GRP_INT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_GRP_INT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_HIGHADDR">0xE0004FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_I2C0_IO">MIO 50 .. 51</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_BASEADDR">0xE0005000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_GRP_INT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_GRP_INT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_HIGHADDR">0xE0005FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_I2C1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_RESET_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_RESET_POLARITY">Active Low</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_RESET_SELECT">Share reset pin</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IMPORT_BOARD_PRESET">None</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_INCLUDE_ACP_TRANS_CHECK">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_INCLUDE_TRACE_BUFFER">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IOPLL_CTRL_FBDIV">35</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IO_IO_PLL_FREQMHZ">1750.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IRQ_F2P_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IRQ_F2P_MODE">DIRECT</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_PRIMITIVE">54</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_TREE_PERIPHERALS">GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#GPIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SPI 0#SPI 0#SPI 0#GPIO#GPIO#SPI 0#UART 0#UART 0#UART 1#UART 1#I2C 0#I2C 0#CAN 1#CAN 1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_TREE_SIGNALS">gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#gpio[8]#cd#data[0]#cmd#clk#data[1]#data[2]#data[3]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#sclk#miso#ss[0]#gpio[43]#gpio[44]#mosi#rx#tx#tx#rx#scl#sda#tx#rx</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_ENABLE_STATIC_REMAP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_FREQMHZ">125</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_SUPPORT_NARROW_BURST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_THREAD_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_ENABLE_STATIC_REMAP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_SUPPORT_NARROW_BURST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_THREAD_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_AR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_CLR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_REA">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_RR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_GRP_D8_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_GRP_D8_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_NAND_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_A25_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_NOR_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NUM_F2P_INTR_INPUTS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_OVERRIDE_BASIC_CLOCK">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_CAN0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_CAN1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_CTI_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC2_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC3_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC4_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC5_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC6_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC7_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC_ABORT_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_ENET0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_ENET1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_GPIO_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_I2C0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_I2C1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_QSPI_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SDIO0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SDIO1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SMC_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SPI0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SPI1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_UART0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_UART1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_USB0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_USB1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY0">0.075</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY1">0.070</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY2">0.077</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY3">0.094</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0">-0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1">-0.001</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2">0.004</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3">-0.035</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_NAME">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_DIVISOR0">9</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_FREQMHZ">200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PERIPHERAL_BOARD_PRESET">None</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PJTAG_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PJTAG_PJTAG_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PLL_BYPASSMODE_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PRESET_BANK0_VOLTAGE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PRESET_BANK1_VOLTAGE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PS7_SI_REV">PRODUCTION</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_IO1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_IO1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_IO">MIO 1 .. 6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_INTERNAL_HIGHADDRESS">0xFCFFFFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_DIVISOR0">13</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_FREQMHZ">133</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_QSPI_IO">MIO 1 .. 6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_CD_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_CD_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_POW_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_POW_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_WP_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_WP_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_SD0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_IO">MIO 9</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_POW_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_POW_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_WP_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_WP_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_SD1_IO">MIO 10 .. 15</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO0_BASEADDR">0xE0100000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO0_HIGHADDR">0xE0100FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO1_BASEADDR">0xE0101000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO1_HIGHADDR">0xE0101FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_DIVISOR0">18</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SINGLE_QSPI_DATA_MODE">x4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T0">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T1">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T2">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T3">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T4">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T5">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T6">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_VALID">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_BASEADDR">0xE0006000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_IO">MIO 42</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS2_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS2_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_HIGHADDR">0xE0006FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_SPI0_IO">MIO 40 .. 45</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_BASEADDR">0xE0007000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_HIGHADDR">0xE0007FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_SPI1_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_DIVISOR0">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_FREQMHZ">166.666666</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_ARUSER_VAL">31</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_AWUSER_VAL">31</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_ID_WIDTH">3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP0_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP0_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP1_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP1_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_CLKSRC">External</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_FREQMHZ">200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_BUFFER_CLOCK_DELAY">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_BUFFER_FIFO_SIZE">128</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_16BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_16BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_2BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_2BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_32BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_32BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_4BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_4BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_8BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_8BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_INTERNAL_WIDTH">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_PIPELINE_WIDTH">8</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_TRACE_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_BASEADDR">0xE0104000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_HIGHADDR">0xE0104fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_TTC0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_BASEADDR">0xE0105000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_HIGHADDR">0xE0105fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_TTC1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_BASEADDR">0xE0000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_BAUD_RATE">115200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_GRP_FULL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_GRP_FULL_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_HIGHADDR">0xE0000FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_UART0_IO">MIO 46 .. 47</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_BASEADDR">0xE0001000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_BAUD_RATE">115200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_GRP_FULL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_GRP_FULL_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_HIGHADDR">0xE0001FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_UART1_IO">MIO 48 .. 49</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_DIVISOR0">18</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_ACT_DDR_FREQ_MHZ">500.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ADV_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_AL">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BANK_ADDR_COUNT">3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BL">8</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY0">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY1">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY2">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY3">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BUS_WIDTH">16 Bit</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CL">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_STOP_EN">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_COL_ADDR_COUNT">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CWL">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DEVICE_CAPACITY">2048 MBits</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH">76.687</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH">77.8025</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH">72.8405</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH">111.904</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH">73.119</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH">63.8935</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH">77.045</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH">111.903</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DRAM_WIDTH">16 Bits</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ECC">Disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_FREQ_MHZ">500</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_HIGH_TEMP">Normal (0-85)</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_MEMORY_TYPE">DDR 3 (Low Voltage)</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_PARTNO">MT41K128M16 JT-125</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ROW_ADDR_COUNT">14</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_SPEED_BIN">DDR3_1066F</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_DATA_EYE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_READ_GATE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_FAW">40.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RAS_MIN">35.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RC">48.75</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RCD">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RP">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_USE_INTERNAL_VREF">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_GENERATE_SUMMARY">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_BASEADDR">0xE0102000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_HIGHADDR">0xE0102fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_USB0_IO">MIO 28 .. 39</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_BASEADDR">0xE0103000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_HIGHADDR">0xE0103fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_USB1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB_RESET_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB_RESET_POLARITY">Active Low</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB_RESET_SELECT">Share reset pin</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_AXI_FABRIC_IDLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_AXI_NONSECURE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_CORESIGHT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_CROSS_TRIGGER">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_CR_FABRIC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DDR_BYPASS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DEBUG">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DEFAULT_ACP_USER_VAL">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA2">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA3">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_EXPANDED_IOP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_HIGH_OCM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_M_AXI_GP0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_M_AXI_GP1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_PROC_EVENT_BUS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_ACP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_GP0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_GP1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP2">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP3">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_TRACE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_TRACE_DATA_EDGE_DETECTOR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_VALUE_SILVERSION">3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_WDT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.preset">None</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- <spirit:vendorExtensions>
- <xilinx:componentInstanceExtensions>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.AXI_ARBITRATION_SCHEME" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.BURST_LENGTH" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CAN_DEBUG" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CAS_LATENCY" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CAS_WRITE_LATENCY" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CS_ENABLED" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CUSTOM_PARTS" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.DATA_MASK_ENABLED" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.DATA_WIDTH" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.MEMORY_PART" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.MEMORY_TYPE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.MEM_ADDR_MAP" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.SLOT" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.TIMEPERIOD_PS" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_BUSIF" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.CLK_DOMAIN" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.FREQ_HZ" xilinx:valueSource="user" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_RESET0_N.POLARITY" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FIXED_IO.CAN_DEBUG" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ADDR_WIDTH" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ARUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.AWUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.BUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.DATA_WIDTH" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BRESP" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BURST" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_CACHE" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_LOCK" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_PROT" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_QOS" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_REGION" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_RRESP" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_WSTRB" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ID_WIDTH" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.MAX_BURST_LENGTH" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_READ_THREADS" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_WRITE_THREADS" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.PROTOCOL" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.READ_WRITE_MODE" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.SUPPORTS_NARROW_BURST" xilinx:valueSource="user" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_APU_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_CAN_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_DCI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_SMC_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_SPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_UART_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_WDT_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_APU_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ARMPLL_CTRL_FBDIV" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN1_CAN1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN1_GRP_CLK_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK0_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK1_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK2_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK3_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CPU_CPU_PLL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CPU_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CRYSTAL_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDRPLL_CTRL_FBDIV" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDR_DDR_PLL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDR_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDR_RAM_HIGHADDR" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_ENET0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_CLKSRC" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET1_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET_RESET_SELECT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_CAN1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_CAN1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_ENET0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_I2C0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_UART0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_ENET0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_GPIO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_I2C0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_QSPI" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_SPI0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_SPI1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_UART0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_UART1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_USB0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK2_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK3_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_GRP_INT_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_I2C0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C1_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C_RESET_SELECT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_IOPLL_CTRL_FBDIV" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_IO_IO_PLL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_TREE_PERIPHERALS" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_TREE_SIGNALS" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_FREQMHZ" xilinx:valueSource="propagated" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NAND_GRP_D8_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NUM_F2P_INTR_INPUTS" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_PRESET_BANK1_VOLTAGE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_IO1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_QSPI_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_POW_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_WP_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_SD1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SINGLE_QSPI_DATA_MODE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS2_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_SPI0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_SPI1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_GP0_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_GP1_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART0_GRP_FULL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART0_UART0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART1_GRP_FULL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART1_UART1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_ACT_DDR_FREQ_MHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BANK_ADDR_COUNT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BL" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BUS_WIDTH" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CL" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_COL_ADDR_COUNT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CWL" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DEVICE_CAPACITY" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DRAM_WIDTH" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ECC" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_FREQ_MHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_MEMORY_TYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_PARTNO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ROW_ADDR_COUNT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_SPEED_BIN" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_FAW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RAS_MIN" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RC" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RCD" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_USB0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB1_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB_RESET_SELECT" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:componentInstanceExtensions>
- </spirit:vendorExtensions>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xdc b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xdc
deleted file mode 100644
index deea2ae..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xdc
+++ /dev/null
@@ -1,723 +0,0 @@
-############################################################################
-##
-## Xilinx, Inc. 2006 www.xilinx.com
-############################################################################
-## File name : ps7_constraints.xdc
-##
-## Details : Constraints file
-## FPGA family: zynq
-## FPGA: xc7z015clg485-2
-## Device Size: xc7z015
-## Package: clg485
-## Speedgrade: -2
-##
-##
-############################################################################
-############################################################################
-############################################################################
-# Clock constraints #
-############################################################################
-create_clock -name clk_fpga_0 -period "8" [get_pins "PS7_i/FCLKCLK[0]"]
-set_input_jitter clk_fpga_0 0.24
-#The clocks are asynchronous, user should constrain them appropriately.#
-
-
-############################################################################
-# I/O STANDARDS and Location Constraints #
-############################################################################
-
-# CAN 1 / rx / MIO[53]
-set_property iostandard "LVCMOS25" [get_ports "MIO[53]"]
-set_property PACKAGE_PIN "C11" [get_ports "MIO[53]"]
-set_property slew "slow" [get_ports "MIO[53]"]
-set_property drive "8" [get_ports "MIO[53]"]
-set_property pullup "TRUE" [get_ports "MIO[53]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[53]"]
-# CAN 1 / tx / MIO[52]
-set_property iostandard "LVCMOS25" [get_ports "MIO[52]"]
-set_property PACKAGE_PIN "D13" [get_ports "MIO[52]"]
-set_property slew "slow" [get_ports "MIO[52]"]
-set_property drive "8" [get_ports "MIO[52]"]
-set_property pullup "TRUE" [get_ports "MIO[52]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[52]"]
-# I2C 0 / sda / MIO[51]
-set_property iostandard "LVCMOS25" [get_ports "MIO[51]"]
-set_property PACKAGE_PIN "C13" [get_ports "MIO[51]"]
-set_property slew "slow" [get_ports "MIO[51]"]
-set_property drive "8" [get_ports "MIO[51]"]
-set_property pullup "TRUE" [get_ports "MIO[51]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[51]"]
-# I2C 0 / scl / MIO[50]
-set_property iostandard "LVCMOS25" [get_ports "MIO[50]"]
-set_property PACKAGE_PIN "D10" [get_ports "MIO[50]"]
-set_property slew "slow" [get_ports "MIO[50]"]
-set_property drive "8" [get_ports "MIO[50]"]
-set_property pullup "TRUE" [get_ports "MIO[50]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[50]"]
-# UART 1 / rx / MIO[49]
-set_property iostandard "LVCMOS25" [get_ports "MIO[49]"]
-set_property PACKAGE_PIN "C9" [get_ports "MIO[49]"]
-set_property slew "slow" [get_ports "MIO[49]"]
-set_property drive "8" [get_ports "MIO[49]"]
-set_property pullup "TRUE" [get_ports "MIO[49]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[49]"]
-# UART 1 / tx / MIO[48]
-set_property iostandard "LVCMOS25" [get_ports "MIO[48]"]
-set_property PACKAGE_PIN "D12" [get_ports "MIO[48]"]
-set_property slew "slow" [get_ports "MIO[48]"]
-set_property drive "8" [get_ports "MIO[48]"]
-set_property pullup "TRUE" [get_ports "MIO[48]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[48]"]
-# UART 0 / tx / MIO[47]
-set_property iostandard "LVCMOS25" [get_ports "MIO[47]"]
-set_property PACKAGE_PIN "B13" [get_ports "MIO[47]"]
-set_property slew "slow" [get_ports "MIO[47]"]
-set_property drive "8" [get_ports "MIO[47]"]
-set_property pullup "TRUE" [get_ports "MIO[47]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[47]"]
-# UART 0 / rx / MIO[46]
-set_property iostandard "LVCMOS25" [get_ports "MIO[46]"]
-set_property PACKAGE_PIN "D11" [get_ports "MIO[46]"]
-set_property slew "slow" [get_ports "MIO[46]"]
-set_property drive "8" [get_ports "MIO[46]"]
-set_property pullup "TRUE" [get_ports "MIO[46]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[46]"]
-# SPI 0 / mosi / MIO[45]
-set_property iostandard "LVCMOS25" [get_ports "MIO[45]"]
-set_property PACKAGE_PIN "B14" [get_ports "MIO[45]"]
-set_property slew "slow" [get_ports "MIO[45]"]
-set_property drive "8" [get_ports "MIO[45]"]
-set_property pullup "TRUE" [get_ports "MIO[45]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[45]"]
-# GPIO / gpio[44] / MIO[44]
-set_property iostandard "LVCMOS25" [get_ports "MIO[44]"]
-set_property PACKAGE_PIN "E10" [get_ports "MIO[44]"]
-set_property slew "slow" [get_ports "MIO[44]"]
-set_property drive "8" [get_ports "MIO[44]"]
-set_property pullup "TRUE" [get_ports "MIO[44]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[44]"]
-# GPIO / gpio[43] / MIO[43]
-set_property iostandard "LVCMOS25" [get_ports "MIO[43]"]
-set_property PACKAGE_PIN "B12" [get_ports "MIO[43]"]
-set_property slew "slow" [get_ports "MIO[43]"]
-set_property drive "8" [get_ports "MIO[43]"]
-set_property pullup "TRUE" [get_ports "MIO[43]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[43]"]
-# SPI 0 / ss[0] / MIO[42]
-set_property iostandard "LVCMOS25" [get_ports "MIO[42]"]
-set_property PACKAGE_PIN "D15" [get_ports "MIO[42]"]
-set_property slew "slow" [get_ports "MIO[42]"]
-set_property drive "8" [get_ports "MIO[42]"]
-set_property pullup "TRUE" [get_ports "MIO[42]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[42]"]
-# SPI 0 / miso / MIO[41]
-set_property iostandard "LVCMOS25" [get_ports "MIO[41]"]
-set_property PACKAGE_PIN "C15" [get_ports "MIO[41]"]
-set_property slew "slow" [get_ports "MIO[41]"]
-set_property drive "8" [get_ports "MIO[41]"]
-set_property pullup "TRUE" [get_ports "MIO[41]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[41]"]
-# SPI 0 / sclk / MIO[40]
-set_property iostandard "LVCMOS25" [get_ports "MIO[40]"]
-set_property PACKAGE_PIN "E9" [get_ports "MIO[40]"]
-set_property slew "slow" [get_ports "MIO[40]"]
-set_property drive "8" [get_ports "MIO[40]"]
-set_property pullup "TRUE" [get_ports "MIO[40]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[40]"]
-# USB 0 / data[7] / MIO[39]
-set_property iostandard "LVCMOS25" [get_ports "MIO[39]"]
-set_property PACKAGE_PIN "C10" [get_ports "MIO[39]"]
-set_property slew "slow" [get_ports "MIO[39]"]
-set_property drive "8" [get_ports "MIO[39]"]
-set_property pullup "TRUE" [get_ports "MIO[39]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[39]"]
-# USB 0 / data[6] / MIO[38]
-set_property iostandard "LVCMOS25" [get_ports "MIO[38]"]
-set_property PACKAGE_PIN "F10" [get_ports "MIO[38]"]
-set_property slew "slow" [get_ports "MIO[38]"]
-set_property drive "8" [get_ports "MIO[38]"]
-set_property pullup "TRUE" [get_ports "MIO[38]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[38]"]
-# USB 0 / data[5] / MIO[37]
-set_property iostandard "LVCMOS25" [get_ports "MIO[37]"]
-set_property PACKAGE_PIN "B9" [get_ports "MIO[37]"]
-set_property slew "slow" [get_ports "MIO[37]"]
-set_property drive "8" [get_ports "MIO[37]"]
-set_property pullup "TRUE" [get_ports "MIO[37]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[37]"]
-# USB 0 / clk / MIO[36]
-set_property iostandard "LVCMOS25" [get_ports "MIO[36]"]
-set_property PACKAGE_PIN "A14" [get_ports "MIO[36]"]
-set_property slew "slow" [get_ports "MIO[36]"]
-set_property drive "8" [get_ports "MIO[36]"]
-set_property pullup "TRUE" [get_ports "MIO[36]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[36]"]
-# USB 0 / data[3] / MIO[35]
-set_property iostandard "LVCMOS25" [get_ports "MIO[35]"]
-set_property PACKAGE_PIN "F9" [get_ports "MIO[35]"]
-set_property slew "slow" [get_ports "MIO[35]"]
-set_property drive "8" [get_ports "MIO[35]"]
-set_property pullup "TRUE" [get_ports "MIO[35]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[35]"]
-# USB 0 / data[2] / MIO[34]
-set_property iostandard "LVCMOS25" [get_ports "MIO[34]"]
-set_property PACKAGE_PIN "B11" [get_ports "MIO[34]"]
-set_property slew "slow" [get_ports "MIO[34]"]
-set_property drive "8" [get_ports "MIO[34]"]
-set_property pullup "TRUE" [get_ports "MIO[34]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[34]"]
-# USB 0 / data[1] / MIO[33]
-set_property iostandard "LVCMOS25" [get_ports "MIO[33]"]
-set_property PACKAGE_PIN "G11" [get_ports "MIO[33]"]
-set_property slew "slow" [get_ports "MIO[33]"]
-set_property drive "8" [get_ports "MIO[33]"]
-set_property pullup "TRUE" [get_ports "MIO[33]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[33]"]
-# USB 0 / data[0] / MIO[32]
-set_property iostandard "LVCMOS25" [get_ports "MIO[32]"]
-set_property PACKAGE_PIN "C16" [get_ports "MIO[32]"]
-set_property slew "slow" [get_ports "MIO[32]"]
-set_property drive "8" [get_ports "MIO[32]"]
-set_property pullup "TRUE" [get_ports "MIO[32]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[32]"]
-# USB 0 / nxt / MIO[31]
-set_property iostandard "LVCMOS25" [get_ports "MIO[31]"]
-set_property PACKAGE_PIN "F14" [get_ports "MIO[31]"]
-set_property slew "slow" [get_ports "MIO[31]"]
-set_property drive "8" [get_ports "MIO[31]"]
-set_property pullup "TRUE" [get_ports "MIO[31]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[31]"]
-# USB 0 / stp / MIO[30]
-set_property iostandard "LVCMOS25" [get_ports "MIO[30]"]
-set_property PACKAGE_PIN "A12" [get_ports "MIO[30]"]
-set_property slew "slow" [get_ports "MIO[30]"]
-set_property drive "8" [get_ports "MIO[30]"]
-set_property pullup "TRUE" [get_ports "MIO[30]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[30]"]
-# USB 0 / dir / MIO[29]
-set_property iostandard "LVCMOS25" [get_ports "MIO[29]"]
-set_property PACKAGE_PIN "E15" [get_ports "MIO[29]"]
-set_property slew "slow" [get_ports "MIO[29]"]
-set_property drive "8" [get_ports "MIO[29]"]
-set_property pullup "TRUE" [get_ports "MIO[29]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[29]"]
-# USB 0 / data[4] / MIO[28]
-set_property iostandard "LVCMOS25" [get_ports "MIO[28]"]
-set_property PACKAGE_PIN "A11" [get_ports "MIO[28]"]
-set_property slew "slow" [get_ports "MIO[28]"]
-set_property drive "8" [get_ports "MIO[28]"]
-set_property pullup "TRUE" [get_ports "MIO[28]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[28]"]
-# Enet 0 / rx_ctl / MIO[27]
-set_property iostandard "LVCMOS25" [get_ports "MIO[27]"]
-set_property PACKAGE_PIN "D16" [get_ports "MIO[27]"]
-set_property slew "slow" [get_ports "MIO[27]"]
-set_property drive "8" [get_ports "MIO[27]"]
-set_property pullup "TRUE" [get_ports "MIO[27]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[27]"]
-# Enet 0 / rxd[3] / MIO[26]
-set_property iostandard "LVCMOS25" [get_ports "MIO[26]"]
-set_property PACKAGE_PIN "A10" [get_ports "MIO[26]"]
-set_property slew "slow" [get_ports "MIO[26]"]
-set_property drive "8" [get_ports "MIO[26]"]
-set_property pullup "TRUE" [get_ports "MIO[26]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[26]"]
-# Enet 0 / rxd[2] / MIO[25]
-set_property iostandard "LVCMOS25" [get_ports "MIO[25]"]
-set_property PACKAGE_PIN "F11" [get_ports "MIO[25]"]
-set_property slew "slow" [get_ports "MIO[25]"]
-set_property drive "8" [get_ports "MIO[25]"]
-set_property pullup "TRUE" [get_ports "MIO[25]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[25]"]
-# Enet 0 / rxd[1] / MIO[24]
-set_property iostandard "LVCMOS25" [get_ports "MIO[24]"]
-set_property PACKAGE_PIN "B16" [get_ports "MIO[24]"]
-set_property slew "slow" [get_ports "MIO[24]"]
-set_property drive "8" [get_ports "MIO[24]"]
-set_property pullup "TRUE" [get_ports "MIO[24]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[24]"]
-# Enet 0 / rxd[0] / MIO[23]
-set_property iostandard "LVCMOS25" [get_ports "MIO[23]"]
-set_property PACKAGE_PIN "E12" [get_ports "MIO[23]"]
-set_property slew "slow" [get_ports "MIO[23]"]
-set_property drive "8" [get_ports "MIO[23]"]
-set_property pullup "TRUE" [get_ports "MIO[23]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[23]"]
-# Enet 0 / rx_clk / MIO[22]
-set_property iostandard "LVCMOS25" [get_ports "MIO[22]"]
-set_property PACKAGE_PIN "A9" [get_ports "MIO[22]"]
-set_property slew "slow" [get_ports "MIO[22]"]
-set_property drive "8" [get_ports "MIO[22]"]
-set_property pullup "TRUE" [get_ports "MIO[22]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[22]"]
-# Enet 0 / tx_ctl / MIO[21]
-set_property iostandard "LVCMOS25" [get_ports "MIO[21]"]
-set_property PACKAGE_PIN "F12" [get_ports "MIO[21]"]
-set_property slew "slow" [get_ports "MIO[21]"]
-set_property drive "8" [get_ports "MIO[21]"]
-set_property pullup "TRUE" [get_ports "MIO[21]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[21]"]
-# Enet 0 / txd[3] / MIO[20]
-set_property iostandard "LVCMOS25" [get_ports "MIO[20]"]
-set_property PACKAGE_PIN "A15" [get_ports "MIO[20]"]
-set_property slew "slow" [get_ports "MIO[20]"]
-set_property drive "8" [get_ports "MIO[20]"]
-set_property pullup "TRUE" [get_ports "MIO[20]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[20]"]
-# Enet 0 / txd[2] / MIO[19]
-set_property iostandard "LVCMOS25" [get_ports "MIO[19]"]
-set_property PACKAGE_PIN "E13" [get_ports "MIO[19]"]
-set_property slew "slow" [get_ports "MIO[19]"]
-set_property drive "8" [get_ports "MIO[19]"]
-set_property pullup "TRUE" [get_ports "MIO[19]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[19]"]
-# Enet 0 / txd[1] / MIO[18]
-set_property iostandard "LVCMOS25" [get_ports "MIO[18]"]
-set_property PACKAGE_PIN "A16" [get_ports "MIO[18]"]
-set_property slew "slow" [get_ports "MIO[18]"]
-set_property drive "8" [get_ports "MIO[18]"]
-set_property pullup "TRUE" [get_ports "MIO[18]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[18]"]
-# Enet 0 / txd[0] / MIO[17]
-set_property iostandard "LVCMOS25" [get_ports "MIO[17]"]
-set_property PACKAGE_PIN "E14" [get_ports "MIO[17]"]
-set_property slew "slow" [get_ports "MIO[17]"]
-set_property drive "8" [get_ports "MIO[17]"]
-set_property pullup "TRUE" [get_ports "MIO[17]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[17]"]
-# Enet 0 / tx_clk / MIO[16]
-set_property iostandard "LVCMOS25" [get_ports "MIO[16]"]
-set_property PACKAGE_PIN "D17" [get_ports "MIO[16]"]
-set_property slew "slow" [get_ports "MIO[16]"]
-set_property drive "8" [get_ports "MIO[16]"]
-set_property pullup "TRUE" [get_ports "MIO[16]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[16]"]
-# SD 1 / data[3] / MIO[15]
-set_property iostandard "LVCMOS33" [get_ports "MIO[15]"]
-set_property PACKAGE_PIN "E17" [get_ports "MIO[15]"]
-set_property slew "slow" [get_ports "MIO[15]"]
-set_property drive "8" [get_ports "MIO[15]"]
-set_property pullup "TRUE" [get_ports "MIO[15]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[15]"]
-# SD 1 / data[2] / MIO[14]
-set_property iostandard "LVCMOS33" [get_ports "MIO[14]"]
-set_property PACKAGE_PIN "B17" [get_ports "MIO[14]"]
-set_property slew "slow" [get_ports "MIO[14]"]
-set_property drive "8" [get_ports "MIO[14]"]
-set_property pullup "TRUE" [get_ports "MIO[14]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[14]"]
-# SD 1 / data[1] / MIO[13]
-set_property iostandard "LVCMOS33" [get_ports "MIO[13]"]
-set_property PACKAGE_PIN "A17" [get_ports "MIO[13]"]
-set_property slew "slow" [get_ports "MIO[13]"]
-set_property drive "8" [get_ports "MIO[13]"]
-set_property pullup "TRUE" [get_ports "MIO[13]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[13]"]
-# SD 1 / clk / MIO[12]
-set_property iostandard "LVCMOS33" [get_ports "MIO[12]"]
-set_property PACKAGE_PIN "C18" [get_ports "MIO[12]"]
-set_property slew "slow" [get_ports "MIO[12]"]
-set_property drive "8" [get_ports "MIO[12]"]
-set_property pullup "TRUE" [get_ports "MIO[12]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[12]"]
-# SD 1 / cmd / MIO[11]
-set_property iostandard "LVCMOS33" [get_ports "MIO[11]"]
-set_property PACKAGE_PIN "B19" [get_ports "MIO[11]"]
-set_property slew "slow" [get_ports "MIO[11]"]
-set_property drive "8" [get_ports "MIO[11]"]
-set_property pullup "TRUE" [get_ports "MIO[11]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[11]"]
-# SD 1 / data[0] / MIO[10]
-set_property iostandard "LVCMOS33" [get_ports "MIO[10]"]
-set_property PACKAGE_PIN "G16" [get_ports "MIO[10]"]
-set_property slew "slow" [get_ports "MIO[10]"]
-set_property drive "8" [get_ports "MIO[10]"]
-set_property pullup "TRUE" [get_ports "MIO[10]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[10]"]
-# SD 1 / cd / MIO[9]
-set_property iostandard "LVCMOS33" [get_ports "MIO[9]"]
-set_property PACKAGE_PIN "C19" [get_ports "MIO[9]"]
-set_property slew "slow" [get_ports "MIO[9]"]
-set_property drive "8" [get_ports "MIO[9]"]
-set_property pullup "TRUE" [get_ports "MIO[9]"]
-set_property PIO_DIRECTION "INPUT" [get_ports "MIO[9]"]
-# GPIO / gpio[8] / MIO[8]
-set_property iostandard "LVCMOS33" [get_ports "MIO[8]"]
-set_property PACKAGE_PIN "E18" [get_ports "MIO[8]"]
-set_property slew "slow" [get_ports "MIO[8]"]
-set_property drive "8" [get_ports "MIO[8]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[8]"]
-# GPIO / gpio[7] / MIO[7]
-set_property iostandard "LVCMOS33" [get_ports "MIO[7]"]
-set_property PACKAGE_PIN "D18" [get_ports "MIO[7]"]
-set_property slew "slow" [get_ports "MIO[7]"]
-set_property drive "8" [get_ports "MIO[7]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[7]"]
-# Quad SPI Flash / qspi0_sclk / MIO[6]
-set_property iostandard "LVCMOS33" [get_ports "MIO[6]"]
-set_property PACKAGE_PIN "A19" [get_ports "MIO[6]"]
-set_property slew "slow" [get_ports "MIO[6]"]
-set_property drive "8" [get_ports "MIO[6]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[6]"]
-# Quad SPI Flash / qspi0_io[3]/HOLD_B / MIO[5]
-set_property iostandard "LVCMOS33" [get_ports "MIO[5]"]
-set_property PACKAGE_PIN "A20" [get_ports "MIO[5]"]
-set_property slew "slow" [get_ports "MIO[5]"]
-set_property drive "8" [get_ports "MIO[5]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[5]"]
-# Quad SPI Flash / qspi0_io[2] / MIO[4]
-set_property iostandard "LVCMOS33" [get_ports "MIO[4]"]
-set_property PACKAGE_PIN "E19" [get_ports "MIO[4]"]
-set_property slew "slow" [get_ports "MIO[4]"]
-set_property drive "8" [get_ports "MIO[4]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[4]"]
-# Quad SPI Flash / qspi0_io[1] / MIO[3]
-set_property iostandard "LVCMOS33" [get_ports "MIO[3]"]
-set_property PACKAGE_PIN "F17" [get_ports "MIO[3]"]
-set_property slew "slow" [get_ports "MIO[3]"]
-set_property drive "8" [get_ports "MIO[3]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[3]"]
-# Quad SPI Flash / qspi0_io[0] / MIO[2]
-set_property iostandard "LVCMOS33" [get_ports "MIO[2]"]
-set_property PACKAGE_PIN "A21" [get_ports "MIO[2]"]
-set_property slew "slow" [get_ports "MIO[2]"]
-set_property drive "8" [get_ports "MIO[2]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[2]"]
-# Quad SPI Flash / qspi0_ss_b / MIO[1]
-set_property iostandard "LVCMOS33" [get_ports "MIO[1]"]
-set_property PACKAGE_PIN "A22" [get_ports "MIO[1]"]
-set_property slew "slow" [get_ports "MIO[1]"]
-set_property drive "8" [get_ports "MIO[1]"]
-set_property pullup "TRUE" [get_ports "MIO[1]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "MIO[1]"]
-# GPIO / gpio[0] / MIO[0]
-set_property iostandard "LVCMOS33" [get_ports "MIO[0]"]
-set_property PACKAGE_PIN "G17" [get_ports "MIO[0]"]
-set_property slew "slow" [get_ports "MIO[0]"]
-set_property drive "8" [get_ports "MIO[0]"]
-set_property pullup "TRUE" [get_ports "MIO[0]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "MIO[0]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_VRP"]
-set_property PACKAGE_PIN "N16" [get_ports "DDR_VRP"]
-set_property slew "FAST" [get_ports "DDR_VRP"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_VRP"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_VRN"]
-set_property PACKAGE_PIN "M16" [get_ports "DDR_VRN"]
-set_property slew "FAST" [get_ports "DDR_VRN"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_VRN"]
-set_property iostandard "SSTL135" [get_ports "DDR_WEB"]
-set_property PACKAGE_PIN "R19" [get_ports "DDR_WEB"]
-set_property slew "SLOW" [get_ports "DDR_WEB"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_WEB"]
-set_property iostandard "SSTL135" [get_ports "DDR_RAS_n"]
-set_property PACKAGE_PIN "R18" [get_ports "DDR_RAS_n"]
-set_property slew "SLOW" [get_ports "DDR_RAS_n"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_RAS_n"]
-set_property iostandard "SSTL135" [get_ports "DDR_ODT"]
-set_property PACKAGE_PIN "P18" [get_ports "DDR_ODT"]
-set_property slew "SLOW" [get_ports "DDR_ODT"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_ODT"]
-set_property iostandard "SSTL135" [get_ports "DDR_DRSTB"]
-set_property PACKAGE_PIN "F20" [get_ports "DDR_DRSTB"]
-set_property slew "FAST" [get_ports "DDR_DRSTB"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DRSTB"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS[3]"]
-set_property PACKAGE_PIN "V21" [get_ports "DDR_DQS[3]"]
-set_property slew "FAST" [get_ports "DDR_DQS[3]"]
-set_property pullup "TRUE" [get_ports "DDR_DQS[3]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS[3]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS[2]"]
-set_property PACKAGE_PIN "N21" [get_ports "DDR_DQS[2]"]
-set_property slew "FAST" [get_ports "DDR_DQS[2]"]
-set_property pullup "TRUE" [get_ports "DDR_DQS[2]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS[2]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS[1]"]
-set_property PACKAGE_PIN "H21" [get_ports "DDR_DQS[1]"]
-set_property slew "FAST" [get_ports "DDR_DQS[1]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS[1]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS[0]"]
-set_property PACKAGE_PIN "C21" [get_ports "DDR_DQS[0]"]
-set_property slew "FAST" [get_ports "DDR_DQS[0]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS[0]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS_n[3]"]
-set_property PACKAGE_PIN "W21" [get_ports "DDR_DQS_n[3]"]
-set_property slew "FAST" [get_ports "DDR_DQS_n[3]"]
-set_property pullup "TRUE" [get_ports "DDR_DQS_n[3]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS_n[3]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS_n[2]"]
-set_property PACKAGE_PIN "P21" [get_ports "DDR_DQS_n[2]"]
-set_property slew "FAST" [get_ports "DDR_DQS_n[2]"]
-set_property pullup "TRUE" [get_ports "DDR_DQS_n[2]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS_n[2]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS_n[1]"]
-set_property PACKAGE_PIN "J21" [get_ports "DDR_DQS_n[1]"]
-set_property slew "FAST" [get_ports "DDR_DQS_n[1]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS_n[1]"]
-set_property iostandard "DIFF_SSTL135_T_DCI" [get_ports "DDR_DQS_n[0]"]
-set_property PACKAGE_PIN "D21" [get_ports "DDR_DQS_n[0]"]
-set_property slew "FAST" [get_ports "DDR_DQS_n[0]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQS_n[0]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[9]"]
-set_property PACKAGE_PIN "G22" [get_ports "DDR_DQ[9]"]
-set_property slew "FAST" [get_ports "DDR_DQ[9]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[9]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[8]"]
-set_property PACKAGE_PIN "G21" [get_ports "DDR_DQ[8]"]
-set_property slew "FAST" [get_ports "DDR_DQ[8]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[8]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[7]"]
-set_property PACKAGE_PIN "F22" [get_ports "DDR_DQ[7]"]
-set_property slew "FAST" [get_ports "DDR_DQ[7]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[7]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[6]"]
-set_property PACKAGE_PIN "F21" [get_ports "DDR_DQ[6]"]
-set_property slew "FAST" [get_ports "DDR_DQ[6]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[6]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[5]"]
-set_property PACKAGE_PIN "E22" [get_ports "DDR_DQ[5]"]
-set_property slew "FAST" [get_ports "DDR_DQ[5]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[5]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[4]"]
-set_property PACKAGE_PIN "E20" [get_ports "DDR_DQ[4]"]
-set_property slew "FAST" [get_ports "DDR_DQ[4]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[4]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[3]"]
-set_property PACKAGE_PIN "D20" [get_ports "DDR_DQ[3]"]
-set_property slew "FAST" [get_ports "DDR_DQ[3]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[3]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[31]"]
-set_property PACKAGE_PIN "Y22" [get_ports "DDR_DQ[31]"]
-set_property slew "FAST" [get_ports "DDR_DQ[31]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[31]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[31]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[30]"]
-set_property PACKAGE_PIN "V20" [get_ports "DDR_DQ[30]"]
-set_property slew "FAST" [get_ports "DDR_DQ[30]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[30]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[30]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[2]"]
-set_property PACKAGE_PIN "B21" [get_ports "DDR_DQ[2]"]
-set_property slew "FAST" [get_ports "DDR_DQ[2]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[2]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[29]"]
-set_property PACKAGE_PIN "W20" [get_ports "DDR_DQ[29]"]
-set_property slew "FAST" [get_ports "DDR_DQ[29]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[29]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[29]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[28]"]
-set_property PACKAGE_PIN "W22" [get_ports "DDR_DQ[28]"]
-set_property slew "FAST" [get_ports "DDR_DQ[28]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[28]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[28]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[27]"]
-set_property PACKAGE_PIN "U21" [get_ports "DDR_DQ[27]"]
-set_property slew "FAST" [get_ports "DDR_DQ[27]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[27]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[27]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[26]"]
-set_property PACKAGE_PIN "AA22" [get_ports "DDR_DQ[26]"]
-set_property slew "FAST" [get_ports "DDR_DQ[26]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[26]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[26]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[25]"]
-set_property PACKAGE_PIN "U22" [get_ports "DDR_DQ[25]"]
-set_property slew "FAST" [get_ports "DDR_DQ[25]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[25]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[25]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[24]"]
-set_property PACKAGE_PIN "Y20" [get_ports "DDR_DQ[24]"]
-set_property slew "FAST" [get_ports "DDR_DQ[24]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[24]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[24]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[23]"]
-set_property PACKAGE_PIN "R22" [get_ports "DDR_DQ[23]"]
-set_property slew "FAST" [get_ports "DDR_DQ[23]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[23]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[23]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[22]"]
-set_property PACKAGE_PIN "M21" [get_ports "DDR_DQ[22]"]
-set_property slew "FAST" [get_ports "DDR_DQ[22]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[22]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[22]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[21]"]
-set_property PACKAGE_PIN "T21" [get_ports "DDR_DQ[21]"]
-set_property slew "FAST" [get_ports "DDR_DQ[21]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[21]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[21]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[20]"]
-set_property PACKAGE_PIN "R20" [get_ports "DDR_DQ[20]"]
-set_property slew "FAST" [get_ports "DDR_DQ[20]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[20]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[20]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[1]"]
-set_property PACKAGE_PIN "C20" [get_ports "DDR_DQ[1]"]
-set_property slew "FAST" [get_ports "DDR_DQ[1]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[1]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[19]"]
-set_property PACKAGE_PIN "T22" [get_ports "DDR_DQ[19]"]
-set_property slew "FAST" [get_ports "DDR_DQ[19]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[19]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[19]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[18]"]
-set_property PACKAGE_PIN "N20" [get_ports "DDR_DQ[18]"]
-set_property slew "FAST" [get_ports "DDR_DQ[18]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[18]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[18]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[17]"]
-set_property PACKAGE_PIN "T20" [get_ports "DDR_DQ[17]"]
-set_property slew "FAST" [get_ports "DDR_DQ[17]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[17]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[17]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[16]"]
-set_property PACKAGE_PIN "M22" [get_ports "DDR_DQ[16]"]
-set_property slew "FAST" [get_ports "DDR_DQ[16]"]
-set_property pullup "TRUE" [get_ports "DDR_DQ[16]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[16]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[15]"]
-set_property PACKAGE_PIN "K20" [get_ports "DDR_DQ[15]"]
-set_property slew "FAST" [get_ports "DDR_DQ[15]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[15]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[14]"]
-set_property PACKAGE_PIN "J22" [get_ports "DDR_DQ[14]"]
-set_property slew "FAST" [get_ports "DDR_DQ[14]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[14]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[13]"]
-set_property PACKAGE_PIN "K22" [get_ports "DDR_DQ[13]"]
-set_property slew "FAST" [get_ports "DDR_DQ[13]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[13]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[12]"]
-set_property PACKAGE_PIN "L20" [get_ports "DDR_DQ[12]"]
-set_property slew "FAST" [get_ports "DDR_DQ[12]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[12]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[11]"]
-set_property PACKAGE_PIN "L21" [get_ports "DDR_DQ[11]"]
-set_property slew "FAST" [get_ports "DDR_DQ[11]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[11]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[10]"]
-set_property PACKAGE_PIN "L22" [get_ports "DDR_DQ[10]"]
-set_property slew "FAST" [get_ports "DDR_DQ[10]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[10]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DQ[0]"]
-set_property PACKAGE_PIN "D22" [get_ports "DDR_DQ[0]"]
-set_property slew "FAST" [get_ports "DDR_DQ[0]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DQ[0]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DM[3]"]
-set_property PACKAGE_PIN "AA21" [get_ports "DDR_DM[3]"]
-set_property slew "FAST" [get_ports "DDR_DM[3]"]
-set_property pullup "TRUE" [get_ports "DDR_DM[3]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DM[3]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DM[2]"]
-set_property PACKAGE_PIN "P22" [get_ports "DDR_DM[2]"]
-set_property slew "FAST" [get_ports "DDR_DM[2]"]
-set_property pullup "TRUE" [get_ports "DDR_DM[2]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DM[2]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DM[1]"]
-set_property PACKAGE_PIN "H20" [get_ports "DDR_DM[1]"]
-set_property slew "FAST" [get_ports "DDR_DM[1]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DM[1]"]
-set_property iostandard "SSTL135_T_DCI" [get_ports "DDR_DM[0]"]
-set_property PACKAGE_PIN "B22" [get_ports "DDR_DM[0]"]
-set_property slew "FAST" [get_ports "DDR_DM[0]"]
-set_property PIO_DIRECTION "BIDIR" [get_ports "DDR_DM[0]"]
-set_property iostandard "SSTL135" [get_ports "DDR_CS_n"]
-set_property PACKAGE_PIN "P17" [get_ports "DDR_CS_n"]
-set_property slew "SLOW" [get_ports "DDR_CS_n"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_CS_n"]
-set_property iostandard "SSTL135" [get_ports "DDR_CKE"]
-set_property PACKAGE_PIN "T19" [get_ports "DDR_CKE"]
-set_property slew "SLOW" [get_ports "DDR_CKE"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_CKE"]
-set_property iostandard "DIFF_SSTL135" [get_ports "DDR_Clk"]
-set_property PACKAGE_PIN "N19" [get_ports "DDR_Clk"]
-set_property slew "FAST" [get_ports "DDR_Clk"]
-set_property PIO_DIRECTION "INPUT" [get_ports "DDR_Clk"]
-set_property iostandard "DIFF_SSTL135" [get_ports "DDR_Clk_n"]
-set_property PACKAGE_PIN "N18" [get_ports "DDR_Clk_n"]
-set_property slew "FAST" [get_ports "DDR_Clk_n"]
-set_property PIO_DIRECTION "INPUT" [get_ports "DDR_Clk_n"]
-set_property iostandard "SSTL135" [get_ports "DDR_CAS_n"]
-set_property PACKAGE_PIN "P20" [get_ports "DDR_CAS_n"]
-set_property slew "SLOW" [get_ports "DDR_CAS_n"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_CAS_n"]
-set_property iostandard "SSTL135" [get_ports "DDR_BankAddr[2]"]
-set_property PACKAGE_PIN "M17" [get_ports "DDR_BankAddr[2]"]
-set_property slew "SLOW" [get_ports "DDR_BankAddr[2]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_BankAddr[2]"]
-set_property iostandard "SSTL135" [get_ports "DDR_BankAddr[1]"]
-set_property PACKAGE_PIN "L17" [get_ports "DDR_BankAddr[1]"]
-set_property slew "SLOW" [get_ports "DDR_BankAddr[1]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_BankAddr[1]"]
-set_property iostandard "SSTL135" [get_ports "DDR_BankAddr[0]"]
-set_property PACKAGE_PIN "L16" [get_ports "DDR_BankAddr[0]"]
-set_property slew "SLOW" [get_ports "DDR_BankAddr[0]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_BankAddr[0]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[9]"]
-set_property PACKAGE_PIN "H18" [get_ports "DDR_Addr[9]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[9]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[9]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[8]"]
-set_property PACKAGE_PIN "J18" [get_ports "DDR_Addr[8]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[8]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[8]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[7]"]
-set_property PACKAGE_PIN "J17" [get_ports "DDR_Addr[7]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[7]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[7]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[6]"]
-set_property PACKAGE_PIN "J16" [get_ports "DDR_Addr[6]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[6]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[6]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[5]"]
-set_property PACKAGE_PIN "K18" [get_ports "DDR_Addr[5]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[5]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[5]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[4]"]
-set_property PACKAGE_PIN "K17" [get_ports "DDR_Addr[4]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[4]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[4]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[3]"]
-set_property PACKAGE_PIN "L19" [get_ports "DDR_Addr[3]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[3]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[3]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[2]"]
-set_property PACKAGE_PIN "K19" [get_ports "DDR_Addr[2]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[2]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[2]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[1]"]
-set_property PACKAGE_PIN "M18" [get_ports "DDR_Addr[1]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[1]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[1]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[14]"]
-set_property PACKAGE_PIN "G19" [get_ports "DDR_Addr[14]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[14]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[14]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[13]"]
-set_property PACKAGE_PIN "F19" [get_ports "DDR_Addr[13]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[13]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[13]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[12]"]
-set_property PACKAGE_PIN "H19" [get_ports "DDR_Addr[12]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[12]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[12]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[11]"]
-set_property PACKAGE_PIN "G18" [get_ports "DDR_Addr[11]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[11]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[11]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[10]"]
-set_property PACKAGE_PIN "J20" [get_ports "DDR_Addr[10]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[10]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[10]"]
-set_property iostandard "SSTL135" [get_ports "DDR_Addr[0]"]
-set_property PACKAGE_PIN "M19" [get_ports "DDR_Addr[0]"]
-set_property slew "SLOW" [get_ports "DDR_Addr[0]"]
-set_property PIO_DIRECTION "OUTPUT" [get_ports "DDR_Addr[0]"]
-set_property iostandard "LVCMOS33" [get_ports "PS_PORB"]
-set_property PACKAGE_PIN "B18" [get_ports "PS_PORB"]
-set_property slew "fast" [get_ports "PS_PORB"]
-set_property iostandard "LVCMOS25" [get_ports "PS_SRSTB"]
-set_property PACKAGE_PIN "C14" [get_ports "PS_SRSTB"]
-set_property slew "fast" [get_ports "PS_SRSTB"]
-set_property iostandard "LVCMOS33" [get_ports "PS_CLK"]
-set_property PACKAGE_PIN "F16" [get_ports "PS_CLK"]
-set_property slew "fast" [get_ports "PS_CLK"]
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xml
deleted file mode 100644
index 43a71a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xml
+++ /dev/null
@@ -1,40057 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>customized_ip</spirit:library>
- <spirit:name>scalp_zynqps_processing_system7_0_0</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:busInterfaces>
- <spirit:busInterface>
- <spirit:name>GMII_ETHERNET_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="gmii" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="gmii_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX_EN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_TX_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX_ER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_TX_ER</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TXD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_TXD</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>COL</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_COL</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CRS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_CRS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX_CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_RX_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX_DV</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_RX_DV</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX_ER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_RX_ER</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX_CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_TX_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RXD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_GMII_RXD</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.GMII_ETHERNET_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>MDIO_ETHERNET_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="mdio" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="mdio_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDC</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_MDIO_MDC</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDIO_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_MDIO_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDIO_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_MDIO_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDIO_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_MDIO_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>CAN_DEBUG</spirit:name>
- <spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.MDIO_ETHERNET_0.CAN_DEBUG">false</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.MDIO_ETHERNET_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>PTP_ETHERNET_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="ptp" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="ptp_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DELAY_REQ_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_DELAY_REQ_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DELAY_REQ_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_DELAY_REQ_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_REQ_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_PDELAY_REQ_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_REQ_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_PDELAY_REQ_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_RESP_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_PDELAY_RESP_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_RESP_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_PDELAY_RESP_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SYNC_FRAME_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_SYNC_FRAME_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SYNC_FRAME_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_PTP_SYNC_FRAME_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SOF_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_SOF_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SOF_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_SOF_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.PTP_ETHERNET_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>ENET0_EXT_INTIN</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET0_EXT_INTIN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ENET0_EXT_INTIN.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ENET0_EXT_INTIN.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.ENET0_EXT_INTIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>GMII_ETHERNET_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="gmii" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="gmii_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX_EN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_TX_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX_ER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_TX_ER</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TXD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_TXD</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>COL</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_COL</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CRS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_CRS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX_CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_RX_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX_DV</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_RX_DV</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX_ER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_RX_ER</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX_CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_TX_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RXD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_GMII_RXD</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.GMII_ETHERNET_1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>MDIO_ETHERNET_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="mdio" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="mdio_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDC</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_MDIO_MDC</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDIO_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_MDIO_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDIO_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_MDIO_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MDIO_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_MDIO_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>CAN_DEBUG</spirit:name>
- <spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.MDIO_ETHERNET_1.CAN_DEBUG">false</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.MDIO_ETHERNET_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>PTP_ETHERNET_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="ptp" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="ptp_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DELAY_REQ_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_DELAY_REQ_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DELAY_REQ_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_DELAY_REQ_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_REQ_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_PDELAY_REQ_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_REQ_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_PDELAY_REQ_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_RESP_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_PDELAY_RESP_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PDELAY_RESP_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_PDELAY_RESP_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SYNC_FRAME_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_SYNC_FRAME_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SYNC_FRAME_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_PTP_SYNC_FRAME_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SOF_RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_SOF_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SOF_TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_SOF_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.PTP_ETHERNET_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 ) && (spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1 ))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>ENET1_EXT_INTIN</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>ENET1_EXT_INTIN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ENET1_EXT_INTIN.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.ENET1_EXT_INTIN.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.ENET1_EXT_INTIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>GPIO_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="gpio" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="gpio_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRI_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>GPIO_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRI_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>GPIO_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRI_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>GPIO_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.GPIO_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_GPIO)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DDR</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="ddrx" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="ddrx_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CAS_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_CAS_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CKE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_CKE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CK_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_Clk_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CK_P</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_Clk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CS_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_CS_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RESET_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_DRSTB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ODT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_ODT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RAS_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_RAS_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WE_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_WEB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_BankAddr</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_Addr</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DM</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_DM</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DQ</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_DQ</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DQS_N</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_DQS_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DQS_P</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_DQS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>CAN_DEBUG</spirit:name>
- <spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.CAN_DEBUG">false</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TIMEPERIOD_PS</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.TIMEPERIOD_PS">1250</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MEMORY_TYPE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.MEMORY_TYPE">COMPONENTS</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MEMORY_PART</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.MEMORY_PART"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.DATA_WIDTH">8</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CS_ENABLED</spirit:name>
- <spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.CS_ENABLED">true</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_MASK_ENABLED</spirit:name>
- <spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.DATA_MASK_ENABLED">true</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SLOT</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.SLOT">Single</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CUSTOM_PARTS</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.CUSTOM_PARTS"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MEM_ADDR_MAP</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.MEM_ADDR_MAP">ROW_COLUMN_BANK</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.BURST_LENGTH">8</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AXI_ARBITRATION_SCHEME</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.AXI_ARBITRATION_SCHEME">TDM</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CAS_LATENCY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.CAS_LATENCY">11</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CAS_WRITE_LATENCY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DDR.CAS_WRITE_LATENCY">11</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FIXED_IO</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="fixedio" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="fixedio_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>MIO</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>MIO</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DDR_VRN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_VRN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DDR_VRP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DDR_VRP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PS_SRSTB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PS_SRSTB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PS_CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PS_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PS_PORB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PS_PORB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>CAN_DEBUG</spirit:name>
- <spirit:value spirit:format="bool" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FIXED_IO.CAN_DEBUG">false</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>UART_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="uart" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="uart_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DTRn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_DTRN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RTSn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_RTSN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TxD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CTSn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_CTSN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DCDn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_DCDN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DSRn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_DSRN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RI</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_RIN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RxD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART0_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.UART_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_UART0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>UART_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="uart" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="uart_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DTRn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_DTRN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RTSn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_RTSN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TxD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CTSn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_CTSN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DCDn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_DCDN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DSRn</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_DSRN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RI</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_RIN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RxD</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>UART1_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.UART_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_UART1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IIC_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="iic" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="iic_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SDA_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C0_SDA_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SDA_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C0_SDA_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SDA_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C0_SDA_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCL_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C0_SCL_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCL_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C0_SCL_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCL_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C0_SCL_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IIC_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IIC_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="iic" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="iic_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SDA_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C1_SDA_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SDA_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C1_SDA_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SDA_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C1_SDA_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCL_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C1_SCL_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCL_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C1_SCL_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCL_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>I2C1_SCL_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IIC_1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>SPI_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="spi" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="spi_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCK_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SCLK_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCK_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SCLK_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCK_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SCLK_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO0_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_MOSI_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO0_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_MOSI_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO0_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_MOSI_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO1_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_MISO_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO1_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_MISO_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO1_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_MISO_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SS_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SS_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS1_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SS1_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS2_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SS2_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI0_SS_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.SPI_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>SPI_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="spi" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="spi_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCK_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SCLK_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCK_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SCLK_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SCK_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SCLK_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO0_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_MOSI_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO0_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_MOSI_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO0_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_MOSI_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO1_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_MISO_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO1_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_MISO_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>IO1_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_MISO_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SS_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SS_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS1_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SS1_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS2_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SS2_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>SS_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SPI1_SS_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.SPI_1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>CAN_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="can" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="can_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>CAN0_PHY_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>CAN0_PHY_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.CAN_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CAN0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>CAN_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="can" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="can_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>CAN1_PHY_TX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RX</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>CAN1_PHY_RX</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.CAN_1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CAN1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>PJTAG</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="jtag" spirit:version="2.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="jtag_rtl" spirit:version="2.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PJTAG_TCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TMS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PJTAG_TMS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TDI</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PJTAG_TDI</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TDO</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>PJTAG_TDO</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.PJTAG" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_PJTAG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>SDIO_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="sdio" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="sdio_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK_FB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_CLK_FB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CMD_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_CMD_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CMD_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_CMD_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CMD_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_CMD_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_DATA_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_DATA_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_DATA_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>LED</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_LED</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CDN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_CDN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_WP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BUSPOW</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_BUSPOW</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BUSVOLT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO0_BUSVOLT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.SDIO_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CD_SDIO0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_WP_SDIO0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>SDIO_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="sdio" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="sdio_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK_FB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_CLK_FB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CMD_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_CMD_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CMD_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_CMD_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CMD_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_CMD_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_DATA_I</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_DATA_O</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA_T</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_DATA_T</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>LED</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_LED</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CDN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_CDN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_WP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BUSPOW</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_BUSPOW</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BUSVOLT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>SDIO1_BUSVOLT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.SDIO_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRACE_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="zynq_trace" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="zynq_trace_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK_O</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>TRACE_CLK_OUT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK_I</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>TRACE_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CTL</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>TRACE_CTL</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>DATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>TRACE_DATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRACE_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>USBIND_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="usbctrl" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="usbctrl_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PORT_INDCTL</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>USB0_PORT_INDCTL</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>VBUS_PWRSELECT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>USB0_VBUS_PWRSELECT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>VBUS_PWRFAULT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>USB0_VBUS_PWRFAULT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.USBIND_0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>USBIND_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="usbctrl" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="usbctrl_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>PORT_INDCTL</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>USB1_PORT_INDCTL</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>VBUS_PWRSELECT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>USB1_VBUS_PWRSELECT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>VBUS_PWRFAULT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>USB1_VBUS_PWRFAULT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.USBIND_1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP0_FIFO_CTRL</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RDISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WRISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WRISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP0_FIFO_CTRL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP1_FIFO_CTRL</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RDISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WRISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WRISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP1_FIFO_CTRL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP2_FIFO_CTRL</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RDISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WRISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WRISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP2_FIFO_CTRL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP3_FIFO_CTRL</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="display_processing_system7" spirit:name="hpstatusctrl_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WCOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WCOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WACOUNT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WACOUNT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RDISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WRISSUECAPEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WRISSUECAP1_EN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP3_FIFO_CTRL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA0_REQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DRREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DRLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DRVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DRTYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA0_REQ.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA0_REQ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA0_ACK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DATYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DAVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_DAREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA0_ACK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA0_ACK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA1_REQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DRREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DRLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DRVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DRTYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA1_REQ.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA1_REQ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA1_ACK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DATYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DAVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_DAREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA1_ACK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA1_ACK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA2_REQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DRREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DRLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DRVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DRTYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA2_REQ.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA2_REQ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA2_ACK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DATYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DAVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_DAREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA2_ACK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA2_ACK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA3_REQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DRREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DRLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DRVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DRTYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA3_REQ.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA3_REQ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA3_ACK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DATYPE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DAVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_DAREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA3_ACK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA3_ACK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FTM_TRACE_DATA</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="axis_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMD_TRACEIN_DATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMD_TRACEIN_VALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMD_TRACEIN_ATID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>TDATA_NUM_BYTES</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TDATA_NUM_BYTES">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TDEST_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TDEST_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.TUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TREADY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TREADY">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TSTRB">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TKEEP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TKEEP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_TLAST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.HAS_TLAST">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LAYERED_METADATA</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.LAYERED_METADATA">undef</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FTM_TRACE_DATA.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FTM_TRACE_DATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>PROC_EVENT</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="evntbus" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="evntbus_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>EVENTO</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>EVENT_EVENTO</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>STANDBYWFE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>EVENT_STANDBYWFE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>STANDBYWFI</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>EVENT_STANDBYWFI</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>EVENTI</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>EVENT_EVENTI</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.PROC_EVENT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_PROC_EVENT_BUS)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>M_AXI_GP0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:master>
- <spirit:addressSpaceRef spirit:addressSpaceRef="Data">
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:baseAddress>
- </spirit:addressSpaceRef>
- </spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.SUPPORTS_NARROW_BURST" spirit:dependency="(spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP0_SUPPORT_NARROW_BURST)))" spirit:choiceRef="choice_list_8af5a703">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIFPARAM_ENABLEMENT.M_AXI_GP0.SUPPORTS_NARROW_BURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_WRITE_OUTSTANDING" spirit:order="87880">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_READ_OUTSTANDING" spirit:order="87881">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.PROTOCOL">AXI3</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.FREQ_HZ">125000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.ID_WIDTH">12</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_REGION">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.MAX_BURST_LENGTH">16</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_READ_THREADS">4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_WRITE_THREADS">4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.M_AXI_GP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>M_AXI_GP1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:master>
- <spirit:addressSpaceRef spirit:addressSpaceRef="Data">
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x80000000</spirit:baseAddress>
- </spirit:addressSpaceRef>
- </spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.NUM_WRITE_OUTSTANDING" spirit:order="87892">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.NUM_READ_OUTSTANDING" spirit:order="87893">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.SUPPORTS_NARROW_BURST" spirit:dependency="(spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP1_SUPPORT_NARROW_BURST)))" spirit:choiceRef="choice_list_8af5a703">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIFPARAM_ENABLEMENT.M_AXI_GP1.SUPPORTS_NARROW_BURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.M_AXI_GP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_ACP</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_ACP"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ARUSER</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWUSER</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_AWUSER</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.NUM_WRITE_OUTSTANDING" spirit:order="87896">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.NUM_READ_OUTSTANDING" spirit:order="87897">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_ACP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_GP0"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.NUM_WRITE_OUTSTANDING" spirit:order="87882">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.NUM_READ_OUTSTANDING" spirit:order="87883">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_GP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_GP1"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.NUM_WRITE_OUTSTANDING" spirit:order="87894">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.NUM_READ_OUTSTANDING" spirit:order="87895">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_GP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_HP0"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.NUM_WRITE_OUTSTANDING" spirit:order="87884">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.NUM_READ_OUTSTANDING" spirit:order="87885">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_HP1"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.NUM_WRITE_OUTSTANDING" spirit:order="87886">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.NUM_READ_OUTSTANDING" spirit:order="87887">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP2</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_HP2"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.NUM_WRITE_OUTSTANDING" spirit:order="87888">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.NUM_READ_OUTSTANDING" spirit:order="87889">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP2" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP3</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
- <spirit:slave>
- <spirit:memoryMapRef spirit:memoryMapRef="S_AXI_HP3"/>
- </spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_BVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_BRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RRESP</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RRESP</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_BID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>BREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_BREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RREADY</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_RREADY</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WLAST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WLAST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WVALID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WVALID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWBURST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWBURST</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLOCK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWLOCK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWSIZE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWSIZE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWPROT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWPROT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWADDR</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWADDR</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWCACHE</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWCACHE</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWLEN</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWLEN</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWQOS</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWQOS</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ARID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ARID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AWID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_AWID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WID</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WID</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WDATA</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WDATA</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>WSTRB</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_WSTRB</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM WRITE OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.NUM_WRITE_OUTSTANDING" spirit:order="87890">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
- <spirit:displayName>NUM READ OUTSTANDING</spirit:displayName>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.NUM_READ_OUTSTANDING" spirit:order="87891">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.DATA_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PROTOCOL</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.PROTOCOL">AXI4</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.ID_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.ADDR_WIDTH">32</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AWUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.AWUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ARUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.ARUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.WUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.RUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BUSER_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.BUSER_WIDTH">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>READ_WRITE_MODE</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.READ_WRITE_MODE">READ_WRITE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_LOCK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_LOCK">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_PROT</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_PROT">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_CACHE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_CACHE">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_QOS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_QOS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_REGION</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_REGION">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_WSTRB</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_WSTRB">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_BRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_BRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HAS_RRESP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.HAS_RRESP">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.SUPPORTS_NARROW_BURST">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MAX_BURST_LENGTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.MAX_BURST_LENGTH">256</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_READ_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.NUM_READ_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_WRITE_THREADS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.NUM_WRITE_THREADS">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.RUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>WUSER_BITS_PER_BYTE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.WUSER_BITS_PER_BYTE">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.tlm</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP3" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_CLK0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_CLK0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK0.FREQ_HZ" spirit:dependency="(spirit:decode(id(PARAM_VALUE.PCW_CLK0_FREQ)))" spirit:minimum="100000" spirit:maximum="333000000">125000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK0.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK0.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_BUSIF"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK0.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_CLK0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK0_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_CLK1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_CLK1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="dependent" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK1.FREQ_HZ" spirit:dependency="(spirit:decode(id(PARAM_VALUE.PCW_CLK1_FREQ)))" spirit:minimum="100000" spirit:maximum="333000000">10000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK1.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK1.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK1.ASSOCIATED_BUSIF"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK1.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK1.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_CLK1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK1_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_CLK2</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_CLK2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="dependent" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK2.FREQ_HZ" spirit:dependency="(spirit:decode(id(PARAM_VALUE.PCW_CLK2_FREQ)))" spirit:minimum="100000" spirit:maximum="333000000">10000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK2.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK2.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK2.ASSOCIATED_BUSIF"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK2.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK2.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_CLK2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK2_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_CLK3</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_CLK3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="dependent" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK3.FREQ_HZ" spirit:dependency="(spirit:decode(id(PARAM_VALUE.PCW_CLK3_FREQ)))" spirit:minimum="100000" spirit:maximum="333000000">10000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK3.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK3.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK3.ASSOCIATED_BUSIF"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK3.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_CLK3.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_CLK3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK3_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_RESET0_N</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_RESET0_N</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>POLARITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET0_N.POLARITY">ACTIVE_LOW</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET0_N.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_RESET0_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST0_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_RESET1_N</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_RESET1_N</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>POLARITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET1_N.POLARITY">ACTIVE_LOW</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET1_N.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_RESET1_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST1_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_RESET2_N</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_RESET2_N</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>POLARITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET2_N.POLARITY">ACTIVE_LOW</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET2_N.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_RESET2_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST2_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FCLK_RESET3_N</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="reset_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>RST</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FCLK_RESET3_N</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>POLARITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET3_N.POLARITY">ACTIVE_LOW</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FCLK_RESET3_N.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FCLK_RESET3_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST3_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC_ABORT</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC_ABORT</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC_ABORT.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC_ABORT.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC_ABORT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC_ABORT_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC2</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC2.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC2.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC2_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC3</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC3.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC3.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC3_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC4</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC4</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC4.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC4.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC4" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC4_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC5</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC5</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC5.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC5.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC5" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC5_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC6</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC6</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC6.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC6.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC6" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC6_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_DMAC7</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_DMAC7</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC7.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_DMAC7.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_DMAC7" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC7_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_SMC</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_SMC</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SMC.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SMC.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_SMC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SMC_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_QSPI</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_QSPI</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_QSPI.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_QSPI.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_QSPI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_QSPI_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_CTI</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_CTI</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_CTI.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_CTI.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_CTI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_CTI_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_GPIO</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_GPIO</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_GPIO.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_GPIO.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_GPIO" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_GPIO_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_USB0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_USB0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_USB0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_USB0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_USB0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_USB0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_ENET0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_ENET0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_ENET0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_ENET_WAKE0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_ENET_WAKE0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET_WAKE0.SENSITIVITY">EDGE_RISING</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET_WAKE0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_ENET_WAKE0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_SDIO0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_SDIO0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SDIO0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SDIO0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_SDIO0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SDIO0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_I2C0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_I2C0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_I2C0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_I2C0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_I2C0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_I2C0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_SPI0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_SPI0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SPI0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SPI0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_SPI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SPI0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_UART0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_UART0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_UART0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_UART0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_UART0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_UART0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_CAN0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_CAN0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_CAN0.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_CAN0.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_CAN0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_CAN0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_USB1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_USB1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_USB1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_USB1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_USB1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_USB1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_ENET1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_ENET1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_ENET1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_ENET_WAKE1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_ENET_WAKE1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET_WAKE1.SENSITIVITY">EDGE_RISING</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_ENET_WAKE1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_ENET_WAKE1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_SDIO1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_SDIO1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SDIO1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SDIO1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_SDIO1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SDIO1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_I2C1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_I2C1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_I2C1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_I2C1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_I2C1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_I2C1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_SPI1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_SPI1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SPI1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_SPI1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_SPI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SPI1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_UART1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_UART1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_UART1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_UART1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_UART1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_UART1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_P2F_CAN1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_P2F_CAN1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_CAN1.SENSITIVITY">LEVEL_HIGH</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_P2F_CAN1.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_P2F_CAN1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_CAN1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>IRQ_F2P</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>IRQ_F2P</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_F2P.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.IRQ_F2P.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.IRQ_F2P" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_IRQ_F2P_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>Core0_nFIQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>Core0_nFIQ</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE0_NFIQ.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE0_NFIQ.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.Core0_nFIQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE0_FIQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>Core0_nIRQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>Core0_nIRQ</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE0_NIRQ.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE0_NIRQ.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.Core0_nIRQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE0_IRQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>Core1_nFIQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>Core1_nFIQ</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE1_NFIQ.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE1_NFIQ.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.Core1_nFIQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE1_FIQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>Core1_nIRQ</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="interrupt_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>INTERRUPT</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>Core1_nIRQ</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>SENSITIVITY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE1_NIRQ.SENSITIVITY">LEVEL_HIGH</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PortWidth</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.CORE1_NIRQ.PortWidth">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.Core1_nIRQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE1_IRQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>M_AXI_GP0_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.ASSOCIATED_BUSIF">M_AXI_GP0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.FREQ_HZ">125000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.M_AXI_GP0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>M_AXI_GP1_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.ASSOCIATED_BUSIF">M_AXI_GP1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.M_AXI_GP1_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.M_AXI_GP1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_ACP_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.ASSOCIATED_BUSIF">S_AXI_ACP</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_ACP_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_ACP_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP0_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.ASSOCIATED_BUSIF">S_AXI_GP0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP0_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_GP0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP1_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.ASSOCIATED_BUSIF">S_AXI_GP1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_GP1_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_GP1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP0_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.ASSOCIATED_BUSIF">S_AXI_HP0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP0_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP1_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.ASSOCIATED_BUSIF">S_AXI_HP1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP1_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP2_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.ASSOCIATED_BUSIF">S_AXI_HP2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP2_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP2_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP3_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.ASSOCIATED_BUSIF">S_AXI_HP3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.S_AXI_HP3_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.S_AXI_HP3_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>FTMD_TRACEIN_CLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMD_TRACEIN_CLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.ASSOCIATED_BUSIF">FTM_TRACE_DATA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.FTMD_TRACEIN_CLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.FTMD_TRACEIN_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA0_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA0_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.DMA0_ACLK.ASSOCIATED_BUSIF">DMA0_ACK:DMA0_REQ</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA0_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA0_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA1_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA1_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.DMA1_ACLK.ASSOCIATED_BUSIF">DMA1_ACK:DMA1_REQ</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA1_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA1_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA2_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA2_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.DMA2_ACLK.ASSOCIATED_BUSIF">DMA2_ACK:DMA2_REQ</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA2_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA2_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA2_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>DMA3_ACLK</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>DMA3_ACLK</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:id="BUSIFPARAM_VALUE.DMA3_ACLK.ASSOCIATED_BUSIF">DMA3_ACK:DMA3_REQ</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACLK.FREQ_HZ">100000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACLK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACLK.CLK_DOMAIN"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.DMA3_ACLK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.DMA3_ACLK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.DMA3_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_IN_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIG_0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIGACK_0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_IN_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN0)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_IN_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIG_1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIGACK_1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_IN_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN1)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_IN_2</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIG_2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIGACK_2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_IN_2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN2)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_IN_3</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIG_3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_F2P_TRIGACK_3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_IN_3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN3)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_OUT_0</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIGACK_0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIG_0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_OUT_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT0)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_OUT_1</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIGACK_1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIG_1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_OUT_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT1)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_OUT_2</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIGACK_2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIG_2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_OUT_2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT2)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>TRIGGER_OUT_3</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="trigger_rtl" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ACK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIGACK_3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>TRIG</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>FTMT_P2F_TRIG_3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:vendorExtensions>
- <xilinx:busInterfaceInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="BUSIF_ENABLEMENT.TRIGGER_OUT_3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT3)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:busInterfaceInfo>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>M_AXI_GP0_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP0_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>M_AXI_GP1_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:master/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>M_AXI_GP1_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP0_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP0_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP1_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP1_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP2_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP2_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP2_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_GP3_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP3_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_GP3_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_ACP_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_ACP_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP0_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP0_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP1_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP1_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP2_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP2_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>S_AXI_HP3_tlm</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_tlm" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_READ_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_rd_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>AXIMM_WRITE_SOCKET</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>S_AXI_HP3_wr_socket</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- </spirit:busInterface>
- </spirit:busInterfaces>
- <spirit:addressSpaces>
- <spirit:addressSpace>
- <spirit:name>Data</spirit:name>
- <spirit:displayName>Data</spirit:displayName>
- <spirit:range spirit:format="long">4G</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:segments>
- <spirit:segment>
- <spirit:name>segment1</spirit:name>
- <spirit:displayName>segment1</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>segment2</spirit:name>
- <spirit:displayName>segment2</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>segment3</spirit:name>
- <spirit:displayName>segment3</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0x00080000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00080000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>segment4</spirit:name>
- <spirit:displayName>segment4</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0x00100000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x3ff00000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>M_AXI_GP0</spirit:name>
- <spirit:displayName>M_AXI_GP0</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>M_AXI_GP1</spirit:name>
- <spirit:displayName>M_AXI_GP1</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0x80000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>IO_Peripheral_Registers</spirit:name>
- <spirit:displayName>IO Peripheral Registers</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00300000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>SMC_Memories</spirit:name>
- <spirit:displayName>SMC Memories</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xe1000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x05000000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>SLCR_Registers</spirit:name>
- <spirit:displayName>SLCR Registers</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00000c00</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>PS_System_Registers</spirit:name>
- <spirit:displayName>PS System Registers</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xf8001000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x0080f000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>CPU_Private_Registers</spirit:name>
- <spirit:displayName>CPU Private Registers</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xf8900000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00603000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>segment5</spirit:name>
- <spirit:displayName>segment5</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xfc000000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- </spirit:segment>
- <spirit:segment>
- <spirit:name>segment6</spirit:name>
- <spirit:displayName>segment6</spirit:displayName>
- <spirit:addressOffset spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:addressOffset>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- </spirit:segment>
- </spirit:segments>
- </spirit:addressSpace>
- </spirit:addressSpaces>
- <spirit:memoryMaps>
- <spirit:memoryMap>
- <spirit:name>S_AXI_HP0</spirit:name>
- <spirit:addressBlock>
- <spirit:name>HP0_LOW_OCM</spirit:name>
- <spirit:displayName>HP0 LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP0.HP0_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP0_DDR_LOWOCM</spirit:name>
- <spirit:displayName>HP0 DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP0.HP0_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP0_HIGH_OCM</spirit:name>
- <spirit:displayName>HP0 HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP0.HP0_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_HP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- <spirit:memoryMap>
- <spirit:name>S_AXI_HP1</spirit:name>
- <spirit:addressBlock>
- <spirit:name>HP1_LOW_OCM</spirit:name>
- <spirit:displayName>HP1 LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP1.HP1_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP1_DDR_LOWOCM</spirit:name>
- <spirit:displayName>HP1 DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP1.HP1_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP1_HIGH_OCM</spirit:name>
- <spirit:displayName>HP1 HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP1.HP1_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_HP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- <spirit:memoryMap>
- <spirit:name>S_AXI_HP2</spirit:name>
- <spirit:addressBlock>
- <spirit:name>HP2_LOW_OCM</spirit:name>
- <spirit:displayName>HP2 LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP2.HP2_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP2_DDR_LOWOCM</spirit:name>
- <spirit:displayName>HP2 DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP2.HP2_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP2_HIGH_OCM</spirit:name>
- <spirit:displayName>HP2 HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP2.HP2_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_HP2" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- <spirit:memoryMap>
- <spirit:name>S_AXI_HP3</spirit:name>
- <spirit:addressBlock>
- <spirit:name>HP3_LOW_OCM</spirit:name>
- <spirit:displayName>HP3 LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP3.HP3_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP3_DDR_LOWOCM</spirit:name>
- <spirit:displayName>HP3 DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP3.HP3_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>HP3_HIGH_OCM</spirit:name>
- <spirit:displayName>HP3 HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_HP3.HP3_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_HP3" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- <spirit:memoryMap>
- <spirit:name>S_AXI_GP0</spirit:name>
- <spirit:addressBlock>
- <spirit:name>GP0_LOW_OCM</spirit:name>
- <spirit:displayName>GP0 LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_DDR_LOWOCM</spirit:name>
- <spirit:displayName>GP0 DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_HIGH_OCM</spirit:name>
- <spirit:displayName>GP0 HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_QSPI_LINEAR</spirit:name>
- <spirit:displayName>GP0 QSPI LINEAR</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfc000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_QSPI_INTERNAL_HIGHADDRESS))) - 0xfbffffff )">16777216</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_QSPI_LINEAR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SRAM_NOR0</spirit:name>
- <spirit:displayName>GP0 SRAM NOR 0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe2000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SRAM_NOR0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) && ((spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SRAM_NOR1</spirit:name>
- <spirit:displayName>GP0 SRAM NOR 1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe4000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SRAM_NOR1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) && ((spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_NAND</spirit:name>
- <spirit:displayName>GP0 NAND</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe1000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x01000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_NAND" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_IOP</spirit:name>
- <spirit:displayName>GP0 IOP</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00400000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_IOP" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 0) && ((spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1)))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_UART0</spirit:name>
- <spirit:displayName>GP0 UART0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_UART0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_UART1</spirit:name>
- <spirit:displayName>GP0 UART0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0001000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_UART1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_USB0</spirit:name>
- <spirit:displayName>GP0 USB0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0002000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_USB0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_USB1</spirit:name>
- <spirit:displayName>GP0 USB1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0003000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_USB1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_IIC0</spirit:name>
- <spirit:displayName>GP0 IIC0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0004000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_IIC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_IIC1</spirit:name>
- <spirit:displayName>GP0 IIC1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0005000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_IIC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SPI0</spirit:name>
- <spirit:displayName>GP0 SPI0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0006000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SPI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SPI1</spirit:name>
- <spirit:displayName>GP0 SPI1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0007000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SPI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_CAN0</spirit:name>
- <spirit:displayName>GP0 CAN0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0008000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_CAN0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_CAN1</spirit:name>
- <spirit:displayName>GP0 CAN1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0009000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_CAN1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_GPIO</spirit:name>
- <spirit:displayName>GP0 GPIO</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000A000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_GPIO" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_ENET0</spirit:name>
- <spirit:displayName>GP0 ENET0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000B000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_ENET0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_ENET1</spirit:name>
- <spirit:displayName>GP0 ENET1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000C000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_ENET1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_QSPI</spirit:name>
- <spirit:displayName>GP0 QSPI</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000D000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_QSPI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SMC</spirit:name>
- <spirit:displayName>GP0 SMC</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000e000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SMC" xilinx:dependency="(((spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1)) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SDIO0</spirit:name>
- <spirit:displayName>GP0 SDIO0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0100000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SDIO0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SDIO1</spirit:name>
- <spirit:displayName>GP0 SDIO1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0101000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SDIO1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_PS_SLCR_REGS</spirit:name>
- <spirit:displayName>GP0 PS REG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00010000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_PS_SLCR_REGS" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 0))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SLCR</spirit:name>
- <spirit:displayName>GP0 SLCR</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SLCR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_TTC0</spirit:name>
- <spirit:displayName>GP0 TTC0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8001000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_TTC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_TTC0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_TTC1</spirit:name>
- <spirit:displayName>GP0 TTC1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8002000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_TTC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_TTC1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_DMAC_S</spirit:name>
- <spirit:displayName>GP0 DMAC S</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8003000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_DMAC_S" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_DMAC_NS</spirit:name>
- <spirit:displayName>GP0 DMAC NS</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8004000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_DMAC_NS" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_SWDT</spirit:name>
- <spirit:displayName>GP0 SWDT</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8005000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_SWDT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_WDT_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_DDRC</spirit:name>
- <spirit:displayName>GP0 DDRC</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8006000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_DDRC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_DEVCFG</spirit:name>
- <spirit:displayName>GP0 DEVCFG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8007000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_DEVCFG" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_AFI0</spirit:name>
- <spirit:displayName>GP0 AFI0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8008000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_AFI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_AFI1</spirit:name>
- <spirit:displayName>GP0 AFI1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8009000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_AFI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_AFI2</spirit:name>
- <spirit:displayName>GP0 AFI2</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800A000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_AFI2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_AFI3</spirit:name>
- <spirit:displayName>GP0 AFI3</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800B000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_AFI3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_OCM_REG</spirit:name>
- <spirit:displayName>GP0 OCM REG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800C000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_OCM_REG" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_CORESIGHT</spirit:name>
- <spirit:displayName>GP0 CORESIGHT</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8800000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00100000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_CORESIGHT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CORESIGHT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_M_AXI_GP0</spirit:name>
- <spirit:displayName>GP0 M AXI GP0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_M_AXI_GP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP0_M_AXI_GP1</spirit:name>
- <spirit:displayName>GP0 M AXI GP1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x80000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP0.GP0_M_AXI_GP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_GP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- <spirit:memoryMap>
- <spirit:name>S_AXI_GP1</spirit:name>
- <spirit:addressBlock>
- <spirit:name>GP1_LOW_OCM</spirit:name>
- <spirit:displayName>GP1 LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_DDR_LOWOCM</spirit:name>
- <spirit:displayName>GP1 DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_HIGH_OCM</spirit:name>
- <spirit:displayName>GP1 HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_QSPI_LINEAR</spirit:name>
- <spirit:displayName>GP1 QSPI LINEAR</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfc000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_QSPI_INTERNAL_HIGHADDRESS))) - 0xfbffffff )">16777216</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_QSPI_LINEAR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SRAM_NOR0</spirit:name>
- <spirit:displayName>GP1 SRAM NOR 0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe2000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SRAM_NOR0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) && ((spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SRAM_NOR1</spirit:name>
- <spirit:displayName>GP1 SRAM NOR 1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe4000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SRAM_NOR1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) && ((spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_NAND</spirit:name>
- <spirit:displayName>GP1 NAND</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe1000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x01000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_NAND" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_IOP</spirit:name>
- <spirit:displayName>GP1 IOP</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00400000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_IOP" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 0) && ((spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1)))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_UART0</spirit:name>
- <spirit:displayName>GP1 UART0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_UART0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_UART1</spirit:name>
- <spirit:displayName>GP1 UART0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0001000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_UART1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_USB0</spirit:name>
- <spirit:displayName>GP1 USB0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0002000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_USB0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_USB1</spirit:name>
- <spirit:displayName>GP1 USB1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0003000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_USB1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_IIC0</spirit:name>
- <spirit:displayName>GP1 IIC0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0004000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_IIC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_IIC1</spirit:name>
- <spirit:displayName>GP1 IIC1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0005000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_IIC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SPI0</spirit:name>
- <spirit:displayName>GP1 SPI0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0006000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SPI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SPI1</spirit:name>
- <spirit:displayName>GP1 SPI1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0007000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SPI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_CAN0</spirit:name>
- <spirit:displayName>GP1 CAN0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0008000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_CAN0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_CAN1</spirit:name>
- <spirit:displayName>GP1 CAN1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0009000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_CAN1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_GPIO</spirit:name>
- <spirit:displayName>GP1 GPIO</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000A000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_GPIO" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_ENET0</spirit:name>
- <spirit:displayName>GP1 ENET0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000B000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_ENET0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_ENET1</spirit:name>
- <spirit:displayName>GP1 ENET1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000C000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_ENET1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_QSPI</spirit:name>
- <spirit:displayName>GP1 QSPI</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000D000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_QSPI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SMC</spirit:name>
- <spirit:displayName>GP1 SMC</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000e000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SMC" xilinx:dependency="(((spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1)) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SDIO0</spirit:name>
- <spirit:displayName>GP1 SDIO0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0100000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SDIO0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SDIO1</spirit:name>
- <spirit:displayName>GP1 SDIO1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0101000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SDIO1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_PS_SLCR_REGS</spirit:name>
- <spirit:displayName>GP1 PS REG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00010000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_PS_SLCR_REGS" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 0))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SLCR</spirit:name>
- <spirit:displayName>GP1 SLCR</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SLCR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_TTC0</spirit:name>
- <spirit:displayName>GP1 TTC0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8001000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_TTC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_TTC0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_TTC1</spirit:name>
- <spirit:displayName>GP1 TTC1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8002000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_TTC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_TTC1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_DMAC_S</spirit:name>
- <spirit:displayName>GP1 DMAC S</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8003000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_DMAC_S" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_DMAC_NS</spirit:name>
- <spirit:displayName>GP1 DMAC NS</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8004000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_DMAC_NS" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_SWDT</spirit:name>
- <spirit:displayName>GP1 SWDT</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8005000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_SWDT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_WDT_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_DDRC</spirit:name>
- <spirit:displayName>GP1 DDRC</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8006000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_DDRC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_DEVCFG</spirit:name>
- <spirit:displayName>GP1 DEVCFG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8007000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_DEVCFG" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_AFI0</spirit:name>
- <spirit:displayName>GP1 AFI0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8008000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_AFI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_AFI1</spirit:name>
- <spirit:displayName>GP1 AFI1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8009000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_AFI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_AFI2</spirit:name>
- <spirit:displayName>GP1 AFI2</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800A000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_AFI2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_AFI3</spirit:name>
- <spirit:displayName>GP1 AFI3</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800B000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_AFI3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_OCM_REG</spirit:name>
- <spirit:displayName>GP1 OCM REG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800C000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_OCM_REG" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_CORESIGHT</spirit:name>
- <spirit:displayName>GP1 CORESIGHT</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8800000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00100000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_CORESIGHT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CORESIGHT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_M_AXI_GP0</spirit:name>
- <spirit:displayName>GP1 M AXI GP0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_M_AXI_GP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>GP1_M_AXI_GP1</spirit:name>
- <spirit:displayName>GP1 M AXI GP1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x80000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_GP1.GP1_M_AXI_GP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_GP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- <spirit:memoryMap>
- <spirit:name>S_AXI_ACP</spirit:name>
- <spirit:addressBlock>
- <spirit:name>ACP_LOW_OCM</spirit:name>
- <spirit:displayName>ACP LOW OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_LOW_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 0) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_DDR_LOWOCM</spirit:name>
- <spirit:displayName>ACP DDR LOWOCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x00000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_DDR_RAM_HIGHADDR)))+0x00000001)">268435456</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_DDR_LOWOCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_HIGH_OCM</spirit:name>
- <spirit:displayName>ACP HIGH OCM</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfffc0000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00040000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_HIGH_OCM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_HIGH_OCM)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_QSPI_LINEAR</spirit:name>
- <spirit:displayName>ACP QSPI LINEAR</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xfc000000</spirit:baseAddress>
- <spirit:range spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(PARAM_VALUE.PCW_QSPI_INTERNAL_HIGHADDRESS))) - 0xfbffffff )">16777216</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_QSPI_LINEAR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SRAM_NOR0</spirit:name>
- <spirit:displayName>ACP SRAM NOR 0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe2000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SRAM_NOR0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) && ((spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SRAM_NOR1</spirit:name>
- <spirit:displayName>ACP SRAM NOR 1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe4000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x02000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SRAM_NOR1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) && ((spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_NAND</spirit:name>
- <spirit:displayName>ACP NAND</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe1000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x01000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>memory</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_NAND" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_IOP</spirit:name>
- <spirit:displayName>ACP IOP</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00400000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_IOP" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 0) && ((spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1)))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_UART0</spirit:name>
- <spirit:displayName>ACP UART0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_UART0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_UART1</spirit:name>
- <spirit:displayName>ACP UART0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0001000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_UART1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_USB0</spirit:name>
- <spirit:displayName>ACP USB0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0002000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_USB0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_USB1</spirit:name>
- <spirit:displayName>ACP USB1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0003000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_USB1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_IIC0</spirit:name>
- <spirit:displayName>ACP IIC0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0004000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_IIC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_IIC1</spirit:name>
- <spirit:displayName>ACP IIC1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0005000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_IIC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SPI0</spirit:name>
- <spirit:displayName>ACP SPI0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0006000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SPI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SPI1</spirit:name>
- <spirit:displayName>ACP SPI1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0007000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SPI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_CAN0</spirit:name>
- <spirit:displayName>ACP CAN0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0008000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_CAN0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_CAN1</spirit:name>
- <spirit:displayName>ACP CAN1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0009000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_CAN1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_GPIO</spirit:name>
- <spirit:displayName>ACP GPIO</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000A000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_GPIO" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_ENET0</spirit:name>
- <spirit:displayName>ACP ENET0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000B000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_ENET0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_ENET1</spirit:name>
- <spirit:displayName>ACP ENET1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000C000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_ENET1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_QSPI</spirit:name>
- <spirit:displayName>ACP QSPI</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000D000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_QSPI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SMC</spirit:name>
- <spirit:displayName>ACP SMC</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe000e000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SMC" xilinx:dependency="(((spirit:decode(id(PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE)) = 1) || (spirit:decode(id(PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE)) = 1)) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SDIO0</spirit:name>
- <spirit:displayName>ACP SDIO0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0100000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SDIO0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SDIO1</spirit:name>
- <spirit:displayName>ACP SDIO1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xe0101000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SDIO1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_IOP)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_PS_SLCR_REGS</spirit:name>
- <spirit:displayName>ACP PS REG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00010000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_PS_SLCR_REGS" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 0))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SLCR</spirit:name>
- <spirit:displayName>ACP SLCR</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SLCR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_TTC0</spirit:name>
- <spirit:displayName>ACP TTC0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8001000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_TTC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_TTC0_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_TTC1</spirit:name>
- <spirit:displayName>ACP TTC1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8002000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_TTC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_TTC1_PERIPHERAL_ENABLE)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_DMAC_S</spirit:name>
- <spirit:displayName>ACP DMAC S</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8003000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_DMAC_S" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_DMAC_NS</spirit:name>
- <spirit:displayName>ACP DMAC NS</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8004000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_DMAC_NS" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_SWDT</spirit:name>
- <spirit:displayName>ACP SWDT</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8005000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_SWDT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_WDT_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_DDRC</spirit:name>
- <spirit:displayName>ACP DDRC</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8006000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_DDRC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_DEVCFG</spirit:name>
- <spirit:displayName>ACP DEVCFG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8007000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_DEVCFG" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_AFI0</spirit:name>
- <spirit:displayName>ACP AFI0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8008000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_AFI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_AFI1</spirit:name>
- <spirit:displayName>ACP AFI1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8009000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_AFI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_AFI2</spirit:name>
- <spirit:displayName>ACP AFI2</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800A000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_AFI2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_AFI3</spirit:name>
- <spirit:displayName>ACP AFI3</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800B000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_AFI3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_OCM_REG</spirit:name>
- <spirit:displayName>ACP OCM REG</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf800C000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00001000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_OCM_REG" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_CORESIGHT</spirit:name>
- <spirit:displayName>ACP CORESIGHT</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0xf8800000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x00100000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_CORESIGHT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CORESIGHT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_M_AXI_GP0</spirit:name>
- <spirit:displayName>ACP M AXI GP0</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_M_AXI_GP0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:addressBlock>
- <spirit:name>ACP_M_AXI_GP1</spirit:name>
- <spirit:displayName>ACP M AXI GP1</spirit:displayName>
- <spirit:baseAddress spirit:format="bitString" spirit:bitStringLength="32">0x80000000</spirit:baseAddress>
- <spirit:range spirit:format="bitString" spirit:bitStringLength="32">0x40000000</spirit:range>
- <spirit:width spirit:format="long">32</spirit:width>
- <spirit:usage>register</spirit:usage>
- <spirit:vendorExtensions>
- <xilinx:addressBlockInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="ADDRBLOCK_ENABLEMENT.S_AXI_ACP.ACP_M_AXI_GP1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:addressBlockInfo>
- </spirit:vendorExtensions>
- </spirit:addressBlock>
- <spirit:vendorExtensions>
- <xilinx:memoryMapInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="MEMMAP_ENABLEMENT.S_AXI_ACP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:memoryMapInfo>
- </spirit:vendorExtensions>
- </spirit:memoryMap>
- </spirit:memoryMaps>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>xilinx_anylanguagesynthesis</spirit:name>
- <spirit:displayName>Synthesis</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis</spirit:envIdentifier>
- <spirit:modelName>processing_system7_v5_5_processing_system7</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagesynthesis_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:46 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:029d7739</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_synthesisconstraints</spirit:name>
- <spirit:displayName>Synthesis Constraints</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis.constraints</spirit:envIdentifier>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:029d7739</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesiswrapper</spirit:name>
- <spirit:displayName>Verilog Synthesis Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_processing_system7_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesiswrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:46 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:029d7739</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_anylanguagebehavioralsimulation</spirit:name>
- <spirit:displayName>Simulation</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:modelName>processing_system7_v1_0_processing_system7_vip</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_axi_infrastructure_1_1__ref_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_axi_vip_1_1__ref_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_processing_system7_vip_1_0__ref_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:2d5a2ffb</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_systemcsimulation</spirit:name>
- <spirit:displayName>SystemC Simulation</spirit:displayName>
- <spirit:envIdentifier>systemCSource:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:language>systemc</spirit:language>
- <spirit:modelName>processing_system7_v5_5_tlm</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_systemcsimulation_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:47 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9b5d7955</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sim_type</spirit:name>
- <spirit:value>tlm</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_anylanguagebehavioralsimulation_1</spirit:name>
- <spirit:displayName>Simulation</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:modelName>processing_system7</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagebehavioralsimulation_1_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:47 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:5e86920b</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sim_type</spirit:name>
- <spirit:value>tlm_dpi</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sls_compatible</spirit:name>
- <spirit:value>yes</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_anylanguagesimulationwrapper</spirit:name>
- <spirit:displayName>Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:modelName>scalp_zynqps_processing_system7_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagesimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:47 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:2d5a2ffb</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_systemcsimulationwrapper</spirit:name>
- <spirit:displayName>SystemC Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>systemCSource:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:language>systemc</spirit:language>
- <spirit:modelName>scalp_zynqps_processing_system7_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_systemcsimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:47 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:9b5d7955</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sim_type</spirit:name>
- <spirit:value>tlm</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_anylanguagesimulationwrapper_1</spirit:name>
- <spirit:displayName>Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:modelName>scalp_zynqps_processing_system7_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagesimulationwrapper_1_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:5e86920b</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sim_type</spirit:name>
- <spirit:value>tlm_dpi</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_externalfiles</spirit:name>
- <spirit:displayName>External Files</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:external.files</spirit:envIdentifier>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_externalfiles_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:58:39 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:029d7739</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>CAN0_PHY_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.CAN0_PHY_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CAN0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>CAN0_PHY_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.CAN0_PHY_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CAN0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>CAN1_PHY_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.CAN1_PHY_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CAN1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>CAN1_PHY_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.CAN1_PHY_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CAN1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_TX_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">0</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>reg</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_TX_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_TX_ER</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">0</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>reg</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_TX_ER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_MDIO_MDC</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_MDIO_MDC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_MDIO_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_MDIO_O" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_MDIO_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_MDIO_T" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_DELAY_REQ_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_DELAY_REQ_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_DELAY_REQ_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_DELAY_REQ_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_PDELAY_REQ_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_PDELAY_REQ_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_PDELAY_REQ_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_PDELAY_REQ_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_PDELAY_RESP_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_PDELAY_RESP_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_PDELAY_RESP_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_PDELAY_RESP_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_SYNC_FRAME_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_SYNC_FRAME_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_PTP_SYNC_FRAME_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_PTP_SYNC_FRAME_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_SOF_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_SOF_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_SOF_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_SOF_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_TXD</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>reg</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_TXD" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_COL</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_COL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_CRS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_CRS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_RX_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_RX_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_RX_DV</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_RX_DV" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_RX_ER</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_RX_ER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_TX_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_TX_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_MDIO_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_MDIO_I" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_EXT_INTIN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_EXT_INTIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET0_GMII_RXD</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET0_GMII_RXD" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_TX_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">0</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>reg</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_TX_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_TX_ER</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">0</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>reg</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_TX_ER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_MDIO_MDC</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_MDIO_MDC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_MDIO_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_MDIO_O" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_MDIO_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_MDIO_T" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_DELAY_REQ_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_DELAY_REQ_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_DELAY_REQ_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_DELAY_REQ_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_PDELAY_REQ_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_PDELAY_REQ_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_PDELAY_REQ_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_PDELAY_REQ_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_PDELAY_RESP_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_PDELAY_RESP_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_PDELAY_RESP_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_PDELAY_RESP_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_SYNC_FRAME_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_SYNC_FRAME_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_PTP_SYNC_FRAME_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_PTP_SYNC_FRAME_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_SOF_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_SOF_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_SOF_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_SOF_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1 && spirit:decode(id(PARAM_VALUE.PCW_EN_PTP_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_TXD</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>reg</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_TXD" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_COL</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_COL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_CRS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_CRS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_RX_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_RX_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_RX_DV</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_RX_DV" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_RX_ER</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_RX_ER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_TX_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_TX_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_MDIO_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_MDIO_I" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO)) = 'EMIO') && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_EXT_INTIN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_EXT_INTIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>ENET1_GMII_RXD</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.ENET1_GMII_RXD" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>GPIO_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_EMIO_GPIO_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.GPIO_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_GPIO)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>GPIO_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_EMIO_GPIO_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.GPIO_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_GPIO)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>GPIO_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_EMIO_GPIO_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.GPIO_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_GPIO)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C0_SDA_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C0_SDA_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C0_SDA_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C0_SDA_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C0_SDA_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C0_SDA_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C0_SCL_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C0_SCL_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C0_SCL_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C0_SCL_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C0_SCL_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C0_SCL_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C1_SDA_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C1_SDA_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C1_SDA_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C1_SDA_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C1_SDA_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C1_SDA_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C1_SCL_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C1_SCL_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C1_SCL_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C1_SCL_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>I2C1_SCL_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.I2C1_SCL_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_I2C1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>PJTAG_TCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.PJTAG_TCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_PJTAG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>PJTAG_TMS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.PJTAG_TMS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_PJTAG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>PJTAG_TDI</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.PJTAG_TDI" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_PJTAG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>PJTAG_TDO</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.PJTAG_TDO" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_PJTAG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_CLK_FB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_CLK_FB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_CMD_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_CMD_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_CMD_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_CMD_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_CMD_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_CMD_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_DATA_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_DATA_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_DATA_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_DATA_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_DATA_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_DATA_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_LED</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_LED" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_CDN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_CDN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CD_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_WP</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_WP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_WP_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_BUSPOW</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_BUSPOW" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO0_BUSVOLT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO0_BUSVOLT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_CLK_FB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_CLK_FB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_CMD_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_CMD_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_CMD_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_CMD_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_CMD_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_CMD_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_DATA_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_DATA_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_DATA_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_DATA_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_DATA_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_DATA_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_LED</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_LED" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_CDN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_CDN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_WP</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_WP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_BUSPOW</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_BUSPOW" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SDIO1_BUSVOLT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SDIO1_BUSVOLT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SDIO1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SCLK_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SCLK_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SCLK_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SCLK_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SCLK_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SCLK_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_MOSI_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_MOSI_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_MOSI_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_MOSI_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_MOSI_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_MOSI_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_MISO_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_MISO_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_MISO_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_MISO_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_MISO_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_MISO_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SS_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SS_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SS_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SS_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SS1_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SS1_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SS2_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SS2_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI0_SS_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI0_SS_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SCLK_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SCLK_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SCLK_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SCLK_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SCLK_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SCLK_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_MOSI_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_MOSI_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_MOSI_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_MOSI_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_MOSI_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_MOSI_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_MISO_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_MISO_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_MISO_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_MISO_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_MISO_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_MISO_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SS_I</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SS_I" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SS_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SS_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SS1_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SS1_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SS2_O</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SS2_O" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SPI1_SS_T</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SPI1_SS_T" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SPI1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_DTRN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_DTRN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_RTSN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_RTSN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_CTSN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_CTSN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_DCDN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_DCDN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_DSRN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_DSRN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_RIN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_RIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART0_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">1</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART0_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_UART0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_DTRN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_DTRN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_RTSN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_RTSN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_TX</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_TX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_CTSN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_CTSN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_DCDN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_DCDN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_DSRN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_DSRN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_RIN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_RIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>UART1_RX</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">1</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.UART1_RX" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_UART1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC0_WAVE0_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC0_WAVE0_OUT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC0_WAVE1_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC0_WAVE1_OUT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC0_WAVE2_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC0_WAVE2_OUT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC0_CLK0_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC0_CLK0_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC0_CLK1_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC0_CLK1_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC0_CLK2_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC0_CLK2_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC0)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC1_WAVE0_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC1_WAVE0_OUT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC1_WAVE1_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC1_WAVE1_OUT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC1_WAVE2_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC1_WAVE2_OUT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC1_CLK0_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC1_CLK0_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC1_CLK1_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC1_CLK1_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TTC1_CLK2_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TTC1_CLK2_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC1)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>WDT_CLK_IN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.WDT_CLK_IN" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_WDT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_WDT_PERIPHERAL_CLKSRC)) = 'External'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>WDT_RST_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.WDT_RST_OUT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_WDT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TRACE_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TRACE_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TRACE_CLK_OUT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TRACE_CLK_OUT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TRACE_CTL</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TRACE_CTL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>TRACE_DATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_TRACE_INTERNAL_WIDTH)) - 1)" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.TRACE_DATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>USB0_PORT_INDCTL</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.USB0_PORT_INDCTL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>USB0_VBUS_PWRSELECT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.USB0_VBUS_PWRSELECT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>USB0_VBUS_PWRFAULT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.USB0_VBUS_PWRFAULT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>USB1_PORT_INDCTL</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.USB1_PORT_INDCTL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>USB1_VBUS_PWRSELECT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.USB1_VBUS_PWRSELECT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>USB1_VBUS_PWRFAULT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.USB1_VBUS_PWRFAULT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>SRAM_INTIN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.SRAM_INTIN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_SRAM_INT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP0_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP0_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP0_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP0_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP0_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP0_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP1_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP1_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP1_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP1_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_M_AXI_GP1_THREAD_ID_WIDTH)) - 1)" spirit:bitStringLength="0">11</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.M_AXI_GP1_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP0_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_GP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_GP1_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_ACP_ID_WIDTH)) - 1)" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_ACP_ID_WIDTH)) - 1)" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_ACP_ID_WIDTH)) - 1)" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_ACP_ID_WIDTH)) - 1)" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_ACP_ID_WIDTH)) - 1)" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_ARUSER</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">4</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_ARUSER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_AWUSER</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">4</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_AWUSER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_ACP_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RDISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RDISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WRISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WRISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP0_DATA_WIDTH)) div 8) - 1)" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP0_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RDISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RDISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WRISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WRISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP1_DATA_WIDTH)) div 8) - 1)" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP1_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RDISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RDISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WRISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WRISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP2_DATA_WIDTH)) div 8) - 1)" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP2_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_BVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_BVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_BRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_BRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RRESP</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RRESP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_BID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_BID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WCOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WCOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WACOUNT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WACOUNT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_BREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_BREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RDISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RDISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_RREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_RREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WRISSUECAP1_EN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WRISSUECAP1_EN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWBURST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWBURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWLOCK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWLOCK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWSIZE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWSIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWPROT</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWPROT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWADDR</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWCACHE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWCACHE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWLEN</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWLEN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWQOS</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWQOS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_ARID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_ARID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_AWID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_AWID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_ID_WIDTH)) - 1)" spirit:bitStringLength="0">5</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WDATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_DATA_WIDTH)) - 1)" spirit:bitStringLength="0">63</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WDATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_WSTRB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="((spirit:decode(id(MODELPARAM_VALUE.C_S_AXI_HP3_DATA_WIDTH)) div 8) - 1)" spirit:bitStringLength="0">7</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.S_AXI_HP3_WSTRB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC_ABORT</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC_ABORT" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC_ABORT_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC2</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC2_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC3</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC3_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC4</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC4" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC4_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC5</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC5" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC5_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC6</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC6" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC6_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_DMAC7</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_DMAC7" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_DMAC7_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_SMC</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_SMC" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SMC_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_QSPI</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_QSPI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_QSPI_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_CTI</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_CTI" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_CTI_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_GPIO</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_GPIO" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_GPIO_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_USB0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_USB0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_USB0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_ENET0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_ENET0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_ENET_WAKE0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_ENET_WAKE0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_SDIO0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_SDIO0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SDIO0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_I2C0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_I2C0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_I2C0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_SPI0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_SPI0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SPI0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_UART0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_UART0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_UART0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_CAN0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_CAN0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_CAN0_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_USB1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_USB1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_USB1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_ENET1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_ENET1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_ENET_WAKE1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_ENET_WAKE1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_ENET1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_SDIO1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_SDIO1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SDIO1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_I2C1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_I2C1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_I2C1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_SPI1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_SPI1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_SPI1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_UART1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_UART1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_UART1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_P2F_CAN1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_P2F_CAN1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_P2F_CAN1_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>IRQ_F2P</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_NUM_F2P_INTR_INPUTS)) - 1)" spirit:bitStringLength="0">0</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.IRQ_F2P" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_IRQ_F2P_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>Core0_nFIQ</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.Core0_nFIQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE0_FIQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>Core0_nIRQ</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.Core0_nIRQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE0_IRQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>Core1_nFIQ</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.Core1_nFIQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE1_FIQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>Core1_nIRQ</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.Core1_nIRQ" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CORE1_IRQ_INTR)) = 1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DATYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DATYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DAVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DAVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DRREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DRREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DATYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DATYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DAVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DAVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DRREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DRREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DATYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DATYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DAVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DAVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DRREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DRREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DATYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DATYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DAVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DAVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DRREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DRREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DAREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DAREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DRLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DRLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DRVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DRVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DAREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DAREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DRLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DRLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DRVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DRVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DAREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DAREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DRLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DRLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DRVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DRVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_ACLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_ACLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DAREADY</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DAREADY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DRLAST</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DRLAST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DRVALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DRVALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA0_DRTYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA0_DRTYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA1_DRTYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA1_DRTYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA2_DRTYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA2_DRTYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DMA3_DRTYPE</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DMA3_DRTYPE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLK0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLK0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK0_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLK1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLK1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK1_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLK2</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLK2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK2_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLK3</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLK3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLK3_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLKTRIG0_N</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLKTRIG0_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLKTRIG0_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLKTRIG1_N</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLKTRIG1_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLKTRIG1_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLKTRIG2_N</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLKTRIG2_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLKTRIG2_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_CLKTRIG3_N</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_CLKTRIG3_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_CLKTRIG3_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_RESET0_N</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_RESET0_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST0_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_RESET1_N</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_RESET1_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST1_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_RESET2_N</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_RESET2_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST2_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FCLK_RESET3_N</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FCLK_RESET3_N" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_EN_RST3_PORT))=1) && (spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC))=1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMD_TRACEIN_DATA</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMD_TRACEIN_DATA" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMD_TRACEIN_VALID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMD_TRACEIN_VALID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMD_TRACEIN_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMD_TRACEIN_CLK" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMD_TRACEIN_ATID</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMD_TRACEIN_ATID" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIG_0</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIG_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN0)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIGACK_0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIGACK_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN0)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIG_1</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIG_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN1)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIGACK_1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIGACK_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN1)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIG_2</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIG_2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN2)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIGACK_2</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIGACK_2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN2)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIG_3</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIG_3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN3)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_TRIGACK_3</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_TRIGACK_3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_IN3)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_F2P_DEBUG</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_F2P_DEBUG" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DEBUG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIGACK_0</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIGACK_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT0)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIG_0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIG_0" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT0)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIGACK_1</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIGACK_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT1)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIG_1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIG_1" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT1)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIGACK_2</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIGACK_2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT2)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIG_2</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIG_2" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT2)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIGACK_3</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIGACK_3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT3)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_TRIG_3</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_TRIG_3" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER))=1) && (spirit:decode(id(PARAM_VALUE.PCW_FTM_CTI_OUT3)) != 'DISABLED'))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FTMT_P2F_DEBUG</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FTMT_P2F_DEBUG" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DEBUG)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>FPGA_IDLE_N</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.FPGA_IDLE_N" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_AXI_FABRIC_IDLE)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>EVENT_EVENTO</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.EVENT_EVENTO" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_PROC_EVENT_BUS)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>EVENT_STANDBYWFE</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.EVENT_STANDBYWFE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_PROC_EVENT_BUS)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>EVENT_STANDBYWFI</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">1</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.EVENT_STANDBYWFI" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_PROC_EVENT_BUS)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>EVENT_EVENTI</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.EVENT_EVENTI" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_PROC_EVENT_BUS)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_ARB</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_ARB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_DDR_BYPASS)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>MIO</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_MIO_PRIMITIVE)) - 1)" spirit:bitStringLength="0">53</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_CAS_n</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_CAS_n" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_CKE</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_CKE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_Clk_n</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_Clk_n" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_Clk</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_Clk" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_CS_n</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_CS_n" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_DRSTB</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_DRSTB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_ODT</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_ODT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_RAS_n</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_RAS_n" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_WEB</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_WEB" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_BankAddr</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">2</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_BankAddr" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_Addr</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:bitStringLength="0">14</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_Addr" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_VRN</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_VRN" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_VRP</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_VRP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_DM</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_DM_WIDTH)) - 1)" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_DM" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_DQ</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_DQ_WIDTH)) - 1)" spirit:bitStringLength="0">31</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_DQ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_DQS_n</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_DQS_WIDTH)) - 1)" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_DQS_n" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>DDR_DQS</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id(MODELPARAM_VALUE.C_DQS_WIDTH)) - 1)" spirit:bitStringLength="0">3</spirit:left>
- <spirit:right spirit:format="long" spirit:bitStringLength="0">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.DDR_DQS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>PS_SRSTB</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>PS_CLK</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>PS_PORB</spirit:name>
- <spirit:wire>
- <spirit:direction>inout</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_initiator_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>requires</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP0_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_initiator_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>requires</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_initiator_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>requires</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>M_AXI_GP1_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_initiator_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>requires</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP0_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_GP1_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP0_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP1_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP2_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_HP3_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_rd_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>rd_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- <spirit:port>
- <spirit:name>S_AXI_ACP_wr_socket</spirit:name>
- <spirit:transactional>
- <spirit:transTypeDef>
- <spirit:typeName>xtlm::xtlm_aximm_target_socket</spirit:typeName>
- <spirit:typeDefinition>xtlm.h</spirit:typeDefinition>
- </spirit:transTypeDef>
- <spirit:service>
- <spirit:initiative>provides</spirit:initiative>
- <spirit:serviceTypeDefs>
- <spirit:serviceTypeDef>
- <spirit:typeName>tlm</spirit:typeName>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>name</spirit:name>
- <spirit:value>wr_socket</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>width</spirit:name>
- <spirit:value>32</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:serviceTypeDef>
- </spirit:serviceTypeDefs>
- </spirit:service>
- <spirit:connection>
- <spirit:maxConnections>1</spirit:maxConnections>
- </spirit:connection>
- </spirit:transactional>
- </spirit:port>
- </spirit:ports>
- <spirit:modelParameters>
- <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="INTEGER">
- <spirit:name>C_EN_EMIO_PJTAG</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_EN_EMIO_PJTAG" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_PJTAG))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_EN_EMIO_ENET0</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_EN_EMIO_ENET0" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET0))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_EN_EMIO_ENET1</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_EN_EMIO_ENET1" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_ENET1))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_EN_EMIO_TRACE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_EN_EMIO_TRACE" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_INCLUDE_TRACE_BUFFER</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_INCLUDE_TRACE_BUFFER" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_INCLUDE_TRACE_BUFFER))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_TRACE_BUFFER_FIFO_SIZE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_TRACE_BUFFER_FIFO_SIZE" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_TRACE_BUFFER_FIFO_SIZE))">128</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>USE_TRACE_DATA_EDGE_DETECTOR</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.USE_TRACE_DATA_EDGE_DETECTOR" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE_DATA_EDGE_DETECTOR))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_TRACE_PIPELINE_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_TRACE_PIPELINE_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_TRACE_PIPELINE_WIDTH))">8</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_TRACE_BUFFER_CLOCK_DELAY</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_TRACE_BUFFER_CLOCK_DELAY" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_TRACE_BUFFER_CLOCK_DELAY))">12</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_EMIO_GPIO_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_EMIO_GPIO_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_GPIO_EMIO_GPIO_WIDTH))">64</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_INCLUDE_ACP_TRANS_CHECK</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_INCLUDE_ACP_TRANS_CHECK" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_INCLUDE_ACP_TRANS_CHECK))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_DEFAULT_ACP_USER_VAL</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_DEFAULT_ACP_USER_VAL" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_DEFAULT_ACP_USER_VAL))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_ACP_ARUSER_VAL</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_ACP_ARUSER_VAL" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_ACP_ARUSER_VAL))">31</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_ACP_AWUSER_VAL</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_ACP_AWUSER_VAL" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_ACP_AWUSER_VAL))">31</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_M_AXI_GP0_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_M_AXI_GP0_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP0_ID_WIDTH))">12</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_M_AXI_GP0_ENABLE_STATIC_REMAP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_M_AXI_GP0_ENABLE_STATIC_REMAP" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP0_ENABLE_STATIC_REMAP))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_M_AXI_GP1_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_M_AXI_GP1_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP1_ID_WIDTH))">12</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_M_AXI_GP1_ENABLE_STATIC_REMAP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_M_AXI_GP1_ENABLE_STATIC_REMAP" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP1_ENABLE_STATIC_REMAP))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_GP0_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_GP0_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_GP0_ID_WIDTH))">6</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_GP1_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_GP1_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_GP1_ID_WIDTH))">6</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_ACP_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_ACP_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_ACP_ID_WIDTH))">3</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP0_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP0_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP0_ID_WIDTH))">6</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP0_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP0_DATA_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP0_DATA_WIDTH))">64</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP1_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP1_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP1_ID_WIDTH))">6</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP1_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP1_DATA_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP1_DATA_WIDTH))">64</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP2_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP2_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP2_ID_WIDTH))">6</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP2_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP2_DATA_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP2_DATA_WIDTH))">64</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP3_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP3_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP3_ID_WIDTH))">6</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_S_AXI_HP3_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_S_AXI_HP3_DATA_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_S_AXI_HP3_DATA_WIDTH))">64</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_M_AXI_GP0_THREAD_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_M_AXI_GP0_THREAD_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP0_THREAD_ID_WIDTH))">12</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_M_AXI_GP1_THREAD_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_M_AXI_GP1_THREAD_ID_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_M_AXI_GP1_THREAD_ID_WIDTH))">12</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_NUM_F2P_INTR_INPUTS</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_NUM_F2P_INTR_INPUTS" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_NUM_F2P_INTR_INPUTS))">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_IRQ_F2P_MODE</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_IRQ_F2P_MODE" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_IRQ_F2P_MODE))">DIRECT</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_DQ_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_DQ_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_DQ_WIDTH))">32</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_DQS_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_DQS_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_DQS_WIDTH))">4</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_DM_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_DM_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_DM_WIDTH))">4</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_MIO_PRIMITIVE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_MIO_PRIMITIVE" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_MIO_PRIMITIVE))">54</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_TRACE_INTERNAL_WIDTH</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_TRACE_INTERNAL_WIDTH" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_TRACE_INTERNAL_WIDTH))">2</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_AXI_NONSECURE</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_AXI_NONSECURE" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_AXI_NONSECURE))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_M_AXI_GP0</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_M_AXI_GP0" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0))">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_M_AXI_GP1</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_M_AXI_GP1" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_GP0</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_GP0" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_GP1</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_GP1" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_HP0</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_HP0" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_HP1</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_HP1" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_HP2</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_HP2" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_HP3</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_HP3" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="INTEGER">
- <spirit:name>C_USE_S_AXI_ACP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_USE_S_AXI_ACP" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP))">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_PS7_SI_REV</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PS7_SI_REV" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_PS7_SI_REV))">PRODUCTION</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_FCLK_CLK0_BUF</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_FCLK_CLK0_BUF" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_FCLK_CLK0_BUF))">TRUE</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_FCLK_CLK1_BUF</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_FCLK_CLK1_BUF" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_FCLK_CLK1_BUF))">FALSE</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_FCLK_CLK2_BUF</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_FCLK_CLK2_BUF" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_FCLK_CLK2_BUF))">FALSE</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_FCLK_CLK3_BUF</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_FCLK_CLK3_BUF" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_FCLK_CLK3_BUF))">FALSE</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_PACKAGE_NAME</spirit:name>
- <spirit:value spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PACKAGE_NAME" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_PACKAGE_NAME))">clg485</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_GP0_EN_MODIFIABLE_TXN</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_GP0_EN_MODIFIABLE_TXN" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_GP0_EN_MODIFIABLE_TXN))">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="STRING">
- <spirit:name>C_GP1_EN_MODIFIABLE_TXN</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_GP1_EN_MODIFIABLE_TXN" spirit:dependency="spirit:decode(id(PARAM_VALUE.PCW_GP1_EN_MODIFIABLE_TXN))">1</spirit:value>
- </spirit:modelParameter>
- </spirit:modelParameters>
- </spirit:model>
- <spirit:choices>
- <spirit:choice>
- <spirit:name>choice_list_020b381d</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 40 .. 51</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_070fff2f</spirit:name>
- <spirit:enumeration>1</spirit:enumeration>
- <spirit:enumeration>2</spirit:enumeration>
- <spirit:enumeration>3</spirit:enumeration>
- <spirit:enumeration>4</spirit:enumeration>
- <spirit:enumeration>5</spirit:enumeration>
- <spirit:enumeration>6</spirit:enumeration>
- <spirit:enumeration>7</spirit:enumeration>
- <spirit:enumeration>8</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_0d7de060</spirit:name>
- <spirit:enumeration>ARM PLL</spirit:enumeration>
- <spirit:enumeration>DDR PLL</spirit:enumeration>
- <spirit:enumeration>IO PLL</spirit:enumeration>
- <spirit:enumeration>External</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_0f5c91ba</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 8 .. 9</spirit:enumeration>
- <spirit:enumeration>MIO 12 .. 13</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 17</spirit:enumeration>
- <spirit:enumeration>MIO 20 .. 21</spirit:enumeration>
- <spirit:enumeration>MIO 24 .. 25</spirit:enumeration>
- <spirit:enumeration>MIO 28 .. 29</spirit:enumeration>
- <spirit:enumeration>MIO 32 .. 33</spirit:enumeration>
- <spirit:enumeration>MIO 36 .. 37</spirit:enumeration>
- <spirit:enumeration>MIO 40 .. 41</spirit:enumeration>
- <spirit:enumeration>MIO 44 .. 45</spirit:enumeration>
- <spirit:enumeration>MIO 48 .. 49</spirit:enumeration>
- <spirit:enumeration>MIO 52 .. 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_1075ca33</spirit:name>
- <spirit:enumeration>4</spirit:enumeration>
- <spirit:enumeration>2</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_13f07802</spirit:name>
- <spirit:enumeration>DISABLED</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_1622b516</spirit:name>
- <spirit:enumeration>MIO 28 .. 39</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_1a80fa5a</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 18 .. 19</spirit:enumeration>
- <spirit:enumeration>MIO 30 .. 31</spirit:enumeration>
- <spirit:enumeration>MIO 42 .. 43</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_2091a159</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 0 2.. 14</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_20dc6536</spirit:name>
- <spirit:enumeration>32</spirit:enumeration>
- <spirit:enumeration>16</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_2328412a</spirit:name>
- <spirit:enumeration>HPR(0)/LPR(32)</spirit:enumeration>
- <spirit:enumeration>HPR(8)/LPR(24)</spirit:enumeration>
- <spirit:enumeration>HPR(16)/LPR(16)</spirit:enumeration>
- <spirit:enumeration>HPR(24)/LPR(8)</spirit:enumeration>
- <spirit:enumeration>HPR(32)/LPR(0)</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_27376075</spirit:name>
- <spirit:enumeration>12</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_2d7daef4</spirit:name>
- <spirit:enumeration>disabled</spirit:enumeration>
- <spirit:enumeration>enabled</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_2e355d8b</spirit:name>
- <spirit:enumeration>Normal (0-85)</spirit:enumeration>
- <spirit:enumeration>High (95 Max)</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_303d848a</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 1</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_30d18a73</spirit:name>
- <spirit:enumeration>0xE0105fff</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_319636fe</spirit:name>
- <spirit:enumeration>0xE0104fff</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_32c7371b</spirit:name>
- <spirit:enumeration>128 MBits</spirit:enumeration>
- <spirit:enumeration>256 MBits</spirit:enumeration>
- <spirit:enumeration>512 MBits</spirit:enumeration>
- <spirit:enumeration>1024 MBits</spirit:enumeration>
- <spirit:enumeration>2048 MBits</spirit:enumeration>
- <spirit:enumeration>4096 MBits</spirit:enumeration>
- <spirit:enumeration>8192 MBits</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_353a343d</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 3 .. 39</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_35b40bd0</spirit:name>
- <spirit:enumeration>6</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_3607bdd0</spirit:name>
- <spirit:enumeration>0xE0102fff</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_3740015d</spirit:name>
- <spirit:enumeration>0xE0103fff</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_390b0393</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 21</spirit:enumeration>
- <spirit:enumeration>MIO 28 .. 33</spirit:enumeration>
- <spirit:enumeration>MIO 40 .. 45</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_3b9f1944</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>x8</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_3c74058c</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 0</spirit:enumeration>
- <spirit:enumeration>MIO 2</spirit:enumeration>
- <spirit:enumeration>MIO 4</spirit:enumeration>
- <spirit:enumeration>MIO 6</spirit:enumeration>
- <spirit:enumeration>MIO 8</spirit:enumeration>
- <spirit:enumeration>MIO 10</spirit:enumeration>
- <spirit:enumeration>MIO 12</spirit:enumeration>
- <spirit:enumeration>MIO 14</spirit:enumeration>
- <spirit:enumeration>MIO 16</spirit:enumeration>
- <spirit:enumeration>MIO 18</spirit:enumeration>
- <spirit:enumeration>MIO 20</spirit:enumeration>
- <spirit:enumeration>MIO 22</spirit:enumeration>
- <spirit:enumeration>MIO 24</spirit:enumeration>
- <spirit:enumeration>MIO 26</spirit:enumeration>
- <spirit:enumeration>MIO 28</spirit:enumeration>
- <spirit:enumeration>MIO 30</spirit:enumeration>
- <spirit:enumeration>MIO 32</spirit:enumeration>
- <spirit:enumeration>MIO 34</spirit:enumeration>
- <spirit:enumeration>MIO 36</spirit:enumeration>
- <spirit:enumeration>MIO 38</spirit:enumeration>
- <spirit:enumeration>MIO 40</spirit:enumeration>
- <spirit:enumeration>MIO 42</spirit:enumeration>
- <spirit:enumeration>MIO 44</spirit:enumeration>
- <spirit:enumeration>MIO 46</spirit:enumeration>
- <spirit:enumeration>MIO 48</spirit:enumeration>
- <spirit:enumeration>MIO 50</spirit:enumeration>
- <spirit:enumeration>MIO 52</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_3f5f808e</spirit:name>
- <spirit:enumeration>LVCMOS 3.3V</spirit:enumeration>
- <spirit:enumeration>LVCMOS 2.5V</spirit:enumeration>
- <spirit:enumeration>HSTL 1.8V</spirit:enumeration>
- <spirit:enumeration>LVCMOS 1.8V</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_45a0fd9c</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 14 .. 15</spirit:enumeration>
- <spirit:enumeration>MIO 26 .. 27</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_46eb370a</spirit:name>
- <spirit:enumeration>DIRECT</spirit:enumeration>
- <spirit:enumeration>REVERSE</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_49727578</spirit:name>
- <spirit:enumeration>0x00100000</spirit:enumeration>
- <spirit:enumeration>0x00040000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_4b3359e9</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 15</spirit:enumeration>
- <spirit:enumeration>MIO 27</spirit:enumeration>
- <spirit:enumeration>MIO 39</spirit:enumeration>
- <spirit:enumeration>MIO 51</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_4d36a164</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>Low</spirit:enumeration>
- <spirit:enumeration>Medium</spirit:enumeration>
- <spirit:enumeration>High</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_56e9f994</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 10 .. 13</spirit:enumeration>
- <spirit:enumeration>MIO 22 .. 25</spirit:enumeration>
- <spirit:enumeration>MIO 34 .. 37</spirit:enumeration>
- <spirit:enumeration>MIO 46 .. 49</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_5beb845c</spirit:name>
- <spirit:enumeration>x1</spirit:enumeration>
- <spirit:enumeration>x2</spirit:enumeration>
- <spirit:enumeration>x4</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_5d0f73c4</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 10 .. 11</spirit:enumeration>
- <spirit:enumeration>MIO 14 .. 15</spirit:enumeration>
- <spirit:enumeration>MIO 18 .. 19</spirit:enumeration>
- <spirit:enumeration>MIO 22 .. 23</spirit:enumeration>
- <spirit:enumeration>MIO 26 .. 27</spirit:enumeration>
- <spirit:enumeration>MIO 30 .. 31</spirit:enumeration>
- <spirit:enumeration>MIO 34 .. 35</spirit:enumeration>
- <spirit:enumeration>MIO 38 .. 39</spirit:enumeration>
- <spirit:enumeration>MIO 42 .. 43</spirit:enumeration>
- <spirit:enumeration>MIO 46 .. 47</spirit:enumeration>
- <spirit:enumeration>MIO 50 .. 51</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_5d70a6b7</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>1</spirit:enumeration>
- <spirit:enumeration>2</spirit:enumeration>
- <spirit:enumeration>3</spirit:enumeration>
- <spirit:enumeration>4</spirit:enumeration>
- <spirit:enumeration>5</spirit:enumeration>
- <spirit:enumeration>6</spirit:enumeration>
- <spirit:enumeration>7</spirit:enumeration>
- <spirit:enumeration>8</spirit:enumeration>
- <spirit:enumeration>9</spirit:enumeration>
- <spirit:enumeration>10</spirit:enumeration>
- <spirit:enumeration>11</spirit:enumeration>
- <spirit:enumeration>12</spirit:enumeration>
- <spirit:enumeration>13</spirit:enumeration>
- <spirit:enumeration>14</spirit:enumeration>
- <spirit:enumeration>15</spirit:enumeration>
- <spirit:enumeration>16</spirit:enumeration>
- <spirit:enumeration>17</spirit:enumeration>
- <spirit:enumeration>18</spirit:enumeration>
- <spirit:enumeration>19</spirit:enumeration>
- <spirit:enumeration>20</spirit:enumeration>
- <spirit:enumeration>21</spirit:enumeration>
- <spirit:enumeration>22</spirit:enumeration>
- <spirit:enumeration>23</spirit:enumeration>
- <spirit:enumeration>24</spirit:enumeration>
- <spirit:enumeration>25</spirit:enumeration>
- <spirit:enumeration>26</spirit:enumeration>
- <spirit:enumeration>27</spirit:enumeration>
- <spirit:enumeration>28</spirit:enumeration>
- <spirit:enumeration>29</spirit:enumeration>
- <spirit:enumeration>30</spirit:enumeration>
- <spirit:enumeration>31</spirit:enumeration>
- <spirit:enumeration>32</spirit:enumeration>
- <spirit:enumeration>33</spirit:enumeration>
- <spirit:enumeration>34</spirit:enumeration>
- <spirit:enumeration>35</spirit:enumeration>
- <spirit:enumeration>36</spirit:enumeration>
- <spirit:enumeration>37</spirit:enumeration>
- <spirit:enumeration>38</spirit:enumeration>
- <spirit:enumeration>39</spirit:enumeration>
- <spirit:enumeration>40</spirit:enumeration>
- <spirit:enumeration>41</spirit:enumeration>
- <spirit:enumeration>42</spirit:enumeration>
- <spirit:enumeration>43</spirit:enumeration>
- <spirit:enumeration>44</spirit:enumeration>
- <spirit:enumeration>45</spirit:enumeration>
- <spirit:enumeration>46</spirit:enumeration>
- <spirit:enumeration>47</spirit:enumeration>
- <spirit:enumeration>48</spirit:enumeration>
- <spirit:enumeration>49</spirit:enumeration>
- <spirit:enumeration>50</spirit:enumeration>
- <spirit:enumeration>51</spirit:enumeration>
- <spirit:enumeration>52</spirit:enumeration>
- <spirit:enumeration>53</spirit:enumeration>
- <spirit:enumeration>54</spirit:enumeration>
- <spirit:enumeration>55</spirit:enumeration>
- <spirit:enumeration>56</spirit:enumeration>
- <spirit:enumeration>57</spirit:enumeration>
- <spirit:enumeration>58</spirit:enumeration>
- <spirit:enumeration>59</spirit:enumeration>
- <spirit:enumeration>60</spirit:enumeration>
- <spirit:enumeration>61</spirit:enumeration>
- <spirit:enumeration>62</spirit:enumeration>
- <spirit:enumeration>63</spirit:enumeration>
- <spirit:enumeration>64</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_606c1634</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 52 .. 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6727dfa6</spirit:name>
- <spirit:enumeration>1</spirit:enumeration>
- <spirit:enumeration>0</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6a282484</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 0</spirit:enumeration>
- <spirit:enumeration>MIO 1</spirit:enumeration>
- <spirit:enumeration>MIO 2</spirit:enumeration>
- <spirit:enumeration>MIO 3</spirit:enumeration>
- <spirit:enumeration>MIO 4</spirit:enumeration>
- <spirit:enumeration>MIO 5</spirit:enumeration>
- <spirit:enumeration>MIO 6</spirit:enumeration>
- <spirit:enumeration>MIO 9</spirit:enumeration>
- <spirit:enumeration>MIO 10</spirit:enumeration>
- <spirit:enumeration>MIO 11</spirit:enumeration>
- <spirit:enumeration>MIO 12</spirit:enumeration>
- <spirit:enumeration>MIO 13</spirit:enumeration>
- <spirit:enumeration>MIO 14</spirit:enumeration>
- <spirit:enumeration>MIO 15</spirit:enumeration>
- <spirit:enumeration>MIO 16</spirit:enumeration>
- <spirit:enumeration>MIO 17</spirit:enumeration>
- <spirit:enumeration>MIO 18</spirit:enumeration>
- <spirit:enumeration>MIO 19</spirit:enumeration>
- <spirit:enumeration>MIO 20</spirit:enumeration>
- <spirit:enumeration>MIO 21</spirit:enumeration>
- <spirit:enumeration>MIO 22</spirit:enumeration>
- <spirit:enumeration>MIO 23</spirit:enumeration>
- <spirit:enumeration>MIO 24</spirit:enumeration>
- <spirit:enumeration>MIO 25</spirit:enumeration>
- <spirit:enumeration>MIO 26</spirit:enumeration>
- <spirit:enumeration>MIO 27</spirit:enumeration>
- <spirit:enumeration>MIO 28</spirit:enumeration>
- <spirit:enumeration>MIO 29</spirit:enumeration>
- <spirit:enumeration>MIO 30</spirit:enumeration>
- <spirit:enumeration>MIO 31</spirit:enumeration>
- <spirit:enumeration>MIO 32</spirit:enumeration>
- <spirit:enumeration>MIO 33</spirit:enumeration>
- <spirit:enumeration>MIO 34</spirit:enumeration>
- <spirit:enumeration>MIO 35</spirit:enumeration>
- <spirit:enumeration>MIO 36</spirit:enumeration>
- <spirit:enumeration>MIO 37</spirit:enumeration>
- <spirit:enumeration>MIO 38</spirit:enumeration>
- <spirit:enumeration>MIO 39</spirit:enumeration>
- <spirit:enumeration>MIO 40</spirit:enumeration>
- <spirit:enumeration>MIO 41</spirit:enumeration>
- <spirit:enumeration>MIO 42</spirit:enumeration>
- <spirit:enumeration>MIO 43</spirit:enumeration>
- <spirit:enumeration>MIO 44</spirit:enumeration>
- <spirit:enumeration>MIO 45</spirit:enumeration>
- <spirit:enumeration>MIO 46</spirit:enumeration>
- <spirit:enumeration>MIO 47</spirit:enumeration>
- <spirit:enumeration>MIO 48</spirit:enumeration>
- <spirit:enumeration>MIO 49</spirit:enumeration>
- <spirit:enumeration>MIO 50</spirit:enumeration>
- <spirit:enumeration>MIO 51</spirit:enumeration>
- <spirit:enumeration>MIO 52</spirit:enumeration>
- <spirit:enumeration>MIO 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6a48f1e0</spirit:name>
- <spirit:enumeration>MIO</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6b183472</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 14</spirit:enumeration>
- <spirit:enumeration>MIO 26</spirit:enumeration>
- <spirit:enumeration>MIO 38</spirit:enumeration>
- <spirit:enumeration>MIO 50</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6bc4d474</spirit:name>
- <spirit:enumeration>LVCMOS 3.3V</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6bd7fb73</spirit:name>
- <spirit:enumeration>Active High</spirit:enumeration>
- <spirit:enumeration>Active Low</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_6e6efe45</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 13</spirit:enumeration>
- <spirit:enumeration>MIO 25</spirit:enumeration>
- <spirit:enumeration>MIO 37</spirit:enumeration>
- <spirit:enumeration>MIO 49</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_72f3e128</spirit:name>
- <spirit:enumeration>LVCMOS 1.8V</spirit:enumeration>
- <spirit:enumeration>LVCMOS 2.5V</spirit:enumeration>
- <spirit:enumeration>LVCMOS 3.3V</spirit:enumeration>
- <spirit:enumeration>HSTL 1.8V</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_75a9626b</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 0</spirit:enumeration>
- <spirit:enumeration>MIO 1</spirit:enumeration>
- <spirit:enumeration>MIO 2</spirit:enumeration>
- <spirit:enumeration>MIO 3</spirit:enumeration>
- <spirit:enumeration>MIO 4</spirit:enumeration>
- <spirit:enumeration>MIO 5</spirit:enumeration>
- <spirit:enumeration>MIO 6</spirit:enumeration>
- <spirit:enumeration>MIO 9</spirit:enumeration>
- <spirit:enumeration>MIO 10</spirit:enumeration>
- <spirit:enumeration>MIO 11</spirit:enumeration>
- <spirit:enumeration>MIO 12</spirit:enumeration>
- <spirit:enumeration>MIO 13</spirit:enumeration>
- <spirit:enumeration>MIO 14</spirit:enumeration>
- <spirit:enumeration>MIO 15</spirit:enumeration>
- <spirit:enumeration>MIO 16</spirit:enumeration>
- <spirit:enumeration>MIO 17</spirit:enumeration>
- <spirit:enumeration>MIO 18</spirit:enumeration>
- <spirit:enumeration>MIO 19</spirit:enumeration>
- <spirit:enumeration>MIO 20</spirit:enumeration>
- <spirit:enumeration>MIO 21</spirit:enumeration>
- <spirit:enumeration>MIO 22</spirit:enumeration>
- <spirit:enumeration>MIO 23</spirit:enumeration>
- <spirit:enumeration>MIO 24</spirit:enumeration>
- <spirit:enumeration>MIO 25</spirit:enumeration>
- <spirit:enumeration>MIO 26</spirit:enumeration>
- <spirit:enumeration>MIO 27</spirit:enumeration>
- <spirit:enumeration>MIO 28</spirit:enumeration>
- <spirit:enumeration>MIO 29</spirit:enumeration>
- <spirit:enumeration>MIO 30</spirit:enumeration>
- <spirit:enumeration>MIO 31</spirit:enumeration>
- <spirit:enumeration>MIO 32</spirit:enumeration>
- <spirit:enumeration>MIO 33</spirit:enumeration>
- <spirit:enumeration>MIO 34</spirit:enumeration>
- <spirit:enumeration>MIO 35</spirit:enumeration>
- <spirit:enumeration>MIO 36</spirit:enumeration>
- <spirit:enumeration>MIO 37</spirit:enumeration>
- <spirit:enumeration>MIO 38</spirit:enumeration>
- <spirit:enumeration>MIO 39</spirit:enumeration>
- <spirit:enumeration>MIO 40</spirit:enumeration>
- <spirit:enumeration>MIO 41</spirit:enumeration>
- <spirit:enumeration>MIO 42</spirit:enumeration>
- <spirit:enumeration>MIO 43</spirit:enumeration>
- <spirit:enumeration>MIO 44</spirit:enumeration>
- <spirit:enumeration>MIO 45</spirit:enumeration>
- <spirit:enumeration>MIO 46</spirit:enumeration>
- <spirit:enumeration>MIO 47</spirit:enumeration>
- <spirit:enumeration>MIO 48</spirit:enumeration>
- <spirit:enumeration>MIO 49</spirit:enumeration>
- <spirit:enumeration>MIO 50</spirit:enumeration>
- <spirit:enumeration>MIO 51</spirit:enumeration>
- <spirit:enumeration>MIO 52</spirit:enumeration>
- <spirit:enumeration>MIO 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_767f870c</spirit:name>
- <spirit:enumeration>External</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_78fdaebe</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 43</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_7abc2131</spirit:name>
- <spirit:enumeration>16 Bit</spirit:enumeration>
- <spirit:enumeration>32 Bit</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_7d098ed6</spirit:name>
- <spirit:enumeration>ARM PLL</spirit:enumeration>
- <spirit:enumeration>IO PLL</spirit:enumeration>
- <spirit:enumeration>DDR PLL</spirit:enumeration>
- <spirit:enumeration>External</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_7d6d1b3f</spirit:name>
- <spirit:enumeration>1</spirit:enumeration>
- <spirit:enumeration>2</spirit:enumeration>
- <spirit:enumeration>3</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_82c3921b</spirit:name>
- <spirit:enumeration>0xE0008FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_83072ce2</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 1</spirit:enumeration>
- <spirit:enumeration>MIO 3</spirit:enumeration>
- <spirit:enumeration>MIO 5</spirit:enumeration>
- <spirit:enumeration>MIO 7</spirit:enumeration>
- <spirit:enumeration>MIO 9</spirit:enumeration>
- <spirit:enumeration>MIO 11</spirit:enumeration>
- <spirit:enumeration>MIO 13</spirit:enumeration>
- <spirit:enumeration>MIO 15</spirit:enumeration>
- <spirit:enumeration>MIO 17</spirit:enumeration>
- <spirit:enumeration>MIO 19</spirit:enumeration>
- <spirit:enumeration>MIO 21</spirit:enumeration>
- <spirit:enumeration>MIO 23</spirit:enumeration>
- <spirit:enumeration>MIO 25</spirit:enumeration>
- <spirit:enumeration>MIO 27</spirit:enumeration>
- <spirit:enumeration>MIO 29</spirit:enumeration>
- <spirit:enumeration>MIO 31</spirit:enumeration>
- <spirit:enumeration>MIO 33</spirit:enumeration>
- <spirit:enumeration>MIO 35</spirit:enumeration>
- <spirit:enumeration>MIO 37</spirit:enumeration>
- <spirit:enumeration>MIO 39</spirit:enumeration>
- <spirit:enumeration>MIO 41</spirit:enumeration>
- <spirit:enumeration>MIO 43</spirit:enumeration>
- <spirit:enumeration>MIO 45</spirit:enumeration>
- <spirit:enumeration>MIO 47</spirit:enumeration>
- <spirit:enumeration>MIO 49</spirit:enumeration>
- <spirit:enumeration>MIO 51</spirit:enumeration>
- <spirit:enumeration>MIO 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_83842e96</spirit:name>
- <spirit:enumeration>0xE0009FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8436647b</spirit:name>
- <spirit:enumeration>MIO 42</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_86458347</spirit:name>
- <spirit:enumeration>fast</spirit:enumeration>
- <spirit:enumeration>slow</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_86cc57ee</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 27</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_88a617f1</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 12 .. 13</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 17</spirit:enumeration>
- <spirit:enumeration>MIO 20 .. 21</spirit:enumeration>
- <spirit:enumeration>MIO 24 .. 25</spirit:enumeration>
- <spirit:enumeration>MIO 28 .. 29</spirit:enumeration>
- <spirit:enumeration>MIO 32 .. 33</spirit:enumeration>
- <spirit:enumeration>MIO 36 .. 37</spirit:enumeration>
- <spirit:enumeration>MIO 40 .. 41</spirit:enumeration>
- <spirit:enumeration>MIO 44 .. 45</spirit:enumeration>
- <spirit:enumeration>MIO 48 .. 49</spirit:enumeration>
- <spirit:enumeration>MIO 52 .. 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_88fe7673</spirit:name>
- <spirit:enumeration>0xE0000FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_89b9cafe</spirit:name>
- <spirit:enumeration>0xE0001FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8af5a703</spirit:name>
- <spirit:enumeration>0</spirit:enumeration>
- <spirit:enumeration>1</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8ca738ca</spirit:name>
- <spirit:enumeration>0xE0005FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8de08447</spirit:name>
- <spirit:enumeration>0xE0004FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8e2841d0</spirit:name>
- <spirit:enumeration>0xE0007FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8f11124f</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 21</spirit:enumeration>
- <spirit:enumeration>MIO 28 .. 33</spirit:enumeration>
- <spirit:enumeration>MIO 40 .. 45</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_8f6ffd5d</spirit:name>
- <spirit:enumeration>0xE0006FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_908f40dd</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 19</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_92aefd84</spirit:name>
- <spirit:enumeration>0xE0104000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_935a3e6e</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 12 .. 13</spirit:enumeration>
- <spirit:enumeration>MIO 24 .. 25</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_93e94109</spirit:name>
- <spirit:enumeration>0xE0105000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_9478ca27</spirit:name>
- <spirit:enumeration>0xE0103000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_953f76aa</spirit:name>
- <spirit:enumeration>0xE0102000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_95a9da0c</spirit:name>
- <spirit:enumeration>in</spirit:enumeration>
- <spirit:enumeration>out</spirit:enumeration>
- <spirit:enumeration>inout</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_96d47805</spirit:name>
- <spirit:enumeration>32</spirit:enumeration>
- <spirit:enumeration>64</spirit:enumeration>
- <spirit:enumeration>128</spirit:enumeration>
- <spirit:enumeration>256</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_96f7b33d</spirit:name>
- <spirit:enumeration>0xE0101000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_97b00fb0</spirit:name>
- <spirit:enumeration>0xE0100000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_99ba8646</spirit:name>
- <spirit:enumeration>32</spirit:enumeration>
- <spirit:enumeration>64</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_9e358632</spirit:name>
- <spirit:enumeration>None</spirit:enumeration>
- <spirit:enumeration>Default</spirit:enumeration>
- <spirit:enumeration>ZC702</spirit:enumeration>
- <spirit:enumeration>ZC706</spirit:enumeration>
- <spirit:enumeration>ZedBoard</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_a0318123</spirit:name>
- <spirit:enumeration>54</spirit:enumeration>
- <spirit:enumeration>32</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_a0c775a9</spirit:name>
- <spirit:enumeration>clg484</spirit:enumeration>
- <spirit:enumeration>clg225</spirit:enumeration>
- <spirit:enumeration>clg400</spirit:enumeration>
- <spirit:enumeration>ffg676</spirit:enumeration>
- <spirit:enumeration>fbg676</spirit:enumeration>
- <spirit:enumeration>fbg484</spirit:enumeration>
- <spirit:enumeration>ffg900</spirit:enumeration>
- <spirit:enumeration>cl400</spirit:enumeration>
- <spirit:enumeration>cl484</spirit:enumeration>
- <spirit:enumeration>rf676</spirit:enumeration>
- <spirit:enumeration>fb484</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_a841b9a1</spirit:name>
- <spirit:enumeration>1000 Mbps</spirit:enumeration>
- <spirit:enumeration>100 Mbps</spirit:enumeration>
- <spirit:enumeration>10 Mbps</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_a8e6d6fb</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 14 .. 15</spirit:enumeration>
- <spirit:enumeration>MIO 26 .. 27</spirit:enumeration>
- <spirit:enumeration>MIO 38 .. 39</spirit:enumeration>
- <spirit:enumeration>MIO 50 .. 51</spirit:enumeration>
- <spirit:enumeration>MIO 52 .. 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_ae9f88f6</spirit:name>
- <spirit:enumeration>1</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_af9e7a8f</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 10 .. 11</spirit:enumeration>
- <spirit:enumeration>MIO 22 .. 23</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_b3ee7919</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 0</spirit:enumeration>
- <spirit:enumeration>MIO 1</spirit:enumeration>
- <spirit:enumeration>MIO 2</spirit:enumeration>
- <spirit:enumeration>MIO 3</spirit:enumeration>
- <spirit:enumeration>MIO 4</spirit:enumeration>
- <spirit:enumeration>MIO 5</spirit:enumeration>
- <spirit:enumeration>MIO 6</spirit:enumeration>
- <spirit:enumeration>MIO 7</spirit:enumeration>
- <spirit:enumeration>MIO 8</spirit:enumeration>
- <spirit:enumeration>MIO 9</spirit:enumeration>
- <spirit:enumeration>MIO 10</spirit:enumeration>
- <spirit:enumeration>MIO 11</spirit:enumeration>
- <spirit:enumeration>MIO 12</spirit:enumeration>
- <spirit:enumeration>MIO 13</spirit:enumeration>
- <spirit:enumeration>MIO 14</spirit:enumeration>
- <spirit:enumeration>MIO 15</spirit:enumeration>
- <spirit:enumeration>MIO 16</spirit:enumeration>
- <spirit:enumeration>MIO 17</spirit:enumeration>
- <spirit:enumeration>MIO 18</spirit:enumeration>
- <spirit:enumeration>MIO 19</spirit:enumeration>
- <spirit:enumeration>MIO 20</spirit:enumeration>
- <spirit:enumeration>MIO 21</spirit:enumeration>
- <spirit:enumeration>MIO 22</spirit:enumeration>
- <spirit:enumeration>MIO 23</spirit:enumeration>
- <spirit:enumeration>MIO 24</spirit:enumeration>
- <spirit:enumeration>MIO 25</spirit:enumeration>
- <spirit:enumeration>MIO 26</spirit:enumeration>
- <spirit:enumeration>MIO 27</spirit:enumeration>
- <spirit:enumeration>MIO 28</spirit:enumeration>
- <spirit:enumeration>MIO 29</spirit:enumeration>
- <spirit:enumeration>MIO 30</spirit:enumeration>
- <spirit:enumeration>MIO 31</spirit:enumeration>
- <spirit:enumeration>MIO 32</spirit:enumeration>
- <spirit:enumeration>MIO 33</spirit:enumeration>
- <spirit:enumeration>MIO 34</spirit:enumeration>
- <spirit:enumeration>MIO 35</spirit:enumeration>
- <spirit:enumeration>MIO 36</spirit:enumeration>
- <spirit:enumeration>MIO 37</spirit:enumeration>
- <spirit:enumeration>MIO 38</spirit:enumeration>
- <spirit:enumeration>MIO 39</spirit:enumeration>
- <spirit:enumeration>MIO 40</spirit:enumeration>
- <spirit:enumeration>MIO 41</spirit:enumeration>
- <spirit:enumeration>MIO 42</spirit:enumeration>
- <spirit:enumeration>MIO 43</spirit:enumeration>
- <spirit:enumeration>MIO 44</spirit:enumeration>
- <spirit:enumeration>MIO 45</spirit:enumeration>
- <spirit:enumeration>MIO 46</spirit:enumeration>
- <spirit:enumeration>MIO 47</spirit:enumeration>
- <spirit:enumeration>MIO 48</spirit:enumeration>
- <spirit:enumeration>MIO 49</spirit:enumeration>
- <spirit:enumeration>MIO 50</spirit:enumeration>
- <spirit:enumeration>MIO 51</spirit:enumeration>
- <spirit:enumeration>MIO 52</spirit:enumeration>
- <spirit:enumeration>MIO 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_b4a6147c</spirit:name>
- <spirit:enumeration>0xE000B000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_b5e1a8f1</spirit:name>
- <spirit:enumeration>0xE000C000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_b66926f4</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 28 .. 39</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_b76ed1eb</spirit:name>
- <spirit:enumeration>0xE000A000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_ba65fe0e</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 2 .. 9</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_bbba28a6</spirit:name>
- <spirit:enumeration>DDR3_1066E</spirit:enumeration>
- <spirit:enumeration>DDR3_1066F</spirit:enumeration>
- <spirit:enumeration>DDR3_1066G</spirit:enumeration>
- <spirit:enumeration>DDR3_1333F</spirit:enumeration>
- <spirit:enumeration>DDR3_1333G</spirit:enumeration>
- <spirit:enumeration>DDR3_1333H</spirit:enumeration>
- <spirit:enumeration>DDR3_1333J</spirit:enumeration>
- <spirit:enumeration>DDR3_1600G</spirit:enumeration>
- <spirit:enumeration>DDR3_1600H</spirit:enumeration>
- <spirit:enumeration>DDR3_1600J</spirit:enumeration>
- <spirit:enumeration>DDR3_1600K</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_bc805c93</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>x1</spirit:enumeration>
- <spirit:enumeration>x2</spirit:enumeration>
- <spirit:enumeration>x4</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_bd8e4b31</spirit:name>
- <spirit:enumeration>6:2:1</spirit:enumeration>
- <spirit:enumeration>4:2:1</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_be8ca58c</spirit:name>
- <spirit:enumeration>MT41J128M8 JP-125</spirit:enumeration>
- <spirit:enumeration>MT41J128M8 JP-15E</spirit:enumeration>
- <spirit:enumeration>MT41J64M16 JT-125G</spirit:enumeration>
- <spirit:enumeration>MT41J64M16 JT-15E</spirit:enumeration>
- <spirit:enumeration>MT41J256M8 DA-107</spirit:enumeration>
- <spirit:enumeration>MT41K128M16 JT-125</spirit:enumeration>
- <spirit:enumeration>MT41J256M8 HX-125</spirit:enumeration>
- <spirit:enumeration>MT41J256M8 HX-15E</spirit:enumeration>
- <spirit:enumeration>MT41J256M8 HX-187E</spirit:enumeration>
- <spirit:enumeration>MT41J128M16 HA-107G</spirit:enumeration>
- <spirit:enumeration>MT41J128M16 HA-125</spirit:enumeration>
- <spirit:enumeration>MT41J128M16 HA-15E</spirit:enumeration>
- <spirit:enumeration>MT41J128M16 HA-187E</spirit:enumeration>
- <spirit:enumeration>MT41J512M8 RA-15E</spirit:enumeration>
- <spirit:enumeration>MT41K128M16 HA-15E</spirit:enumeration>
- <spirit:enumeration>MT41K256M16 RE-125</spirit:enumeration>
- <spirit:enumeration>MT41K256M16 RE-15E</spirit:enumeration>
- <spirit:enumeration>MT41K256M8 DA-125</spirit:enumeration>
- <spirit:enumeration>MT41K256M8 DA-15E</spirit:enumeration>
- <spirit:enumeration>MT41K256M8 HX-15E</spirit:enumeration>
- <spirit:enumeration>MT41J256M16 RE-125</spirit:enumeration>
- <spirit:enumeration>Custom</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_bed41605</spirit:name>
- <spirit:enumeration>PRODUCTION</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_c11320b6</spirit:name>
- <spirit:enumeration>0x3FFFFFFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_c4046e95</spirit:name>
- <spirit:enumeration>0xE0100FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_c543d218</spirit:name>
- <spirit:enumeration>0xE0101FFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_c5ebb0ea</spirit:name>
- <spirit:enumeration>LPDDR 2</spirit:enumeration>
- <spirit:enumeration>DDR 2</spirit:enumeration>
- <spirit:enumeration>DDR 3</spirit:enumeration>
- <spirit:enumeration>DDR 3 (Low Voltage)</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_ca108395</spirit:name>
- <spirit:enumeration>2</spirit:enumeration>
- <spirit:enumeration>4</spirit:enumeration>
- <spirit:enumeration>8</spirit:enumeration>
- <spirit:enumeration>16</spirit:enumeration>
- <spirit:enumeration>32</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_cbbe7bdf</spirit:name>
- <spirit:enumeration>MIO 1 .. 6</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_ce2e47bd</spirit:name>
- <spirit:enumeration>Share reset pin</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d0304fb3</spirit:name>
- <spirit:enumeration>0xE0009000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d10f4555</spirit:name>
- <spirit:enumeration>FALSE</spirit:enumeration>
- <spirit:enumeration>TRUE</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d177f33e</spirit:name>
- <spirit:enumeration>0xE0008000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d282f9a2</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 17</spirit:enumeration>
- <spirit:enumeration>MIO 28 .. 29</spirit:enumeration>
- <spirit:enumeration>MIO 40 .. 41</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d2a5f697</spirit:name>
- <spirit:enumeration>CPU_1X</spirit:enumeration>
- <spirit:enumeration>External</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d2f51b63</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 0 9 .. 13</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d388ceb0</spirit:name>
- <spirit:enumeration>LVCMOS 2.5V</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d525dd8e</spirit:name>
- <spirit:enumeration>0xFCFFFFFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d679c87d</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 0</spirit:enumeration>
- <spirit:enumeration>MIO 1</spirit:enumeration>
- <spirit:enumeration>MIO 2</spirit:enumeration>
- <spirit:enumeration>MIO 3</spirit:enumeration>
- <spirit:enumeration>MIO 4</spirit:enumeration>
- <spirit:enumeration>MIO 5</spirit:enumeration>
- <spirit:enumeration>MIO 6</spirit:enumeration>
- <spirit:enumeration>MIO 7</spirit:enumeration>
- <spirit:enumeration>MIO 8</spirit:enumeration>
- <spirit:enumeration>MIO 9</spirit:enumeration>
- <spirit:enumeration>MIO 10</spirit:enumeration>
- <spirit:enumeration>MIO 11</spirit:enumeration>
- <spirit:enumeration>MIO 12</spirit:enumeration>
- <spirit:enumeration>MIO 13</spirit:enumeration>
- <spirit:enumeration>MIO 14</spirit:enumeration>
- <spirit:enumeration>MIO 15</spirit:enumeration>
- <spirit:enumeration>MIO 16</spirit:enumeration>
- <spirit:enumeration>MIO 17</spirit:enumeration>
- <spirit:enumeration>MIO 18</spirit:enumeration>
- <spirit:enumeration>MIO 19</spirit:enumeration>
- <spirit:enumeration>MIO 20</spirit:enumeration>
- <spirit:enumeration>MIO 21</spirit:enumeration>
- <spirit:enumeration>MIO 22</spirit:enumeration>
- <spirit:enumeration>MIO 23</spirit:enumeration>
- <spirit:enumeration>MIO 24</spirit:enumeration>
- <spirit:enumeration>MIO 25</spirit:enumeration>
- <spirit:enumeration>MIO 26</spirit:enumeration>
- <spirit:enumeration>MIO 27</spirit:enumeration>
- <spirit:enumeration>MIO 28</spirit:enumeration>
- <spirit:enumeration>MIO 29</spirit:enumeration>
- <spirit:enumeration>MIO 30</spirit:enumeration>
- <spirit:enumeration>MIO 31</spirit:enumeration>
- <spirit:enumeration>MIO 32</spirit:enumeration>
- <spirit:enumeration>MIO 33</spirit:enumeration>
- <spirit:enumeration>MIO 34</spirit:enumeration>
- <spirit:enumeration>MIO 35</spirit:enumeration>
- <spirit:enumeration>MIO 36</spirit:enumeration>
- <spirit:enumeration>MIO 37</spirit:enumeration>
- <spirit:enumeration>MIO 38</spirit:enumeration>
- <spirit:enumeration>MIO 39</spirit:enumeration>
- <spirit:enumeration>MIO 40</spirit:enumeration>
- <spirit:enumeration>MIO 41</spirit:enumeration>
- <spirit:enumeration>MIO 42</spirit:enumeration>
- <spirit:enumeration>MIO 43</spirit:enumeration>
- <spirit:enumeration>MIO 44</spirit:enumeration>
- <spirit:enumeration>MIO 45</spirit:enumeration>
- <spirit:enumeration>MIO 46</spirit:enumeration>
- <spirit:enumeration>MIO 47</spirit:enumeration>
- <spirit:enumeration>MIO 48</spirit:enumeration>
- <spirit:enumeration>MIO 49</spirit:enumeration>
- <spirit:enumeration>MIO 50</spirit:enumeration>
- <spirit:enumeration>MIO 51</spirit:enumeration>
- <spirit:enumeration>MIO 52</spirit:enumeration>
- <spirit:enumeration>MIO 53</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_d8fa963a</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 10 .. 15</spirit:enumeration>
- <spirit:enumeration>MIO 22 .. 27</spirit:enumeration>
- <spirit:enumeration>MIO 34 .. 39</spirit:enumeration>
- <spirit:enumeration>MIO 46 .. 51</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_da0dabdb</spirit:name>
- <spirit:enumeration>0xE0001000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_db4a1756</spirit:name>
- <spirit:enumeration>0xE0000000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_dc7979fd</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 8</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_dc85a6c5</spirit:name>
- <spirit:enumeration>ARM PLL</spirit:enumeration>
- <spirit:enumeration>DDR PLL</spirit:enumeration>
- <spirit:enumeration>External</spirit:enumeration>
- <spirit:enumeration>IO PLL</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_dcdb9c78</spirit:name>
- <spirit:enumeration>0xE0006000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_dd9c20f5</spirit:name>
- <spirit:enumeration>0xE0007000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_de54e562</spirit:name>
- <spirit:enumeration>0xE0004000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_df1359ef</spirit:name>
- <spirit:enumeration>0xE0005000</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_e14dbfa8</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 0</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_e4dab0ce</spirit:name>
- <spirit:enumeration>0xE000AFFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_e655c9d4</spirit:name>
- <spirit:enumeration>0xE000CFFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_e7127559</spirit:name>
- <spirit:enumeration>0xE000BFFF</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_e743b0fa</spirit:name>
- <spirit:enumeration>DDR PLL</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_ea556125</spirit:name>
- <spirit:enumeration>ARM PLL</spirit:enumeration>
- <spirit:enumeration>DDR PLL</spirit:enumeration>
- <spirit:enumeration>IO PLL</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_eaad72ce</spirit:name>
- <spirit:enumeration>8 Bits</spirit:enumeration>
- <spirit:enumeration>16 Bits</spirit:enumeration>
- <spirit:enumeration>32 Bits</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_ec5c3204</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 44</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_f585525a</spirit:name>
- <spirit:enumeration>110</spirit:enumeration>
- <spirit:enumeration>300</spirit:enumeration>
- <spirit:enumeration>1200</spirit:enumeration>
- <spirit:enumeration>2400</spirit:enumeration>
- <spirit:enumeration>4800</spirit:enumeration>
- <spirit:enumeration>9600</spirit:enumeration>
- <spirit:enumeration>19200</spirit:enumeration>
- <spirit:enumeration>38400</spirit:enumeration>
- <spirit:enumeration>57600</spirit:enumeration>
- <spirit:enumeration>115200</spirit:enumeration>
- <spirit:enumeration>128000</spirit:enumeration>
- <spirit:enumeration>230400</spirit:enumeration>
- <spirit:enumeration>460800</spirit:enumeration>
- <spirit:enumeration>921600</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_f591e16e</spirit:name>
- <spirit:enumeration>DDR PLL</spirit:enumeration>
- <spirit:enumeration>ARM PLL</spirit:enumeration>
- <spirit:enumeration>IO PLL</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_f5e7200e</spirit:name>
- <spirit:enumeration>6</spirit:enumeration>
- <spirit:enumeration>12</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_f632ce2e</spirit:name>
- <spirit:enumeration>EMIO</spirit:enumeration>
- <spirit:enumeration>MIO 10 .. 11</spirit:enumeration>
- <spirit:enumeration>MIO 14 .. 15</spirit:enumeration>
- <spirit:enumeration>MIO 18 .. 19</spirit:enumeration>
- <spirit:enumeration>MIO 22 .. 23</spirit:enumeration>
- <spirit:enumeration>MIO 26 .. 27</spirit:enumeration>
- <spirit:enumeration>MIO 30 .. 31</spirit:enumeration>
- <spirit:enumeration>MIO 34 .. 35</spirit:enumeration>
- <spirit:enumeration>MIO 38 .. 39</spirit:enumeration>
- <spirit:enumeration>MIO 42 .. 43</spirit:enumeration>
- <spirit:enumeration>MIO 46 .. 47</spirit:enumeration>
- <spirit:enumeration>MIO 50 .. 51</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_f7b6ff1b</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>EMIO</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_fb1b25ef</spirit:name>
- <spirit:enumeration><Select></spirit:enumeration>
- <spirit:enumeration>MIO 16 .. 23</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_fc3456a9</spirit:name>
- <spirit:enumeration>Disabled</spirit:enumeration>
- <spirit:enumeration>Enabled</spirit:enumeration>
- </spirit:choice>
- <spirit:choice>
- <spirit:name>choice_list_fd37a6fb</spirit:name>
- <spirit:enumeration>4</spirit:enumeration>
- <spirit:enumeration>8</spirit:enumeration>
- </spirit:choice>
- </spirit:choices>
- <spirit:fileSets>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>scalp_zynqps_processing_system7_0_0.xdc</spirit:name>
- <spirit:userFileType>xdc</spirit:userFileType>
- <spirit:define>
- <spirit:name>processing_order</spirit:name>
- <spirit:value>early</spirit:value>
- </spirit:define>
- </spirit:file>
- <spirit:file>
- <spirit:name>hdl/verilog/scalp_zynqps_processing_system7_0_0.hwdef</spirit:name>
- <spirit:userFileType>hwdef</spirit:userFileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>ps7_init.c</spirit:name>
- <spirit:fileType>cSource</spirit:fileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>ps7_init.h</spirit:name>
- <spirit:fileType>cSource</spirit:fileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>ps7_init_gpl.c</spirit:name>
- <spirit:fileType>cSource</spirit:fileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>ps7_init_gpl.h</spirit:name>
- <spirit:fileType>cSource</spirit:fileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>ps7_init.tcl</spirit:name>
- <spirit:fileType>tclSource</spirit:fileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>ps7_init.html</spirit:name>
- <spirit:userFileType>html</spirit:userFileType>
- <spirit:userFileType>USED_IN_hw_handoff</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/8fd3/hdl/verilog/processing_system7_v5_5_aw_atc.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/8fd3/hdl/verilog/processing_system7_v5_5_b_atc.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/8fd3/hdl/verilog/processing_system7_v5_5_w_atc.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/8fd3/hdl/verilog/processing_system7_v5_5_atc.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/8fd3/hdl/verilog/processing_system7_v5_5_trace_buffer.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>hdl/verilog/processing_system7_v5_5_processing_system7.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesiswrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>synth/scalp_zynqps_processing_system7_0_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_axi_infrastructure_1_1__ref_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/ec67/hdl/axi_infrastructure_v1_1_0.vh</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>axi_infrastructure_v1_1_0</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>axi_infrastructure_v1_1_0</spirit:logicalName>
- </spirit:file>
- <spirit:vendorExtensions>
- <xilinx:subCoreRef>
- <xilinx:componentRef xsi:type="xilinx:componentRefType" xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="axi_infrastructure" xilinx:version="1.1" xilinx:isGenerated="true" xilinx:checksum="5a88adbb">
- <xilinx:mode xilinx:name="copy_mode"/>
- </xilinx:componentRef>
- </xilinx:subCoreRef>
- </spirit:vendorExtensions>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_axi_vip_1_1__ref_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv</spirit:name>
- <spirit:fileType>systemVerilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>axi_vip_v1_1_6</spirit:logicalName>
- </spirit:file>
- <spirit:vendorExtensions>
- <xilinx:subCoreRef>
- <xilinx:componentRef xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="axi_vip" xilinx:version="1.1" xilinx:isGenerated="true" xilinx:checksum="ef58f8dc">
- <xilinx:mode xilinx:name="copy_mode"/>
- </xilinx:componentRef>
- </xilinx:subCoreRef>
- </spirit:vendorExtensions>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagebehavioralsimulation_xilinx_com_ip_processing_system7_vip_1_0__ref_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_local_params.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv</spirit:name>
- <spirit:fileType>systemVerilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_params.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_init.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_apis.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_unused_ports.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_gp.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_acp.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_hp.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_vip_v1_0_8</spirit:logicalName>
- </spirit:file>
- <spirit:vendorExtensions>
- <xilinx:subCoreRef>
- <xilinx:componentRef xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="processing_system7_vip" xilinx:version="1.0" xilinx:isGenerated="true" xilinx:checksum="be7c8c23">
- <xilinx:mode xilinx:name="copy_mode"/>
- </xilinx:componentRef>
- </xilinx:subCoreRef>
- </spirit:vendorExtensions>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_systemcsimulation_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim_tlm/processing_system7_v5_5_tlm.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim_tlm/processing_system7_v5_5_tlm.cpp</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim_tlm/xilinx-zynq.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_v5_5_6</spirit:logicalName>
- <spirit:description>QEMU wrapper header file</spirit:description>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim_tlm/b_transport_converter.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>processing_system7_v5_5_6</spirit:logicalName>
- <spirit:description>B2NB Transport Converter</spirit:description>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim_tlm/xilinx-zynq.cc</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>processing_system7_v5_5_6</spirit:logicalName>
- <spirit:description>QEMU wrapper src file</spirit:description>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagebehavioralsimulation_1_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/libps7.so</spirit:name>
- <spirit:fileType>swObjectLibrary</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/libps7.dll</spirit:name>
- <spirit:fileType>swObjectLibrary</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/libremoteport.so</spirit:name>
- <spirit:fileType>swObjectLibrary</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/libremoteport.dll</spirit:name>
- <spirit:fileType>swObjectLibrary</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagesimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_systemcsimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0_sc.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0_sc.cpp</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0.h</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0.cpp</spirit:name>
- <spirit:fileType>systemCSource</spirit:fileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0_stub.sv</spirit:name>
- <spirit:fileType>systemVerilogSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagesimulationwrapper_1_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_processing_system7_0_0.sv</spirit:name>
- <spirit:fileType>systemVerilogSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_externalfiles_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>scalp_zynqps_processing_system7_0_0.dcp</spirit:name>
- <spirit:userFileType>dcp</spirit:userFileType>
- <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
- <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_processing_system7_0_0_stub.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_processing_system7_0_0_stub.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_processing_system7_0_0_sim_netlist.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_processing_system7_0_0_sim_netlist.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- </spirit:fileSets>
- <spirit:cpus>
- <spirit:cpu>
- <spirit:name>CPU0_A9</spirit:name>
- <spirit:addressSpaceRef spirit:addressSpaceRef="Data"/>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>is_visible</spirit:name>
- <spirit:value>FALSE</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>processor_type</spirit:name>
- <spirit:value>ARM</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:cpu>
- <spirit:cpu>
- <spirit:name>CPU1_A9</spirit:name>
- <spirit:addressSpaceRef spirit:addressSpaceRef="Data"/>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>is_visible</spirit:name>
- <spirit:value>FALSE</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>processor_type</spirit:name>
- <spirit:value>ARM</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:cpu>
- </spirit:cpus>
- <spirit:description>Arm dual core SOC with Zynq fpga</spirit:description>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>PCW_DDR_RAM_BASEADDR</spirit:name>
- <spirit:displayName>PCW DDR RAM BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_RAM_BASEADDR" spirit:choiceRef="choice_list_49727578" spirit:order="49400" spirit:bitStringLength="32">0x00100000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_DDR_RAM_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_RAM_HIGHADDR</spirit:name>
- <spirit:displayName>PCW DDR RAM HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_RAM_HIGHADDR" spirit:choiceRef="choice_list_c11320b6" spirit:order="49500" spirit:bitStringLength="32">0x0FFFFFFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_DDR_RAM_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_DDR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_BASEADDR</spirit:name>
- <spirit:displayName>PCW UART0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_BASEADDR" spirit:choiceRef="choice_list_db4a1756" spirit:order="49600" spirit:bitStringLength="32">0xE0000000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_UART0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_UART0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW UART0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_HIGHADDR" spirit:choiceRef="choice_list_88fe7673" spirit:order="49700" spirit:bitStringLength="32">0xE0000FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_UART0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_UART0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_BASEADDR</spirit:name>
- <spirit:displayName>PCW UART1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_BASEADDR" spirit:choiceRef="choice_list_da0dabdb" spirit:order="49800" spirit:bitStringLength="32">0xE0001000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_UART1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_UART1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW UART1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_HIGHADDR" spirit:choiceRef="choice_list_89b9cafe" spirit:order="49900" spirit:bitStringLength="32">0xE0001FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_UART1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_UART1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_BASEADDR</spirit:name>
- <spirit:displayName>PCW I2C0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_BASEADDR" spirit:choiceRef="choice_list_de54e562" spirit:order="50000" spirit:bitStringLength="32">0xE0004000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_I2C0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_I2C0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW I2C0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_HIGHADDR" spirit:choiceRef="choice_list_8de08447" spirit:order="50100" spirit:bitStringLength="32">0xE0004FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_I2C0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_I2C0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_BASEADDR</spirit:name>
- <spirit:displayName>PCW I2C1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_BASEADDR" spirit:choiceRef="choice_list_df1359ef" spirit:order="50200" spirit:bitStringLength="32">0xE0005000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_I2C1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW I2C1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_HIGHADDR" spirit:choiceRef="choice_list_8ca738ca" spirit:order="50300" spirit:bitStringLength="32">0xE0005FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_I2C1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_BASEADDR</spirit:name>
- <spirit:displayName>PCW SPI0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_BASEADDR" spirit:choiceRef="choice_list_dcdb9c78" spirit:order="50400" spirit:bitStringLength="32">0xE0006000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SPI0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SPI0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW SPI0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_HIGHADDR" spirit:choiceRef="choice_list_8f6ffd5d" spirit:order="50500" spirit:bitStringLength="32">0xE0006FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SPI0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SPI0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_BASEADDR</spirit:name>
- <spirit:displayName>PCW SPI1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_BASEADDR" spirit:choiceRef="choice_list_dd9c20f5" spirit:order="50600" spirit:bitStringLength="32">0xE0007000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SPI1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW SPI1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_HIGHADDR" spirit:choiceRef="choice_list_8e2841d0" spirit:order="50700" spirit:bitStringLength="32">0xE0007FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SPI1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_BASEADDR</spirit:name>
- <spirit:displayName>PCW CAN0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_BASEADDR" spirit:choiceRef="choice_list_d177f33e" spirit:order="50800" spirit:bitStringLength="32">0xE0008000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CAN0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_CAN0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW CAN0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_HIGHADDR" spirit:choiceRef="choice_list_82c3921b" spirit:order="50900" spirit:bitStringLength="32">0xE0008FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CAN0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_CAN0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_BASEADDR</spirit:name>
- <spirit:displayName>PCW CAN1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_BASEADDR" spirit:choiceRef="choice_list_d0304fb3" spirit:order="51000" spirit:bitStringLength="32">0xE0009000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CAN1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_CAN1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW CAN1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_HIGHADDR" spirit:choiceRef="choice_list_83842e96" spirit:order="51100" spirit:bitStringLength="32">0xE0009FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CAN1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_CAN1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_BASEADDR</spirit:name>
- <spirit:displayName>PCW GPIO BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_BASEADDR" spirit:choiceRef="choice_list_b76ed1eb" spirit:order="51200" spirit:bitStringLength="32">0xE000A000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_GPIO_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_GPIO)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_HIGHADDR</spirit:name>
- <spirit:displayName>PCW GPIO HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_HIGHADDR" spirit:choiceRef="choice_list_e4dab0ce" spirit:order="51300" spirit:bitStringLength="32">0xE000AFFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_GPIO_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_GPIO)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_BASEADDR</spirit:name>
- <spirit:displayName>PCW ENET0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_BASEADDR" spirit:choiceRef="choice_list_b4a6147c" spirit:order="51400" spirit:bitStringLength="32">0xE000B000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_ENET0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_ENET0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW ENET0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_HIGHADDR" spirit:choiceRef="choice_list_e7127559" spirit:order="51500" spirit:bitStringLength="32">0xE000BFFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_ENET0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_ENET0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_BASEADDR</spirit:name>
- <spirit:displayName>PCW ENET1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_BASEADDR" spirit:choiceRef="choice_list_b5e1a8f1" spirit:order="51600" spirit:bitStringLength="32">0xE000C000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_ENET1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW ENET1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_HIGHADDR" spirit:choiceRef="choice_list_e655c9d4" spirit:order="51700" spirit:bitStringLength="32">0xE000CFFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_ENET1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO0_BASEADDR</spirit:name>
- <spirit:displayName>PCW SDIO0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO0_BASEADDR" spirit:choiceRef="choice_list_97b00fb0" spirit:order="51800" spirit:bitStringLength="32">0xE0100000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SDIO0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SDIO0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW SDIO0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO0_HIGHADDR" spirit:choiceRef="choice_list_c4046e95" spirit:order="51900" spirit:bitStringLength="32">0xE0100FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SDIO0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SDIO0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO1_BASEADDR</spirit:name>
- <spirit:displayName>PCW SDIO1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO1_BASEADDR" spirit:choiceRef="choice_list_96f7b33d" spirit:order="52000" spirit:bitStringLength="32">0xE0101000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SDIO1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SDIO1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW SDIO1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO1_HIGHADDR" spirit:choiceRef="choice_list_c543d218" spirit:order="52100" spirit:bitStringLength="32">0xE0101FFF</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_SDIO1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_SDIO1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_BASEADDR</spirit:name>
- <spirit:displayName>PCW USB0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_BASEADDR" spirit:choiceRef="choice_list_953f76aa" spirit:order="52200" spirit:bitStringLength="32">0xE0102000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USB0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW USB0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_HIGHADDR" spirit:choiceRef="choice_list_3607bdd0" spirit:order="52300" spirit:bitStringLength="32">0xE0102fff</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USB0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_BASEADDR</spirit:name>
- <spirit:displayName>PCW USB1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_BASEADDR" spirit:choiceRef="choice_list_9478ca27" spirit:order="52400" spirit:bitStringLength="32">0xE0103000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USB1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW USB1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_HIGHADDR" spirit:choiceRef="choice_list_3740015d" spirit:order="52500" spirit:bitStringLength="32">0xE0103fff</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USB1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_BASEADDR</spirit:name>
- <spirit:displayName>PCW TTC0 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_BASEADDR" spirit:choiceRef="choice_list_92aefd84" spirit:order="52600" spirit:bitStringLength="32">0xE0104000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TTC0_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_HIGHADDR</spirit:name>
- <spirit:displayName>PCW TTC0 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_HIGHADDR" spirit:choiceRef="choice_list_319636fe" spirit:order="52700" spirit:bitStringLength="32">0xE0104fff</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TTC0_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_BASEADDR</spirit:name>
- <spirit:displayName>PCW TTC1 BASEADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_BASEADDR" spirit:choiceRef="choice_list_93e94109" spirit:order="52800" spirit:bitStringLength="32">0xE0105000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TTC1_BASEADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_HIGHADDR</spirit:name>
- <spirit:displayName>PCW TTC1 HIGHADDR</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_HIGHADDR" spirit:choiceRef="choice_list_30d18a73" spirit:order="52900" spirit:bitStringLength="32">0xE0105fff</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TTC1_HIGHADDR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_TTC1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK_CLK0_BUF</spirit:name>
- <spirit:displayName>PCW FCLK CLK0 BUF</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK_CLK0_BUF" spirit:choiceRef="choice_list_d10f4555" spirit:order="63000">TRUE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FCLK_CLK0_BUF" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK0_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK0_PORT)) == 1)) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK_CLK1_BUF</spirit:name>
- <spirit:displayName>PCW FCLK CLK1 BUF</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK_CLK1_BUF" spirit:choiceRef="choice_list_d10f4555" spirit:order="63100">FALSE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FCLK_CLK1_BUF" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK1_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK1_PORT)) == 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK_CLK2_BUF</spirit:name>
- <spirit:displayName>PCW FCLK CLK2 BUF</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK_CLK2_BUF" spirit:choiceRef="choice_list_d10f4555" spirit:order="63200">FALSE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FCLK_CLK2_BUF" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK2_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK2_PORT)) == 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK_CLK3_BUF</spirit:name>
- <spirit:displayName>PCW FCLK CLK3 BUF</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK_CLK3_BUF" spirit:choiceRef="choice_list_d10f4555" spirit:order="63300">FALSE</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FCLK_CLK3_BUF" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK3_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK3_PORT)) == 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_FREQ_MHZ</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR FREQ MHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_FREQ_MHZ" spirit:order="13500" spirit:minimum="200.000000" spirit:maximum="534.000000">500</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BANK_ADDR_COUNT</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BANK ADDR COUNT</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BANK_ADDR_COUNT" spirit:order="14100" spirit:minimum="2.000000" spirit:maximum="3.000000">3</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_BANK_ADDR_COUNT">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_ROW_ADDR_COUNT</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR ROW ADDR COUNT</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_ROW_ADDR_COUNT" spirit:order="14200" spirit:minimum="12.000000" spirit:maximum="15.000000">14</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_ROW_ADDR_COUNT">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_COL_ADDR_COUNT</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR COL ADDR COUNT</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_COL_ADDR_COUNT" spirit:order="14300" spirit:minimum="8.000000" spirit:maximum="13.000000">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_COL_ADDR_COUNT">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CL</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CL</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CL" spirit:order="14400">7</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_CL">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CWL</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CWL</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CWL" spirit:order="14500">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_CWL">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_T_RCD</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR T RCD</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_T_RCD" spirit:order="14600" spirit:minimum="0.000000" spirit:maximum="16.000000">7</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_T_RCD">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_T_RP</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR T RP</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_T_RP" spirit:order="14700" spirit:minimum="0.000000" spirit:maximum="16.000000">7</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_T_RP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_T_RC</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR T RC</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_T_RC" spirit:order="14800" spirit:minimum="0.000000" spirit:maximum="100.000000">48.75</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_T_RC">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_T_RAS_MIN</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR T RAS MIN</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_T_RAS_MIN" spirit:order="14900" spirit:minimum="0.000000" spirit:maximum="100.000000">35.0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_T_RAS_MIN">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_T_FAW</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR T FAW</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_T_FAW" spirit:order="15000" spirit:minimum="0.000000" spirit:maximum="100.000000">40.0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_T_FAW">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_AL</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR AL</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_AL" spirit:order="15100" spirit:minimum="0.000000" spirit:maximum="20.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS TO CLK DELAY 0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0" spirit:order="15200" spirit:minimum="-0.100000" spirit:maximum="100.000000">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS TO CLK DELAY 1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1" spirit:order="15300" spirit:minimum="-0.100000" spirit:maximum="100.000000">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS TO CLK DELAY 2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2" spirit:order="15400" spirit:minimum="-0.100000" spirit:maximum="100.000000">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS TO CLK DELAY 3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3" spirit:order="15500" spirit:minimum="-0.100000" spirit:maximum="100.000000">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BOARD_DELAY0</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BOARD DELAY0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY0" spirit:order="16100" spirit:minimum="0.007000" spirit:maximum="100.000000">0.25</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BOARD_DELAY1</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BOARD DELAY1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY1" spirit:order="16200" spirit:minimum="0.007000" spirit:maximum="100.000000">0.25</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BOARD_DELAY2</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BOARD DELAY2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY2" spirit:order="16300" spirit:minimum="0.007000" spirit:maximum="100.000000">0.25</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BOARD_DELAY3</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BOARD DELAY3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY3" spirit:order="16400" spirit:minimum="0.007000" spirit:maximum="100.000000">0.25</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_0_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 0 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_LENGTH_MM" spirit:order="16500" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_1_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 1 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_LENGTH_MM" spirit:order="16600" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_2_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 2 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_LENGTH_MM" spirit:order="16700" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_3_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 3 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_LENGTH_MM" spirit:order="16800" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_0_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 0 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_LENGTH_MM" spirit:order="16900" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_1_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 1 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_LENGTH_MM" spirit:order="17000" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_2_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 2 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_LENGTH_MM" spirit:order="17100" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_3_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 3 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_LENGTH_MM" spirit:order="17200" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 0 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM" spirit:order="17300" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 1 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM" spirit:order="17400" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 2 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM" spirit:order="17500" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 3 LENGTH MM</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM" spirit:order="17600" spirit:minimum="0.000000" spirit:maximum="10000.000000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 0 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH" spirit:order="17700" spirit:minimum="0.000000" spirit:maximum="10000.000000">76.687</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 1 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH" spirit:order="17800" spirit:minimum="0.000000" spirit:maximum="10000.000000">77.8025</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 2 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH" spirit:order="17900" spirit:minimum="0.000000" spirit:maximum="10000.000000">72.8405</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 3 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH" spirit:order="18000" spirit:minimum="0.000000" spirit:maximum="10000.000000">111.904</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 0 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH" spirit:order="18100" spirit:minimum="0.000000" spirit:maximum="10000.000000">73.119</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 1 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH" spirit:order="18200" spirit:minimum="0.000000" spirit:maximum="10000.000000">63.8935</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 2 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH" spirit:order="18300" spirit:minimum="0.000000" spirit:maximum="10000.000000">77.045</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 3 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH" spirit:order="18400" spirit:minimum="0.000000" spirit:maximum="10000.000000">111.903</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 0 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH" spirit:order="18500" spirit:minimum="0.000000" spirit:maximum="10000.000000">76.428</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 1 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH" spirit:order="18600" spirit:minimum="0.000000" spirit:maximum="10000.000000">76.428</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 2 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH" spirit:order="18700" spirit:minimum="0.000000" spirit:maximum="10000.000000">76.428</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 3 PACKAGE LENGTH</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH" spirit:order="18800" spirit:minimum="0.000000" spirit:maximum="10000.000000">76.428</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 0 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY" spirit:order="18900" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 1 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY" spirit:order="19000" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 2 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY" spirit:order="19100" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQS 3 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY" spirit:order="19200" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 0 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY" spirit:order="19300" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 1 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY" spirit:order="19400" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 2 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY" spirit:order="19500" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DQ 3 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY" spirit:order="19600" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 0 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY" spirit:order="19700" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 1 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY" spirit:order="19800" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 2 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY" spirit:order="19900" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK 3 PROPOGATION DELAY</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY" spirit:order="20000" spirit:minimum="0.000000" spirit:maximum="10000.000000">160</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR DQS TO CLK DELAY 0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0" spirit:order="20100" spirit:minimum="-0.100000" spirit:maximum="100.000000">-0.000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR DQS TO CLK DELAY 1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1" spirit:order="20200" spirit:minimum="-0.100000" spirit:maximum="100.000000">-0.001</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR DQS TO CLK DELAY 2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2" spirit:order="20300" spirit:minimum="-0.100000" spirit:maximum="100.000000">0.004</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR DQS TO CLK DELAY 3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3" spirit:order="20400" spirit:minimum="-0.100000" spirit:maximum="100.000000">-0.035</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_BOARD_DELAY0</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR BOARD DELAY0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY0" spirit:order="20500" spirit:minimum="0.000000" spirit:maximum="100.000000">0.075</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_BOARD_DELAY1</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR BOARD DELAY1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY1" spirit:order="20600" spirit:minimum="0.000000" spirit:maximum="100.000000">0.070</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_BOARD_DELAY2</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR BOARD DELAY2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY2" spirit:order="20700" spirit:minimum="0.000000" spirit:maximum="100.000000">0.077</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_DDR_BOARD_DELAY3</spirit:name>
- <spirit:displayName>PCW PACKAGE DDR BOARD DELAY3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY3" spirit:order="20800" spirit:minimum="0.000000" spirit:maximum="100.000000">0.094</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CPU_CPU_6X4X_MAX_RANGE</spirit:name>
- <spirit:displayName>PCW CPU CPU 6X4X MAX RANGE</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CPU_CPU_6X4X_MAX_RANGE" spirit:order="234000" spirit:minimum="-9999.990000" spirit:maximum="9999.990000">767</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CRYSTAL_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW CRYSTAL PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CRYSTAL_PERIPHERAL_FREQMHZ" spirit:order="23200" spirit:minimum="30.000000" spirit:maximum="60.000000">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_APU_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW APU PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_APU_PERIPHERAL_FREQMHZ" spirit:order="23300" spirit:minimum="50.000000" spirit:maximum="767.000000">750</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DCI_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW DCI PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DCI_PERIPHERAL_FREQMHZ" spirit:order="23600" spirit:minimum="0.100000" spirit:maximum="177.000000">10.159</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW QSPI PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_PERIPHERAL_FREQMHZ" spirit:order="23700" spirit:minimum="10.000000" spirit:maximum="200.000000">133</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW SMC PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_PERIPHERAL_FREQMHZ" spirit:order="23800" spirit:minimum="10.000000" spirit:maximum="100.000000">100</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SMC_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW USB0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_PERIPHERAL_FREQMHZ" spirit:order="24100" spirit:minimum="5.000000" spirit:maximum="60.000000">60</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_USB0_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW USB1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_PERIPHERAL_FREQMHZ" spirit:order="24200" spirit:minimum="5.000000" spirit:maximum="60.000000">60</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_USB1_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW SDIO PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO_PERIPHERAL_FREQMHZ" spirit:order="24300" spirit:minimum="10.000000" spirit:maximum="125.000000">100</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW UART PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART_PERIPHERAL_FREQMHZ" spirit:order="24400" spirit:minimum="10.000000" spirit:maximum="100.000000">100</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW SPI PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI_PERIPHERAL_FREQMHZ" spirit:order="24500" spirit:minimum="0.000000" spirit:maximum="200.000000">166.666666</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW CAN PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN_PERIPHERAL_FREQMHZ" spirit:order="24600" spirit:minimum="0.100000" spirit:maximum="100.000000">100</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW CAN0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_PERIPHERAL_FREQMHZ" spirit:order="24700" spirit:minimum="-2" spirit:maximum="-1">-1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN0_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW CAN1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_PERIPHERAL_FREQMHZ" spirit:order="24800" spirit:minimum="-2" spirit:maximum="-1">-1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN1_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW I2C PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C_PERIPHERAL_FREQMHZ" spirit:order="24900" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_WDT_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW WDT PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_WDT_PERIPHERAL_FREQMHZ" spirit:order="25000" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_WDT_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC_PERIPHERAL_FREQMHZ" spirit:order="25100" spirit:minimum="0.100000" spirit:maximum="100.000000">50</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC0 CLK0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ" spirit:order="25200" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC0 CLK1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ" spirit:order="25300" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC0 CLK2 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ" spirit:order="25400" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC1 CLK0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ" spirit:order="25500" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC1 CLK1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ" spirit:order="25600" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TTC1 CLK2 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ" spirit:order="25700" spirit:minimum="0.100000" spirit:maximum="200.000000">133.333333</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PCAP_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW PCAP PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PCAP_PERIPHERAL_FREQMHZ" spirit:order="25800" spirit:minimum="10.000000" spirit:maximum="200.000000">200</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TPIU_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW TPIU PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TPIU_PERIPHERAL_FREQMHZ" spirit:order="25900" spirit:minimum="10.000000" spirit:maximum="300.000000">200</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TPIU_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW FPGA0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA0_PERIPHERAL_FREQMHZ" spirit:order="26000" spirit:minimum="0.100000" spirit:maximum="250.000000">125</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW FPGA1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA1_PERIPHERAL_FREQMHZ" spirit:order="26100" spirit:minimum="0.100000" spirit:maximum="250.000000">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA2_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW FPGA2 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA2_PERIPHERAL_FREQMHZ" spirit:order="26200" spirit:minimum="0.100000" spirit:maximum="250.000000">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA3_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW FPGA3 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA3_PERIPHERAL_FREQMHZ" spirit:order="26300" spirit:minimum="0.100000" spirit:maximum="250.000000">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_APU_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT APU PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_APU_PERIPHERAL_FREQMHZ" spirit:order="26400" spirit:minimum="50.000000" spirit:maximum="800.000000">750.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_ACT_DDR_FREQ_MHZ</spirit:name>
- <spirit:displayName>PCW UIPARAM ACT DDR FREQ MHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_ACT_DDR_FREQ_MHZ" spirit:order="26500" spirit:minimum="200.000000" spirit:maximum="534.000000">500.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_DCI_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT DCI PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_DCI_PERIPHERAL_FREQMHZ" spirit:order="26600" spirit:minimum="0.100000" spirit:maximum="177.000000">10.204082</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_QSPI_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT QSPI PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ" spirit:order="26700" spirit:minimum="10.000000" spirit:maximum="200.000000">134.615387</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_SMC_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT SMC PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_SMC_PERIPHERAL_FREQMHZ" spirit:order="26800" spirit:minimum="10.000000" spirit:maximum="100.000000">10.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_ENET0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT ENET0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ" spirit:order="26900" spirit:minimum="0.1" spirit:maximum="125">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_ENET1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT ENET1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ" spirit:order="27000" spirit:minimum="0.1" spirit:maximum="125">10.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_USB0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT USB0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_USB0_PERIPHERAL_FREQMHZ" spirit:order="27100" spirit:minimum="5.000000" spirit:maximum="60.000000">60</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_USB1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT USB1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_USB1_PERIPHERAL_FREQMHZ" spirit:order="27200" spirit:minimum="5.000000" spirit:maximum="60.000000">60</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_SDIO_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT SDIO PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ" spirit:order="27300" spirit:minimum="10.000000" spirit:maximum="125.000000">97.222221</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_UART_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT UART PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_UART_PERIPHERAL_FREQMHZ" spirit:order="27400" spirit:minimum="10.000000" spirit:maximum="100.000000">97.222221</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_SPI_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT SPI PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_SPI_PERIPHERAL_FREQMHZ" spirit:order="27500" spirit:minimum="0.000000" spirit:maximum="200.000000">159.090912</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_CAN_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT CAN PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_CAN_PERIPHERAL_FREQMHZ" spirit:order="27600" spirit:minimum="0.100000" spirit:maximum="100.000000">97.222221</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_CAN0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT CAN0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_CAN0_PERIPHERAL_FREQMHZ" spirit:order="27600" spirit:minimum="0.1" spirit:maximum="100">23.8095</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_CAN1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT CAN0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_CAN1_PERIPHERAL_FREQMHZ" spirit:order="27600" spirit:minimum="0.1" spirit:maximum="100">23.8095</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_I2C_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT I2C PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_I2C_PERIPHERAL_FREQMHZ" spirit:order="27700" spirit:minimum="0.1" spirit:maximum="100">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_WDT_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT WDT PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_WDT_PERIPHERAL_FREQMHZ" spirit:order="27800" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC_PERIPHERAL_FREQMHZ" spirit:order="27900" spirit:minimum="0.100000" spirit:maximum="100.000000">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_PCAP_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT PCAP PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ" spirit:order="28000" spirit:minimum="10.000000" spirit:maximum="200.000000">194.444443</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TPIU_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TPIU PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ" spirit:order="28100" spirit:minimum="10.000000" spirit:maximum="300.000000">200.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT FPGA0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ" spirit:order="28200" spirit:minimum="0.100000" spirit:maximum="250.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT FPGA1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ" spirit:order="28300" spirit:minimum="0.100000" spirit:maximum="250.000000">10.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT FPGA2 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ" spirit:order="28400" spirit:minimum="0.100000" spirit:maximum="250.000000">10.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT FPGA3 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ" spirit:order="28500" spirit:minimum="0.100000" spirit:maximum="250.000000">10.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC0 CLK0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ" spirit:order="28600" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC0 CLK1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ" spirit:order="28700" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC0 CLK2 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ" spirit:order="28800" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC1 CLK0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ" spirit:order="28900" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC1 CLK1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ" spirit:order="29000" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ACT TTC1 CLK2 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ" spirit:order="29100" spirit:minimum="0.100000" spirit:maximum="200.000000">125.000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CLK0_FREQ</spirit:name>
- <spirit:displayName>PCW CLK0 FREQ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CLK0_FREQ" spirit:order="62600" spirit:minimum="100000" spirit:maximum="333000000">125000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CLK1_FREQ</spirit:name>
- <spirit:displayName>PCW CLK1 FREQ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CLK1_FREQ" spirit:order="62700" spirit:minimum="100000" spirit:maximum="333000000">10000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CLK2_FREQ</spirit:name>
- <spirit:displayName>PCW CLK2 FREQ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CLK2_FREQ" spirit:order="62800" spirit:minimum="100000" spirit:maximum="333000000">10000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CLK3_FREQ</spirit:name>
- <spirit:displayName>PCW CLK3 FREQ</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CLK3_FREQ" spirit:order="62900" spirit:minimum="100000" spirit:maximum="333000000">10000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_OVERRIDE_BASIC_CLOCK</spirit:name>
- <spirit:displayName>PCW OVERRIDE FREQ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_OVERRIDE_BASIC_CLOCK" spirit:choiceRef="choice_list_8af5a703" spirit:order="62900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CPU_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CPU_PERIPHERAL_DIVISOR0" spirit:order="62900">2</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CPU_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PERIPHERAL_DIVISOR0" spirit:order="62900">2</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SMC_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_PERIPHERAL_DIVISOR0" spirit:order="62900">13</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_QSPI_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO_PERIPHERAL_DIVISOR0" spirit:order="62900">18</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SDIO_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART_PERIPHERAL_DIVISOR0" spirit:order="62900">18</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UART_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI_PERIPHERAL_DIVISOR0" spirit:order="62900">11</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR0" spirit:order="62900">18</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR1" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK0_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR0" spirit:order="62900">7</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK0_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK1_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK1_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK2_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK2_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK3_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK3_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK0_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR1" spirit:order="62900">2</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK0_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK1_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR1" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK1_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK2_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR1" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK2_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK3_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR1" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_FCLK3_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR0" spirit:order="62900">14</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET0_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR1" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET0_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR1" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TPIU_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TPIU_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TPIU_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DCI_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR0" spirit:order="62900">49</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DCI_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DCI_PERIPHERAL_DIVISOR1</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR1" spirit:order="62900">2</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DCI_PERIPHERAL_DIVISOR1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PCAP_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PCAP_PERIPHERAL_DIVISOR0" spirit:order="62900">9</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_PCAP_PERIPHERAL_DIVISOR0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_WDT_PERIPHERAL_DIVISOR0</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_WDT_PERIPHERAL_DIVISOR0" spirit:order="62900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ARMPLL_CTRL_FBDIV</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ARMPLL_CTRL_FBDIV" spirit:order="62900">30</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ARMPLL_CTRL_FBDIV">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_IOPLL_CTRL_FBDIV</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_IOPLL_CTRL_FBDIV" spirit:order="62900">35</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_IOPLL_CTRL_FBDIV">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDRPLL_CTRL_FBDIV</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDRPLL_CTRL_FBDIV" spirit:order="62900">20</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDRPLL_CTRL_FBDIV">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CPU_CPU_PLL_FREQMHZ</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CPU_CPU_PLL_FREQMHZ" spirit:order="62900">1500.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CPU_CPU_PLL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_IO_IO_PLL_FREQMHZ</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_IO_IO_PLL_FREQMHZ" spirit:order="62900">1750.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_IO_IO_PLL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_DDR_PLL_FREQMHZ</spirit:name>
- <spirit:displayName>CLKPARAM</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_DDR_PLL_FREQMHZ" spirit:order="62900">1000.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_DDR_PLL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_PERIPHERAL_VALID</spirit:name>
- <spirit:displayName>PCW SMC PERIPHERAL VALID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_PERIPHERAL_VALID" spirit:choiceRef="choice_list_8af5a703" spirit:order="8101">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO_PERIPHERAL_VALID</spirit:name>
- <spirit:displayName>PCW SDIO PERIPHERAL VALID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO_PERIPHERAL_VALID" spirit:choiceRef="choice_list_8af5a703" spirit:order="9101">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI_PERIPHERAL_VALID</spirit:name>
- <spirit:displayName>PCW SPI PERIPHERAL VALID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI_PERIPHERAL_VALID" spirit:choiceRef="choice_list_8af5a703" spirit:order="1101">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN_PERIPHERAL_VALID</spirit:name>
- <spirit:displayName>PCW CAN PERIPHERAL VALID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN_PERIPHERAL_VALID" spirit:choiceRef="choice_list_8af5a703" spirit:order="1301">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART_PERIPHERAL_VALID</spirit:name>
- <spirit:displayName>PCW UART PERIPHERAL VALID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART_PERIPHERAL_VALID" spirit:choiceRef="choice_list_8af5a703" spirit:order="1301">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_CAN0</spirit:name>
- <spirit:displayName>PCW EN EMIO CAN0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_CAN0" spirit:choiceRef="choice_list_8af5a703" spirit:order="10500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_CAN1</spirit:name>
- <spirit:displayName>PCW EN EMIO CAN1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_CAN1" spirit:choiceRef="choice_list_8af5a703" spirit:order="10600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_ENET0</spirit:name>
- <spirit:displayName>PCW EN EMIO ENET0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_ENET0" spirit:choiceRef="choice_list_8af5a703" spirit:order="10700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_ENET1</spirit:name>
- <spirit:displayName>PCW EN EMIO ENET1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_ENET1" spirit:choiceRef="choice_list_8af5a703" spirit:order="10800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_PTP_ENET0</spirit:name>
- <spirit:displayName>PCW EN PTP ENET0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_PTP_ENET0" spirit:choiceRef="choice_list_8af5a703" spirit:order="10700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_PTP_ENET1</spirit:name>
- <spirit:displayName>PCW EN PTP ENET1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_PTP_ENET1" spirit:choiceRef="choice_list_8af5a703" spirit:order="10800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_GPIO</spirit:name>
- <spirit:displayName>PCW EN EMIO GPIO</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_GPIO" spirit:choiceRef="choice_list_8af5a703" spirit:order="10900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_I2C0</spirit:name>
- <spirit:displayName>PCW EN EMIO I2C0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_I2C0" spirit:choiceRef="choice_list_8af5a703" spirit:order="11000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_I2C1</spirit:name>
- <spirit:displayName>PCW EN EMIO I2C1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_I2C1" spirit:choiceRef="choice_list_8af5a703" spirit:order="11100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_PJTAG</spirit:name>
- <spirit:displayName>PCW EN EMIO PJTAG</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_PJTAG" spirit:choiceRef="choice_list_8af5a703" spirit:order="11200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_SDIO0</spirit:name>
- <spirit:displayName>PCW EN EMIO SDIO0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_SDIO0" spirit:choiceRef="choice_list_8af5a703" spirit:order="11300">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_CD_SDIO0</spirit:name>
- <spirit:displayName>PCW EN EMIO CD SDIO0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO0" spirit:choiceRef="choice_list_8af5a703" spirit:order="11400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_WP_SDIO0</spirit:name>
- <spirit:displayName>PCW EN EMIO WP SDIO0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO0" spirit:choiceRef="choice_list_8af5a703" spirit:order="11500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_SDIO1</spirit:name>
- <spirit:displayName>PCW EN EMIO SDIO1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_SDIO1" spirit:choiceRef="choice_list_8af5a703" spirit:order="11600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_CD_SDIO1</spirit:name>
- <spirit:displayName>PCW EN EMIO CD SDIO1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1" spirit:choiceRef="choice_list_8af5a703" spirit:order="11700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_WP_SDIO1</spirit:name>
- <spirit:displayName>PCW EN EMIO WP SDIO1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1" spirit:choiceRef="choice_list_8af5a703" spirit:order="11800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_SPI0</spirit:name>
- <spirit:displayName>PCW EN EMIO SPI0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_SPI0" spirit:choiceRef="choice_list_8af5a703" spirit:order="11900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_SPI1</spirit:name>
- <spirit:displayName>PCW EN EMIO SPI1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_SPI1" spirit:choiceRef="choice_list_8af5a703" spirit:order="12000">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_UART0</spirit:name>
- <spirit:displayName>PCW EN EMIO UART0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_UART0" spirit:choiceRef="choice_list_8af5a703" spirit:order="12100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_UART1</spirit:name>
- <spirit:displayName>PCW EN EMIO UART1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_UART1" spirit:choiceRef="choice_list_8af5a703" spirit:order="12200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_MODEM_UART0</spirit:name>
- <spirit:displayName>PCW EN EMIO MODEM UART0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0" spirit:choiceRef="choice_list_8af5a703" spirit:order="12300">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_MODEM_UART1</spirit:name>
- <spirit:displayName>PCW EN EMIO MODEM UART1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1" spirit:choiceRef="choice_list_8af5a703" spirit:order="12400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_TTC0</spirit:name>
- <spirit:displayName>PCW EN EMIO TTC0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_TTC0" spirit:choiceRef="choice_list_8af5a703" spirit:order="12500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_TTC1</spirit:name>
- <spirit:displayName>PCW EN EMIO TTC1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_TTC1" spirit:choiceRef="choice_list_8af5a703" spirit:order="12600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_WDT</spirit:name>
- <spirit:displayName>PCW EN EMIO WDT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_WDT" spirit:choiceRef="choice_list_8af5a703" spirit:order="12700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_TRACE</spirit:name>
- <spirit:displayName>PCW EN EMIO TRACE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_TRACE" spirit:choiceRef="choice_list_8af5a703" spirit:order="12800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_AXI_NONSECURE</spirit:name>
- <spirit:displayName>PCW USE AXI NON SECURE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_AXI_NONSECURE" spirit:choiceRef="choice_list_6727dfa6" spirit:order="45600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_M_AXI_GP0</spirit:name>
- <spirit:displayName>PCW USE M AXI GP0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_M_AXI_GP0" spirit:choiceRef="choice_list_8af5a703" spirit:order="45600">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_M_AXI_GP1</spirit:name>
- <spirit:displayName>PCW USE M AXI GP1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_M_AXI_GP1" spirit:choiceRef="choice_list_8af5a703" spirit:order="45700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_GP0</spirit:name>
- <spirit:displayName>PCW USE S AXI GP0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_GP0" spirit:choiceRef="choice_list_8af5a703" spirit:order="45800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_GP1</spirit:name>
- <spirit:displayName>PCW USE S AXI GP1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_GP1" spirit:choiceRef="choice_list_8af5a703" spirit:order="45900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_ACP</spirit:name>
- <spirit:displayName>PCW USE S AXI ACP</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_ACP" spirit:choiceRef="choice_list_8af5a703" spirit:order="46000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_HP0</spirit:name>
- <spirit:displayName>PCW USE S AXI HP0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_HP0" spirit:choiceRef="choice_list_8af5a703" spirit:order="46100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_HP1</spirit:name>
- <spirit:displayName>PCW USE S AXI HP1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_HP1" spirit:choiceRef="choice_list_8af5a703" spirit:order="46200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_HP2</spirit:name>
- <spirit:displayName>PCW USE S AXI HP2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_HP2" spirit:choiceRef="choice_list_8af5a703" spirit:order="46300">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_S_AXI_HP3</spirit:name>
- <spirit:displayName>PCW USE S AXI HP3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_S_AXI_HP3" spirit:choiceRef="choice_list_8af5a703" spirit:order="46400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP0_FREQMHZ</spirit:name>
- <spirit:displayName>PCW M AXI GP0 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP0_FREQMHZ" spirit:order="45601">125</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP0_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP1_FREQMHZ</spirit:name>
- <spirit:displayName>PCW M AXI GP1 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP1_FREQMHZ" spirit:order="45701">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP1_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_GP0_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI GP0 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_GP0_FREQMHZ" spirit:order="45801">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_GP0_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_GP1_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI GP1 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_GP1_FREQMHZ" spirit:order="45901">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_GP1_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_ACP_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI ACP FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_ACP_FREQMHZ" spirit:order="46001">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_ACP_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP0_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI HP0 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP0_FREQMHZ" spirit:order="46101">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP0_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP1_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI HP1 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP1_FREQMHZ" spirit:order="46201">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP1_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP2_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI HP2 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP2_FREQMHZ" spirit:order="46301">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP2_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP3_FREQMHZ</spirit:name>
- <spirit:displayName>PCW S AXI HP3 FREQMHZ</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP3_FREQMHZ" spirit:order="46401">10</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP3_FREQMHZ" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DMA0</spirit:name>
- <spirit:displayName>PCW USE DMA0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DMA0" spirit:choiceRef="choice_list_8af5a703" spirit:order="47200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DMA1</spirit:name>
- <spirit:displayName>PCW USE DMA1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DMA1" spirit:choiceRef="choice_list_8af5a703" spirit:order="47300">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DMA2</spirit:name>
- <spirit:displayName>PCW USE DMA2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DMA2" spirit:choiceRef="choice_list_8af5a703" spirit:order="47400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DMA3</spirit:name>
- <spirit:displayName>PCW USE DMA3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DMA3" spirit:choiceRef="choice_list_8af5a703" spirit:order="47500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_TRACE</spirit:name>
- <spirit:displayName>PCW USE TRACE</spirit:displayName>
- <spirit:description>Enable FTM Trace interface used to capture data from PL to PS debug system</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_TRACE" spirit:choiceRef="choice_list_8af5a703" spirit:order="47600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_PIPELINE_WIDTH</spirit:name>
- <spirit:displayName>PCW TRACE PIPELINE WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_PIPELINE_WIDTH" spirit:choiceRef="choice_list_070fff2f" spirit:order="47601">8</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_PIPELINE_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_TRACE)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_INCLUDE_TRACE_BUFFER</spirit:name>
- <spirit:displayName>PCW INCLUDE TRACE BUFFER</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_INCLUDE_TRACE_BUFFER" spirit:choiceRef="choice_list_8af5a703" spirit:order="47700">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_INCLUDE_TRACE_BUFFER" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_BUFFER_FIFO_SIZE</spirit:name>
- <spirit:displayName>PCW TRACE BUFFER FIFO SIZE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_BUFFER_FIFO_SIZE" spirit:choiceRef="choice_list_96d47805" spirit:order="47800">128</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_BUFFER_FIFO_SIZE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_TRACE_DATA_EDGE_DETECTOR</spirit:name>
- <spirit:displayName>PCW USE TRACE DATA EDGE DETECTOR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_TRACE_DATA_EDGE_DETECTOR" spirit:choiceRef="choice_list_8af5a703" spirit:order="47900">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USE_TRACE_DATA_EDGE_DETECTOR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_BUFFER_CLOCK_DELAY</spirit:name>
- <spirit:displayName>PCW TRACE BUFFER CLOCK DELAY</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_BUFFER_CLOCK_DELAY" spirit:choiceRef="choice_list_27376075" spirit:order="48000">12</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_BUFFER_CLOCK_DELAY" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_TRACE)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_CROSS_TRIGGER</spirit:name>
- <spirit:displayName>PCW USE CROSS TRIGGER</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_CROSS_TRIGGER" spirit:choiceRef="choice_list_8af5a703" spirit:order="48100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_IN0</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_IN0" spirit:choiceRef="choice_list_13f07802" spirit:order="48102">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_IN0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_IN1</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_IN1" spirit:choiceRef="choice_list_13f07802" spirit:order="48103">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_IN1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_IN2</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_IN2" spirit:choiceRef="choice_list_13f07802" spirit:order="48104">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_IN2" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_IN3</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_IN3" spirit:choiceRef="choice_list_13f07802" spirit:order="48105">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_IN3" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_OUT0</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_OUT0" spirit:choiceRef="choice_list_13f07802" spirit:order="48106">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_OUT0" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_OUT1</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_OUT1" spirit:choiceRef="choice_list_13f07802" spirit:order="48107">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_OUT1" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_OUT2</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_OUT2" spirit:choiceRef="choice_list_13f07802" spirit:order="48108">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_OUT2" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FTM_CTI_OUT3</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FTM_CTI_OUT3" spirit:choiceRef="choice_list_13f07802" spirit:order="48109">DISABLED</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FTM_CTI_OUT3" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DEBUG</spirit:name>
- <spirit:displayName>PCW USE DEBUG</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DEBUG" spirit:choiceRef="choice_list_8af5a703" spirit:order="48101">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_CR_FABRIC</spirit:name>
- <spirit:displayName>PCW USE CR FABRIC</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_CR_FABRIC" spirit:choiceRef="choice_list_8af5a703" spirit:order="48200">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_AXI_FABRIC_IDLE</spirit:name>
- <spirit:displayName>PCW USE AXI FABRIC IDLE</spirit:displayName>
- <spirit:description>Enables idle AXI signal to the PS used to indicate that there are no outstanding AXI transactions in the PL</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_AXI_FABRIC_IDLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="48300">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DDR_BYPASS</spirit:name>
- <spirit:displayName>PCW USE DDR BYPASS</spirit:displayName>
- <spirit:description>Enables DDR urgent/arb signal used to signal a critical memory starvation situation to the DDR arbitration for the four AXI ports of the PS DDR memory controller</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DDR_BYPASS" spirit:choiceRef="choice_list_8af5a703" spirit:order="48400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_FABRIC_INTERRUPT</spirit:name>
- <spirit:displayName>PCW USE FABRIC INTERRUPT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT" spirit:choiceRef="choice_list_8af5a703" spirit:order="48500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_PROC_EVENT_BUS</spirit:name>
- <spirit:displayName>PCW USE PROC EVENT BUS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_PROC_EVENT_BUS" spirit:choiceRef="choice_list_8af5a703" spirit:order="48600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_EXPANDED_IOP</spirit:name>
- <spirit:displayName>PCW USE EXPANDED IOP</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_EXPANDED_IOP" spirit:choiceRef="choice_list_8af5a703" spirit:order="48650">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_HIGH_OCM</spirit:name>
- <spirit:displayName>PCW USE HIGH OCM</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_HIGH_OCM" spirit:choiceRef="choice_list_8af5a703" spirit:order="48651">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_PS_SLCR_REGISTERS</spirit:name>
- <spirit:displayName>PCW USE PS SLCR REGISTERS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS" spirit:choiceRef="choice_list_8af5a703" spirit:order="48652">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_EXPANDED_PS_SLCR_REGISTERS</spirit:name>
- <spirit:displayName>PCW USE EXPANDED PS SLCR REGISTERS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS" spirit:choiceRef="choice_list_8af5a703" spirit:order="48653">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USE_EXPANDED_PS_SLCR_REGISTERS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_CORESIGHT</spirit:name>
- <spirit:displayName>PCW USE CORESIGHT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_CORESIGHT" spirit:choiceRef="choice_list_8af5a703" spirit:order="48654">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_EMIO_SRAM_INT</spirit:name>
- <spirit:displayName>PCW EN EMIO SRAM INT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_EMIO_SRAM_INT" spirit:choiceRef="choice_list_8af5a703" spirit:order="48700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_EMIO_GPIO_WIDTH</spirit:name>
- <spirit:displayName>PCW EMIO GPIO WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_WIDTH" spirit:order="48800" spirit:minimum="1" spirit:maximum="64" spirit:rangeType="long">64</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_GPIO_EMIO_GPIO_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_EMIO_GPIO)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GP0_NUM_WRITE_THREADS</spirit:name>
- <spirit:displayName>GP0 NUM WRITE THREADS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GP0_NUM_WRITE_THREADS" spirit:order="48810" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GP0_NUM_READ_THREADS</spirit:name>
- <spirit:displayName>GP0 NUM READ THREADS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GP0_NUM_READ_THREADS" spirit:order="48820" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GP1_NUM_WRITE_THREADS</spirit:name>
- <spirit:displayName>GP1 NUM WRITE THREADS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GP1_NUM_WRITE_THREADS" spirit:order="48830" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GP1_NUM_READ_THREADS</spirit:name>
- <spirit:displayName>GP1 NUM READ THREADS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GP1_NUM_READ_THREADS" spirit:order="48840" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_BAUD_RATE</spirit:name>
- <spirit:displayName>PCW UART0 BAUD RATE</spirit:displayName>
- <spirit:description>Configure baud rate to determine UART0 operating frequency</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_BAUD_RATE" spirit:choiceRef="choice_list_f585525a" spirit:order="49299">115200</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_UART0_BAUD_RATE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_UART0)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_BAUD_RATE</spirit:name>
- <spirit:displayName>PCW UART1 BAUD RATE</spirit:displayName>
- <spirit:description>Configure baud rate to determine UART1 operating frequency</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_BAUD_RATE" spirit:choiceRef="choice_list_f585525a" spirit:order="49297">115200</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_UART1_BAUD_RATE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_EN_UART1)) = 1)">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_4K_TIMER</spirit:name>
- <spirit:displayName>PCW EN 4K TIMER</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_4K_TIMER" spirit:choiceRef="choice_list_8af5a703" spirit:order="49298">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP0_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW M AXI GP0 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP0_ID_WIDTH" spirit:choiceRef="choice_list_27376075" spirit:order="53100">12</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP0_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP0_ENABLE_STATIC_REMAP</spirit:name>
- <spirit:displayName>PCW M AXI GP0 ENABLE STATIC REMAP</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP0_ENABLE_STATIC_REMAP" spirit:choiceRef="choice_list_8af5a703" spirit:order="53400">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP0_ENABLE_STATIC_REMAP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP0_SUPPORT_NARROW_BURST</spirit:name>
- <spirit:displayName>PCW M AXI GP0 SUPPORT NARROW BURST</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP0_SUPPORT_NARROW_BURST" spirit:choiceRef="choice_list_8af5a703" spirit:order="53500">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP0_SUPPORT_NARROW_BURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP0_THREAD_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW M AXI GP0 THREAD ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP0_THREAD_ID_WIDTH" spirit:choiceRef="choice_list_f5e7200e" spirit:order="62200">12</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP0_THREAD_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP1_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW M AXI GP1 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP1_ID_WIDTH" spirit:choiceRef="choice_list_27376075" spirit:order="54000">12</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP1_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP1_ENABLE_STATIC_REMAP</spirit:name>
- <spirit:displayName>PCW M AXI GP1 ENABLE STATIC REMAP</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP1_ENABLE_STATIC_REMAP" spirit:choiceRef="choice_list_8af5a703" spirit:order="54300">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP1_ENABLE_STATIC_REMAP" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP1_SUPPORT_NARROW_BURST</spirit:name>
- <spirit:displayName>PCW M AXI GP1 SUPPORT NARROW BURST</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP1_SUPPORT_NARROW_BURST" spirit:choiceRef="choice_list_8af5a703" spirit:order="54400">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP1_SUPPORT_NARROW_BURST" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_M_AXI_GP1_THREAD_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW M AXI GP1 THREAD ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_M_AXI_GP1_THREAD_ID_WIDTH" spirit:choiceRef="choice_list_f5e7200e" spirit:order="62400">12</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_M_AXI_GP1_THREAD_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_M_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_GP0_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI GP0 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_GP0_ID_WIDTH" spirit:choiceRef="choice_list_35b40bd0" spirit:order="54900">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_GP0_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_GP1_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI GP1 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_GP1_ID_WIDTH" spirit:choiceRef="choice_list_35b40bd0" spirit:order="55500">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_GP1_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_GP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_ACP_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI ACP ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_ACP_ID_WIDTH" spirit:order="56100" spirit:minimum="1" spirit:maximum="3" spirit:rangeType="long">3</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_ACP_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_INCLUDE_ACP_TRANS_CHECK</spirit:name>
- <spirit:displayName>PCW INCLUDE ACP TRANS CHECK</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_INCLUDE_ACP_TRANS_CHECK" spirit:choiceRef="choice_list_8af5a703" spirit:order="48900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USE_DEFAULT_ACP_USER_VAL</spirit:name>
- <spirit:displayName>PCW USE DEFAULT ACP USER VAL</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USE_DEFAULT_ACP_USER_VAL" spirit:choiceRef="choice_list_8af5a703" spirit:order="49000">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_USE_DEFAULT_ACP_USER_VAL" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_ACP_ARUSER_VAL</spirit:name>
- <spirit:displayName>PCW S AXI ACP ARUSER VAL</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_ACP_ARUSER_VAL" spirit:order="49100" spirit:minimum="0" spirit:maximum="31" spirit:rangeType="long">31</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_ACP_ARUSER_VAL" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_DEFAULT_ACP_USER_VAL)) = 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_ACP_AWUSER_VAL</spirit:name>
- <spirit:displayName>PCW S AXI ACP AWUSER VAL</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_ACP_AWUSER_VAL" spirit:order="49200" spirit:minimum="0" spirit:maximum="31" spirit:rangeType="long">31</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_ACP_AWUSER_VAL" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_ACP)) = 1) &&(spirit:decode(id(PARAM_VALUE.PCW_USE_DEFAULT_ACP_USER_VAL)) = 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP0_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP0 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP0_ID_WIDTH" spirit:choiceRef="choice_list_35b40bd0" spirit:order="57000">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP0_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP0_DATA_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP0 DATA WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP0_DATA_WIDTH" spirit:choiceRef="choice_list_99ba8646" spirit:order="57200">64</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP0_DATA_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP0)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP1_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP1 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP1_ID_WIDTH" spirit:choiceRef="choice_list_35b40bd0" spirit:order="57600">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP1_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP1_DATA_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP1 DATA WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP1_DATA_WIDTH" spirit:choiceRef="choice_list_99ba8646" spirit:order="57800">64</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP1_DATA_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP1)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP2_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP2 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP2_ID_WIDTH" spirit:choiceRef="choice_list_35b40bd0" spirit:order="58200">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP2_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP2_DATA_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP2 DATA WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP2_DATA_WIDTH" spirit:choiceRef="choice_list_99ba8646" spirit:order="58400">64</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP2_DATA_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP2)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP3_ID_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP3 ID WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP3_ID_WIDTH" spirit:choiceRef="choice_list_35b40bd0" spirit:order="58800">6</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP3_ID_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_S_AXI_HP3_DATA_WIDTH</spirit:name>
- <spirit:displayName>PCW S AXI HP3 DATA WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_S_AXI_HP3_DATA_WIDTH" spirit:choiceRef="choice_list_99ba8646" spirit:order="59000">64</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_S_AXI_HP3_DATA_WIDTH" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_S_AXI_HP3)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NUM_F2P_INTR_INPUTS</spirit:name>
- <spirit:displayName>PCW NUM F2P INTR INPUTS</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NUM_F2P_INTR_INPUTS" spirit:order="62500" spirit:minimum="1" spirit:maximum="16" spirit:rangeType="long">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_NUM_F2P_INTR_INPUTS" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_IRQ_F2P_INTR)) = 1) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_DDR</spirit:name>
- <spirit:displayName>PCW EN DDR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_DDR" spirit:choiceRef="choice_list_8af5a703" spirit:order="8000">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_SMC</spirit:name>
- <spirit:displayName>PCW EN SMC</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_SMC" spirit:choiceRef="choice_list_8af5a703" spirit:order="8100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_QSPI</spirit:name>
- <spirit:displayName>PCW EN QSPI</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_QSPI" spirit:choiceRef="choice_list_8af5a703" spirit:order="8200">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CAN0</spirit:name>
- <spirit:displayName>PCW EN CAN0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CAN0" spirit:choiceRef="choice_list_8af5a703" spirit:order="8300">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CAN1</spirit:name>
- <spirit:displayName>PCW EN CAN1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CAN1" spirit:choiceRef="choice_list_8af5a703" spirit:order="8400">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_ENET0</spirit:name>
- <spirit:displayName>PCW EN ENET0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_ENET0" spirit:choiceRef="choice_list_8af5a703" spirit:order="8500">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_ENET1</spirit:name>
- <spirit:displayName>PCW EN ENET1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_ENET1" spirit:choiceRef="choice_list_8af5a703" spirit:order="8600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_GPIO</spirit:name>
- <spirit:displayName>PCW EN GPIO</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_GPIO" spirit:choiceRef="choice_list_8af5a703" spirit:order="8700">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_I2C0</spirit:name>
- <spirit:displayName>PCW EN I2C0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_I2C0" spirit:choiceRef="choice_list_8af5a703" spirit:order="8800">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_I2C1</spirit:name>
- <spirit:displayName>PCW EN I2C1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_I2C1" spirit:choiceRef="choice_list_8af5a703" spirit:order="8900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_PJTAG</spirit:name>
- <spirit:displayName>PCW EN PJTAG</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_PJTAG" spirit:choiceRef="choice_list_8af5a703" spirit:order="9000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_SDIO0</spirit:name>
- <spirit:displayName>PCW EN SDIO0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_SDIO0" spirit:choiceRef="choice_list_8af5a703" spirit:order="9100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_SDIO1</spirit:name>
- <spirit:displayName>PCW EN SDIO1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_SDIO1" spirit:choiceRef="choice_list_8af5a703" spirit:order="9200">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_SPI0</spirit:name>
- <spirit:displayName>PCW EN SPI0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_SPI0" spirit:choiceRef="choice_list_8af5a703" spirit:order="9300">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_SPI1</spirit:name>
- <spirit:displayName>PCW EN SPI1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_SPI1" spirit:choiceRef="choice_list_8af5a703" spirit:order="9400">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_UART0</spirit:name>
- <spirit:displayName>PCW EN UART0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_UART0" spirit:choiceRef="choice_list_8af5a703" spirit:order="9500">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_UART1</spirit:name>
- <spirit:displayName>PCW EN UART1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_UART1" spirit:choiceRef="choice_list_8af5a703" spirit:order="9600">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_MODEM_UART0</spirit:name>
- <spirit:displayName>PCW EN MODEM UART0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_MODEM_UART0" spirit:choiceRef="choice_list_8af5a703" spirit:order="9700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_MODEM_UART1</spirit:name>
- <spirit:displayName>PCW EN MODEM UART1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_MODEM_UART1" spirit:choiceRef="choice_list_8af5a703" spirit:order="9800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_TTC0</spirit:name>
- <spirit:displayName>PCW EN TTC0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_TTC0" spirit:choiceRef="choice_list_8af5a703" spirit:order="9900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_TTC1</spirit:name>
- <spirit:displayName>PCW EN TTC1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_TTC1" spirit:choiceRef="choice_list_8af5a703" spirit:order="10000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_WDT</spirit:name>
- <spirit:displayName>PCW EN WDT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_WDT" spirit:choiceRef="choice_list_8af5a703" spirit:order="10100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_TRACE</spirit:name>
- <spirit:displayName>PCW EN TRACE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_TRACE" spirit:choiceRef="choice_list_8af5a703" spirit:order="10200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_USB0</spirit:name>
- <spirit:displayName>PCW EN USB0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_USB0" spirit:choiceRef="choice_list_8af5a703" spirit:order="10300">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_USB1</spirit:name>
- <spirit:displayName>PCW EN USB1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_USB1" spirit:choiceRef="choice_list_8af5a703" spirit:order="10400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DQ_WIDTH</spirit:name>
- <spirit:displayName>PCW DQ WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DQ_WIDTH" spirit:choiceRef="choice_list_20dc6536" spirit:order="15">32</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DQS_WIDTH</spirit:name>
- <spirit:displayName>PCW DQS WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DQS_WIDTH" spirit:choiceRef="choice_list_1075ca33" spirit:order="14">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DM_WIDTH</spirit:name>
- <spirit:displayName>PCW DM WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DM_WIDTH" spirit:choiceRef="choice_list_1075ca33" spirit:order="13">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_PRIMITIVE</spirit:name>
- <spirit:displayName>PCW MIO PRIMITIVE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_PRIMITIVE" spirit:choiceRef="choice_list_a0318123" spirit:order="12">54</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLK0_PORT</spirit:name>
- <spirit:displayName>PCW EN CLK0 PORT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLK0_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60241">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLK0_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLK1_PORT</spirit:name>
- <spirit:displayName>PCW EN CLK1 PORT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLK1_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60242">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLK1_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLK2_PORT</spirit:name>
- <spirit:displayName>PCW EN CLK2 PORT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLK2_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60243">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLK2_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLK3_PORT</spirit:name>
- <spirit:displayName>PCW EN CLK3 PORT</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLK3_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60244">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLK3_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_RST0_PORT</spirit:name>
- <spirit:displayName>PCW EN RST0 PORT</spirit:displayName>
- <spirit:description>Enables general purpose reset signal 0 for PL logic</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_RST0_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60245">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_RST0_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_RST1_PORT</spirit:name>
- <spirit:displayName>PCW EN RST1 PORT</spirit:displayName>
- <spirit:description>Enables general purpose reset signal 1 for PL logic</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_RST1_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60246">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_RST1_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_RST2_PORT</spirit:name>
- <spirit:displayName>PCW EN RST2 PORT</spirit:displayName>
- <spirit:description>Enables general purpose reset signal 2 for PL logic</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_RST2_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60247">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_RST2_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_RST3_PORT</spirit:name>
- <spirit:displayName>PCW EN RST3 PORT</spirit:displayName>
- <spirit:description>Enables general purpose reset signal 3 for PL logic</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_RST3_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60248">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_RST3_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLKTRIG0_PORT</spirit:name>
- <spirit:displayName>PCW EN CLKTRIG0 PORT</spirit:displayName>
- <spirit:description>Enables PL clock trigger signal 0 used to halt the PL clock when counting a programmed number of clock pulses</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLKTRIG0_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60249">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLKTRIG0_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLKTRIG1_PORT</spirit:name>
- <spirit:displayName>PCW EN CLKTRIG1 PORT</spirit:displayName>
- <spirit:description>Enables PL clock trigger signal 1 used to halt the PL clock when counting a programmed number of clock pulses</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLKTRIG1_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60250">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLKTRIG1_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLKTRIG2_PORT</spirit:name>
- <spirit:displayName>PCW EN CLKTRIG2 PORT</spirit:displayName>
- <spirit:description>Enables PL clock trigger signal 2 used to halt the PL clock when counting a programmed number of clock pulses</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLKTRIG2_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60251">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLKTRIG2_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_EN_CLKTRIG3_PORT</spirit:name>
- <spirit:displayName>PCW EN CLKTRIG3 PORT</spirit:displayName>
- <spirit:description>Enables PL clock trigger signal 3 used to halt the PL clock when counting a programmed number of clock pulses</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_EN_CLKTRIG3_PORT" spirit:choiceRef="choice_list_8af5a703" spirit:order="60252">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_EN_CLKTRIG3_PORT" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_CR_FABRIC)) == 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC_ABORT_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC ABORT INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC_ABORT_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60253">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC_ABORT_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC0_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60254">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC1_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60255">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC2_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC2 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC2_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60256">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC2_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC3_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC3 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC3_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60257">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC3_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC4_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC4 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC4_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60258">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC4_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC5_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC5 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC5_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60259">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC5_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC6_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC6 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC6_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60260">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC6_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_DMAC7_INTR</spirit:name>
- <spirit:displayName>PCW P2F DMAC7 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_DMAC7_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60261">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_DMAC7_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&((spirit:decode(id(PARAM_VALUE.PCW_USE_DMA0)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA1)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA2)) = 1)||(spirit:decode(id(PARAM_VALUE.PCW_USE_DMA3)) = 1)))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_SMC_INTR</spirit:name>
- <spirit:displayName>PCW P2F SMC INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_SMC_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60262">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_SMC_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_SMC)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_QSPI_INTR</spirit:name>
- <spirit:displayName>PCW P2F QSPI INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_QSPI_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60263">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_QSPI_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_QSPI)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_CTI_INTR</spirit:name>
- <spirit:displayName>PCW P2F CTI INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_CTI_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60264">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_CTI_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_USE_CROSS_TRIGGER)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_GPIO_INTR</spirit:name>
- <spirit:displayName>PCW P2F GPIO INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_GPIO_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60265">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_GPIO_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_GPIO)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_USB0_INTR</spirit:name>
- <spirit:displayName>PCW P2F USB0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_USB0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60266">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_USB0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_USB0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_ENET0_INTR</spirit:name>
- <spirit:displayName>PCW P2F ENET0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_ENET0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60267">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_ENET0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_ENET0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_SDIO0_INTR</spirit:name>
- <spirit:displayName>PCW P2F SDIO0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_SDIO0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60268">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_SDIO0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_SDIO0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_I2C0_INTR</spirit:name>
- <spirit:displayName>PCW P2F I2C0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_I2C0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60269">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_I2C0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_I2C0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_SPI0_INTR</spirit:name>
- <spirit:displayName>PCW P2F SPI0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_SPI0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60270">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_SPI0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_SPI0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_UART0_INTR</spirit:name>
- <spirit:displayName>PCW P2F UART0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_UART0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60271">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_UART0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_UART0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_CAN0_INTR</spirit:name>
- <spirit:displayName>PCW P2F CAN0 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_CAN0_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60272">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_CAN0_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CAN0)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_USB1_INTR</spirit:name>
- <spirit:displayName>PCW P2F USB1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_USB1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60273">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_USB1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_USB1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_ENET1_INTR</spirit:name>
- <spirit:displayName>PCW P2F ENET1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_ENET1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60274">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_ENET1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_ENET1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_SDIO1_INTR</spirit:name>
- <spirit:displayName>PCW P2F SDIO1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_SDIO1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60275">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_SDIO1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_SDIO1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_I2C1_INTR</spirit:name>
- <spirit:displayName>PCW P2F I2C1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_I2C1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60276">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_I2C1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_I2C1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_SPI1_INTR</spirit:name>
- <spirit:displayName>PCW P2F SPI1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_SPI1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60277">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_SPI1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_SPI1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_UART1_INTR</spirit:name>
- <spirit:displayName>PCW P2F UART1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_UART1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60278">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_UART1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_UART1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_P2F_CAN1_INTR</spirit:name>
- <spirit:displayName>PCW P2F CAN1 INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_P2F_CAN1_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60279">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_P2F_CAN1_INTR" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CAN1)) = 1))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_IRQ_F2P_INTR</spirit:name>
- <spirit:displayName>PCW IRQ F2P INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_IRQ_F2P_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60280">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_IRQ_F2P_INTR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_IRQ_F2P_MODE</spirit:name>
- <spirit:displayName>PCW IRQ F2P MODE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_IRQ_F2P_MODE" spirit:choiceRef="choice_list_46eb370a" spirit:order="60281">DIRECT</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_IRQ_F2P_MODE" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_IRQ_F2P_INTR)) = 1) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CORE0_FIQ_INTR</spirit:name>
- <spirit:displayName>PCW CORE0 FIQ INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CORE0_FIQ_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60281">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CORE0_FIQ_INTR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CORE0_IRQ_INTR</spirit:name>
- <spirit:displayName>PCW CORE0 IRQ INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CORE0_IRQ_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60282">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CORE0_IRQ_INTR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CORE1_FIQ_INTR</spirit:name>
- <spirit:displayName>PCW CORE1 FIQ INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CORE1_FIQ_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60283">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CORE1_FIQ_INTR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CORE1_IRQ_INTR</spirit:name>
- <spirit:displayName>PCW CORE1 IRQ INTR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CORE1_IRQ_INTR" spirit:choiceRef="choice_list_8af5a703" spirit:order="60284">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_CORE1_IRQ_INTR" xilinx:dependency="(spirit:decode(id(PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT)) = 1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_VALUE_SILVERSION</spirit:name>
- <spirit:displayName>PCW VALUE SILVERSION</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_VALUE_SILVERSION" spirit:choiceRef="choice_list_7d6d1b3f" spirit:order="60285">3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GP0_EN_MODIFIABLE_TXN</spirit:name>
- <spirit:displayName>PCW GP0 EN MODIFIABLE TXN</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GP0_EN_MODIFIABLE_TXN" spirit:choiceRef="choice_list_ae9f88f6" spirit:order="63400">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GP1_EN_MODIFIABLE_TXN</spirit:name>
- <spirit:displayName>PCW GP1 EN MODIFIABLE TXN</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GP1_EN_MODIFIABLE_TXN" spirit:choiceRef="choice_list_ae9f88f6" spirit:order="63400">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_IMPORT_BOARD_PRESET</spirit:name>
- <spirit:displayName>PCW IMPORT BOARD PRESET</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_IMPORT_BOARD_PRESET" spirit:order="10">None</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PERIPHERAL_BOARD_PRESET</spirit:name>
- <spirit:displayName>PCW PERIPHERAL BOARD PRESET</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PERIPHERAL_BOARD_PRESET" spirit:order="16">None</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PRESET_BANK0_VOLTAGE</spirit:name>
- <spirit:displayName>PCW PRESET BANK0 VOLTAGE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PRESET_BANK0_VOLTAGE" spirit:choiceRef="choice_list_3f5f808e" spirit:order="29200">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PRESET_BANK1_VOLTAGE</spirit:name>
- <spirit:displayName>PCW PRESET BANK1 VOLTAGE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PRESET_BANK1_VOLTAGE" spirit:choiceRef="choice_list_72f3e128" spirit:order="29300">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_ENABLE</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7999">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_ADV_ENABLE</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR ADV ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_ADV_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7999">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_MEMORY_TYPE</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR MEMORY TYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_MEMORY_TYPE" spirit:choiceRef="choice_list_c5ebb0ea" spirit:order="13000">DDR 3 (Low Voltage)</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_ECC</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR ECC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_ECC" spirit:choiceRef="choice_list_fc3456a9" spirit:order="13200">Disabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BUS_WIDTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BUS WIDTH</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BUS_WIDTH" spirit:choiceRef="choice_list_7abc2131" spirit:order="13100">16 Bit</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_BL</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR BL</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_BL" spirit:choiceRef="choice_list_fd37a6fb" spirit:order="13300">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_HIGH_TEMP</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR HIGH TEMP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_HIGH_TEMP" spirit:choiceRef="choice_list_2e355d8b" spirit:order="13400">Normal (0-85)</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_PARTNO</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR PARTNO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_PARTNO" spirit:choiceRef="choice_list_be8ca58c" spirit:order="13600">MT41K128M16 JT-125</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DRAM_WIDTH</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DRAM WIDTH</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DRAM_WIDTH" spirit:choiceRef="choice_list_eaad72ce" spirit:order="13700">16 Bits</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_DRAM_WIDTH">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_DEVICE_CAPACITY</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR DEVICE CAPACITY</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_DEVICE_CAPACITY" spirit:choiceRef="choice_list_32c7371b" spirit:order="13800">2048 MBits</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_DEVICE_CAPACITY">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_SPEED_BIN</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR SPEED BIN</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_SPEED_BIN" spirit:choiceRef="choice_list_bbba28a6" spirit:order="14000">DDR3_1066F</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UIPARAM_DDR_SPEED_BIN">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR TRAIN WRITE LEVEL</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL" spirit:choiceRef="choice_list_8af5a703" spirit:order="15600">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_TRAIN_READ_GATE</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR TRAIN READ GATE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_READ_GATE" spirit:choiceRef="choice_list_8af5a703" spirit:order="15700">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_TRAIN_DATA_EYE</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR TRAIN DATA EYE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_DATA_EYE" spirit:choiceRef="choice_list_8af5a703" spirit:order="15800">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_CLOCK_STOP_EN</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR CLOCK STOP EN</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_STOP_EN" spirit:choiceRef="choice_list_8af5a703" spirit:order="15900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_DDR_USE_INTERNAL_VREF</spirit:name>
- <spirit:displayName>PCW UIPARAM DDR USE INTERNAL VREF</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_DDR_USE_INTERNAL_VREF" spirit:choiceRef="choice_list_8af5a703" spirit:order="16000">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_WRITEPORT_0</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY WRITEPORT 0</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_0" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_WRITEPORT_0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_WRITEPORT_1</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY WRITEPORT 0</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_1" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_WRITEPORT_1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_WRITEPORT_2</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY WRITEPORT 0</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_2" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_WRITEPORT_2">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_WRITEPORT_3</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY WRITEPORT 0</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_3" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_WRITEPORT_3">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_READPORT_0</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY READPORT 0</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_0" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_READPORT_0">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_READPORT_1</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY READPORT 1</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_1" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_READPORT_1">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_READPORT_2</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY READPORT 2</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_2" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_READPORT_2">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PRIORITY_READPORT_3</spirit:name>
- <spirit:displayName>PCW DDR PRIORITY READPORT 3</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_3" spirit:choiceRef="choice_list_4d36a164" spirit:order="16000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PRIORITY_READPORT_3">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PORT0_HPR_ENABLE</spirit:name>
- <spirit:displayName>PCW DDR PORT0 ENABLE HPR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PORT0_HPR_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="16000">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PORT0_HPR_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PORT1_HPR_ENABLE</spirit:name>
- <spirit:displayName>PCW DDR PORT1 ENABLE HPR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PORT1_HPR_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="16000">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PORT1_HPR_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PORT2_HPR_ENABLE</spirit:name>
- <spirit:displayName>PCW DDR PORT2 ENABLE HPR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PORT2_HPR_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="16000">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PORT2_HPR_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PORT3_HPR_ENABLE</spirit:name>
- <spirit:displayName>PCW DDR PORT3 ENABLE HPR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PORT3_HPR_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="16000">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_PORT3_HPR_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_HPRLPR_QUEUE_PARTITION</spirit:name>
- <spirit:displayName>PCW DDR HPRLPR QUEUE PARTITION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_HPRLPR_QUEUE_PARTITION" spirit:choiceRef="choice_list_2328412a" spirit:order="16000">HPR(0)/LPR(32)</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_HPRLPR_QUEUE_PARTITION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL</spirit:name>
- <spirit:displayName>PCW DDR LPR TO CRITICAL PRIORITY LEVEL</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL" spirit:order="16000" spirit:minimum="0.000000" spirit:maximum="2047.000000">2</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL</spirit:name>
- <spirit:displayName>PCW DDR HPR TO CRITICAL PRIORITY LEVEL</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL" spirit:order="16000" spirit:minimum="0.000000" spirit:maximum="2047.000000">15</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL</spirit:name>
- <spirit:displayName>PCW DDR WRITE TO CRITICAL PRIORITY LEVEL</spirit:displayName>
- <spirit:value spirit:format="float" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL" spirit:order="16000" spirit:minimum="0.000000" spirit:maximum="2047.000000">2</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW NAND PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="100">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NAND_PERIPHERAL_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_NAND_IO</spirit:name>
- <spirit:displayName>PCW NAND NAND IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_NAND_IO" spirit:choiceRef="choice_list_2091a159" spirit:order="6000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NAND_NAND_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_GRP_D8_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_GRP_D8_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6001">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NAND_GRP_D8_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_GRP_D8_IO</spirit:name>
- <spirit:displayName>PCW NAND GRP D8 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_GRP_D8_IO" spirit:choiceRef="choice_list_fb1b25ef" spirit:order="6002"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NAND_GRP_D8_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW NOR PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="200">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_PERIPHERAL_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_NOR_IO</spirit:name>
- <spirit:displayName>PCW NOR NOR IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_NOR_IO" spirit:choiceRef="choice_list_353a343d" spirit:order="5900"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_NOR_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_A25_ENABLE</spirit:name>
- <spirit:displayName>PCW NOR GRP A25 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5901">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_A25_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_A25_IO</spirit:name>
- <spirit:displayName>PCW NOR GRP CS0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_A25_IO" spirit:choiceRef="choice_list_303d848a" spirit:order="5902"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_A25_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_CS0_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5903">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_CS0_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_CS0_IO</spirit:name>
- <spirit:displayName>PCW NOR GRP CS1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_CS0_IO" spirit:choiceRef="choice_list_e14dbfa8" spirit:order="5904"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_CS0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_SRAM_CS0_ENABLE</spirit:name>
- <spirit:displayName>PCW NOR GRP SRAM CS0 ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5905">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_SRAM_CS0_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_SRAM_CS0_IO</spirit:name>
- <spirit:displayName>PCW NOR GRP SRAM CS1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_IO" spirit:choiceRef="choice_list_e14dbfa8" spirit:order="5906"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_SRAM_CS0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_CS1_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5907">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_CS1_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_CS1_IO</spirit:name>
- <spirit:displayName>PCW NOR GRP SRAM CS0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_CS1_IO" spirit:choiceRef="choice_list_303d848a" spirit:order="5908"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_CS1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_SRAM_CS1_ENABLE</spirit:name>
- <spirit:displayName>PCW NOR GRP SRAM CS1 ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5909">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_SRAM_CS1_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_SRAM_CS1_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_IO" spirit:choiceRef="choice_list_303d848a" spirit:order="5910"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_SRAM_CS1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_SRAM_INT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5911">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_SRAM_INT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_GRP_SRAM_INT_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_IO" spirit:choiceRef="choice_list_f7b6ff1b" spirit:order="5912"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_NOR_GRP_SRAM_INT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW QSPI PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="300">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_QSPI_IO</spirit:name>
- <spirit:displayName>PCW QSPI QSPI IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_QSPI_IO" spirit:choiceRef="choice_list_cbbe7bdf" spirit:order="5800">MIO 1 .. 6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_SINGLE_SS_ENABLE</spirit:name>
- <spirit:displayName>PCW QSPI GRP SINGLE SS ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5808">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_SINGLE_SS_IO</spirit:name>
- <spirit:displayName>PCW QSPI GRP SINGLE SS IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_IO" spirit:choiceRef="choice_list_cbbe7bdf" spirit:order="5809">MIO 1 .. 6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_SS1_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_SS1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5801">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_SS1_IO</spirit:name>
- <spirit:displayName>PCW QSPI GRP SS1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_SS1_IO" spirit:choiceRef="choice_list_e14dbfa8" spirit:order="5802"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_QSPI_GRP_SS1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SINGLE_QSPI_DATA_MODE</spirit:name>
- <spirit:displayName>Single QSPI Data Mode</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SINGLE_QSPI_DATA_MODE" spirit:choiceRef="choice_list_5beb845c" spirit:order="5802">x4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DUAL_STACK_QSPI_DATA_MODE</spirit:name>
- <spirit:displayName>Dual Stack QSPI Data Mode</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DUAL_STACK_QSPI_DATA_MODE" spirit:choiceRef="choice_list_bc805c93" spirit:order="5802"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DUAL_STACK_QSPI_DATA_MODE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DUAL_PARALLEL_QSPI_DATA_MODE</spirit:name>
- <spirit:displayName>Dual Parallel QSPI Data Mode</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DUAL_PARALLEL_QSPI_DATA_MODE" spirit:choiceRef="choice_list_3b9f1944" spirit:order="5802"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_DUAL_PARALLEL_QSPI_DATA_MODE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_IO1_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_IO1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5803">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_IO1_IO</spirit:name>
- <spirit:displayName>PCW QSPI GRP IO1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_IO1_IO" spirit:choiceRef="choice_list_d2f51b63" spirit:order="5804"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_QSPI_GRP_IO1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_FBCLK_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5805">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_GRP_FBCLK_IO</spirit:name>
- <spirit:displayName>PCW QSPI GRP FBCLK IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_IO" spirit:choiceRef="choice_list_dc7979fd" spirit:order="5806"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_QSPI_GRP_FBCLK_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_INTERNAL_HIGHADDRESS</spirit:name>
- <spirit:displayName>PCW QSPI INTERNAL HIGHADDRESS</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_INTERNAL_HIGHADDRESS" spirit:choiceRef="choice_list_d525dd8e" spirit:order="5807" spirit:bitStringLength="32">0xFCFFFFFF</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW ENET0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="400">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_ENET0_IO</spirit:name>
- <spirit:displayName>PCW ENET0 ENET0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_ENET0_IO" spirit:choiceRef="choice_list_86cc57ee" spirit:order="6100">MIO 16 .. 27</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_GRP_MDIO_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6101">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_GRP_MDIO_IO</spirit:name>
- <spirit:displayName>PCW ENET0 GRP MDIO IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO" spirit:choiceRef="choice_list_606c1634" spirit:order="6102"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET0_GRP_MDIO_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6103">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET_RESET_SELECT</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET_RESET_SELECT" spirit:choiceRef="choice_list_ce2e47bd" spirit:order="6103">Share reset pin</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6103">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_RESET_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_RESET_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="6104"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET0_RESET_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW ENET1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_ENET1_IO</spirit:name>
- <spirit:displayName>PCW ENET1 ENET1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_ENET1_IO" spirit:choiceRef="choice_list_b66926f4" spirit:order="6200"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_ENET1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_GRP_MDIO_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6201">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_GRP_MDIO_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_GRP_MDIO_IO</spirit:name>
- <spirit:displayName>PCW ENET1 GRP MDIO IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO" spirit:choiceRef="choice_list_606c1634" spirit:order="6202"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_GRP_MDIO_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6203">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_RESET_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_RESET_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_RESET_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="6204"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_RESET_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW SD0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_SD0_IO</spirit:name>
- <spirit:displayName>PCW SD0 SD0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_SD0_IO" spirit:choiceRef="choice_list_390b0393" spirit:order="6500"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_SD0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_GRP_CD_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_GRP_CD_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6501">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_GRP_CD_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_GRP_CD_IO</spirit:name>
- <spirit:displayName>PCW SD0 GRP CD IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_GRP_CD_IO" spirit:choiceRef="choice_list_6a282484" spirit:order="6502"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_GRP_CD_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_GRP_WP_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_GRP_WP_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6503">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_GRP_WP_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_GRP_WP_IO</spirit:name>
- <spirit:displayName>PCW SD0 GRP WP IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_GRP_WP_IO" spirit:choiceRef="choice_list_6a282484" spirit:order="6504"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_GRP_WP_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_GRP_POW_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_GRP_POW_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6505">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_GRP_POW_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD0_GRP_POW_IO</spirit:name>
- <spirit:displayName>PCW SD0 GRP POW IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD0_GRP_POW_IO" spirit:choiceRef="choice_list_3c74058c" spirit:order="6506"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD0_GRP_POW_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW SD1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="700">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_SD1_IO</spirit:name>
- <spirit:displayName>PCW SD1 SD1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_SD1_IO" spirit:choiceRef="choice_list_d8fa963a" spirit:order="6600">MIO 10 .. 15</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_GRP_CD_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_GRP_CD_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6601">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_GRP_CD_IO</spirit:name>
- <spirit:displayName>PCW SD1 GRP CD IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_GRP_CD_IO" spirit:choiceRef="choice_list_75a9626b" spirit:order="6602">MIO 9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_GRP_WP_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_GRP_WP_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6603">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_GRP_WP_IO</spirit:name>
- <spirit:displayName>PCW SD1 GRP WP IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_GRP_WP_IO" spirit:choiceRef="choice_list_6a282484" spirit:order="6604"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD1_GRP_WP_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_GRP_POW_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_GRP_POW_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6605">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SD1_GRP_POW_IO</spirit:name>
- <spirit:displayName>PCW SD1 GRP POW IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SD1_GRP_POW_IO" spirit:choiceRef="choice_list_83072ce2" spirit:order="6606"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SD1_GRP_POW_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW UART0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="800">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_UART0_IO</spirit:name>
- <spirit:displayName>PCW UART0 UART0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_UART0_IO" spirit:choiceRef="choice_list_f632ce2e" spirit:order="6700">MIO 46 .. 47</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_GRP_FULL_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_GRP_FULL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6701">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART0_GRP_FULL_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART0_GRP_FULL_IO" spirit:choiceRef="choice_list_f7b6ff1b" spirit:order="6702"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UART0_GRP_FULL_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW UART1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="900">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_UART1_IO</spirit:name>
- <spirit:displayName>PCW UART1 UART1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_UART1_IO" spirit:choiceRef="choice_list_0f5c91ba" spirit:order="6800">MIO 48 .. 49</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_GRP_FULL_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_GRP_FULL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6801">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART1_GRP_FULL_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART1_GRP_FULL_IO" spirit:choiceRef="choice_list_f7b6ff1b" spirit:order="6802"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_UART1_GRP_FULL_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW SPI0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1000">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_SPI0_IO</spirit:name>
- <spirit:displayName>PCW SPI0 SPI0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_SPI0_IO" spirit:choiceRef="choice_list_8f11124f" spirit:order="7100">MIO 40 .. 45</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_GRP_SS0_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_GRP_SS0_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7105">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI0_GRP_SS0_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_GRP_SS0_IO</spirit:name>
- <spirit:displayName>PCW SPI0 GRP SS0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_GRP_SS0_IO" spirit:choiceRef="choice_list_8436647b" spirit:order="7106">MIO 42</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI0_GRP_SS0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_GRP_SS1_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_GRP_SS1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7103">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_GRP_SS1_IO</spirit:name>
- <spirit:displayName>PCW SPI0 GRP SS1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_GRP_SS1_IO" spirit:choiceRef="choice_list_78fdaebe" spirit:order="7104"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI0_GRP_SS1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_GRP_SS2_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_GRP_SS2_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7101">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI0_GRP_SS2_IO</spirit:name>
- <spirit:displayName>PCW SPI0 GRP SS2 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI0_GRP_SS2_IO" spirit:choiceRef="choice_list_ec5c3204" spirit:order="7102"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI0_GRP_SS2_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW SPI1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1100">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_SPI1_IO</spirit:name>
- <spirit:displayName>PCW SPI1 SPI1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_SPI1_IO" spirit:choiceRef="choice_list_d8fa963a" spirit:order="7200">EMIO</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_GRP_SS0_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_GRP_SS0_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7205">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_GRP_SS0_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_GRP_SS0_IO</spirit:name>
- <spirit:displayName>PCW SPI1 GRP SS0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_GRP_SS0_IO" spirit:choiceRef="choice_list_6e6efe45" spirit:order="7206">EMIO</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_GRP_SS0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_GRP_SS1_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_GRP_SS1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7203">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_GRP_SS1_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_GRP_SS1_IO</spirit:name>
- <spirit:displayName>PCW SPI1 GRP SS1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_GRP_SS1_IO" spirit:choiceRef="choice_list_6b183472" spirit:order="7204">EMIO</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_GRP_SS1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_GRP_SS2_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_GRP_SS2_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7201">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_GRP_SS2_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI1_GRP_SS2_IO</spirit:name>
- <spirit:displayName>PCW SPI1 GRP SS2 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI1_GRP_SS2_IO" spirit:choiceRef="choice_list_4b3359e9" spirit:order="7202">EMIO</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_SPI1_GRP_SS2_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW CAN0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_CAN0_IO</spirit:name>
- <spirit:displayName>PCW CAN0 CAN0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_CAN0_IO" spirit:choiceRef="choice_list_5d0f73c4" spirit:order="7300"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN0_CAN0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_GRP_CLK_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_GRP_CLK_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7301">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN0_GRP_CLK_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_GRP_CLK_IO</spirit:name>
- <spirit:displayName>PCW CAN0 GRP CLK IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_GRP_CLK_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="7302"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN0_GRP_CLK_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW CAN1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1300">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_CAN1_IO</spirit:name>
- <spirit:displayName>PCW CAN1 CAN1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_CAN1_IO" spirit:choiceRef="choice_list_0f5c91ba" spirit:order="7400">MIO 52 .. 53</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_GRP_CLK_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_GRP_CLK_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7401">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_GRP_CLK_IO</spirit:name>
- <spirit:displayName>PCW CAN1 GRP CLK IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_GRP_CLK_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="7402"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_CAN1_GRP_CLK_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW TRACE PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1400">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_TRACE_IO</spirit:name>
- <spirit:displayName>PCW TRACE TRACE IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_TRACE_IO" spirit:choiceRef="choice_list_935a3e6e" spirit:order="7500"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_TRACE_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_2BIT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_2BIT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7501">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_2BIT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_2BIT_IO</spirit:name>
- <spirit:displayName>PCW TRACE GRP 2BIT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_2BIT_IO" spirit:choiceRef="choice_list_45a0fd9c" spirit:order="7502"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_2BIT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_4BIT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_4BIT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7503">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_4BIT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_4BIT_IO</spirit:name>
- <spirit:displayName>PCW TRACE GRP 4BIT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_4BIT_IO" spirit:choiceRef="choice_list_af9e7a8f" spirit:order="7504"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_4BIT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_8BIT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_8BIT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7505">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_8BIT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_8BIT_IO</spirit:name>
- <spirit:displayName>PCW TRACE GRP 8BIT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_8BIT_IO" spirit:choiceRef="choice_list_908f40dd" spirit:order="7506"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_8BIT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_16BIT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_16BIT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7507">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_16BIT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_16BIT_IO</spirit:name>
- <spirit:displayName>PCW TRACE GRP 16BIT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_16BIT_IO" spirit:choiceRef="choice_list_ba65fe0e" spirit:order="7508"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_16BIT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_32BIT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_32BIT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7509">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_32BIT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_GRP_32BIT_IO</spirit:name>
- <spirit:displayName>PCW TRACE GRP 32BIT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_GRP_32BIT_IO" spirit:choiceRef="choice_list_f7b6ff1b" spirit:order="7510"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TRACE_GRP_32BIT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TRACE_INTERNAL_WIDTH</spirit:name>
- <spirit:displayName>PCW TRACE INTERNAL WIDTH</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TRACE_INTERNAL_WIDTH" spirit:choiceRef="choice_list_ca108395" spirit:order="7511">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_WDT_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW WDT PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_WDT_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1500">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_WDT_WDT_IO</spirit:name>
- <spirit:displayName>PCW WDT WDT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_WDT_WDT_IO" spirit:choiceRef="choice_list_a8e6d6fb" spirit:order="7800"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_WDT_WDT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW TTC0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1600">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_TTC0_IO</spirit:name>
- <spirit:displayName>PCW TTC0 TTC0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_TTC0_IO" spirit:choiceRef="choice_list_1a80fa5a" spirit:order="7600"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC0_TTC0_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW TTC1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1700">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_TTC1_IO</spirit:name>
- <spirit:displayName>PCW TTC1 TTC1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_TTC1_IO" spirit:choiceRef="choice_list_d282f9a2" spirit:order="7700"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_TTC1_TTC1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PJTAG_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW PJTAG PERIPHERAL ENABLE </spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PJTAG_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1750">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PJTAG_PJTAG_IO</spirit:name>
- <spirit:displayName>PCW PJTAG PJTAG IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PJTAG_PJTAG_IO" spirit:choiceRef="choice_list_56e9f994" spirit:order="7900"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_PJTAG_PJTAG_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW USB0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1800">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_USB0_IO</spirit:name>
- <spirit:displayName>PCW USB0 USB0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_USB0_IO" spirit:choiceRef="choice_list_1622b516" spirit:order="6300">MIO 28 .. 39</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6103">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB_RESET_SELECT</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB_RESET_SELECT" spirit:choiceRef="choice_list_ce2e47bd" spirit:order="6103">Share reset pin</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6301">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB0_RESET_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB0_RESET_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="6302"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_USB0_RESET_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW USB1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1900">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_USB1_IO</spirit:name>
- <spirit:displayName>PCW USB1 USB1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_USB1_IO" spirit:choiceRef="choice_list_020b381d" spirit:order="6400"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_USB1_USB1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6401">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_USB1_RESET_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB1_RESET_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB1_RESET_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="6402"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_USB1_RESET_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW I2C0 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="2000">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_I2C0_IO</spirit:name>
- <spirit:displayName>PCW I2C0 I2C0 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_I2C0_IO" spirit:choiceRef="choice_list_f632ce2e" spirit:order="6900">MIO 50 .. 51</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_GRP_INT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_GRP_INT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6901">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_GRP_INT_IO</spirit:name>
- <spirit:displayName>PCW I2C0 GRP INT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_GRP_INT_IO" spirit:choiceRef="choice_list_b3ee7919" spirit:order="6902"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C0_GRP_INT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6903">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C0_RESET_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C0_RESET_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="6904"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C0_RESET_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW I2C1 PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="2100">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_I2C1_IO</spirit:name>
- <spirit:displayName>PCW I2C1 I2C1 IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_I2C1_IO" spirit:choiceRef="choice_list_88a617f1" spirit:order="7000"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_I2C1_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_GRP_INT_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_GRP_INT_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7001">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_GRP_INT_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_GRP_INT_IO</spirit:name>
- <spirit:displayName>PCW I2C1 GRP INT IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_GRP_INT_IO" spirit:choiceRef="choice_list_b3ee7919" spirit:order="7002"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_GRP_INT_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="6103">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C_RESET_SELECT</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C_RESET_SELECT" spirit:choiceRef="choice_list_ce2e47bd" spirit:order="6103">Share reset pin</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_RESET_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_RESET_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="7003">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_RESET_ENABLE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C1_RESET_IO</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C1_RESET_IO" spirit:choiceRef="choice_list_d679c87d" spirit:order="7004"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_I2C1_RESET_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_PERIPHERAL_ENABLE</spirit:name>
- <spirit:displayName>PCW GPIO PERIPHERAL ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="2200">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_MIO_GPIO_ENABLE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_MIO_GPIO_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5499">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_MIO_GPIO_IO</spirit:name>
- <spirit:displayName>PCW GPIO MIO GPIO IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_MIO_GPIO_IO" spirit:choiceRef="choice_list_6a48f1e0" spirit:order="5500">MIO</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_EMIO_GPIO_ENABLE</spirit:name>
- <spirit:displayName>PCW GPIO EMIO GPIO ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="5599">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_GPIO_EMIO_GPIO_IO</spirit:name>
- <spirit:displayName>PCW GPIO EMIO GPIO IO</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_IO" spirit:choiceRef="choice_list_5d70a6b7" spirit:order="5600"><Select></spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_GPIO_EMIO_GPIO_IO">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_APU_CLK_RATIO_ENABLE</spirit:name>
- <spirit:displayName>PCW APU CLK RATIO ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_APU_CLK_RATIO_ENABLE" spirit:choiceRef="choice_list_bd8e4b31" spirit:order="23400">6:2:1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ENET0 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_PERIPHERAL_FREQMHZ" spirit:choiceRef="choice_list_a841b9a1" spirit:order="23900">1000 Mbps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_PERIPHERAL_FREQMHZ</spirit:name>
- <spirit:displayName>PCW ENET1 PERIPHERAL FREQMHZ</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_PERIPHERAL_FREQMHZ" spirit:choiceRef="choice_list_a841b9a1" spirit:order="24000">1000 Mbps</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_ENET1_PERIPHERAL_FREQMHZ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CPU_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW CPU PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CPU_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="20900">ARM PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DDR_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW DDR PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DDR_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_e743b0fa" spirit:order="20901">DDR PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW SMC PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21000">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_QSPI_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW QSPI PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_QSPI_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21100">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SDIO_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW SDIO PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SDIO_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21200">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UART_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW UART PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UART_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21300">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SPI_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW SPI PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SPI_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21400">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW CAN PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21500">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK0_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW FCLK0 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21600">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK1_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW FCLK1 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21700">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK2_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW FCLK2 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21800">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FCLK3_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW FCLK3 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_ea556125" spirit:order="21900">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET0_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW ENET0 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET0_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_7d098ed6" spirit:order="22000">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET1_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW ENET1 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET1_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_dc85a6c5" spirit:order="22100">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN0_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW CAN0 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN0_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_767f870c" spirit:order="22200">External</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_CAN1_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW CAN1 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_CAN1_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_767f870c" spirit:order="22300">External</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TPIU_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TPIU PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TPIU_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_0d7de060" spirit:order="22400">External</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK0_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TTC0 CLK0 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="22500">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK1_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TTC0 CLK1 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="22600">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC0_CLK2_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TTC0 CLK2 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="22700">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK0_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TTC1 CLK0 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="22800">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK1_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TTC1 CLK1 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="22900">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_TTC1_CLK2_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW TTC1 CLK2 PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="23000">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_WDT_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW WDT PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_WDT_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_d2a5f697" spirit:order="23100">CPU_1X</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_DCI_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW DCI PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_DCI_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_e743b0fa" spirit:order="23100">DDR PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PCAP_PERIPHERAL_CLKSRC</spirit:name>
- <spirit:displayName>PCW PCAP PERIPHERAL CLKSRC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PCAP_PERIPHERAL_CLKSRC" spirit:choiceRef="choice_list_f591e16e" spirit:order="23100">IO PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_USB_RESET_POLARITY</spirit:name>
- <spirit:displayName>PCW USB RESET POLARITY</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_USB_RESET_POLARITY" spirit:choiceRef="choice_list_6bd7fb73" spirit:order="34800">Active Low</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_ENET_RESET_POLARITY</spirit:name>
- <spirit:displayName>PCW USB RESET POLARITY</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_ENET_RESET_POLARITY" spirit:choiceRef="choice_list_6bd7fb73" spirit:order="34800">Active Low</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_I2C_RESET_POLARITY</spirit:name>
- <spirit:displayName>PCW USB RESET POLARITY</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_I2C_RESET_POLARITY" spirit:choiceRef="choice_list_6bd7fb73" spirit:order="34800">Active Low</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_0_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 0 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_0_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29400">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_0_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 0 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_0_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34800">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_0_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 0 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_0_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40200">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_0_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_0_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 0 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_0_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40300">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_1_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 1 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_1_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29401">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_1_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 1 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_1_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34801">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_1_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 1 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_1_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40201">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_1_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_1_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 1 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_1_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40301">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_2_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 2 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_2_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29402">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_2_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_2_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 2 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_2_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34802">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_2_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 2 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_2_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40202">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_2_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_2_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 2 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_2_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40302">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_3_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 3 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_3_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29403">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_3_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_3_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 3 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_3_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34803">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_3_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 3 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_3_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40203">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_3_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_3_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 3 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_3_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40303">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_4_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 4 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_4_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29404">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_4_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_4_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 4 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_4_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34804">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_4_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 4 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_4_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40204">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_4_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_4_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 4 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_4_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40304">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_5_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 5 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_5_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29405">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_5_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_5_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 5 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_5_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34805">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_5_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 5 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_5_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40205">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_5_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_5_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 5 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_5_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40305">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_6_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 6 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_6_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29406">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_6_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_6_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 6 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_6_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34806">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_6_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 6 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_6_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40206">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_6_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_6_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 6 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_6_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40306">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_7_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 7 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_7_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29407">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_7_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_7_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 7 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_7_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34807">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_7_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 7 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_7_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40207">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_7_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_7_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 7 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_7_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40307">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_8_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 8 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_8_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29408">disabled</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_8_PULLUP">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_8_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 8 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_8_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34808">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_8_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 8 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_8_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40208">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_8_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_8_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 8 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_8_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40308">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_9_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 9 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_9_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29409">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_9_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 9 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_9_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34809">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_9_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 9 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_9_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40209">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_9_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_9_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 9 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_9_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40309">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_10_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 10 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_10_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29410">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_10_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 10 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_10_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34810">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_10_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 10 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_10_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40210">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_10_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_10_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 10 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_10_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40310">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_11_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 11 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_11_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29411">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_11_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 11 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_11_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34811">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_11_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 11 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_11_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40211">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_11_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_11_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 11 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_11_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40311">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_12_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 12 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_12_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29412">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_12_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 12 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_12_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34812">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_12_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 12 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_12_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40212">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_12_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_12_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 12 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_12_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40312">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_13_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 13 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_13_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29413">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_13_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 13 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_13_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34813">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_13_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 13 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_13_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40213">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_13_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_13_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 13 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_13_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40313">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_14_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 14 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_14_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29414">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_14_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 14 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_14_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34814">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_14_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 14 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_14_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40214">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_14_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_14_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 14 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_14_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40314">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_15_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 15 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_15_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29415">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_15_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 15 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_15_IOTYPE" spirit:choiceRef="choice_list_6bc4d474" spirit:order="34815">LVCMOS 3.3V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_15_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 15 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_15_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40215">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_15_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_15_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 15 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_15_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40315">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_16_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 16 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_16_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29416">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_16_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 16 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_16_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34816">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_16_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 16 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_16_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40216">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_16_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_16_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 16 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_16_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40316">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_17_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 17 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_17_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29417">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_17_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 17 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_17_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34817">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_17_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 17 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_17_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40217">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_17_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_17_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 17 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_17_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40317">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_18_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 18 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_18_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29418">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_18_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 18 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_18_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34818">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_18_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 18 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_18_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40218">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_18_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_18_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 18 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_18_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40318">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_19_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 19 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_19_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29419">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_19_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 19 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_19_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34819">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_19_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 19 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_19_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40219">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_19_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_19_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 19 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_19_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40319">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_20_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 20 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_20_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29420">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_20_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 20 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_20_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34820">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_20_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 20 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_20_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40220">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_20_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_20_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 20 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_20_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40320">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_21_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 21 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_21_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29421">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_21_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 21 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_21_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34821">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_21_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 21 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_21_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40221">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_21_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_21_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 21 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_21_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40321">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_22_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 22 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_22_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29422">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_22_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 22 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_22_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34822">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_22_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 22 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_22_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40222">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_22_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_22_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 22 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_22_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40322">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_23_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 23 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_23_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29423">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_23_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 23 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_23_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34823">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_23_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 23 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_23_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40223">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_23_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_23_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 23 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_23_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40323">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_24_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 24 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_24_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29424">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_24_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 24 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_24_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34824">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_24_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 24 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_24_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40224">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_24_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_24_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 24 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_24_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40324">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_25_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 25 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_25_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29425">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_25_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 25 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_25_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34825">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_25_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 25 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_25_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40225">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_25_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_25_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 25 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_25_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40325">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_26_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 26 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_26_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29426">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_26_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 26 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_26_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34826">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_26_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 26 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_26_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40226">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_26_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_26_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 26 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_26_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40326">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_27_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 27 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_27_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29427">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_27_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 27 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_27_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34827">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_27_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 27 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_27_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40227">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_27_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_27_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 27 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_27_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40327">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_28_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 28 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_28_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29428">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_28_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 28 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_28_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34828">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_28_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 28 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_28_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40228">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_28_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_28_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 28 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_28_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40328">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_29_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 29 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_29_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29429">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_29_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 29 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_29_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34829">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_29_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 29 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_29_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40229">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_29_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_29_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 29 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_29_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40329">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_30_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 30 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_30_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29430">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_30_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 30 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_30_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34830">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_30_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 30 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_30_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40230">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_30_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_30_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 30 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_30_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40330">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_31_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 31 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_31_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29431">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_31_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 31 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_31_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34831">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_31_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 31 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_31_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40231">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_31_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_31_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 31 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_31_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40331">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_32_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 32 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_32_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29432">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_32_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 32 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_32_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34832">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_32_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 32 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_32_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40232">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_32_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_32_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 32 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_32_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40332">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_33_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 33 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_33_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29433">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_33_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 33 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_33_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34833">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_33_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 33 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_33_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40233">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_33_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_33_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 33 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_33_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40333">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_34_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 34 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_34_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29434">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_34_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 34 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_34_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34834">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_34_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 34 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_34_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40234">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_34_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_34_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 34 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_34_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40334">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_35_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 35 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_35_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29435">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_35_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 35 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_35_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34835">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_35_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 35 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_35_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40235">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_35_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_35_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 35 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_35_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40335">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_36_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 36 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_36_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29436">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_36_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 36 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_36_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34836">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_36_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 36 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_36_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40236">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_36_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_36_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 36 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_36_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40336">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_37_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 37 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_37_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29437">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_37_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 37 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_37_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34837">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_37_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 37 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_37_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40237">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_37_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_37_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 37 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_37_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40337">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_38_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 38 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_38_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29438">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_38_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 38 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_38_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34838">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_38_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 38 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_38_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40238">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_38_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_38_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 38 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_38_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40338">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_39_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 39 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_39_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29439">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_39_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 39 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_39_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34839">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_39_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 39 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_39_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40239">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_39_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_39_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 39 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_39_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40339">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_40_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 40 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_40_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29440">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_40_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 40 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_40_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34840">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_40_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 40 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_40_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40240">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_40_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_40_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 40 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_40_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40340">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_41_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 41 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_41_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29441">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_41_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 41 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_41_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34841">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_41_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 41 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_41_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40241">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_41_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_41_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 41 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_41_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40341">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_42_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 42 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_42_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29442">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_42_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 42 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_42_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34842">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_42_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 42 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_42_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40242">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_42_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_42_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 42 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_42_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40342">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_43_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 43 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_43_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29443">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_43_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 43 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_43_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34843">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_43_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 43 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_43_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40243">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_43_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_43_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 43 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_43_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40343">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_44_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 44 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_44_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29444">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_44_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 44 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_44_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34844">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_44_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 44 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_44_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40244">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_44_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_44_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 44 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_44_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40344">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_45_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 45 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_45_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29445">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_45_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 45 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_45_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34845">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_45_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 45 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_45_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40245">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_45_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_45_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 45 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_45_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40345">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_46_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 46 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_46_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29446">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_46_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 46 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_46_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34846">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_46_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 46 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_46_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40246">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_46_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_46_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 46 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_46_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40346">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_47_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 47 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_47_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29447">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_47_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 47 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_47_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34847">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_47_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 47 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_47_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40247">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_47_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_47_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 47 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_47_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40347">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_48_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 48 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_48_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29448">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_48_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 48 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_48_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34848">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_48_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 48 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_48_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40248">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_48_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_48_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 48 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_48_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40348">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_49_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 49 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_49_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29449">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_49_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 49 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_49_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34849">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_49_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 49 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_49_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40249">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_49_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_49_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 49 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_49_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40349">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_50_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 50 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_50_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29450">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_50_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 50 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_50_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34850">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_50_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 50 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_50_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40250">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_50_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_50_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 50 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_50_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40350">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_51_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 51 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_51_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29451">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_51_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 51 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_51_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34851">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_51_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 51 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_51_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40251">inout</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_51_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_51_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 51 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_51_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40351">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_52_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 52 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_52_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29452">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_52_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 52 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_52_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34852">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_52_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 52 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_52_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40252">out</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_52_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_52_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 52 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_52_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40352">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_53_PULLUP</spirit:name>
- <spirit:displayName>PCW MIO 53 PULLUP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_53_PULLUP" spirit:choiceRef="choice_list_2d7daef4" spirit:order="29453">enabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_53_IOTYPE</spirit:name>
- <spirit:displayName>PCW MIO 53 IOTYPE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_53_IOTYPE" spirit:choiceRef="choice_list_d388ceb0" spirit:order="34853">LVCMOS 2.5V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_53_DIRECTION</spirit:name>
- <spirit:displayName>PCW MIO 53 DIRECTION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_53_DIRECTION" spirit:choiceRef="choice_list_95a9da0c" spirit:order="40253">in</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.PCW_MIO_53_DIRECTION">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_53_SLEW</spirit:name>
- <spirit:displayName>PCW MIO 53 SLEW</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_53_SLEW" spirit:choiceRef="choice_list_86458347" spirit:order="40353">slow</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>preset</spirit:name>
- <spirit:displayName>preset</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.preset" spirit:choiceRef="choice_list_9e358632" spirit:order="40354">None</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_UIPARAM_GENERATE_SUMMARY</spirit:name>
- <spirit:displayName>PCW UIPARAM GENERATE SUMMARY</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_UIPARAM_GENERATE_SUMMARY" spirit:order="210001">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_TREE_PERIPHERALS</spirit:name>
- <spirit:displayName>PCW MIO TREE PERIPHERALS</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_TREE_PERIPHERALS" spirit:order="210000">GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#GPIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SPI 0#SPI 0#SPI 0#GPIO#GPIO#SPI 0#UART 0#UART 0#UART 1#UART 1#I2C 0#I2C 0#CAN 1#CAN 1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_MIO_TREE_SIGNALS</spirit:name>
- <spirit:displayName>PCW MIO TREE SIGNALS</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_MIO_TREE_SIGNALS" spirit:order="220000">gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#gpio[8]#cd#data[0]#cmd#clk#data[1]#data[2]#data[3]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#sclk#miso#ss[0]#gpio[43]#gpio[44]#mosi#rx#tx#tx#rx#scl#sda#tx#rx</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PS7_SI_REV</spirit:name>
- <spirit:displayName>PCW PS7 SI REV</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PS7_SI_REV" spirit:choiceRef="choice_list_bed41605" spirit:order="49300">PRODUCTION</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA_FCLK0_ENABLE</spirit:name>
- <spirit:displayName>PCW FPGA FCLK0 ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA_FCLK0_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="63001">1</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FPGA_FCLK0_ENABLE" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK0_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK0_PORT)) == 1)) ">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA_FCLK1_ENABLE</spirit:name>
- <spirit:displayName>PCW FPGA FCLK1 ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA_FCLK1_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="63101">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FPGA_FCLK1_ENABLE" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK1_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK1_PORT)) == 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA_FCLK2_ENABLE</spirit:name>
- <spirit:displayName>PCW FPGA FCLK2 ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA_FCLK2_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="63201">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FPGA_FCLK2_ENABLE" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK2_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK2_PORT)) == 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_FPGA_FCLK3_ENABLE</spirit:name>
- <spirit:displayName>PCW FPGA FCLK3 ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_FPGA_FCLK3_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="63301">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PARAM_ENABLEMENT.PCW_FPGA_FCLK3_ENABLE" xilinx:dependency="((spirit:decode(id(PARAM_VALUE.PCW_CLK3_FREQ)) > 0)&&(spirit:decode(id(PARAM_VALUE.PCW_EN_CLK3_PORT)) == 1)) ">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_T_TR</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 T TR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_TR" spirit:order="3531">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_T_PC</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 T PC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_PC" spirit:order="3532">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_T_WP</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 T WP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_WP" spirit:order="3533">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_T_CEOE</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 T CEOE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_CEOE" spirit:order="3534">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_T_WC</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 T WC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_WC" spirit:order="3535">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_T_RC</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 T RC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_RC" spirit:order="3536">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS0_WE_TIME</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS0 WE TIME</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS0_WE_TIME" spirit:order="3537">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_T_TR</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 T TR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_TR" spirit:order="3538">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_T_PC</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 T PC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_PC" spirit:order="3539">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_T_WP</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 T WP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_WP" spirit:order="3540">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_T_CEOE</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 T CEOE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_CEOE" spirit:order="3541">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_T_WC</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 T WC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_WC" spirit:order="3542">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_T_RC</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 T RC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_RC" spirit:order="3543">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_SRAM_CS1_WE_TIME</spirit:name>
- <spirit:displayName>PCW NOR SRAM CS1 WE TIME</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_SRAM_CS1_WE_TIME" spirit:order="3544">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_T_TR</spirit:name>
- <spirit:displayName>PCW NOR CS0 T TR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_T_TR" spirit:order="3545">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_T_PC</spirit:name>
- <spirit:displayName>PCW NOR CS0 T PC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_T_PC" spirit:order="3546">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_T_WP</spirit:name>
- <spirit:displayName>PCW NOR CS0 T WP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_T_WP" spirit:order="3547">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_T_CEOE</spirit:name>
- <spirit:displayName>PCW NOR CS0 T CEOE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_T_CEOE" spirit:order="3548">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_T_WC</spirit:name>
- <spirit:displayName>PCW NOR CS0 T WC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_T_WC" spirit:order="3549">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_T_RC</spirit:name>
- <spirit:displayName>PCW NOR CS0 T RC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_T_RC" spirit:order="3550">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS0_WE_TIME</spirit:name>
- <spirit:displayName>PCW NOR CS0 WE TIME</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS0_WE_TIME" spirit:order="3551">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_T_TR</spirit:name>
- <spirit:displayName>PCW NOR CS1 T TR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_T_TR" spirit:order="3552">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_T_PC</spirit:name>
- <spirit:displayName>PCW NOR CS1 T PC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_T_PC" spirit:order="3553">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_T_WP</spirit:name>
- <spirit:displayName>PCW NOR CS1 T WP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_T_WP" spirit:order="3554">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_T_CEOE</spirit:name>
- <spirit:displayName>PCW NOR CS1 T CEOE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_T_CEOE" spirit:order="3555">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_T_WC</spirit:name>
- <spirit:displayName>PCW NOR CS1 T WC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_T_WC" spirit:order="3556">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_T_RC</spirit:name>
- <spirit:displayName>PCW NOR CS1 T RC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_T_RC" spirit:order="3557">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NOR_CS1_WE_TIME</spirit:name>
- <spirit:displayName>PCW NOR CS1 WE TIME</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NOR_CS1_WE_TIME" spirit:order="3558">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_RR</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T RR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_RR" spirit:order="3559">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_AR</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T AR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_AR" spirit:order="3560">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_CLR</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T CLR</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_CLR" spirit:order="3561">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_WP</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T WP</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_WP" spirit:order="3562">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_REA</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T REA</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_REA" spirit:order="3563">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_WC</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T WC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_WC" spirit:order="3564">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_NAND_CYCLES_T_RC</spirit:name>
- <spirit:displayName>PCW NAND CYCLES T RC</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_NAND_CYCLES_T_RC" spirit:order="3565">11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T0</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T0</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T0" spirit:order="3566">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T1</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T1</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T1" spirit:order="3567">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T2</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T2</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T2" spirit:order="3568">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T3</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T3</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T3" spirit:order="3569">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T4</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T4</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T4" spirit:order="3570">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T5</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T5</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T5" spirit:order="3571">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_SMC_CYCLE_T6</spirit:name>
- <spirit:displayName>PCW SMC CYCLE T6</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_SMC_CYCLE_T6" spirit:order="3572">NA</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PACKAGE_NAME</spirit:name>
- <spirit:displayName>PCW PACKAGE NAME</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PACKAGE_NAME" spirit:choiceRef="choice_list_a0c775a9" spirit:order="11">clg485</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCW_PLL_BYPASSMODE_ENABLE</spirit:name>
- <spirit:displayName>PCW PLL BYPASSMODE ENABLE</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.PCW_PLL_BYPASSMODE_ENABLE" spirit:choiceRef="choice_list_8af5a703" spirit:order="1800">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>Component_Name</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">scalp_zynqps_processing_system7_0_0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:coreExtensions>
- <xilinx:displayName>ZYNQ7 Processing System</xilinx:displayName>
- <xilinx:systemCLibraries>
- <xilinx:systemCLibrary>remote_port_c_v4</xilinx:systemCLibrary>
- <xilinx:systemCLibrary>remote_port_sc_v4</xilinx:systemCLibrary>
- <xilinx:systemCLibrary>xtlm</xilinx:systemCLibrary>
- </xilinx:systemCLibraries>
- <xilinx:coreRevision>6</xilinx:coreRevision>
- <xilinx:requiresVIP>true</xilinx:requiresVIP>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.AXI_ARBITRATION_SCHEME" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.BURST_LENGTH" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CAN_DEBUG" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CAS_LATENCY" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CAS_WRITE_LATENCY" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CS_ENABLED" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.CUSTOM_PARTS" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.DATA_MASK_ENABLED" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.DATA_WIDTH" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.MEMORY_PART" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.MEMORY_TYPE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.MEM_ADDR_MAP" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.SLOT" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR.TIMEPERIOD_PS" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_BUSIF" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.CLK_DOMAIN" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.FREQ_HZ" xilinx:valueSource="user" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FCLK_RESET0_N.POLARITY" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.FIXED_IO.CAN_DEBUG" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ADDR_WIDTH" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ARUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.AWUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.BUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.DATA_WIDTH" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BRESP" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_BURST" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_CACHE" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_LOCK" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_PROT" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_QOS" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_REGION" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_RRESP" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.HAS_WSTRB" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.ID_WIDTH" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.MAX_BURST_LENGTH" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_READ_OUTSTANDING" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_READ_THREADS" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_WRITE_OUTSTANDING" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.NUM_WRITE_THREADS" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.PROTOCOL" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.READ_WRITE_MODE" xilinx:valueSource="auto" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.RUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.SUPPORTS_NARROW_BURST" xilinx:valueSource="user" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_BITS_PER_BYTE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.WUSER_WIDTH" xilinx:valueSource="constant" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.ASSOCIATED_BUSIF" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_APU_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_CAN_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_DCI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_SMC_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_SPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_UART_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ACT_WDT_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_APU_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ARMPLL_CTRL_FBDIV" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN1_CAN1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN1_GRP_CLK_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK0_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK1_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK2_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CLK3_FREQ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CPU_CPU_PLL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CPU_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_CRYSTAL_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDRPLL_CTRL_FBDIV" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDR_DDR_PLL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDR_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_DDR_RAM_HIGHADDR" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_ENET0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_CLKSRC" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET0_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET1_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_ENET_RESET_SELECT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_CAN1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_CAN1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_ENET0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_I2C0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_UART0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_ENET0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_GPIO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_I2C0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_QSPI" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_SDIO1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_SPI0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_SPI1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_UART0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_UART1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_EN_USB0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR1" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK2_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_FPGA_FCLK3_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_GRP_INT_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_I2C0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C0_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C1_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_I2C_RESET_SELECT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_IOPLL_CTRL_FBDIV" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_IO_IO_PLL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_0_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_10_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_11_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_12_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_13_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_14_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_15_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_16_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_17_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_18_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_19_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_1_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_20_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_21_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_22_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_23_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_24_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_25_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_26_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_27_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_28_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_29_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_2_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_30_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_31_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_32_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_33_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_34_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_35_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_36_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_37_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_38_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_39_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_3_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_40_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_41_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_42_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_43_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_44_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_45_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_46_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_47_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_48_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_49_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_4_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_50_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_51_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_52_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_53_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_5_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_6_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_7_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_8_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_DIRECTION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_IOTYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_PULLUP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_9_SLEW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_TREE_PERIPHERALS" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_MIO_TREE_SIGNALS" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_FREQMHZ" xilinx:valueSource="propagated" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NAND_GRP_D8_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_NUM_F2P_INTR_INPUTS" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_PRESET_BANK1_VOLTAGE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_IO1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_QSPI_QSPI_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_POW_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_GRP_WP_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SD1_SD1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SINGLE_QSPI_DATA_MODE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS2_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI0_SPI0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI1_SPI1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_GP0_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_GP1_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_FREQMHZ" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART0_GRP_FULL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART0_UART0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART1_GRP_FULL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART1_UART1_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_DIVISOR0" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_VALID" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_ACT_DDR_FREQ_MHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BANK_ADDR_COUNT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BL" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BUS_WIDTH" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CL" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_COL_ADDR_COUNT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CWL" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DEVICE_CAPACITY" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DRAM_WIDTH" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ECC" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_FREQ_MHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_MEMORY_TYPE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_PARTNO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ROW_ADDR_COUNT" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_SPEED_BIN" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_FAW" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RAS_MIN" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RC" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RCD" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RP" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_FREQMHZ" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB0_USB0_IO" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB1_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB_RESET_ENABLE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.PCW_USB_RESET_SELECT" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:coreExtensions>
- <xilinx:packagingInfo>
- <xilinx:xilinxVersion>2019.2</xilinx:xilinxVersion>
- </xilinx:packagingInfo>
- </spirit:vendorExtensions>
-</spirit:component>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_sim_netlist.v
deleted file mode 100644
index 2721229..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_sim_netlist.v
+++ /dev/null
@@ -1,5232 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:39 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_sim_netlist.v
-// Design : scalp_zynqps_processing_system7_0_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_processing_system7_0_0,processing_system7_v5_5_processing_system7,{}" *) (* DowngradeIPIdentifiedWarnings = "yes" *) (* X_CORE_INFO = "processing_system7_v5_5_processing_system7,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module scalp_zynqps_processing_system7_0_0
- (SPI1_SCLK_I,
- SPI1_SCLK_O,
- SPI1_SCLK_T,
- SPI1_MOSI_I,
- SPI1_MOSI_O,
- SPI1_MOSI_T,
- SPI1_MISO_I,
- SPI1_MISO_O,
- SPI1_MISO_T,
- SPI1_SS_I,
- SPI1_SS_O,
- SPI1_SS1_O,
- SPI1_SS2_O,
- SPI1_SS_T,
- USB0_PORT_INDCTL,
- USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT,
- M_AXI_GP0_ARVALID,
- M_AXI_GP0_AWVALID,
- M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY,
- M_AXI_GP0_WLAST,
- M_AXI_GP0_WVALID,
- M_AXI_GP0_ARID,
- M_AXI_GP0_AWID,
- M_AXI_GP0_WID,
- M_AXI_GP0_ARBURST,
- M_AXI_GP0_ARLOCK,
- M_AXI_GP0_ARSIZE,
- M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK,
- M_AXI_GP0_AWSIZE,
- M_AXI_GP0_ARPROT,
- M_AXI_GP0_AWPROT,
- M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR,
- M_AXI_GP0_WDATA,
- M_AXI_GP0_ARCACHE,
- M_AXI_GP0_ARLEN,
- M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE,
- M_AXI_GP0_AWLEN,
- M_AXI_GP0_AWQOS,
- M_AXI_GP0_WSTRB,
- M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY,
- M_AXI_GP0_AWREADY,
- M_AXI_GP0_BVALID,
- M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID,
- M_AXI_GP0_WREADY,
- M_AXI_GP0_BID,
- M_AXI_GP0_RID,
- M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP,
- M_AXI_GP0_RDATA,
- FCLK_CLK0,
- FCLK_RESET0_N,
- MIO,
- DDR_CAS_n,
- DDR_CKE,
- DDR_Clk_n,
- DDR_Clk,
- DDR_CS_n,
- DDR_DRSTB,
- DDR_ODT,
- DDR_RAS_n,
- DDR_WEB,
- DDR_BankAddr,
- DDR_Addr,
- DDR_VRN,
- DDR_VRP,
- DDR_DM,
- DDR_DQ,
- DDR_DQS_n,
- DDR_DQS,
- PS_SRSTB,
- PS_CLK,
- PS_PORB);
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_I" *) input SPI1_SCLK_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_O" *) output SPI1_SCLK_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_T" *) output SPI1_SCLK_T;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_I" *) input SPI1_MOSI_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_O" *) output SPI1_MOSI_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_T" *) output SPI1_MOSI_T;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_I" *) input SPI1_MISO_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_O" *) output SPI1_MISO_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_T" *) output SPI1_MISO_T;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_I" *) input SPI1_SS_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_O" *) output SPI1_SS_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS1_O" *) output SPI1_SS1_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS2_O" *) output SPI1_SS2_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_T" *) output SPI1_SS_T;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 PORT_INDCTL" *) output [1:0]USB0_PORT_INDCTL;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 VBUS_PWRSELECT" *) output USB0_VBUS_PWRSELECT;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 VBUS_PWRFAULT" *) input USB0_VBUS_PWRFAULT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARVALID" *) output M_AXI_GP0_ARVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWVALID" *) output M_AXI_GP0_AWVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BREADY" *) output M_AXI_GP0_BREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RREADY" *) output M_AXI_GP0_RREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WLAST" *) output M_AXI_GP0_WLAST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WVALID" *) output M_AXI_GP0_WVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARID" *) output [11:0]M_AXI_GP0_ARID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWID" *) output [11:0]M_AXI_GP0_AWID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WID" *) output [11:0]M_AXI_GP0_WID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARBURST" *) output [1:0]M_AXI_GP0_ARBURST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARLOCK" *) output [1:0]M_AXI_GP0_ARLOCK;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARSIZE" *) output [2:0]M_AXI_GP0_ARSIZE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWBURST" *) output [1:0]M_AXI_GP0_AWBURST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWLOCK" *) output [1:0]M_AXI_GP0_AWLOCK;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWSIZE" *) output [2:0]M_AXI_GP0_AWSIZE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARPROT" *) output [2:0]M_AXI_GP0_ARPROT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWPROT" *) output [2:0]M_AXI_GP0_AWPROT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARADDR" *) output [31:0]M_AXI_GP0_ARADDR;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWADDR" *) output [31:0]M_AXI_GP0_AWADDR;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WDATA" *) output [31:0]M_AXI_GP0_WDATA;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARCACHE" *) output [3:0]M_AXI_GP0_ARCACHE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARLEN" *) output [3:0]M_AXI_GP0_ARLEN;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARQOS" *) output [3:0]M_AXI_GP0_ARQOS;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWCACHE" *) output [3:0]M_AXI_GP0_AWCACHE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWLEN" *) output [3:0]M_AXI_GP0_AWLEN;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWQOS" *) output [3:0]M_AXI_GP0_AWQOS;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WSTRB" *) output [3:0]M_AXI_GP0_WSTRB;
- (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 M_AXI_GP0_ACLK CLK" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME M_AXI_GP0_ACLK, ASSOCIATED_BUSIF M_AXI_GP0, FREQ_HZ 125000000, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, INSERT_VIP 0" *) input M_AXI_GP0_ACLK;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARREADY" *) input M_AXI_GP0_ARREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWREADY" *) input M_AXI_GP0_AWREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BVALID" *) input M_AXI_GP0_BVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RLAST" *) input M_AXI_GP0_RLAST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RVALID" *) input M_AXI_GP0_RVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WREADY" *) input M_AXI_GP0_WREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BID" *) input [11:0]M_AXI_GP0_BID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RID" *) input [11:0]M_AXI_GP0_RID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BRESP" *) input [1:0]M_AXI_GP0_BRESP;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RRESP" *) input [1:0]M_AXI_GP0_RRESP;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RDATA" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME M_AXI_GP0, SUPPORTS_NARROW_BURST 0, NUM_WRITE_OUTSTANDING 8, NUM_READ_OUTSTANDING 8, DATA_WIDTH 32, PROTOCOL AXI3, FREQ_HZ 125000000, ID_WIDTH 12, ADDR_WIDTH 32, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 1, HAS_LOCK 1, HAS_PROT 1, HAS_CACHE 1, HAS_QOS 1, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, MAX_BURST_LENGTH 16, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, NUM_READ_THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) input [31:0]M_AXI_GP0_RDATA;
- (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 FCLK_CLK0 CLK" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FCLK_CLK0, FREQ_HZ 125000000, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, INSERT_VIP 0" *) output FCLK_CLK0;
- (* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 FCLK_RESET0_N RST" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FCLK_RESET0_N, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) output FCLK_RESET0_N;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO MIO" *) inout [53:0]MIO;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CAS_N" *) inout DDR_CAS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CKE" *) inout DDR_CKE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CK_N" *) inout DDR_Clk_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CK_P" *) inout DDR_Clk;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CS_N" *) inout DDR_CS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR RESET_N" *) inout DDR_DRSTB;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR ODT" *) inout DDR_ODT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR RAS_N" *) inout DDR_RAS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR WE_N" *) inout DDR_WEB;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR BA" *) inout [2:0]DDR_BankAddr;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR ADDR" *) inout [14:0]DDR_Addr;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRN" *) inout DDR_VRN;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRP" *) inout DDR_VRP;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DM" *) inout [3:0]DDR_DM;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQ" *) inout [31:0]DDR_DQ;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQS_N" *) inout [3:0]DDR_DQS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQS_P" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME DDR, CAN_DEBUG false, TIMEPERIOD_PS 1250, MEMORY_TYPE COMPONENTS, DATA_WIDTH 8, CS_ENABLED true, DATA_MASK_ENABLED true, SLOT Single, MEM_ADDR_MAP ROW_COLUMN_BANK, BURST_LENGTH 8, AXI_ARBITRATION_SCHEME TDM, CAS_LATENCY 11, CAS_WRITE_LATENCY 11" *) inout [3:0]DDR_DQS;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_SRSTB" *) inout PS_SRSTB;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_CLK" *) inout PS_CLK;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_PORB" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FIXED_IO, CAN_DEBUG false" *) inout PS_PORB;
-
- wire [14:0]DDR_Addr;
- wire [2:0]DDR_BankAddr;
- wire DDR_CAS_n;
- wire DDR_CKE;
- wire DDR_CS_n;
- wire DDR_Clk;
- wire DDR_Clk_n;
- wire [3:0]DDR_DM;
- wire [31:0]DDR_DQ;
- wire [3:0]DDR_DQS;
- wire [3:0]DDR_DQS_n;
- wire DDR_DRSTB;
- wire DDR_ODT;
- wire DDR_RAS_n;
- wire DDR_VRN;
- wire DDR_VRP;
- wire DDR_WEB;
- wire FCLK_CLK0;
- wire FCLK_RESET0_N;
- wire [53:0]MIO;
- wire M_AXI_GP0_ACLK;
- wire [31:0]M_AXI_GP0_ARADDR;
- wire [1:0]M_AXI_GP0_ARBURST;
- wire [3:0]M_AXI_GP0_ARCACHE;
- wire [11:0]M_AXI_GP0_ARID;
- wire [3:0]M_AXI_GP0_ARLEN;
- wire [1:0]M_AXI_GP0_ARLOCK;
- wire [2:0]M_AXI_GP0_ARPROT;
- wire [3:0]M_AXI_GP0_ARQOS;
- wire M_AXI_GP0_ARREADY;
- wire [2:0]M_AXI_GP0_ARSIZE;
- wire M_AXI_GP0_ARVALID;
- wire [31:0]M_AXI_GP0_AWADDR;
- wire [1:0]M_AXI_GP0_AWBURST;
- wire [3:0]M_AXI_GP0_AWCACHE;
- wire [11:0]M_AXI_GP0_AWID;
- wire [3:0]M_AXI_GP0_AWLEN;
- wire [1:0]M_AXI_GP0_AWLOCK;
- wire [2:0]M_AXI_GP0_AWPROT;
- wire [3:0]M_AXI_GP0_AWQOS;
- wire M_AXI_GP0_AWREADY;
- wire [2:0]M_AXI_GP0_AWSIZE;
- wire M_AXI_GP0_AWVALID;
- wire [11:0]M_AXI_GP0_BID;
- wire M_AXI_GP0_BREADY;
- wire [1:0]M_AXI_GP0_BRESP;
- wire M_AXI_GP0_BVALID;
- wire [31:0]M_AXI_GP0_RDATA;
- wire [11:0]M_AXI_GP0_RID;
- wire M_AXI_GP0_RLAST;
- wire M_AXI_GP0_RREADY;
- wire [1:0]M_AXI_GP0_RRESP;
- wire M_AXI_GP0_RVALID;
- wire [31:0]M_AXI_GP0_WDATA;
- wire [11:0]M_AXI_GP0_WID;
- wire M_AXI_GP0_WLAST;
- wire M_AXI_GP0_WREADY;
- wire [3:0]M_AXI_GP0_WSTRB;
- wire M_AXI_GP0_WVALID;
- wire PS_CLK;
- wire PS_PORB;
- wire PS_SRSTB;
- wire SPI1_MISO_I;
- wire SPI1_MISO_O;
- wire SPI1_MISO_T;
- wire SPI1_MOSI_I;
- wire SPI1_MOSI_O;
- wire SPI1_MOSI_T;
- wire SPI1_SCLK_I;
- wire SPI1_SCLK_O;
- wire SPI1_SCLK_T;
- wire SPI1_SS1_O;
- wire SPI1_SS2_O;
- wire SPI1_SS_I;
- wire SPI1_SS_O;
- wire SPI1_SS_T;
- wire [1:0]USB0_PORT_INDCTL;
- wire USB0_VBUS_PWRFAULT;
- wire USB0_VBUS_PWRSELECT;
- wire NLW_inst_CAN0_PHY_TX_UNCONNECTED;
- wire NLW_inst_CAN1_PHY_TX_UNCONNECTED;
- wire NLW_inst_DMA0_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA0_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA0_RSTN_UNCONNECTED;
- wire NLW_inst_DMA1_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA1_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA1_RSTN_UNCONNECTED;
- wire NLW_inst_DMA2_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA2_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA2_RSTN_UNCONNECTED;
- wire NLW_inst_DMA3_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA3_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA3_RSTN_UNCONNECTED;
- wire NLW_inst_ENET0_GMII_TX_EN_UNCONNECTED;
- wire NLW_inst_ENET0_GMII_TX_ER_UNCONNECTED;
- wire NLW_inst_ENET0_MDIO_MDC_UNCONNECTED;
- wire NLW_inst_ENET0_MDIO_O_UNCONNECTED;
- wire NLW_inst_ENET0_MDIO_T_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_DELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_DELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_RESP_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_RESP_TX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_SYNC_FRAME_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_SYNC_FRAME_TX_UNCONNECTED;
- wire NLW_inst_ENET0_SOF_RX_UNCONNECTED;
- wire NLW_inst_ENET0_SOF_TX_UNCONNECTED;
- wire NLW_inst_ENET1_GMII_TX_EN_UNCONNECTED;
- wire NLW_inst_ENET1_GMII_TX_ER_UNCONNECTED;
- wire NLW_inst_ENET1_MDIO_MDC_UNCONNECTED;
- wire NLW_inst_ENET1_MDIO_O_UNCONNECTED;
- wire NLW_inst_ENET1_MDIO_T_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_DELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_DELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_RESP_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_RESP_TX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_SYNC_FRAME_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_SYNC_FRAME_TX_UNCONNECTED;
- wire NLW_inst_ENET1_SOF_RX_UNCONNECTED;
- wire NLW_inst_ENET1_SOF_TX_UNCONNECTED;
- wire NLW_inst_EVENT_EVENTO_UNCONNECTED;
- wire NLW_inst_FCLK_CLK1_UNCONNECTED;
- wire NLW_inst_FCLK_CLK2_UNCONNECTED;
- wire NLW_inst_FCLK_CLK3_UNCONNECTED;
- wire NLW_inst_FCLK_RESET1_N_UNCONNECTED;
- wire NLW_inst_FCLK_RESET2_N_UNCONNECTED;
- wire NLW_inst_FCLK_RESET3_N_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_0_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_1_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_2_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_3_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_0_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_1_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_2_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_3_UNCONNECTED;
- wire NLW_inst_I2C0_SCL_O_UNCONNECTED;
- wire NLW_inst_I2C0_SCL_T_UNCONNECTED;
- wire NLW_inst_I2C0_SDA_O_UNCONNECTED;
- wire NLW_inst_I2C0_SDA_T_UNCONNECTED;
- wire NLW_inst_I2C1_SCL_O_UNCONNECTED;
- wire NLW_inst_I2C1_SCL_T_UNCONNECTED;
- wire NLW_inst_I2C1_SDA_O_UNCONNECTED;
- wire NLW_inst_I2C1_SDA_T_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_CAN0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_CAN1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_CTI_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC2_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC3_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC4_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC5_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC6_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC7_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC_ABORT_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET_WAKE0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET_WAKE1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_GPIO_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_I2C0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_I2C1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_QSPI_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SDIO0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SDIO1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SMC_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SPI0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SPI1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_UART0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_UART1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_USB0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_USB1_UNCONNECTED;
- wire NLW_inst_M_AXI_GP0_ARESETN_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_ARESETN_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_ARVALID_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_AWVALID_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_BREADY_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_RREADY_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_WLAST_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_WVALID_UNCONNECTED;
- wire NLW_inst_PJTAG_TDO_UNCONNECTED;
- wire NLW_inst_SDIO0_BUSPOW_UNCONNECTED;
- wire NLW_inst_SDIO0_CLK_UNCONNECTED;
- wire NLW_inst_SDIO0_CMD_O_UNCONNECTED;
- wire NLW_inst_SDIO0_CMD_T_UNCONNECTED;
- wire NLW_inst_SDIO0_LED_UNCONNECTED;
- wire NLW_inst_SDIO1_BUSPOW_UNCONNECTED;
- wire NLW_inst_SDIO1_CLK_UNCONNECTED;
- wire NLW_inst_SDIO1_CMD_O_UNCONNECTED;
- wire NLW_inst_SDIO1_CMD_T_UNCONNECTED;
- wire NLW_inst_SDIO1_LED_UNCONNECTED;
- wire NLW_inst_SPI0_MISO_O_UNCONNECTED;
- wire NLW_inst_SPI0_MISO_T_UNCONNECTED;
- wire NLW_inst_SPI0_MOSI_O_UNCONNECTED;
- wire NLW_inst_SPI0_MOSI_T_UNCONNECTED;
- wire NLW_inst_SPI0_SCLK_O_UNCONNECTED;
- wire NLW_inst_SPI0_SCLK_T_UNCONNECTED;
- wire NLW_inst_SPI0_SS1_O_UNCONNECTED;
- wire NLW_inst_SPI0_SS2_O_UNCONNECTED;
- wire NLW_inst_SPI0_SS_O_UNCONNECTED;
- wire NLW_inst_SPI0_SS_T_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_WREADY_UNCONNECTED;
- wire NLW_inst_TRACE_CLK_OUT_UNCONNECTED;
- wire NLW_inst_TRACE_CTL_UNCONNECTED;
- wire NLW_inst_TTC0_WAVE0_OUT_UNCONNECTED;
- wire NLW_inst_TTC0_WAVE1_OUT_UNCONNECTED;
- wire NLW_inst_TTC0_WAVE2_OUT_UNCONNECTED;
- wire NLW_inst_TTC1_WAVE0_OUT_UNCONNECTED;
- wire NLW_inst_TTC1_WAVE1_OUT_UNCONNECTED;
- wire NLW_inst_TTC1_WAVE2_OUT_UNCONNECTED;
- wire NLW_inst_UART0_DTRN_UNCONNECTED;
- wire NLW_inst_UART0_RTSN_UNCONNECTED;
- wire NLW_inst_UART0_TX_UNCONNECTED;
- wire NLW_inst_UART1_DTRN_UNCONNECTED;
- wire NLW_inst_UART1_RTSN_UNCONNECTED;
- wire NLW_inst_UART1_TX_UNCONNECTED;
- wire NLW_inst_USB1_VBUS_PWRSELECT_UNCONNECTED;
- wire NLW_inst_WDT_RST_OUT_UNCONNECTED;
- wire [1:0]NLW_inst_DMA0_DATYPE_UNCONNECTED;
- wire [1:0]NLW_inst_DMA1_DATYPE_UNCONNECTED;
- wire [1:0]NLW_inst_DMA2_DATYPE_UNCONNECTED;
- wire [1:0]NLW_inst_DMA3_DATYPE_UNCONNECTED;
- wire [7:0]NLW_inst_ENET0_GMII_TXD_UNCONNECTED;
- wire [7:0]NLW_inst_ENET1_GMII_TXD_UNCONNECTED;
- wire [1:0]NLW_inst_EVENT_STANDBYWFE_UNCONNECTED;
- wire [1:0]NLW_inst_EVENT_STANDBYWFI_UNCONNECTED;
- wire [31:0]NLW_inst_FTMT_P2F_DEBUG_UNCONNECTED;
- wire [63:0]NLW_inst_GPIO_O_UNCONNECTED;
- wire [63:0]NLW_inst_GPIO_T_UNCONNECTED;
- wire [31:0]NLW_inst_M_AXI_GP1_ARADDR_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_ARBURST_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_ARCACHE_UNCONNECTED;
- wire [11:0]NLW_inst_M_AXI_GP1_ARID_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_ARLEN_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_ARLOCK_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_ARPROT_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_ARQOS_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_ARSIZE_UNCONNECTED;
- wire [31:0]NLW_inst_M_AXI_GP1_AWADDR_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_AWBURST_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_AWCACHE_UNCONNECTED;
- wire [11:0]NLW_inst_M_AXI_GP1_AWID_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_AWLEN_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_AWLOCK_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_AWPROT_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_AWQOS_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_AWSIZE_UNCONNECTED;
- wire [31:0]NLW_inst_M_AXI_GP1_WDATA_UNCONNECTED;
- wire [11:0]NLW_inst_M_AXI_GP1_WID_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_WSTRB_UNCONNECTED;
- wire [2:0]NLW_inst_SDIO0_BUSVOLT_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO0_DATA_O_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO0_DATA_T_UNCONNECTED;
- wire [2:0]NLW_inst_SDIO1_BUSVOLT_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO1_DATA_O_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO1_DATA_T_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_ACP_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_ACP_BRESP_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_ACP_RDATA_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_ACP_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_ACP_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP0_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP0_BRESP_UNCONNECTED;
- wire [31:0]NLW_inst_S_AXI_GP0_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP0_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP0_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP1_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP1_BRESP_UNCONNECTED;
- wire [31:0]NLW_inst_S_AXI_GP1_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP1_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP1_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP0_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP0_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP0_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP0_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP0_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP0_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP0_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP0_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP0_WCOUNT_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP1_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP1_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP1_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP1_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP1_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP1_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP1_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP1_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP1_WCOUNT_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP2_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP2_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP2_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP2_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP2_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP2_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP2_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP2_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP2_WCOUNT_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP3_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP3_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP3_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP3_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP3_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP3_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP3_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP3_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP3_WCOUNT_UNCONNECTED;
- wire [1:0]NLW_inst_TRACE_DATA_UNCONNECTED;
- wire [1:0]NLW_inst_USB1_PORT_INDCTL_UNCONNECTED;
-
- (* C_DM_WIDTH = "4" *)
- (* C_DQS_WIDTH = "4" *)
- (* C_DQ_WIDTH = "32" *)
- (* C_EMIO_GPIO_WIDTH = "64" *)
- (* C_EN_EMIO_ENET0 = "0" *)
- (* C_EN_EMIO_ENET1 = "0" *)
- (* C_EN_EMIO_PJTAG = "0" *)
- (* C_EN_EMIO_TRACE = "0" *)
- (* C_FCLK_CLK0_BUF = "TRUE" *)
- (* C_FCLK_CLK1_BUF = "FALSE" *)
- (* C_FCLK_CLK2_BUF = "FALSE" *)
- (* C_FCLK_CLK3_BUF = "FALSE" *)
- (* C_GP0_EN_MODIFIABLE_TXN = "1" *)
- (* C_GP1_EN_MODIFIABLE_TXN = "1" *)
- (* C_INCLUDE_ACP_TRANS_CHECK = "0" *)
- (* C_INCLUDE_TRACE_BUFFER = "0" *)
- (* C_IRQ_F2P_MODE = "DIRECT" *)
- (* C_MIO_PRIMITIVE = "54" *)
- (* C_M_AXI_GP0_ENABLE_STATIC_REMAP = "0" *)
- (* C_M_AXI_GP0_ID_WIDTH = "12" *)
- (* C_M_AXI_GP0_THREAD_ID_WIDTH = "12" *)
- (* C_M_AXI_GP1_ENABLE_STATIC_REMAP = "0" *)
- (* C_M_AXI_GP1_ID_WIDTH = "12" *)
- (* C_M_AXI_GP1_THREAD_ID_WIDTH = "12" *)
- (* C_NUM_F2P_INTR_INPUTS = "1" *)
- (* C_PACKAGE_NAME = "clg485" *)
- (* C_PS7_SI_REV = "PRODUCTION" *)
- (* C_S_AXI_ACP_ARUSER_VAL = "31" *)
- (* C_S_AXI_ACP_AWUSER_VAL = "31" *)
- (* C_S_AXI_ACP_ID_WIDTH = "3" *)
- (* C_S_AXI_GP0_ID_WIDTH = "6" *)
- (* C_S_AXI_GP1_ID_WIDTH = "6" *)
- (* C_S_AXI_HP0_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP0_ID_WIDTH = "6" *)
- (* C_S_AXI_HP1_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP1_ID_WIDTH = "6" *)
- (* C_S_AXI_HP2_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP2_ID_WIDTH = "6" *)
- (* C_S_AXI_HP3_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP3_ID_WIDTH = "6" *)
- (* C_TRACE_BUFFER_CLOCK_DELAY = "12" *)
- (* C_TRACE_BUFFER_FIFO_SIZE = "128" *)
- (* C_TRACE_INTERNAL_WIDTH = "2" *)
- (* C_TRACE_PIPELINE_WIDTH = "8" *)
- (* C_USE_AXI_NONSECURE = "0" *)
- (* C_USE_DEFAULT_ACP_USER_VAL = "0" *)
- (* C_USE_M_AXI_GP0 = "1" *)
- (* C_USE_M_AXI_GP1 = "0" *)
- (* C_USE_S_AXI_ACP = "0" *)
- (* C_USE_S_AXI_GP0 = "0" *)
- (* C_USE_S_AXI_GP1 = "0" *)
- (* C_USE_S_AXI_HP0 = "0" *)
- (* C_USE_S_AXI_HP1 = "0" *)
- (* C_USE_S_AXI_HP2 = "0" *)
- (* C_USE_S_AXI_HP3 = "0" *)
- (* HW_HANDOFF = "scalp_zynqps_processing_system7_0_0.hwdef" *)
- (* POWER = "<PROCESSOR name={system} numA9Cores={2} clockFreq={750} load={0.5} /><MEMORY name={code} memType={DDR3(LowVoltage)} dataWidth={16} clockFreq={500} readRate={0.5} writeRate={0.5} /><IO interface={GPIO_Bank_1} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={1} usageRate={0.5} /><IO interface={GPIO_Bank_0} ioStandard={LVCMOS33} bidis={3} ioBank={Vcco_p0} clockFreq={1} usageRate={0.5} /><IO interface={CAN} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SPI} ioStandard={} bidis={2} ioBank={} clockFreq={159.090912} usageRate={0.5} /><IO interface={SPI} ioStandard={LVCMOS25} bidis={5} ioBank={Vcco_p1} clockFreq={159.090912} usageRate={0.5} /><IO interface={I2C} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SD} ioStandard={LVCMOS33} bidis={7} ioBank={Vcco_p0} clockFreq={97.222221} usageRate={0.5} /><IO interface={USB} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={60} usageRate={0.5} /><IO interface={GigE} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={QSPI} ioStandard={LVCMOS33} bidis={6} ioBank={Vcco_p0} clockFreq={133} usageRate={0.5} /><PLL domain={Processor} vco={1500.000} /><PLL domain={Memory} vco={1000.000} /><PLL domain={IO} vco={1750.000} /><AXI interface={M_AXI_GP0} dataWidth={32} clockFreq={125} usageRate={0.5} />/>" *)
- (* USE_TRACE_DATA_EDGE_DETECTOR = "0" *)
- scalp_zynqps_processing_system7_0_0_processing_system7_v5_5_processing_system7 inst
- (.CAN0_PHY_RX(1'b0),
- .CAN0_PHY_TX(NLW_inst_CAN0_PHY_TX_UNCONNECTED),
- .CAN1_PHY_RX(1'b0),
- .CAN1_PHY_TX(NLW_inst_CAN1_PHY_TX_UNCONNECTED),
- .Core0_nFIQ(1'b0),
- .Core0_nIRQ(1'b0),
- .Core1_nFIQ(1'b0),
- .Core1_nIRQ(1'b0),
- .DDR_ARB({1'b0,1'b0,1'b0,1'b0}),
- .DDR_Addr(DDR_Addr),
- .DDR_BankAddr(DDR_BankAddr),
- .DDR_CAS_n(DDR_CAS_n),
- .DDR_CKE(DDR_CKE),
- .DDR_CS_n(DDR_CS_n),
- .DDR_Clk(DDR_Clk),
- .DDR_Clk_n(DDR_Clk_n),
- .DDR_DM(DDR_DM),
- .DDR_DQ(DDR_DQ),
- .DDR_DQS(DDR_DQS),
- .DDR_DQS_n(DDR_DQS_n),
- .DDR_DRSTB(DDR_DRSTB),
- .DDR_ODT(DDR_ODT),
- .DDR_RAS_n(DDR_RAS_n),
- .DDR_VRN(DDR_VRN),
- .DDR_VRP(DDR_VRP),
- .DDR_WEB(DDR_WEB),
- .DMA0_ACLK(1'b0),
- .DMA0_DAREADY(1'b0),
- .DMA0_DATYPE(NLW_inst_DMA0_DATYPE_UNCONNECTED[1:0]),
- .DMA0_DAVALID(NLW_inst_DMA0_DAVALID_UNCONNECTED),
- .DMA0_DRLAST(1'b0),
- .DMA0_DRREADY(NLW_inst_DMA0_DRREADY_UNCONNECTED),
- .DMA0_DRTYPE({1'b0,1'b0}),
- .DMA0_DRVALID(1'b0),
- .DMA0_RSTN(NLW_inst_DMA0_RSTN_UNCONNECTED),
- .DMA1_ACLK(1'b0),
- .DMA1_DAREADY(1'b0),
- .DMA1_DATYPE(NLW_inst_DMA1_DATYPE_UNCONNECTED[1:0]),
- .DMA1_DAVALID(NLW_inst_DMA1_DAVALID_UNCONNECTED),
- .DMA1_DRLAST(1'b0),
- .DMA1_DRREADY(NLW_inst_DMA1_DRREADY_UNCONNECTED),
- .DMA1_DRTYPE({1'b0,1'b0}),
- .DMA1_DRVALID(1'b0),
- .DMA1_RSTN(NLW_inst_DMA1_RSTN_UNCONNECTED),
- .DMA2_ACLK(1'b0),
- .DMA2_DAREADY(1'b0),
- .DMA2_DATYPE(NLW_inst_DMA2_DATYPE_UNCONNECTED[1:0]),
- .DMA2_DAVALID(NLW_inst_DMA2_DAVALID_UNCONNECTED),
- .DMA2_DRLAST(1'b0),
- .DMA2_DRREADY(NLW_inst_DMA2_DRREADY_UNCONNECTED),
- .DMA2_DRTYPE({1'b0,1'b0}),
- .DMA2_DRVALID(1'b0),
- .DMA2_RSTN(NLW_inst_DMA2_RSTN_UNCONNECTED),
- .DMA3_ACLK(1'b0),
- .DMA3_DAREADY(1'b0),
- .DMA3_DATYPE(NLW_inst_DMA3_DATYPE_UNCONNECTED[1:0]),
- .DMA3_DAVALID(NLW_inst_DMA3_DAVALID_UNCONNECTED),
- .DMA3_DRLAST(1'b0),
- .DMA3_DRREADY(NLW_inst_DMA3_DRREADY_UNCONNECTED),
- .DMA3_DRTYPE({1'b0,1'b0}),
- .DMA3_DRVALID(1'b0),
- .DMA3_RSTN(NLW_inst_DMA3_RSTN_UNCONNECTED),
- .ENET0_EXT_INTIN(1'b0),
- .ENET0_GMII_COL(1'b0),
- .ENET0_GMII_CRS(1'b0),
- .ENET0_GMII_RXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .ENET0_GMII_RX_CLK(1'b0),
- .ENET0_GMII_RX_DV(1'b0),
- .ENET0_GMII_RX_ER(1'b0),
- .ENET0_GMII_TXD(NLW_inst_ENET0_GMII_TXD_UNCONNECTED[7:0]),
- .ENET0_GMII_TX_CLK(1'b0),
- .ENET0_GMII_TX_EN(NLW_inst_ENET0_GMII_TX_EN_UNCONNECTED),
- .ENET0_GMII_TX_ER(NLW_inst_ENET0_GMII_TX_ER_UNCONNECTED),
- .ENET0_MDIO_I(1'b0),
- .ENET0_MDIO_MDC(NLW_inst_ENET0_MDIO_MDC_UNCONNECTED),
- .ENET0_MDIO_O(NLW_inst_ENET0_MDIO_O_UNCONNECTED),
- .ENET0_MDIO_T(NLW_inst_ENET0_MDIO_T_UNCONNECTED),
- .ENET0_PTP_DELAY_REQ_RX(NLW_inst_ENET0_PTP_DELAY_REQ_RX_UNCONNECTED),
- .ENET0_PTP_DELAY_REQ_TX(NLW_inst_ENET0_PTP_DELAY_REQ_TX_UNCONNECTED),
- .ENET0_PTP_PDELAY_REQ_RX(NLW_inst_ENET0_PTP_PDELAY_REQ_RX_UNCONNECTED),
- .ENET0_PTP_PDELAY_REQ_TX(NLW_inst_ENET0_PTP_PDELAY_REQ_TX_UNCONNECTED),
- .ENET0_PTP_PDELAY_RESP_RX(NLW_inst_ENET0_PTP_PDELAY_RESP_RX_UNCONNECTED),
- .ENET0_PTP_PDELAY_RESP_TX(NLW_inst_ENET0_PTP_PDELAY_RESP_TX_UNCONNECTED),
- .ENET0_PTP_SYNC_FRAME_RX(NLW_inst_ENET0_PTP_SYNC_FRAME_RX_UNCONNECTED),
- .ENET0_PTP_SYNC_FRAME_TX(NLW_inst_ENET0_PTP_SYNC_FRAME_TX_UNCONNECTED),
- .ENET0_SOF_RX(NLW_inst_ENET0_SOF_RX_UNCONNECTED),
- .ENET0_SOF_TX(NLW_inst_ENET0_SOF_TX_UNCONNECTED),
- .ENET1_EXT_INTIN(1'b0),
- .ENET1_GMII_COL(1'b0),
- .ENET1_GMII_CRS(1'b0),
- .ENET1_GMII_RXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .ENET1_GMII_RX_CLK(1'b0),
- .ENET1_GMII_RX_DV(1'b0),
- .ENET1_GMII_RX_ER(1'b0),
- .ENET1_GMII_TXD(NLW_inst_ENET1_GMII_TXD_UNCONNECTED[7:0]),
- .ENET1_GMII_TX_CLK(1'b0),
- .ENET1_GMII_TX_EN(NLW_inst_ENET1_GMII_TX_EN_UNCONNECTED),
- .ENET1_GMII_TX_ER(NLW_inst_ENET1_GMII_TX_ER_UNCONNECTED),
- .ENET1_MDIO_I(1'b0),
- .ENET1_MDIO_MDC(NLW_inst_ENET1_MDIO_MDC_UNCONNECTED),
- .ENET1_MDIO_O(NLW_inst_ENET1_MDIO_O_UNCONNECTED),
- .ENET1_MDIO_T(NLW_inst_ENET1_MDIO_T_UNCONNECTED),
- .ENET1_PTP_DELAY_REQ_RX(NLW_inst_ENET1_PTP_DELAY_REQ_RX_UNCONNECTED),
- .ENET1_PTP_DELAY_REQ_TX(NLW_inst_ENET1_PTP_DELAY_REQ_TX_UNCONNECTED),
- .ENET1_PTP_PDELAY_REQ_RX(NLW_inst_ENET1_PTP_PDELAY_REQ_RX_UNCONNECTED),
- .ENET1_PTP_PDELAY_REQ_TX(NLW_inst_ENET1_PTP_PDELAY_REQ_TX_UNCONNECTED),
- .ENET1_PTP_PDELAY_RESP_RX(NLW_inst_ENET1_PTP_PDELAY_RESP_RX_UNCONNECTED),
- .ENET1_PTP_PDELAY_RESP_TX(NLW_inst_ENET1_PTP_PDELAY_RESP_TX_UNCONNECTED),
- .ENET1_PTP_SYNC_FRAME_RX(NLW_inst_ENET1_PTP_SYNC_FRAME_RX_UNCONNECTED),
- .ENET1_PTP_SYNC_FRAME_TX(NLW_inst_ENET1_PTP_SYNC_FRAME_TX_UNCONNECTED),
- .ENET1_SOF_RX(NLW_inst_ENET1_SOF_RX_UNCONNECTED),
- .ENET1_SOF_TX(NLW_inst_ENET1_SOF_TX_UNCONNECTED),
- .EVENT_EVENTI(1'b0),
- .EVENT_EVENTO(NLW_inst_EVENT_EVENTO_UNCONNECTED),
- .EVENT_STANDBYWFE(NLW_inst_EVENT_STANDBYWFE_UNCONNECTED[1:0]),
- .EVENT_STANDBYWFI(NLW_inst_EVENT_STANDBYWFI_UNCONNECTED[1:0]),
- .FCLK_CLK0(FCLK_CLK0),
- .FCLK_CLK1(NLW_inst_FCLK_CLK1_UNCONNECTED),
- .FCLK_CLK2(NLW_inst_FCLK_CLK2_UNCONNECTED),
- .FCLK_CLK3(NLW_inst_FCLK_CLK3_UNCONNECTED),
- .FCLK_CLKTRIG0_N(1'b0),
- .FCLK_CLKTRIG1_N(1'b0),
- .FCLK_CLKTRIG2_N(1'b0),
- .FCLK_CLKTRIG3_N(1'b0),
- .FCLK_RESET0_N(FCLK_RESET0_N),
- .FCLK_RESET1_N(NLW_inst_FCLK_RESET1_N_UNCONNECTED),
- .FCLK_RESET2_N(NLW_inst_FCLK_RESET2_N_UNCONNECTED),
- .FCLK_RESET3_N(NLW_inst_FCLK_RESET3_N_UNCONNECTED),
- .FPGA_IDLE_N(1'b0),
- .FTMD_TRACEIN_ATID({1'b0,1'b0,1'b0,1'b0}),
- .FTMD_TRACEIN_CLK(1'b0),
- .FTMD_TRACEIN_DATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .FTMD_TRACEIN_VALID(1'b0),
- .FTMT_F2P_DEBUG({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .FTMT_F2P_TRIGACK_0(NLW_inst_FTMT_F2P_TRIGACK_0_UNCONNECTED),
- .FTMT_F2P_TRIGACK_1(NLW_inst_FTMT_F2P_TRIGACK_1_UNCONNECTED),
- .FTMT_F2P_TRIGACK_2(NLW_inst_FTMT_F2P_TRIGACK_2_UNCONNECTED),
- .FTMT_F2P_TRIGACK_3(NLW_inst_FTMT_F2P_TRIGACK_3_UNCONNECTED),
- .FTMT_F2P_TRIG_0(1'b0),
- .FTMT_F2P_TRIG_1(1'b0),
- .FTMT_F2P_TRIG_2(1'b0),
- .FTMT_F2P_TRIG_3(1'b0),
- .FTMT_P2F_DEBUG(NLW_inst_FTMT_P2F_DEBUG_UNCONNECTED[31:0]),
- .FTMT_P2F_TRIGACK_0(1'b0),
- .FTMT_P2F_TRIGACK_1(1'b0),
- .FTMT_P2F_TRIGACK_2(1'b0),
- .FTMT_P2F_TRIGACK_3(1'b0),
- .FTMT_P2F_TRIG_0(NLW_inst_FTMT_P2F_TRIG_0_UNCONNECTED),
- .FTMT_P2F_TRIG_1(NLW_inst_FTMT_P2F_TRIG_1_UNCONNECTED),
- .FTMT_P2F_TRIG_2(NLW_inst_FTMT_P2F_TRIG_2_UNCONNECTED),
- .FTMT_P2F_TRIG_3(NLW_inst_FTMT_P2F_TRIG_3_UNCONNECTED),
- .GPIO_I({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .GPIO_O(NLW_inst_GPIO_O_UNCONNECTED[63:0]),
- .GPIO_T(NLW_inst_GPIO_T_UNCONNECTED[63:0]),
- .I2C0_SCL_I(1'b0),
- .I2C0_SCL_O(NLW_inst_I2C0_SCL_O_UNCONNECTED),
- .I2C0_SCL_T(NLW_inst_I2C0_SCL_T_UNCONNECTED),
- .I2C0_SDA_I(1'b0),
- .I2C0_SDA_O(NLW_inst_I2C0_SDA_O_UNCONNECTED),
- .I2C0_SDA_T(NLW_inst_I2C0_SDA_T_UNCONNECTED),
- .I2C1_SCL_I(1'b0),
- .I2C1_SCL_O(NLW_inst_I2C1_SCL_O_UNCONNECTED),
- .I2C1_SCL_T(NLW_inst_I2C1_SCL_T_UNCONNECTED),
- .I2C1_SDA_I(1'b0),
- .I2C1_SDA_O(NLW_inst_I2C1_SDA_O_UNCONNECTED),
- .I2C1_SDA_T(NLW_inst_I2C1_SDA_T_UNCONNECTED),
- .IRQ_F2P(1'b0),
- .IRQ_P2F_CAN0(NLW_inst_IRQ_P2F_CAN0_UNCONNECTED),
- .IRQ_P2F_CAN1(NLW_inst_IRQ_P2F_CAN1_UNCONNECTED),
- .IRQ_P2F_CTI(NLW_inst_IRQ_P2F_CTI_UNCONNECTED),
- .IRQ_P2F_DMAC0(NLW_inst_IRQ_P2F_DMAC0_UNCONNECTED),
- .IRQ_P2F_DMAC1(NLW_inst_IRQ_P2F_DMAC1_UNCONNECTED),
- .IRQ_P2F_DMAC2(NLW_inst_IRQ_P2F_DMAC2_UNCONNECTED),
- .IRQ_P2F_DMAC3(NLW_inst_IRQ_P2F_DMAC3_UNCONNECTED),
- .IRQ_P2F_DMAC4(NLW_inst_IRQ_P2F_DMAC4_UNCONNECTED),
- .IRQ_P2F_DMAC5(NLW_inst_IRQ_P2F_DMAC5_UNCONNECTED),
- .IRQ_P2F_DMAC6(NLW_inst_IRQ_P2F_DMAC6_UNCONNECTED),
- .IRQ_P2F_DMAC7(NLW_inst_IRQ_P2F_DMAC7_UNCONNECTED),
- .IRQ_P2F_DMAC_ABORT(NLW_inst_IRQ_P2F_DMAC_ABORT_UNCONNECTED),
- .IRQ_P2F_ENET0(NLW_inst_IRQ_P2F_ENET0_UNCONNECTED),
- .IRQ_P2F_ENET1(NLW_inst_IRQ_P2F_ENET1_UNCONNECTED),
- .IRQ_P2F_ENET_WAKE0(NLW_inst_IRQ_P2F_ENET_WAKE0_UNCONNECTED),
- .IRQ_P2F_ENET_WAKE1(NLW_inst_IRQ_P2F_ENET_WAKE1_UNCONNECTED),
- .IRQ_P2F_GPIO(NLW_inst_IRQ_P2F_GPIO_UNCONNECTED),
- .IRQ_P2F_I2C0(NLW_inst_IRQ_P2F_I2C0_UNCONNECTED),
- .IRQ_P2F_I2C1(NLW_inst_IRQ_P2F_I2C1_UNCONNECTED),
- .IRQ_P2F_QSPI(NLW_inst_IRQ_P2F_QSPI_UNCONNECTED),
- .IRQ_P2F_SDIO0(NLW_inst_IRQ_P2F_SDIO0_UNCONNECTED),
- .IRQ_P2F_SDIO1(NLW_inst_IRQ_P2F_SDIO1_UNCONNECTED),
- .IRQ_P2F_SMC(NLW_inst_IRQ_P2F_SMC_UNCONNECTED),
- .IRQ_P2F_SPI0(NLW_inst_IRQ_P2F_SPI0_UNCONNECTED),
- .IRQ_P2F_SPI1(NLW_inst_IRQ_P2F_SPI1_UNCONNECTED),
- .IRQ_P2F_UART0(NLW_inst_IRQ_P2F_UART0_UNCONNECTED),
- .IRQ_P2F_UART1(NLW_inst_IRQ_P2F_UART1_UNCONNECTED),
- .IRQ_P2F_USB0(NLW_inst_IRQ_P2F_USB0_UNCONNECTED),
- .IRQ_P2F_USB1(NLW_inst_IRQ_P2F_USB1_UNCONNECTED),
- .MIO(MIO),
- .M_AXI_GP0_ACLK(M_AXI_GP0_ACLK),
- .M_AXI_GP0_ARADDR(M_AXI_GP0_ARADDR),
- .M_AXI_GP0_ARBURST(M_AXI_GP0_ARBURST),
- .M_AXI_GP0_ARCACHE(M_AXI_GP0_ARCACHE),
- .M_AXI_GP0_ARESETN(NLW_inst_M_AXI_GP0_ARESETN_UNCONNECTED),
- .M_AXI_GP0_ARID(M_AXI_GP0_ARID),
- .M_AXI_GP0_ARLEN(M_AXI_GP0_ARLEN),
- .M_AXI_GP0_ARLOCK(M_AXI_GP0_ARLOCK),
- .M_AXI_GP0_ARPROT(M_AXI_GP0_ARPROT),
- .M_AXI_GP0_ARQOS(M_AXI_GP0_ARQOS),
- .M_AXI_GP0_ARREADY(M_AXI_GP0_ARREADY),
- .M_AXI_GP0_ARSIZE(M_AXI_GP0_ARSIZE),
- .M_AXI_GP0_ARVALID(M_AXI_GP0_ARVALID),
- .M_AXI_GP0_AWADDR(M_AXI_GP0_AWADDR),
- .M_AXI_GP0_AWBURST(M_AXI_GP0_AWBURST),
- .M_AXI_GP0_AWCACHE(M_AXI_GP0_AWCACHE),
- .M_AXI_GP0_AWID(M_AXI_GP0_AWID),
- .M_AXI_GP0_AWLEN(M_AXI_GP0_AWLEN),
- .M_AXI_GP0_AWLOCK(M_AXI_GP0_AWLOCK),
- .M_AXI_GP0_AWPROT(M_AXI_GP0_AWPROT),
- .M_AXI_GP0_AWQOS(M_AXI_GP0_AWQOS),
- .M_AXI_GP0_AWREADY(M_AXI_GP0_AWREADY),
- .M_AXI_GP0_AWSIZE(M_AXI_GP0_AWSIZE),
- .M_AXI_GP0_AWVALID(M_AXI_GP0_AWVALID),
- .M_AXI_GP0_BID(M_AXI_GP0_BID),
- .M_AXI_GP0_BREADY(M_AXI_GP0_BREADY),
- .M_AXI_GP0_BRESP(M_AXI_GP0_BRESP),
- .M_AXI_GP0_BVALID(M_AXI_GP0_BVALID),
- .M_AXI_GP0_RDATA(M_AXI_GP0_RDATA),
- .M_AXI_GP0_RID(M_AXI_GP0_RID),
- .M_AXI_GP0_RLAST(M_AXI_GP0_RLAST),
- .M_AXI_GP0_RREADY(M_AXI_GP0_RREADY),
- .M_AXI_GP0_RRESP(M_AXI_GP0_RRESP),
- .M_AXI_GP0_RVALID(M_AXI_GP0_RVALID),
- .M_AXI_GP0_WDATA(M_AXI_GP0_WDATA),
- .M_AXI_GP0_WID(M_AXI_GP0_WID),
- .M_AXI_GP0_WLAST(M_AXI_GP0_WLAST),
- .M_AXI_GP0_WREADY(M_AXI_GP0_WREADY),
- .M_AXI_GP0_WSTRB(M_AXI_GP0_WSTRB),
- .M_AXI_GP0_WVALID(M_AXI_GP0_WVALID),
- .M_AXI_GP1_ACLK(1'b0),
- .M_AXI_GP1_ARADDR(NLW_inst_M_AXI_GP1_ARADDR_UNCONNECTED[31:0]),
- .M_AXI_GP1_ARBURST(NLW_inst_M_AXI_GP1_ARBURST_UNCONNECTED[1:0]),
- .M_AXI_GP1_ARCACHE(NLW_inst_M_AXI_GP1_ARCACHE_UNCONNECTED[3:0]),
- .M_AXI_GP1_ARESETN(NLW_inst_M_AXI_GP1_ARESETN_UNCONNECTED),
- .M_AXI_GP1_ARID(NLW_inst_M_AXI_GP1_ARID_UNCONNECTED[11:0]),
- .M_AXI_GP1_ARLEN(NLW_inst_M_AXI_GP1_ARLEN_UNCONNECTED[3:0]),
- .M_AXI_GP1_ARLOCK(NLW_inst_M_AXI_GP1_ARLOCK_UNCONNECTED[1:0]),
- .M_AXI_GP1_ARPROT(NLW_inst_M_AXI_GP1_ARPROT_UNCONNECTED[2:0]),
- .M_AXI_GP1_ARQOS(NLW_inst_M_AXI_GP1_ARQOS_UNCONNECTED[3:0]),
- .M_AXI_GP1_ARREADY(1'b0),
- .M_AXI_GP1_ARSIZE(NLW_inst_M_AXI_GP1_ARSIZE_UNCONNECTED[2:0]),
- .M_AXI_GP1_ARVALID(NLW_inst_M_AXI_GP1_ARVALID_UNCONNECTED),
- .M_AXI_GP1_AWADDR(NLW_inst_M_AXI_GP1_AWADDR_UNCONNECTED[31:0]),
- .M_AXI_GP1_AWBURST(NLW_inst_M_AXI_GP1_AWBURST_UNCONNECTED[1:0]),
- .M_AXI_GP1_AWCACHE(NLW_inst_M_AXI_GP1_AWCACHE_UNCONNECTED[3:0]),
- .M_AXI_GP1_AWID(NLW_inst_M_AXI_GP1_AWID_UNCONNECTED[11:0]),
- .M_AXI_GP1_AWLEN(NLW_inst_M_AXI_GP1_AWLEN_UNCONNECTED[3:0]),
- .M_AXI_GP1_AWLOCK(NLW_inst_M_AXI_GP1_AWLOCK_UNCONNECTED[1:0]),
- .M_AXI_GP1_AWPROT(NLW_inst_M_AXI_GP1_AWPROT_UNCONNECTED[2:0]),
- .M_AXI_GP1_AWQOS(NLW_inst_M_AXI_GP1_AWQOS_UNCONNECTED[3:0]),
- .M_AXI_GP1_AWREADY(1'b0),
- .M_AXI_GP1_AWSIZE(NLW_inst_M_AXI_GP1_AWSIZE_UNCONNECTED[2:0]),
- .M_AXI_GP1_AWVALID(NLW_inst_M_AXI_GP1_AWVALID_UNCONNECTED),
- .M_AXI_GP1_BID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .M_AXI_GP1_BREADY(NLW_inst_M_AXI_GP1_BREADY_UNCONNECTED),
- .M_AXI_GP1_BRESP({1'b0,1'b0}),
- .M_AXI_GP1_BVALID(1'b0),
- .M_AXI_GP1_RDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .M_AXI_GP1_RID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .M_AXI_GP1_RLAST(1'b0),
- .M_AXI_GP1_RREADY(NLW_inst_M_AXI_GP1_RREADY_UNCONNECTED),
- .M_AXI_GP1_RRESP({1'b0,1'b0}),
- .M_AXI_GP1_RVALID(1'b0),
- .M_AXI_GP1_WDATA(NLW_inst_M_AXI_GP1_WDATA_UNCONNECTED[31:0]),
- .M_AXI_GP1_WID(NLW_inst_M_AXI_GP1_WID_UNCONNECTED[11:0]),
- .M_AXI_GP1_WLAST(NLW_inst_M_AXI_GP1_WLAST_UNCONNECTED),
- .M_AXI_GP1_WREADY(1'b0),
- .M_AXI_GP1_WSTRB(NLW_inst_M_AXI_GP1_WSTRB_UNCONNECTED[3:0]),
- .M_AXI_GP1_WVALID(NLW_inst_M_AXI_GP1_WVALID_UNCONNECTED),
- .PJTAG_TCK(1'b0),
- .PJTAG_TDI(1'b0),
- .PJTAG_TDO(NLW_inst_PJTAG_TDO_UNCONNECTED),
- .PJTAG_TMS(1'b0),
- .PS_CLK(PS_CLK),
- .PS_PORB(PS_PORB),
- .PS_SRSTB(PS_SRSTB),
- .SDIO0_BUSPOW(NLW_inst_SDIO0_BUSPOW_UNCONNECTED),
- .SDIO0_BUSVOLT(NLW_inst_SDIO0_BUSVOLT_UNCONNECTED[2:0]),
- .SDIO0_CDN(1'b0),
- .SDIO0_CLK(NLW_inst_SDIO0_CLK_UNCONNECTED),
- .SDIO0_CLK_FB(1'b0),
- .SDIO0_CMD_I(1'b0),
- .SDIO0_CMD_O(NLW_inst_SDIO0_CMD_O_UNCONNECTED),
- .SDIO0_CMD_T(NLW_inst_SDIO0_CMD_T_UNCONNECTED),
- .SDIO0_DATA_I({1'b0,1'b0,1'b0,1'b0}),
- .SDIO0_DATA_O(NLW_inst_SDIO0_DATA_O_UNCONNECTED[3:0]),
- .SDIO0_DATA_T(NLW_inst_SDIO0_DATA_T_UNCONNECTED[3:0]),
- .SDIO0_LED(NLW_inst_SDIO0_LED_UNCONNECTED),
- .SDIO0_WP(1'b0),
- .SDIO1_BUSPOW(NLW_inst_SDIO1_BUSPOW_UNCONNECTED),
- .SDIO1_BUSVOLT(NLW_inst_SDIO1_BUSVOLT_UNCONNECTED[2:0]),
- .SDIO1_CDN(1'b0),
- .SDIO1_CLK(NLW_inst_SDIO1_CLK_UNCONNECTED),
- .SDIO1_CLK_FB(1'b0),
- .SDIO1_CMD_I(1'b0),
- .SDIO1_CMD_O(NLW_inst_SDIO1_CMD_O_UNCONNECTED),
- .SDIO1_CMD_T(NLW_inst_SDIO1_CMD_T_UNCONNECTED),
- .SDIO1_DATA_I({1'b0,1'b0,1'b0,1'b0}),
- .SDIO1_DATA_O(NLW_inst_SDIO1_DATA_O_UNCONNECTED[3:0]),
- .SDIO1_DATA_T(NLW_inst_SDIO1_DATA_T_UNCONNECTED[3:0]),
- .SDIO1_LED(NLW_inst_SDIO1_LED_UNCONNECTED),
- .SDIO1_WP(1'b0),
- .SPI0_MISO_I(1'b0),
- .SPI0_MISO_O(NLW_inst_SPI0_MISO_O_UNCONNECTED),
- .SPI0_MISO_T(NLW_inst_SPI0_MISO_T_UNCONNECTED),
- .SPI0_MOSI_I(1'b0),
- .SPI0_MOSI_O(NLW_inst_SPI0_MOSI_O_UNCONNECTED),
- .SPI0_MOSI_T(NLW_inst_SPI0_MOSI_T_UNCONNECTED),
- .SPI0_SCLK_I(1'b0),
- .SPI0_SCLK_O(NLW_inst_SPI0_SCLK_O_UNCONNECTED),
- .SPI0_SCLK_T(NLW_inst_SPI0_SCLK_T_UNCONNECTED),
- .SPI0_SS1_O(NLW_inst_SPI0_SS1_O_UNCONNECTED),
- .SPI0_SS2_O(NLW_inst_SPI0_SS2_O_UNCONNECTED),
- .SPI0_SS_I(1'b0),
- .SPI0_SS_O(NLW_inst_SPI0_SS_O_UNCONNECTED),
- .SPI0_SS_T(NLW_inst_SPI0_SS_T_UNCONNECTED),
- .SPI1_MISO_I(SPI1_MISO_I),
- .SPI1_MISO_O(SPI1_MISO_O),
- .SPI1_MISO_T(SPI1_MISO_T),
- .SPI1_MOSI_I(SPI1_MOSI_I),
- .SPI1_MOSI_O(SPI1_MOSI_O),
- .SPI1_MOSI_T(SPI1_MOSI_T),
- .SPI1_SCLK_I(SPI1_SCLK_I),
- .SPI1_SCLK_O(SPI1_SCLK_O),
- .SPI1_SCLK_T(SPI1_SCLK_T),
- .SPI1_SS1_O(SPI1_SS1_O),
- .SPI1_SS2_O(SPI1_SS2_O),
- .SPI1_SS_I(SPI1_SS_I),
- .SPI1_SS_O(SPI1_SS_O),
- .SPI1_SS_T(SPI1_SS_T),
- .SRAM_INTIN(1'b0),
- .S_AXI_ACP_ACLK(1'b0),
- .S_AXI_ACP_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARBURST({1'b0,1'b0}),
- .S_AXI_ACP_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARESETN(NLW_inst_S_AXI_ACP_ARESETN_UNCONNECTED),
- .S_AXI_ACP_ARID({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARLOCK({1'b0,1'b0}),
- .S_AXI_ACP_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARREADY(NLW_inst_S_AXI_ACP_ARREADY_UNCONNECTED),
- .S_AXI_ACP_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARUSER({1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARVALID(1'b0),
- .S_AXI_ACP_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWBURST({1'b0,1'b0}),
- .S_AXI_ACP_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWID({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWLOCK({1'b0,1'b0}),
- .S_AXI_ACP_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWREADY(NLW_inst_S_AXI_ACP_AWREADY_UNCONNECTED),
- .S_AXI_ACP_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWUSER({1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWVALID(1'b0),
- .S_AXI_ACP_BID(NLW_inst_S_AXI_ACP_BID_UNCONNECTED[2:0]),
- .S_AXI_ACP_BREADY(1'b0),
- .S_AXI_ACP_BRESP(NLW_inst_S_AXI_ACP_BRESP_UNCONNECTED[1:0]),
- .S_AXI_ACP_BVALID(NLW_inst_S_AXI_ACP_BVALID_UNCONNECTED),
- .S_AXI_ACP_RDATA(NLW_inst_S_AXI_ACP_RDATA_UNCONNECTED[63:0]),
- .S_AXI_ACP_RID(NLW_inst_S_AXI_ACP_RID_UNCONNECTED[2:0]),
- .S_AXI_ACP_RLAST(NLW_inst_S_AXI_ACP_RLAST_UNCONNECTED),
- .S_AXI_ACP_RREADY(1'b0),
- .S_AXI_ACP_RRESP(NLW_inst_S_AXI_ACP_RRESP_UNCONNECTED[1:0]),
- .S_AXI_ACP_RVALID(NLW_inst_S_AXI_ACP_RVALID_UNCONNECTED),
- .S_AXI_ACP_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_WID({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_WLAST(1'b0),
- .S_AXI_ACP_WREADY(NLW_inst_S_AXI_ACP_WREADY_UNCONNECTED),
- .S_AXI_ACP_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_WVALID(1'b0),
- .S_AXI_GP0_ACLK(1'b0),
- .S_AXI_GP0_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARBURST({1'b0,1'b0}),
- .S_AXI_GP0_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARESETN(NLW_inst_S_AXI_GP0_ARESETN_UNCONNECTED),
- .S_AXI_GP0_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARLOCK({1'b0,1'b0}),
- .S_AXI_GP0_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARREADY(NLW_inst_S_AXI_GP0_ARREADY_UNCONNECTED),
- .S_AXI_GP0_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARVALID(1'b0),
- .S_AXI_GP0_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWBURST({1'b0,1'b0}),
- .S_AXI_GP0_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWLOCK({1'b0,1'b0}),
- .S_AXI_GP0_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWREADY(NLW_inst_S_AXI_GP0_AWREADY_UNCONNECTED),
- .S_AXI_GP0_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWVALID(1'b0),
- .S_AXI_GP0_BID(NLW_inst_S_AXI_GP0_BID_UNCONNECTED[5:0]),
- .S_AXI_GP0_BREADY(1'b0),
- .S_AXI_GP0_BRESP(NLW_inst_S_AXI_GP0_BRESP_UNCONNECTED[1:0]),
- .S_AXI_GP0_BVALID(NLW_inst_S_AXI_GP0_BVALID_UNCONNECTED),
- .S_AXI_GP0_RDATA(NLW_inst_S_AXI_GP0_RDATA_UNCONNECTED[31:0]),
- .S_AXI_GP0_RID(NLW_inst_S_AXI_GP0_RID_UNCONNECTED[5:0]),
- .S_AXI_GP0_RLAST(NLW_inst_S_AXI_GP0_RLAST_UNCONNECTED),
- .S_AXI_GP0_RREADY(1'b0),
- .S_AXI_GP0_RRESP(NLW_inst_S_AXI_GP0_RRESP_UNCONNECTED[1:0]),
- .S_AXI_GP0_RVALID(NLW_inst_S_AXI_GP0_RVALID_UNCONNECTED),
- .S_AXI_GP0_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_WLAST(1'b0),
- .S_AXI_GP0_WREADY(NLW_inst_S_AXI_GP0_WREADY_UNCONNECTED),
- .S_AXI_GP0_WSTRB({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_WVALID(1'b0),
- .S_AXI_GP1_ACLK(1'b0),
- .S_AXI_GP1_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARBURST({1'b0,1'b0}),
- .S_AXI_GP1_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARESETN(NLW_inst_S_AXI_GP1_ARESETN_UNCONNECTED),
- .S_AXI_GP1_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARLOCK({1'b0,1'b0}),
- .S_AXI_GP1_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARREADY(NLW_inst_S_AXI_GP1_ARREADY_UNCONNECTED),
- .S_AXI_GP1_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARVALID(1'b0),
- .S_AXI_GP1_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWBURST({1'b0,1'b0}),
- .S_AXI_GP1_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWLOCK({1'b0,1'b0}),
- .S_AXI_GP1_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWREADY(NLW_inst_S_AXI_GP1_AWREADY_UNCONNECTED),
- .S_AXI_GP1_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWVALID(1'b0),
- .S_AXI_GP1_BID(NLW_inst_S_AXI_GP1_BID_UNCONNECTED[5:0]),
- .S_AXI_GP1_BREADY(1'b0),
- .S_AXI_GP1_BRESP(NLW_inst_S_AXI_GP1_BRESP_UNCONNECTED[1:0]),
- .S_AXI_GP1_BVALID(NLW_inst_S_AXI_GP1_BVALID_UNCONNECTED),
- .S_AXI_GP1_RDATA(NLW_inst_S_AXI_GP1_RDATA_UNCONNECTED[31:0]),
- .S_AXI_GP1_RID(NLW_inst_S_AXI_GP1_RID_UNCONNECTED[5:0]),
- .S_AXI_GP1_RLAST(NLW_inst_S_AXI_GP1_RLAST_UNCONNECTED),
- .S_AXI_GP1_RREADY(1'b0),
- .S_AXI_GP1_RRESP(NLW_inst_S_AXI_GP1_RRESP_UNCONNECTED[1:0]),
- .S_AXI_GP1_RVALID(NLW_inst_S_AXI_GP1_RVALID_UNCONNECTED),
- .S_AXI_GP1_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_WLAST(1'b0),
- .S_AXI_GP1_WREADY(NLW_inst_S_AXI_GP1_WREADY_UNCONNECTED),
- .S_AXI_GP1_WSTRB({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_WVALID(1'b0),
- .S_AXI_HP0_ACLK(1'b0),
- .S_AXI_HP0_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARBURST({1'b0,1'b0}),
- .S_AXI_HP0_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARESETN(NLW_inst_S_AXI_HP0_ARESETN_UNCONNECTED),
- .S_AXI_HP0_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP0_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARREADY(NLW_inst_S_AXI_HP0_ARREADY_UNCONNECTED),
- .S_AXI_HP0_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARVALID(1'b0),
- .S_AXI_HP0_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWBURST({1'b0,1'b0}),
- .S_AXI_HP0_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP0_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWREADY(NLW_inst_S_AXI_HP0_AWREADY_UNCONNECTED),
- .S_AXI_HP0_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWVALID(1'b0),
- .S_AXI_HP0_BID(NLW_inst_S_AXI_HP0_BID_UNCONNECTED[5:0]),
- .S_AXI_HP0_BREADY(1'b0),
- .S_AXI_HP0_BRESP(NLW_inst_S_AXI_HP0_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP0_BVALID(NLW_inst_S_AXI_HP0_BVALID_UNCONNECTED),
- .S_AXI_HP0_RACOUNT(NLW_inst_S_AXI_HP0_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP0_RCOUNT(NLW_inst_S_AXI_HP0_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP0_RDATA(NLW_inst_S_AXI_HP0_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP0_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP0_RID(NLW_inst_S_AXI_HP0_RID_UNCONNECTED[5:0]),
- .S_AXI_HP0_RLAST(NLW_inst_S_AXI_HP0_RLAST_UNCONNECTED),
- .S_AXI_HP0_RREADY(1'b0),
- .S_AXI_HP0_RRESP(NLW_inst_S_AXI_HP0_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP0_RVALID(NLW_inst_S_AXI_HP0_RVALID_UNCONNECTED),
- .S_AXI_HP0_WACOUNT(NLW_inst_S_AXI_HP0_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP0_WCOUNT(NLW_inst_S_AXI_HP0_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP0_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_WLAST(1'b0),
- .S_AXI_HP0_WREADY(NLW_inst_S_AXI_HP0_WREADY_UNCONNECTED),
- .S_AXI_HP0_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP0_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_WVALID(1'b0),
- .S_AXI_HP1_ACLK(1'b0),
- .S_AXI_HP1_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARBURST({1'b0,1'b0}),
- .S_AXI_HP1_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARESETN(NLW_inst_S_AXI_HP1_ARESETN_UNCONNECTED),
- .S_AXI_HP1_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP1_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARREADY(NLW_inst_S_AXI_HP1_ARREADY_UNCONNECTED),
- .S_AXI_HP1_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARVALID(1'b0),
- .S_AXI_HP1_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWBURST({1'b0,1'b0}),
- .S_AXI_HP1_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP1_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWREADY(NLW_inst_S_AXI_HP1_AWREADY_UNCONNECTED),
- .S_AXI_HP1_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWVALID(1'b0),
- .S_AXI_HP1_BID(NLW_inst_S_AXI_HP1_BID_UNCONNECTED[5:0]),
- .S_AXI_HP1_BREADY(1'b0),
- .S_AXI_HP1_BRESP(NLW_inst_S_AXI_HP1_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP1_BVALID(NLW_inst_S_AXI_HP1_BVALID_UNCONNECTED),
- .S_AXI_HP1_RACOUNT(NLW_inst_S_AXI_HP1_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP1_RCOUNT(NLW_inst_S_AXI_HP1_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP1_RDATA(NLW_inst_S_AXI_HP1_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP1_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP1_RID(NLW_inst_S_AXI_HP1_RID_UNCONNECTED[5:0]),
- .S_AXI_HP1_RLAST(NLW_inst_S_AXI_HP1_RLAST_UNCONNECTED),
- .S_AXI_HP1_RREADY(1'b0),
- .S_AXI_HP1_RRESP(NLW_inst_S_AXI_HP1_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP1_RVALID(NLW_inst_S_AXI_HP1_RVALID_UNCONNECTED),
- .S_AXI_HP1_WACOUNT(NLW_inst_S_AXI_HP1_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP1_WCOUNT(NLW_inst_S_AXI_HP1_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP1_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_WLAST(1'b0),
- .S_AXI_HP1_WREADY(NLW_inst_S_AXI_HP1_WREADY_UNCONNECTED),
- .S_AXI_HP1_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP1_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_WVALID(1'b0),
- .S_AXI_HP2_ACLK(1'b0),
- .S_AXI_HP2_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARBURST({1'b0,1'b0}),
- .S_AXI_HP2_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARESETN(NLW_inst_S_AXI_HP2_ARESETN_UNCONNECTED),
- .S_AXI_HP2_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP2_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARREADY(NLW_inst_S_AXI_HP2_ARREADY_UNCONNECTED),
- .S_AXI_HP2_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARVALID(1'b0),
- .S_AXI_HP2_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWBURST({1'b0,1'b0}),
- .S_AXI_HP2_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP2_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWREADY(NLW_inst_S_AXI_HP2_AWREADY_UNCONNECTED),
- .S_AXI_HP2_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWVALID(1'b0),
- .S_AXI_HP2_BID(NLW_inst_S_AXI_HP2_BID_UNCONNECTED[5:0]),
- .S_AXI_HP2_BREADY(1'b0),
- .S_AXI_HP2_BRESP(NLW_inst_S_AXI_HP2_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP2_BVALID(NLW_inst_S_AXI_HP2_BVALID_UNCONNECTED),
- .S_AXI_HP2_RACOUNT(NLW_inst_S_AXI_HP2_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP2_RCOUNT(NLW_inst_S_AXI_HP2_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP2_RDATA(NLW_inst_S_AXI_HP2_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP2_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP2_RID(NLW_inst_S_AXI_HP2_RID_UNCONNECTED[5:0]),
- .S_AXI_HP2_RLAST(NLW_inst_S_AXI_HP2_RLAST_UNCONNECTED),
- .S_AXI_HP2_RREADY(1'b0),
- .S_AXI_HP2_RRESP(NLW_inst_S_AXI_HP2_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP2_RVALID(NLW_inst_S_AXI_HP2_RVALID_UNCONNECTED),
- .S_AXI_HP2_WACOUNT(NLW_inst_S_AXI_HP2_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP2_WCOUNT(NLW_inst_S_AXI_HP2_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP2_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_WLAST(1'b0),
- .S_AXI_HP2_WREADY(NLW_inst_S_AXI_HP2_WREADY_UNCONNECTED),
- .S_AXI_HP2_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP2_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_WVALID(1'b0),
- .S_AXI_HP3_ACLK(1'b0),
- .S_AXI_HP3_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARBURST({1'b0,1'b0}),
- .S_AXI_HP3_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARESETN(NLW_inst_S_AXI_HP3_ARESETN_UNCONNECTED),
- .S_AXI_HP3_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP3_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARREADY(NLW_inst_S_AXI_HP3_ARREADY_UNCONNECTED),
- .S_AXI_HP3_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARVALID(1'b0),
- .S_AXI_HP3_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWBURST({1'b0,1'b0}),
- .S_AXI_HP3_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP3_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWREADY(NLW_inst_S_AXI_HP3_AWREADY_UNCONNECTED),
- .S_AXI_HP3_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWVALID(1'b0),
- .S_AXI_HP3_BID(NLW_inst_S_AXI_HP3_BID_UNCONNECTED[5:0]),
- .S_AXI_HP3_BREADY(1'b0),
- .S_AXI_HP3_BRESP(NLW_inst_S_AXI_HP3_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP3_BVALID(NLW_inst_S_AXI_HP3_BVALID_UNCONNECTED),
- .S_AXI_HP3_RACOUNT(NLW_inst_S_AXI_HP3_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP3_RCOUNT(NLW_inst_S_AXI_HP3_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP3_RDATA(NLW_inst_S_AXI_HP3_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP3_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP3_RID(NLW_inst_S_AXI_HP3_RID_UNCONNECTED[5:0]),
- .S_AXI_HP3_RLAST(NLW_inst_S_AXI_HP3_RLAST_UNCONNECTED),
- .S_AXI_HP3_RREADY(1'b0),
- .S_AXI_HP3_RRESP(NLW_inst_S_AXI_HP3_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP3_RVALID(NLW_inst_S_AXI_HP3_RVALID_UNCONNECTED),
- .S_AXI_HP3_WACOUNT(NLW_inst_S_AXI_HP3_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP3_WCOUNT(NLW_inst_S_AXI_HP3_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP3_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_WLAST(1'b0),
- .S_AXI_HP3_WREADY(NLW_inst_S_AXI_HP3_WREADY_UNCONNECTED),
- .S_AXI_HP3_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP3_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_WVALID(1'b0),
- .TRACE_CLK(1'b0),
- .TRACE_CLK_OUT(NLW_inst_TRACE_CLK_OUT_UNCONNECTED),
- .TRACE_CTL(NLW_inst_TRACE_CTL_UNCONNECTED),
- .TRACE_DATA(NLW_inst_TRACE_DATA_UNCONNECTED[1:0]),
- .TTC0_CLK0_IN(1'b0),
- .TTC0_CLK1_IN(1'b0),
- .TTC0_CLK2_IN(1'b0),
- .TTC0_WAVE0_OUT(NLW_inst_TTC0_WAVE0_OUT_UNCONNECTED),
- .TTC0_WAVE1_OUT(NLW_inst_TTC0_WAVE1_OUT_UNCONNECTED),
- .TTC0_WAVE2_OUT(NLW_inst_TTC0_WAVE2_OUT_UNCONNECTED),
- .TTC1_CLK0_IN(1'b0),
- .TTC1_CLK1_IN(1'b0),
- .TTC1_CLK2_IN(1'b0),
- .TTC1_WAVE0_OUT(NLW_inst_TTC1_WAVE0_OUT_UNCONNECTED),
- .TTC1_WAVE1_OUT(NLW_inst_TTC1_WAVE1_OUT_UNCONNECTED),
- .TTC1_WAVE2_OUT(NLW_inst_TTC1_WAVE2_OUT_UNCONNECTED),
- .UART0_CTSN(1'b0),
- .UART0_DCDN(1'b0),
- .UART0_DSRN(1'b0),
- .UART0_DTRN(NLW_inst_UART0_DTRN_UNCONNECTED),
- .UART0_RIN(1'b0),
- .UART0_RTSN(NLW_inst_UART0_RTSN_UNCONNECTED),
- .UART0_RX(1'b1),
- .UART0_TX(NLW_inst_UART0_TX_UNCONNECTED),
- .UART1_CTSN(1'b0),
- .UART1_DCDN(1'b0),
- .UART1_DSRN(1'b0),
- .UART1_DTRN(NLW_inst_UART1_DTRN_UNCONNECTED),
- .UART1_RIN(1'b0),
- .UART1_RTSN(NLW_inst_UART1_RTSN_UNCONNECTED),
- .UART1_RX(1'b1),
- .UART1_TX(NLW_inst_UART1_TX_UNCONNECTED),
- .USB0_PORT_INDCTL(USB0_PORT_INDCTL),
- .USB0_VBUS_PWRFAULT(USB0_VBUS_PWRFAULT),
- .USB0_VBUS_PWRSELECT(USB0_VBUS_PWRSELECT),
- .USB1_PORT_INDCTL(NLW_inst_USB1_PORT_INDCTL_UNCONNECTED[1:0]),
- .USB1_VBUS_PWRFAULT(1'b0),
- .USB1_VBUS_PWRSELECT(NLW_inst_USB1_VBUS_PWRSELECT_UNCONNECTED),
- .WDT_CLK_IN(1'b0),
- .WDT_RST_OUT(NLW_inst_WDT_RST_OUT_UNCONNECTED));
-endmodule
-
-(* C_DM_WIDTH = "4" *) (* C_DQS_WIDTH = "4" *) (* C_DQ_WIDTH = "32" *)
-(* C_EMIO_GPIO_WIDTH = "64" *) (* C_EN_EMIO_ENET0 = "0" *) (* C_EN_EMIO_ENET1 = "0" *)
-(* C_EN_EMIO_PJTAG = "0" *) (* C_EN_EMIO_TRACE = "0" *) (* C_FCLK_CLK0_BUF = "TRUE" *)
-(* C_FCLK_CLK1_BUF = "FALSE" *) (* C_FCLK_CLK2_BUF = "FALSE" *) (* C_FCLK_CLK3_BUF = "FALSE" *)
-(* C_GP0_EN_MODIFIABLE_TXN = "1" *) (* C_GP1_EN_MODIFIABLE_TXN = "1" *) (* C_INCLUDE_ACP_TRANS_CHECK = "0" *)
-(* C_INCLUDE_TRACE_BUFFER = "0" *) (* C_IRQ_F2P_MODE = "DIRECT" *) (* C_MIO_PRIMITIVE = "54" *)
-(* C_M_AXI_GP0_ENABLE_STATIC_REMAP = "0" *) (* C_M_AXI_GP0_ID_WIDTH = "12" *) (* C_M_AXI_GP0_THREAD_ID_WIDTH = "12" *)
-(* C_M_AXI_GP1_ENABLE_STATIC_REMAP = "0" *) (* C_M_AXI_GP1_ID_WIDTH = "12" *) (* C_M_AXI_GP1_THREAD_ID_WIDTH = "12" *)
-(* C_NUM_F2P_INTR_INPUTS = "1" *) (* C_PACKAGE_NAME = "clg485" *) (* C_PS7_SI_REV = "PRODUCTION" *)
-(* C_S_AXI_ACP_ARUSER_VAL = "31" *) (* C_S_AXI_ACP_AWUSER_VAL = "31" *) (* C_S_AXI_ACP_ID_WIDTH = "3" *)
-(* C_S_AXI_GP0_ID_WIDTH = "6" *) (* C_S_AXI_GP1_ID_WIDTH = "6" *) (* C_S_AXI_HP0_DATA_WIDTH = "64" *)
-(* C_S_AXI_HP0_ID_WIDTH = "6" *) (* C_S_AXI_HP1_DATA_WIDTH = "64" *) (* C_S_AXI_HP1_ID_WIDTH = "6" *)
-(* C_S_AXI_HP2_DATA_WIDTH = "64" *) (* C_S_AXI_HP2_ID_WIDTH = "6" *) (* C_S_AXI_HP3_DATA_WIDTH = "64" *)
-(* C_S_AXI_HP3_ID_WIDTH = "6" *) (* C_TRACE_BUFFER_CLOCK_DELAY = "12" *) (* C_TRACE_BUFFER_FIFO_SIZE = "128" *)
-(* C_TRACE_INTERNAL_WIDTH = "2" *) (* C_TRACE_PIPELINE_WIDTH = "8" *) (* C_USE_AXI_NONSECURE = "0" *)
-(* C_USE_DEFAULT_ACP_USER_VAL = "0" *) (* C_USE_M_AXI_GP0 = "1" *) (* C_USE_M_AXI_GP1 = "0" *)
-(* C_USE_S_AXI_ACP = "0" *) (* C_USE_S_AXI_GP0 = "0" *) (* C_USE_S_AXI_GP1 = "0" *)
-(* C_USE_S_AXI_HP0 = "0" *) (* C_USE_S_AXI_HP1 = "0" *) (* C_USE_S_AXI_HP2 = "0" *)
-(* C_USE_S_AXI_HP3 = "0" *) (* HW_HANDOFF = "scalp_zynqps_processing_system7_0_0.hwdef" *) (* ORIG_REF_NAME = "processing_system7_v5_5_processing_system7" *)
-(* POWER = "<PROCESSOR name={system} numA9Cores={2} clockFreq={750} load={0.5} /><MEMORY name={code} memType={DDR3(LowVoltage)} dataWidth={16} clockFreq={500} readRate={0.5} writeRate={0.5} /><IO interface={GPIO_Bank_1} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={1} usageRate={0.5} /><IO interface={GPIO_Bank_0} ioStandard={LVCMOS33} bidis={3} ioBank={Vcco_p0} clockFreq={1} usageRate={0.5} /><IO interface={CAN} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SPI} ioStandard={} bidis={2} ioBank={} clockFreq={159.090912} usageRate={0.5} /><IO interface={SPI} ioStandard={LVCMOS25} bidis={5} ioBank={Vcco_p1} clockFreq={159.090912} usageRate={0.5} /><IO interface={I2C} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SD} ioStandard={LVCMOS33} bidis={7} ioBank={Vcco_p0} clockFreq={97.222221} usageRate={0.5} /><IO interface={USB} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={60} usageRate={0.5} /><IO interface={GigE} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={QSPI} ioStandard={LVCMOS33} bidis={6} ioBank={Vcco_p0} clockFreq={133} usageRate={0.5} /><PLL domain={Processor} vco={1500.000} /><PLL domain={Memory} vco={1000.000} /><PLL domain={IO} vco={1750.000} /><AXI interface={M_AXI_GP0} dataWidth={32} clockFreq={125} usageRate={0.5} />/>" *) (* USE_TRACE_DATA_EDGE_DETECTOR = "0" *)
-module scalp_zynqps_processing_system7_0_0_processing_system7_v5_5_processing_system7
- (CAN0_PHY_TX,
- CAN0_PHY_RX,
- CAN1_PHY_TX,
- CAN1_PHY_RX,
- ENET0_GMII_TX_EN,
- ENET0_GMII_TX_ER,
- ENET0_MDIO_MDC,
- ENET0_MDIO_O,
- ENET0_MDIO_T,
- ENET0_PTP_DELAY_REQ_RX,
- ENET0_PTP_DELAY_REQ_TX,
- ENET0_PTP_PDELAY_REQ_RX,
- ENET0_PTP_PDELAY_REQ_TX,
- ENET0_PTP_PDELAY_RESP_RX,
- ENET0_PTP_PDELAY_RESP_TX,
- ENET0_PTP_SYNC_FRAME_RX,
- ENET0_PTP_SYNC_FRAME_TX,
- ENET0_SOF_RX,
- ENET0_SOF_TX,
- ENET0_GMII_TXD,
- ENET0_GMII_COL,
- ENET0_GMII_CRS,
- ENET0_GMII_RX_CLK,
- ENET0_GMII_RX_DV,
- ENET0_GMII_RX_ER,
- ENET0_GMII_TX_CLK,
- ENET0_MDIO_I,
- ENET0_EXT_INTIN,
- ENET0_GMII_RXD,
- ENET1_GMII_TX_EN,
- ENET1_GMII_TX_ER,
- ENET1_MDIO_MDC,
- ENET1_MDIO_O,
- ENET1_MDIO_T,
- ENET1_PTP_DELAY_REQ_RX,
- ENET1_PTP_DELAY_REQ_TX,
- ENET1_PTP_PDELAY_REQ_RX,
- ENET1_PTP_PDELAY_REQ_TX,
- ENET1_PTP_PDELAY_RESP_RX,
- ENET1_PTP_PDELAY_RESP_TX,
- ENET1_PTP_SYNC_FRAME_RX,
- ENET1_PTP_SYNC_FRAME_TX,
- ENET1_SOF_RX,
- ENET1_SOF_TX,
- ENET1_GMII_TXD,
- ENET1_GMII_COL,
- ENET1_GMII_CRS,
- ENET1_GMII_RX_CLK,
- ENET1_GMII_RX_DV,
- ENET1_GMII_RX_ER,
- ENET1_GMII_TX_CLK,
- ENET1_MDIO_I,
- ENET1_EXT_INTIN,
- ENET1_GMII_RXD,
- GPIO_I,
- GPIO_O,
- GPIO_T,
- I2C0_SDA_I,
- I2C0_SDA_O,
- I2C0_SDA_T,
- I2C0_SCL_I,
- I2C0_SCL_O,
- I2C0_SCL_T,
- I2C1_SDA_I,
- I2C1_SDA_O,
- I2C1_SDA_T,
- I2C1_SCL_I,
- I2C1_SCL_O,
- I2C1_SCL_T,
- PJTAG_TCK,
- PJTAG_TMS,
- PJTAG_TDI,
- PJTAG_TDO,
- SDIO0_CLK,
- SDIO0_CLK_FB,
- SDIO0_CMD_O,
- SDIO0_CMD_I,
- SDIO0_CMD_T,
- SDIO0_DATA_I,
- SDIO0_DATA_O,
- SDIO0_DATA_T,
- SDIO0_LED,
- SDIO0_CDN,
- SDIO0_WP,
- SDIO0_BUSPOW,
- SDIO0_BUSVOLT,
- SDIO1_CLK,
- SDIO1_CLK_FB,
- SDIO1_CMD_O,
- SDIO1_CMD_I,
- SDIO1_CMD_T,
- SDIO1_DATA_I,
- SDIO1_DATA_O,
- SDIO1_DATA_T,
- SDIO1_LED,
- SDIO1_CDN,
- SDIO1_WP,
- SDIO1_BUSPOW,
- SDIO1_BUSVOLT,
- SPI0_SCLK_I,
- SPI0_SCLK_O,
- SPI0_SCLK_T,
- SPI0_MOSI_I,
- SPI0_MOSI_O,
- SPI0_MOSI_T,
- SPI0_MISO_I,
- SPI0_MISO_O,
- SPI0_MISO_T,
- SPI0_SS_I,
- SPI0_SS_O,
- SPI0_SS1_O,
- SPI0_SS2_O,
- SPI0_SS_T,
- SPI1_SCLK_I,
- SPI1_SCLK_O,
- SPI1_SCLK_T,
- SPI1_MOSI_I,
- SPI1_MOSI_O,
- SPI1_MOSI_T,
- SPI1_MISO_I,
- SPI1_MISO_O,
- SPI1_MISO_T,
- SPI1_SS_I,
- SPI1_SS_O,
- SPI1_SS1_O,
- SPI1_SS2_O,
- SPI1_SS_T,
- UART0_DTRN,
- UART0_RTSN,
- UART0_TX,
- UART0_CTSN,
- UART0_DCDN,
- UART0_DSRN,
- UART0_RIN,
- UART0_RX,
- UART1_DTRN,
- UART1_RTSN,
- UART1_TX,
- UART1_CTSN,
- UART1_DCDN,
- UART1_DSRN,
- UART1_RIN,
- UART1_RX,
- TTC0_WAVE0_OUT,
- TTC0_WAVE1_OUT,
- TTC0_WAVE2_OUT,
- TTC0_CLK0_IN,
- TTC0_CLK1_IN,
- TTC0_CLK2_IN,
- TTC1_WAVE0_OUT,
- TTC1_WAVE1_OUT,
- TTC1_WAVE2_OUT,
- TTC1_CLK0_IN,
- TTC1_CLK1_IN,
- TTC1_CLK2_IN,
- WDT_CLK_IN,
- WDT_RST_OUT,
- TRACE_CLK,
- TRACE_CTL,
- TRACE_DATA,
- TRACE_CLK_OUT,
- USB0_PORT_INDCTL,
- USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT,
- USB1_PORT_INDCTL,
- USB1_VBUS_PWRSELECT,
- USB1_VBUS_PWRFAULT,
- SRAM_INTIN,
- M_AXI_GP0_ARESETN,
- M_AXI_GP0_ARVALID,
- M_AXI_GP0_AWVALID,
- M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY,
- M_AXI_GP0_WLAST,
- M_AXI_GP0_WVALID,
- M_AXI_GP0_ARID,
- M_AXI_GP0_AWID,
- M_AXI_GP0_WID,
- M_AXI_GP0_ARBURST,
- M_AXI_GP0_ARLOCK,
- M_AXI_GP0_ARSIZE,
- M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK,
- M_AXI_GP0_AWSIZE,
- M_AXI_GP0_ARPROT,
- M_AXI_GP0_AWPROT,
- M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR,
- M_AXI_GP0_WDATA,
- M_AXI_GP0_ARCACHE,
- M_AXI_GP0_ARLEN,
- M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE,
- M_AXI_GP0_AWLEN,
- M_AXI_GP0_AWQOS,
- M_AXI_GP0_WSTRB,
- M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY,
- M_AXI_GP0_AWREADY,
- M_AXI_GP0_BVALID,
- M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID,
- M_AXI_GP0_WREADY,
- M_AXI_GP0_BID,
- M_AXI_GP0_RID,
- M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP,
- M_AXI_GP0_RDATA,
- M_AXI_GP1_ARESETN,
- M_AXI_GP1_ARVALID,
- M_AXI_GP1_AWVALID,
- M_AXI_GP1_BREADY,
- M_AXI_GP1_RREADY,
- M_AXI_GP1_WLAST,
- M_AXI_GP1_WVALID,
- M_AXI_GP1_ARID,
- M_AXI_GP1_AWID,
- M_AXI_GP1_WID,
- M_AXI_GP1_ARBURST,
- M_AXI_GP1_ARLOCK,
- M_AXI_GP1_ARSIZE,
- M_AXI_GP1_AWBURST,
- M_AXI_GP1_AWLOCK,
- M_AXI_GP1_AWSIZE,
- M_AXI_GP1_ARPROT,
- M_AXI_GP1_AWPROT,
- M_AXI_GP1_ARADDR,
- M_AXI_GP1_AWADDR,
- M_AXI_GP1_WDATA,
- M_AXI_GP1_ARCACHE,
- M_AXI_GP1_ARLEN,
- M_AXI_GP1_ARQOS,
- M_AXI_GP1_AWCACHE,
- M_AXI_GP1_AWLEN,
- M_AXI_GP1_AWQOS,
- M_AXI_GP1_WSTRB,
- M_AXI_GP1_ACLK,
- M_AXI_GP1_ARREADY,
- M_AXI_GP1_AWREADY,
- M_AXI_GP1_BVALID,
- M_AXI_GP1_RLAST,
- M_AXI_GP1_RVALID,
- M_AXI_GP1_WREADY,
- M_AXI_GP1_BID,
- M_AXI_GP1_RID,
- M_AXI_GP1_BRESP,
- M_AXI_GP1_RRESP,
- M_AXI_GP1_RDATA,
- S_AXI_GP0_ARESETN,
- S_AXI_GP0_ARREADY,
- S_AXI_GP0_AWREADY,
- S_AXI_GP0_BVALID,
- S_AXI_GP0_RLAST,
- S_AXI_GP0_RVALID,
- S_AXI_GP0_WREADY,
- S_AXI_GP0_BRESP,
- S_AXI_GP0_RRESP,
- S_AXI_GP0_RDATA,
- S_AXI_GP0_BID,
- S_AXI_GP0_RID,
- S_AXI_GP0_ACLK,
- S_AXI_GP0_ARVALID,
- S_AXI_GP0_AWVALID,
- S_AXI_GP0_BREADY,
- S_AXI_GP0_RREADY,
- S_AXI_GP0_WLAST,
- S_AXI_GP0_WVALID,
- S_AXI_GP0_ARBURST,
- S_AXI_GP0_ARLOCK,
- S_AXI_GP0_ARSIZE,
- S_AXI_GP0_AWBURST,
- S_AXI_GP0_AWLOCK,
- S_AXI_GP0_AWSIZE,
- S_AXI_GP0_ARPROT,
- S_AXI_GP0_AWPROT,
- S_AXI_GP0_ARADDR,
- S_AXI_GP0_AWADDR,
- S_AXI_GP0_WDATA,
- S_AXI_GP0_ARCACHE,
- S_AXI_GP0_ARLEN,
- S_AXI_GP0_ARQOS,
- S_AXI_GP0_AWCACHE,
- S_AXI_GP0_AWLEN,
- S_AXI_GP0_AWQOS,
- S_AXI_GP0_WSTRB,
- S_AXI_GP0_ARID,
- S_AXI_GP0_AWID,
- S_AXI_GP0_WID,
- S_AXI_GP1_ARESETN,
- S_AXI_GP1_ARREADY,
- S_AXI_GP1_AWREADY,
- S_AXI_GP1_BVALID,
- S_AXI_GP1_RLAST,
- S_AXI_GP1_RVALID,
- S_AXI_GP1_WREADY,
- S_AXI_GP1_BRESP,
- S_AXI_GP1_RRESP,
- S_AXI_GP1_RDATA,
- S_AXI_GP1_BID,
- S_AXI_GP1_RID,
- S_AXI_GP1_ACLK,
- S_AXI_GP1_ARVALID,
- S_AXI_GP1_AWVALID,
- S_AXI_GP1_BREADY,
- S_AXI_GP1_RREADY,
- S_AXI_GP1_WLAST,
- S_AXI_GP1_WVALID,
- S_AXI_GP1_ARBURST,
- S_AXI_GP1_ARLOCK,
- S_AXI_GP1_ARSIZE,
- S_AXI_GP1_AWBURST,
- S_AXI_GP1_AWLOCK,
- S_AXI_GP1_AWSIZE,
- S_AXI_GP1_ARPROT,
- S_AXI_GP1_AWPROT,
- S_AXI_GP1_ARADDR,
- S_AXI_GP1_AWADDR,
- S_AXI_GP1_WDATA,
- S_AXI_GP1_ARCACHE,
- S_AXI_GP1_ARLEN,
- S_AXI_GP1_ARQOS,
- S_AXI_GP1_AWCACHE,
- S_AXI_GP1_AWLEN,
- S_AXI_GP1_AWQOS,
- S_AXI_GP1_WSTRB,
- S_AXI_GP1_ARID,
- S_AXI_GP1_AWID,
- S_AXI_GP1_WID,
- S_AXI_ACP_ARESETN,
- S_AXI_ACP_ARREADY,
- S_AXI_ACP_AWREADY,
- S_AXI_ACP_BVALID,
- S_AXI_ACP_RLAST,
- S_AXI_ACP_RVALID,
- S_AXI_ACP_WREADY,
- S_AXI_ACP_BRESP,
- S_AXI_ACP_RRESP,
- S_AXI_ACP_BID,
- S_AXI_ACP_RID,
- S_AXI_ACP_RDATA,
- S_AXI_ACP_ACLK,
- S_AXI_ACP_ARVALID,
- S_AXI_ACP_AWVALID,
- S_AXI_ACP_BREADY,
- S_AXI_ACP_RREADY,
- S_AXI_ACP_WLAST,
- S_AXI_ACP_WVALID,
- S_AXI_ACP_ARID,
- S_AXI_ACP_ARPROT,
- S_AXI_ACP_AWID,
- S_AXI_ACP_AWPROT,
- S_AXI_ACP_WID,
- S_AXI_ACP_ARADDR,
- S_AXI_ACP_AWADDR,
- S_AXI_ACP_ARCACHE,
- S_AXI_ACP_ARLEN,
- S_AXI_ACP_ARQOS,
- S_AXI_ACP_AWCACHE,
- S_AXI_ACP_AWLEN,
- S_AXI_ACP_AWQOS,
- S_AXI_ACP_ARBURST,
- S_AXI_ACP_ARLOCK,
- S_AXI_ACP_ARSIZE,
- S_AXI_ACP_AWBURST,
- S_AXI_ACP_AWLOCK,
- S_AXI_ACP_AWSIZE,
- S_AXI_ACP_ARUSER,
- S_AXI_ACP_AWUSER,
- S_AXI_ACP_WDATA,
- S_AXI_ACP_WSTRB,
- S_AXI_HP0_ARESETN,
- S_AXI_HP0_ARREADY,
- S_AXI_HP0_AWREADY,
- S_AXI_HP0_BVALID,
- S_AXI_HP0_RLAST,
- S_AXI_HP0_RVALID,
- S_AXI_HP0_WREADY,
- S_AXI_HP0_BRESP,
- S_AXI_HP0_RRESP,
- S_AXI_HP0_BID,
- S_AXI_HP0_RID,
- S_AXI_HP0_RDATA,
- S_AXI_HP0_RCOUNT,
- S_AXI_HP0_WCOUNT,
- S_AXI_HP0_RACOUNT,
- S_AXI_HP0_WACOUNT,
- S_AXI_HP0_ACLK,
- S_AXI_HP0_ARVALID,
- S_AXI_HP0_AWVALID,
- S_AXI_HP0_BREADY,
- S_AXI_HP0_RDISSUECAP1_EN,
- S_AXI_HP0_RREADY,
- S_AXI_HP0_WLAST,
- S_AXI_HP0_WRISSUECAP1_EN,
- S_AXI_HP0_WVALID,
- S_AXI_HP0_ARBURST,
- S_AXI_HP0_ARLOCK,
- S_AXI_HP0_ARSIZE,
- S_AXI_HP0_AWBURST,
- S_AXI_HP0_AWLOCK,
- S_AXI_HP0_AWSIZE,
- S_AXI_HP0_ARPROT,
- S_AXI_HP0_AWPROT,
- S_AXI_HP0_ARADDR,
- S_AXI_HP0_AWADDR,
- S_AXI_HP0_ARCACHE,
- S_AXI_HP0_ARLEN,
- S_AXI_HP0_ARQOS,
- S_AXI_HP0_AWCACHE,
- S_AXI_HP0_AWLEN,
- S_AXI_HP0_AWQOS,
- S_AXI_HP0_ARID,
- S_AXI_HP0_AWID,
- S_AXI_HP0_WID,
- S_AXI_HP0_WDATA,
- S_AXI_HP0_WSTRB,
- S_AXI_HP1_ARESETN,
- S_AXI_HP1_ARREADY,
- S_AXI_HP1_AWREADY,
- S_AXI_HP1_BVALID,
- S_AXI_HP1_RLAST,
- S_AXI_HP1_RVALID,
- S_AXI_HP1_WREADY,
- S_AXI_HP1_BRESP,
- S_AXI_HP1_RRESP,
- S_AXI_HP1_BID,
- S_AXI_HP1_RID,
- S_AXI_HP1_RDATA,
- S_AXI_HP1_RCOUNT,
- S_AXI_HP1_WCOUNT,
- S_AXI_HP1_RACOUNT,
- S_AXI_HP1_WACOUNT,
- S_AXI_HP1_ACLK,
- S_AXI_HP1_ARVALID,
- S_AXI_HP1_AWVALID,
- S_AXI_HP1_BREADY,
- S_AXI_HP1_RDISSUECAP1_EN,
- S_AXI_HP1_RREADY,
- S_AXI_HP1_WLAST,
- S_AXI_HP1_WRISSUECAP1_EN,
- S_AXI_HP1_WVALID,
- S_AXI_HP1_ARBURST,
- S_AXI_HP1_ARLOCK,
- S_AXI_HP1_ARSIZE,
- S_AXI_HP1_AWBURST,
- S_AXI_HP1_AWLOCK,
- S_AXI_HP1_AWSIZE,
- S_AXI_HP1_ARPROT,
- S_AXI_HP1_AWPROT,
- S_AXI_HP1_ARADDR,
- S_AXI_HP1_AWADDR,
- S_AXI_HP1_ARCACHE,
- S_AXI_HP1_ARLEN,
- S_AXI_HP1_ARQOS,
- S_AXI_HP1_AWCACHE,
- S_AXI_HP1_AWLEN,
- S_AXI_HP1_AWQOS,
- S_AXI_HP1_ARID,
- S_AXI_HP1_AWID,
- S_AXI_HP1_WID,
- S_AXI_HP1_WDATA,
- S_AXI_HP1_WSTRB,
- S_AXI_HP2_ARESETN,
- S_AXI_HP2_ARREADY,
- S_AXI_HP2_AWREADY,
- S_AXI_HP2_BVALID,
- S_AXI_HP2_RLAST,
- S_AXI_HP2_RVALID,
- S_AXI_HP2_WREADY,
- S_AXI_HP2_BRESP,
- S_AXI_HP2_RRESP,
- S_AXI_HP2_BID,
- S_AXI_HP2_RID,
- S_AXI_HP2_RDATA,
- S_AXI_HP2_RCOUNT,
- S_AXI_HP2_WCOUNT,
- S_AXI_HP2_RACOUNT,
- S_AXI_HP2_WACOUNT,
- S_AXI_HP2_ACLK,
- S_AXI_HP2_ARVALID,
- S_AXI_HP2_AWVALID,
- S_AXI_HP2_BREADY,
- S_AXI_HP2_RDISSUECAP1_EN,
- S_AXI_HP2_RREADY,
- S_AXI_HP2_WLAST,
- S_AXI_HP2_WRISSUECAP1_EN,
- S_AXI_HP2_WVALID,
- S_AXI_HP2_ARBURST,
- S_AXI_HP2_ARLOCK,
- S_AXI_HP2_ARSIZE,
- S_AXI_HP2_AWBURST,
- S_AXI_HP2_AWLOCK,
- S_AXI_HP2_AWSIZE,
- S_AXI_HP2_ARPROT,
- S_AXI_HP2_AWPROT,
- S_AXI_HP2_ARADDR,
- S_AXI_HP2_AWADDR,
- S_AXI_HP2_ARCACHE,
- S_AXI_HP2_ARLEN,
- S_AXI_HP2_ARQOS,
- S_AXI_HP2_AWCACHE,
- S_AXI_HP2_AWLEN,
- S_AXI_HP2_AWQOS,
- S_AXI_HP2_ARID,
- S_AXI_HP2_AWID,
- S_AXI_HP2_WID,
- S_AXI_HP2_WDATA,
- S_AXI_HP2_WSTRB,
- S_AXI_HP3_ARESETN,
- S_AXI_HP3_ARREADY,
- S_AXI_HP3_AWREADY,
- S_AXI_HP3_BVALID,
- S_AXI_HP3_RLAST,
- S_AXI_HP3_RVALID,
- S_AXI_HP3_WREADY,
- S_AXI_HP3_BRESP,
- S_AXI_HP3_RRESP,
- S_AXI_HP3_BID,
- S_AXI_HP3_RID,
- S_AXI_HP3_RDATA,
- S_AXI_HP3_RCOUNT,
- S_AXI_HP3_WCOUNT,
- S_AXI_HP3_RACOUNT,
- S_AXI_HP3_WACOUNT,
- S_AXI_HP3_ACLK,
- S_AXI_HP3_ARVALID,
- S_AXI_HP3_AWVALID,
- S_AXI_HP3_BREADY,
- S_AXI_HP3_RDISSUECAP1_EN,
- S_AXI_HP3_RREADY,
- S_AXI_HP3_WLAST,
- S_AXI_HP3_WRISSUECAP1_EN,
- S_AXI_HP3_WVALID,
- S_AXI_HP3_ARBURST,
- S_AXI_HP3_ARLOCK,
- S_AXI_HP3_ARSIZE,
- S_AXI_HP3_AWBURST,
- S_AXI_HP3_AWLOCK,
- S_AXI_HP3_AWSIZE,
- S_AXI_HP3_ARPROT,
- S_AXI_HP3_AWPROT,
- S_AXI_HP3_ARADDR,
- S_AXI_HP3_AWADDR,
- S_AXI_HP3_ARCACHE,
- S_AXI_HP3_ARLEN,
- S_AXI_HP3_ARQOS,
- S_AXI_HP3_AWCACHE,
- S_AXI_HP3_AWLEN,
- S_AXI_HP3_AWQOS,
- S_AXI_HP3_ARID,
- S_AXI_HP3_AWID,
- S_AXI_HP3_WID,
- S_AXI_HP3_WDATA,
- S_AXI_HP3_WSTRB,
- IRQ_P2F_DMAC_ABORT,
- IRQ_P2F_DMAC0,
- IRQ_P2F_DMAC1,
- IRQ_P2F_DMAC2,
- IRQ_P2F_DMAC3,
- IRQ_P2F_DMAC4,
- IRQ_P2F_DMAC5,
- IRQ_P2F_DMAC6,
- IRQ_P2F_DMAC7,
- IRQ_P2F_SMC,
- IRQ_P2F_QSPI,
- IRQ_P2F_CTI,
- IRQ_P2F_GPIO,
- IRQ_P2F_USB0,
- IRQ_P2F_ENET0,
- IRQ_P2F_ENET_WAKE0,
- IRQ_P2F_SDIO0,
- IRQ_P2F_I2C0,
- IRQ_P2F_SPI0,
- IRQ_P2F_UART0,
- IRQ_P2F_CAN0,
- IRQ_P2F_USB1,
- IRQ_P2F_ENET1,
- IRQ_P2F_ENET_WAKE1,
- IRQ_P2F_SDIO1,
- IRQ_P2F_I2C1,
- IRQ_P2F_SPI1,
- IRQ_P2F_UART1,
- IRQ_P2F_CAN1,
- IRQ_F2P,
- Core0_nFIQ,
- Core0_nIRQ,
- Core1_nFIQ,
- Core1_nIRQ,
- DMA0_DATYPE,
- DMA0_DAVALID,
- DMA0_DRREADY,
- DMA0_RSTN,
- DMA1_DATYPE,
- DMA1_DAVALID,
- DMA1_DRREADY,
- DMA1_RSTN,
- DMA2_DATYPE,
- DMA2_DAVALID,
- DMA2_DRREADY,
- DMA2_RSTN,
- DMA3_DATYPE,
- DMA3_DAVALID,
- DMA3_DRREADY,
- DMA3_RSTN,
- DMA0_ACLK,
- DMA0_DAREADY,
- DMA0_DRLAST,
- DMA0_DRVALID,
- DMA1_ACLK,
- DMA1_DAREADY,
- DMA1_DRLAST,
- DMA1_DRVALID,
- DMA2_ACLK,
- DMA2_DAREADY,
- DMA2_DRLAST,
- DMA2_DRVALID,
- DMA3_ACLK,
- DMA3_DAREADY,
- DMA3_DRLAST,
- DMA3_DRVALID,
- DMA0_DRTYPE,
- DMA1_DRTYPE,
- DMA2_DRTYPE,
- DMA3_DRTYPE,
- FCLK_CLK3,
- FCLK_CLK2,
- FCLK_CLK1,
- FCLK_CLK0,
- FCLK_CLKTRIG3_N,
- FCLK_CLKTRIG2_N,
- FCLK_CLKTRIG1_N,
- FCLK_CLKTRIG0_N,
- FCLK_RESET3_N,
- FCLK_RESET2_N,
- FCLK_RESET1_N,
- FCLK_RESET0_N,
- FTMD_TRACEIN_DATA,
- FTMD_TRACEIN_VALID,
- FTMD_TRACEIN_CLK,
- FTMD_TRACEIN_ATID,
- FTMT_F2P_TRIG_0,
- FTMT_F2P_TRIGACK_0,
- FTMT_F2P_TRIG_1,
- FTMT_F2P_TRIGACK_1,
- FTMT_F2P_TRIG_2,
- FTMT_F2P_TRIGACK_2,
- FTMT_F2P_TRIG_3,
- FTMT_F2P_TRIGACK_3,
- FTMT_F2P_DEBUG,
- FTMT_P2F_TRIGACK_0,
- FTMT_P2F_TRIG_0,
- FTMT_P2F_TRIGACK_1,
- FTMT_P2F_TRIG_1,
- FTMT_P2F_TRIGACK_2,
- FTMT_P2F_TRIG_2,
- FTMT_P2F_TRIGACK_3,
- FTMT_P2F_TRIG_3,
- FTMT_P2F_DEBUG,
- FPGA_IDLE_N,
- EVENT_EVENTO,
- EVENT_STANDBYWFE,
- EVENT_STANDBYWFI,
- EVENT_EVENTI,
- DDR_ARB,
- MIO,
- DDR_CAS_n,
- DDR_CKE,
- DDR_Clk_n,
- DDR_Clk,
- DDR_CS_n,
- DDR_DRSTB,
- DDR_ODT,
- DDR_RAS_n,
- DDR_WEB,
- DDR_BankAddr,
- DDR_Addr,
- DDR_VRN,
- DDR_VRP,
- DDR_DM,
- DDR_DQ,
- DDR_DQS_n,
- DDR_DQS,
- PS_SRSTB,
- PS_CLK,
- PS_PORB);
- output CAN0_PHY_TX;
- input CAN0_PHY_RX;
- output CAN1_PHY_TX;
- input CAN1_PHY_RX;
- output ENET0_GMII_TX_EN;
- output ENET0_GMII_TX_ER;
- output ENET0_MDIO_MDC;
- output ENET0_MDIO_O;
- output ENET0_MDIO_T;
- output ENET0_PTP_DELAY_REQ_RX;
- output ENET0_PTP_DELAY_REQ_TX;
- output ENET0_PTP_PDELAY_REQ_RX;
- output ENET0_PTP_PDELAY_REQ_TX;
- output ENET0_PTP_PDELAY_RESP_RX;
- output ENET0_PTP_PDELAY_RESP_TX;
- output ENET0_PTP_SYNC_FRAME_RX;
- output ENET0_PTP_SYNC_FRAME_TX;
- output ENET0_SOF_RX;
- output ENET0_SOF_TX;
- output [7:0]ENET0_GMII_TXD;
- input ENET0_GMII_COL;
- input ENET0_GMII_CRS;
- input ENET0_GMII_RX_CLK;
- input ENET0_GMII_RX_DV;
- input ENET0_GMII_RX_ER;
- input ENET0_GMII_TX_CLK;
- input ENET0_MDIO_I;
- input ENET0_EXT_INTIN;
- input [7:0]ENET0_GMII_RXD;
- output ENET1_GMII_TX_EN;
- output ENET1_GMII_TX_ER;
- output ENET1_MDIO_MDC;
- output ENET1_MDIO_O;
- output ENET1_MDIO_T;
- output ENET1_PTP_DELAY_REQ_RX;
- output ENET1_PTP_DELAY_REQ_TX;
- output ENET1_PTP_PDELAY_REQ_RX;
- output ENET1_PTP_PDELAY_REQ_TX;
- output ENET1_PTP_PDELAY_RESP_RX;
- output ENET1_PTP_PDELAY_RESP_TX;
- output ENET1_PTP_SYNC_FRAME_RX;
- output ENET1_PTP_SYNC_FRAME_TX;
- output ENET1_SOF_RX;
- output ENET1_SOF_TX;
- output [7:0]ENET1_GMII_TXD;
- input ENET1_GMII_COL;
- input ENET1_GMII_CRS;
- input ENET1_GMII_RX_CLK;
- input ENET1_GMII_RX_DV;
- input ENET1_GMII_RX_ER;
- input ENET1_GMII_TX_CLK;
- input ENET1_MDIO_I;
- input ENET1_EXT_INTIN;
- input [7:0]ENET1_GMII_RXD;
- input [63:0]GPIO_I;
- output [63:0]GPIO_O;
- output [63:0]GPIO_T;
- input I2C0_SDA_I;
- output I2C0_SDA_O;
- output I2C0_SDA_T;
- input I2C0_SCL_I;
- output I2C0_SCL_O;
- output I2C0_SCL_T;
- input I2C1_SDA_I;
- output I2C1_SDA_O;
- output I2C1_SDA_T;
- input I2C1_SCL_I;
- output I2C1_SCL_O;
- output I2C1_SCL_T;
- input PJTAG_TCK;
- input PJTAG_TMS;
- input PJTAG_TDI;
- output PJTAG_TDO;
- output SDIO0_CLK;
- input SDIO0_CLK_FB;
- output SDIO0_CMD_O;
- input SDIO0_CMD_I;
- output SDIO0_CMD_T;
- input [3:0]SDIO0_DATA_I;
- output [3:0]SDIO0_DATA_O;
- output [3:0]SDIO0_DATA_T;
- output SDIO0_LED;
- input SDIO0_CDN;
- input SDIO0_WP;
- output SDIO0_BUSPOW;
- output [2:0]SDIO0_BUSVOLT;
- output SDIO1_CLK;
- input SDIO1_CLK_FB;
- output SDIO1_CMD_O;
- input SDIO1_CMD_I;
- output SDIO1_CMD_T;
- input [3:0]SDIO1_DATA_I;
- output [3:0]SDIO1_DATA_O;
- output [3:0]SDIO1_DATA_T;
- output SDIO1_LED;
- input SDIO1_CDN;
- input SDIO1_WP;
- output SDIO1_BUSPOW;
- output [2:0]SDIO1_BUSVOLT;
- input SPI0_SCLK_I;
- output SPI0_SCLK_O;
- output SPI0_SCLK_T;
- input SPI0_MOSI_I;
- output SPI0_MOSI_O;
- output SPI0_MOSI_T;
- input SPI0_MISO_I;
- output SPI0_MISO_O;
- output SPI0_MISO_T;
- input SPI0_SS_I;
- output SPI0_SS_O;
- output SPI0_SS1_O;
- output SPI0_SS2_O;
- output SPI0_SS_T;
- input SPI1_SCLK_I;
- output SPI1_SCLK_O;
- output SPI1_SCLK_T;
- input SPI1_MOSI_I;
- output SPI1_MOSI_O;
- output SPI1_MOSI_T;
- input SPI1_MISO_I;
- output SPI1_MISO_O;
- output SPI1_MISO_T;
- input SPI1_SS_I;
- output SPI1_SS_O;
- output SPI1_SS1_O;
- output SPI1_SS2_O;
- output SPI1_SS_T;
- output UART0_DTRN;
- output UART0_RTSN;
- output UART0_TX;
- input UART0_CTSN;
- input UART0_DCDN;
- input UART0_DSRN;
- input UART0_RIN;
- input UART0_RX;
- output UART1_DTRN;
- output UART1_RTSN;
- output UART1_TX;
- input UART1_CTSN;
- input UART1_DCDN;
- input UART1_DSRN;
- input UART1_RIN;
- input UART1_RX;
- output TTC0_WAVE0_OUT;
- output TTC0_WAVE1_OUT;
- output TTC0_WAVE2_OUT;
- input TTC0_CLK0_IN;
- input TTC0_CLK1_IN;
- input TTC0_CLK2_IN;
- output TTC1_WAVE0_OUT;
- output TTC1_WAVE1_OUT;
- output TTC1_WAVE2_OUT;
- input TTC1_CLK0_IN;
- input TTC1_CLK1_IN;
- input TTC1_CLK2_IN;
- input WDT_CLK_IN;
- output WDT_RST_OUT;
- input TRACE_CLK;
- output TRACE_CTL;
- output [1:0]TRACE_DATA;
- output TRACE_CLK_OUT;
- output [1:0]USB0_PORT_INDCTL;
- output USB0_VBUS_PWRSELECT;
- input USB0_VBUS_PWRFAULT;
- output [1:0]USB1_PORT_INDCTL;
- output USB1_VBUS_PWRSELECT;
- input USB1_VBUS_PWRFAULT;
- input SRAM_INTIN;
- output M_AXI_GP0_ARESETN;
- output M_AXI_GP0_ARVALID;
- output M_AXI_GP0_AWVALID;
- output M_AXI_GP0_BREADY;
- output M_AXI_GP0_RREADY;
- output M_AXI_GP0_WLAST;
- output M_AXI_GP0_WVALID;
- output [11:0]M_AXI_GP0_ARID;
- output [11:0]M_AXI_GP0_AWID;
- output [11:0]M_AXI_GP0_WID;
- output [1:0]M_AXI_GP0_ARBURST;
- output [1:0]M_AXI_GP0_ARLOCK;
- output [2:0]M_AXI_GP0_ARSIZE;
- output [1:0]M_AXI_GP0_AWBURST;
- output [1:0]M_AXI_GP0_AWLOCK;
- output [2:0]M_AXI_GP0_AWSIZE;
- output [2:0]M_AXI_GP0_ARPROT;
- output [2:0]M_AXI_GP0_AWPROT;
- output [31:0]M_AXI_GP0_ARADDR;
- output [31:0]M_AXI_GP0_AWADDR;
- output [31:0]M_AXI_GP0_WDATA;
- output [3:0]M_AXI_GP0_ARCACHE;
- output [3:0]M_AXI_GP0_ARLEN;
- output [3:0]M_AXI_GP0_ARQOS;
- output [3:0]M_AXI_GP0_AWCACHE;
- output [3:0]M_AXI_GP0_AWLEN;
- output [3:0]M_AXI_GP0_AWQOS;
- output [3:0]M_AXI_GP0_WSTRB;
- input M_AXI_GP0_ACLK;
- input M_AXI_GP0_ARREADY;
- input M_AXI_GP0_AWREADY;
- input M_AXI_GP0_BVALID;
- input M_AXI_GP0_RLAST;
- input M_AXI_GP0_RVALID;
- input M_AXI_GP0_WREADY;
- input [11:0]M_AXI_GP0_BID;
- input [11:0]M_AXI_GP0_RID;
- input [1:0]M_AXI_GP0_BRESP;
- input [1:0]M_AXI_GP0_RRESP;
- input [31:0]M_AXI_GP0_RDATA;
- output M_AXI_GP1_ARESETN;
- output M_AXI_GP1_ARVALID;
- output M_AXI_GP1_AWVALID;
- output M_AXI_GP1_BREADY;
- output M_AXI_GP1_RREADY;
- output M_AXI_GP1_WLAST;
- output M_AXI_GP1_WVALID;
- output [11:0]M_AXI_GP1_ARID;
- output [11:0]M_AXI_GP1_AWID;
- output [11:0]M_AXI_GP1_WID;
- output [1:0]M_AXI_GP1_ARBURST;
- output [1:0]M_AXI_GP1_ARLOCK;
- output [2:0]M_AXI_GP1_ARSIZE;
- output [1:0]M_AXI_GP1_AWBURST;
- output [1:0]M_AXI_GP1_AWLOCK;
- output [2:0]M_AXI_GP1_AWSIZE;
- output [2:0]M_AXI_GP1_ARPROT;
- output [2:0]M_AXI_GP1_AWPROT;
- output [31:0]M_AXI_GP1_ARADDR;
- output [31:0]M_AXI_GP1_AWADDR;
- output [31:0]M_AXI_GP1_WDATA;
- output [3:0]M_AXI_GP1_ARCACHE;
- output [3:0]M_AXI_GP1_ARLEN;
- output [3:0]M_AXI_GP1_ARQOS;
- output [3:0]M_AXI_GP1_AWCACHE;
- output [3:0]M_AXI_GP1_AWLEN;
- output [3:0]M_AXI_GP1_AWQOS;
- output [3:0]M_AXI_GP1_WSTRB;
- input M_AXI_GP1_ACLK;
- input M_AXI_GP1_ARREADY;
- input M_AXI_GP1_AWREADY;
- input M_AXI_GP1_BVALID;
- input M_AXI_GP1_RLAST;
- input M_AXI_GP1_RVALID;
- input M_AXI_GP1_WREADY;
- input [11:0]M_AXI_GP1_BID;
- input [11:0]M_AXI_GP1_RID;
- input [1:0]M_AXI_GP1_BRESP;
- input [1:0]M_AXI_GP1_RRESP;
- input [31:0]M_AXI_GP1_RDATA;
- output S_AXI_GP0_ARESETN;
- output S_AXI_GP0_ARREADY;
- output S_AXI_GP0_AWREADY;
- output S_AXI_GP0_BVALID;
- output S_AXI_GP0_RLAST;
- output S_AXI_GP0_RVALID;
- output S_AXI_GP0_WREADY;
- output [1:0]S_AXI_GP0_BRESP;
- output [1:0]S_AXI_GP0_RRESP;
- output [31:0]S_AXI_GP0_RDATA;
- output [5:0]S_AXI_GP0_BID;
- output [5:0]S_AXI_GP0_RID;
- input S_AXI_GP0_ACLK;
- input S_AXI_GP0_ARVALID;
- input S_AXI_GP0_AWVALID;
- input S_AXI_GP0_BREADY;
- input S_AXI_GP0_RREADY;
- input S_AXI_GP0_WLAST;
- input S_AXI_GP0_WVALID;
- input [1:0]S_AXI_GP0_ARBURST;
- input [1:0]S_AXI_GP0_ARLOCK;
- input [2:0]S_AXI_GP0_ARSIZE;
- input [1:0]S_AXI_GP0_AWBURST;
- input [1:0]S_AXI_GP0_AWLOCK;
- input [2:0]S_AXI_GP0_AWSIZE;
- input [2:0]S_AXI_GP0_ARPROT;
- input [2:0]S_AXI_GP0_AWPROT;
- input [31:0]S_AXI_GP0_ARADDR;
- input [31:0]S_AXI_GP0_AWADDR;
- input [31:0]S_AXI_GP0_WDATA;
- input [3:0]S_AXI_GP0_ARCACHE;
- input [3:0]S_AXI_GP0_ARLEN;
- input [3:0]S_AXI_GP0_ARQOS;
- input [3:0]S_AXI_GP0_AWCACHE;
- input [3:0]S_AXI_GP0_AWLEN;
- input [3:0]S_AXI_GP0_AWQOS;
- input [3:0]S_AXI_GP0_WSTRB;
- input [5:0]S_AXI_GP0_ARID;
- input [5:0]S_AXI_GP0_AWID;
- input [5:0]S_AXI_GP0_WID;
- output S_AXI_GP1_ARESETN;
- output S_AXI_GP1_ARREADY;
- output S_AXI_GP1_AWREADY;
- output S_AXI_GP1_BVALID;
- output S_AXI_GP1_RLAST;
- output S_AXI_GP1_RVALID;
- output S_AXI_GP1_WREADY;
- output [1:0]S_AXI_GP1_BRESP;
- output [1:0]S_AXI_GP1_RRESP;
- output [31:0]S_AXI_GP1_RDATA;
- output [5:0]S_AXI_GP1_BID;
- output [5:0]S_AXI_GP1_RID;
- input S_AXI_GP1_ACLK;
- input S_AXI_GP1_ARVALID;
- input S_AXI_GP1_AWVALID;
- input S_AXI_GP1_BREADY;
- input S_AXI_GP1_RREADY;
- input S_AXI_GP1_WLAST;
- input S_AXI_GP1_WVALID;
- input [1:0]S_AXI_GP1_ARBURST;
- input [1:0]S_AXI_GP1_ARLOCK;
- input [2:0]S_AXI_GP1_ARSIZE;
- input [1:0]S_AXI_GP1_AWBURST;
- input [1:0]S_AXI_GP1_AWLOCK;
- input [2:0]S_AXI_GP1_AWSIZE;
- input [2:0]S_AXI_GP1_ARPROT;
- input [2:0]S_AXI_GP1_AWPROT;
- input [31:0]S_AXI_GP1_ARADDR;
- input [31:0]S_AXI_GP1_AWADDR;
- input [31:0]S_AXI_GP1_WDATA;
- input [3:0]S_AXI_GP1_ARCACHE;
- input [3:0]S_AXI_GP1_ARLEN;
- input [3:0]S_AXI_GP1_ARQOS;
- input [3:0]S_AXI_GP1_AWCACHE;
- input [3:0]S_AXI_GP1_AWLEN;
- input [3:0]S_AXI_GP1_AWQOS;
- input [3:0]S_AXI_GP1_WSTRB;
- input [5:0]S_AXI_GP1_ARID;
- input [5:0]S_AXI_GP1_AWID;
- input [5:0]S_AXI_GP1_WID;
- output S_AXI_ACP_ARESETN;
- output S_AXI_ACP_ARREADY;
- output S_AXI_ACP_AWREADY;
- output S_AXI_ACP_BVALID;
- output S_AXI_ACP_RLAST;
- output S_AXI_ACP_RVALID;
- output S_AXI_ACP_WREADY;
- output [1:0]S_AXI_ACP_BRESP;
- output [1:0]S_AXI_ACP_RRESP;
- output [2:0]S_AXI_ACP_BID;
- output [2:0]S_AXI_ACP_RID;
- output [63:0]S_AXI_ACP_RDATA;
- input S_AXI_ACP_ACLK;
- input S_AXI_ACP_ARVALID;
- input S_AXI_ACP_AWVALID;
- input S_AXI_ACP_BREADY;
- input S_AXI_ACP_RREADY;
- input S_AXI_ACP_WLAST;
- input S_AXI_ACP_WVALID;
- input [2:0]S_AXI_ACP_ARID;
- input [2:0]S_AXI_ACP_ARPROT;
- input [2:0]S_AXI_ACP_AWID;
- input [2:0]S_AXI_ACP_AWPROT;
- input [2:0]S_AXI_ACP_WID;
- input [31:0]S_AXI_ACP_ARADDR;
- input [31:0]S_AXI_ACP_AWADDR;
- input [3:0]S_AXI_ACP_ARCACHE;
- input [3:0]S_AXI_ACP_ARLEN;
- input [3:0]S_AXI_ACP_ARQOS;
- input [3:0]S_AXI_ACP_AWCACHE;
- input [3:0]S_AXI_ACP_AWLEN;
- input [3:0]S_AXI_ACP_AWQOS;
- input [1:0]S_AXI_ACP_ARBURST;
- input [1:0]S_AXI_ACP_ARLOCK;
- input [2:0]S_AXI_ACP_ARSIZE;
- input [1:0]S_AXI_ACP_AWBURST;
- input [1:0]S_AXI_ACP_AWLOCK;
- input [2:0]S_AXI_ACP_AWSIZE;
- input [4:0]S_AXI_ACP_ARUSER;
- input [4:0]S_AXI_ACP_AWUSER;
- input [63:0]S_AXI_ACP_WDATA;
- input [7:0]S_AXI_ACP_WSTRB;
- output S_AXI_HP0_ARESETN;
- output S_AXI_HP0_ARREADY;
- output S_AXI_HP0_AWREADY;
- output S_AXI_HP0_BVALID;
- output S_AXI_HP0_RLAST;
- output S_AXI_HP0_RVALID;
- output S_AXI_HP0_WREADY;
- output [1:0]S_AXI_HP0_BRESP;
- output [1:0]S_AXI_HP0_RRESP;
- output [5:0]S_AXI_HP0_BID;
- output [5:0]S_AXI_HP0_RID;
- output [63:0]S_AXI_HP0_RDATA;
- output [7:0]S_AXI_HP0_RCOUNT;
- output [7:0]S_AXI_HP0_WCOUNT;
- output [2:0]S_AXI_HP0_RACOUNT;
- output [5:0]S_AXI_HP0_WACOUNT;
- input S_AXI_HP0_ACLK;
- input S_AXI_HP0_ARVALID;
- input S_AXI_HP0_AWVALID;
- input S_AXI_HP0_BREADY;
- input S_AXI_HP0_RDISSUECAP1_EN;
- input S_AXI_HP0_RREADY;
- input S_AXI_HP0_WLAST;
- input S_AXI_HP0_WRISSUECAP1_EN;
- input S_AXI_HP0_WVALID;
- input [1:0]S_AXI_HP0_ARBURST;
- input [1:0]S_AXI_HP0_ARLOCK;
- input [2:0]S_AXI_HP0_ARSIZE;
- input [1:0]S_AXI_HP0_AWBURST;
- input [1:0]S_AXI_HP0_AWLOCK;
- input [2:0]S_AXI_HP0_AWSIZE;
- input [2:0]S_AXI_HP0_ARPROT;
- input [2:0]S_AXI_HP0_AWPROT;
- input [31:0]S_AXI_HP0_ARADDR;
- input [31:0]S_AXI_HP0_AWADDR;
- input [3:0]S_AXI_HP0_ARCACHE;
- input [3:0]S_AXI_HP0_ARLEN;
- input [3:0]S_AXI_HP0_ARQOS;
- input [3:0]S_AXI_HP0_AWCACHE;
- input [3:0]S_AXI_HP0_AWLEN;
- input [3:0]S_AXI_HP0_AWQOS;
- input [5:0]S_AXI_HP0_ARID;
- input [5:0]S_AXI_HP0_AWID;
- input [5:0]S_AXI_HP0_WID;
- input [63:0]S_AXI_HP0_WDATA;
- input [7:0]S_AXI_HP0_WSTRB;
- output S_AXI_HP1_ARESETN;
- output S_AXI_HP1_ARREADY;
- output S_AXI_HP1_AWREADY;
- output S_AXI_HP1_BVALID;
- output S_AXI_HP1_RLAST;
- output S_AXI_HP1_RVALID;
- output S_AXI_HP1_WREADY;
- output [1:0]S_AXI_HP1_BRESP;
- output [1:0]S_AXI_HP1_RRESP;
- output [5:0]S_AXI_HP1_BID;
- output [5:0]S_AXI_HP1_RID;
- output [63:0]S_AXI_HP1_RDATA;
- output [7:0]S_AXI_HP1_RCOUNT;
- output [7:0]S_AXI_HP1_WCOUNT;
- output [2:0]S_AXI_HP1_RACOUNT;
- output [5:0]S_AXI_HP1_WACOUNT;
- input S_AXI_HP1_ACLK;
- input S_AXI_HP1_ARVALID;
- input S_AXI_HP1_AWVALID;
- input S_AXI_HP1_BREADY;
- input S_AXI_HP1_RDISSUECAP1_EN;
- input S_AXI_HP1_RREADY;
- input S_AXI_HP1_WLAST;
- input S_AXI_HP1_WRISSUECAP1_EN;
- input S_AXI_HP1_WVALID;
- input [1:0]S_AXI_HP1_ARBURST;
- input [1:0]S_AXI_HP1_ARLOCK;
- input [2:0]S_AXI_HP1_ARSIZE;
- input [1:0]S_AXI_HP1_AWBURST;
- input [1:0]S_AXI_HP1_AWLOCK;
- input [2:0]S_AXI_HP1_AWSIZE;
- input [2:0]S_AXI_HP1_ARPROT;
- input [2:0]S_AXI_HP1_AWPROT;
- input [31:0]S_AXI_HP1_ARADDR;
- input [31:0]S_AXI_HP1_AWADDR;
- input [3:0]S_AXI_HP1_ARCACHE;
- input [3:0]S_AXI_HP1_ARLEN;
- input [3:0]S_AXI_HP1_ARQOS;
- input [3:0]S_AXI_HP1_AWCACHE;
- input [3:0]S_AXI_HP1_AWLEN;
- input [3:0]S_AXI_HP1_AWQOS;
- input [5:0]S_AXI_HP1_ARID;
- input [5:0]S_AXI_HP1_AWID;
- input [5:0]S_AXI_HP1_WID;
- input [63:0]S_AXI_HP1_WDATA;
- input [7:0]S_AXI_HP1_WSTRB;
- output S_AXI_HP2_ARESETN;
- output S_AXI_HP2_ARREADY;
- output S_AXI_HP2_AWREADY;
- output S_AXI_HP2_BVALID;
- output S_AXI_HP2_RLAST;
- output S_AXI_HP2_RVALID;
- output S_AXI_HP2_WREADY;
- output [1:0]S_AXI_HP2_BRESP;
- output [1:0]S_AXI_HP2_RRESP;
- output [5:0]S_AXI_HP2_BID;
- output [5:0]S_AXI_HP2_RID;
- output [63:0]S_AXI_HP2_RDATA;
- output [7:0]S_AXI_HP2_RCOUNT;
- output [7:0]S_AXI_HP2_WCOUNT;
- output [2:0]S_AXI_HP2_RACOUNT;
- output [5:0]S_AXI_HP2_WACOUNT;
- input S_AXI_HP2_ACLK;
- input S_AXI_HP2_ARVALID;
- input S_AXI_HP2_AWVALID;
- input S_AXI_HP2_BREADY;
- input S_AXI_HP2_RDISSUECAP1_EN;
- input S_AXI_HP2_RREADY;
- input S_AXI_HP2_WLAST;
- input S_AXI_HP2_WRISSUECAP1_EN;
- input S_AXI_HP2_WVALID;
- input [1:0]S_AXI_HP2_ARBURST;
- input [1:0]S_AXI_HP2_ARLOCK;
- input [2:0]S_AXI_HP2_ARSIZE;
- input [1:0]S_AXI_HP2_AWBURST;
- input [1:0]S_AXI_HP2_AWLOCK;
- input [2:0]S_AXI_HP2_AWSIZE;
- input [2:0]S_AXI_HP2_ARPROT;
- input [2:0]S_AXI_HP2_AWPROT;
- input [31:0]S_AXI_HP2_ARADDR;
- input [31:0]S_AXI_HP2_AWADDR;
- input [3:0]S_AXI_HP2_ARCACHE;
- input [3:0]S_AXI_HP2_ARLEN;
- input [3:0]S_AXI_HP2_ARQOS;
- input [3:0]S_AXI_HP2_AWCACHE;
- input [3:0]S_AXI_HP2_AWLEN;
- input [3:0]S_AXI_HP2_AWQOS;
- input [5:0]S_AXI_HP2_ARID;
- input [5:0]S_AXI_HP2_AWID;
- input [5:0]S_AXI_HP2_WID;
- input [63:0]S_AXI_HP2_WDATA;
- input [7:0]S_AXI_HP2_WSTRB;
- output S_AXI_HP3_ARESETN;
- output S_AXI_HP3_ARREADY;
- output S_AXI_HP3_AWREADY;
- output S_AXI_HP3_BVALID;
- output S_AXI_HP3_RLAST;
- output S_AXI_HP3_RVALID;
- output S_AXI_HP3_WREADY;
- output [1:0]S_AXI_HP3_BRESP;
- output [1:0]S_AXI_HP3_RRESP;
- output [5:0]S_AXI_HP3_BID;
- output [5:0]S_AXI_HP3_RID;
- output [63:0]S_AXI_HP3_RDATA;
- output [7:0]S_AXI_HP3_RCOUNT;
- output [7:0]S_AXI_HP3_WCOUNT;
- output [2:0]S_AXI_HP3_RACOUNT;
- output [5:0]S_AXI_HP3_WACOUNT;
- input S_AXI_HP3_ACLK;
- input S_AXI_HP3_ARVALID;
- input S_AXI_HP3_AWVALID;
- input S_AXI_HP3_BREADY;
- input S_AXI_HP3_RDISSUECAP1_EN;
- input S_AXI_HP3_RREADY;
- input S_AXI_HP3_WLAST;
- input S_AXI_HP3_WRISSUECAP1_EN;
- input S_AXI_HP3_WVALID;
- input [1:0]S_AXI_HP3_ARBURST;
- input [1:0]S_AXI_HP3_ARLOCK;
- input [2:0]S_AXI_HP3_ARSIZE;
- input [1:0]S_AXI_HP3_AWBURST;
- input [1:0]S_AXI_HP3_AWLOCK;
- input [2:0]S_AXI_HP3_AWSIZE;
- input [2:0]S_AXI_HP3_ARPROT;
- input [2:0]S_AXI_HP3_AWPROT;
- input [31:0]S_AXI_HP3_ARADDR;
- input [31:0]S_AXI_HP3_AWADDR;
- input [3:0]S_AXI_HP3_ARCACHE;
- input [3:0]S_AXI_HP3_ARLEN;
- input [3:0]S_AXI_HP3_ARQOS;
- input [3:0]S_AXI_HP3_AWCACHE;
- input [3:0]S_AXI_HP3_AWLEN;
- input [3:0]S_AXI_HP3_AWQOS;
- input [5:0]S_AXI_HP3_ARID;
- input [5:0]S_AXI_HP3_AWID;
- input [5:0]S_AXI_HP3_WID;
- input [63:0]S_AXI_HP3_WDATA;
- input [7:0]S_AXI_HP3_WSTRB;
- output IRQ_P2F_DMAC_ABORT;
- output IRQ_P2F_DMAC0;
- output IRQ_P2F_DMAC1;
- output IRQ_P2F_DMAC2;
- output IRQ_P2F_DMAC3;
- output IRQ_P2F_DMAC4;
- output IRQ_P2F_DMAC5;
- output IRQ_P2F_DMAC6;
- output IRQ_P2F_DMAC7;
- output IRQ_P2F_SMC;
- output IRQ_P2F_QSPI;
- output IRQ_P2F_CTI;
- output IRQ_P2F_GPIO;
- output IRQ_P2F_USB0;
- output IRQ_P2F_ENET0;
- output IRQ_P2F_ENET_WAKE0;
- output IRQ_P2F_SDIO0;
- output IRQ_P2F_I2C0;
- output IRQ_P2F_SPI0;
- output IRQ_P2F_UART0;
- output IRQ_P2F_CAN0;
- output IRQ_P2F_USB1;
- output IRQ_P2F_ENET1;
- output IRQ_P2F_ENET_WAKE1;
- output IRQ_P2F_SDIO1;
- output IRQ_P2F_I2C1;
- output IRQ_P2F_SPI1;
- output IRQ_P2F_UART1;
- output IRQ_P2F_CAN1;
- input [0:0]IRQ_F2P;
- input Core0_nFIQ;
- input Core0_nIRQ;
- input Core1_nFIQ;
- input Core1_nIRQ;
- output [1:0]DMA0_DATYPE;
- output DMA0_DAVALID;
- output DMA0_DRREADY;
- output DMA0_RSTN;
- output [1:0]DMA1_DATYPE;
- output DMA1_DAVALID;
- output DMA1_DRREADY;
- output DMA1_RSTN;
- output [1:0]DMA2_DATYPE;
- output DMA2_DAVALID;
- output DMA2_DRREADY;
- output DMA2_RSTN;
- output [1:0]DMA3_DATYPE;
- output DMA3_DAVALID;
- output DMA3_DRREADY;
- output DMA3_RSTN;
- input DMA0_ACLK;
- input DMA0_DAREADY;
- input DMA0_DRLAST;
- input DMA0_DRVALID;
- input DMA1_ACLK;
- input DMA1_DAREADY;
- input DMA1_DRLAST;
- input DMA1_DRVALID;
- input DMA2_ACLK;
- input DMA2_DAREADY;
- input DMA2_DRLAST;
- input DMA2_DRVALID;
- input DMA3_ACLK;
- input DMA3_DAREADY;
- input DMA3_DRLAST;
- input DMA3_DRVALID;
- input [1:0]DMA0_DRTYPE;
- input [1:0]DMA1_DRTYPE;
- input [1:0]DMA2_DRTYPE;
- input [1:0]DMA3_DRTYPE;
- output FCLK_CLK3;
- output FCLK_CLK2;
- output FCLK_CLK1;
- output FCLK_CLK0;
- input FCLK_CLKTRIG3_N;
- input FCLK_CLKTRIG2_N;
- input FCLK_CLKTRIG1_N;
- input FCLK_CLKTRIG0_N;
- output FCLK_RESET3_N;
- output FCLK_RESET2_N;
- output FCLK_RESET1_N;
- output FCLK_RESET0_N;
- input [31:0]FTMD_TRACEIN_DATA;
- input FTMD_TRACEIN_VALID;
- input FTMD_TRACEIN_CLK;
- input [3:0]FTMD_TRACEIN_ATID;
- input FTMT_F2P_TRIG_0;
- output FTMT_F2P_TRIGACK_0;
- input FTMT_F2P_TRIG_1;
- output FTMT_F2P_TRIGACK_1;
- input FTMT_F2P_TRIG_2;
- output FTMT_F2P_TRIGACK_2;
- input FTMT_F2P_TRIG_3;
- output FTMT_F2P_TRIGACK_3;
- input [31:0]FTMT_F2P_DEBUG;
- input FTMT_P2F_TRIGACK_0;
- output FTMT_P2F_TRIG_0;
- input FTMT_P2F_TRIGACK_1;
- output FTMT_P2F_TRIG_1;
- input FTMT_P2F_TRIGACK_2;
- output FTMT_P2F_TRIG_2;
- input FTMT_P2F_TRIGACK_3;
- output FTMT_P2F_TRIG_3;
- output [31:0]FTMT_P2F_DEBUG;
- input FPGA_IDLE_N;
- output EVENT_EVENTO;
- output [1:0]EVENT_STANDBYWFE;
- output [1:0]EVENT_STANDBYWFI;
- input EVENT_EVENTI;
- input [3:0]DDR_ARB;
- inout [53:0]MIO;
- inout DDR_CAS_n;
- inout DDR_CKE;
- inout DDR_Clk_n;
- inout DDR_Clk;
- inout DDR_CS_n;
- inout DDR_DRSTB;
- inout DDR_ODT;
- inout DDR_RAS_n;
- inout DDR_WEB;
- inout [2:0]DDR_BankAddr;
- inout [14:0]DDR_Addr;
- inout DDR_VRN;
- inout DDR_VRP;
- inout [3:0]DDR_DM;
- inout [31:0]DDR_DQ;
- inout [3:0]DDR_DQS_n;
- inout [3:0]DDR_DQS;
- inout PS_SRSTB;
- inout PS_CLK;
- inout PS_PORB;
-
- wire \<const0> ;
- wire \<const1> ;
- wire CAN0_PHY_RX;
- wire CAN0_PHY_TX;
- wire CAN1_PHY_RX;
- wire CAN1_PHY_TX;
- wire Core0_nFIQ;
- wire Core0_nIRQ;
- wire Core1_nFIQ;
- wire Core1_nIRQ;
- wire [3:0]DDR_ARB;
- wire [14:0]DDR_Addr;
- wire [2:0]DDR_BankAddr;
- wire DDR_CAS_n;
- wire DDR_CKE;
- wire DDR_CS_n;
- wire DDR_Clk;
- wire DDR_Clk_n;
- wire [3:0]DDR_DM;
- wire [31:0]DDR_DQ;
- wire [3:0]DDR_DQS;
- wire [3:0]DDR_DQS_n;
- wire DDR_DRSTB;
- wire DDR_ODT;
- wire DDR_RAS_n;
- wire DDR_VRN;
- wire DDR_VRP;
- wire DDR_WEB;
- wire DMA0_ACLK;
- wire DMA0_DAREADY;
- wire [1:0]DMA0_DATYPE;
- wire DMA0_DAVALID;
- wire DMA0_DRLAST;
- wire DMA0_DRREADY;
- wire [1:0]DMA0_DRTYPE;
- wire DMA0_DRVALID;
- wire DMA0_RSTN;
- wire DMA1_ACLK;
- wire DMA1_DAREADY;
- wire [1:0]DMA1_DATYPE;
- wire DMA1_DAVALID;
- wire DMA1_DRLAST;
- wire DMA1_DRREADY;
- wire [1:0]DMA1_DRTYPE;
- wire DMA1_DRVALID;
- wire DMA1_RSTN;
- wire DMA2_ACLK;
- wire DMA2_DAREADY;
- wire [1:0]DMA2_DATYPE;
- wire DMA2_DAVALID;
- wire DMA2_DRLAST;
- wire DMA2_DRREADY;
- wire [1:0]DMA2_DRTYPE;
- wire DMA2_DRVALID;
- wire DMA2_RSTN;
- wire DMA3_ACLK;
- wire DMA3_DAREADY;
- wire [1:0]DMA3_DATYPE;
- wire DMA3_DAVALID;
- wire DMA3_DRLAST;
- wire DMA3_DRREADY;
- wire [1:0]DMA3_DRTYPE;
- wire DMA3_DRVALID;
- wire DMA3_RSTN;
- wire ENET0_EXT_INTIN;
- wire ENET0_GMII_RX_CLK;
- wire ENET0_GMII_TX_CLK;
- wire ENET0_MDIO_I;
- wire ENET0_MDIO_MDC;
- wire ENET0_MDIO_O;
- wire ENET0_MDIO_T;
- wire ENET0_MDIO_T_n;
- wire ENET0_PTP_DELAY_REQ_RX;
- wire ENET0_PTP_DELAY_REQ_TX;
- wire ENET0_PTP_PDELAY_REQ_RX;
- wire ENET0_PTP_PDELAY_REQ_TX;
- wire ENET0_PTP_PDELAY_RESP_RX;
- wire ENET0_PTP_PDELAY_RESP_TX;
- wire ENET0_PTP_SYNC_FRAME_RX;
- wire ENET0_PTP_SYNC_FRAME_TX;
- wire ENET0_SOF_RX;
- wire ENET0_SOF_TX;
- wire ENET1_EXT_INTIN;
- wire ENET1_GMII_RX_CLK;
- wire ENET1_GMII_TX_CLK;
- wire ENET1_MDIO_I;
- wire ENET1_MDIO_MDC;
- wire ENET1_MDIO_O;
- wire ENET1_MDIO_T;
- wire ENET1_MDIO_T_n;
- wire ENET1_PTP_DELAY_REQ_RX;
- wire ENET1_PTP_DELAY_REQ_TX;
- wire ENET1_PTP_PDELAY_REQ_RX;
- wire ENET1_PTP_PDELAY_REQ_TX;
- wire ENET1_PTP_PDELAY_RESP_RX;
- wire ENET1_PTP_PDELAY_RESP_TX;
- wire ENET1_PTP_SYNC_FRAME_RX;
- wire ENET1_PTP_SYNC_FRAME_TX;
- wire ENET1_SOF_RX;
- wire ENET1_SOF_TX;
- wire EVENT_EVENTI;
- wire EVENT_EVENTO;
- wire [1:0]EVENT_STANDBYWFE;
- wire [1:0]EVENT_STANDBYWFI;
- wire FCLK_CLK0;
- wire FCLK_CLK1;
- wire FCLK_CLK2;
- wire FCLK_CLK3;
- wire [0:0]FCLK_CLK_unbuffered;
- wire FCLK_RESET0_N;
- wire FCLK_RESET1_N;
- wire FCLK_RESET2_N;
- wire FCLK_RESET3_N;
- wire FPGA_IDLE_N;
- wire FTMD_TRACEIN_CLK;
- wire [31:0]FTMT_F2P_DEBUG;
- wire FTMT_F2P_TRIGACK_0;
- wire FTMT_F2P_TRIGACK_1;
- wire FTMT_F2P_TRIGACK_2;
- wire FTMT_F2P_TRIGACK_3;
- wire FTMT_F2P_TRIG_0;
- wire FTMT_F2P_TRIG_1;
- wire FTMT_F2P_TRIG_2;
- wire FTMT_F2P_TRIG_3;
- wire [31:0]FTMT_P2F_DEBUG;
- wire FTMT_P2F_TRIGACK_0;
- wire FTMT_P2F_TRIGACK_1;
- wire FTMT_P2F_TRIGACK_2;
- wire FTMT_P2F_TRIGACK_3;
- wire FTMT_P2F_TRIG_0;
- wire FTMT_P2F_TRIG_1;
- wire FTMT_P2F_TRIG_2;
- wire FTMT_P2F_TRIG_3;
- wire [63:0]GPIO_I;
- wire [63:0]GPIO_O;
- wire [63:0]GPIO_T;
- wire I2C0_SCL_I;
- wire I2C0_SCL_O;
- wire I2C0_SCL_T;
- wire I2C0_SCL_T_n;
- wire I2C0_SDA_I;
- wire I2C0_SDA_O;
- wire I2C0_SDA_T;
- wire I2C0_SDA_T_n;
- wire I2C1_SCL_I;
- wire I2C1_SCL_O;
- wire I2C1_SCL_T;
- wire I2C1_SCL_T_n;
- wire I2C1_SDA_I;
- wire I2C1_SDA_O;
- wire I2C1_SDA_T;
- wire I2C1_SDA_T_n;
- wire [0:0]IRQ_F2P;
- wire IRQ_P2F_CAN0;
- wire IRQ_P2F_CAN1;
- wire IRQ_P2F_CTI;
- wire IRQ_P2F_DMAC0;
- wire IRQ_P2F_DMAC1;
- wire IRQ_P2F_DMAC2;
- wire IRQ_P2F_DMAC3;
- wire IRQ_P2F_DMAC4;
- wire IRQ_P2F_DMAC5;
- wire IRQ_P2F_DMAC6;
- wire IRQ_P2F_DMAC7;
- wire IRQ_P2F_DMAC_ABORT;
- wire IRQ_P2F_ENET0;
- wire IRQ_P2F_ENET1;
- wire IRQ_P2F_ENET_WAKE0;
- wire IRQ_P2F_ENET_WAKE1;
- wire IRQ_P2F_GPIO;
- wire IRQ_P2F_I2C0;
- wire IRQ_P2F_I2C1;
- wire IRQ_P2F_QSPI;
- wire IRQ_P2F_SDIO0;
- wire IRQ_P2F_SDIO1;
- wire IRQ_P2F_SMC;
- wire IRQ_P2F_SPI0;
- wire IRQ_P2F_SPI1;
- wire IRQ_P2F_UART0;
- wire IRQ_P2F_UART1;
- wire IRQ_P2F_USB0;
- wire IRQ_P2F_USB1;
- wire [53:0]MIO;
- wire M_AXI_GP0_ACLK;
- wire [31:0]M_AXI_GP0_ARADDR;
- wire [1:0]M_AXI_GP0_ARBURST;
- wire [3:0]\^M_AXI_GP0_ARCACHE ;
- wire M_AXI_GP0_ARESETN;
- wire [11:0]M_AXI_GP0_ARID;
- wire [3:0]M_AXI_GP0_ARLEN;
- wire [1:0]M_AXI_GP0_ARLOCK;
- wire [2:0]M_AXI_GP0_ARPROT;
- wire [3:0]M_AXI_GP0_ARQOS;
- wire M_AXI_GP0_ARREADY;
- wire [1:0]\^M_AXI_GP0_ARSIZE ;
- wire M_AXI_GP0_ARVALID;
- wire [31:0]M_AXI_GP0_AWADDR;
- wire [1:0]M_AXI_GP0_AWBURST;
- wire [3:0]\^M_AXI_GP0_AWCACHE ;
- wire [11:0]M_AXI_GP0_AWID;
- wire [3:0]M_AXI_GP0_AWLEN;
- wire [1:0]M_AXI_GP0_AWLOCK;
- wire [2:0]M_AXI_GP0_AWPROT;
- wire [3:0]M_AXI_GP0_AWQOS;
- wire M_AXI_GP0_AWREADY;
- wire [1:0]\^M_AXI_GP0_AWSIZE ;
- wire M_AXI_GP0_AWVALID;
- wire [11:0]M_AXI_GP0_BID;
- wire M_AXI_GP0_BREADY;
- wire [1:0]M_AXI_GP0_BRESP;
- wire M_AXI_GP0_BVALID;
- wire [31:0]M_AXI_GP0_RDATA;
- wire [11:0]M_AXI_GP0_RID;
- wire M_AXI_GP0_RLAST;
- wire M_AXI_GP0_RREADY;
- wire [1:0]M_AXI_GP0_RRESP;
- wire M_AXI_GP0_RVALID;
- wire [31:0]M_AXI_GP0_WDATA;
- wire [11:0]M_AXI_GP0_WID;
- wire M_AXI_GP0_WLAST;
- wire M_AXI_GP0_WREADY;
- wire [3:0]M_AXI_GP0_WSTRB;
- wire M_AXI_GP0_WVALID;
- wire M_AXI_GP1_ACLK;
- wire [31:0]M_AXI_GP1_ARADDR;
- wire [1:0]M_AXI_GP1_ARBURST;
- wire [3:0]\^M_AXI_GP1_ARCACHE ;
- wire M_AXI_GP1_ARESETN;
- wire [11:0]M_AXI_GP1_ARID;
- wire [3:0]M_AXI_GP1_ARLEN;
- wire [1:0]M_AXI_GP1_ARLOCK;
- wire [2:0]M_AXI_GP1_ARPROT;
- wire [3:0]M_AXI_GP1_ARQOS;
- wire M_AXI_GP1_ARREADY;
- wire [1:0]\^M_AXI_GP1_ARSIZE ;
- wire M_AXI_GP1_ARVALID;
- wire [31:0]M_AXI_GP1_AWADDR;
- wire [1:0]M_AXI_GP1_AWBURST;
- wire [3:0]\^M_AXI_GP1_AWCACHE ;
- wire [11:0]M_AXI_GP1_AWID;
- wire [3:0]M_AXI_GP1_AWLEN;
- wire [1:0]M_AXI_GP1_AWLOCK;
- wire [2:0]M_AXI_GP1_AWPROT;
- wire [3:0]M_AXI_GP1_AWQOS;
- wire M_AXI_GP1_AWREADY;
- wire [1:0]\^M_AXI_GP1_AWSIZE ;
- wire M_AXI_GP1_AWVALID;
- wire [11:0]M_AXI_GP1_BID;
- wire M_AXI_GP1_BREADY;
- wire [1:0]M_AXI_GP1_BRESP;
- wire M_AXI_GP1_BVALID;
- wire [31:0]M_AXI_GP1_RDATA;
- wire [11:0]M_AXI_GP1_RID;
- wire M_AXI_GP1_RLAST;
- wire M_AXI_GP1_RREADY;
- wire [1:0]M_AXI_GP1_RRESP;
- wire M_AXI_GP1_RVALID;
- wire [31:0]M_AXI_GP1_WDATA;
- wire [11:0]M_AXI_GP1_WID;
- wire M_AXI_GP1_WLAST;
- wire M_AXI_GP1_WREADY;
- wire [3:0]M_AXI_GP1_WSTRB;
- wire M_AXI_GP1_WVALID;
- wire PJTAG_TCK;
- wire PJTAG_TDI;
- wire PJTAG_TMS;
- wire PS_CLK;
- wire PS_PORB;
- wire PS_SRSTB;
- wire SDIO0_BUSPOW;
- wire [2:0]SDIO0_BUSVOLT;
- wire SDIO0_CDN;
- wire SDIO0_CLK;
- wire SDIO0_CLK_FB;
- wire SDIO0_CMD_I;
- wire SDIO0_CMD_O;
- wire SDIO0_CMD_T;
- wire SDIO0_CMD_T_n;
- wire [3:0]SDIO0_DATA_I;
- wire [3:0]SDIO0_DATA_O;
- wire [3:0]SDIO0_DATA_T;
- wire [3:0]SDIO0_DATA_T_n;
- wire SDIO0_LED;
- wire SDIO0_WP;
- wire SDIO1_BUSPOW;
- wire [2:0]SDIO1_BUSVOLT;
- wire SDIO1_CDN;
- wire SDIO1_CLK;
- wire SDIO1_CLK_FB;
- wire SDIO1_CMD_I;
- wire SDIO1_CMD_O;
- wire SDIO1_CMD_T;
- wire SDIO1_CMD_T_n;
- wire [3:0]SDIO1_DATA_I;
- wire [3:0]SDIO1_DATA_O;
- wire [3:0]SDIO1_DATA_T;
- wire [3:0]SDIO1_DATA_T_n;
- wire SDIO1_LED;
- wire SDIO1_WP;
- wire SPI0_MISO_I;
- wire SPI0_MISO_O;
- wire SPI0_MISO_T;
- wire SPI0_MISO_T_n;
- wire SPI0_MOSI_I;
- wire SPI0_MOSI_O;
- wire SPI0_MOSI_T;
- wire SPI0_MOSI_T_n;
- wire SPI0_SCLK_I;
- wire SPI0_SCLK_O;
- wire SPI0_SCLK_T;
- wire SPI0_SCLK_T_n;
- wire SPI0_SS1_O;
- wire SPI0_SS2_O;
- wire SPI0_SS_I;
- wire SPI0_SS_O;
- wire SPI0_SS_T;
- wire SPI0_SS_T_n;
- wire SPI1_MISO_I;
- wire SPI1_MISO_O;
- wire SPI1_MISO_T;
- wire SPI1_MISO_T_n;
- wire SPI1_MOSI_I;
- wire SPI1_MOSI_O;
- wire SPI1_MOSI_T;
- wire SPI1_MOSI_T_n;
- wire SPI1_SCLK_I;
- wire SPI1_SCLK_O;
- wire SPI1_SCLK_T;
- wire SPI1_SCLK_T_n;
- wire SPI1_SS1_O;
- wire SPI1_SS2_O;
- wire SPI1_SS_I;
- wire SPI1_SS_O;
- wire SPI1_SS_T;
- wire SPI1_SS_T_n;
- wire SRAM_INTIN;
- wire S_AXI_ACP_ACLK;
- wire [31:0]S_AXI_ACP_ARADDR;
- wire [1:0]S_AXI_ACP_ARBURST;
- wire [3:0]S_AXI_ACP_ARCACHE;
- wire S_AXI_ACP_ARESETN;
- wire [2:0]S_AXI_ACP_ARID;
- wire [3:0]S_AXI_ACP_ARLEN;
- wire [1:0]S_AXI_ACP_ARLOCK;
- wire [2:0]S_AXI_ACP_ARPROT;
- wire [3:0]S_AXI_ACP_ARQOS;
- wire S_AXI_ACP_ARREADY;
- wire [2:0]S_AXI_ACP_ARSIZE;
- wire [4:0]S_AXI_ACP_ARUSER;
- wire S_AXI_ACP_ARVALID;
- wire [31:0]S_AXI_ACP_AWADDR;
- wire [1:0]S_AXI_ACP_AWBURST;
- wire [3:0]S_AXI_ACP_AWCACHE;
- wire [2:0]S_AXI_ACP_AWID;
- wire [3:0]S_AXI_ACP_AWLEN;
- wire [1:0]S_AXI_ACP_AWLOCK;
- wire [2:0]S_AXI_ACP_AWPROT;
- wire [3:0]S_AXI_ACP_AWQOS;
- wire S_AXI_ACP_AWREADY;
- wire [2:0]S_AXI_ACP_AWSIZE;
- wire [4:0]S_AXI_ACP_AWUSER;
- wire S_AXI_ACP_AWVALID;
- wire [2:0]S_AXI_ACP_BID;
- wire S_AXI_ACP_BREADY;
- wire [1:0]S_AXI_ACP_BRESP;
- wire S_AXI_ACP_BVALID;
- wire [63:0]S_AXI_ACP_RDATA;
- wire [2:0]S_AXI_ACP_RID;
- wire S_AXI_ACP_RLAST;
- wire S_AXI_ACP_RREADY;
- wire [1:0]S_AXI_ACP_RRESP;
- wire S_AXI_ACP_RVALID;
- wire [63:0]S_AXI_ACP_WDATA;
- wire [2:0]S_AXI_ACP_WID;
- wire S_AXI_ACP_WLAST;
- wire S_AXI_ACP_WREADY;
- wire [7:0]S_AXI_ACP_WSTRB;
- wire S_AXI_ACP_WVALID;
- wire S_AXI_GP0_ACLK;
- wire [31:0]S_AXI_GP0_ARADDR;
- wire [1:0]S_AXI_GP0_ARBURST;
- wire [3:0]S_AXI_GP0_ARCACHE;
- wire S_AXI_GP0_ARESETN;
- wire [5:0]S_AXI_GP0_ARID;
- wire [3:0]S_AXI_GP0_ARLEN;
- wire [1:0]S_AXI_GP0_ARLOCK;
- wire [2:0]S_AXI_GP0_ARPROT;
- wire [3:0]S_AXI_GP0_ARQOS;
- wire S_AXI_GP0_ARREADY;
- wire [2:0]S_AXI_GP0_ARSIZE;
- wire S_AXI_GP0_ARVALID;
- wire [31:0]S_AXI_GP0_AWADDR;
- wire [1:0]S_AXI_GP0_AWBURST;
- wire [3:0]S_AXI_GP0_AWCACHE;
- wire [5:0]S_AXI_GP0_AWID;
- wire [3:0]S_AXI_GP0_AWLEN;
- wire [1:0]S_AXI_GP0_AWLOCK;
- wire [2:0]S_AXI_GP0_AWPROT;
- wire [3:0]S_AXI_GP0_AWQOS;
- wire S_AXI_GP0_AWREADY;
- wire [2:0]S_AXI_GP0_AWSIZE;
- wire S_AXI_GP0_AWVALID;
- wire [5:0]S_AXI_GP0_BID;
- wire S_AXI_GP0_BREADY;
- wire [1:0]S_AXI_GP0_BRESP;
- wire S_AXI_GP0_BVALID;
- wire [31:0]S_AXI_GP0_RDATA;
- wire [5:0]S_AXI_GP0_RID;
- wire S_AXI_GP0_RLAST;
- wire S_AXI_GP0_RREADY;
- wire [1:0]S_AXI_GP0_RRESP;
- wire S_AXI_GP0_RVALID;
- wire [31:0]S_AXI_GP0_WDATA;
- wire [5:0]S_AXI_GP0_WID;
- wire S_AXI_GP0_WLAST;
- wire S_AXI_GP0_WREADY;
- wire [3:0]S_AXI_GP0_WSTRB;
- wire S_AXI_GP0_WVALID;
- wire S_AXI_GP1_ACLK;
- wire [31:0]S_AXI_GP1_ARADDR;
- wire [1:0]S_AXI_GP1_ARBURST;
- wire [3:0]S_AXI_GP1_ARCACHE;
- wire S_AXI_GP1_ARESETN;
- wire [5:0]S_AXI_GP1_ARID;
- wire [3:0]S_AXI_GP1_ARLEN;
- wire [1:0]S_AXI_GP1_ARLOCK;
- wire [2:0]S_AXI_GP1_ARPROT;
- wire [3:0]S_AXI_GP1_ARQOS;
- wire S_AXI_GP1_ARREADY;
- wire [2:0]S_AXI_GP1_ARSIZE;
- wire S_AXI_GP1_ARVALID;
- wire [31:0]S_AXI_GP1_AWADDR;
- wire [1:0]S_AXI_GP1_AWBURST;
- wire [3:0]S_AXI_GP1_AWCACHE;
- wire [5:0]S_AXI_GP1_AWID;
- wire [3:0]S_AXI_GP1_AWLEN;
- wire [1:0]S_AXI_GP1_AWLOCK;
- wire [2:0]S_AXI_GP1_AWPROT;
- wire [3:0]S_AXI_GP1_AWQOS;
- wire S_AXI_GP1_AWREADY;
- wire [2:0]S_AXI_GP1_AWSIZE;
- wire S_AXI_GP1_AWVALID;
- wire [5:0]S_AXI_GP1_BID;
- wire S_AXI_GP1_BREADY;
- wire [1:0]S_AXI_GP1_BRESP;
- wire S_AXI_GP1_BVALID;
- wire [31:0]S_AXI_GP1_RDATA;
- wire [5:0]S_AXI_GP1_RID;
- wire S_AXI_GP1_RLAST;
- wire S_AXI_GP1_RREADY;
- wire [1:0]S_AXI_GP1_RRESP;
- wire S_AXI_GP1_RVALID;
- wire [31:0]S_AXI_GP1_WDATA;
- wire [5:0]S_AXI_GP1_WID;
- wire S_AXI_GP1_WLAST;
- wire S_AXI_GP1_WREADY;
- wire [3:0]S_AXI_GP1_WSTRB;
- wire S_AXI_GP1_WVALID;
- wire S_AXI_HP0_ACLK;
- wire [31:0]S_AXI_HP0_ARADDR;
- wire [1:0]S_AXI_HP0_ARBURST;
- wire [3:0]S_AXI_HP0_ARCACHE;
- wire S_AXI_HP0_ARESETN;
- wire [5:0]S_AXI_HP0_ARID;
- wire [3:0]S_AXI_HP0_ARLEN;
- wire [1:0]S_AXI_HP0_ARLOCK;
- wire [2:0]S_AXI_HP0_ARPROT;
- wire [3:0]S_AXI_HP0_ARQOS;
- wire S_AXI_HP0_ARREADY;
- wire [2:0]S_AXI_HP0_ARSIZE;
- wire S_AXI_HP0_ARVALID;
- wire [31:0]S_AXI_HP0_AWADDR;
- wire [1:0]S_AXI_HP0_AWBURST;
- wire [3:0]S_AXI_HP0_AWCACHE;
- wire [5:0]S_AXI_HP0_AWID;
- wire [3:0]S_AXI_HP0_AWLEN;
- wire [1:0]S_AXI_HP0_AWLOCK;
- wire [2:0]S_AXI_HP0_AWPROT;
- wire [3:0]S_AXI_HP0_AWQOS;
- wire S_AXI_HP0_AWREADY;
- wire [2:0]S_AXI_HP0_AWSIZE;
- wire S_AXI_HP0_AWVALID;
- wire [5:0]S_AXI_HP0_BID;
- wire S_AXI_HP0_BREADY;
- wire [1:0]S_AXI_HP0_BRESP;
- wire S_AXI_HP0_BVALID;
- wire [2:0]S_AXI_HP0_RACOUNT;
- wire [7:0]S_AXI_HP0_RCOUNT;
- wire [63:0]S_AXI_HP0_RDATA;
- wire S_AXI_HP0_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP0_RID;
- wire S_AXI_HP0_RLAST;
- wire S_AXI_HP0_RREADY;
- wire [1:0]S_AXI_HP0_RRESP;
- wire S_AXI_HP0_RVALID;
- wire [5:0]S_AXI_HP0_WACOUNT;
- wire [7:0]S_AXI_HP0_WCOUNT;
- wire [63:0]S_AXI_HP0_WDATA;
- wire [5:0]S_AXI_HP0_WID;
- wire S_AXI_HP0_WLAST;
- wire S_AXI_HP0_WREADY;
- wire S_AXI_HP0_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP0_WSTRB;
- wire S_AXI_HP0_WVALID;
- wire S_AXI_HP1_ACLK;
- wire [31:0]S_AXI_HP1_ARADDR;
- wire [1:0]S_AXI_HP1_ARBURST;
- wire [3:0]S_AXI_HP1_ARCACHE;
- wire S_AXI_HP1_ARESETN;
- wire [5:0]S_AXI_HP1_ARID;
- wire [3:0]S_AXI_HP1_ARLEN;
- wire [1:0]S_AXI_HP1_ARLOCK;
- wire [2:0]S_AXI_HP1_ARPROT;
- wire [3:0]S_AXI_HP1_ARQOS;
- wire S_AXI_HP1_ARREADY;
- wire [2:0]S_AXI_HP1_ARSIZE;
- wire S_AXI_HP1_ARVALID;
- wire [31:0]S_AXI_HP1_AWADDR;
- wire [1:0]S_AXI_HP1_AWBURST;
- wire [3:0]S_AXI_HP1_AWCACHE;
- wire [5:0]S_AXI_HP1_AWID;
- wire [3:0]S_AXI_HP1_AWLEN;
- wire [1:0]S_AXI_HP1_AWLOCK;
- wire [2:0]S_AXI_HP1_AWPROT;
- wire [3:0]S_AXI_HP1_AWQOS;
- wire S_AXI_HP1_AWREADY;
- wire [2:0]S_AXI_HP1_AWSIZE;
- wire S_AXI_HP1_AWVALID;
- wire [5:0]S_AXI_HP1_BID;
- wire S_AXI_HP1_BREADY;
- wire [1:0]S_AXI_HP1_BRESP;
- wire S_AXI_HP1_BVALID;
- wire [2:0]S_AXI_HP1_RACOUNT;
- wire [7:0]S_AXI_HP1_RCOUNT;
- wire [63:0]S_AXI_HP1_RDATA;
- wire S_AXI_HP1_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP1_RID;
- wire S_AXI_HP1_RLAST;
- wire S_AXI_HP1_RREADY;
- wire [1:0]S_AXI_HP1_RRESP;
- wire S_AXI_HP1_RVALID;
- wire [5:0]S_AXI_HP1_WACOUNT;
- wire [7:0]S_AXI_HP1_WCOUNT;
- wire [63:0]S_AXI_HP1_WDATA;
- wire [5:0]S_AXI_HP1_WID;
- wire S_AXI_HP1_WLAST;
- wire S_AXI_HP1_WREADY;
- wire S_AXI_HP1_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP1_WSTRB;
- wire S_AXI_HP1_WVALID;
- wire S_AXI_HP2_ACLK;
- wire [31:0]S_AXI_HP2_ARADDR;
- wire [1:0]S_AXI_HP2_ARBURST;
- wire [3:0]S_AXI_HP2_ARCACHE;
- wire S_AXI_HP2_ARESETN;
- wire [5:0]S_AXI_HP2_ARID;
- wire [3:0]S_AXI_HP2_ARLEN;
- wire [1:0]S_AXI_HP2_ARLOCK;
- wire [2:0]S_AXI_HP2_ARPROT;
- wire [3:0]S_AXI_HP2_ARQOS;
- wire S_AXI_HP2_ARREADY;
- wire [2:0]S_AXI_HP2_ARSIZE;
- wire S_AXI_HP2_ARVALID;
- wire [31:0]S_AXI_HP2_AWADDR;
- wire [1:0]S_AXI_HP2_AWBURST;
- wire [3:0]S_AXI_HP2_AWCACHE;
- wire [5:0]S_AXI_HP2_AWID;
- wire [3:0]S_AXI_HP2_AWLEN;
- wire [1:0]S_AXI_HP2_AWLOCK;
- wire [2:0]S_AXI_HP2_AWPROT;
- wire [3:0]S_AXI_HP2_AWQOS;
- wire S_AXI_HP2_AWREADY;
- wire [2:0]S_AXI_HP2_AWSIZE;
- wire S_AXI_HP2_AWVALID;
- wire [5:0]S_AXI_HP2_BID;
- wire S_AXI_HP2_BREADY;
- wire [1:0]S_AXI_HP2_BRESP;
- wire S_AXI_HP2_BVALID;
- wire [2:0]S_AXI_HP2_RACOUNT;
- wire [7:0]S_AXI_HP2_RCOUNT;
- wire [63:0]S_AXI_HP2_RDATA;
- wire S_AXI_HP2_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP2_RID;
- wire S_AXI_HP2_RLAST;
- wire S_AXI_HP2_RREADY;
- wire [1:0]S_AXI_HP2_RRESP;
- wire S_AXI_HP2_RVALID;
- wire [5:0]S_AXI_HP2_WACOUNT;
- wire [7:0]S_AXI_HP2_WCOUNT;
- wire [63:0]S_AXI_HP2_WDATA;
- wire [5:0]S_AXI_HP2_WID;
- wire S_AXI_HP2_WLAST;
- wire S_AXI_HP2_WREADY;
- wire S_AXI_HP2_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP2_WSTRB;
- wire S_AXI_HP2_WVALID;
- wire S_AXI_HP3_ACLK;
- wire [31:0]S_AXI_HP3_ARADDR;
- wire [1:0]S_AXI_HP3_ARBURST;
- wire [3:0]S_AXI_HP3_ARCACHE;
- wire S_AXI_HP3_ARESETN;
- wire [5:0]S_AXI_HP3_ARID;
- wire [3:0]S_AXI_HP3_ARLEN;
- wire [1:0]S_AXI_HP3_ARLOCK;
- wire [2:0]S_AXI_HP3_ARPROT;
- wire [3:0]S_AXI_HP3_ARQOS;
- wire S_AXI_HP3_ARREADY;
- wire [2:0]S_AXI_HP3_ARSIZE;
- wire S_AXI_HP3_ARVALID;
- wire [31:0]S_AXI_HP3_AWADDR;
- wire [1:0]S_AXI_HP3_AWBURST;
- wire [3:0]S_AXI_HP3_AWCACHE;
- wire [5:0]S_AXI_HP3_AWID;
- wire [3:0]S_AXI_HP3_AWLEN;
- wire [1:0]S_AXI_HP3_AWLOCK;
- wire [2:0]S_AXI_HP3_AWPROT;
- wire [3:0]S_AXI_HP3_AWQOS;
- wire S_AXI_HP3_AWREADY;
- wire [2:0]S_AXI_HP3_AWSIZE;
- wire S_AXI_HP3_AWVALID;
- wire [5:0]S_AXI_HP3_BID;
- wire S_AXI_HP3_BREADY;
- wire [1:0]S_AXI_HP3_BRESP;
- wire S_AXI_HP3_BVALID;
- wire [2:0]S_AXI_HP3_RACOUNT;
- wire [7:0]S_AXI_HP3_RCOUNT;
- wire [63:0]S_AXI_HP3_RDATA;
- wire S_AXI_HP3_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP3_RID;
- wire S_AXI_HP3_RLAST;
- wire S_AXI_HP3_RREADY;
- wire [1:0]S_AXI_HP3_RRESP;
- wire S_AXI_HP3_RVALID;
- wire [5:0]S_AXI_HP3_WACOUNT;
- wire [7:0]S_AXI_HP3_WCOUNT;
- wire [63:0]S_AXI_HP3_WDATA;
- wire [5:0]S_AXI_HP3_WID;
- wire S_AXI_HP3_WLAST;
- wire S_AXI_HP3_WREADY;
- wire S_AXI_HP3_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP3_WSTRB;
- wire S_AXI_HP3_WVALID;
- wire TRACE_CLK;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[0] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[1] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[2] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[3] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[4] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[5] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[6] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[7] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[0] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[1] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[2] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[3] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[4] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[5] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[6] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[7] ;
- wire TTC0_CLK0_IN;
- wire TTC0_CLK1_IN;
- wire TTC0_CLK2_IN;
- wire TTC0_WAVE0_OUT;
- wire TTC0_WAVE1_OUT;
- wire TTC0_WAVE2_OUT;
- wire TTC1_CLK0_IN;
- wire TTC1_CLK1_IN;
- wire TTC1_CLK2_IN;
- wire TTC1_WAVE0_OUT;
- wire TTC1_WAVE1_OUT;
- wire TTC1_WAVE2_OUT;
- wire UART0_CTSN;
- wire UART0_DCDN;
- wire UART0_DSRN;
- wire UART0_DTRN;
- wire UART0_RIN;
- wire UART0_RTSN;
- wire UART0_RX;
- wire UART0_TX;
- wire UART1_CTSN;
- wire UART1_DCDN;
- wire UART1_DSRN;
- wire UART1_DTRN;
- wire UART1_RIN;
- wire UART1_RTSN;
- wire UART1_RX;
- wire UART1_TX;
- wire [1:0]USB0_PORT_INDCTL;
- wire USB0_VBUS_PWRFAULT;
- wire USB0_VBUS_PWRSELECT;
- wire [1:0]USB1_PORT_INDCTL;
- wire USB1_VBUS_PWRFAULT;
- wire USB1_VBUS_PWRSELECT;
- wire WDT_CLK_IN;
- wire WDT_RST_OUT;
- wire [14:0]buffered_DDR_Addr;
- wire [2:0]buffered_DDR_BankAddr;
- wire buffered_DDR_CAS_n;
- wire buffered_DDR_CKE;
- wire buffered_DDR_CS_n;
- wire buffered_DDR_Clk;
- wire buffered_DDR_Clk_n;
- wire [3:0]buffered_DDR_DM;
- wire [31:0]buffered_DDR_DQ;
- wire [3:0]buffered_DDR_DQS;
- wire [3:0]buffered_DDR_DQS_n;
- wire buffered_DDR_DRSTB;
- wire buffered_DDR_ODT;
- wire buffered_DDR_RAS_n;
- wire buffered_DDR_VRN;
- wire buffered_DDR_VRP;
- wire buffered_DDR_WEB;
- wire [53:0]buffered_MIO;
- wire buffered_PS_CLK;
- wire buffered_PS_PORB;
- wire buffered_PS_SRSTB;
- wire [63:0]gpio_out_t_n;
- wire NLW_PS7_i_EMIOENET0GMIITXEN_UNCONNECTED;
- wire NLW_PS7_i_EMIOENET0GMIITXER_UNCONNECTED;
- wire NLW_PS7_i_EMIOENET1GMIITXEN_UNCONNECTED;
- wire NLW_PS7_i_EMIOENET1GMIITXER_UNCONNECTED;
- wire NLW_PS7_i_EMIOPJTAGTDO_UNCONNECTED;
- wire NLW_PS7_i_EMIOPJTAGTDTN_UNCONNECTED;
- wire NLW_PS7_i_EMIOTRACECTL_UNCONNECTED;
- wire [7:0]NLW_PS7_i_EMIOENET0GMIITXD_UNCONNECTED;
- wire [7:0]NLW_PS7_i_EMIOENET1GMIITXD_UNCONNECTED;
- wire [31:0]NLW_PS7_i_EMIOTRACEDATA_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP0ARCACHE_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP0AWCACHE_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP1ARCACHE_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP1AWCACHE_UNCONNECTED;
-
- assign ENET0_GMII_TXD[7] = \<const0> ;
- assign ENET0_GMII_TXD[6] = \<const0> ;
- assign ENET0_GMII_TXD[5] = \<const0> ;
- assign ENET0_GMII_TXD[4] = \<const0> ;
- assign ENET0_GMII_TXD[3] = \<const0> ;
- assign ENET0_GMII_TXD[2] = \<const0> ;
- assign ENET0_GMII_TXD[1] = \<const0> ;
- assign ENET0_GMII_TXD[0] = \<const0> ;
- assign ENET0_GMII_TX_EN = \<const0> ;
- assign ENET0_GMII_TX_ER = \<const0> ;
- assign ENET1_GMII_TXD[7] = \<const0> ;
- assign ENET1_GMII_TXD[6] = \<const0> ;
- assign ENET1_GMII_TXD[5] = \<const0> ;
- assign ENET1_GMII_TXD[4] = \<const0> ;
- assign ENET1_GMII_TXD[3] = \<const0> ;
- assign ENET1_GMII_TXD[2] = \<const0> ;
- assign ENET1_GMII_TXD[1] = \<const0> ;
- assign ENET1_GMII_TXD[0] = \<const0> ;
- assign ENET1_GMII_TX_EN = \<const0> ;
- assign ENET1_GMII_TX_ER = \<const0> ;
- assign M_AXI_GP0_ARCACHE[3:2] = \^M_AXI_GP0_ARCACHE [3:2];
- assign M_AXI_GP0_ARCACHE[1] = \<const1> ;
- assign M_AXI_GP0_ARCACHE[0] = \^M_AXI_GP0_ARCACHE [0];
- assign M_AXI_GP0_ARSIZE[2] = \<const0> ;
- assign M_AXI_GP0_ARSIZE[1:0] = \^M_AXI_GP0_ARSIZE [1:0];
- assign M_AXI_GP0_AWCACHE[3:2] = \^M_AXI_GP0_AWCACHE [3:2];
- assign M_AXI_GP0_AWCACHE[1] = \<const1> ;
- assign M_AXI_GP0_AWCACHE[0] = \^M_AXI_GP0_AWCACHE [0];
- assign M_AXI_GP0_AWSIZE[2] = \<const0> ;
- assign M_AXI_GP0_AWSIZE[1:0] = \^M_AXI_GP0_AWSIZE [1:0];
- assign M_AXI_GP1_ARCACHE[3:2] = \^M_AXI_GP1_ARCACHE [3:2];
- assign M_AXI_GP1_ARCACHE[1] = \<const1> ;
- assign M_AXI_GP1_ARCACHE[0] = \^M_AXI_GP1_ARCACHE [0];
- assign M_AXI_GP1_ARSIZE[2] = \<const0> ;
- assign M_AXI_GP1_ARSIZE[1:0] = \^M_AXI_GP1_ARSIZE [1:0];
- assign M_AXI_GP1_AWCACHE[3:2] = \^M_AXI_GP1_AWCACHE [3:2];
- assign M_AXI_GP1_AWCACHE[1] = \<const1> ;
- assign M_AXI_GP1_AWCACHE[0] = \^M_AXI_GP1_AWCACHE [0];
- assign M_AXI_GP1_AWSIZE[2] = \<const0> ;
- assign M_AXI_GP1_AWSIZE[1:0] = \^M_AXI_GP1_AWSIZE [1:0];
- assign PJTAG_TDO = \<const0> ;
- assign TRACE_CLK_OUT = \<const0> ;
- assign TRACE_CTL = \TRACE_CTL_PIPE[0] ;
- assign TRACE_DATA[1:0] = \TRACE_DATA_PIPE[0] ;
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_CAS_n_BIBUF
- (.IO(buffered_DDR_CAS_n),
- .PAD(DDR_CAS_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_CKE_BIBUF
- (.IO(buffered_DDR_CKE),
- .PAD(DDR_CKE));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_CS_n_BIBUF
- (.IO(buffered_DDR_CS_n),
- .PAD(DDR_CS_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_Clk_BIBUF
- (.IO(buffered_DDR_Clk),
- .PAD(DDR_Clk));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_Clk_n_BIBUF
- (.IO(buffered_DDR_Clk_n),
- .PAD(DDR_Clk_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_DRSTB_BIBUF
- (.IO(buffered_DDR_DRSTB),
- .PAD(DDR_DRSTB));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_ODT_BIBUF
- (.IO(buffered_DDR_ODT),
- .PAD(DDR_ODT));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_RAS_n_BIBUF
- (.IO(buffered_DDR_RAS_n),
- .PAD(DDR_RAS_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_VRN_BIBUF
- (.IO(buffered_DDR_VRN),
- .PAD(DDR_VRN));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_VRP_BIBUF
- (.IO(buffered_DDR_VRP),
- .PAD(DDR_VRP));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_WEB_BIBUF
- (.IO(buffered_DDR_WEB),
- .PAD(DDR_WEB));
- LUT1 #(
- .INIT(2'h1))
- ENET0_MDIO_T_INST_0
- (.I0(ENET0_MDIO_T_n),
- .O(ENET0_MDIO_T));
- LUT1 #(
- .INIT(2'h1))
- ENET1_MDIO_T_INST_0
- (.I0(ENET1_MDIO_T_n),
- .O(ENET1_MDIO_T));
- GND GND
- (.G(\<const0> ));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[0]_INST_0
- (.I0(gpio_out_t_n[0]),
- .O(GPIO_T[0]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[10]_INST_0
- (.I0(gpio_out_t_n[10]),
- .O(GPIO_T[10]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[11]_INST_0
- (.I0(gpio_out_t_n[11]),
- .O(GPIO_T[11]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[12]_INST_0
- (.I0(gpio_out_t_n[12]),
- .O(GPIO_T[12]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[13]_INST_0
- (.I0(gpio_out_t_n[13]),
- .O(GPIO_T[13]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[14]_INST_0
- (.I0(gpio_out_t_n[14]),
- .O(GPIO_T[14]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[15]_INST_0
- (.I0(gpio_out_t_n[15]),
- .O(GPIO_T[15]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[16]_INST_0
- (.I0(gpio_out_t_n[16]),
- .O(GPIO_T[16]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[17]_INST_0
- (.I0(gpio_out_t_n[17]),
- .O(GPIO_T[17]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[18]_INST_0
- (.I0(gpio_out_t_n[18]),
- .O(GPIO_T[18]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[19]_INST_0
- (.I0(gpio_out_t_n[19]),
- .O(GPIO_T[19]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[1]_INST_0
- (.I0(gpio_out_t_n[1]),
- .O(GPIO_T[1]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[20]_INST_0
- (.I0(gpio_out_t_n[20]),
- .O(GPIO_T[20]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[21]_INST_0
- (.I0(gpio_out_t_n[21]),
- .O(GPIO_T[21]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[22]_INST_0
- (.I0(gpio_out_t_n[22]),
- .O(GPIO_T[22]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[23]_INST_0
- (.I0(gpio_out_t_n[23]),
- .O(GPIO_T[23]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[24]_INST_0
- (.I0(gpio_out_t_n[24]),
- .O(GPIO_T[24]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[25]_INST_0
- (.I0(gpio_out_t_n[25]),
- .O(GPIO_T[25]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[26]_INST_0
- (.I0(gpio_out_t_n[26]),
- .O(GPIO_T[26]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[27]_INST_0
- (.I0(gpio_out_t_n[27]),
- .O(GPIO_T[27]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[28]_INST_0
- (.I0(gpio_out_t_n[28]),
- .O(GPIO_T[28]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[29]_INST_0
- (.I0(gpio_out_t_n[29]),
- .O(GPIO_T[29]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[2]_INST_0
- (.I0(gpio_out_t_n[2]),
- .O(GPIO_T[2]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[30]_INST_0
- (.I0(gpio_out_t_n[30]),
- .O(GPIO_T[30]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[31]_INST_0
- (.I0(gpio_out_t_n[31]),
- .O(GPIO_T[31]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[32]_INST_0
- (.I0(gpio_out_t_n[32]),
- .O(GPIO_T[32]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[33]_INST_0
- (.I0(gpio_out_t_n[33]),
- .O(GPIO_T[33]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[34]_INST_0
- (.I0(gpio_out_t_n[34]),
- .O(GPIO_T[34]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[35]_INST_0
- (.I0(gpio_out_t_n[35]),
- .O(GPIO_T[35]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[36]_INST_0
- (.I0(gpio_out_t_n[36]),
- .O(GPIO_T[36]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[37]_INST_0
- (.I0(gpio_out_t_n[37]),
- .O(GPIO_T[37]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[38]_INST_0
- (.I0(gpio_out_t_n[38]),
- .O(GPIO_T[38]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[39]_INST_0
- (.I0(gpio_out_t_n[39]),
- .O(GPIO_T[39]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[3]_INST_0
- (.I0(gpio_out_t_n[3]),
- .O(GPIO_T[3]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[40]_INST_0
- (.I0(gpio_out_t_n[40]),
- .O(GPIO_T[40]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[41]_INST_0
- (.I0(gpio_out_t_n[41]),
- .O(GPIO_T[41]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[42]_INST_0
- (.I0(gpio_out_t_n[42]),
- .O(GPIO_T[42]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[43]_INST_0
- (.I0(gpio_out_t_n[43]),
- .O(GPIO_T[43]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[44]_INST_0
- (.I0(gpio_out_t_n[44]),
- .O(GPIO_T[44]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[45]_INST_0
- (.I0(gpio_out_t_n[45]),
- .O(GPIO_T[45]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[46]_INST_0
- (.I0(gpio_out_t_n[46]),
- .O(GPIO_T[46]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[47]_INST_0
- (.I0(gpio_out_t_n[47]),
- .O(GPIO_T[47]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[48]_INST_0
- (.I0(gpio_out_t_n[48]),
- .O(GPIO_T[48]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[49]_INST_0
- (.I0(gpio_out_t_n[49]),
- .O(GPIO_T[49]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[4]_INST_0
- (.I0(gpio_out_t_n[4]),
- .O(GPIO_T[4]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[50]_INST_0
- (.I0(gpio_out_t_n[50]),
- .O(GPIO_T[50]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[51]_INST_0
- (.I0(gpio_out_t_n[51]),
- .O(GPIO_T[51]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[52]_INST_0
- (.I0(gpio_out_t_n[52]),
- .O(GPIO_T[52]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[53]_INST_0
- (.I0(gpio_out_t_n[53]),
- .O(GPIO_T[53]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[54]_INST_0
- (.I0(gpio_out_t_n[54]),
- .O(GPIO_T[54]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[55]_INST_0
- (.I0(gpio_out_t_n[55]),
- .O(GPIO_T[55]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[56]_INST_0
- (.I0(gpio_out_t_n[56]),
- .O(GPIO_T[56]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[57]_INST_0
- (.I0(gpio_out_t_n[57]),
- .O(GPIO_T[57]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[58]_INST_0
- (.I0(gpio_out_t_n[58]),
- .O(GPIO_T[58]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[59]_INST_0
- (.I0(gpio_out_t_n[59]),
- .O(GPIO_T[59]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[5]_INST_0
- (.I0(gpio_out_t_n[5]),
- .O(GPIO_T[5]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[60]_INST_0
- (.I0(gpio_out_t_n[60]),
- .O(GPIO_T[60]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[61]_INST_0
- (.I0(gpio_out_t_n[61]),
- .O(GPIO_T[61]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[62]_INST_0
- (.I0(gpio_out_t_n[62]),
- .O(GPIO_T[62]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[63]_INST_0
- (.I0(gpio_out_t_n[63]),
- .O(GPIO_T[63]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[6]_INST_0
- (.I0(gpio_out_t_n[6]),
- .O(GPIO_T[6]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[7]_INST_0
- (.I0(gpio_out_t_n[7]),
- .O(GPIO_T[7]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[8]_INST_0
- (.I0(gpio_out_t_n[8]),
- .O(GPIO_T[8]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[9]_INST_0
- (.I0(gpio_out_t_n[9]),
- .O(GPIO_T[9]));
- LUT1 #(
- .INIT(2'h1))
- I2C0_SCL_T_INST_0
- (.I0(I2C0_SCL_T_n),
- .O(I2C0_SCL_T));
- LUT1 #(
- .INIT(2'h1))
- I2C0_SDA_T_INST_0
- (.I0(I2C0_SDA_T_n),
- .O(I2C0_SDA_T));
- LUT1 #(
- .INIT(2'h1))
- I2C1_SCL_T_INST_0
- (.I0(I2C1_SCL_T_n),
- .O(I2C1_SCL_T));
- LUT1 #(
- .INIT(2'h1))
- I2C1_SDA_T_INST_0
- (.I0(I2C1_SDA_T_n),
- .O(I2C1_SDA_T));
- (* BOX_TYPE = "PRIMITIVE" *)
- PS7 PS7_i
- (.DDRA(buffered_DDR_Addr),
- .DDRARB(DDR_ARB),
- .DDRBA(buffered_DDR_BankAddr),
- .DDRCASB(buffered_DDR_CAS_n),
- .DDRCKE(buffered_DDR_CKE),
- .DDRCKN(buffered_DDR_Clk_n),
- .DDRCKP(buffered_DDR_Clk),
- .DDRCSB(buffered_DDR_CS_n),
- .DDRDM(buffered_DDR_DM),
- .DDRDQ(buffered_DDR_DQ),
- .DDRDQSN(buffered_DDR_DQS_n),
- .DDRDQSP(buffered_DDR_DQS),
- .DDRDRSTB(buffered_DDR_DRSTB),
- .DDRODT(buffered_DDR_ODT),
- .DDRRASB(buffered_DDR_RAS_n),
- .DDRVRN(buffered_DDR_VRN),
- .DDRVRP(buffered_DDR_VRP),
- .DDRWEB(buffered_DDR_WEB),
- .DMA0ACLK(DMA0_ACLK),
- .DMA0DAREADY(DMA0_DAREADY),
- .DMA0DATYPE(DMA0_DATYPE),
- .DMA0DAVALID(DMA0_DAVALID),
- .DMA0DRLAST(DMA0_DRLAST),
- .DMA0DRREADY(DMA0_DRREADY),
- .DMA0DRTYPE(DMA0_DRTYPE),
- .DMA0DRVALID(DMA0_DRVALID),
- .DMA0RSTN(DMA0_RSTN),
- .DMA1ACLK(DMA1_ACLK),
- .DMA1DAREADY(DMA1_DAREADY),
- .DMA1DATYPE(DMA1_DATYPE),
- .DMA1DAVALID(DMA1_DAVALID),
- .DMA1DRLAST(DMA1_DRLAST),
- .DMA1DRREADY(DMA1_DRREADY),
- .DMA1DRTYPE(DMA1_DRTYPE),
- .DMA1DRVALID(DMA1_DRVALID),
- .DMA1RSTN(DMA1_RSTN),
- .DMA2ACLK(DMA2_ACLK),
- .DMA2DAREADY(DMA2_DAREADY),
- .DMA2DATYPE(DMA2_DATYPE),
- .DMA2DAVALID(DMA2_DAVALID),
- .DMA2DRLAST(DMA2_DRLAST),
- .DMA2DRREADY(DMA2_DRREADY),
- .DMA2DRTYPE(DMA2_DRTYPE),
- .DMA2DRVALID(DMA2_DRVALID),
- .DMA2RSTN(DMA2_RSTN),
- .DMA3ACLK(DMA3_ACLK),
- .DMA3DAREADY(DMA3_DAREADY),
- .DMA3DATYPE(DMA3_DATYPE),
- .DMA3DAVALID(DMA3_DAVALID),
- .DMA3DRLAST(DMA3_DRLAST),
- .DMA3DRREADY(DMA3_DRREADY),
- .DMA3DRTYPE(DMA3_DRTYPE),
- .DMA3DRVALID(DMA3_DRVALID),
- .DMA3RSTN(DMA3_RSTN),
- .EMIOCAN0PHYRX(CAN0_PHY_RX),
- .EMIOCAN0PHYTX(CAN0_PHY_TX),
- .EMIOCAN1PHYRX(CAN1_PHY_RX),
- .EMIOCAN1PHYTX(CAN1_PHY_TX),
- .EMIOENET0EXTINTIN(ENET0_EXT_INTIN),
- .EMIOENET0GMIICOL(1'b0),
- .EMIOENET0GMIICRS(1'b0),
- .EMIOENET0GMIIRXCLK(ENET0_GMII_RX_CLK),
- .EMIOENET0GMIIRXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .EMIOENET0GMIIRXDV(1'b0),
- .EMIOENET0GMIIRXER(1'b0),
- .EMIOENET0GMIITXCLK(ENET0_GMII_TX_CLK),
- .EMIOENET0GMIITXD(NLW_PS7_i_EMIOENET0GMIITXD_UNCONNECTED[7:0]),
- .EMIOENET0GMIITXEN(NLW_PS7_i_EMIOENET0GMIITXEN_UNCONNECTED),
- .EMIOENET0GMIITXER(NLW_PS7_i_EMIOENET0GMIITXER_UNCONNECTED),
- .EMIOENET0MDIOI(ENET0_MDIO_I),
- .EMIOENET0MDIOMDC(ENET0_MDIO_MDC),
- .EMIOENET0MDIOO(ENET0_MDIO_O),
- .EMIOENET0MDIOTN(ENET0_MDIO_T_n),
- .EMIOENET0PTPDELAYREQRX(ENET0_PTP_DELAY_REQ_RX),
- .EMIOENET0PTPDELAYREQTX(ENET0_PTP_DELAY_REQ_TX),
- .EMIOENET0PTPPDELAYREQRX(ENET0_PTP_PDELAY_REQ_RX),
- .EMIOENET0PTPPDELAYREQTX(ENET0_PTP_PDELAY_REQ_TX),
- .EMIOENET0PTPPDELAYRESPRX(ENET0_PTP_PDELAY_RESP_RX),
- .EMIOENET0PTPPDELAYRESPTX(ENET0_PTP_PDELAY_RESP_TX),
- .EMIOENET0PTPSYNCFRAMERX(ENET0_PTP_SYNC_FRAME_RX),
- .EMIOENET0PTPSYNCFRAMETX(ENET0_PTP_SYNC_FRAME_TX),
- .EMIOENET0SOFRX(ENET0_SOF_RX),
- .EMIOENET0SOFTX(ENET0_SOF_TX),
- .EMIOENET1EXTINTIN(ENET1_EXT_INTIN),
- .EMIOENET1GMIICOL(1'b0),
- .EMIOENET1GMIICRS(1'b0),
- .EMIOENET1GMIIRXCLK(ENET1_GMII_RX_CLK),
- .EMIOENET1GMIIRXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .EMIOENET1GMIIRXDV(1'b0),
- .EMIOENET1GMIIRXER(1'b0),
- .EMIOENET1GMIITXCLK(ENET1_GMII_TX_CLK),
- .EMIOENET1GMIITXD(NLW_PS7_i_EMIOENET1GMIITXD_UNCONNECTED[7:0]),
- .EMIOENET1GMIITXEN(NLW_PS7_i_EMIOENET1GMIITXEN_UNCONNECTED),
- .EMIOENET1GMIITXER(NLW_PS7_i_EMIOENET1GMIITXER_UNCONNECTED),
- .EMIOENET1MDIOI(ENET1_MDIO_I),
- .EMIOENET1MDIOMDC(ENET1_MDIO_MDC),
- .EMIOENET1MDIOO(ENET1_MDIO_O),
- .EMIOENET1MDIOTN(ENET1_MDIO_T_n),
- .EMIOENET1PTPDELAYREQRX(ENET1_PTP_DELAY_REQ_RX),
- .EMIOENET1PTPDELAYREQTX(ENET1_PTP_DELAY_REQ_TX),
- .EMIOENET1PTPPDELAYREQRX(ENET1_PTP_PDELAY_REQ_RX),
- .EMIOENET1PTPPDELAYREQTX(ENET1_PTP_PDELAY_REQ_TX),
- .EMIOENET1PTPPDELAYRESPRX(ENET1_PTP_PDELAY_RESP_RX),
- .EMIOENET1PTPPDELAYRESPTX(ENET1_PTP_PDELAY_RESP_TX),
- .EMIOENET1PTPSYNCFRAMERX(ENET1_PTP_SYNC_FRAME_RX),
- .EMIOENET1PTPSYNCFRAMETX(ENET1_PTP_SYNC_FRAME_TX),
- .EMIOENET1SOFRX(ENET1_SOF_RX),
- .EMIOENET1SOFTX(ENET1_SOF_TX),
- .EMIOGPIOI(GPIO_I),
- .EMIOGPIOO(GPIO_O),
- .EMIOGPIOTN(gpio_out_t_n),
- .EMIOI2C0SCLI(I2C0_SCL_I),
- .EMIOI2C0SCLO(I2C0_SCL_O),
- .EMIOI2C0SCLTN(I2C0_SCL_T_n),
- .EMIOI2C0SDAI(I2C0_SDA_I),
- .EMIOI2C0SDAO(I2C0_SDA_O),
- .EMIOI2C0SDATN(I2C0_SDA_T_n),
- .EMIOI2C1SCLI(I2C1_SCL_I),
- .EMIOI2C1SCLO(I2C1_SCL_O),
- .EMIOI2C1SCLTN(I2C1_SCL_T_n),
- .EMIOI2C1SDAI(I2C1_SDA_I),
- .EMIOI2C1SDAO(I2C1_SDA_O),
- .EMIOI2C1SDATN(I2C1_SDA_T_n),
- .EMIOPJTAGTCK(PJTAG_TCK),
- .EMIOPJTAGTDI(PJTAG_TDI),
- .EMIOPJTAGTDO(NLW_PS7_i_EMIOPJTAGTDO_UNCONNECTED),
- .EMIOPJTAGTDTN(NLW_PS7_i_EMIOPJTAGTDTN_UNCONNECTED),
- .EMIOPJTAGTMS(PJTAG_TMS),
- .EMIOSDIO0BUSPOW(SDIO0_BUSPOW),
- .EMIOSDIO0BUSVOLT(SDIO0_BUSVOLT),
- .EMIOSDIO0CDN(SDIO0_CDN),
- .EMIOSDIO0CLK(SDIO0_CLK),
- .EMIOSDIO0CLKFB(SDIO0_CLK_FB),
- .EMIOSDIO0CMDI(SDIO0_CMD_I),
- .EMIOSDIO0CMDO(SDIO0_CMD_O),
- .EMIOSDIO0CMDTN(SDIO0_CMD_T_n),
- .EMIOSDIO0DATAI(SDIO0_DATA_I),
- .EMIOSDIO0DATAO(SDIO0_DATA_O),
- .EMIOSDIO0DATATN(SDIO0_DATA_T_n),
- .EMIOSDIO0LED(SDIO0_LED),
- .EMIOSDIO0WP(SDIO0_WP),
- .EMIOSDIO1BUSPOW(SDIO1_BUSPOW),
- .EMIOSDIO1BUSVOLT(SDIO1_BUSVOLT),
- .EMIOSDIO1CDN(SDIO1_CDN),
- .EMIOSDIO1CLK(SDIO1_CLK),
- .EMIOSDIO1CLKFB(SDIO1_CLK_FB),
- .EMIOSDIO1CMDI(SDIO1_CMD_I),
- .EMIOSDIO1CMDO(SDIO1_CMD_O),
- .EMIOSDIO1CMDTN(SDIO1_CMD_T_n),
- .EMIOSDIO1DATAI(SDIO1_DATA_I),
- .EMIOSDIO1DATAO(SDIO1_DATA_O),
- .EMIOSDIO1DATATN(SDIO1_DATA_T_n),
- .EMIOSDIO1LED(SDIO1_LED),
- .EMIOSDIO1WP(SDIO1_WP),
- .EMIOSPI0MI(SPI0_MISO_I),
- .EMIOSPI0MO(SPI0_MOSI_O),
- .EMIOSPI0MOTN(SPI0_MOSI_T_n),
- .EMIOSPI0SCLKI(SPI0_SCLK_I),
- .EMIOSPI0SCLKO(SPI0_SCLK_O),
- .EMIOSPI0SCLKTN(SPI0_SCLK_T_n),
- .EMIOSPI0SI(SPI0_MOSI_I),
- .EMIOSPI0SO(SPI0_MISO_O),
- .EMIOSPI0SSIN(SPI0_SS_I),
- .EMIOSPI0SSNTN(SPI0_SS_T_n),
- .EMIOSPI0SSON({SPI0_SS2_O,SPI0_SS1_O,SPI0_SS_O}),
- .EMIOSPI0STN(SPI0_MISO_T_n),
- .EMIOSPI1MI(SPI1_MISO_I),
- .EMIOSPI1MO(SPI1_MOSI_O),
- .EMIOSPI1MOTN(SPI1_MOSI_T_n),
- .EMIOSPI1SCLKI(SPI1_SCLK_I),
- .EMIOSPI1SCLKO(SPI1_SCLK_O),
- .EMIOSPI1SCLKTN(SPI1_SCLK_T_n),
- .EMIOSPI1SI(SPI1_MOSI_I),
- .EMIOSPI1SO(SPI1_MISO_O),
- .EMIOSPI1SSIN(SPI1_SS_I),
- .EMIOSPI1SSNTN(SPI1_SS_T_n),
- .EMIOSPI1SSON({SPI1_SS2_O,SPI1_SS1_O,SPI1_SS_O}),
- .EMIOSPI1STN(SPI1_MISO_T_n),
- .EMIOSRAMINTIN(SRAM_INTIN),
- .EMIOTRACECLK(TRACE_CLK),
- .EMIOTRACECTL(NLW_PS7_i_EMIOTRACECTL_UNCONNECTED),
- .EMIOTRACEDATA(NLW_PS7_i_EMIOTRACEDATA_UNCONNECTED[31:0]),
- .EMIOTTC0CLKI({TTC0_CLK2_IN,TTC0_CLK1_IN,TTC0_CLK0_IN}),
- .EMIOTTC0WAVEO({TTC0_WAVE2_OUT,TTC0_WAVE1_OUT,TTC0_WAVE0_OUT}),
- .EMIOTTC1CLKI({TTC1_CLK2_IN,TTC1_CLK1_IN,TTC1_CLK0_IN}),
- .EMIOTTC1WAVEO({TTC1_WAVE2_OUT,TTC1_WAVE1_OUT,TTC1_WAVE0_OUT}),
- .EMIOUART0CTSN(UART0_CTSN),
- .EMIOUART0DCDN(UART0_DCDN),
- .EMIOUART0DSRN(UART0_DSRN),
- .EMIOUART0DTRN(UART0_DTRN),
- .EMIOUART0RIN(UART0_RIN),
- .EMIOUART0RTSN(UART0_RTSN),
- .EMIOUART0RX(UART0_RX),
- .EMIOUART0TX(UART0_TX),
- .EMIOUART1CTSN(UART1_CTSN),
- .EMIOUART1DCDN(UART1_DCDN),
- .EMIOUART1DSRN(UART1_DSRN),
- .EMIOUART1DTRN(UART1_DTRN),
- .EMIOUART1RIN(UART1_RIN),
- .EMIOUART1RTSN(UART1_RTSN),
- .EMIOUART1RX(UART1_RX),
- .EMIOUART1TX(UART1_TX),
- .EMIOUSB0PORTINDCTL(USB0_PORT_INDCTL),
- .EMIOUSB0VBUSPWRFAULT(USB0_VBUS_PWRFAULT),
- .EMIOUSB0VBUSPWRSELECT(USB0_VBUS_PWRSELECT),
- .EMIOUSB1PORTINDCTL(USB1_PORT_INDCTL),
- .EMIOUSB1VBUSPWRFAULT(USB1_VBUS_PWRFAULT),
- .EMIOUSB1VBUSPWRSELECT(USB1_VBUS_PWRSELECT),
- .EMIOWDTCLKI(WDT_CLK_IN),
- .EMIOWDTRSTO(WDT_RST_OUT),
- .EVENTEVENTI(EVENT_EVENTI),
- .EVENTEVENTO(EVENT_EVENTO),
- .EVENTSTANDBYWFE(EVENT_STANDBYWFE),
- .EVENTSTANDBYWFI(EVENT_STANDBYWFI),
- .FCLKCLK({FCLK_CLK3,FCLK_CLK2,FCLK_CLK1,FCLK_CLK_unbuffered}),
- .FCLKCLKTRIGN({1'b0,1'b0,1'b0,1'b0}),
- .FCLKRESETN({FCLK_RESET3_N,FCLK_RESET2_N,FCLK_RESET1_N,FCLK_RESET0_N}),
- .FPGAIDLEN(FPGA_IDLE_N),
- .FTMDTRACEINATID({1'b0,1'b0,1'b0,1'b0}),
- .FTMDTRACEINCLOCK(FTMD_TRACEIN_CLK),
- .FTMDTRACEINDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .FTMDTRACEINVALID(1'b0),
- .FTMTF2PDEBUG(FTMT_F2P_DEBUG),
- .FTMTF2PTRIG({FTMT_F2P_TRIG_3,FTMT_F2P_TRIG_2,FTMT_F2P_TRIG_1,FTMT_F2P_TRIG_0}),
- .FTMTF2PTRIGACK({FTMT_F2P_TRIGACK_3,FTMT_F2P_TRIGACK_2,FTMT_F2P_TRIGACK_1,FTMT_F2P_TRIGACK_0}),
- .FTMTP2FDEBUG(FTMT_P2F_DEBUG),
- .FTMTP2FTRIG({FTMT_P2F_TRIG_3,FTMT_P2F_TRIG_2,FTMT_P2F_TRIG_1,FTMT_P2F_TRIG_0}),
- .FTMTP2FTRIGACK({FTMT_P2F_TRIGACK_3,FTMT_P2F_TRIGACK_2,FTMT_P2F_TRIGACK_1,FTMT_P2F_TRIGACK_0}),
- .IRQF2P({Core1_nFIQ,Core0_nFIQ,Core1_nIRQ,Core0_nIRQ,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,IRQ_F2P}),
- .IRQP2F({IRQ_P2F_DMAC_ABORT,IRQ_P2F_DMAC7,IRQ_P2F_DMAC6,IRQ_P2F_DMAC5,IRQ_P2F_DMAC4,IRQ_P2F_DMAC3,IRQ_P2F_DMAC2,IRQ_P2F_DMAC1,IRQ_P2F_DMAC0,IRQ_P2F_SMC,IRQ_P2F_QSPI,IRQ_P2F_CTI,IRQ_P2F_GPIO,IRQ_P2F_USB0,IRQ_P2F_ENET0,IRQ_P2F_ENET_WAKE0,IRQ_P2F_SDIO0,IRQ_P2F_I2C0,IRQ_P2F_SPI0,IRQ_P2F_UART0,IRQ_P2F_CAN0,IRQ_P2F_USB1,IRQ_P2F_ENET1,IRQ_P2F_ENET_WAKE1,IRQ_P2F_SDIO1,IRQ_P2F_I2C1,IRQ_P2F_SPI1,IRQ_P2F_UART1,IRQ_P2F_CAN1}),
- .MAXIGP0ACLK(M_AXI_GP0_ACLK),
- .MAXIGP0ARADDR(M_AXI_GP0_ARADDR),
- .MAXIGP0ARBURST(M_AXI_GP0_ARBURST),
- .MAXIGP0ARCACHE(\^M_AXI_GP0_ARCACHE ),
- .MAXIGP0ARESETN(M_AXI_GP0_ARESETN),
- .MAXIGP0ARID(M_AXI_GP0_ARID),
- .MAXIGP0ARLEN(M_AXI_GP0_ARLEN),
- .MAXIGP0ARLOCK(M_AXI_GP0_ARLOCK),
- .MAXIGP0ARPROT(M_AXI_GP0_ARPROT),
- .MAXIGP0ARQOS(M_AXI_GP0_ARQOS),
- .MAXIGP0ARREADY(M_AXI_GP0_ARREADY),
- .MAXIGP0ARSIZE(\^M_AXI_GP0_ARSIZE ),
- .MAXIGP0ARVALID(M_AXI_GP0_ARVALID),
- .MAXIGP0AWADDR(M_AXI_GP0_AWADDR),
- .MAXIGP0AWBURST(M_AXI_GP0_AWBURST),
- .MAXIGP0AWCACHE(\^M_AXI_GP0_AWCACHE ),
- .MAXIGP0AWID(M_AXI_GP0_AWID),
- .MAXIGP0AWLEN(M_AXI_GP0_AWLEN),
- .MAXIGP0AWLOCK(M_AXI_GP0_AWLOCK),
- .MAXIGP0AWPROT(M_AXI_GP0_AWPROT),
- .MAXIGP0AWQOS(M_AXI_GP0_AWQOS),
- .MAXIGP0AWREADY(M_AXI_GP0_AWREADY),
- .MAXIGP0AWSIZE(\^M_AXI_GP0_AWSIZE ),
- .MAXIGP0AWVALID(M_AXI_GP0_AWVALID),
- .MAXIGP0BID(M_AXI_GP0_BID),
- .MAXIGP0BREADY(M_AXI_GP0_BREADY),
- .MAXIGP0BRESP(M_AXI_GP0_BRESP),
- .MAXIGP0BVALID(M_AXI_GP0_BVALID),
- .MAXIGP0RDATA(M_AXI_GP0_RDATA),
- .MAXIGP0RID(M_AXI_GP0_RID),
- .MAXIGP0RLAST(M_AXI_GP0_RLAST),
- .MAXIGP0RREADY(M_AXI_GP0_RREADY),
- .MAXIGP0RRESP(M_AXI_GP0_RRESP),
- .MAXIGP0RVALID(M_AXI_GP0_RVALID),
- .MAXIGP0WDATA(M_AXI_GP0_WDATA),
- .MAXIGP0WID(M_AXI_GP0_WID),
- .MAXIGP0WLAST(M_AXI_GP0_WLAST),
- .MAXIGP0WREADY(M_AXI_GP0_WREADY),
- .MAXIGP0WSTRB(M_AXI_GP0_WSTRB),
- .MAXIGP0WVALID(M_AXI_GP0_WVALID),
- .MAXIGP1ACLK(M_AXI_GP1_ACLK),
- .MAXIGP1ARADDR(M_AXI_GP1_ARADDR),
- .MAXIGP1ARBURST(M_AXI_GP1_ARBURST),
- .MAXIGP1ARCACHE(\^M_AXI_GP1_ARCACHE ),
- .MAXIGP1ARESETN(M_AXI_GP1_ARESETN),
- .MAXIGP1ARID(M_AXI_GP1_ARID),
- .MAXIGP1ARLEN(M_AXI_GP1_ARLEN),
- .MAXIGP1ARLOCK(M_AXI_GP1_ARLOCK),
- .MAXIGP1ARPROT(M_AXI_GP1_ARPROT),
- .MAXIGP1ARQOS(M_AXI_GP1_ARQOS),
- .MAXIGP1ARREADY(M_AXI_GP1_ARREADY),
- .MAXIGP1ARSIZE(\^M_AXI_GP1_ARSIZE ),
- .MAXIGP1ARVALID(M_AXI_GP1_ARVALID),
- .MAXIGP1AWADDR(M_AXI_GP1_AWADDR),
- .MAXIGP1AWBURST(M_AXI_GP1_AWBURST),
- .MAXIGP1AWCACHE(\^M_AXI_GP1_AWCACHE ),
- .MAXIGP1AWID(M_AXI_GP1_AWID),
- .MAXIGP1AWLEN(M_AXI_GP1_AWLEN),
- .MAXIGP1AWLOCK(M_AXI_GP1_AWLOCK),
- .MAXIGP1AWPROT(M_AXI_GP1_AWPROT),
- .MAXIGP1AWQOS(M_AXI_GP1_AWQOS),
- .MAXIGP1AWREADY(M_AXI_GP1_AWREADY),
- .MAXIGP1AWSIZE(\^M_AXI_GP1_AWSIZE ),
- .MAXIGP1AWVALID(M_AXI_GP1_AWVALID),
- .MAXIGP1BID(M_AXI_GP1_BID),
- .MAXIGP1BREADY(M_AXI_GP1_BREADY),
- .MAXIGP1BRESP(M_AXI_GP1_BRESP),
- .MAXIGP1BVALID(M_AXI_GP1_BVALID),
- .MAXIGP1RDATA(M_AXI_GP1_RDATA),
- .MAXIGP1RID(M_AXI_GP1_RID),
- .MAXIGP1RLAST(M_AXI_GP1_RLAST),
- .MAXIGP1RREADY(M_AXI_GP1_RREADY),
- .MAXIGP1RRESP(M_AXI_GP1_RRESP),
- .MAXIGP1RVALID(M_AXI_GP1_RVALID),
- .MAXIGP1WDATA(M_AXI_GP1_WDATA),
- .MAXIGP1WID(M_AXI_GP1_WID),
- .MAXIGP1WLAST(M_AXI_GP1_WLAST),
- .MAXIGP1WREADY(M_AXI_GP1_WREADY),
- .MAXIGP1WSTRB(M_AXI_GP1_WSTRB),
- .MAXIGP1WVALID(M_AXI_GP1_WVALID),
- .MIO(buffered_MIO),
- .PSCLK(buffered_PS_CLK),
- .PSPORB(buffered_PS_PORB),
- .PSSRSTB(buffered_PS_SRSTB),
- .SAXIACPACLK(S_AXI_ACP_ACLK),
- .SAXIACPARADDR(S_AXI_ACP_ARADDR),
- .SAXIACPARBURST(S_AXI_ACP_ARBURST),
- .SAXIACPARCACHE(S_AXI_ACP_ARCACHE),
- .SAXIACPARESETN(S_AXI_ACP_ARESETN),
- .SAXIACPARID(S_AXI_ACP_ARID),
- .SAXIACPARLEN(S_AXI_ACP_ARLEN),
- .SAXIACPARLOCK(S_AXI_ACP_ARLOCK),
- .SAXIACPARPROT(S_AXI_ACP_ARPROT),
- .SAXIACPARQOS(S_AXI_ACP_ARQOS),
- .SAXIACPARREADY(S_AXI_ACP_ARREADY),
- .SAXIACPARSIZE(S_AXI_ACP_ARSIZE[1:0]),
- .SAXIACPARUSER(S_AXI_ACP_ARUSER),
- .SAXIACPARVALID(S_AXI_ACP_ARVALID),
- .SAXIACPAWADDR(S_AXI_ACP_AWADDR),
- .SAXIACPAWBURST(S_AXI_ACP_AWBURST),
- .SAXIACPAWCACHE(S_AXI_ACP_AWCACHE),
- .SAXIACPAWID(S_AXI_ACP_AWID),
- .SAXIACPAWLEN(S_AXI_ACP_AWLEN),
- .SAXIACPAWLOCK(S_AXI_ACP_AWLOCK),
- .SAXIACPAWPROT(S_AXI_ACP_AWPROT),
- .SAXIACPAWQOS(S_AXI_ACP_AWQOS),
- .SAXIACPAWREADY(S_AXI_ACP_AWREADY),
- .SAXIACPAWSIZE(S_AXI_ACP_AWSIZE[1:0]),
- .SAXIACPAWUSER(S_AXI_ACP_AWUSER),
- .SAXIACPAWVALID(S_AXI_ACP_AWVALID),
- .SAXIACPBID(S_AXI_ACP_BID),
- .SAXIACPBREADY(S_AXI_ACP_BREADY),
- .SAXIACPBRESP(S_AXI_ACP_BRESP),
- .SAXIACPBVALID(S_AXI_ACP_BVALID),
- .SAXIACPRDATA(S_AXI_ACP_RDATA),
- .SAXIACPRID(S_AXI_ACP_RID),
- .SAXIACPRLAST(S_AXI_ACP_RLAST),
- .SAXIACPRREADY(S_AXI_ACP_RREADY),
- .SAXIACPRRESP(S_AXI_ACP_RRESP),
- .SAXIACPRVALID(S_AXI_ACP_RVALID),
- .SAXIACPWDATA(S_AXI_ACP_WDATA),
- .SAXIACPWID(S_AXI_ACP_WID),
- .SAXIACPWLAST(S_AXI_ACP_WLAST),
- .SAXIACPWREADY(S_AXI_ACP_WREADY),
- .SAXIACPWSTRB(S_AXI_ACP_WSTRB),
- .SAXIACPWVALID(S_AXI_ACP_WVALID),
- .SAXIGP0ACLK(S_AXI_GP0_ACLK),
- .SAXIGP0ARADDR(S_AXI_GP0_ARADDR),
- .SAXIGP0ARBURST(S_AXI_GP0_ARBURST),
- .SAXIGP0ARCACHE(S_AXI_GP0_ARCACHE),
- .SAXIGP0ARESETN(S_AXI_GP0_ARESETN),
- .SAXIGP0ARID(S_AXI_GP0_ARID),
- .SAXIGP0ARLEN(S_AXI_GP0_ARLEN),
- .SAXIGP0ARLOCK(S_AXI_GP0_ARLOCK),
- .SAXIGP0ARPROT(S_AXI_GP0_ARPROT),
- .SAXIGP0ARQOS(S_AXI_GP0_ARQOS),
- .SAXIGP0ARREADY(S_AXI_GP0_ARREADY),
- .SAXIGP0ARSIZE(S_AXI_GP0_ARSIZE[1:0]),
- .SAXIGP0ARVALID(S_AXI_GP0_ARVALID),
- .SAXIGP0AWADDR(S_AXI_GP0_AWADDR),
- .SAXIGP0AWBURST(S_AXI_GP0_AWBURST),
- .SAXIGP0AWCACHE(S_AXI_GP0_AWCACHE),
- .SAXIGP0AWID(S_AXI_GP0_AWID),
- .SAXIGP0AWLEN(S_AXI_GP0_AWLEN),
- .SAXIGP0AWLOCK(S_AXI_GP0_AWLOCK),
- .SAXIGP0AWPROT(S_AXI_GP0_AWPROT),
- .SAXIGP0AWQOS(S_AXI_GP0_AWQOS),
- .SAXIGP0AWREADY(S_AXI_GP0_AWREADY),
- .SAXIGP0AWSIZE(S_AXI_GP0_AWSIZE[1:0]),
- .SAXIGP0AWVALID(S_AXI_GP0_AWVALID),
- .SAXIGP0BID(S_AXI_GP0_BID),
- .SAXIGP0BREADY(S_AXI_GP0_BREADY),
- .SAXIGP0BRESP(S_AXI_GP0_BRESP),
- .SAXIGP0BVALID(S_AXI_GP0_BVALID),
- .SAXIGP0RDATA(S_AXI_GP0_RDATA),
- .SAXIGP0RID(S_AXI_GP0_RID),
- .SAXIGP0RLAST(S_AXI_GP0_RLAST),
- .SAXIGP0RREADY(S_AXI_GP0_RREADY),
- .SAXIGP0RRESP(S_AXI_GP0_RRESP),
- .SAXIGP0RVALID(S_AXI_GP0_RVALID),
- .SAXIGP0WDATA(S_AXI_GP0_WDATA),
- .SAXIGP0WID(S_AXI_GP0_WID),
- .SAXIGP0WLAST(S_AXI_GP0_WLAST),
- .SAXIGP0WREADY(S_AXI_GP0_WREADY),
- .SAXIGP0WSTRB(S_AXI_GP0_WSTRB),
- .SAXIGP0WVALID(S_AXI_GP0_WVALID),
- .SAXIGP1ACLK(S_AXI_GP1_ACLK),
- .SAXIGP1ARADDR(S_AXI_GP1_ARADDR),
- .SAXIGP1ARBURST(S_AXI_GP1_ARBURST),
- .SAXIGP1ARCACHE(S_AXI_GP1_ARCACHE),
- .SAXIGP1ARESETN(S_AXI_GP1_ARESETN),
- .SAXIGP1ARID(S_AXI_GP1_ARID),
- .SAXIGP1ARLEN(S_AXI_GP1_ARLEN),
- .SAXIGP1ARLOCK(S_AXI_GP1_ARLOCK),
- .SAXIGP1ARPROT(S_AXI_GP1_ARPROT),
- .SAXIGP1ARQOS(S_AXI_GP1_ARQOS),
- .SAXIGP1ARREADY(S_AXI_GP1_ARREADY),
- .SAXIGP1ARSIZE(S_AXI_GP1_ARSIZE[1:0]),
- .SAXIGP1ARVALID(S_AXI_GP1_ARVALID),
- .SAXIGP1AWADDR(S_AXI_GP1_AWADDR),
- .SAXIGP1AWBURST(S_AXI_GP1_AWBURST),
- .SAXIGP1AWCACHE(S_AXI_GP1_AWCACHE),
- .SAXIGP1AWID(S_AXI_GP1_AWID),
- .SAXIGP1AWLEN(S_AXI_GP1_AWLEN),
- .SAXIGP1AWLOCK(S_AXI_GP1_AWLOCK),
- .SAXIGP1AWPROT(S_AXI_GP1_AWPROT),
- .SAXIGP1AWQOS(S_AXI_GP1_AWQOS),
- .SAXIGP1AWREADY(S_AXI_GP1_AWREADY),
- .SAXIGP1AWSIZE(S_AXI_GP1_AWSIZE[1:0]),
- .SAXIGP1AWVALID(S_AXI_GP1_AWVALID),
- .SAXIGP1BID(S_AXI_GP1_BID),
- .SAXIGP1BREADY(S_AXI_GP1_BREADY),
- .SAXIGP1BRESP(S_AXI_GP1_BRESP),
- .SAXIGP1BVALID(S_AXI_GP1_BVALID),
- .SAXIGP1RDATA(S_AXI_GP1_RDATA),
- .SAXIGP1RID(S_AXI_GP1_RID),
- .SAXIGP1RLAST(S_AXI_GP1_RLAST),
- .SAXIGP1RREADY(S_AXI_GP1_RREADY),
- .SAXIGP1RRESP(S_AXI_GP1_RRESP),
- .SAXIGP1RVALID(S_AXI_GP1_RVALID),
- .SAXIGP1WDATA(S_AXI_GP1_WDATA),
- .SAXIGP1WID(S_AXI_GP1_WID),
- .SAXIGP1WLAST(S_AXI_GP1_WLAST),
- .SAXIGP1WREADY(S_AXI_GP1_WREADY),
- .SAXIGP1WSTRB(S_AXI_GP1_WSTRB),
- .SAXIGP1WVALID(S_AXI_GP1_WVALID),
- .SAXIHP0ACLK(S_AXI_HP0_ACLK),
- .SAXIHP0ARADDR(S_AXI_HP0_ARADDR),
- .SAXIHP0ARBURST(S_AXI_HP0_ARBURST),
- .SAXIHP0ARCACHE(S_AXI_HP0_ARCACHE),
- .SAXIHP0ARESETN(S_AXI_HP0_ARESETN),
- .SAXIHP0ARID(S_AXI_HP0_ARID),
- .SAXIHP0ARLEN(S_AXI_HP0_ARLEN),
- .SAXIHP0ARLOCK(S_AXI_HP0_ARLOCK),
- .SAXIHP0ARPROT(S_AXI_HP0_ARPROT),
- .SAXIHP0ARQOS(S_AXI_HP0_ARQOS),
- .SAXIHP0ARREADY(S_AXI_HP0_ARREADY),
- .SAXIHP0ARSIZE(S_AXI_HP0_ARSIZE[1:0]),
- .SAXIHP0ARVALID(S_AXI_HP0_ARVALID),
- .SAXIHP0AWADDR(S_AXI_HP0_AWADDR),
- .SAXIHP0AWBURST(S_AXI_HP0_AWBURST),
- .SAXIHP0AWCACHE(S_AXI_HP0_AWCACHE),
- .SAXIHP0AWID(S_AXI_HP0_AWID),
- .SAXIHP0AWLEN(S_AXI_HP0_AWLEN),
- .SAXIHP0AWLOCK(S_AXI_HP0_AWLOCK),
- .SAXIHP0AWPROT(S_AXI_HP0_AWPROT),
- .SAXIHP0AWQOS(S_AXI_HP0_AWQOS),
- .SAXIHP0AWREADY(S_AXI_HP0_AWREADY),
- .SAXIHP0AWSIZE(S_AXI_HP0_AWSIZE[1:0]),
- .SAXIHP0AWVALID(S_AXI_HP0_AWVALID),
- .SAXIHP0BID(S_AXI_HP0_BID),
- .SAXIHP0BREADY(S_AXI_HP0_BREADY),
- .SAXIHP0BRESP(S_AXI_HP0_BRESP),
- .SAXIHP0BVALID(S_AXI_HP0_BVALID),
- .SAXIHP0RACOUNT(S_AXI_HP0_RACOUNT),
- .SAXIHP0RCOUNT(S_AXI_HP0_RCOUNT),
- .SAXIHP0RDATA(S_AXI_HP0_RDATA),
- .SAXIHP0RDISSUECAP1EN(S_AXI_HP0_RDISSUECAP1_EN),
- .SAXIHP0RID(S_AXI_HP0_RID),
- .SAXIHP0RLAST(S_AXI_HP0_RLAST),
- .SAXIHP0RREADY(S_AXI_HP0_RREADY),
- .SAXIHP0RRESP(S_AXI_HP0_RRESP),
- .SAXIHP0RVALID(S_AXI_HP0_RVALID),
- .SAXIHP0WACOUNT(S_AXI_HP0_WACOUNT),
- .SAXIHP0WCOUNT(S_AXI_HP0_WCOUNT),
- .SAXIHP0WDATA(S_AXI_HP0_WDATA),
- .SAXIHP0WID(S_AXI_HP0_WID),
- .SAXIHP0WLAST(S_AXI_HP0_WLAST),
- .SAXIHP0WREADY(S_AXI_HP0_WREADY),
- .SAXIHP0WRISSUECAP1EN(S_AXI_HP0_WRISSUECAP1_EN),
- .SAXIHP0WSTRB(S_AXI_HP0_WSTRB),
- .SAXIHP0WVALID(S_AXI_HP0_WVALID),
- .SAXIHP1ACLK(S_AXI_HP1_ACLK),
- .SAXIHP1ARADDR(S_AXI_HP1_ARADDR),
- .SAXIHP1ARBURST(S_AXI_HP1_ARBURST),
- .SAXIHP1ARCACHE(S_AXI_HP1_ARCACHE),
- .SAXIHP1ARESETN(S_AXI_HP1_ARESETN),
- .SAXIHP1ARID(S_AXI_HP1_ARID),
- .SAXIHP1ARLEN(S_AXI_HP1_ARLEN),
- .SAXIHP1ARLOCK(S_AXI_HP1_ARLOCK),
- .SAXIHP1ARPROT(S_AXI_HP1_ARPROT),
- .SAXIHP1ARQOS(S_AXI_HP1_ARQOS),
- .SAXIHP1ARREADY(S_AXI_HP1_ARREADY),
- .SAXIHP1ARSIZE(S_AXI_HP1_ARSIZE[1:0]),
- .SAXIHP1ARVALID(S_AXI_HP1_ARVALID),
- .SAXIHP1AWADDR(S_AXI_HP1_AWADDR),
- .SAXIHP1AWBURST(S_AXI_HP1_AWBURST),
- .SAXIHP1AWCACHE(S_AXI_HP1_AWCACHE),
- .SAXIHP1AWID(S_AXI_HP1_AWID),
- .SAXIHP1AWLEN(S_AXI_HP1_AWLEN),
- .SAXIHP1AWLOCK(S_AXI_HP1_AWLOCK),
- .SAXIHP1AWPROT(S_AXI_HP1_AWPROT),
- .SAXIHP1AWQOS(S_AXI_HP1_AWQOS),
- .SAXIHP1AWREADY(S_AXI_HP1_AWREADY),
- .SAXIHP1AWSIZE(S_AXI_HP1_AWSIZE[1:0]),
- .SAXIHP1AWVALID(S_AXI_HP1_AWVALID),
- .SAXIHP1BID(S_AXI_HP1_BID),
- .SAXIHP1BREADY(S_AXI_HP1_BREADY),
- .SAXIHP1BRESP(S_AXI_HP1_BRESP),
- .SAXIHP1BVALID(S_AXI_HP1_BVALID),
- .SAXIHP1RACOUNT(S_AXI_HP1_RACOUNT),
- .SAXIHP1RCOUNT(S_AXI_HP1_RCOUNT),
- .SAXIHP1RDATA(S_AXI_HP1_RDATA),
- .SAXIHP1RDISSUECAP1EN(S_AXI_HP1_RDISSUECAP1_EN),
- .SAXIHP1RID(S_AXI_HP1_RID),
- .SAXIHP1RLAST(S_AXI_HP1_RLAST),
- .SAXIHP1RREADY(S_AXI_HP1_RREADY),
- .SAXIHP1RRESP(S_AXI_HP1_RRESP),
- .SAXIHP1RVALID(S_AXI_HP1_RVALID),
- .SAXIHP1WACOUNT(S_AXI_HP1_WACOUNT),
- .SAXIHP1WCOUNT(S_AXI_HP1_WCOUNT),
- .SAXIHP1WDATA(S_AXI_HP1_WDATA),
- .SAXIHP1WID(S_AXI_HP1_WID),
- .SAXIHP1WLAST(S_AXI_HP1_WLAST),
- .SAXIHP1WREADY(S_AXI_HP1_WREADY),
- .SAXIHP1WRISSUECAP1EN(S_AXI_HP1_WRISSUECAP1_EN),
- .SAXIHP1WSTRB(S_AXI_HP1_WSTRB),
- .SAXIHP1WVALID(S_AXI_HP1_WVALID),
- .SAXIHP2ACLK(S_AXI_HP2_ACLK),
- .SAXIHP2ARADDR(S_AXI_HP2_ARADDR),
- .SAXIHP2ARBURST(S_AXI_HP2_ARBURST),
- .SAXIHP2ARCACHE(S_AXI_HP2_ARCACHE),
- .SAXIHP2ARESETN(S_AXI_HP2_ARESETN),
- .SAXIHP2ARID(S_AXI_HP2_ARID),
- .SAXIHP2ARLEN(S_AXI_HP2_ARLEN),
- .SAXIHP2ARLOCK(S_AXI_HP2_ARLOCK),
- .SAXIHP2ARPROT(S_AXI_HP2_ARPROT),
- .SAXIHP2ARQOS(S_AXI_HP2_ARQOS),
- .SAXIHP2ARREADY(S_AXI_HP2_ARREADY),
- .SAXIHP2ARSIZE(S_AXI_HP2_ARSIZE[1:0]),
- .SAXIHP2ARVALID(S_AXI_HP2_ARVALID),
- .SAXIHP2AWADDR(S_AXI_HP2_AWADDR),
- .SAXIHP2AWBURST(S_AXI_HP2_AWBURST),
- .SAXIHP2AWCACHE(S_AXI_HP2_AWCACHE),
- .SAXIHP2AWID(S_AXI_HP2_AWID),
- .SAXIHP2AWLEN(S_AXI_HP2_AWLEN),
- .SAXIHP2AWLOCK(S_AXI_HP2_AWLOCK),
- .SAXIHP2AWPROT(S_AXI_HP2_AWPROT),
- .SAXIHP2AWQOS(S_AXI_HP2_AWQOS),
- .SAXIHP2AWREADY(S_AXI_HP2_AWREADY),
- .SAXIHP2AWSIZE(S_AXI_HP2_AWSIZE[1:0]),
- .SAXIHP2AWVALID(S_AXI_HP2_AWVALID),
- .SAXIHP2BID(S_AXI_HP2_BID),
- .SAXIHP2BREADY(S_AXI_HP2_BREADY),
- .SAXIHP2BRESP(S_AXI_HP2_BRESP),
- .SAXIHP2BVALID(S_AXI_HP2_BVALID),
- .SAXIHP2RACOUNT(S_AXI_HP2_RACOUNT),
- .SAXIHP2RCOUNT(S_AXI_HP2_RCOUNT),
- .SAXIHP2RDATA(S_AXI_HP2_RDATA),
- .SAXIHP2RDISSUECAP1EN(S_AXI_HP2_RDISSUECAP1_EN),
- .SAXIHP2RID(S_AXI_HP2_RID),
- .SAXIHP2RLAST(S_AXI_HP2_RLAST),
- .SAXIHP2RREADY(S_AXI_HP2_RREADY),
- .SAXIHP2RRESP(S_AXI_HP2_RRESP),
- .SAXIHP2RVALID(S_AXI_HP2_RVALID),
- .SAXIHP2WACOUNT(S_AXI_HP2_WACOUNT),
- .SAXIHP2WCOUNT(S_AXI_HP2_WCOUNT),
- .SAXIHP2WDATA(S_AXI_HP2_WDATA),
- .SAXIHP2WID(S_AXI_HP2_WID),
- .SAXIHP2WLAST(S_AXI_HP2_WLAST),
- .SAXIHP2WREADY(S_AXI_HP2_WREADY),
- .SAXIHP2WRISSUECAP1EN(S_AXI_HP2_WRISSUECAP1_EN),
- .SAXIHP2WSTRB(S_AXI_HP2_WSTRB),
- .SAXIHP2WVALID(S_AXI_HP2_WVALID),
- .SAXIHP3ACLK(S_AXI_HP3_ACLK),
- .SAXIHP3ARADDR(S_AXI_HP3_ARADDR),
- .SAXIHP3ARBURST(S_AXI_HP3_ARBURST),
- .SAXIHP3ARCACHE(S_AXI_HP3_ARCACHE),
- .SAXIHP3ARESETN(S_AXI_HP3_ARESETN),
- .SAXIHP3ARID(S_AXI_HP3_ARID),
- .SAXIHP3ARLEN(S_AXI_HP3_ARLEN),
- .SAXIHP3ARLOCK(S_AXI_HP3_ARLOCK),
- .SAXIHP3ARPROT(S_AXI_HP3_ARPROT),
- .SAXIHP3ARQOS(S_AXI_HP3_ARQOS),
- .SAXIHP3ARREADY(S_AXI_HP3_ARREADY),
- .SAXIHP3ARSIZE(S_AXI_HP3_ARSIZE[1:0]),
- .SAXIHP3ARVALID(S_AXI_HP3_ARVALID),
- .SAXIHP3AWADDR(S_AXI_HP3_AWADDR),
- .SAXIHP3AWBURST(S_AXI_HP3_AWBURST),
- .SAXIHP3AWCACHE(S_AXI_HP3_AWCACHE),
- .SAXIHP3AWID(S_AXI_HP3_AWID),
- .SAXIHP3AWLEN(S_AXI_HP3_AWLEN),
- .SAXIHP3AWLOCK(S_AXI_HP3_AWLOCK),
- .SAXIHP3AWPROT(S_AXI_HP3_AWPROT),
- .SAXIHP3AWQOS(S_AXI_HP3_AWQOS),
- .SAXIHP3AWREADY(S_AXI_HP3_AWREADY),
- .SAXIHP3AWSIZE(S_AXI_HP3_AWSIZE[1:0]),
- .SAXIHP3AWVALID(S_AXI_HP3_AWVALID),
- .SAXIHP3BID(S_AXI_HP3_BID),
- .SAXIHP3BREADY(S_AXI_HP3_BREADY),
- .SAXIHP3BRESP(S_AXI_HP3_BRESP),
- .SAXIHP3BVALID(S_AXI_HP3_BVALID),
- .SAXIHP3RACOUNT(S_AXI_HP3_RACOUNT),
- .SAXIHP3RCOUNT(S_AXI_HP3_RCOUNT),
- .SAXIHP3RDATA(S_AXI_HP3_RDATA),
- .SAXIHP3RDISSUECAP1EN(S_AXI_HP3_RDISSUECAP1_EN),
- .SAXIHP3RID(S_AXI_HP3_RID),
- .SAXIHP3RLAST(S_AXI_HP3_RLAST),
- .SAXIHP3RREADY(S_AXI_HP3_RREADY),
- .SAXIHP3RRESP(S_AXI_HP3_RRESP),
- .SAXIHP3RVALID(S_AXI_HP3_RVALID),
- .SAXIHP3WACOUNT(S_AXI_HP3_WACOUNT),
- .SAXIHP3WCOUNT(S_AXI_HP3_WCOUNT),
- .SAXIHP3WDATA(S_AXI_HP3_WDATA),
- .SAXIHP3WID(S_AXI_HP3_WID),
- .SAXIHP3WLAST(S_AXI_HP3_WLAST),
- .SAXIHP3WREADY(S_AXI_HP3_WREADY),
- .SAXIHP3WRISSUECAP1EN(S_AXI_HP3_WRISSUECAP1_EN),
- .SAXIHP3WSTRB(S_AXI_HP3_WSTRB),
- .SAXIHP3WVALID(S_AXI_HP3_WVALID));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF PS_CLK_BIBUF
- (.IO(buffered_PS_CLK),
- .PAD(PS_CLK));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF PS_PORB_BIBUF
- (.IO(buffered_PS_PORB),
- .PAD(PS_PORB));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF PS_SRSTB_BIBUF
- (.IO(buffered_PS_SRSTB),
- .PAD(PS_SRSTB));
- LUT1 #(
- .INIT(2'h1))
- SDIO0_CMD_T_INST_0
- (.I0(SDIO0_CMD_T_n),
- .O(SDIO0_CMD_T));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[0]_INST_0
- (.I0(SDIO0_DATA_T_n[0]),
- .O(SDIO0_DATA_T[0]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[1]_INST_0
- (.I0(SDIO0_DATA_T_n[1]),
- .O(SDIO0_DATA_T[1]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[2]_INST_0
- (.I0(SDIO0_DATA_T_n[2]),
- .O(SDIO0_DATA_T[2]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[3]_INST_0
- (.I0(SDIO0_DATA_T_n[3]),
- .O(SDIO0_DATA_T[3]));
- LUT1 #(
- .INIT(2'h1))
- SDIO1_CMD_T_INST_0
- (.I0(SDIO1_CMD_T_n),
- .O(SDIO1_CMD_T));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[0]_INST_0
- (.I0(SDIO1_DATA_T_n[0]),
- .O(SDIO1_DATA_T[0]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[1]_INST_0
- (.I0(SDIO1_DATA_T_n[1]),
- .O(SDIO1_DATA_T[1]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[2]_INST_0
- (.I0(SDIO1_DATA_T_n[2]),
- .O(SDIO1_DATA_T[2]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[3]_INST_0
- (.I0(SDIO1_DATA_T_n[3]),
- .O(SDIO1_DATA_T[3]));
- LUT1 #(
- .INIT(2'h1))
- SPI0_MISO_T_INST_0
- (.I0(SPI0_MISO_T_n),
- .O(SPI0_MISO_T));
- LUT1 #(
- .INIT(2'h1))
- SPI0_MOSI_T_INST_0
- (.I0(SPI0_MOSI_T_n),
- .O(SPI0_MOSI_T));
- LUT1 #(
- .INIT(2'h1))
- SPI0_SCLK_T_INST_0
- (.I0(SPI0_SCLK_T_n),
- .O(SPI0_SCLK_T));
- LUT1 #(
- .INIT(2'h1))
- SPI0_SS_T_INST_0
- (.I0(SPI0_SS_T_n),
- .O(SPI0_SS_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_MISO_T_INST_0
- (.I0(SPI1_MISO_T_n),
- .O(SPI1_MISO_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_MOSI_T_INST_0
- (.I0(SPI1_MOSI_T_n),
- .O(SPI1_MOSI_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_SCLK_T_INST_0
- (.I0(SPI1_SCLK_T_n),
- .O(SPI1_SCLK_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_SS_T_INST_0
- (.I0(SPI1_SS_T_n),
- .O(SPI1_SS_T));
- VCC VCC
- (.P(\<const1> ));
- (* BOX_TYPE = "PRIMITIVE" *)
- BUFG \buffer_fclk_clk_0.FCLK_CLK_0_BUFG
- (.I(FCLK_CLK_unbuffered),
- .O(FCLK_CLK0));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[0].MIO_BIBUF
- (.IO(buffered_MIO[0]),
- .PAD(MIO[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[10].MIO_BIBUF
- (.IO(buffered_MIO[10]),
- .PAD(MIO[10]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[11].MIO_BIBUF
- (.IO(buffered_MIO[11]),
- .PAD(MIO[11]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[12].MIO_BIBUF
- (.IO(buffered_MIO[12]),
- .PAD(MIO[12]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[13].MIO_BIBUF
- (.IO(buffered_MIO[13]),
- .PAD(MIO[13]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[14].MIO_BIBUF
- (.IO(buffered_MIO[14]),
- .PAD(MIO[14]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[15].MIO_BIBUF
- (.IO(buffered_MIO[15]),
- .PAD(MIO[15]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[16].MIO_BIBUF
- (.IO(buffered_MIO[16]),
- .PAD(MIO[16]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[17].MIO_BIBUF
- (.IO(buffered_MIO[17]),
- .PAD(MIO[17]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[18].MIO_BIBUF
- (.IO(buffered_MIO[18]),
- .PAD(MIO[18]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[19].MIO_BIBUF
- (.IO(buffered_MIO[19]),
- .PAD(MIO[19]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[1].MIO_BIBUF
- (.IO(buffered_MIO[1]),
- .PAD(MIO[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[20].MIO_BIBUF
- (.IO(buffered_MIO[20]),
- .PAD(MIO[20]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[21].MIO_BIBUF
- (.IO(buffered_MIO[21]),
- .PAD(MIO[21]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[22].MIO_BIBUF
- (.IO(buffered_MIO[22]),
- .PAD(MIO[22]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[23].MIO_BIBUF
- (.IO(buffered_MIO[23]),
- .PAD(MIO[23]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[24].MIO_BIBUF
- (.IO(buffered_MIO[24]),
- .PAD(MIO[24]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[25].MIO_BIBUF
- (.IO(buffered_MIO[25]),
- .PAD(MIO[25]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[26].MIO_BIBUF
- (.IO(buffered_MIO[26]),
- .PAD(MIO[26]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[27].MIO_BIBUF
- (.IO(buffered_MIO[27]),
- .PAD(MIO[27]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[28].MIO_BIBUF
- (.IO(buffered_MIO[28]),
- .PAD(MIO[28]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[29].MIO_BIBUF
- (.IO(buffered_MIO[29]),
- .PAD(MIO[29]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[2].MIO_BIBUF
- (.IO(buffered_MIO[2]),
- .PAD(MIO[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[30].MIO_BIBUF
- (.IO(buffered_MIO[30]),
- .PAD(MIO[30]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[31].MIO_BIBUF
- (.IO(buffered_MIO[31]),
- .PAD(MIO[31]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[32].MIO_BIBUF
- (.IO(buffered_MIO[32]),
- .PAD(MIO[32]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[33].MIO_BIBUF
- (.IO(buffered_MIO[33]),
- .PAD(MIO[33]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[34].MIO_BIBUF
- (.IO(buffered_MIO[34]),
- .PAD(MIO[34]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[35].MIO_BIBUF
- (.IO(buffered_MIO[35]),
- .PAD(MIO[35]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[36].MIO_BIBUF
- (.IO(buffered_MIO[36]),
- .PAD(MIO[36]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[37].MIO_BIBUF
- (.IO(buffered_MIO[37]),
- .PAD(MIO[37]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[38].MIO_BIBUF
- (.IO(buffered_MIO[38]),
- .PAD(MIO[38]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[39].MIO_BIBUF
- (.IO(buffered_MIO[39]),
- .PAD(MIO[39]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[3].MIO_BIBUF
- (.IO(buffered_MIO[3]),
- .PAD(MIO[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[40].MIO_BIBUF
- (.IO(buffered_MIO[40]),
- .PAD(MIO[40]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[41].MIO_BIBUF
- (.IO(buffered_MIO[41]),
- .PAD(MIO[41]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[42].MIO_BIBUF
- (.IO(buffered_MIO[42]),
- .PAD(MIO[42]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[43].MIO_BIBUF
- (.IO(buffered_MIO[43]),
- .PAD(MIO[43]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[44].MIO_BIBUF
- (.IO(buffered_MIO[44]),
- .PAD(MIO[44]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[45].MIO_BIBUF
- (.IO(buffered_MIO[45]),
- .PAD(MIO[45]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[46].MIO_BIBUF
- (.IO(buffered_MIO[46]),
- .PAD(MIO[46]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[47].MIO_BIBUF
- (.IO(buffered_MIO[47]),
- .PAD(MIO[47]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[48].MIO_BIBUF
- (.IO(buffered_MIO[48]),
- .PAD(MIO[48]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[49].MIO_BIBUF
- (.IO(buffered_MIO[49]),
- .PAD(MIO[49]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[4].MIO_BIBUF
- (.IO(buffered_MIO[4]),
- .PAD(MIO[4]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[50].MIO_BIBUF
- (.IO(buffered_MIO[50]),
- .PAD(MIO[50]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[51].MIO_BIBUF
- (.IO(buffered_MIO[51]),
- .PAD(MIO[51]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[52].MIO_BIBUF
- (.IO(buffered_MIO[52]),
- .PAD(MIO[52]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[53].MIO_BIBUF
- (.IO(buffered_MIO[53]),
- .PAD(MIO[53]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[5].MIO_BIBUF
- (.IO(buffered_MIO[5]),
- .PAD(MIO[5]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[6].MIO_BIBUF
- (.IO(buffered_MIO[6]),
- .PAD(MIO[6]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[7].MIO_BIBUF
- (.IO(buffered_MIO[7]),
- .PAD(MIO[7]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[8].MIO_BIBUF
- (.IO(buffered_MIO[8]),
- .PAD(MIO[8]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[9].MIO_BIBUF
- (.IO(buffered_MIO[9]),
- .PAD(MIO[9]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk14[0].DDR_BankAddr_BIBUF
- (.IO(buffered_DDR_BankAddr[0]),
- .PAD(DDR_BankAddr[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk14[1].DDR_BankAddr_BIBUF
- (.IO(buffered_DDR_BankAddr[1]),
- .PAD(DDR_BankAddr[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk14[2].DDR_BankAddr_BIBUF
- (.IO(buffered_DDR_BankAddr[2]),
- .PAD(DDR_BankAddr[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[0].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[0]),
- .PAD(DDR_Addr[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[10].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[10]),
- .PAD(DDR_Addr[10]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[11].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[11]),
- .PAD(DDR_Addr[11]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[12].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[12]),
- .PAD(DDR_Addr[12]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[13].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[13]),
- .PAD(DDR_Addr[13]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[14].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[14]),
- .PAD(DDR_Addr[14]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[1].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[1]),
- .PAD(DDR_Addr[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[2].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[2]),
- .PAD(DDR_Addr[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[3].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[3]),
- .PAD(DDR_Addr[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[4].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[4]),
- .PAD(DDR_Addr[4]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[5].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[5]),
- .PAD(DDR_Addr[5]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[6].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[6]),
- .PAD(DDR_Addr[6]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[7].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[7]),
- .PAD(DDR_Addr[7]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[8].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[8]),
- .PAD(DDR_Addr[8]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[9].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[9]),
- .PAD(DDR_Addr[9]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[0].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[0]),
- .PAD(DDR_DM[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[1].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[1]),
- .PAD(DDR_DM[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[2].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[2]),
- .PAD(DDR_DM[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[3].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[3]),
- .PAD(DDR_DM[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[0].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[0]),
- .PAD(DDR_DQ[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[10].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[10]),
- .PAD(DDR_DQ[10]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[11].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[11]),
- .PAD(DDR_DQ[11]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[12].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[12]),
- .PAD(DDR_DQ[12]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[13].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[13]),
- .PAD(DDR_DQ[13]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[14].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[14]),
- .PAD(DDR_DQ[14]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[15].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[15]),
- .PAD(DDR_DQ[15]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[16].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[16]),
- .PAD(DDR_DQ[16]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[17].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[17]),
- .PAD(DDR_DQ[17]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[18].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[18]),
- .PAD(DDR_DQ[18]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[19].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[19]),
- .PAD(DDR_DQ[19]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[1].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[1]),
- .PAD(DDR_DQ[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[20].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[20]),
- .PAD(DDR_DQ[20]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[21].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[21]),
- .PAD(DDR_DQ[21]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[22].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[22]),
- .PAD(DDR_DQ[22]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[23].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[23]),
- .PAD(DDR_DQ[23]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[24].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[24]),
- .PAD(DDR_DQ[24]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[25].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[25]),
- .PAD(DDR_DQ[25]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[26].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[26]),
- .PAD(DDR_DQ[26]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[27].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[27]),
- .PAD(DDR_DQ[27]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[28].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[28]),
- .PAD(DDR_DQ[28]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[29].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[29]),
- .PAD(DDR_DQ[29]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[2].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[2]),
- .PAD(DDR_DQ[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[30].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[30]),
- .PAD(DDR_DQ[30]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[31].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[31]),
- .PAD(DDR_DQ[31]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[3].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[3]),
- .PAD(DDR_DQ[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[4].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[4]),
- .PAD(DDR_DQ[4]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[5].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[5]),
- .PAD(DDR_DQ[5]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[6].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[6]),
- .PAD(DDR_DQ[6]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[7].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[7]),
- .PAD(DDR_DQ[7]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[8].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[8]),
- .PAD(DDR_DQ[8]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[9].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[9]),
- .PAD(DDR_DQ[9]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[0].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[0]),
- .PAD(DDR_DQS_n[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[1].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[1]),
- .PAD(DDR_DQS_n[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[2].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[2]),
- .PAD(DDR_DQS_n[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[3].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[3]),
- .PAD(DDR_DQS_n[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[0].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[0]),
- .PAD(DDR_DQS[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[1].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[1]),
- .PAD(DDR_DQS[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[2].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[2]),
- .PAD(DDR_DQS[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[3].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[3]),
- .PAD(DDR_DQS[3]));
- LUT1 #(
- .INIT(2'h2))
- i_0
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[0] ));
- LUT1 #(
- .INIT(2'h2))
- i_1
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[0] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_10
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[7] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_11
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[7] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_12
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[6] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_13
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[6] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_14
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[5] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_15
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[5] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_16
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[4] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_17
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[4] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_18
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[3] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_19
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[3] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_2
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[0] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_20
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[2] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_21
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[2] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_22
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[1] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_23
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[1] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_3
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[7] ));
- LUT1 #(
- .INIT(2'h2))
- i_4
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[6] ));
- LUT1 #(
- .INIT(2'h2))
- i_5
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[5] ));
- LUT1 #(
- .INIT(2'h2))
- i_6
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[4] ));
- LUT1 #(
- .INIT(2'h2))
- i_7
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[3] ));
- LUT1 #(
- .INIT(2'h2))
- i_8
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[2] ));
- LUT1 #(
- .INIT(2'h2))
- i_9
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[1] ));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_stub.v
deleted file mode 100644
index 9f1c3f6..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_stub.v
+++ /dev/null
@@ -1,111 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:39 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0_stub.v
-// Design : scalp_zynqps_processing_system7_0_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "processing_system7_v5_5_processing_system7,Vivado 2019.2" *)
-module scalp_zynqps_processing_system7_0_0(SPI1_SCLK_I, SPI1_SCLK_O, SPI1_SCLK_T,
- SPI1_MOSI_I, SPI1_MOSI_O, SPI1_MOSI_T, SPI1_MISO_I, SPI1_MISO_O, SPI1_MISO_T, SPI1_SS_I,
- SPI1_SS_O, SPI1_SS1_O, SPI1_SS2_O, SPI1_SS_T, USB0_PORT_INDCTL, USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT, M_AXI_GP0_ARVALID, M_AXI_GP0_AWVALID, M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY, M_AXI_GP0_WLAST, M_AXI_GP0_WVALID, M_AXI_GP0_ARID, M_AXI_GP0_AWID,
- M_AXI_GP0_WID, M_AXI_GP0_ARBURST, M_AXI_GP0_ARLOCK, M_AXI_GP0_ARSIZE, M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK, M_AXI_GP0_AWSIZE, M_AXI_GP0_ARPROT, M_AXI_GP0_AWPROT, M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR, M_AXI_GP0_WDATA, M_AXI_GP0_ARCACHE, M_AXI_GP0_ARLEN, M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE, M_AXI_GP0_AWLEN, M_AXI_GP0_AWQOS, M_AXI_GP0_WSTRB, M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY, M_AXI_GP0_AWREADY, M_AXI_GP0_BVALID, M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID, M_AXI_GP0_WREADY, M_AXI_GP0_BID, M_AXI_GP0_RID, M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP, M_AXI_GP0_RDATA, FCLK_CLK0, FCLK_RESET0_N, MIO, DDR_CAS_n, DDR_CKE, DDR_Clk_n,
- DDR_Clk, DDR_CS_n, DDR_DRSTB, DDR_ODT, DDR_RAS_n, DDR_WEB, DDR_BankAddr, DDR_Addr, DDR_VRN,
- DDR_VRP, DDR_DM, DDR_DQ, DDR_DQS_n, DDR_DQS, PS_SRSTB, PS_CLK, PS_PORB)
-/* synthesis syn_black_box black_box_pad_pin="SPI1_SCLK_I,SPI1_SCLK_O,SPI1_SCLK_T,SPI1_MOSI_I,SPI1_MOSI_O,SPI1_MOSI_T,SPI1_MISO_I,SPI1_MISO_O,SPI1_MISO_T,SPI1_SS_I,SPI1_SS_O,SPI1_SS1_O,SPI1_SS2_O,SPI1_SS_T,USB0_PORT_INDCTL[1:0],USB0_VBUS_PWRSELECT,USB0_VBUS_PWRFAULT,M_AXI_GP0_ARVALID,M_AXI_GP0_AWVALID,M_AXI_GP0_BREADY,M_AXI_GP0_RREADY,M_AXI_GP0_WLAST,M_AXI_GP0_WVALID,M_AXI_GP0_ARID[11:0],M_AXI_GP0_AWID[11:0],M_AXI_GP0_WID[11:0],M_AXI_GP0_ARBURST[1:0],M_AXI_GP0_ARLOCK[1:0],M_AXI_GP0_ARSIZE[2:0],M_AXI_GP0_AWBURST[1:0],M_AXI_GP0_AWLOCK[1:0],M_AXI_GP0_AWSIZE[2:0],M_AXI_GP0_ARPROT[2:0],M_AXI_GP0_AWPROT[2:0],M_AXI_GP0_ARADDR[31:0],M_AXI_GP0_AWADDR[31:0],M_AXI_GP0_WDATA[31:0],M_AXI_GP0_ARCACHE[3:0],M_AXI_GP0_ARLEN[3:0],M_AXI_GP0_ARQOS[3:0],M_AXI_GP0_AWCACHE[3:0],M_AXI_GP0_AWLEN[3:0],M_AXI_GP0_AWQOS[3:0],M_AXI_GP0_WSTRB[3:0],M_AXI_GP0_ACLK,M_AXI_GP0_ARREADY,M_AXI_GP0_AWREADY,M_AXI_GP0_BVALID,M_AXI_GP0_RLAST,M_AXI_GP0_RVALID,M_AXI_GP0_WREADY,M_AXI_GP0_BID[11:0],M_AXI_GP0_RID[11:0],M_AXI_GP0_BRESP[1:0],M_AXI_GP0_RRESP[1:0],M_AXI_GP0_RDATA[31:0],FCLK_CLK0,FCLK_RESET0_N,MIO[53:0],DDR_CAS_n,DDR_CKE,DDR_Clk_n,DDR_Clk,DDR_CS_n,DDR_DRSTB,DDR_ODT,DDR_RAS_n,DDR_WEB,DDR_BankAddr[2:0],DDR_Addr[14:0],DDR_VRN,DDR_VRP,DDR_DM[3:0],DDR_DQ[31:0],DDR_DQS_n[3:0],DDR_DQS[3:0],PS_SRSTB,PS_CLK,PS_PORB" */;
- input SPI1_SCLK_I;
- output SPI1_SCLK_O;
- output SPI1_SCLK_T;
- input SPI1_MOSI_I;
- output SPI1_MOSI_O;
- output SPI1_MOSI_T;
- input SPI1_MISO_I;
- output SPI1_MISO_O;
- output SPI1_MISO_T;
- input SPI1_SS_I;
- output SPI1_SS_O;
- output SPI1_SS1_O;
- output SPI1_SS2_O;
- output SPI1_SS_T;
- output [1:0]USB0_PORT_INDCTL;
- output USB0_VBUS_PWRSELECT;
- input USB0_VBUS_PWRFAULT;
- output M_AXI_GP0_ARVALID;
- output M_AXI_GP0_AWVALID;
- output M_AXI_GP0_BREADY;
- output M_AXI_GP0_RREADY;
- output M_AXI_GP0_WLAST;
- output M_AXI_GP0_WVALID;
- output [11:0]M_AXI_GP0_ARID;
- output [11:0]M_AXI_GP0_AWID;
- output [11:0]M_AXI_GP0_WID;
- output [1:0]M_AXI_GP0_ARBURST;
- output [1:0]M_AXI_GP0_ARLOCK;
- output [2:0]M_AXI_GP0_ARSIZE;
- output [1:0]M_AXI_GP0_AWBURST;
- output [1:0]M_AXI_GP0_AWLOCK;
- output [2:0]M_AXI_GP0_AWSIZE;
- output [2:0]M_AXI_GP0_ARPROT;
- output [2:0]M_AXI_GP0_AWPROT;
- output [31:0]M_AXI_GP0_ARADDR;
- output [31:0]M_AXI_GP0_AWADDR;
- output [31:0]M_AXI_GP0_WDATA;
- output [3:0]M_AXI_GP0_ARCACHE;
- output [3:0]M_AXI_GP0_ARLEN;
- output [3:0]M_AXI_GP0_ARQOS;
- output [3:0]M_AXI_GP0_AWCACHE;
- output [3:0]M_AXI_GP0_AWLEN;
- output [3:0]M_AXI_GP0_AWQOS;
- output [3:0]M_AXI_GP0_WSTRB;
- input M_AXI_GP0_ACLK;
- input M_AXI_GP0_ARREADY;
- input M_AXI_GP0_AWREADY;
- input M_AXI_GP0_BVALID;
- input M_AXI_GP0_RLAST;
- input M_AXI_GP0_RVALID;
- input M_AXI_GP0_WREADY;
- input [11:0]M_AXI_GP0_BID;
- input [11:0]M_AXI_GP0_RID;
- input [1:0]M_AXI_GP0_BRESP;
- input [1:0]M_AXI_GP0_RRESP;
- input [31:0]M_AXI_GP0_RDATA;
- output FCLK_CLK0;
- output FCLK_RESET0_N;
- inout [53:0]MIO;
- inout DDR_CAS_n;
- inout DDR_CKE;
- inout DDR_Clk_n;
- inout DDR_Clk;
- inout DDR_CS_n;
- inout DDR_DRSTB;
- inout DDR_ODT;
- inout DDR_RAS_n;
- inout DDR_WEB;
- inout [2:0]DDR_BankAddr;
- inout [14:0]DDR_Addr;
- inout DDR_VRN;
- inout DDR_VRP;
- inout [3:0]DDR_DM;
- inout [31:0]DDR_DQ;
- inout [3:0]DDR_DQS_n;
- inout [3:0]DDR_DQS;
- inout PS_SRSTB;
- inout PS_CLK;
- inout PS_PORB;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100644
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v
deleted file mode 100644
index 561083e..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v
+++ /dev/null
@@ -1,612 +0,0 @@
-
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-
-`timescale 1ns/1ps
-
-module scalp_zynqps_processing_system7_0_0 (
-SPI1_SCLK_I,
-SPI1_SCLK_O,
-SPI1_SCLK_T,
-SPI1_MOSI_I,
-SPI1_MOSI_O,
-SPI1_MOSI_T,
-SPI1_MISO_I,
-SPI1_MISO_O,
-SPI1_MISO_T,
-SPI1_SS_I,
-SPI1_SS_O,
-SPI1_SS1_O,
-SPI1_SS2_O,
-SPI1_SS_T,
-USB0_PORT_INDCTL,
-USB0_VBUS_PWRSELECT,
-USB0_VBUS_PWRFAULT,
-M_AXI_GP0_ARVALID,
-M_AXI_GP0_AWVALID,
-M_AXI_GP0_BREADY,
-M_AXI_GP0_RREADY,
-M_AXI_GP0_WLAST,
-M_AXI_GP0_WVALID,
-M_AXI_GP0_ARID,
-M_AXI_GP0_AWID,
-M_AXI_GP0_WID,
-M_AXI_GP0_ARBURST,
-M_AXI_GP0_ARLOCK,
-M_AXI_GP0_ARSIZE,
-M_AXI_GP0_AWBURST,
-M_AXI_GP0_AWLOCK,
-M_AXI_GP0_AWSIZE,
-M_AXI_GP0_ARPROT,
-M_AXI_GP0_AWPROT,
-M_AXI_GP0_ARADDR,
-M_AXI_GP0_AWADDR,
-M_AXI_GP0_WDATA,
-M_AXI_GP0_ARCACHE,
-M_AXI_GP0_ARLEN,
-M_AXI_GP0_ARQOS,
-M_AXI_GP0_AWCACHE,
-M_AXI_GP0_AWLEN,
-M_AXI_GP0_AWQOS,
-M_AXI_GP0_WSTRB,
-M_AXI_GP0_ACLK,
-M_AXI_GP0_ARREADY,
-M_AXI_GP0_AWREADY,
-M_AXI_GP0_BVALID,
-M_AXI_GP0_RLAST,
-M_AXI_GP0_RVALID,
-M_AXI_GP0_WREADY,
-M_AXI_GP0_BID,
-M_AXI_GP0_RID,
-M_AXI_GP0_BRESP,
-M_AXI_GP0_RRESP,
-M_AXI_GP0_RDATA,
-FCLK_CLK0,
-FCLK_RESET0_N,
-MIO,
-DDR_CAS_n,
-DDR_CKE,
-DDR_Clk_n,
-DDR_Clk,
-DDR_CS_n,
-DDR_DRSTB,
-DDR_ODT,
-DDR_RAS_n,
-DDR_WEB,
-DDR_BankAddr,
-DDR_Addr,
-DDR_VRN,
-DDR_VRP,
-DDR_DM,
-DDR_DQ,
-DDR_DQS_n,
-DDR_DQS,
-PS_SRSTB,
-PS_CLK,
-PS_PORB
-);
-input SPI1_SCLK_I;
-output SPI1_SCLK_O;
-output SPI1_SCLK_T;
-input SPI1_MOSI_I;
-output SPI1_MOSI_O;
-output SPI1_MOSI_T;
-input SPI1_MISO_I;
-output SPI1_MISO_O;
-output SPI1_MISO_T;
-input SPI1_SS_I;
-output SPI1_SS_O;
-output SPI1_SS1_O;
-output SPI1_SS2_O;
-output SPI1_SS_T;
-output [1 : 0] USB0_PORT_INDCTL;
-output USB0_VBUS_PWRSELECT;
-input USB0_VBUS_PWRFAULT;
-output M_AXI_GP0_ARVALID;
-output M_AXI_GP0_AWVALID;
-output M_AXI_GP0_BREADY;
-output M_AXI_GP0_RREADY;
-output M_AXI_GP0_WLAST;
-output M_AXI_GP0_WVALID;
-output [11 : 0] M_AXI_GP0_ARID;
-output [11 : 0] M_AXI_GP0_AWID;
-output [11 : 0] M_AXI_GP0_WID;
-output [1 : 0] M_AXI_GP0_ARBURST;
-output [1 : 0] M_AXI_GP0_ARLOCK;
-output [2 : 0] M_AXI_GP0_ARSIZE;
-output [1 : 0] M_AXI_GP0_AWBURST;
-output [1 : 0] M_AXI_GP0_AWLOCK;
-output [2 : 0] M_AXI_GP0_AWSIZE;
-output [2 : 0] M_AXI_GP0_ARPROT;
-output [2 : 0] M_AXI_GP0_AWPROT;
-output [31 : 0] M_AXI_GP0_ARADDR;
-output [31 : 0] M_AXI_GP0_AWADDR;
-output [31 : 0] M_AXI_GP0_WDATA;
-output [3 : 0] M_AXI_GP0_ARCACHE;
-output [3 : 0] M_AXI_GP0_ARLEN;
-output [3 : 0] M_AXI_GP0_ARQOS;
-output [3 : 0] M_AXI_GP0_AWCACHE;
-output [3 : 0] M_AXI_GP0_AWLEN;
-output [3 : 0] M_AXI_GP0_AWQOS;
-output [3 : 0] M_AXI_GP0_WSTRB;
-input M_AXI_GP0_ACLK;
-input M_AXI_GP0_ARREADY;
-input M_AXI_GP0_AWREADY;
-input M_AXI_GP0_BVALID;
-input M_AXI_GP0_RLAST;
-input M_AXI_GP0_RVALID;
-input M_AXI_GP0_WREADY;
-input [11 : 0] M_AXI_GP0_BID;
-input [11 : 0] M_AXI_GP0_RID;
-input [1 : 0] M_AXI_GP0_BRESP;
-input [1 : 0] M_AXI_GP0_RRESP;
-input [31 : 0] M_AXI_GP0_RDATA;
-output FCLK_CLK0;
-output FCLK_RESET0_N;
-input [53 : 0] MIO;
-input DDR_CAS_n;
-input DDR_CKE;
-input DDR_Clk_n;
-input DDR_Clk;
-input DDR_CS_n;
-input DDR_DRSTB;
-input DDR_ODT;
-input DDR_RAS_n;
-input DDR_WEB;
-input [2 : 0] DDR_BankAddr;
-input [14 : 0] DDR_Addr;
-input DDR_VRN;
-input DDR_VRP;
-input [3 : 0] DDR_DM;
-input [31 : 0] DDR_DQ;
-input [3 : 0] DDR_DQS_n;
-input [3 : 0] DDR_DQS;
-input PS_SRSTB;
-input PS_CLK;
-input PS_PORB;
-
- processing_system7_vip_v1_0_8 #(
- .C_USE_M_AXI_GP0(1),
- .C_USE_M_AXI_GP1(0),
- .C_USE_S_AXI_ACP(0),
- .C_USE_S_AXI_GP0(0),
- .C_USE_S_AXI_GP1(0),
- .C_USE_S_AXI_HP0(0),
- .C_USE_S_AXI_HP1(0),
- .C_USE_S_AXI_HP2(0),
- .C_USE_S_AXI_HP3(0),
- .C_S_AXI_HP0_DATA_WIDTH(64),
- .C_S_AXI_HP1_DATA_WIDTH(64),
- .C_S_AXI_HP2_DATA_WIDTH(64),
- .C_S_AXI_HP3_DATA_WIDTH(64),
- .C_HIGH_OCM_EN(0),
- .C_FCLK_CLK0_FREQ(125.0),
- .C_FCLK_CLK1_FREQ(10.0),
- .C_FCLK_CLK2_FREQ(10.0),
- .C_FCLK_CLK3_FREQ(10.0),
- .C_M_AXI_GP0_ENABLE_STATIC_REMAP(0),
- .C_M_AXI_GP1_ENABLE_STATIC_REMAP(0),
- .C_M_AXI_GP0_THREAD_ID_WIDTH (12),
- .C_M_AXI_GP1_THREAD_ID_WIDTH (12)
- ) inst (
- .M_AXI_GP0_ARVALID(M_AXI_GP0_ARVALID),
- .M_AXI_GP0_AWVALID(M_AXI_GP0_AWVALID),
- .M_AXI_GP0_BREADY(M_AXI_GP0_BREADY),
- .M_AXI_GP0_RREADY(M_AXI_GP0_RREADY),
- .M_AXI_GP0_WLAST(M_AXI_GP0_WLAST),
- .M_AXI_GP0_WVALID(M_AXI_GP0_WVALID),
- .M_AXI_GP0_ARID(M_AXI_GP0_ARID),
- .M_AXI_GP0_AWID(M_AXI_GP0_AWID),
- .M_AXI_GP0_WID(M_AXI_GP0_WID),
- .M_AXI_GP0_ARBURST(M_AXI_GP0_ARBURST),
- .M_AXI_GP0_ARLOCK(M_AXI_GP0_ARLOCK),
- .M_AXI_GP0_ARSIZE(M_AXI_GP0_ARSIZE),
- .M_AXI_GP0_AWBURST(M_AXI_GP0_AWBURST),
- .M_AXI_GP0_AWLOCK(M_AXI_GP0_AWLOCK),
- .M_AXI_GP0_AWSIZE(M_AXI_GP0_AWSIZE),
- .M_AXI_GP0_ARPROT(M_AXI_GP0_ARPROT),
- .M_AXI_GP0_AWPROT(M_AXI_GP0_AWPROT),
- .M_AXI_GP0_ARADDR(M_AXI_GP0_ARADDR),
- .M_AXI_GP0_AWADDR(M_AXI_GP0_AWADDR),
- .M_AXI_GP0_WDATA(M_AXI_GP0_WDATA),
- .M_AXI_GP0_ARCACHE(M_AXI_GP0_ARCACHE),
- .M_AXI_GP0_ARLEN(M_AXI_GP0_ARLEN),
- .M_AXI_GP0_ARQOS(M_AXI_GP0_ARQOS),
- .M_AXI_GP0_AWCACHE(M_AXI_GP0_AWCACHE),
- .M_AXI_GP0_AWLEN(M_AXI_GP0_AWLEN),
- .M_AXI_GP0_AWQOS(M_AXI_GP0_AWQOS),
- .M_AXI_GP0_WSTRB(M_AXI_GP0_WSTRB),
- .M_AXI_GP0_ACLK(M_AXI_GP0_ACLK),
- .M_AXI_GP0_ARREADY(M_AXI_GP0_ARREADY),
- .M_AXI_GP0_AWREADY(M_AXI_GP0_AWREADY),
- .M_AXI_GP0_BVALID(M_AXI_GP0_BVALID),
- .M_AXI_GP0_RLAST(M_AXI_GP0_RLAST),
- .M_AXI_GP0_RVALID(M_AXI_GP0_RVALID),
- .M_AXI_GP0_WREADY(M_AXI_GP0_WREADY),
- .M_AXI_GP0_BID(M_AXI_GP0_BID),
- .M_AXI_GP0_RID(M_AXI_GP0_RID),
- .M_AXI_GP0_BRESP(M_AXI_GP0_BRESP),
- .M_AXI_GP0_RRESP(M_AXI_GP0_RRESP),
- .M_AXI_GP0_RDATA(M_AXI_GP0_RDATA),
- .M_AXI_GP1_ARVALID(),
- .M_AXI_GP1_AWVALID(),
- .M_AXI_GP1_BREADY(),
- .M_AXI_GP1_RREADY(),
- .M_AXI_GP1_WLAST(),
- .M_AXI_GP1_WVALID(),
- .M_AXI_GP1_ARID(),
- .M_AXI_GP1_AWID(),
- .M_AXI_GP1_WID(),
- .M_AXI_GP1_ARBURST(),
- .M_AXI_GP1_ARLOCK(),
- .M_AXI_GP1_ARSIZE(),
- .M_AXI_GP1_AWBURST(),
- .M_AXI_GP1_AWLOCK(),
- .M_AXI_GP1_AWSIZE(),
- .M_AXI_GP1_ARPROT(),
- .M_AXI_GP1_AWPROT(),
- .M_AXI_GP1_ARADDR(),
- .M_AXI_GP1_AWADDR(),
- .M_AXI_GP1_WDATA(),
- .M_AXI_GP1_ARCACHE(),
- .M_AXI_GP1_ARLEN(),
- .M_AXI_GP1_ARQOS(),
- .M_AXI_GP1_AWCACHE(),
- .M_AXI_GP1_AWLEN(),
- .M_AXI_GP1_AWQOS(),
- .M_AXI_GP1_WSTRB(),
- .M_AXI_GP1_ACLK(1'B0),
- .M_AXI_GP1_ARREADY(1'B0),
- .M_AXI_GP1_AWREADY(1'B0),
- .M_AXI_GP1_BVALID(1'B0),
- .M_AXI_GP1_RLAST(1'B0),
- .M_AXI_GP1_RVALID(1'B0),
- .M_AXI_GP1_WREADY(1'B0),
- .M_AXI_GP1_BID(12'B0),
- .M_AXI_GP1_RID(12'B0),
- .M_AXI_GP1_BRESP(2'B0),
- .M_AXI_GP1_RRESP(2'B0),
- .M_AXI_GP1_RDATA(32'B0),
- .S_AXI_GP0_ARREADY(),
- .S_AXI_GP0_AWREADY(),
- .S_AXI_GP0_BVALID(),
- .S_AXI_GP0_RLAST(),
- .S_AXI_GP0_RVALID(),
- .S_AXI_GP0_WREADY(),
- .S_AXI_GP0_BRESP(),
- .S_AXI_GP0_RRESP(),
- .S_AXI_GP0_RDATA(),
- .S_AXI_GP0_BID(),
- .S_AXI_GP0_RID(),
- .S_AXI_GP0_ACLK(1'B0),
- .S_AXI_GP0_ARVALID(1'B0),
- .S_AXI_GP0_AWVALID(1'B0),
- .S_AXI_GP0_BREADY(1'B0),
- .S_AXI_GP0_RREADY(1'B0),
- .S_AXI_GP0_WLAST(1'B0),
- .S_AXI_GP0_WVALID(1'B0),
- .S_AXI_GP0_ARBURST(2'B0),
- .S_AXI_GP0_ARLOCK(2'B0),
- .S_AXI_GP0_ARSIZE(3'B0),
- .S_AXI_GP0_AWBURST(2'B0),
- .S_AXI_GP0_AWLOCK(2'B0),
- .S_AXI_GP0_AWSIZE(3'B0),
- .S_AXI_GP0_ARPROT(3'B0),
- .S_AXI_GP0_AWPROT(3'B0),
- .S_AXI_GP0_ARADDR(32'B0),
- .S_AXI_GP0_AWADDR(32'B0),
- .S_AXI_GP0_WDATA(32'B0),
- .S_AXI_GP0_ARCACHE(4'B0),
- .S_AXI_GP0_ARLEN(4'B0),
- .S_AXI_GP0_ARQOS(4'B0),
- .S_AXI_GP0_AWCACHE(4'B0),
- .S_AXI_GP0_AWLEN(4'B0),
- .S_AXI_GP0_AWQOS(4'B0),
- .S_AXI_GP0_WSTRB(4'B0),
- .S_AXI_GP0_ARID(6'B0),
- .S_AXI_GP0_AWID(6'B0),
- .S_AXI_GP0_WID(6'B0),
- .S_AXI_GP1_ARREADY(),
- .S_AXI_GP1_AWREADY(),
- .S_AXI_GP1_BVALID(),
- .S_AXI_GP1_RLAST(),
- .S_AXI_GP1_RVALID(),
- .S_AXI_GP1_WREADY(),
- .S_AXI_GP1_BRESP(),
- .S_AXI_GP1_RRESP(),
- .S_AXI_GP1_RDATA(),
- .S_AXI_GP1_BID(),
- .S_AXI_GP1_RID(),
- .S_AXI_GP1_ACLK(1'B0),
- .S_AXI_GP1_ARVALID(1'B0),
- .S_AXI_GP1_AWVALID(1'B0),
- .S_AXI_GP1_BREADY(1'B0),
- .S_AXI_GP1_RREADY(1'B0),
- .S_AXI_GP1_WLAST(1'B0),
- .S_AXI_GP1_WVALID(1'B0),
- .S_AXI_GP1_ARBURST(2'B0),
- .S_AXI_GP1_ARLOCK(2'B0),
- .S_AXI_GP1_ARSIZE(3'B0),
- .S_AXI_GP1_AWBURST(2'B0),
- .S_AXI_GP1_AWLOCK(2'B0),
- .S_AXI_GP1_AWSIZE(3'B0),
- .S_AXI_GP1_ARPROT(3'B0),
- .S_AXI_GP1_AWPROT(3'B0),
- .S_AXI_GP1_ARADDR(32'B0),
- .S_AXI_GP1_AWADDR(32'B0),
- .S_AXI_GP1_WDATA(32'B0),
- .S_AXI_GP1_ARCACHE(4'B0),
- .S_AXI_GP1_ARLEN(4'B0),
- .S_AXI_GP1_ARQOS(4'B0),
- .S_AXI_GP1_AWCACHE(4'B0),
- .S_AXI_GP1_AWLEN(4'B0),
- .S_AXI_GP1_AWQOS(4'B0),
- .S_AXI_GP1_WSTRB(4'B0),
- .S_AXI_GP1_ARID(6'B0),
- .S_AXI_GP1_AWID(6'B0),
- .S_AXI_GP1_WID(6'B0),
- .S_AXI_ACP_ARREADY(),
- .S_AXI_ACP_AWREADY(),
- .S_AXI_ACP_BVALID(),
- .S_AXI_ACP_RLAST(),
- .S_AXI_ACP_RVALID(),
- .S_AXI_ACP_WREADY(),
- .S_AXI_ACP_BRESP(),
- .S_AXI_ACP_RRESP(),
- .S_AXI_ACP_BID(),
- .S_AXI_ACP_RID(),
- .S_AXI_ACP_RDATA(),
- .S_AXI_ACP_ACLK(1'B0),
- .S_AXI_ACP_ARVALID(1'B0),
- .S_AXI_ACP_AWVALID(1'B0),
- .S_AXI_ACP_BREADY(1'B0),
- .S_AXI_ACP_RREADY(1'B0),
- .S_AXI_ACP_WLAST(1'B0),
- .S_AXI_ACP_WVALID(1'B0),
- .S_AXI_ACP_ARID(3'B0),
- .S_AXI_ACP_ARPROT(3'B0),
- .S_AXI_ACP_AWID(3'B0),
- .S_AXI_ACP_AWPROT(3'B0),
- .S_AXI_ACP_WID(3'B0),
- .S_AXI_ACP_ARADDR(32'B0),
- .S_AXI_ACP_AWADDR(32'B0),
- .S_AXI_ACP_ARCACHE(4'B0),
- .S_AXI_ACP_ARLEN(4'B0),
- .S_AXI_ACP_ARQOS(4'B0),
- .S_AXI_ACP_AWCACHE(4'B0),
- .S_AXI_ACP_AWLEN(4'B0),
- .S_AXI_ACP_AWQOS(4'B0),
- .S_AXI_ACP_ARBURST(2'B0),
- .S_AXI_ACP_ARLOCK(2'B0),
- .S_AXI_ACP_ARSIZE(3'B0),
- .S_AXI_ACP_AWBURST(2'B0),
- .S_AXI_ACP_AWLOCK(2'B0),
- .S_AXI_ACP_AWSIZE(3'B0),
- .S_AXI_ACP_ARUSER(5'B0),
- .S_AXI_ACP_AWUSER(5'B0),
- .S_AXI_ACP_WDATA(64'B0),
- .S_AXI_ACP_WSTRB(8'B0),
- .S_AXI_HP0_ARREADY(),
- .S_AXI_HP0_AWREADY(),
- .S_AXI_HP0_BVALID(),
- .S_AXI_HP0_RLAST(),
- .S_AXI_HP0_RVALID(),
- .S_AXI_HP0_WREADY(),
- .S_AXI_HP0_BRESP(),
- .S_AXI_HP0_RRESP(),
- .S_AXI_HP0_BID(),
- .S_AXI_HP0_RID(),
- .S_AXI_HP0_RDATA(),
- .S_AXI_HP0_ACLK(1'B0),
- .S_AXI_HP0_ARVALID(1'B0),
- .S_AXI_HP0_AWVALID(1'B0),
- .S_AXI_HP0_BREADY(1'B0),
- .S_AXI_HP0_RREADY(1'B0),
- .S_AXI_HP0_WLAST(1'B0),
- .S_AXI_HP0_WVALID(1'B0),
- .S_AXI_HP0_ARBURST(2'B0),
- .S_AXI_HP0_ARLOCK(2'B0),
- .S_AXI_HP0_ARSIZE(3'B0),
- .S_AXI_HP0_AWBURST(2'B0),
- .S_AXI_HP0_AWLOCK(2'B0),
- .S_AXI_HP0_AWSIZE(3'B0),
- .S_AXI_HP0_ARPROT(3'B0),
- .S_AXI_HP0_AWPROT(3'B0),
- .S_AXI_HP0_ARADDR(32'B0),
- .S_AXI_HP0_AWADDR(32'B0),
- .S_AXI_HP0_ARCACHE(4'B0),
- .S_AXI_HP0_ARLEN(4'B0),
- .S_AXI_HP0_ARQOS(4'B0),
- .S_AXI_HP0_AWCACHE(4'B0),
- .S_AXI_HP0_AWLEN(4'B0),
- .S_AXI_HP0_AWQOS(4'B0),
- .S_AXI_HP0_ARID(6'B0),
- .S_AXI_HP0_AWID(6'B0),
- .S_AXI_HP0_WID(6'B0),
- .S_AXI_HP0_WDATA(64'B0),
- .S_AXI_HP0_WSTRB(8'B0),
- .S_AXI_HP1_ARREADY(),
- .S_AXI_HP1_AWREADY(),
- .S_AXI_HP1_BVALID(),
- .S_AXI_HP1_RLAST(),
- .S_AXI_HP1_RVALID(),
- .S_AXI_HP1_WREADY(),
- .S_AXI_HP1_BRESP(),
- .S_AXI_HP1_RRESP(),
- .S_AXI_HP1_BID(),
- .S_AXI_HP1_RID(),
- .S_AXI_HP1_RDATA(),
- .S_AXI_HP1_ACLK(1'B0),
- .S_AXI_HP1_ARVALID(1'B0),
- .S_AXI_HP1_AWVALID(1'B0),
- .S_AXI_HP1_BREADY(1'B0),
- .S_AXI_HP1_RREADY(1'B0),
- .S_AXI_HP1_WLAST(1'B0),
- .S_AXI_HP1_WVALID(1'B0),
- .S_AXI_HP1_ARBURST(2'B0),
- .S_AXI_HP1_ARLOCK(2'B0),
- .S_AXI_HP1_ARSIZE(3'B0),
- .S_AXI_HP1_AWBURST(2'B0),
- .S_AXI_HP1_AWLOCK(2'B0),
- .S_AXI_HP1_AWSIZE(3'B0),
- .S_AXI_HP1_ARPROT(3'B0),
- .S_AXI_HP1_AWPROT(3'B0),
- .S_AXI_HP1_ARADDR(32'B0),
- .S_AXI_HP1_AWADDR(32'B0),
- .S_AXI_HP1_ARCACHE(4'B0),
- .S_AXI_HP1_ARLEN(4'B0),
- .S_AXI_HP1_ARQOS(4'B0),
- .S_AXI_HP1_AWCACHE(4'B0),
- .S_AXI_HP1_AWLEN(4'B0),
- .S_AXI_HP1_AWQOS(4'B0),
- .S_AXI_HP1_ARID(6'B0),
- .S_AXI_HP1_AWID(6'B0),
- .S_AXI_HP1_WID(6'B0),
- .S_AXI_HP1_WDATA(64'B0),
- .S_AXI_HP1_WSTRB(8'B0),
- .S_AXI_HP2_ARREADY(),
- .S_AXI_HP2_AWREADY(),
- .S_AXI_HP2_BVALID(),
- .S_AXI_HP2_RLAST(),
- .S_AXI_HP2_RVALID(),
- .S_AXI_HP2_WREADY(),
- .S_AXI_HP2_BRESP(),
- .S_AXI_HP2_RRESP(),
- .S_AXI_HP2_BID(),
- .S_AXI_HP2_RID(),
- .S_AXI_HP2_RDATA(),
- .S_AXI_HP2_ACLK(1'B0),
- .S_AXI_HP2_ARVALID(1'B0),
- .S_AXI_HP2_AWVALID(1'B0),
- .S_AXI_HP2_BREADY(1'B0),
- .S_AXI_HP2_RREADY(1'B0),
- .S_AXI_HP2_WLAST(1'B0),
- .S_AXI_HP2_WVALID(1'B0),
- .S_AXI_HP2_ARBURST(2'B0),
- .S_AXI_HP2_ARLOCK(2'B0),
- .S_AXI_HP2_ARSIZE(3'B0),
- .S_AXI_HP2_AWBURST(2'B0),
- .S_AXI_HP2_AWLOCK(2'B0),
- .S_AXI_HP2_AWSIZE(3'B0),
- .S_AXI_HP2_ARPROT(3'B0),
- .S_AXI_HP2_AWPROT(3'B0),
- .S_AXI_HP2_ARADDR(32'B0),
- .S_AXI_HP2_AWADDR(32'B0),
- .S_AXI_HP2_ARCACHE(4'B0),
- .S_AXI_HP2_ARLEN(4'B0),
- .S_AXI_HP2_ARQOS(4'B0),
- .S_AXI_HP2_AWCACHE(4'B0),
- .S_AXI_HP2_AWLEN(4'B0),
- .S_AXI_HP2_AWQOS(4'B0),
- .S_AXI_HP2_ARID(6'B0),
- .S_AXI_HP2_AWID(6'B0),
- .S_AXI_HP2_WID(6'B0),
- .S_AXI_HP2_WDATA(64'B0),
- .S_AXI_HP2_WSTRB(8'B0),
- .S_AXI_HP3_ARREADY(),
- .S_AXI_HP3_AWREADY(),
- .S_AXI_HP3_BVALID(),
- .S_AXI_HP3_RLAST(),
- .S_AXI_HP3_RVALID(),
- .S_AXI_HP3_WREADY(),
- .S_AXI_HP3_BRESP(),
- .S_AXI_HP3_RRESP(),
- .S_AXI_HP3_BID(),
- .S_AXI_HP3_RID(),
- .S_AXI_HP3_RDATA(),
- .S_AXI_HP3_ACLK(1'B0),
- .S_AXI_HP3_ARVALID(1'B0),
- .S_AXI_HP3_AWVALID(1'B0),
- .S_AXI_HP3_BREADY(1'B0),
- .S_AXI_HP3_RREADY(1'B0),
- .S_AXI_HP3_WLAST(1'B0),
- .S_AXI_HP3_WVALID(1'B0),
- .S_AXI_HP3_ARBURST(2'B0),
- .S_AXI_HP3_ARLOCK(2'B0),
- .S_AXI_HP3_ARSIZE(3'B0),
- .S_AXI_HP3_AWBURST(2'B0),
- .S_AXI_HP3_AWLOCK(2'B0),
- .S_AXI_HP3_AWSIZE(3'B0),
- .S_AXI_HP3_ARPROT(3'B0),
- .S_AXI_HP3_AWPROT(3'B0),
- .S_AXI_HP3_ARADDR(32'B0),
- .S_AXI_HP3_AWADDR(32'B0),
- .S_AXI_HP3_ARCACHE(4'B0),
- .S_AXI_HP3_ARLEN(4'B0),
- .S_AXI_HP3_ARQOS(4'B0),
- .S_AXI_HP3_AWCACHE(4'B0),
- .S_AXI_HP3_AWLEN(4'B0),
- .S_AXI_HP3_AWQOS(4'B0),
- .S_AXI_HP3_ARID(6'B0),
- .S_AXI_HP3_AWID(6'B0),
- .S_AXI_HP3_WID(6'B0),
- .S_AXI_HP3_WDATA(64'B0),
- .S_AXI_HP3_WSTRB(8'B0),
- .FCLK_CLK0(FCLK_CLK0),
-
- .FCLK_CLK1(),
-
- .FCLK_CLK2(),
-
- .FCLK_CLK3(),
- .FCLK_RESET0_N(FCLK_RESET0_N),
- .FCLK_RESET1_N(),
- .FCLK_RESET2_N(),
- .FCLK_RESET3_N(),
- .IRQ_F2P(16'B0),
- .PS_SRSTB(PS_SRSTB),
- .PS_CLK(PS_CLK),
- .PS_PORB(PS_PORB)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100644
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/processing_system7_v5_5_tlm.h
deleted file mode 100644
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim_tlm/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/synth/scalp_zynqps_processing_system7_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/synth/scalp_zynqps_processing_system7_0_0.v
deleted file mode 100644
index 539eab0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/synth/scalp_zynqps_processing_system7_0_0.v
+++ /dev/null
@@ -1,1039 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7:5.5
-// IP Revision: 6
-
-(* X_CORE_INFO = "processing_system7_v5_5_processing_system7,Vivado 2019.2" *)
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_processing_system7_0_0,processing_system7_v5_5_processing_system7,{}" *)
-(* CORE_GENERATION_INFO = "scalp_zynqps_processing_system7_0_0,processing_system7_v5_5_processing_system7,{x_ipProduct=Vivado 2019.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=processing_system7,x_ipVersion=5.5,x_ipCoreRevision=6,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED,C_EN_EMIO_PJTAG=0,C_EN_EMIO_ENET0=0,C_EN_EMIO_ENET1=0,C_EN_EMIO_TRACE=0,C_INCLUDE_TRACE_BUFFER=0,C_TRACE_BUFFER_FIFO_SIZE=128,USE_TRACE_DATA_EDGE_DETECTOR=0,C_TRACE_PIPELINE_WIDTH=8,C_TRACE_BUFFER_CLOCK_DELAY=12,C_EMIO_GPIO_WIDTH=64,C_INCLUDE_ACP_TRANS_C\
-HECK=0,C_USE_DEFAULT_ACP_USER_VAL=0,C_S_AXI_ACP_ARUSER_VAL=31,C_S_AXI_ACP_AWUSER_VAL=31,C_M_AXI_GP0_ID_WIDTH=12,C_M_AXI_GP0_ENABLE_STATIC_REMAP=0,C_M_AXI_GP1_ID_WIDTH=12,C_M_AXI_GP1_ENABLE_STATIC_REMAP=0,C_S_AXI_GP0_ID_WIDTH=6,C_S_AXI_GP1_ID_WIDTH=6,C_S_AXI_ACP_ID_WIDTH=3,C_S_AXI_HP0_ID_WIDTH=6,C_S_AXI_HP0_DATA_WIDTH=64,C_S_AXI_HP1_ID_WIDTH=6,C_S_AXI_HP1_DATA_WIDTH=64,C_S_AXI_HP2_ID_WIDTH=6,C_S_AXI_HP2_DATA_WIDTH=64,C_S_AXI_HP3_ID_WIDTH=6,C_S_AXI_HP3_DATA_WIDTH=64,C_M_AXI_GP0_THREAD_ID_WIDTH=12,\
-C_M_AXI_GP1_THREAD_ID_WIDTH=12,C_NUM_F2P_INTR_INPUTS=1,C_IRQ_F2P_MODE=DIRECT,C_DQ_WIDTH=32,C_DQS_WIDTH=4,C_DM_WIDTH=4,C_MIO_PRIMITIVE=54,C_TRACE_INTERNAL_WIDTH=2,C_USE_AXI_NONSECURE=0,C_USE_M_AXI_GP0=1,C_USE_M_AXI_GP1=0,C_USE_S_AXI_GP0=0,C_USE_S_AXI_GP1=0,C_USE_S_AXI_HP0=0,C_USE_S_AXI_HP1=0,C_USE_S_AXI_HP2=0,C_USE_S_AXI_HP3=0,C_USE_S_AXI_ACP=0,C_PS7_SI_REV=PRODUCTION,C_FCLK_CLK0_BUF=TRUE,C_FCLK_CLK1_BUF=FALSE,C_FCLK_CLK2_BUF=FALSE,C_FCLK_CLK3_BUF=FALSE,C_PACKAGE_NAME=clg485,C_GP0_EN_MODIFIABLE_T\
-XN=1,C_GP1_EN_MODIFIABLE_TXN=1}" *)
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_processing_system7_0_0 (
- SPI1_SCLK_I,
- SPI1_SCLK_O,
- SPI1_SCLK_T,
- SPI1_MOSI_I,
- SPI1_MOSI_O,
- SPI1_MOSI_T,
- SPI1_MISO_I,
- SPI1_MISO_O,
- SPI1_MISO_T,
- SPI1_SS_I,
- SPI1_SS_O,
- SPI1_SS1_O,
- SPI1_SS2_O,
- SPI1_SS_T,
- USB0_PORT_INDCTL,
- USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT,
- M_AXI_GP0_ARVALID,
- M_AXI_GP0_AWVALID,
- M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY,
- M_AXI_GP0_WLAST,
- M_AXI_GP0_WVALID,
- M_AXI_GP0_ARID,
- M_AXI_GP0_AWID,
- M_AXI_GP0_WID,
- M_AXI_GP0_ARBURST,
- M_AXI_GP0_ARLOCK,
- M_AXI_GP0_ARSIZE,
- M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK,
- M_AXI_GP0_AWSIZE,
- M_AXI_GP0_ARPROT,
- M_AXI_GP0_AWPROT,
- M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR,
- M_AXI_GP0_WDATA,
- M_AXI_GP0_ARCACHE,
- M_AXI_GP0_ARLEN,
- M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE,
- M_AXI_GP0_AWLEN,
- M_AXI_GP0_AWQOS,
- M_AXI_GP0_WSTRB,
- M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY,
- M_AXI_GP0_AWREADY,
- M_AXI_GP0_BVALID,
- M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID,
- M_AXI_GP0_WREADY,
- M_AXI_GP0_BID,
- M_AXI_GP0_RID,
- M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP,
- M_AXI_GP0_RDATA,
- FCLK_CLK0,
- FCLK_RESET0_N,
- MIO,
- DDR_CAS_n,
- DDR_CKE,
- DDR_Clk_n,
- DDR_Clk,
- DDR_CS_n,
- DDR_DRSTB,
- DDR_ODT,
- DDR_RAS_n,
- DDR_WEB,
- DDR_BankAddr,
- DDR_Addr,
- DDR_VRN,
- DDR_VRP,
- DDR_DM,
- DDR_DQ,
- DDR_DQS_n,
- DDR_DQS,
- PS_SRSTB,
- PS_CLK,
- PS_PORB
-);
-
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_I" *)
-input wire SPI1_SCLK_I;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_O" *)
-output wire SPI1_SCLK_O;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_T" *)
-output wire SPI1_SCLK_T;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_I" *)
-input wire SPI1_MOSI_I;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_O" *)
-output wire SPI1_MOSI_O;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_T" *)
-output wire SPI1_MOSI_T;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_I" *)
-input wire SPI1_MISO_I;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_O" *)
-output wire SPI1_MISO_O;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_T" *)
-output wire SPI1_MISO_T;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_I" *)
-input wire SPI1_SS_I;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_O" *)
-output wire SPI1_SS_O;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS1_O" *)
-output wire SPI1_SS1_O;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS2_O" *)
-output wire SPI1_SS2_O;
-(* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_T" *)
-output wire SPI1_SS_T;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 PORT_INDCTL" *)
-output wire [1 : 0] USB0_PORT_INDCTL;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 VBUS_PWRSELECT" *)
-output wire USB0_VBUS_PWRSELECT;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 VBUS_PWRFAULT" *)
-input wire USB0_VBUS_PWRFAULT;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARVALID" *)
-output wire M_AXI_GP0_ARVALID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWVALID" *)
-output wire M_AXI_GP0_AWVALID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BREADY" *)
-output wire M_AXI_GP0_BREADY;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RREADY" *)
-output wire M_AXI_GP0_RREADY;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WLAST" *)
-output wire M_AXI_GP0_WLAST;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WVALID" *)
-output wire M_AXI_GP0_WVALID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARID" *)
-output wire [11 : 0] M_AXI_GP0_ARID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWID" *)
-output wire [11 : 0] M_AXI_GP0_AWID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WID" *)
-output wire [11 : 0] M_AXI_GP0_WID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARBURST" *)
-output wire [1 : 0] M_AXI_GP0_ARBURST;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARLOCK" *)
-output wire [1 : 0] M_AXI_GP0_ARLOCK;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARSIZE" *)
-output wire [2 : 0] M_AXI_GP0_ARSIZE;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWBURST" *)
-output wire [1 : 0] M_AXI_GP0_AWBURST;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWLOCK" *)
-output wire [1 : 0] M_AXI_GP0_AWLOCK;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWSIZE" *)
-output wire [2 : 0] M_AXI_GP0_AWSIZE;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARPROT" *)
-output wire [2 : 0] M_AXI_GP0_ARPROT;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWPROT" *)
-output wire [2 : 0] M_AXI_GP0_AWPROT;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARADDR" *)
-output wire [31 : 0] M_AXI_GP0_ARADDR;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWADDR" *)
-output wire [31 : 0] M_AXI_GP0_AWADDR;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WDATA" *)
-output wire [31 : 0] M_AXI_GP0_WDATA;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARCACHE" *)
-output wire [3 : 0] M_AXI_GP0_ARCACHE;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARLEN" *)
-output wire [3 : 0] M_AXI_GP0_ARLEN;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARQOS" *)
-output wire [3 : 0] M_AXI_GP0_ARQOS;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWCACHE" *)
-output wire [3 : 0] M_AXI_GP0_AWCACHE;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWLEN" *)
-output wire [3 : 0] M_AXI_GP0_AWLEN;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWQOS" *)
-output wire [3 : 0] M_AXI_GP0_AWQOS;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WSTRB" *)
-output wire [3 : 0] M_AXI_GP0_WSTRB;
-(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME M_AXI_GP0_ACLK, ASSOCIATED_BUSIF M_AXI_GP0, FREQ_HZ 125000000, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, INSERT_VIP 0" *)
-(* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 M_AXI_GP0_ACLK CLK" *)
-input wire M_AXI_GP0_ACLK;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARREADY" *)
-input wire M_AXI_GP0_ARREADY;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWREADY" *)
-input wire M_AXI_GP0_AWREADY;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BVALID" *)
-input wire M_AXI_GP0_BVALID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RLAST" *)
-input wire M_AXI_GP0_RLAST;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RVALID" *)
-input wire M_AXI_GP0_RVALID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WREADY" *)
-input wire M_AXI_GP0_WREADY;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BID" *)
-input wire [11 : 0] M_AXI_GP0_BID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RID" *)
-input wire [11 : 0] M_AXI_GP0_RID;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BRESP" *)
-input wire [1 : 0] M_AXI_GP0_BRESP;
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RRESP" *)
-input wire [1 : 0] M_AXI_GP0_RRESP;
-(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME M_AXI_GP0, SUPPORTS_NARROW_BURST 0, NUM_WRITE_OUTSTANDING 8, NUM_READ_OUTSTANDING 8, DATA_WIDTH 32, PROTOCOL AXI3, FREQ_HZ 125000000, ID_WIDTH 12, ADDR_WIDTH 32, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 1, HAS_LOCK 1, HAS_PROT 1, HAS_CACHE 1, HAS_QOS 1, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, MAX_BURST_LENGTH 16, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, NUM_READ_\
-THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *)
-(* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RDATA" *)
-input wire [31 : 0] M_AXI_GP0_RDATA;
-(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FCLK_CLK0, FREQ_HZ 125000000, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, INSERT_VIP 0" *)
-(* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 FCLK_CLK0 CLK" *)
-output wire FCLK_CLK0;
-(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FCLK_RESET0_N, POLARITY ACTIVE_LOW, INSERT_VIP 0" *)
-(* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 FCLK_RESET0_N RST" *)
-output wire FCLK_RESET0_N;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO MIO" *)
-inout wire [53 : 0] MIO;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CAS_N" *)
-inout wire DDR_CAS_n;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CKE" *)
-inout wire DDR_CKE;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CK_N" *)
-inout wire DDR_Clk_n;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CK_P" *)
-inout wire DDR_Clk;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CS_N" *)
-inout wire DDR_CS_n;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR RESET_N" *)
-inout wire DDR_DRSTB;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR ODT" *)
-inout wire DDR_ODT;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR RAS_N" *)
-inout wire DDR_RAS_n;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR WE_N" *)
-inout wire DDR_WEB;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR BA" *)
-inout wire [2 : 0] DDR_BankAddr;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR ADDR" *)
-inout wire [14 : 0] DDR_Addr;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRN" *)
-inout wire DDR_VRN;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRP" *)
-inout wire DDR_VRP;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DM" *)
-inout wire [3 : 0] DDR_DM;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQ" *)
-inout wire [31 : 0] DDR_DQ;
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQS_N" *)
-inout wire [3 : 0] DDR_DQS_n;
-(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME DDR, CAN_DEBUG false, TIMEPERIOD_PS 1250, MEMORY_TYPE COMPONENTS, DATA_WIDTH 8, CS_ENABLED true, DATA_MASK_ENABLED true, SLOT Single, MEM_ADDR_MAP ROW_COLUMN_BANK, BURST_LENGTH 8, AXI_ARBITRATION_SCHEME TDM, CAS_LATENCY 11, CAS_WRITE_LATENCY 11" *)
-(* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQS_P" *)
-inout wire [3 : 0] DDR_DQS;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_SRSTB" *)
-inout wire PS_SRSTB;
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_CLK" *)
-inout wire PS_CLK;
-(* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FIXED_IO, CAN_DEBUG false" *)
-(* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_PORB" *)
-inout wire PS_PORB;
-
- processing_system7_v5_5_processing_system7 #(
- .C_EN_EMIO_PJTAG(0),
- .C_EN_EMIO_ENET0(0),
- .C_EN_EMIO_ENET1(0),
- .C_EN_EMIO_TRACE(0),
- .C_INCLUDE_TRACE_BUFFER(0),
- .C_TRACE_BUFFER_FIFO_SIZE(128),
- .USE_TRACE_DATA_EDGE_DETECTOR(0),
- .C_TRACE_PIPELINE_WIDTH(8),
- .C_TRACE_BUFFER_CLOCK_DELAY(12),
- .C_EMIO_GPIO_WIDTH(64),
- .C_INCLUDE_ACP_TRANS_CHECK(0),
- .C_USE_DEFAULT_ACP_USER_VAL(0),
- .C_S_AXI_ACP_ARUSER_VAL(31),
- .C_S_AXI_ACP_AWUSER_VAL(31),
- .C_M_AXI_GP0_ID_WIDTH(12),
- .C_M_AXI_GP0_ENABLE_STATIC_REMAP(0),
- .C_M_AXI_GP1_ID_WIDTH(12),
- .C_M_AXI_GP1_ENABLE_STATIC_REMAP(0),
- .C_S_AXI_GP0_ID_WIDTH(6),
- .C_S_AXI_GP1_ID_WIDTH(6),
- .C_S_AXI_ACP_ID_WIDTH(3),
- .C_S_AXI_HP0_ID_WIDTH(6),
- .C_S_AXI_HP0_DATA_WIDTH(64),
- .C_S_AXI_HP1_ID_WIDTH(6),
- .C_S_AXI_HP1_DATA_WIDTH(64),
- .C_S_AXI_HP2_ID_WIDTH(6),
- .C_S_AXI_HP2_DATA_WIDTH(64),
- .C_S_AXI_HP3_ID_WIDTH(6),
- .C_S_AXI_HP3_DATA_WIDTH(64),
- .C_M_AXI_GP0_THREAD_ID_WIDTH(12),
- .C_M_AXI_GP1_THREAD_ID_WIDTH(12),
- .C_NUM_F2P_INTR_INPUTS(1),
- .C_IRQ_F2P_MODE("DIRECT"),
- .C_DQ_WIDTH(32),
- .C_DQS_WIDTH(4),
- .C_DM_WIDTH(4),
- .C_MIO_PRIMITIVE(54),
- .C_TRACE_INTERNAL_WIDTH(2),
- .C_USE_AXI_NONSECURE(0),
- .C_USE_M_AXI_GP0(1),
- .C_USE_M_AXI_GP1(0),
- .C_USE_S_AXI_GP0(0),
- .C_USE_S_AXI_GP1(0),
- .C_USE_S_AXI_HP0(0),
- .C_USE_S_AXI_HP1(0),
- .C_USE_S_AXI_HP2(0),
- .C_USE_S_AXI_HP3(0),
- .C_USE_S_AXI_ACP(0),
- .C_PS7_SI_REV("PRODUCTION"),
- .C_FCLK_CLK0_BUF("TRUE"),
- .C_FCLK_CLK1_BUF("FALSE"),
- .C_FCLK_CLK2_BUF("FALSE"),
- .C_FCLK_CLK3_BUF("FALSE"),
- .C_PACKAGE_NAME("clg485"),
- .C_GP0_EN_MODIFIABLE_TXN(1),
- .C_GP1_EN_MODIFIABLE_TXN(1)
- ) inst (
- .CAN0_PHY_TX(),
- .CAN0_PHY_RX(1'B0),
- .CAN1_PHY_TX(),
- .CAN1_PHY_RX(1'B0),
- .ENET0_GMII_TX_EN(),
- .ENET0_GMII_TX_ER(),
- .ENET0_MDIO_MDC(),
- .ENET0_MDIO_O(),
- .ENET0_MDIO_T(),
- .ENET0_PTP_DELAY_REQ_RX(),
- .ENET0_PTP_DELAY_REQ_TX(),
- .ENET0_PTP_PDELAY_REQ_RX(),
- .ENET0_PTP_PDELAY_REQ_TX(),
- .ENET0_PTP_PDELAY_RESP_RX(),
- .ENET0_PTP_PDELAY_RESP_TX(),
- .ENET0_PTP_SYNC_FRAME_RX(),
- .ENET0_PTP_SYNC_FRAME_TX(),
- .ENET0_SOF_RX(),
- .ENET0_SOF_TX(),
- .ENET0_GMII_TXD(),
- .ENET0_GMII_COL(1'B0),
- .ENET0_GMII_CRS(1'B0),
- .ENET0_GMII_RX_CLK(1'B0),
- .ENET0_GMII_RX_DV(1'B0),
- .ENET0_GMII_RX_ER(1'B0),
- .ENET0_GMII_TX_CLK(1'B0),
- .ENET0_MDIO_I(1'B0),
- .ENET0_EXT_INTIN(1'B0),
- .ENET0_GMII_RXD(8'B0),
- .ENET1_GMII_TX_EN(),
- .ENET1_GMII_TX_ER(),
- .ENET1_MDIO_MDC(),
- .ENET1_MDIO_O(),
- .ENET1_MDIO_T(),
- .ENET1_PTP_DELAY_REQ_RX(),
- .ENET1_PTP_DELAY_REQ_TX(),
- .ENET1_PTP_PDELAY_REQ_RX(),
- .ENET1_PTP_PDELAY_REQ_TX(),
- .ENET1_PTP_PDELAY_RESP_RX(),
- .ENET1_PTP_PDELAY_RESP_TX(),
- .ENET1_PTP_SYNC_FRAME_RX(),
- .ENET1_PTP_SYNC_FRAME_TX(),
- .ENET1_SOF_RX(),
- .ENET1_SOF_TX(),
- .ENET1_GMII_TXD(),
- .ENET1_GMII_COL(1'B0),
- .ENET1_GMII_CRS(1'B0),
- .ENET1_GMII_RX_CLK(1'B0),
- .ENET1_GMII_RX_DV(1'B0),
- .ENET1_GMII_RX_ER(1'B0),
- .ENET1_GMII_TX_CLK(1'B0),
- .ENET1_MDIO_I(1'B0),
- .ENET1_EXT_INTIN(1'B0),
- .ENET1_GMII_RXD(8'B0),
- .GPIO_I(64'B0),
- .GPIO_O(),
- .GPIO_T(),
- .I2C0_SDA_I(1'B0),
- .I2C0_SDA_O(),
- .I2C0_SDA_T(),
- .I2C0_SCL_I(1'B0),
- .I2C0_SCL_O(),
- .I2C0_SCL_T(),
- .I2C1_SDA_I(1'B0),
- .I2C1_SDA_O(),
- .I2C1_SDA_T(),
- .I2C1_SCL_I(1'B0),
- .I2C1_SCL_O(),
- .I2C1_SCL_T(),
- .PJTAG_TCK(1'B0),
- .PJTAG_TMS(1'B0),
- .PJTAG_TDI(1'B0),
- .PJTAG_TDO(),
- .SDIO0_CLK(),
- .SDIO0_CLK_FB(1'B0),
- .SDIO0_CMD_O(),
- .SDIO0_CMD_I(1'B0),
- .SDIO0_CMD_T(),
- .SDIO0_DATA_I(4'B0),
- .SDIO0_DATA_O(),
- .SDIO0_DATA_T(),
- .SDIO0_LED(),
- .SDIO0_CDN(1'B0),
- .SDIO0_WP(1'B0),
- .SDIO0_BUSPOW(),
- .SDIO0_BUSVOLT(),
- .SDIO1_CLK(),
- .SDIO1_CLK_FB(1'B0),
- .SDIO1_CMD_O(),
- .SDIO1_CMD_I(1'B0),
- .SDIO1_CMD_T(),
- .SDIO1_DATA_I(4'B0),
- .SDIO1_DATA_O(),
- .SDIO1_DATA_T(),
- .SDIO1_LED(),
- .SDIO1_CDN(1'B0),
- .SDIO1_WP(1'B0),
- .SDIO1_BUSPOW(),
- .SDIO1_BUSVOLT(),
- .SPI0_SCLK_I(1'B0),
- .SPI0_SCLK_O(),
- .SPI0_SCLK_T(),
- .SPI0_MOSI_I(1'B0),
- .SPI0_MOSI_O(),
- .SPI0_MOSI_T(),
- .SPI0_MISO_I(1'B0),
- .SPI0_MISO_O(),
- .SPI0_MISO_T(),
- .SPI0_SS_I(1'B0),
- .SPI0_SS_O(),
- .SPI0_SS1_O(),
- .SPI0_SS2_O(),
- .SPI0_SS_T(),
- .SPI1_SCLK_I(SPI1_SCLK_I),
- .SPI1_SCLK_O(SPI1_SCLK_O),
- .SPI1_SCLK_T(SPI1_SCLK_T),
- .SPI1_MOSI_I(SPI1_MOSI_I),
- .SPI1_MOSI_O(SPI1_MOSI_O),
- .SPI1_MOSI_T(SPI1_MOSI_T),
- .SPI1_MISO_I(SPI1_MISO_I),
- .SPI1_MISO_O(SPI1_MISO_O),
- .SPI1_MISO_T(SPI1_MISO_T),
- .SPI1_SS_I(SPI1_SS_I),
- .SPI1_SS_O(SPI1_SS_O),
- .SPI1_SS1_O(SPI1_SS1_O),
- .SPI1_SS2_O(SPI1_SS2_O),
- .SPI1_SS_T(SPI1_SS_T),
- .UART0_DTRN(),
- .UART0_RTSN(),
- .UART0_TX(),
- .UART0_CTSN(1'B0),
- .UART0_DCDN(1'B0),
- .UART0_DSRN(1'B0),
- .UART0_RIN(1'B0),
- .UART0_RX(1'B1),
- .UART1_DTRN(),
- .UART1_RTSN(),
- .UART1_TX(),
- .UART1_CTSN(1'B0),
- .UART1_DCDN(1'B0),
- .UART1_DSRN(1'B0),
- .UART1_RIN(1'B0),
- .UART1_RX(1'B1),
- .TTC0_WAVE0_OUT(),
- .TTC0_WAVE1_OUT(),
- .TTC0_WAVE2_OUT(),
- .TTC0_CLK0_IN(1'B0),
- .TTC0_CLK1_IN(1'B0),
- .TTC0_CLK2_IN(1'B0),
- .TTC1_WAVE0_OUT(),
- .TTC1_WAVE1_OUT(),
- .TTC1_WAVE2_OUT(),
- .TTC1_CLK0_IN(1'B0),
- .TTC1_CLK1_IN(1'B0),
- .TTC1_CLK2_IN(1'B0),
- .WDT_CLK_IN(1'B0),
- .WDT_RST_OUT(),
- .TRACE_CLK(1'B0),
- .TRACE_CLK_OUT(),
- .TRACE_CTL(),
- .TRACE_DATA(),
- .USB0_PORT_INDCTL(USB0_PORT_INDCTL),
- .USB0_VBUS_PWRSELECT(USB0_VBUS_PWRSELECT),
- .USB0_VBUS_PWRFAULT(USB0_VBUS_PWRFAULT),
- .USB1_PORT_INDCTL(),
- .USB1_VBUS_PWRSELECT(),
- .USB1_VBUS_PWRFAULT(1'B0),
- .SRAM_INTIN(1'B0),
- .M_AXI_GP0_ARVALID(M_AXI_GP0_ARVALID),
- .M_AXI_GP0_AWVALID(M_AXI_GP0_AWVALID),
- .M_AXI_GP0_BREADY(M_AXI_GP0_BREADY),
- .M_AXI_GP0_RREADY(M_AXI_GP0_RREADY),
- .M_AXI_GP0_WLAST(M_AXI_GP0_WLAST),
- .M_AXI_GP0_WVALID(M_AXI_GP0_WVALID),
- .M_AXI_GP0_ARID(M_AXI_GP0_ARID),
- .M_AXI_GP0_AWID(M_AXI_GP0_AWID),
- .M_AXI_GP0_WID(M_AXI_GP0_WID),
- .M_AXI_GP0_ARBURST(M_AXI_GP0_ARBURST),
- .M_AXI_GP0_ARLOCK(M_AXI_GP0_ARLOCK),
- .M_AXI_GP0_ARSIZE(M_AXI_GP0_ARSIZE),
- .M_AXI_GP0_AWBURST(M_AXI_GP0_AWBURST),
- .M_AXI_GP0_AWLOCK(M_AXI_GP0_AWLOCK),
- .M_AXI_GP0_AWSIZE(M_AXI_GP0_AWSIZE),
- .M_AXI_GP0_ARPROT(M_AXI_GP0_ARPROT),
- .M_AXI_GP0_AWPROT(M_AXI_GP0_AWPROT),
- .M_AXI_GP0_ARADDR(M_AXI_GP0_ARADDR),
- .M_AXI_GP0_AWADDR(M_AXI_GP0_AWADDR),
- .M_AXI_GP0_WDATA(M_AXI_GP0_WDATA),
- .M_AXI_GP0_ARCACHE(M_AXI_GP0_ARCACHE),
- .M_AXI_GP0_ARLEN(M_AXI_GP0_ARLEN),
- .M_AXI_GP0_ARQOS(M_AXI_GP0_ARQOS),
- .M_AXI_GP0_AWCACHE(M_AXI_GP0_AWCACHE),
- .M_AXI_GP0_AWLEN(M_AXI_GP0_AWLEN),
- .M_AXI_GP0_AWQOS(M_AXI_GP0_AWQOS),
- .M_AXI_GP0_WSTRB(M_AXI_GP0_WSTRB),
- .M_AXI_GP0_ACLK(M_AXI_GP0_ACLK),
- .M_AXI_GP0_ARREADY(M_AXI_GP0_ARREADY),
- .M_AXI_GP0_AWREADY(M_AXI_GP0_AWREADY),
- .M_AXI_GP0_BVALID(M_AXI_GP0_BVALID),
- .M_AXI_GP0_RLAST(M_AXI_GP0_RLAST),
- .M_AXI_GP0_RVALID(M_AXI_GP0_RVALID),
- .M_AXI_GP0_WREADY(M_AXI_GP0_WREADY),
- .M_AXI_GP0_BID(M_AXI_GP0_BID),
- .M_AXI_GP0_RID(M_AXI_GP0_RID),
- .M_AXI_GP0_BRESP(M_AXI_GP0_BRESP),
- .M_AXI_GP0_RRESP(M_AXI_GP0_RRESP),
- .M_AXI_GP0_RDATA(M_AXI_GP0_RDATA),
- .M_AXI_GP1_ARVALID(),
- .M_AXI_GP1_AWVALID(),
- .M_AXI_GP1_BREADY(),
- .M_AXI_GP1_RREADY(),
- .M_AXI_GP1_WLAST(),
- .M_AXI_GP1_WVALID(),
- .M_AXI_GP1_ARID(),
- .M_AXI_GP1_AWID(),
- .M_AXI_GP1_WID(),
- .M_AXI_GP1_ARBURST(),
- .M_AXI_GP1_ARLOCK(),
- .M_AXI_GP1_ARSIZE(),
- .M_AXI_GP1_AWBURST(),
- .M_AXI_GP1_AWLOCK(),
- .M_AXI_GP1_AWSIZE(),
- .M_AXI_GP1_ARPROT(),
- .M_AXI_GP1_AWPROT(),
- .M_AXI_GP1_ARADDR(),
- .M_AXI_GP1_AWADDR(),
- .M_AXI_GP1_WDATA(),
- .M_AXI_GP1_ARCACHE(),
- .M_AXI_GP1_ARLEN(),
- .M_AXI_GP1_ARQOS(),
- .M_AXI_GP1_AWCACHE(),
- .M_AXI_GP1_AWLEN(),
- .M_AXI_GP1_AWQOS(),
- .M_AXI_GP1_WSTRB(),
- .M_AXI_GP1_ACLK(1'B0),
- .M_AXI_GP1_ARREADY(1'B0),
- .M_AXI_GP1_AWREADY(1'B0),
- .M_AXI_GP1_BVALID(1'B0),
- .M_AXI_GP1_RLAST(1'B0),
- .M_AXI_GP1_RVALID(1'B0),
- .M_AXI_GP1_WREADY(1'B0),
- .M_AXI_GP1_BID(12'B0),
- .M_AXI_GP1_RID(12'B0),
- .M_AXI_GP1_BRESP(2'B0),
- .M_AXI_GP1_RRESP(2'B0),
- .M_AXI_GP1_RDATA(32'B0),
- .S_AXI_GP0_ARREADY(),
- .S_AXI_GP0_AWREADY(),
- .S_AXI_GP0_BVALID(),
- .S_AXI_GP0_RLAST(),
- .S_AXI_GP0_RVALID(),
- .S_AXI_GP0_WREADY(),
- .S_AXI_GP0_BRESP(),
- .S_AXI_GP0_RRESP(),
- .S_AXI_GP0_RDATA(),
- .S_AXI_GP0_BID(),
- .S_AXI_GP0_RID(),
- .S_AXI_GP0_ACLK(1'B0),
- .S_AXI_GP0_ARVALID(1'B0),
- .S_AXI_GP0_AWVALID(1'B0),
- .S_AXI_GP0_BREADY(1'B0),
- .S_AXI_GP0_RREADY(1'B0),
- .S_AXI_GP0_WLAST(1'B0),
- .S_AXI_GP0_WVALID(1'B0),
- .S_AXI_GP0_ARBURST(2'B0),
- .S_AXI_GP0_ARLOCK(2'B0),
- .S_AXI_GP0_ARSIZE(3'B0),
- .S_AXI_GP0_AWBURST(2'B0),
- .S_AXI_GP0_AWLOCK(2'B0),
- .S_AXI_GP0_AWSIZE(3'B0),
- .S_AXI_GP0_ARPROT(3'B0),
- .S_AXI_GP0_AWPROT(3'B0),
- .S_AXI_GP0_ARADDR(32'B0),
- .S_AXI_GP0_AWADDR(32'B0),
- .S_AXI_GP0_WDATA(32'B0),
- .S_AXI_GP0_ARCACHE(4'B0),
- .S_AXI_GP0_ARLEN(4'B0),
- .S_AXI_GP0_ARQOS(4'B0),
- .S_AXI_GP0_AWCACHE(4'B0),
- .S_AXI_GP0_AWLEN(4'B0),
- .S_AXI_GP0_AWQOS(4'B0),
- .S_AXI_GP0_WSTRB(4'B0),
- .S_AXI_GP0_ARID(6'B0),
- .S_AXI_GP0_AWID(6'B0),
- .S_AXI_GP0_WID(6'B0),
- .S_AXI_GP1_ARREADY(),
- .S_AXI_GP1_AWREADY(),
- .S_AXI_GP1_BVALID(),
- .S_AXI_GP1_RLAST(),
- .S_AXI_GP1_RVALID(),
- .S_AXI_GP1_WREADY(),
- .S_AXI_GP1_BRESP(),
- .S_AXI_GP1_RRESP(),
- .S_AXI_GP1_RDATA(),
- .S_AXI_GP1_BID(),
- .S_AXI_GP1_RID(),
- .S_AXI_GP1_ACLK(1'B0),
- .S_AXI_GP1_ARVALID(1'B0),
- .S_AXI_GP1_AWVALID(1'B0),
- .S_AXI_GP1_BREADY(1'B0),
- .S_AXI_GP1_RREADY(1'B0),
- .S_AXI_GP1_WLAST(1'B0),
- .S_AXI_GP1_WVALID(1'B0),
- .S_AXI_GP1_ARBURST(2'B0),
- .S_AXI_GP1_ARLOCK(2'B0),
- .S_AXI_GP1_ARSIZE(3'B0),
- .S_AXI_GP1_AWBURST(2'B0),
- .S_AXI_GP1_AWLOCK(2'B0),
- .S_AXI_GP1_AWSIZE(3'B0),
- .S_AXI_GP1_ARPROT(3'B0),
- .S_AXI_GP1_AWPROT(3'B0),
- .S_AXI_GP1_ARADDR(32'B0),
- .S_AXI_GP1_AWADDR(32'B0),
- .S_AXI_GP1_WDATA(32'B0),
- .S_AXI_GP1_ARCACHE(4'B0),
- .S_AXI_GP1_ARLEN(4'B0),
- .S_AXI_GP1_ARQOS(4'B0),
- .S_AXI_GP1_AWCACHE(4'B0),
- .S_AXI_GP1_AWLEN(4'B0),
- .S_AXI_GP1_AWQOS(4'B0),
- .S_AXI_GP1_WSTRB(4'B0),
- .S_AXI_GP1_ARID(6'B0),
- .S_AXI_GP1_AWID(6'B0),
- .S_AXI_GP1_WID(6'B0),
- .S_AXI_ACP_ARREADY(),
- .S_AXI_ACP_AWREADY(),
- .S_AXI_ACP_BVALID(),
- .S_AXI_ACP_RLAST(),
- .S_AXI_ACP_RVALID(),
- .S_AXI_ACP_WREADY(),
- .S_AXI_ACP_BRESP(),
- .S_AXI_ACP_RRESP(),
- .S_AXI_ACP_BID(),
- .S_AXI_ACP_RID(),
- .S_AXI_ACP_RDATA(),
- .S_AXI_ACP_ACLK(1'B0),
- .S_AXI_ACP_ARVALID(1'B0),
- .S_AXI_ACP_AWVALID(1'B0),
- .S_AXI_ACP_BREADY(1'B0),
- .S_AXI_ACP_RREADY(1'B0),
- .S_AXI_ACP_WLAST(1'B0),
- .S_AXI_ACP_WVALID(1'B0),
- .S_AXI_ACP_ARID(3'B0),
- .S_AXI_ACP_ARPROT(3'B0),
- .S_AXI_ACP_AWID(3'B0),
- .S_AXI_ACP_AWPROT(3'B0),
- .S_AXI_ACP_WID(3'B0),
- .S_AXI_ACP_ARADDR(32'B0),
- .S_AXI_ACP_AWADDR(32'B0),
- .S_AXI_ACP_ARCACHE(4'B0),
- .S_AXI_ACP_ARLEN(4'B0),
- .S_AXI_ACP_ARQOS(4'B0),
- .S_AXI_ACP_AWCACHE(4'B0),
- .S_AXI_ACP_AWLEN(4'B0),
- .S_AXI_ACP_AWQOS(4'B0),
- .S_AXI_ACP_ARBURST(2'B0),
- .S_AXI_ACP_ARLOCK(2'B0),
- .S_AXI_ACP_ARSIZE(3'B0),
- .S_AXI_ACP_AWBURST(2'B0),
- .S_AXI_ACP_AWLOCK(2'B0),
- .S_AXI_ACP_AWSIZE(3'B0),
- .S_AXI_ACP_ARUSER(5'B0),
- .S_AXI_ACP_AWUSER(5'B0),
- .S_AXI_ACP_WDATA(64'B0),
- .S_AXI_ACP_WSTRB(8'B0),
- .S_AXI_HP0_ARREADY(),
- .S_AXI_HP0_AWREADY(),
- .S_AXI_HP0_BVALID(),
- .S_AXI_HP0_RLAST(),
- .S_AXI_HP0_RVALID(),
- .S_AXI_HP0_WREADY(),
- .S_AXI_HP0_BRESP(),
- .S_AXI_HP0_RRESP(),
- .S_AXI_HP0_BID(),
- .S_AXI_HP0_RID(),
- .S_AXI_HP0_RDATA(),
- .S_AXI_HP0_RCOUNT(),
- .S_AXI_HP0_WCOUNT(),
- .S_AXI_HP0_RACOUNT(),
- .S_AXI_HP0_WACOUNT(),
- .S_AXI_HP0_ACLK(1'B0),
- .S_AXI_HP0_ARVALID(1'B0),
- .S_AXI_HP0_AWVALID(1'B0),
- .S_AXI_HP0_BREADY(1'B0),
- .S_AXI_HP0_RDISSUECAP1_EN(1'B0),
- .S_AXI_HP0_RREADY(1'B0),
- .S_AXI_HP0_WLAST(1'B0),
- .S_AXI_HP0_WRISSUECAP1_EN(1'B0),
- .S_AXI_HP0_WVALID(1'B0),
- .S_AXI_HP0_ARBURST(2'B0),
- .S_AXI_HP0_ARLOCK(2'B0),
- .S_AXI_HP0_ARSIZE(3'B0),
- .S_AXI_HP0_AWBURST(2'B0),
- .S_AXI_HP0_AWLOCK(2'B0),
- .S_AXI_HP0_AWSIZE(3'B0),
- .S_AXI_HP0_ARPROT(3'B0),
- .S_AXI_HP0_AWPROT(3'B0),
- .S_AXI_HP0_ARADDR(32'B0),
- .S_AXI_HP0_AWADDR(32'B0),
- .S_AXI_HP0_ARCACHE(4'B0),
- .S_AXI_HP0_ARLEN(4'B0),
- .S_AXI_HP0_ARQOS(4'B0),
- .S_AXI_HP0_AWCACHE(4'B0),
- .S_AXI_HP0_AWLEN(4'B0),
- .S_AXI_HP0_AWQOS(4'B0),
- .S_AXI_HP0_ARID(6'B0),
- .S_AXI_HP0_AWID(6'B0),
- .S_AXI_HP0_WID(6'B0),
- .S_AXI_HP0_WDATA(64'B0),
- .S_AXI_HP0_WSTRB(8'B0),
- .S_AXI_HP1_ARREADY(),
- .S_AXI_HP1_AWREADY(),
- .S_AXI_HP1_BVALID(),
- .S_AXI_HP1_RLAST(),
- .S_AXI_HP1_RVALID(),
- .S_AXI_HP1_WREADY(),
- .S_AXI_HP1_BRESP(),
- .S_AXI_HP1_RRESP(),
- .S_AXI_HP1_BID(),
- .S_AXI_HP1_RID(),
- .S_AXI_HP1_RDATA(),
- .S_AXI_HP1_RCOUNT(),
- .S_AXI_HP1_WCOUNT(),
- .S_AXI_HP1_RACOUNT(),
- .S_AXI_HP1_WACOUNT(),
- .S_AXI_HP1_ACLK(1'B0),
- .S_AXI_HP1_ARVALID(1'B0),
- .S_AXI_HP1_AWVALID(1'B0),
- .S_AXI_HP1_BREADY(1'B0),
- .S_AXI_HP1_RDISSUECAP1_EN(1'B0),
- .S_AXI_HP1_RREADY(1'B0),
- .S_AXI_HP1_WLAST(1'B0),
- .S_AXI_HP1_WRISSUECAP1_EN(1'B0),
- .S_AXI_HP1_WVALID(1'B0),
- .S_AXI_HP1_ARBURST(2'B0),
- .S_AXI_HP1_ARLOCK(2'B0),
- .S_AXI_HP1_ARSIZE(3'B0),
- .S_AXI_HP1_AWBURST(2'B0),
- .S_AXI_HP1_AWLOCK(2'B0),
- .S_AXI_HP1_AWSIZE(3'B0),
- .S_AXI_HP1_ARPROT(3'B0),
- .S_AXI_HP1_AWPROT(3'B0),
- .S_AXI_HP1_ARADDR(32'B0),
- .S_AXI_HP1_AWADDR(32'B0),
- .S_AXI_HP1_ARCACHE(4'B0),
- .S_AXI_HP1_ARLEN(4'B0),
- .S_AXI_HP1_ARQOS(4'B0),
- .S_AXI_HP1_AWCACHE(4'B0),
- .S_AXI_HP1_AWLEN(4'B0),
- .S_AXI_HP1_AWQOS(4'B0),
- .S_AXI_HP1_ARID(6'B0),
- .S_AXI_HP1_AWID(6'B0),
- .S_AXI_HP1_WID(6'B0),
- .S_AXI_HP1_WDATA(64'B0),
- .S_AXI_HP1_WSTRB(8'B0),
- .S_AXI_HP2_ARREADY(),
- .S_AXI_HP2_AWREADY(),
- .S_AXI_HP2_BVALID(),
- .S_AXI_HP2_RLAST(),
- .S_AXI_HP2_RVALID(),
- .S_AXI_HP2_WREADY(),
- .S_AXI_HP2_BRESP(),
- .S_AXI_HP2_RRESP(),
- .S_AXI_HP2_BID(),
- .S_AXI_HP2_RID(),
- .S_AXI_HP2_RDATA(),
- .S_AXI_HP2_RCOUNT(),
- .S_AXI_HP2_WCOUNT(),
- .S_AXI_HP2_RACOUNT(),
- .S_AXI_HP2_WACOUNT(),
- .S_AXI_HP2_ACLK(1'B0),
- .S_AXI_HP2_ARVALID(1'B0),
- .S_AXI_HP2_AWVALID(1'B0),
- .S_AXI_HP2_BREADY(1'B0),
- .S_AXI_HP2_RDISSUECAP1_EN(1'B0),
- .S_AXI_HP2_RREADY(1'B0),
- .S_AXI_HP2_WLAST(1'B0),
- .S_AXI_HP2_WRISSUECAP1_EN(1'B0),
- .S_AXI_HP2_WVALID(1'B0),
- .S_AXI_HP2_ARBURST(2'B0),
- .S_AXI_HP2_ARLOCK(2'B0),
- .S_AXI_HP2_ARSIZE(3'B0),
- .S_AXI_HP2_AWBURST(2'B0),
- .S_AXI_HP2_AWLOCK(2'B0),
- .S_AXI_HP2_AWSIZE(3'B0),
- .S_AXI_HP2_ARPROT(3'B0),
- .S_AXI_HP2_AWPROT(3'B0),
- .S_AXI_HP2_ARADDR(32'B0),
- .S_AXI_HP2_AWADDR(32'B0),
- .S_AXI_HP2_ARCACHE(4'B0),
- .S_AXI_HP2_ARLEN(4'B0),
- .S_AXI_HP2_ARQOS(4'B0),
- .S_AXI_HP2_AWCACHE(4'B0),
- .S_AXI_HP2_AWLEN(4'B0),
- .S_AXI_HP2_AWQOS(4'B0),
- .S_AXI_HP2_ARID(6'B0),
- .S_AXI_HP2_AWID(6'B0),
- .S_AXI_HP2_WID(6'B0),
- .S_AXI_HP2_WDATA(64'B0),
- .S_AXI_HP2_WSTRB(8'B0),
- .S_AXI_HP3_ARREADY(),
- .S_AXI_HP3_AWREADY(),
- .S_AXI_HP3_BVALID(),
- .S_AXI_HP3_RLAST(),
- .S_AXI_HP3_RVALID(),
- .S_AXI_HP3_WREADY(),
- .S_AXI_HP3_BRESP(),
- .S_AXI_HP3_RRESP(),
- .S_AXI_HP3_BID(),
- .S_AXI_HP3_RID(),
- .S_AXI_HP3_RDATA(),
- .S_AXI_HP3_RCOUNT(),
- .S_AXI_HP3_WCOUNT(),
- .S_AXI_HP3_RACOUNT(),
- .S_AXI_HP3_WACOUNT(),
- .S_AXI_HP3_ACLK(1'B0),
- .S_AXI_HP3_ARVALID(1'B0),
- .S_AXI_HP3_AWVALID(1'B0),
- .S_AXI_HP3_BREADY(1'B0),
- .S_AXI_HP3_RDISSUECAP1_EN(1'B0),
- .S_AXI_HP3_RREADY(1'B0),
- .S_AXI_HP3_WLAST(1'B0),
- .S_AXI_HP3_WRISSUECAP1_EN(1'B0),
- .S_AXI_HP3_WVALID(1'B0),
- .S_AXI_HP3_ARBURST(2'B0),
- .S_AXI_HP3_ARLOCK(2'B0),
- .S_AXI_HP3_ARSIZE(3'B0),
- .S_AXI_HP3_AWBURST(2'B0),
- .S_AXI_HP3_AWLOCK(2'B0),
- .S_AXI_HP3_AWSIZE(3'B0),
- .S_AXI_HP3_ARPROT(3'B0),
- .S_AXI_HP3_AWPROT(3'B0),
- .S_AXI_HP3_ARADDR(32'B0),
- .S_AXI_HP3_AWADDR(32'B0),
- .S_AXI_HP3_ARCACHE(4'B0),
- .S_AXI_HP3_ARLEN(4'B0),
- .S_AXI_HP3_ARQOS(4'B0),
- .S_AXI_HP3_AWCACHE(4'B0),
- .S_AXI_HP3_AWLEN(4'B0),
- .S_AXI_HP3_AWQOS(4'B0),
- .S_AXI_HP3_ARID(6'B0),
- .S_AXI_HP3_AWID(6'B0),
- .S_AXI_HP3_WID(6'B0),
- .S_AXI_HP3_WDATA(64'B0),
- .S_AXI_HP3_WSTRB(8'B0),
- .IRQ_P2F_DMAC_ABORT(),
- .IRQ_P2F_DMAC0(),
- .IRQ_P2F_DMAC1(),
- .IRQ_P2F_DMAC2(),
- .IRQ_P2F_DMAC3(),
- .IRQ_P2F_DMAC4(),
- .IRQ_P2F_DMAC5(),
- .IRQ_P2F_DMAC6(),
- .IRQ_P2F_DMAC7(),
- .IRQ_P2F_SMC(),
- .IRQ_P2F_QSPI(),
- .IRQ_P2F_CTI(),
- .IRQ_P2F_GPIO(),
- .IRQ_P2F_USB0(),
- .IRQ_P2F_ENET0(),
- .IRQ_P2F_ENET_WAKE0(),
- .IRQ_P2F_SDIO0(),
- .IRQ_P2F_I2C0(),
- .IRQ_P2F_SPI0(),
- .IRQ_P2F_UART0(),
- .IRQ_P2F_CAN0(),
- .IRQ_P2F_USB1(),
- .IRQ_P2F_ENET1(),
- .IRQ_P2F_ENET_WAKE1(),
- .IRQ_P2F_SDIO1(),
- .IRQ_P2F_I2C1(),
- .IRQ_P2F_SPI1(),
- .IRQ_P2F_UART1(),
- .IRQ_P2F_CAN1(),
- .IRQ_F2P(1'B0),
- .Core0_nFIQ(1'B0),
- .Core0_nIRQ(1'B0),
- .Core1_nFIQ(1'B0),
- .Core1_nIRQ(1'B0),
- .DMA0_DATYPE(),
- .DMA0_DAVALID(),
- .DMA0_DRREADY(),
- .DMA1_DATYPE(),
- .DMA1_DAVALID(),
- .DMA1_DRREADY(),
- .DMA2_DATYPE(),
- .DMA2_DAVALID(),
- .DMA2_DRREADY(),
- .DMA3_DATYPE(),
- .DMA3_DAVALID(),
- .DMA3_DRREADY(),
- .DMA0_ACLK(1'B0),
- .DMA0_DAREADY(1'B0),
- .DMA0_DRLAST(1'B0),
- .DMA0_DRVALID(1'B0),
- .DMA1_ACLK(1'B0),
- .DMA1_DAREADY(1'B0),
- .DMA1_DRLAST(1'B0),
- .DMA1_DRVALID(1'B0),
- .DMA2_ACLK(1'B0),
- .DMA2_DAREADY(1'B0),
- .DMA2_DRLAST(1'B0),
- .DMA2_DRVALID(1'B0),
- .DMA3_ACLK(1'B0),
- .DMA3_DAREADY(1'B0),
- .DMA3_DRLAST(1'B0),
- .DMA3_DRVALID(1'B0),
- .DMA0_DRTYPE(2'B0),
- .DMA1_DRTYPE(2'B0),
- .DMA2_DRTYPE(2'B0),
- .DMA3_DRTYPE(2'B0),
- .FCLK_CLK0(FCLK_CLK0),
- .FCLK_CLK1(),
- .FCLK_CLK2(),
- .FCLK_CLK3(),
- .FCLK_CLKTRIG0_N(1'B0),
- .FCLK_CLKTRIG1_N(1'B0),
- .FCLK_CLKTRIG2_N(1'B0),
- .FCLK_CLKTRIG3_N(1'B0),
- .FCLK_RESET0_N(FCLK_RESET0_N),
- .FCLK_RESET1_N(),
- .FCLK_RESET2_N(),
- .FCLK_RESET3_N(),
- .FTMD_TRACEIN_DATA(32'B0),
- .FTMD_TRACEIN_VALID(1'B0),
- .FTMD_TRACEIN_CLK(1'B0),
- .FTMD_TRACEIN_ATID(4'B0),
- .FTMT_F2P_TRIG_0(1'B0),
- .FTMT_F2P_TRIGACK_0(),
- .FTMT_F2P_TRIG_1(1'B0),
- .FTMT_F2P_TRIGACK_1(),
- .FTMT_F2P_TRIG_2(1'B0),
- .FTMT_F2P_TRIGACK_2(),
- .FTMT_F2P_TRIG_3(1'B0),
- .FTMT_F2P_TRIGACK_3(),
- .FTMT_F2P_DEBUG(32'B0),
- .FTMT_P2F_TRIGACK_0(1'B0),
- .FTMT_P2F_TRIG_0(),
- .FTMT_P2F_TRIGACK_1(1'B0),
- .FTMT_P2F_TRIG_1(),
- .FTMT_P2F_TRIGACK_2(1'B0),
- .FTMT_P2F_TRIG_2(),
- .FTMT_P2F_TRIGACK_3(1'B0),
- .FTMT_P2F_TRIG_3(),
- .FTMT_P2F_DEBUG(),
- .FPGA_IDLE_N(1'B0),
- .EVENT_EVENTO(),
- .EVENT_STANDBYWFE(),
- .EVENT_STANDBYWFI(),
- .EVENT_EVENTI(1'B0),
- .DDR_ARB(4'B0),
- .MIO(MIO),
- .DDR_CAS_n(DDR_CAS_n),
- .DDR_CKE(DDR_CKE),
- .DDR_Clk_n(DDR_Clk_n),
- .DDR_Clk(DDR_Clk),
- .DDR_CS_n(DDR_CS_n),
- .DDR_DRSTB(DDR_DRSTB),
- .DDR_ODT(DDR_ODT),
- .DDR_RAS_n(DDR_RAS_n),
- .DDR_WEB(DDR_WEB),
- .DDR_BankAddr(DDR_BankAddr),
- .DDR_Addr(DDR_Addr),
- .DDR_VRN(DDR_VRN),
- .DDR_VRP(DDR_VRP),
- .DDR_DM(DDR_DM),
- .DDR_DQ(DDR_DQ),
- .DDR_DQS_n(DDR_DQS_n),
- .DDR_DQS(DDR_DQS),
- .PS_SRSTB(PS_SRSTB),
- .PS_CLK(PS_CLK),
- .PS_PORB(PS_PORB)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.dcp
deleted file mode 100644
index 9f2b6ef7a33fc2e214f7c42aab5a238f645faaa9..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 6415
zcmWIWW@Zs#U|`^2@QYUu<ld1vZ4Dy>!z&gB26hGphLq$2y^7qNxl^L^XB#lI&YvEi
z_;HKv6sEIVy@IBCN2xH0PFKqpGhDXy*^M(2ZoglLb46?WPEJ@q=kfc)?44hIi<d1p
zwn$}8u1M_FDYM_E<k}{G+54cy^TQAI-9ZQD8R(gHEz41lzn1o>%IwSJy)Ro1_@A#>
zEWw?-Gv>_H(`NTo=ds`Su9cE)h!mXFxR1?(nSBo9{Ob&78W+aLuU+?5^M<>jfl2Mv
zM7cu;{MPJ9x0z&h)?&r&7}EpSe|~x7@?`tISzI^2OKqvR`bBb)|K+D|4!!s^L%cR-
z(G;-{Ut9lbctv<RCH78y!W8t+Mc~SUYjZbv&YY*QZ>>r>^X5~Zx0_bA+%s+RV%vFi
z=8?1c<@0yA9te!sXnkgbM{4!O^B?#AbqJnWT=;JO_fxV9C64I3R!6Fr?0vxJR+yyK
zd|zhTCaaZSZ(n~D>2t4l^VO_f8R7q<3-hc0AFn_6!r<t|Z3|vIYkx?7F46x%fGyB`
z&8?J-8D}=$y<5=QwYf&(`-}bsW;qg9zOF4`nP#BU*694Zj3qqfrNNtna+}|tUwFIC
zPedj0iHq_Brs;cxIHvy(S)*_NFX{HlC*r6Px@GacHJXeJ3}+Y_7&I9e7>bh<a|+_C
zD)R~pisMU5GIQd~Qj<&ai{f+g(=(If4dM;ri%UwA^vY5v_<J)OiX3_WTa(Q{H}d;^
z$2CWrMOx$T1T7J9ahm13`=CjuXW83dFMV$*dFVHu*>m6K-V@7bw|K(dME4g})t5($
zJ{6HxY_(bzp)u{Dr`MWC4Trm|^Q!Nqcusm=k=@E{FJb>+!EC>x8t(gtGG1RSP+Pe)
zE~9lWhuGq|kNNTf_C3{Wh|89Y=h*sKOeEU#ruw#D9doxu=xpARtZ7*)(`I#E@I?JV
zC)PPhXV*@s;$Lok`bTA~#{%DCCBOPt4xv+AR95ccNk5s<#5?o)>hw(&wJSe%%s$8M
zS#@sDHkBh>Zoj%jmZ*fg?Gm%iHAza3ENwn%u~X!s#MHJwJg-jg$ktmTy7<-<&8*<1
z8?S!UakMyIBKQ8N^GCrm+Dp5--u;;`vLo_PXz{(7f0$6iJL)Y{b1(w~LmvYJgE~>+
zt(TdXT*Q6y%-J*E{pFrIo;~HK^}D{G@z(P?>w8w)^GxCClluDJx<*%w&5eRI{B%$G
zoH@D1OXuX7^P4w$>3E$xq2nEDU=nH&V8EQDaEPrputMTe#sqE#RCmoy7E=phU|@)6
zU|=vL%3bl9dGX2lc_pb8C3+Pp$=ZIpo%$N5^gVR7R)$>A)j8{<8~A~z?>kS&_wVI>
z<z-(#26Aw6m4<fsv1|GGojs`;cHyjla{>3KZm)(rd;a{GwCKpDD~le5%;5aT+IEp`
z<Hn6KXil8uCC+HW$iOg%iGe|fI444qYDP*<@1#KQ!v-R)_djdvRTpiTy6r^4>&q)b
zxej~DCg&^WCYKwkn0lUmwccEIk!<iy?;TI-zCW4c{j9hn^m6tZezB&fca!9P9TfVe
z5g?a7;nbz(tpXGH8ye?Gud|M;bV*n^^PQsaBo(E#50{^+zIpGm@3$GpOgO~0->cf(
z$?@>gqPGX9_?UcIJpFy|!nLlB)^SlwR|c3)yRzJFfg;0sujn0&;fyK14B8Hy_J?+>
z+)LZZT(jYn?By5TJnL0rIowxW``2z&RJAEC_TlYDpXuyd-tD_8)04{`us+;}uXE;B
zsqSmLcE(+D+VH7Y?9~e!F)z+@DJD+)Zf{8x&5gM?wc2m-n&Ve?UU-mFu%*d(dd7iQ
z)B2x(GdcIEWtl(!&Gow;|GU3x^63?^FD|i7x1RBKL-N$7hu13~swlCp59G`4KcSAA
zP&EFt?&4)(VBlb3U{ED07W69e7&%zJ|BlG12s5;Bby5HU3v*KtrC^+9kR^Gu`?GS2
zPKE5@=&RM9my8-)e{@W`_*doV?;=)<#|!F@C95$m*f}SoZc~7nxyIVrM{n}=_cG3K
z{UhSI!+h@_vjdBn<NhqXUn#ZNdFCwBCjIO?4h5pg>yteM-4u5UTYqJ?d$22M+V>})
zS_C)Py<5Az-6tx;FfQ^!yYq*X{(bkZ-AP}+yyi>ZYVj+3oV**^ErKNUkNNsdx@&Rk
zbWlo6<Dy4b7FqMVJ2>#>95e0AIsD=5$u+KbESD)B<y1?TJkoq*an{brY{q`0zwTcv
zzUChf6Pdi_=eeyun?r;ib2mEKXlS|~V`rHDvV!OBMVpT9r3ZBM4D<bC>Nkt+c<=A{
zhx^&1#|9j=3Ee3{MNapQ8n7+TJsSP<{bNf(*?zyOLcXGlF|TKxoR}bIc6yCifyxc3
zx(%&!9=6u+=+R@UUa)(cU|^oXyS~}657vE&U<gbwa=LI$?8L6Ufu~>AKb{=N$r!lz
zsKAS5mu_0uuYb0;<!NnaW8m&B^BqH(<~&?vGu39(WX^Z`dQ3S*TZC4$zv0@uV~g4G
zNvd|bi5IW3o45pfyUDLzt@x_jg`sJF^E82iJAW-5E7yEo`^lhtQAgN*?>*Vk*-Fj4
zGPSk^djn>bI&+p?aA3W5;y`{&f51F<r4UQ|=Y>y&&pb?5zn3Lre$t!M_sSAOo~NBB
zYI+`cOyaI;tP$R1WUa;irQ)+)`(iHfZ`}P4EDp4u>dI&O->UXVY0k>}`jWlja&k!?
zA0|Keaq)LtVbJsMhCCNm{m*otWV3Q-rtieUUz!iDaQA#?-T1Sk?dRJ<|GiCC3Y)jj
z-8O0eMuX3ynp}c~B3ZqkJoluzu9(vyd!xJ7cbVZN<J&QEdDToCmoiOU)BiO2tw^8Q
zY-?VhYu{!Y<$APe3(v@FTp9I4cz=dRTfYOtDTf!GDV&#|=jMbjyHuTjPx0pl&$HEw
zK732g)!XWNVWZ^7D_eh<ez~MC@Hj2$bhM9u>bkyXv1)Vgr}oxp^G&tUu4wor%(TMJ
z)LwBeZ(iwz^onD3=YRA1=|nLeRNH8GPWMpS`N{V<N;d8`^{TlvQ77lM_ocYiE30<h
zk4;oM;Ji4)I9BpR_eY*t0eZhyFj`(+rQLY`>Ylx-iPM8trhb{y%pYCGb!N$a*PY7e
zB_ACBW$)Luc!l<5;Vl9eo%$a-GgV7^zMQ?{!Hu(m-NKnCLM-R4o_MfI_-qR6ucP8$
z7o@Pc%=5Ya_N;ejhS93;DjYM?ZkWzJ?=V|W?d_@4rYXmGBpj4(&dPjqc}m1Y&T}WM
zQr=HxW}kY|L?+5<g5QHbRkN~APnsiYyk)lY#>r`|ytmta?63^_FTa1~i<dWo{;dx%
z+WTUS*XidRU5!7B|4c?LPXf<c9=y!Lz`!rcz@SE4c~X>;cs1f~p0cTk8f#|g<)#f<
zj1wIMo4ECEo%H#qePoiF@9o@wX7;<g1vV`+&U=*l?^@ZVcXr${A0_T6ED?2jBsif$
z^jw8h=_XH;Tmg@rv(DW3_ow#0rQNn*^QE3rcItbpwm$q39(;<MJ#vfgUxmjPG)phl
z*LK<oPkYJo<f`|3SA`QUM(sW;RTHN??w{ehNo983U)C!BJzt*eI4E<=ELN*PIQM1b
zoeO^)vd+&qyeIoD=j>VA)=Nh2ElS8R^I7M6eA{BqyiDQ#oy(5azFiTXJMmxS?<JK!
zQCFkZ7c<m;kX-O`$2PfJ3-0wgZe=)iK>d5$s?xT%2Mha6tglw_ypwrQ^rIqohvQq`
z4S%E(j`w@6z5FVyy70UeL)d}z?`+v~Os$sKtuf0!>-W}%t)gpNkB*%e(~>!kX=jqd
zUVr`fA)~ETo^h+vI(0?e<=6gill{)KfyY)dTXMC=^}Nl@^33an>SnZTJ-~hJxTa&5
zWVy%2t5cp`iq|~zm%DZ2pKz|zuQg=M*bQ5A7fd<6+|%H+hHkWbR&DsC>)(xRJl5{`
zyQ6ViQRJVqRsn?*6B&)UPO|1mo_lnQ?_yDvQPi38gE0#WwS4Us1qEI{eg4a)P4-X1
zeB7ds<!%f~=qbA;{C!(V{!{KmuIKM296DL^yQ@H)WBP~1DmzkJrcYP?Be1ljW`|Tj
z#2i*3iIW`GNgnfB9*HiUAFN>5Uhk8ce1GY!;`r6SuN_$`$MdS_zh&!lP2L$RU8NtW
zK7Kd#<Vv*~@7Zp}N4FoldE~&-8Q1yJKA$g5Y?NSbSu0t!Zb|Di-FM4_nYUe8>HK3U
z!^{oJ5>KDVCN3@fnAEx7O_Mo1EP3sxHPv;Cbbjk@(dn=MS+6_0I=+tK;+2Pw`D7RW
zN(i~OhX140XHl=G1(~L2xQuo0^Co<ePe`@n?)#@6c5dsDc)lM;X8+%GM|}~G>aM7V
zDh6xi&j^anid*?)it41DXQU@`PZe7@EhaH}D@Ueqtp2m9Vj9{%e@_v8=6TBYvZ7e&
zoPvX^4!n}ib~_MjDXOxAH>VJ!vTEDO+@(t!f>`J5txo7~>piG5=h(5R0^xHRbN@-U
zZElIrUm?c7qUZ(J>#xtOCTXe3ON#q#+AP0uaRXOTUUD<f*&|PUv~>5kJL)}-HxKDv
za(&WIualf!Qzzxm=Kfgw*v^1Ezi#niZjU$HRKm@|PM_VWcq>jyBlOtSQYM+-`ifdC
z<vXnP9_*?7Er0u^Y|E5}eI`pi{{J<*)%oQ{$cBmS<rlY|weUy_?z(@-`h}w|gLF(+
zaO5AxTarDNrnwVma%3f2xI47pJJN0S<OBB?zB|1vX}`_ey&LwX$elfKc#g%V4<D@0
zPj_Ltk~F>N*8TKvhwUF3om`jxjd}8EpJ%tU_MUphdRp@7>DF51$^SCB-yRhenC_*q
zP)Q~FefiN~wd2pHuqpmOe{s2<@H)-4hFe!}yE{Logz1#;jF+05pGv%I{asZNUh-%4
zw92~%w)IL^xA$L^yCdH&w_I86frZQ4b?29II9|>;Z^WAWdy`?|oNe*_OI9VmUz|JR
zT;Z=fog3_(A`ZNt5Yo@3HG84m)lZzi1oZs)&hQv=-(D?L662#1diKHR8G-k*N)B0;
zUu@<!Yw8o!3dlITio<>D4b!d4k5=jK?Y{Tc_MPwyUXRXtw8rka@1JH>u`n=9=4T+b
zSWHbxyBdDGXtA3>?f3AKk4Y;}8H%5N?LAd)laTb}6ALD7xPJ0l+aZHV$Jp9<I6QZ6
z{Xb96f$46J<;{>u?43JHzR$T_^4)~@(PcrEdD2JDO?Um`KF8wn6gEG%JyQzR6Ovz9
zb}g1+G-=6jt8j{Bk<wUTGJUn}q=^gW*iSy%Q)plE_^O4*_Sx>eDy5e*i&%OkmuGq@
zEu4610#C4ck7KZjNj2*!))iWF;+x85-tMuKE;eU*IWKM9d6f*ELXTOC;^t-r8BhNl
zAu&mV_2u6wY?=@LeRO}+eA1|)e8I}=>EYM2xbxc0IQAxIPQUh;sqcBe#h0UX$|@_Z
z+xgx6!x<hHOZ7TVQrA)WBs_Wdnb}-VUEURcbNNu|ob>8ctGoM@cH`;7mWlJ`JiT#x
z?xE{Njd6S#U)HJ4SCd<AI4eSU;m2Dw-(OFh>^jAdPr&AE%j&EpSL!=Mj2wmcty!5a
z{^<z+liV#c+Zr|>c({0p1Mk_ze`>$JP%i(;q-Ix|<mWu=Qcr@<!7`Js7fSb3k}`@I
zdo!f$gzl*-ODz;?bC)xdU{v8)P@bNB)FAc<OWh^k+Jq7=ZHa;@XB3n&9VTy?@ib^z
z-uIq`v0e*hdV>zRuX9h>+4Aso1(%pf&8dkCEUxd`{JXrYu*&yXz$>S=oxyIkj>}}8
z^h=o@-t)ijOjyITjyQ%Af#1GY9&N8W9pNzV^WXiS^Wyz`!v7R^G&09*mlWakQ!-ac
zII4Avfph-+Dd&TVZ!eze+^Uyu`0ypuylm4<vqZ+qIcocZ|G#!VUsF)kw$fVZ_<qjj
z95F$@NjEfCJ>@H&8I&Nqcu85=wOtp!X@@QL)l$l56@B~PFV$hv94@=<E2bFk`TgNP
z({!z0Hf_5i&T2o-;MIS`@wjmAs^l5Y(#|_mV*FTr1aHsjS!JcT$yG-r)L3IusLq=3
zr_b#C+A?oUog8&sxK{sf>H4cNg>@^pta}x;HIaGZwaeTNzm~*k&o9*YVPhyIxWBUF
znOl<BEYl^GXE>fMs?wL$ewJ+)tGqo(^UU?_d`XK#bGB^Xc=OCz@f$1Z8+#4@yP0K_
zpJZ##Pux6r-tU_c`D(!(d)$^)h6t}XzUJ~qHY>Rg2Ujhs`F-z1wM^-6CreGKyL-H2
z%eGtly}a{cZoGl1)h^2`vcIqIi<ABKtG9I1-d*D7ujl`E<XH4`?$5=!5zpA3zvoGQ
zcR^xyQ2nc=Z%yUrcFe67`q{Jnxk&Z-pPJvk{>-}Rxg~Rszi-dnZ`)ov+5caak-gl@
z?!AE@o66#!i=rfo7k|7WJNesR-|f@a^JMOb+G8sB<(=p8jlY(f-|Bf>lJRHR_N#yO
z-Xs|w=a-o;QG57!kgxlcAM&ws3%Mtsn$A5@zS`%F?xdr&fmu)aKepdzSbcsTqhw-G
z$L#}Y3H}@<E~is^AGGzUvvk+qEAgycVO}%oLSc!6{S^5fyVT;Q$M1G=xg4IfPUGG;
zo#%1#JgyUFmT!Om)$!>pC5}0(m)4ufT$Ycpw~k%B>_dOen=9qpCLUS$LU$U&vwKIy
zU2VTN6~6xTr`_oIQSo#0Q5$u4m6ME17#J9)GZ5QV*DFdb&Mz%WPAv}Y+Rb;!K!D}<
z?^&O<8?0|1(cBTNq(1FM&;pLY1tLG|Ipsq_b{p>w5nsROt%*`V>><bBpTGVH-?P`Y
zDm7PlseIJ_jF&%;e7)x(ty=PLV$eCoBSH~<eCs}|Y;%^#=xMy>lDuo}#%Fh?@AP$J
zE}pc#vGc`jc~sZ)|E!(~8V3<$B)aS^Pf1(q8_jjtfamx9%tuz!I@V9Nx-eff?8Q&@
zvL?rkc3(DJh@Jo1;(n%nL*pgZw0|!aBq#JAJ;&QNiEY{szU1(20fsl9wCwx$PDQQx
z?)H+?*ILwHf1306VclHq+!ap_udQVa@MdHZVa7cY%fP_Ez{tSBu%r>hf{x3gYeFCG
z11W`Qy2wbv*dMyF=!04aV;z}^F%~?;g>ESNh!n!mn?xCkHa>-JJo;!7!uT2%V%!WJ
z2F*yxK{pwFgal+V2rp@5Vk5?6y^1_^BhfoaAmc!INn;QfQAQS}B%+&%-ogNx2T2Q=
z{6v|Vnv#ZYCVIX{n5iy8l$r2S0NrHtJc%&*DRCy3gIvqX2GYmHz{TLq%)rng%D|w<
z;A#>c7L;sZ66NY!>J{ngVww?IT$Eat=@e?}l${xAQDWe!Z;)4P80D?+>S+rAY^Vpv
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xci
deleted file mode 100644
index b53cafd..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xci
+++ /dev/null
@@ -1,51 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>xci</spirit:library>
- <spirit:name>unknown</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_util_vector_logic_0_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="util_vector_logic" spirit:version="2.0"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OPERATION">or</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SIZE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_OPERATION">or</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_SIZE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_util_vector_logic_0_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOGO_FILE">data/sym_orgate.png</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- <spirit:vendorExtensions>
- <xilinx:componentInstanceExtensions>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_OPERATION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_SIZE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.LOGO_FILE" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:componentInstanceExtensions>
- </spirit:vendorExtensions>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xml
deleted file mode 100644
index 530adfc..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xml
+++ /dev/null
@@ -1,324 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>customized_ip</spirit:library>
- <spirit:name>scalp_zynqps_util_vector_logic_0_0</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesis</spirit:name>
- <spirit:displayName>Verilog Synthesis</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>util_vector_logic_v2_0_1_util_vector_logic</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesis_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:daa2a0a0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_synthesisconstraints</spirit:name>
- <spirit:displayName>Synthesis Constraints</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis.constraints</spirit:envIdentifier>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:daa2a0a0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesiswrapper</spirit:name>
- <spirit:displayName>Verilog Synthesis Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_util_vector_logic_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesiswrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:daa2a0a0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogbehavioralsimulation</spirit:name>
- <spirit:displayName>Verilog Simulation</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>util_vector_logic_v2_0_1_util_vector_logic</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogbehavioralsimulation_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:dd8122b7</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsimulationwrapper</spirit:name>
- <spirit:displayName>Verilog Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_util_vector_logic_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:dd8122b7</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_externalfiles</spirit:name>
- <spirit:displayName>External Files</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:external.files</spirit:envIdentifier>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_externalfiles_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:58:29 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:daa2a0a0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>Op1</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_SIZE')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Op2</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_SIZE')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.Op2" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_OPERATION')) != 'not')">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>Res</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_SIZE')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- <spirit:modelParameters>
- <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="string">
- <spirit:name>C_OPERATION</spirit:name>
- <spirit:displayName>C Operation</spirit:displayName>
- <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_OPERATION">or</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_SIZE</spirit:name>
- <spirit:displayName>C Size</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_SIZE">1</spirit:value>
- </spirit:modelParameter>
- </spirit:modelParameters>
- </spirit:model>
- <spirit:choices>
- <spirit:choice>
- <spirit:name>choice_list_e94027ef</spirit:name>
- <spirit:enumeration>and</spirit:enumeration>
- <spirit:enumeration>or</spirit:enumeration>
- <spirit:enumeration>xor</spirit:enumeration>
- <spirit:enumeration>not</spirit:enumeration>
- </spirit:choice>
- </spirit:choices>
- <spirit:fileSets>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesis_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>util_vector_logic_v2_0_1</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesiswrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>synth/scalp_zynqps_util_vector_logic_0_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogbehavioralsimulation_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>util_vector_logic_v2_0_1</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_util_vector_logic_0_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_externalfiles_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_0_0.dcp</spirit:name>
- <spirit:userFileType>dcp</spirit:userFileType>
- <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
- <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_0_0_stub.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_0_0_stub.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_0_0_sim_netlist.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_0_0_sim_netlist.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- </spirit:fileSets>
- <spirit:description>Performs bitwise logic operations on two n-bit inputs to produce a single n-bit output</spirit:description>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>Component_Name</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="2">scalp_zynqps_util_vector_logic_0_0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_SIZE</spirit:name>
- <spirit:displayName>C_SIZE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_SIZE" spirit:order="3">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_OPERATION</spirit:name>
- <spirit:displayName>C_OPERATION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.C_OPERATION" spirit:choiceRef="choice_list_e94027ef" spirit:order="4">or</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LOGO_FILE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.LOGO_FILE" spirit:order="5">data/sym_orgate.png</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.LOGO_FILE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:coreExtensions>
- <xilinx:displayName>Utility Vector Logic</xilinx:displayName>
- <xilinx:coreRevision>1</xilinx:coreRevision>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_OPERATION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_SIZE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.LOGO_FILE" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:coreExtensions>
- <xilinx:packagingInfo>
- <xilinx:xilinxVersion>2019.2</xilinx:xilinxVersion>
- <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="6c712140"/>
- <xilinx:checksum xilinx:scope="ports" xilinx:value="99e4b00a"/>
- <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="426d7563"/>
- <xilinx:checksum xilinx:scope="parameters" xilinx:value="80130fcb"/>
- </xilinx:packagingInfo>
- </spirit:vendorExtensions>
-</spirit:component>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
deleted file mode 100644
index 7a38996..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
+++ /dev/null
@@ -1,105 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:29 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
-// Design : scalp_zynqps_util_vector_logic_0_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_util_vector_logic_0_0,util_vector_logic_v2_0_1_util_vector_logic,{}" *) (* DowngradeIPIdentifiedWarnings = "yes" *) (* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module scalp_zynqps_util_vector_logic_0_0
- (Op1,
- Op2,
- Res);
- input [0:0]Op1;
- input [0:0]Op2;
- output [0:0]Res;
-
- wire [0:0]Op1;
- wire [0:0]Op2;
- wire [0:0]Res;
-
- LUT2 #(
- .INIT(4'hE))
- \Res[0]_INST_0
- (.I0(Op1),
- .I1(Op2),
- .O(Res));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_stub.v
deleted file mode 100644
index f5ff1ce..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_stub.v
+++ /dev/null
@@ -1,22 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:28 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0_stub.v
-// Design : scalp_zynqps_util_vector_logic_0_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-module scalp_zynqps_util_vector_logic_0_0(Op1, Op2, Res)
-/* synthesis syn_black_box black_box_pad_pin="Op1[0:0],Op2[0:0],Res[0:0]" */;
- input [0:0]Op1;
- input [0:0]Op2;
- output [0:0]Res;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v
deleted file mode 100644
index 065a526..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v
+++ /dev/null
@@ -1,74 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:util_vector_logic:2.0
-// IP Revision: 1
-
-`timescale 1ns/1ps
-
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_util_vector_logic_0_0 (
- Op1,
- Op2,
- Res
-);
-
-input wire [0 : 0] Op1;
-input wire [0 : 0] Op2;
-output wire [0 : 0] Res;
-
- util_vector_logic_v2_0_1_util_vector_logic #(
- .C_OPERATION("or"),
- .C_SIZE(1)
- ) inst (
- .Op1(Op1),
- .Op2(Op2),
- .Res(Res)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/synth/scalp_zynqps_util_vector_logic_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/synth/scalp_zynqps_util_vector_logic_0_0.v
deleted file mode 100644
index 1ce4ccf..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/synth/scalp_zynqps_util_vector_logic_0_0.v
+++ /dev/null
@@ -1,75 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:util_vector_logic:2.0
-// IP Revision: 1
-
-(* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_util_vector_logic_0_0,util_vector_logic_v2_0_1_util_vector_logic,{}" *)
-(* CORE_GENERATION_INFO = "scalp_zynqps_util_vector_logic_0_0,util_vector_logic_v2_0_1_util_vector_logic,{x_ipProduct=Vivado 2019.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=util_vector_logic,x_ipVersion=2.0,x_ipCoreRevision=1,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED,C_OPERATION=or,C_SIZE=1}" *)
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_util_vector_logic_0_0 (
- Op1,
- Op2,
- Res
-);
-
-input wire [0 : 0] Op1;
-input wire [0 : 0] Op2;
-output wire [0 : 0] Res;
-
- util_vector_logic_v2_0_1_util_vector_logic #(
- .C_OPERATION("or"),
- .C_SIZE(1)
- ) inst (
- .Op1(Op1),
- .Op2(Op2),
- .Res(Res)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.dcp
deleted file mode 100644
index 62f466899c0664a4928dca81e66e553e3e156de1..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 6338
zcmWIWW@Zs#U|`^2@QYUuytd)Vr!|ZW46j%i7}yyY7*di8^eS?5=1z&upKZX<I)8e6
z;>RtvQ<%<f^$MEm9i_q~I$bSa%y8M(XE)ABxcz<|&K0fgJ2_$foX77Evv+>=Enc?Z
z*dmoVxgxPwr_6qvl53m%W$%L)&ksM;cLyDqXP{@+wJb+H{#x3jDzh(>_r7d7;D5ei
zu>^PS&X_Y(Pn+FWoyUIPyH-lJAyRNw<32VEX7)LZ^RF|UX<Qf|zjobM%^U891}3#v
z6Xgya@LRJZ-DZ;2S&J37V@wZR|M}&S%aiT<W^vv8F14lN>KDmH{+FM=IrQSw4Ds5S
zMN`B+d~N-!;T7TOl-N7*2~*HN7lA7aug%@yIdh)IzO^dl%$rYr-fmjea?iBMi*4u8
znMcm%m(SnfdLS@jqxG2$9;wwA&wt$e*CBXjapAl9-%rUdlsKaAS{<ogviAX>TVaw`
z^L?3Vo2*uTy?y;rq|d$H%~!K_WrY8aF3hj~f4u(O3xlH<w=H<>to<SRxkUd50k%N%
zHMdeSW}Ml0_ijOJ*XA0D?=SinnB_=Z`MS1%WtxFXTch*uGM4a^mj-VR%58poe&Ovl
zKM|G0Coakln5OR$;+XzFWR1T4zogqIpNOMIXw+M#=3oW}hCT)c26YAohT`PJoPzkO
z%DlpY;`q{%%$)eL)Z~)<qWGNr^vvXV!*~O|%)I0x?vrQEp7HK4_tf$1DL<{>_5F;u
zp4VC5v)Z0#3QwQZ*Z0;nx?*f@6r|y&d&=j`$u(X&C(oSUyva+)>)Z()?@$AiP=f#i
z<|KtfY`uXM5|=V2a5JE~>%@u=if@@27+x?lFsKseu8KUy7tG>+B62Fi3@u!p6hOej
zz!*d+7^fH<`ok~z^8Med79ktXh#lEtJN0-(`6tKXHOJohy=-s2F}2gI@~@Q6*F#Sm
z9_{JT`+4BGUZ=0&ev7?D+&O$3ttOqEr0_DFr7R@*<b(^x%x@Q_RW=-U&gpfvwVN<|
z|LWV8Ia`b>XYaBsvl89GbRg7gqTu!x_7$z>VF$N_{C?qFwRGN2;ZUu6&#Lx*b!)X1
zW#933t)+`DS6qpp>f5*{UVFlJ>K@6=kS}7rSHJ(GYoTYOcC6~OFKU8^Lm8hs$A`UY
z*g7kw<??pDZQL_?j(D<01n4`i*n7zG!p5Jr&EGVXg1<C>HYoPjyS|k5CC3wex$93p
zY|2>oEBb)~|Du{TuRkB#KlzY7|Nes6iVIfFXXt8Ot9!&d>(QkbJ3cTkv|;W|PR(Ms
zX}7;wAX&$HeA;=thc0%u2STch6r`g*2c7djV$|Mk{Om{9clDR2GiDv<IXLHEjdhLA
zAzRnL$;b8`X39;U+PYo6`PafdF2U2cH+`yYsh@oD@tHm0&Tr4YyvfE`cYv?6z<BQd
zWm}@6j6!d->8ZtT<*AV2YP}SjJM;I(vP053jPc9(nH;$$RKKwnPE+IiZO>B9k^j-v
z;fu#VQ`Yz?Ix6<F^glL*aGe)_s3W4|<#X)Y;#0y=ca=YhD@NF-X!NGA@0*aRbNu+q
zdx7>VwT>Qco&WLhobT`c$MMa)=&_Y!G0V{zjk&(3kMlT+9XY)#D&wtC`givg_O@16
zbZweC?EXwmXSDk><Ck~SF^`hp&%-Y?&QemZ3Y~O>?fi}emUY|m182ne=q!-zKVEZ0
zsWI-t(rdR5haCRDbM}On@dkD-VycsV&tB4I{@Y!5v0EAQ2Zu)H!)MMryI<sK$^W)5
zerh7aX~)L`%<cP+G6jCmnVTxA60<wDnWa-KVuoc(aP+MO>%v@XAN^BV{&rEa(anrD
z`w2yj4bhj_U!GYSnsPOb&t~OaTd~VbEMm#Elg{jTWa6=P&F0HGN(Jfmj$P+scsVt8
z{?Y#8v3FC_`ibl|C$<Rr%f>$_I2&|s<HuXwzu3Hw)>|BSbK_m%PAxOj3rn)9IoUa7
z5*;SKZ2zUWEnjr;l9%`FGTanpPAP}X-_<$o<?n}ww^us$=KT#4eEKUiN<(wk+3;DH
z*L+ppEob&1_1w3AS8pf17BXbMc|K^(Ke6283#**<j(=y*_q%Xu>lY`3qLtnU8B!ke
z6fpb^`19@G+qZisnFz7pSaS24p;p`kt7Efg@QH5kIJooClGwfmg|~O~FXeULJo+SS
z>CyP-HIc3fhi}>WIKMK|*%ItI-#EeSyK}N%t>D)60`b!>8s#0E{qT6PfNA4XH`Mat
z^rv}MaSRL$VvGz7YQ&Wn<tb@PeWSTr9C&_zH!;3#wsG&d8;tcLVITfPe`9Gfk*_p)
za_;@s`R-p>7bw2wQT}&DvmnQ8<(~!0-preSwE3;gQOeygHTmn;9l{bOtG;M#39Hx~
zH!mRm-E&Ll7kaN(^~s~UQ0VaF$B`@y4A*&yc42Bt+S#z&;#+P4|K7!KT&yo<yzXm~
zwb{If&dgqGMY!2gj_0afJ#mTgxrfzP6&97r|L^Uc%y4qXET7An_6_e+%k$^oef}*>
zRdKF^*pI+hwUMgz%VwIN&wL`PazgUElG)P6^on1C4O%YThm21N891`<-5U3Ha+Ax|
zKgN-|68y>bcY79R?JixCwsZdZ&B_7dbDmjxwz&Bv8=d=W!5VCSF-Q7~w*k+N9Za9S
zZuwZwF0yBPI!~<bgh;^kI*ny{Tl{^Osy<~BJFarlvC?{ZAm5JqKaDL9HZVQlopJ1I
z<nLP+?YB2_JH3yn^n6{&di=DzOj}ZXujf1chjZ_4FLC&8>AP$}hOwCN+s;f|u`{hj
z%XlrTm4571)cm^DXp!)#$F1i(r)_l5Uh@8`pJevhFLB)&pPt27pJnn3Hn}LUFf;jI
zQPq~5sZTaDv-oohu9DJtY|k|H>;;z<GmqU|YR0Xcd;RvIFD2_cZ0t^YtzTHG^7-oW
z{yWdLXS81Nw(QOH<8GSM6l=y+HZftEfyquL)0xNnTfU!YQCrdSWx^Imwh0<d|K?^-
zIb1VU=*Q8bH52dZu2p!b5$WLcsUxk@a&l1L({FD#Mtd%l@hv)}Ugwaox8+N!O*`WX
z#itwrbF6n1x0mNtR{0*g_S$LN<q0d<J_Q%wE_+wM;JS4CHMzgN&g_cS@3#KPHR?F}
zaPyu2>Xp@VzpOv<T!5Lq<z3~WP(LAiH3N@}P3&BC_OIqoxt8a$ol$hxoTV+#wSUB{
zHt&|~KJnP*cXM03{I7G(*SE`_7XJQyw!sN8&W8&+=57+&m$2@Fcl>gV%z1O?#?SgK
zx_z<Q6v2}!B7fdFtQ7kH>EVBNo!e7bc}h3#$?aWiS~F9~CrNl!x^=Sn=Xk|+%MSTE
za`>s;KCP;uCU(k5Xey65_gSN>x7tsZ<&;aSe6C1)(|W%rN>}9VwsqTIM{Ql$HSd}w
z=YpCm>%aP2h*Zpz@b$Q1<?>l_w)fdt%O@E#?bJwreW0sSc^Pkk^wdi=wXYdWGRk||
z+V3}~O~3H_BF{c)AI(ovGp=2nr&E3R;E6-b_jtGMxuNU-X{Jfp>ua7jwNJXG-&NRK
z;Pw63tAAZ7ucFS~_;lxf+qG{Su5&*=`R-L*{l2=}?^_tOyg#2`XIn5Y@!!Eb9otz+
z@xtet_gwC{*m+~8y61_CbkB{ok@J$WHNsc3uXYZ$ES+FIH}>+<eK|hX&sOR^k3Dv>
zLnK5`YN?_9%yWM=U*5U@<yTRv&*QU?*8WZS>bL7&LWJw$$s1&zC;u*Ao&2Uhk^i;4
z*-6EX?PVQTd;K&x?SI%Dlt{asu<i)!&E%x~SWWMorK<Li_<x`9eQl#8yhn6V!!DjX
zl8x&sX0Z$JSa@0T;4cmNa@V3*UQf5>CmG+bvndFUjGvx=CH7)Wh+V$oy>IOI_L@p@
zPqQrFp1(G5?K3a2inpaT^H|d?r1pHTD)W69pE={T_3n8~_Eq#<=hJCEt-q^K(B<;y
z)!p+~dF$<ZvLCIvbyqpbxP*a$VLAf?gAQ@UXHjZ#erZv1YH?`SZoWeX0xZ9O&-$$0
zV14_D=8j+`^=U7H7H|YE5cyfpDIXHD+jw_~`1(C>O_Ty+4>|t+{Pjopp1rnJsky>S
z<)ijzy!?6O>pc%?)slY`gU%@)5sK*JTlZOIo3lhlPvbS0<XvkwKD#r0r>`4x@ucmI
zoiApi6|HlV#neI=7#QLi7#IwRa(#SeUVL(XUP)?2iC#rYvbLXYr@qE1eGgr&l_3{&
zb<X<e27ch_`_9wx{d;*|dD+*GfgGG%rJ)^u>{>p4XHRN|T{!FCT)_RQ+pFQuo<Bb(
zEjqI4%A!XhGdTaTwq0b~xN&0)S^%f6eP^r0$iT3bk%2*zI42gDlqTtwrB3kAW-=5x
z^8UAG+q{rB|2_s}Ep1oQtyrn#+7je+#_sNg8B09NR{#Ct8^U$eTjBFF^L}&J#+4i0
z)ysVyO!w{IEj#t9ME1%hc07icm5xsiico7lKFMZh-z%HbT}=7CUl#1;b${b~SL@Jr
z9^N&DjHaANW%(~<<fO`Q-mCib!ChABlOWHr6<?fQ=~@=#h=|X>F@t&AvBYgBF88%6
zz2ltr+o9vh{)Cmv=Qb*-PrZ3?_BBqc_1&C%*7+ZKdER!1-y|QEaPi`KU)dryzpVLr
zCT+cbvCX4pyg?iLTnze-MrcNuC#kN!aW!GbB-!=6LFqqVur=3}X&&NUr}NwLmHzAX
zJ7<J`d$vt#nbYsdJRgN_v+bGA|J41;<fL04)LpNuD96q}yg44Vn%yO+#d(p1fq`F?
z=xVkoCGl#+-8^Me5jED#(95ieYgt^FTsic1WT+eeTrc1~%OrRE&)a|A=sBI3b#6!J
z^q<kUCzpMXe9(3L0h{7l0ipheBdZIJU0!k7cTr}u!>Ow&$G$y(|NGp>jdPc2`d<2E
zDQWUr_xS!9fpND^FV20*ZrOfr#pJ)Qy}!)d;G?dvKCVii$<gVgjM3t0ErEUZiDDN$
z?SB8_{xYxP<;l!$%PrZvLLQjiy7YO+(w~i2<{7qEPQN8=W}F*u{HZGU{DqtuF|&Ph
z-G%R5a_Zl?>}c)Vgn;)G9(sOXQR`v#_1J>#?6n^_7rflDQSR1?oBj@^45tpbm$zko
zId=Er!-g%@U(=Z0i9F!?QINYM@G<X(M^Xvx{ho`jzr4=wdA^Dv?2vjnTlU;7RZA?_
zZI^x<_t=E7qGwx=jhzSck~xlPcaE$vpMCh_K^bm)rmWOEKF(2oxj%BvUrHuOR#{y$
z3M*U}o6c^>5-0k{fH%8QyvIMNNyIpBV$y2OyB_sRH+;|+QTr6Hxn|wsf;)1mB4v$1
zg7V7`>MY)pBfIiztatqV(;pPJPWtv(?3UJ(kLIr(R9)Rz&uA<a-;iq2oo(%;{o-W?
z=Y7`V)?+J8ezthI`mVRTy!zC?j%Z8ST*>W6gBlHQy=;3|`tqLEv_&F%ca&N$|Kt;W
zXeY4lfqQ1bX%2mT_aBO<UR2bZF4$nftzt0Au<XnPo6aNJUiRq@NsRwzTwJ!#d+YOk
z*S@U1uvCucRq=nz*5`)2Ggcmzeqj0dUF*q}YBk=oj~1(LKlby;fu%85zCHVV|HUCD
zLspJx<1bFG-Djfj_@}d-oIKO{$4-Ws8<ZukevwUFT6i+4bHAG;^YyUgwV&41S1r-`
zt-EPWNBz%w-Q6Ge{b5+N^6+t8t7Bgeu2>r>KdJPY_7u$rr?O^<rbX?OKJdc+z^NoT
znZN#P_FSA)bMx`S^3SJ>=64uPd6CsR`M{Ps1ND%Ms<mMO(>$IT<vX1ViE@eJTH1S6
zX^C&i-k6Z61#3j!2Zha0*Zl6&9&x2`5$kHE)%j~A8OxvgOn6|m;VDSv%bRN3r%n?(
zHKpL+w?<ou?QWk7q@=SChFUx>{gp0qj;n6(!YG>srxt3jxxV_f$FezfDKQo&&(*8+
zF=?G>?d3Hx5uR+ka?2k%)}3ATcLQ`M#d$r`R(011_S~PVcjSBT?*le_j`s5DD{Oo{
zDdu*BZus-Iit5aTKBCvJa~3?>-?BsC&ZBob8a_XJTc4F)E)c}jc4>;z@9(!W)UPE6
zA5@du*S{_In4{6`z&~R59KTC3-gpo+=j3Dl3+FOUt<3C>(OA*@P=-;KZJ~I%#sl#e
zvOA<X&y=m_o6b;u&Sq9~yQEc7{eSE8(_L7uBt7rBb^m$UV*5u$FV{UUW1f6E=G~=L
zdrrMpJv~!o_0m}7>3=i1Z9TLU^ri+lv1;rrKc<$zaOYcD=^R)7T@x(*XU-|Rp}IAC
z+4FXzJm%Q5iSb+K21&UD*}Ko*<+EeimStDg-Tr1^^O|+aY=>8xo1dD<aa{L0zW>FH
z>4vj@eKYhC*_GUXnNzr+Xi?ey=LUieOzfvcw!A(a_QE1|zvS*kZF~E-C0ZSqEK)!A
zk0X(Bzj6?>)`}eWuoct%FSHjNFG@%Y5Z`)T)x(ZkHT0~&B+bQpF26cB=jQJhcMm>R
zWaOCP`G*;`P?Y$nVQ$69z)-|QZ1o-wseLk1a(XA7%{pu#(DJ^nOLaM$P;$G_tREsV
z+a;W0?+6q{r$m=d<2pGtMfm$m?dKP)zO=_2S@gH8%q_#NJ;HSFvR@gBF?V&JcPqpk
zY-BlknI|an*9JkRPmBf=iVv3_*S;?tlCiAXW3o!;o@*b9pYDJ2u5h;PGQ+lqpRV1{
z**@`kVdlwi30`Vae_lMTPTsIpWy9m8p;E1@Rvr;xR(Q;4qn-PZErxZ1sp6VOl^X8%
zlPjh_<>NS@RqnIc_~jbQpsnBRuS~qWdEqNAbH0>aHj_%fuYHz~6Wvg?H>v2v!8KPy
zwp=^=RfzlGDRZ4GCo6TP2+cW}(NeQ@W1^^;-uqi?FRQ#ZEY&ozkd#^b@Q|wHhFwn|
z?_@p}IWOVYmkEDYS-<<g*6OF^*64%>pZ;Z>`F3Ta*TE0d{~T5M#1%JLW}fXQJH`NS
zMkWzv+=HhK3=9m63=9lQ8bK`RP%646^Z`1MQi!IDj6@IDp&N=mx&|^7gqJjCG7)8H
zMIO45=pAs7aS(UTWFyMR@{}}mGts-u2s5qOi83=4(@gZ1F2c+k+(elPZ}+0R7QGdU
zFnJmeF(#w6Nzsi@MQcGKjJM<^%6LeQMmH9{y#z8AgqJif;v>dby`q#vbTiS58<2UB
zw6I;67&8%tPk=Wo8%Q@70~docGXsOQC<B8YgR6;qn0A$;NpXf-MWnNrnR!a7Q?hxa
bwwr;MVP-}_QLdSOd0D!9nPEm|go!Nx`AYpY
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xci
deleted file mode 100644
index 061f810..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xci
+++ /dev/null
@@ -1,51 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>xci</spirit:library>
- <spirit:name>unknown</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_util_vector_logic_1_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="util_vector_logic" spirit:version="2.0"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_OPERATION">not</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_SIZE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_OPERATION">not</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_SIZE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_util_vector_logic_1_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOGO_FILE">data/sym_notgate.png</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- <spirit:vendorExtensions>
- <xilinx:componentInstanceExtensions>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_OPERATION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_SIZE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.LOGO_FILE" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:componentInstanceExtensions>
- </spirit:vendorExtensions>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xml
deleted file mode 100644
index c7eb19d..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xml
+++ /dev/null
@@ -1,324 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>customized_ip</spirit:library>
- <spirit:name>scalp_zynqps_util_vector_logic_1_0</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesis</spirit:name>
- <spirit:displayName>Verilog Synthesis</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>util_vector_logic_v2_0_1_util_vector_logic</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesis_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:72cd3463</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_synthesisconstraints</spirit:name>
- <spirit:displayName>Synthesis Constraints</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis.constraints</spirit:envIdentifier>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:72cd3463</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesiswrapper</spirit:name>
- <spirit:displayName>Verilog Synthesis Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_util_vector_logic_1_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesiswrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:72cd3463</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogbehavioralsimulation</spirit:name>
- <spirit:displayName>Verilog Simulation</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:simulation</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>util_vector_logic_v2_0_1_util_vector_logic</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogbehavioralsimulation_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:b4360b31</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsimulationwrapper</spirit:name>
- <spirit:displayName>Verilog Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_util_vector_logic_1_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:48 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:b4360b31</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_externalfiles</spirit:name>
- <spirit:displayName>External Files</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:external.files</spirit:envIdentifier>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_externalfiles_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:58:29 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:72cd3463</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>Op1</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_SIZE')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>Op2</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_SIZE')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.Op2" xilinx:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_OPERATION')) != 'not')">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>Res</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_SIZE')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_verilogsynthesis</spirit:viewNameRef>
- <spirit:viewNameRef>xilinx_verilogbehavioralsimulation</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- <spirit:modelParameters>
- <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="string">
- <spirit:name>C_OPERATION</spirit:name>
- <spirit:displayName>C Operation</spirit:displayName>
- <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_OPERATION">not</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_SIZE</spirit:name>
- <spirit:displayName>C Size</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_SIZE">1</spirit:value>
- </spirit:modelParameter>
- </spirit:modelParameters>
- </spirit:model>
- <spirit:choices>
- <spirit:choice>
- <spirit:name>choice_list_e94027ef</spirit:name>
- <spirit:enumeration>and</spirit:enumeration>
- <spirit:enumeration>or</spirit:enumeration>
- <spirit:enumeration>xor</spirit:enumeration>
- <spirit:enumeration>not</spirit:enumeration>
- </spirit:choice>
- </spirit:choices>
- <spirit:fileSets>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesis_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>util_vector_logic_v2_0_1</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesiswrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>synth/scalp_zynqps_util_vector_logic_1_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogbehavioralsimulation_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_ipstatic</spirit:userFileType>
- <spirit:logicalName>util_vector_logic_v2_0_1</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_util_vector_logic_1_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_externalfiles_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_1_0.dcp</spirit:name>
- <spirit:userFileType>dcp</spirit:userFileType>
- <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
- <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_1_0_stub.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_1_0_stub.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_1_0_sim_netlist.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_util_vector_logic_1_0_sim_netlist.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- </spirit:fileSets>
- <spirit:description>Performs bitwise logic operations on two n-bit inputs to produce a single n-bit output</spirit:description>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>Component_Name</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="2">scalp_zynqps_util_vector_logic_1_0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_SIZE</spirit:name>
- <spirit:displayName>C_SIZE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_SIZE" spirit:order="3">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_OPERATION</spirit:name>
- <spirit:displayName>C_OPERATION</spirit:displayName>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.C_OPERATION" spirit:choiceRef="choice_list_e94027ef" spirit:order="4">not</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LOGO_FILE</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.LOGO_FILE" spirit:order="5">data/sym_notgate.png</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.LOGO_FILE">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:coreExtensions>
- <xilinx:displayName>Utility Vector Logic</xilinx:displayName>
- <xilinx:coreRevision>1</xilinx:coreRevision>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_OPERATION" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_SIZE" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.LOGO_FILE" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:coreExtensions>
- <xilinx:packagingInfo>
- <xilinx:xilinxVersion>2019.2</xilinx:xilinxVersion>
- <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="6c712140"/>
- <xilinx:checksum xilinx:scope="ports" xilinx:value="99e4b00a"/>
- <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="426d7563"/>
- <xilinx:checksum xilinx:scope="parameters" xilinx:value="80130fcb"/>
- </xilinx:packagingInfo>
- </spirit:vendorExtensions>
-</spirit:component>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
deleted file mode 100644
index ebf986f..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
+++ /dev/null
@@ -1,101 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:29 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
-// Design : scalp_zynqps_util_vector_logic_1_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_util_vector_logic_1_0,util_vector_logic_v2_0_1_util_vector_logic,{}" *) (* DowngradeIPIdentifiedWarnings = "yes" *) (* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module scalp_zynqps_util_vector_logic_1_0
- (Op1,
- Res);
- input [0:0]Op1;
- output [0:0]Res;
-
- wire [0:0]Op1;
- wire [0:0]Res;
-
- LUT1 #(
- .INIT(2'h1))
- \Res[0]_INST_0
- (.I0(Op1),
- .O(Res));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_stub.v
deleted file mode 100644
index 3313139..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_stub.v
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:28 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0_stub.v
-// Design : scalp_zynqps_util_vector_logic_1_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-module scalp_zynqps_util_vector_logic_1_0(Op1, Res)
-/* synthesis syn_black_box black_box_pad_pin="Op1[0:0],Res[0:0]" */;
- input [0:0]Op1;
- output [0:0]Res;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v
deleted file mode 100644
index 7a36d0d..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v
+++ /dev/null
@@ -1,72 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:util_vector_logic:2.0
-// IP Revision: 1
-
-`timescale 1ns/1ps
-
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_util_vector_logic_1_0 (
- Op1,
- Res
-);
-
-input wire [0 : 0] Op1;
-output wire [0 : 0] Res;
-
- util_vector_logic_v2_0_1_util_vector_logic #(
- .C_OPERATION("not"),
- .C_SIZE(1)
- ) inst (
- .Op1(Op1),
- .Op2(1'B0),
- .Res(Res)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/synth/scalp_zynqps_util_vector_logic_1_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/synth/scalp_zynqps_util_vector_logic_1_0.v
deleted file mode 100644
index 5f74e97..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/synth/scalp_zynqps_util_vector_logic_1_0.v
+++ /dev/null
@@ -1,73 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:util_vector_logic:2.0
-// IP Revision: 1
-
-(* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_util_vector_logic_1_0,util_vector_logic_v2_0_1_util_vector_logic,{}" *)
-(* CORE_GENERATION_INFO = "scalp_zynqps_util_vector_logic_1_0,util_vector_logic_v2_0_1_util_vector_logic,{x_ipProduct=Vivado 2019.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=util_vector_logic,x_ipVersion=2.0,x_ipCoreRevision=1,x_ipLanguage=VHDL,x_ipSimLanguage=MIXED,C_OPERATION=not,C_SIZE=1}" *)
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_util_vector_logic_1_0 (
- Op1,
- Res
-);
-
-input wire [0 : 0] Op1;
-output wire [0 : 0] Res;
-
- util_vector_logic_v2_0_1_util_vector_logic #(
- .C_OPERATION("not"),
- .C_SIZE(1)
- ) inst (
- .Op1(Op1),
- .Op2(1'B0),
- .Res(Res)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.dcp
deleted file mode 100644
index 4a0e84e0f7ae92d858b9b9a6fadd94bb49cb45b7..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 114693
zcmWIWW@Zs#U|`^22#Qw^bej+sypEB9VKoZ_13Lo)LrQXiUPW$B@0HVeiw#8B9(;YG
zsS`HWRr7+1O6Vl5m`e(R9Xm{JMjn}QOe)Fvnb8)1d*6>SOICI0{(padPV<pR8}~k0
zaBz=GkDh91*plN{GZN<+{t7g3(*E$reE0MNeF4X&Pf}Xzc3;fx%?`0IkLD(_AMn<z
z(9GOrH2Y=n%XhQ#ldiYQt4?fVPq?Du-?)O&?I7dw1IfG$!3$RMfB(#0%2SreV&Xct
z{EXd)wKsZNKKjg3NnNn>*(SEUWsh$QuiV$2bx8YS_QZe7RtQho-;+K$dhKcDu#O!r
zo^c1ZhyU8Fk?1TDvfxswPLSGinf0%`EcXSb-~9dO(S%#3e|CK`o_vvOdwrg8XYdam
zR@2%;BA=J+>ibr|XY04hpwyoDBgKVJ+nz|ctUp?6V_gvQpR+A6$HVqL*XdPuC(r&C
zPt0_&dpG0E^W@meS5KywWbbr7T0D#2xqlj`EdQ*1;x~`42v-wXlowkxdr@M|j@b8a
z?Lzg=dp5QwZhM+jr8_6>@RG&XUvDXqcwCWofm^Wahk@3HYkP(KCnsJw`0D<}^$V@J
z-dyN!zQ9*)+2<Wr+;Up~;?cYN?_bC=`NfNf(!hB2z%71@3QW&1Feo)}F-R~lFcc>z
z<`l$NRpu2I6vvlk=Eobv8|bB`q`j%lE`D@k(zoxQwPpS$E?2+TAv;ws#_!E;!Cps+
zoF{G`hcX`RVNqCiu;X+>O>*-8-_b(hqNTwncU-ml@=hk%CunB>rcIwtYAxNzxA$Xw
zxPSA!{V&$tPp{XXw@d$VW%w(v|2ua5lKS&8bw`cV`SkElQ%h9;?yLTu_rvJR_Wk~C
z@7I4`YW`OD+xow6=hy!~etmgp{?|WW`d6=CfBIvV=^R#})gMc4M15V>tsOb(;dQa~
zOa6#5ghxH}x_Ib)jLviWX?tH@6;J<j>GQMrb^G3Z`Jv>!;K%$=)9)WX&-?81%YtpY
zeg##@{a&s8<NN(v&hJmn*dG)7bY02^|D`|t7sQ!HT?<wCep`G_$p62uwr{tqdC6M;
z-%55}RepHY+jUB@j$fxgzS+N8zrN?$<%jb9pY2b5K3J^q=gaZ$PyZBh)ZgO~e|%3~
zn&-ci{_^#EpML0H{_{cq^nmYg<IP_D+j#LGf4$A=mGys~Urw-$JFvc^CS^~@pMAR(
z>TUL(4^w_K|KDfThQ}U-A0~^`OC4PQ;a@;;ePw-*&HsLf{o<^vI7;8^{jahL4EeXS
ziz!mBt!tlcWi5w#!>WBh)Mss5I;o`m!k6E%FaI~ZFQ589_ySki2dSScN`GWLU-so*
zX7y^n)nBY;h^cPR_1Kzqw><U#Pe;wY-$gIKKk)xfez$z{>|ZCQ9$ZnjxqAQ4!?Ug4
zGvBO#*}q>j`{^m&f4}EE?+d!lX8tVxLw;TTwLc&Ce$BnJ?nm#mwWV41AMU^1w)ObI
zGxcA;DE*oJnWtXwSMc|xVbkia{JFR&{_Fhq>#BS0P4BhytFFARXLr5i^HTl&|1xaq
zs(0tF%wO{U-O0Xh3hVzQ?q2a_A@9R-zn+QGFSKskpINo}-B#NlwQXh%Mt|Fn73cn`
zQd!>nE7y9<V&&Pd*_ZBnXK{4tZv)BuvC|*;|6gBsdt%kqM=F2bN&cx`?RLyv&#x*s
zSFGln*^$#%*sh-aZmzy7HA+@f!hXZe(k_32*)zlc3jT>TeDHhjO#Pkwy${N7?wBWV
ztg*`aXyN{-nm2p(dcK|Izqujnz3*;|ZKwV2emT3m?+J6dlIF8rpR(+v>h>>MFEzO<
z&Hl&rXID(wgOf8Y{~d{}{yZ&t9q-A?%(b%*L|0GRE|-~ibbjQwQ`^)o-I_V$^Xro*
zB=)Rd)tu?OGnnn@`?Hq5+Znct`(OLx_`v^qDfgp4Mmrj>KiK=N<jc(Ge$qdr?G4`L
z?%i0V)>iub%GxyVD*G7q2h~?Ec2~>RiGR6#>PMAS&&u<^-g-R{*N?ke`DLBA-Is;p
z<_Esn{&=JDBeuzIt7LMJ{>@3eg}fyd&2}&TTy4L8BJ@n<hw|jRjqk6U{)m13;CowW
zaQ<wQ{j2T2rY2X~e*FLK%f;ODg;H}PGgDqHjjp~s@ouO2=C?<e*sspWT^;i3<fKcx
zKF(iza`hXZ?)<lzg)e>Fu7`!LuAKBSPg8Zf<!g<(E5l1=^Aqp(6ur&#{iJh0<EMR|
z_1j-(*3An3e6S)<)3>rBxVmuptLWW#8m=$gu|dxEW!!hs=L<KL$!XtOn-umtbZzF^
zuWidKrYioKb9o+f_Oo@jABUcv@^z--O8wgC`HuVdzO*%)e(rVBr5$=%d%t<f-s-+3
zYas2n^uw)L6-#Ga-*aWX(;AQK)r-u}bOq-{oQv=Mw0-;hy0!ATGhauYw>dqpqSW0?
z{p~3iIgR3-*W;$lxoLj0SZ3);9f$iLpI^Ij!FQ$I&V2nd)u$_sRz)pUe|de~maN&|
zV)ATXl|Sn(e}7`~gRd*D#z`{YEVRo0yE}a4om)>Y&JA9-cdO3xqx1Am-8(aXOU~ZA
z6;~eCn5%`|J}<fJ^R=LaIdeq9!*(yQyu8bD%idMbcPD>NEKFyvy)~U{l6mn~wh!?>
z?)%ME-rroq7xKb&`?da~y^)bNWy{{xDCp+dEakfue7R)V<mrjOUoKsEWp(ZS%T=QB
zn{OR3dGjlFbxaW3uHSd}6k4UZuHSlUS+-yJwCcw*c`LuBZ4EQ^UUj{CDqF^_TbCWG
zir1+h$n`&1y4yC0{q@C7sr_2Z;)0}&H{Y9?A^iU0n%$H6Uaa3+bo*024@2P>-g*W8
zC3RolR_6!B^C!%a+V)p{^INZJwpGS*vX?jaJb!p(=B|B)=BIjZpKDH^dAX`s;dPaN
z;XB#AS29n0+ZD@dYVqvSMt9-Ij`7=Sm9MYAc71K+8;h`_FT3)7rgd&<Gm+g~`dq@i
zJnZdOL6(5~8h0am=kJ}iM>;IsafbWCxVbNHd%M@|dVBVn*YQ=)t#beG-T!Z6PQ<a<
znUdP)%jUK3yKemF;;AVIZ@<0uqi*$%t@GY)`@JhZEA)@+V%w?=|7V+wjZ+s##gshR
zzOpp<{lOpKFHQPl{e0IBqjlkKk4rB$UjMr<*3jL+%=cGrd2VFd>ic!fA7<&_b>C}}
zAzu7!jmcY0wjH5aQTNT~wFz&(HKlj|`}{A*r{&Mu_GqST=10E2=ihmJb*txk{wL=N
z|7zc>b0xN44?g@p@>uZdUuEo%Wenb4|NgJ{diITXXR<|ogV!;K7acpisqlJD{K>i3
zUY%pub}it}*5GeXwz1}Jz7tox?Dh9DL7p$aR_Ke)y>=yo|L?Ba-DdG;Gaqi-Smu8A
z_{9~Ly3eF0U2Ce^w`215<$Z6%qn}QEvQJz-K}OE`&1=7}Yp-7xKfCOS-va(uyhkH<
zPO~qc`^-E4t-VBOblKCRhc8I#-jV)&bjCUn@gHTcj~~jLl4vJ>ZuZVA`!s8}YtOp3
z&O)_%Q9OVC9@ouZm+UC}`0L+6-S4{b+jLh}$g1bxdY;rW!}j(+*=O~ManD5Jq#yrH
z4}aHe`Tq3mIRysBZcFCqo?!pIi8J|=!jCsLKkn}S7=Jg+;`qAReG8@g&nBF+as2;X
z{)xH7ZQGUNYdD`a^4yo_m-nd`IP$lMS0Z_xP3FC*+4;ViTV64gKY4j?v!eKP-sN#^
zhF=$2)&})%E54t1{h?{ZTB-L1b}zeIGiO^KE|0U$UH*hAJ;g_6H|v?O^gUG>XYbse
zmik17GtSgP{#Nes9pAo2?cY?fQ~&=3nVrkNtp4Wh|IyLEe7&qj@~g#9=cZW1h1SZR
z$y)Dxx_Iu&NVBz<ZUnKdx^5;T!ESxQUEFy;OO)~By_ReDSalWNot<@kE@#90|2y`U
z@7ud=N#mvb=B(4@_utH1e)m*wX?E_Nt?I9Se>gVLx-8jt#g!-XOeWc+vwYrnwbxMg
zpyl(KZ#^$&_}$Yv|DQ2R^lZip)uR)656|24axMG+lT~Zh+`aC4c^acZ-kdqcvzy(d
z&&=V<xPS7Uvv;9aZFTA8nTO^S2hHJGKFda@f5H38>%A-gS8+dEV7qdUbbrA-JE`(>
z%|E#wd)+S6dX*4UBV%>nWXH0d%$0oW<lUbp-dwq5`6{N*OJ;t5vEzf4Z||nhSzEg<
zJ-GPucCPu<XwT?Fm2sIi7N^R+cP%}-`N00)UEkl>U2&@4a%)0)Nca1#UEl9jYMiak
zO^#hHq2C<&lC|!5Td_dWuGH$M*2k}|_1c)T&EfPkEqm*E`%UHQ3yv0NFA8s)cHda^
zc%I+=S9{APwCA=Z{j6K}^!4?$-3zR|UhWPyE!nYd|M!}F(-lsCZl@JL2v>10y3@C1
z6T8`qE$MYzU+Q?R4ZGN8Sn=wfME<(ueRuciN%g*ZbaqqD%~ij?{?2l3ih20H?a|&l
zjPLKRc)|bfR>h_Vb6)sw6*|K&Cl$Q6xc+nQ-Tjg)KK%aoP3_*Mjo+p*pWbV{EPwO4
z#s99<y*co8{~`+mf8(0F`{wPjEmxaoI7f>A@6AW&GOx$^9KFo;PbF^7Y=#rDXQv<B
zQNsMO`fcdn;|Hr(-U)xT{=@!>;k*?Fifn!dd_T)>@m(Hge*8ewxec+8v+ZxI@3>xZ
z`J>d~&i`fVqTUAQr_2fxe0I?F`j>i*xt+!vOW4nCzPg)TY*r?($>)vlcI4Jyt(Ul(
z*cT!D>)a)lrKQ|G>++{wIuutO_J8Bbud0VLe%zn(ZOO8`_0bx6H|w{`_xyf%*kxDw
z9oKlxzqvM3-p$%)T$p#KGj;#UUib4mSSN39dt^VW|KF`$nN4l)?7qvpzd!4FF*n?;
z__E~Hywu0r*u(!%GpXOc_E+`eG!xU?`N2DmX|LscqPyweo$YRU(d!*{-<iGp`_<(2
zOw-?<<f!0(_jQ9+mZ|9Bf@QbvpWRx2cZ!t0LCpQzlYU>>a(`a$>`71W?znugWJ{an
zo1BQZd$y)O`?HV9@>Wh=_N`05{_Tp`+x|NL{`!NZJC*L+zj*fG;8bhj?;GtSJ-4mh
zcf0Q=Pw{1Q?h4}*tPAf~u1h?~@v3K5?M@3*hnLm<VW~6v&$Wx@GhLs&E77zeJa*+<
z`R-+wk+#;CUfi1`wter`mD{c@{ZxDOXC3>#y-t-gv_-F{MTXA`OXhsu@oe4WbstOj
zU#|OmF)RB5`_>EF3k=WC^D(Q-UH_%b`&a3Yn@fJMJ-(Il<H7!Kjn-{HFRoIax&7~^
z-4Z{ZmEK=9``F<OmgIX&%;O??Z^qu7`sjY&lKtCPAM-vgXS?-U)l${hpO>vUy_bFY
z^D}d-^TXQboG6|9?Zw@BC3)=pzr4LA4{klXzB=gR(JcqJ{0+E#X7;Jq4u#Kk?@P`M
zy<XPz>SW0x)7<TMCO@2IX6&=vYS-Hv&z$!Mt+CEtpWe9a&V18r-?zo>pW1!BH}Y<d
z*3x-5V<h^P*lsWRzx6LiWnk*X!t3{Tg-2e!v+DIWnZ33f_ISm&$&{q|J&4ko{qMx4
z>(4HKIQG9fK=$r|Ke0Pwt^0i???mN3UK=hOsv~W~bKHOZyRTW-a;lGgJ#$^rebu%l
zSMR^g+?#fz`}Miz_|j$EN7tN7mDv1x+GCTbU4dEKcu%a)S(*CtzHjE&2Vr4pr}eh+
zoUS!g@7|UB+H`yD`U5xCn%2DEXqvlc=H!X5HSXu-y6%_#waaeKD_#GKtLI9dIVtzb
ze4BB=+ppWjgX1NRU3pWH`*xkOWbtyZ$LVT4m#a*!`IX#_3%~b%z2i>H%$jNOUIvpD
zj^6creo*FZ?dRkF|L&j2weI2%(^Z!iuoQ%5ZVd?WJ9X*9=INVE?7sY~p1M>wJJ(Nl
z_s2^yuho_u&^I_564kf5>M7fX^zLoN$y0ofmRlJ=7W4b9xn#}eYb<&f4RW^TNon~6
z-%q%;v!r3aOxPK>)o;$fTM~XXvVQWdbKAv_ziW8?@`T~rs-u%l4>O8-?Km*4cvI}O
zdB1coUy42avSHcM`}aK^%x`m_Zu}K#e7@=Wj?~aOW&TyoA~h*ye{SvGyzc(j{GRCO
z_&;|y+_`l@Z`;~!;kjGp-^-D{B%i*B=i1lbzi0mvxm0^$ok$+<$u+nCJ=to=`n}+!
z#CAp3g4M1&-|t>uF!M{V)`zp2KFvAxnIU_tcN+!XS-EA4`oEGJW%qpV=Nw!b{?>k0
zxo_sDTVMX(ym0NxyeBq%OBUJe_~_l6&s}LS)1&$0sf>N=|4a*Azau#P?(`7NXQt=V
zBCCw5HmyEp+@tz_Ufv9Yt)X|?PZdR6Rn0aFnC-y+cH76S^Ip3C-(I!-3EMe!&eY7^
zpTB+aZPhF|t#@1BAobt9sx>Q@#c`FaGfn$Yed^qqqCaJq^X`~w{kqRv`S4cu-;-JT
zUIuq(e9@|V`7g2Xc9!^Z=DX{+uIjU&Q*nQ<^ybS=B8OJ?%(K2c_1?@`%G^Kn-(H)X
z<*&#%<E3A*S(fD`2U&*aN2SEW|ITjBu8F?VyK=FW`Mv1XpTY{$js+Jp`Fu|ddAn77
z7pLhbhk!{1`3vfIxdoW*<J@*oEL7t8y0@9`rSheB*NQd#PSB4%-um+EqB}FMiqCuU
z(snoB<w}Ni=~K-Q%dPn>YI}X+gCD7T)3%2d=W_)g>3nFS{>}UUu{~v{kDa~nenqcz
zcyY=8oO?SSTc50d8L@cc)Babw`@dXU9TF#PUbWs>R^!}~m9riv9iH&2)FUuI`tmHJ
zJ%;b3HeV`rXPWS1MS<L&-e~jgKFiPR=dS!>S94|h-q%wtcND(P`(rWf=O&XScKW<0
zrMH)U{`v2qwB-RqsY%?yG4*NQ`StuYwXbZZ{rN4O%yjwId*9<PZkpfQ9Ls20q3gZ3
zUB2t<gHoQ_kMDd+nAe@=o-ymJ)xP}g>Y_I<CEog-d-020?ETdxAs&{|%`b1?im={p
zaIcr$eDNmrOxf4Rs`G89J*#!s-?{5vvEr1x-*0yt|7D!BHL~dX;+>nzmg}CJvD4Uj
z@8qp+_0Mc1gL9wwH713dJgr(advE4nxl`w3k7{mT{w#KVj6UyIE1C0q3#T4kyxM=s
zG`mS`*Inx$ya+pOI8RF0`1*FQ{x;JriD21dXMfICp1t;8Z}e-+zI=P0d+n(mE8hEC
z^KXro_%+vVhWE0N`DTrq4OZt{erJpe-n}Af(sHxw=gNP?mVa|;U)}KSorNkx=Zo^i
zM!O_EwC{h*-5OY$cl&bd>##k$f?GwNUtAseD<hFf*?f-2g0H!WR-)&(ukSv;Zi|-W
z)uUP(iQAV?6@Q<&C2yN}zCe0{@1CIiw^yTbzn<;(jWmv(miJZ8YnO1&QSE=l*}ty6
z+3IAKX(4*yRjBFK_cK0MpDt&6dd~a(!M*ZlyteDsCYs58P0!9cy=|={*Q?zVva+_l
z-8%d2!PO6cwAse?v~ByheXaDTt?y&ZudCkObMbz{y6E@5U(CJrroH7%$rq|9&v)Y$
zKlZ}$cV_1A#hYT+eZTc9DQoK7@7tbc$R4dIc-oa_9d~$J&C>M;DhgvS+!9W{wJvM&
z@1oq7r{>=7Gn&|T_2Od7Mx(y%d5*W<gw4OV;Qpz<-=bIkf3g2&m$vD$so#&4lwPlp
zSUab5C7-={>y+566JObne|j!fV0~_}@y_Vq*S{U9knrexbEEb9GneS9^`BE8U%b*&
z`f}&{3UBXq<vQ;2w@;n;v}*NM!@^aE%N!fOl(Rg4t3BuN<;JTOFSn>3ovr(>spfsy
ztP{-p7gZXcZ^=G=`oYB)5l?S<vmblKwuj9?er25h8PPM%TYj5W6lw1=np5@5Axh`=
zFZ0TXcYC&{8T7BUn(X-1x2^K+?#$Oqy(4F>*SR~r&cTNL)8DgBtrLUHzVf|TbN2VY
z=8x~Z7UbAUnCm{+XOdfNrQ;vxJ7e~Y$;+=#3)V7E;LH5Mz5FHrH9d{5R+na9+;De+
z&W~qX_Ez)vMA^>pKD4v+^1e9R?YEzOiOWA>yV5T2PRW*KJjDSItPQT$<e%F0{@knk
zxf?3>*Uva@@IRMV=W(6FVVQMrwn+DF-f~*?`b354IjqMOdR|+5)*8RPb$jo=8C#Zh
zPk((g<t}6Q@@pwuw$;e~nz8Sd?X{)HmI&#e`#XF3(%Aic$u%F3&9!S>__W`8-$$c0
zdar7aPnF3w$zHQpE@pmIfo#o&)Plz^gxB7!i@tLzYW4EjPmejTeB<GNVfvlI{g2|x
zZ*gBOyi@f5<LsQU#C=>3N-O4O$K76Wc*m`mKfXrpes#xu?nRMj;`zMkhOLHQe>=$6
z=C3>Jb-cX#nDa{Z;tuiKVb{+c$z|EuwD!f>W%~_$@6O!)ZT9VrO_O2@AKjRAYkIBl
zuO+3n7vtFdV!x>!4R`()ds$DXSNeV7gBiyb<nEcVZ{LR$g_~U;GhTnSUcP4f+^(13
z)mYz#U3}}d`bN&(1Et)@+?>nht%aX&ynJo_UQhQ|C-UDfi`yP;wxp5&pLCC{ZMs!e
z$<vE}{EGhmJG|nt<Nd6C;@W#Zy{K9+yWV_>g533~zrS5xZ7#j{YvcDc|JP5?-Ku!u
zBUa2lC9Q1fyw^SRmz=A(nsH}F@(J~60^Xbd=YCAP+4m;0v}5l_yA^gPubo}-$Y$08
z!>?X{!wO5@>%8K9u&(zNe?feqyk2T%%lx137OBqeZM-)nI`r>B)?M}=y!ZY)((>n4
zOytxD8GVm$EQos--V<}XeP_hY>1$VgX1aO$)|y|uCss~5c6L#s-<gxOx23-?%l~Y4
z<gBi<^nn$25&w65)ymK1p0e!S?^RcWwDJv(*SxX$^|<c#>g{q5p3m8Jd*90Gv-%6}
zMql4Q``|3g-)xV&^G$V=*?vZ+CWwc}RjX76+m^@A-T!s@tsS|&_uBZL*iYU*_2!)H
zwp^WCZ#&JlSnKC5U$XtyzwFCJ)zd=ivwgd!g=-$#6MlVxW8QwIIBVm-cW3R}`g>~l
z)zvS)e!CL7$NlfQpgpG^Ec}`0v*q=^D;3!u|BRn3lMOb!^7{D2wa@+I9`4A!t$)*3
zBKrLk&J9xn*V!9CIoABK+`G`5_v!Ip@AiJEQnx+m8t}i4f9JfbQMOg7|F@bJ%e}vC
zKZUPHv9@xPjMd`z&dW>KcV5q7DDL@|{CV4UxwW${H>TX5k}~7A!@L#uqm0j&t;t_+
za6jwYv7>5dGIeIS+e?MMRqJ@2Qa5edrZ4<E#L87B<?jlOef6gJLgf-2-nz2LS%s^9
zzxrO^(*FAWvA?PLKkH0C9lLw9$VPVkG5y2pKc-)fW^amSY-_%l^X`28p7`3iw*J2l
zr&j*BUcuJ-Z1d_5J^!y>KX~E$`c-a~pR>O1lZXq|c00NzHh<rfSFcZ3{HQXOUiatY
z<*d)qKQtF7-Mt!h?OX7N;>S0$cKlgwE)n<k-mYJ}X6T29UtPWaUWKJh%i(*sua)1v
z#UuCU_CAh!naq;(=u?uRyOyuq^4G`L>R-Uw19fZ#HEzpl+H&@Nd!O*{oiW$(^pI2O
zCk$4JOPK%X5O|roxyY?!mW)7b@RobEOAh_>nfX_6@+Uziy9=#Pj30g0)N?U7yK|r2
z;?(<@(*#YL5}u!1acOzO-@wnM-zB4N+^%(7T+_x-dbYq$;N@N?>s}46!dTvr*AMpB
ze*0_{?{{dw`pL?I@4s5@55M6S*?q6T;Cq`ln^y!U-;sd(HLt3?-|w|P)=<Qt_v1s+
zJ_)_>_u>5I$DF^fOAFa`aBto0{C|w>)46x<DQfxl@M_wEk2;SYrb|A4U1agvw>?}}
zn5p>d($s&Ne_x+|f9J4Y-#gw~*|UEW|NngXzjyEd&Q+iHA2dG~pB^w@|6sgX`P!s?
z?_8Zs)lV&KV`+EUwf=P8_s<5a%l6OyzSK*ckLe&cTYLOn`LgHdS3me(7~XoS#`2fQ
zk#F|>_N?{yYqZ!NrH5M`Ut036c*;B7>3hHLeOK`8?8803H~svne&L^_mG+5`*^}hj
zYhUTj54-y_^T*MC6)wd+NzdgTebM@Alh5hPt#{?w)A<V9_lEsEv31eP$;-T-@}@uE
zA5t*m`oo{?j(XvrUwKb9nVNBU`SVY2bbjvRPdWXtzreD4Pw}QrOYiLZ+r7ToQe^I0
zv#X2GMnArJd6jwd$&=@PTq-uW8MfD1f!#5={qXGBJ9wFTo0p_p{&_vYoUJnW!?9)4
z9_LTm{-8H-N!3^DlY3?bZsw~Ht&^V0<)Yz{7acIQ#;#tc^vk5<agyol&uj|!&Reha
z-)xe}*V!s7?<dWkdp^_kZN;u*2GR-ZjUVj3kX3Zpkxxp`^GWvIUDwyX<CS@{BjdNp
z|Lm(@=ZAOStKckhxw)BvZ9_xj6^1gg#i?s97G?FMRd>2gvE@$S5;J%z&g7$dY96bB
zDEEwC+>GB&7J3|JTK3nep>=y`Lh5-Y2{C=W9d>z*?HwyGEuYofd#9%Hcet6fbbbBO
z55IR#W|pq4U;1EoZgTrXTlSb6H-2lk#<glx^X(|I*ip1!AZGsS*h-n0pYa^)&VOCU
z#JBE{KFjszX}4TuVvd5uQj2z5Dg1i2O~j+co4-FwrS0|hx<7kXE_lX0@l&o(G2^wk
z35m^&*AgbgHm9yRSX9Ovwt-FirfI}csWoZW6L_;XOp9&a_$}>POwN&0c?S+1Tm7a@
zJ7>$OybXtrt$Ne8O6J_1n6$HJAD=m!e(es^xjRm2XLTQ)(f#-8S(`bl;8*_tUcvIe
z=UQ{je9oHMce&|Iu!K>pvrSfD!`1t4PY$tgCWKxx@l0kq!`pU>vF#L-voD`pz{-oI
zdxhi$BDKZr1SZI^E9~T95W2U}af{*~?XxUz%K82z=HG1XYB9C{wEh0yBf-%-ZBDGt
zso-07puyYlsrs>~IPYh{E6!-CPH&AZI4hib(jkLY^azvEQSqs#ryXc>OgJ7~rk}NO
z#RmUyIp&Fvx=*E^&g+eO6Tal-9qIq3a#e|15?4-stoQo(u3_29qcXSWOD=1#X8Eyy
zY31?<%{}~C`5@+X5L2rV#AJWi+{6E>2*fl8F;|s<nCT#9RvCyn{b6&@@*DFCFKb@Z
zdwsA^==CPKR~i%bUN`m$J>Mkvtf`jk&-|c0(H{+$u~&=zuwPp7{86$G|2O>)^<E$K
zjvb#N_a^nh|0$1TdHpU=k1Mx$t;eui>a(FW`xE0sZ<2U+PH<*&oZ4ln$;NT|N?4ML
zBtz?U0n4*(Pf}K%FiA02j-TG>xO;c;q5Bs3r%$Sy8!T^IUeH|s>05eD^VKB7^My|h
z*iH*J&$O=2Dr%ltZT`kmi$UQ2K7Ww~cjsD2H~h#u_;abPl1asT!G#A`e&AR%@lbeZ
zr^L!72TyF?v3F6EM684v1M5u>hppfDFP#y~z4K>Zs2q=v{=}Zlgd67CIhT~nm*#E~
zeAoNn--JhV1(z=HH2Qz$SfqH^se*cs!ntph&+skNd&jRi@94=he8PcqCb!pnY@RGG
zD*3@ZeNL%``u!Pmlhpq+Y&P`UXJ~!Y?_Bz~gR7iYom><&q04A?vg;X7!_*KiSB1@<
zH5uoYC2Fjm^3jmpyQIjrX|BPfR8NB^DKmmLU+!h*S-E$?1WAu4FWF4*vd{Scg74Xd
z4GD}tKga*yTKV_Bqe$hP{&eT}88<dK#wNIZZE*duI<RlW_WyGv|H@Q_Nw(?g?R>n)
zW?922^#*T=imiuFHL+}(<M!y${srfDZw-kt+jegE3%Ph583Uzb@1HpC+E83{py1Pj
z@4F{_H)3tvq4H8{qpD|khwe%a?@4L$(Lut~L_|f7xl70;mb4r^*~#_Hm6dx@ldIps
z6OlQ76JJEe+bw)>*gf6zXG`CAn<URU$1E1HR2Qmvf2dL@oB4=0DI)P+W|!zQQ<2?4
zoU44}m3Fo~UhNyNva-m~Mq|qD)XfzW-v@F&|7G=Q=i=+``pVn|DNXrSd&|-ti@!a#
z&)NNpt$xA!vrkvpsb6d^nfP9_NP6j`TSxb#YlPjd*>v<^v8|u_$F$3Q`Py+wn^!hZ
zces!^yY0W!wwUtYS9;Fw?{}~an_tg$N{i1}>r_N%zl&x2f2nOU=BFk`Z$1?1*~l@o
zO6IkGQbCHzy_aowR)~aq&J&dnHMUY(zvyAI--#~P{tpY?6(rZoTFuUU^|p0Zilh?H
z1%|xf@0x;FQ(Qhj_UT$-X|-0#;^H&qBqQD2$Hu+~?q)Pky3^an<$AI5g9Fc|r0XIg
znXgs6`_3dpHXY&VQuR19FQUn%?wF8D+HoC6CHrJfu2Y>(%3VDg28(tGWNJJ2orsbw
za=CPBf^yNd6*9*sb$WeZ$#ZGb=1??h=TRy$n_Rp}cu8e4tLL2Jun9*j)!9Ag6!%Ry
zV!52lb58NG2}guI)tU7q^G+ssw@IaMQS>N2Cevh+{shF3?^`7j)({rd!Buc&i3ii1
zaJgvlM?5AGk>_?cO?_%26fGijd1hemqY1rhjTei#3O@cW-RC7z^6T;U{y6!)Ji(9W
z&c6I9S*0-D+R914Be-+zbf3%IPkq=E0`d-AcymRhE6snm`r$wkZu!5Z5^a&K3Kt`v
zRQKgiRPazZGn0AJTH8O@^5?gBnaMNGJRDzs|J3>;&sJ8Z$OgQyXmHplyf5p-_YLcB
zU6aduz1@GJN_77lp5iB$R<QW%^`0nrdZ~lQ(8PenFI~s8;q-4O2g`@;bpkeX@-4qN
z=P!w6y&`zR)OHhxKO?v3qEJtd$x~+Z1Wf3Vn{n^TY_r><53O(CPEL9sED(B=TOm|2
z>96Iycb_`nJ+v;l+q}G`_~oI6H74^4wD)T+me=0Dle=}TjbKGkUFTKV;A8#Et66@W
z<yFnO8@N23xqteBjPr?klf0MCnIXOJuz~pN^rTbneeW(#ske>$RHo9kOm$agm6q%-
zal^UKh1IWnSv>8W(hxjPWO~KZ&MotU=b6}6KJC0RKiF<&h0_<Irs)E^TP_HmR;zh*
zWEbari;V?`)csb?5eVjFc@4@AhdqQ-FKiKLUK6=TM(VidiJrOP!B)1e*JgXD+NcP$
zobbIoHA!jGk9i{ZIuj>rdd&LZ<9I0~ookYsW$*-(y)&DZbe<IvnIhckCL$S_;8LjQ
zYBfzp^T@_09vgdA+gY}Ptl&4U4|nR=dGqW+r-?PaF&h$A?pU%c<44lHOb(Tou4~dZ
zTxmMZBx|%K<?zId$*M^zM;EEiYj&K&@h0QI_rKSj_pD#H?~mr+;9ucS&NB1<u)Vjv
zw7EK1>3z=otS9bss#~4d`#PPBH^^jM_>v}5JbPiM@3P2_ZsARmm$EvV4uv-Tw37Av
zeOPr1k4s+QQ>Vq!cM2}vxz{uEiq55~k|eR+5~V32Uj&q=2OhjT{p{Pd(>!~Xbf>Kd
zjG4M#dGn5$9}ccra5Ap=w!i+$$R%6<cpSdb+LmViBI?4OGHs7likjILmnKw;T4YFU
zS(BZ&`?BiQ2~+0FWNI9}Ztz0q`W>^0-m4Tfg{?9qb~;b<Ke*t3bn)$1x+|NOOnJQ^
zL2+M`<MeIMwkbvjv3l;j>v-^l?VK7ew!K$o-QJezDXL=lxVh=#=aVs9ZMwT>?|yg3
zGgM{M{^mX<?dxSPe=XSBy`@67L?oi)5ZjHjvFl$Sv6^&kQF9;DYOfp1ckRsfoEzc(
z?U2%jbq!|^ZF(y+H^RMdsjI{BvzIpIewY*C{_T-ab#CU&-COpj%9W(3@7FaxQx~mf
z{MWVLwIHSHO7oKjCzc68p?`YQm_98@II8a3Q#$9-5`!a}eq91{9xXX}TGMY<_?$;7
z)1Qm@tIXxuk+MUzSywV^3C~3TSyT3X^qgFzZI>DJNZ4)l<NY#w?W!a@3la}Vp8q#1
zzuVyP&3!%vzm{7p{2XG%vvhg>alW;8ScR9oE720Kwza!zr=vV)pX~N^1wo3cXESH{
z&M<X8vrM7fy4E@`^5GG+pd|}$wybpNx+(IcYI*+gwVHEoxOCN<%%0M}N%I7+|NXw`
zR*Q|DB2zQX5?}34GGpEO<mK(c*JA2s6R&a2^1bDLQ$)nf?|xtOON))2TbeHBoT{DT
z>!|zW%iA4CCkoH@c&&AI*&p|tB2)Z9iu^4%c5b<KIY+Bzim&6*r(fRgP@N$>+ryIM
z?6ODhH$}uU{qFb2ZnfOlbs{k%jnRisDMMUyrpFv#j-|r#)BIbGF1Y+XIlSHPt&peY
zf%c~&iHtA5{JkN%G<dhmC9V&Nm97ybR<-tJqOY##O}xTX6Okt<whCn8POGinDtj4{
zejasu{eZh{Nx}IWe*a4hy3gM5Tk3qQ?3dZ>jVnbq8=lG5?+DrE*Uop*t!axunqt0n
z?d+4cS3Ey$z-YWI(_@a9G4Fp9Gqu{qv)Vdm8v1tEcQZfh{@@>-yvd^Ev{jOnTFx;O
z-p*@D%O1{Oc1)!><g&p;<7JtDmV0V0dpLjEu_q-VmkkbrOgaNL$wY1I;#qAEGYoy5
zXDpnN`D6K9LrJ--COo0tnNm&yM|}?4pY8GdvSL}HM6}Okfq5EfQvWhjefGJV@;cv1
znsu!H!Q>>VhlRItZn>NCx!+HUYQN;>_}N2~(^!4stnZATC)-n0Tila2dn(-B^Q4p0
zONsTY@)9*4Jr8sJ%A%$sPsh(3FF7X*T{`PMZ^42oK^JVCx(=nZm3*G0uBoy4iGhBA
z!j8gJxle~=p0xfh=i9d7<%2kll*ZrpXFTD5c&c4G)8f{`1<|$c%P(^F2<kWPd|afz
z(b}!3f%Ax+df5TBj+^W`5ff*zO9!p&D>BwPcxhJK<OQrgJZ2luFPGiG$@Gs=I&8-C
zgKZ)2oYNKC?<Z_r*s2VYJSw|^Gpw80?2IYX!e=ty5>+$qHEq=YHgi{V?ZKkL4gEVk
z6gJPO?B-bbS?5^Wjp{$_(oLoh6PSxt9iBaBza{YXM1&d3pDzi{F;Tx7&5qb@F5jT2
zu!voH#vkF2fBH8oe(U_$%*puBX2yX>Gmivx?9HEM(cSmVM$v1|Es5V3ejYs5P$`#_
zBINg}=-AqvH_R{CQ=RoHFPNFNiUgW_&T4!jxyFTgE{oDDwTPe2>&lntWxsW|oo<=V
z`S-4Wug3<L_MUeqIG!oVmNPyuQ#xoR^J$y1@(k_5JE9G@J6O02Pn_%PNzgl5IGrI+
zS!m4>g<T@eJF*R}o1JAR%vGHyrLoE9{O-qp#hyI7-kcg^BkWbO{iDRb6eFJ&OLq<P
z-dMRv=@mLIxlEzkH(CTt6>X1PHR*)hs#P8m+#z?5J#+{S<4IfT^(bz|Dy4&30j1Kp
z%%PDJr!Ccb`GsZGDi05?kh{mOIE04Tq^|U`5@=kdB~-x_x_zQ?z*JGw$W@chSu9w^
z)iyyklrtptsN1wvOD0e3Sf#{SyWr)t2`sZV-Qe&JzEtV%5<GE>&4rTF)=a*UOPZHz
zz7$bjw9>;*E@M|Jf8#QpR|hUlDKQhg7@{J}Z*n)V-62#hKjCFpp6tXaqH(MH#8)3#
zE&9Ajbyw8e4CfU&m%eh{y{4$Cy({kR3&#~XmqfYmE&*|q-ex$g$hl<7eYXh2O?!Lk
zZ@|qZtHpLTIt7`1Th%JIqFE%OP14}kKgZfKy`EETk%qt2jP2E?^;^u^tz57u`Ed&C
z2Cm?YFTQC;XOqP>oj%?Wt)Kn-Np=%M+rE=$_Ef%6Vl|fA{pfxEVl9E1Xuk)y5B{H%
zplVzzoqBZQPr0H>rmIW2E}ioTV9lJJnGvXMm9%2@1eMUpRZDhk+mg&t;(2SDRP3Z}
zm3~u2!oniL6GJoI|E_4-(p(bac+1dqRYH$*!izQkW`sH)TPtN$e0718Yp;ZdrS7pm
zOTB`g>xWLVs$V(jil*b#CFeL-sgwo<sJgPYeiUqTmyk^?SRvS~=Fux*;+S=00jFB8
zMCWJ2o!uvor=;1n<;fqJ@gu}@ReZ4O%0AzzORCI5C%w8A;<+mSvP$bz(QBa*p|4Dq
za0V?`^qpYEo7uD_(<4@9<v%asCA+kBlP*k4p4V~kU`gHo;}_W<Y}bF@{jlh3U1|Qc
zRk52FmG|cNp1OK{`PCwu--TbFrrNyUr%}KX@TThU!8_7=`(2J%{OW4Ae!Q?c+*m7i
zZ<%;mc|31D&-Cyj#p(CMXC9J&_`gP$r}qD=%nP5z?|%LL=KaxNa|z$3|K&EX5?2@5
zN$0hMz3+Y)x-}`}%&o8AviI-nX<r{Mvh%_Fg>wQozRS|h&Uaq%?9=*t2^Cw-wOMNA
zL%-h_Sy5Kv6LxEpY5pD=zOctX-@LlFZQt$o_4jJ7^3CfkY4}=d^1c1<^X31|zx`9^
zy8WN+zD509$2<F2>J=CL75cP^_s}XW%}p#PCbfqLUUoWvd)qm#J^r`u%S-JOwV7>O
z<HoVPQ-%M=%j01jZ!O9scBD->?kl|I^Mjq|YqGizn|@G#F5mJ*<-rxtLt6LKUkc}*
zJY$|U%ciAebxl`xMB<~(0SwpwcCSBp_-NbatCt_H{@#5y?(X~F4ZALi-~VCVvH9RH
zmdio)GB$N~95)V1SKVxh`uX_ZrtLNS_arKlC6*k&{4wi~QO&QpETup1ZP;~fZ*6Vy
z*RA&L;p@zI|JoI0$KNTmed?+2hp*Pj+X?C?pIs5z?%#C(m(a(>Dix*^!c$B)O|JU#
zsbNuZtuLecA8lUgH|6szE~%N@?+AS0^!V%(6~5Z^Xs+5E8->6(T>E>yT5mj9S!p?4
z-{sr4A3S#}6^!Cnv~^iMV7K5rd@h;myZpiCfAhi|S3W;q|M&W{ul1LIO8ruiWm(#>
zse0l2K*<*k6VC^l@LreeGP|hnwwNtW`p4Wki|6k+bnLl#zq#|Dd4F4sQ(iZ6TP|77
zx`;!+OTEm%$RJPp2ZQ@h?z3Hc1)LmrT(H`xuV}aANplbXqX|w?%`H)rr<HBGrm^(t
zE(i6)MXO|=tx1W!z;O6^Qt`Xzj_-wc$4-B=*=8a0-4l<TOn!Wt5jJQ4%}ts`mI8|F
zG8<m5sQPmHYT%?WW9{o<*Vk;(64UinzPay4@hjP~_VPyw6%)8N+Wa|nM5HsfW`<ka
z<3pX=Gw<$KspWOwn6^GD;9tl54KAL}Ka~H>zu`Jt?#~X7i)vF&mt1r^-Q2|TDdpth
z)hjYr<Ui`Xp`W85#rcz?V3v;Ld6l@Wp1}p?YLyfCHJCQC&s5h>-^k9{eRKW6#b?ji
zUpsd)!~E!*qN}U*-RC!*`!WB;@^3FIySA{!MAbVS?Q?#8ujpp=eQo(SB`nrrpFdPQ
ze)e>JYkk|~Jtx-s&3a~O$NsnV&5ivFrZKGF-oKdp{N=d|k9=Bt)o@*+Q}EJM*W*m{
zqaSH&9nE0<dV=3TqqVy5f1Ae2u9%)X{~BCZW=+w&(Ne$EvH7o`Q^}qGN~PIur>#1>
zPuy>wxh<Gy{*-s+3eEjTJer($DzA=vewy>+s)-Ee7=77}o+$ilkuc}pSI>BjCfBCL
zWpftC>+R_bEI+++fA5mB_LaYl_x*mVvU7z?{yy)vzC(?Dhn(Df`}j`$HM>;0SE-4E
z!N@wNP<c_I!lJ*s6*eu76LIM~At5Muaq9zSrm{PdpKX(VSHxR6y?7qjYrJ)u_Npn9
z?MlzT+u^bG?jz0#w{t&w^ytoe<+%Do_+pujGee$qKgr#wa!97lyUEsb$3C{#&MOQa
zHYFbL-Bf?9QOdK0Nm@&(OZt~>%z?K{k8c0_ZN-HJF5ebeBsjiWm-5DQ>xFxlf9D9)
z{1OmpT4Et2;<4?7Ni@f-z?_-vTZK-Ux_vskd8T{B{s|9v8~d<z{N$<q6i_Z7d9UML
zxT3X5$=^!Z=?%v+>o(tYS+?fI?Ku|T_8H}7NZFkTGk%+GCRSsi#-*<I@cD}w3#@0I
z*~l4PROr~5Vj<7eb&S*Nhb5cFiNb_uH{@Bo-u!-<d4I?Jy(S(_{;V4|FgWt5T{yOs
z(P{GSm%l#>%wY@p63ocbGoj1QuEi|RiR00{?1b9X4--zmQ`?yOK%lPVwBU&Vg=~ZD
ziXa)+>yo?r-`00-KX=4h+|{onLTCz$N{HiyO^@{-Zn3!YR4LlWgH2QHu>KR7s&f__
zomv}j=dVb=`AE(D%hUeXm(J|$zasN~#l%FX{v#I(7P-zkoH6HBVm8<A#qtx)`9C(+
z{!*^0_0tkAT<p8&bT6NraOdZFwOsb@yRXE&n||tWz-)iDZM?--IKLY$dQw;PXG^em
z;K?HjF8lP<B-+o$cDQa>xw~GOPo#RGK<8mSL+*|nnaL)M_v+7IcMhMk)>LWj@oj2H
zvisy`a}~^1xHLH@+i8#7w~g0@^MqYyP0jW7xR&+ru}_EZPCm6GZ`As~d`q9@5OLMt
zS0FQIo9V+dXP+!qnV;nJChNe#7US=eo|`!?;k<RN#d!Oq=Vpp!3tuHT?Fsv|@j7ds
z@D1L}9;$aEmX}xWldrDlwwxjQkK=!PQI)yJ!-x5fr%fwAb3eYJ=jZTX&%5CApIe#=
z<YZ^<T0S>i^`^|7gsJ*6`oituyC>Rs<l1Mic=%?sTa|3xDG!_UpNE#~9^{mivweK!
zMbGgEWp0A1H_iICv-KU`_d5D@Q~sHT(z<fFJ@QdI>gOKJme{i0=F8<Hafj!Z_!)03
ztSgs^+jii<-`Dn2->QZzn*Jf&P$+KI((in^kFLZjEPERt(7$)y;}wtC=V{)oe|}E3
z>Cj|xo#&2z^<Pszzb-p(w4>-qqWwFW``h2{f1nZnVe$*bCEd#yA}4S4C_0+ES!S!{
zp2MGvbM#vOZ~qzoD`oc76=%-~cgm-3{^z^v+WM~_)c@@F-x}F_YfajnXSt`h?!DNM
z@0NXXZP=3!OP1=1FFEu)s(QvL>1_LKJ@3}LoGAy3Pjs%a^Lf^Lb-wBB@@sX!mmU7`
z_2%_o26N5B{#Tz#=iNA~vglX%_NvQ%?-NWPbS25BY+bc7NZ@4C{DbxLv%dzKaIgKh
zCgWT2dN}j)ntNYrZ6b8*m$kF^$yWThcJS)?t-nqjc3y4#{^7!_?s9Tbb1V7pm#naj
zSX;BK{r?sTxv1JF4;NmY`TfI%SIYeSYtQXz&yUiSUlaCU*QVxkO3aa0XR3cZOI*|e
zQsR65ee=~@=~X*ICOJHKc<}s#{ZP|q%KbB(YZ%&_k@h-n`!4eWmBobum9zeDef8`7
zYS;WdIzq0V9CN4bO;#u|k#=ga%QnlHv`l-FQmg&L|3|l3O^lZbRd8B8Q?!GB&Dxh+
ztY^-A_wi)n;}sc#OjCa@a?L2^+i3OOGc144Vwq(u2lw9y>uzI8Y5j4AHEDaJ$e+vF
z^S94zx|X?PT08%y%J90YU-Lyhf2q~4I_oa@-<bKI|Llt%d!BQB-@oImM{L)6ov)4F
zF@FE{^olHz`nvMyiuqf6o31SSr|T8C@N9df%&j?JD|<rj|LDr!|H8&CD{p>O(e1Oz
ztp9$0^ZmI+hGpfBztJLhoM!WXw%GD>^E1OIvu25G^0Q5uJ3rMpDEW!D;lD+nC06Rx
zWhEAx_uE^qcYD?KUo7?Lg=dFt_;UZPsr<7!$4zVH{3s9IH~(t6|NXzc{OK$Y*{SP$
zemR=`U(-CzBX!DpgH>wVBX?X(6td<op0Qr!SK#$;>E|9gM}EG)Xw}Zjir4p^$%Nne
z<@&k*!ZqhTT)BVORBSzMZ?{`c;8smX_`<ViD!w|J{STRMcVyj#XKRkHJG*(xceCf4
zZTg*~L9RA^4RX3czw_+PcKyy^k66C`T=6;M^WL+q=jR=-eEa!XVaDr3x%O>owQ}ud
z^3Mu0imyE{%=nxr*KU?xD<{7A^Ntgy{q`rGeQ03#v)s#}^?&WUv+X}+Zk?HPUS4eX
zr-f%-qAwTMsI|NlU~-x<L-9ef-+a*%r9x_UAN}X69(*pK=Tu{-9rI^Rs^XTP0aYBi
z=c-;RZuwa-PixE1&3(atb!IoqJDTr4y#97snak|2^S|ftWF!X$Cd*55*D)ONnBc43
zysqweSl+K+sb^0u_;`Qg)Y;eSBR3np;H}7cy39J^+8Ul)>~hgNGZki-YB%#W9}ml`
z;z>K}b>xK3t&Wy?K5lX<A5x6oDI}^-4rJ%Fn%QINc>l7pw0W<;aa!^PiLWP)`KDj#
zxhYZNXS=EJvXyDFnb=}8vHD7B=j20W6|oK*pFEBz3gEQNYZAF{<ax0{D08;o_MFOT
z%T?=-m`*D4Vm$Kr_v(k2wW|7aKb%v)pW1D*QE20w_fqpB<o4W{%2<}aWY;all|T0!
z5ao+|^IEprIXL#CN7Bo_G8r9T<If;g4T$w0#A*VuxIL3z_H}?*;viNZh^6eA^s;l|
z%`Kl*WKvC}=CUmAIksqWz?6#~B|;rWQtf41C+?k_xvo!TLvgtL&D%4dad|RXmzz!k
z2~GkDs)Gc*IOos3-M%hoUbJ3d&d(jp9tS@z-u&tH3g7u*%)h?;I{5IXvSa)Ax1u(6
zTAg3kzug_8-^y{~q+kQXg#4XJax;Z8GM9PGn$>R;-7CIk!Bi8rwF?%T$j8VRA6esK
zXMFUCw!4TedmKZ*_>Kpy$Gwj|R{d{P@w9W%^8?-oA1{shaOm;UM<0XgW%rx_2_1gC
zH1@-x$5RhKp6bmT_uN1#zc|Y$ZC8iGV!pyHAGGi2Z#ht#b*MA`e%->Sz6(zFTSWc1
z`c^#Zj$NtRqwCw^GctdN+&{EF=Vj!L85x{53teQ^+K8?F!>X$j#i|q48qcm<boi_B
zg3u$2Lia2vb$I==@=fW(>dUSXwS0W%T<%+4msGsHZYsaq<lv>B_9m9Dt^WP%*{ke&
zyYKCLZ(hBA^;4zCpJ%tdp8kF~`+mFsk@tOZ+8d>IsGQ_-=bh7FKEa^lu(|$>`NE$c
z^c>=RmTtAY;9yO2WkK8{me0m>XYNSYchJUScVW}dndkCj4DKh$%~7^I_{S&RQ*TDT
z0spxza}w&773+$hF`vQyJloH}{<7q3?q||xnm602&zS#m&w19*yw48qTr7O%e95;L
zO+VQ_Kj66nvWC6%U`?|n-zV-z=`J$dKUqJ2PU=hk_k36KtEQi9#WJ7mukVcpnfiFf
z|DErYb|>sRD0BSJ`BMAaAOkI))vvRD4RXP8!}@~6f9XeMj{iB>`g6W$vCL<7@n`j6
zX9~~A$ISR2X?WbR&hbxA$7zda`te}?&Yd+MKW_$E_6e$Cy8fB}Yi2y2vA+gt(o^ow
z_S(<jIt=T79{O{>3+CAATVjf)6)W|5N9swQwiG<Bsx!Uj>70(om!^7eEAl&1c=D8L
zxTX4|9ll+s<&Ihk9?uPoDbqODX~Fh^``+`z(%WqdZ_c&Qek38j|Bde)(L$c%```FL
zX>Ta)1*JWqv<H-S2h-E_W&Y3UNVeEl^YF)W7a8UstnWWRT$^CAuL#UP{BbJxaeMVg
zGZrk0S#-)$@OVMZ(?cK6cUrVP))w!p_d8-J6Th?IPq9+p!yl(wAI}#q<T)O$2Q?Da
z2#Evw74!M?MGt?x3N})rZ+)D_Kd_Ns!A7d}te$RB2R3pq)W}ybBVn$rg1QRL2!^_Y
zziTS8CHmIKLXCV2HnQz;Hq4c~!A3?}Y(0Id5^M)V;Ng#3P&=-}oLvUBV=Kg&U}wLV
zX?y$}s-W&2)NEV=K~wL5V@;xOKFpGx5VJ4@AcottJ$?@LVckEN;RFQKEYHMmIt&i@
zpD@GsgZ=pM2UGxJI8)nWahS^=LJcQc;L^uKs`B>gk0koycR&qqh1do$T&eA`ILx6R
zVTO||z#yv6^8%C#>mX);Qum_@=N;by{=1hOw0~e<^A9>Kz<$H--0{r|%T3;0KU%Ys
zYr`73brGPM>=)pf?3e=8y_FS?OY>ql6%?2rb)Wd?I^~B_R*j(UK98KvAIFYwx83*h
zqwe{m(@q?prg3DN#<2+zRqq>lwjap)v4xAh)6n~yQQ@*{jv8&%vMos!HykzECd;-Y
z{kZ9<(Y9K)g(bx$LBP?Gg+-7j$!Eu2pB~Na(>o1celwbLneU{9#c~!UR+T_YKYgo-
zkH0Jtw)D#fF;)m$`mF~s)(Bhry$3Ni2wNKJKknVLV#bC!3ub>j_Ey-^(fo1mJ@uld
zJT{iQJRG|u1xkz+UZgcmj}<F1jx4cpG@s0R*9XMDa5e?P5%6;~VLd2vBuK!^QHAyS
z>IWsFlZ581X(|paSjBZN<Y1?kg+J@^l@D~L9<A{f`>eb1^s<hh)0Cb?cP*Hdv~MYt
zJtJQe&Pn>QI%(h1uAkGio<*-(kc(i?$X^NJNKBYDBR?}~-_p*X)6||t&r(o9u)z|l
zZ61DSwihMsn=1Ty?VK6;Pmk1St9LAcGM+_S8r~N&*42L&U1@m#RQJ!YxHH>7CGDFk
z{(0@52do00*Y25-|MX~$x6kpW8Tq0|YE~;ei)J;vuhsE0%<;^2uB3gT0(<g6<Y(QD
z2fLE?g^GM$yJ$wf=+T<h8qcC#4ex7p{R|5{v%RZndi0s?0xLlim4)dcO}`b&(nA;?
z_na!Nkb1Vj*}&lO2Ts?P9S@x*D^{BNwmrFIB00(aa*D?}pUH}qM!stMIvALk7&va|
zC)i~Q1-p0%&roujwMRto(vhQG0sM;>2%U&|KG(cMqEdOT=84xu>P>t4%9T#Mu2XN?
z<5!_{;&qpL(;mJ`r4z5GsW<I82VyKzZ)z%f)U-(Mxa=E$7FXLo>o@Z`x~gOf=l5x9
zyed4h*J{~<6~{Z{>L2yV1_xBQ1okVxyKTtoYTLJ?{J4n7SBppgWP<|&{6vBSJzNDv
zSwlqpFLLTw)gL|LlD_`M6VbW57X^oxJnQm{xmc-fmD~CIosOlWx$vHvBWug2%~>#8
z(ENU6QB$7Vox1dsoVz3ondhmhzeqcxTLF^fjAMJGXXEX6;cUn64?32Czgh0~><~Ra
zNw~!LQ5r=2_D3B{L&HaH5MJ~rkm<^Kr#3$UDb<B2JqDI!NmP7y79ws95&vi7?I+^z
zXs(=h5hCt+ev+`Ta^7VKFA$<C%ogl`*<T?>Uk6G01o%GcgNRpu1B<`A1rqPsk$--Y
z@ZLI*hjyi(?CcaYe-H8AKB)KRL%df5@}8jiN3f*OZ@H;O>((pJx2~%FVzlY5e9dn2
z_g;73?a(eykA3;-^s}}0OY7g>TlD_l^(8BWj^F3_kad5u>Jt?<jpb}D`G!0J6;~e`
zI(Q~ERAo8*5IfA!yT-4EImD5f;aIzallrY1^@H6U*M0l+7ab7~eBAxyQTLO_-69%F
zKUVMCThOUjUGgkf&-(n8U`;7b2}P@)W|uDB+-}&E{_A3m`6|Kbf+y7$v>7VZ^e3{s
z_2Q6N*eS*6l-?u7Sh1MnK(<I-x=s156%$Wzr1-VCeK^DUXOEbfQ-xnkqsUI7qC?t_
z+~-)7&9YRCn05*+6y#jjvO@4sxKhmg3EB%)_6Th;?N2!3*6ZS?5UymRba1MGsnZXy
zmeY1cs#jXVo2GdQ^xOa${lu%qO=XABA~%kBPTpcwlY82Z5gQM`SCI&u{LyI32A@d_
zSp_EXoW1I4#3Y`|oV}>KsUoZ*u)?O>z&1m?HO<B7yi?J^3mq&w6|Q=77=`F7o(S06
zqTu{lXj1w`J+8*SpkU8QXI7eTaxr+x<jt~q-9{G!#u=(Ym-bgEDgNzN2Q!Xdxc^aU
z3#ZzdV5iKM<t@TJ?aKwO$<K1W)Fbdrb72Wzvda&-!yHUE7rAjZ@tArEq^t;RQgH4S
zVv)SqJxO@4#=_6;>pc%mQP{`2T-ab4<B4A<ch>~*C>&w#Vm#EHuF$h)?jCRTgPlis
z1bF=<E}cGG`H}5{n#MhbGeTmQ8&+@^evaM4op|M;p~IC{r-v)JTiH5xPguaXNUtUF
z^_>*id<NaP$GiuYm>BYQ>=G~!Jic4NO;(QCC00YEZ&yGDLqGS!$PTb_P2+-a$q#xi
z(fdBKB?R4>!R8X%vHMU%xnhr%4O_>q01cVag%=p)#23Xh{$T6aC9uqH(gqtL``O+h
zJ_oJ{?eONTU^e(2qa)bEYGc-2CA;j)f!N9e!pe@!LY1*oZWS6^+gOX5I83>o8&P$n
zLFWCIgXgPnZPUNU;ImX=8RNxFVJQW>T!U91BowUJogTiB;oyBRlX;4^z<q{`mK#>y
za^X3lUaWY_kYNwwj8lO=%!~9yq!ivcNt9Ob2$U`iuz2OPknxe8N=Cy9?%Y)sg3Mee
zV>JG46!1|sT*eqE&c!Q$=8r;gArpryt%p|SU1{ywqt~*Z>7lt$Oozkl3{7Rl#Dk#>
z{6;@y8p~oj6omF~*v@Ej@@mJq_77Pf&am5T37O5g+w7w&i=M(+UyT!8epk-EJF2<K
zMp*Q{R1=%ZtQ8lhSei7br!Mok5+Q9REjvj<;4UX8ufTl{K@*3P+X_Dnxz(;bJ6LmK
zcfHrc$NZXZ3gHh=zCYKzzx1$VxN%gN`KOWt%_+j!-XEBE+B+N&YcOY1+30pdX3N9=
z4%^v%CF<WASiYS&^iAP=V#f_(o9}YT{c{e;x!#a_@=rjpx@q~T<Tp2MBI3@-h2D^R
zvQJd7x+#4dNN8K^89Cn@a!=}{1go3W7lDLCV$aN*v%&U6t)0@h2WJJhyV*#nY-5$@
z5^`aB=rF;C@4;b*CJhA{mPyAMYB)Ru7+aVfKK<;U|Bo|m|A#03cHfI5qKh7Fd*Yhw
z_|95ngKGa)RsB3~$17q_;yf6mxgw&u9&Hl=NuC$kpjyHAYo+dN_l4Xyh33?Y7`N^3
zEY{fa<sNHjN=8SRQj&zbaOwuGSsKY_mvtIV^O&WP?7FDaNQ_~YhVs2jF0HCZKZ>@8
z%fuEI9Nn0@Mn=TbZO$?eE*ICB_?Ms>Q@Kz@qlLAxU(Em1oWpNf3q<F<jVS!WJ<rNF
zlxOeqI(3m_A@|sL1QoaR9Mn8|dyAsh(c7Cq#0C(t4n(X`)KXPaX=xP@aq{3`Ja~JP
zlG2ge>p{dCB_)?E%f^{|7xKK@@crWJ#nT`1)V-=Y99ix+d;bZKXwIw`x9imA@!igU
z(pj4EP9&ngH#US*Db7Vx?)J)pxje4zswSOWES056DNVccpNFW;niqd?j!ee?DcdT4
zDvJM~`<Z)}V`$CiNs-r&>*maEnX`o_;hCF7ip&?m+GeBcVew(P-D~tUpFR3|G)MT;
zYw0PQw*A`lDm<mu^P${&{bvof`}aBS%v!C#+RgRa^evYjd_6kn*|Y2B8lJgdQ?D*O
z@oSQp<(_>r79alei!F8e+I?%Hgd^iG{pz|dE*$amE3cP#bZz8Ul}-DWER_YBrm%mX
z<IjxM`m57iu1%j33Np>@@pW?zL6B*!Cw@&5k^-6L4>E1R+I?$o@kid5*coDx!c==W
z_x{>LXZFTzI_9#hIb8Dk2KBac$Gc;iLiL^*P0yIiy*<C&s(XEj%QW{3mKUSM^De$C
z5sQD@Av1YF@uIJMGP)IK_J((z`#8;JLdIF{?NK1bRW5bD7b0u!a&vg9Y~{OWvEuCX
znD#Yk;<ZijGdRs2o{?0W_Qus<>ss4nQS0PQipj^bHY*97sxAA$y-IgmtxVVZq<|G>
z+8lxxj=6~FZ9Q7n<@_;Lg6nG9QN^ZPGZq|Ly6wiY0*!s$E(>q132+IJ77pKWMeO!}
z-lOFQH9}^K_Hv|K87^$~&fU27UO>(Cj`pn0L4{1WW}KPjox3siZa~fS{`RcRMnz4x
zX0Xim&fUm+C!l8fwDzpcLd8wDX4rs)_TCDpnLf8YYxAe#TZzGpTYr|P`d_)H{&L~H
zGbVElGz&e=r$5UmlK1}lBIsm{_DA<Mg*(mXzv2u#U3+R@;M|>YLLuU@1{Xu@r@fk}
zI(g>q$syvgCKr1^+|<c44}rKAj!jdG=O51xNnbaY<*KW=zsdjS0e>|m3ikLvHQz6{
zB~AU4bf-b@{XIQ%k9?kQ{R6xT?Wtd;!0&&}Yd1N%+|oMD<DQZ#=`I_PntcE5#!#~k
z$LQ3Vj2&xq9+$AL%6U_rz3miRVESqu<0liQrpml<nA%(0eKqW+!nvHOsce#)HuV^*
ztk`rh^X&Q@fyiyAj1F@}MjqQJ8glc+@gGxpgFdd^R482dZ?aLxCRfMU=0DY|v+ul_
z{Xd6qQMO~ib%mGrUP+lheP++w@?w_w71I-2w(m0foU>`&n&hUAO&jxH+|rVMc0D@x
z=1o)AyA|3qJ}{N-X;O_i6meWpu+(+>27~^4D`zJNCd(dlxgr{S<j|eU<#|o1Iv$S6
zE3|j@wEq0$cbA1*^7RVMT^1dys<%wqXq?iu>*KXeKfGt&mu+`$y}5A`_ol~xquJM5
z8a>&2Ma}!(|5N9tTwU>1(SCuPT-7T*Mez=qbSu^;2{VN3<K%iclP?^U2$R@#?1q!Q
zjPo>y*Mc@mOZM7zab&LURdTxZa#6<wvsoHSOKRo1kb7_HvTGH*C-9k1Q1v*@eL`pn
zZ`~Z0uQ?`e3Gw_LhTeRpEQ$*y-nr`Jf8;z`V3g$9?oY7qRyjlN`4opG4Jum4U%ILn
z&6!uCbo`~SdeI!YQl;ZBLqQ@SMl49AOiBG&>Yj<>qQcXJON{UBs8v#bk+$dJZx_D{
zXB!sGW^^=X2KVB8K5RPOl&99+r~V>s(}LM2oAT7Scg@rRb2txab}Unv(G<buq}j3L
zL5=8~bxuJ|lS2#EaruQFoT+6I$ohQc0~66XOE=BPKbf>owd|&d;r*Z^HQs_DL1(tZ
z*q?P>;T)d&&@<aZ4DSaWt??G!;)`H^)`dt2F$W2M*7ZHJ-Nf+zr6V=o!YwWcHdx|_
zz{$>^VW|B#mWd*Wj@+~8q-9T!)@Wn)-}W#hL3(jB@;hHf2z*|Pwg1+1-51=8Q#FeK
zb<%M4-#!#|{}l6lwemIZAJ3k}Iv>wplI`2n^87NNd*lrFD-((>{bkOUZAkySGQF}u
z=%Jh1*MAH$CLhngm0iGj{*df~M7j3EGLcEzyo@!n$97!%=>JWYhs*!8EKic$jKf=!
zKfN$NDCCmy{gQx7#`g^ZE*a$pLM|EQ{FCxxm)-Sro3QZi+xB^%Z+BgIw?+BRW4BPA
z$8)R&FC{<IRBCzdE8t=_q4R``vUG6Uw?E0Nd~7((wr@Qu!~S_r{4$=mo~uG;&Uk!5
zZoB8yPD?)t4%d{VUyd5iRXReBYX6=Hew_0|*zrKVfqzO`Cr1VEvxR$g1R3Waw7EW2
zRVc2OabksETV<Z|bPt=O2L0b23w4@vJ$soSqx8}3pp8YRcZ<nHL(fO=f`rsQT|D?>
z-gDjEpS2x+6vey}{jb;R{7Q7*ANwV7XAb}WQPMig{XsB)*0whBg=yIpf^bG-PVX$Y
zhsOF@elCKFzHECqY<riS?C5cxRmvinCFeT1lU>@jf6>V!GVQb6FQz2*IiFpeVPtrG
z;j=)KnKSAX418+%MRzQ?!osevRA9N1lP}KYK~j*g%pMNYg9|&3?EZCyrCmwL-!QAm
zS+LWb3oIzzI_p7z3x_2~<1=mp(N|H;;tQ7sww&qq+HJ5>oKZ98m1yXb7hf-W2fY%#
zH?iJh?~L-NkAv5rwesqE%OWYI(9)7>%y%-B)5zrN2c;`h#r2(H?|e|&(tc9dC4-+|
zz2kzMn6JP>Ta&2<!RF$VO?cwm6y9@~D#zCS30YdD7T1!-owiJ9!lAQQSj?sKe+9~<
zX>C?#&AlcVqV|LN@1sj8kIv@3x_Z=_<?E|Qt}ixrsR{d=X5Bg19q^bhu0^W+gVL4N
zo#G4IwDxeAhCFm#v5-sOi8u5IPoq@X2c?G^EP_4`3O_j26i$4ceOZRd>Bg6*0s=F7
z<1-i=6J#9QtO7q4&$fE`K}l(0R~FB`))y1G^qq@2n)ojs=JRc1F>zG;XK-ahv-rX`
z**zW{#Wv9^64~{gc&#f0vu+&h4miwbw{k(NtPf9O?I(@4Bl%LL9g2y@%ba-<%~B4X
zx7wBec)37r+2hm|dM)j9&4LX#2wTYVef#luJ>LfAB@elGZxyi<2xdIkeStwS!DD|2
z%P#L?PM!}fmkli*2!CDXIQ#O3U6%!H=5g7?wQ$+kow?Ac9<!$6fV=R7%lvW==RHxl
zy6p0G!FOjChgb-_Jif?4=#8-33X$^@*9MC$R{Zg$*<HhJeVUKRMCb60vnLcT=$QDx
zL2#mwv!PU=zkNkZQpu~ME`pXXkG|_|n?1Kg#85~^Ln$apL&zvnrt6}Hps;Jo<!N^}
z_5M<EGSXTu_G!A?Q<bHG4OiS4H(Pl1sut>~wA9RL_4M*$SgFaF7T9TZ{&9pygtehq
zlZuR_f{LU;q){o~v5gb9vdBlyP-$lO;NqWQX)|d<XY`3*4<@#HPD+*ZoR*rlsVBwl
zk=UlDcN1GZHw8(a^hym2>#DqRdEZpgm+!iiUmyEuHiPBYO8J{@^A@J3)|uS)*xs;U
z+sEVnjo)6oZ&Um^<IJh!8QUhl3wF%y7POq4;%PKV_2e3z&NS(lX;N3VNf;V?zEe`(
z*?s0zEJ)c8$J}JrxyrXErRW+>+InKmn$|Swm)lgXY?CN7^4zDS{Il!Ksc?|OxlTEc
z)lYbS5|KO^oDw$AX>(6WwRn=GeWvfE`6oQ;ls117o|U@9`hvjeADt<a_P98H5^9|~
z{eq72-FIyf$Nb+-dZNrVsb9nMli-1w6Fxjw_Piv>>ghhk<t0bD-J$t?Dkt4UzD(Pr
za+71Du1u0tz1buc$-oIIE}oNm1fs7iF8ipi>{%qpdeU`@%1(|4zHSopt!7M95e=LW
z;^H}}i{V^Mi@m7eNtbQ>k{t89x4!+ezxH*4Wcc&{cQ12o%RccfJneb?lg7Oh^&hPk
zmdg=XwC4A69ha|Zx&kSCE9HBNmTdR<bDwuR?|<vPkr(H$F@G-{)b~Y<^WE-;+cwrN
zH`m@W`RlXVkW&-yDNU?4zhhSL{!7}?+)elPocFQ36s@B3zU{W#)4BK7EbzG&-MxOh
z$C<ml+j)0d?~N3kzQ+80a7f=5KY@Vq<<jL<n>%D9^Y67c%YG4in7jMpwk^5K&APWv
zy!x!x?}lTpV9++{+|wt^vNmf-M!rqT+3G5BJ#Wk1jh%Dvok<o>Ioh22X~rz|D7}kc
zjSe<R)*toRl<=<X-S=7D`ZMqNi&|&QOF4Px?X>r%;_)Us<qgU%*qmI%IU#iNPG{eX
zHve|bOu2dIEf+}EqIoUIph%1I-FvIg9-Z#@PJM!`N&nswxm~KQF)rtvjfyJXFR+~5
zBl9(u>(J|m;cAkOFQhIV=nVPh_+7sFeAO4}?%9QGzy8X*??3Q9;+**5r?38=+Lj&g
z5V{bOwWgCpwsu`jenjl+d;9k7{B>*o`M-(zWnW9T*2w*<(>d6fCh)2MLW*mR)vP66
z!i>JR&aNymnb;WAoVI~ScHzmW))yI*x}sT3GRv=Ay6D2@#XIZZrHU4{?9?TTJy$Ik
zys+eMj*q*rq=sn*+v%@@v({Xl)u*<y#ob|YS+J?BZ_0uz3nZ5axMyrK;;@>vWR)VL
z@2$pYt63);RyrDcWcOW2Ni{7o@vL43vS80;hy{)_A947G&1~vZ%bY*0LGA6iI;e&f
z^JEsDTs7~)MU}U_!WWj58Z21c$umXDq<PUf!C7k-@yYsLsxx8qjatqI)v(4?_Tb4i
zrWZe|ylWC>SX!pGNV$t|s+>ol+ms1HN1wWEiB^`JuxzSm>(!mf9+N*RJz8ha85C8m
z#I_`JsaxXB4-%JBo^({)YGBcP>lVniB=f0zqU~piODQ~^6{i|mG~ec>vMtF}^-Ns&
zRpL^LNoU2bCYDT(DMzL)-(s|M15*u8rqMc=njb1v-6zF@J~C-o1yu>Sz7YESPl;`j
z%b^x`6GuUlwLO}9=D(D<m@=pH$B7`OMUPqoN|t<4=(?cx>~AoSOXm^J{uLF5BC?vM
z9c|yUWff2DiSO>y_&9MZi_1~&MK3&FI*KUz6~5<peybv+ZnNl-Yam#Ap1SH|-y`g@
z!UCfDJ&Tl=vIn-99o;L=w{^0|><=AX;_eqGUTW4jH0#m5#`asDDZUjhN4b|kO!F;#
z|J(Vk$|N<AX+dDq3YP6CmtItM?1>NOswFQ1UN(v-`WEIFxxDT1o^@n3L?qF-@clZM
zw>>9k359rGTzH9D(`ojjd)GQ|NlrFXT`_5q^HR1;AL=eCdpy49-*sc<kte=zv-}G4
zQ(WKnc+P?8JT&LgJ%{dFo+*9|+$$@lipXl(b}VZDILT1G^~9VH9bMs`5a-W%bWg7b
zq^!c_=xT`b6a5O`2f4jfF#-ifD8%^&%XgT&FD?_BDJ&QGQA-mX4IPsw^;l@SJZf<d
z+2hsKH$~1x@ZJ)Y$G%(>%^wPiuAc-AGtHA3lbx1;f(K;&O2-h_h{>~hOjo*GL(+I@
ziJG#n)<hE|jm9faT1=LjYz*-^dr*tX%99?GrKX#7hC>3UN;=r++LB`_@K9Ljn`Lxs
z$+0DHfrq|XM)#H+Lk_1bqen}QsrbPHF3~T`=-CpXnZo}R^&i3fs%|P-9MpLRlx#o&
zXWEg)QG98Vp?WWB$ZbhE<Ee}iNb0(h#g{tZ8f`n2j(B>z%`s6bJfy4@r|RnN#lMIn
z|I(z7YP}~wX$Tq#x0sY9b1!vlfmvwVp|r-+``9cKrEDa9nU^L_RO|Jag%o)+x1`MR
z>^?aY7U@p2wxlfa?1rYOm5nCt8<xcwU7OO4oT7?OW(4c0<$49Ey0&}qFX6~PrTW-+
z=Zrm?j#EWswQMIS9nqZLWAQXeXgN!0P|1of4qXPzV~n0nQ8rSq5pFIxD1OQdnskaz
z&Is-Ug-P4%y%LKuQ~fNrG{!+x+AQLn_Ir!ba+yPOpsE<eE*5MR|9lZe@PnO{-nXQV
zWm7Gl3Ot(P?KY<fl$=ZsM$HeqH^sdo*iJJ4lyIf6+{F!ES|X4P=QR7%$&BE6pgh<X
z8f55l`P8gW9NDMTlYJ{e!6g;uc~rnxJM)zC63zKNCQmz;aQ0_JsET$i24~HOK0j0D
zXv$AE&Rw;{soT~nq)NfnBiK$d^VD%w-$&`*7eKl0(5z1<BZBSJvTucWw!ZQQ=hnBj
z^Loslc5dlpSo!0n5I9&qEUPiPH>LmNY_rfHLyyZ|b3Snto>Eu#`#IxCX0WPgv&q^s
zD;o@!I~hF-Q2>P<^G8;BP&QOLvvNX@r6@`|!6&r;t_m#e6l<v@`>`q&ANsulnx~bH
ztenteA=&{h<Upy_wnJ&p$_YK@q8)pX($kie6MD=<k(1b>{#>tPv$#-mVTgy@EH0Nz
zu#73?(#?^srS{n8=!`k=<gsMsj2;uw$CK1R<p3!BB7zMiv$at2;n9>WD?OI@vUq^X
z6i{LJ(D!J{o|O`l&EdJ(LUgj=@+6-}Qx<rED-^+JAwI|Ebh$iZ*)TyZ;=|=rbGkT+
zwbYXRT$PHEasj5$3+MdFhRc;ET0Y!98&r~dtaKFdQ0L$0du(o#{t;!Dg5Zx%FHZ(&
zI*HbPTRWx4jy1lcy`y1O#l|lwD?}D{+5HRiI<}xm|A@1TL+GA_Dx;9D0N42q+N#Qd
z2gM&LDlO28GqIJ_a$T{A|KQX~A6Go!{wN?AAgVuS9?w*zkc-bBc%57k@}ae&gJVUP
zxW9j!m*A=wiwl;f<Y@hHvT<Pv5f%yXKjtO4=EdiNr72Uuf+`V5yH}_uFXagPvT#R`
zQJiRvqMVY@nn$fyCT|R4(f*YZqba$QYo7qWAZOUeq*o^+UN(v@_`{|0BwRslzgIwj
zt)#Z=hD9vgDk>2QY6ranLLdS>+$t#%4JS5yV81A&!t?^<<J1TR#luW4ZLRL1dv-v)
zCMo7|Vgtj(#D{^R`WwK02y9~&GSYEKiTH6>>!Z?Za8SWDe!t2R8dd@dC?TB*6A~De
z4jx)OYr&~5zNtzffpx4xpR^sGgja+JheTdn7}TQWwcf$0inZelSASNMmbO($RlwB1
zGFA1IaHEN_4+DJzQeE4<1XpS7oFqI+d#1;_4=dDGY+B^Jlp}OX^hwU0Q)MPctFGL%
z2oy9^Voq|NoGLRtMs)>LAoe8Z&8aezW8o^|PIA7S>a!%AB?4qUDCkbDf70^DtMBCc
zNg<IJK>}VIp0u!d_jzsr3)o49T`IU&v+dQoXXl$QCSG_D-SIfCT>g~k^0L^A`%SaT
z=QdyYRr}4{b=AkUb@^p;yKb(!E6o_P`eFaWPhQg;M9!}WID3GTag)o*b$6%kR=Z-L
zr8LoX-TSj%*I(7Fm&rW(<IBAn5=z#=J4&iDrh4DKcGsN!s?Wj&sUdP}dIhdaTwm+8
zJ;y3=uEvF1A3ldIO?50;9m8}#`@Z(wS^wV73ZBofY}Ug2&C36$bMODUbpD_IM^~%o
zK8<&MUcEW2H9X+G)P1R`&6o21<NmMw&9o~h{9W6Af&C93o~w9q?`n@%`1-rD{<C8C
zP0)WM&n@_m<Nx#52`_#_&dFyBOk!l0VxO%Y^y9N@qrSq*_VwoSv3vE~!moA(8fIU=
zt^fO%k=(wxxiwZ5=6|+8cH^usTyX`u8%L?<N;q?U(buce`t8kEE9`c!lDz-6`Np$k
z9p_@H7?rEZ$L;sr;@K3v_d)pA_PZZ-48FcP{cpRyc`BowuG*!CT6_Bv7QDB&|GR(V
zcl*G%|IB|J`uUn?)pyk&+#g@<ZSju2BCts1^tuDFd}WPiZm7DynPi+CZcxrwra5z?
zckhj*X~*<*lcrCT++8HNyJ+S{ZTXGb^Cfq43GU{axpB3`#?><<cRQFoWRN^%F=2|b
zwIzFpnyi9#Bzwm)Sq1A#_6{{U1?!pY9n0httaq|^sL3l>-(>GtCa+-qlf6StLBU#*
zqhpzZg0*Fb%vr}LZ=NU=nXpgXJh}OV$3taI!HY63=luAT+=~S)aY-(6DHc$*w(Jl(
z>p11j69q35_P|Y(n>9{+^DZkAP@UDRar30(lnlN_DeCNji!3`P&6RQKe5T-qDY@9P
zW7b?5m)>UzS!G26rn8z?+&t-cC4+BKnmT*nL}vvg9zLZP7g=^pn=9ke{Y)XMtVlq2
zR&&P9la5<5_!gzAv%@5v`#`3`cvzL5bS<6`Q&uz~#)SQ3syaIXuA=#o6r74`OxRDR
ztFxbUFP>0SRy2V)uJZP$X&8DmU5Y0-l@(2JGGW(DQD-NOt8mtF)8uB6MV20l)|MWI
zvzkRVPi_`jZ0TW0E_b3>>dljm4J~Gxr~Sl)Y_{5EMVEb=@Zjdhz}uT9ce3~w^xv8`
zH%6tRuj<OSHz~>oFP~YwEmd8fQ%+NEtFE=A=ZBd0D{^n1^lWO+cF#TS7bax$&?+ms
z?UT@!%B*F(mM?l6Y&>Q90^X3#R~$ui7tUHLw<<&Us!nO3>+Kb3EBm!>d6;_74Y?S$
zD)QCRF0<gXLFS=b=4Q41TFK_0(R*Xs!oF1pi-Q(#OV!YKoVBWnr!<szo`lp^UFS;9
zOA(?eD>i3+cyne&uH-523C~t3INuFzUhd(RdpaPl$s~eR^3?{e31X`ioNdDxFQtg4
ztT?UZaBEEy&(}y+kHw)A7W%Db$lS_hbR}C<;cS>=+pe`tOYUl&2-qLmU=qVB`DzE(
zglQnn;f$9`L{nD0)^fPDu8HSsEUU-k&<P9At!BvF%Vl(>T2$d|xMSO{^-N3tYMlu9
zAKGA&z$*Fb0M`VuH44tQ5sa5wL{nC9YdhT9(8TjKk<~*vY{EjnH4K?Yxs0xKiz=Lr
zaBSPPk!gvn_K5)dum+P9R>@Z<xF$>kX^v#PG(|LJg|@cCtxZilUsG8<lEWq}Jhz4+
z^DLLqmD!>SXCockc5P-_Vyk^3pgyd@B!gA*)dj8zVrvzgZKD`3EfGyw;jQg(YfBT)
z*GyKA#UPv4GGt!mGP<%_RN-utW81E+OiN<5PXz1_YcR=Sm3(!BYr-^;=4i%CTSQY<
zWNSOz+SbJLHJ8=nG05h%44HSijIQh!RX7{%*tTms(~?^469NCj8cYgUC0{+@njp4L
z!Pz#3@zN2|loj3D4!3qR@q8_0^-vC<u+VQEL*`R1qbsLH70$*uw(Z)<v}7*G&*2Rw
zC9IOKUT{sA2GShMc<G90%8J$64!3qS@q8_1^+*n%u<+bEhRnBIMptf&Dx8gVY}>V)
zX~|xYpTiqWDp)07ec+lPwqC*6HjeSq6Hq*BJKWmS#PhY1)nhTp=JgDjU%8B~ycShB
z8|T=zYcJE1yC6S@OTPTBmA>Ns>YgvvQ;n~@4|V&s_mt$T?^?=#<DT+-t)4ouZhcYP
zuf3-{_J><K|BXvsa)0%lg>~zVF1-&u7qEZCY5(*8cJ=LN7I`YMUw;4LYO|j+_3@j#
znG5cl_xZEv28Eqp>KWTL>8-KhcIRnTHZiA{v@d%5agN3Rzh!C{?mCpIt$O9yT^+f4
zl8&&$(`KKLw6HKSt(%Lh*2i6`{%X7G`zzPI;rHpy?caIt_3Yid&G+ZK{`pW>>HD{N
z@%e4`|0*qhmW$<E)QTvjO|jo4t9<?azmNCZC!31D&&z)|{rmR)d;UgO^9jxQy*oZE
z_hsFeq<@AM^-Y&E|1F$R&vI`5gOXYGD$nGbKC4^IeJ0=i(-tDxIpcmKSZIFNPxc3Y
zIQ^FYO#k_(jt`<i@7a8aY<Z`83fnRTX3YR|z83B;8@OF+7YO@ZSnOxO`s!F?L9<+G
zGgwOb%L-+m#$AO9F$>*e6S=PRGC$<8eZ>>JAWw#){6%2-45re@4i+x$R!2luNV6YO
zwYs9Z%wev@hePUCSJam|+_ey}ySUKK5M=0wPQI_5U_<>&R``Prty$z;n*=sgSoW1L
z*wFbe0_KAa{o&I73u37HB0a;SFOM}8bgppsDYP;)5Rnrs?a=fyXKQhG`J32vxtH-F
ze_;8HM<vM)JDjgbFSEESF`@sI2J;GInNtjcsSICRonLYXvIT@&h^!O%+M?;l%)ER4
znwC3n^%TYH{%r2%w4AQ~L@zGZ_E3+EOx419&k`ENE&eY&q<7`KjMfXMyJr?U>0LSP
zq2632dF7;x)}5^P$wpQ)CptIlnq0FASkdYhWhCG37RBy;{NOwOuk}XK?Z5Unt3D23
zuh<YH^NNvwdY7}LL+yeyM;6+BNa(b<!dZ6W@Y}jeaj)<FE1LgKVBxcS-gp1sXN%}v
zv{c$<#ZBdlm;NeVc{4HN<u`$>ZysAp$~jD{RibuTw#>2>(!IOc>#SVow7kfrY5gwV
z<!gdAyDwTQ9k%kO^2JR}8F$`IE-+Gf8SFA?s>|cD`7OeZok7BH1-aD^2`$yQr7Y&h
zqUII4#a(9(hwqe48T}C!f^#%VFUoB!P_hZ+T5Oy2(4}Efh+FlZL#azI?zpS|(4}S3
z6}RdmhfXf>oUb%xjg{2)-zsxD0;YTd>s_ev6|C1OkZTD@Z_A<(kLn|bIyqc5Cw}W_
z6&CCYQhxi9Yr3c>*e!xxL8>6PD2Xif0l8)0jhDeKlSI8>lA2J-5RjychSyq<LpuVd
zBxQmex=`clCAswlkvmQDzI$2-F4XvX3FL04K(1v_yL~_oJ*!^Z6|iYmCMYD7oC3RG
zlD<%f&4xP69PBVZnBA68yGx*UzlGZU2xRw8$8G+Cry^W59^1KUBnvL=`7N@r$F;@i
zU2uz$nBb`${(`4mTr?)zxoQXtF7){&ve3t+#pq>li;<w<sU?__Puy*4y8_gdoMwK}
zbeh@0k$P!4N2-$26i^Va><Cy^+ZC`($!X>{O{bY%9I3aKbEIl1P05_EGzEvGy$Q%6
zqJpQk_zRv2anZPJ=c-{WxbVy`k%ebmT8v%?w-^Zvo?7ECc*@5`V>3a?NS>t#rNx2^
z&-@lyc*eEG=zVaDk+|TgJ^q5HVq7#n+qr5GC7F6~o1Lph-iGi^YyAzoq)#l$ZMJjO
z%u_hMjrW(x@*Ryjcg$V{FL}haspR$o|BYSJCmw+mXy+-M-p>0=Wc`jtod;$wf{#36
z+thM<fxlt5^a-WB<~Uc~>ejUCu*@(w-M_0$cZcU}i@%!o{nXiStM9#uJ9x7$bk1FE
z%iHT`ZLW4r{~cOdw*F1d{#WPTiOzc){`BVFOPlwuvVEQMG4lHASDXE&%`e@%%Kmi<
zW7PH4TwDC6Ehyc)%JFrIVAS>1T3h_4EiB!;%K3GQV$}83UR(U8Eh^o+%Jp@MVbt~2
zSzG+3EiT==%KdeUW7PH4U0eL7Eh*i*%JX$fVAS>1tG4(}TUxqzmG|qE#Hj15Pi^s=
zwybpTD&N;Bg;Cd6zuMwAZF%Y5RsOG28bS7M^_#Y$bnmLb*C`W0_HOl?wz72Zs^Hft
z3qkg7^_#Y;bnmLr*C`u8_HOl?wz_ohs_@q-2SN63^_#Y)bnmLj*C`i4_HOl?wzhQd
zs_54#4?*^B^_#Y?bnmLz*C`)C_HOl?w!U=ls`%F_jM3Lub8YjRwxM+Is>IhRg3;Gk
zYi;wJwy|{Ys^r%xiqY3sdu{WZwyAXQs?^shhSAqoXKnMFwz+igs`S?>j?vdwcWv{V
zwxx9Ms?66Zfzj7juiEA}ZENY?RoSmo5~HuLKDEtn+P2cYt8!nb6h>cP{c4-vwC$yP
zSLMG>X$0B3-EZ2C(!Hw+U#Cn2*}L6u+RoCwtBPNzECkuR-EZ2i(!HxnU#DyY*}L6u
z+V0Z5tIA)e90b|B-EZ2S(!HxHU#DCI*}L6u+TPN=tEyk8JOtUh-EZ2y(!Hx{U#ENo
z*}L6u+WykLtLk5;FveV8&9%dC+JVx&s~TUY2*zArt+m5%+QHJjtD0Y@D8^i0?X|;i
z+M&|Dt6E>D7{***owdVn+Tqf@tJ+_uIL2IG-L=DS+L6+|t2$q&1jbxny=sTww4<ea
zS9QNmNsPI^`qU1;X~#<UuIhcAnj3R}^{pLo*N%N1<qpEo=-*`a?pwQhe*X0%=HKPZ
zUS#j!|DK<BZ(X0C-~6~abK>;GpX;yhoA;+`@2|IcU#~BYU!OmH|0KTMKR?}l_4e)V
zuRi|w*4^8`{2+h+{XPFHf1bae|L@=DcGbC_^CFg3)c^f^clPf4oiDcE-Ysvxo#o8+
zRP{BpeV;WS%$Rpc)&AX*AFuwT9RG9n)xW=A+keX*wwd+e)AsV~r{}+4SHElD{(q%k
zAAasxEBmbbbhp0$^w+QV*w|TXuQ?y)J1zg-{`VWan$}gVefIcgjYVN^_SdYRZ%<Fw
zpRRwtFMj?zm0!o(%kQuMxny@=e9>Y@k=_MsdHkox?~9r<S4ZDJUO!Gx?_7BhPtK&}
z;?tMEKK<d%p|?G!f8N|*WB<e7&S$r8#kc;R=j;3bmlW=-sjb?%+hkv7N}-<TtaZ<>
zmg@`g>iK^7R8m>=)5`sPh^>A7>AH2Xbr0HD7xgk&1}4t>d^vx;S=$w-XX4%B*|`;E
zf41Cxx&E3{{M>zeqGq2AUwh-{x0GCefB*Ti^?NOT=PfTt+0puX?`O70RXk_6TJ5yh
z9~Bq7r|Q?A7bm}OfBpOR?AeReznAY{<I`=vcba^Ud-DA^5994?qdt7Fxpnh!{<}Y~
zcYpqLclK}d)2894cVFeN`96KFA(KI5MOjg0)HBEUnMZ#<(kkT3zMc@LT`ZVB`C*D#
zM%mwG2mGeq_!^b6yz9*`olW7c-)hAwS9ICD*?dAd^hw}+SGm<n{l9fKX%+UfhSi48
zkDdN%=dU+ALiS%x-@deJt)2DSPPGq9jx+h2HZHdnt60Wq^LpcfV&4Zp7mHS$eI0h~
z|F)Xy-P7jF@&5la{l8${zxgUR>hHweUvp1YxL9c}%R?L22&24t^HX^8&Og>U_s(W#
z!)x|}o^uCV_*B1WJQPrsS=f?1MPP~ZbhcQ@lEe$8GaE{RC*-kRI?KCjzInca%=B$p
zR_#H5eV<>*zPqgW#b5W!mS37SzLcr*zFxwYdm+=Ry=<q+T<2)lS?3o174v;=GXK)6
zIbzeBwB1eSUVao*z}vj6I4Xwg->iKvLBjiA=UFX3x-?^B%OAm_%a*wXAh~5*AaZ#*
zAh`$c-^@CfS*ZD=d;PNFS^f|8S3|hc^C2ePS^`mBodH%Y`@{G7mK`FxF3;aS0<-oM
z?tD4N?9Y}RB769^f|ZuLn1S5#;ocswfwlz@b<(TBvfo)v!Ls@JV5dE}uY9M(uiN`#
zQ|iB^+rcXTybhlYc9D3a+1$%+>%^uv)vr&!Y^kfq`oHZU*v$J+u7flk+#kFSY-s)N
zNQnHrwGdbL`h$(qUG^y6{|ZE@#&U?#RBwpVPZO3E-&*6}?R{`R_oA0`o(2CX*MkJ&
z*Z*Kc);Zq?>lD2RcFqp7a*#&X?qI3&97~tYK9|{ixn`r&(+A6nXX%HnNW5L*_xUK-
z)sWfeGWSI+T$g^?^6c_06>|Kp8er{FE%z5LOMsYQov9%R_Q1tM8c{ax?TZq8pKm#s
zS*RIh)8Fpo332+o<IZ<ygB;Q&cK&hhwB<)XS7?Y|D)F1WGb#oow6MhqV%qbMA6#p|
zOzw-(HvR4S3m_KS^tby*!I}CZFy?l{Z(`>kKRmn+X81$vxe(^^EjuD~*M)X_Uw!0d
zI`874>a7KFx;5e4*RLKb-dYf&`zMTh`_)6)TMMGj8f`C#)U^rYZohgcerrLv?w(NY
z^s9%$w-$uz+JtU)(ESs_ZGQET_tt_S-I@??@vBP7H<S`@D8=7UioJ0rw>u@VJ0`I^
zB(d8kvD+oF+a|HwB(Ym3v0EjvTPD$1Ti2*XSExnzQ?u@+X5CHAx|5o9i<)(Vnstqu
zb%mPGe%|82z3l|oHV>|CCpfoxaBe%nvCV^H+X?n<9_-sru$eV)Il;QkgLT^pmTev^
z+fFcV^I+a~f@zxv)3y_g+dLRg8Bdx&S$^x<vMnp?H(xzxnzNN#UQn#;FHcXbeQ(P%
zwOwgm*~=r0mu?MTGxO3d-D^IXZ^g5hZ7J(94PMmp;n#uF%<K8~SX`^y<>r*_9IL!=
z>*942FWd_HuC%=R@0ZN7xKG8Oly^665jgxQ%~I>;zwpzsg-r*Ge%`)Y^txt6?cRN5
zF-A$pJ-XHv#~tE%=aTeJ+=C%iHvFX3#2Q(buyTz^&(eGQ{%=%ybeS#H_-`Te+_xuY
zbNHHHb;;PZQqAeIuc_dyyj7hSN`ie`6l8aqyg0RhyLnyr%e~Sse4gKRNdNVY&FXaN
z`d<6xIp374Re1A~ymzE!z7?Lf-Lf=lrt0F~fA~EgXMCUPzT1lDWPjv^o!gDf-~2fA
zUGCL`Wl9ZiPyL(UcGNuf(&YJJ_O<(WMKkx<=T}M=2s+PM%a^Cc5Ymxh*)g|calgJ&
ztzLGQgx&150vA7}S_`(z$GiM;xF%v)qY<sR=xJHG(l3x2A&{EhwE`D+IlpmPVwEf(
z>GF#Mq>3k6aZ#!9?M{myFO;VFY`i8koA+XEjkk_u(pp)w*$aRFD2p&U9HpI;*dl+Q
z%iAp?yZNlz3%h;1m!?0T*6@(IB*sDe!(C2`|1UmWY=1Vb=3#YljGeZ_{gdXuUwpb)
z{&ZT+!_P%AcCQ_i)bD>;eA<2f#OP10>rWQ`T*E$ZZp~!o6UQ&F%k%2_#QACA@j0t~
z!YaZp)!o@x@%`O*Ho5ERI_nwLM6G6=z8}Wx^KaWE?Mq$9YmKHHwO*AGkW^UPG-ow$
zH<#q0N4LKo{t(-FaQgJ@+pkW|bGq{3M10D|8KO@f@)<8}$+g_^_vP}}zaN$E+4piz
z>|N!|ggplyoPYgvpWd%2YR|9#F?h%K(d6G}E1~ttTPzJ9MWwryO_mFYU3pA@=_$>-
zdEGPTUF{9;7J6P$e7bg`+V}oz=C=;+=l?gU^j+SD`Q^@wzy8&E-C64NR`k~5_dEPj
zfBm|ubhhU6ySuWwQ)aIT&$@gub)uQc9=q9Yk1yqv%=KyR$nTGNePIcM(&5W(rdkSb
zH#Xmy_3c_l@ag{RD>VPEFt~bG|4s7=f$d4XD%R|gi+z9E$1PsArt?rpwt76nMDhJF
z@uLoLi<cegJ{0oWCy>!4?oXHLq&G4ty=Ja#mA$iy%(;TsPWFv;;8VJ}Y?gxewJBQy
zXJpMyeZ^EHaMCQ5IdapooZdqrufGI|PiXeowvzwEB-5vv-)3gb4S&^8D6rEkl_7H7
zvOj0+{4ZHQ@^iWOYoh2R3HHc^zIPqs7B1sCZ|8r>{E@aw{+|<Eo;}TLE^Je?)en3;
z`+4oUCvT-D`XtSmBx<l^d;X5Fxz{xKWp^L%`&8DuX5tZtYaaK^`F6TRzPRz@UG;qP
zm%S5ACrLb$DxIXm{X;6g@_n)DUJj+1M=W|$B4=Ftv8;N&c4l!$iqK<&NvVlZkGbE~
zu3NHHVUlOhVUKC8nd_?Os445X7<DFkU1NM~u<ym)uY#%}#|#&KdRMjG=ItfT_v^Nw
zoKk+hcjc7HF>K3TP0D-n)9%pWKT@T?S97nEo-FGdWRhBL9wc+?@4CS4`}-g4GL*fj
z;(A%FuUDkKY-{$FxB8Mh@_ZyrJTGnuPF6m;@a`+?TkrNwUGy>xq^zt5q-<gKmAC7e
zcjVR7<WE|ZdH$#y*UMLY3P-mc`(OHaan)oIUuo?{BJFievCVm}zr~x|O*QAdxTRW&
ztMEnp8PgZr#Qv8)R<4*V;2W*7NT9urFQz%~_3L<ZJ5`V}ekHDpzb3BVE3i9$ec9bV
z3b$3<9*e!wIDULb@$&8OUR9T$p8ef@NBR3Y!CR%DnG+Yw=;q&-fB0_i@3(2!&-T~%
z7H!$nSl{yd`@8UIvF7$~Oix|>CiYM8iAUbU-u^O>Y^VGmxw`5pwkz(uJCgBpfzy5k
zi*<){A2)j`oqhYM>VM<n%fSn}0`@EHcAs|pn7i1?-jevcPbYG)Pe_0LKTlddPR0CE
zZ|QV*B^if#YvuRk*7Qug<57MsR<5&vp>o^558FOAx)mwkjViBHImGzn=C7l-kGV^q
z>@CTM8uEKW@$DZIly^+z*PeTHA_Mz`wBK8bZ~xe$JY%B2?%bsiksHOgf80=>F|l7C
zCi18F_K!cxGbWxlgo=DuD7pPdLFLB8?O)G*@@Q~AF`11`R++gn`n^s+i$#l#XTpUa
z3CPkcY`y#*O|mEo7N9HefhkxqF+JKor9kAn`1`7|AX9t$w<~@~W?j#z={u!qd{8Pb
z;iZ7A_=Cg0pPD}0@W=U<*`BvAmHtobIC_7Z)YAKLw>%u*E&2NQw2P#G$36ki$1eg}
zCCZ#GzfDmuc`fawRPuWEoK7Q!3GE`Y-dS2NjJ{tgv@rTUr|%TTMw=xUN|JAJ-u-oL
z3dh}FWtoe3IG!lBF57+G@5Qz6>s?-4`yL{k>Y%`{X>#{bnbY=tCsm!c@B27QgPEz)
zW8q82O7)W0=}%l<Tq{q9DzkNe-;(!NW3TY7?R7iM1KC(UO>nyW_?zF0YyNjSFRU$Q
zP&?J&AQzNTrFEb4?yrM3g1bsr9dMBpIN{87mjAu=%G>t))sy6v)IRgeOzvF3({bvL
z;v%E}8v-SlGYM^M+;K);N$)ei^z_1G3WCxdXZ|QE8UNofQBqw@Xk+7zGxADipZTR{
z7yeTel<qk9M{$wy{|y%<^RN0IVS8j;-|^#&eNN4@PYh=n1!q~iv^<kDb1JUvc-A0s
zR#wTam|uGFP8*M6hbhna1efk?@4Zwbx3p5hEBpV{-Jrl@7q#xcWFxS2>wSwPP$)Sb
z6+3CH;FZ09{}GV$o4e+^XUcV4x|Q#22=euUr00RN*cWa2wmZ}Z6wWJdR8D!;sIm6%
zGBI#SX_Y}t-~at6vUWbfCAK*|&pu0>Wj4H}=(MH1_d<=_!b$}vYnO&^8$RAN=s(})
zP*c|N;Z5S=&53ezc^hB65jc4B@UgVRHfGXH8*eH)ZEo*9)As17n!rq1C4=f4J91_m
zPjyz%vv!I2wjuDQLI0^XkB~Bkh4N-<($5TU3Ur+06P#ol;8G@?c3Xt$&bK!yd0Q8&
z3*?r4X$hMyYwP0}|0d+_k3|OjQ>S-09hZ(5*>$)!U%TXLZ@%&u=DR-^UHEuRy!Bnd
z{o7ozrH^lO{B<bbr%|%!qw7NJJKwiCh2Q;Q=45|iu0EG+eof#DzVCb2UI;bc*L#7#
z<aswS#w{q{ceZbyMoGKR5w{nsd|amdY%~%Kd@`e>L#h0PbB@cpQ_e0E<u&*PUHdXS
zG>Y1Fj<`KprQ;&<vvHF^;FGg)^E8U5@3oO$$S>GqTcD%XWT+rz?PBn4!^RtF^5@+$
z5Ik`d9zP0?{k&U-ij;N31%B!7+;8u5TG$qCbY@AGR~0i(%&Xu1^WnR*yRSYv`snVf
zXa9b!zrMQs{+^w?ckcW7@bJaS{NKx8%lFy+uKoIObI)3qM|a<z{rl<Px9QvKZ_oAb
znZe>e{r<eU^}B2S`TnWB*!?+O-1^ew%jw70pIhg3MSb~tasTVfYeAiC_aC64iMRz-
zRfUzi_WXLs`k(L9@2mW;P0#0M{m)4{^H!~(?wkI7{(qDE)i^uT|5sG}`}M<LeER9@
z%ctv$i$6a(RkB0<-JFcVb%IatDJ}l->FT35DU~~~&7PyOee2(=cQ##*%iMORbVjRZ
z-}yKj`*WPnD}T(2K6q^-$6B#?`BazZ%kRgrE-JgT*Cuve%)WCowRAqO{`xa~x&HcV
z+J8f}n?OSaQ)|oqY>~B(-&eKM#?EqQOx<RSomKPB1VpGWvb5Z1b#L*>#ZP*keX05R
zY4_*l=k@i^iT{87W7XPeYfqZV<yQXrlJ&8w@N2C0&U5j#dzZfPDERnlm1w^7kAwHD
zOfFkA9Ah?dZb)Of(8D;3)4`ZEBaPv#%!0xRN(!?c2!s}N=vlZ($}HmL3uJG9(d;a8
zNKxvcVDE<xw+a_!n?-_h7diSfTHH+zDMN*M1bZcvqzqk5k~%Vu2wdz?TqNl1qTJTu
z29<C!NovVB!f~-faFL+0i?UmXTaQ4mgrbxoL_*?Xhv6c@WEbUQ9d12>y%Ne&hHfTF
zJsC$J62dOZY8`Gq0=+X7qzoNRlA1D(uw3lmTqFpU5bT|yBxUGolGK%PMC4+J<|4sh
z7v*IgZaxqRXOpD1j3Yc3J0uqg8oMZ`b-0}o=$)Y`WeAawx!7U3NU+#N`B{hC8NuEe
z%2I~zCP{r6M<5b;4J%rt6|5ezbp-8TTqK&;u%cC3q3R)9N74?)MUr_9E83(Tb}=r~
zSG;>bXhsB^uy<mTrH@W$XR6^w6SXPFO9GTGJI?fBUuq;f<#b7a(PhV*KI}`4Wv84k
z32?gXDCx_-)I@g5<&uD)%Z`!0>`P5$r(7=yNV@De)0cgzne3F?B>_d39dG)wFEy8)
za=#>?>9V7wANx`Z*(r}p0w!H{jPzq)YAHMAc}c*c%Z@Ys*q2(#PI+Atu<5enO+WUf
z*0NLHmjoQT>?rBazSKr`%IA`ROP3uZ{n?k=%1-%S67cA<<4k|{rFODYewPG%y6kw<
zpM9yl?3Di{0ZdmMB?H)(I>=68E)5X6;usmgzSL263VUgQ(iO*<0qjeiWT$YK1{hs&
zycxj0)LC{4e`$cz6-UWH_N6YeQ-n(cg04752C^@8m7OB~H6ZSab7dg^Q&-y|!<ity
zx1#iFE$4NYyWs`CS85rryWG8=?|Y^8=QWoLuS(6=m<E>bjuI|4Uu_y#zIsu2_ez!}
z!VV(-ArrzF0&M~vs~BBAy0B)l2^<v`T_O#Z$OB940!zH4vBaA^1uYNrhP%8jtS{L%
z>~374aF?OXTtIY*^nrJ5i<(N9Z`^eVnUKe@Te^em5^q8|bD-lcMp|l8m|trsxkUCv
zd%O?ZOZHDM#V0#THP!q%nlhnJVSc@#<TBNaE|JSZ2A*7Lo(D}dXQ;CZFHKk`;xjdA
zXV8;i1GU3jSiGkz#W#agMjR9QsnB!MK=<IJWhcxNUD}rVPF#Oz2G3<7o#L(<iDM}<
zrX`#VesUYE>-2o3`R!m`T%tdnz`8cAIN_e;)0W9O&BJw{u(FZP)UFy$u&$dSPm&G6
zcCApl-woE~C;Br5tn1RM6XD5VU6HPKGRa0h-W#51eR?Y~G4W;Slh<Hfr#C3cPXOzh
zB>J-rtn1U76X_{nU0JUCRKU7&v_Bb2PEL$!QjMAT{$vM__fDnwDPUdKM1QUT>k?Xj
zqC6F>tJ>90H`&O;dqV%|89bMSo_sb^Yu>{0^FYr@1zkrwL$HB&v_DM+8~8MCBL7)%
zIDGG_$p-sqXZVw1V~~$d?^TMQ1GeRz=+75mTZ-17C{K53dm1-U|2#}r4NTW>n6CK?
zV7j<^L1A9B{zQ8Q)NT7*m5p@1ch&U5bTyl(HE&7T5Hm-A-L&=n=O^7)`JsP*dfmkP
z)2@YH_{DWAk@fA0rm`4E>y-=UhFv(PmGNA3%Q~-(Sth5iu9&v^qHg%&n00QuV|uH0
zO8qS|<$9K7a^`x*jP(}{;uk0Gb30tq+xAn6_p_<gvuvouhQ!`B-fWYch{cJArFf;U
zW!%`{cDT({%52R=m{iE(#Kls)(pNKXtZ+N*W-4X2>f(mL-nQN>lN_kj^^6-k+zuZz
zl`>m*aYJEmTW_{WPR!!O$5On~5GgfNDYKOqH+c58`DU5q1T9XSEX6zfO2&;PZik^#
znZ0ek*(NzrixV$P@y@=Mabt_y;bo>$W@|5QfJ%iePTVZTJNs(JjWuqE(@dqzR$tr@
z+1qwD%OnRXbv@(89=F5KOr^}$U))gH+jchFBqwfh;%6z|*$}B0*{7slNy#qG*Uny%
zy`^X0mNg64T{QmnZd2PXx63cI&q%$}ie2sVKKx}=Y}0<d!|~G}tv~(oy6Vr@oBot$
z{##{ZUwbpsId*Aw=*qfZcQ&`}^18li)88+=8N8)a*M+M7d3pE(*Q-@i>}%Dcz^Wqa
zf0b<ks}lPE#W54C>gm6i+Lyuhc>TY;e7WhB&|P6)*&6n_uU)wA($-be8NN)+VlBOz
z&G0K_D_HA2mJ8);Aj*sy?D8PWzB7I~nhiE@uh4??3E3-Fm#lrYmZ4TU8f>vX+l%I#
zT(4GzGk^J+15qZsAU_MDjFquA1ETCb$BWmu!EUMYb(sI;T0r>AsH?M?e)(+&+Z-o$
z;rMRRE1~PTUj*NSC`)#@{~e;toB7uZh_ZXq7p5ODy<)n{?LO=Efa@=$YE@&LV;5(C
zIa|P6+Pm(e_z{Tf?={$IuLFDXJKLAFg%D?%FW{d5an@eO+Nm*M*T3g|5&RTlU%tbA
z{p(<7RWtuuv9oE{tG$f1kKoF7KZhxkcZMr-+68v~J?RVSmti*VTMD<iv6Qv+YBlq(
zJ8)&@H%zZItgEg4^Y+u9tJfJ*zw>UF_djLw=j``SM_;D0pW3|q^y==_k2jzA^eCpz
z(oQ4bnaSzt;nTZ6uP;klC%-x^+tXflexLvG<&Q6aeEFl~&vffE4(=^-uQNQ4$)#PL
zmHTF+>MxO+8Y?@5st$L}9~Jw4y!!d+^wF!IjvhT7Yhmbd$z<|hhDFv3w3&9jYuLx~
zf`PBy)uG{VAmataYzsXmCK*4kh7(eL-3<)w#?l3QTNv6uD=8dUs6C^rS>&Q<&QZr%
zFSw39QV1<!%`Tjvx2tKVg@<J9!8n;Ez30p%F1fY1-%jEXe0b4JGN_=%{dO9M;Dd{|
z&79SkKfK7Dt>^+0I>8|*2WPK=vX3{NP55_FJcsRb|Gos{8TDUSXCM6Ycms$jBL)(6
zzMOW$R>@|T+2Ib3{$*!39CocR$!!x9l=GdPDBkxW;}(xHSk|1i#r<-cgy4h1lv_Oa
z(-`F3mz_0GI+T1c&EUU<)(xI#^6p@xSAdNc1sS~<WOrf8ZJyo63>UXamf77EJihJh
zhSdxLxw8`wvw=us77)3Z5k!izgUD8}$XAfa!){&$up1wP4GP*IdB)z4%dGk5aZj+V
znjl-%r=8tU-g52YrkM>LA2M$8C_BB*xas5IQn4kc?LFrOt0*&J0Y<sy)6N<wZR!g?
zoyMeeXmP4>jk?RV!Yr^l9gr!@!EWCIa{C;xm6yR*MuDt6mor<jl%-<MO|!#c%nG;6
z4*vp^+MFQv42DIy#(&ryw&b?;2t2&FP14DwVoNStk9_*Jvke~~?@2ILv1o|cAo+_M
z;+4-}bK}6~a)Z3GGt>Bu95}RHKmmN?Avm-<82Yn!F{vz>@H#uHrDcc7*|zuG0@Ih>
zHBdRSG}Gcq-G;3uy6uXJdfdyJcY2y@+~9kres@8FO-ZZ3iKed?;u$X85jrs8Le#8k
zCMK05OLJ}C+!pY-U3EiLal*E*8}2(O<i1W+b_bE&E+F!=BZ!OziyUQ9ID3|H$#dom
z-LrQY8HFBgO0Zq9-{d<xi$}-lrmqv8aHJfp>hNXRlwjM^=^(bIosZ?x2D!3n%sINe
zuRAAjOuuH<$iTUF=~jOQC#M*xYlkPyh>NmjRZ=;!G|`q(DBAmQ6@*=LTs9#)Gs3^6
zWrt1#{|o)Kf0+b@9$va-Z~&}>O-bcQ>cJ|9`pmbI9TNnmZ~MAooAQKhUkw&>EXlR~
zBi^`WZTml`m|NGHk4?XJu92g&ATw8%W5R`~sA_hQ1-Z5vHJNYaKw4Q}GyYw=wI1Xi
zu{G>preEW0;@~Wd+#q)$KB}5SN#)Set(^_LH4JN)ZtVssnsv<?WX^96kU5#QZ!8q_
zd|xMeba-E`YVuT?u<R?#Sr-N0*PP-UjV5c=KX5uk-R5Lc*)r`~9l~5|E`<9vL5|q=
zbwjx`D44@r9By4ZT*nOZK(9>07Bevx(WYycZbb?xD(dCFez+gxzcn+!q$`N5IVlK=
z)vt~U+}E7{D^7rT=dgm4QcP4d57=V4W)9B6%t-!f?+o3wv221uk1lPJYddo7(x!O~
zV2S%`8@6s)qwe4o6LszIgd0&&*Mt=q_4aPP-e7y1A<{elttrTjtgjFLS-Sn3lnXej
zFVusgT4u@gd$+O$6gF<viQs>x57N@I>^~?bHvDCna4oJG9NE`F;dblV;RPTE|6vFD
z?Tz50OWWj{T6Sz%+rC8>#5Pj^r5Y7$rpOI)zqlQus(B^&FMDUNcZ4T_y<n$rkt>@n
zFn!rqaB8=G)2Ij!{u?WuV`g1DJb`2SvpD9qmTQ;pWD6*Oq!sO1)-K(7UBSUA1{}rD
zK<)xX@h&HjCtm1-?c{INiReH4<<gz(1H1TO>X9M?<ZN9b5P25tg;H4%TT~cCZsh=x
z`j!lt?@T+cvp0g%?Ag6+fkhxs9Z>^WaL5G|MedwM-IJP6U%IyVU<{+!Ti@c{HjC!=
z^RxVY_hs#>t}-*f{~g;T&c77?aY5{}`sJhB7WnsB)LPBkBz#-4_EcQP^UurQ9NV_w
zeqUReRbo!}$2oB)&j0V)CL#Xiq~n_lino$%mY!GKG575G`lCC*s=6d@C)q4N|8)7Z
z1>&DC|97dbHYoo2N7H)a+>6WKw3gY`A4|yK{`EHFh|uTd!YyTf`cLlvo4v*S?AZ>9
z`?7m}y!^9J_n7dn3+Iks{^=au15%l>Ja(h*vEpAWc3Y1AIa#t%_r>JqgP(sI^Eq2D
zJ}<Ci?)mfepTI8MHevp)B%9^_jE5#H@b~Ljl2lXPax?f>j%AYd((}{Qw`~5o`Ds_K
z<9=D*w=s2j-5=-JHS*^g)*Ibjrg*HJo&VYAbf&g4xA~j`2Uu(E>dn$~^7;Qop3#4D
zo*}uqx<#IK?+p959?$t?9}46e&SQFZIPoJ(?J<S<ddDU!Pe^~P8I$q+%S-`AJ9+WX
zm-jE)Ykla;%ZfU$1oxizZHE^uIRAY4GzovcH1p->)gFMo{b%yF?Po1ij!jnXnBP+z
z-Lw3Q<o1Pg&z{dU)O%6B_|7>2=jfj2Uo>knIDdU<DcC0A&$sN{i(*FRT@v?s+i$Ye
z+SUJ=y|tX(^vEBle=-JJ%Gv+xyg2$N(%sCm{K<9uE#+r7SS8h5e^hp^psq^5uV*>?
z<n+gqGTV!P#jv%VKYsMjm;MZOcK`W(+<Y@-4fkaiTF<vnH{WukqRQa+%^efsCp^hm
zsQBXOpGtQ->(UHyoBZbuNvxR`^5Q&PeXN$A+xI`HjOI{zCO#p_DzD??p9?JKZvSRV
z&24?SXYcudG7aHpZ)*?yxuGs_JkDKnVnNx*vvpaAPDmfDaJ!@-chsf5D?O!0DW?2i
zPf6gB*XQO>)aEKU@Jq6DQOEVU_R7blJ~Vta7Fr{?-n!ncZ0bX{1HU9!UIj^IJ9{#)
zh+VklC&b9e$F1hXx5PT(pxcS`GIkva&YvgVHLz+cuD>sP!A!Vp<6XvFYek0!=i324
z?5@aO*e1gC=G?-ql`V{dwp+IKxqxJXe#G4e%dl8%(QQp`eAlpTser<P#DhT!^%=S1
zoed1_tlo`(7H$nyVJdrm;g*IFL!;@IZJi*^mxG*++?2hrMTCvT!bG?Aul9k3nVLKt
z1sPFX);SH%mxCk(9$eTWvX7ZTX4bSr4R<ZKn6+-$!<@joR##C_;K7Cj%?b8fwl%vr
zG#qYP>hSNvEiSO1rZN3=&X)FI0lVmLc)7#vpc{8f*tVE8us9^}u6-*nDDdFIHj!<6
zL2li!vV?t$Zma2T>jk-*YdY>S=6WaYeaV**%@zObT?5$Zp;1a8r)%jPZ0L}SN>x>Y
zd2i~Jjs}MIX-hYlyIi}lX$k{JK}IAOvr=|Oq!$B=#TK2`e1;QJQPYGNb{A)ePUL7f
zAQh#m0%|6vYSx@*zIH)NUJw)qAos2=abaPx(23xB!oPNtAl!3aZY~Gj$waX#{}AGD
zFx_&>6%=f@gCYudG2fbYX!Q+H$hW-#x%NNU&5?2k7UpWQa1>-jbBW1EJyldnDCb-I
zNPtlw!g;j`k`)37E1W=PUJkk;%LEQ(hW2GkH`KF&B7|{w@ryNH0tY`exR!(|c64-n
z$dKZ`&mth_o1F-1-o%`E=<qt@7PqpJjTjGGQFrM6yh9E;Gk9WU7&aytf7x!m=;y9^
zf)h(k?q6pIw`p(8WbD{>cEe{-b1*TS5!B*p;{}mv93avS+!E8`1F^Yo%3iD~^nYdR
zaP4AEvAlqw9H@Qe{`qdLgG+_Z4W3R=W3p`qivYKo^8|*ZgJ~}q1bAmBKDTJNc5%bZ
z4vr5Qdk^t<oUn>||3O*l(Been9*&obzlzx_DcMMw2@5PNHOWx}vkz~-#<-=g?W~JS
z3#4^jHC<kiQEu(@pI{wkARXW~<h9>_Kp}9ON87R?<2KJ`aD%a)(dBm93;jcjbBz=J
zWbD1#-@(v-E&Fdn$C|}o<3L((nK2*hzc%}CN5_W<P%|;={WoQ3J3C|V-Tn@aeo$L=
z@z*+gB_^9F{U0}1u%EDs%Krg!bf$3&$eccqIkU_T?_+v+af_szONB|U+6~2qj9Wez
zJQyx+nOTs_;Bq;QY5HBkwc&pm1tZ;G$JV=m1L>Lk+U<V@1s`q%wS>3a`|b{jg}Ioq
za98$X)l2yj_DJ{FYeAZ~<hK210>zaRnEb`ivF+@Kqimqip3df=bA#tEJER4C?e>3g
zVE=;z_J5GOQ;pxqPAuJ0#^B=8;(j_!LNLl5-ct8(z-ZjRIhTAjzr{d6cQz+DI2!*X
zUtQm90J7^pV+ZT(!VbHzzj_?Z8xxEt)UWyFE5NoW*Eq-YuHf2Q29S5N<sDo=&Ga@y
zP-Ohz2gQ!0A}C5)IzD9F=FzkSv2)Bosl=lImNd8WH#}6R-SUkQ9`U!>1t1-z?;VJa
z5}!Cc(A#1y4lT|!?&0{5@s2scB}Miu$bOLYCz}&ivwkx$!6Nn@GY8lw3%i*W#B$pH
zF?F!cUihEkNYhyh5BamT3~L_2)Gy98ext?Uay#wD29V=#@PNq-kVwQ)5IaH<OxA)#
zek7H<n|x<H;tevD?Q{P#y9Nz2P<JFr2oxobU~3k)>~KA~!TxU=`>**K`TZ87O_9;2
z2sN7`yKN3Vswv!BQ(Loby32>hD(xTQzZzWs@TlnH)lZ+k-2C+C$Lq^?7yYfO-TkL@
zhm6kMnw|e{s{H@<=Fjb?Hy`~e`I%F=ZQ1^PJLCUu*kwJdXYTx-J8eDxkN>x+++Fqm
z-;2Yy&EMC@{rmiV_Wu8W8b4eY<~?-b?|b|8efz9z?f1sm^d9lA+Z*>cZNdeC$#dq%
z&DD*I%e|T6_wL`XXK!C+oc=j^e*XJ+{rC3$|M=qM?$^7o-v0gi_Uy$+e|CpkZz_nI
zTvGQ$ZF1lywcYa%$@squGtaM!l3hD-U%YO9{myvf-8R2+uK)S`K!1MiyiFU!5@+|z
zPnLO+U%$I{|F3`3`TxKFy8Hj!&)@4gK7QLi+q8N9#g590b+T_dlZ5i>Z>@cE`?l%Z
zvwz!Ve@MMO{CD>3uTk}-bwYZl?!H>@Zoc~W_v`ZS4!17lldFZU9bfqueL?v7;I{G^
zUk>wyWIW@G2^RQQUsh)HJAZq*eOmCc>@OuhpRPW7^W-g)ILI1rZ8MFDdt&6~&xz67
zA2}z+_Wr~jnKPd~`SGfvKP~C9&E6e0vDSOi#WU4zpa1vy?wplHoaZyw{W1LT=j+G$
zdV15>`|ArY&Qyw=vmQRL%j)W(VLYp8pW(@?<@!O_Lo9wjefjChr_#QCr5ArcpFi*T
z?bnZL5VNt{uC?gzx32&7=hLH_kNf-98@<*%vpx33oqK-{@Or!4*E=6yD{JA~ag6n|
zqSUr+PrEOl&YLp(^yJME0<ZpjxxM=7>CKO?pA>0bdb?{=+?PI<*VZ1|eQ`Q*Yc9^0
zwa-0%v2FIjdCghNBHN1urZ%szaWQRK;U;iZV$m#zkl>Ciw!pKBS}hz)nnX@Hay?aO
zEt=qD>9J5|NdRAv2D|2zW)ZGkC**=O`p>dzPH7i8<;?X|vGvmgr%I27HcJBJf;3(f
z@hY}TIdPdDv1k#=;?TSz5VS&ZNr1D*!nO%cyo#+&Vs$K<S2%)J2rdaw_R;fL=r+Nr
zSD{tPk;}A6B#T8;WJ^o3$HHS1oO%^orJT7;kA*P@tuR~?02gc$OJ>r%!V<KCb4h@(
z$3nFUPQDvVTST(pf)gTwJr*vT;N+{=I?IX6v{fXFOY@3IbR|r%Nn(y8mua&|7Mtc3
zo}d+yO9G5N7N$*bI=kUDD@a5mW0mESfMSn@&n7sXRcxK*%w^gxlEtTaMJ8y4W!Y54
z)}{^yDgM;!wo_ui2bA4)zFCTe(|&1|+^Kcd8XsRRd^4*(NJFm5@7smL6WW#H_*+fo
zc9mD2aCDT+?_a5CA-*I4yD1w_vl6i6xQ-;qj@|DTzS-5j={49wR8F5|r3R|VyM=G8
z%I3FB5xC^&!K%p1lCi*ArKGv#UH^r*g1fAp%-vty<G3re&|0}9*(FS7m#$N}>x*R^
zcZC;5E0wsn<aJ#5E3iw}soXi`<AQ3%6780EEf;zPcJVuHcYGmh{H05>>M+mV1h;F9
zReO2%#<s=jIlrH_F#Pm|*{Ls%8hweAtXj*nH`L9g>7J(Z`Y8*|PhH?neNk)l#Y(bj
zHqTz4wtK41>n91mTOfY&LUqauQ=>0pl2x5Nd!5_j6rJ-YEEGR+;dgS1(u=o-Up`4x
zmGkViYP%=ntlzir`>_kz$uHI#ez~;6`s~rws}B}^zF7Uq^XdMY_+N_*7qY4?dB5|6
z=EU^}XPgQ3y>&Nd#+h*6TX)~g$cZq`EZ>~EDe&r&yJzQ}JQg~+tX$g1Y~`#iyKg6M
z%DlSd?p?9TXIH7cefMofPMoRc6Q<a?&P~hK%od)z<rF7Vw8@M$r#P9cZNQYY3z+)t
z4W@1fgQ?xoU}|<Un5xbOQ_;mU)@1o*c*Q?uX{>eh2~*YBu(spmsyPZ9&bERn(Iyb}
zVb>fmwQ2^0nhBw1L8#dfYR<`3&svtrgjqU1@U@*B3Zm>MhpyGz5ZnM#u;DU<3T}k(
zAXG5e{0)~ORB$syt{GxfsHJ1VVos1z35&TP6!+xN*r0^PJP;l)gyMrx{18e2LJ2}B
zp~<0VIejhH6*V2O(^OjxqO>8DE`-uoTYX76VZH=d`Fu$TB?Y0RA(RY+l7$$xvZ(2R
znLSvunInX9hET2$%3W=BP+Y=n6|k<^st`&ILa9S24Tw=|i<%DTg@SeIg+r)F2o(*X
zVj)z#+UiXb3DXV0nx`8=C?g1E3^5AiGqr56a<yCtl@Fl`AyhGhDuqzxYO9Tc6DHe$
z&6o_1u7t^U5Tn)?H61W#@(Fv&(wNT!PA2y?3?iorv+OHO*rcV-QKNh?CDc#g$1!lE
zeduKa8S+4yUv2d#-UH@J5RE?Igmr3`<V4Pu8cKGmK|vEwW<7DyGBS$nz3$3o1*Tp(
zf~ixUU}{w$nCglIQ(1{%$}7_-vX|XOtI#O&>YNKxLg%kgNOhRG<`ier?+Yt?GR`iU
zA-v{RTI&^q)J<CI9dEN2NUboPoaDDbE4N=H0W9|P<cfxDusSa0iLW;Lgqf<Fq|SZJ
zYMVcI!HOlJegeN;TD6{E^XalYxXM3d!lu0-4{Y=gS@9+xtm~Hx>q^TrARqsBY0VP5
z4pL}k+`4SdFBewL?J$W`rq_MA^zx?)AF&Hum~;{BhF8L(OM*;6q4P#qbX7^LvF0<D
z)pmi7r*e!V!3tM$OB*z=1eqgv4r+l{57+{bOMX3rxx}st<`T_wFoj*a;R;WEf_Unx
zx|T;|H7J5_sB49Y?N19j!x>h)sOid+^i5i}hwK6u&iV&-Se{?TDXs0@m3Ot4cmKSj
zHNCs?j#hj3&)cBbS}nJG<MMZ_+VkGb-2G~zboHZkRS%BM+rC<E`^M#OSGDK9iQN4v
zP`dikx~dDu=51arw|V38H>=un-bn5~<u-wHwcLh{&tI=Pp8e+Ku2&DGs<*AH+H!2(
zn$>b^Ha>r~>Uh?hmAhUol&W5~u4>7#c`H`St=Rbd<*MVEZ!&jzB~IjAEw^-|`pZ@9
znQtt2y)u-l?pjyXacthg)p83rs=rvpp7G}A&Q*t)!yYVLwU0UM-ojP8n8WTYT(ylk
z?AAiB>Is~yUs)xj%C1^vmEbD7D$6QCRd$t@RRXK*s#lf?Pi0oEvP?KCvntCnVX4e2
zEz5*fnN_bW5>jPWt+GgPm06{yYLpnt%D$$-IrJ~vni}WOuWV~7oI~HTttoL1eag0`
zz&Z3T+nOBb(5q}~GMq!tvaLyR4n4}YCc!y$FWZ_J=c~Jvgu||89q=*@3C%jdWg2od
z^S~*SkkHHnT_zz{GY)u}goI`s;4%rhnttGvaY$(TfiB~at7!+kj6*`x4saQVaCZ7c
zgidADJ{1r;nNj;>K<Gq9?Gpi^{fyej144TlwT}gab~9=p4G8UI)IJgr+RmtbI3To@
zQTtFpXfvbs!2r|bcFy>{HnDM_y?Sx;>aKP@xIOvu_3q`%&-d+*n^U{}@!R?P@Bi6*
z;P&?P=lAvI*9%w1%(35nW8%Cu2jk|(PF)c{uV!aWW!ayqv#-nb{mN_j+QlxOJo@wM
zr&o`zUjAxSQ(yhN?(4H>FHZiwtH1iZZ`bYnd38IgKj&?&*jTZB*UtU_UVnXc*F67S
z-Zh`P8->4rziK}D^5*5IpO1#0pB}$%{hjXa>ASU!JoFx=)QTRxD0@MaQI;Vh;o{o=
z3LRogid#4xql(x)Jo4h3j<Cp!DJtr@n>~>dc~lhB(z0XD6orjj=YRy$Sv>;upSyar
zcza*w6q$V6q%cirmzCOdMxjTSwz&tDba>yE;{>z6xo|AW?SEq?;Bi~-<}pDKsQ@Oc
zKq8Tbj2_;)k|I%F`L~r{t1@NYR@N3|%H%vZ;lkCAtko>Fv-NK%S5<O-^T<(}z*?>1
z!?G!%zeHg|o9(9Gpn0$x$t^BBwv=={*s$8z<c*;LXYAaCiT$97oDJ@6M@(un)}(?a
z0^b-qBxPsbNCvYfDme1nn7lD`a*7dqBlzXO;U?QAxf?qk^mN632s|j~INwg|hVlzj
zH`ZzwR{a~wFD|<ud#X5f325@h)(A9>*8fMmam(9@plP&k9d1{ZZ_8a=achTFPuI%}
zH@3N(_{rb?)^Y4*GDx^8=eDv`Xg~Kij$dCk79LdwP0q<V^4sX$P=3*PoVA+8_QQ^Z
z{smtpyd@nLE}b*u+ldZ=C7Jy^oF{W{DLXoarzhP~c6N%H_040tOtkl9IZ2^MmjV_s
zbgo^R+3$E=(Brb)VOA#v-)f#3rU`9#c(|0r-c0<bFoCtYWX3Xou&tS3AL)Ypu^bej
zzpiX^zp~PwcW)19cF=Z{x|2d~b;@=|2Pq#Tjbl&FY;)iBOkhcF{~9+?yg_^#Dhu-O
zS0NBNm7`JThH|VtC?dYdGi9!@a&D@M+~9tJS-OL#>!d9>#GZp~y0gjs+lvcVXGVXM
zP*Bv<txoaC(bcWynIJHIn(e2xJkj2#<(O5DEKTj_>0G-s(N<9C!KDkQIJiG#?5ll}
z>awnPyV;)&*76AxrZuvAq$sZCwPzHHKGoEiY|fdV`y<ig!zU4*JC4g9LnKZ&H74ub
zjh3$S$oOT?lqqd7+kzo8!)jq--`QyCI;P1Nu5L8@<Kh8In1Svodu95--k;R!9CPcN
z2Za6CA?DV%6Kb6fVs9p<xGQjf^QdR^aMtA%+4JC<?sUr|CU-wc2?|ZREnwr2)Fl2!
z@XO0<ZSrv^7`IJZW@`kRV(zb*-mt^u?L<XIJ>Tjlw^@!X&FtstEXaHz&?uzSlyOV>
z{%L`oXF>jWbZLwGr>PgN8k+wBPY~NS+1<VKL0CaikNcZPI5>#^x`JE)nz*bknGq)?
zKF5*$LeMPfx*JsnpiC62G+~?VrhI2`>@_+_O>b8;^fd<?=Y3o5COCIp{N1wip?a1e
zC|kuBF<jbV1x_J?UtT_In_p2WaH7d}5@=#tt`jsd-QUvbAQf)oq!c6d?8Jf_tmbPB
zK_j=vPITOOYL;WD#AGA&YV$!B243$J3y<nG4yGX4GK&WqqB{-3W=IJN%JFLRbX>5K
za+3g!?<qg|!1VB<i4$lbwRgf}(H8g19Fl?$F7CO)D9m8eJ3(2C1uWa5C!zT4;MyA|
zN=i1f!rPMVT8=jfCdu95@?lom(#NWNL}s1nv`wsh3re^2PS_h+?(+GNfDB89w4${!
z!$mWvGFyg4xh*-@!DK6#G-g;-xmFUi?8E7rJ4nsG8w^PYISkvg-`au(j-MGBsU29f
z_4Ay_7Lhx*D&zzO7jnCGR2F34t^^Hm_DuL|zNK%PAe&2zyLUBsRF#7nwEm%`=6ch$
zi$;eUI6h=>o?Xy!;ab_}14>1SYwkW16nuEm$Z21=viPxE*>Zw{au5TTgACM>P<&Rf
zwicvjV?xV}!&}Q{y1O*EcOPxw+>r6sF#YU7fn4Pj(3%eA6wo>j<tN_E3b))&fEG!#
zfEG#gPFN%L@S>R$Xpw};9Ltt#7tNduQnoQj3Nz_QD6Um$h%j&ht(52y`2677x=)}X
za090^&C%7Tl$8!G&TM&;FDU1$oC2Ck;JDeWYy(={(QPv?wq`SbMx>98)#J!-LVfT4
zL`H{8u1)0Rb>N=3S3+siR&!e=C8ybbP5G-i`j<^k0BQHUP}+FyVu?^s$A^dlp#|SW
z=D1wuJ?Nlg!MV$VA?cv!h5PS1rZowxscgx-c1Ecv(MJvxaJelt&I}+we&+@GYahGA
zmfi`rtPL5`inmQcWV9lPyv+k5wNuJnyk#YYBi*v4t!|%YaN5#4VJo}CmL+K}PY%ua
z-Odae{N*^P9c<tP8jh7v1P#Y3FJX2t>6x(iEkl(1VGd=b1B;j1w6MiWWV`z(2<|kv
z);A9{r68fG?8KG#_C;q0M}M0jn@ff)uW}EVEu{3UV6ChzcnBXHLtk868r&ZT8EcfR
zTq|pPMrp|duo)b&22KI5z{&I0Mdwu>|Jgy_GGlbP&GAzo<ods^6<c}*cxHkPdvI}w
z0S}jE|JKFo8#-b@jsYbvxb#C%YGB`9_60mLE||o3{nkZcNYb&4$#(a5VW}{gW|*LK
zI^*q&#O=+Bv)oQ}bX-^_C<ID!V8>oGaoTm`f)z-DqrdGNi%W*AuQHDopTaCRiFLdU
z8B&Q4Hd!xHG)YcsU{zjX56T3xV4pO!!<++3oCm?K1*NbHt<lz1N=k<o=eE45W^lR9
zaWlBY-6SH#r^7Yd-9NzX$)O04ywaB3mOtX4STvOZkzWNt<W_bE9SOx)DTa*+Ennmt
zGBPZblYT`QIGuSY)zHJqnfvwyr;d{NF^DI1l~exr!W^-sXM*6u(k(p(3Q9InZYRoh
zGh}s@c{(`yrwJM<fhUcQyt9$IB@wv0IAfpc6IB*H@6bvQ=8HzJ8aQ+oZDm$ha5^1f
zkoBT3AXMs-gO0>jXP#xN43;!T7-XGj44>L+B9OZ{ZS%Xn3=NA$$9Zd3sV!;D_y8)T
za+O(P`@jA(Q&O_I<>nFA`yoSGQ4zv!2C;7|g7TJ-49H`D-}Ys!P)<ymerwluqxuO=
z(S1rvN>0*2>@FVA6w!FN8#FBjEAsL=Ir^6g8iBK5jlV;MN$&(fMmgT6iat)P48F=w
zZi^{w*~zS~pky=4&10Y7PJ?HBa~e86fI_T!wsiq`mV@KvBZdxE<t6(;are?56tsMo
zKne31L!?_VJKt@dmJDgd-QZHLEDcopz0qWFd3?%1X~_eKaiB~F&R7+}2IUW2Kug4w
zpLE}qy|}}mr;||(RAxNmn^Td>aHL6a61be~^aNSM!l@v2-3nCbo1K_(VX2vq0TYvq
zl-P-e3$1262B3-B3$uAs%54t+k>CxK*5>PNU}$gq$ZNsDx~@~S)y<*7`S2Geg-va3
zPhA}voG*W}=wPrg(d}ns<nulKcmd0U3tMd1-ke)lIgvS~+~)Epiwq_P-_yws4v(6i
zI{v%GWvi@kU}0sT#R_H%od~%n>(}luW>CtG*kE&Fe^j9Q?7Iw+&bL3^s4ZnPS<ksp
zv0~fPjo)AKWkkza&wkgi?de9{a`r8{{l4q17vxsvXx?Q!yZTH6L;JR;8|BJC68gpE
z2SD~*z4cm_ad&Zso}zPE`h{CB&+;f$<>r3rYiKyadb;_~)~#o)nV4jvrX9a073qBX
z6O+P$g-gwNI@T;qtz;B<aAA|pK1apujL0~KH|G|r8YVLdMc>}d+<d@vV_CVoLxc0_
zPe11I#0Y2SmxCvrLEe~q7d#_eIiY^*w^Db|jQUf@e^+l^1v|q~LSeUY#@m-^QyUp_
zPbc4g4f2t8Qn|zJPd`?H=Fj^TcQfCbcDx=mE$u#yrywI*j*&?ws_X0@#q5k|IWhj|
z3ZBjfqB{Ly8?6%#etMA)@#d{tM`gh?;OsxMv-v@eG12Y63t9$H$pcyjAon}F!TEF$
zQ^Lf<44W+C>p;7P_SICD?zH%y#r~Xqab#W<(qhjVtAE)tXBm%Jah*KvdfFk$WQO`g
z&h|2yOKER?jkjr@Ie+Wt54A<Nw?fw0nEh1-uXTCg9DQcKkNE8-JIhC3URIp)%Sr#D
zS-o)X`T3iqZ#UIhOWk_e0$M#&rD*?O`&LrS1$Fj~&g~i9AE(&0KPWS^|1bI&tV%Np
zw7AD^`uwP-xHJC$h2OqCc;@Nn<!_FZxy|1se(UES$>xQ+FSaih^gc7+PvDm2-U;=;
z^Do^qF;`BiDgW?j`RDd+68<lot>yin^Me+!Y+t-^ZrRaos4I*3*v>ycZ^84n$Ikgd
znVtRrlMoj=)n$Pe<FIl#H`!S#PU`x2S1`^0<>sdyZ>QKr&%1E$+4*VO+gSgWnQSTk
zxf5w6(Cjve`?5AO&d=wRxFuPu=D;BS<>#N9b2jd^{gH0Ce}X-8&)c_xbs}Gq{%uj7
zYhBXfyya*G*9`vlqrzV#n`?GS`1d)?>s?;3aPH-FCzc;IF=zb$cYS-uae4XUpPG%b
zhWn)Xnw#wA&yPy7v7B*tj@|5r+aPa$_P=${?C}H%|2~B}qjR~2^Dd>|X)80c-wukH
z-Xd#fo?OFumzRH7sQTiv@S&R^%~p%gv+}%1sxg;I6aMn^&&T|0_hhdKeCGaHeBi=8
z**}{Xh<{F(z4_$M#Q6Ug?wKBb)$uX5`?lrbpD!IP4Cl%D%<D}rxO47hv7`ieZIS(=
zxiU7jR(cjGWk-IjJNmZf-<-P_gdV><_$K|aQ=Q|a#jR}%#6Lfm{rTp~!q^Xc<}!DQ
zE_qlJW1wLn_C)3GzozH8iW6qUJ9NF=p?K`Gv#>?}d+sS)McY1qvva<=&}YW>?~I?5
z=R3$$%f1!j?EZZ8>Zh+CZ^j87>_1w4;D49<Zd0Flk&~%^rgY!rYb(1Zemlu#vHwl(
zw>AIHlsH9S$ai<Po@=n}Xoa8tljrrW(LLP1o+y;P0Iit1^jzT1xo6M!C&hqOx%Pm<
z>G`K%?+e{OU)C?$Ydd3S&A%ygZ=8D({LRUFzJ0R67Eq)ob^g4}>14fJ{8Rpa-&?bv
zrMdLH=ZpJO^6!G!W6s))=Z{~4mW+W^Zn?bfhS+1vS|<5hN&ixI-4Oe7^5BD?e<a%%
z&b^q<ap&Cg=k}Fg7e=4(2id)xA<^T4y1Gk{;Xdm_Z!~MS$!wf^DgCtYt($*t799mI
zDJ#>n-+r{hZ~lSyZ8Pj==3N$eyt|qG^G{<&(AqN=jt5P4^X+FFZ`;oPU+0<lr}T!6
zdu<Q(H^rTqU$&&Uy|18Sn}k2(=Z70An(UG%_=`V2DR^S@M-ja(#lL(y80PnP|9lyL
z@t$nruM!)3)eXwW$`2<7TzLLD*t<uaee>+g>B0qIZ~ybWeLGD?=<!LxBmT#B>K+UJ
z)pPs8xo6KotMGOQ=B0Nm1Z4^lyDcoWRZbSsJ?iYi>0fp>Fvfybp5=g?`0wnk-OW--
zb&B<T61R3Y*Nc5g`nN`T_8jX^ujOy;PK$u7|4O&8x8+bjcDecF=8rsmw=HY+m=8aH
zoK*MAeaqzL<^IQ6+t2h#+~2xm?)mwfrK6H;Y-jw<i8-O~QMBcPz?Y<ddz9zTwc5fx
zZ+o%B#wL?F{oHJ<$D8IXxgGyuk1mVQXKoKeS@R<mbs0?0-_|y6+IFbm-o11U>nWU{
zzu6_!y%Fw6UcWe2?&0Na7vSsPK?~hq26ic|(_7bf{>XJzcmH+y@51fZyz67r)!Z(4
zqVG!N68XCQk@xQWtNDKVtkzGNV^2Qb-uyX#dV2Tg%TG5Sz4?-_-s0QjlNFODsoLA^
zjJzvvyEFRko}ZbeU+z!K&(F8J!#~Y^{@<Va|CRszvA6&I=f%l-$YDsI?SB6J_U<3(
zWUciXi}=AuZ|$h8oAhzJZT{J3-&a5VdNyIF+j)-{&yCJnU20w-<MLE-m7<Gj(~4sP
zS6LR#atbl-$l?oBbWspROzNS{^<8lNHo>VfM-Mis$B#1C=QuqZI<I#Od1g<_i3>Cj
z$Dt{*<%2SOUN5l-HnRtt^z&G_Kvl+>%d|}-i%0W{M9>PuZBp>*KCqz3776Igo<i#^
z2QJe_k*ub*ity<^h1RAcNHcpuD>Rn`fTsLzoN|Uv_lX>NfHJeE&^ik;<<}Og51#9D
z3_goKv$q5`<+pJ)kEVzV%Y_QenKP7GHmfPuzJO-#I>Y%>uiH#<`goyuQ@dQ7jmXC;
zjWr)H>^<$w$91Zr+K2bxPKDMc?9+3xdW0-VI|;G_>l`C=_VLU~EK`shf2%BMnZW0y
z#gVDtz<gJ6p|na#eM?^dg}Z{gES<i)y|~74S8}1W@}@@@as_v3JDIz_n8$HfXrZ-I
ziF3=l_6u(Xc1bIBv)|=j7_C^M-jdgHp;llQuhaV(3&YP`kWPESYP^Z>!t2x*Z;ieb
zNmgy=*&Ee%Psdq*+QRRrE@Y>^SZkyt^u<rIYAMg&z_vII=l7ErUO#!^cFK!Xqc3`r
zRa1Kk*!Oz0-BWg6KXKvq6BoQwUdS4K;gYOs=Gp7ec28be*fGC<;q>Ddb|=5MYWU@u
zL{%ZrUh}p%Y3Kajh0~A4X3YDu<=4yKSMOeI|9(3Am9z}6`uxX7_H|XnINPjJl)EPI
zTPi8s*=B`8*=MOok-Q(bG*v__R$1p}8+-MP>8qDnS1w;&v3zx)fB52grne#&&k5ZX
zSv)a2WV4%bcE!4jr?s}OS+F+nRATRe!&05?rb_(TDc?+|y~y^tXnrdRbOKTR*?-^u
z_Ak}HR=J~N?z~$?=gx|MQ54wyH&yrW#q@f)KffR7@1A$J{mcCF0}DIeZI1nXzIp!?
z`xECiqq$}Yns)yADL+ZLZxR#B>E+_nLu4M_Ji0FK;QH&^|Nr{+>$>^-yz7SDv;WUF
ze=TlPTleeB|G0U&^XARlZxb6=`~6W#`=^I*XMeZX|Nry%+57eXHpDou+bQ!$+wuSV
z|H+R9jpOIen;$0^ud8>CHQwxz{WY&2kKTQ|tDpaV{|Sr#;Zl`*cU6{Ge?Mx!?tc9J
zKacO<yZ7(N-t_DD@9*9D`)~K_`8zB3?Q4k_h*+@WcR_9S=c6C)vpu|HZf^hQ)3f%g
z;_K(npY!+iW!3As75~m|+j3-cx4xg>eA)e0yB8gteEIro(aN$vUmv~Mt>1CCRNdQ+
z`%CNnEgffS4LxShoBe$KzI#gDecj>V@jFV-zx=sw&C!pSS08<S^lEv{tLw+>ckPJT
zXScUzXWV}MYuyG*&K<41<oN}9{NDARqU+N-b$|Aq)h#R%E0>+Wx1#P0^JmS@zn`9*
z2CsJrJg0cJrta6<&=)*cvUM$Y)|_=Ya!mWutjp8Gv;Fox>H}?-pE*y~p7(ivicAZW
z%)==+o=>q`|AlwzzKNI2!+xoG-4A&=TeG%!>G_pS8Ivr0MV6m@WRf^Xt@rYg!dW(c
z!Y49?Dt(pKdp<Gk+@m(}y2__nE^(7jWJ3f^uBb?53GteCw#{;J_Fc44?P9>>j1`^`
z;a-zYw^=UAzKbTRUG$iovBcBll8RKO5JWiHchN?*ixHDE)_9s+Q<2IR>NV{=Hp>Mf
z>@qoHk*CQ;m01}=z9yY&vs{FI7j>##ga}_%nUy8vYudSNmP@ejqLpeFLndde@-zVp
zpEc=Bo8@BcyJ)7`MW4wT%REgktIWz2f(RG;F50PfF=lecI!}}9DzmbM&YE^Uo8<x)
z7Q8z5QkCh<6?s#xt@d;+oxdf{S8vtrC10~91>RL%8$R_chkVG*FAPro3SR`A`W3$@
zIQ1)iF>vZtULn<gZS|>TZ9*Zs?yo~rgBNqIN?ZJO)uxq<tf8|5tFBIH;@Y3FcU4YS
zh+}Kymbg$e(+vv_X-2Krnk^L_&?~eye5x<6{))B^kRfgoA&;FwhBWi6I=Jx5szkP_
zhc8rx-n`<`d@2-d$Ogx!DqutIEjYysHl!#Zl@(-2uhoiAjUYqV<U(dTybN{b*AiL)
za>qsX+9T^h3`UOH6fnb(qxSqdkVqm&Z9bSWk)xI$%s9wVyMFDLRS!98t=5862y)im
zS_5J@a@JOX8HJp+8&`kL+H_HTd(?V0=~_bwXFZs+aTQ2yA!n@&jIn1WR3rw*IKBcZ
zk`80A!x+n#e_2(?S!=W$s^ZczD5D6*xVsc8QVV0q!Wes(fHiw8fvR}1`0KmVWglN<
z&2KGzZpZ%mTrJzRxxYWJxBk97zI@f@_xf*k71zgJpZojtu6K9hLzCjfJ*RqpOuDk#
zYiWhytI(%GdnCTDnxq-mQx$qsMBi=is+=zI#c`o#N4o>pYt4RibVc}7Uy$-s%RtIg
zgF(tSQLOyw%dV=>n^Tr+zY0wap0^HUN#(9ZaiM1PmbiRr-<`Ey%T?=kMo;zk{#&$N
zYvHs%PxC_EbpM{dyK72V$0F}c7EQM)NiCXgbCOuJ+?FJ@XjQFQw6tkw^z<P9@GUt8
z<*$QY33g8tc$OFIWt(xa=+Kq5?YdE6Gj^A1em&vp%~QNxZ>ij#jGc+^t}VUtSX|fk
z%-vm6syG&>c7TlNPuikl2r{CvXPWx5JliQ3jgH<~>%G$5IBFBvhz7UQ;$R~#XJ{sa
zj5sW%n+-N1WwB}>$O!(tEq4q{Uq9@fW(#)1p^HK%Kt`}zM)A!Axx&KTTN!M`tBjc`
zAR`vb>dpikabWS&$t$DzE4TC*f!q+-KP?1o#D|NYPJxU#ZWom`b9bob)+a{gtAny$
zroIbXdPV5WowZ&om(Bp$-Cw&!#~7q_WB;@au-0!Ei_Su|?gHC>!~L`c*!JHUp6MXl
zljU{a``oR1vp97g)QBfABkG|>1YLj{AvO!-fgA4LE>I(OX1uzVEUznl78HnY7OO7V
z89lWKzSn%8#GmBt)fKjnCQaly@j_neukzyhoG<=8|5jeKH~#h9ZNIncIX0cnxvHBs
zr<6^*aBkAA$Rum;ymZcYIw$w4?%b~OecF?IlkP-Ms`f6*_k5=d5tNUb#IJj@ecBUe
z?@tR=e_ohWli_K%MFk@4KJAIJ_os=fKTk}mN%6GXq#_?VsbA+LM0lg>&l{6!ay;#}
zsmMo9>eoGaeA<&_?@tinBu~4ID)S>I`RklipY}x9`%|at&m)s+Ai`0T{B=(*pY|l!
z`_oF*pI0W;WO>?cRhbVKPM`L~*!$B=)t_f3)uegaZC05dIqAI4Nr>=H)t`4J)#Q2F
zZC9BeJ?Xse$>-Ca6nlRH3(xuV{aS~rb?V2pg5Fi9o<=KA`!nU@cDFU63-;_YO<L!u
zILG+<0lpV+I?nOEd^6)5->Ww(&hfoIv!k!*|Fw>tY-t(p`iyG?i+Rty=)1=jq5Mp0
z2BX|wF$1?V0{wA(V1A(7Ueyh5XG{&4ZL4AvdS_%O9IN_r?|_uy^#eTLU$8crCar6f
z{CIITOZJf%X5$x&!?})iNPfH6%?jp!T5Qe(w&;WVdMU6)Kl<-kf(=$w*jocOc(Fqj
zcOuAOwx%yuha?Q09ji3Ke7EK=Wrx5PalABb1zRM1={FbHV4Wr6;$VYQJn{{|20xe(
zmnxy0R^g#<0_Jl}yq5#E$WdwUBd|q}U8=4p_C{no<lC$f%;tTux7{>pE#uz58{F2I
zE+|(38#l*8-x;jkV&c6nu=YZwy>c5t0r1$R%0CI@&SRZl4jloxt4H|d*-o&#)Guj^
zBp>M!e(Bl;<x7i#-RZX^TpMce`v|DPaob=9m%<GGo76L-P-$-qj4z$syCged`uB&M
zEMfgmO;M{|;I+b0@vBd!Y+3l||3&-x{~w;beS3ag)ZIJswPibhy?&Kf`njyMq_n!^
z>-MV`FJJxr-CexiwyN&$;rn6o@A}V$?O%7V{#a?>ygkviJN`X<=CNA*NU%-iZnb4n
zUbiIO{qMD(aws{JzrEbvZC_bZO>Nmm&1KF@EBD##y>nHAE46*v=d)5A53hTFTmJN<
zlH!lY_w(wb{(iL2`(IJ?`<wWruZQL1@7(=&JnQfO=d0(hzyHVZ!;kB)ch9e@F5dp@
zar^D<^?#;%%N(6};II7QBlR`@tj9J_to5s_D=y!k{6Ic``G1)mA8&uR?@4?7U;A3s
zuRr|r|3CcC9N^8&BErDHz`+m{uO3(zqRw2-z`!t<fq_Aefq|hoIWeaozN#{>u%I};
zEHgjeAl^W)D784hv?w{XIJV20?~s82>u=k$>+BnI(q~(+W~&w@b?UJ?btriq{HvPt
zV#U0)XP%KW12(=CQSykq8{PN(^*{Z~$>}LZ%eriO)|eEompU4(wf)wr%#weC6Ss2M
z?G9PEy&&>gnsrN{+WQo4qt@5YynCGEvMzB2alKueDE9LmJHp9<@#=wY-)3uzGcquA
zGBPko<8X3(aY<>CURme_$807;f!6mwMfv@;Zr{D?ymG2s*OmuMyF>)NB9qEWnhiZC
zuPOcgdiIKdD#;4t_tleq0u$15o<G^gDd8*k?)|Z+8BM(*LGz8zY(4RDjY!zZ2OE|A
z-?@~YiwJzMccNU$mW78eURkSDbNa#oDe-{G0e3zs^d9p&Hu1q)b^iM=FHGo9FmPMS
zwX*!lfsLUtG8;_O-}D@=nYmon+x3pH&i6)vll2FK+~*|w`e|)$H(x7U5-ToT5gXsp
z{Y)-q`7|GuaP#7GznpVc-Awu#boPFnc!kq@72j>s)Z?U=BtLm9*T!7-d!cyD%~#7W
z$6pJ-7&$fcrueG~2dy?QJ+)<_jF04_+d0w#>YhjPg5;kj|NQxUw$Y`prqlm2A;J@s
z1YQf96mMf-V36QoV35EOo_ggeX-B6x@-ZuNxPG_o?W$3_KJ(&|*?yPQZ0k4PExjsa
z<R;EB<9qX=&G+T6KVJ5eiDU8Yq?})7vjwEe<bsweEWRx%k@o&XkgnN<%E>8m+t$o~
zzhY<FjHz6LslF$_?c_QVv|4C=LjIwkl^PeVtj^xLUi!!Cr+3`H!`t^y55FewwSd!p
zwtmAz=em7AJzm9^xRmd6caC{q{bJ(X_s`wG?vHo8!tz18V-{l_Yhdt!g%7Ivz9eS|
z<{esT7>DpHDDBi#MkW?9FfeRlU|>+j;n(=gy!hn&ypq(461|F)WNkm)PJNA2`X0Jk
zD?={m>YVk_4J`QfvHV*fe*y2OFXf%zznAy%7xEO9^9F9XU~FIz(Ba3Pc~W0XGwj0I
z)BXCIUOL{oT7IpWe&<g1J=Hpvv?{$|PddX5i}Y}L`PK;w0>V2YPp-7IblCjqa)+VS
zG;RijlR?q5^}&5tV^#)+KjL_zrzj=yYD8@QV;2!s*37F5xsyUTJ6KLJ=dUPzQxo2y
z>N{)O?V8+6@ARS+Pj6g)Qs-Y%+MKlS{s)8=6dfKl$~R09aC$UXT;-o&`5U*=+breH
zPA7xs^gKVa^ZC8vbhT1viK@fNRqNw&Z``{%W5b~`v9;Xi&)-P#dGke{>(-NHiNAk+
zPJfqfcm4R4%bTmr{yzWx!t~!6(Zy_AJ#QCq9QWO_EUnP_W6eUFWoD)7r<|?Kbo?)F
z%1Vt6)`{?w?AM8YcqW8tx>egro7C;$xi9}7{#IA)pC6jN_ng_DW`0KBqg#(&=zD!v
zB7}Q^$)5j*0=Ay>{9Unrxw-Y#DxP;74~i=C6L&nmCA#4cQ$jWWm#F1e*M566OLl>&
zZg=_Q100LDneXWdUwi$x`tD$zJB(4RH8WaDdcz)XxOnlk`qi|xH&@CYU2&H^OKY7v
z<GDp*SC6~8sZNXXIX268-Ty-Cb@o@<%9?M@IR856?jzd;VTZm?day3A`DbC6(6T)o
zXFNau=z6g;W#Kb6@y&rRj(csAPfv8rJ^J`??t-bu*}EOiZd#IK6Q#KG;~(LBt?Gr$
zYoBiVvDo#(qff~_X15xPFUno#$~v)Shs5RAZPPO>O(k{1ROeX5B)UlCc({0k>)MB%
zPTY9MSyS}=8TQ9&i}y9WR65lA;7j|YP>u_&54?W-t7-Xp@NAy+r8zsLXBb-^sPp*X
zJmpeBs@<(U9J}3rUyfTlb#nFBI}DH4ve!>-dQkMEdy3H~nMF2Vr|e2+<11`*m|p46
zStBPfU&?FC|9L^r=1BHv+%cY7xFx41eO?hm)X_bgY<r(x(!TOsxnYAyX@FAKl(S-H
zvM-WFzkS)bc5^V_89RrSGJ0qGi~4+)J^wMWcFU=zZ=L3y@0Z$D{`va$mGM)_%bZh`
zcwRY5sr^@KTewc)jA_nYm2JAM{~X&Q4&494?>wb{`MRD@?g}%{J6Zh;o-}=*KmS~>
ziU)HnS+c|eRyAxk_dov5^Kr$i!;f-*23%gG;<Ll_L3quN*&%U9?e*JlE}i&edal@x
z>Gd<a*0le6opqzI^uB?;X<LhS*3wDby=PjNuFf*7uM_hXo!rlT-Ou21`;C1<WlfiI
zOPey=mYH>?dR<;=Hc^h#c<I`ZWjxo7W{AGp-5<2{iTB~HKCzZp884I@1*R5U2}=1<
z-pN&c^SzP3<)70<9D0iWdJ~ebTsauI@DT45t;esFR(8d{V|ea8b0ycm8cQdY6s>rh
zt&4mbIUdI>IaGQ6cW9bMe|;3+M%5IL37re#G*-P~YJH<s$~Zyx*`>_=`wo767nK>i
zch3CR6ZF?i;A^tFBKzte>+eUeHp<6r&|fQ1J>N3v%;Q_r!~1J}exKsnIQ^fwgy^K&
zD&~bBzV0(%@&EtT=vGHsbj#(1-R~Ebb{i#eS*iU{-P8E)${z-={s$pq`y0*r+<PR%
z&a=#kka*|%!AZYhv3Su9m-PpF=R8)Ae!koIz`UU8DGv^F<ZRsh`N-FnbG1pAg1y%G
z8%2Mze{p8b3Zv+K2VK;R4ZY8A&N{fI{by04_vt13W1VLgp4;Wjk~2?c$9>5QiY8ip
z*SCetahsic;;6Ego352&*x`b`4lc<8o_p`}9`ED$m|F0DVY%!nS?3wbNuj!{<$0{^
z65Br9P|oTMG!b0Pd)qo&ax#bRpSQUY8U=naZf#Qz-|dfx?LX+mz$N3;Jb9bCRAcV;
zy;Vz`E#8)H;X8e^Z2nEbZ_ymZ71NefwFqDQ(sqT%{hnj~p=DWzPYKMGS<l5$DZnAb
z=PcwlWkc9v=Imwf7ll{z|FUv8;PodTQP6_whS$Cyt+g2$7{r)xH-(_>ij0(;(!h&Z
zhYUn&--pN4%v!K?s^Vok&+ENSYZeQCd^>5&%s3v;=}VHnfAy{{5dEUM^G@+Q%jasB
zHJ9vq$@7+<@6plIHCEk^Sl@U|vhr6559QF-T=<4l%qy|gveSx3rSPy1d*!rL&kIq7
zD-W$dtG%xKyUkIHdG_tAzglrJEtJ{Gmvc0wdH>vBnL6`4l3N5P@G{tKE&RZ;k7>md
z!D$X$>w-=$y)SW=_0=_3xo_9)`)=#p6<I3YaUiq4=kI|ZkD~9Jeibmj+Bj!LOg2lz
z^`Z;+%Xii~Je#9<&+7aek)o5Ul#6P=S?;(NWH6OSBV0l{Ecvl`WEHb>mVL@yuCMoM
z+f?s7QQ|(gCCOs@;Vl}*XYB8F?cU}5XXC3A`sOz;bzYVF^`9?&vC4xa|5f#yRem6~
zI6=XD@{|Ai6Wk08Ut}2=q;OQhdc_%u1*yFe)dex3lJ|Fen%%!wJJ)vh67{A1x?d)K
z$|{?@OjBvY`8T&}TkiUL9;ou1?Xh^Fre{S+2$P6LzF@$G`Z-q0%2s`RL9#5%j(!Sq
zP-JT5Qr7tQ*ypr{-`tCmHuo)`-#dGE+P#ulcR&9<S6=tr`u@*-_xGMOWt{%{$L24K
z9(JDWj5T-hetg}1wY7VBzx(CIn-|}9Pd|3PciFPC_cQ11$a<b*a!>YkubP_r;zM&f
z{rb=M_{W>umHqpaHvRP0w*NcMWj~VNIQv$?o1)x*aqTiHc9DAQmS>sO`)rF3ZRfEw
z{hw(v#qWxc+pbCXXK6~FJmbI+b0ykSq*vD3UA;{3!isv28H<gr-Hsn)ez5FbNojyz
z`-0A2pPnw6sK4B}^@xYStd)8>iERs9eZ!5XmMoKE;{Q7J=?r~Ow*^z%bfW9r88SS2
zU(eY7Zuvgt1;zF|*S>T==-yoP+Um*k2`|Gm_@4wPa$IP5sXBp!<#kNge5Ve!w*f3C
znhKuEv>KEfI|mCqouFX0_mIFsMpn-h%`F%ELKe;PT4J0zRWEy0?ZGLMyMA;zu=AG~
z91K@!-}Lg8gRc3Tc2yA;vw+8Jix2GYHDc!|3EDsFWUN)ofuL96$qxnFj4QN4zRWR<
z=R08Z>ZrDGn8dWtm7+}!9BUrTF-uVWs{e(<Y09f>A15nDw3;sP3-n`q=wr9{fQ@%(
zPlRKlX<YcF9X8>5OIpR7O}F@-d$#!|tFT~1^m>tfr5h)mYDt*8#v(QN#U?E$N5P2o
zMHT_OZG`ogXLUNUoLjbVmu8W0L$QJI3yX-mSJ<8h1@#-t>Z`l6O+Qd+lC)Z-v;4r%
zDYxcqj^ryp#CGf63%#^y4(7dA{L^MsSRcu_(Z~JEV)=GK2^&+9svnWwe`YMQ3fk(m
zkhx0J_p_z7OjECtx2yBH)&>4ILQ{or9MQiyN1y*H#}{q~tAYdEvopEb+ctSWV3IoM
zcveGg)m9(Z!jc2eHKtZ<op57TV1b0*6Vatz+oidUdFHQIHtdXXVg7Ubz|%weJmR+}
zMzH7|ls+xFGG<Z8DG{DJe?gBczk^x56f;d1m(G}C(KGSP^;NAkTFwf-f0s47-ei;X
z(s9t`cA6%hw{J@*OCa~*hQA7XP8NS_E>P)D?ANh5A^wKL{)Cv#i4%vKOPm_F=^xR_
zXL5aYe(CGCqAfyKS1Vsl+S#Jr9I&iv-7JsKo{4;mX8O%|wscu%sca)xUaX1M%$!vl
zTz9xE$U3~F?@EAKg(;7!OHG}`qe;zQ&p!TiI4m<^g5r*z@JU_MmMgFvzH;3C8Dous
zQ}pN5<O+l1@?z72_fA@Syoz<!*NFWYvy86gesd39Hs#x)=^5UME2f>TIw-I>XySpX
zSM=T7wuYTtUcs{X%5<*~Ev4B%Cy8&nJndnTs_COv*)2;gOy<1(erSeF?x#aLWODOb
z^)D~WTKb@Qbw>6ogO;Vf3Ck6ZKTq5g;CCe|vB~V?@`dvIoEjHz-1jizDu4V|o_VW0
zFL!*Nx!QN}bm`qbi|0!RA9~Tr-E?=_LC$rCyec!ycvWT?_WoPNxA}^4&m#GCp%%}-
z9WFie;<f0J>(OlL`wp5ss`)9manJhgFPhh146}U0f1vkKs)E@2=ck!JeBE{Q>qqHB
zUHM0x*&oa<?LL23WlgW4jX%RPlYOC)dOQctUJ_czl6P^1zgd*w#8n^IFRYciHhIgf
z1pRu~iC2|R_w&~l%yzTg^g{E_x~seO+COa+d3RyQxm9v2KU_O2u~p{3+zG=Q%L}&}
z&6jK~%Hp=GJ$;gINATjrooAUUSnn*o==W~kbL;tgPH~rKZ`paM(csSE_$ibAoM>Am
zD*NtghW8}<quzo${1+c|DP1yURSMga*^|ZJJ@;l0{^=vIZ)s=B$L<&F<F0Y?XKYz(
z6Jh*GbzgGt`y<+VX(^jo_MHt@)wj7eechMshnuBTJ8O<f=t#IK8_rq(iD&y^=h7`%
zi&*5Ibz4qecu(ig2ie|jd{ehgIW>Li9iL+7+3a#R{(s?|FMX$QM)mLC@>xqJzqxwi
zu~gl^aAp3?CvKm-du^6YeEKA_H^znOiDR$Kg%ho3o;KF<+h~h1@95~>xk%6Q!lHF)
zci&n)ZI_ObPIwo4C#%C|(L|%2lkO~<xL7LEH|-?r68@j>FP-2w`LxchDdl$Nx5Ca^
zlebT5P3kPf?H94%tN9}tbIRYU{KL2Q*)|_u2+#3uZ~kBLYK3(2)x>ub!{-$V_o^@P
zew-aux>8#vOIb;CN8t2pYrmSuKRWlZ;2EE8%B<?Y@$I6Q4=U^Le|%)g%^CAH8_HHb
zVV(R^qOH72ZF}#_?b|N@eS3Ae&ocSiPm6?uC-=VGpu0@|QPIrhzvq|rth{;b%bwns
zJEneYHsAlhNjSK>_a&?J<;lnSX8O#3Q-8bjWO8!V#baM$_f(zya``x)wc*xVGvYQG
z-u-)o(b!-9ZFvfl^ySlL%lhY6pG>i`dmk|~PWtluH_NLJTirc<?(34<GwSk_f1O@f
z?z61<IKQRg&m5oiH)cFDwER?}FI&2XX@Bp_(CFU(?Cax<WDkDuJ1?@qaBo`juNMc_
zpS^tc|Ba9Dn#`8j-<a{Q{0;Num+L*Ms+LXYec8Xw=I>`$?Z?~eel-dUZ#3MSmt1w`
z)q`ev`~TB~gKr%B()PCG^H;5kFAEm03Xs0Mr}yR8@AC|2+HJWid{J6%_9P*Bi8)3=
z%b)CE|0XZyzh1BZO0ju?&x<`XL=WBTSQzEa6B?7?v`yMz;ZY&y-f49jr+Ou{)*cCH
zRBfAdyMa@7s>G|+M*;$*4MRLT7gl-MO*zfxld<4Pfb>%Nu0&=v5x=ArHJA98u45Gb
zrD}M^v~%GE)1(!CLe5u%4A0N5zG8Squ5+Q<$=bjcDT9SNLe57g)@c~>&bYwaxp1Bb
z59<;};Z+KTA>1$9KV4|(oHtz}tMSN&pVEeJGCC8Nd-Fu^W)%LbW%wrfWqa@KhR(bx
z5@jpD9Nw05WW#lpHd_tDoLz1_)}Bc>5`_*=+m!f2zC!%pU(t_dNA4fG_St{`p3-YQ
z>&@#bb*>%a-5&p}y>f|SSI5?(#V7T5cQr;eKRv(al0f;nl01{&seuOblMZXloG-0g
z7r9GkLE49PkpYqt7TlWVdkWn`SR%S~)|egrl^U}4pm(z1)3&>3Z-rRgIJ72KGD3Te
z^V)-LN!}vTX;Ted8*)!sUFG>^7`=+)!=oFLr+9Za=mzIh)aL9o+Q5F3D>cDz)6}#D
zf7~KN1QR?rg`PSfmyqt3TD5V)jmRusE#c_3hYo&A%wD9l*XjL@DAVRcN3N}O2y~2?
zZWNGoqv~nf)-&hAu0+gvBV%&s?w%07_m7u8Y&?G7=EM7j6;toe5m>y=^jBABtnp^)
zOEW_(=dOI9uep`?y1(?}-RnB?jn#TAGSl`K%wN7<G|u^0f$7{S^$fQRj5B@S&YLyQ
zblJKWch$tC?k;J4TRMOJdh502Yu>#}{Jzs)^3WFv{)0DUA1fa5(Ei;i+H_XC@@<cy
znU!^xPpq|e#zpBH)!iTOY3$wmruMs)ZB@~M%a6k)lY>vKpZ?;FY3|y6pN#*SEso~@
zxG{Wd@mJGBxf_D~(s=&;UNuoeB!y$;%GK-V&6sPN#1`-NCnrC6`o33BJjyk;cgAj3
zI>AtV=_B8xu%PBQV&9dLI=UsC-fUAl&i#7Z4$j@LuZXK<yTv&2b8eo$`)tb1J$W-E
zZ|C*+_P-T8zUWQ*xucsd-m*UQF8<8Xu3fzo&B{s)@7Z43J@@ZT%PBKNz1Vl(_WGDU
zIe*d}?;Fv5+qd6bl=kMFYryKL_bH#d3&PT4PTec$S$w|hF;CfVB`IaUX&c#PBh4e%
zoW3dhE_j;Fv|oJxjBS;@>sWtJ{oHybyH0iYal@{<)7GcHSx){Q@ox2vy?sx<idjxR
zYgu)D=lP`VdXLyzcO5yARd(dn>fpPb1>KWP-%Qxnaq0cECD}KvyE_)dTdhyd*FO}Q
znJxbNveKO2OFmb9Tb6w56>o*v?wc2PuakMc;r5+6*;T@uA8)nYeY|toYq^i+r<5)_
z?aD7os?Mq@3i8?7aBq%pxKYx9`nR2v)hu5q=2^Z_oh6f_a`r#c@GWROYqAUPV%O^o
z3=Y>B7{qb4|10tsI2^w3kI1PAGqiAZQczG(NJ}&@0MRA}Nd`BLe`b4-*u(ZE@<5VU
zmyy2AhjsH~m({Z!>)83qJ|@awbIdsg_RZ7O(u~a>S?>QZ%RlO})K|?ZQ#tu2-sN5V
z?S}079ml_%`?cuLxp@~4)h;qzs95>#<BLRRk(v6rK0)`?e$6>o|GS1i?U9>{@lg|Y
z>n|6@OpJar>=EvKR5mSfiA|9GrK<^>7Ka5UHe4v(kaah&&t^~MohJp1R)&jfP9I?}
zGO2g9nkY2ide1E9J#ySt-{(IGTOQZRcg(fIX;&N5`C7Nw$2V&wSFW6Pbl&Nm*A8Fa
znIy~AqGslHi}jsQ)*t=YY{zL^9FG<U-+AD=r6X4-{deozXG<*8a^CvBaSyU<6|9#0
zbmGsFB?t6ooyz>q#k4p03|oiH!FO4IZ#^&j>EKXcllSdRa2e;V*gLIJZhXu!CLaY8
z%wKZZe4H8ejQ7@y+jslp{3jU4*nQiRc1WzcLU983^_sc>;o=FxT2FRWU*bM25%A%H
zfVbl0*ts6R8c&GmO&0u>)|uvAX}(7L_M}_<9^Vf2uw3$;P$MxfuhTa_t^WT8b_?^?
zSJz9ovsY=!s=S)KNMce+r&(z1?VQ}b1`p<OvqUg`IWP0%Y1id-Z$9)mNQM0p`lBiq
zd%wrzNyhdw0Z$@K^DU-qQ}0*PaadK8Ya)9`J$n;F>-rNO4RY0ApZ=f6((tHzwP<&6
zt=V%u+un0~uBTmMPJ9~69CLK_{F{z_q0d&|xAnXh6e<(S>A_fXLH3|qWB8QN&58cY
zOSe9f`1AT>*1dy@OK;wo`?|edZmr#&j|Jysu2!C3@A@?-NhY^VMRCS@_GELrEfIq6
zZ1neJ?zG%qe(cmkgRSYu7jyETn)|eRePtF?=It|F{;y9zeI>Ei<d8tXUdt}F{v}W1
zje1<(NWRUTx~ubn%qqjQFB~jauIx)v4wYK4mCI4JewOvLX_;&vqrdM8IuZP=>iOEE
z3KNW<+?&R!{HyJTlJ@#@Yi)EB&Np+%K5fwB%>Q!l`bwXM&DW<Lc)8|U?OuK!IkC!`
zY41yngEn1RquihWwNC2h<hglA>tcSNKdZ&UcI4!S2MyOJ&0WvN@%R4n6eVWW?Fqrt
zx};yQrf4ahQT!;fq_k$jg1qMa!W9qKp3>2{_&QRtN?7L8mVM>bOgx#D8Yx${?1)j_
z->W(I(pi=z$97$8*lX2psr{b$`n8J_U83A4dN_6%y!pYsC;7*<Z%G}DPYR`<-FUDh
z|82q7Ema(QSQ}op`rIyAJe6x6=YvRx1&((2b~5q1FibGc+`o3?RkwGW!;4S%-*~dn
zGhY5yPxcZP$LiQw^EPY5#WIHdyVe;k@Z70|<#BfH^4_yj+-YwXcI^?{%62lJbxVP2
z$&G;7Epr@~3e0`s->br}*|T}Uhd-0v9<82Wt7G;@;YhZbt5O^1nlGQCA9r^pnfxwv
zubAcCy5oV#E*||=r$qUFaBdFx&UN$kqXimHXLwcg?{><pD1EZ4+p?g;GVkuQpOt?e
z{5dZ&;niP8#ot?mPV+})^tbRo{`>0u%l_Qf&q5d37j~MJ^q!nqGi#0_yW^YJ%UOgs
zn%Z&ADg5HSQ^nj|wRZjC=K;Hq#=lcdJQ-p-KlbmDziZ1T?O6Ks>AT2Ct4-Rg>eZgj
z^LmoLRE72a$6f4plSB;tWWv}kPEY^zxcR{6skUc#vtMgfeZa)<G<!Sy|3lwAZzXYG
zOm=9W)xc!7u|+ydpzbu|w@B*)-KW=-wLZwO_mF73RNv$>BU&kZ>2~EaJ1wVum{`-W
zX_>^V*vsla|F)lA$+Z4PxQ^6REx$c?@?1{NSkd2U#679D_E2SyOH#7Qy_+A;W;W+)
z@EkuNBxcER>r(TB%e#Es<kW9&P4V>FEA_OsLb+eWbk4n3Rdzf4Gj6usfAB4}bc1pC
z?c#Qgr!#vMR-RERa#{RxuaM0D@8Nll9rE8LcTcWN=dIXP=5aPu!FfkP$(L3W@!;u>
zHavzblCJfa7h68IexA$O(r0q$#`mcG%<1|!b})VP&X}4WdT#}jQQ#WexcCPb{-@>e
zU#pgV$Z2Mn;3X?pICu4qpn$Z%=}#?%*dqU4O_;OU-DT6U8;>m0c0bW$yTE)$?MmNv
zkMt>#J3f4{VLIl%*!`vck2`zJ*3@nOp1x+^-Z$G<?|HZQp;P4x*-H7)TaQ=uoZ_3C
z+nxW#ds^`(h1nt&!f_FMS3LUfHh;l3bxWC)_EgDD)8|PaoVNI1b`C?N=)-;6CiX6P
zl)!0ueD2?Jd1;?ywf~d%y}sOd-rt~Jd#XjUVYG)4i;C&z0L6`|Do0iwwsG9G-&^`m
zOQX*R^<Q@sxvYg)WJ=GUmV0}~d-Y7;=i2?T9+wQ_oj0tiRrj3ck@R(Q&2qV47s4G+
ztlGNqq~0wl)8Cs<i1UQb+v?Ys@0eJu>sQCV|C}brR{M#ow*@Fk399yP<+#vwwqL@C
zN#@-%yX(e<#V@^CW0&&3b@toPZfxeg#-QxVH(%=?rgMACIp&H=Z7<ihD=v?4T;<F3
zQO`^4ZNao{W|2Z1%|>oL*0$dD`tOP|Z+9=$SC}0pHh*>bAqKU_>rSnB#&&kn(f=|I
z7u?t1pZL+aeNw|&vrs>4AM@n5XTl!4H@_~4ez4Jb->)U_WODQQl#MhrRR!`7C!D_-
zVa7Gv@aW<BU;Z6&+Z__bJZnqcrV!JXhvtF*o`@Z@nbp!Nc3Nx6IUW8PM>)=HX1n2g
z|7pe2xf|9pOf)`yzIVlYGkJBENj%n8p-et07cMEaH%ec%`|fh!@iy6({qbT~FWtyL
zc<1KPO?T!Wb644`yldS8ITOZ%JYH)aY}IpJ;@SIA=4Iq@vF7GObJmqc-;y=xjWe1s
zXVne)i}v%hqoP(6>Rsw9Txs9@aNQDxZJj4-H!PpM`s|MmiMTW;HpXoq)QeM+RhWA2
zYu(dWUdV7)?6t~|%Z}&V))fc$^E}hrzq@y>>-%?ACC+XcikxQ~rS`vk#lOH$;MdBl
zJ*BQC-BErDaTnHqF5kZQR>-B#t-^C(x{BN0o?h~xUU0END#!Wb9yX=1^A}ec{aN<h
zed3&%Ti)N}|2W(4*VJDEzk+r<IdiQ^c{zt)MWXa__06I+lVTeM1S&slxTC1%Hv7od
zoV$0QY$}O1&Yr%H`FHS{=m`7s%N|8ey|UYhA$Nj^Tg^qOR}+*zzG>0fy2a&kxaqk%
z&8Kd5xiiES7pLS;-<v*XR^HXymr|ld&K)^9q2j<Kjj46Af!ceHA5aRY=w4iLewLBV
z_H}mxXZNP8Nj<2>{BXUh?XxNWK7Vsl>08LXz0RkqBYNId`A|2J2lo8k%~v#4bW)Wq
zBqvYidHec0^W?H(J)P%|=YC!G*gWCES*w^+w|1QAuHB`Tpm!sb?|j#5s|#yhd9c*@
z9LY2YZ$I2z#w6XVDtqft#L`0+(R{1V#3k<T5L_Q!Ul;c=efr0x33Zzi|7XP?{Qovi
z=od%Se$C>R(+76gpJkGH#c|fgcaZ`Yzt{4MD?-vPy_>XewU%pmq)Tn@?hCdPw@PQK
z?k>Faby@O$&ZJ%C?`!OND~|@Nv~ydpT=sj~kMEBg58h$ueLAt=@X{*^$MW8+H#B_o
zA|Qf&q2W%=%okxH>)A!6X9?-eHMz_A^LE;+6L#z5;(zr2ss8C75%^dmu5OY~5Wi&2
z()05hlS8MUo;6SQPnuGYi{<jaIgelMShwHL=rHfp^6+WgpJ!j+Q<<M-=5t1?Fk}9$
zkJ0m1oH;&;*S`Gcylo28Z@Vnf5K;fMh}(J5b52pcDxOUyY5N6#x~0y^3O8G6GspcX
z%eI`qNBp089(VX}vsfa3LEeOQYqS3IUyE+9n6tmIV|K6W<27qfS&A!PKN~Q8$t7*;
zpBHT1C(4%SHyx`my0S8HN_NLF6^@XQzejd$S}ONmZoQLgJm1?@ua?zi-CtT$=9Cwq
z5pm-6POZeR?`~Z<6{DOxGezoYtZ%^<D=mW?e-#DOZwr`x>8oh3JolQFQ)~_A&-4Wx
zxyIfmTPjRnbu;=tob>ldL)h`mijDJ{s?J!1-uUwU<AFPYCj+<^u1Giiwr__+mh-MP
zPASGK+}Of0wpz~W40*J%|Ibc+VUs}DriU5n-d>j7I%1sqcUi)vp1zOYJ$pKTPksEt
z<gN@`-uZ_f7`9odurqp8{`h)t?Wz12sq%RYzHfD-w1ss}Dc#t+&D8Fq+l&gkr$4s;
zbucT>KKShI-2h3MuRFBnvCZM-51P02E~~?%UhS@_`Wm`_XT7d4JlLdAmmb)5PWiyz
zQ_Byv9ThvcvPXx%pM84O&;ML|(l%`S74G)$K&l64bhsr?;-s_77QCOu^TVs`#soM1
z$Lj*;ibMsh|G53pm6FAL-fm4LOD%u(=50!Eb(%aWI`4zWr@HN0-$G|h`{jP)`(DTP
zIUQg5j-<?3oRF8~xT49ILsaTm!PKCsYp>3?KU?;84gb^y@|Mr+6Qfgq_-?*(`;F`E
zn0MiEe(ik)If4QVt$lTN$7cJiYdL)Td0+H`Tf5n!cj_K0i=B9^_-VkLh*ri=ehHWN
zUhG&q%UyU|pn`c*+}2FbBkPt(>MdGdf8hs%TiwLH%l24Z{B%=PX6KaSF3+CuS<Q1<
z(6L@nz5a^#vDw!b?keRJoVVrPUCno*uWZ#-G;JRiK3?<gMyz<Rsj<tppd0@+78m?2
zoL8IG<@9Qz2D{3}u<iF|yOg;3wlkfz$bY~e^P6*XpNz8Q)GJ!Wg{IplZ1&_?7igs;
ze#5PEnqz0vw}9T3IpS%Tu1$O+C2*d9_twhaW=ge!tXt~uiG_Qx{!Ct7_Q=4nNO0@5
zi+#*2``?y^o?+E~@vt#y<M}%tKi2w}stX4yROE!b-J2b_I_Wlpob}3G)?2eHpFCTA
ziO2QdyGd(mc6+>jy^=3{>W}r}XMMKTFDT!uc+NvbO>y6!-e9IbZ0*mNa$ILNGv4>B
zcG9Y#2;X^}d$iLYvhL6<eV?+~UjLY+$oWd1-OE(%*QLhfRb@YsEjK>0uIwi7qQBi2
z65_U-JMR;fee`S9;T>E4ZQ@ROe4~4nS8cH18WxXx^%=e2md`eO`A2K_Y2A%)7GAx+
zv2#hvzBbEBjoe!?_ZOO-$dF_0Y21EQXN};MkKf%LVoIMp*qJiZYuc7K0yo#r_WhuB
z&3So@J>QGFD|IY>ImSlW?&Zs4_j=(nO(^S_yv`ODaqasnb$0*1<)aX&BcYXdd9Mcl
zw@3SCJh`^oqU^*R&nJqDbd?U<>J;p;vkYJqiL#tiCSd$v`GK8#Gd}%Wz$^AHB4cOW
z<>t57-d_5e_oKZ$<QT8T<$rFHpC$cDWHa*$9NUkoP1?9;%F~t8t;A1!@7`YVa^K(A
z-l5kW_TQN*TWgrVayjc4`HiJB=SF<g6|Qp+JGSNfg&ob3X(r_&kx8v4YB`>g`&Vgu
zn(|IwU!v#sdn%`z#ATtZ{ft(hUwD*HUNXI?>D;Z)FEVxS$sVctm15iUvnlBK9;1ul
zj|F5j&%H0nn3^+lMvg-g<C+$wXF=&_dXvxJ3snv{|402yvFh*it7qR_Pvd^M#$@sR
zmT>cDU8f!|k7tX?{!!Vj;1C{PH|5(l7v>E;)^8Kmv5L$niQ{lnH`Bc*+IT8%K}p(?
z6!VHnf8LzjBXx97t@7lTk9w9FZEOwh|M_I={oP{1EbVK*o5X&!`k|YvbNQ3lSGi1{
zHDx9ReP6D22~B>isI&QNR(_s~&HI;kmwua6FXOBrwe|XRJ-$7<miM?mcW(Ics^{dV
zqKUc!KGqvgu03!0UO#{4HM46wBA>BJ*B1U+^C0KdE%8E~2Tzw=pTSl2^TmUSX9`2E
zo?>wEvR5?rY|mERFPQvM)_&@YYkw6)RyK)UeqE{*a-h@Qe)3aq4-1vrfH20>liD^L
zhF;)&!qRa!^4)}!&*yzO_3QJQj`=rk-_TWA^>pV?s|`8X9=+0gpDtLxPMLYZy5
zLjFw_w_Y|gQ~X}YOW75VQeJGn@ae;hm2*;LezhGEQV~sZpY-qNOlEnTTi09<K0P76
zYo52oTkq5VBhLEQ%#4_|=<QO|U1zr#n%Zr=)h)8id*1R#t?wHiWiQybNp1GJI8BEe
z%M72~o7&uVYK2p7mxAlfzejypPY7%<U0;4gyu$X1eets?zwb!b`^~r=ap7p$O%<l2
zS$C#azqDqs_9=~idgWp2^kZ*A|HLe*w7ZoRpS9VFDYWFA@cD<1G8flemaKYz^~aOW
zg_oKlCtkF?c_k|6l+W5ouE<=^E1WtEZCO47A`533h^#exXZZBo%$WZ@wkzB@)XJ{(
zxvaPS6y$d$O8sIU_v&ojMGq&O&9uJzBuGlg`rN7x>E8UaKPvJ<xBFZ?b@zK$cD<=X
zy~^C259g<MvARwF#`Esn_PY7pKYO>fe>y+8J<x|a?8#QX{A0iSlCLqoyZW>BM5leI
zPMPxEoh+>Z+jH2B(ps+j^-uD+JoUr+wXv;7_VR@_>Wcr>O|`9WN{9|yZ2WPfoS?9Z
zwf3CZ-;B+jUT=Fdg<XQ<wNzx{leEt}W2ywXW?bys`e@3MrhU`i-;aFy-CjLtDvNu_
zzP+AH@6}pnG5h#A=Wae<lkrh@M?7ov^~G&F-u}3@yVUBcrs%O(>o~6}ocw=qt@N_e
z>3ainL(Q)ib_q7iofZ_(Xvtl-Q)b6+Wj=Y!s000Cg4ubO`+aS{N80mVTP}6?gsGtI
z`p92<-GaR~-!5dn^-E*3LE@uXGczhwqSk4|@*aP%Ve8_Xo<-bAQfsXL9b7jdQRVc%
z@JD(T_w9`f5;r)CEaP;HtXp^MNn84#ukH%rcLVfyM4bGxAph|_od<1mro2Ct*mySM
z*ovM#-@5l3x=L#oRwfiB9J_D3dZp@t<4)CIzc8h2vR-N3tINr&TEStvDcgtdhkar2
zzS(Csl~_92q_nIHS1C#SzE~sw!@aPXfgR#JQ~$P43Ci|uxGQb;%Gvmp>;*fu&V&y!
z7Y>%Vu3h^+v;CUh?(6$fe4l0e))^UJi0Nus9)G(gZ7*-f_moDNfZv~9_)Ir>HEnUG
z@M4~eDvMq}o;)+k@0q3bqM(3A-jHJbp!Lfx*$FW;Dun5#rbl`U9u(rcWmf)wa;}|m
z*s&AW6c&Z1iJbQf5?d(2UAkR&w{wh^=FT0hoK9tH6V@ddWNlEAJXNt|kIbrK>3c^b
zXa3W(yU*n{e{zOt^*Pan`wjQce5d^Bnuyp(p|+1VuHMinFbjF1cG39DZO)G~1S5~S
zDP*2W>I(N1{nY%(#q)dTUW*;3**YxN7Un668A~nrwn&Lx*4xpZ$@SOFX;!UX?(h1C
zcQeCdA6l%Ry6uvu%rtqiLskcp>Q>EJzK64_#3SWP8jJ9ewKuuGhs%{G*~(cTSDLZ;
z@*|^V|5d$84xVD)tsVScgfU%&t+46CRI?1n)027J{R$d{lqy7Y+i$+G$-b$}z_(}T
zdD|uL)p_)DGZLKLoJ3iSuPvRmFROdsThFlnzv2%*_E7qt)6~#!_T$c#&WtW2t-n_@
za)jKURIvETd8-;|^LxEiss8!rNp`rc`Q7!GO8sw^OUy2q@oNfW&9$5aQ|r9y2>}La
zN=j|MukWo9yYe(RIB(JVSlwNjTf~0myH`a|(a3FlJEd*yr54#|`FV$~zj^-TM$31(
z&h#gVYbR_KojtWwvEaZwQ_pg>f&$Af{{HUeGuxHx8u*#2&(2<uyZ7GGQkSj<+yC2M
zEt@n~VVX{<&xd>5F0u-0+`979XO#=4m(~1z(Zv2x<(c(mmChZ9ue>_Q`tG{@Q*}0h
zdAuQa-0p49t#n$m*YU%Vw+D;1#Mm4QNho<)r^kNAVQt8NeZS_AuR4b!1@;@)K2|#7
zFBKDcVhxkUL6h$*uI@NjaHz=s<s*ee-~P$Fo=$5{J?`Zhrxqxk+HgB4ki*G-{eRBu
zZ_jS~x$dO)2f0wm>S-6#`~Byt&UheJ+qGy@Tc=klL&To!#G6qZD=k|+dgFRd@GAXK
zi9SBPN=<hD-W&0kFG<JD-Z$Y?)MtU4XS5t5e_UAayitim>+S`4n=KDRg5E#>y31_e
z$9Yp(x;9PW{M7v9{lCDOF}pn^CSLgGe^9QyJjs2+=1p>w9v<@l^UG<eq9e-!PX9Y4
zY3pVs-pVm%+L*UreOvG?i9M3Jj-~6bO3a%bdferG$ba*&s+`atNzDzWPf9;oD%7!0
z+o7t}9=Ant)%^dpJONIV7pEQA@LWuJyRiEa*&82QCwXY}etFs-c!9xg$=`Kbr{*o;
zwC-4+%(5zD@{#T3hm?MnpX_xAk!cD4(4M<Bd%j!tArAu`jns{6t{W>q`qL$x_jb--
zjR`H&?p$!1eYim6&z1>)F8#Lhy(cMi>&k`n`Yy5G_7?k8&xdMGl9`=)OzB}%NJL2g
zHL05nMiQovJ-7V-Ff(b}(bug?>vOhOTC{fR_n8!EWE6??zx|zXqM|$||Ax#wmklN_
zm+t;mu;Fq3VXNJ9IfETmOx+doWn;v<{ok*2?>#u{hJS@Ihy0H??}_3cQzma^cfUKS
z!;JspW>M`)S~ioo`oiwr$X~l^(xk(0Gy|$4w=Va5&!?cjonuYUorxy||MnzAFiBo2
zu@kvhqjqJEt(VhmW%<J0KLhlcT3B)f<7fP{TrMd!TQh&(=_lQ*mYq!vijSTeG-u9&
zXX}cKZKivzo1G~vbmUJ_+rG$N1*P+rK^|_pTg>0a&v+K{FZrCq!ngx^FW&6oyOeWg
z_S>IJLKj3caqnpVaPqB3e%0D4rODTw*2!7@|M*~HOXhu%5C0rD6x;6;RB`3X{g;<L
zCwX49QDfV>EC0feJzU<h>$$PdlD;cj1TW6L*LNkFQL>Xg>DR?yg8!c?>P27LY@{7r
zbFg+w;T+9WkHha`+}0^4o!lW(SC<m}U{h;?|Ly4I#_As{g56S_43rZO?@9W`@O#7D
zhh~55#Cawqsvf<qlY4QBWty4*>-~hrg?819NeQw#m#;nEGxcz%O2OxfmD`?b9^SM>
z@W_d@nUC%rTl2g1!jl^+5<aoN3X*=B?sz*t?e*u?2Jbod&pd24HF1Iajqi`|>sO{t
zPn7iwHE)_VUwUIV_lKoovv>LC8eRSJj>o!Z`m0G6Tc-82GIt(p=DmBQX-V{iUf-*;
zpG{wpbX9EohZ(Ddj!&O-ME{#c<vz|WcIl_5|LJmZ5{}BgxLIlObaf?_5;G3RI1%k9
zwsOhQ)8C36<bP`O!En_-h9e0AX)_vji9d>8?<=r>t!Cxl$NZcAOK}J+3p!MOJB8VW
z_tcCkuTBp=$Ky{*E^oPUci*MHXA@pL5?Xd3$^Ev7aU)})XC{xXd%DT}pqc6uwjQ3B
zaHvpTbm7`lu0N-5)?oWTXVTmiw_=3C;+{09`%A4nHQ{m4YM+;rRHD~!J({BCJ!i8)
zN2&5ofhRm{JQ{Or-(Q>QKksCeM9a<h1=~g9&M<BKW>8wmx&Qp3Cr9R|tznipvd5s5
z`yg}XTNW?R8`5FN(i7#9t|=VqoHl=!3v0z&4`DCm2RDLu9h2OvBJ*Lzx`<ZG4@Y+{
z|G;2ieLehY#Sx$4r5|>@KQJ-l!t>*~mva_8^{nCC)ij$u{BI5ytJlU!wfbE)hLUeD
z<vg0|xW)Y&cgvwmQBQB4X|=iPSGPsIXwj-krn#ExD)osr$vZW6?fbc;rDnN+v((2|
z$^!jGZv$c)PON>IVAK)O$~C|EVW-8N>`+U;D+Y^xY9HDD_&~$ei>}kkii8?howmyG
zknd2k&RXfTD|79&c*eGE?aU7ZL`r`dnHs;Ia53fy8{@iZS$dkXZ_YBkzxtv5^oFR1
zd-&Z93;1Slxn0uJEi-3X^q*TNg1+_ayPoY<uIdpV62dlR+gZ73x8f!Wtu`04Oe%8~
zw`9##?))8RI@e<+r`X}9Q%fq@!<|af%fA|2SY7r~CcIEY-ZZMB>q&?p@5P-Rw#L<0
z%%W#qxwS>G@zb=aW=sne;~HB6q)s_`|2wa)Q?^7<&(rVEBqxKzN^4KawV&N~GAQ71
z)bV5s<_B?ltqYo>drNP<W!Jjj!CcIJ?CX@IQ?sQx*RT2Mse1O&>23cz<1a1RR^pzO
zS|7D#g`$T2J7ZSg+ZIfxHJ-o!<oNZ}k13OPF)nmCr}el0+-*&7Yoiz3e={2Tt^|b~
zJC!vna^9wcg1e{nFx@!e)S`VW=q1a=iDyqNymS6)MbK1-cUlYARn}Ne^-(z+E0%el
zb=sD-X3I{dpZwy?IlugObMVXwJMLfkZ}GuD?vs11%tWn+p3ZGOcZ>JV-5yrE+#`5m
zX6=pScRO|pfAPI-dUgMinPr~SBMaUf-_tHy?Vfg%jbk<E2C=24Up~IFJ+|pq^OBd$
zT$NT)`xZ-YTzu5`<>T2qCVw`_Iy~#S-JK3MXEx=zQ)A^$q+EKrYr5kmQSLP*>dO*)
z?j3tuF>l^AW4`H2!(J%8+>!ovwo7R2j$1PVlPY%qN%mn8_sqQ#BJA1Z+Rik|Q!XR_
z+p+~Bh5>%v51r+z{>&3$Tp<)bGn@0gT|`gEm9kA@b(+%0)?Lan{MUbOSzvCUo2lJp
z-YZSq`=stGD&8-ha7gt)F!zf8;-6MrnA`uNy5`M92`5P*_k)s$&dNSI`q}2$vFZDy
zZ(Opj`MRI)fx%xd@zt^S*>*`yUi|q>3HyOcF0bv^`@4N^o?k5a`O~ttH1i7Ko~yD7
z_6w~xUtzxFq_%3i>8&3QCkvZguIR9`tb3I+?R9!1<J7f3R;5e*+v!mGS^Vq5_pJ}!
z@B7Kq)-iQ$<H~oj9g*x?n0{7R_h`j+TIQ~cpEz^bSM##v_I(y_XY*v9$`59i44kNx
zb@%)7J?p$*yE6WH*E!Q8JIb(NLZO9vpY_J8O3|-g*xSXvdG}oLwxVVI=N=h}Ll?Q6
zCk05@GWhf<UU(E~@NdUDw)|B|lg{gl^#9_u6JtFZ(J|w}mtNlwFH3i@hPIn?n=3p&
zz`?aXvpG>OzvS(!v<NFx!9O|2y&b;m*Y2@f?_<=cEMfTVz0YmYbI<pwa#k`a|NW!(
z*~`WI@$PGK8$MdPaNJMYb7N2QS(XdCT!q<N7hd16Y-0EB$|Wv$ZFkR}rZ<66BIx>;
z$IK4J|G2~-mBj2V)z@XwzIaS0;)&}a6K(#43u-rxbtao{Rj#%vci-2e_sfvguK6SX
zC8?);Pu_pFmO1n&;BaxYwf=|w&7ZqXAG|d#;dE^i*54GUdFtVc+rKj+fBE`vKYDCp
z8Mor^Sn&rPnwwuuI{v6j%r<M0rKDHg^Bqf!nY_!bJhgYuQ$J*o`pGcoRKIx5_J3!s
zdR{E{Ub4OGf{;?zZ{;J=zA|>pTW6_A-CVsed)}sUr%d6TmiIf~^KO?ue{Rx=j?VO;
z1)E$L1cbg#k89f`8M=4&LCLxIpFWc5T4~NDt6|&OD^b67+qGW{_olBBUi8*%g4xPn
z38r<Ys+_v!$ll2~CH_z8Ro6?)@3DUR3Fl_*{NA`OWRE{vz}r{f%{u;Wemo<4QcX{J
z&t^{31*#E0YQ0`COn0?D`tx>QpxP7W=Vzz9T_pa<!1v%Q_I3@g2Imax{V%FgBFiM!
zy)f%qwQ`Po7ccKhrqB0|`iq~7uaW2HDxYV&XHVPNlE|%#HoE?ssB>u9e-WM+lP+v#
zRZr+h{qfvf`}J3+*Cs0uH#8mOH9xxNQrf{~Q%kO>Gp^FzyCKIQI<)f&kF))x^*3aS
zO?c#9wak2SHOaQI>itFOmlKaYE$>}2|4t3#MgJ9(&Ufg?Eid+3pOEu$uF;FD&i{Az
zbZqxJ{5tf6;z>VA+kJ=oR~`@Kj^zzLbLaf~>v!some2SWVRc_wrX<KWb3)gSw42;p
zEYBxB<SbF0@3Tn#LgHlyG1k?EuN=#dlvPFC3z24?H|1r~=?k~L6Z=orRYoueUrpY>
z&qKRZe*1^*YHu2B6D18|rCwV~?)r9W@!fXA&87!BP46uIbFu4J%*{l0AzfXYXPX+I
zt+*b;Q2z1ldsa>9_ft!%mlT*vGq;tquj9$KoPO=o)@SUTbG-SvZ&qfSozGrfef$d3
zI`L^QiVJ;ooJ4KT@V+l?oyF@k`PjLYJL}@vIh=ENm7Q*W2{abn>nYmB{?6@GnEi=A
zZzX@sxICk7#@k0b1hp#U9qKwC7bQwd_-E~T_F__I$gBEOJ8a!%CX}u^ywPk2mvQKw
zo{-eC!=d7T>Kk{(JlnTuUb)d9yUNLj|Guqy;#gNN#u{Doqsgp4LXLCV@4WlBkCr}X
zeS5R<poS`6S*X>7^$YouEEHwABG#Y2z-X<KIP0!cZ_FY$#wk+PpTBUX@Ju@`Rho2h
z)<kJR52cuCP0Kxb-)uZ{IDzeB&8vA&wU*pC8<5d#p=PM0S>axC<8;d0qzH!ebyZt;
zavh&jekwtcWsAaTed(FMcm96DH;1KL<JpXz*=A1Dc^*s7UcL3gYppdwDeIP2tkhAS
ztZuj>NaWS2kET2B8`u5+@VnYQU-0Zy!Q&C9@(yb|?3?#+)w1(}?yu`^%eP9|a@_Lb
zTsd{t<-^&xC#i7;YKuId!Z-Ci*PbiaCO^2y(<)*Ser8L<0=egm_v(I4`ZU>TN_?H%
zXQ}0V4;^3J_0W=DYyRxVY~HhHp7-tDz3l(0?_cxmHA_3w1ec5J8`zbvcw#y=@M_N=
z^CC5-noH{$zr~i%5|nV8#x;-Yk#OInTQ6!&8vXuRCq@?O9T$4svq$qu<8Jl~uQ|W`
z^Ap>9<m{wyE_Q*%m)|A*TB4dUao5zw!#;oSJ$Jfs>x>)A*PPj_*SSj0{&Ll=_|fV-
z%{x~YZu<29!tB=Bo2#bS2Y&o)_(||$qMDU(H4lgD)yl16yXQLmoSwNsa?1C^l0x1|
zzNt?NZ@V)uTYsg`G4C52iz~n4I)TR5hPjuY*>|wNR^KKjmRx77Suo%Adi}<Kn`O5s
z8!YYSP7mG~XQVjWWr@c8FMnq%e^8pf?55eV#Vfe3pZYJhbm5scrX%mSr%$<K=olw1
zvFsxI)}`fjiE~?aJz90bH0k6ULB`X5G8??lc#6#3|1R)fwVBp~!!d{M-n?<?n%9xJ
z@w4;GdQY)COtD$>nKS0#Pnob?i_hM<-=VG{d1vd<{XWd@yS9CJ(C*xHOZUUo93|cl
zHVuJ!R!+Wu^d$~#JJ+!8$!zJWjW3?}OuxR)TyyfqqRCSvuZx_HdFEOXSE=H)bA9C%
zmzH%JU0;@**=)M+?nH%6D_wsny$ck%BCNM8cd7SjpC3+tJKnDjcyV3ntGeOb4=4Iw
z`EP91{jc<8<B!*RVh57C5C7b?WxMUXACDAgG_dFyNnMmHnP$hR8G7$c<k}D2c0!__
z#v-B9XI_w6B)Rmc3g^wMI{)lUT%OMP`sPXBof|r)&!>hg){(ff>p6S#p)d0vR0JQK
zDfDpX-=}}IpDdD3InuLcW6!0R!CxmXo@_t!pegq&Ne5;v@A%MzwR{ZEBYtjN8L;4V
z`5%`@ugdMD52yz}oy>AEB3t5W(8rZ&PYi{4yk)C&JY{#QIUDd?eD^c*o~`;Pv#)!%
zKlpLuK=`6-CVP4A+6tJ>i=3C)<9}DT>C?r)w-*HWaCN!uTIykN^z!1kx=;2|Z>Q;Q
z|HF7=9dEAQ*1cSXK_W7IFXZHYs5L~bd-qRlxu4N1kz?BH(lb`CiWA=chU-Y<!}ZQn
z>JKPyJN;$Dp35I>Om^&e<q%_Oz#kh~%pKM(I3eX<bDpHB`NvPIKFwmhawcTK1CIR+
zpKj}9JU?l$cmDCI*Zg?)naMCb2xAd6_#eHT!D(ZBO7=vZo{*<mxqego7W(y-vhH7a
zGukTPpV;%?W@RPMDvvTQInBqp?vZHT)<>F^M)yKYU26?g?Gtie=X9F)i+=a_n61|6
z8)ccs{bJq0dbNxLW%1YNtg)Q4P^oi;q4qj%mS49_c}13bDVqwaY}+v5|MOXuYnJR%
z-5k=R=h(Kh&*c?={a&jhJI+pgd-dOxpqW4BnQXFAzRxi4<;|LqkM5HWTRCeho0}e;
zJaeYlo`|I#d{%rDY;vdll=^fs#^(Km3$AZ}Pd)5AWzwsa4L@tAw<pK%4Q<=A+jK(j
zx@~&7PR9<|w9o6?FU!mFc%Asi)6aK3U0dPN_@egVt(kMRb$xPzOYgHU;+ePS2G<1f
zcfFRU0t{z<Y>WRPt5)jsJi$59H>+p<GEa_UK3i-W+C2L08#(P}O<0`3a7?JXE+zH!
z;Z2>}Yd$3Zev=gHKOt{k?6K8HV>9_)8th)YyMCsG>j$<o5vP-mWJb2DmM!98P7&EA
zm-)*~#rF6{`NVyVleoWIJlM0Y`_}HDr-}PJ%+xg|^wu1Fr*vkc&g<>hs;0f|vNy8a
z@$9TmudvB&^N8qZ@jGkuJzpLC_i@1ub5Z77c2l08W)XRmzxvB3rvv{(E)^!H?C(u5
zn~`hZR@c&8S#!JLt#spy#$9uw{X4eDoXucOdulRijUv;Gz&Pfx2d&f7<%QU|kL+Az
zd?$ZWRiF39I(x^=3xSpQ_SU*g)!nOp%rO1JUn35IX|El<O`|U*uIYIp`D=6e?GUTh
zMKxRBTwLZTsLiwa+R;-A8BrcH8k>Y3KGSUvn0jjRrB=6`W$zLlRr6+V%*t4h_^9Gs
z+GVR#3j&w1iD%6$57coNe(lWHvdB5qGxm2#htkzAQHg<TCU3IWY~!m>nOfcB(%Jh?
ztxT_EX$kw`OCOAl9o8Oo@iMxw+hC^9%tn@5k9pqRx!Y#>$81H##_Ab!ub49&VSJRv
z<Mm%YzKKm|%a(u2?o$gUD9C+`_uzh<(irKvyJ*+`tq}&1J1=)Vu?S6x+b84c<+*Ri
z{jK`l2aP}IWTdcfiZI(IW3$bCl3dxe*N0ZUw7s@_ZHDk?=N+bZUOMzn+Au4AgZZPb
z2OpR{0~DT1HmRRWR8rF5YGQA_S)6WC&GM@-P^p{QGuLvyuhwHHb8RovT9(@n&SXzh
zdTW@X$JTiCsPH1$fAcM?)~%XYR__?=uiCOaDbAjI>%$*+R_Q5t6rT9-YU|>LI?XnQ
zg&Olbbw8Xs`t5#X$o>B%(Z!~Rq?nw4?ia5px?foS>D-flu?yz6dX(vS8P1&~QPi+g
z{lU$tZsAu?Mcs`5pv$&SRj~T?d)E!?x9srvn04^<i7HnYM$R^e%8!MLeZ`*y`jT({
zm5g>;Ys+L6npVD_mF)x6Hx0{=ezc%&QU#k;V7!-5SWj87wVIf9qw&MHcJ^;C;}
ziT9>;1#>!bIhxg0PN{S^Hhe4JDz8}EEc~PQ*&>6Oqvn}&?_M<R-|T+i=FA(nJzh`v
zy!7Sm7N>3N7The6sESNFR`-Z^$36G%qh2%4-U<HaV-$QuYo+2$m!DTljh}u@oSXXZ
znta+O;VVJwnwWyM?j5hXv8_;UOIK+O=ko1WE$eCo7rk>cc(^+2qV(~T*Q%Eap1jIv
z=j-jz@|0tF>Fxc=%MISnHE}ayD|oZ=Mf}>eXYOuHx{@DMl-N|TN6L^Rrn2BvZ1nb|
z?T;_B?4MHAeS3X_%8Lyb<a(oS=d$_SQ`$MzajD^<qpN~uvQO>seo~QIyl6wUQrAhH
zHNUr<<;uBR-?Xz=B0Qp;lhOLK^2-IYo&Nrgc6ZvNvpxF$R$i9sZTDv>OfO)IsTJ9}
zaJSyIX~kI|8rQB|*^xD+@Z(!oU!AUw)e9JRY&)E=VWMElxhK#6PvCKDmB00E0!Qe4
zw>-CHaow^L!_B7M%a*>S)!V1FP^8P}slEFx$%gQ!N0$8mIsf<;i(^WOH+9SkPEX1X
zJUnmrnzj6&GWPyUoqklQY@K7hmv>wFV(0Ho|8k$i-JcR2pCrV%>He-)TVs7Jud-e{
z=VBljGodehd)Tjqem|F3N&IMg-1zO;y)TcOHYZ3tyZgra$_-2I+0yGmWEoFhX6|QM
z#W=;&x2D?8yKDE!!stw<@S4UuEQ_+Tzdd3s_gnkAR(-3uU2VzhGnw02Hbu3U{r#zP
zT=-;<OWVE|e{)~{ne?RNVU64F;6st$f_s*i8{L23@H<g_{RS`lX92OErv<xqT29?I
zm1#{ppCjYs50~T*Z_mw+TJNX!LOSV^x<!lft9t2;n-4N_Y%hGUQ7fx3C%_@P@0nZQ
z%=J0^TbScx@@K?392bs|{`}r}3C9=H9eZZ{k4-W78pwN2=&au}<us8uJ*G>i-imrB
zaq9AtM`iQo^~M^o3yNmsv`w#*@$tWRT`+t7wiEfDGYaa2^z5WR#l19J$)S9MWnbW5
z{}<LFEN%1c)tBb@`f19fJYV?ckK3cy%{4!Ez46|h?xLwG`s`hz#HC#>XLZu~BX0R_
ze^rumw(7gYlhCc(?q19hUGI6eru|{xH8#zlqk5%}*q*)J*SNCqeuCDHYsryucC1V;
zER8+NYco|Qc~*Ody#ICSf3<~}!E@s<Mb|o>`|T}v9{QFP_y*La7fB_CoaWo`xc2bV
zCKli5F!pB8auxo(cfB&^$3C0ZtT^n>Kd<KhwQb6gzZ&JecFwe8%8Qh9H_t!zVd9FA
zuQvq}r?39DKj5){z=|5(9TuBR!&U}1yl=gzrN<IqzGkJ(Y_rRXSDr1p$no_F-&R4-
zX{_prhL?VK^k0*nE#udtz_rR+&+t#=>Ob>X5|fwTmKHf9mw5I<{66a)8<Q$$8^%v(
zD4Mc-x}->>NLTWryEFOBiuGDQZ#61ZU6Q7Jhn0uP)xS-}{4l$xn9j@jOm6DeFaFcE
zGP)e19eg66eZ|Q+X9U(PoZNW(!N2?z_MMNNwr3rxH~F6bt}r3t@s*QL;)`Sw4g^<m
z8$?f8@<aD-wLX)G4ab#^o0p}<LL`?x6IpI`$=A|8_~e?GuV??^{-Tw{9UlA5VUA7c
zWXApO8;*;3PAwL^dsX$zL{)!@OKZ*6oNrSJvzgqreQQ^f;;m0|x;np@x~yLdNT2mI
zUdHjKUg)y<x3zVrkM#H-{B<Fk%{S+!`TU}Slex>{yh4{U)C>RK6sRBb+$-g!;l7_o
zcesa3PI|ITTyt`>+?@CEK_WaZtGu!V557`ZFk$a?@%0t+4qjjWV^YDEYYuDunZow}
zc>bDOdhwJFMlY@4^=ohNUugO)sF*xANTzbro3)<zzZ4hT5j${m$L=?4?AKo09QdQg
z`}a@Y4<}@HT#Bpf+L~c)ZN7HN-vSYiMKxQ_O?6w)`mB7de(@hosfk-VuS<CBXM0;O
zv_k&f^j{`zVF^35w_n?GV|LzG-sva3Z+A{Bjj{GyG3$^2H+`=NcQxnRik=-xe=WRE
zh`qkRrFg%8(|HA3x8jJC3H=33vb#;^KYr`zbyVu;`G`u>Wv;Q&A3_hf9z8rUyKZ+;
zrmPd+^W@U4b6s>p_Wh8udfD1v-|2dkeOI*GULo$TV->4@*2UZZkqg^;`s%(F;ugZw
ztlxgKFuB*k#~qgQhL<Uz>FGP>d#^Vg@PAwPXr=kj51+oNa<{cS(~M%8Vo|o*`0kaI
zwJ)xVNM>)eW{Y*@aQ4{67TxpAAckktI^FHA{_9S&+s<vdH%TDu?Dlm>=diu)uGSJ-
zQE}`_w}{0GkpmjNvv>2|P4lzL4;EPC7!?1=e&w7mS*!kYy!U;7uY2?VWO<twbF<UT
zU+yjFbCaAs$7!<0PECVnSL+NX`5!3Gx4UaKgSmn&=2x@*$45s*ud25G2s;pC^nZDX
z>6Qsf_jXrU92RCSo6lMw80lHDmA~_^$t2HirzNh++iUi{%9?z6yV8Ukv;Stim|cEh
z{W+e1R}C*0Fm995{(Wq7M!nq$mWk5@o>so!FRv!e&8=(k<IS{O_Y>Wj*KTmWVBegj
zTIf~lJony&^<Q>8ZVYV^e|1-8%Fl(F4yz}G2+ffUf6>#;HEH|5rhfmwX^nG=D?A!i
zqE4sw{IN`1%zppl{m8X^SLYqf&Cl7tZq=*H85^5R)mm;U*EWZpb?@C3S&-GfKiPdk
zvDD*hS1Vmv=DBpb@?G<rBHQZ7;C5G5m4nUg?={)BO}?EjXPI{Li7$QK!w|9OQPKQ`
za}IAm;Jx#h_WP#GZCYQh_C8AG`MRt^gK^%qNgnb>S)DRd^B1k@G+8LeFE-uFNOOy1
z;1As!<+d&^8?T=GTj5$~pqsyy-S+vBI@Sko9PdB+JZnnMb=ByHduGTxfBouwIFC6>
z+WYlm!*0zJ-M1>%t&MMgvA*WTEX$pjf;WEn=K5n@;^mE^qRuz;bj_n?rR>RHlq33e
zy8%Z|KymEv2`$3fZ<f~mNWFY^TH!QNmx*T$1!ro^wS50@?GZ1NKiYEVbn;(S&Z$ms
zUdp>gd2++@Rr$rA!_9Xm>`b^}V_o=k>!cnNac-vDJy&D?yvmy2`<qeu%$x0bwXr1;
z4j$?U_86aL{?&H!$cLbnc@qrY_HI7yds=#DaeuvfoLGy*Z{rQiq}<!1k4@sy?~OKi
za`3e{d&m|p<Lm%~eEHnZ(Yx9?9X@P*#yxGtueN8CTm@oXKgrhiq@44t&+adM>VKB=
z^_@ezS+}pATNd;7bXD*}kHvwLT&EecOx$O3EH127N_WP!Oyxr<R)x3wo7NS%$*&E4
z8oOvU`^=ilanV;#a!=`&nwkB)bE?nJmNP+0|1H+pu3<@e_wkBqi34-Uk2wqefBdlT
z#I)Dis<XL+ej9rUAGTS`Tf)A`LBJzk=sZK%jPmZkGEb(Ro02py#w)dN#i>7rev2;a
zJ>DwkbTq2?la&1y<LT}>32ILQ{w@o2vD{VWvXE8jk#E=Q$xr2VQ}f@w+r#ZA@Kd3T
zcl}hB)@Pp_etZhekn8-~*J9bLxA#iXvya;*Uro(ZDp}=y&HtXv+|@Pj`u7#4%v7<r
z=$B-kzKY*3Gxp-As0MZi4OIch4`x*xKi+NedR^+vyDv2NosybW!IGKJ#my#Ugv|Z_
z^qaCr$@#4_SZ}^r^>W9|ng8CJAB*3=Lw<7f(Y>?I8m-e!O#T*7tdtqty*o_etZVYs
z6_=N=xCl)BJ~??)`|B$mj4OC$pGof4E%9}`{_dJmQ+7B1X*O#$an^>yf0r%F7&T*e
zIJq^}Td*~6@ZG+w>_qPY!JGg1kJ;SM&@nrFZwq_$0iKS8#))o%l7F@y56aexP1$gp
zO-(hpOZC9?XAYionhgAn#8P(bzAn>uA#m4Dj`v1i=CV2o6!UGCmoNI#-?^-Yo8?7L
zt6=Zf-jCkmYg#;vUvn*Tk#zHpEkDw*y?v8`v~Acc*1LahFAjK=Chrpzw_~0L>k`#1
zOJ$93>NOqs<FjP*0(<j3pJ(#3Ic8b=ezq2KxgqppQm*ihMLSGb=6?R<Z0s#~qhTrY
zsaY)n3&kVX-U{1XRXstecfz`+cTP_;USHU6u$1?p<lR+o_jc~NA*6X+<$>tI@`c}5
zi_DYPI<_qDn6a?QRGXKjC*q~=iAdS5_?$QAgz1KFJZzjCS`)ZkcHVP)9DeYo@f5=c
z(#)3sSt{)RwVSZoeEs?4>?Y&Ht)6oC4=!<e@O9qOW!FoBU-M>kMu_Z7J%36(cO{!w
zL7GKH>YdqpvR3^zf3)`c#-<Al)}9x(d-dHsBoeZi+otx(!;*c^t}-6vVY&F)B{F2k
zuGS6yQ)G_wPF*x}b=C785pCrQQESh7?lL-ewz5r6gTIZ9S4fceyWnB>h6%g3nqQC*
z+?gP=TbcQx=+|#^MSJe*%sw`2;Ww5Yspqv*o<`bTi!*mWc!;%p_Tm33r`9WnMtjeQ
zt8J_(-Wu^Pl`klEmd6U&{w+eQw|AQwu8C>ccGPlH<gMGqZ$<r$veF;zKle@eg6tIq
z&TGtEPj}wnzpDFE=iR2sPpTj2tYzBfP%Rv3_;U|igltb~Q@5n$gq0af^3R+~UbXPR
z;zQpvO;)GBK6j+OYL`*OyfdLw)bGw)(av<?OM3nE=LRdCW7lk(Ey)!2@_zbUH`B=l
zliyVQKHS!@AzW0R<-=Rg@_(M!)WbZog+G0)d9UMJu_EdK<Fgz7GR>bP&vbsOn|IG6
z|4gWu*sW6w82*O-pU532#8@YvcAVqH?zg8W{n(eCmc#OG_Vqu<S=kKlNm<38UmO2q
zLg~Sq;(un;-@N+$PcTb<w8`4<C4%c!S}zu{L~L1R(d|%bztXY9(sFe#uk(=yy4%>U
z3M&^*+w^F^gg{$0`@aK*$I8;*?mx{Z_SvyqKGE=fjnqeNS=FcnX3fcQ8#S4>|9dGY
zb6v<J{``!x$m8XaW}(Y|zwDT5yE^f_zQyy0UrbwW>29}l5WKhW<(ejg`Z{@GuA>$f
zhcy)}<kdUuv>W9E7Cx}aE$ohX$+Y%S<?%$BMxUOwu6H^)CS`C4AK9R)^}a}A$(*Uy
zSGH}GEq?d2V$Vc_E7R{TzH?hxY%<rM&6_jNKgrR%AnK5}Ys>cyNB`a6db=z2Wu3Nb
zN6d~JT+8I!;$HGRl>2qw-{*Mt>Hf+qsW$A@YvKhz1r|Dd`Lr>wf2Oryf0DMdI^&wy
zkfqg{nk;2rY<2aGSJzs;kiYm@z3p#qnCXc*mkvcoPENRNe$(|bo7C?!i{tXWA0>1B
zJX07aV75p>wAInw;LF=n?^jIoeajbh^aWe&8_Vfu<E^~kEVyU&_edavzi01cjn>_<
zeZO{IvCov8YpP?QQkeEKgk|%ay#?v!+ozxUV-V?UHPL$h>-!>4>k87&uV^W2DE#?9
z*L3@pcT@S!TbHdV7x^`F<u66IrN{jColoby5-p{nb-(QpE9dqnd+Tp+Y|UW5*6?CG
z|NKi+JW{T+mcDy2aZ*J6GEOFqJ<pQe%(^~ao+6SbyKP_Dy>~nI<~r)U=~7}^5;FVG
z6Z;b{jW{B*E^&xvT@n+!G4<W{-y0nw=lwpeK3Up)mYDcbmTOC$vnB5^A6guibLYwa
zfY}Xo3pE^FZ=6V0x>qA_^<wq3Y@5vwz3TZhCp~oE-@~wvb7^GpN(DuSdaca@({6-R
zrB$Bhi4j<kWjFump1BWtLr#BwHo0b%Sk#4%D3#2cX1B_>EL>r;OVRZBop%c-Z_nen
zV8iimfzqEl&$S(A?6f*&diT@a?1Nc<Ch2o$>O5=VQRhEw>~n?Zze-x&)|&@T`8EZ&
z8YDBW)m7T;6dtkBjlVhak1yBnkCCyDHtlfx`afCrT-3)?#Tx`K$E6<<KEC#|a6?Ap
zOy*1;jl(r|0b6by>C)Y^MPTmVsLf61j-JwfcKDzA*ZHg|H!gE0uzK;HTlAx&b@K7z
zK*vi{tltMm?LV!5y3^I7G3M5**XyQSdGhF6)PV;_HIz)5@Bb?{{IW~!<9@Y2B5Re_
z-{-eCU#9E8S^49|rC%3*2G5><=&_cPiKZ*(O@_pny;|)*os`ZT^GI58K->7=|0y?r
zZIF`@E?>*eUq5TdM%%T;^1<a&A?7<K&OC1)Kjp`{L+8}*iRR}=L_bhEI-9ZbxZE@o
zd4Az_nRaS<tIXq9ThuL8NG$mpBBS+JeqCBz&P~_!bBb@Gm7j)hRfrN*xml3@kJ;zI
z@$)y0uIRgEZMEVtNNAIOG_{3ID~~6)KHy(f)3s#z+3LEHhSkc`{?6}enDxWUe5?QI
zzjG25)mClY;N<`Rr=~)2Z`$OCU7y469b{O{cF#9&y>VS1m)D`)_vY8_6TPr+p?Ave
zz-uS$Xa0}x-m~j=pnY`Sj!i2+c!gJ5FJSxH@GRhZSLF8Dw;q?@U;52-(%k<CU)&1G
zi}$Pdm-E&3T%7kosw=g!F6527>%Thn*y+0~Y^Do$&C@p!Is3n6$%Cvb|87g3{y6=(
z@VQv~d2!A%>!<5DWjSQUe~#x|E6khjekt?gVNb=5*4l61m>!9o=u}vGUC8-w_7mP9
z&45=Lc_OE{+uiGzx<`5%@0`3lFY24?@6}gX{)tt0<}NzwG{?RsTSQ($>q}~s6@&lY
zES}bhF{a{NmJ*ECho<cQYHT;Xs!4k@gSq|U=0(aTs(atO$UY$8c1rnlqQdthqE{;J
zuJcjV`E2I<_IVnk%7w(L+I2~L_HNEi$^6`#$dudH_hat45|uBrlZ#wy*BlP9klOjI
zQRn~9y&1Po-uxUr`{=RCPs{D)79O@eYgALXZ6nL>2mbvGIpvZ3N56eB-)noI@37mV
zO^V7vowMwYUrO7xwg3Bt8TSPvjOJ{8<X0(MI#qp3tC6()@jFL82TShH?zf%u*2P+?
z_o>K&$1M}r_)ofAQ#v^(n(^xio)cB_M+0r;{$H4`x8-y?OF36&evkLGBB^V3Q(aY@
z=2-9Nbeui!tD1k)2ksq-?}W>vTdX$9|N6c2y7$8z|6_Z9x#ja0FW545-eMEq3w<Fb
z7f&3&mCPV=Va7e(9m_cPKfc0eex<)Wyk~b_gYWyDHEGK`m%Ux0X>H>uJw0ScQCad|
zLwUY1W$wURu3pz(bnULnpKx0LtTlsUsFQ2qPm@nO9xqGf&$mCdUW56ITW4SIV*b05
z^D7q`_x9yi&tDn+F*kT=#=eNsKNqgLt$)C<bMDUj-&O|h`Z81bZ<X(S1`&tX`(Iu=
z@cXis*CKzH$0r*c8m8v2F)mg*``M8{$42L9OFk#_i<2)dA4u8x*q8OrMN!4~r{;Gp
zeDQIzXqkMT<3qm_5<yWR^B#WZU={xRL9c)Eji-|Qe}BtodU8$uRh;=Qcb>ev;2Zq|
zua^V}7(J{$wTkN{uSn?b!0VQmpVuBve9Zf6A@@6Np+ct*DGY1h-%Bpo&vNnNlL;69
zt$Wg1rM9L1j!4vk7eNb-1{7@A8h5H*GDmA)M3G65b3LEX=NH{aZ{3qMj>y4sm_f3k
zf%0FITNf1?E?RUxtKSt?w2j&Mk3!t4@?V|Z-!w97Z*;vWtY27thw0r~Me(lZneu(=
zxy`S)hkLegeQmxZ@yGS;+r{kK&mVW^l=RJ$@p(OGllk74OPKbac8WH5%n??$A$n)#
zo9_)zX1iUf3uSN6dgPL6D3i<ba*m1bOT|v^lTRnIO`d$vXzrqI>x?oNJZY&uBDwJ=
zm-go!v*Z^=u=4AEn#KJ-)ZfJ6xw_ci|CJfXzx_H8b}i$J;P#w7S>1P5XSpbUKlS{o
zXx5j~=T5KRwzsz2-0UfTd4<bYheb<oSlg`qZshf_dw~zjT63ke)*Hg_KgWrj+Af)v
zbfS3DlY{;ew`#7;WjpmeV$yp-h6(Pw{o+b4{i-@xw_Hka>%tdFwO?0NSZw&I!d|H!
z_5N5yRqtY!ex?vM_xXXr#Sa~-f9HgTXNf=Yj}yJPX`AEiyo*Of)PHDP%6X{8q#Uy7
z<|X44=}@l?>Yh(3cInMkT(#+@?)FcU?#<lr>~@QRl<e`_nhBZ=p&YT%|LZ*W9N62~
zzuxBcXQ`DuAs<*5IowH8yAl&?u~@TJc|~q(L#U{2=*ukbIoGQ5|M=bLsP58;|M>XI
zTZbKWdzft(T=2Pg=l+bHNALbxTv%xma(RjOn@UlqJQs%-e(u^!4Kg(xW?c_Bzqn>o
z$n}&96HoA13QtdG({e9#yUhM|npW?+AC;T_D^5M29hGMsCRF=y`M($Is<+hs@O^Vw
z)9j5~hI_^(j{G$3fHs3;-{TlN<#H^`mf2q0dgT$PP`ZUt!!pO0c}E3muJrDlyshq^
zOvFc@X`(02PTg1`Rd`Bl>)TV)a`@MIm#*3*`Sv&GyYf>HtS+B_H>2kFQFHc0ZfDDF
zYXxuY2#?A<@z6-C@9D!07PsVY=AD=&W%qnS=B)Sc_LUee36h(1gyXE<^F@IlSLfR%
zWPAy_AamJ;ZAJUuMI}396%GjcT$eh;tYo&edcqb>)4T7?r5Cwe?OiDS@_}ZR&ClJ&
zel@>Vn12)ezgTnf?!S9K8VdhYel5X%`LCyL%<Uwl!|NGhin;BD?fA=P+<9BtYaiXu
z-kPI((?)Wu&Iwkz(`$KrUT1Aud`Z+g*zQ(&t<A&l@78_VCKMZ=dCF(T^q{y)HzpY!
zs7m7w`L*+`FawLp`-@*pxs7|gwkfDwe7#QNLsRyS){v|P{%#j4e=C@kB^=W6&fRp*
z@m%qw6(8DjW0Gumb0@`xEK>h@L(o==LuU01xx12YxKHeg(0*2?>QZM}c0l>Xc8Mdx
z54F$UQJTublp_27@e7r@M#o2-%GJ}q2i<HvzV_0i_&=|H|MJ`}St`21VD;JuU(!mC
zZsuC5`YbZFcE&W{qKWo4>qO#GtYzFiHz==&=$~F#>~zc{xnREI=HkAO7Qd6U+)tgm
zt(Cboi!bg#$cv+F^ZOiERrxrI&F-E!SNg$qTN8z_Wgj9Qn15Ta^5VVlHzv2PAKrQH
z-IBd4tJX#OJv{xU=HQ<H^X6zo1pM!*ma_}kEpt8a*$UP2=?}MeemYmf*nEnkm2dxp
z>l5z(iRF0wr#9Y=RsBnt$+FjBq37eGpE7MWoypsK_>cddn=(h{Uzne`@=|lgGZ~lH
z|Bv!qbnO1mqOfa8@y^<Wo})o~MBfO`owX<CTp4%js;NJhCVbd<KmYZe$7}C0)lcyK
z>^`IXb$7zGgm-Itt?bxm?U~Ka7bHGs|Ga6>xP`M1a;NwFF5b%~8{52M1@qo>3e)$?
z^T}DVpUM5u_5A7flgrkI#e98lbf|WDVDaJIi`<`b?meg;AW&0(CyOC+%cIxx{wB2X
zasK_&n{HkmB=OMFM6KSnde!E?waaErE!r=8M|@@V%o%U~2W5606v_P6Z^+cY*xQe1
z`!oTDQ>(t8+VP@p@_EzPJCe&@#_XGWV(Uvbk+rt_Y@*%cxOieRjyQf3n5y8;pMCGx
z4fj{Cdo?ZN)8C6`evjd0lRlFFIPalu;&S~hvkxU?#7gqj2-UJjF3>rwp}D-3rQa-m
zuR`7ji?D*6g4z}n$%Bg$r=C+ZPkSnqpmV!>*>kI>|0e7$__#<yqsKs&d-JU~A`8nd
zv#eUn+}q)tnLpiif#D3bIa3V&dW$7z{m>T)SBZ)4oBQW_+#=gQNuSocF()K;Ew8mP
z>7COo5!lb4oa}w!KyHotM|)P~`%CWTY?o7Z4=75%>ibpQ$ks=!&G^y6MMlxvw7=>Z
zz5Zw`D;wUSE11H~I(7H?k7oV#Iqx_2wDlFg`ObMi_DJ;mXsvmnx$m<=(t`gbuF1^b
z)_bNUZiBT(L}<~ZYkKqEi+w#EW})w0pyqlqYTiM!w~5PcRp?*l>3*FewB_u*ci;FX
zZ(X$~rt5ZAYVAjhXLC=cvU43?AC~i=&+OighaE+Wop!r)_j7Ka@c+{t0rMrzb5u_n
zZCN>|aMuH)=rvCx_wlcOvg{JGx%S)FK9BpqUhtYer!aSSf89H$ZDx+V)-peOt6Mj2
zc9}Ql`ICh%8#9(14RcgKDRG=H_hPKxL(%RpMP~o5>7VYky7_FC{`Cp1CMl++)|n1#
z`Yvw2(f!qY_P<r)(^q{?_uAiLm033<Q>WpN<Rr#P%)bQ}`R`qmz5AC{bc<e}#(nwo
z>AhA_SL9YjRK{9mw62+b%W*#UyZy`U{)e79^sc~M>U~YF^;cj2hK|*e+EXiAGwyd>
zTlf9u=V|-j<fSt$5D{~fnfyQ3xTk0SryuKf2y`ylHF?ojb&0#z^zWY(&3dfTH^*;#
zm*4!emp@<m@M^DG>BnRX<x`w17x{GD`RO|G0=x9Z4_C`{rC%LSSW(aRc1P_kksHsK
zF7TLcapwQsqucc6#w1-_SbE`MiNaGS_50z+)_O**$d)zBE~@KI<VccN*)Q_RMQ;60
zwohxPTc()pyzsmv<mb<6TSC8RhaOiob9y_gPBwa3_k0iQ^d0kq`KNm&9BGvLHdkNZ
zQC72z=0eeS&fJ}wPiB^dMf`r!`tp}7C(Gm4d#}B;_`uFHC++_SE4H=!C%u~BEb!l0
zz*_l%h;@UM&uw9sIr<GXDicF_?KN$R-sLY%*xj!purBMZ(t(Yu9!&1^zPx(k=C4K3
z|1&K^4YZj)^{$gBxccZoeL@qf`sytEPFXLt>|?rSOs}%5taXaZT1w=vF<<}cprvxf
z<hqhv=eKKXrn!1E+TCG2Rrlp_N$i8Ht_M}~N{$8E{dfKSr6DUL@Xpk9Qx@MUzvicg
z`p>WYQ{TO%rzWibqKx*XpO&U|JKL}O9eYt5yCweAjIAAd-iI9p6SU+Cc6vS(320>O
z&5_Q@JhQZY^(jBzzi&hZSBcIt(@JL(zo?S<a&A>>#Wtn@*{fd<X<wXrY|61UHb*zc
z2l9Sf$ve}ozy9Zy>O#K7YvLFU*Y#g~>AXSj?2?IBCTS*XK9}0aS>pTU*UxvNT7NyQ
zzoiEszO|{0iBbOlhx^`KfA>k6-`*gpC7b#|Dy_ZukXn`O-1;wl<vnZdRj(eCv?<tb
zSn}?xz{l*nS@)iwkD7T^N6sWYh*?15o9~bPw;u`aFD+qRe}3k(*y7G`fz56O;qSL9
zh3jNpC_g^W_V(UHwU4!qbI<>YX2}*i(v%Rc<*H+DA8ry|eD?Xx>(_5@n0?8a?Razg
z{Au|!XRdFl<2EnOJLNqg?w8{2ii9Uh8)|gAI4>Cl@2t*PyFG;G*Zq?G7OtOHmU1sW
z$KGSc8@O@Ocky@kmt_6UQ}5Z$%H`X_|9Vl-WJU}78CM*pq!xS5k5GCoeNTXoPkO=m
ziT7B7-Uy$KoV4$xuk!b)_g6*Ct^Av$z`{_{IC-Pu=lZX~PmC8T8-1DKBFQ7Hza`~a
zZb!|+{>jd%DaB&Z+mCT>W6^q|EHgz_i$`4MzqiHWsg}n}lM*~Hd`<s;Cis4x6u0K>
z{_k&@BvoEXE#X%CrQf#g!*{i>_fPlKb#5>8JuvHVz>=051=i<Ec2C@4vq}3yQP)T3
z8be3dS4$3Z_nUb<`}2V9@r;}c5kDDD|DAXL>m6mi1N%0YwLYIMw4@*={>kM&-ibM>
z2QOROXm0)dV471c+nV<?BmAnHCnxUddp%v*bNTbu-tXu6y2KCF*sND@-}p6u{qm@J
z87p@FVV?Z`gVP~f7naMrQtor|%jdUlF@N9i>)xux{!g@;uO?qRU!AJ=JgZ*1g@4V`
z<qphdD@;#aRu`=2V}Ew%>Kh54O`i>0e%p0*q|Vjd(irCbIV({3=UTN>hYWr_`abFG
zCJBvw>lTznm@U8d@TLfBs_*Gp^8S9+DHpxYbLGwq@tt{*uRcJr!8E%;rt#&h<CDL2
zcU---=x+VZ-8;nNrpozV(sY=;vUu<LwRLg-nWV%7r{*l4w~n>j^Q_PoZl#Y6k{bMf
zLa*shKH+4&V*Qo+nMK0vi&cU{&g#58mvUU%!rFS<(FU0_R;LUf8XPN4h&z$NrMGT&
z+p`O9W(R`2GUlk5>j&CDi<GlGA1Cr!#_9^o3>E(eEWWemui{+){_VDDDK|_0-|wFO
zk$2a=7w2R5>TEf;y<T<Um&wHqy&Ml6SU7GlZeP+8d9o&&=_LnSpTLuQ3Qu>Z`5m|}
z@<dQ|$KRzA7Zl3RX7L?)=<f8{*wb>wYgv;?rdHfX-zL4~es*uOtX}xkb**f&(p!%`
z7y0==?ER@&<M_#(c|Mz7%JZDKd?Dj_{4&M6?ToS}H#(wMny5#VCR<Eh@i%nFe3_4P
zau)6M?$Ver;ow6ijzE^V2^q5<?E3t$=+IKB7hN|eJ3H0=+Sqqw;e40*Ju;8%7%zPH
zFZ`KO@3)A{xq98X>0Dpj*w2MOS2uSrJ<>eK+t2pp4CikzxSf8q%(yb;8S@;Kfc6`T
zfjjQbi#O&}TOsXxShusjD7iM)|2Ds5X<|G#N9wVCb@JVeNlTS=rmx+dX)PhE-=i~Q
z(u)l*R4-pp;P2Ty?a3Q^<^sKo=e?%?)`;2Raz%2HFjrBo?j6$!4|iNT=eWe($Ml?8
z%N|9=J&FB)w>(igm68{B=gWQ72hWAHk3P(J|K+FE*Cxw~tL=A}WbXYXH&s#M_o@|j
z=E=Pk&t+N;rJ2ueoRGbkzh}p?Py7u^j+18#R=(DkkGAAY&-t`_&BT}q>+KVGzk5cC
zvrUcuX}WD;(vDBJf4_RZ@E6;xhUO@(-G27o-}|0li1!LR5_LSG$*8UQ`MQK0=B~oY
zA6C0F{hYV0yybJM!w!9iKMT%Zk}2qwzPL^3T;@ruhyBO4&9b<|a8l>)y8cSOh$-m-
z(m9s%Z!yIM+-bEpU-9GooQW;Tlin`q+3{*?&E>w;($ABRdY-%VJXT!vTy<vUjs7>r
zOn%4a-^uoouAP{4Z_$*q=R{gJA2rety4&0myzTahv)|tJe{|pKz|!QUpfvZp$uTj7
zWK*uc-)kk}gPm;sf{GvSG`r+`{dY^EL$Gdg)hhn^))Q7VsRZTaZk$uvlOuKe+J#QD
z-ad7;c$4eaM$9KU)ime)lz3CEvQSSr_Tu~LPfopj`l*OPr%U;T`ET)1*XEmDW^->Y
z`g(s2!`9AF){{Gu<|VEVtS&3?oL;XO5SkNJ*>*CfN^2{V`LP#uzw`xq6&X%F=sv+>
zsxXf&M`q@K>1&Io#w2x4K2yrG>uiAX+qqBc%hs;D`YqnNx5In>+;5t<6`$=A<^I_2
zR;b&`duG?xUz3?yUu->Ec7rLBc}|ST?LJlMnXeYvZ*6t>I)7S^vdYou<9!KSHK*Bs
zJg$y06s@yr;^5r=tM{taFWw%0(RrWaI2#*Z=gypW^IKWW&gc5qTk_f5?ROWpESQq?
zf9^{re}50tiR@0++m#znyNV_yCslk|xus#>g~Z(CNqgI~8@uOTI2R><FX=|ZT;J+x
z`Tm?7{@Y(Z`4#<yMX-k@^Yg`oEPX5aTB%0~^LJJT_lo?AzZd-K_ate)CGTQ0xBYO?
z7MXtT#r4bYS*{zrkyiL9_>58O<Dn(d@eB6PulM0KSSeL}QT)csXYa*VTw5=(KI)9{
z%gf=%T_k5)&WiFAIsQJrWAfs;xi96Gw!IhpsB$9c$42KzmKPMCeD1dSseRk(Pus3d
zPvY-?%d6YdWx1yJs>f@Ikc`u3lpUCgZN8gyZQj0ac1zV9{}o%`s2W^fpDAR+=vi`8
zbbX<`e8RupvpPYG9W?*H);h|p7W+)K(C62@O%e}w$!rzN)?ZLLRW{sB@H2<bWUrl<
zSI*<K6?t*Y+31Dc?7tr$UtO(x^pEEcnHEQ%-SUQQrgB<_NmeCC<dnZW=F8a?9By^J
zZIAjg9mZ4f1xpeWjSHLhzc^-_Z2Po=DXAdoS<0gOC)=M{-Q_rxfB98$nbZP}i{jQb
z8^i)mD>iB#Fxpnct*!c{chRp;wP_EYl&2LQYK~p-)yQY<ud~y?HHgjil{peEzxKk?
z7t+flUI#V?G>A-7^()vZGH+u1$++Vuog&NCofW>lHI|;J^r9oL>Dk9kHp>pW*A$%4
z>eFlSEMD~R&^zV^g|?cSg`#EkE4KVK5`GwOQfs)cz}xNS%D;Q}<oA@^ymxlt%&k|>
z-IOb~{&3=R_4dskw!hRi7MtGFaQm@ns_KT#&yxyD{&E@=duFeBSzY-?dG!*LGR6CQ
z_bo}}WA>KFQ{GXNb0#G<U3{0rPPyRPx0<%xt2#^ARphECoV0znI%B`t)~?u#+nGE!
zJy@R>!|4{;oP7D+=bO8>1@N$`Rq?aDTc3A+c|-8rg}$>@C6-@4R-mA8xbbDQOUlKh
zCyZVug|5$i!Z&+Qiu3W#S?zeBd%}vZwv!AEc%3f)d?0qUk5!v*&Y^#e0%G4*bcq%>
zF3SiAQoiwXPn8q9_1TuHpr-eHU)QHK|Ji!{qt@Zg`M(;J{Y^t!6D9o4uDTFmRqo8d
z-5ksKX3jFps`vJ$7c^h*J2y*y*$eJh-D?wi^N(K9h>oyPUexzXrD%e|{k4<#ze}y2
zS<R%_lPj<}yx`m;j)HkB**;BbKHTcNy7NxY{wj4ZGtJ#jR(r0l@OkOxd-i@|c^j95
z(F=h^iM^aj$$Zc4xSZbqWSVxuzlL*{?6&aN4mEWQfzx_dMX;L-=`qW)SAFi8!lQGe
zrIR_rOzJZWlkGB2?P5uR?N5ZcXZUj2@8e#WA2#XKSJA!h-S%r1OFlGTG2x1QqUch)
zl`W0GYU5ZFmnELx({ZGUvG3-0VWnTi-&Y(y=Xjy;k@by$jA#G<WhybuDvph-`7nFl
z%O|_8re_7MSbKQl29>X-t9Jdc*b#M5uJz(p)~bU_@iYCcxWk*-R$ot$zb!aN`Q_Zz
zleM>fvhw_p7$eWJ?(<%*R#yInx9Vfpmh067u{!zJt-Sdx@$go*S&jyJ3ZeB@cWX}m
zc{}AN+kKmGX71zrU%Y*?KWkZ4ya~gFJr1hEe0@<2Nk^XiDP2^h`!cmC`Fd0WA8U*9
z&PD5sm+vw><evQ2+ts3b<Mnc7t|QZh0)?$Mx86=N{&-mD#HPO+)=vLEJ@7;DDW8`i
zCs))aUCYo7=30<k##OiC>NC*^rV6I<@;g5EYdcMBXAUZn<m7pE^qukTL#`jL|6vRD
z4`EngWNol!$7I$xzO)5eZUURt<KOOjaee9eOFt_9<m5L_`Z|TZDD%ai{8QZ7JbO!5
zYIzs9eY=|b^PGA8i_&$h;guVg{TKU}k*#AgvEv4VRMmppyeXH9UrY(ORxL7>eNE}r
z#EqqM!qhmf^@ktW6CKCA#p<eg+EnA?&+;C9<<QJ{xk8^O=;%iI<7RspS)cK@xUFOI
zJ*0V~I;49>;lhpHnuq7#xv)n4uRp)dk4J}8zD)Nq64)giA2V%Xg02`-?uWwp`Cbhh
z7HKD+Oj)MXu<)D3MCqJ+Tra;LICEszx}>O3z9Rq4Nj~qrWn=bjj!Ux*og1<^`U`jG
zuaL(6Z?de()+ukce0ufplI04EY}@1j-3rGduP&_x>H_CX4)-_gUiT*Rnu*Hc-v=Y~
z<D|1%cEtx*FI=)uzFvL7QK^e>o3$qNahczIAiea9Q~SJM9(R6R2&$Y_FEQciqKaKU
z+lvkOGSzBRF3$e3tMK!K2iN-!`Rtvvx7uFk_^vPoM|TMx*6s|w>8B1czsbwI%2>|K
z_})=9>BH}`_uSIAZ)!!)NIiel^VPMojm+X3{0@6AOu1+i!yvk&BK1rEyqzbie;-}O
z7&>hxgG5B$p%%U^5v4P?|7CdjMSSke=SJ~t@g3E@cC}W<T;d;Q?kNv=?>Orh|0|oH
zJ96A)?YVF7h+1WNAn~~JlC$yl1#@m#Z^&M<)H_sT(kzd4l|k<WZ)gR(E!ljoe8cVi
zEJ3%6i!bc4P`Eq);O`Uly`E2A|1io<G2L<di|CpUYqR<4AEvHw_<j2EHtV@JAJ{L?
z+OVaMxi)ZRoV8+`|6%U0SC<=^ta}&L;1Y4c-Rlp_?A_beF!ssr%jCK?A+@)<L9zDc
zrZa5KT^^h<xp`4rR~nuF%sgk7wV0;SG)E?mjr&aOzedK-@(%g6)mZ+#W~$t@bzjr%
zr!&V-G>uZJIox}<V(*p5H=+dlH{TMHbh6u6pO}8F`tq4)dAF~9N&a|rt?Q|XN7GCC
zdb6&iZR^%payH|K>2`<zR?VyzD`#I35_raZa=(?$ef`pN*DRH%{(rq@-QgCQoQC^K
zJU4!dTzvNXS=`0I@F?Ye(}qne9$7#0Kkz+Br;h2uRqG0Y)iWHb@9A%mFFkkXPknk+
zP}a-nLku2zmnW^XKlnT2QSMFk&J8yb{oB6YbCr<)RW7@U=}du0A;U(GMfKSpr8n{q
z9u;X`TK$OanNIxM<>#NBUY2ybyt`cWoL1)_7j5Nz>q?TW&X<b|=CT@`Y+kZyO;b|T
z<fJgaIn%iu=PEMr`SEVPX88Gvp>Cu6b@}UCeAq5L-}m_8#e#+^&xsq|qj#P5nlBtG
z{DUpDN~KoI>e{7_1fhHR9kVKuI6aMz3(q<nIcwAPYOB+Fi;p;%NCg*G{4&tJ?bW;R
zh4u=Q?$ZZO{IQh$S+Yk?C#Ow5aZ0|8v?NRYj@h42u6VX7XL1e8V%|Sjt}$Cbc3l^8
zrmeU*@7p?=SUx9d+ZV3xV*51KhW`%k%DFC^Ai8?vt%x<7t=x_6t_wyNUX01lUhBl=
z@PK!PcYXEhC97mN_v9q*G;7~|+-<`R_4e|x<ws<aCVs2A>Gk8z_WaM!xfk(rh)$S3
zL4SqsC7tR;tip2Y683#(zuV2>J-xEaC;21C_Sg3h9JuVV?Vah1uZQlu4%*=IG<2O)
z?TPKnwlC<ei@Ke^>*DJheKqzz{11EAM_Sz8mfFKVBQ(7<>u_*M$L#0FR~)FA{Vgo<
z>}Q?Z0*k{oa9{sd^X$)(zN!W1j>XA@E(-U*=l|Ss;$`vXFYEO0iY;VUd%SVKoXI2B
z<?{EeclqT8<>(Y$u)6iq=*+atz9wVMADNe*dTx9>{ZFBL!(RXGC)-v&TC3=I;I@jA
z&7KcOwVageb>4mupTcyYO>SoE0*}Wwo-e<rUg+$vc)acQ(&CJgMKV=arj+(@+V4I8
zGB;b#(5!fpUKH=-XbJxAnb$1*RJ}T~7f%pUGv0rxsdVjvMUj85$MajN?@f!%vGSf1
z#@j7w?eanEwKChs5B05!vn4OwV)oygshDdb!NhB~VtK^N1?_H3deK^raX$rQ7l>#s
zooKplws7N2XL)z^ZCAp?yo_d?H@p2hU_ycM?BiRm%$R7^{eMAm(e4LcTVJbX<Z$aV
zDl1*LX9+hA%}n{XL7@3cPvxBkmEb6iANSHyZn%BW{N347)mmY%lQk{--tifpp^J8_
zJe^_5z_qf_?)8s-srUSxu5c8KcJ7q<5T?J)V?*T*gM`x>+igw4qdc!yZ_auDt?!cb
zwxX@YcTIbOlr}kZCTTND^4f5zN%o!UVxRf>scVFg)0Lk)tba4Dls{$@z9;y$CHLuP
z`zkZk7phO#wt{>9-~Iz{9MlfYootss$w$iO@5&E4r797koiD!Cy}hvdMQ`naHT>eH
zTX!z_9P+if*Q)z-w<weE?M+iF*Dbp>ecklNoXFV6w>-l1PDT{F7PUG0W;>-xKf6{@
z{HgHyhn^a>?6R=ruOD2s&l+am(JZ;Ul!edZSB!4(BW8>D|4qCDZl`b9V>$WWr-&OH
z&)=0+oHyxv_>Kr}0gbat6C$@R%M6*o{@5j4|7OB0>*KpGy)QQX_tk=NbJyDZX%-6>
zb_SlE^Z0{@$L`SoqJL!ACI2s<wI%6IXX)YTCnJ=*wm-`5%<lHo`LSwgm(YaprSE^<
z-#e4>S@o=hCe|AhB%gmR@@syvL-_68v+F*d;oHyqc-ogRlP=X;=MNfxEnd#K$8@Sy
zd1&JjIlZ>87h=zP9*L;!DR7lLzx#7$JI|DrC$0(F?7PlXwD{ov1Yh>sm%k`XKDboL
z(J?YR-@i1=m!sKb_3fqaj%?Te|5<Z_`Q<PUCb82GB33Oqd$du*I$Cs+!4|0!pK#0Q
zw2(40izBOD9(<JNO8k{Ccp>}6=loW_kF{Lq)?RydCGmmw#v1u>Z!!CRnc1Q?6)O_{
zd9v(bUZuZ%l4Ga9lo=Tg;WwM2qMMGYf9nllVKFY?b3XZ9hxtN>MeK|@fqC`?oDQ|u
z8?{7q7~SSDpZvry&Gfy=l~^O@;^m(w$2vs3<dSquRN8fXRn7azw&t&9ET&c0TOXcQ
zQF+oCvF_vK;yL>pBYyTxuUh`{j?Dk5UpwMkygxrvI(BQ(^v1lylbKDv?&E!<lh0#x
zM$mHJDQEjgH*dxbuMfQ0b^pcXTeZvQw3-Ne?b@ubbXq_;NRvHM`FU~OhaAR@#~Es$
zXSyo<<M;fwb(u=)f;F6*Y}4gS-_LaRvAuqT#XL^zxLlyWK-;=*sm_ar&F%;NZdx_x
z6zuuP_EOC2oR`vk$DMzRKYCnSzHV_`-_u=FWFL2hu1wA2z9y;ndo@GwfAie%sjkUY
z9!tWun<(=tTg_VVf8wSOdwSV}x#A@oW7uD2sXWxLn(=6v3q#{hEpf;Hg&VTj_KQu)
zk*%-)H`|moFIw?^oLuAMszt@OJdW-X+`-1QQ0I(j>du^C!+Y<&{%`yD==*A&qPGj5
zuR40y@7;|Dle}5<xBlwV?~x0eRTLLeA}c0$;Op77rFZ^E$H&W`*<|C(vG~zyvt?<n
z%==2OOjvqj;>pf~rhg8dN&L@nPW;A!OLHBT>{~9!``lCSNJp-H+SC<^C510;`rLiL
zX>KB;M8v;8)-z%rR>j@Z<-OzkOFggKj_GU9<A&m%2CtVpYC_h%NNg!(ES@UfaVXca
zT}DAU<>|#<)!b{(WLr~Re%4<4k@Hz?&$}&B<-gZ3<%M<L=vi=C+R1<S+~>O)B(KkU
z<aOEq=Q_FPF}8+}efOU&dn1`#TJODl3;Vf{T7{Fhx9&4Pp~S+)`RstJop<7^!$nHD
zACwXoPYt%6_e#Er|G2zg`lI_{LPBrk8_nuvEVx&jeCJkmY|GejF?N%IPdZ!9Rau>P
ztnaN=dT*CpDh%Ho{aQ9E{Y`&szthxxd`q_!x$!eTQQ78cuTv+T(xZ0&OiKBs!YTW|
z{eQ5gsOHC)nWjq2N!=Y=)}2tOuM4!AQ@ZHp7fS{0jt9TW_1|ad-Q*HuOenNZ&Dmpj
z@`sK^lJ&yFDc973rhk2%BVByiYms(>u43_w4c;y6lP(A_Nr%V<-f;hvdPw~I`t52L
z9DYr%@aQyO>V90+U(CAqK=Xx59FmXDI(8%^d21bi^z2_}JSUf^MEY+Y^Cb2&sm)5&
zhgOJPx!=iN6X+9R@v}WK+}A19v-Q-z?=ngL+AGwzm>!#z_WQElt4TfT2Qvd-{NuBi
zkbkpXzNh5Q71OZQzazK|g+I*YdK7=O_1iRwo3~lR*+c50UdHsSoF<%+a`_JDPo0I4
z*KhJk?7sfW^R1Ia+0z*lA|>|Nd0lu=cIP}-)kCW_jkdQhD63YKiQ68(k?`f!_Koj-
z(%v4@vsu#ntJ*@A>*C&>8&)M>ytHeMeB1h%Df*9X;_I3GJN|^<PZ3;`CLO(9Thw57
zXV44POOxBCy1hEw{r@`SrV3|iIf*$*)1B6u%A_8ZIu+O*wS}`R)AW0+l>O^)Ly`2%
zc>;yAtJ(BtUGNm0^+J3~Yg2=9mG_+eg?o(mu-oYVo4EVdf@A0Y9BWP6;8WXU^|Jf_
zLsj0Ky7&Kb^5v)BO|hCJd4pNnVHx}4%O5y3y07F_>ALOrJou+S@^PE5kHv%5{kxth
zgvsa_8b_HuyVd_AMQmQ<i$!y*1oyxAY$^9J@Q#<$|C=j#1m>w6-Rp1n;^dsmQeHu)
z`zj8HsRn(myCa(GrDYu+{kv4QW%`=Eod;$0EvDSqTgAWcRM^+1=T8~FJ+AWjSS<8>
zW~3JT<9STFK}VGS>9ZUb>tKB3Hp_hJr^m92-~WU&w%%>NA%9vixB1l`_c_`X-{tH&
zeCBG3w$w4Lir(7&de!P>-@6(t_dS!F(%1LQ=6Uk3R@K8&TDE7Vl}h^lY?=L_*Zh&y
z>?K;KJyflVlkDHCq&}XtP13;ri-6QoL5AZ$A3r=OGw0~mT`xXGMgF*#Q{<3P9K)Nn
z{c@o}WLm-Q|NI}N^IaH(3RgGX2(Ywi<q<P9%|FI%bje41Zp($1=PD0P-=`l;zjM?4
z9{(@h=<^>JTWhHDwC<kpS#aK>Grdw<6hF3?YVSBz%~jQZ_>psuLGpfkdp#AEwX?M1
zwr#y3o}|^f@=HN(Tg=B7i3NKqYD#Q&ZI(Z+X;AwoJL2la6P77aTk?vEZod_M-juj<
zlagZE(Yn1czK`GbXHSwa5190+tuEtTbj~5ZAgv>BF8<Kk%HkWfet}upnv}m!dUl7W
zB{a8le!X>UQa$@k>qi_t754K|PE1wS(yj{^-NPJpZriJw6AfN8y;G_13%D~uIA>}Q
zPlAW$nbnIGCj{GGNjo80oPH*|p`dGm=ry}b9k-Q&V=miV*{w7^MD(}cnPSO{ZPFeK
z3r>eJ$@+OW3k5F=skjrf#ppPH)~!9~<eFyYE<P*frhH?1eP-(QXc^~?nU?=VWf!@#
z2mYyi^>ml2bmz794u=zg1(qjR)6Pz=*xlGR;nZ}lH(vY?6W7|j*wxdbvyyR*u7_9g
zfl1#N6}3)T_Bgs{cfz{DjW1X-qRMvG&-`?LhRLSO990=f`HN~DlXKkzlNK_Tre|m9
zJiU<b>bc!N;vJuDLyi{Tr1!g{mbvTvyZ(uRHQtVIPiyPClK1;xOIi84|NkqzbVF^+
z#0xLQ65`xuTlX+_6|PD-am3_K%5~#u&s5(>?W>oRD@#mQ*F3RQENbhcE!)>~AKw-A
z@#Z(b{BI_Ci7&GE8_7<z`}=fFP<w61n>Ta)6MRd99_A(`{{F8$TPXWy@JBIEwY)X<
zygG8_-@c0UT-vwyi_mewf;Hx@dXG;APG5TV$da{h*7rZ%$FT0omDXP|f`^x#TAcQ^
zc2RW3v14(|*_HCyoSU?lF1c8wr{5AZg@3Do0?Ro*ae>EKU)netXPmMy);5o4SS4)n
zssF<AciX;a$_52X3rI3ZBplvS#5!w-{H({_FEuqL`o0rwYHs$7_woNCV0Lm{#)3VU
zORejDR@{!Svfptipzg82LotDS^8^xP>`$JrQdoW>N^IrUf=eH##?EAZ$2`;I!Pdk{
z+#jdhX_$Tg;^Ut^XJ`IdzxtI{q8LX&Mt#`X7e{#aaeYqgj{7ThZ%%CS1dFfJg;y=M
zNtpRv&soE-=Fa`}8Hu^c?DBlkMy|f+Cp)cwb!6Xk%ipUXT=@RUeyMEYlDKPAPSo62
zJn<mlTzu>AEAzK|>R&nWCE>$Dar0u8{jyi5Y`SdcB7FCtie%;g{n}HO-&$e)Z>`bN
z(^C(MbCsq{+&a;-h;zZ@;FehjFKP3Xo2k3p>Daxnb*58mi;3mVkMrK%?6wh_FO`4N
zCbKIu^wK8pD(mMi%E`>Ti{tZl9A~|#_kp!warK0j7B$&lUC*v;_xQPF`JKD5IUjDF
z_B<^X;?jGI(QE#8L7fAx2c`H|ha1ex;%og<@Zo!zrET@(1s(VM?Q%MFk1n!b5-riZ
zKEdYj!bjaDYc9<aQ&ZVfuwceH<|pg7_*UrXeF%P^c6I(?snkD{V_WC3evvvc<7i(J
z>!AZv%4%+w|J-b~+hL*h%ckcm`R8sgJtQ)3lF)jtO1}KchW|p=l5I7Lx$`-*HcATy
zoS3Ji((AbBX>-O0-}fuI`+l6du4=zqBQs9Z=qYDH^wyUD2kty=78hH6UzWkx{y=Ka
zRL+DuIx|k6(^k5)?#dEB{Vvu*t<V=$|F?!ldoF)oWM;bX(L9q&<xRV#PdBtB_r6P%
z&F}v4#dLv-0z>l6%TDv&Ke=!uWdDp#4Z)L}+xqTgbJ_ed?J1aTKl}3Rv&&``6{|iK
z5Z<`{6|bu7nxrFw>3{C<{}=ImaR2G;-Jb2ogMD7QF8v-biF?Vn0Nckoxl?Sne0%g*
z;LBU#cfNJ%EI(7sYtFO2lUV7O#;@*j*#D%L#e1)Mn`({X*$XT}wrv+)D7?Jt!S5O`
z>4^8-OYKdog5y6LoUu0a`}uHcs^v?Ej~_BUCOMQEPc6%B7FXXei+>l7)P}1k>MGI_
zc{lQfzNpO(-s@_j`+w)oRK}8(+4Vn@uUu{HV1D><&hM6%OrEymuVUAAw@Ex-u<NsC
zV7dLo$4fm|hp;@!)j8dN;mC5$s=}_ldmTk3{G6-K^Us^#^U$UEMMIhFl?6shHHXdK
z^M&NE`ph4;gY`p>*d*QFF5UP<)8qGTBql}wI;vU!rt?P0wwuTAP7&Q8E0DSV2*<^m
znD4)TYPrs+T(USJCE!eX;V<qDUwxZX@_cwrKX?AV^+nt5*0D!#Uhe3=`s|j`^e!=Z
zlfuP$)4X~2)Z5>gv9oT;p>@e6EgW6N^TiWpX;`I~EB*F8e_^ip$D`A;`{&A}Of}N`
zlefw|bm}KY39qQalK99=39@spylN9U|JNwx=Cwa<fqVQP*=cOp+EJA65dWS<a}QT)
zy2QPTk7taw&R~?{Rg7G@H!3IUdCiO&UwAU&xXbq3&(z<zw`;|tBMLWMjg>g|pNjC>
z*fMED=++LY4B1$I-p?<}OwJWA514LZBq4U8_R6Qo+kTG%KdO9|p0<9)hIxWZt9PxQ
zeblteFvom4w~hQ)Qx1;Pts)_FXIoFm4W7R-?!z4!*T;XnbW|4aSzWg}zO1U-LGi$e
z@_^k6)jvW$#`#p~A5L&&U^IArZ^D)n5ldLEdvYktB$QpXFgq7{QZ)Jh_fr+^R~Qv_
zG#b{(mTWrO+9tZ<SUdafNqj%|FJIyset8{B>1mzf8P!e8j{bcc&(^;~qN{AuoQLu=
z3)3IJd$4JfO;T#rR@DiMPB%|^wN7N&%;GP8(>5+u%qqFM`tDhAlbXx@AN-!BwY={-
zYW%hQ@Jd0AuCq-ti%j^-tQLF|5nnj(LuSM;>qOauTT4ULZbbKAeKuq1hueCBLL1Y#
z4RsEG;aqa#?0KvCj@)$;mw9>q`#J8(Pl-KieX(i^|EHxA994HNm%N#<hbejA%Y?Zt
z{f5)eXdK^g(^$#9U$lP3qC{7|28~6pv^Kmiv024;=Yz_XNrCykj&I8Pbr1Hu+1RNs
z<MQ&7{d`N$jOLD=*-G!lEZ2VYE?e+qzgLU;ksyuz^1Wg6D>9v@eO}~q;+UVl^4{ct
z_EeA7n}xI1|4en88Lkp8{+DsLn5{(E$vvmm*fC|5>M|P4Ebz^a2sxy+H91$*>Ez<v
za~|vF1zNpzoARZd<*L-Qea{ZdaC7PJ|NDY(&g_)-{EN?K9Zl>BaSj!A{xA9b-nZ&T
zqc?V!-tuR~DSXcIYuNeP!Rb9mvFz<B=U62xw!AEVz`BC%)YRG!MHgQG-QcAYU|s(H
zXJ|uHvC{bkA^vMB+U(YcHqAfz?9NQb*OqBFmdpQ>J9xF*u6oP%!a&c6W4cAJ1Y<sb
znA6nT@ZbxRjIz)2Y8DNHe?BMb1MQZaKK{rgm+y4t4K)sRUVHi9OZ_7`ce_{KC|R>E
z<gLiB(00Ze^A^J;9OsVjKC-wt_(Qbs#ff4s?NqYo%=pK0^K$g5;*(lw{_*{v(qf!v
zEO?L>c1S+(R*Tjbfs0jh*DmZh`}9<G@*|a5FN8m)$=|bCJz-wPgP3n@o1Rbp*16S1
zH>|P0x$MmGUvqsQ7(AUCD8K!IhSM_Rh5z&RUi3cx`ge9%jD<RnUbXf)VZmjOw}@Eg
zT>bH{ZHI$R{o(t1;lC$l=*6zya{2Y86`}EkSNo?gU8v0CUHyZzztfL-@y->iBcC~#
zoSbmxS;H=?KPMzZgEN0m-9BNi`{d}O8;;!YzrxY%*%EIsflcg9evoS5!<Mr~vjb&c
zTx59v?({{yUA(vZ67}~fG&daHw4=d!Ij{4vZ)R=%!OtT@+nHa6J@$B7^j*Fp=hc!M
z;;RDAPT{TCmBBo1`@)O>pAx4fJ1#f#sB;Q1t$1UUtbFxrAVY0Ibll>PDI&4)xyPTF
z&cBrQ;UxEY29<XkG<S+-Ze=M|of~{(QN;g+#|u(BU##Z|J0J0|=|P%SZtlB)@Ktt4
zW(8ifa@aLf@4)@JMl+t9KZ^IYwJUP&sdd(L75wG&?Yh?SZ@ybEE}xy})E>U;sgmDL
zKi;6lujC7QH=e4v64Ecz<r=JOTk>FqTU+4_$0F5EA<jU@CyE{teskidd5c{vKgfKz
zf2rU3UdIEoGuF4=+s%0UF1wUc<;~-MQ}6Y9yis&{nHIa8y~OT;weIU9>cK|^C&o@l
zV%(m0UG;bIZ-Mg;omyLiwF^QoU)P$Fbs$Vgxi52hLg(#`H}@`S?6!Ns%qHcV7aJG*
z?1$LpN7Js&wsJUqM*3W0!@2cB^Bb%V`pGbD%6Pl;*41Mf{r`W9+PSh_Nm8Ej(K7B!
z_u<)%-(Efo^>1>}JNa4g{)NeLON||;O<-Gk{JZU`S#!_7XgU1+!T0ply;F>O#eL6k
zf9<_GCGllqP<gqzg{IlvK=DZ{e*Lx;pQ3F1=ie*#D4D4bGNc{)oo`MpSbg)}o}26M
z2ue7+*vCk9Z#S|kwryM^UUS)8&7<E`tW?x-UB6|xfBv!~D!V>RH7Z-T&ok=J+bH2z
z-O8yleHBbKMaSN&iJTIfHfR3Puil>n?HAZs3#Oek-(wMIdthOj>fGfPHOBK7iZ77-
z{+{in{P&cDuh(&=JZ+6*k9xSO(brMgrXcB5lI6s@mkkAfw)-vew-ma#ZNmI+p|y`>
zpNg8SzRl3qF1_~VF)?Fq>A%+(7@BErX`IfqWbZfKr+d;K+Lf(cdT!-|bz;kpt5mwa
zF^^xJ)eybp-y*$j%)ig|_hju${};$Sua8f7wL1sD%S7|EGq%l4*131|zdforw%l9r
z7rSZTT`AR93R9})2Xq`fwA3*%^HgEoiDP@-o~&9C!|m*JVEuFH-+fYcp<04PoN))$
zjj}TIkIF{5cRZN#QF)qRkMq@vy8TX@95(ot2HR}NdpeWVyx)+sOVn;p;iqTGFZ8cT
zE!?4=Xi;9bAk{SI<^JBP<f{+<O*(s6beZVckE}<8(x-Jf_c=8jbQ1lPdv@N(DLcw1
zn!nl|xuD46$41*pO>a$<e~F71vRs%hw(k7?xC^=LAuk_RKd-pBYtx<ijoZXdcXQmW
znz*4h*3EdX@>)Jy+X%5|x~6SHwqgG3csm{~6Wz6USKzme&+9`HCO=<gdhgLL&n-WN
zON#$7W*uB|&T!`bB~SOTzjbP7-IFj!_>}24^||MbQXhy!%xo*su83UU=ujB-?TNr%
z&hlpIZML(55<d%CwS)=mJbrkwE$gD4Q{9<Amay?(Js$gt?SpZ;Q*iUShns>!&#ESb
z7bUVg-;3#(WqM=Awlf*ww?izxD<&R2Q_I?6V=$@m!KMF;JWOU@?S877IIDX5Lw)6~
zb7l#get+WHz5wOBA{zxtPt0jf)$8xP;GMG|Ot!W-dFlq+jEyoiEc-61=f8gV<ITk4
zw#0MKTC#kEEDc@kzCJZRa#yo4vbs`q{-*$eC6(Q~YTq7dT;j=hfB&B^E8cv|$@?<(
z#1#jNS%sa6|87ls@NMB`-_~odnZFCBt88P53g>^t|L*Pwi~i=Wb@TXIrE}-lo%c(a
zlgH?Mx|5NW%~og6RgY5B%d<bvnWe$#XtJF3t<*#3-pt@5k#);??IW5St9L3ios7N9
z!{B;eK>ymWk2~AuKiROSE$H{*l9%(9^2OG*I==0(|F&+s(!__W>tdR}w711<%QO(u
zFg0~bZfg;_8amC*K;P-Br^&Yyb2&HsaIsPpxwv1R?T*0v_=+;7qA5G%ZPs$`V0hiI
z=HUYG^bm>tOI15;*2{e}3^Ts2q5E0kkIf(9E**>9(Aq29U##PI{Q5n2OL2$%in1J@
znEPo-CT^41tu@YEx}f*CzF}62bCS^C+1&f$y|3R*3|-=IZ_S&{0sM!8Z@;Xq@G|bR
ze`TY_)|Qi47`<L($rk<#lG+t_!>zQ1Q=30rx47i5TB5+}T6{>X_O!W0z#>yCoziO2
z7PmEbP4|@fKYR0Q!4!Ur)WDaG!hNYz`nZfr7b>jUH^0+U`Qek}xix3KBsUndzYm(v
z^yU4Njg5u(^!IO(U(?^1%~~|U?eKE$o-<Lq{^{TK?_6_w_tFD#HM17v8f3FA49IRX
zyMO;@-lhI`T6?T?w{|dpWtYD<(|7u(FXzjyS_J)k<l+7$Witnl$l2|Jeo;<Wvi)V1
z8Z@6=NuCiDbzIijzjO2Fdu9hNJj%7S;0>M3BY4+Tt--PPWW>Kz{SOTyo%bd)9I1TG
zBP#Tuq27Dhx*W}x38FcjXC7L_+W-2qSNbjcy>;wL1yx)nyBKxsmR3nzZja+AeDeHS
zn!~AC3g_B3Rp)wE|D3B`yd_a&%ioL1%Nsftoc!99_WJez+us~&g03&>?bypCwXTEV
z<!qVQy4!^UlTG3>12@X+uDRJ~HX*BZ`K_tkvz!vEFL(23d<vh#btqcSM$2&4d%1gN
zx%ru1OFwUBiSmtRO}aGuL|0+R>b24`=i=W<TLd%i*mhO)*2Cn(BAf?zUt-B~<9Csr
zyR_7);wt0%guRBd^7cz_JE`}A@$eG$#D$s3M^8<^bne*BFOidu?-fqxeIq&bJV!2T
ziQuVQ5#G6*S+;C*wfA?LZ1<D>>}G+EZ8kzb&U#F9abe@_otU!UE}gUO{dq6_umqFu
zU!UIB%I-e9RNlHlZ}qg^YmZgLwzMsL^KPPoDcjl8udW?T`R#Ig4R5$zXixgw2j|sK
zbVT?zdo!Ne!d@}!f3#Bg+|##2yWSZcRpa4$a7!aRHk7gGQOui9u{UQn%{r{$BdGdS
z-_(!kbjZOKNBq|x`tj(_5&Os}$&Ux0ay?$Vi7)Q7Pvx{!(-#Y>Oe7`-sg)heSARKU
zqG)KA%i%ue6*eLD4X3{`@ov$b`1$M7M;eA33{Pn=bcV@aU%hVL<4LT!rhg)yFwEN@
z();D|!q=yEUcLS{NRV0Rz3Hvr#@_;8YtMR=aQw{mx93}399o`nKVNY3SklYq@3LoR
zUwOOM^N)N)a=KH^sh7HY*;c!9KIfjfa);)I?Xzz$cqw*rmTSNyfvZ<nTwT7)pyB3z
zxetuHk8(vNXI$qnPiw!r$#ea*vU5xd&9#xg3>;t0&N`C!dPaMF#Y}T4jaeC&SH9+2
za=xeSUeffqJEp~gdX}0wO&lBiB=oJ`Hg2=MzVUeeQnUK|yGx&JW_0VmyNiDlZ?&Gq
z(`mkq`wkU}-}tz09@~xe%&Be+{Au-uzYaP)yLn}rw4U(xKkPxN)1FtDpI;TUE9z==
zGTS~T!9wNiU>iC4qxlLAzJd+<7JOHx+Lv^s310EpdhP<-qi-T@awjX@l%{h=-ROSX
zf0}dce$gEcu04-crdgf{dnTc@DDK}a)w{oLbd*oXeYbh?ycK=_mc6zqo7rP)_~p$!
z>u!ey)1Mp(``g92Eik{)H+ReO)q6vGs|z@~F0K2MV=BDOhP^Q+*kX&$l>QwVCF>#*
zpLJ{!U<hR?5RKik=V5}5%ejv0nhD$|j;=2$6MMEnMdaARb<Ya!du^H7m-8*we$m`#
z)^`m>O!k$#)y&WOAkfn()bXcB)rsA0-x*~g-nE9yBKfS}^<3G%uI`-6KZE3bIrTDP
zd3&D8DyrZ7$gx0BbmbhwnXB1CPifpWu94nQu^@gk&)qFX3vcf}A6a25@NZxJsmC36
z_PPqs`DU?g`>L%Aoc=6XTdtcae0k3njpnMR#JLRhhL?ROi#}<S+UT<Vlh!=T>Xww-
z_MSH<3obidJay3y*PQBqTwBknPe?m^c>2_wHUHye^`|gN2waP`e3NVXI>hLBPfoet
zx@)`S*Ppv|!g|)%`sx>lws#xsvzgYgqR>v>Z2oD<2fe8a_i)YiU&`cX-4>i<^hHi*
zJ7-jJLtfdv^B*G$5*7$A7q<BBQL4J9;M#=criJ_Y9=?(F3yP4c_cE93_i1?C%x^fO
zEKTRgp^T2!?~fi$on3YNbAQcY@w4{>zA%W*_SJo}_hEd^f#t20Ka*u2PL>RxSWv|*
zY56(Cc%{haXWB(I`+n!&kv|{3GCZu@|J6%ftuqycvp#88FZsbQy>!YUF}wYa*$-o`
zojG{s!TQ!IohEl5KJ!~W`RTOu`^w!#YmdjAtd#ua<9NqsbJg+{#+nCbL{wJU7n=C2
z>6+&J@RXh%?<dz~C-42*@Vic7SAx+5qmzQA2@e0(ar{|%nO&v4)B419mGHP}S_SK;
z8F_gf)l-_eOW^19`|J&iWF4*qJ&M=v-sHboN3WtLtL^gor#@=-@2{M3mALu)ufyR`
zu7l?K@+sHYy<ZzIel@?$_LJ_GMI}L5UQcF)xG!JJ{D0<E5hcCe6OIRJ&wl+<@L`_*
zDU&r8GyZK)-@Qy*Sn0muR>xqIG?_@(!*1GpMA&SUBxP<{tNnk*SaK}OIrUw6;Jn;6
z72eMZ-cQ4mSN<tCwg1Y|7~b&iedgz*?CuYyBtF@drX!*LKXt=oeaZf9Y46YNc+uJA
zdQe60{G@dSza9k4thQ3$(>>!5^I->rn^Tyqoe#=hX*sO9Oz?G5#-bhf=S}_KBeC=2
zy%*vyfBdNn;m_$bU;6oZwBG7E#a&04%vRV*$$9#ny2~*kitS&=^3S_#B{b&Wdm?dg
z+n4<znN#%^_q={vAO5L{mC5r%)!jMk7BbhZdiC3D>fx={rW-%$dOW#(ey(H7y?I~x
z8q>rDym(h_KDBe<jHy%P0?Xb8No;#npk<Pn|IgWPhk2IgQmI9c$`cJ&6vW3>uwDAH
z&d~jKO||IOSy?)(-ny=In5*8O|CMoO!%m~G>@R~$b{x@eeV-qGboUv(h}c`FFW1L0
zE3Uh1ml#%KJl8{{jAep`Uhk6a2XC${pEbGY*8OW$%zpd++ON79Us!D%Dm&xQBCe%z
zxssKurg_aPRCkp1$uS72vJU8dxti&phF-Z>b}G+*=Ia+WaZXwpE>X91vTxhrkQ8t6
z4D$o?{xPaeUYfIF{gnN09A;0{IW%M2yHKb64Y5wPKK@#DbqD84EAaL*7A@qJ(^(L-
zwE08I<oCZ<ZnaFT&v|9A^~*t}3InmGTY}g22fiq(%Uts9x*?0i^CLG8ve>a~^gX>e
zY1X7)nJ;v1NQd3<^{(pO^Zn<v72?NTe0Oc?s1KJk)JQj|km`N5s&JESZj5b(gsfIG
z@8|5p@vEK8ip1TN*LJ&I&|0=SP156V?usij9{EhXSQha>aHd$dg2)_?mmVx~%exDh
z&B|n4bNW((o41Pv8!Yp;Qks)4u6kW0pdd6RXU!j@+m=hpivvtzxqc`WsV&zx_I5w*
zm>`;UVhWem;{)>34_@%MpXpy&9UA!4x$JA_(R3#-w*+4n$2%=v>}%isD{@>W)~lO6
z^YM9>X?ow;Uh=tb|J{-$EY~@$`_*^fmMM<K9E`;$IJ=iTRbp>+ye0l>^+jgM1FWaF
z>X}w=lQfyRWkLRBgRdL{<q{`PD7rpLntJ=xHMvUTYID;!_Ze?op74zMqp{+Ig41v9
zGc$gkv3<0`%4^C@i~IvN(zD(kTP~Ye`0+|hi$_o3rSsE8J#rJTm`Q|P&t=ZC^S%?a
z;F$K)D9I)FA1C>TNLFv$A#v=AyM-Z-qMhr`7uuTj7qtE7&2Mm67XL@HVnbH#iRp^-
zKd#r$%$aj}l1A4y=iA$Ip=dRPaku>b_s^UwPdU4#opp)I$XXwx{<vY|pR0=BM3u4?
z>Uj_5IB=DT&gKvL(sdx_<)kf-w`LnQ?%7?v^Ny{9G5d1uxnIma@tEawtPO0qlH<>@
zEzn$flbN*1)`u(+->cU<$II54Y!A?js$T86RkG~WtM7Ld3fJFOH~N`*(1m5brK58=
z=dO#HbC+I@^S{S)>ETm7kHr1$tJzOpVo2F(Ah>4Qf8hWjrP#NDHYWppjD072nBJ%;
z(&X&jy6mI%h0B`*IsSL&TfSph5Re}`UuMZe-|mWz4J()@=5Lt&JMV7Up3{1}D$2{h
zeZS!<7;YHEcHPG9S-AhrwoeOZ*=)>J`7ObG;lBKF1Ll>##5abn`n^kB{bBvGNa^=i
zI?qfC62IiM{8`&SWA*<PmR~NlURQdttD;dY-GB0(i7``cEm}6Tl<m?y7g5};*>m7h
z(((3l$2zR`bBjqHVTfEQvQVo%ro@Er_0O`y2NI|CUCf<+WhJkQo@SZ9Mz3vB$QOzI
zK_WbxA6J~dtNZZY<#)YxGDZ2OqVsK~?oJBI<L%+ReCX{L>0F_bLpeLRRJqe@J|=%z
zdTw=7I(zVs?0@fUw#(N!eVY@sD{s1832)(~Ta(_YR3BMoeNE&+;;);n0!ydHuvN5A
z*}SgjnPJnlv?G^YIygn&ObWl`+QK$FY%!;=f`dh~Xo73i6J4jRAwT_t|8og^%IZI0
z-uPbePx#gSbNj`<@BW*lA<D;}k!8N}`tIw6?v?L%8N2&Vu+lm)A)=#emFbgf!a}X-
zXT6VqaGz!(chTi`^%@zuXZ=x;GuKqUkpDV)&ckWZemsnKm^QOqnH|!Yy_zfghW`V_
zWlwBZ>^UIDpY#97%sDe1g&HnyzrRR4<In@I_jTO7)9i2Y-e#0is@Zkpwc5+|^CMQ5
zdpa}y&wTjj&W2^REQN*wDsf^O{3Zf{>po3+md`xn-pvJ}vo;2b^0^ombx9n#VU@Z`
zYDsk8O||41Qy1M7c(&skw{hjI%NEY+E*hrVnMI$ci~PFXQ|vDjxbXJd?8T`+ocz*c
zGrQO2i5!z<_j!BQ+?<=aC#<^Zw8W?Aj>zL?|6=*P7H$_gessc3Kb|kT2GNP4oW~`$
z>|fiq>x6@!oy^unOncwVe;X4#@m677=j`vw>Q?XP9h6a;IbFE4;QIN(rK$hhF3Q{H
z3$pxV{<b;E%r4^;OLoW#-e2>4Qa}EyJ2YX=u_po<Zx*Y)VQ#to^3r>ego}y?TPwc)
zu9e!CW+*cG$JS}LYRz0D+^#w7QP?l*ws~i&P-^IP<M;0VPnVp2&B4o^$<bTznJM|B
zVb;Uvm+ib4a$i{Mowm{V<_=Zn<9;Tu+$T4?JoeBs{c}?C>A8N*Icmo5MCC<{;~sQn
zfBM?FqpI3i-n1h6&A}!niT3@s!*|{|*WoOy{^PX4ym-Bf`A+wOmO56rabNadyzDn;
zX>C|})@3#M$V)Zv{&F&8*~Kk#`?meisUoT7*X#J4R;a(dzF>RX)@5l7I!C7mvR)VZ
z>-tyup5CvLNqI8U9<Sdr!Q1+*k$CX=^s`U)HQk$cAvq%9S+@2P=h*8jY*y6gYczER
zmI~<K-_@hxl)T^B{=xd(#>Go^mEPB7Z>(0`;j@;xSN!Acl-Y@wYnR6VWt075U%O6I
zx-vETNpVKzqHl*Lvd7jwe){@N5A*-B@UTli7w0|hUfAJLq1kww^R%+B!y4hKH=<ue
zAD^G`kKbjP!-5TG=CW7)+rIils*~96+3)#FCWdldwt609wmai>+O`$JcgybioH{Re
z{Kx!g4cVVcb{FH%&Ayef<MLC-@U(!)8;kn`4%t-r?7ehpmHa-B&tBY`Rfo^#e{T3?
zKY7y*XR#M9ldp7b`>J>Hj#b`db=DhF9>pOq0{=6)ujcUyWw@rfYg+&IR<Zdf_!oS*
zw|Ua`4DUp)f-7;pb=C_6pL`HW`oHXG^K9eO*JSnG4dmBIG)X?c`}yX>?0iiz%g}h!
zBEi(af6u-Y#WV`8{*+dqURNmYANc9qUDFxb+85tM350LZ@hk9NCT_piDdWDhWM$N<
zT>0iX@oG6~QoOsY8s@F=|8eJ8NlC?z+R#d->Yx2d2k+e5dUIm4%vA5iX>(t^bx!G9
zy}IXnfY8@C&cKIajjvBGSn*DM!F&t$$^XQECOiGj{KEes{f)&ME6HCmb7N~?oII-?
z;;`jIa8F~cYL9Aom0+k!ai=en=myT8S&Uom*UL^Y?@?SJc5b(ccF*Ou)7KqTx6gdd
zHs2y5q2S}$9eS$GXO6G_l=1ReeB;bB5%&T-Lq0Mqx|*j4zwT&cxYm-SvpIBG=)oW7
z4w_D$xnsX<<q9|H3l*{!A5-U<&0eK=IcevQfMr>$%{w<NY+U;>XV)=xeb2WViCjeu
zyJa5FPT1kWVzW7Xk8huleYV+@UN=LT>cp6(zxE#d@{DbB=1iye|ErD!P4j;3{5AjO
zx*sK*6VEVzsV$Oz_5R)YAMQIVFaB}VefH{K^TD*_=<MP@pG$t!w7s~L))lxSF||&?
z%_sbR_bp?sBO23o?z!_ztKr?liH@5p|CzMD-Ss2%=3OSed(#=h{yzH^KEcklaHCqd
z)6dfMtvgH~zG~_V3KOXmm*!?y;oVa4u_L-(sO;cXANzAm8MmFqn95!ooi5qb+m$0(
z!JDhqH|@RF_68BoUZtJg-6oY2gRIMEoPWzyoyfoV@3O`oS&!5{mo54>D?e;mw(|BN
z|I3+ma@<i43;Ax9G$r*d{AZ`wx#(6_x9Ni$dX>ciGV>KO_iuVJce*oUrOZXkwdd!T
zytNN6Fjzjh_D;FxJW1E1M$0Fu&1~0MUKT2qEqmn4Wn1e@HkW^we>-KW*?0bugV~-_
zoe9(C>z<P@db8$yOhd8!f{&}^w=Z4Zcf3f}ZlVq2`?($bJ6AoLDUfhy`BxK8!}D6c
z3+~6*r2OvL*LA$g^>R4t#(VczeDkHZ%m4Z_v1o_ZtE(N#jZ&E`oc||Ve|WxGGRx(S
zXtMc<qN{w)UpY<{a@mWD%)VA?vNe5w!H1Q*nxEvq_V?^sdCxL$!accO;VE$+Iu52R
z%09vu^+LTWwno|Y|8I?U(LHZCPMn!lc=DJdi?@hH<oxY?TdqD|J5zMZ@@HlHSE%Mq
zy}P;Y?(V#d8_gZd?Z184@$haN<3^T#hxgaBT{k+uX5&?DujD_|S3dbuLBqz&YmPme
z$}qeCfimN++C>-I)3V;q(yvVT!l-fY@0VSf;cF(I`8+W=b*uJ*^b65$`@i=clJxX>
zr!QxHegB8Mj^cR&MLRFOa9ry3N-EQ}XR3HtU!?n|d#xGMd9Reri#bsJY^Q|!xvQct
zS(hbD<e8Arb5d@F?Ru?8ezEaW!+E3Kp159L#dqew)NHl1*~gf-$41-C-MB}_xZE(7
zDd|t{p2$B>`;M5MkIp{kcJ0yXB7O@EJFd-%7LUW0oZzv3u<vPX+Pd(oTFUqJ?aoRS
zKC?NJ%`3O{vg7AX;{HuNmi7-9Jl3lhQea=_)_S;#!{dPK$3KC52cF4XpKvPILce$O
z&si@so@M$idq4H#dItR|B}I21KAL>V?XdA1j*!b-Pi6|#_E_Bv`MLk&p2YKW{;6}z
z?`q98veA9O@%W5sXUUHb68k<Zmx{Tcb^8J1I*A;4^M`d0+$WrtaV=9z-rm7I@35(N
zw)urM@6|Y!x^+Er%~$v&@d{mhbWQI=f=1}`ui`zNhc|w_zTrS!m}r#2`qx#gbB>!W
zU%IychNk8sM*CKqgHHmDdPDBrU{jtdvt2?fchXj?=<83V|M=foySw<Mz>iZ>u3`G`
zy}r~Lv-kfJmpD-#^xUo}O5pAeUil}I8gaH8Q#VHS&e1!*;!(eu>#V3*e<ohA709_e
zYtu{L-&_3S3u3R|pYoTd^@#Mv4Rd|BC-ZyxHLg{$nzMO<=?k}f_CK1ctP5;jNWHSS
z@a3ED;rxo|_ls)37pf=jFEKWmQX98y(N!Hy-G5Jye&N2}@TKI_mnoljyuNthO^I*9
z+l~AY=i}ap>br|;yG7s9XEUw;_1^K|iY>-}J7P53c~aNt{WP`PDYwpFrbn~hN!Mtz
z<iVRs2Ge#l3onbg+@#%^v+#Pw;+{I?N})@~G{WcZb8O-;2@_vd`co;`sdvB14PBY{
zJry?hve=lrgDO)E{+>O0VDEA7jh_r!WUhWFbK{%7J^ST`pWD4WL^J;hJ_+#@ytd%V
zCdETx?l&bZDj!^G{*$uniRAg2Okv-X^Vg`Z-25WYu1mUby8G!ulM|cz%~~t>zga1>
z#Prq9i2Sa}dv-)z$}!Zt@cNB`bVS|)HizSr_}=dN=<e_R|KK5uqI0XY&p&t?ojt4J
z?CmAC0h50I`qMefhxd}k45s+npXF27&doZvXK5XunPhjGpd!~+DbACYIsA{eGfhm|
z=Wo_Kaoxfj3NgXk&K+dB`;h;-*HbpWskwV<Qfw?Q{+e1fgYD_1*P>R34z86xKOru{
zYUPE)swJ)McRmY!{=ZfD*omw&1=9-o4a6sZ+}gwIFL<>(hJTxQS&W40H@Vx5uixK%
zJ@@C*)^*=JYbO2C*brki>*XAmx`^Lt9LvLcyh<EO?<y|8dF#970dtlq-3__d3xnne
z9%*{axNlmiiM;HMM<H&}tcPSA*Uv4sWxOh|?F)<Z<&WLk%Ei(S34Mb9uGAb`ZE|KS
zvu$=oYlHWvy7CFLP81~i{#+-#LW8H{<-Y>{7SrJS9v;l{4z(+9C4{a^doDPogX7E>
zDZW$x8jeh}eVrj$DL7T`gJ#@>w<g~kwBP<$m3dlsXkpU2C9{&gEMsbBeZBi#<r$C0
zm&qJE9ahJtFKP1mc*g9aMw3g~48MC9Pju*|UFDwm!j!*j$A1=^zE7*oE=PED?Xr8c
z@k!^#wO{sF`L42VUHY#f;ibu?302Z7RnqS)xGEezzn-nyB<abFce7&3%+H7O^oOr{
z_U%z;^u`Uztc!UVZwdsc?VFq%7-exYu#<uJWz*6|-^$t-7uULMUz>icU7+=e%W9Rc
zEpslv4qK70xyHwMYn0s1S7#IcG`;(C>G_qziQ5kNMs1s?W%}oUK=~y`_MVw*G_&vV
ze(+d!^54rZyQcm*c`@E#1$UI-vC!5(uD<KSuAXChH~-1Q=vQG$ndeH360SFE&**V`
z^=)ZavETRb{+KD%c5m%HD^5;0<y`jX$ba*6opo!o1sVev)+GqqvOg9JzIcUQvMZ}=
z<|C!Q%>UaYK3dI~m;deD;rYulUq@TszWx9G(mng8Ef$`;L7{A8?6gfYkA<e+jacpb
zeD}o2)jTiw4j;5TS-Vlm+~|iuZpUlgl}#24X2==ry>t6<`8>|P_L~X&Zz{>Cf4KcE
zb6ygwooUvZ?CS@8Uu*d8NtBM8_GhLQ$Ck@hAq?~W{r1ht5jd8c{6jmTW_49r-Se&f
z+)vl28b8Wu^S0;UPdWDdR*Xh9@2tws`N^l<LTZ0qv%LL7QLuBr+xstkr%ibd6|R$e
zrco6BvAf}U+}ak7&>sxF+DD?cUA}kx)lA2E6<q5q7np39dJ!fmD*Zj~xqHK>-6CtG
zOmdcP?kf7TILa#T_?oT94)8LuIB-p^mfh<eqjTZ<nuMCg&tDnsG|XDc;s4QK_M9ol
zQ^oxX)eAE&{@pU=%E4u6CaUF<3W|<4sZo<Qr`*)ObNJ(S1^pkgCIXr5yHC_T*0^+J
z*6LiQc(GP*o{bkm{^kGYeHyjBX|24*zi-<X-)xF^w-pIZQGa=At+MO0JeFOTh3+hy
z;C%Pfwh+nr2M*qhx|*BTrSkXNj-^{F{1l$-zF^w%cY|fC-9p_G<37E;_g=P4@!xuX
z<t+#EutQG;1*i7!oOMri<C0VN;@W)Qny}W~KE8X)?YKoe6PuVyrtWjS#$6R~O{K$i
z+Q|)PPp-XvxTo>Sk}JhY%V$^FN$nHeAof0LQ~Tw*{gzuFKjpjjbV`10PvMWg*HsA@
z8JASP7q6blkh1&T$zxR+{8x|q3FcSZzE~w8qj<xbl~=a;f{(Go?5e21U8&i-^8Thg
zog=s7`CI`8hRB`;k<0JSTi?_7IYnE(y84g&&6usS9s3)ef8<Nh>ha6sc<9d49Q-cf
z)7OLhZoOCMch)jEaWvghZ?D!FBlYc3-|e4l>6*C1tK$As&ep8_Xw8`)ZTpVD)R?GI
z_+$NbjaFODvUyjuCY<D7`0UZ?mnunph4)l=KHORUbOr0<oGaA}S&a&M<@`e4JW>3r
z;_!OD%GY++t-Sg#-t>2E;S*Q?mRdF4(f-B1Q@^cmE<ermZrRGKs$0J9yqsOwboScL
zt@nAZIsDIdY+s>bJbTF=vtOH{=gm0y++`;B?Q5r%?jJq!;O)BZ3&(5Bns++bELy<J
zoM7TVCokwZ2WxVLOS$9mX`YGwvFG@+jPhcl|CK&z&pp#t$#UbOl=_y`N`ZUU*^X*b
zm7eNzw%5%yP`RGN@>({hF1F16PWoq=w}+*wSKB7XrtpYVn?y}L)$@I=jE~!&l_kdl
zmzNnZUQ*KAU+@1wEzf_?zmFe0-cR4?(9dyo!O`_Ce$(Dg2#dFxYI4<Y_DipW>2q`#
zE*(2I^?D)Gs{YO`+n+t+sJK_I^tZ62sA}uac~aW_p_NK}`!Y(7GxF~W4`&zqV}Ic<
z$K5*Cdv65S99|d_DY#H`RoR(8tEM^}u1vW5)MBI6w;%b9E3<XECoi$Ts{i@L#K*}Q
zKeG$uHutBz`rCVZ=MtGZE%i+HX9>agy(FUd@$SB1buavG7*o@o)%PzxIbxZz+GAhI
zN|n1w6@?6Qwj7#x_za)BR=e7-Uy)WOd=-<5GZOy=I|MP+3SBQt3i4h3&idE%e^Kcx
z?zBbcAA5B-B<pbI<yor?U;1Z+&Twp7+aQ;z?RK}^ysBW?&xnm-^}6yLnogg$Bs^YW
zD6n5uMEc33c_Q0ZxE#5=Wl5kGe-WE|<_$CVgwsy4!tT42;*Le1`t6-B7V-FUaA(OO
zedWdnZT5X{=ABNs&n?cG$#=snIRE+GBimd}c1(Re{bkRD`^lfA*w=dSeh-X|c^A%Z
z+Y%-hx~k|~DZk$aCLQhzcE2Xy%Tk<bw!zI(|LyY`N!u3IoO#BXowu4rpyiFbbLOI1
zrL8tBEONQ)Z4LxkznH(#r=_N1k+Z+qa^{ZinBRprMLz96mvU!?_?D_8w(tDbw5*vS
zwwU8hcHWX#X1w+4%P#a8O!G`Sc+gQjv8F`m>~WXounX5E#fne8TIlx7>u0RJ-O9Tk
zXK=1v@_f(C?=^GRav$o@`Q^UeqS!m0^Vi9^838{hTHW(rP`0zRxoq0nKQS|!yPYc4
z+qh;`+ey2dN(a?A@tMVbUV5^4-{MK~KfQ{V&ShlX=doY;nR@U=W%dfyzbm&jtk2Ex
zneLwUeC}V4r%Nq1)cZ9!8nir<>0{iqYP!R5QQaeN&e#|2P8Fz*+Il!VHd{t(`^sfm
z&z%0O%W}<{%oddDf9up@!*^y{k0*q4Cr`Ngcj4{}S3iUXggRPf{hYh-P)Bjkod6rD
z{d+35OwNzWpA*W?^DlTK6N@(ohry;JE?iB^ep!E0V$+NMY`sNa;BB#tK)2piPu0tB
z7hQW`ak^rHn7Fm+q_ger&7bt2Etz?kYfH|jdCQpd)Ydlp?9eWIzkPY1AmeJ?DHHd7
zd?>DVvFPq4aqAtsTw-R6$v@N<cS=~tyY52c&xPK4r+ygtJ`UT><eTZ*tylZae^zvw
z*wdAd4vO6sc9TBM_iEX0OJjWv*T94_<=rVOwH8ba`T5f|i!bBs%L$zCG&PM`r&)F0
zh+W8V;Jm`+>b~^uWgkAA4m8>K{MzOJ^O&?JA6{BMORi<#=XrU0zt?LhoMVmgO5bmt
z>KlDVHY(=&i|&%fTalGYGkuJsy$?9K=iXwqo#6My^Y|Y1KhKqazPLYe^6Z`y^-5*e
z%a|?|mP}#)F#GF^%;lo19l{a}?ceUy=SywipE=Jw-bU?b?j6Au6N2yVUXaHhxc9`A
zd2Ab}Mc>+6u;}^e?mf;;H&5#9@(S)!eIpvo{$EtV=WD}T<H?FIOvCy!-YDH`pLiu>
z(v*_D+jW(Me+cYLTNt=o?YzKsvrS(_?o2zs(u7^*-@zKQ*JtK4Z|A*hYJQ(LchBjx
zzrX*wu^r6X_ef&a52Gd3p#kqF)!r?;SJUY|L2#bre6?=tU$5DoCWOi@_gbpb7aqYr
zlYgFP{1m-k3QC>Jp1izP@mzX!_CL<^m0y&2?z;9YXyfhpFwM(lfz+O*_c=ZsPu~)|
z)ne&oXCYIb&Fv-)Ot-`*tToSS)~Y>WxY;M`dvaysVJ6ubvY%B1XFi$vZS#`JT5=yx
z$e*sAWb>bA%A{Wx<1eT%{=F!=aF2_6dAw?aV#L~*Pq}}?rhJ)FD{(^b_>@`x|6gc#
ztFJsZQ&7g$@NtG$T3n{woz@_A+n*MTMK@^la>VrSebpvB_vrk|4XIO(##(m&vI^f)
zo@7=m^fTho)MTD@fw@sG3W3Rq%e@$6xwh|JoBn(<!`9BeUE9sQY9=aN`q{)|TVRm9
z$s(!zCBp+%`9|yK!YuX6?5qNgJdQpu&SvE>{f~m?)^}YSKOE^(4}R-0ZOVGJ#R=)E
zUoUUp)A_CZobsiK`W!s{-0^2Uls9CY6nZ+v(f6u(#eF3;-=B`3;*YOAaIaVLaHXSt
z$nC~`4cmJ|&AvpgP>*cip>6w7AyCHkn&=(XYxPSlSETqcJg{2z|I6Q#wjOzL!QT#>
zpRc$i8I<oBwZriGg*T5^YQ1>A-iR-)O!Z*UE*HUse=jV8a^|s~-m`hb{`9h&kF@?U
z-oG4l+$nv%+Ozama=AMz9orVKpZv4-X~}k$B?5k-IrDRzSC)u*UJJLJR~sRe{w62a
zv+Y>*&-2`zjM{VG&R$e+dw1u)Row^f{&ct`v@v;y`1S)6)|~&WGHbn(=rVDE|5=OK
zw%^$MA?)4hQ(tVtle}(knkqISUafY;Q<aXQ<EE=4=X~hCs4(Z(gjInjFE0rc&|2s6
z)cDJx(}53_jxNx4D{je@xtxDsO4GgUk|N(Jji=8~Dzfx<ykEblXpx5YHMj7fxPUF@
zN1pLK*}K)Wezwp2UDgw~73`?9k%?b>#Khb5Jd;3?@tHe$Ogle4c^r9=KRlUn)xVu=
z8|=Djx=t__q*rQK-|sy7?CaAjOT>P-ew%ghlk$YV=CG%mZm0w(tvoz=Z@~5!AuIbW
zb#^aOaXR<(n{mq|jqCd^TdvDBdpS+|UZ~KL&6$;6lXU0i22I%XvTSO$>JsD0#b&G%
zxBl*5A;NR8;L~G)`_ErT9y}GcN^>K(=x+Vr3j9T?-x%y!eVn)XOrMb2^?yZK&@ZlD
zxuypDEqQtAEY8htheaLkCEQ-UGWr0I%EqI2wOwVty_9!3ofVjLrao&{)UP-7N^fMB
z)tq}iPioz?_T!(AHJwV`$t`*)tmK>4&r52Oc1IQF{VH?cy*Apo$7f&h%VUY}Pp~Jo
zUiEb?=;dbSS^Vh4hedC<+NAw?QJ)yHWO3+`<xczeeA<xoTmOAc_rnXCX2-89pS*MZ
z?y`=1*%1jIlRmBcBH+KU$$s+l=n8A2o<D2n`yY?lx8tVO%Zb~5d#v60Z1z6cPiI#;
zDoECe$~W2`3VM@&?aES{jcHF=cYWdxFE9VYuCT<RisMsA=LMIwS4H;b39k6G`7iUN
z0C6=3i<>6TvURKUdMD{I@Rk0Zv#Wd&ORl5K^7S$2KHPc0sp21QbJh0jPyYM+jvQHK
zBiHD)Xt|HEME5l(*0{Gp;d?(k=`Inz>7-cu@#dw!TfKQ5f}8)F`1a_|7E%&_7M!|R
zZ(?n1w%wXUCzE+UDp%eK@toWC=9<G~b&1t#YKxM!7VN!0E4D<4rTN{0<C31|UVXl?
zKR#HmNBPOqwv{X@mdvqc*$QvFw>fHEU<k30HR}+*XDA}RtIt?kP+Kvsuzll#9}G&B
z*9EE->z-tOSajP{#M(Yp*<z1bRjK&*Q%|P59Gmm%R7{?ucXlb~tD>5=J9$e2B&*+@
zk=S$o|4~lMd$)Ym*Rb;cat_OVbE;G2$1Z#4w7{L+<^`K$l(yY|cXnf;+4`FwAJ!J^
z+QT-be04$d-ZC$t1)(o$L*E83wvGIM@583D8ykCmWQnnT4ddH1Ytzy%kG5{;vzgG|
zCN<^2YMGT@mchJs4|Y#m@+rS%oA1k*9uv#fsJ`j5g?fr|n3naGo;>lqWV7`PmE-o$
z63(8H(AA5wJGqVP)T6u7F>kMT?h2alkm1JtGxGNJi&oBmJn_W&`f{aCqn$QZua<34
zUUacyPs@fcbHo;}^nA2(PQ=G{RhIT?K|3e+T<Trql%e|e>+CZE-OAZ&A6$Pg+iLYU
z`9Xg$L!0Kp*2OPnw(V6p@AA!^W2xTNx=_CdlX(B0zLF+k|An{Rgir4o=fh=dH`$nW
za-HfIoLP5i+sv8S*1N(dtd$Gb`^fXRd-{atX6bH*t!Ag!zL}zP%2dOng4^oqX^yz2
z*K^s=FL=-LZ`FdlL&@R1e|A6n7Cpc5aa!7ahma|zzik=o-5TxK?>&}J<(OP^l10&~
zEpPo7ndtVM(?wP+0i8{)U6#3G?EiTi0(o9YTsfXEYd^25YC-n*l^R~_#dEd)7hbed
zSQfYPtIgid;<x`V?c31MD3Y;mu~z=UO-svP>E>+Fw6+cT6#4CO!dyA)J8vfR8i*C0
zS~<OM%ZAQOLCL2Tj;=1X530-FpJ$wD`tR^>nU))W*)O~h+P&-2^sj$erCoL2X5U`>
z^Wwk4zoA!;wRbMd-FV!!Y_8yOeQW=q58hM$-mP|g^L@>t1;@^b-1>gO+4_{<Rx6S3
z>POs*3QxMu+TW+Far^e+?~klg&LulslH2p+&?U|6i1k_KUY~Q%91Hm{*ZTG?t{18c
z&WOJ4*bsKqA$RFyLt6{YX9BXb9YWG3%sNmy%kD%~fQL2Htc{zeuKNBZ!TVj8zQm6o
zK5u*5(!A9?^|mWKWH(FYzkRaru#%+YCYAq8DO>)m*PDI%t=EI~Cz@yM<XJTN`H2$4
z%!l6FK4_~{TPKEixRm@~>!uht=j@cbiXYDGKe>aw`rWA?m!5uQ`H+8Z1*=)fZU&z1
zNnw-TJ~%crqDs@DqxH$u6L!CK)|?iV*~Ieg)Wl=@`dl5yGVU~dT_;=lG>bp;{*jXk
z%N`VzH~-dQ6#d3?RkT9$yo$i?ibG-FzBW&OuTWsoX{-G0*0Rva`(-aYd;G22=IFGD
z*@q9rUP}CFQ~KD@M7@K_{e9VqE`@;h3e9=5c^AsgHf+{n{N?U!I+>Meb@Xu`4+GQt
z#dAF>?yW9L60_Eq-6_(yN`+<8(U%+FN!2whY-#6d(KP6NVj5~%x&G&c_l18?y`O$+
zYskJ{t>XW;V!MOq&ph(Fq^@<5tIyG*vSg#PwZ6-C)W2$I5udp=({1HKr)PU!-^yKL
zx4*lLPjb$bV7`E&%#;Ta9N7u^eloV3zO6moTC@0hkLW*zq}*ezab@SVt<JtMX{r`G
zefHI)2^**D#cU~S$SXDX68OvJbibhd>pIusTYs_-8@}JivAOPyaop7pRh%Uvn^s+9
z(~AvOX}fVS@8QWGg<@F~l0U9`R=POLi1!5deis(=3z5SAzq-8qd?V|`p2dGew+7^_
z4p`&*RdfM2Pa~6rg3KYc&C71SwKSjWU>xZrBH?_kR?z6uhDT~!-FFyGeJR~|cg{qf
zw_l$7$|<Q!IECu|ZrGG^@xwjVcf!A3$2~dokwGZpVVr|agm=L1Tt|<{AJTKY-rn2L
zD#Y#5msorLQRsn}KfBhp#-?js?7iML)p5$TJ=uTeiyqLN?IGo=CA<9nhw}j|%-6|H
zUM{pwaLFOVy$OAxwP!T9E)h-Sf1zoz&ayt`?B!g>Rjcyt7xUUM7=5i{j9#-VOXpD8
zt6e2K4?k$v`o3e<yaSthi;WrdzRx|k!F~gG#hR}w_D^G`Jzl%Vr#9?H?epalcQzLu
zEO)qIEW&>5_PPZ!yJmcmTc$2nevS9SpTKp7x*qq#K8mzkiq;%fn%5oQU?Oa5yqtNr
z`?-Uz9nz~!E~(p|=?^d2AD_=@8<ev#Ox`r(_^cIAN){b@lq&OZvQh1n>`kHuEj}0X
zN?vP6u1#paR<J{RwOHoD|H)s1iyVzE{`&u>wAVtSBJfn_3yD{m45e=p_DeL+Oq7n=
z!pe6-_NJ|m!ZFwBf4HZ3W?cQrY_V<8UM;hTJ6eX*oJHpTn|o%qns1<Gx`N2J-wfw<
zer}fER>z^G@s2&#Ic;WenxFYw)tCGXj4LB!&*Uw1)rnC1efCo2SJ{;lT9!YLny+$>
z^|XM^<?HX3DLr{J|K9IC(>7&XT%slPV6}yx^C35vjsOM*iT%mS8)rl>5j@_mU)Qub
zFlpM_;svJyo~U_DKE2Z6m-%_d`wQ>?nOSx<vgp_GSN(U=1DxZw@9YiaEiJQil;%5;
zIcJYT`inD9v^T`QoGG<a#>#+S{b0#fg9YJ7MR({t_S1Ikwg@zQ<dfO^SIJHFf+@q4
zdAD`UC+0+_Rm_y%KGkHY=@f5m=6S!E&x!j=-YXAU<KCeh#a*=WNq>Kn&r<>AgKHw!
zWv*UWz!k>GmYt%qLGi=qWg7%C-kuEAG;jZ9q{y5q-nC%XN`}zD3YKJ#&S1xiuGX7-
zO7^wix@P;~6EmaYtiG)Wf_I5U@};O5tDXJ%+a&F)iPDOGrNe0#&gcDAWz&1Q>}cD!
z{c_qjBH!~dF7JK0ohyS+C}ak!P640ROpfe`JRgMv@;jCr&fO*;Ise!NohS3&>n6>;
zx@_B_%l}?nk@$Li&6Lxc$zR0IXguH0?X>I26aJ3*ArD)QZVjJvt0ZH4llG(Jo@viB
zz2DT?G|avjXi^bgH9w+#@gu#MWjolzG|T=lem-FQ?ra;^bA1JI)%%6-nVnBc>218F
z8Cvm8{gHPVpJdIUXR5ERi<U%ATYsTshjhMERo5T8k89!swNrJ}&gY)~5`Xcd_2eoC
zE1Ua{w}K|FowM)SU7r?%($9(S(zou<*ixbB|E1ueOzp4Bnm1XjSG;ZXn_&_5(s@N$
zy-VB<oqxWLZN0B#X0GGzcyjLi!M7K*!jfnAcdPxFncm;1HYdJaVo8VNJ)r|BN0!(%
z2S2Tzxs*eXt&hil^8VkFLK9{4HuAi`lJM}8;z!qrt{FTGYt*^VIz_~P%w(~jTXnRL
z;h=8jT(O|}uU$@uR*7$%J3nH*YeVc4V=I-VbAHxNuhUjK>U_~f>dE>iI&0sEomKg%
zwwbF<Xy(GHZx6jGa{KYM+3oM0K53q?F2iTMM*cr$yqJ1I;cwYWe*dZWud8<#R7gcE
zKEQBiVzoipyZDTJ?fEO2-sUH#y|0j%9d>_p^7H+VmvgK*+qQ0jP-N3RyF;fhUc3BZ
zJIDDYJ2XSC%0KVj(ku~j#HoCT(v8SC?sK<2%i8B`?(K2-8m>~!%&fD(z2fWFf~yny
z-JDE<ABcUqnKRESG|kZ2&fB6;%i{Ot(+W?7Dn7lRB75iD4sZK>j#CkuGm7Sl#q2(3
z{UUPJMeg1<^;?C~-y9ovYkXp|mO1w0hVWIT+wx1>oR8#IUfq_y%j(X$eJ$4FEFMpv
z&3*Rl))M}Pb+-hfCr0WU{T4}Cwa4mK!6cW{Ve^fCsZHC;9hV!B{Q7U%8u3G+QI+1i
zw^lq@6d4!3HQKi~q~+OD^)-i|iJsk}lyEd^-lgf&e;w11caU2W)mr~W=p}Rg)eQNa
zf2}?;A3AC6?p0iqwo&f!#w%;*1}qZ%=<%dx>KE_r*>nGCwkOXiaxl)%T76Bf^7tn~
z`$v0zUzT<IQg<k@gP|u{AwK-@m&I9AQdR8Fw0`>cXQTN}4Uzn}uP?obEUVydKQKFN
zy85+0VKWT3#Xp#=S(NqX&F1UveE&CXfA~gRf4}Sd113*=cU+xU^vM03U{SJjSdiiV
zja>K3GfVj^c1kR|B0J;${uQe}?es6G&^s^C9QLZ)(AQreSBW91Z3T;=sgdGL_b&(J
z?+SjCf1I{%?`xF>m9r<Y{m?vatW?&L{+U1g^6m)6+bJh|*!Rp$`IgvStKw>R$$wYN
zC7r3cc8V*0Jt|ytd(J7Qjy3W&x_fPO<Ysa#Y1pOd#>(=_UcP<RrS!<PRfi%u($;Lh
zvrSu`-ClY-uYk7M+{BaeyIND{Pmq|l+*NIf;)P0<P0Uld7dM*x{oS-*di`~#Hvil&
z4_ph({Z&t&I5~UOY2DD2Y`0B!Us<S3$zwC>y18mezU}oRvnma*RNc4ub34;@K~N0G
zJBKpisciwBvM;q2Cp+70IPGfiT4U)dXI7T*B`nvgr_St|to@^X_vsa{&+bq%NO_&L
z+m~(Y|2z5X{x8|*E6!E<l0)K=gKqiRh1G{;kC!j0%DR8~r=E>`nD(-p^R8R6&A!(c
zGNZZo>%U8$^Ybm|2EUpUk@D{7mxeC}vaiJ@9_^kOwI!YB^C@@R9TURZ<!i;Z)%s2B
zycW;rSteudzqD^p>iJn`i<DP0HYSNzImJgfwCC4obJWkMdV5sFP2cc%+TV=7RxkTZ
zonp3M_~&a9-(Pk&M$?|V)<cvlGP=X9%xI4VU+wb=_PjTYCGLA!JIDk--z1a3+&pc5
z%C(DAJomQWK6Tk?Qft@EEj}+_3n)wR>^>K^XdUy`6oI1Vw6rs_+}y{f3$(45F;!jI
zxzK06&&`9O`{rLP)}Ey@?b>AX{kFHyKajk=)avx^OB)vjofR~5yE}hZ<%53)L55dO
z?(^_1-*`*xaQ=rN$N6&~7QS5h|6snbx&9NGe-}1$F}SYM{Wv8}%l>%cMXx?@bHRIu
z@;2GTC>Bqh<yWyv@22P#dD)3M0@HW?T{fjZ_Yrq}rpLPPYt8n*3{Bj7<J_E!xBcRx
z4jtJfc=vk;zm)e8Yv1*b7n&=!>^^1@62DF6s9R>|yyG`Ms7PtJFi4zOrF;EIg2;}w
z&($w`F{i!?ZszL@RZ@0Kxpeg2sRcV8O?AJjAHQe5`Bv}k%d;=3)v8a|X#5!Tmh-H}
z=GrOkm7g}}H_Oki?9>Z0jBZezeEzM+X`lO#bbQuIEMxcjQt;8{E8C1q%TN4bQ;6~p
zT6D_xL!j@{0tQ3Rn|As_N%4PvI&g|6{C&UDrc|Ql#&OeStGXEawp^d<_haw!xhq@l
z<e!<i=p1W8wb_GTy{wg&g7e)3(|N42u5XoYVf1OL5skid<nV$p>6%wjRppl*{`9Lp
zb{A1#+pcbIZg<3pb4FXj!M3Fxua<=d9BuB)5^B-8zyF2LluDb<iPjZcTyJMRJF+c!
zyP2HQv7Q}gPDHvq*2-`2Zr3ne6sa)Jbp`kCnEG|QC1UM<{F%k|J8MhnU1`1CAB7HD
zioZVJHJEJhWlBiY)knEZEAB_Wuy6~xwauAT``JeO#shzkryN|n*zl3bwA<yHNAG<T
zvWnWwCHzU1zem&So&S7I2d$6J*&9C1nJ>)ya)QKCj>Q-IjLoE`i~VKenQo_&{&mMY
z_Em+uzWSWq7nX6EahtvR)|NZk&Ai1`GEWTO%N3WE-7J2ca@~K5iiyq2r6zhmZoMvT
z_?i9nb*t||`I@U$N-4W4AEy4Azv$*h!K=GZyi6@}R{F2fd?Rk2)><Kvjk1mowabhH
zzCT>!vR!PY?+xYsd@OJ7TVFq+xAWod^;}ii9PXcv3YNWIa4|$vK4!~e4_&@(SDKt}
zu>LtU%X_i)>#eV>PpzGFUU<bN?$?5?%YPhuQee%f!uGIy$2qRw#?yD{Jw1|l_Nk;~
z?F;8bW$rswr3??47A*0f@pZNB`JjIv)3OA_pGaKy<CQv_9AX%7WQ$eDv&V(!gr6Q^
z>hKaPeLd4~b&d4j$&-3#YgDz)xVeehSA<)kO!-GhgZR0B%ZjGyoR9bvcAp`miRq2y
z+NpmZ{frI%_~yVD6?@_TjLtJVo2wnu-4*6;OL}}jvTa?<2Au$Ff#>yHiaN^o9Auda
zUYVBdpXAuPIcys9ku{}G(q|9<p0n^1*UY=>)hEq9v6hLa@H+=Q_@l5ocvF&KgwR%%
zLtI+FzWJ|z<I317(|<Ht%`o)mXM2X7w>9^zZRG5=?vq+SK{##g-9L&cO=}G^_CAg(
zv%h)1$K~_>JKo~=8h)M*`1$tVO!M`VHv28@|G8ah$@<7Fs}oa&!`E5OXi{C(va}#M
z{i2rKsRwKp98oKOwLFcKy?$xaqyv#Qvsq6k7C+m!bG3y{%;Aa4#P<EZZy$0vT6yzU
zpY_Yzw<S$6yzS1t#q!>L*`fnW)eq#ZWN!MkLV$U}E~Q`7L^fxhk*qeq!IKub@Tf%6
z?Y$2aa=3r};J<MHt2OUZU!jhLy`R%q()bh0EWSUyzHDnteueL^KbbccbY9pVQ#8M<
zY03-TWE;~bCqFqXIv@A>uKo^Lxx`DW8rJ4mZfK7wT#(MZ!tAV1+SbO2{vRTGZf6{=
z(4TiDcfr<sw~QFJ*602{ZWC~G$yWpEIXRNCpNjLovnBkId-`PSTG5gmo(m7>&R{xK
zU$l}V=6B=q?>A2tXBa2-Z<@Pf_Kw%*kA@zd>vZ|nJGsdm1?fwYes&$dyX`6egCe~T
z_uT{!Jv(P6wQoh?YhLx7CdS+9a%?gmcdoJF<PzZd*=ugAH?vjab!x#a-ES#tXHB*2
zar&L<c=30NnrnvtR^N((e~$aS-iO<D9QksiU-M+T;i{PX8UjI|-^yNi+<t<0PNV;v
zsXxSLlnI}xUH3?FQ^E7wR?1~kOYfdmHR@X#ayDI9wKC#F#DbH)D`jU`wM;sie`|$;
zF~`pRL944%Zr}YX-Swv-?Dxh+7u-`is}5Q&V*m91Xuf!J+0-M~>!z8ef3{8WoOIpz
z)Y2)Bln+mky>$6cXup{GGoK^YbE5SM_BTXsm@lXJrDo1im5M`OG&W9gm?5X;;-k0a
zyZb}o>z6evJ^%hV@UHUeiw(Erw><wpMQ`H%gMW{%UDTz2;eMW@d0UoDoWyayM?uTA
z${#Uu-P5}}{eh~7iBXXi_X-RBxJy>|E>CCK)35bQYTKzjvt~s$zn<4K!znUONlfTP
zrBN=w|Nf+iAAhF`x9?=|KeEt&<0fC_6|PSjuT^m-3R%0{>-^lUxNY~}dtcrj;Iq2Q
zv+?tfLKm*xuO?4iz4^a$VA0-Ej}I^W-1P!<Gpo41ztR54bh21DlEJj0rRSm2t-tH8
zzL<G9No%8RZ9vJ(;*V?Bng8pWy)%5xf$&-7I~*QJbO<k=Vm{kI-uI{Lq10-VEnmV4
zQdQilN)LxjJiTciugak<{2xUtuQflp`^fb10g2186@1G4*RPnTPE}vaKJkyFkh`|)
z`Lo_PW@%1QpLES4ZadfaZ*@&q?k?7`OPcv{Tm8-*8^eqwI{x<-a_jqRgyiVF5zTjU
zJ$y!h|Nbl0)16;_xJ+5)8n^NN^0xo$GTLjLr=1J${j}+G*6Fho%FkW@xBIu&kGdI;
zEzLCduq}^Ut!1OLw1>@HCGP!&KZ}pNDU`U9!^SmLGvcN@XPi!%w17b{Q=bewqrmw9
zW4)S7vX<so4RRCaFKn`(*strhMXy_HRk?%i^h4MFh{Y_@D7x&i-}6QN1pS+;j|#*?
zqOTU4`G;j+78dfD^u)NYsq$91@iKY)Hr2=T&TwC0y>A~RYx3Z%YO<*LpUEbHU;RHQ
ztY?%Flb-Zz%7#?K|E@_}Y@Z$AJGA>$m7|i)f_>T>Hwox(Zmx)DT;VnKhtO-OOA7;I
zMK;X~Uf5#1z*X|~i@Bx`mvV9#Jh<B4=ixB(^sJg0e<gN&bvj-a5#9gRUh0p2nxrfz
z*L%BXTY}_WU#)q0IWIor0P}|3D!+GXc&@u#^4ha&y-@8RBSWL6;CE+NOg}2pn{X=s
z*0Oq=mkQPo=9&Ce%c`q8s+4DP?$$Qtf@g2k;(ZsKc(-=jM}sqbpNn+*!rhA|Z`r&m
z&xvoB$#t`bb+^@ePo-Sk*Q(@h#cisUys-6b^Xp4X6%#{t-qu-W89nO{Tg|%jE}NHb
zowswvdt+5S!R7!Di4#xz-hG<*Qc2?4)_K=X#_c<iZ0IihXmWGj1FvGKl_oc*a%5@*
z{m`$xqdEJq!PJ_5&rdzy=DM0(OlB?MdH!XM^!?P+f!ZrWot)~tIm~%_B__GmdT4*z
z!PUU9!$`Z)<bAHqGmhv=<J&W4{&oqU|GBsC{i%{mrG3-xlte`9xSd+a<)CINd2!xO
zL7{@fz3Qy<HQGLJ|4~#Dy{eD(oPdPey4->XH!g16>TBd{w(R{3`7b=Ym+y1WdGFTY
zxZ-_no!(>ZPbuNME7^_gtQ%N%^)<8}IJDtF^0~NNy8~a&x_>V+6wEroJ;~t6#G{>$
z^rJifuNKj3J2huz?&Sjv@w)PfPG|KVRI4V=Z+&@EuRPSWy6sAz#9X!|ZaF={YLU`a
z8fsTgtzJ=`6e{*d^G8dEK@_vsC%sQw-&8i3h}8Rkxfj1z?8d1tU00uG9+k0_HZCcj
z>oDzHVRYwj-BVL$%;S+My%|&Dt|#cg{@kNRPw$7)u^WG#Qdb-2JAH7P^}zSWyXU`c
zV<aYTEy`57ts?yJCEqEpjD=xkJcfF94s!h~*m*zS)1TeWliK^if0ow!Ev4^va`J^Z
zZ>sKCp{7;XB4Q)LvA2HfB`488?$e^DM|Xdk71UhKQXKTf`&qG=^xvXKO9I-j2daHK
z&NPGnz)vQL{txFHz4i<KQC6E8w8*eSvHZcDn$%|J&n*``7u;)3DzCm!%QP!hDK_ZX
zSw_F|n(gN%DgABUxlHht&YbWSB4RR|l0)9LAE@l_+gg87k+(51BI^9~t6Y1guT06B
zK7oC5)5_p)XU@H7OAUF-rd3=yOPzf;&#smZ1$~}U^TQoqwa=?rElrvkGQ;tWQ}a{-
zt&eUCe+Flo+;b@FO>>gIc_@S<aQBjVKkxIa9!$T^5GgM%ApZ2_L;i~|N^L%doV+rv
z@xhWPkG{Q&*k>$!Imd_X_rX_b*IKi77N3uHXE?WW2iLD}IWGMDtEKNYmmQn;rt(YA
zzQk>R-R>+he{zj!xnpF{lBnEQ`xH(;Tz}xz>f8yDe>bn!jV((vQ;%!7r`EV?^WUE9
z$8}f!eQeK~yL5i6zGS}lONH?1Q?%z>-&5}9{!%n=@$&dfZZ&G__dj{0fAz$Qzb%iX
zCTBf3w&!vGj#@qMFMaW~b^L!ND;^X!SuVOAm9%WpInD^b7n4~w#UId}V6gGRi9?I(
z)=uXa&g&Iutlh1r<I8nkI)H^$QhVLXpX(z3{k@!fv~cpLOFK2}<DPU#@2WjEjellk
zczEiIyOm*wDurh1YuvF}!12CzMUsvC>?Oa7->AMXWxre8P|vcaF?jWPw{3~s6DBFY
zOrL(DNb)6D@cR#|eMINatjyXbc;I1&F8A7-{4XA7)!x0FJV)6)X;DPg(-&9jroQ~z
z7wjYaUvEyf)X^<=6KZp$nNH`pl{?t$XKuQEb+5#9<_VK#Pna#%o&BI&+fyy*p7hht
zD~%^xSoiTgoZ5K!iAvE_Ew=@3ce)%C&rY5()rjMb-}$*3n=DvmMEU1_lu$gkV5^(2
z$>tQ7Y8mI_{j1uiOZ<4T_=(xV>ZA#3y$qJsEOV2?i{(`7Vx^b=kDXvyJfm=%wn<gm
z4VQb0KX#aPn5UQOc1%C!b+c=O;Qy!7Gv{uxt~$4%$Z6fN6Cv`3mz<WLy*R7)@Wrc4
zRky{LI6u1Zk$)fe{)E}h8bvbGtKQ~axATye_@p!4qVB3(mCi)f-*ev1oAv#+ke2nC
zT;8|IU*~;co9fc7cIk4*_H8D2?(bTCP`*Sz{;}E7m#R*Gzitr^T)W=%O;|v9INO>t
zLcY09&2i6Kmp!^?YP+p@zo?MJWgCMz2NtYZ@%Y6dJK6h}ewaSJ!>}>u|K&YO4#oES
z_nFo3?arT<mh^I^#ib9WOJn!VJyf_~_MJ)k>ykew-}O&0ezB!DZ*f)rb7AwBaZ=p>
zzyGQD^ke11{ksAJ$}@$|f3vaA4w>`)fYbS;gV$2n=S{d;QJdcS<Iw?Ao5Tk{C5~KV
z^^%+#zxi0L)y5kxYYZP-$6pD4<>ESF`qd-q)^k*L<<HY><X`6<)$sS5rtx#>3LbTq
zmCM=VZm%wC*1L7DIZvUXZ)X)ld3auToN?bBf4@`P4_2K#qcHyw^I?&n?<R|?FPrkh
z?9qe2>JR1!mo08&vVQ!X*L$T7L-WMR+g&{!La*%Ql3B%?=HPy3yO>_Wv?~Xgk49Wi
zx0o@p$jX#&a|Q3QhX+-nWF!nr|1S!TmrT&Gl2J@GYQG{BApb&q!`4XO^wymfo|}r^
z>9#Z^b5HKr^hrOcb;=($9eF|VseeK={!UQac-rAm+~j}D53OJ5vr_xcqbELLJ^P%V
z-i>Q~AbdJ;-jtgrOMd*-@$p|IWwb4)aQ645Td&p{E-g&|Ue**fcS7h~fzA2mOS7J@
zI(O+xy{q<08y_*X#hRv#_kP@$;CgHlwNWO0z54uw)&mv#0S~>T&pj^@@wvKT#??i8
zA8u*bo$Zyi(Dw741F@ekRliWLy}jU^qh5*6g&U%g%UforCrQn56mPD0y2fhxmRINX
z_@vj)JXDf%{QSqZ`059-FZ|y9TCyuc#`n{O$8xXKwBy>h@NUWLjoSI1yLuAmK@Ovw
zZf~{X-LHCGwWO277F)bs#>tpFK|yBziurF(TWcJfe<Angw14KG-tbj)IbLH}uy=A_
z#nl6^?@n)i^Q}%Y*E{KlUD&VIDGXC;y(cW29^cZmbmLQBty|jSQgNmnt&>ka)Y#5A
z|7~cCS3*LAY`l9=Vf<E0by=g;6<;U(o34B6-Od@4T>q?5$#+&Y35d6U-?;zu?L2iC
zw_X#gB@d;a&edSkfAL}BHTIi}TTRSwWvMpihxJ%Gg@5MJedL|7u{7f4jk~EOdd^-I
zvwP=8YEIwvc%|>jZ>Bu=-f}K^{`6t|?fdtSz7lXg^YgG%%l=P$jrK1P?>XGEbI#Qz
z|F+yJ*PVRBMd`HIjyLMs#^)Zy{gs|LXG+!5rxKyPo9|rQuDk92^43+3dsi)B-Dql6
z)blf4T%#^IC?I^%&E^S(hT)|x+NzIcF*-lvdB|S+@eb?uOw$_qiO0^GdwKfrw3jR>
zTW&ge6Q4x#ngW^MnU3*ujx+q+G`HzQihj{@3%Td3(qDgHATqUOtNQ89dn0P%7KR1b
z7OV)bpR@n9qQ=LQo(k-oYgp6#?kFDE`!hyOXY2A~>vH7QJ!m?;UsZphQ?00a&h8By
zD`j6>cP&T|Qh0XrMTfB9L2HS>|Nk#is^SjwHhIyMu%gs+x$5aght)o{c`R=~`A2HF
zwO+lyr(N!%!2UmXul(7oxXsr5*y&&2xvM6ZJk*l;C$Hx#7^0Q(G=?{~N;aR-W^wZ*
zeWv{iX6_#<Za+J*&!4}kVOxn#<?I#LzOHIp-C66BXW4S)?;duo13Pl$_i{YF`hVTS
zT`IawKMplY8)hAuJYPU6jMJ>+$LnIL2fN>03aPXT)?OE`@Hy*`_PU@&g&JzR&uGSl
zY1F58XSvQhZg<`~i><suee%_PxeA`o&U;UJvDzv?PP)bPL~Y&u&I_@TN11orDC_p^
zpSo*$a}Bq1v0?CMJtP0OQ}PqlpIlu&*^_a?ySs5eA5Vzzzqhek>w1{7{Df!4uV%LX
zm=LZfq5ey^W$_(Z?{|lHNr!&gyXW%F_q^p5FFx+@xYB&cA%MLh$75^x>bJcwmPf4i
zXEe~OemK*`R4&m&!abzBMj$C~=G7~)Z<P$+3QgT{$Zu+~*o0(z>m6CgbML%0Ve(co
zW%m&Xn-|{fFIjm|X|c!c#2YulzBI{-{+M5G8OGM8*mz<q>-L=myf>Q{7yM$>=zBW#
z;biUC7TLd_*!|i(t4PV<gS?b4zmxP2W~Xg3Jq=b;Jy9>NtP|uv6qz--Uf*i&Bb^Tc
zT4oP6$3~sX>NqdB<AYw;?ca}E<|RrPcn53`F4LF!nC7<m=&${XNq-*6JP<EY)Adwb
zcQbAK@sB5`XBcU*83Z$bGh^EF>f@0wH?_U{d?Q|XnXFg1_9!zVlYQ00S0S$hPo^Ba
zT7UE0d2xlWDrv`0mhdOu+kZxEqDtP5ReyXo{XHuaH8(6+qf=(_=F7r2zK1MO?>2r_
zvU9K5ng6Gbm%O|GX~&`rWu@t<Va!qIW#T=oFFwxM^R+GNT!p7q(5cR2Sxv`9P1pVW
zzGH>UMbWKKrk`@Zm2^jeZ*ytifmz2l89%=A-zdRyT8%=~T!AN{RoggzxNv%Tn`o(h
znV|4wU#0%+>7_CU1$nP|_Wxt{dpBdLyTjp=pSK;EK4s!T4}HH^iTt|dKNzwcq&oZ;
z2%QOOtX|4`Y<Je09}c&h7@imzI7i)m?xj*ty!iSOOE3NvXHM^Y;5MhNdJ+4!JNL>Q
z<sw>d6uU@&3c2x<(dA64@v4Q-6pN1Dez-JY;lcag8@zbz9fS`td~BU{qM)sELu9AX
zg^Jimfj4dT6?fSmTHq?TFF8_G`Q+51SsQv>Zng)#T=?TZ_f0Ximy2X2Z~W*BwA5;e
zb-QfNzST|JDfaT}rWuie#bF;Gn$J8GIs5LEv-#iT{v`=bn|SYX;@SU3%|0^P-F*dK
zCo(JEYC8#PS{g@xD3@P9edP?p+-tHfJyLJiWpt$FW*V{o?_*zEr!&#>#+rG(*J4uM
zcTD1#|NQ9Y>+I(yb$aux_}X{k{aTNcpJpYdoVn{WZOZR;rKRnm*0wG$Ty+;%J91sQ
zD?7iv{Lq}oe|~@04~WdZ`r2(p`~<bFuMaldkGh=2Drw&$s$%gx_&Q5@-$McA^QQa$
z9W*I@qjlnCa$Bb5{k)oaZkwAr3WR3tvR@E>%Y6CX6|>(Jz46@e;OKNy@o-k9py;d=
z9*N-a$7V+-=l<5(`D{~}_UnU-rZGO-Dq`#qzg}|x+}cenUmY)43hkAh{K$JlOwO~j
z#lq(c|4qHL?cMUrV!0c$nw#^Tid>ToZa(L)S#j!AosV1p<LXa7+aHAR>}2`6E5}i#
zzu_V0<2PQ@mUnil^?ROKsjMoLv_$XAT_2vVnHRKWm}l<4^kHB4_nzwl8-Iwe6gPQs
zV6V}ox_9go^+KhxyZw>`Bvdrc<wfn*<~lV+AhCaK$%QIQ!J7-8c=J}+M_##?G%0b>
zVuy}X3v#({25x<H`u4OtZ`wo`Rz25wzuntf-}b(MvArVOG_Cfpv+KRJI~2387+TDk
znesyU@Liw!L!R$<9LVnQT%9N)skBh&^S|)DwOJ|6hu*Q~?G$zFWblh$V7;~2iX%B|
z|ANlzlB*aGl`l*`^+@(d>V3JmO$imNUJ9)Az4^Jau-436wykJ0i}So`e-`fLV9c&r
z{ln*v({7feRg<|7z7LZ*=jPiS^}My{$fIvoFYimfo_r&gRl5AI#D`Pg{~JbjwQ>hI
z`kS*qTrU!=pgrqkjo4@B#1))Z&MxRX`B?Dk6FyZF##d+f41PabQMf5$@l?<4kqaAn
z(morUxf`(R-n$8lb_Oz7Jy<#~H}U5Owv*d=T)xCly!a|WbK8MD-|Z2VU!FH<mb<Uw
z$vx=*W$U`NCENL(7k_%SL*iO}z>~e&+YfH^tgQO^ztHFH56;7me6AI_e;&HN;%18N
z>*3bAu)E1cDLh0&?}K>3Lc_0%U#5FHFRFikE7a{}Vs=DN+A|X;mUx~6{t-td%XS?Q
zj-K+UJaW#56<6gByk2(T+CfpSFvrj@Qi8k}-AzPS9J(79{Kwi;X>yO7$lD25x4zy!
zab1LfTK{@JNAAczfuQE+M=VdS7BCamJSpwPb~!ko_x__vZ{*Ed8n3?p`|jnom!=Bt
zG1fNQt@xA{3G9hGZm8%TIMs|rsAAuhG|6ejvlwS7OB&ufRJ_VzrQVK*aXZWFRyoOO
z1}0BT`+nYQ%E73DJ=~KL57jN<(D7cRdTinAP%GAuJK9@)X1?)S+nIdk>*Xt58+Ce@
zozS%SxK1%Dy78Fnr20E1P4}*b{w%QAtdlIdW!r-d97e2HG~|VQu1=0f?n`_9#(Al!
z-Tvdho}clSKBcqL(qo^pTm98V8=s`lcqMrA^x+T**65!n9oy<}{F(FO{-Hx}F1}tQ
zWUP>FqhfJr;VG9_hdGwc%sJD}#=F^C-DAhAprc-j#dp^~UHa)lr0Cu)MG8&xzXxPa
zeVA2~RV%!DQS<FDzr~Lq+G_B4W%dl-2H!ajolZ8q4)Ue3R#U!l7AW+ZiwizK&vIsW
zkM@b)az2qDN9T>5PIfWpB=$=xES)v!b#nsC%A)^aOZNPJ`hr{aOZStvN@wDF6i;rs
zVrnZPSNwjP@#~N08UAaZdt9o0t8+rpg}2oyGox-D|FgWazVJcnB*m{8KC?MW&1_WX
zHJzO@?c=ha``8pV`%LDVefQm_3A~GJF7{hW`7E>Fc~jNkALslZSC;N*dX~!}cy%pX
zME{?T8PVNLp;@{fp;|{yaQrG?ESIO?(Q&$P_j3MAzvf7u(lgjveN8p{^}pqxUl+xe
zvFF)12e#*K5e>3t?wZo^wx@MhS?2fZT%m7^MY5`cMSZ`AEw|0zo^3Dj&G=aVs<mYs
zERBwba4U=KKYk)J?$r^y9T{JDYkV^F)XB7cch%|Dfpc2lnzm|M2HyG{|9xtK+&kTc
zUYloaODj6W<818mVbkB63uB}7Tq5rJU-$m>!ReGtNOyIhljz+~ras$RPe*qo`bF-H
zv?<kA-1?hEbSc{=EtCBFFRnZlFMFoLwno@uMXu3{oWn=nZ91&-@Zxv3ZEYVGy(kY;
zK7EygZS{i_hU#ZqYb=BdE+p+PPC8>W-G5r>y?H+(w@F4ifBMBYSLpw2#T&CD3fGI=
z?qoIF?k;~={_3}#;S($Fe#~b7cus9n;jCh}fZM`7t5TP)J#zAHSfSOs@?X<5^gnfF
zczo!1?00&Cpq)>~((}JN3wqywoieS*YksuVZR7GMJ7V`RS|9oLkh%O|^@O;*N1kC$
zhL+dLdvm5P**1my%hqecd*94nuTT>tmH+x?+2?8*j=1j7O$%IXR{Xgn*0Y&yPxB<T
ze|?`%ZmnD{w?Xu%?!HCFJKo>iXm?*t?3Q}^4JWVczssjRx~zWxq!?#W+=LC8-PaE-
z>-ZkOtWxR1s{czlc@0gI&NRFi-0HMxcUrb--}}~Bj;PZY#kU5x?J57=u<`qaViR%k
z8jZANUiwr16}_`7uT++GmDRDTdZE0mHtSb=eWUp=i+_U3Z<dEX&S-txx#!FJjrVo*
zQi9m0Y}+GrQ}@O{=ZisK>^|>bVH=mc-AP?^h25s^C4O&i-F@pPk&&9`8<nUfpgS|V
zjwNR45`jg&NlhzP&9LrBkdufz_<vE3?so_IQ@bsS55}HKxiRmg$Zm((ANT)C6tMMe
zn3^qWbbnI(-ba%)HeTCzIZ({=vtZG?rA93*yrCx51>4KMeZMTz7W26G>Yfifr&&C<
z(q6XKknzx-CCjfLZ@s>9dZCq*nsaV@-5;$#cY>zdS~=amcI<qjY<;)b`De$Ely1vq
zWhv48{QADY9(U2c{Xz+$yv2{#mK?vnm#bUOz`rQy&6nj@+bg&fd%o!2nzHg(Wnzl6
z+d+$6LG!gVmkK0z8fHB)-mrb`w5LtCU+wpMxbM_AH)lJMFSj-?T+-4Sak<_*?%2Gy
zasI#R^?v;~*y}rW$Ih>(=XnZvxw@Y2{@;Ir-{hQu?VSr-1e_*k@>CbB(Xv$kW|3gi
z;qz(Y+uYTQ8T}55MKrh8v}ih(S{|Ir%|C~4)&0I|gZAKU*N?v1G+p&XT+{Zw32TbK
zC@nuwvLj;iq;mUt^VAxA-2}w`oD^W;=2Ei%yG~AFJ@1p{nH|bjo6M$iW@o;AVV86B
zU(>XbOu6RVHb?fnN|99eI;$wjV)r#^KXr{57SFw9T^(~)c8|H*dHJKeS-3kdO>w{d
z%$NK5qHkIDOpEw<=d+$TWcboF?*8mJCuhUfsZ%m0&-%)+^+n*e_@z?{o)l%~{q?U7
zPtj`gUewKK#QtyPxvI-`Ht8!(UwpaT#j<0!_)YJ^IqR#Ne!RWk(ZapD$nKxh!q2Ry
z4!qLih;skGvgLy9S>69h$>p`zrH?V}UCh5;(P|F2@TK=hzht|vyVD->>S}>>lbquB
z^pC6-(<~aQH_rA>H8qTlb$hLGY|Eqbi(}86obd5QhU~xehidblim}KWrRJr1sRpQb
zF1`F_!9=T_sW-Aq^>5uP{1;mickTFNmV1wr6c2}MYDBOG$sK!pdrb%5-Z?%Cj`hru
zZPqZKpvx*&&z-$X^NZ*6ts>b>Y*%}ypM2dkE0LwazhcpPZ?6qEl>SXj|9?1*Z@I=H
zUsa7yEdDlK{7r_n%0X2VLTZb;j>_J6m*co>X_h6&wg(xqoDa21AN*O9ls{9Jb&CJ-
z_qz?%k1Q*Gz)^nW)AcV_YS-V1{@Cg0pR|neWzL?37D)?MWeH#VuGpQk`U=-EqeK6i
zpU=D7?lobx#Fys2B>D2H_tST;u6Fp~@aospqYbaqCO=A_zJ%k~R}RM_Z@-I8ehm*D
zK4&_x=C&rBO8R9~S{&%H@Uq8&NikQ#Uu;&NrM=fC;xq3IhW++u&V;xAFq!eio~v1|
zrD5XHSz9=N{0zyqf7+?lYI{hrVv=3Xk2wboP5(SDHMSN!{ZsFG{A&&STLqg$!<xiu
zFNi7#>*SjsY`q{H&t!b_g+<c`=CcfzhcAj7n!OOO+`P}%)%WC1t7@H6=Cjjk`VUz!
zx`kabIkv21!JZ|34}7L@t+AWl+-w%}rSpzt!>PIU8egu(9rZ{%^WdUV=hvc$?K=+5
zW=P_ik#)`_r7p6$STcWMv0j_PHFg`G+ZI3LFR6to-)Dc{?!Vl0is&mF`*}yd2Pqev
z+Vh1)Y*t-e>P^4%6ZJNH|2z9k!$JLOo~?(}l~SHbmHudKT&0*4_G0(EE!%8V|JQjG
zaxhIg+gMc<cAZr!bJe;1p#nb1PMVtCPC_S?#Ogh#bt&$#d)KigbBUXLM@PZ3etCs;
zZ$dtPm_AcK^qNTIHnmg}bw?i0FWv8Twzj=|J$>>!eZ^IoXLdZ`-MdWU=KTEvwMmP1
zPYT*wvpbvp=XI0mu9>=`r+T%oIykibGH*8%DG)Cc3(~vsM&Zr2;Mxi7O4c??^X4Z0
zt__$QwwmEGlh~}SZg=cslli*+ikIme|G2@};e&EGpOopHrJHY_GoRYAxKUv9#_OH_
z*A6cgSU#`2H_gbgoN@lH&)HK;nqn_1ZK`_qr)1KvgI4Yr<r-{`ow{o$b}KeF#9;~h
zUH6l_I$}=k?OJG_&ume+FUV__baQF%oBW$nLWY&SF3zj;rSqmQ((A9i6!j`a%lWL(
z(FKP7(*=Vq&DT$LNZt}7)+O<C@mDYH66x;EACmqkuikce${Oy|CzuZu|MTgL`)vC6
zMy2t7#T%Rz@&?QAY{^M#v7Wx#H*WJ8wPo+(Cb4q7TDZYH{l_Dhzt>(wuD#zNwW|M+
zGxNev78%Z`J=aT~Tu{16UG223X!^55(aRSWOjX_1#cusi!oIY+qvEA`Zsz-xADxW*
zy9HZ<-fNwBKl7BxMy?ME%fDQlms7v|jve>SW6wqAP1F$EDzn~T{V%Q=3uigiHrF^M
zaM{eO+weR2NX&`{^V+iB<+wQbxbJCa=n7Seyq#unzbK<6e%`8OITl-Y)?S@C!#6)*
zk7M2ZXLWT<Z$3}luB&<MzGIkJse|O9y#})zkE<K@-TV94W#;2`LOEZ5$)4=o|MQ6E
z=GDfEoVPYyTPQQ}Lc=`eN%k{;f8G?cuVdyv+5Gq4zN9bZ`eHYE#{a-2ogWM`6iZ|6
zZ$Fw~d-ClQ{R@^|yls&;UMia1{xNy$qAksiU+UxJ+J0~P85Q~QhsBwzSDtOkJv1ew
z$4%!xLq<N6`<AQB%l-Z>J9G2#Axn==&4ZaG$9H{v%e7>eZpp%D_72rEvvz$t^7Pk9
zwxhr8vKJfhtz62ptfxkZp>fX4*^VxYYwxVPI=%4m&YEo(PP45&{ZnJ_Z2e7d`>wx!
zx!>P-eHxSX!)i_I2MM?MrWS3>OVo8MbM3bM&Uq*0&-^z|8yMe2ym|UJ)?9Jf{Jxwt
z%M$y*3&LVYKATzOJ^pxq_W9izS>da~UcQQ$_h`~(mAued{YSJf3Qh5RUbDStY5RJ$
zsb{20J(li0>2U1qr=`_;5eIJAe6{EZI<j$En(l|+nIcUdg6%#XmW3w1;bja@XPy$c
zG=tsnaZ|RH&f}jxPY>R3kd<E5<sRBOC%X96L#2KD^DA?9Hnt1JuuYeq^>b05Y0OS@
z_gicyGxJXipW+eHnQ>)KaPn0TZs~Q`g*JrNYURK5zN{{E?E0+*+e!m2E|}+d@yXpf
z4%TZQ@^3Hxb>8p)n`*K7vC>cE_CzoVrQOm@mo^G6THaixd&yMQ<oP+5*5i&0Vou8i
z^_p)6?o4{E&V1|o_l-}~6IRx#ujARnWy!c!|AOCB@dqE|>SGpMw(YrRe7T&#*m_6U
z0e6ep6JBl2nPj}(;!x7j*(nDPYb?~|`E4VzU=Oq4G}p)p-8K{MzBj&MC%F5dsn_PS
zGpY@av9hl>cCoMf;~c6lqPwV_%T~fHb3)?Wr0Ki&^e%iM&w1ug!@V_jSJqFxcz#kQ
zcjm78XOA~7ERQ>RUgOb?>q+Y#{K@^?q!wK*%O-!<QLDL)`_cRow(T4jB;!9{*VMYJ
zk)-*y=1Nhnb=zk{t3&r~R>sITa@q15D4+f-x<5e2>!wJJ$>j?(_q~l<;l8`{MopAz
zYv_Hwd5<OU>cnRTU#)mCzxmv{cbj)F-}caa+KMArHRnv*%)h{7mW714WRDj|tN4s_
z)8gX3WxU=RDv`Ry^GtNb|8u)<g<V;{+2PwwzAE3jM>&-P9L3HV*u{T4F-g@}m#d>S
zLT{@-b2-1D)Zb{&d)h_~pC-=fH;l{5k7H)*-1W-uag=z=_X%5XP5H|DXnjJ^vckJ*
zs!mKvT@ESUvrJxWpU$IFB3)Q@Rk`}RYunrzE9d+C-+P|>X!?r{8&am6cj>aMFFU2M
zYT_)PdF)HCWvtO(U(P6PC-N}7E<Di5^tTshh`P4<w(DpAciipom~_x_;cn?Dh1vRx
z#0;i>_<V-HXBNX2^Q}J>4yI0g<-YuGw_o|W1Lq%p`z7GNrS|P?am62ZZTOe(pAxB(
zQs<i<?e#`Dt7g*FAN!wkceE8=leoNj-XeDyX4xOlOxh$I+pI51=f@O9<Wz(iTDUqX
zC@3fxCmN)HXa(aWgKHBmOqi!xxLx#Buu9vM-%t6AW~fRpJQUP$Vn+MKFXkKfB`RzS
zv)L%3UoxG?##OD_%kJ3k))UHcw^x?G(P@>>VEn7tu_<mo!}@J@lZ+g8*S~X+;nUH*
zGC?Y4$)`JCrzaQY?P}mzvFKKefScb7nGK&kmoz2a(Kw_jQvaZ}Dc4*`DfmGTliJ2(
z|5d-eIF+}|@>0zMOUs7^J1b)TX<iYYAn`TQsA6hkd+G)!iQ9&6r+>2hmSN<Qan@N-
z=1XhMd8MlFhP&tIyZhBQSYLB~T(F08|8F^_;MfC!#=j>BZC$mITfndJ#&M5r<^NLJ
z9cEQ!F!asrex~#=^3o0)rQdNCD_{Tlo3i!P^qZ!RpJu*VUh(Qx_;&s3UrIGf*A-Sg
z>S{b7exX{q{ObYtXU-Ff>gQe3%Y3jr*TLTWZurVSQ{T?uTXB5)ykkE5HAGcDR9?Mi
zdVs-Rw8nkv+JcllPtK+Nh*Q|opmx^#&1F{G3)#n+BlxU8-YL1$>UI3uvjg1)Kf|5R
zHr``CBj(up`g4QgpNyW|KlN%sEPctvtVe4O*}rXZIQemP*#DE4izPR6`7?@qDEROv
zD?+Gr*|g`!HFQO#EWJK%*lo5xLh;&ad+kkola&H59{oGrCgil+olGJ9d5#)Q|5JmN
zvbecI9P4vUpR*oQncuv<S^nnr7L)H1)h@do{}=U_SE*mr+_a51r`~E!TJ*z<RS#F_
z*LS;1GCgbIeYI~=<lYz|ONGk?_UfB^ZVE0sa=U%+^Ucp5vqXKqn|5$p?$VA=oc<Ew
z2fQZQ86Vhp$J?j#Kv!t^``g^}RvbGdKij=#>u%x3m!7xRTxIgB$h1&dK21});^NzL
zS1f$^-F<5%R)_4Ec3gG(&UMm16{hyg?Mz)DBDE@H760ekd^%g6<rW#<+_~o7*H)+H
z-w(>!sPr~>)HSYHSy2)tyZ^IGonX}KpIP>Ee<&Fr<lM0(XSY9}Z`!no=`SoJgr*&n
zi?t8=`L}ZA)ZXZfcTSHQ7;b-<ImhP0+OON@+~1VHNj`c*AN$G5)+1);6(eolr=NG;
zzHCl#L6}d2)&G4*s}lX~=Y=(QxGfhuJk@Q1-u$KdDi@wVzw%)-v%~aVDaYiQF5D^o
zdAT}E?9+j&CyyC6mEPKQZnxm`8*v>`3nfz-O8=TH(7D~Z^lPeo7yJA@?&7?vx{=l^
zmo?vUeCArqGw;C_yLY?JtXb%2<M?OerPkzoY}+&4Vzjwt?%&DG<?c1%UJ|qBCne!*
zmbi5W>vT8#>KELoopxPD@O?>fa)388iwFY)0|!G;yn0~NTc+k<1_p*c1_lO61_p-W
z<iwnU_^Qgh!h+)XvdsK=gLnhI%)I0x?vrQEp7HK4_tf$1DL<{>_5F;up4VC5v)Z0#
z3QwQZ*Z0;nx?*f@6r|y&d&=j`$u(X&C(oSUyva+)>)Z()?@$AiP=f#i<|KtfY`uXM
z5|=V2a5DsWGct)VBi!OPAuM<uBLl-~76t}(1_)qeU|?9%2x6xs7wA>w<{)bdj8_lb
z;<u>4^b7-oQUe!*1V|kN0|P|UWkwv{Nli&ZHU$(6bs_4^<qQlAa~T*I<WNkpJBP!R
zqSWI2(xT+lVq~*GE^_-eTU(rwfuWO;fk7I@tdBU%iZ3oHP0}kvHVEXX*TN>n+ZY%a
zBsdt*yykcThoj0-y#{hlO=V<a5d#CmCI$uuWhCdkZPdMp-IVyuy!hn&ypq(461|F)
zWOQe3eQ@8^n3aLyk2u0vAaj>AKEPq1UQtRSvMC^Ez4rZRt<A{5AjX6q;-1%WI13U=
z87UZP;N&O&^(VL)7{16dFi3%%0>w)jH{8H(mR@m2VnHghn?M0R*@btp>vaYOhwBUs
z;!ra{)RM*xPjHx1k%w*wdX54a07;Nqdl+%&uK;gWHjq+o25tskW(I~Wdl(t?7+g&P
vT~i92@{PSL0-QoZvMdTc{esL~4a&>%%T2vZ(i08!EB&hi96d6eLjr992rDwW
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xci
deleted file mode 100644
index 8a9903f..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xci
+++ /dev/null
@@ -1,832 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>xci</spirit:library>
- <spirit:name>unknown</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_vio_0_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="vio" spirit:version="3.0"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_BUSIF"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_RESET"/>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.INSERT_VIP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.PHASE">0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_PROBE_IN_ACTIVITY">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_NUM_PROBE_IN">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_NUM_PROBE_OUT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_XDEVICEFAMILY">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_EN_PROBE_IN_ACTIVITY">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_EN_SYNCHRONIZATION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_NUM_PROBE_IN">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_NUM_PROBE_OUT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN0_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN100_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN101_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN102_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN103_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN104_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN105_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN106_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN107_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN108_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN109_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN10_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN110_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN111_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN112_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN113_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN114_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN115_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN116_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN117_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN118_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN119_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN11_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN120_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN121_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN122_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN123_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN124_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN125_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN126_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN127_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN128_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN129_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN12_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN130_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN131_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN132_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN133_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN134_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN135_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN136_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN137_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN138_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN139_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN13_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN140_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN141_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN142_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN143_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN144_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN145_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN146_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN147_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN148_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN149_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN14_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN150_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN151_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN152_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN153_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN154_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN155_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN156_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN157_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN158_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN159_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN15_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN160_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN161_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN162_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN163_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN164_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN165_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN166_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN167_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN168_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN169_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN16_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN170_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN171_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN172_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN173_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN174_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN175_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN176_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN177_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN178_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN179_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN17_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN180_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN181_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN182_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN183_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN184_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN185_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN186_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN187_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN188_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN189_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN18_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN190_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN191_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN192_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN193_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN194_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN195_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN196_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN197_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN198_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN199_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN19_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN1_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN200_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN201_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN202_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN203_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN204_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN205_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN206_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN207_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN208_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN209_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN20_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN210_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN211_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN212_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN213_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN214_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN215_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN216_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN217_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN218_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN219_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN21_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN220_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN221_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN222_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN223_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN224_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN225_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN226_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN227_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN228_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN229_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN22_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN230_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN231_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN232_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN233_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN234_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN235_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN236_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN237_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN238_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN239_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN23_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN240_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN241_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN242_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN243_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN244_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN245_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN246_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN247_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN248_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN249_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN24_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN250_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN251_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN252_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN253_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN254_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN255_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN25_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN26_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN27_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN28_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN29_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN2_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN30_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN31_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN32_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN33_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN34_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN35_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN36_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN37_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN38_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN39_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN3_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN40_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN41_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN42_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN43_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN44_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN45_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN46_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN47_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN48_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN49_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN4_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN50_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN51_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN52_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN53_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN54_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN55_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN56_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN57_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN58_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN59_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN5_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN60_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN61_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN62_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN63_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN64_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN65_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN66_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN67_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN68_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN69_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN6_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN70_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN71_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN72_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN73_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN74_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN75_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN76_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN77_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN78_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN79_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN7_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN80_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN81_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN82_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN83_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN84_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN85_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN86_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN87_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN88_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN89_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN8_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN90_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN91_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN92_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN93_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN94_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN95_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN96_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN97_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN98_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN99_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN9_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT0_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT0_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT100_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT100_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT101_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT101_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT102_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT102_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT103_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT103_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT104_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT104_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT105_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT105_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT106_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT106_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT107_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT107_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT108_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT108_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT109_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT109_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT10_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT10_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT110_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT110_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT111_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT111_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT112_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT112_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT113_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT113_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT114_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT114_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT115_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT115_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT116_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT116_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT117_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT117_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT118_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT118_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT119_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT119_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT11_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT11_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT120_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT120_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT121_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT121_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT122_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT122_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT123_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT123_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT124_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT124_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT125_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT125_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT126_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT126_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT127_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT127_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT128_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT128_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT129_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT129_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT12_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT12_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT130_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT130_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT131_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT131_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT132_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT132_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT133_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT133_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT134_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT134_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT135_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT135_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT136_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT136_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT137_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT137_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT138_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT138_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT139_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT139_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT13_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT13_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT140_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT140_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT141_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT141_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT142_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT142_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT143_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT143_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT144_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT144_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT145_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT145_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT146_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT146_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT147_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT147_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT148_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT148_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT149_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT149_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT14_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT14_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT150_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT150_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT151_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT151_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT152_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT152_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT153_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT153_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT154_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT154_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT155_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT155_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT156_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT156_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT157_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT157_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT158_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT158_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT159_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT159_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT15_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT15_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT160_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT160_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT161_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT161_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT162_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT162_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT163_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT163_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT164_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT164_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT165_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT165_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT166_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT166_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT167_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT167_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT168_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT168_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT169_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT169_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT16_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT16_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT170_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT170_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT171_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT171_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT172_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT172_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT173_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT173_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT174_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT174_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT175_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT175_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT176_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT176_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT177_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT177_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT178_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT178_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT179_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT179_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT17_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT17_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT180_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT180_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT181_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT181_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT182_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT182_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT183_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT183_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT184_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT184_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT185_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT185_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT186_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT186_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT187_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT187_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT188_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT188_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT189_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT189_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT18_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT18_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT190_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT190_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT191_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT191_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT192_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT192_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT193_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT193_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT194_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT194_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT195_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT195_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT196_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT196_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT197_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT197_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT198_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT198_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT199_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT199_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT19_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT19_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT1_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT1_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT200_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT200_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT201_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT201_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT202_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT202_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT203_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT203_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT204_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT204_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT205_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT205_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT206_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT206_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT207_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT207_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT208_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT208_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT209_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT209_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT20_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT20_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT210_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT210_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT211_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT211_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT212_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT212_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT213_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT213_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT214_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT214_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT215_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT215_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT216_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT216_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT217_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT217_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT218_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT218_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT219_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT219_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT21_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT21_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT220_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT220_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT221_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT221_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT222_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT222_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT223_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT223_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT224_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT224_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT225_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT225_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT226_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT226_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT227_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT227_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT228_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT228_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT229_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT229_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT22_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT22_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT230_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT230_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT231_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT231_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT232_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT232_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT233_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT233_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT234_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT234_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT235_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT235_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT236_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT236_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT237_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT237_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT238_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT238_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT239_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT239_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT23_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT23_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT240_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT240_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT241_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT241_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT242_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT242_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT243_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT243_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT244_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT244_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT245_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT245_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT246_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT246_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT247_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT247_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT248_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT248_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT249_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT249_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT24_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT24_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT250_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT250_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT251_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT251_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT252_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT252_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT253_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT253_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT254_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT254_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT255_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT255_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT25_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT25_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT26_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT26_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT27_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT27_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT28_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT28_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT29_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT29_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT2_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT2_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT30_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT30_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT31_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT31_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT32_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT32_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT33_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT33_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT34_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT34_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT35_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT35_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT36_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT36_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT37_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT37_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT38_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT38_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT39_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT39_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT3_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT3_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT40_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT40_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT41_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT41_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT42_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT42_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT43_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT43_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT44_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT44_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT45_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT45_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT46_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT46_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT47_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT47_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT48_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT48_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT49_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT49_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT4_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT4_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT50_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT50_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT51_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT51_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT52_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT52_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT53_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT53_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT54_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT54_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT55_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT55_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT56_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT56_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT57_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT57_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT58_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT58_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT59_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT59_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT5_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT5_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT60_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT60_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT61_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT61_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT62_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT62_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT63_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT63_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT64_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT64_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT65_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT65_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT66_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT66_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT67_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT67_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT68_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT68_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT69_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT69_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT6_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT6_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT70_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT70_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT71_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT71_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT72_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT72_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT73_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT73_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT74_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT74_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT75_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT75_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT76_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT76_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT77_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT77_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT78_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT78_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT79_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT79_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT7_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT7_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT80_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT80_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT81_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT81_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT82_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT82_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT83_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT83_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT84_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT84_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT85_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT85_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT86_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT86_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT87_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT87_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT88_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT88_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT89_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT89_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT8_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT8_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT90_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT90_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT91_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT91_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT92_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT92_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT93_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT93_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT94_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT94_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT95_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT95_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT96_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT96_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT97_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT97_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT98_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT98_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT99_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT99_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT9_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT9_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_vio_0_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Integrator</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">19</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">../../ipshared</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">OUT_OF_CONTEXT</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- <spirit:vendorExtensions>
- <xilinx:componentInstanceExtensions>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_BUSIF" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_EN_PROBE_IN_ACTIVITY" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_NUM_PROBE_IN" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:componentInstanceExtensions>
- </spirit:vendorExtensions>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xdc b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xdc
deleted file mode 100644
index e67db69..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xdc
+++ /dev/null
@@ -1,67 +0,0 @@
-# file: scalp_zynqps_vio_0_0.xdc
-#////////////////////////////////////////////////////////////////////////////
-#/$Date: 2012/02/06 10:34:16 $
-#/$RCSfile: $
-#/$Revision: 1.2 $
-#//////////////////////////////////////////////////////////////////////////////
-#/ ____ ____
-#/ / /\/ /
-#/ /___/ \ / Vendor: Xilinx
-#/ \ \ \/ Version : 2.00
-#/ \ \ Application : VIO V2.00a
-#/ / / Filename : scalp_zynqps_vio_0_0.xdc
-#/ /___/ /\
-#/ \ \ / \
-#/ \___\/\___\
-#/
-#/ (c) Copyright 2010 Xilinx, Inc. All rights reserved.
-#/
-#/ This file contains confidential and proprietary information
-#/ of Xilinx, Inc. and is protected under U.S. and
-#/ international copyright and other intellectual property
-#/ laws.
-#/
-#/ DISCLAIMER
-#/ This disclaimer is not a license and does not grant any
-#/ rights to the materials distributed herewith. Except as
-#/ otherwise provided in a valid license issued to you by
-#/ Xilinx, and to the maximum extent permitted by applicable
-#/ law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-#/ WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-#/ AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-#/ BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-#/ INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-#/ (2) Xilinx shall not be liable (whether in contract or tort,
-#/ including negligence, or under any other theory of
-#/ liability) for any loss or damage of any kind or nature
-#/ related to, arising under or in connection with these
-#/ materials, including for any direct, or any indirect,
-#/ special, incidental, or consequential loss or damage
-#/ (including loss of data, profits, goodwill, or any type of
-#/ loss or damage suffered as a result of any action brought
-#/ by a third party) even if such damage or loss was
-#/ reasonably foreseeable or Xilinx had been advised of the
-#/ possibility of the same.
-#/
-#/ CRITICAL APPLICATIONS
-#/ Xilinx products are not designed or intended to be fail-
-#/ safe, or for use in any application requiring fail-safe
-#/ performance, such as life-support or safety devices or
-#/ systems, Class III medical devices, nuclear facilities,
-#/ applications related to the deployment of airbags, or any
-#/ other applications that could lead to death, personal
-#/ injury, or severe property or environmental damage
-#/ (individually and collectively, "Critical
-#/ Applications"). Customer assumes the sole risk and
-#/ liability of any use of Xilinx products in Critical
-#/ Applications, subject only to applicable laws and
-#/ regulations governing limitations on product liability.
-#/
-#/ THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-#/ PART OF THIS FILE AT ALL TIMES.
-#Created by Constraints Editor
-
- set_false_path -from [get_cells -hierarchical -filter { NAME =~ "*committ_int*" && IS_SEQUENTIAL}] -to [get_cells -hierarchical -filter { NAME =~ "*Committ_1*" && IS_SEQUENTIAL} ]
- set_false_path -from [get_cells -hierarchical -filter { NAME =~ "*clear_int*" && IS_SEQUENTIAL}] -to [get_cells -hierarchical -filter { NAME =~ "*Probe_out*" && IS_SEQUENTIAL}]
- set_false_path -from [get_cells -hierarchical -filter { NAME =~ "*clear_int*" && IS_SEQUENTIAL }] -to [get_cells -hierarchical -filter { NAME =~ "*PROBE_OUT_ALL_INST/G_PROBE_OUT[*].PROBE_OUT0_INST/data_int*" && IS_SEQUENTIAL}]
- set_false_path -from [get_cells -hierarchical -filter { NAME =~ "*data_int_*" && IS_SEQUENTIAL } ] -to [get_cells -hierarchical -filter { NAME =~ "*Probe_out_*" && IS_SEQUENTIAL} ]
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xml
deleted file mode 100644
index 3b63f36..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xml
+++ /dev/null
@@ -1,20730 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>customized_ip</spirit:library>
- <spirit:name>scalp_zynqps_vio_0_0</spirit:name>
- <spirit:version>1.0</spirit:version>
- <spirit:busInterfaces>
- <spirit:busInterface>
- <spirit:name>signal_clock</spirit:name>
- <spirit:busType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock" spirit:version="1.0"/>
- <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="signal" spirit:name="clock_rtl" spirit:version="1.0"/>
- <spirit:slave/>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>CLK</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>FREQ_HZ</spirit:name>
- <spirit:displayName>aclk frequency</spirit:displayName>
- <spirit:description>aclk frequency</spirit:description>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.SIGNAL_CLOCK.FREQ_HZ">125000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHASE</spirit:name>
- <spirit:value spirit:format="float" spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.SIGNAL_CLOCK.PHASE">0.000</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CLK_DOMAIN</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.SIGNAL_CLOCK.CLK_DOMAIN">scalp_zynqps_processing_system7_0_0_FCLK_CLK0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_BUSIF</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_BUSIF"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASSOCIATED_RESET</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_RESET"/>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>none</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>INSERT_VIP</spirit:name>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="BUSIFPARAM_VALUE.SIGNAL_CLOCK.INSERT_VIP">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:parameterUsage>simulation.rtl</xilinx:parameterUsage>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- </spirit:busInterfaces>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>xilinx_anylanguagesynthesis</spirit:name>
- <spirit:displayName>Synthesis</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis</spirit:envIdentifier>
- <spirit:modelName>vio_v3_0_19_vio</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagesynthesis_xilinx_com_ip_ltlib_1_0__ref_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagesynthesis_xilinx_com_ip_xsdbs_1_0__ref_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_anylanguagesynthesis_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:49 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:4d0c6e2e</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_synthesisconstraints</spirit:name>
- <spirit:displayName>Synthesis Constraints</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:synthesis.constraints</spirit:envIdentifier>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_synthesisconstraints_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:49 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:4d0c6e2e</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_verilogsynthesiswrapper</spirit:name>
- <spirit:displayName>Verilog Synthesis Wrapper</spirit:displayName>
- <spirit:envIdentifier>verilogSource:vivado.xilinx.com:synthesis.wrapper</spirit:envIdentifier>
- <spirit:language>verilog</spirit:language>
- <spirit:modelName>scalp_zynqps_vio_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_verilogsynthesiswrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:49 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:4d0c6e2e</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_vhdlsimulationwrapper</spirit:name>
- <spirit:displayName>VHDL Simulation Wrapper</spirit:displayName>
- <spirit:envIdentifier>vhdlSource:vivado.xilinx.com:simulation.wrapper</spirit:envIdentifier>
- <spirit:language>vhdl</spirit:language>
- <spirit:modelName>scalp_zynqps_vio_0_0</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_vhdlsimulationwrapper_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:52:49 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:a719094c</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- <spirit:view>
- <spirit:name>xilinx_externalfiles</spirit:name>
- <spirit:displayName>External Files</spirit:displayName>
- <spirit:envIdentifier>:vivado.xilinx.com:external.files</spirit:envIdentifier>
- <spirit:fileSetRef>
- <spirit:localName>xilinx_externalfiles_view_fileset</spirit:localName>
- </spirit:fileSetRef>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>GENtimestamp</spirit:name>
- <spirit:value>Mon Sep 07 09:58:36 UTC 2020</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>outputProductCRC</spirit:name>
- <spirit:value>9:4d0c6e2e</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>clk</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in0</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN0_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in0" xilinx:dependency="((id('PARAM_VALUE.C_NUM_PROBE_IN')>0))">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in1</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN1_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in1" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in2</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN2_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in2" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>2)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in3</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN3_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in3" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>3)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in4</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN4_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in4" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>4)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in5</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN5_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in5" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>5)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in6</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN6_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in6" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>6)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in7</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN7_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in7" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>7)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in8</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN8_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in8" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>8)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in9</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN9_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in9" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>9)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in10</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN10_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in10" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>10)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in11</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN11_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in11" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>11)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in12</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN12_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in12" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>12)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in13</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN13_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in13" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>13)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in14</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN14_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in14" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>14)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in15</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN15_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in15" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>15)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in16</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN16_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in16" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>16)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in17</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN17_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in17" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>17)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in18</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN18_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in18" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>18)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in19</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN19_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in19" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>19)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in20</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN20_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in20" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>20)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in21</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN21_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in21" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>21)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in22</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN22_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in22" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>22)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in23</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN23_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in23" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>23)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in24</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN24_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in24" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>24)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in25</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN25_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in25" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>25)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in26</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN26_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in26" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>26)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in27</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN27_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in27" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>27)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in28</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN28_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in28" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>28)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in29</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN29_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in29" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>29)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in30</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN30_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in30" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>30)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in31</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN31_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in31" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>31)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in32</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN32_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in32" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>32)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in33</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN33_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in33" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>33)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in34</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN34_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in34" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>34)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in35</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN35_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in35" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>35)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in36</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN36_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in36" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>36)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in37</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN37_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in37" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>37)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in38</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN38_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in38" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>38)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in39</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN39_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in39" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>39)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in40</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN40_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in40" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>40)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in41</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN41_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in41" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>41)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in42</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN42_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in42" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>42)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in43</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN43_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in43" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>43)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in44</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN44_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in44" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>44)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in45</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN45_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in45" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>45)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in46</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN46_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in46" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>46)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in47</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN47_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in47" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>47)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in48</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN48_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in48" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>48)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in49</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN49_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in49" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>49)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in50</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN50_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in50" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>50)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in51</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN51_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in51" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>51)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in52</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN52_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in52" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>52)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in53</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN53_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in53" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>53)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in54</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN54_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in54" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>54)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in55</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN55_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in55" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>55)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in56</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN56_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in56" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>56)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in57</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN57_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in57" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>57)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in58</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN58_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in58" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>58)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in59</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN59_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in59" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>59)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in60</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN60_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in60" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>60)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in61</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN61_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in61" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>61)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in62</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN62_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in62" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>62)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in63</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN63_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in63" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>63)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in64</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN64_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in64" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>64)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in65</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN65_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in65" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>65)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in66</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN66_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in66" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>66)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in67</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN67_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in67" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>67)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in68</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN68_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in68" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>68)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in69</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN69_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in69" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>69)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in70</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN70_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in70" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>70)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in71</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN71_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in71" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>71)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in72</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN72_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in72" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>72)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in73</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN73_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in73" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>73)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in74</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN74_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in74" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>74)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in75</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN75_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in75" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>75)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in76</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN76_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in76" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>76)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in77</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN77_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in77" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>77)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in78</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN78_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in78" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>78)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in79</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN79_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in79" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>79)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in80</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN80_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in80" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>80)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in81</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN81_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in81" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>81)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in82</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN82_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in82" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>82)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in83</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN83_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in83" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>83)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in84</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN84_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in84" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>84)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in85</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN85_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in85" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>85)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in86</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN86_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in86" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>86)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in87</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN87_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in87" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>87)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in88</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN88_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in88" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>88)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in89</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN89_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in89" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>89)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in90</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN90_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in90" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>90)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in91</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN91_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in91" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>91)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in92</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN92_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in92" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>92)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in93</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN93_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in93" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>93)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in94</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN94_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in94" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>94)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in95</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN95_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in95" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>95)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in96</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN96_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in96" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>96)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in97</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN97_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in97" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>97)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in98</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN98_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in98" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>98)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in99</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN99_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in99" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>99)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in100</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN100_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in100" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>100)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in101</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN101_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in101" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>101)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in102</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN102_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in102" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>102)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in103</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN103_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in103" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>103)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in104</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN104_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in104" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>104)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in105</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN105_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in105" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>105)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in106</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN106_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in106" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>106)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in107</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN107_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in107" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>107)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in108</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN108_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in108" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>108)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in109</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN109_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in109" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>109)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in110</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN110_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in110" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>110)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in111</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN111_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in111" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>111)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in112</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN112_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in112" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>112)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in113</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN113_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in113" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>113)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in114</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN114_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in114" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>114)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in115</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN115_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in115" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>115)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in116</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN116_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in116" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>116)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in117</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN117_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in117" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>117)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in118</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN118_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in118" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>118)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in119</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN119_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in119" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>119)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in120</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN120_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in120" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>120)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in121</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN121_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in121" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>121)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in122</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN122_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in122" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>122)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in123</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN123_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in123" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>123)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in124</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN124_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in124" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>124)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in125</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN125_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in125" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>125)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in126</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN126_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in126" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>126)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in127</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN127_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in127" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>127)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in128</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN128_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in128" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>128)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in129</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN129_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in129" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>129)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in130</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN130_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in130" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>130)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in131</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN131_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in131" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>131)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in132</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN132_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in132" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>132)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in133</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN133_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in133" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>133)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in134</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN134_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in134" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>134)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in135</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN135_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in135" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>135)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in136</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN136_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in136" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>136)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in137</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN137_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in137" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>137)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in138</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN138_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in138" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>138)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in139</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN139_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in139" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>139)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in140</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN140_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in140" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>140)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in141</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN141_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in141" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>141)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in142</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN142_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in142" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>142)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in143</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN143_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in143" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>143)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in144</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN144_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in144" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>144)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in145</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN145_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in145" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>145)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in146</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN146_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in146" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>146)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in147</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN147_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in147" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>147)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in148</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN148_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in148" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>148)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in149</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN149_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in149" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>149)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in150</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN150_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in150" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>150)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in151</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN151_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in151" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>151)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in152</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN152_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in152" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>152)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in153</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN153_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in153" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>153)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in154</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN154_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in154" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>154)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in155</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN155_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in155" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>155)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in156</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN156_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in156" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>156)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in157</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN157_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in157" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>157)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in158</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN158_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in158" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>158)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in159</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN159_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in159" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>159)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in160</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN160_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in160" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>160)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in161</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN161_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in161" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>161)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in162</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN162_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in162" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>162)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in163</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN163_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in163" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>163)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in164</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN164_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in164" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>164)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in165</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN165_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in165" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>165)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in166</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN166_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in166" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>166)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in167</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN167_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in167" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>167)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in168</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN168_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in168" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>168)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in169</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN169_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in169" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>169)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in170</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN170_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in170" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>170)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in171</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN171_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in171" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>171)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in172</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN172_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in172" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>172)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in173</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN173_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in173" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>173)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in174</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN174_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in174" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>174)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in175</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN175_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in175" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>175)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in176</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN176_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in176" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>176)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in177</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN177_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in177" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>177)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in178</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN178_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in178" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>178)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in179</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN179_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in179" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>179)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in180</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN180_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in180" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>180)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in181</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN181_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in181" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>181)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in182</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN182_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in182" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>182)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in183</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN183_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in183" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>183)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in184</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN184_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in184" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>184)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in185</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN185_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in185" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>185)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in186</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN186_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in186" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>186)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in187</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN187_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in187" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>187)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in188</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN188_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in188" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>188)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in189</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN189_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in189" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>189)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in190</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN190_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in190" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>190)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in191</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN191_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in191" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>191)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in192</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN192_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in192" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>192)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in193</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN193_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in193" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>193)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in194</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN194_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in194" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>194)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in195</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN195_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in195" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>195)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in196</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN196_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in196" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>196)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in197</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN197_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in197" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>197)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in198</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN198_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in198" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>198)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in199</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN199_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in199" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>199)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in200</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN200_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in200" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>200)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in201</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN201_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in201" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>201)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in202</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN202_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in202" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>202)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in203</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN203_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in203" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>203)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in204</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN204_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in204" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>204)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in205</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN205_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in205" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>205)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in206</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN206_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in206" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>206)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in207</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN207_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in207" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>207)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in208</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN208_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in208" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>208)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in209</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN209_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in209" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>209)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in210</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN210_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in210" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>210)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in211</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN211_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in211" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>211)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in212</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN212_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in212" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>212)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in213</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN213_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in213" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>213)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in214</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN214_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in214" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>214)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in215</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN215_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in215" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>215)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in216</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN216_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in216" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>216)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in217</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN217_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in217" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>217)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in218</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN218_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in218" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>218)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in219</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN219_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in219" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>219)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in220</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN220_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in220" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>220)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in221</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN221_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in221" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>221)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in222</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN222_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in222" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>222)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in223</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN223_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in223" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>223)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in224</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN224_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in224" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>224)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in225</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN225_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in225" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>225)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in226</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN226_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in226" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>226)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in227</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN227_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in227" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>227)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in228</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN228_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in228" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>228)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in229</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN229_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in229" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>229)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in230</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN230_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in230" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>230)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in231</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN231_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in231" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>231)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in232</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN232_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in232" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>232)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in233</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN233_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in233" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>233)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in234</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN234_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in234" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>234)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in235</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN235_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in235" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>235)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in236</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN236_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in236" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>236)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in237</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN237_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in237" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>237)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in238</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN238_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in238" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>238)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in239</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN239_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in239" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>239)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in240</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN240_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in240" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>240)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in241</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN241_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in241" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>241)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in242</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN242_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in242" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>242)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in243</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN243_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in243" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>243)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in244</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN244_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in244" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>244)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in245</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN245_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in245" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>245)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in246</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN246_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in246" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>246)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in247</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN247_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in247" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>247)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in248</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN248_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in248" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>248)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in249</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN249_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in249" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>249)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in250</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN250_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in250" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>250)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in251</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN251_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in251" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>251)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in252</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN252_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in252" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>252)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in253</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN253_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in253" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>253)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in254</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN254_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in254" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>254)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_in255</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_IN255_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- <spirit:driver>
- <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
- </spirit:driver>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_in255" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_IN')>255)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT0_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out0" xilinx:dependency="((id('PARAM_VALUE.C_NUM_PROBE_OUT')>0))">true</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT1_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out1" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>1)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out2</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT2_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out2" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>2)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out3</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT3_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out3" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>3)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out4</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT4_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out4" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>4)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out5</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT5_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out5" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>5)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out6</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT6_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out6" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>6)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out7</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT7_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out7" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>7)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out8</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT8_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out8" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>8)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out9</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT9_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out9" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>9)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out10</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT10_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out10" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>10)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out11</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT11_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out11" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>11)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out12</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT12_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out12" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>12)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out13</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT13_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out13" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>13)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out14</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT14_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out14" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>14)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out15</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT15_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out15" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>15)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out16</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT16_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out16" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>16)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out17</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT17_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out17" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>17)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out18</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT18_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out18" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>18)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out19</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT19_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out19" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>19)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out20</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT20_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out20" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>20)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out21</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT21_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out21" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>21)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out22</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT22_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out22" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>22)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out23</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT23_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out23" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>23)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out24</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT24_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out24" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>24)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out25</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT25_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out25" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>25)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out26</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT26_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out26" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>26)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out27</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT27_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out27" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>27)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out28</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT28_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out28" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>28)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out29</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT29_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out29" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>29)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out30</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT30_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out30" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>30)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out31</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT31_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out31" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>31)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out32</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT32_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out32" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>32)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out33</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT33_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out33" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>33)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out34</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT34_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out34" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>34)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out35</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT35_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out35" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>35)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out36</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT36_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out36" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>36)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out37</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT37_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out37" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>37)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out38</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT38_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out38" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>38)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out39</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT39_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out39" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>39)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out40</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT40_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out40" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>40)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out41</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT41_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out41" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>41)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out42</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT42_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out42" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>42)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out43</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT43_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out43" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>43)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out44</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT44_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out44" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>44)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out45</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT45_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out45" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>45)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out46</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT46_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out46" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>46)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out47</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT47_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out47" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>47)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out48</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT48_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out48" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>48)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out49</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT49_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out49" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>49)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out50</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT50_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out50" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>50)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out51</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT51_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out51" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>51)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out52</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT52_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out52" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>52)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out53</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT53_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out53" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>53)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out54</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT54_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out54" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>54)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out55</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT55_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out55" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>55)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out56</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT56_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out56" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>56)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out57</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT57_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out57" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>57)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out58</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT58_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out58" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>58)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out59</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT59_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out59" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>59)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out60</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT60_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out60" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>60)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out61</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT61_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out61" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>61)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out62</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT62_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out62" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>62)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out63</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT63_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out63" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>63)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out64</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT64_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out64" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>64)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out65</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT65_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out65" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>65)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out66</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT66_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out66" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>66)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out67</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT67_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out67" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>67)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out68</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT68_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out68" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>68)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out69</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT69_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out69" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>69)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out70</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT70_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out70" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>70)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out71</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT71_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out71" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>71)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out72</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT72_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out72" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>72)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out73</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT73_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out73" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>73)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out74</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT74_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out74" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>74)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out75</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT75_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out75" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>75)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out76</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT76_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out76" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>76)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out77</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT77_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out77" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>77)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out78</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT78_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out78" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>78)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out79</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT79_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out79" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>79)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out80</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT80_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out80" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>80)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out81</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT81_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out81" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>81)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out82</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT82_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out82" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>82)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out83</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT83_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out83" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>83)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out84</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT84_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out84" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>84)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out85</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT85_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out85" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>85)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out86</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT86_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out86" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>86)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out87</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT87_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out87" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>87)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out88</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT88_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out88" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>88)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out89</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT89_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out89" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>89)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out90</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT90_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out90" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>90)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out91</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT91_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out91" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>91)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out92</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT92_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out92" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>92)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out93</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT93_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out93" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>93)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out94</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT94_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out94" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>94)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out95</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT95_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out95" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>95)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out96</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT96_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out96" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>96)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out97</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT97_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out97" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>97)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out98</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT98_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out98" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>98)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out99</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT99_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out99" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>99)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out100</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT100_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out100" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>100)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out101</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT101_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out101" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>101)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out102</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT102_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out102" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>102)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out103</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT103_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out103" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>103)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out104</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT104_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out104" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>104)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out105</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT105_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out105" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>105)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out106</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT106_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out106" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>106)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out107</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT107_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out107" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>107)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out108</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT108_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out108" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>108)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out109</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT109_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out109" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>109)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out110</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT110_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out110" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>110)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out111</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT111_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out111" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>111)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out112</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT112_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out112" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>112)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out113</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT113_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out113" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>113)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out114</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT114_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out114" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>114)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out115</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT115_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out115" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>115)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out116</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT116_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out116" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>116)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out117</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT117_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out117" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>117)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out118</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT118_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out118" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>118)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out119</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT119_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out119" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>119)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out120</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT120_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out120" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>120)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out121</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT121_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out121" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>121)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out122</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT122_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out122" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>122)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out123</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT123_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out123" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>123)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out124</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT124_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out124" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>124)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out125</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT125_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out125" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>125)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out126</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT126_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out126" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>126)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out127</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT127_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out127" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>127)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out128</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT128_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out128" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>128)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out129</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT129_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out129" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>129)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out130</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT130_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out130" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>130)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out131</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT131_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out131" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>131)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out132</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT132_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out132" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>132)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out133</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT133_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out133" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>133)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out134</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT134_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out134" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>134)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out135</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT135_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out135" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>135)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out136</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT136_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out136" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>136)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out137</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT137_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out137" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>137)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out138</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT138_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out138" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>138)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out139</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT139_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out139" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>139)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out140</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT140_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out140" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>140)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out141</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT141_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out141" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>141)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out142</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT142_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out142" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>142)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out143</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT143_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out143" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>143)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out144</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT144_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out144" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>144)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out145</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT145_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out145" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>145)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out146</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT146_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out146" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>146)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out147</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT147_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out147" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>147)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out148</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT148_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out148" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>148)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out149</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT149_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out149" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>149)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out150</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT150_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out150" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>150)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out151</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT151_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out151" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>151)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out152</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT152_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out152" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>152)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out153</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT153_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out153" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>153)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out154</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT154_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out154" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>154)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out155</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT155_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out155" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>155)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out156</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT156_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out156" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>156)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out157</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT157_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out157" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>157)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out158</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT158_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out158" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>158)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out159</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT159_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out159" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>159)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out160</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT160_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out160" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>160)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out161</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT161_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out161" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>161)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out162</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT162_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out162" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>162)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out163</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT163_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out163" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>163)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out164</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT164_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out164" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>164)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out165</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT165_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out165" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>165)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out166</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT166_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out166" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>166)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out167</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT167_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out167" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>167)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out168</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT168_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out168" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>168)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out169</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT169_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out169" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>169)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out170</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT170_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out170" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>170)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out171</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT171_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out171" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>171)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out172</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT172_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out172" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>172)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out173</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT173_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out173" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>173)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out174</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT174_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out174" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>174)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out175</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT175_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out175" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>175)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out176</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT176_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out176" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>176)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out177</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT177_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out177" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>177)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out178</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT178_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out178" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>178)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out179</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT179_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out179" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>179)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out180</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT180_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out180" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>180)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out181</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT181_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out181" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>181)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out182</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT182_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out182" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>182)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out183</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT183_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out183" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>183)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out184</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT184_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out184" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>184)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out185</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT185_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out185" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>185)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out186</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT186_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out186" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>186)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out187</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT187_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out187" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>187)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out188</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT188_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out188" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>188)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out189</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT189_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out189" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>189)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out190</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT190_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out190" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>190)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out191</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT191_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out191" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>191)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out192</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT192_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out192" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>192)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out193</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT193_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out193" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>193)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out194</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT194_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out194" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>194)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out195</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT195_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out195" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>195)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out196</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT196_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out196" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>196)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out197</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT197_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out197" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>197)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out198</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT198_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out198" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>198)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out199</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT199_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out199" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>199)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out200</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT200_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out200" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>200)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out201</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT201_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out201" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>201)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out202</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT202_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out202" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>202)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out203</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT203_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out203" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>203)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out204</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT204_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out204" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>204)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out205</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT205_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out205" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>205)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out206</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT206_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out206" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>206)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out207</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT207_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out207" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>207)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out208</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT208_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out208" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>208)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out209</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT209_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out209" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>209)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out210</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT210_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out210" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>210)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out211</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT211_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out211" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>211)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out212</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT212_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out212" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>212)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out213</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT213_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out213" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>213)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out214</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT214_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out214" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>214)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out215</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT215_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out215" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>215)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out216</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT216_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out216" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>216)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out217</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT217_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out217" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>217)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out218</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT218_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out218" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>218)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out219</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT219_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out219" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>219)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out220</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT220_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out220" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>220)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out221</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT221_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out221" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>221)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out222</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT222_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out222" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>222)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out223</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT223_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out223" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>223)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out224</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT224_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out224" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>224)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out225</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT225_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out225" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>225)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out226</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT226_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out226" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>226)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out227</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT227_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out227" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>227)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out228</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT228_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out228" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>228)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out229</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT229_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out229" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>229)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out230</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT230_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out230" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>230)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out231</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT231_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out231" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>231)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out232</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT232_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out232" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>232)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out233</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT233_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out233" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>233)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out234</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT234_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out234" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>234)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out235</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT235_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out235" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>235)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out236</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT236_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out236" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>236)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out237</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT237_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out237" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>237)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out238</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT238_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out238" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>238)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out239</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT239_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out239" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>239)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out240</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT240_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out240" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>240)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out241</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT241_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out241" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>241)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out242</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT242_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out242" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>242)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out243</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT243_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out243" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>243)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out244</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT244_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out244" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>244)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out245</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT245_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out245" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>245)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out246</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT246_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out246" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>246)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out247</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT247_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out247" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>247)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out248</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT248_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out248" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>248)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out249</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT249_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out249" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>249)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out250</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT250_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out250" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>250)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out251</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT251_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out251" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>251)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out252</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT252_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out252" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>252)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out253</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT253_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out253" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>253)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out254</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT254_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out254" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>254)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- <spirit:port>
- <spirit:name>probe_out255</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left spirit:format="long" spirit:resolve="dependent" spirit:dependency="(spirit:decode(id('MODELPARAM_VALUE.C_PROBE_OUT255_WIDTH')) - 1)">0</spirit:left>
- <spirit:right spirit:format="long">0</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>std_logic_vector</spirit:typeName>
- <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- <spirit:vendorExtensions>
- <xilinx:portInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:resolve="dependent" xilinx:id="PORT_ENABLEMENT.probe_out255" xilinx:dependency="(id('PARAM_VALUE.C_NUM_PROBE_OUT')>255)">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:portInfo>
- </spirit:vendorExtensions>
- </spirit:port>
- </spirit:ports>
- <spirit:modelParameters>
- <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="string">
- <spirit:name>C_XLNX_HW_PROBE_INFO</spirit:name>
- <spirit:displayName>C Xlnx Hw Probe Info</spirit:displayName>
- <spirit:value spirit:id="MODELPARAM_VALUE.C_XLNX_HW_PROBE_INFO">DEFAULT</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="string">
- <spirit:name>C_XDEVICEFAMILY</spirit:name>
- <spirit:value spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_XDEVICEFAMILY">zynq</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CORE_TYPE</spirit:name>
- <spirit:displayName>C Core Type</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CORE_TYPE">2</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CORE_INFO1</spirit:name>
- <spirit:displayName>C Core Info1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CORE_INFO1">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CORE_INFO2</spirit:name>
- <spirit:displayName>C Core Info2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CORE_INFO2">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_MAJOR_VERSION</spirit:name>
- <spirit:displayName>C Major Version</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_MAJOR_VERSION">2013</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_MINOR_VERSION</spirit:name>
- <spirit:displayName>C Minor Version</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_MINOR_VERSION">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_BUILD_REVISION</spirit:name>
- <spirit:displayName>C Build Revision</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_BUILD_REVISION">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CORE_MAJOR_VER</spirit:name>
- <spirit:displayName>C Core Major Ver</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CORE_MAJOR_VER">2</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CORE_MINOR_VER</spirit:name>
- <spirit:displayName>C Core Minor Ver</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CORE_MINOR_VER">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CORE_MINOR_ALPHA_VER</spirit:name>
- <spirit:displayName>C Core Minor Alpha Ver</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CORE_MINOR_ALPHA_VER">97</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_XSDB_SLAVE_TYPE</spirit:name>
- <spirit:displayName>C Xsdb Slave Type</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_XSDB_SLAVE_TYPE">33</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_NEXT_SLAVE</spirit:name>
- <spirit:displayName>C Next Slave</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_NEXT_SLAVE">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_CSE_DRV_VER</spirit:name>
- <spirit:displayName>C Cse Drv Ver</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_CSE_DRV_VER">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_USE_TEST_REG</spirit:name>
- <spirit:displayName>C Use Test Reg</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_USE_TEST_REG">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PIPE_IFACE</spirit:name>
- <spirit:displayName>C Pipe Iface</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_PIPE_IFACE">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_BUS_ADDR_WIDTH</spirit:name>
- <spirit:displayName>C Bus Addr Width</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_BUS_ADDR_WIDTH">17</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_BUS_DATA_WIDTH</spirit:name>
- <spirit:displayName>C Bus Data Width</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MODELPARAM_VALUE.C_BUS_DATA_WIDTH">16</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_NUM_PROBE_IN</spirit:name>
- <spirit:displayName>Input Probe Count</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_NUM_PROBE_IN" spirit:minimum="0" spirit:maximum="256" spirit:rangeType="long">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_EN_PROBE_IN_ACTIVITY</spirit:name>
- <spirit:displayName>Enable Input Probe Activity Detectors</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_EN_PROBE_IN_ACTIVITY">0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_NUM_PROBE_OUT</spirit:name>
- <spirit:displayName>Output Probe Count</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_NUM_PROBE_OUT" spirit:minimum="0" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_EN_SYNCHRONIZATION</spirit:name>
- <spirit:displayName>C En Synchronization</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_EN_SYNCHRONIZATION" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_EN_SYNCHRONIZATION')))">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN0_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN0 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN0_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN0_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN1_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN1 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN1_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN1_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN2_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN2 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN2_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN2_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN3_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN3 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN3_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN3_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN4_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN4 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN4_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN4_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN5_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN5 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN5_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN5_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN6_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN6 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN6_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN6_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN7_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN7 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN7_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN7_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN8_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN8 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN8_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN8_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN9_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN9 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN9_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN9_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN10_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN10 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN10_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN10_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN11_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN11 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN11_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN11_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN12_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN12 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN12_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN12_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN13_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN13 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN13_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN13_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN14_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN14 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN14_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN14_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN15_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN15 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN15_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN15_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN16_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN16 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN16_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN16_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN17_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN17 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN17_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN17_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN18_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN18 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN18_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN18_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN19_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN19 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN19_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN19_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN20_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN20 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN20_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN20_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN21_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN21 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN21_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN21_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN22_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN22 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN22_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN22_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN23_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN23 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN23_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN23_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN24_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN24 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN24_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN24_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN25_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN25 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN25_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN25_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN26_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN26 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN26_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN26_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN27_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN27 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN27_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN27_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN28_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN28 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN28_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN28_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN29_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN29 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN29_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN29_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN30_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN30 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN30_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN30_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN31_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN31 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN31_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN31_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN32_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN32 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN32_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN32_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN33_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN33 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN33_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN33_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN34_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN34 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN34_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN34_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN35_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN35 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN35_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN35_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN36_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN36 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN36_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN36_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN37_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN37 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN37_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN37_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN38_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN38 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN38_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN38_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN39_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN39 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN39_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN39_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN40_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN40 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN40_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN40_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN41_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN41 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN41_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN41_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN42_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN42 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN42_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN42_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN43_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN43 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN43_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN43_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN44_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN44 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN44_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN44_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN45_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN45 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN45_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN45_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN46_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN46 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN46_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN46_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN47_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN47 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN47_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN47_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN48_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN48 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN48_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN48_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN49_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN49 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN49_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN49_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN50_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN50 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN50_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN50_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN51_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN51 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN51_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN51_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN52_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN52 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN52_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN52_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN53_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN53 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN53_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN53_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN54_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN54 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN54_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN54_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN55_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN55 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN55_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN55_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN56_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN56 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN56_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN56_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN57_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN57 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN57_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN57_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN58_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN58 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN58_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN58_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN59_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN59 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN59_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN59_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN60_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN60 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN60_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN60_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN61_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN61 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN61_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN61_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN62_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN62 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN62_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN62_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN63_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN63 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN63_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN63_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN64_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN64 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN64_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN64_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN65_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN65 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN65_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN65_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN66_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN66 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN66_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN66_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN67_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN67 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN67_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN67_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN68_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN68 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN68_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN68_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN69_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN69 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN69_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN69_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN70_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN70 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN70_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN70_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN71_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN71 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN71_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN71_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN72_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN72 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN72_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN72_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN73_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN73 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN73_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN73_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN74_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN74 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN74_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN74_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN75_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN75 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN75_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN75_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN76_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN76 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN76_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN76_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN77_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN77 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN77_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN77_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN78_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN78 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN78_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN78_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN79_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN79 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN79_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN79_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN80_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN80 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN80_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN80_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN81_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN81 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN81_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN81_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN82_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN82 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN82_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN82_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN83_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN83 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN83_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN83_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN84_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN84 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN84_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN84_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN85_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN85 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN85_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN85_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN86_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN86 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN86_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN86_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN87_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN87 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN87_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN87_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN88_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN88 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN88_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN88_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN89_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN89 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN89_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN89_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN90_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN90 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN90_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN90_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN91_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN91 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN91_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN91_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN92_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN92 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN92_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN92_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN93_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN93 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN93_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN93_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN94_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN94 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN94_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN94_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN95_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN95 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN95_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN95_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN96_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN96 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN96_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN96_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN97_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN97 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN97_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN97_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN98_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN98 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN98_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN98_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN99_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN99 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN99_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN99_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN100_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN100 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN100_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN100_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN101_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN101 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN101_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN101_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN102_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN102 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN102_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN102_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN103_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN103 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN103_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN103_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN104_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN104 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN104_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN104_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN105_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN105 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN105_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN105_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN106_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN106 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN106_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN106_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN107_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN107 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN107_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN107_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN108_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN108 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN108_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN108_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN109_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN109 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN109_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN109_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN110_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN110 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN110_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN110_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN111_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN111 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN111_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN111_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN112_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN112 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN112_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN112_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN113_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN113 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN113_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN113_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN114_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN114 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN114_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN114_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN115_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN115 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN115_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN115_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN116_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN116 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN116_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN116_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN117_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN117 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN117_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN117_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN118_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN118 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN118_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN118_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN119_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN119 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN119_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN119_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN120_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN120 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN120_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN120_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN121_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN121 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN121_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN121_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN122_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN122 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN122_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN122_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN123_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN123 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN123_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN123_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN124_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN124 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN124_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN124_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN125_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN125 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN125_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN125_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN126_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN126 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN126_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN126_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN127_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN127 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN127_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN127_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN128_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN128 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN128_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN128_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN129_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN129 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN129_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN129_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN130_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN130 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN130_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN130_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN131_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN131 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN131_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN131_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN132_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN132 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN132_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN132_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN133_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN133 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN133_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN133_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN134_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN134 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN134_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN134_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN135_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN135 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN135_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN135_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN136_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN136 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN136_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN136_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN137_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN137 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN137_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN137_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN138_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN138 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN138_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN138_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN139_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN139 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN139_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN139_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN140_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN140 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN140_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN140_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN141_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN141 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN141_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN141_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN142_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN142 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN142_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN142_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN143_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN143 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN143_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN143_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN144_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN144 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN144_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN144_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN145_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN145 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN145_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN145_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN146_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN146 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN146_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN146_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN147_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN147 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN147_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN147_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN148_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN148 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN148_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN148_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN149_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN149 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN149_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN149_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN150_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN150 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN150_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN150_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN151_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN151 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN151_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN151_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN152_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN152 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN152_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN152_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN153_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN153 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN153_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN153_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN154_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN154 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN154_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN154_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN155_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN155 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN155_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN155_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN156_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN156 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN156_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN156_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN157_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN157 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN157_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN157_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN158_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN158 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN158_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN158_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN159_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN159 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN159_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN159_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN160_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN160 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN160_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN160_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN161_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN161 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN161_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN161_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN162_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN162 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN162_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN162_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN163_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN163 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN163_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN163_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN164_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN164 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN164_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN164_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN165_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN165 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN165_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN165_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN166_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN166 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN166_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN166_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN167_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN167 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN167_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN167_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN168_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN168 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN168_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN168_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN169_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN169 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN169_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN169_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN170_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN170 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN170_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN170_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN171_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN171 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN171_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN171_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN172_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN172 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN172_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN172_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN173_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN173 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN173_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN173_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN174_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN174 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN174_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN174_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN175_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN175 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN175_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN175_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN176_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN176 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN176_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN176_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN177_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN177 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN177_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN177_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN178_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN178 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN178_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN178_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN179_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN179 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN179_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN179_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN180_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN180 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN180_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN180_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN181_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN181 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN181_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN181_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN182_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN182 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN182_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN182_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN183_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN183 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN183_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN183_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN184_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN184 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN184_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN184_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN185_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN185 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN185_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN185_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN186_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN186 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN186_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN186_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN187_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN187 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN187_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN187_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN188_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN188 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN188_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN188_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN189_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN189 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN189_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN189_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN190_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN190 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN190_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN190_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN191_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN191 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN191_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN191_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN192_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN192 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN192_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN192_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN193_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN193 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN193_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN193_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN194_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN194 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN194_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN194_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN195_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN195 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN195_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN195_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN196_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN196 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN196_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN196_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN197_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN197 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN197_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN197_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN198_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN198 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN198_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN198_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN199_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN199 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN199_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN199_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN200_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN200 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN200_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN200_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN201_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN201 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN201_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN201_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN202_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN202 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN202_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN202_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN203_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN203 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN203_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN203_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN204_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN204 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN204_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN204_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN205_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN205 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN205_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN205_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN206_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN206 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN206_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN206_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN207_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN207 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN207_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN207_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN208_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN208 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN208_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN208_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN209_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN209 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN209_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN209_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN210_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN210 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN210_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN210_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN211_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN211 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN211_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN211_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN212_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN212 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN212_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN212_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN213_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN213 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN213_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN213_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN214_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN214 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN214_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN214_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN215_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN215 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN215_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN215_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN216_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN216 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN216_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN216_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN217_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN217 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN217_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN217_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN218_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN218 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN218_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN218_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN219_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN219 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN219_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN219_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN220_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN220 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN220_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN220_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN221_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN221 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN221_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN221_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN222_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN222 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN222_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN222_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN223_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN223 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN223_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN223_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN224_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN224 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN224_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN224_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN225_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN225 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN225_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN225_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN226_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN226 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN226_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN226_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN227_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN227 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN227_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN227_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN228_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN228 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN228_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN228_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN229_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN229 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN229_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN229_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN230_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN230 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN230_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN230_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN231_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN231 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN231_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN231_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN232_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN232 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN232_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN232_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN233_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN233 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN233_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN233_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN234_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN234 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN234_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN234_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN235_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN235 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN235_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN235_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN236_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN236 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN236_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN236_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN237_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN237 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN237_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN237_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN238_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN238 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN238_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN238_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN239_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN239 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN239_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN239_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN240_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN240 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN240_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN240_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN241_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN241 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN241_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN241_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN242_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN242 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN242_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN242_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN243_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN243 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN243_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN243_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN244_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN244 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN244_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN244_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN245_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN245 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN245_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN245_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN246_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN246 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN246_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN246_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN247_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN247 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN247_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN247_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN248_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN248 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN248_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN248_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN249_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN249 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN249_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN249_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN250_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN250 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN250_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN250_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN251_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN251 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN251_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN251_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN252_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN252 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN252_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN252_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN253_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN253 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN253_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN253_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN254_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN254 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN254_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN254_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_IN255_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN255 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_IN255_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_IN255_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT0_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT0 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT0_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT0_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT1_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT1 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT1_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT1_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT2_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT2 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT2_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT2_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT3_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT3 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT3_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT3_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT4_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT4 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT4_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT4_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT5_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT5 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT5_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT5_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT6_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT6 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT6_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT6_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT7_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT7 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT7_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT7_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT8_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT8 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT8_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT8_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT9_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT9 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT9_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT9_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT10_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT10 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT10_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT10_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT11_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT11 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT11_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT11_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT12_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT12 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT12_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT12_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT13_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT13 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT13_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT13_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT14_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT14 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT14_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT14_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT15_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT15 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT15_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT15_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT16_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT16 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT16_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT16_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT17_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT17 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT17_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT17_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT18_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT18 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT18_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT18_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT19_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT19 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT19_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT19_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT20_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT20 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT20_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT20_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT21_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT21 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT21_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT21_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT22_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT22 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT22_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT22_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT23_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT23 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT23_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT23_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT24_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT24 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT24_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT24_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT25_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT25 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT25_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT25_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT26_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT26 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT26_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT26_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT27_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT27 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT27_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT27_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT28_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT28 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT28_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT28_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT29_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT29 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT29_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT29_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT30_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT30 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT30_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT30_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT31_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT31 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT31_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT31_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT32_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT32 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT32_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT32_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT33_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT33 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT33_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT33_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT34_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT34 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT34_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT34_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT35_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT35 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT35_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT35_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT36_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT36 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT36_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT36_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT37_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT37 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT37_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT37_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT38_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT38 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT38_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT38_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT39_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT39 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT39_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT39_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT40_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT40 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT40_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT40_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT41_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT41 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT41_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT41_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT42_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT42 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT42_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT42_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT43_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT43 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT43_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT43_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT44_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT44 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT44_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT44_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT45_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT45 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT45_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT45_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT46_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT46 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT46_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT46_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT47_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT47 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT47_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT47_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT48_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT48 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT48_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT48_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT49_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT49 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT49_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT49_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT50_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT50 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT50_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT50_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT51_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT51 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT51_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT51_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT52_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT52 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT52_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT52_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT53_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT53 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT53_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT53_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT54_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT54 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT54_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT54_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT55_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT55 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT55_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT55_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT56_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT56 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT56_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT56_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT57_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT57 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT57_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT57_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT58_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT58 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT58_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT58_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT59_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT59 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT59_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT59_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT60_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT60 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT60_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT60_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT61_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT61 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT61_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT61_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT62_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT62 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT62_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT62_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT63_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT63 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT63_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT63_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT64_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT64 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT64_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT64_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT65_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT65 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT65_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT65_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT66_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT66 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT66_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT66_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT67_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT67 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT67_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT67_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT68_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT68 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT68_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT68_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT69_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT69 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT69_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT69_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT70_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT70 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT70_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT70_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT71_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT71 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT71_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT71_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT72_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT72 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT72_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT72_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT73_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT73 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT73_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT73_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT74_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT74 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT74_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT74_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT75_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT75 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT75_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT75_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT76_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT76 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT76_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT76_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT77_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT77 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT77_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT77_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT78_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT78 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT78_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT78_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT79_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT79 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT79_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT79_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT80_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT80 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT80_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT80_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT81_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT81 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT81_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT81_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT82_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT82 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT82_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT82_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT83_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT83 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT83_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT83_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT84_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT84 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT84_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT84_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT85_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT85 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT85_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT85_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT86_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT86 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT86_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT86_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT87_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT87 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT87_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT87_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT88_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT88 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT88_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT88_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT89_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT89 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT89_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT89_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT90_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT90 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT90_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT90_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT91_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT91 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT91_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT91_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT92_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT92 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT92_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT92_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT93_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT93 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT93_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT93_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT94_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT94 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT94_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT94_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT95_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT95 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT95_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT95_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT96_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT96 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT96_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT96_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT97_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT97 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT97_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT97_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT98_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT98 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT98_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT98_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT99_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT99 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT99_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT99_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT100_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT100 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT100_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT100_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT101_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT101 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT101_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT101_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT102_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT102 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT102_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT102_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT103_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT103 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT103_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT103_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT104_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT104 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT104_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT104_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT105_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT105 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT105_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT105_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT106_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT106 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT106_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT106_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT107_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT107 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT107_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT107_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT108_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT108 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT108_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT108_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT109_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT109 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT109_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT109_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT110_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT110 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT110_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT110_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT111_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT111 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT111_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT111_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT112_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT112 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT112_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT112_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT113_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT113 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT113_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT113_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT114_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT114 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT114_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT114_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT115_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT115 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT115_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT115_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT116_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT116 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT116_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT116_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT117_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT117 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT117_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT117_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT118_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT118 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT118_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT118_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT119_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT119 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT119_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT119_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT120_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT120 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT120_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT120_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT121_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT121 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT121_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT121_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT122_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT122 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT122_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT122_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT123_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT123 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT123_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT123_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT124_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT124 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT124_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT124_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT125_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT125 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT125_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT125_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT126_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT126 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT126_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT126_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT127_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT127 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT127_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT127_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT128_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT128 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT128_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT128_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT129_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT129 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT129_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT129_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT130_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT130 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT130_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT130_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT131_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT131 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT131_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT131_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT132_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT132 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT132_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT132_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT133_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT133 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT133_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT133_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT134_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT134 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT134_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT134_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT135_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT135 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT135_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT135_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT136_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT136 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT136_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT136_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT137_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT137 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT137_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT137_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT138_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT138 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT138_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT138_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT139_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT139 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT139_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT139_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT140_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT140 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT140_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT140_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT141_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT141 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT141_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT141_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT142_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT142 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT142_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT142_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT143_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT143 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT143_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT143_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT144_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT144 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT144_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT144_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT145_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT145 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT145_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT145_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT146_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT146 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT146_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT146_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT147_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT147 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT147_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT147_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT148_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT148 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT148_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT148_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT149_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT149 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT149_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT149_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT150_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT150 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT150_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT150_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT151_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT151 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT151_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT151_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT152_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT152 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT152_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT152_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT153_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT153 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT153_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT153_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT154_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT154 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT154_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT154_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT155_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT155 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT155_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT155_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT156_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT156 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT156_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT156_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT157_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT157 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT157_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT157_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT158_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT158 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT158_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT158_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT159_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT159 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT159_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT159_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT160_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT160 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT160_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT160_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT161_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT161 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT161_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT161_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT162_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT162 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT162_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT162_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT163_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT163 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT163_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT163_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT164_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT164 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT164_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT164_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT165_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT165 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT165_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT165_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT166_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT166 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT166_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT166_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT167_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT167 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT167_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT167_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT168_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT168 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT168_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT168_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT169_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT169 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT169_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT169_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT170_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT170 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT170_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT170_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT171_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT171 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT171_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT171_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT172_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT172 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT172_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT172_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT173_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT173 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT173_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT173_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT174_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT174 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT174_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT174_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT175_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT175 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT175_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT175_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT176_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT176 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT176_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT176_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT177_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT177 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT177_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT177_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT178_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT178 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT178_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT178_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT179_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT179 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT179_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT179_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT180_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT180 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT180_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT180_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT181_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT181 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT181_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT181_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT182_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT182 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT182_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT182_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT183_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT183 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT183_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT183_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT184_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT184 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT184_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT184_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT185_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT185 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT185_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT185_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT186_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT186 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT186_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT186_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT187_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT187 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT187_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT187_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT188_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT188 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT188_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT188_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT189_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT189 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT189_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT189_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT190_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT190 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT190_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT190_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT191_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT191 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT191_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT191_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT192_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT192 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT192_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT192_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT193_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT193 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT193_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT193_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT194_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT194 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT194_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT194_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT195_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT195 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT195_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT195_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT196_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT196 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT196_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT196_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT197_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT197 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT197_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT197_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT198_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT198 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT198_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT198_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT199_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT199 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT199_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT199_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT200_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT200 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT200_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT200_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT201_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT201 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT201_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT201_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT202_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT202 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT202_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT202_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT203_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT203 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT203_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT203_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT204_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT204 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT204_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT204_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT205_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT205 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT205_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT205_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT206_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT206 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT206_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT206_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT207_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT207 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT207_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT207_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT208_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT208 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT208_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT208_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT209_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT209 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT209_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT209_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT210_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT210 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT210_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT210_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT211_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT211 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT211_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT211_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT212_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT212 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT212_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT212_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT213_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT213 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT213_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT213_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT214_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT214 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT214_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT214_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT215_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT215 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT215_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT215_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT216_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT216 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT216_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT216_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT217_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT217 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT217_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT217_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT218_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT218 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT218_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT218_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT219_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT219 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT219_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT219_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT220_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT220 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT220_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT220_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT221_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT221 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT221_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT221_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT222_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT222 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT222_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT222_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT223_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT223 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT223_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT223_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT224_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT224 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT224_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT224_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT225_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT225 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT225_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT225_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT226_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT226 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT226_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT226_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT227_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT227 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT227_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT227_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT228_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT228 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT228_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT228_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT229_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT229 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT229_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT229_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT230_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT230 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT230_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT230_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT231_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT231 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT231_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT231_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT232_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT232 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT232_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT232_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT233_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT233 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT233_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT233_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT234_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT234 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT234_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT234_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT235_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT235 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT235_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT235_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT236_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT236 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT236_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT236_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT237_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT237 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT237_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT237_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT238_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT238 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT238_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT238_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT239_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT239 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT239_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT239_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT240_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT240 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT240_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT240_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT241_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT241 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT241_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT241_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT242_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT242 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT242_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT242_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT243_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT243 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT243_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT243_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT244_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT244 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT244_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT244_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT245_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT245 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT245_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT245_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT246_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT246 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT246_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT246_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT247_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT247 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT247_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT247_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT248_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT248 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT248_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT248_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT249_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT249 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT249_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT249_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT250_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT250 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT250_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT250_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT251_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT251 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT251_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT251_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT252_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT252 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT252_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT252_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT253_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT253 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT253_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT253_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT254_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT254 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT254_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT254_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT255_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT255 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT255_WIDTH" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT255_WIDTH')))" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT0_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT0 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT0_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT0_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT1_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT1 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT1_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT1_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT2_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT2 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT2_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT2_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT3_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT3 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT3_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT3_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT4_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT4 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT4_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT4_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT5_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT5 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT5_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT5_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT6_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT6 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT6_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT6_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT7_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT7 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT7_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT7_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT8_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT8 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT8_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT8_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT9_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT9 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT9_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT9_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT10_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT10 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT10_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT10_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT11_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT11 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT11_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT11_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT12_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT12 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT12_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT12_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT13_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT13 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT13_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT13_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT14_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT14 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT14_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT14_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT15_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT15 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT15_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT15_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT16_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT16 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT16_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT16_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT17_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT17 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT17_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT17_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT18_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT18 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT18_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT18_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT19_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT19 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT19_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT19_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT20_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT20 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT20_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT20_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT21_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT21 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT21_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT21_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT22_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT22 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT22_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT22_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT23_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT23 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT23_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT23_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT24_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT24 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT24_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT24_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT25_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT25 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT25_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT25_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT26_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT26 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT26_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT26_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT27_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT27 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT27_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT27_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT28_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT28 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT28_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT28_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT29_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT29 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT29_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT29_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT30_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT30 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT30_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT30_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT31_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT31 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT31_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT31_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT32_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT32 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT32_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT32_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT33_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT33 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT33_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT33_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT34_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT34 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT34_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT34_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT35_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT35 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT35_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT35_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT36_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT36 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT36_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT36_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT37_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT37 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT37_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT37_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT38_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT38 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT38_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT38_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT39_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT39 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT39_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT39_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT40_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT40 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT40_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT40_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT41_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT41 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT41_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT41_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT42_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT42 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT42_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT42_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT43_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT43 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT43_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT43_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT44_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT44 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT44_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT44_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT45_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT45 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT45_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT45_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT46_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT46 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT46_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT46_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT47_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT47 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT47_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT47_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT48_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT48 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT48_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT48_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT49_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT49 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT49_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT49_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT50_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT50 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT50_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT50_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT51_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT51 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT51_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT51_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT52_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT52 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT52_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT52_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT53_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT53 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT53_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT53_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT54_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT54 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT54_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT54_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT55_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT55 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT55_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT55_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT56_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT56 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT56_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT56_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT57_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT57 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT57_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT57_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT58_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT58 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT58_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT58_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT59_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT59 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT59_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT59_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT60_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT60 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT60_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT60_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT61_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT61 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT61_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT61_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT62_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT62 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT62_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT62_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT63_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT63 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT63_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT63_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT64_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT64 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT64_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT64_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT65_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT65 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT65_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT65_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT66_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT66 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT66_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT66_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT67_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT67 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT67_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT67_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT68_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT68 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT68_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT68_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT69_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT69 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT69_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT69_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT70_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT70 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT70_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT70_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT71_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT71 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT71_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT71_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT72_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT72 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT72_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT72_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT73_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT73 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT73_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT73_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT74_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT74 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT74_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT74_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT75_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT75 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT75_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT75_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT76_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT76 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT76_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT76_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT77_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT77 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT77_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT77_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT78_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT78 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT78_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT78_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT79_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT79 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT79_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT79_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT80_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT80 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT80_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT80_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT81_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT81 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT81_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT81_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT82_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT82 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT82_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT82_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT83_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT83 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT83_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT83_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT84_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT84 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT84_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT84_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT85_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT85 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT85_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT85_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT86_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT86 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT86_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT86_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT87_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT87 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT87_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT87_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT88_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT88 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT88_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT88_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT89_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT89 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT89_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT89_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT90_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT90 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT90_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT90_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT91_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT91 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT91_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT91_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT92_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT92 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT92_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT92_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT93_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT93 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT93_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT93_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT94_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT94 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT94_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT94_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT95_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT95 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT95_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT95_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT96_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT96 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT96_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT96_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT97_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT97 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT97_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT97_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT98_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT98 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT98_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT98_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT99_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT99 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT99_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT99_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT100_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT100 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT100_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT100_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT101_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT101 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT101_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT101_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT102_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT102 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT102_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT102_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT103_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT103 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT103_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT103_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT104_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT104 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT104_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT104_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT105_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT105 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT105_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT105_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT106_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT106 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT106_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT106_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT107_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT107 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT107_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT107_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT108_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT108 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT108_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT108_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT109_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT109 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT109_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT109_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT110_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT110 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT110_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT110_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT111_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT111 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT111_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT111_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT112_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT112 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT112_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT112_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT113_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT113 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT113_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT113_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT114_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT114 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT114_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT114_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT115_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT115 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT115_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT115_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT116_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT116 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT116_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT116_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT117_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT117 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT117_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT117_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT118_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT118 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT118_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT118_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT119_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT119 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT119_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT119_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT120_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT120 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT120_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT120_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT121_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT121 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT121_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT121_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT122_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT122 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT122_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT122_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT123_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT123 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT123_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT123_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT124_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT124 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT124_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT124_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT125_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT125 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT125_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT125_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT126_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT126 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT126_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT126_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT127_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT127 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT127_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT127_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT128_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT128 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT128_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT128_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT129_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT129 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT129_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT129_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT130_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT130 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT130_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT130_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT131_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT131 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT131_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT131_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT132_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT132 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT132_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT132_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT133_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT133 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT133_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT133_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT134_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT134 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT134_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT134_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT135_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT135 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT135_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT135_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT136_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT136 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT136_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT136_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT137_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT137 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT137_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT137_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT138_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT138 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT138_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT138_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT139_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT139 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT139_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT139_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT140_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT140 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT140_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT140_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT141_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT141 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT141_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT141_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT142_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT142 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT142_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT142_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT143_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT143 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT143_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT143_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT144_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT144 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT144_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT144_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT145_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT145 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT145_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT145_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT146_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT146 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT146_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT146_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT147_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT147 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT147_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT147_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT148_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT148 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT148_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT148_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT149_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT149 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT149_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT149_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT150_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT150 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT150_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT150_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT151_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT151 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT151_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT151_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT152_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT152 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT152_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT152_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT153_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT153 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT153_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT153_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT154_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT154 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT154_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT154_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT155_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT155 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT155_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT155_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT156_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT156 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT156_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT156_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT157_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT157 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT157_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT157_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT158_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT158 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT158_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT158_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT159_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT159 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT159_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT159_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT160_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT160 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT160_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT160_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT161_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT161 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT161_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT161_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT162_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT162 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT162_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT162_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT163_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT163 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT163_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT163_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT164_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT164 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT164_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT164_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT165_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT165 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT165_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT165_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT166_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT166 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT166_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT166_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT167_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT167 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT167_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT167_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT168_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT168 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT168_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT168_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT169_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT169 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT169_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT169_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT170_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT170 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT170_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT170_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT171_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT171 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT171_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT171_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT172_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT172 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT172_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT172_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT173_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT173 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT173_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT173_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT174_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT174 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT174_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT174_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT175_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT175 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT175_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT175_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT176_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT176 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT176_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT176_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT177_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT177 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT177_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT177_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT178_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT178 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT178_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT178_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT179_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT179 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT179_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT179_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT180_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT180 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT180_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT180_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT181_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT181 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT181_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT181_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT182_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT182 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT182_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT182_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT183_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT183 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT183_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT183_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT184_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT184 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT184_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT184_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT185_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT185 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT185_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT185_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT186_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT186 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT186_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT186_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT187_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT187 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT187_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT187_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT188_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT188 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT188_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT188_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT189_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT189 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT189_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT189_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT190_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT190 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT190_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT190_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT191_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT191 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT191_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT191_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT192_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT192 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT192_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT192_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT193_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT193 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT193_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT193_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT194_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT194 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT194_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT194_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT195_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT195 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT195_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT195_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT196_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT196 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT196_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT196_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT197_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT197 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT197_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT197_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT198_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT198 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT198_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT198_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT199_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT199 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT199_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT199_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT200_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT200 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT200_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT200_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT201_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT201 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT201_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT201_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT202_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT202 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT202_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT202_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT203_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT203 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT203_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT203_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT204_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT204 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT204_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT204_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT205_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT205 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT205_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT205_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT206_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT206 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT206_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT206_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT207_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT207 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT207_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT207_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT208_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT208 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT208_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT208_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT209_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT209 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT209_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT209_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT210_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT210 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT210_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT210_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT211_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT211 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT211_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT211_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT212_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT212 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT212_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT212_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT213_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT213 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT213_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT213_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT214_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT214 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT214_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT214_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT215_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT215 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT215_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT215_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT216_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT216 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT216_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT216_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT217_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT217 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT217_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT217_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT218_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT218 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT218_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT218_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT219_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT219 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT219_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT219_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT220_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT220 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT220_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT220_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT221_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT221 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT221_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT221_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT222_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT222 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT222_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT222_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT223_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT223 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT223_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT223_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT224_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT224 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT224_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT224_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT225_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT225 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT225_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT225_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT226_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT226 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT226_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT226_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT227_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT227 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT227_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT227_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT228_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT228 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT228_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT228_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT229_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT229 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT229_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT229_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT230_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT230 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT230_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT230_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT231_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT231 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT231_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT231_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT232_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT232 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT232_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT232_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT233_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT233 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT233_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT233_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT234_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT234 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT234_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT234_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT235_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT235 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT235_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT235_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT236_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT236 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT236_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT236_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT237_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT237 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT237_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT237_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT238_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT238 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT238_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT238_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT239_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT239 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT239_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT239_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT240_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT240 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT240_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT240_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT241_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT241 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT241_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT241_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT242_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT242 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT242_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT242_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT243_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT243 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT243_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT243_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT244_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT244 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT244_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT244_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT245_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT245 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT245_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT245_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT246_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT246 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT246_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT246_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT247_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT247 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT247_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT247_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT248_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT248 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT248_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT248_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT249_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT249 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT249_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT249_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT250_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT250 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT250_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT250_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT251_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT251 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT251_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT251_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT252_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT252 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT252_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT252_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT253_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT253 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT253_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT253_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT254_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT254 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT254_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT254_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter spirit:dataType="integer">
- <spirit:name>C_PROBE_OUT255_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT255 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="dependent" spirit:id="MODELPARAM_VALUE.C_PROBE_OUT255_INIT_VAL" spirit:dependency="(spirit:decode(id('PARAM_VALUE.C_PROBE_OUT255_INIT_VAL')))" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:modelParameter>
- </spirit:modelParameters>
- </spirit:model>
- <spirit:choices>
- <spirit:choice>
- <spirit:name>choice_pairs_4873554b</spirit:name>
- <spirit:enumeration spirit:text="false">0</spirit:enumeration>
- <spirit:enumeration spirit:text="true">1</spirit:enumeration>
- </spirit:choice>
- </spirit:choices>
- <spirit:fileSets>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagesynthesis_xilinx_com_ip_ltlib_1_0__ref_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/1b7e/hdl/verilog/ltlib_v1_0_0_ver.vh</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>ltlib_v1_0_0</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/1b7e/hdl/verilog/ltlib_v1_0_0_lib_fn.vh</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>ltlib_v1_0_0</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/1b7e/hdl/ltlib_v1_0_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>ltlib_v1_0_0</spirit:logicalName>
- </spirit:file>
- <spirit:vendorExtensions>
- <xilinx:subCoreRef>
- <xilinx:componentRef xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="ltlib" xilinx:version="1.0" xilinx:isGenerated="true" xilinx:checksum="e276dc50">
- <xilinx:mode xilinx:name="copy_mode"/>
- </xilinx:componentRef>
- </xilinx:subCoreRef>
- </spirit:vendorExtensions>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagesynthesis_xilinx_com_ip_xsdbs_1_0__ref_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/122e/hdl/verilog/xsdbs_v1_0_2_i2x.vh</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>xsdbs_v1_0_2</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/122e/hdl/verilog/xsdbs_v1_0_2_in.vh</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>xsdbs_v1_0_2</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/122e/hdl/xsdbs_v1_0_vl_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>xsdbs_v1_0_2</spirit:logicalName>
- </spirit:file>
- <spirit:vendorExtensions>
- <xilinx:subCoreRef>
- <xilinx:componentRef xilinx:vendor="xilinx.com" xilinx:library="ip" xilinx:name="xsdbs" xilinx:version="1.0" xilinx:isGenerated="true" xilinx:checksum="4657874f">
- <xilinx:mode xilinx:name="copy_mode"/>
- </xilinx:componentRef>
- </xilinx:subCoreRef>
- </spirit:vendorExtensions>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>../../ipshared/46fd/hdl/vio_v3_0_19_vio_include.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:isIncludeFile>true</spirit:isIncludeFile>
- <spirit:logicalName>vio_v3_0_19</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0.xdc</spirit:name>
- <spirit:userFileType>xdc</spirit:userFileType>
- </spirit:file>
- <spirit:file>
- <spirit:name>../../ipshared/46fd/hdl/vio_v3_0_syn_rfs.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:logicalName>vio_v3_0_19</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_synthesisconstraints_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0_ooc.xdc</spirit:name>
- <spirit:userFileType>xdc</spirit:userFileType>
- <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
- <spirit:userFileType>USED_IN_out_of_context</spirit:userFileType>
- <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_verilogsynthesiswrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>synth/scalp_zynqps_vio_0_0.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_vhdlsimulationwrapper_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>sim/scalp_zynqps_vio_0_0.vhd</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- </spirit:file>
- </spirit:fileSet>
- <spirit:fileSet>
- <spirit:name>xilinx_externalfiles_view_fileset</spirit:name>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0.dcp</spirit:name>
- <spirit:userFileType>dcp</spirit:userFileType>
- <spirit:userFileType>USED_IN_implementation</spirit:userFileType>
- <spirit:userFileType>USED_IN_synthesis</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0_stub.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0_stub.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_synth_blackbox_stub</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0_sim_netlist.v</spirit:name>
- <spirit:fileType>verilogSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- <spirit:file>
- <spirit:name>scalp_zynqps_vio_0_0_sim_netlist.vhdl</spirit:name>
- <spirit:fileType>vhdlSource</spirit:fileType>
- <spirit:userFileType>USED_IN_simulation</spirit:userFileType>
- <spirit:userFileType>USED_IN_single_language</spirit:userFileType>
- <spirit:logicalName>xil_defaultlib</spirit:logicalName>
- </spirit:file>
- </spirit:fileSet>
- </spirit:fileSets>
- <spirit:description>The Virtual Input/Output (VIO) core is a customizable core that can both monitor and drive internal FPGA signals in real time. The number and width of the input and output ports are customizable in size to interface with the FPGA design. Because the VIO core is synchronous to the design being monitored and/or driven, all design clock constraints that are applied to your design are also applied to the components inside the VIO core. Run-time interaction with this core requires the use of the Vivado logic analyzer feature.</spirit:description>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT255_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT255 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT255_INIT_VAL" spirit:order="78200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT254_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT254 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT254_INIT_VAL" spirit:order="78100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT253_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT253 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT253_INIT_VAL" spirit:order="78000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT252_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT252 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT252_INIT_VAL" spirit:order="77900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT251_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT251 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT251_INIT_VAL" spirit:order="77800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT250_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT250 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT250_INIT_VAL" spirit:order="77700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT249_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT249 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT249_INIT_VAL" spirit:order="77600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT248_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT248 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT248_INIT_VAL" spirit:order="77500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT247_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT247 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT247_INIT_VAL" spirit:order="77400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT246_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT246 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT246_INIT_VAL" spirit:order="77300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT245_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT245 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT245_INIT_VAL" spirit:order="77200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT244_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT244 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT244_INIT_VAL" spirit:order="77100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT243_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT243 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT243_INIT_VAL" spirit:order="77000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT242_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT242 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT242_INIT_VAL" spirit:order="76900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT241_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT241 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT241_INIT_VAL" spirit:order="76800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT240_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT240 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT240_INIT_VAL" spirit:order="76700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT239_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT239 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT239_INIT_VAL" spirit:order="76600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT238_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT238 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT238_INIT_VAL" spirit:order="76500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT237_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT237 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT237_INIT_VAL" spirit:order="76400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT236_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT236 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT236_INIT_VAL" spirit:order="76300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT235_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT235 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT235_INIT_VAL" spirit:order="76200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT234_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT234 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT234_INIT_VAL" spirit:order="76100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT233_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT233 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT233_INIT_VAL" spirit:order="76000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT232_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT232 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT232_INIT_VAL" spirit:order="75900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT231_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT231 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT231_INIT_VAL" spirit:order="75800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT230_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT230 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT230_INIT_VAL" spirit:order="75700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT229_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT229 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT229_INIT_VAL" spirit:order="75600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT228_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT228 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT228_INIT_VAL" spirit:order="75500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT227_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT227 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT227_INIT_VAL" spirit:order="75400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT226_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT226 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT226_INIT_VAL" spirit:order="75300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT225_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT225 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT225_INIT_VAL" spirit:order="75200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT224_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT224 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT224_INIT_VAL" spirit:order="75100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT223_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT223 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT223_INIT_VAL" spirit:order="75000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT222_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT222 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT222_INIT_VAL" spirit:order="74900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT221_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT221 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT221_INIT_VAL" spirit:order="74800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT220_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT220 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT220_INIT_VAL" spirit:order="74700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT219_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT219 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT219_INIT_VAL" spirit:order="74600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT218_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT218 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT218_INIT_VAL" spirit:order="74500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT217_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT217 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT217_INIT_VAL" spirit:order="74400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT216_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT216 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT216_INIT_VAL" spirit:order="74300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT215_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT215 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT215_INIT_VAL" spirit:order="74200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT214_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT214 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT214_INIT_VAL" spirit:order="74100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT213_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT213 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT213_INIT_VAL" spirit:order="74000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT212_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT212 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT212_INIT_VAL" spirit:order="73900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT211_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT211 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT211_INIT_VAL" spirit:order="73800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT210_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT210 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT210_INIT_VAL" spirit:order="73700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT209_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT209 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT209_INIT_VAL" spirit:order="73600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT208_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT208 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT208_INIT_VAL" spirit:order="73500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT207_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT207 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT207_INIT_VAL" spirit:order="73400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT206_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT206 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT206_INIT_VAL" spirit:order="73300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT205_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT205 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT205_INIT_VAL" spirit:order="73200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT204_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT204 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT204_INIT_VAL" spirit:order="73100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT203_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT203 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT203_INIT_VAL" spirit:order="73000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT202_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT202 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT202_INIT_VAL" spirit:order="72900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT201_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT201 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT201_INIT_VAL" spirit:order="72800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT200_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT200 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT200_INIT_VAL" spirit:order="72700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT199_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT199 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT199_INIT_VAL" spirit:order="72600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT198_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT198 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT198_INIT_VAL" spirit:order="72500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT197_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT197 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT197_INIT_VAL" spirit:order="72400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT196_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT196 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT196_INIT_VAL" spirit:order="72300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT195_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT195 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT195_INIT_VAL" spirit:order="72200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT194_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT194 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT194_INIT_VAL" spirit:order="72100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT193_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT193 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT193_INIT_VAL" spirit:order="72000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT192_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT192 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT192_INIT_VAL" spirit:order="71900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT191_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT191 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT191_INIT_VAL" spirit:order="71800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT190_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT190 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT190_INIT_VAL" spirit:order="71700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT189_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT189 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT189_INIT_VAL" spirit:order="71600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT188_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT188 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT188_INIT_VAL" spirit:order="71500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT187_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT187 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT187_INIT_VAL" spirit:order="71400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT186_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT186 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT186_INIT_VAL" spirit:order="71300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT185_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT185 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT185_INIT_VAL" spirit:order="71200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT184_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT184 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT184_INIT_VAL" spirit:order="71100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT183_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT183 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT183_INIT_VAL" spirit:order="71000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT182_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT182 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT182_INIT_VAL" spirit:order="70900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT181_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT181 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT181_INIT_VAL" spirit:order="70800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT180_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT180 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT180_INIT_VAL" spirit:order="70700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT179_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT179 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT179_INIT_VAL" spirit:order="70600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT178_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT178 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT178_INIT_VAL" spirit:order="70500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT177_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT177 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT177_INIT_VAL" spirit:order="70400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT176_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT176 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT176_INIT_VAL" spirit:order="70300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT175_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT175 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT175_INIT_VAL" spirit:order="70200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT174_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT174 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT174_INIT_VAL" spirit:order="70100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT173_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT173 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT173_INIT_VAL" spirit:order="70000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT172_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT172 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT172_INIT_VAL" spirit:order="69900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT171_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT171 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT171_INIT_VAL" spirit:order="69800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT170_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT170 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT170_INIT_VAL" spirit:order="69700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT169_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT169 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT169_INIT_VAL" spirit:order="69600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT168_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT168 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT168_INIT_VAL" spirit:order="69500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT167_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT167 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT167_INIT_VAL" spirit:order="69400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT166_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT166 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT166_INIT_VAL" spirit:order="69300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT165_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT165 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT165_INIT_VAL" spirit:order="69200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT164_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT164 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT164_INIT_VAL" spirit:order="69100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT163_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT163 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT163_INIT_VAL" spirit:order="69000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT162_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT162 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT162_INIT_VAL" spirit:order="68900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT161_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT161 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT161_INIT_VAL" spirit:order="68800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT160_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT160 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT160_INIT_VAL" spirit:order="68700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT159_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT159 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT159_INIT_VAL" spirit:order="68600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT158_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT158 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT158_INIT_VAL" spirit:order="68500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT157_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT157 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT157_INIT_VAL" spirit:order="68400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT156_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT156 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT156_INIT_VAL" spirit:order="68300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT155_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT155 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT155_INIT_VAL" spirit:order="68200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT154_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT154 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT154_INIT_VAL" spirit:order="68100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT153_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT153 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT153_INIT_VAL" spirit:order="68000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT152_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT152 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT152_INIT_VAL" spirit:order="67900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT151_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT151 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT151_INIT_VAL" spirit:order="67800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT150_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT150 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT150_INIT_VAL" spirit:order="67700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT149_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT149 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT149_INIT_VAL" spirit:order="67600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT148_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT148 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT148_INIT_VAL" spirit:order="67500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT147_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT147 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT147_INIT_VAL" spirit:order="67400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT146_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT146 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT146_INIT_VAL" spirit:order="67300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT145_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT145 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT145_INIT_VAL" spirit:order="67200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT144_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT144 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT144_INIT_VAL" spirit:order="67100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT143_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT143 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT143_INIT_VAL" spirit:order="67000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT142_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT142 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT142_INIT_VAL" spirit:order="66900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT141_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT141 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT141_INIT_VAL" spirit:order="66800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT140_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT140 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT140_INIT_VAL" spirit:order="66700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT139_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT139 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT139_INIT_VAL" spirit:order="66600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT138_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT138 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT138_INIT_VAL" spirit:order="66500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT137_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT137 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT137_INIT_VAL" spirit:order="66400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT136_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT136 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT136_INIT_VAL" spirit:order="66300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT135_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT135 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT135_INIT_VAL" spirit:order="66200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT134_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT134 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT134_INIT_VAL" spirit:order="66100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT133_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT133 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT133_INIT_VAL" spirit:order="66000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT132_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT132 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT132_INIT_VAL" spirit:order="65900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT131_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT131 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT131_INIT_VAL" spirit:order="65800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT130_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT130 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT130_INIT_VAL" spirit:order="65700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT129_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT129 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT129_INIT_VAL" spirit:order="65600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT128_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT128 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT128_INIT_VAL" spirit:order="65500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT127_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT127 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT127_INIT_VAL" spirit:order="65400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT126_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT126 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT126_INIT_VAL" spirit:order="65300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT125_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT125 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT125_INIT_VAL" spirit:order="65200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT124_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT124 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT124_INIT_VAL" spirit:order="65100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT123_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT123 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT123_INIT_VAL" spirit:order="65000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT122_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT122 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT122_INIT_VAL" spirit:order="64900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT121_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT121 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT121_INIT_VAL" spirit:order="64800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT120_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT120 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT120_INIT_VAL" spirit:order="64700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT119_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT119 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT119_INIT_VAL" spirit:order="64600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT118_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT118 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT118_INIT_VAL" spirit:order="64500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT117_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT117 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT117_INIT_VAL" spirit:order="64400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT116_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT116 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT116_INIT_VAL" spirit:order="64300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT115_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT115 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT115_INIT_VAL" spirit:order="64200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT114_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT114 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT114_INIT_VAL" spirit:order="64100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT113_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT113 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT113_INIT_VAL" spirit:order="64000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT112_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT112 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT112_INIT_VAL" spirit:order="63900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT111_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT111 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT111_INIT_VAL" spirit:order="63800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT110_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT110 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT110_INIT_VAL" spirit:order="63700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT109_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT109 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT109_INIT_VAL" spirit:order="63600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT108_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT108 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT108_INIT_VAL" spirit:order="63500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT107_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT107 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT107_INIT_VAL" spirit:order="63400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT106_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT106 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT106_INIT_VAL" spirit:order="63300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT105_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT105 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT105_INIT_VAL" spirit:order="63200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT104_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT104 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT104_INIT_VAL" spirit:order="63100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT103_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT103 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT103_INIT_VAL" spirit:order="63000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT102_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT102 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT102_INIT_VAL" spirit:order="62900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT101_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT101 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT101_INIT_VAL" spirit:order="62800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT100_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT100 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT100_INIT_VAL" spirit:order="62700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT99_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT99 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT99_INIT_VAL" spirit:order="62600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT98_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT98 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT98_INIT_VAL" spirit:order="62500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT97_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT97 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT97_INIT_VAL" spirit:order="62400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT96_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT96 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT96_INIT_VAL" spirit:order="62300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT95_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT95 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT95_INIT_VAL" spirit:order="62200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT94_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT94 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT94_INIT_VAL" spirit:order="62100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT93_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT93 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT93_INIT_VAL" spirit:order="62000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT92_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT92 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT92_INIT_VAL" spirit:order="61900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT91_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT91 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT91_INIT_VAL" spirit:order="61800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT90_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT90 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT90_INIT_VAL" spirit:order="61700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT89_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT89 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT89_INIT_VAL" spirit:order="61600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT88_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT88 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT88_INIT_VAL" spirit:order="61500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT87_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT87 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT87_INIT_VAL" spirit:order="61400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT86_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT86 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT86_INIT_VAL" spirit:order="61300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT85_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT85 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT85_INIT_VAL" spirit:order="61200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT84_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT84 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT84_INIT_VAL" spirit:order="61100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT83_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT83 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT83_INIT_VAL" spirit:order="61000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT82_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT82 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT82_INIT_VAL" spirit:order="60900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT81_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT81 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT81_INIT_VAL" spirit:order="60800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT80_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT80 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT80_INIT_VAL" spirit:order="60700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT79_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT79 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT79_INIT_VAL" spirit:order="60600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT78_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT78 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT78_INIT_VAL" spirit:order="60500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT77_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT77 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT77_INIT_VAL" spirit:order="60400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT76_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT76 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT76_INIT_VAL" spirit:order="60300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT75_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT75 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT75_INIT_VAL" spirit:order="60200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT74_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT74 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT74_INIT_VAL" spirit:order="60100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT73_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT73 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT73_INIT_VAL" spirit:order="60000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT72_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT72 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT72_INIT_VAL" spirit:order="59900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT71_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT71 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT71_INIT_VAL" spirit:order="59800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT70_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT70 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT70_INIT_VAL" spirit:order="59700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT69_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT69 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT69_INIT_VAL" spirit:order="59600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT68_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT68 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT68_INIT_VAL" spirit:order="59500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT67_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT67 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT67_INIT_VAL" spirit:order="59400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT66_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT66 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT66_INIT_VAL" spirit:order="59300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT65_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT65 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT65_INIT_VAL" spirit:order="59200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT64_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT64 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT64_INIT_VAL" spirit:order="59100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT63_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT63 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT63_INIT_VAL" spirit:order="59000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT62_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT62 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT62_INIT_VAL" spirit:order="58900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT61_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT61 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT61_INIT_VAL" spirit:order="58800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT60_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT60 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT60_INIT_VAL" spirit:order="58700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT59_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT59 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT59_INIT_VAL" spirit:order="58600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT58_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT58 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT58_INIT_VAL" spirit:order="58500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT57_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT57 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT57_INIT_VAL" spirit:order="58400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT56_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT56 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT56_INIT_VAL" spirit:order="58300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT55_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT55 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT55_INIT_VAL" spirit:order="58200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT54_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT54 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT54_INIT_VAL" spirit:order="58100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT53_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT53 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT53_INIT_VAL" spirit:order="58000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT52_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT52 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT52_INIT_VAL" spirit:order="57900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT51_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT51 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT51_INIT_VAL" spirit:order="57800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT50_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT50 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT50_INIT_VAL" spirit:order="57700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT49_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT49 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT49_INIT_VAL" spirit:order="57600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT48_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT48 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT48_INIT_VAL" spirit:order="57500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT47_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT47 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT47_INIT_VAL" spirit:order="57400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT46_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT46 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT46_INIT_VAL" spirit:order="57300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT45_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT45 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT45_INIT_VAL" spirit:order="57200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT44_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT44 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT44_INIT_VAL" spirit:order="57100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT43_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT43 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT43_INIT_VAL" spirit:order="57000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT42_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT42 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT42_INIT_VAL" spirit:order="56900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT41_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT41 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT41_INIT_VAL" spirit:order="56800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT40_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT40 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT40_INIT_VAL" spirit:order="56700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT39_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT39 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT39_INIT_VAL" spirit:order="56600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT38_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT38 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT38_INIT_VAL" spirit:order="56500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT37_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT37 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT37_INIT_VAL" spirit:order="56400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT36_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT36 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT36_INIT_VAL" spirit:order="56300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT35_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT35 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT35_INIT_VAL" spirit:order="56200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT34_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT34 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT34_INIT_VAL" spirit:order="56100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT33_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT33 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT33_INIT_VAL" spirit:order="56000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT32_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT32 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT32_INIT_VAL" spirit:order="55900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT31_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT31 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT31_INIT_VAL" spirit:order="55800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT30_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT30 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT30_INIT_VAL" spirit:order="55700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT29_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT29 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT29_INIT_VAL" spirit:order="55600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT28_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT28 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT28_INIT_VAL" spirit:order="55500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT27_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT27 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT27_INIT_VAL" spirit:order="55400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT26_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT26 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT26_INIT_VAL" spirit:order="55300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT25_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT25 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT25_INIT_VAL" spirit:order="55200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT24_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT24 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT24_INIT_VAL" spirit:order="55100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT23_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT23 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT23_INIT_VAL" spirit:order="55000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT22_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT22 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT22_INIT_VAL" spirit:order="54900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT21_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT21 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT21_INIT_VAL" spirit:order="54800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT20_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT20 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT20_INIT_VAL" spirit:order="54700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT19_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT19 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT19_INIT_VAL" spirit:order="54600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT18_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT18 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT18_INIT_VAL" spirit:order="54500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT17_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT17 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT17_INIT_VAL" spirit:order="54400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT16_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT16 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT16_INIT_VAL" spirit:order="54300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT15_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT15 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT15_INIT_VAL" spirit:order="54200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT14_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT14 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT14_INIT_VAL" spirit:order="54100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT13_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT13 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT13_INIT_VAL" spirit:order="54000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT12_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT12 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT12_INIT_VAL" spirit:order="53900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT11_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT11 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT11_INIT_VAL" spirit:order="53800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT10_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT10 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT10_INIT_VAL" spirit:order="53700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT9_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT9 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT9_INIT_VAL" spirit:order="53600" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT8_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT8 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT8_INIT_VAL" spirit:order="53500" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT7_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT7 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT7_INIT_VAL" spirit:order="53400" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT6_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT6 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT6_INIT_VAL" spirit:order="53300" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT5_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT5 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT5_INIT_VAL" spirit:order="53200" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT4_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT4 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT4_INIT_VAL" spirit:order="53100" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT3_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT3 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT3_INIT_VAL" spirit:order="53000" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT2_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT2 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT2_INIT_VAL" spirit:order="52900" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT1_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT1 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT1_INIT_VAL" spirit:order="52800" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT0_INIT_VAL</spirit:name>
- <spirit:displayName>PROBE OUT0 INIT VALUE</spirit:displayName>
- <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT0_INIT_VAL" spirit:order="52700" spirit:bitStringLength="4">0x0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT255_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT255 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT255_WIDTH" spirit:order="52600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT254_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT254 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT254_WIDTH" spirit:order="52500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT253_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT253 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT253_WIDTH" spirit:order="52400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT252_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT252 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT252_WIDTH" spirit:order="52300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT251_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT251 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT251_WIDTH" spirit:order="52200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT250_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT250 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT250_WIDTH" spirit:order="52100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT249_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT249 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT249_WIDTH" spirit:order="52000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT248_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT248 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT248_WIDTH" spirit:order="51900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT247_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT247 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT247_WIDTH" spirit:order="51800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT246_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT246 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT246_WIDTH" spirit:order="51700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT245_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT245 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT245_WIDTH" spirit:order="51600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT244_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT244 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT244_WIDTH" spirit:order="51500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT243_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT243 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT243_WIDTH" spirit:order="51400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT242_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT242 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT242_WIDTH" spirit:order="51300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT241_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT241 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT241_WIDTH" spirit:order="51200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT240_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT240 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT240_WIDTH" spirit:order="51100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT239_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT239 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT239_WIDTH" spirit:order="51000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT238_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT238 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT238_WIDTH" spirit:order="50900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT237_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT237 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT237_WIDTH" spirit:order="50800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT236_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT236 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT236_WIDTH" spirit:order="50700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT235_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT235 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT235_WIDTH" spirit:order="50600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT234_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT234 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT234_WIDTH" spirit:order="50500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT233_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT233 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT233_WIDTH" spirit:order="50400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT232_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT232 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT232_WIDTH" spirit:order="50300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT231_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT231 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT231_WIDTH" spirit:order="50200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT230_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT230 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT230_WIDTH" spirit:order="50100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT229_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT229 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT229_WIDTH" spirit:order="50000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT228_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT228 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT228_WIDTH" spirit:order="49900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT227_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT227 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT227_WIDTH" spirit:order="49800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT226_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT226 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT226_WIDTH" spirit:order="49700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT225_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT225 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT225_WIDTH" spirit:order="49600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT224_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT224 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT224_WIDTH" spirit:order="49500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT223_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT223 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT223_WIDTH" spirit:order="49400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT222_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT222 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT222_WIDTH" spirit:order="49300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT221_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT221 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT221_WIDTH" spirit:order="49200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT220_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT220 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT220_WIDTH" spirit:order="49100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT219_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT219 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT219_WIDTH" spirit:order="49000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT218_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT218 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT218_WIDTH" spirit:order="48900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT217_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT217 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT217_WIDTH" spirit:order="48800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT216_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT216 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT216_WIDTH" spirit:order="48700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT215_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT215 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT215_WIDTH" spirit:order="48600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT214_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT214 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT214_WIDTH" spirit:order="48500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT213_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT213 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT213_WIDTH" spirit:order="48400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT212_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT212 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT212_WIDTH" spirit:order="48300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT211_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT211 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT211_WIDTH" spirit:order="48200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT210_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT210 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT210_WIDTH" spirit:order="48100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT209_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT209 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT209_WIDTH" spirit:order="48000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT208_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT208 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT208_WIDTH" spirit:order="47900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT207_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT207 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT207_WIDTH" spirit:order="47800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT206_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT206 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT206_WIDTH" spirit:order="47700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT205_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT205 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT205_WIDTH" spirit:order="47600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT204_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT204 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT204_WIDTH" spirit:order="47500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT203_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT203 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT203_WIDTH" spirit:order="47400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT202_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT202 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT202_WIDTH" spirit:order="47300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT201_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT201 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT201_WIDTH" spirit:order="47200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT200_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT200 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT200_WIDTH" spirit:order="47100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT199_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT199 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT199_WIDTH" spirit:order="47000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT198_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT198 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT198_WIDTH" spirit:order="46900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT197_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT197 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT197_WIDTH" spirit:order="46800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT196_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT196 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT196_WIDTH" spirit:order="46700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT195_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT195 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT195_WIDTH" spirit:order="46600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT194_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT194 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT194_WIDTH" spirit:order="46500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT193_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT193 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT193_WIDTH" spirit:order="46400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT192_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT192 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT192_WIDTH" spirit:order="46300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT191_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT191 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT191_WIDTH" spirit:order="46200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT190_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT190 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT190_WIDTH" spirit:order="46100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT189_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT189 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT189_WIDTH" spirit:order="46000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT188_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT188 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT188_WIDTH" spirit:order="45900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT187_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT187 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT187_WIDTH" spirit:order="45800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT186_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT186 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT186_WIDTH" spirit:order="45700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT185_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT185 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT185_WIDTH" spirit:order="45600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT184_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT184 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT184_WIDTH" spirit:order="45500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT183_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT183 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT183_WIDTH" spirit:order="45400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT182_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT182 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT182_WIDTH" spirit:order="45300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT181_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT181 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT181_WIDTH" spirit:order="45200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT180_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT180 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT180_WIDTH" spirit:order="45100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT179_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT179 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT179_WIDTH" spirit:order="45000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT178_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT178 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT178_WIDTH" spirit:order="44900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT177_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT177 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT177_WIDTH" spirit:order="44800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT176_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT176 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT176_WIDTH" spirit:order="44700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT175_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT175 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT175_WIDTH" spirit:order="44600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT174_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT174 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT174_WIDTH" spirit:order="44500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT173_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT173 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT173_WIDTH" spirit:order="44400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT172_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT172 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT172_WIDTH" spirit:order="44300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT171_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT171 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT171_WIDTH" spirit:order="44200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT170_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT170 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT170_WIDTH" spirit:order="44100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT169_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT169 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT169_WIDTH" spirit:order="44000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT168_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT168 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT168_WIDTH" spirit:order="43900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT167_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT167 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT167_WIDTH" spirit:order="43800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT166_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT166 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT166_WIDTH" spirit:order="43700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT165_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT165 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT165_WIDTH" spirit:order="43600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT164_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT164 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT164_WIDTH" spirit:order="43500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT163_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT163 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT163_WIDTH" spirit:order="43400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT162_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT162 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT162_WIDTH" spirit:order="43300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT161_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT161 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT161_WIDTH" spirit:order="43200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT160_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT160 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT160_WIDTH" spirit:order="43100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT159_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT159 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT159_WIDTH" spirit:order="43000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT158_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT158 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT158_WIDTH" spirit:order="42900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT157_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT157 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT157_WIDTH" spirit:order="42800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT156_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT156 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT156_WIDTH" spirit:order="42700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT155_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT155 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT155_WIDTH" spirit:order="42600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT154_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT154 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT154_WIDTH" spirit:order="42500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT153_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT153 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT153_WIDTH" spirit:order="42400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT152_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT152 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT152_WIDTH" spirit:order="42300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT151_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT151 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT151_WIDTH" spirit:order="42200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT150_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT150 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT150_WIDTH" spirit:order="42100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT149_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT149 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT149_WIDTH" spirit:order="42000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT148_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT148 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT148_WIDTH" spirit:order="41900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT147_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT147 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT147_WIDTH" spirit:order="41800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT146_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT146 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT146_WIDTH" spirit:order="41700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT145_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT145 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT145_WIDTH" spirit:order="41600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT144_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT144 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT144_WIDTH" spirit:order="41500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT143_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT143 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT143_WIDTH" spirit:order="41400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT142_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT142 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT142_WIDTH" spirit:order="41300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT141_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT141 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT141_WIDTH" spirit:order="41200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT140_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT140 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT140_WIDTH" spirit:order="41100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT139_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT139 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT139_WIDTH" spirit:order="41000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT138_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT138 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT138_WIDTH" spirit:order="40900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT137_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT137 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT137_WIDTH" spirit:order="40800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT136_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT136 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT136_WIDTH" spirit:order="40700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT135_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT135 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT135_WIDTH" spirit:order="40600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT134_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT134 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT134_WIDTH" spirit:order="40500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT133_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT133 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT133_WIDTH" spirit:order="40400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT132_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT132 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT132_WIDTH" spirit:order="40300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT131_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT131 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT131_WIDTH" spirit:order="40200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT130_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT130 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT130_WIDTH" spirit:order="40100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT129_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT129 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT129_WIDTH" spirit:order="40000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT128_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT128 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT128_WIDTH" spirit:order="39900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT127_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT127 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT127_WIDTH" spirit:order="39800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT126_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT126 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT126_WIDTH" spirit:order="39700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT125_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT125 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT125_WIDTH" spirit:order="39600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT124_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT124 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT124_WIDTH" spirit:order="39500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT123_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT123 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT123_WIDTH" spirit:order="39400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT122_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT122 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT122_WIDTH" spirit:order="39300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT121_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT121 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT121_WIDTH" spirit:order="39200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT120_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT120 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT120_WIDTH" spirit:order="39100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT119_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT119 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT119_WIDTH" spirit:order="39000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT118_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT118 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT118_WIDTH" spirit:order="38900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT117_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT117 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT117_WIDTH" spirit:order="38800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT116_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT116 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT116_WIDTH" spirit:order="38700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT115_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT115 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT115_WIDTH" spirit:order="38600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT114_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT114 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT114_WIDTH" spirit:order="38500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT113_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT113 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT113_WIDTH" spirit:order="38400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT112_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT112 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT112_WIDTH" spirit:order="38300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT111_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT111 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT111_WIDTH" spirit:order="38200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT110_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT110 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT110_WIDTH" spirit:order="38100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT109_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT109 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT109_WIDTH" spirit:order="38000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT108_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT108 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT108_WIDTH" spirit:order="37900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT107_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT107 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT107_WIDTH" spirit:order="37800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT106_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT106 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT106_WIDTH" spirit:order="37700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT105_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT105 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT105_WIDTH" spirit:order="37600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT104_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT104 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT104_WIDTH" spirit:order="37500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT103_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT103 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT103_WIDTH" spirit:order="37400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT102_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT102 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT102_WIDTH" spirit:order="37300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT101_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT101 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT101_WIDTH" spirit:order="37200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT100_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT100 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT100_WIDTH" spirit:order="37100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT99_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT99 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT99_WIDTH" spirit:order="37000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT98_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT98 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT98_WIDTH" spirit:order="36900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT97_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT97 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT97_WIDTH" spirit:order="36800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT96_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT96 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT96_WIDTH" spirit:order="36700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT95_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT95 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT95_WIDTH" spirit:order="36600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT94_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT94 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT94_WIDTH" spirit:order="36500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT93_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT93 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT93_WIDTH" spirit:order="36400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT92_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT92 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT92_WIDTH" spirit:order="36300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT91_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT91 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT91_WIDTH" spirit:order="36200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT90_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT90 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT90_WIDTH" spirit:order="36100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT89_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT89 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT89_WIDTH" spirit:order="36000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT88_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT88 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT88_WIDTH" spirit:order="35900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT87_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT87 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT87_WIDTH" spirit:order="35800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT86_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT86 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT86_WIDTH" spirit:order="35700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT85_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT85 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT85_WIDTH" spirit:order="35600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT84_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT84 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT84_WIDTH" spirit:order="35500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT83_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT83 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT83_WIDTH" spirit:order="35400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT82_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT82 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT82_WIDTH" spirit:order="35300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT81_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT81 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT81_WIDTH" spirit:order="35200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT80_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT80 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT80_WIDTH" spirit:order="35100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT79_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT79 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT79_WIDTH" spirit:order="35000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT78_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT78 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT78_WIDTH" spirit:order="34900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT77_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT77 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT77_WIDTH" spirit:order="34800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT76_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT76 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT76_WIDTH" spirit:order="34700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT75_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT75 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT75_WIDTH" spirit:order="34600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT74_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT74 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT74_WIDTH" spirit:order="34500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT73_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT73 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT73_WIDTH" spirit:order="34400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT72_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT72 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT72_WIDTH" spirit:order="34300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT71_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT71 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT71_WIDTH" spirit:order="34200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT70_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT70 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT70_WIDTH" spirit:order="34100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT69_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT69 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT69_WIDTH" spirit:order="34000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT68_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT68 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT68_WIDTH" spirit:order="33900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT67_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT67 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT67_WIDTH" spirit:order="33800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT66_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT66 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT66_WIDTH" spirit:order="33700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT65_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT65 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT65_WIDTH" spirit:order="33600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT64_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT64 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT64_WIDTH" spirit:order="33500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT63_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT63 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT63_WIDTH" spirit:order="33400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT62_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT62 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT62_WIDTH" spirit:order="33300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT61_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT61 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT61_WIDTH" spirit:order="33200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT60_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT60 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT60_WIDTH" spirit:order="33100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT59_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT59 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT59_WIDTH" spirit:order="33000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT58_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT58 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT58_WIDTH" spirit:order="32900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT57_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT57 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT57_WIDTH" spirit:order="32800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT56_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT56 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT56_WIDTH" spirit:order="32700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT55_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT55 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT55_WIDTH" spirit:order="32600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT54_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT54 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT54_WIDTH" spirit:order="32500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT53_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT53 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT53_WIDTH" spirit:order="32400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT52_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT52 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT52_WIDTH" spirit:order="32300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT51_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT51 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT51_WIDTH" spirit:order="32200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT50_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT50 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT50_WIDTH" spirit:order="32100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT49_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT49 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT49_WIDTH" spirit:order="32000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT48_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT48 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT48_WIDTH" spirit:order="31900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT47_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT47 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT47_WIDTH" spirit:order="31800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT46_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT46 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT46_WIDTH" spirit:order="31700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT45_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT45 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT45_WIDTH" spirit:order="31600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT44_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT44 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT44_WIDTH" spirit:order="31500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT43_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT43 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT43_WIDTH" spirit:order="31400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT42_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT42 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT42_WIDTH" spirit:order="31300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT41_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT41 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT41_WIDTH" spirit:order="31200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT40_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT40 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT40_WIDTH" spirit:order="31100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT39_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT39 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT39_WIDTH" spirit:order="31000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT38_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT38 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT38_WIDTH" spirit:order="30900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT37_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT37 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT37_WIDTH" spirit:order="30800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT36_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT36 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT36_WIDTH" spirit:order="30700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT35_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT35 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT35_WIDTH" spirit:order="30600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT34_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT34 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT34_WIDTH" spirit:order="30500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT33_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT33 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT33_WIDTH" spirit:order="30400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT32_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT32 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT32_WIDTH" spirit:order="30300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT31_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT31 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT31_WIDTH" spirit:order="30200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT30_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT30 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT30_WIDTH" spirit:order="30100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT29_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT29 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT29_WIDTH" spirit:order="30000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT28_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT28 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT28_WIDTH" spirit:order="29900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT27_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT27 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT27_WIDTH" spirit:order="29800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT26_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT26 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT26_WIDTH" spirit:order="29700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT25_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT25 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT25_WIDTH" spirit:order="29600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT24_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT24 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT24_WIDTH" spirit:order="29500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT23_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT23 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT23_WIDTH" spirit:order="29400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT22_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT22 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT22_WIDTH" spirit:order="29300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT21_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT21 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT21_WIDTH" spirit:order="29200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT20_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT20 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT20_WIDTH" spirit:order="29100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT19_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT19 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT19_WIDTH" spirit:order="29000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT18_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT18 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT18_WIDTH" spirit:order="28900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT17_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT17 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT17_WIDTH" spirit:order="28800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT16_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT16 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT16_WIDTH" spirit:order="28700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT15_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT15 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT15_WIDTH" spirit:order="28600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT14_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT14 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT14_WIDTH" spirit:order="28500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT13_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT13 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT13_WIDTH" spirit:order="28400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT12_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT12 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT12_WIDTH" spirit:order="28300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT11_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT11 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT11_WIDTH" spirit:order="28200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT10_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT10 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT10_WIDTH" spirit:order="28100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT9_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT9 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT9_WIDTH" spirit:order="28000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT8_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT8 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT8_WIDTH" spirit:order="27900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT7_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT7 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT7_WIDTH" spirit:order="27800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT6_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT6 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT6_WIDTH" spirit:order="27700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT5_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT5 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT5_WIDTH" spirit:order="27600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT4_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT4 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT4_WIDTH" spirit:order="27500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT3_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT3 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT3_WIDTH" spirit:order="27400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT2_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT2 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT2_WIDTH" spirit:order="27300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT1_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT1 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT1_WIDTH" spirit:order="27200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_OUT0_WIDTH</spirit:name>
- <spirit:displayName>PROBE OUT0 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_OUT0_WIDTH" spirit:order="27100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN255_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN255 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN255_WIDTH" spirit:order="27000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN254_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN254 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN254_WIDTH" spirit:order="26900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN253_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN253 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN253_WIDTH" spirit:order="26800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN252_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN252 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN252_WIDTH" spirit:order="26700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN251_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN251 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN251_WIDTH" spirit:order="26600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN250_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN250 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN250_WIDTH" spirit:order="26500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN249_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN249 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN249_WIDTH" spirit:order="26400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN248_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN248 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN248_WIDTH" spirit:order="26300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN247_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN247 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN247_WIDTH" spirit:order="26200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN246_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN246 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN246_WIDTH" spirit:order="26100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN245_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN245 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN245_WIDTH" spirit:order="26000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN244_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN244 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN244_WIDTH" spirit:order="25900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN243_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN243 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN243_WIDTH" spirit:order="25800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN242_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN242 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN242_WIDTH" spirit:order="25700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN241_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN241 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN241_WIDTH" spirit:order="25600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN240_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN240 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN240_WIDTH" spirit:order="25500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN239_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN239 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN239_WIDTH" spirit:order="25400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN238_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN238 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN238_WIDTH" spirit:order="25300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN237_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN237 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN237_WIDTH" spirit:order="25200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN236_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN236 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN236_WIDTH" spirit:order="25100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN235_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN235 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN235_WIDTH" spirit:order="25000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN234_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN234 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN234_WIDTH" spirit:order="24900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN233_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN233 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN233_WIDTH" spirit:order="24800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN232_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN232 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN232_WIDTH" spirit:order="24700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN231_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN231 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN231_WIDTH" spirit:order="24600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN230_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN230 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN230_WIDTH" spirit:order="24500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN229_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN229 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN229_WIDTH" spirit:order="24400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN228_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN228 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN228_WIDTH" spirit:order="24300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN227_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN227 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN227_WIDTH" spirit:order="24200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN226_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN226 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN226_WIDTH" spirit:order="24100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN225_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN225 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN225_WIDTH" spirit:order="24000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN224_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN224 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN224_WIDTH" spirit:order="23900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN223_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN223 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN223_WIDTH" spirit:order="23800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN222_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN222 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN222_WIDTH" spirit:order="23700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN221_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN221 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN221_WIDTH" spirit:order="23600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN220_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN220 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN220_WIDTH" spirit:order="23500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN219_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN219 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN219_WIDTH" spirit:order="23400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN218_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN218 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN218_WIDTH" spirit:order="23300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN217_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN217 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN217_WIDTH" spirit:order="23200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN216_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN216 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN216_WIDTH" spirit:order="23100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN215_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN215 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN215_WIDTH" spirit:order="23000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN214_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN214 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN214_WIDTH" spirit:order="22900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN213_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN213 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN213_WIDTH" spirit:order="22800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN212_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN212 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN212_WIDTH" spirit:order="22700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN211_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN211 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN211_WIDTH" spirit:order="22600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN210_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN210 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN210_WIDTH" spirit:order="22500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN209_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN209 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN209_WIDTH" spirit:order="22400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN208_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN208 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN208_WIDTH" spirit:order="22300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN207_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN207 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN207_WIDTH" spirit:order="22200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN206_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN206 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN206_WIDTH" spirit:order="22100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN205_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN205 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN205_WIDTH" spirit:order="22000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN204_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN204 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN204_WIDTH" spirit:order="21900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN203_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN203 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN203_WIDTH" spirit:order="21800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN202_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN202 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN202_WIDTH" spirit:order="21700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN201_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN201 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN201_WIDTH" spirit:order="21600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN200_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN200 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN200_WIDTH" spirit:order="21500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN199_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN199 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN199_WIDTH" spirit:order="21400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN198_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN198 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN198_WIDTH" spirit:order="21300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN197_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN197 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN197_WIDTH" spirit:order="21200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN196_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN196 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN196_WIDTH" spirit:order="21100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN195_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN195 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN195_WIDTH" spirit:order="21000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN194_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN194 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN194_WIDTH" spirit:order="20900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN193_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN193 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN193_WIDTH" spirit:order="20800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN192_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN192 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN192_WIDTH" spirit:order="20700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN191_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN191 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN191_WIDTH" spirit:order="20600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN190_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN190 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN190_WIDTH" spirit:order="20500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN189_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN189 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN189_WIDTH" spirit:order="20400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN188_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN188 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN188_WIDTH" spirit:order="20300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN187_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN187 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN187_WIDTH" spirit:order="20200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN186_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN186 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN186_WIDTH" spirit:order="20100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN185_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN185 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN185_WIDTH" spirit:order="20000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN184_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN184 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN184_WIDTH" spirit:order="19900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN183_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN183 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN183_WIDTH" spirit:order="19800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN182_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN182 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN182_WIDTH" spirit:order="19700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN181_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN181 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN181_WIDTH" spirit:order="19600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN180_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN180 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN180_WIDTH" spirit:order="19500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN179_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN179 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN179_WIDTH" spirit:order="19400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN178_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN178 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN178_WIDTH" spirit:order="19300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN177_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN177 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN177_WIDTH" spirit:order="19200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN176_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN176 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN176_WIDTH" spirit:order="19100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN175_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN175 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN175_WIDTH" spirit:order="19000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN174_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN174 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN174_WIDTH" spirit:order="18900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN173_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN173 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN173_WIDTH" spirit:order="18800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN172_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN172 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN172_WIDTH" spirit:order="18700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN171_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN171 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN171_WIDTH" spirit:order="18600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN170_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN170 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN170_WIDTH" spirit:order="18500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN169_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN169 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN169_WIDTH" spirit:order="18400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN168_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN168 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN168_WIDTH" spirit:order="18300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN167_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN167 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN167_WIDTH" spirit:order="18200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN166_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN166 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN166_WIDTH" spirit:order="18100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN165_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN165 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN165_WIDTH" spirit:order="18000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN164_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN164 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN164_WIDTH" spirit:order="17900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN163_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN163 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN163_WIDTH" spirit:order="17800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN162_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN162 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN162_WIDTH" spirit:order="17700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN161_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN161 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN161_WIDTH" spirit:order="17600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN160_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN160 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN160_WIDTH" spirit:order="17500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN159_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN159 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN159_WIDTH" spirit:order="17400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN158_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN158 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN158_WIDTH" spirit:order="17300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN157_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN157 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN157_WIDTH" spirit:order="17200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN156_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN156 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN156_WIDTH" spirit:order="17100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN155_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN155 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN155_WIDTH" spirit:order="17000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN154_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN154 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN154_WIDTH" spirit:order="16900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN153_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN153 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN153_WIDTH" spirit:order="16800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN152_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN152 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN152_WIDTH" spirit:order="16700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN151_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN151 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN151_WIDTH" spirit:order="16600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN150_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN150 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN150_WIDTH" spirit:order="16500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN149_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN149 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN149_WIDTH" spirit:order="16400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN148_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN148 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN148_WIDTH" spirit:order="16300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN147_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN147 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN147_WIDTH" spirit:order="16200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN146_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN146 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN146_WIDTH" spirit:order="16100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN145_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN145 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN145_WIDTH" spirit:order="16000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN144_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN144 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN144_WIDTH" spirit:order="15900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN143_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN143 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN143_WIDTH" spirit:order="15800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN142_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN142 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN142_WIDTH" spirit:order="15700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN141_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN141 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN141_WIDTH" spirit:order="15600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN140_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN140 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN140_WIDTH" spirit:order="15500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN139_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN139 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN139_WIDTH" spirit:order="15400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN138_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN138 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN138_WIDTH" spirit:order="15300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN137_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN137 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN137_WIDTH" spirit:order="15200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN136_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN136 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN136_WIDTH" spirit:order="15100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN135_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN135 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN135_WIDTH" spirit:order="15000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN134_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN134 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN134_WIDTH" spirit:order="14900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN133_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN133 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN133_WIDTH" spirit:order="14800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN132_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN132 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN132_WIDTH" spirit:order="14700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN131_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN131 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN131_WIDTH" spirit:order="14600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN130_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN130 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN130_WIDTH" spirit:order="14500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN129_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN129 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN129_WIDTH" spirit:order="14400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN128_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN128 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN128_WIDTH" spirit:order="14300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN127_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN127 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN127_WIDTH" spirit:order="14200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN126_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN126 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN126_WIDTH" spirit:order="14100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN125_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN125 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN125_WIDTH" spirit:order="14000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN124_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN124 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN124_WIDTH" spirit:order="13900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN123_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN123 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN123_WIDTH" spirit:order="13800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN122_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN122 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN122_WIDTH" spirit:order="13700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN121_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN121 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN121_WIDTH" spirit:order="13600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN120_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN120 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN120_WIDTH" spirit:order="13500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN119_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN119 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN119_WIDTH" spirit:order="13400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN118_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN118 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN118_WIDTH" spirit:order="13300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN117_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN117 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN117_WIDTH" spirit:order="13200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN116_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN116 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN116_WIDTH" spirit:order="13100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN115_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN115 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN115_WIDTH" spirit:order="13000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN114_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN114 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN114_WIDTH" spirit:order="12900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN113_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN113 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN113_WIDTH" spirit:order="12800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN112_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN112 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN112_WIDTH" spirit:order="12700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN111_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN111 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN111_WIDTH" spirit:order="12600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN110_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN110 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN110_WIDTH" spirit:order="12500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN109_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN109 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN109_WIDTH" spirit:order="12400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN108_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN108 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN108_WIDTH" spirit:order="12300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN107_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN107 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN107_WIDTH" spirit:order="12200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN106_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN106 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN106_WIDTH" spirit:order="12100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN105_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN105 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN105_WIDTH" spirit:order="12000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN104_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN104 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN104_WIDTH" spirit:order="11900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN103_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN103 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN103_WIDTH" spirit:order="11800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN102_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN102 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN102_WIDTH" spirit:order="11700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN101_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN101 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN101_WIDTH" spirit:order="11600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN100_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN100 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN100_WIDTH" spirit:order="11500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN99_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN99 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN99_WIDTH" spirit:order="11400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN98_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN98 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN98_WIDTH" spirit:order="11300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN97_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN97 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN97_WIDTH" spirit:order="11200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN96_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN96 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN96_WIDTH" spirit:order="11100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN95_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN95 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN95_WIDTH" spirit:order="11000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN94_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN94 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN94_WIDTH" spirit:order="10900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN93_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN93 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN93_WIDTH" spirit:order="10800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN92_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN92 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN92_WIDTH" spirit:order="10700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN91_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN91 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN91_WIDTH" spirit:order="10600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN90_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN90 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN90_WIDTH" spirit:order="10500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN89_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN89 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN89_WIDTH" spirit:order="10400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN88_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN88 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN88_WIDTH" spirit:order="10300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN87_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN87 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN87_WIDTH" spirit:order="10200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN86_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN86 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN86_WIDTH" spirit:order="10100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN85_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN85 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN85_WIDTH" spirit:order="10000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN84_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN84 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN84_WIDTH" spirit:order="9900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN83_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN83 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN83_WIDTH" spirit:order="9800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN82_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN82 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN82_WIDTH" spirit:order="9700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN81_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN81 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN81_WIDTH" spirit:order="9600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN80_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN80 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN80_WIDTH" spirit:order="9500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN79_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN79 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN79_WIDTH" spirit:order="9400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN78_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN78 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN78_WIDTH" spirit:order="9300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN77_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN77 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN77_WIDTH" spirit:order="9200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN76_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN76 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN76_WIDTH" spirit:order="9100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN75_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN75 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN75_WIDTH" spirit:order="9000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN74_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN74 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN74_WIDTH" spirit:order="8900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN73_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN73 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN73_WIDTH" spirit:order="8800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN72_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN72 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN72_WIDTH" spirit:order="8700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN71_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN71 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN71_WIDTH" spirit:order="8600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN70_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN70 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN70_WIDTH" spirit:order="8500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN69_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN69 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN69_WIDTH" spirit:order="8400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN68_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN68 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN68_WIDTH" spirit:order="8300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN67_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN67 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN67_WIDTH" spirit:order="8200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN66_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN66 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN66_WIDTH" spirit:order="8100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN65_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN65 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN65_WIDTH" spirit:order="8000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN64_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN64 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN64_WIDTH" spirit:order="7900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN63_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN63 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN63_WIDTH" spirit:order="7800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN62_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN62 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN62_WIDTH" spirit:order="7700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN61_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN61 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN61_WIDTH" spirit:order="7600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN60_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN60 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN60_WIDTH" spirit:order="7500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN59_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN59 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN59_WIDTH" spirit:order="7400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN58_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN58 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN58_WIDTH" spirit:order="7300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN57_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN57 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN57_WIDTH" spirit:order="7200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN56_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN56 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN56_WIDTH" spirit:order="7100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN55_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN55 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN55_WIDTH" spirit:order="7000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN54_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN54 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN54_WIDTH" spirit:order="6900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN53_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN53 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN53_WIDTH" spirit:order="6800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN52_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN52 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN52_WIDTH" spirit:order="6700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN51_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN51 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN51_WIDTH" spirit:order="6600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN50_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN50 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN50_WIDTH" spirit:order="6500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN49_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN49 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN49_WIDTH" spirit:order="6400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN48_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN48 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN48_WIDTH" spirit:order="6300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN47_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN47 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN47_WIDTH" spirit:order="6200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN46_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN46 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN46_WIDTH" spirit:order="6100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN45_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN45 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN45_WIDTH" spirit:order="6000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN44_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN44 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN44_WIDTH" spirit:order="5900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN43_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN43 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN43_WIDTH" spirit:order="5800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN42_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN42 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN42_WIDTH" spirit:order="5700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN41_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN41 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN41_WIDTH" spirit:order="5600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN40_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN40 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN40_WIDTH" spirit:order="5500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN39_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN39 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN39_WIDTH" spirit:order="5400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN38_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN38 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN38_WIDTH" spirit:order="5300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN37_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN37 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN37_WIDTH" spirit:order="5200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN36_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN36 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN36_WIDTH" spirit:order="5100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN35_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN35 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN35_WIDTH" spirit:order="5000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN34_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN34 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN34_WIDTH" spirit:order="4900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN33_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN33 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN33_WIDTH" spirit:order="4800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN32_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN32 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN32_WIDTH" spirit:order="4700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN31_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN31 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN31_WIDTH" spirit:order="4600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN30_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN30 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN30_WIDTH" spirit:order="4500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN29_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN29 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN29_WIDTH" spirit:order="4400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN28_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN28 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN28_WIDTH" spirit:order="4300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN27_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN27 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN27_WIDTH" spirit:order="4200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN26_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN26 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN26_WIDTH" spirit:order="4100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN25_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN25 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN25_WIDTH" spirit:order="4000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN24_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN24 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN24_WIDTH" spirit:order="3900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN23_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN23 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN23_WIDTH" spirit:order="3800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN22_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN22 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN22_WIDTH" spirit:order="3700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN21_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN21 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN21_WIDTH" spirit:order="3600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN20_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN20 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN20_WIDTH" spirit:order="3500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN19_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN19 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN19_WIDTH" spirit:order="3400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN18_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN18 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN18_WIDTH" spirit:order="3300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN17_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN17 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN17_WIDTH" spirit:order="3200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN16_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN16 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN16_WIDTH" spirit:order="3100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN15_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN15 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN15_WIDTH" spirit:order="3000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN14_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN14 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN14_WIDTH" spirit:order="2900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN13_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN13 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN13_WIDTH" spirit:order="2800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN12_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN12 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN12_WIDTH" spirit:order="2700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN11_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN11 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN11_WIDTH" spirit:order="2600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN10_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN10 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN10_WIDTH" spirit:order="2500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN9_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN9 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN9_WIDTH" spirit:order="2400" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN8_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN8 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN8_WIDTH" spirit:order="2300" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN7_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN7 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN7_WIDTH" spirit:order="2200" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN6_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN6 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN6_WIDTH" spirit:order="2100" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN5_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN5 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN5_WIDTH" spirit:order="2000" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN4_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN4 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN4_WIDTH" spirit:order="1900" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN3_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN3 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN3_WIDTH" spirit:order="1800" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN2_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN2 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN2_WIDTH" spirit:order="1700" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN1_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN1 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN1_WIDTH" spirit:order="1600" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_PROBE_IN0_WIDTH</spirit:name>
- <spirit:displayName>PROBE IN0 WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_PROBE_IN0_WIDTH" spirit:order="1500" spirit:minimum="1" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_EN_SYNCHRONIZATION</spirit:name>
- <spirit:displayName>C En Synchronization</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_EN_SYNCHRONIZATION" spirit:order="1400">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_NUM_PROBE_OUT</spirit:name>
- <spirit:displayName>Output Probe Count</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_NUM_PROBE_OUT" spirit:order="1300" spirit:minimum="0" spirit:maximum="256" spirit:rangeType="long">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_EN_PROBE_IN_ACTIVITY</spirit:name>
- <spirit:displayName>Enable Input Probe Activity Detectors</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_EN_PROBE_IN_ACTIVITY" spirit:choiceRef="choice_pairs_4873554b" spirit:order="1200">0</spirit:value>
- <spirit:vendorExtensions>
- <xilinx:parameterInfo>
- <xilinx:enablement>
- <xilinx:isEnabled xilinx:id="PARAM_ENABLEMENT.C_EN_PROBE_IN_ACTIVITY">false</xilinx:isEnabled>
- </xilinx:enablement>
- </xilinx:parameterInfo>
- </spirit:vendorExtensions>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>C_NUM_PROBE_IN</spirit:name>
- <spirit:displayName>Input Probe Count</spirit:displayName>
- <spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.C_NUM_PROBE_IN" spirit:order="1100" spirit:minimum="0" spirit:maximum="256" spirit:rangeType="long">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>Component_Name</spirit:name>
- <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">scalp_zynqps_vio_0_0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <xilinx:coreExtensions>
- <xilinx:displayName>VIO (Virtual Input/Output)</xilinx:displayName>
- <xilinx:coreRevision>19</xilinx:coreRevision>
- <xilinx:configElementInfos>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_BUSIF" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.ASSOCIATED_RESET" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.CLK_DOMAIN" xilinx:valueSource="default_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.FREQ_HZ" xilinx:valueSource="user_prop" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.PHASE" xilinx:valuePermission="bd"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_EN_PROBE_IN_ACTIVITY" xilinx:valueSource="user"/>
- <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.C_NUM_PROBE_IN" xilinx:valueSource="user"/>
- </xilinx:configElementInfos>
- </xilinx:coreExtensions>
- <xilinx:packagingInfo>
- <xilinx:xilinxVersion>2019.2</xilinx:xilinxVersion>
- <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="6dc84eee"/>
- <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="cba6f26c"/>
- <xilinx:checksum xilinx:scope="ports" xilinx:value="c0f7174e"/>
- <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="6eab3a1a"/>
- <xilinx:checksum xilinx:scope="parameters" xilinx:value="740caa1f"/>
- </xilinx:packagingInfo>
- </spirit:vendorExtensions>
-</spirit:component>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_ooc.xdc b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_ooc.xdc
deleted file mode 100644
index 3735124..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_ooc.xdc
+++ /dev/null
@@ -1,57 +0,0 @@
-# (c) Copyright 2012-2020 Xilinx, Inc. All rights reserved.
-#
-# This file contains confidential and proprietary information
-# of Xilinx, Inc. and is protected under U.S. and
-# international copyright and other intellectual property
-# laws.
-#
-# DISCLAIMER
-# This disclaimer is not a license and does not grant any
-# rights to the materials distributed herewith. Except as
-# otherwise provided in a valid license issued to you by
-# Xilinx, and to the maximum extent permitted by applicable
-# law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-# WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-# AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-# BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-# INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-# (2) Xilinx shall not be liable (whether in contract or tort,
-# including negligence, or under any other theory of
-# liability) for any loss or damage of any kind or nature
-# related to, arising under or in connection with these
-# materials, including for any direct, or any indirect,
-# special, incidental, or consequential loss or damage
-# (including loss of data, profits, goodwill, or any type of
-# loss or damage suffered as a result of any action brought
-# by a third party) even if such damage or loss was
-# reasonably foreseeable or Xilinx had been advised of the
-# possibility of the same.
-#
-# CRITICAL APPLICATIONS
-# Xilinx products are not designed or intended to be fail-
-# safe, or for use in any application requiring fail-safe
-# performance, such as life-support or safety devices or
-# systems, Class III medical devices, nuclear facilities,
-# applications related to the deployment of airbags, or any
-# other applications that could lead to death, personal
-# injury, or severe property or environmental damage
-# (individually and collectively, "Critical
-# Applications"). Customer assumes the sole risk and
-# liability of any use of Xilinx products in Critical
-# Applications, subject only to applicable laws and
-# regulations governing limitations on product liability.
-#
-# THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-# PART OF THIS FILE AT ALL TIMES.
-#
-# DO NOT MODIFY THIS FILE.
-# #########################################################
-#
-# This XDC is used only in OOC mode for synthesis, implementation
-#
-# #########################################################
-
-
-create_clock -period 8 -name clk [get_ports clk]
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_sim_netlist.v
deleted file mode 100644
index 41823da..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_sim_netlist.v
+++ /dev/null
@@ -1,7221 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:36 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_sim_netlist.v
-// Design : scalp_zynqps_vio_0_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_vio_0_0,vio,{}" *) (* X_CORE_INFO = "vio,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module scalp_zynqps_vio_0_0
- (clk,
- probe_out0);
- input clk;
- output [0:0]probe_out0;
-
- wire clk;
- wire [0:0]probe_out0;
- wire [0:0]NLW_inst_probe_out1_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out10_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out100_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out101_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out102_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out103_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out104_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out105_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out106_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out107_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out108_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out109_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out11_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out110_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out111_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out112_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out113_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out114_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out115_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out116_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out117_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out118_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out119_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out12_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out120_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out121_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out122_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out123_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out124_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out125_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out126_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out127_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out128_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out129_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out13_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out130_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out131_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out132_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out133_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out134_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out135_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out136_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out137_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out138_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out139_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out14_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out140_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out141_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out142_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out143_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out144_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out145_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out146_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out147_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out148_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out149_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out15_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out150_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out151_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out152_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out153_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out154_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out155_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out156_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out157_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out158_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out159_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out16_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out160_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out161_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out162_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out163_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out164_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out165_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out166_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out167_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out168_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out169_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out17_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out170_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out171_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out172_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out173_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out174_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out175_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out176_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out177_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out178_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out179_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out18_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out180_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out181_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out182_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out183_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out184_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out185_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out186_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out187_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out188_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out189_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out19_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out190_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out191_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out192_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out193_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out194_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out195_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out196_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out197_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out198_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out199_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out2_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out20_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out200_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out201_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out202_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out203_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out204_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out205_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out206_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out207_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out208_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out209_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out21_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out210_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out211_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out212_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out213_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out214_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out215_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out216_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out217_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out218_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out219_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out22_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out220_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out221_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out222_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out223_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out224_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out225_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out226_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out227_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out228_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out229_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out23_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out230_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out231_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out232_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out233_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out234_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out235_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out236_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out237_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out238_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out239_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out24_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out240_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out241_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out242_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out243_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out244_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out245_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out246_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out247_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out248_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out249_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out25_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out250_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out251_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out252_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out253_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out254_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out255_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out26_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out27_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out28_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out29_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out3_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out30_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out31_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out32_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out33_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out34_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out35_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out36_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out37_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out38_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out39_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out4_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out40_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out41_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out42_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out43_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out44_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out45_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out46_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out47_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out48_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out49_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out5_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out50_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out51_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out52_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out53_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out54_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out55_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out56_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out57_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out58_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out59_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out6_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out60_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out61_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out62_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out63_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out64_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out65_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out66_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out67_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out68_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out69_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out7_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out70_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out71_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out72_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out73_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out74_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out75_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out76_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out77_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out78_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out79_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out8_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out80_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out81_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out82_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out83_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out84_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out85_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out86_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out87_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out88_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out89_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out9_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out90_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out91_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out92_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out93_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out94_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out95_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out96_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out97_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out98_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out99_UNCONNECTED;
- wire [16:0]NLW_inst_sl_oport0_UNCONNECTED;
-
- (* C_BUILD_REVISION = "0" *)
- (* C_BUS_ADDR_WIDTH = "17" *)
- (* C_BUS_DATA_WIDTH = "16" *)
- (* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_MAJOR_VER = "2" *)
- (* C_CORE_MINOR_ALPHA_VER = "97" *)
- (* C_CORE_MINOR_VER = "0" *)
- (* C_CORE_TYPE = "2" *)
- (* C_CSE_DRV_VER = "1" *)
- (* C_EN_PROBE_IN_ACTIVITY = "0" *)
- (* C_EN_SYNCHRONIZATION = "1" *)
- (* C_MAJOR_VERSION = "2013" *)
- (* C_MAX_NUM_PROBE = "256" *)
- (* C_MAX_WIDTH_PER_PROBE = "256" *)
- (* C_MINOR_VERSION = "1" *)
- (* C_NEXT_SLAVE = "0" *)
- (* C_NUM_PROBE_IN = "0" *)
- (* C_NUM_PROBE_OUT = "1" *)
- (* C_PIPE_IFACE = "0" *)
- (* C_PROBE_IN0_WIDTH = "1" *)
- (* C_PROBE_IN100_WIDTH = "1" *)
- (* C_PROBE_IN101_WIDTH = "1" *)
- (* C_PROBE_IN102_WIDTH = "1" *)
- (* C_PROBE_IN103_WIDTH = "1" *)
- (* C_PROBE_IN104_WIDTH = "1" *)
- (* C_PROBE_IN105_WIDTH = "1" *)
- (* C_PROBE_IN106_WIDTH = "1" *)
- (* C_PROBE_IN107_WIDTH = "1" *)
- (* C_PROBE_IN108_WIDTH = "1" *)
- (* C_PROBE_IN109_WIDTH = "1" *)
- (* C_PROBE_IN10_WIDTH = "1" *)
- (* C_PROBE_IN110_WIDTH = "1" *)
- (* C_PROBE_IN111_WIDTH = "1" *)
- (* C_PROBE_IN112_WIDTH = "1" *)
- (* C_PROBE_IN113_WIDTH = "1" *)
- (* C_PROBE_IN114_WIDTH = "1" *)
- (* C_PROBE_IN115_WIDTH = "1" *)
- (* C_PROBE_IN116_WIDTH = "1" *)
- (* C_PROBE_IN117_WIDTH = "1" *)
- (* C_PROBE_IN118_WIDTH = "1" *)
- (* C_PROBE_IN119_WIDTH = "1" *)
- (* C_PROBE_IN11_WIDTH = "1" *)
- (* C_PROBE_IN120_WIDTH = "1" *)
- (* C_PROBE_IN121_WIDTH = "1" *)
- (* C_PROBE_IN122_WIDTH = "1" *)
- (* C_PROBE_IN123_WIDTH = "1" *)
- (* C_PROBE_IN124_WIDTH = "1" *)
- (* C_PROBE_IN125_WIDTH = "1" *)
- (* C_PROBE_IN126_WIDTH = "1" *)
- (* C_PROBE_IN127_WIDTH = "1" *)
- (* C_PROBE_IN128_WIDTH = "1" *)
- (* C_PROBE_IN129_WIDTH = "1" *)
- (* C_PROBE_IN12_WIDTH = "1" *)
- (* C_PROBE_IN130_WIDTH = "1" *)
- (* C_PROBE_IN131_WIDTH = "1" *)
- (* C_PROBE_IN132_WIDTH = "1" *)
- (* C_PROBE_IN133_WIDTH = "1" *)
- (* C_PROBE_IN134_WIDTH = "1" *)
- (* C_PROBE_IN135_WIDTH = "1" *)
- (* C_PROBE_IN136_WIDTH = "1" *)
- (* C_PROBE_IN137_WIDTH = "1" *)
- (* C_PROBE_IN138_WIDTH = "1" *)
- (* C_PROBE_IN139_WIDTH = "1" *)
- (* C_PROBE_IN13_WIDTH = "1" *)
- (* C_PROBE_IN140_WIDTH = "1" *)
- (* C_PROBE_IN141_WIDTH = "1" *)
- (* C_PROBE_IN142_WIDTH = "1" *)
- (* C_PROBE_IN143_WIDTH = "1" *)
- (* C_PROBE_IN144_WIDTH = "1" *)
- (* C_PROBE_IN145_WIDTH = "1" *)
- (* C_PROBE_IN146_WIDTH = "1" *)
- (* C_PROBE_IN147_WIDTH = "1" *)
- (* C_PROBE_IN148_WIDTH = "1" *)
- (* C_PROBE_IN149_WIDTH = "1" *)
- (* C_PROBE_IN14_WIDTH = "1" *)
- (* C_PROBE_IN150_WIDTH = "1" *)
- (* C_PROBE_IN151_WIDTH = "1" *)
- (* C_PROBE_IN152_WIDTH = "1" *)
- (* C_PROBE_IN153_WIDTH = "1" *)
- (* C_PROBE_IN154_WIDTH = "1" *)
- (* C_PROBE_IN155_WIDTH = "1" *)
- (* C_PROBE_IN156_WIDTH = "1" *)
- (* C_PROBE_IN157_WIDTH = "1" *)
- (* C_PROBE_IN158_WIDTH = "1" *)
- (* C_PROBE_IN159_WIDTH = "1" *)
- (* C_PROBE_IN15_WIDTH = "1" *)
- (* C_PROBE_IN160_WIDTH = "1" *)
- (* C_PROBE_IN161_WIDTH = "1" *)
- (* C_PROBE_IN162_WIDTH = "1" *)
- (* C_PROBE_IN163_WIDTH = "1" *)
- (* C_PROBE_IN164_WIDTH = "1" *)
- (* C_PROBE_IN165_WIDTH = "1" *)
- (* C_PROBE_IN166_WIDTH = "1" *)
- (* C_PROBE_IN167_WIDTH = "1" *)
- (* C_PROBE_IN168_WIDTH = "1" *)
- (* C_PROBE_IN169_WIDTH = "1" *)
- (* C_PROBE_IN16_WIDTH = "1" *)
- (* C_PROBE_IN170_WIDTH = "1" *)
- (* C_PROBE_IN171_WIDTH = "1" *)
- (* C_PROBE_IN172_WIDTH = "1" *)
- (* C_PROBE_IN173_WIDTH = "1" *)
- (* C_PROBE_IN174_WIDTH = "1" *)
- (* C_PROBE_IN175_WIDTH = "1" *)
- (* C_PROBE_IN176_WIDTH = "1" *)
- (* C_PROBE_IN177_WIDTH = "1" *)
- (* C_PROBE_IN178_WIDTH = "1" *)
- (* C_PROBE_IN179_WIDTH = "1" *)
- (* C_PROBE_IN17_WIDTH = "1" *)
- (* C_PROBE_IN180_WIDTH = "1" *)
- (* C_PROBE_IN181_WIDTH = "1" *)
- (* C_PROBE_IN182_WIDTH = "1" *)
- (* C_PROBE_IN183_WIDTH = "1" *)
- (* C_PROBE_IN184_WIDTH = "1" *)
- (* C_PROBE_IN185_WIDTH = "1" *)
- (* C_PROBE_IN186_WIDTH = "1" *)
- (* C_PROBE_IN187_WIDTH = "1" *)
- (* C_PROBE_IN188_WIDTH = "1" *)
- (* C_PROBE_IN189_WIDTH = "1" *)
- (* C_PROBE_IN18_WIDTH = "1" *)
- (* C_PROBE_IN190_WIDTH = "1" *)
- (* C_PROBE_IN191_WIDTH = "1" *)
- (* C_PROBE_IN192_WIDTH = "1" *)
- (* C_PROBE_IN193_WIDTH = "1" *)
- (* C_PROBE_IN194_WIDTH = "1" *)
- (* C_PROBE_IN195_WIDTH = "1" *)
- (* C_PROBE_IN196_WIDTH = "1" *)
- (* C_PROBE_IN197_WIDTH = "1" *)
- (* C_PROBE_IN198_WIDTH = "1" *)
- (* C_PROBE_IN199_WIDTH = "1" *)
- (* C_PROBE_IN19_WIDTH = "1" *)
- (* C_PROBE_IN1_WIDTH = "1" *)
- (* C_PROBE_IN200_WIDTH = "1" *)
- (* C_PROBE_IN201_WIDTH = "1" *)
- (* C_PROBE_IN202_WIDTH = "1" *)
- (* C_PROBE_IN203_WIDTH = "1" *)
- (* C_PROBE_IN204_WIDTH = "1" *)
- (* C_PROBE_IN205_WIDTH = "1" *)
- (* C_PROBE_IN206_WIDTH = "1" *)
- (* C_PROBE_IN207_WIDTH = "1" *)
- (* C_PROBE_IN208_WIDTH = "1" *)
- (* C_PROBE_IN209_WIDTH = "1" *)
- (* C_PROBE_IN20_WIDTH = "1" *)
- (* C_PROBE_IN210_WIDTH = "1" *)
- (* C_PROBE_IN211_WIDTH = "1" *)
- (* C_PROBE_IN212_WIDTH = "1" *)
- (* C_PROBE_IN213_WIDTH = "1" *)
- (* C_PROBE_IN214_WIDTH = "1" *)
- (* C_PROBE_IN215_WIDTH = "1" *)
- (* C_PROBE_IN216_WIDTH = "1" *)
- (* C_PROBE_IN217_WIDTH = "1" *)
- (* C_PROBE_IN218_WIDTH = "1" *)
- (* C_PROBE_IN219_WIDTH = "1" *)
- (* C_PROBE_IN21_WIDTH = "1" *)
- (* C_PROBE_IN220_WIDTH = "1" *)
- (* C_PROBE_IN221_WIDTH = "1" *)
- (* C_PROBE_IN222_WIDTH = "1" *)
- (* C_PROBE_IN223_WIDTH = "1" *)
- (* C_PROBE_IN224_WIDTH = "1" *)
- (* C_PROBE_IN225_WIDTH = "1" *)
- (* C_PROBE_IN226_WIDTH = "1" *)
- (* C_PROBE_IN227_WIDTH = "1" *)
- (* C_PROBE_IN228_WIDTH = "1" *)
- (* C_PROBE_IN229_WIDTH = "1" *)
- (* C_PROBE_IN22_WIDTH = "1" *)
- (* C_PROBE_IN230_WIDTH = "1" *)
- (* C_PROBE_IN231_WIDTH = "1" *)
- (* C_PROBE_IN232_WIDTH = "1" *)
- (* C_PROBE_IN233_WIDTH = "1" *)
- (* C_PROBE_IN234_WIDTH = "1" *)
- (* C_PROBE_IN235_WIDTH = "1" *)
- (* C_PROBE_IN236_WIDTH = "1" *)
- (* C_PROBE_IN237_WIDTH = "1" *)
- (* C_PROBE_IN238_WIDTH = "1" *)
- (* C_PROBE_IN239_WIDTH = "1" *)
- (* C_PROBE_IN23_WIDTH = "1" *)
- (* C_PROBE_IN240_WIDTH = "1" *)
- (* C_PROBE_IN241_WIDTH = "1" *)
- (* C_PROBE_IN242_WIDTH = "1" *)
- (* C_PROBE_IN243_WIDTH = "1" *)
- (* C_PROBE_IN244_WIDTH = "1" *)
- (* C_PROBE_IN245_WIDTH = "1" *)
- (* C_PROBE_IN246_WIDTH = "1" *)
- (* C_PROBE_IN247_WIDTH = "1" *)
- (* C_PROBE_IN248_WIDTH = "1" *)
- (* C_PROBE_IN249_WIDTH = "1" *)
- (* C_PROBE_IN24_WIDTH = "1" *)
- (* C_PROBE_IN250_WIDTH = "1" *)
- (* C_PROBE_IN251_WIDTH = "1" *)
- (* C_PROBE_IN252_WIDTH = "1" *)
- (* C_PROBE_IN253_WIDTH = "1" *)
- (* C_PROBE_IN254_WIDTH = "1" *)
- (* C_PROBE_IN255_WIDTH = "1" *)
- (* C_PROBE_IN25_WIDTH = "1" *)
- (* C_PROBE_IN26_WIDTH = "1" *)
- (* C_PROBE_IN27_WIDTH = "1" *)
- (* C_PROBE_IN28_WIDTH = "1" *)
- (* C_PROBE_IN29_WIDTH = "1" *)
- (* C_PROBE_IN2_WIDTH = "1" *)
- (* C_PROBE_IN30_WIDTH = "1" *)
- (* C_PROBE_IN31_WIDTH = "1" *)
- (* C_PROBE_IN32_WIDTH = "1" *)
- (* C_PROBE_IN33_WIDTH = "1" *)
- (* C_PROBE_IN34_WIDTH = "1" *)
- (* C_PROBE_IN35_WIDTH = "1" *)
- (* C_PROBE_IN36_WIDTH = "1" *)
- (* C_PROBE_IN37_WIDTH = "1" *)
- (* C_PROBE_IN38_WIDTH = "1" *)
- (* C_PROBE_IN39_WIDTH = "1" *)
- (* C_PROBE_IN3_WIDTH = "1" *)
- (* C_PROBE_IN40_WIDTH = "1" *)
- (* C_PROBE_IN41_WIDTH = "1" *)
- (* C_PROBE_IN42_WIDTH = "1" *)
- (* C_PROBE_IN43_WIDTH = "1" *)
- (* C_PROBE_IN44_WIDTH = "1" *)
- (* C_PROBE_IN45_WIDTH = "1" *)
- (* C_PROBE_IN46_WIDTH = "1" *)
- (* C_PROBE_IN47_WIDTH = "1" *)
- (* C_PROBE_IN48_WIDTH = "1" *)
- (* C_PROBE_IN49_WIDTH = "1" *)
- (* C_PROBE_IN4_WIDTH = "1" *)
- (* C_PROBE_IN50_WIDTH = "1" *)
- (* C_PROBE_IN51_WIDTH = "1" *)
- (* C_PROBE_IN52_WIDTH = "1" *)
- (* C_PROBE_IN53_WIDTH = "1" *)
- (* C_PROBE_IN54_WIDTH = "1" *)
- (* C_PROBE_IN55_WIDTH = "1" *)
- (* C_PROBE_IN56_WIDTH = "1" *)
- (* C_PROBE_IN57_WIDTH = "1" *)
- (* C_PROBE_IN58_WIDTH = "1" *)
- (* C_PROBE_IN59_WIDTH = "1" *)
- (* C_PROBE_IN5_WIDTH = "1" *)
- (* C_PROBE_IN60_WIDTH = "1" *)
- (* C_PROBE_IN61_WIDTH = "1" *)
- (* C_PROBE_IN62_WIDTH = "1" *)
- (* C_PROBE_IN63_WIDTH = "1" *)
- (* C_PROBE_IN64_WIDTH = "1" *)
- (* C_PROBE_IN65_WIDTH = "1" *)
- (* C_PROBE_IN66_WIDTH = "1" *)
- (* C_PROBE_IN67_WIDTH = "1" *)
- (* C_PROBE_IN68_WIDTH = "1" *)
- (* C_PROBE_IN69_WIDTH = "1" *)
- (* C_PROBE_IN6_WIDTH = "1" *)
- (* C_PROBE_IN70_WIDTH = "1" *)
- (* C_PROBE_IN71_WIDTH = "1" *)
- (* C_PROBE_IN72_WIDTH = "1" *)
- (* C_PROBE_IN73_WIDTH = "1" *)
- (* C_PROBE_IN74_WIDTH = "1" *)
- (* C_PROBE_IN75_WIDTH = "1" *)
- (* C_PROBE_IN76_WIDTH = "1" *)
- (* C_PROBE_IN77_WIDTH = "1" *)
- (* C_PROBE_IN78_WIDTH = "1" *)
- (* C_PROBE_IN79_WIDTH = "1" *)
- (* C_PROBE_IN7_WIDTH = "1" *)
- (* C_PROBE_IN80_WIDTH = "1" *)
- (* C_PROBE_IN81_WIDTH = "1" *)
- (* C_PROBE_IN82_WIDTH = "1" *)
- (* C_PROBE_IN83_WIDTH = "1" *)
- (* C_PROBE_IN84_WIDTH = "1" *)
- (* C_PROBE_IN85_WIDTH = "1" *)
- (* C_PROBE_IN86_WIDTH = "1" *)
- (* C_PROBE_IN87_WIDTH = "1" *)
- (* C_PROBE_IN88_WIDTH = "1" *)
- (* C_PROBE_IN89_WIDTH = "1" *)
- (* C_PROBE_IN8_WIDTH = "1" *)
- (* C_PROBE_IN90_WIDTH = "1" *)
- (* C_PROBE_IN91_WIDTH = "1" *)
- (* C_PROBE_IN92_WIDTH = "1" *)
- (* C_PROBE_IN93_WIDTH = "1" *)
- (* C_PROBE_IN94_WIDTH = "1" *)
- (* C_PROBE_IN95_WIDTH = "1" *)
- (* C_PROBE_IN96_WIDTH = "1" *)
- (* C_PROBE_IN97_WIDTH = "1" *)
- (* C_PROBE_IN98_WIDTH = "1" *)
- (* C_PROBE_IN99_WIDTH = "1" *)
- (* C_PROBE_IN9_WIDTH = "1" *)
- (* C_PROBE_OUT0_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT0_WIDTH = "1" *)
- (* C_PROBE_OUT100_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT100_WIDTH = "1" *)
- (* C_PROBE_OUT101_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT101_WIDTH = "1" *)
- (* C_PROBE_OUT102_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT102_WIDTH = "1" *)
- (* C_PROBE_OUT103_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT103_WIDTH = "1" *)
- (* C_PROBE_OUT104_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT104_WIDTH = "1" *)
- (* C_PROBE_OUT105_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT105_WIDTH = "1" *)
- (* C_PROBE_OUT106_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT106_WIDTH = "1" *)
- (* C_PROBE_OUT107_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT107_WIDTH = "1" *)
- (* C_PROBE_OUT108_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT108_WIDTH = "1" *)
- (* C_PROBE_OUT109_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT109_WIDTH = "1" *)
- (* C_PROBE_OUT10_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT10_WIDTH = "1" *)
- (* C_PROBE_OUT110_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT110_WIDTH = "1" *)
- (* C_PROBE_OUT111_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT111_WIDTH = "1" *)
- (* C_PROBE_OUT112_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT112_WIDTH = "1" *)
- (* C_PROBE_OUT113_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT113_WIDTH = "1" *)
- (* C_PROBE_OUT114_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT114_WIDTH = "1" *)
- (* C_PROBE_OUT115_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT115_WIDTH = "1" *)
- (* C_PROBE_OUT116_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT116_WIDTH = "1" *)
- (* C_PROBE_OUT117_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT117_WIDTH = "1" *)
- (* C_PROBE_OUT118_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT118_WIDTH = "1" *)
- (* C_PROBE_OUT119_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT119_WIDTH = "1" *)
- (* C_PROBE_OUT11_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT11_WIDTH = "1" *)
- (* C_PROBE_OUT120_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT120_WIDTH = "1" *)
- (* C_PROBE_OUT121_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT121_WIDTH = "1" *)
- (* C_PROBE_OUT122_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT122_WIDTH = "1" *)
- (* C_PROBE_OUT123_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT123_WIDTH = "1" *)
- (* C_PROBE_OUT124_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT124_WIDTH = "1" *)
- (* C_PROBE_OUT125_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT125_WIDTH = "1" *)
- (* C_PROBE_OUT126_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT126_WIDTH = "1" *)
- (* C_PROBE_OUT127_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT127_WIDTH = "1" *)
- (* C_PROBE_OUT128_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT128_WIDTH = "1" *)
- (* C_PROBE_OUT129_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT129_WIDTH = "1" *)
- (* C_PROBE_OUT12_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT12_WIDTH = "1" *)
- (* C_PROBE_OUT130_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT130_WIDTH = "1" *)
- (* C_PROBE_OUT131_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT131_WIDTH = "1" *)
- (* C_PROBE_OUT132_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT132_WIDTH = "1" *)
- (* C_PROBE_OUT133_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT133_WIDTH = "1" *)
- (* C_PROBE_OUT134_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT134_WIDTH = "1" *)
- (* C_PROBE_OUT135_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT135_WIDTH = "1" *)
- (* C_PROBE_OUT136_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT136_WIDTH = "1" *)
- (* C_PROBE_OUT137_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT137_WIDTH = "1" *)
- (* C_PROBE_OUT138_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT138_WIDTH = "1" *)
- (* C_PROBE_OUT139_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT139_WIDTH = "1" *)
- (* C_PROBE_OUT13_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT13_WIDTH = "1" *)
- (* C_PROBE_OUT140_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT140_WIDTH = "1" *)
- (* C_PROBE_OUT141_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT141_WIDTH = "1" *)
- (* C_PROBE_OUT142_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT142_WIDTH = "1" *)
- (* C_PROBE_OUT143_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT143_WIDTH = "1" *)
- (* C_PROBE_OUT144_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT144_WIDTH = "1" *)
- (* C_PROBE_OUT145_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT145_WIDTH = "1" *)
- (* C_PROBE_OUT146_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT146_WIDTH = "1" *)
- (* C_PROBE_OUT147_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT147_WIDTH = "1" *)
- (* C_PROBE_OUT148_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT148_WIDTH = "1" *)
- (* C_PROBE_OUT149_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT149_WIDTH = "1" *)
- (* C_PROBE_OUT14_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT14_WIDTH = "1" *)
- (* C_PROBE_OUT150_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT150_WIDTH = "1" *)
- (* C_PROBE_OUT151_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT151_WIDTH = "1" *)
- (* C_PROBE_OUT152_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT152_WIDTH = "1" *)
- (* C_PROBE_OUT153_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT153_WIDTH = "1" *)
- (* C_PROBE_OUT154_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT154_WIDTH = "1" *)
- (* C_PROBE_OUT155_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT155_WIDTH = "1" *)
- (* C_PROBE_OUT156_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT156_WIDTH = "1" *)
- (* C_PROBE_OUT157_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT157_WIDTH = "1" *)
- (* C_PROBE_OUT158_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT158_WIDTH = "1" *)
- (* C_PROBE_OUT159_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT159_WIDTH = "1" *)
- (* C_PROBE_OUT15_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT15_WIDTH = "1" *)
- (* C_PROBE_OUT160_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT160_WIDTH = "1" *)
- (* C_PROBE_OUT161_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT161_WIDTH = "1" *)
- (* C_PROBE_OUT162_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT162_WIDTH = "1" *)
- (* C_PROBE_OUT163_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT163_WIDTH = "1" *)
- (* C_PROBE_OUT164_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT164_WIDTH = "1" *)
- (* C_PROBE_OUT165_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT165_WIDTH = "1" *)
- (* C_PROBE_OUT166_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT166_WIDTH = "1" *)
- (* C_PROBE_OUT167_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT167_WIDTH = "1" *)
- (* C_PROBE_OUT168_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT168_WIDTH = "1" *)
- (* C_PROBE_OUT169_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT169_WIDTH = "1" *)
- (* C_PROBE_OUT16_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT16_WIDTH = "1" *)
- (* C_PROBE_OUT170_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT170_WIDTH = "1" *)
- (* C_PROBE_OUT171_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT171_WIDTH = "1" *)
- (* C_PROBE_OUT172_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT172_WIDTH = "1" *)
- (* C_PROBE_OUT173_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT173_WIDTH = "1" *)
- (* C_PROBE_OUT174_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT174_WIDTH = "1" *)
- (* C_PROBE_OUT175_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT175_WIDTH = "1" *)
- (* C_PROBE_OUT176_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT176_WIDTH = "1" *)
- (* C_PROBE_OUT177_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT177_WIDTH = "1" *)
- (* C_PROBE_OUT178_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT178_WIDTH = "1" *)
- (* C_PROBE_OUT179_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT179_WIDTH = "1" *)
- (* C_PROBE_OUT17_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT17_WIDTH = "1" *)
- (* C_PROBE_OUT180_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT180_WIDTH = "1" *)
- (* C_PROBE_OUT181_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT181_WIDTH = "1" *)
- (* C_PROBE_OUT182_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT182_WIDTH = "1" *)
- (* C_PROBE_OUT183_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT183_WIDTH = "1" *)
- (* C_PROBE_OUT184_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT184_WIDTH = "1" *)
- (* C_PROBE_OUT185_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT185_WIDTH = "1" *)
- (* C_PROBE_OUT186_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT186_WIDTH = "1" *)
- (* C_PROBE_OUT187_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT187_WIDTH = "1" *)
- (* C_PROBE_OUT188_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT188_WIDTH = "1" *)
- (* C_PROBE_OUT189_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT189_WIDTH = "1" *)
- (* C_PROBE_OUT18_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT18_WIDTH = "1" *)
- (* C_PROBE_OUT190_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT190_WIDTH = "1" *)
- (* C_PROBE_OUT191_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT191_WIDTH = "1" *)
- (* C_PROBE_OUT192_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT192_WIDTH = "1" *)
- (* C_PROBE_OUT193_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT193_WIDTH = "1" *)
- (* C_PROBE_OUT194_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT194_WIDTH = "1" *)
- (* C_PROBE_OUT195_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT195_WIDTH = "1" *)
- (* C_PROBE_OUT196_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT196_WIDTH = "1" *)
- (* C_PROBE_OUT197_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT197_WIDTH = "1" *)
- (* C_PROBE_OUT198_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT198_WIDTH = "1" *)
- (* C_PROBE_OUT199_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT199_WIDTH = "1" *)
- (* C_PROBE_OUT19_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT19_WIDTH = "1" *)
- (* C_PROBE_OUT1_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT1_WIDTH = "1" *)
- (* C_PROBE_OUT200_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT200_WIDTH = "1" *)
- (* C_PROBE_OUT201_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT201_WIDTH = "1" *)
- (* C_PROBE_OUT202_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT202_WIDTH = "1" *)
- (* C_PROBE_OUT203_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT203_WIDTH = "1" *)
- (* C_PROBE_OUT204_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT204_WIDTH = "1" *)
- (* C_PROBE_OUT205_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT205_WIDTH = "1" *)
- (* C_PROBE_OUT206_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT206_WIDTH = "1" *)
- (* C_PROBE_OUT207_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT207_WIDTH = "1" *)
- (* C_PROBE_OUT208_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT208_WIDTH = "1" *)
- (* C_PROBE_OUT209_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT209_WIDTH = "1" *)
- (* C_PROBE_OUT20_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT20_WIDTH = "1" *)
- (* C_PROBE_OUT210_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT210_WIDTH = "1" *)
- (* C_PROBE_OUT211_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT211_WIDTH = "1" *)
- (* C_PROBE_OUT212_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT212_WIDTH = "1" *)
- (* C_PROBE_OUT213_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT213_WIDTH = "1" *)
- (* C_PROBE_OUT214_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT214_WIDTH = "1" *)
- (* C_PROBE_OUT215_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT215_WIDTH = "1" *)
- (* C_PROBE_OUT216_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT216_WIDTH = "1" *)
- (* C_PROBE_OUT217_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT217_WIDTH = "1" *)
- (* C_PROBE_OUT218_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT218_WIDTH = "1" *)
- (* C_PROBE_OUT219_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT219_WIDTH = "1" *)
- (* C_PROBE_OUT21_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT21_WIDTH = "1" *)
- (* C_PROBE_OUT220_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT220_WIDTH = "1" *)
- (* C_PROBE_OUT221_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT221_WIDTH = "1" *)
- (* C_PROBE_OUT222_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT222_WIDTH = "1" *)
- (* C_PROBE_OUT223_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT223_WIDTH = "1" *)
- (* C_PROBE_OUT224_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT224_WIDTH = "1" *)
- (* C_PROBE_OUT225_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT225_WIDTH = "1" *)
- (* C_PROBE_OUT226_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT226_WIDTH = "1" *)
- (* C_PROBE_OUT227_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT227_WIDTH = "1" *)
- (* C_PROBE_OUT228_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT228_WIDTH = "1" *)
- (* C_PROBE_OUT229_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT229_WIDTH = "1" *)
- (* C_PROBE_OUT22_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT22_WIDTH = "1" *)
- (* C_PROBE_OUT230_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT230_WIDTH = "1" *)
- (* C_PROBE_OUT231_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT231_WIDTH = "1" *)
- (* C_PROBE_OUT232_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT232_WIDTH = "1" *)
- (* C_PROBE_OUT233_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT233_WIDTH = "1" *)
- (* C_PROBE_OUT234_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT234_WIDTH = "1" *)
- (* C_PROBE_OUT235_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT235_WIDTH = "1" *)
- (* C_PROBE_OUT236_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT236_WIDTH = "1" *)
- (* C_PROBE_OUT237_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT237_WIDTH = "1" *)
- (* C_PROBE_OUT238_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT238_WIDTH = "1" *)
- (* C_PROBE_OUT239_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT239_WIDTH = "1" *)
- (* C_PROBE_OUT23_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT23_WIDTH = "1" *)
- (* C_PROBE_OUT240_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT240_WIDTH = "1" *)
- (* C_PROBE_OUT241_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT241_WIDTH = "1" *)
- (* C_PROBE_OUT242_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT242_WIDTH = "1" *)
- (* C_PROBE_OUT243_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT243_WIDTH = "1" *)
- (* C_PROBE_OUT244_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT244_WIDTH = "1" *)
- (* C_PROBE_OUT245_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT245_WIDTH = "1" *)
- (* C_PROBE_OUT246_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT246_WIDTH = "1" *)
- (* C_PROBE_OUT247_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT247_WIDTH = "1" *)
- (* C_PROBE_OUT248_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT248_WIDTH = "1" *)
- (* C_PROBE_OUT249_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT249_WIDTH = "1" *)
- (* C_PROBE_OUT24_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT24_WIDTH = "1" *)
- (* C_PROBE_OUT250_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT250_WIDTH = "1" *)
- (* C_PROBE_OUT251_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT251_WIDTH = "1" *)
- (* C_PROBE_OUT252_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT252_WIDTH = "1" *)
- (* C_PROBE_OUT253_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT253_WIDTH = "1" *)
- (* C_PROBE_OUT254_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT254_WIDTH = "1" *)
- (* C_PROBE_OUT255_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT255_WIDTH = "1" *)
- (* C_PROBE_OUT25_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT25_WIDTH = "1" *)
- (* C_PROBE_OUT26_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT26_WIDTH = "1" *)
- (* C_PROBE_OUT27_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT27_WIDTH = "1" *)
- (* C_PROBE_OUT28_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT28_WIDTH = "1" *)
- (* C_PROBE_OUT29_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT29_WIDTH = "1" *)
- (* C_PROBE_OUT2_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT2_WIDTH = "1" *)
- (* C_PROBE_OUT30_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT30_WIDTH = "1" *)
- (* C_PROBE_OUT31_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT31_WIDTH = "1" *)
- (* C_PROBE_OUT32_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT32_WIDTH = "1" *)
- (* C_PROBE_OUT33_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT33_WIDTH = "1" *)
- (* C_PROBE_OUT34_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT34_WIDTH = "1" *)
- (* C_PROBE_OUT35_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT35_WIDTH = "1" *)
- (* C_PROBE_OUT36_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT36_WIDTH = "1" *)
- (* C_PROBE_OUT37_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT37_WIDTH = "1" *)
- (* C_PROBE_OUT38_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT38_WIDTH = "1" *)
- (* C_PROBE_OUT39_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT39_WIDTH = "1" *)
- (* C_PROBE_OUT3_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT3_WIDTH = "1" *)
- (* C_PROBE_OUT40_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT40_WIDTH = "1" *)
- (* C_PROBE_OUT41_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT41_WIDTH = "1" *)
- (* C_PROBE_OUT42_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT42_WIDTH = "1" *)
- (* C_PROBE_OUT43_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT43_WIDTH = "1" *)
- (* C_PROBE_OUT44_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT44_WIDTH = "1" *)
- (* C_PROBE_OUT45_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT45_WIDTH = "1" *)
- (* C_PROBE_OUT46_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT46_WIDTH = "1" *)
- (* C_PROBE_OUT47_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT47_WIDTH = "1" *)
- (* C_PROBE_OUT48_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT48_WIDTH = "1" *)
- (* C_PROBE_OUT49_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT49_WIDTH = "1" *)
- (* C_PROBE_OUT4_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT4_WIDTH = "1" *)
- (* C_PROBE_OUT50_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT50_WIDTH = "1" *)
- (* C_PROBE_OUT51_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT51_WIDTH = "1" *)
- (* C_PROBE_OUT52_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT52_WIDTH = "1" *)
- (* C_PROBE_OUT53_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT53_WIDTH = "1" *)
- (* C_PROBE_OUT54_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT54_WIDTH = "1" *)
- (* C_PROBE_OUT55_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT55_WIDTH = "1" *)
- (* C_PROBE_OUT56_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT56_WIDTH = "1" *)
- (* C_PROBE_OUT57_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT57_WIDTH = "1" *)
- (* C_PROBE_OUT58_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT58_WIDTH = "1" *)
- (* C_PROBE_OUT59_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT59_WIDTH = "1" *)
- (* C_PROBE_OUT5_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT5_WIDTH = "1" *)
- (* C_PROBE_OUT60_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT60_WIDTH = "1" *)
- (* C_PROBE_OUT61_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT61_WIDTH = "1" *)
- (* C_PROBE_OUT62_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT62_WIDTH = "1" *)
- (* C_PROBE_OUT63_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT63_WIDTH = "1" *)
- (* C_PROBE_OUT64_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT64_WIDTH = "1" *)
- (* C_PROBE_OUT65_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT65_WIDTH = "1" *)
- (* C_PROBE_OUT66_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT66_WIDTH = "1" *)
- (* C_PROBE_OUT67_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT67_WIDTH = "1" *)
- (* C_PROBE_OUT68_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT68_WIDTH = "1" *)
- (* C_PROBE_OUT69_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT69_WIDTH = "1" *)
- (* C_PROBE_OUT6_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT6_WIDTH = "1" *)
- (* C_PROBE_OUT70_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT70_WIDTH = "1" *)
- (* C_PROBE_OUT71_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT71_WIDTH = "1" *)
- (* C_PROBE_OUT72_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT72_WIDTH = "1" *)
- (* C_PROBE_OUT73_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT73_WIDTH = "1" *)
- (* C_PROBE_OUT74_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT74_WIDTH = "1" *)
- (* C_PROBE_OUT75_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT75_WIDTH = "1" *)
- (* C_PROBE_OUT76_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT76_WIDTH = "1" *)
- (* C_PROBE_OUT77_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT77_WIDTH = "1" *)
- (* C_PROBE_OUT78_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT78_WIDTH = "1" *)
- (* C_PROBE_OUT79_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT79_WIDTH = "1" *)
- (* C_PROBE_OUT7_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT7_WIDTH = "1" *)
- (* C_PROBE_OUT80_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT80_WIDTH = "1" *)
- (* C_PROBE_OUT81_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT81_WIDTH = "1" *)
- (* C_PROBE_OUT82_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT82_WIDTH = "1" *)
- (* C_PROBE_OUT83_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT83_WIDTH = "1" *)
- (* C_PROBE_OUT84_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT84_WIDTH = "1" *)
- (* C_PROBE_OUT85_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT85_WIDTH = "1" *)
- (* C_PROBE_OUT86_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT86_WIDTH = "1" *)
- (* C_PROBE_OUT87_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT87_WIDTH = "1" *)
- (* C_PROBE_OUT88_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT88_WIDTH = "1" *)
- (* C_PROBE_OUT89_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT89_WIDTH = "1" *)
- (* C_PROBE_OUT8_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT8_WIDTH = "1" *)
- (* C_PROBE_OUT90_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT90_WIDTH = "1" *)
- (* C_PROBE_OUT91_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT91_WIDTH = "1" *)
- (* C_PROBE_OUT92_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT92_WIDTH = "1" *)
- (* C_PROBE_OUT93_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT93_WIDTH = "1" *)
- (* C_PROBE_OUT94_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT94_WIDTH = "1" *)
- (* C_PROBE_OUT95_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT95_WIDTH = "1" *)
- (* C_PROBE_OUT96_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT96_WIDTH = "1" *)
- (* C_PROBE_OUT97_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT97_WIDTH = "1" *)
- (* C_PROBE_OUT98_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT98_WIDTH = "1" *)
- (* C_PROBE_OUT99_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT99_WIDTH = "1" *)
- (* C_PROBE_OUT9_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT9_WIDTH = "1" *)
- (* C_USE_TEST_REG = "1" *)
- (* C_XDEVICEFAMILY = "zynq" *)
- (* C_XLNX_HW_PROBE_INFO = "DEFAULT" *)
- (* C_XSDB_SLAVE_TYPE = "33" *)
- (* DONT_TOUCH *)
- (* DowngradeIPIdentifiedWarnings = "yes" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *)
- (* LC_PROBE_IN_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* LC_PROBE_OUT_HIGH_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *)
- (* LC_PROBE_OUT_INIT_VAL_STRING = "256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* LC_PROBE_OUT_LOW_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *)
- (* LC_PROBE_OUT_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* LC_TOTAL_PROBE_IN_WIDTH = "0" *)
- (* LC_TOTAL_PROBE_OUT_WIDTH = "1" *)
- (* syn_noprune = "1" *)
- scalp_zynqps_vio_0_0_vio_v3_0_19_vio inst
- (.clk(clk),
- .probe_in0(1'b0),
- .probe_in1(1'b0),
- .probe_in10(1'b0),
- .probe_in100(1'b0),
- .probe_in101(1'b0),
- .probe_in102(1'b0),
- .probe_in103(1'b0),
- .probe_in104(1'b0),
- .probe_in105(1'b0),
- .probe_in106(1'b0),
- .probe_in107(1'b0),
- .probe_in108(1'b0),
- .probe_in109(1'b0),
- .probe_in11(1'b0),
- .probe_in110(1'b0),
- .probe_in111(1'b0),
- .probe_in112(1'b0),
- .probe_in113(1'b0),
- .probe_in114(1'b0),
- .probe_in115(1'b0),
- .probe_in116(1'b0),
- .probe_in117(1'b0),
- .probe_in118(1'b0),
- .probe_in119(1'b0),
- .probe_in12(1'b0),
- .probe_in120(1'b0),
- .probe_in121(1'b0),
- .probe_in122(1'b0),
- .probe_in123(1'b0),
- .probe_in124(1'b0),
- .probe_in125(1'b0),
- .probe_in126(1'b0),
- .probe_in127(1'b0),
- .probe_in128(1'b0),
- .probe_in129(1'b0),
- .probe_in13(1'b0),
- .probe_in130(1'b0),
- .probe_in131(1'b0),
- .probe_in132(1'b0),
- .probe_in133(1'b0),
- .probe_in134(1'b0),
- .probe_in135(1'b0),
- .probe_in136(1'b0),
- .probe_in137(1'b0),
- .probe_in138(1'b0),
- .probe_in139(1'b0),
- .probe_in14(1'b0),
- .probe_in140(1'b0),
- .probe_in141(1'b0),
- .probe_in142(1'b0),
- .probe_in143(1'b0),
- .probe_in144(1'b0),
- .probe_in145(1'b0),
- .probe_in146(1'b0),
- .probe_in147(1'b0),
- .probe_in148(1'b0),
- .probe_in149(1'b0),
- .probe_in15(1'b0),
- .probe_in150(1'b0),
- .probe_in151(1'b0),
- .probe_in152(1'b0),
- .probe_in153(1'b0),
- .probe_in154(1'b0),
- .probe_in155(1'b0),
- .probe_in156(1'b0),
- .probe_in157(1'b0),
- .probe_in158(1'b0),
- .probe_in159(1'b0),
- .probe_in16(1'b0),
- .probe_in160(1'b0),
- .probe_in161(1'b0),
- .probe_in162(1'b0),
- .probe_in163(1'b0),
- .probe_in164(1'b0),
- .probe_in165(1'b0),
- .probe_in166(1'b0),
- .probe_in167(1'b0),
- .probe_in168(1'b0),
- .probe_in169(1'b0),
- .probe_in17(1'b0),
- .probe_in170(1'b0),
- .probe_in171(1'b0),
- .probe_in172(1'b0),
- .probe_in173(1'b0),
- .probe_in174(1'b0),
- .probe_in175(1'b0),
- .probe_in176(1'b0),
- .probe_in177(1'b0),
- .probe_in178(1'b0),
- .probe_in179(1'b0),
- .probe_in18(1'b0),
- .probe_in180(1'b0),
- .probe_in181(1'b0),
- .probe_in182(1'b0),
- .probe_in183(1'b0),
- .probe_in184(1'b0),
- .probe_in185(1'b0),
- .probe_in186(1'b0),
- .probe_in187(1'b0),
- .probe_in188(1'b0),
- .probe_in189(1'b0),
- .probe_in19(1'b0),
- .probe_in190(1'b0),
- .probe_in191(1'b0),
- .probe_in192(1'b0),
- .probe_in193(1'b0),
- .probe_in194(1'b0),
- .probe_in195(1'b0),
- .probe_in196(1'b0),
- .probe_in197(1'b0),
- .probe_in198(1'b0),
- .probe_in199(1'b0),
- .probe_in2(1'b0),
- .probe_in20(1'b0),
- .probe_in200(1'b0),
- .probe_in201(1'b0),
- .probe_in202(1'b0),
- .probe_in203(1'b0),
- .probe_in204(1'b0),
- .probe_in205(1'b0),
- .probe_in206(1'b0),
- .probe_in207(1'b0),
- .probe_in208(1'b0),
- .probe_in209(1'b0),
- .probe_in21(1'b0),
- .probe_in210(1'b0),
- .probe_in211(1'b0),
- .probe_in212(1'b0),
- .probe_in213(1'b0),
- .probe_in214(1'b0),
- .probe_in215(1'b0),
- .probe_in216(1'b0),
- .probe_in217(1'b0),
- .probe_in218(1'b0),
- .probe_in219(1'b0),
- .probe_in22(1'b0),
- .probe_in220(1'b0),
- .probe_in221(1'b0),
- .probe_in222(1'b0),
- .probe_in223(1'b0),
- .probe_in224(1'b0),
- .probe_in225(1'b0),
- .probe_in226(1'b0),
- .probe_in227(1'b0),
- .probe_in228(1'b0),
- .probe_in229(1'b0),
- .probe_in23(1'b0),
- .probe_in230(1'b0),
- .probe_in231(1'b0),
- .probe_in232(1'b0),
- .probe_in233(1'b0),
- .probe_in234(1'b0),
- .probe_in235(1'b0),
- .probe_in236(1'b0),
- .probe_in237(1'b0),
- .probe_in238(1'b0),
- .probe_in239(1'b0),
- .probe_in24(1'b0),
- .probe_in240(1'b0),
- .probe_in241(1'b0),
- .probe_in242(1'b0),
- .probe_in243(1'b0),
- .probe_in244(1'b0),
- .probe_in245(1'b0),
- .probe_in246(1'b0),
- .probe_in247(1'b0),
- .probe_in248(1'b0),
- .probe_in249(1'b0),
- .probe_in25(1'b0),
- .probe_in250(1'b0),
- .probe_in251(1'b0),
- .probe_in252(1'b0),
- .probe_in253(1'b0),
- .probe_in254(1'b0),
- .probe_in255(1'b0),
- .probe_in26(1'b0),
- .probe_in27(1'b0),
- .probe_in28(1'b0),
- .probe_in29(1'b0),
- .probe_in3(1'b0),
- .probe_in30(1'b0),
- .probe_in31(1'b0),
- .probe_in32(1'b0),
- .probe_in33(1'b0),
- .probe_in34(1'b0),
- .probe_in35(1'b0),
- .probe_in36(1'b0),
- .probe_in37(1'b0),
- .probe_in38(1'b0),
- .probe_in39(1'b0),
- .probe_in4(1'b0),
- .probe_in40(1'b0),
- .probe_in41(1'b0),
- .probe_in42(1'b0),
- .probe_in43(1'b0),
- .probe_in44(1'b0),
- .probe_in45(1'b0),
- .probe_in46(1'b0),
- .probe_in47(1'b0),
- .probe_in48(1'b0),
- .probe_in49(1'b0),
- .probe_in5(1'b0),
- .probe_in50(1'b0),
- .probe_in51(1'b0),
- .probe_in52(1'b0),
- .probe_in53(1'b0),
- .probe_in54(1'b0),
- .probe_in55(1'b0),
- .probe_in56(1'b0),
- .probe_in57(1'b0),
- .probe_in58(1'b0),
- .probe_in59(1'b0),
- .probe_in6(1'b0),
- .probe_in60(1'b0),
- .probe_in61(1'b0),
- .probe_in62(1'b0),
- .probe_in63(1'b0),
- .probe_in64(1'b0),
- .probe_in65(1'b0),
- .probe_in66(1'b0),
- .probe_in67(1'b0),
- .probe_in68(1'b0),
- .probe_in69(1'b0),
- .probe_in7(1'b0),
- .probe_in70(1'b0),
- .probe_in71(1'b0),
- .probe_in72(1'b0),
- .probe_in73(1'b0),
- .probe_in74(1'b0),
- .probe_in75(1'b0),
- .probe_in76(1'b0),
- .probe_in77(1'b0),
- .probe_in78(1'b0),
- .probe_in79(1'b0),
- .probe_in8(1'b0),
- .probe_in80(1'b0),
- .probe_in81(1'b0),
- .probe_in82(1'b0),
- .probe_in83(1'b0),
- .probe_in84(1'b0),
- .probe_in85(1'b0),
- .probe_in86(1'b0),
- .probe_in87(1'b0),
- .probe_in88(1'b0),
- .probe_in89(1'b0),
- .probe_in9(1'b0),
- .probe_in90(1'b0),
- .probe_in91(1'b0),
- .probe_in92(1'b0),
- .probe_in93(1'b0),
- .probe_in94(1'b0),
- .probe_in95(1'b0),
- .probe_in96(1'b0),
- .probe_in97(1'b0),
- .probe_in98(1'b0),
- .probe_in99(1'b0),
- .probe_out0(probe_out0),
- .probe_out1(NLW_inst_probe_out1_UNCONNECTED[0]),
- .probe_out10(NLW_inst_probe_out10_UNCONNECTED[0]),
- .probe_out100(NLW_inst_probe_out100_UNCONNECTED[0]),
- .probe_out101(NLW_inst_probe_out101_UNCONNECTED[0]),
- .probe_out102(NLW_inst_probe_out102_UNCONNECTED[0]),
- .probe_out103(NLW_inst_probe_out103_UNCONNECTED[0]),
- .probe_out104(NLW_inst_probe_out104_UNCONNECTED[0]),
- .probe_out105(NLW_inst_probe_out105_UNCONNECTED[0]),
- .probe_out106(NLW_inst_probe_out106_UNCONNECTED[0]),
- .probe_out107(NLW_inst_probe_out107_UNCONNECTED[0]),
- .probe_out108(NLW_inst_probe_out108_UNCONNECTED[0]),
- .probe_out109(NLW_inst_probe_out109_UNCONNECTED[0]),
- .probe_out11(NLW_inst_probe_out11_UNCONNECTED[0]),
- .probe_out110(NLW_inst_probe_out110_UNCONNECTED[0]),
- .probe_out111(NLW_inst_probe_out111_UNCONNECTED[0]),
- .probe_out112(NLW_inst_probe_out112_UNCONNECTED[0]),
- .probe_out113(NLW_inst_probe_out113_UNCONNECTED[0]),
- .probe_out114(NLW_inst_probe_out114_UNCONNECTED[0]),
- .probe_out115(NLW_inst_probe_out115_UNCONNECTED[0]),
- .probe_out116(NLW_inst_probe_out116_UNCONNECTED[0]),
- .probe_out117(NLW_inst_probe_out117_UNCONNECTED[0]),
- .probe_out118(NLW_inst_probe_out118_UNCONNECTED[0]),
- .probe_out119(NLW_inst_probe_out119_UNCONNECTED[0]),
- .probe_out12(NLW_inst_probe_out12_UNCONNECTED[0]),
- .probe_out120(NLW_inst_probe_out120_UNCONNECTED[0]),
- .probe_out121(NLW_inst_probe_out121_UNCONNECTED[0]),
- .probe_out122(NLW_inst_probe_out122_UNCONNECTED[0]),
- .probe_out123(NLW_inst_probe_out123_UNCONNECTED[0]),
- .probe_out124(NLW_inst_probe_out124_UNCONNECTED[0]),
- .probe_out125(NLW_inst_probe_out125_UNCONNECTED[0]),
- .probe_out126(NLW_inst_probe_out126_UNCONNECTED[0]),
- .probe_out127(NLW_inst_probe_out127_UNCONNECTED[0]),
- .probe_out128(NLW_inst_probe_out128_UNCONNECTED[0]),
- .probe_out129(NLW_inst_probe_out129_UNCONNECTED[0]),
- .probe_out13(NLW_inst_probe_out13_UNCONNECTED[0]),
- .probe_out130(NLW_inst_probe_out130_UNCONNECTED[0]),
- .probe_out131(NLW_inst_probe_out131_UNCONNECTED[0]),
- .probe_out132(NLW_inst_probe_out132_UNCONNECTED[0]),
- .probe_out133(NLW_inst_probe_out133_UNCONNECTED[0]),
- .probe_out134(NLW_inst_probe_out134_UNCONNECTED[0]),
- .probe_out135(NLW_inst_probe_out135_UNCONNECTED[0]),
- .probe_out136(NLW_inst_probe_out136_UNCONNECTED[0]),
- .probe_out137(NLW_inst_probe_out137_UNCONNECTED[0]),
- .probe_out138(NLW_inst_probe_out138_UNCONNECTED[0]),
- .probe_out139(NLW_inst_probe_out139_UNCONNECTED[0]),
- .probe_out14(NLW_inst_probe_out14_UNCONNECTED[0]),
- .probe_out140(NLW_inst_probe_out140_UNCONNECTED[0]),
- .probe_out141(NLW_inst_probe_out141_UNCONNECTED[0]),
- .probe_out142(NLW_inst_probe_out142_UNCONNECTED[0]),
- .probe_out143(NLW_inst_probe_out143_UNCONNECTED[0]),
- .probe_out144(NLW_inst_probe_out144_UNCONNECTED[0]),
- .probe_out145(NLW_inst_probe_out145_UNCONNECTED[0]),
- .probe_out146(NLW_inst_probe_out146_UNCONNECTED[0]),
- .probe_out147(NLW_inst_probe_out147_UNCONNECTED[0]),
- .probe_out148(NLW_inst_probe_out148_UNCONNECTED[0]),
- .probe_out149(NLW_inst_probe_out149_UNCONNECTED[0]),
- .probe_out15(NLW_inst_probe_out15_UNCONNECTED[0]),
- .probe_out150(NLW_inst_probe_out150_UNCONNECTED[0]),
- .probe_out151(NLW_inst_probe_out151_UNCONNECTED[0]),
- .probe_out152(NLW_inst_probe_out152_UNCONNECTED[0]),
- .probe_out153(NLW_inst_probe_out153_UNCONNECTED[0]),
- .probe_out154(NLW_inst_probe_out154_UNCONNECTED[0]),
- .probe_out155(NLW_inst_probe_out155_UNCONNECTED[0]),
- .probe_out156(NLW_inst_probe_out156_UNCONNECTED[0]),
- .probe_out157(NLW_inst_probe_out157_UNCONNECTED[0]),
- .probe_out158(NLW_inst_probe_out158_UNCONNECTED[0]),
- .probe_out159(NLW_inst_probe_out159_UNCONNECTED[0]),
- .probe_out16(NLW_inst_probe_out16_UNCONNECTED[0]),
- .probe_out160(NLW_inst_probe_out160_UNCONNECTED[0]),
- .probe_out161(NLW_inst_probe_out161_UNCONNECTED[0]),
- .probe_out162(NLW_inst_probe_out162_UNCONNECTED[0]),
- .probe_out163(NLW_inst_probe_out163_UNCONNECTED[0]),
- .probe_out164(NLW_inst_probe_out164_UNCONNECTED[0]),
- .probe_out165(NLW_inst_probe_out165_UNCONNECTED[0]),
- .probe_out166(NLW_inst_probe_out166_UNCONNECTED[0]),
- .probe_out167(NLW_inst_probe_out167_UNCONNECTED[0]),
- .probe_out168(NLW_inst_probe_out168_UNCONNECTED[0]),
- .probe_out169(NLW_inst_probe_out169_UNCONNECTED[0]),
- .probe_out17(NLW_inst_probe_out17_UNCONNECTED[0]),
- .probe_out170(NLW_inst_probe_out170_UNCONNECTED[0]),
- .probe_out171(NLW_inst_probe_out171_UNCONNECTED[0]),
- .probe_out172(NLW_inst_probe_out172_UNCONNECTED[0]),
- .probe_out173(NLW_inst_probe_out173_UNCONNECTED[0]),
- .probe_out174(NLW_inst_probe_out174_UNCONNECTED[0]),
- .probe_out175(NLW_inst_probe_out175_UNCONNECTED[0]),
- .probe_out176(NLW_inst_probe_out176_UNCONNECTED[0]),
- .probe_out177(NLW_inst_probe_out177_UNCONNECTED[0]),
- .probe_out178(NLW_inst_probe_out178_UNCONNECTED[0]),
- .probe_out179(NLW_inst_probe_out179_UNCONNECTED[0]),
- .probe_out18(NLW_inst_probe_out18_UNCONNECTED[0]),
- .probe_out180(NLW_inst_probe_out180_UNCONNECTED[0]),
- .probe_out181(NLW_inst_probe_out181_UNCONNECTED[0]),
- .probe_out182(NLW_inst_probe_out182_UNCONNECTED[0]),
- .probe_out183(NLW_inst_probe_out183_UNCONNECTED[0]),
- .probe_out184(NLW_inst_probe_out184_UNCONNECTED[0]),
- .probe_out185(NLW_inst_probe_out185_UNCONNECTED[0]),
- .probe_out186(NLW_inst_probe_out186_UNCONNECTED[0]),
- .probe_out187(NLW_inst_probe_out187_UNCONNECTED[0]),
- .probe_out188(NLW_inst_probe_out188_UNCONNECTED[0]),
- .probe_out189(NLW_inst_probe_out189_UNCONNECTED[0]),
- .probe_out19(NLW_inst_probe_out19_UNCONNECTED[0]),
- .probe_out190(NLW_inst_probe_out190_UNCONNECTED[0]),
- .probe_out191(NLW_inst_probe_out191_UNCONNECTED[0]),
- .probe_out192(NLW_inst_probe_out192_UNCONNECTED[0]),
- .probe_out193(NLW_inst_probe_out193_UNCONNECTED[0]),
- .probe_out194(NLW_inst_probe_out194_UNCONNECTED[0]),
- .probe_out195(NLW_inst_probe_out195_UNCONNECTED[0]),
- .probe_out196(NLW_inst_probe_out196_UNCONNECTED[0]),
- .probe_out197(NLW_inst_probe_out197_UNCONNECTED[0]),
- .probe_out198(NLW_inst_probe_out198_UNCONNECTED[0]),
- .probe_out199(NLW_inst_probe_out199_UNCONNECTED[0]),
- .probe_out2(NLW_inst_probe_out2_UNCONNECTED[0]),
- .probe_out20(NLW_inst_probe_out20_UNCONNECTED[0]),
- .probe_out200(NLW_inst_probe_out200_UNCONNECTED[0]),
- .probe_out201(NLW_inst_probe_out201_UNCONNECTED[0]),
- .probe_out202(NLW_inst_probe_out202_UNCONNECTED[0]),
- .probe_out203(NLW_inst_probe_out203_UNCONNECTED[0]),
- .probe_out204(NLW_inst_probe_out204_UNCONNECTED[0]),
- .probe_out205(NLW_inst_probe_out205_UNCONNECTED[0]),
- .probe_out206(NLW_inst_probe_out206_UNCONNECTED[0]),
- .probe_out207(NLW_inst_probe_out207_UNCONNECTED[0]),
- .probe_out208(NLW_inst_probe_out208_UNCONNECTED[0]),
- .probe_out209(NLW_inst_probe_out209_UNCONNECTED[0]),
- .probe_out21(NLW_inst_probe_out21_UNCONNECTED[0]),
- .probe_out210(NLW_inst_probe_out210_UNCONNECTED[0]),
- .probe_out211(NLW_inst_probe_out211_UNCONNECTED[0]),
- .probe_out212(NLW_inst_probe_out212_UNCONNECTED[0]),
- .probe_out213(NLW_inst_probe_out213_UNCONNECTED[0]),
- .probe_out214(NLW_inst_probe_out214_UNCONNECTED[0]),
- .probe_out215(NLW_inst_probe_out215_UNCONNECTED[0]),
- .probe_out216(NLW_inst_probe_out216_UNCONNECTED[0]),
- .probe_out217(NLW_inst_probe_out217_UNCONNECTED[0]),
- .probe_out218(NLW_inst_probe_out218_UNCONNECTED[0]),
- .probe_out219(NLW_inst_probe_out219_UNCONNECTED[0]),
- .probe_out22(NLW_inst_probe_out22_UNCONNECTED[0]),
- .probe_out220(NLW_inst_probe_out220_UNCONNECTED[0]),
- .probe_out221(NLW_inst_probe_out221_UNCONNECTED[0]),
- .probe_out222(NLW_inst_probe_out222_UNCONNECTED[0]),
- .probe_out223(NLW_inst_probe_out223_UNCONNECTED[0]),
- .probe_out224(NLW_inst_probe_out224_UNCONNECTED[0]),
- .probe_out225(NLW_inst_probe_out225_UNCONNECTED[0]),
- .probe_out226(NLW_inst_probe_out226_UNCONNECTED[0]),
- .probe_out227(NLW_inst_probe_out227_UNCONNECTED[0]),
- .probe_out228(NLW_inst_probe_out228_UNCONNECTED[0]),
- .probe_out229(NLW_inst_probe_out229_UNCONNECTED[0]),
- .probe_out23(NLW_inst_probe_out23_UNCONNECTED[0]),
- .probe_out230(NLW_inst_probe_out230_UNCONNECTED[0]),
- .probe_out231(NLW_inst_probe_out231_UNCONNECTED[0]),
- .probe_out232(NLW_inst_probe_out232_UNCONNECTED[0]),
- .probe_out233(NLW_inst_probe_out233_UNCONNECTED[0]),
- .probe_out234(NLW_inst_probe_out234_UNCONNECTED[0]),
- .probe_out235(NLW_inst_probe_out235_UNCONNECTED[0]),
- .probe_out236(NLW_inst_probe_out236_UNCONNECTED[0]),
- .probe_out237(NLW_inst_probe_out237_UNCONNECTED[0]),
- .probe_out238(NLW_inst_probe_out238_UNCONNECTED[0]),
- .probe_out239(NLW_inst_probe_out239_UNCONNECTED[0]),
- .probe_out24(NLW_inst_probe_out24_UNCONNECTED[0]),
- .probe_out240(NLW_inst_probe_out240_UNCONNECTED[0]),
- .probe_out241(NLW_inst_probe_out241_UNCONNECTED[0]),
- .probe_out242(NLW_inst_probe_out242_UNCONNECTED[0]),
- .probe_out243(NLW_inst_probe_out243_UNCONNECTED[0]),
- .probe_out244(NLW_inst_probe_out244_UNCONNECTED[0]),
- .probe_out245(NLW_inst_probe_out245_UNCONNECTED[0]),
- .probe_out246(NLW_inst_probe_out246_UNCONNECTED[0]),
- .probe_out247(NLW_inst_probe_out247_UNCONNECTED[0]),
- .probe_out248(NLW_inst_probe_out248_UNCONNECTED[0]),
- .probe_out249(NLW_inst_probe_out249_UNCONNECTED[0]),
- .probe_out25(NLW_inst_probe_out25_UNCONNECTED[0]),
- .probe_out250(NLW_inst_probe_out250_UNCONNECTED[0]),
- .probe_out251(NLW_inst_probe_out251_UNCONNECTED[0]),
- .probe_out252(NLW_inst_probe_out252_UNCONNECTED[0]),
- .probe_out253(NLW_inst_probe_out253_UNCONNECTED[0]),
- .probe_out254(NLW_inst_probe_out254_UNCONNECTED[0]),
- .probe_out255(NLW_inst_probe_out255_UNCONNECTED[0]),
- .probe_out26(NLW_inst_probe_out26_UNCONNECTED[0]),
- .probe_out27(NLW_inst_probe_out27_UNCONNECTED[0]),
- .probe_out28(NLW_inst_probe_out28_UNCONNECTED[0]),
- .probe_out29(NLW_inst_probe_out29_UNCONNECTED[0]),
- .probe_out3(NLW_inst_probe_out3_UNCONNECTED[0]),
- .probe_out30(NLW_inst_probe_out30_UNCONNECTED[0]),
- .probe_out31(NLW_inst_probe_out31_UNCONNECTED[0]),
- .probe_out32(NLW_inst_probe_out32_UNCONNECTED[0]),
- .probe_out33(NLW_inst_probe_out33_UNCONNECTED[0]),
- .probe_out34(NLW_inst_probe_out34_UNCONNECTED[0]),
- .probe_out35(NLW_inst_probe_out35_UNCONNECTED[0]),
- .probe_out36(NLW_inst_probe_out36_UNCONNECTED[0]),
- .probe_out37(NLW_inst_probe_out37_UNCONNECTED[0]),
- .probe_out38(NLW_inst_probe_out38_UNCONNECTED[0]),
- .probe_out39(NLW_inst_probe_out39_UNCONNECTED[0]),
- .probe_out4(NLW_inst_probe_out4_UNCONNECTED[0]),
- .probe_out40(NLW_inst_probe_out40_UNCONNECTED[0]),
- .probe_out41(NLW_inst_probe_out41_UNCONNECTED[0]),
- .probe_out42(NLW_inst_probe_out42_UNCONNECTED[0]),
- .probe_out43(NLW_inst_probe_out43_UNCONNECTED[0]),
- .probe_out44(NLW_inst_probe_out44_UNCONNECTED[0]),
- .probe_out45(NLW_inst_probe_out45_UNCONNECTED[0]),
- .probe_out46(NLW_inst_probe_out46_UNCONNECTED[0]),
- .probe_out47(NLW_inst_probe_out47_UNCONNECTED[0]),
- .probe_out48(NLW_inst_probe_out48_UNCONNECTED[0]),
- .probe_out49(NLW_inst_probe_out49_UNCONNECTED[0]),
- .probe_out5(NLW_inst_probe_out5_UNCONNECTED[0]),
- .probe_out50(NLW_inst_probe_out50_UNCONNECTED[0]),
- .probe_out51(NLW_inst_probe_out51_UNCONNECTED[0]),
- .probe_out52(NLW_inst_probe_out52_UNCONNECTED[0]),
- .probe_out53(NLW_inst_probe_out53_UNCONNECTED[0]),
- .probe_out54(NLW_inst_probe_out54_UNCONNECTED[0]),
- .probe_out55(NLW_inst_probe_out55_UNCONNECTED[0]),
- .probe_out56(NLW_inst_probe_out56_UNCONNECTED[0]),
- .probe_out57(NLW_inst_probe_out57_UNCONNECTED[0]),
- .probe_out58(NLW_inst_probe_out58_UNCONNECTED[0]),
- .probe_out59(NLW_inst_probe_out59_UNCONNECTED[0]),
- .probe_out6(NLW_inst_probe_out6_UNCONNECTED[0]),
- .probe_out60(NLW_inst_probe_out60_UNCONNECTED[0]),
- .probe_out61(NLW_inst_probe_out61_UNCONNECTED[0]),
- .probe_out62(NLW_inst_probe_out62_UNCONNECTED[0]),
- .probe_out63(NLW_inst_probe_out63_UNCONNECTED[0]),
- .probe_out64(NLW_inst_probe_out64_UNCONNECTED[0]),
- .probe_out65(NLW_inst_probe_out65_UNCONNECTED[0]),
- .probe_out66(NLW_inst_probe_out66_UNCONNECTED[0]),
- .probe_out67(NLW_inst_probe_out67_UNCONNECTED[0]),
- .probe_out68(NLW_inst_probe_out68_UNCONNECTED[0]),
- .probe_out69(NLW_inst_probe_out69_UNCONNECTED[0]),
- .probe_out7(NLW_inst_probe_out7_UNCONNECTED[0]),
- .probe_out70(NLW_inst_probe_out70_UNCONNECTED[0]),
- .probe_out71(NLW_inst_probe_out71_UNCONNECTED[0]),
- .probe_out72(NLW_inst_probe_out72_UNCONNECTED[0]),
- .probe_out73(NLW_inst_probe_out73_UNCONNECTED[0]),
- .probe_out74(NLW_inst_probe_out74_UNCONNECTED[0]),
- .probe_out75(NLW_inst_probe_out75_UNCONNECTED[0]),
- .probe_out76(NLW_inst_probe_out76_UNCONNECTED[0]),
- .probe_out77(NLW_inst_probe_out77_UNCONNECTED[0]),
- .probe_out78(NLW_inst_probe_out78_UNCONNECTED[0]),
- .probe_out79(NLW_inst_probe_out79_UNCONNECTED[0]),
- .probe_out8(NLW_inst_probe_out8_UNCONNECTED[0]),
- .probe_out80(NLW_inst_probe_out80_UNCONNECTED[0]),
- .probe_out81(NLW_inst_probe_out81_UNCONNECTED[0]),
- .probe_out82(NLW_inst_probe_out82_UNCONNECTED[0]),
- .probe_out83(NLW_inst_probe_out83_UNCONNECTED[0]),
- .probe_out84(NLW_inst_probe_out84_UNCONNECTED[0]),
- .probe_out85(NLW_inst_probe_out85_UNCONNECTED[0]),
- .probe_out86(NLW_inst_probe_out86_UNCONNECTED[0]),
- .probe_out87(NLW_inst_probe_out87_UNCONNECTED[0]),
- .probe_out88(NLW_inst_probe_out88_UNCONNECTED[0]),
- .probe_out89(NLW_inst_probe_out89_UNCONNECTED[0]),
- .probe_out9(NLW_inst_probe_out9_UNCONNECTED[0]),
- .probe_out90(NLW_inst_probe_out90_UNCONNECTED[0]),
- .probe_out91(NLW_inst_probe_out91_UNCONNECTED[0]),
- .probe_out92(NLW_inst_probe_out92_UNCONNECTED[0]),
- .probe_out93(NLW_inst_probe_out93_UNCONNECTED[0]),
- .probe_out94(NLW_inst_probe_out94_UNCONNECTED[0]),
- .probe_out95(NLW_inst_probe_out95_UNCONNECTED[0]),
- .probe_out96(NLW_inst_probe_out96_UNCONNECTED[0]),
- .probe_out97(NLW_inst_probe_out97_UNCONNECTED[0]),
- .probe_out98(NLW_inst_probe_out98_UNCONNECTED[0]),
- .probe_out99(NLW_inst_probe_out99_UNCONNECTED[0]),
- .sl_iport0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .sl_oport0(NLW_inst_sl_oport0_UNCONNECTED[16:0]));
-endmodule
-
-(* ORIG_REF_NAME = "vio_v3_0_19_decoder" *)
-module scalp_zynqps_vio_0_0_vio_v3_0_19_decoder
- (s_drdy_i,
- in0,
- SR,
- xsdb_wr__0,
- \G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ,
- \G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ,
- s_do_i,
- s_rst_o,
- out,
- s_daddr_o,
- s_den_o,
- s_dwe_o,
- Q,
- Probe_out_reg);
- output s_drdy_i;
- output in0;
- output [0:0]SR;
- output xsdb_wr__0;
- output \G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ;
- output \G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ;
- output [15:0]s_do_i;
- input s_rst_o;
- input out;
- input [16:0]s_daddr_o;
- input s_den_o;
- input s_dwe_o;
- input [15:0]Q;
- input [0:0]Probe_out_reg;
-
- wire \Bus_data_out[0]_i_1_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ;
- wire [0:0]Probe_out_reg;
- wire [15:0]Q;
- wire [0:0]SR;
- wire clear_int_i_1_n_0;
- wire committ_int_i_1_n_0;
- wire [15:0]data_info_probe_in;
- wire in0;
- wire int_cnt_rst;
- wire int_cnt_rst_i_1_n_0;
- wire out;
- wire [15:0]probe_out_modified;
- wire rd_en_p1;
- wire rd_en_p2;
- wire [16:0]s_daddr_o;
- wire s_den_o;
- wire [15:0]s_do_i;
- wire s_drdy_i;
- wire s_dwe_o;
- wire s_rst_o;
- wire wr_control_reg;
- wire \wr_en[2]_i_1_n_0 ;
- wire \wr_en[2]_i_2_n_0 ;
- wire \wr_en[4]_i_1_n_0 ;
- wire \wr_en[4]_i_2_n_0 ;
- wire \wr_en[4]_i_3_n_0 ;
- wire wr_probe_out_modified;
- wire [2:0]xsdb_addr_2_0_p1;
- wire [2:0]xsdb_addr_2_0_p2;
- wire xsdb_addr_8_p1;
- wire xsdb_addr_8_p2;
- wire xsdb_drdy_i_1_n_0;
- wire xsdb_rd;
- wire xsdb_wr__0;
-
- LUT3 #(
- .INIT(8'hB8))
- \Bus_data_out[0]_i_1
- (.I0(Probe_out_reg),
- .I1(xsdb_addr_8_p2),
- .I2(data_info_probe_in[0]),
- .O(\Bus_data_out[0]_i_1_n_0 ));
- LUT5 #(
- .INIT(32'h054A004A))
- \Bus_data_out[0]_i_2
- (.I0(xsdb_addr_2_0_p2[0]),
- .I1(in0),
- .I2(xsdb_addr_2_0_p2[1]),
- .I3(xsdb_addr_2_0_p2[2]),
- .I4(probe_out_modified[0]),
- .O(data_info_probe_in[0]));
- (* SOFT_HLUTNM = "soft_lutpair16" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[10]_i_1
- (.I0(probe_out_modified[10]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[10]));
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[11]_i_1
- (.I0(probe_out_modified[11]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[11]));
- (* SOFT_HLUTNM = "soft_lutpair15" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[12]_i_1
- (.I0(probe_out_modified[12]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[12]));
- (* SOFT_HLUTNM = "soft_lutpair14" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[13]_i_1
- (.I0(probe_out_modified[13]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[13]));
- (* SOFT_HLUTNM = "soft_lutpair16" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[14]_i_1
- (.I0(probe_out_modified[14]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[14]));
- (* SOFT_HLUTNM = "soft_lutpair11" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[15]_i_1
- (.I0(probe_out_modified[15]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[15]));
- LUT5 #(
- .INIT(32'h05400040))
- \Bus_data_out[1]_i_1
- (.I0(xsdb_addr_2_0_p2[0]),
- .I1(probe_out_modified[1]),
- .I2(xsdb_addr_2_0_p2[2]),
- .I3(xsdb_addr_2_0_p2[1]),
- .I4(SR),
- .O(data_info_probe_in[1]));
- LUT5 #(
- .INIT(32'h05400040))
- \Bus_data_out[2]_i_1
- (.I0(xsdb_addr_2_0_p2[0]),
- .I1(probe_out_modified[2]),
- .I2(xsdb_addr_2_0_p2[2]),
- .I3(xsdb_addr_2_0_p2[1]),
- .I4(int_cnt_rst),
- .O(data_info_probe_in[2]));
- (* SOFT_HLUTNM = "soft_lutpair11" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[3]_i_1
- (.I0(probe_out_modified[3]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[3]));
- (* SOFT_HLUTNM = "soft_lutpair12" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[4]_i_1
- (.I0(probe_out_modified[4]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[4]));
- (* SOFT_HLUTNM = "soft_lutpair13" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[5]_i_1
- (.I0(probe_out_modified[5]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[5]));
- (* SOFT_HLUTNM = "soft_lutpair12" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[6]_i_1
- (.I0(probe_out_modified[6]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[6]));
- (* SOFT_HLUTNM = "soft_lutpair13" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[7]_i_1
- (.I0(probe_out_modified[7]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[7]));
- (* SOFT_HLUTNM = "soft_lutpair14" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[8]_i_1
- (.I0(probe_out_modified[8]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[8]));
- (* SOFT_HLUTNM = "soft_lutpair15" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[9]_i_1
- (.I0(probe_out_modified[9]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[9]));
- FDRE \Bus_data_out_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(\Bus_data_out[0]_i_1_n_0 ),
- .Q(s_do_i[0]),
- .R(1'b0));
- FDRE \Bus_data_out_reg[10]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[10]),
- .Q(s_do_i[10]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[11]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[11]),
- .Q(s_do_i[11]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[12]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[12]),
- .Q(s_do_i[12]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[13]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[13]),
- .Q(s_do_i[13]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[14]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[14]),
- .Q(s_do_i[14]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[15]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[15]),
- .Q(s_do_i[15]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[1]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[1]),
- .Q(s_do_i[1]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[2]),
- .Q(s_do_i[2]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[3]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[3]),
- .Q(s_do_i[3]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[4]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[4]),
- .Q(s_do_i[4]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[5]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[5]),
- .Q(s_do_i[5]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[6]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[6]),
- .Q(s_do_i[6]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[7]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[7]),
- .Q(s_do_i[7]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[8]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[8]),
- .Q(s_do_i[8]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[9]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[9]),
- .Q(s_do_i[9]),
- .R(xsdb_addr_8_p2));
- LUT2 #(
- .INIT(4'h8))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_2
- (.I0(s_den_o),
- .I1(s_dwe_o),
- .O(xsdb_wr__0));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_4
- (.I0(s_daddr_o[14]),
- .I1(s_daddr_o[15]),
- .I2(s_daddr_o[12]),
- .I3(s_daddr_o[13]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_6
- (.I0(s_daddr_o[6]),
- .I1(s_daddr_o[7]),
- .I2(s_daddr_o[4]),
- .I3(s_daddr_o[5]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ));
- LUT3 #(
- .INIT(8'hB8))
- clear_int_i_1
- (.I0(Q[1]),
- .I1(wr_control_reg),
- .I2(SR),
- .O(clear_int_i_1_n_0));
- FDRE clear_int_reg
- (.C(out),
- .CE(1'b1),
- .D(clear_int_i_1_n_0),
- .Q(SR),
- .R(s_rst_o));
- (* SOFT_HLUTNM = "soft_lutpair17" *)
- LUT3 #(
- .INIT(8'hB8))
- committ_int_i_1
- (.I0(Q[0]),
- .I1(wr_control_reg),
- .I2(in0),
- .O(committ_int_i_1_n_0));
- FDRE committ_int_reg
- (.C(out),
- .CE(1'b1),
- .D(committ_int_i_1_n_0),
- .Q(in0),
- .R(s_rst_o));
- (* SOFT_HLUTNM = "soft_lutpair17" *)
- LUT3 #(
- .INIT(8'hB8))
- int_cnt_rst_i_1
- (.I0(Q[2]),
- .I1(wr_control_reg),
- .I2(int_cnt_rst),
- .O(int_cnt_rst_i_1_n_0));
- FDRE int_cnt_rst_reg
- (.C(out),
- .CE(1'b1),
- .D(int_cnt_rst_i_1_n_0),
- .Q(int_cnt_rst),
- .R(s_rst_o));
- FDRE \probe_out_modified_reg[0]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[0]),
- .Q(probe_out_modified[0]),
- .R(SR));
- FDRE \probe_out_modified_reg[10]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[10]),
- .Q(probe_out_modified[10]),
- .R(SR));
- FDRE \probe_out_modified_reg[11]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[11]),
- .Q(probe_out_modified[11]),
- .R(SR));
- FDRE \probe_out_modified_reg[12]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[12]),
- .Q(probe_out_modified[12]),
- .R(SR));
- FDRE \probe_out_modified_reg[13]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[13]),
- .Q(probe_out_modified[13]),
- .R(SR));
- FDRE \probe_out_modified_reg[14]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[14]),
- .Q(probe_out_modified[14]),
- .R(SR));
- FDRE \probe_out_modified_reg[15]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[15]),
- .Q(probe_out_modified[15]),
- .R(SR));
- FDRE \probe_out_modified_reg[1]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[1]),
- .Q(probe_out_modified[1]),
- .R(SR));
- FDRE \probe_out_modified_reg[2]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[2]),
- .Q(probe_out_modified[2]),
- .R(SR));
- FDRE \probe_out_modified_reg[3]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[3]),
- .Q(probe_out_modified[3]),
- .R(SR));
- FDRE \probe_out_modified_reg[4]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[4]),
- .Q(probe_out_modified[4]),
- .R(SR));
- FDRE \probe_out_modified_reg[5]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[5]),
- .Q(probe_out_modified[5]),
- .R(SR));
- FDRE \probe_out_modified_reg[6]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[6]),
- .Q(probe_out_modified[6]),
- .R(SR));
- FDRE \probe_out_modified_reg[7]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[7]),
- .Q(probe_out_modified[7]),
- .R(SR));
- FDRE \probe_out_modified_reg[8]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[8]),
- .Q(probe_out_modified[8]),
- .R(SR));
- FDRE \probe_out_modified_reg[9]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[9]),
- .Q(probe_out_modified[9]),
- .R(SR));
- (* SOFT_HLUTNM = "soft_lutpair18" *)
- LUT2 #(
- .INIT(4'h2))
- rd_en_p1_i_1
- (.I0(s_den_o),
- .I1(s_dwe_o),
- .O(xsdb_rd));
- FDRE rd_en_p1_reg
- (.C(out),
- .CE(1'b1),
- .D(xsdb_rd),
- .Q(rd_en_p1),
- .R(s_rst_o));
- FDRE rd_en_p2_reg
- (.C(out),
- .CE(1'b1),
- .D(rd_en_p1),
- .Q(rd_en_p2),
- .R(s_rst_o));
- LUT6 #(
- .INIT(64'h0000000200000000))
- \wr_en[2]_i_1
- (.I0(xsdb_wr__0),
- .I1(\wr_en[4]_i_2_n_0 ),
- .I2(\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ),
- .I3(\wr_en[2]_i_2_n_0 ),
- .I4(\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ),
- .I5(s_daddr_o[1]),
- .O(\wr_en[2]_i_1_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair10" *)
- LUT4 #(
- .INIT(16'hFFFE))
- \wr_en[2]_i_2
- (.I0(s_daddr_o[2]),
- .I1(s_daddr_o[3]),
- .I2(s_daddr_o[0]),
- .I3(s_daddr_o[16]),
- .O(\wr_en[2]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'h0000000200000000))
- \wr_en[4]_i_1
- (.I0(xsdb_wr__0),
- .I1(\wr_en[4]_i_2_n_0 ),
- .I2(\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ),
- .I3(\wr_en[4]_i_3_n_0 ),
- .I4(\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ),
- .I5(s_daddr_o[2]),
- .O(\wr_en[4]_i_1_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \wr_en[4]_i_2
- (.I0(s_daddr_o[10]),
- .I1(s_daddr_o[11]),
- .I2(s_daddr_o[8]),
- .I3(s_daddr_o[9]),
- .O(\wr_en[4]_i_2_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair10" *)
- LUT4 #(
- .INIT(16'hFFFE))
- \wr_en[4]_i_3
- (.I0(s_daddr_o[16]),
- .I1(s_daddr_o[3]),
- .I2(s_daddr_o[0]),
- .I3(s_daddr_o[1]),
- .O(\wr_en[4]_i_3_n_0 ));
- FDRE \wr_en_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(\wr_en[2]_i_1_n_0 ),
- .Q(wr_control_reg),
- .R(1'b0));
- FDRE \wr_en_reg[4]
- (.C(out),
- .CE(1'b1),
- .D(\wr_en[4]_i_1_n_0 ),
- .Q(wr_probe_out_modified),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p1_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[0]),
- .Q(xsdb_addr_2_0_p1[0]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p1_reg[1]
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[1]),
- .Q(xsdb_addr_2_0_p1[1]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p1_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[2]),
- .Q(xsdb_addr_2_0_p1[2]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p2_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_2_0_p1[0]),
- .Q(xsdb_addr_2_0_p2[0]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p2_reg[1]
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_2_0_p1[1]),
- .Q(xsdb_addr_2_0_p2[1]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p2_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_2_0_p1[2]),
- .Q(xsdb_addr_2_0_p2[2]),
- .R(1'b0));
- FDRE xsdb_addr_8_p1_reg
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[8]),
- .Q(xsdb_addr_8_p1),
- .R(1'b0));
- FDRE xsdb_addr_8_p2_reg
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_8_p1),
- .Q(xsdb_addr_8_p2),
- .R(1'b0));
- (* SOFT_HLUTNM = "soft_lutpair18" *)
- LUT3 #(
- .INIT(8'hF8))
- xsdb_drdy_i_1
- (.I0(s_dwe_o),
- .I1(s_den_o),
- .I2(rd_en_p2),
- .O(xsdb_drdy_i_1_n_0));
- FDRE xsdb_drdy_reg
- (.C(out),
- .CE(1'b1),
- .D(xsdb_drdy_i_1_n_0),
- .Q(s_drdy_i),
- .R(s_rst_o));
-endmodule
-
-(* ORIG_REF_NAME = "vio_v3_0_19_probe_out_all" *)
-module scalp_zynqps_vio_0_0_vio_v3_0_19_probe_out_all
- (probe_out0,
- Probe_out_reg,
- SR,
- in0,
- clk,
- out,
- xsdb_wr__0,
- \G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ,
- \G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ,
- s_daddr_o,
- Q);
- output [0:0]probe_out0;
- output [0:0]Probe_out_reg;
- input [0:0]SR;
- input in0;
- input clk;
- input out;
- input xsdb_wr__0;
- input \G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ;
- input \G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ;
- input [8:0]s_daddr_o;
- input [0:0]Q;
-
- (* async_reg = "true" *) wire Committ_1;
- (* async_reg = "true" *) wire Committ_2;
- wire \G_PROBE_OUT[0].PROBE_OUT0_INST_n_1 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_1_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_3_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_5_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ;
- wire \G_PROBE_OUT[0].wr_probe_out_reg_n_0_[0] ;
- wire [0:0]Probe_out_reg;
- wire [0:0]Q;
- wire [0:0]SR;
- wire clk;
- wire in0;
- wire out;
- wire [0:0]probe_out0;
- wire [8:0]s_daddr_o;
- wire xsdb_wr__0;
-
- (* ASYNC_REG *)
- (* KEEP = "yes" *)
- FDRE Committ_1_reg
- (.C(clk),
- .CE(1'b1),
- .D(in0),
- .Q(Committ_1),
- .R(1'b0));
- (* ASYNC_REG *)
- (* KEEP = "yes" *)
- FDRE Committ_2_reg
- (.C(clk),
- .CE(1'b1),
- .D(Committ_1),
- .Q(Committ_2),
- .R(1'b0));
- scalp_zynqps_vio_0_0_vio_v3_0_19_probe_out_one \G_PROBE_OUT[0].PROBE_OUT0_INST
- (.Q(Q),
- .SR(SR),
- .clk(clk),
- .\data_int_reg[0]_0 (\G_PROBE_OUT[0].PROBE_OUT0_INST_n_1 ),
- .\data_int_reg[0]_1 (out),
- .\data_int_reg[0]_2 (\G_PROBE_OUT[0].wr_probe_out_reg_n_0_[0] ),
- .out(Committ_2),
- .probe_out0(probe_out0));
- LUT6 #(
- .INIT(64'h0000000200000000))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_1
- (.I0(xsdb_wr__0),
- .I1(\G_PROBE_OUT[0].wr_probe_out[0]_i_3_n_0 ),
- .I2(\G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ),
- .I3(\G_PROBE_OUT[0].wr_probe_out[0]_i_5_n_0 ),
- .I4(\G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ),
- .I5(s_daddr_o[4]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_1_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_3
- (.I0(s_daddr_o[6]),
- .I1(s_daddr_o[7]),
- .I2(s_daddr_o[8]),
- .I3(s_daddr_o[5]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_3_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_5
- (.I0(s_daddr_o[2]),
- .I1(s_daddr_o[3]),
- .I2(s_daddr_o[0]),
- .I3(s_daddr_o[1]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_5_n_0 ));
- FDRE \G_PROBE_OUT[0].wr_probe_out_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(\G_PROBE_OUT[0].wr_probe_out[0]_i_1_n_0 ),
- .Q(\G_PROBE_OUT[0].wr_probe_out_reg_n_0_[0] ),
- .R(1'b0));
- FDRE \Probe_out_reg_int_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(\G_PROBE_OUT[0].PROBE_OUT0_INST_n_1 ),
- .Q(Probe_out_reg),
- .R(1'b0));
-endmodule
-
-(* ORIG_REF_NAME = "vio_v3_0_19_probe_out_one" *)
-module scalp_zynqps_vio_0_0_vio_v3_0_19_probe_out_one
- (probe_out0,
- \data_int_reg[0]_0 ,
- SR,
- out,
- clk,
- \data_int_reg[0]_1 ,
- Q,
- \data_int_reg[0]_2 );
- output [0:0]probe_out0;
- output \data_int_reg[0]_0 ;
- input [0:0]SR;
- input out;
- input clk;
- input \data_int_reg[0]_1 ;
- input [0:0]Q;
- input \data_int_reg[0]_2 ;
-
- wire [0:0]Q;
- (* DIRECT_RESET *) wire [0:0]SR;
- wire clk;
- wire \data_int[0]_i_1_n_0 ;
- wire \data_int_reg[0]_0 ;
- wire \data_int_reg[0]_1 ;
- wire \data_int_reg[0]_2 ;
- wire out;
- (* DONT_TOUCH *) wire [0:0]probe_out0;
-
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- FDRE \Probe_out_reg[0]
- (.C(clk),
- .CE(out),
- .D(\data_int_reg[0]_0 ),
- .Q(probe_out0),
- .R(SR));
- LUT3 #(
- .INIT(8'hB8))
- \data_int[0]_i_1
- (.I0(Q),
- .I1(\data_int_reg[0]_2 ),
- .I2(\data_int_reg[0]_0 ),
- .O(\data_int[0]_i_1_n_0 ));
- FDRE \data_int_reg[0]
- (.C(\data_int_reg[0]_1 ),
- .CE(1'b1),
- .D(\data_int[0]_i_1_n_0 ),
- .Q(\data_int_reg[0]_0 ),
- .R(SR));
-endmodule
-
-(* C_BUILD_REVISION = "0" *) (* C_BUS_ADDR_WIDTH = "17" *) (* C_BUS_DATA_WIDTH = "16" *)
-(* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* C_CORE_MAJOR_VER = "2" *)
-(* C_CORE_MINOR_ALPHA_VER = "97" *) (* C_CORE_MINOR_VER = "0" *) (* C_CORE_TYPE = "2" *)
-(* C_CSE_DRV_VER = "1" *) (* C_EN_PROBE_IN_ACTIVITY = "0" *) (* C_EN_SYNCHRONIZATION = "1" *)
-(* C_MAJOR_VERSION = "2013" *) (* C_MAX_NUM_PROBE = "256" *) (* C_MAX_WIDTH_PER_PROBE = "256" *)
-(* C_MINOR_VERSION = "1" *) (* C_NEXT_SLAVE = "0" *) (* C_NUM_PROBE_IN = "0" *)
-(* C_NUM_PROBE_OUT = "1" *) (* C_PIPE_IFACE = "0" *) (* C_PROBE_IN0_WIDTH = "1" *)
-(* C_PROBE_IN100_WIDTH = "1" *) (* C_PROBE_IN101_WIDTH = "1" *) (* C_PROBE_IN102_WIDTH = "1" *)
-(* C_PROBE_IN103_WIDTH = "1" *) (* C_PROBE_IN104_WIDTH = "1" *) (* C_PROBE_IN105_WIDTH = "1" *)
-(* C_PROBE_IN106_WIDTH = "1" *) (* C_PROBE_IN107_WIDTH = "1" *) (* C_PROBE_IN108_WIDTH = "1" *)
-(* C_PROBE_IN109_WIDTH = "1" *) (* C_PROBE_IN10_WIDTH = "1" *) (* C_PROBE_IN110_WIDTH = "1" *)
-(* C_PROBE_IN111_WIDTH = "1" *) (* C_PROBE_IN112_WIDTH = "1" *) (* C_PROBE_IN113_WIDTH = "1" *)
-(* C_PROBE_IN114_WIDTH = "1" *) (* C_PROBE_IN115_WIDTH = "1" *) (* C_PROBE_IN116_WIDTH = "1" *)
-(* C_PROBE_IN117_WIDTH = "1" *) (* C_PROBE_IN118_WIDTH = "1" *) (* C_PROBE_IN119_WIDTH = "1" *)
-(* C_PROBE_IN11_WIDTH = "1" *) (* C_PROBE_IN120_WIDTH = "1" *) (* C_PROBE_IN121_WIDTH = "1" *)
-(* C_PROBE_IN122_WIDTH = "1" *) (* C_PROBE_IN123_WIDTH = "1" *) (* C_PROBE_IN124_WIDTH = "1" *)
-(* C_PROBE_IN125_WIDTH = "1" *) (* C_PROBE_IN126_WIDTH = "1" *) (* C_PROBE_IN127_WIDTH = "1" *)
-(* C_PROBE_IN128_WIDTH = "1" *) (* C_PROBE_IN129_WIDTH = "1" *) (* C_PROBE_IN12_WIDTH = "1" *)
-(* C_PROBE_IN130_WIDTH = "1" *) (* C_PROBE_IN131_WIDTH = "1" *) (* C_PROBE_IN132_WIDTH = "1" *)
-(* C_PROBE_IN133_WIDTH = "1" *) (* C_PROBE_IN134_WIDTH = "1" *) (* C_PROBE_IN135_WIDTH = "1" *)
-(* C_PROBE_IN136_WIDTH = "1" *) (* C_PROBE_IN137_WIDTH = "1" *) (* C_PROBE_IN138_WIDTH = "1" *)
-(* C_PROBE_IN139_WIDTH = "1" *) (* C_PROBE_IN13_WIDTH = "1" *) (* C_PROBE_IN140_WIDTH = "1" *)
-(* C_PROBE_IN141_WIDTH = "1" *) (* C_PROBE_IN142_WIDTH = "1" *) (* C_PROBE_IN143_WIDTH = "1" *)
-(* C_PROBE_IN144_WIDTH = "1" *) (* C_PROBE_IN145_WIDTH = "1" *) (* C_PROBE_IN146_WIDTH = "1" *)
-(* C_PROBE_IN147_WIDTH = "1" *) (* C_PROBE_IN148_WIDTH = "1" *) (* C_PROBE_IN149_WIDTH = "1" *)
-(* C_PROBE_IN14_WIDTH = "1" *) (* C_PROBE_IN150_WIDTH = "1" *) (* C_PROBE_IN151_WIDTH = "1" *)
-(* C_PROBE_IN152_WIDTH = "1" *) (* C_PROBE_IN153_WIDTH = "1" *) (* C_PROBE_IN154_WIDTH = "1" *)
-(* C_PROBE_IN155_WIDTH = "1" *) (* C_PROBE_IN156_WIDTH = "1" *) (* C_PROBE_IN157_WIDTH = "1" *)
-(* C_PROBE_IN158_WIDTH = "1" *) (* C_PROBE_IN159_WIDTH = "1" *) (* C_PROBE_IN15_WIDTH = "1" *)
-(* C_PROBE_IN160_WIDTH = "1" *) (* C_PROBE_IN161_WIDTH = "1" *) (* C_PROBE_IN162_WIDTH = "1" *)
-(* C_PROBE_IN163_WIDTH = "1" *) (* C_PROBE_IN164_WIDTH = "1" *) (* C_PROBE_IN165_WIDTH = "1" *)
-(* C_PROBE_IN166_WIDTH = "1" *) (* C_PROBE_IN167_WIDTH = "1" *) (* C_PROBE_IN168_WIDTH = "1" *)
-(* C_PROBE_IN169_WIDTH = "1" *) (* C_PROBE_IN16_WIDTH = "1" *) (* C_PROBE_IN170_WIDTH = "1" *)
-(* C_PROBE_IN171_WIDTH = "1" *) (* C_PROBE_IN172_WIDTH = "1" *) (* C_PROBE_IN173_WIDTH = "1" *)
-(* C_PROBE_IN174_WIDTH = "1" *) (* C_PROBE_IN175_WIDTH = "1" *) (* C_PROBE_IN176_WIDTH = "1" *)
-(* C_PROBE_IN177_WIDTH = "1" *) (* C_PROBE_IN178_WIDTH = "1" *) (* C_PROBE_IN179_WIDTH = "1" *)
-(* C_PROBE_IN17_WIDTH = "1" *) (* C_PROBE_IN180_WIDTH = "1" *) (* C_PROBE_IN181_WIDTH = "1" *)
-(* C_PROBE_IN182_WIDTH = "1" *) (* C_PROBE_IN183_WIDTH = "1" *) (* C_PROBE_IN184_WIDTH = "1" *)
-(* C_PROBE_IN185_WIDTH = "1" *) (* C_PROBE_IN186_WIDTH = "1" *) (* C_PROBE_IN187_WIDTH = "1" *)
-(* C_PROBE_IN188_WIDTH = "1" *) (* C_PROBE_IN189_WIDTH = "1" *) (* C_PROBE_IN18_WIDTH = "1" *)
-(* C_PROBE_IN190_WIDTH = "1" *) (* C_PROBE_IN191_WIDTH = "1" *) (* C_PROBE_IN192_WIDTH = "1" *)
-(* C_PROBE_IN193_WIDTH = "1" *) (* C_PROBE_IN194_WIDTH = "1" *) (* C_PROBE_IN195_WIDTH = "1" *)
-(* C_PROBE_IN196_WIDTH = "1" *) (* C_PROBE_IN197_WIDTH = "1" *) (* C_PROBE_IN198_WIDTH = "1" *)
-(* C_PROBE_IN199_WIDTH = "1" *) (* C_PROBE_IN19_WIDTH = "1" *) (* C_PROBE_IN1_WIDTH = "1" *)
-(* C_PROBE_IN200_WIDTH = "1" *) (* C_PROBE_IN201_WIDTH = "1" *) (* C_PROBE_IN202_WIDTH = "1" *)
-(* C_PROBE_IN203_WIDTH = "1" *) (* C_PROBE_IN204_WIDTH = "1" *) (* C_PROBE_IN205_WIDTH = "1" *)
-(* C_PROBE_IN206_WIDTH = "1" *) (* C_PROBE_IN207_WIDTH = "1" *) (* C_PROBE_IN208_WIDTH = "1" *)
-(* C_PROBE_IN209_WIDTH = "1" *) (* C_PROBE_IN20_WIDTH = "1" *) (* C_PROBE_IN210_WIDTH = "1" *)
-(* C_PROBE_IN211_WIDTH = "1" *) (* C_PROBE_IN212_WIDTH = "1" *) (* C_PROBE_IN213_WIDTH = "1" *)
-(* C_PROBE_IN214_WIDTH = "1" *) (* C_PROBE_IN215_WIDTH = "1" *) (* C_PROBE_IN216_WIDTH = "1" *)
-(* C_PROBE_IN217_WIDTH = "1" *) (* C_PROBE_IN218_WIDTH = "1" *) (* C_PROBE_IN219_WIDTH = "1" *)
-(* C_PROBE_IN21_WIDTH = "1" *) (* C_PROBE_IN220_WIDTH = "1" *) (* C_PROBE_IN221_WIDTH = "1" *)
-(* C_PROBE_IN222_WIDTH = "1" *) (* C_PROBE_IN223_WIDTH = "1" *) (* C_PROBE_IN224_WIDTH = "1" *)
-(* C_PROBE_IN225_WIDTH = "1" *) (* C_PROBE_IN226_WIDTH = "1" *) (* C_PROBE_IN227_WIDTH = "1" *)
-(* C_PROBE_IN228_WIDTH = "1" *) (* C_PROBE_IN229_WIDTH = "1" *) (* C_PROBE_IN22_WIDTH = "1" *)
-(* C_PROBE_IN230_WIDTH = "1" *) (* C_PROBE_IN231_WIDTH = "1" *) (* C_PROBE_IN232_WIDTH = "1" *)
-(* C_PROBE_IN233_WIDTH = "1" *) (* C_PROBE_IN234_WIDTH = "1" *) (* C_PROBE_IN235_WIDTH = "1" *)
-(* C_PROBE_IN236_WIDTH = "1" *) (* C_PROBE_IN237_WIDTH = "1" *) (* C_PROBE_IN238_WIDTH = "1" *)
-(* C_PROBE_IN239_WIDTH = "1" *) (* C_PROBE_IN23_WIDTH = "1" *) (* C_PROBE_IN240_WIDTH = "1" *)
-(* C_PROBE_IN241_WIDTH = "1" *) (* C_PROBE_IN242_WIDTH = "1" *) (* C_PROBE_IN243_WIDTH = "1" *)
-(* C_PROBE_IN244_WIDTH = "1" *) (* C_PROBE_IN245_WIDTH = "1" *) (* C_PROBE_IN246_WIDTH = "1" *)
-(* C_PROBE_IN247_WIDTH = "1" *) (* C_PROBE_IN248_WIDTH = "1" *) (* C_PROBE_IN249_WIDTH = "1" *)
-(* C_PROBE_IN24_WIDTH = "1" *) (* C_PROBE_IN250_WIDTH = "1" *) (* C_PROBE_IN251_WIDTH = "1" *)
-(* C_PROBE_IN252_WIDTH = "1" *) (* C_PROBE_IN253_WIDTH = "1" *) (* C_PROBE_IN254_WIDTH = "1" *)
-(* C_PROBE_IN255_WIDTH = "1" *) (* C_PROBE_IN25_WIDTH = "1" *) (* C_PROBE_IN26_WIDTH = "1" *)
-(* C_PROBE_IN27_WIDTH = "1" *) (* C_PROBE_IN28_WIDTH = "1" *) (* C_PROBE_IN29_WIDTH = "1" *)
-(* C_PROBE_IN2_WIDTH = "1" *) (* C_PROBE_IN30_WIDTH = "1" *) (* C_PROBE_IN31_WIDTH = "1" *)
-(* C_PROBE_IN32_WIDTH = "1" *) (* C_PROBE_IN33_WIDTH = "1" *) (* C_PROBE_IN34_WIDTH = "1" *)
-(* C_PROBE_IN35_WIDTH = "1" *) (* C_PROBE_IN36_WIDTH = "1" *) (* C_PROBE_IN37_WIDTH = "1" *)
-(* C_PROBE_IN38_WIDTH = "1" *) (* C_PROBE_IN39_WIDTH = "1" *) (* C_PROBE_IN3_WIDTH = "1" *)
-(* C_PROBE_IN40_WIDTH = "1" *) (* C_PROBE_IN41_WIDTH = "1" *) (* C_PROBE_IN42_WIDTH = "1" *)
-(* C_PROBE_IN43_WIDTH = "1" *) (* C_PROBE_IN44_WIDTH = "1" *) (* C_PROBE_IN45_WIDTH = "1" *)
-(* C_PROBE_IN46_WIDTH = "1" *) (* C_PROBE_IN47_WIDTH = "1" *) (* C_PROBE_IN48_WIDTH = "1" *)
-(* C_PROBE_IN49_WIDTH = "1" *) (* C_PROBE_IN4_WIDTH = "1" *) (* C_PROBE_IN50_WIDTH = "1" *)
-(* C_PROBE_IN51_WIDTH = "1" *) (* C_PROBE_IN52_WIDTH = "1" *) (* C_PROBE_IN53_WIDTH = "1" *)
-(* C_PROBE_IN54_WIDTH = "1" *) (* C_PROBE_IN55_WIDTH = "1" *) (* C_PROBE_IN56_WIDTH = "1" *)
-(* C_PROBE_IN57_WIDTH = "1" *) (* C_PROBE_IN58_WIDTH = "1" *) (* C_PROBE_IN59_WIDTH = "1" *)
-(* C_PROBE_IN5_WIDTH = "1" *) (* C_PROBE_IN60_WIDTH = "1" *) (* C_PROBE_IN61_WIDTH = "1" *)
-(* C_PROBE_IN62_WIDTH = "1" *) (* C_PROBE_IN63_WIDTH = "1" *) (* C_PROBE_IN64_WIDTH = "1" *)
-(* C_PROBE_IN65_WIDTH = "1" *) (* C_PROBE_IN66_WIDTH = "1" *) (* C_PROBE_IN67_WIDTH = "1" *)
-(* C_PROBE_IN68_WIDTH = "1" *) (* C_PROBE_IN69_WIDTH = "1" *) (* C_PROBE_IN6_WIDTH = "1" *)
-(* C_PROBE_IN70_WIDTH = "1" *) (* C_PROBE_IN71_WIDTH = "1" *) (* C_PROBE_IN72_WIDTH = "1" *)
-(* C_PROBE_IN73_WIDTH = "1" *) (* C_PROBE_IN74_WIDTH = "1" *) (* C_PROBE_IN75_WIDTH = "1" *)
-(* C_PROBE_IN76_WIDTH = "1" *) (* C_PROBE_IN77_WIDTH = "1" *) (* C_PROBE_IN78_WIDTH = "1" *)
-(* C_PROBE_IN79_WIDTH = "1" *) (* C_PROBE_IN7_WIDTH = "1" *) (* C_PROBE_IN80_WIDTH = "1" *)
-(* C_PROBE_IN81_WIDTH = "1" *) (* C_PROBE_IN82_WIDTH = "1" *) (* C_PROBE_IN83_WIDTH = "1" *)
-(* C_PROBE_IN84_WIDTH = "1" *) (* C_PROBE_IN85_WIDTH = "1" *) (* C_PROBE_IN86_WIDTH = "1" *)
-(* C_PROBE_IN87_WIDTH = "1" *) (* C_PROBE_IN88_WIDTH = "1" *) (* C_PROBE_IN89_WIDTH = "1" *)
-(* C_PROBE_IN8_WIDTH = "1" *) (* C_PROBE_IN90_WIDTH = "1" *) (* C_PROBE_IN91_WIDTH = "1" *)
-(* C_PROBE_IN92_WIDTH = "1" *) (* C_PROBE_IN93_WIDTH = "1" *) (* C_PROBE_IN94_WIDTH = "1" *)
-(* C_PROBE_IN95_WIDTH = "1" *) (* C_PROBE_IN96_WIDTH = "1" *) (* C_PROBE_IN97_WIDTH = "1" *)
-(* C_PROBE_IN98_WIDTH = "1" *) (* C_PROBE_IN99_WIDTH = "1" *) (* C_PROBE_IN9_WIDTH = "1" *)
-(* C_PROBE_OUT0_INIT_VAL = "1'b0" *) (* C_PROBE_OUT0_WIDTH = "1" *) (* C_PROBE_OUT100_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT100_WIDTH = "1" *) (* C_PROBE_OUT101_INIT_VAL = "1'b0" *) (* C_PROBE_OUT101_WIDTH = "1" *)
-(* C_PROBE_OUT102_INIT_VAL = "1'b0" *) (* C_PROBE_OUT102_WIDTH = "1" *) (* C_PROBE_OUT103_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT103_WIDTH = "1" *) (* C_PROBE_OUT104_INIT_VAL = "1'b0" *) (* C_PROBE_OUT104_WIDTH = "1" *)
-(* C_PROBE_OUT105_INIT_VAL = "1'b0" *) (* C_PROBE_OUT105_WIDTH = "1" *) (* C_PROBE_OUT106_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT106_WIDTH = "1" *) (* C_PROBE_OUT107_INIT_VAL = "1'b0" *) (* C_PROBE_OUT107_WIDTH = "1" *)
-(* C_PROBE_OUT108_INIT_VAL = "1'b0" *) (* C_PROBE_OUT108_WIDTH = "1" *) (* C_PROBE_OUT109_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT109_WIDTH = "1" *) (* C_PROBE_OUT10_INIT_VAL = "1'b0" *) (* C_PROBE_OUT10_WIDTH = "1" *)
-(* C_PROBE_OUT110_INIT_VAL = "1'b0" *) (* C_PROBE_OUT110_WIDTH = "1" *) (* C_PROBE_OUT111_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT111_WIDTH = "1" *) (* C_PROBE_OUT112_INIT_VAL = "1'b0" *) (* C_PROBE_OUT112_WIDTH = "1" *)
-(* C_PROBE_OUT113_INIT_VAL = "1'b0" *) (* C_PROBE_OUT113_WIDTH = "1" *) (* C_PROBE_OUT114_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT114_WIDTH = "1" *) (* C_PROBE_OUT115_INIT_VAL = "1'b0" *) (* C_PROBE_OUT115_WIDTH = "1" *)
-(* C_PROBE_OUT116_INIT_VAL = "1'b0" *) (* C_PROBE_OUT116_WIDTH = "1" *) (* C_PROBE_OUT117_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT117_WIDTH = "1" *) (* C_PROBE_OUT118_INIT_VAL = "1'b0" *) (* C_PROBE_OUT118_WIDTH = "1" *)
-(* C_PROBE_OUT119_INIT_VAL = "1'b0" *) (* C_PROBE_OUT119_WIDTH = "1" *) (* C_PROBE_OUT11_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT11_WIDTH = "1" *) (* C_PROBE_OUT120_INIT_VAL = "1'b0" *) (* C_PROBE_OUT120_WIDTH = "1" *)
-(* C_PROBE_OUT121_INIT_VAL = "1'b0" *) (* C_PROBE_OUT121_WIDTH = "1" *) (* C_PROBE_OUT122_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT122_WIDTH = "1" *) (* C_PROBE_OUT123_INIT_VAL = "1'b0" *) (* C_PROBE_OUT123_WIDTH = "1" *)
-(* C_PROBE_OUT124_INIT_VAL = "1'b0" *) (* C_PROBE_OUT124_WIDTH = "1" *) (* C_PROBE_OUT125_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT125_WIDTH = "1" *) (* C_PROBE_OUT126_INIT_VAL = "1'b0" *) (* C_PROBE_OUT126_WIDTH = "1" *)
-(* C_PROBE_OUT127_INIT_VAL = "1'b0" *) (* C_PROBE_OUT127_WIDTH = "1" *) (* C_PROBE_OUT128_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT128_WIDTH = "1" *) (* C_PROBE_OUT129_INIT_VAL = "1'b0" *) (* C_PROBE_OUT129_WIDTH = "1" *)
-(* C_PROBE_OUT12_INIT_VAL = "1'b0" *) (* C_PROBE_OUT12_WIDTH = "1" *) (* C_PROBE_OUT130_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT130_WIDTH = "1" *) (* C_PROBE_OUT131_INIT_VAL = "1'b0" *) (* C_PROBE_OUT131_WIDTH = "1" *)
-(* C_PROBE_OUT132_INIT_VAL = "1'b0" *) (* C_PROBE_OUT132_WIDTH = "1" *) (* C_PROBE_OUT133_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT133_WIDTH = "1" *) (* C_PROBE_OUT134_INIT_VAL = "1'b0" *) (* C_PROBE_OUT134_WIDTH = "1" *)
-(* C_PROBE_OUT135_INIT_VAL = "1'b0" *) (* C_PROBE_OUT135_WIDTH = "1" *) (* C_PROBE_OUT136_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT136_WIDTH = "1" *) (* C_PROBE_OUT137_INIT_VAL = "1'b0" *) (* C_PROBE_OUT137_WIDTH = "1" *)
-(* C_PROBE_OUT138_INIT_VAL = "1'b0" *) (* C_PROBE_OUT138_WIDTH = "1" *) (* C_PROBE_OUT139_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT139_WIDTH = "1" *) (* C_PROBE_OUT13_INIT_VAL = "1'b0" *) (* C_PROBE_OUT13_WIDTH = "1" *)
-(* C_PROBE_OUT140_INIT_VAL = "1'b0" *) (* C_PROBE_OUT140_WIDTH = "1" *) (* C_PROBE_OUT141_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT141_WIDTH = "1" *) (* C_PROBE_OUT142_INIT_VAL = "1'b0" *) (* C_PROBE_OUT142_WIDTH = "1" *)
-(* C_PROBE_OUT143_INIT_VAL = "1'b0" *) (* C_PROBE_OUT143_WIDTH = "1" *) (* C_PROBE_OUT144_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT144_WIDTH = "1" *) (* C_PROBE_OUT145_INIT_VAL = "1'b0" *) (* C_PROBE_OUT145_WIDTH = "1" *)
-(* C_PROBE_OUT146_INIT_VAL = "1'b0" *) (* C_PROBE_OUT146_WIDTH = "1" *) (* C_PROBE_OUT147_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT147_WIDTH = "1" *) (* C_PROBE_OUT148_INIT_VAL = "1'b0" *) (* C_PROBE_OUT148_WIDTH = "1" *)
-(* C_PROBE_OUT149_INIT_VAL = "1'b0" *) (* C_PROBE_OUT149_WIDTH = "1" *) (* C_PROBE_OUT14_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT14_WIDTH = "1" *) (* C_PROBE_OUT150_INIT_VAL = "1'b0" *) (* C_PROBE_OUT150_WIDTH = "1" *)
-(* C_PROBE_OUT151_INIT_VAL = "1'b0" *) (* C_PROBE_OUT151_WIDTH = "1" *) (* C_PROBE_OUT152_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT152_WIDTH = "1" *) (* C_PROBE_OUT153_INIT_VAL = "1'b0" *) (* C_PROBE_OUT153_WIDTH = "1" *)
-(* C_PROBE_OUT154_INIT_VAL = "1'b0" *) (* C_PROBE_OUT154_WIDTH = "1" *) (* C_PROBE_OUT155_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT155_WIDTH = "1" *) (* C_PROBE_OUT156_INIT_VAL = "1'b0" *) (* C_PROBE_OUT156_WIDTH = "1" *)
-(* C_PROBE_OUT157_INIT_VAL = "1'b0" *) (* C_PROBE_OUT157_WIDTH = "1" *) (* C_PROBE_OUT158_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT158_WIDTH = "1" *) (* C_PROBE_OUT159_INIT_VAL = "1'b0" *) (* C_PROBE_OUT159_WIDTH = "1" *)
-(* C_PROBE_OUT15_INIT_VAL = "1'b0" *) (* C_PROBE_OUT15_WIDTH = "1" *) (* C_PROBE_OUT160_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT160_WIDTH = "1" *) (* C_PROBE_OUT161_INIT_VAL = "1'b0" *) (* C_PROBE_OUT161_WIDTH = "1" *)
-(* C_PROBE_OUT162_INIT_VAL = "1'b0" *) (* C_PROBE_OUT162_WIDTH = "1" *) (* C_PROBE_OUT163_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT163_WIDTH = "1" *) (* C_PROBE_OUT164_INIT_VAL = "1'b0" *) (* C_PROBE_OUT164_WIDTH = "1" *)
-(* C_PROBE_OUT165_INIT_VAL = "1'b0" *) (* C_PROBE_OUT165_WIDTH = "1" *) (* C_PROBE_OUT166_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT166_WIDTH = "1" *) (* C_PROBE_OUT167_INIT_VAL = "1'b0" *) (* C_PROBE_OUT167_WIDTH = "1" *)
-(* C_PROBE_OUT168_INIT_VAL = "1'b0" *) (* C_PROBE_OUT168_WIDTH = "1" *) (* C_PROBE_OUT169_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT169_WIDTH = "1" *) (* C_PROBE_OUT16_INIT_VAL = "1'b0" *) (* C_PROBE_OUT16_WIDTH = "1" *)
-(* C_PROBE_OUT170_INIT_VAL = "1'b0" *) (* C_PROBE_OUT170_WIDTH = "1" *) (* C_PROBE_OUT171_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT171_WIDTH = "1" *) (* C_PROBE_OUT172_INIT_VAL = "1'b0" *) (* C_PROBE_OUT172_WIDTH = "1" *)
-(* C_PROBE_OUT173_INIT_VAL = "1'b0" *) (* C_PROBE_OUT173_WIDTH = "1" *) (* C_PROBE_OUT174_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT174_WIDTH = "1" *) (* C_PROBE_OUT175_INIT_VAL = "1'b0" *) (* C_PROBE_OUT175_WIDTH = "1" *)
-(* C_PROBE_OUT176_INIT_VAL = "1'b0" *) (* C_PROBE_OUT176_WIDTH = "1" *) (* C_PROBE_OUT177_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT177_WIDTH = "1" *) (* C_PROBE_OUT178_INIT_VAL = "1'b0" *) (* C_PROBE_OUT178_WIDTH = "1" *)
-(* C_PROBE_OUT179_INIT_VAL = "1'b0" *) (* C_PROBE_OUT179_WIDTH = "1" *) (* C_PROBE_OUT17_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT17_WIDTH = "1" *) (* C_PROBE_OUT180_INIT_VAL = "1'b0" *) (* C_PROBE_OUT180_WIDTH = "1" *)
-(* C_PROBE_OUT181_INIT_VAL = "1'b0" *) (* C_PROBE_OUT181_WIDTH = "1" *) (* C_PROBE_OUT182_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT182_WIDTH = "1" *) (* C_PROBE_OUT183_INIT_VAL = "1'b0" *) (* C_PROBE_OUT183_WIDTH = "1" *)
-(* C_PROBE_OUT184_INIT_VAL = "1'b0" *) (* C_PROBE_OUT184_WIDTH = "1" *) (* C_PROBE_OUT185_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT185_WIDTH = "1" *) (* C_PROBE_OUT186_INIT_VAL = "1'b0" *) (* C_PROBE_OUT186_WIDTH = "1" *)
-(* C_PROBE_OUT187_INIT_VAL = "1'b0" *) (* C_PROBE_OUT187_WIDTH = "1" *) (* C_PROBE_OUT188_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT188_WIDTH = "1" *) (* C_PROBE_OUT189_INIT_VAL = "1'b0" *) (* C_PROBE_OUT189_WIDTH = "1" *)
-(* C_PROBE_OUT18_INIT_VAL = "1'b0" *) (* C_PROBE_OUT18_WIDTH = "1" *) (* C_PROBE_OUT190_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT190_WIDTH = "1" *) (* C_PROBE_OUT191_INIT_VAL = "1'b0" *) (* C_PROBE_OUT191_WIDTH = "1" *)
-(* C_PROBE_OUT192_INIT_VAL = "1'b0" *) (* C_PROBE_OUT192_WIDTH = "1" *) (* C_PROBE_OUT193_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT193_WIDTH = "1" *) (* C_PROBE_OUT194_INIT_VAL = "1'b0" *) (* C_PROBE_OUT194_WIDTH = "1" *)
-(* C_PROBE_OUT195_INIT_VAL = "1'b0" *) (* C_PROBE_OUT195_WIDTH = "1" *) (* C_PROBE_OUT196_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT196_WIDTH = "1" *) (* C_PROBE_OUT197_INIT_VAL = "1'b0" *) (* C_PROBE_OUT197_WIDTH = "1" *)
-(* C_PROBE_OUT198_INIT_VAL = "1'b0" *) (* C_PROBE_OUT198_WIDTH = "1" *) (* C_PROBE_OUT199_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT199_WIDTH = "1" *) (* C_PROBE_OUT19_INIT_VAL = "1'b0" *) (* C_PROBE_OUT19_WIDTH = "1" *)
-(* C_PROBE_OUT1_INIT_VAL = "1'b0" *) (* C_PROBE_OUT1_WIDTH = "1" *) (* C_PROBE_OUT200_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT200_WIDTH = "1" *) (* C_PROBE_OUT201_INIT_VAL = "1'b0" *) (* C_PROBE_OUT201_WIDTH = "1" *)
-(* C_PROBE_OUT202_INIT_VAL = "1'b0" *) (* C_PROBE_OUT202_WIDTH = "1" *) (* C_PROBE_OUT203_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT203_WIDTH = "1" *) (* C_PROBE_OUT204_INIT_VAL = "1'b0" *) (* C_PROBE_OUT204_WIDTH = "1" *)
-(* C_PROBE_OUT205_INIT_VAL = "1'b0" *) (* C_PROBE_OUT205_WIDTH = "1" *) (* C_PROBE_OUT206_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT206_WIDTH = "1" *) (* C_PROBE_OUT207_INIT_VAL = "1'b0" *) (* C_PROBE_OUT207_WIDTH = "1" *)
-(* C_PROBE_OUT208_INIT_VAL = "1'b0" *) (* C_PROBE_OUT208_WIDTH = "1" *) (* C_PROBE_OUT209_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT209_WIDTH = "1" *) (* C_PROBE_OUT20_INIT_VAL = "1'b0" *) (* C_PROBE_OUT20_WIDTH = "1" *)
-(* C_PROBE_OUT210_INIT_VAL = "1'b0" *) (* C_PROBE_OUT210_WIDTH = "1" *) (* C_PROBE_OUT211_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT211_WIDTH = "1" *) (* C_PROBE_OUT212_INIT_VAL = "1'b0" *) (* C_PROBE_OUT212_WIDTH = "1" *)
-(* C_PROBE_OUT213_INIT_VAL = "1'b0" *) (* C_PROBE_OUT213_WIDTH = "1" *) (* C_PROBE_OUT214_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT214_WIDTH = "1" *) (* C_PROBE_OUT215_INIT_VAL = "1'b0" *) (* C_PROBE_OUT215_WIDTH = "1" *)
-(* C_PROBE_OUT216_INIT_VAL = "1'b0" *) (* C_PROBE_OUT216_WIDTH = "1" *) (* C_PROBE_OUT217_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT217_WIDTH = "1" *) (* C_PROBE_OUT218_INIT_VAL = "1'b0" *) (* C_PROBE_OUT218_WIDTH = "1" *)
-(* C_PROBE_OUT219_INIT_VAL = "1'b0" *) (* C_PROBE_OUT219_WIDTH = "1" *) (* C_PROBE_OUT21_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT21_WIDTH = "1" *) (* C_PROBE_OUT220_INIT_VAL = "1'b0" *) (* C_PROBE_OUT220_WIDTH = "1" *)
-(* C_PROBE_OUT221_INIT_VAL = "1'b0" *) (* C_PROBE_OUT221_WIDTH = "1" *) (* C_PROBE_OUT222_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT222_WIDTH = "1" *) (* C_PROBE_OUT223_INIT_VAL = "1'b0" *) (* C_PROBE_OUT223_WIDTH = "1" *)
-(* C_PROBE_OUT224_INIT_VAL = "1'b0" *) (* C_PROBE_OUT224_WIDTH = "1" *) (* C_PROBE_OUT225_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT225_WIDTH = "1" *) (* C_PROBE_OUT226_INIT_VAL = "1'b0" *) (* C_PROBE_OUT226_WIDTH = "1" *)
-(* C_PROBE_OUT227_INIT_VAL = "1'b0" *) (* C_PROBE_OUT227_WIDTH = "1" *) (* C_PROBE_OUT228_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT228_WIDTH = "1" *) (* C_PROBE_OUT229_INIT_VAL = "1'b0" *) (* C_PROBE_OUT229_WIDTH = "1" *)
-(* C_PROBE_OUT22_INIT_VAL = "1'b0" *) (* C_PROBE_OUT22_WIDTH = "1" *) (* C_PROBE_OUT230_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT230_WIDTH = "1" *) (* C_PROBE_OUT231_INIT_VAL = "1'b0" *) (* C_PROBE_OUT231_WIDTH = "1" *)
-(* C_PROBE_OUT232_INIT_VAL = "1'b0" *) (* C_PROBE_OUT232_WIDTH = "1" *) (* C_PROBE_OUT233_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT233_WIDTH = "1" *) (* C_PROBE_OUT234_INIT_VAL = "1'b0" *) (* C_PROBE_OUT234_WIDTH = "1" *)
-(* C_PROBE_OUT235_INIT_VAL = "1'b0" *) (* C_PROBE_OUT235_WIDTH = "1" *) (* C_PROBE_OUT236_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT236_WIDTH = "1" *) (* C_PROBE_OUT237_INIT_VAL = "1'b0" *) (* C_PROBE_OUT237_WIDTH = "1" *)
-(* C_PROBE_OUT238_INIT_VAL = "1'b0" *) (* C_PROBE_OUT238_WIDTH = "1" *) (* C_PROBE_OUT239_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT239_WIDTH = "1" *) (* C_PROBE_OUT23_INIT_VAL = "1'b0" *) (* C_PROBE_OUT23_WIDTH = "1" *)
-(* C_PROBE_OUT240_INIT_VAL = "1'b0" *) (* C_PROBE_OUT240_WIDTH = "1" *) (* C_PROBE_OUT241_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT241_WIDTH = "1" *) (* C_PROBE_OUT242_INIT_VAL = "1'b0" *) (* C_PROBE_OUT242_WIDTH = "1" *)
-(* C_PROBE_OUT243_INIT_VAL = "1'b0" *) (* C_PROBE_OUT243_WIDTH = "1" *) (* C_PROBE_OUT244_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT244_WIDTH = "1" *) (* C_PROBE_OUT245_INIT_VAL = "1'b0" *) (* C_PROBE_OUT245_WIDTH = "1" *)
-(* C_PROBE_OUT246_INIT_VAL = "1'b0" *) (* C_PROBE_OUT246_WIDTH = "1" *) (* C_PROBE_OUT247_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT247_WIDTH = "1" *) (* C_PROBE_OUT248_INIT_VAL = "1'b0" *) (* C_PROBE_OUT248_WIDTH = "1" *)
-(* C_PROBE_OUT249_INIT_VAL = "1'b0" *) (* C_PROBE_OUT249_WIDTH = "1" *) (* C_PROBE_OUT24_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT24_WIDTH = "1" *) (* C_PROBE_OUT250_INIT_VAL = "1'b0" *) (* C_PROBE_OUT250_WIDTH = "1" *)
-(* C_PROBE_OUT251_INIT_VAL = "1'b0" *) (* C_PROBE_OUT251_WIDTH = "1" *) (* C_PROBE_OUT252_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT252_WIDTH = "1" *) (* C_PROBE_OUT253_INIT_VAL = "1'b0" *) (* C_PROBE_OUT253_WIDTH = "1" *)
-(* C_PROBE_OUT254_INIT_VAL = "1'b0" *) (* C_PROBE_OUT254_WIDTH = "1" *) (* C_PROBE_OUT255_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT255_WIDTH = "1" *) (* C_PROBE_OUT25_INIT_VAL = "1'b0" *) (* C_PROBE_OUT25_WIDTH = "1" *)
-(* C_PROBE_OUT26_INIT_VAL = "1'b0" *) (* C_PROBE_OUT26_WIDTH = "1" *) (* C_PROBE_OUT27_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT27_WIDTH = "1" *) (* C_PROBE_OUT28_INIT_VAL = "1'b0" *) (* C_PROBE_OUT28_WIDTH = "1" *)
-(* C_PROBE_OUT29_INIT_VAL = "1'b0" *) (* C_PROBE_OUT29_WIDTH = "1" *) (* C_PROBE_OUT2_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT2_WIDTH = "1" *) (* C_PROBE_OUT30_INIT_VAL = "1'b0" *) (* C_PROBE_OUT30_WIDTH = "1" *)
-(* C_PROBE_OUT31_INIT_VAL = "1'b0" *) (* C_PROBE_OUT31_WIDTH = "1" *) (* C_PROBE_OUT32_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT32_WIDTH = "1" *) (* C_PROBE_OUT33_INIT_VAL = "1'b0" *) (* C_PROBE_OUT33_WIDTH = "1" *)
-(* C_PROBE_OUT34_INIT_VAL = "1'b0" *) (* C_PROBE_OUT34_WIDTH = "1" *) (* C_PROBE_OUT35_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT35_WIDTH = "1" *) (* C_PROBE_OUT36_INIT_VAL = "1'b0" *) (* C_PROBE_OUT36_WIDTH = "1" *)
-(* C_PROBE_OUT37_INIT_VAL = "1'b0" *) (* C_PROBE_OUT37_WIDTH = "1" *) (* C_PROBE_OUT38_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT38_WIDTH = "1" *) (* C_PROBE_OUT39_INIT_VAL = "1'b0" *) (* C_PROBE_OUT39_WIDTH = "1" *)
-(* C_PROBE_OUT3_INIT_VAL = "1'b0" *) (* C_PROBE_OUT3_WIDTH = "1" *) (* C_PROBE_OUT40_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT40_WIDTH = "1" *) (* C_PROBE_OUT41_INIT_VAL = "1'b0" *) (* C_PROBE_OUT41_WIDTH = "1" *)
-(* C_PROBE_OUT42_INIT_VAL = "1'b0" *) (* C_PROBE_OUT42_WIDTH = "1" *) (* C_PROBE_OUT43_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT43_WIDTH = "1" *) (* C_PROBE_OUT44_INIT_VAL = "1'b0" *) (* C_PROBE_OUT44_WIDTH = "1" *)
-(* C_PROBE_OUT45_INIT_VAL = "1'b0" *) (* C_PROBE_OUT45_WIDTH = "1" *) (* C_PROBE_OUT46_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT46_WIDTH = "1" *) (* C_PROBE_OUT47_INIT_VAL = "1'b0" *) (* C_PROBE_OUT47_WIDTH = "1" *)
-(* C_PROBE_OUT48_INIT_VAL = "1'b0" *) (* C_PROBE_OUT48_WIDTH = "1" *) (* C_PROBE_OUT49_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT49_WIDTH = "1" *) (* C_PROBE_OUT4_INIT_VAL = "1'b0" *) (* C_PROBE_OUT4_WIDTH = "1" *)
-(* C_PROBE_OUT50_INIT_VAL = "1'b0" *) (* C_PROBE_OUT50_WIDTH = "1" *) (* C_PROBE_OUT51_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT51_WIDTH = "1" *) (* C_PROBE_OUT52_INIT_VAL = "1'b0" *) (* C_PROBE_OUT52_WIDTH = "1" *)
-(* C_PROBE_OUT53_INIT_VAL = "1'b0" *) (* C_PROBE_OUT53_WIDTH = "1" *) (* C_PROBE_OUT54_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT54_WIDTH = "1" *) (* C_PROBE_OUT55_INIT_VAL = "1'b0" *) (* C_PROBE_OUT55_WIDTH = "1" *)
-(* C_PROBE_OUT56_INIT_VAL = "1'b0" *) (* C_PROBE_OUT56_WIDTH = "1" *) (* C_PROBE_OUT57_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT57_WIDTH = "1" *) (* C_PROBE_OUT58_INIT_VAL = "1'b0" *) (* C_PROBE_OUT58_WIDTH = "1" *)
-(* C_PROBE_OUT59_INIT_VAL = "1'b0" *) (* C_PROBE_OUT59_WIDTH = "1" *) (* C_PROBE_OUT5_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT5_WIDTH = "1" *) (* C_PROBE_OUT60_INIT_VAL = "1'b0" *) (* C_PROBE_OUT60_WIDTH = "1" *)
-(* C_PROBE_OUT61_INIT_VAL = "1'b0" *) (* C_PROBE_OUT61_WIDTH = "1" *) (* C_PROBE_OUT62_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT62_WIDTH = "1" *) (* C_PROBE_OUT63_INIT_VAL = "1'b0" *) (* C_PROBE_OUT63_WIDTH = "1" *)
-(* C_PROBE_OUT64_INIT_VAL = "1'b0" *) (* C_PROBE_OUT64_WIDTH = "1" *) (* C_PROBE_OUT65_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT65_WIDTH = "1" *) (* C_PROBE_OUT66_INIT_VAL = "1'b0" *) (* C_PROBE_OUT66_WIDTH = "1" *)
-(* C_PROBE_OUT67_INIT_VAL = "1'b0" *) (* C_PROBE_OUT67_WIDTH = "1" *) (* C_PROBE_OUT68_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT68_WIDTH = "1" *) (* C_PROBE_OUT69_INIT_VAL = "1'b0" *) (* C_PROBE_OUT69_WIDTH = "1" *)
-(* C_PROBE_OUT6_INIT_VAL = "1'b0" *) (* C_PROBE_OUT6_WIDTH = "1" *) (* C_PROBE_OUT70_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT70_WIDTH = "1" *) (* C_PROBE_OUT71_INIT_VAL = "1'b0" *) (* C_PROBE_OUT71_WIDTH = "1" *)
-(* C_PROBE_OUT72_INIT_VAL = "1'b0" *) (* C_PROBE_OUT72_WIDTH = "1" *) (* C_PROBE_OUT73_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT73_WIDTH = "1" *) (* C_PROBE_OUT74_INIT_VAL = "1'b0" *) (* C_PROBE_OUT74_WIDTH = "1" *)
-(* C_PROBE_OUT75_INIT_VAL = "1'b0" *) (* C_PROBE_OUT75_WIDTH = "1" *) (* C_PROBE_OUT76_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT76_WIDTH = "1" *) (* C_PROBE_OUT77_INIT_VAL = "1'b0" *) (* C_PROBE_OUT77_WIDTH = "1" *)
-(* C_PROBE_OUT78_INIT_VAL = "1'b0" *) (* C_PROBE_OUT78_WIDTH = "1" *) (* C_PROBE_OUT79_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT79_WIDTH = "1" *) (* C_PROBE_OUT7_INIT_VAL = "1'b0" *) (* C_PROBE_OUT7_WIDTH = "1" *)
-(* C_PROBE_OUT80_INIT_VAL = "1'b0" *) (* C_PROBE_OUT80_WIDTH = "1" *) (* C_PROBE_OUT81_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT81_WIDTH = "1" *) (* C_PROBE_OUT82_INIT_VAL = "1'b0" *) (* C_PROBE_OUT82_WIDTH = "1" *)
-(* C_PROBE_OUT83_INIT_VAL = "1'b0" *) (* C_PROBE_OUT83_WIDTH = "1" *) (* C_PROBE_OUT84_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT84_WIDTH = "1" *) (* C_PROBE_OUT85_INIT_VAL = "1'b0" *) (* C_PROBE_OUT85_WIDTH = "1" *)
-(* C_PROBE_OUT86_INIT_VAL = "1'b0" *) (* C_PROBE_OUT86_WIDTH = "1" *) (* C_PROBE_OUT87_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT87_WIDTH = "1" *) (* C_PROBE_OUT88_INIT_VAL = "1'b0" *) (* C_PROBE_OUT88_WIDTH = "1" *)
-(* C_PROBE_OUT89_INIT_VAL = "1'b0" *) (* C_PROBE_OUT89_WIDTH = "1" *) (* C_PROBE_OUT8_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT8_WIDTH = "1" *) (* C_PROBE_OUT90_INIT_VAL = "1'b0" *) (* C_PROBE_OUT90_WIDTH = "1" *)
-(* C_PROBE_OUT91_INIT_VAL = "1'b0" *) (* C_PROBE_OUT91_WIDTH = "1" *) (* C_PROBE_OUT92_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT92_WIDTH = "1" *) (* C_PROBE_OUT93_INIT_VAL = "1'b0" *) (* C_PROBE_OUT93_WIDTH = "1" *)
-(* C_PROBE_OUT94_INIT_VAL = "1'b0" *) (* C_PROBE_OUT94_WIDTH = "1" *) (* C_PROBE_OUT95_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT95_WIDTH = "1" *) (* C_PROBE_OUT96_INIT_VAL = "1'b0" *) (* C_PROBE_OUT96_WIDTH = "1" *)
-(* C_PROBE_OUT97_INIT_VAL = "1'b0" *) (* C_PROBE_OUT97_WIDTH = "1" *) (* C_PROBE_OUT98_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT98_WIDTH = "1" *) (* C_PROBE_OUT99_INIT_VAL = "1'b0" *) (* C_PROBE_OUT99_WIDTH = "1" *)
-(* C_PROBE_OUT9_INIT_VAL = "1'b0" *) (* C_PROBE_OUT9_WIDTH = "1" *) (* C_USE_TEST_REG = "1" *)
-(* C_XDEVICEFAMILY = "zynq" *) (* C_XLNX_HW_PROBE_INFO = "DEFAULT" *) (* C_XSDB_SLAVE_TYPE = "33" *)
-(* DowngradeIPIdentifiedWarnings = "yes" *) (* LC_HIGH_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *) (* LC_HIGH_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *) (* LC_HIGH_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *) (* LC_HIGH_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *) (* LC_HIGH_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *) (* LC_HIGH_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *) (* LC_HIGH_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *) (* LC_HIGH_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *) (* LC_HIGH_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *) (* LC_HIGH_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *) (* LC_HIGH_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *) (* LC_HIGH_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *) (* LC_HIGH_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *) (* LC_HIGH_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *) (* LC_HIGH_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *) (* LC_HIGH_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *) (* LC_HIGH_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *) (* LC_HIGH_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *) (* LC_HIGH_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *) (* LC_HIGH_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *) (* LC_HIGH_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *) (* LC_HIGH_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *) (* LC_HIGH_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *) (* LC_HIGH_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *) (* LC_HIGH_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *) (* LC_HIGH_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *) (* LC_HIGH_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *) (* LC_HIGH_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *) (* LC_HIGH_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *) (* LC_HIGH_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *) (* LC_HIGH_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *) (* LC_HIGH_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *) (* LC_HIGH_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *) (* LC_HIGH_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *) (* LC_HIGH_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *) (* LC_HIGH_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *) (* LC_HIGH_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *) (* LC_HIGH_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *) (* LC_HIGH_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *) (* LC_HIGH_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *) (* LC_HIGH_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *) (* LC_HIGH_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *) (* LC_HIGH_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *) (* LC_HIGH_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *) (* LC_HIGH_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *) (* LC_HIGH_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *) (* LC_HIGH_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *) (* LC_HIGH_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *) (* LC_HIGH_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *) (* LC_HIGH_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *) (* LC_HIGH_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *) (* LC_HIGH_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *) (* LC_HIGH_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *) (* LC_HIGH_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *) (* LC_HIGH_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *) (* LC_HIGH_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *) (* LC_HIGH_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *) (* LC_HIGH_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *) (* LC_HIGH_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *) (* LC_HIGH_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *) (* LC_HIGH_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *) (* LC_HIGH_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *) (* LC_HIGH_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *) (* LC_HIGH_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *) (* LC_HIGH_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *) (* LC_HIGH_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *) (* LC_HIGH_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *) (* LC_HIGH_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *) (* LC_HIGH_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *) (* LC_HIGH_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *) (* LC_HIGH_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *) (* LC_HIGH_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *) (* LC_HIGH_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *) (* LC_HIGH_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *) (* LC_HIGH_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *) (* LC_HIGH_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *) (* LC_HIGH_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *) (* LC_HIGH_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *) (* LC_HIGH_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *) (* LC_HIGH_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *) (* LC_HIGH_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *) (* LC_HIGH_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *) (* LC_HIGH_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *) (* LC_HIGH_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *) (* LC_HIGH_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *) (* LC_HIGH_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *) (* LC_HIGH_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *) (* LC_HIGH_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *) (* LC_HIGH_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *) (* LC_HIGH_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *) (* LC_HIGH_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *) (* LC_HIGH_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *) (* LC_HIGH_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *) (* LC_HIGH_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *) (* LC_HIGH_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *) (* LC_HIGH_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *) (* LC_HIGH_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *) (* LC_HIGH_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *) (* LC_HIGH_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *) (* LC_HIGH_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *) (* LC_HIGH_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *) (* LC_HIGH_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *) (* LC_HIGH_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *) (* LC_HIGH_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *) (* LC_HIGH_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *) (* LC_HIGH_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *) (* LC_HIGH_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *) (* LC_HIGH_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *) (* LC_HIGH_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *) (* LC_HIGH_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *) (* LC_HIGH_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *) (* LC_HIGH_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *) (* LC_HIGH_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *) (* LC_HIGH_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *) (* LC_HIGH_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *) (* LC_HIGH_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *) (* LC_HIGH_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *) (* LC_HIGH_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *) (* LC_HIGH_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *) (* LC_HIGH_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *) (* LC_HIGH_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *) (* LC_HIGH_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *) (* LC_HIGH_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *) (* LC_HIGH_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *) (* LC_HIGH_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *) (* LC_HIGH_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *) (* LC_HIGH_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *) (* LC_HIGH_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *) (* LC_HIGH_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *) (* LC_HIGH_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *) (* LC_HIGH_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *) (* LC_LOW_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *) (* LC_LOW_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *) (* LC_LOW_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *) (* LC_LOW_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *) (* LC_LOW_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *) (* LC_LOW_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *) (* LC_LOW_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *) (* LC_LOW_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *) (* LC_LOW_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *) (* LC_LOW_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *) (* LC_LOW_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *) (* LC_LOW_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *) (* LC_LOW_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *) (* LC_LOW_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *) (* LC_LOW_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *) (* LC_LOW_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *) (* LC_LOW_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *) (* LC_LOW_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *) (* LC_LOW_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *) (* LC_LOW_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *) (* LC_LOW_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *) (* LC_LOW_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *) (* LC_LOW_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *) (* LC_LOW_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *) (* LC_LOW_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *) (* LC_LOW_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *) (* LC_LOW_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *) (* LC_LOW_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *) (* LC_LOW_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *) (* LC_LOW_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *) (* LC_LOW_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *) (* LC_LOW_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *) (* LC_LOW_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *) (* LC_LOW_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *) (* LC_LOW_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *) (* LC_LOW_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *) (* LC_LOW_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *) (* LC_LOW_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *) (* LC_LOW_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *) (* LC_LOW_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *) (* LC_LOW_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *) (* LC_LOW_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *) (* LC_LOW_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *) (* LC_LOW_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *) (* LC_LOW_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *) (* LC_LOW_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *) (* LC_LOW_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *) (* LC_LOW_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *) (* LC_LOW_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *) (* LC_LOW_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *) (* LC_LOW_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *) (* LC_LOW_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *) (* LC_LOW_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *) (* LC_LOW_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *) (* LC_LOW_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *) (* LC_LOW_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *) (* LC_LOW_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *) (* LC_LOW_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *) (* LC_LOW_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *) (* LC_LOW_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *) (* LC_LOW_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *) (* LC_LOW_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *) (* LC_LOW_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *) (* LC_LOW_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *) (* LC_LOW_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *) (* LC_LOW_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *) (* LC_LOW_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *) (* LC_LOW_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *) (* LC_LOW_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *) (* LC_LOW_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *) (* LC_LOW_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *) (* LC_LOW_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *) (* LC_LOW_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *) (* LC_LOW_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *) (* LC_LOW_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *) (* LC_LOW_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *) (* LC_LOW_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *) (* LC_LOW_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *) (* LC_LOW_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *) (* LC_LOW_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *) (* LC_LOW_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *) (* LC_LOW_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *) (* LC_LOW_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *) (* LC_LOW_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *) (* LC_LOW_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *) (* LC_LOW_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *) (* LC_LOW_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *) (* LC_LOW_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *) (* LC_LOW_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *) (* LC_LOW_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *) (* LC_LOW_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *) (* LC_LOW_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *) (* LC_LOW_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *) (* LC_LOW_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *) (* LC_LOW_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *) (* LC_LOW_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *) (* LC_LOW_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *) (* LC_LOW_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *) (* LC_LOW_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *) (* LC_LOW_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *) (* LC_LOW_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *) (* LC_LOW_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *) (* LC_LOW_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *) (* LC_LOW_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *) (* LC_LOW_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *) (* LC_LOW_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *) (* LC_LOW_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *) (* LC_LOW_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *) (* LC_LOW_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *) (* LC_LOW_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *) (* LC_LOW_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *) (* LC_LOW_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *) (* LC_LOW_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *) (* LC_LOW_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *) (* LC_LOW_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *) (* LC_LOW_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *) (* LC_LOW_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *) (* LC_LOW_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *) (* LC_LOW_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *) (* LC_LOW_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *) (* LC_LOW_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *) (* LC_LOW_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *) (* LC_LOW_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *) (* LC_LOW_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *) (* LC_LOW_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *) (* LC_LOW_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *) (* LC_LOW_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *) (* LC_LOW_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *) (* LC_LOW_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *) (* LC_LOW_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *) (* LC_LOW_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *) (* LC_LOW_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *) (* LC_LOW_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *) (* LC_LOW_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *) (* LC_LOW_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *) (* LC_LOW_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *) (* LC_LOW_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *) (* LC_LOW_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *) (* LC_LOW_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *) (* LC_LOW_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *) (* LC_LOW_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *) (* LC_LOW_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *) (* LC_LOW_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *) (* LC_LOW_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *) (* LC_LOW_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *) (* LC_LOW_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *) (* LC_LOW_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *) (* LC_LOW_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *) (* LC_LOW_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *) (* LC_LOW_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *) (* LC_LOW_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *) (* LC_LOW_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *) (* LC_LOW_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *) (* LC_LOW_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *) (* LC_LOW_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *) (* LC_LOW_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *) (* LC_LOW_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *) (* LC_LOW_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *) (* LC_LOW_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *) (* LC_LOW_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *) (* LC_LOW_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *) (* LC_LOW_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *) (* LC_LOW_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *) (* LC_LOW_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *) (* LC_LOW_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *) (* LC_LOW_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *) (* LC_LOW_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *) (* LC_LOW_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *) (* LC_LOW_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *) (* LC_LOW_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *) (* LC_LOW_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *)
-(* LC_PROBE_IN_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* LC_PROBE_OUT_HIGH_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *) (* LC_PROBE_OUT_INIT_VAL_STRING = "256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
-(* LC_PROBE_OUT_LOW_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *) (* LC_PROBE_OUT_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* LC_TOTAL_PROBE_IN_WIDTH = "0" *)
-(* LC_TOTAL_PROBE_OUT_WIDTH = "1" *) (* ORIG_REF_NAME = "vio_v3_0_19_vio" *) (* dont_touch = "true" *)
-module scalp_zynqps_vio_0_0_vio_v3_0_19_vio
- (clk,
- probe_in0,
- probe_in1,
- probe_in2,
- probe_in3,
- probe_in4,
- probe_in5,
- probe_in6,
- probe_in7,
- probe_in8,
- probe_in9,
- probe_in10,
- probe_in11,
- probe_in12,
- probe_in13,
- probe_in14,
- probe_in15,
- probe_in16,
- probe_in17,
- probe_in18,
- probe_in19,
- probe_in20,
- probe_in21,
- probe_in22,
- probe_in23,
- probe_in24,
- probe_in25,
- probe_in26,
- probe_in27,
- probe_in28,
- probe_in29,
- probe_in30,
- probe_in31,
- probe_in32,
- probe_in33,
- probe_in34,
- probe_in35,
- probe_in36,
- probe_in37,
- probe_in38,
- probe_in39,
- probe_in40,
- probe_in41,
- probe_in42,
- probe_in43,
- probe_in44,
- probe_in45,
- probe_in46,
- probe_in47,
- probe_in48,
- probe_in49,
- probe_in50,
- probe_in51,
- probe_in52,
- probe_in53,
- probe_in54,
- probe_in55,
- probe_in56,
- probe_in57,
- probe_in58,
- probe_in59,
- probe_in60,
- probe_in61,
- probe_in62,
- probe_in63,
- probe_in64,
- probe_in65,
- probe_in66,
- probe_in67,
- probe_in68,
- probe_in69,
- probe_in70,
- probe_in71,
- probe_in72,
- probe_in73,
- probe_in74,
- probe_in75,
- probe_in76,
- probe_in77,
- probe_in78,
- probe_in79,
- probe_in80,
- probe_in81,
- probe_in82,
- probe_in83,
- probe_in84,
- probe_in85,
- probe_in86,
- probe_in87,
- probe_in88,
- probe_in89,
- probe_in90,
- probe_in91,
- probe_in92,
- probe_in93,
- probe_in94,
- probe_in95,
- probe_in96,
- probe_in97,
- probe_in98,
- probe_in99,
- probe_in100,
- probe_in101,
- probe_in102,
- probe_in103,
- probe_in104,
- probe_in105,
- probe_in106,
- probe_in107,
- probe_in108,
- probe_in109,
- probe_in110,
- probe_in111,
- probe_in112,
- probe_in113,
- probe_in114,
- probe_in115,
- probe_in116,
- probe_in117,
- probe_in118,
- probe_in119,
- probe_in120,
- probe_in121,
- probe_in122,
- probe_in123,
- probe_in124,
- probe_in125,
- probe_in126,
- probe_in127,
- probe_in128,
- probe_in129,
- probe_in130,
- probe_in131,
- probe_in132,
- probe_in133,
- probe_in134,
- probe_in135,
- probe_in136,
- probe_in137,
- probe_in138,
- probe_in139,
- probe_in140,
- probe_in141,
- probe_in142,
- probe_in143,
- probe_in144,
- probe_in145,
- probe_in146,
- probe_in147,
- probe_in148,
- probe_in149,
- probe_in150,
- probe_in151,
- probe_in152,
- probe_in153,
- probe_in154,
- probe_in155,
- probe_in156,
- probe_in157,
- probe_in158,
- probe_in159,
- probe_in160,
- probe_in161,
- probe_in162,
- probe_in163,
- probe_in164,
- probe_in165,
- probe_in166,
- probe_in167,
- probe_in168,
- probe_in169,
- probe_in170,
- probe_in171,
- probe_in172,
- probe_in173,
- probe_in174,
- probe_in175,
- probe_in176,
- probe_in177,
- probe_in178,
- probe_in179,
- probe_in180,
- probe_in181,
- probe_in182,
- probe_in183,
- probe_in184,
- probe_in185,
- probe_in186,
- probe_in187,
- probe_in188,
- probe_in189,
- probe_in190,
- probe_in191,
- probe_in192,
- probe_in193,
- probe_in194,
- probe_in195,
- probe_in196,
- probe_in197,
- probe_in198,
- probe_in199,
- probe_in200,
- probe_in201,
- probe_in202,
- probe_in203,
- probe_in204,
- probe_in205,
- probe_in206,
- probe_in207,
- probe_in208,
- probe_in209,
- probe_in210,
- probe_in211,
- probe_in212,
- probe_in213,
- probe_in214,
- probe_in215,
- probe_in216,
- probe_in217,
- probe_in218,
- probe_in219,
- probe_in220,
- probe_in221,
- probe_in222,
- probe_in223,
- probe_in224,
- probe_in225,
- probe_in226,
- probe_in227,
- probe_in228,
- probe_in229,
- probe_in230,
- probe_in231,
- probe_in232,
- probe_in233,
- probe_in234,
- probe_in235,
- probe_in236,
- probe_in237,
- probe_in238,
- probe_in239,
- probe_in240,
- probe_in241,
- probe_in242,
- probe_in243,
- probe_in244,
- probe_in245,
- probe_in246,
- probe_in247,
- probe_in248,
- probe_in249,
- probe_in250,
- probe_in251,
- probe_in252,
- probe_in253,
- probe_in254,
- probe_in255,
- sl_iport0,
- sl_oport0,
- probe_out0,
- probe_out1,
- probe_out2,
- probe_out3,
- probe_out4,
- probe_out5,
- probe_out6,
- probe_out7,
- probe_out8,
- probe_out9,
- probe_out10,
- probe_out11,
- probe_out12,
- probe_out13,
- probe_out14,
- probe_out15,
- probe_out16,
- probe_out17,
- probe_out18,
- probe_out19,
- probe_out20,
- probe_out21,
- probe_out22,
- probe_out23,
- probe_out24,
- probe_out25,
- probe_out26,
- probe_out27,
- probe_out28,
- probe_out29,
- probe_out30,
- probe_out31,
- probe_out32,
- probe_out33,
- probe_out34,
- probe_out35,
- probe_out36,
- probe_out37,
- probe_out38,
- probe_out39,
- probe_out40,
- probe_out41,
- probe_out42,
- probe_out43,
- probe_out44,
- probe_out45,
- probe_out46,
- probe_out47,
- probe_out48,
- probe_out49,
- probe_out50,
- probe_out51,
- probe_out52,
- probe_out53,
- probe_out54,
- probe_out55,
- probe_out56,
- probe_out57,
- probe_out58,
- probe_out59,
- probe_out60,
- probe_out61,
- probe_out62,
- probe_out63,
- probe_out64,
- probe_out65,
- probe_out66,
- probe_out67,
- probe_out68,
- probe_out69,
- probe_out70,
- probe_out71,
- probe_out72,
- probe_out73,
- probe_out74,
- probe_out75,
- probe_out76,
- probe_out77,
- probe_out78,
- probe_out79,
- probe_out80,
- probe_out81,
- probe_out82,
- probe_out83,
- probe_out84,
- probe_out85,
- probe_out86,
- probe_out87,
- probe_out88,
- probe_out89,
- probe_out90,
- probe_out91,
- probe_out92,
- probe_out93,
- probe_out94,
- probe_out95,
- probe_out96,
- probe_out97,
- probe_out98,
- probe_out99,
- probe_out100,
- probe_out101,
- probe_out102,
- probe_out103,
- probe_out104,
- probe_out105,
- probe_out106,
- probe_out107,
- probe_out108,
- probe_out109,
- probe_out110,
- probe_out111,
- probe_out112,
- probe_out113,
- probe_out114,
- probe_out115,
- probe_out116,
- probe_out117,
- probe_out118,
- probe_out119,
- probe_out120,
- probe_out121,
- probe_out122,
- probe_out123,
- probe_out124,
- probe_out125,
- probe_out126,
- probe_out127,
- probe_out128,
- probe_out129,
- probe_out130,
- probe_out131,
- probe_out132,
- probe_out133,
- probe_out134,
- probe_out135,
- probe_out136,
- probe_out137,
- probe_out138,
- probe_out139,
- probe_out140,
- probe_out141,
- probe_out142,
- probe_out143,
- probe_out144,
- probe_out145,
- probe_out146,
- probe_out147,
- probe_out148,
- probe_out149,
- probe_out150,
- probe_out151,
- probe_out152,
- probe_out153,
- probe_out154,
- probe_out155,
- probe_out156,
- probe_out157,
- probe_out158,
- probe_out159,
- probe_out160,
- probe_out161,
- probe_out162,
- probe_out163,
- probe_out164,
- probe_out165,
- probe_out166,
- probe_out167,
- probe_out168,
- probe_out169,
- probe_out170,
- probe_out171,
- probe_out172,
- probe_out173,
- probe_out174,
- probe_out175,
- probe_out176,
- probe_out177,
- probe_out178,
- probe_out179,
- probe_out180,
- probe_out181,
- probe_out182,
- probe_out183,
- probe_out184,
- probe_out185,
- probe_out186,
- probe_out187,
- probe_out188,
- probe_out189,
- probe_out190,
- probe_out191,
- probe_out192,
- probe_out193,
- probe_out194,
- probe_out195,
- probe_out196,
- probe_out197,
- probe_out198,
- probe_out199,
- probe_out200,
- probe_out201,
- probe_out202,
- probe_out203,
- probe_out204,
- probe_out205,
- probe_out206,
- probe_out207,
- probe_out208,
- probe_out209,
- probe_out210,
- probe_out211,
- probe_out212,
- probe_out213,
- probe_out214,
- probe_out215,
- probe_out216,
- probe_out217,
- probe_out218,
- probe_out219,
- probe_out220,
- probe_out221,
- probe_out222,
- probe_out223,
- probe_out224,
- probe_out225,
- probe_out226,
- probe_out227,
- probe_out228,
- probe_out229,
- probe_out230,
- probe_out231,
- probe_out232,
- probe_out233,
- probe_out234,
- probe_out235,
- probe_out236,
- probe_out237,
- probe_out238,
- probe_out239,
- probe_out240,
- probe_out241,
- probe_out242,
- probe_out243,
- probe_out244,
- probe_out245,
- probe_out246,
- probe_out247,
- probe_out248,
- probe_out249,
- probe_out250,
- probe_out251,
- probe_out252,
- probe_out253,
- probe_out254,
- probe_out255);
- input clk;
- input [0:0]probe_in0;
- input [0:0]probe_in1;
- input [0:0]probe_in2;
- input [0:0]probe_in3;
- input [0:0]probe_in4;
- input [0:0]probe_in5;
- input [0:0]probe_in6;
- input [0:0]probe_in7;
- input [0:0]probe_in8;
- input [0:0]probe_in9;
- input [0:0]probe_in10;
- input [0:0]probe_in11;
- input [0:0]probe_in12;
- input [0:0]probe_in13;
- input [0:0]probe_in14;
- input [0:0]probe_in15;
- input [0:0]probe_in16;
- input [0:0]probe_in17;
- input [0:0]probe_in18;
- input [0:0]probe_in19;
- input [0:0]probe_in20;
- input [0:0]probe_in21;
- input [0:0]probe_in22;
- input [0:0]probe_in23;
- input [0:0]probe_in24;
- input [0:0]probe_in25;
- input [0:0]probe_in26;
- input [0:0]probe_in27;
- input [0:0]probe_in28;
- input [0:0]probe_in29;
- input [0:0]probe_in30;
- input [0:0]probe_in31;
- input [0:0]probe_in32;
- input [0:0]probe_in33;
- input [0:0]probe_in34;
- input [0:0]probe_in35;
- input [0:0]probe_in36;
- input [0:0]probe_in37;
- input [0:0]probe_in38;
- input [0:0]probe_in39;
- input [0:0]probe_in40;
- input [0:0]probe_in41;
- input [0:0]probe_in42;
- input [0:0]probe_in43;
- input [0:0]probe_in44;
- input [0:0]probe_in45;
- input [0:0]probe_in46;
- input [0:0]probe_in47;
- input [0:0]probe_in48;
- input [0:0]probe_in49;
- input [0:0]probe_in50;
- input [0:0]probe_in51;
- input [0:0]probe_in52;
- input [0:0]probe_in53;
- input [0:0]probe_in54;
- input [0:0]probe_in55;
- input [0:0]probe_in56;
- input [0:0]probe_in57;
- input [0:0]probe_in58;
- input [0:0]probe_in59;
- input [0:0]probe_in60;
- input [0:0]probe_in61;
- input [0:0]probe_in62;
- input [0:0]probe_in63;
- input [0:0]probe_in64;
- input [0:0]probe_in65;
- input [0:0]probe_in66;
- input [0:0]probe_in67;
- input [0:0]probe_in68;
- input [0:0]probe_in69;
- input [0:0]probe_in70;
- input [0:0]probe_in71;
- input [0:0]probe_in72;
- input [0:0]probe_in73;
- input [0:0]probe_in74;
- input [0:0]probe_in75;
- input [0:0]probe_in76;
- input [0:0]probe_in77;
- input [0:0]probe_in78;
- input [0:0]probe_in79;
- input [0:0]probe_in80;
- input [0:0]probe_in81;
- input [0:0]probe_in82;
- input [0:0]probe_in83;
- input [0:0]probe_in84;
- input [0:0]probe_in85;
- input [0:0]probe_in86;
- input [0:0]probe_in87;
- input [0:0]probe_in88;
- input [0:0]probe_in89;
- input [0:0]probe_in90;
- input [0:0]probe_in91;
- input [0:0]probe_in92;
- input [0:0]probe_in93;
- input [0:0]probe_in94;
- input [0:0]probe_in95;
- input [0:0]probe_in96;
- input [0:0]probe_in97;
- input [0:0]probe_in98;
- input [0:0]probe_in99;
- input [0:0]probe_in100;
- input [0:0]probe_in101;
- input [0:0]probe_in102;
- input [0:0]probe_in103;
- input [0:0]probe_in104;
- input [0:0]probe_in105;
- input [0:0]probe_in106;
- input [0:0]probe_in107;
- input [0:0]probe_in108;
- input [0:0]probe_in109;
- input [0:0]probe_in110;
- input [0:0]probe_in111;
- input [0:0]probe_in112;
- input [0:0]probe_in113;
- input [0:0]probe_in114;
- input [0:0]probe_in115;
- input [0:0]probe_in116;
- input [0:0]probe_in117;
- input [0:0]probe_in118;
- input [0:0]probe_in119;
- input [0:0]probe_in120;
- input [0:0]probe_in121;
- input [0:0]probe_in122;
- input [0:0]probe_in123;
- input [0:0]probe_in124;
- input [0:0]probe_in125;
- input [0:0]probe_in126;
- input [0:0]probe_in127;
- input [0:0]probe_in128;
- input [0:0]probe_in129;
- input [0:0]probe_in130;
- input [0:0]probe_in131;
- input [0:0]probe_in132;
- input [0:0]probe_in133;
- input [0:0]probe_in134;
- input [0:0]probe_in135;
- input [0:0]probe_in136;
- input [0:0]probe_in137;
- input [0:0]probe_in138;
- input [0:0]probe_in139;
- input [0:0]probe_in140;
- input [0:0]probe_in141;
- input [0:0]probe_in142;
- input [0:0]probe_in143;
- input [0:0]probe_in144;
- input [0:0]probe_in145;
- input [0:0]probe_in146;
- input [0:0]probe_in147;
- input [0:0]probe_in148;
- input [0:0]probe_in149;
- input [0:0]probe_in150;
- input [0:0]probe_in151;
- input [0:0]probe_in152;
- input [0:0]probe_in153;
- input [0:0]probe_in154;
- input [0:0]probe_in155;
- input [0:0]probe_in156;
- input [0:0]probe_in157;
- input [0:0]probe_in158;
- input [0:0]probe_in159;
- input [0:0]probe_in160;
- input [0:0]probe_in161;
- input [0:0]probe_in162;
- input [0:0]probe_in163;
- input [0:0]probe_in164;
- input [0:0]probe_in165;
- input [0:0]probe_in166;
- input [0:0]probe_in167;
- input [0:0]probe_in168;
- input [0:0]probe_in169;
- input [0:0]probe_in170;
- input [0:0]probe_in171;
- input [0:0]probe_in172;
- input [0:0]probe_in173;
- input [0:0]probe_in174;
- input [0:0]probe_in175;
- input [0:0]probe_in176;
- input [0:0]probe_in177;
- input [0:0]probe_in178;
- input [0:0]probe_in179;
- input [0:0]probe_in180;
- input [0:0]probe_in181;
- input [0:0]probe_in182;
- input [0:0]probe_in183;
- input [0:0]probe_in184;
- input [0:0]probe_in185;
- input [0:0]probe_in186;
- input [0:0]probe_in187;
- input [0:0]probe_in188;
- input [0:0]probe_in189;
- input [0:0]probe_in190;
- input [0:0]probe_in191;
- input [0:0]probe_in192;
- input [0:0]probe_in193;
- input [0:0]probe_in194;
- input [0:0]probe_in195;
- input [0:0]probe_in196;
- input [0:0]probe_in197;
- input [0:0]probe_in198;
- input [0:0]probe_in199;
- input [0:0]probe_in200;
- input [0:0]probe_in201;
- input [0:0]probe_in202;
- input [0:0]probe_in203;
- input [0:0]probe_in204;
- input [0:0]probe_in205;
- input [0:0]probe_in206;
- input [0:0]probe_in207;
- input [0:0]probe_in208;
- input [0:0]probe_in209;
- input [0:0]probe_in210;
- input [0:0]probe_in211;
- input [0:0]probe_in212;
- input [0:0]probe_in213;
- input [0:0]probe_in214;
- input [0:0]probe_in215;
- input [0:0]probe_in216;
- input [0:0]probe_in217;
- input [0:0]probe_in218;
- input [0:0]probe_in219;
- input [0:0]probe_in220;
- input [0:0]probe_in221;
- input [0:0]probe_in222;
- input [0:0]probe_in223;
- input [0:0]probe_in224;
- input [0:0]probe_in225;
- input [0:0]probe_in226;
- input [0:0]probe_in227;
- input [0:0]probe_in228;
- input [0:0]probe_in229;
- input [0:0]probe_in230;
- input [0:0]probe_in231;
- input [0:0]probe_in232;
- input [0:0]probe_in233;
- input [0:0]probe_in234;
- input [0:0]probe_in235;
- input [0:0]probe_in236;
- input [0:0]probe_in237;
- input [0:0]probe_in238;
- input [0:0]probe_in239;
- input [0:0]probe_in240;
- input [0:0]probe_in241;
- input [0:0]probe_in242;
- input [0:0]probe_in243;
- input [0:0]probe_in244;
- input [0:0]probe_in245;
- input [0:0]probe_in246;
- input [0:0]probe_in247;
- input [0:0]probe_in248;
- input [0:0]probe_in249;
- input [0:0]probe_in250;
- input [0:0]probe_in251;
- input [0:0]probe_in252;
- input [0:0]probe_in253;
- input [0:0]probe_in254;
- input [0:0]probe_in255;
- (* dont_touch = "true" *) input [36:0]sl_iport0;
- (* dont_touch = "true" *) output [16:0]sl_oport0;
- output [0:0]probe_out0;
- output [0:0]probe_out1;
- output [0:0]probe_out2;
- output [0:0]probe_out3;
- output [0:0]probe_out4;
- output [0:0]probe_out5;
- output [0:0]probe_out6;
- output [0:0]probe_out7;
- output [0:0]probe_out8;
- output [0:0]probe_out9;
- output [0:0]probe_out10;
- output [0:0]probe_out11;
- output [0:0]probe_out12;
- output [0:0]probe_out13;
- output [0:0]probe_out14;
- output [0:0]probe_out15;
- output [0:0]probe_out16;
- output [0:0]probe_out17;
- output [0:0]probe_out18;
- output [0:0]probe_out19;
- output [0:0]probe_out20;
- output [0:0]probe_out21;
- output [0:0]probe_out22;
- output [0:0]probe_out23;
- output [0:0]probe_out24;
- output [0:0]probe_out25;
- output [0:0]probe_out26;
- output [0:0]probe_out27;
- output [0:0]probe_out28;
- output [0:0]probe_out29;
- output [0:0]probe_out30;
- output [0:0]probe_out31;
- output [0:0]probe_out32;
- output [0:0]probe_out33;
- output [0:0]probe_out34;
- output [0:0]probe_out35;
- output [0:0]probe_out36;
- output [0:0]probe_out37;
- output [0:0]probe_out38;
- output [0:0]probe_out39;
- output [0:0]probe_out40;
- output [0:0]probe_out41;
- output [0:0]probe_out42;
- output [0:0]probe_out43;
- output [0:0]probe_out44;
- output [0:0]probe_out45;
- output [0:0]probe_out46;
- output [0:0]probe_out47;
- output [0:0]probe_out48;
- output [0:0]probe_out49;
- output [0:0]probe_out50;
- output [0:0]probe_out51;
- output [0:0]probe_out52;
- output [0:0]probe_out53;
- output [0:0]probe_out54;
- output [0:0]probe_out55;
- output [0:0]probe_out56;
- output [0:0]probe_out57;
- output [0:0]probe_out58;
- output [0:0]probe_out59;
- output [0:0]probe_out60;
- output [0:0]probe_out61;
- output [0:0]probe_out62;
- output [0:0]probe_out63;
- output [0:0]probe_out64;
- output [0:0]probe_out65;
- output [0:0]probe_out66;
- output [0:0]probe_out67;
- output [0:0]probe_out68;
- output [0:0]probe_out69;
- output [0:0]probe_out70;
- output [0:0]probe_out71;
- output [0:0]probe_out72;
- output [0:0]probe_out73;
- output [0:0]probe_out74;
- output [0:0]probe_out75;
- output [0:0]probe_out76;
- output [0:0]probe_out77;
- output [0:0]probe_out78;
- output [0:0]probe_out79;
- output [0:0]probe_out80;
- output [0:0]probe_out81;
- output [0:0]probe_out82;
- output [0:0]probe_out83;
- output [0:0]probe_out84;
- output [0:0]probe_out85;
- output [0:0]probe_out86;
- output [0:0]probe_out87;
- output [0:0]probe_out88;
- output [0:0]probe_out89;
- output [0:0]probe_out90;
- output [0:0]probe_out91;
- output [0:0]probe_out92;
- output [0:0]probe_out93;
- output [0:0]probe_out94;
- output [0:0]probe_out95;
- output [0:0]probe_out96;
- output [0:0]probe_out97;
- output [0:0]probe_out98;
- output [0:0]probe_out99;
- output [0:0]probe_out100;
- output [0:0]probe_out101;
- output [0:0]probe_out102;
- output [0:0]probe_out103;
- output [0:0]probe_out104;
- output [0:0]probe_out105;
- output [0:0]probe_out106;
- output [0:0]probe_out107;
- output [0:0]probe_out108;
- output [0:0]probe_out109;
- output [0:0]probe_out110;
- output [0:0]probe_out111;
- output [0:0]probe_out112;
- output [0:0]probe_out113;
- output [0:0]probe_out114;
- output [0:0]probe_out115;
- output [0:0]probe_out116;
- output [0:0]probe_out117;
- output [0:0]probe_out118;
- output [0:0]probe_out119;
- output [0:0]probe_out120;
- output [0:0]probe_out121;
- output [0:0]probe_out122;
- output [0:0]probe_out123;
- output [0:0]probe_out124;
- output [0:0]probe_out125;
- output [0:0]probe_out126;
- output [0:0]probe_out127;
- output [0:0]probe_out128;
- output [0:0]probe_out129;
- output [0:0]probe_out130;
- output [0:0]probe_out131;
- output [0:0]probe_out132;
- output [0:0]probe_out133;
- output [0:0]probe_out134;
- output [0:0]probe_out135;
- output [0:0]probe_out136;
- output [0:0]probe_out137;
- output [0:0]probe_out138;
- output [0:0]probe_out139;
- output [0:0]probe_out140;
- output [0:0]probe_out141;
- output [0:0]probe_out142;
- output [0:0]probe_out143;
- output [0:0]probe_out144;
- output [0:0]probe_out145;
- output [0:0]probe_out146;
- output [0:0]probe_out147;
- output [0:0]probe_out148;
- output [0:0]probe_out149;
- output [0:0]probe_out150;
- output [0:0]probe_out151;
- output [0:0]probe_out152;
- output [0:0]probe_out153;
- output [0:0]probe_out154;
- output [0:0]probe_out155;
- output [0:0]probe_out156;
- output [0:0]probe_out157;
- output [0:0]probe_out158;
- output [0:0]probe_out159;
- output [0:0]probe_out160;
- output [0:0]probe_out161;
- output [0:0]probe_out162;
- output [0:0]probe_out163;
- output [0:0]probe_out164;
- output [0:0]probe_out165;
- output [0:0]probe_out166;
- output [0:0]probe_out167;
- output [0:0]probe_out168;
- output [0:0]probe_out169;
- output [0:0]probe_out170;
- output [0:0]probe_out171;
- output [0:0]probe_out172;
- output [0:0]probe_out173;
- output [0:0]probe_out174;
- output [0:0]probe_out175;
- output [0:0]probe_out176;
- output [0:0]probe_out177;
- output [0:0]probe_out178;
- output [0:0]probe_out179;
- output [0:0]probe_out180;
- output [0:0]probe_out181;
- output [0:0]probe_out182;
- output [0:0]probe_out183;
- output [0:0]probe_out184;
- output [0:0]probe_out185;
- output [0:0]probe_out186;
- output [0:0]probe_out187;
- output [0:0]probe_out188;
- output [0:0]probe_out189;
- output [0:0]probe_out190;
- output [0:0]probe_out191;
- output [0:0]probe_out192;
- output [0:0]probe_out193;
- output [0:0]probe_out194;
- output [0:0]probe_out195;
- output [0:0]probe_out196;
- output [0:0]probe_out197;
- output [0:0]probe_out198;
- output [0:0]probe_out199;
- output [0:0]probe_out200;
- output [0:0]probe_out201;
- output [0:0]probe_out202;
- output [0:0]probe_out203;
- output [0:0]probe_out204;
- output [0:0]probe_out205;
- output [0:0]probe_out206;
- output [0:0]probe_out207;
- output [0:0]probe_out208;
- output [0:0]probe_out209;
- output [0:0]probe_out210;
- output [0:0]probe_out211;
- output [0:0]probe_out212;
- output [0:0]probe_out213;
- output [0:0]probe_out214;
- output [0:0]probe_out215;
- output [0:0]probe_out216;
- output [0:0]probe_out217;
- output [0:0]probe_out218;
- output [0:0]probe_out219;
- output [0:0]probe_out220;
- output [0:0]probe_out221;
- output [0:0]probe_out222;
- output [0:0]probe_out223;
- output [0:0]probe_out224;
- output [0:0]probe_out225;
- output [0:0]probe_out226;
- output [0:0]probe_out227;
- output [0:0]probe_out228;
- output [0:0]probe_out229;
- output [0:0]probe_out230;
- output [0:0]probe_out231;
- output [0:0]probe_out232;
- output [0:0]probe_out233;
- output [0:0]probe_out234;
- output [0:0]probe_out235;
- output [0:0]probe_out236;
- output [0:0]probe_out237;
- output [0:0]probe_out238;
- output [0:0]probe_out239;
- output [0:0]probe_out240;
- output [0:0]probe_out241;
- output [0:0]probe_out242;
- output [0:0]probe_out243;
- output [0:0]probe_out244;
- output [0:0]probe_out245;
- output [0:0]probe_out246;
- output [0:0]probe_out247;
- output [0:0]probe_out248;
- output [0:0]probe_out249;
- output [0:0]probe_out250;
- output [0:0]probe_out251;
- output [0:0]probe_out252;
- output [0:0]probe_out253;
- output [0:0]probe_out254;
- output [0:0]probe_out255;
-
- wire \<const0> ;
- wire DECODER_INST_n_4;
- wire DECODER_INST_n_5;
- wire [0:0]Probe_out_reg;
- wire [16:0]bus_addr;
- (* DONT_TOUCH *) wire bus_clk;
- wire \bus_data_int_reg_n_0_[10] ;
- wire \bus_data_int_reg_n_0_[11] ;
- wire \bus_data_int_reg_n_0_[12] ;
- wire \bus_data_int_reg_n_0_[13] ;
- wire \bus_data_int_reg_n_0_[14] ;
- wire \bus_data_int_reg_n_0_[15] ;
- wire \bus_data_int_reg_n_0_[2] ;
- wire \bus_data_int_reg_n_0_[3] ;
- wire \bus_data_int_reg_n_0_[4] ;
- wire \bus_data_int_reg_n_0_[5] ;
- wire \bus_data_int_reg_n_0_[6] ;
- wire \bus_data_int_reg_n_0_[7] ;
- wire \bus_data_int_reg_n_0_[8] ;
- wire \bus_data_int_reg_n_0_[9] ;
- wire bus_den;
- wire [15:0]bus_di;
- wire [15:0]bus_do;
- wire bus_drdy;
- wire bus_dwe;
- wire bus_rst;
- wire clear;
- wire clk;
- wire committ;
- wire p_0_in;
- wire p_2_in;
- wire [0:0]probe_out0;
- (* DONT_TOUCH *) wire [36:0]sl_iport0;
- (* DONT_TOUCH *) wire [16:0]sl_oport0;
- wire xsdb_wr__0;
-
- assign probe_out1[0] = \<const0> ;
- assign probe_out10[0] = \<const0> ;
- assign probe_out100[0] = \<const0> ;
- assign probe_out101[0] = \<const0> ;
- assign probe_out102[0] = \<const0> ;
- assign probe_out103[0] = \<const0> ;
- assign probe_out104[0] = \<const0> ;
- assign probe_out105[0] = \<const0> ;
- assign probe_out106[0] = \<const0> ;
- assign probe_out107[0] = \<const0> ;
- assign probe_out108[0] = \<const0> ;
- assign probe_out109[0] = \<const0> ;
- assign probe_out11[0] = \<const0> ;
- assign probe_out110[0] = \<const0> ;
- assign probe_out111[0] = \<const0> ;
- assign probe_out112[0] = \<const0> ;
- assign probe_out113[0] = \<const0> ;
- assign probe_out114[0] = \<const0> ;
- assign probe_out115[0] = \<const0> ;
- assign probe_out116[0] = \<const0> ;
- assign probe_out117[0] = \<const0> ;
- assign probe_out118[0] = \<const0> ;
- assign probe_out119[0] = \<const0> ;
- assign probe_out12[0] = \<const0> ;
- assign probe_out120[0] = \<const0> ;
- assign probe_out121[0] = \<const0> ;
- assign probe_out122[0] = \<const0> ;
- assign probe_out123[0] = \<const0> ;
- assign probe_out124[0] = \<const0> ;
- assign probe_out125[0] = \<const0> ;
- assign probe_out126[0] = \<const0> ;
- assign probe_out127[0] = \<const0> ;
- assign probe_out128[0] = \<const0> ;
- assign probe_out129[0] = \<const0> ;
- assign probe_out13[0] = \<const0> ;
- assign probe_out130[0] = \<const0> ;
- assign probe_out131[0] = \<const0> ;
- assign probe_out132[0] = \<const0> ;
- assign probe_out133[0] = \<const0> ;
- assign probe_out134[0] = \<const0> ;
- assign probe_out135[0] = \<const0> ;
- assign probe_out136[0] = \<const0> ;
- assign probe_out137[0] = \<const0> ;
- assign probe_out138[0] = \<const0> ;
- assign probe_out139[0] = \<const0> ;
- assign probe_out14[0] = \<const0> ;
- assign probe_out140[0] = \<const0> ;
- assign probe_out141[0] = \<const0> ;
- assign probe_out142[0] = \<const0> ;
- assign probe_out143[0] = \<const0> ;
- assign probe_out144[0] = \<const0> ;
- assign probe_out145[0] = \<const0> ;
- assign probe_out146[0] = \<const0> ;
- assign probe_out147[0] = \<const0> ;
- assign probe_out148[0] = \<const0> ;
- assign probe_out149[0] = \<const0> ;
- assign probe_out15[0] = \<const0> ;
- assign probe_out150[0] = \<const0> ;
- assign probe_out151[0] = \<const0> ;
- assign probe_out152[0] = \<const0> ;
- assign probe_out153[0] = \<const0> ;
- assign probe_out154[0] = \<const0> ;
- assign probe_out155[0] = \<const0> ;
- assign probe_out156[0] = \<const0> ;
- assign probe_out157[0] = \<const0> ;
- assign probe_out158[0] = \<const0> ;
- assign probe_out159[0] = \<const0> ;
- assign probe_out16[0] = \<const0> ;
- assign probe_out160[0] = \<const0> ;
- assign probe_out161[0] = \<const0> ;
- assign probe_out162[0] = \<const0> ;
- assign probe_out163[0] = \<const0> ;
- assign probe_out164[0] = \<const0> ;
- assign probe_out165[0] = \<const0> ;
- assign probe_out166[0] = \<const0> ;
- assign probe_out167[0] = \<const0> ;
- assign probe_out168[0] = \<const0> ;
- assign probe_out169[0] = \<const0> ;
- assign probe_out17[0] = \<const0> ;
- assign probe_out170[0] = \<const0> ;
- assign probe_out171[0] = \<const0> ;
- assign probe_out172[0] = \<const0> ;
- assign probe_out173[0] = \<const0> ;
- assign probe_out174[0] = \<const0> ;
- assign probe_out175[0] = \<const0> ;
- assign probe_out176[0] = \<const0> ;
- assign probe_out177[0] = \<const0> ;
- assign probe_out178[0] = \<const0> ;
- assign probe_out179[0] = \<const0> ;
- assign probe_out18[0] = \<const0> ;
- assign probe_out180[0] = \<const0> ;
- assign probe_out181[0] = \<const0> ;
- assign probe_out182[0] = \<const0> ;
- assign probe_out183[0] = \<const0> ;
- assign probe_out184[0] = \<const0> ;
- assign probe_out185[0] = \<const0> ;
- assign probe_out186[0] = \<const0> ;
- assign probe_out187[0] = \<const0> ;
- assign probe_out188[0] = \<const0> ;
- assign probe_out189[0] = \<const0> ;
- assign probe_out19[0] = \<const0> ;
- assign probe_out190[0] = \<const0> ;
- assign probe_out191[0] = \<const0> ;
- assign probe_out192[0] = \<const0> ;
- assign probe_out193[0] = \<const0> ;
- assign probe_out194[0] = \<const0> ;
- assign probe_out195[0] = \<const0> ;
- assign probe_out196[0] = \<const0> ;
- assign probe_out197[0] = \<const0> ;
- assign probe_out198[0] = \<const0> ;
- assign probe_out199[0] = \<const0> ;
- assign probe_out2[0] = \<const0> ;
- assign probe_out20[0] = \<const0> ;
- assign probe_out200[0] = \<const0> ;
- assign probe_out201[0] = \<const0> ;
- assign probe_out202[0] = \<const0> ;
- assign probe_out203[0] = \<const0> ;
- assign probe_out204[0] = \<const0> ;
- assign probe_out205[0] = \<const0> ;
- assign probe_out206[0] = \<const0> ;
- assign probe_out207[0] = \<const0> ;
- assign probe_out208[0] = \<const0> ;
- assign probe_out209[0] = \<const0> ;
- assign probe_out21[0] = \<const0> ;
- assign probe_out210[0] = \<const0> ;
- assign probe_out211[0] = \<const0> ;
- assign probe_out212[0] = \<const0> ;
- assign probe_out213[0] = \<const0> ;
- assign probe_out214[0] = \<const0> ;
- assign probe_out215[0] = \<const0> ;
- assign probe_out216[0] = \<const0> ;
- assign probe_out217[0] = \<const0> ;
- assign probe_out218[0] = \<const0> ;
- assign probe_out219[0] = \<const0> ;
- assign probe_out22[0] = \<const0> ;
- assign probe_out220[0] = \<const0> ;
- assign probe_out221[0] = \<const0> ;
- assign probe_out222[0] = \<const0> ;
- assign probe_out223[0] = \<const0> ;
- assign probe_out224[0] = \<const0> ;
- assign probe_out225[0] = \<const0> ;
- assign probe_out226[0] = \<const0> ;
- assign probe_out227[0] = \<const0> ;
- assign probe_out228[0] = \<const0> ;
- assign probe_out229[0] = \<const0> ;
- assign probe_out23[0] = \<const0> ;
- assign probe_out230[0] = \<const0> ;
- assign probe_out231[0] = \<const0> ;
- assign probe_out232[0] = \<const0> ;
- assign probe_out233[0] = \<const0> ;
- assign probe_out234[0] = \<const0> ;
- assign probe_out235[0] = \<const0> ;
- assign probe_out236[0] = \<const0> ;
- assign probe_out237[0] = \<const0> ;
- assign probe_out238[0] = \<const0> ;
- assign probe_out239[0] = \<const0> ;
- assign probe_out24[0] = \<const0> ;
- assign probe_out240[0] = \<const0> ;
- assign probe_out241[0] = \<const0> ;
- assign probe_out242[0] = \<const0> ;
- assign probe_out243[0] = \<const0> ;
- assign probe_out244[0] = \<const0> ;
- assign probe_out245[0] = \<const0> ;
- assign probe_out246[0] = \<const0> ;
- assign probe_out247[0] = \<const0> ;
- assign probe_out248[0] = \<const0> ;
- assign probe_out249[0] = \<const0> ;
- assign probe_out25[0] = \<const0> ;
- assign probe_out250[0] = \<const0> ;
- assign probe_out251[0] = \<const0> ;
- assign probe_out252[0] = \<const0> ;
- assign probe_out253[0] = \<const0> ;
- assign probe_out254[0] = \<const0> ;
- assign probe_out255[0] = \<const0> ;
- assign probe_out26[0] = \<const0> ;
- assign probe_out27[0] = \<const0> ;
- assign probe_out28[0] = \<const0> ;
- assign probe_out29[0] = \<const0> ;
- assign probe_out3[0] = \<const0> ;
- assign probe_out30[0] = \<const0> ;
- assign probe_out31[0] = \<const0> ;
- assign probe_out32[0] = \<const0> ;
- assign probe_out33[0] = \<const0> ;
- assign probe_out34[0] = \<const0> ;
- assign probe_out35[0] = \<const0> ;
- assign probe_out36[0] = \<const0> ;
- assign probe_out37[0] = \<const0> ;
- assign probe_out38[0] = \<const0> ;
- assign probe_out39[0] = \<const0> ;
- assign probe_out4[0] = \<const0> ;
- assign probe_out40[0] = \<const0> ;
- assign probe_out41[0] = \<const0> ;
- assign probe_out42[0] = \<const0> ;
- assign probe_out43[0] = \<const0> ;
- assign probe_out44[0] = \<const0> ;
- assign probe_out45[0] = \<const0> ;
- assign probe_out46[0] = \<const0> ;
- assign probe_out47[0] = \<const0> ;
- assign probe_out48[0] = \<const0> ;
- assign probe_out49[0] = \<const0> ;
- assign probe_out5[0] = \<const0> ;
- assign probe_out50[0] = \<const0> ;
- assign probe_out51[0] = \<const0> ;
- assign probe_out52[0] = \<const0> ;
- assign probe_out53[0] = \<const0> ;
- assign probe_out54[0] = \<const0> ;
- assign probe_out55[0] = \<const0> ;
- assign probe_out56[0] = \<const0> ;
- assign probe_out57[0] = \<const0> ;
- assign probe_out58[0] = \<const0> ;
- assign probe_out59[0] = \<const0> ;
- assign probe_out6[0] = \<const0> ;
- assign probe_out60[0] = \<const0> ;
- assign probe_out61[0] = \<const0> ;
- assign probe_out62[0] = \<const0> ;
- assign probe_out63[0] = \<const0> ;
- assign probe_out64[0] = \<const0> ;
- assign probe_out65[0] = \<const0> ;
- assign probe_out66[0] = \<const0> ;
- assign probe_out67[0] = \<const0> ;
- assign probe_out68[0] = \<const0> ;
- assign probe_out69[0] = \<const0> ;
- assign probe_out7[0] = \<const0> ;
- assign probe_out70[0] = \<const0> ;
- assign probe_out71[0] = \<const0> ;
- assign probe_out72[0] = \<const0> ;
- assign probe_out73[0] = \<const0> ;
- assign probe_out74[0] = \<const0> ;
- assign probe_out75[0] = \<const0> ;
- assign probe_out76[0] = \<const0> ;
- assign probe_out77[0] = \<const0> ;
- assign probe_out78[0] = \<const0> ;
- assign probe_out79[0] = \<const0> ;
- assign probe_out8[0] = \<const0> ;
- assign probe_out80[0] = \<const0> ;
- assign probe_out81[0] = \<const0> ;
- assign probe_out82[0] = \<const0> ;
- assign probe_out83[0] = \<const0> ;
- assign probe_out84[0] = \<const0> ;
- assign probe_out85[0] = \<const0> ;
- assign probe_out86[0] = \<const0> ;
- assign probe_out87[0] = \<const0> ;
- assign probe_out88[0] = \<const0> ;
- assign probe_out89[0] = \<const0> ;
- assign probe_out9[0] = \<const0> ;
- assign probe_out90[0] = \<const0> ;
- assign probe_out91[0] = \<const0> ;
- assign probe_out92[0] = \<const0> ;
- assign probe_out93[0] = \<const0> ;
- assign probe_out94[0] = \<const0> ;
- assign probe_out95[0] = \<const0> ;
- assign probe_out96[0] = \<const0> ;
- assign probe_out97[0] = \<const0> ;
- assign probe_out98[0] = \<const0> ;
- assign probe_out99[0] = \<const0> ;
- scalp_zynqps_vio_0_0_vio_v3_0_19_decoder DECODER_INST
- (.\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 (DECODER_INST_n_4),
- .\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 (DECODER_INST_n_5),
- .Probe_out_reg(Probe_out_reg),
- .Q({\bus_data_int_reg_n_0_[15] ,\bus_data_int_reg_n_0_[14] ,\bus_data_int_reg_n_0_[13] ,\bus_data_int_reg_n_0_[12] ,\bus_data_int_reg_n_0_[11] ,\bus_data_int_reg_n_0_[10] ,\bus_data_int_reg_n_0_[9] ,\bus_data_int_reg_n_0_[8] ,\bus_data_int_reg_n_0_[7] ,\bus_data_int_reg_n_0_[6] ,\bus_data_int_reg_n_0_[5] ,\bus_data_int_reg_n_0_[4] ,\bus_data_int_reg_n_0_[3] ,\bus_data_int_reg_n_0_[2] ,p_0_in,p_2_in}),
- .SR(clear),
- .in0(committ),
- .out(bus_clk),
- .s_daddr_o(bus_addr),
- .s_den_o(bus_den),
- .s_do_i(bus_do),
- .s_drdy_i(bus_drdy),
- .s_dwe_o(bus_dwe),
- .s_rst_o(bus_rst),
- .xsdb_wr__0(xsdb_wr__0));
- GND GND
- (.G(\<const0> ));
- scalp_zynqps_vio_0_0_vio_v3_0_19_probe_out_all PROBE_OUT_ALL_INST
- (.\G_PROBE_OUT[0].wr_probe_out_reg[0]_0 (DECODER_INST_n_4),
- .\G_PROBE_OUT[0].wr_probe_out_reg[0]_1 (DECODER_INST_n_5),
- .Probe_out_reg(Probe_out_reg),
- .Q(p_2_in),
- .SR(clear),
- .clk(clk),
- .in0(committ),
- .out(bus_clk),
- .probe_out0(probe_out0),
- .s_daddr_o({bus_addr[16],bus_addr[11:8],bus_addr[3:0]}),
- .xsdb_wr__0(xsdb_wr__0));
- (* C_BUILD_REVISION = "0" *)
- (* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_MAJOR_VER = "2" *)
- (* C_CORE_MINOR_VER = "0" *)
- (* C_CORE_TYPE = "2" *)
- (* C_CSE_DRV_VER = "1" *)
- (* C_MAJOR_VERSION = "2013" *)
- (* C_MINOR_VERSION = "1" *)
- (* C_NEXT_SLAVE = "0" *)
- (* C_PIPE_IFACE = "0" *)
- (* C_USE_TEST_REG = "1" *)
- (* C_XDEVICEFAMILY = "zynq" *)
- (* C_XSDB_SLAVE_TYPE = "33" *)
- (* DONT_TOUCH *)
- scalp_zynqps_vio_0_0_xsdbs_v1_0_2_xsdbs U_XSDB_SLAVE
- (.s_daddr_o(bus_addr),
- .s_dclk_o(bus_clk),
- .s_den_o(bus_den),
- .s_di_o(bus_di),
- .s_do_i(bus_do),
- .s_drdy_i(bus_drdy),
- .s_dwe_o(bus_dwe),
- .s_rst_o(bus_rst),
- .sl_iport_i(sl_iport0),
- .sl_oport_o(sl_oport0));
- FDRE \bus_data_int_reg[0]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[0]),
- .Q(p_2_in),
- .R(1'b0));
- FDRE \bus_data_int_reg[10]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[10]),
- .Q(\bus_data_int_reg_n_0_[10] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[11]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[11]),
- .Q(\bus_data_int_reg_n_0_[11] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[12]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[12]),
- .Q(\bus_data_int_reg_n_0_[12] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[13]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[13]),
- .Q(\bus_data_int_reg_n_0_[13] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[14]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[14]),
- .Q(\bus_data_int_reg_n_0_[14] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[15]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[15]),
- .Q(\bus_data_int_reg_n_0_[15] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[1]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[1]),
- .Q(p_0_in),
- .R(1'b0));
- FDRE \bus_data_int_reg[2]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[2]),
- .Q(\bus_data_int_reg_n_0_[2] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[3]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[3]),
- .Q(\bus_data_int_reg_n_0_[3] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[4]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[4]),
- .Q(\bus_data_int_reg_n_0_[4] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[5]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[5]),
- .Q(\bus_data_int_reg_n_0_[5] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[6]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[6]),
- .Q(\bus_data_int_reg_n_0_[6] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[7]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[7]),
- .Q(\bus_data_int_reg_n_0_[7] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[8]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[8]),
- .Q(\bus_data_int_reg_n_0_[8] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[9]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[9]),
- .Q(\bus_data_int_reg_n_0_[9] ),
- .R(1'b0));
-endmodule
-
-(* C_BUILD_REVISION = "0" *) (* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
-(* C_CORE_MAJOR_VER = "2" *) (* C_CORE_MINOR_VER = "0" *) (* C_CORE_TYPE = "2" *)
-(* C_CSE_DRV_VER = "1" *) (* C_MAJOR_VERSION = "2013" *) (* C_MINOR_VERSION = "1" *)
-(* C_NEXT_SLAVE = "0" *) (* C_PIPE_IFACE = "0" *) (* C_USE_TEST_REG = "1" *)
-(* C_XDEVICEFAMILY = "zynq" *) (* C_XSDB_SLAVE_TYPE = "33" *) (* ORIG_REF_NAME = "xsdbs_v1_0_2_xsdbs" *)
-(* dont_touch = "true" *)
-module scalp_zynqps_vio_0_0_xsdbs_v1_0_2_xsdbs
- (s_rst_o,
- s_dclk_o,
- s_den_o,
- s_dwe_o,
- s_daddr_o,
- s_di_o,
- sl_oport_o,
- s_do_i,
- sl_iport_i,
- s_drdy_i);
- output s_rst_o;
- output s_dclk_o;
- output s_den_o;
- output s_dwe_o;
- output [16:0]s_daddr_o;
- output [15:0]s_di_o;
- output [16:0]sl_oport_o;
- input [15:0]s_do_i;
- input [36:0]sl_iport_i;
- input s_drdy_i;
-
- wire [15:0]reg_do;
- wire \reg_do[0]_i_2_n_0 ;
- wire \reg_do[0]_i_3_n_0 ;
- wire \reg_do[0]_i_4_n_0 ;
- wire \reg_do[10]_i_2_n_0 ;
- wire \reg_do[10]_i_3_n_0 ;
- wire \reg_do[10]_i_4_n_0 ;
- wire \reg_do[10]_i_5_n_0 ;
- wire \reg_do[11]_i_2_n_0 ;
- wire \reg_do[11]_i_3_n_0 ;
- wire \reg_do[12]_i_2_n_0 ;
- wire \reg_do[12]_i_3_n_0 ;
- wire \reg_do[13]_i_2_n_0 ;
- wire \reg_do[13]_i_3_n_0 ;
- wire \reg_do[14]_i_2_n_0 ;
- wire \reg_do[14]_i_3_n_0 ;
- wire \reg_do[15]_i_2_n_0 ;
- wire \reg_do[15]_i_3_n_0 ;
- wire \reg_do[15]_i_4_n_0 ;
- wire \reg_do[15]_i_5_n_0 ;
- wire \reg_do[15]_i_6_n_0 ;
- wire \reg_do[1]_i_2_n_0 ;
- wire \reg_do[1]_i_3_n_0 ;
- wire \reg_do[1]_i_4_n_0 ;
- wire \reg_do[2]_i_2_n_0 ;
- wire \reg_do[2]_i_3_n_0 ;
- wire \reg_do[2]_i_4_n_0 ;
- wire \reg_do[3]_i_2_n_0 ;
- wire \reg_do[3]_i_3_n_0 ;
- wire \reg_do[3]_i_4_n_0 ;
- wire \reg_do[4]_i_2_n_0 ;
- wire \reg_do[4]_i_3_n_0 ;
- wire \reg_do[4]_i_4_n_0 ;
- wire \reg_do[5]_i_2_n_0 ;
- wire \reg_do[5]_i_3_n_0 ;
- wire \reg_do[5]_i_4_n_0 ;
- wire \reg_do[5]_i_5_n_0 ;
- wire \reg_do[6]_i_2_n_0 ;
- wire \reg_do[6]_i_3_n_0 ;
- wire \reg_do[6]_i_4_n_0 ;
- wire \reg_do[7]_i_2_n_0 ;
- wire \reg_do[7]_i_3_n_0 ;
- wire \reg_do[7]_i_4_n_0 ;
- wire \reg_do[8]_i_2_n_0 ;
- wire \reg_do[8]_i_3_n_0 ;
- wire \reg_do[8]_i_4_n_0 ;
- wire \reg_do[9]_i_2_n_0 ;
- wire \reg_do[9]_i_3_n_0 ;
- wire \reg_do[9]_i_4_n_0 ;
- wire \reg_do[9]_i_5_n_0 ;
- wire \reg_do[9]_i_6_n_0 ;
- wire \reg_do_reg_n_0_[0] ;
- wire \reg_do_reg_n_0_[10] ;
- wire \reg_do_reg_n_0_[11] ;
- wire \reg_do_reg_n_0_[12] ;
- wire \reg_do_reg_n_0_[13] ;
- wire \reg_do_reg_n_0_[14] ;
- wire \reg_do_reg_n_0_[15] ;
- wire \reg_do_reg_n_0_[1] ;
- wire \reg_do_reg_n_0_[2] ;
- wire \reg_do_reg_n_0_[3] ;
- wire \reg_do_reg_n_0_[4] ;
- wire \reg_do_reg_n_0_[5] ;
- wire \reg_do_reg_n_0_[6] ;
- wire \reg_do_reg_n_0_[7] ;
- wire \reg_do_reg_n_0_[8] ;
- wire \reg_do_reg_n_0_[9] ;
- wire reg_drdy;
- wire reg_drdy_i_1_n_0;
- wire [15:0]reg_test;
- wire reg_test0;
- wire s_den_o;
- wire s_den_o_INST_0_i_1_n_0;
- wire [15:0]s_do_i;
- wire s_drdy_i;
- wire [36:0]sl_iport_i;
- wire [16:0]sl_oport_o;
- (* DONT_TOUCH *) (* UUID = "1" *) wire [127:0]uuid_stamp;
-
- assign s_daddr_o[16:0] = sl_iport_i[20:4];
- assign s_dclk_o = sl_iport_i[1];
- assign s_di_o[15:0] = sl_iport_i[36:21];
- assign s_dwe_o = sl_iport_i[3];
- assign s_rst_o = sl_iport_i[0];
- LUT6 #(
- .INIT(64'hAAAAAAAA0020AAAA))
- \reg_do[0]_i_1
- (.I0(\reg_do[0]_i_2_n_0 ),
- .I1(\reg_do[9]_i_3_n_0 ),
- .I2(reg_test[0]),
- .I3(sl_iport_i[4]),
- .I4(sl_iport_i[5]),
- .I5(\reg_do[9]_i_2_n_0 ),
- .O(reg_do[0]));
- LUT6 #(
- .INIT(64'hABABABAAAAAAABAA))
- \reg_do[0]_i_2
- (.I0(\reg_do[5]_i_3_n_0 ),
- .I1(sl_iport_i[8]),
- .I2(sl_iport_i[7]),
- .I3(\reg_do[0]_i_3_n_0 ),
- .I4(sl_iport_i[6]),
- .I5(\reg_do[0]_i_4_n_0 ),
- .O(\reg_do[0]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[0]_i_3
- (.I0(uuid_stamp[48]),
- .I1(uuid_stamp[32]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[16]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[0]),
- .O(\reg_do[0]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[0]_i_4
- (.I0(uuid_stamp[112]),
- .I1(uuid_stamp[96]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[80]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[64]),
- .O(\reg_do[0]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF2808))
- \reg_do[10]_i_1
- (.I0(\reg_do[10]_i_2_n_0 ),
- .I1(sl_iport_i[4]),
- .I2(sl_iport_i[5]),
- .I3(reg_test[10]),
- .I4(\reg_do[10]_i_3_n_0 ),
- .O(reg_do[10]));
- LUT6 #(
- .INIT(64'h0800000000000000))
- \reg_do[10]_i_2
- (.I0(sl_iport_i[6]),
- .I1(sl_iport_i[9]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(sl_iport_i[11]),
- .I5(sl_iport_i[10]),
- .O(\reg_do[10]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[10]_i_3
- (.I0(\reg_do[10]_i_4_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[10]_i_5_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[10]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[10]_i_4
- (.I0(uuid_stamp[122]),
- .I1(uuid_stamp[106]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[90]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[74]),
- .O(\reg_do[10]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[10]_i_5
- (.I0(uuid_stamp[58]),
- .I1(uuid_stamp[42]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[26]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[10]),
- .O(\reg_do[10]_i_5_n_0 ));
- LUT6 #(
- .INIT(64'h4540FFFF45404540))
- \reg_do[11]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[11]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[11]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[11]),
- .O(reg_do[11]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[11]_i_2
- (.I0(uuid_stamp[59]),
- .I1(uuid_stamp[43]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[27]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[11]),
- .O(\reg_do[11]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[11]_i_3
- (.I0(uuid_stamp[123]),
- .I1(uuid_stamp[107]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[91]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[75]),
- .O(\reg_do[11]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h5404FFFF54045404))
- \reg_do[12]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[12]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[12]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[12]),
- .O(reg_do[12]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[12]_i_2
- (.I0(uuid_stamp[124]),
- .I1(uuid_stamp[108]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[92]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[76]),
- .O(\reg_do[12]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[12]_i_3
- (.I0(uuid_stamp[60]),
- .I1(uuid_stamp[44]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[28]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[12]),
- .O(\reg_do[12]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h4540FFFF45404540))
- \reg_do[13]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[13]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[13]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[13]),
- .O(reg_do[13]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[13]_i_2
- (.I0(uuid_stamp[61]),
- .I1(uuid_stamp[45]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[29]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[13]),
- .O(\reg_do[13]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[13]_i_3
- (.I0(uuid_stamp[125]),
- .I1(uuid_stamp[109]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[93]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[77]),
- .O(\reg_do[13]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h4540FFFF45404540))
- \reg_do[14]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[14]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[14]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[14]),
- .O(reg_do[14]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[14]_i_2
- (.I0(uuid_stamp[62]),
- .I1(uuid_stamp[46]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[30]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[14]),
- .O(\reg_do[14]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[14]_i_3
- (.I0(uuid_stamp[126]),
- .I1(uuid_stamp[110]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[94]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[78]),
- .O(\reg_do[14]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h0B01FFFF0B010B01))
- \reg_do[15]_i_1
- (.I0(\reg_do[15]_i_2_n_0 ),
- .I1(\reg_do[15]_i_3_n_0 ),
- .I2(\reg_do[15]_i_4_n_0 ),
- .I3(\reg_do[15]_i_5_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[15]),
- .O(reg_do[15]));
- (* SOFT_HLUTNM = "soft_lutpair9" *)
- LUT3 #(
- .INIT(8'h45))
- \reg_do[15]_i_2
- (.I0(sl_iport_i[8]),
- .I1(sl_iport_i[7]),
- .I2(sl_iport_i[6]),
- .O(\reg_do[15]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'h505F3030505F3F3F))
- \reg_do[15]_i_3
- (.I0(uuid_stamp[127]),
- .I1(uuid_stamp[111]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[95]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[79]),
- .O(\reg_do[15]_i_3_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair0" *)
- LUT5 #(
- .INIT(32'hFFFFFFFE))
- \reg_do[15]_i_4
- (.I0(sl_iport_i[7]),
- .I1(sl_iport_i[8]),
- .I2(sl_iport_i[9]),
- .I3(sl_iport_i[11]),
- .I4(sl_iport_i[10]),
- .O(\reg_do[15]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[15]_i_5
- (.I0(uuid_stamp[63]),
- .I1(uuid_stamp[47]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[31]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[15]),
- .O(\reg_do[15]_i_5_n_0 ));
- LUT6 #(
- .INIT(64'hFFFFFFD0FFFFFFFF))
- \reg_do[15]_i_6
- (.I0(sl_iport_i[6]),
- .I1(sl_iport_i[7]),
- .I2(sl_iport_i[8]),
- .I3(\reg_do[9]_i_2_n_0 ),
- .I4(sl_iport_i[4]),
- .I5(sl_iport_i[5]),
- .O(\reg_do[15]_i_6_n_0 ));
- LUT6 #(
- .INIT(64'hAAAAAAAAAAAAFEAA))
- \reg_do[1]_i_1
- (.I0(\reg_do[1]_i_2_n_0 ),
- .I1(reg_test[1]),
- .I2(\reg_do[9]_i_3_n_0 ),
- .I3(sl_iport_i[5]),
- .I4(sl_iport_i[4]),
- .I5(\reg_do[9]_i_2_n_0 ),
- .O(reg_do[1]));
- LUT6 #(
- .INIT(64'h00000000FFAE00A2))
- \reg_do[1]_i_2
- (.I0(\reg_do[1]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[1]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[1]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[1]_i_3
- (.I0(uuid_stamp[49]),
- .I1(uuid_stamp[33]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[17]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[1]),
- .O(\reg_do[1]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[1]_i_4
- (.I0(uuid_stamp[113]),
- .I1(uuid_stamp[97]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[81]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[65]),
- .O(\reg_do[1]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[2]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[2]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[2]_i_2_n_0 ),
- .O(reg_do[2]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[2]_i_2
- (.I0(\reg_do[2]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[2]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[2]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[2]_i_3
- (.I0(uuid_stamp[114]),
- .I1(uuid_stamp[98]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[82]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[66]),
- .O(\reg_do[2]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[2]_i_4
- (.I0(uuid_stamp[50]),
- .I1(uuid_stamp[34]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[18]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[2]),
- .O(\reg_do[2]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[3]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[3]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[3]_i_2_n_0 ),
- .O(reg_do[3]));
- LUT6 #(
- .INIT(64'h000000003333AA3A))
- \reg_do[3]_i_2
- (.I0(\reg_do[3]_i_3_n_0 ),
- .I1(\reg_do[3]_i_4_n_0 ),
- .I2(sl_iport_i[6]),
- .I3(sl_iport_i[7]),
- .I4(sl_iport_i[8]),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[3]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[3]_i_3
- (.I0(uuid_stamp[51]),
- .I1(uuid_stamp[35]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[19]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[3]),
- .O(\reg_do[3]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h05F5030305F5F3F3))
- \reg_do[3]_i_4
- (.I0(uuid_stamp[83]),
- .I1(uuid_stamp[67]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[115]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[99]),
- .O(\reg_do[3]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[4]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[4]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[4]_i_2_n_0 ),
- .O(reg_do[4]));
- LUT6 #(
- .INIT(64'h00000000FFAE00A2))
- \reg_do[4]_i_2
- (.I0(\reg_do[4]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[4]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[4]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[4]_i_3
- (.I0(uuid_stamp[52]),
- .I1(uuid_stamp[36]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[20]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[4]),
- .O(\reg_do[4]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[4]_i_4
- (.I0(uuid_stamp[116]),
- .I1(uuid_stamp[100]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[84]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[68]),
- .O(\reg_do[4]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'h888888888A88A8A8))
- \reg_do[5]_i_1
- (.I0(\reg_do[5]_i_2_n_0 ),
- .I1(\reg_do[9]_i_2_n_0 ),
- .I2(\reg_do[9]_i_3_n_0 ),
- .I3(reg_test[5]),
- .I4(sl_iport_i[5]),
- .I5(sl_iport_i[4]),
- .O(reg_do[5]));
- LUT6 #(
- .INIT(64'hABABABAAAAAAABAA))
- \reg_do[5]_i_2
- (.I0(\reg_do[5]_i_3_n_0 ),
- .I1(sl_iport_i[8]),
- .I2(sl_iport_i[7]),
- .I3(\reg_do[5]_i_4_n_0 ),
- .I4(sl_iport_i[6]),
- .I5(\reg_do[5]_i_5_n_0 ),
- .O(\reg_do[5]_i_2_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \reg_do[5]_i_3
- (.I0(sl_iport_i[10]),
- .I1(sl_iport_i[11]),
- .I2(sl_iport_i[9]),
- .I3(sl_iport_i[8]),
- .O(\reg_do[5]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[5]_i_4
- (.I0(uuid_stamp[53]),
- .I1(uuid_stamp[37]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[21]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[5]),
- .O(\reg_do[5]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[5]_i_5
- (.I0(uuid_stamp[117]),
- .I1(uuid_stamp[101]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[85]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[69]),
- .O(\reg_do[5]_i_5_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[6]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[6]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[6]_i_2_n_0 ),
- .O(reg_do[6]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[6]_i_2
- (.I0(\reg_do[6]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[6]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[6]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[6]_i_3
- (.I0(uuid_stamp[118]),
- .I1(uuid_stamp[102]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[86]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[70]),
- .O(\reg_do[6]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[6]_i_4
- (.I0(uuid_stamp[54]),
- .I1(uuid_stamp[38]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[22]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[6]),
- .O(\reg_do[6]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[7]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[7]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[7]_i_2_n_0 ),
- .O(reg_do[7]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[7]_i_2
- (.I0(\reg_do[7]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[7]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[7]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[7]_i_3
- (.I0(uuid_stamp[119]),
- .I1(uuid_stamp[103]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[87]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[71]),
- .O(\reg_do[7]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[7]_i_4
- (.I0(uuid_stamp[55]),
- .I1(uuid_stamp[39]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[23]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[7]),
- .O(\reg_do[7]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF7500))
- \reg_do[8]_i_1
- (.I0(sl_iport_i[5]),
- .I1(sl_iport_i[4]),
- .I2(reg_test[8]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[8]_i_2_n_0 ),
- .O(reg_do[8]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[8]_i_2
- (.I0(\reg_do[8]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[8]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[8]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[8]_i_3
- (.I0(uuid_stamp[120]),
- .I1(uuid_stamp[104]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[88]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[72]),
- .O(\reg_do[8]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[8]_i_4
- (.I0(uuid_stamp[56]),
- .I1(uuid_stamp[40]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[24]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[8]),
- .O(\reg_do[8]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hFFFFFFFF40144010))
- \reg_do[9]_i_1
- (.I0(\reg_do[9]_i_2_n_0 ),
- .I1(sl_iport_i[5]),
- .I2(sl_iport_i[4]),
- .I3(\reg_do[9]_i_3_n_0 ),
- .I4(reg_test[9]),
- .I5(\reg_do[9]_i_4_n_0 ),
- .O(reg_do[9]));
- (* SOFT_HLUTNM = "soft_lutpair0" *)
- LUT5 #(
- .INIT(32'hFF7FFFFF))
- \reg_do[9]_i_2
- (.I0(sl_iport_i[10]),
- .I1(sl_iport_i[11]),
- .I2(sl_iport_i[8]),
- .I3(sl_iport_i[7]),
- .I4(sl_iport_i[9]),
- .O(\reg_do[9]_i_2_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair9" *)
- LUT3 #(
- .INIT(8'h8A))
- \reg_do[9]_i_3
- (.I0(sl_iport_i[8]),
- .I1(sl_iport_i[7]),
- .I2(sl_iport_i[6]),
- .O(\reg_do[9]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[9]_i_4
- (.I0(\reg_do[9]_i_5_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[9]_i_6_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[9]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[9]_i_5
- (.I0(uuid_stamp[121]),
- .I1(uuid_stamp[105]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[89]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[73]),
- .O(\reg_do[9]_i_5_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[9]_i_6
- (.I0(uuid_stamp[57]),
- .I1(uuid_stamp[41]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[25]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[9]),
- .O(\reg_do[9]_i_6_n_0 ));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[0]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[0]),
- .Q(\reg_do_reg_n_0_[0] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[10]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[10]),
- .Q(\reg_do_reg_n_0_[10] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[11]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[11]),
- .Q(\reg_do_reg_n_0_[11] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[12]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[12]),
- .Q(\reg_do_reg_n_0_[12] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[13]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[13]),
- .Q(\reg_do_reg_n_0_[13] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[14]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[14]),
- .Q(\reg_do_reg_n_0_[14] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[15]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[15]),
- .Q(\reg_do_reg_n_0_[15] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[1]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[1]),
- .Q(\reg_do_reg_n_0_[1] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[2]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[2]),
- .Q(\reg_do_reg_n_0_[2] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[3]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[3]),
- .Q(\reg_do_reg_n_0_[3] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[4]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[4]),
- .Q(\reg_do_reg_n_0_[4] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[5]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[5]),
- .Q(\reg_do_reg_n_0_[5] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[6]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[6]),
- .Q(\reg_do_reg_n_0_[6] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[7]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[7]),
- .Q(\reg_do_reg_n_0_[7] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[8]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[8]),
- .Q(\reg_do_reg_n_0_[8] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[9]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[9]),
- .Q(\reg_do_reg_n_0_[9] ),
- .R(1'b0));
- LUT6 #(
- .INIT(64'h0000800000000000))
- reg_drdy_i_1
- (.I0(s_den_o_INST_0_i_1_n_0),
- .I1(sl_iport_i[12]),
- .I2(sl_iport_i[13]),
- .I3(sl_iport_i[14]),
- .I4(sl_iport_i[0]),
- .I5(sl_iport_i[2]),
- .O(reg_drdy_i_1_n_0));
- FDRE #(
- .INIT(1'b0))
- reg_drdy_reg
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_drdy_i_1_n_0),
- .Q(reg_drdy),
- .R(1'b0));
- LUT6 #(
- .INIT(64'h8000000000000000))
- \reg_test[15]_i_1
- (.I0(s_den_o_INST_0_i_1_n_0),
- .I1(sl_iport_i[12]),
- .I2(sl_iport_i[13]),
- .I3(sl_iport_i[14]),
- .I4(sl_iport_i[3]),
- .I5(sl_iport_i[2]),
- .O(reg_test0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[0]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[21]),
- .Q(reg_test[0]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[10]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[31]),
- .Q(reg_test[10]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[11]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[32]),
- .Q(reg_test[11]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[12]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[33]),
- .Q(reg_test[12]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[13]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[34]),
- .Q(reg_test[13]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[14]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[35]),
- .Q(reg_test[14]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[15]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[36]),
- .Q(reg_test[15]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[1]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[22]),
- .Q(reg_test[1]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[2]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[23]),
- .Q(reg_test[2]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[3]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[24]),
- .Q(reg_test[3]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[4]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[25]),
- .Q(reg_test[4]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[5]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[26]),
- .Q(reg_test[5]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[6]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[27]),
- .Q(reg_test[6]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[7]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[28]),
- .Q(reg_test[7]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[8]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[29]),
- .Q(reg_test[8]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[9]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[30]),
- .Q(reg_test[9]),
- .R(1'b0));
- LUT5 #(
- .INIT(32'h7FFF0000))
- s_den_o_INST_0
- (.I0(s_den_o_INST_0_i_1_n_0),
- .I1(sl_iport_i[12]),
- .I2(sl_iport_i[13]),
- .I3(sl_iport_i[14]),
- .I4(sl_iport_i[2]),
- .O(s_den_o));
- LUT6 #(
- .INIT(64'h8000000000000000))
- s_den_o_INST_0_i_1
- (.I0(sl_iport_i[15]),
- .I1(sl_iport_i[16]),
- .I2(sl_iport_i[17]),
- .I3(sl_iport_i[18]),
- .I4(sl_iport_i[20]),
- .I5(sl_iport_i[19]),
- .O(s_den_o_INST_0_i_1_n_0));
- (* SOFT_HLUTNM = "soft_lutpair1" *)
- LUT2 #(
- .INIT(4'hE))
- \sl_oport_o[0]_INST_0
- (.I0(reg_drdy),
- .I1(s_drdy_i),
- .O(sl_oport_o[0]));
- (* SOFT_HLUTNM = "soft_lutpair6" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[10]_INST_0
- (.I0(\reg_do_reg_n_0_[9] ),
- .I1(reg_drdy),
- .I2(s_do_i[9]),
- .O(sl_oport_o[10]));
- (* SOFT_HLUTNM = "soft_lutpair6" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[11]_INST_0
- (.I0(\reg_do_reg_n_0_[10] ),
- .I1(reg_drdy),
- .I2(s_do_i[10]),
- .O(sl_oport_o[11]));
- (* SOFT_HLUTNM = "soft_lutpair7" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[12]_INST_0
- (.I0(\reg_do_reg_n_0_[11] ),
- .I1(reg_drdy),
- .I2(s_do_i[11]),
- .O(sl_oport_o[12]));
- (* SOFT_HLUTNM = "soft_lutpair7" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[13]_INST_0
- (.I0(\reg_do_reg_n_0_[12] ),
- .I1(reg_drdy),
- .I2(s_do_i[12]),
- .O(sl_oport_o[13]));
- (* SOFT_HLUTNM = "soft_lutpair8" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[14]_INST_0
- (.I0(\reg_do_reg_n_0_[13] ),
- .I1(reg_drdy),
- .I2(s_do_i[13]),
- .O(sl_oport_o[14]));
- (* SOFT_HLUTNM = "soft_lutpair8" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[15]_INST_0
- (.I0(\reg_do_reg_n_0_[14] ),
- .I1(reg_drdy),
- .I2(s_do_i[14]),
- .O(sl_oport_o[15]));
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[16]_INST_0
- (.I0(\reg_do_reg_n_0_[15] ),
- .I1(reg_drdy),
- .I2(s_do_i[15]),
- .O(sl_oport_o[16]));
- (* SOFT_HLUTNM = "soft_lutpair2" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[1]_INST_0
- (.I0(\reg_do_reg_n_0_[0] ),
- .I1(reg_drdy),
- .I2(s_do_i[0]),
- .O(sl_oport_o[1]));
- (* SOFT_HLUTNM = "soft_lutpair1" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[2]_INST_0
- (.I0(\reg_do_reg_n_0_[1] ),
- .I1(reg_drdy),
- .I2(s_do_i[1]),
- .O(sl_oport_o[2]));
- (* SOFT_HLUTNM = "soft_lutpair3" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[3]_INST_0
- (.I0(\reg_do_reg_n_0_[2] ),
- .I1(reg_drdy),
- .I2(s_do_i[2]),
- .O(sl_oport_o[3]));
- (* SOFT_HLUTNM = "soft_lutpair2" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[4]_INST_0
- (.I0(\reg_do_reg_n_0_[3] ),
- .I1(reg_drdy),
- .I2(s_do_i[3]),
- .O(sl_oport_o[4]));
- (* SOFT_HLUTNM = "soft_lutpair3" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[5]_INST_0
- (.I0(\reg_do_reg_n_0_[4] ),
- .I1(reg_drdy),
- .I2(s_do_i[4]),
- .O(sl_oport_o[5]));
- (* SOFT_HLUTNM = "soft_lutpair4" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[6]_INST_0
- (.I0(\reg_do_reg_n_0_[5] ),
- .I1(reg_drdy),
- .I2(s_do_i[5]),
- .O(sl_oport_o[6]));
- (* SOFT_HLUTNM = "soft_lutpair4" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[7]_INST_0
- (.I0(\reg_do_reg_n_0_[6] ),
- .I1(reg_drdy),
- .I2(s_do_i[6]),
- .O(sl_oport_o[7]));
- (* SOFT_HLUTNM = "soft_lutpair5" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[8]_INST_0
- (.I0(\reg_do_reg_n_0_[7] ),
- .I1(reg_drdy),
- .I2(s_do_i[7]),
- .O(sl_oport_o[8]));
- (* SOFT_HLUTNM = "soft_lutpair5" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[9]_INST_0
- (.I0(\reg_do_reg_n_0_[8] ),
- .I1(reg_drdy),
- .I2(s_do_i[8]),
- .O(sl_oport_o[9]));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[0]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[0]),
- .Q(uuid_stamp[0]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[100]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[100]),
- .Q(uuid_stamp[100]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[101]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[101]),
- .Q(uuid_stamp[101]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[102]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[102]),
- .Q(uuid_stamp[102]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[103]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[103]),
- .Q(uuid_stamp[103]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[104]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[104]),
- .Q(uuid_stamp[104]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[105]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[105]),
- .Q(uuid_stamp[105]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[106]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[106]),
- .Q(uuid_stamp[106]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[107]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[107]),
- .Q(uuid_stamp[107]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[108]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[108]),
- .Q(uuid_stamp[108]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[109]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[109]),
- .Q(uuid_stamp[109]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[10]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[10]),
- .Q(uuid_stamp[10]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[110]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[110]),
- .Q(uuid_stamp[110]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[111]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[111]),
- .Q(uuid_stamp[111]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[112]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[112]),
- .Q(uuid_stamp[112]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[113]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[113]),
- .Q(uuid_stamp[113]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[114]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[114]),
- .Q(uuid_stamp[114]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[115]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[115]),
- .Q(uuid_stamp[115]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[116]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[116]),
- .Q(uuid_stamp[116]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[117]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[117]),
- .Q(uuid_stamp[117]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[118]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[118]),
- .Q(uuid_stamp[118]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[119]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[119]),
- .Q(uuid_stamp[119]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[11]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[11]),
- .Q(uuid_stamp[11]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[120]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[120]),
- .Q(uuid_stamp[120]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[121]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[121]),
- .Q(uuid_stamp[121]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[122]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[122]),
- .Q(uuid_stamp[122]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[123]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[123]),
- .Q(uuid_stamp[123]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[124]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[124]),
- .Q(uuid_stamp[124]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[125]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[125]),
- .Q(uuid_stamp[125]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[126]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[126]),
- .Q(uuid_stamp[126]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[127]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[127]),
- .Q(uuid_stamp[127]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[12]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[12]),
- .Q(uuid_stamp[12]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[13]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[13]),
- .Q(uuid_stamp[13]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[14]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[14]),
- .Q(uuid_stamp[14]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[15]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[15]),
- .Q(uuid_stamp[15]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[16]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[16]),
- .Q(uuid_stamp[16]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[17]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[17]),
- .Q(uuid_stamp[17]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[18]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[18]),
- .Q(uuid_stamp[18]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[19]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[19]),
- .Q(uuid_stamp[19]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[1]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[1]),
- .Q(uuid_stamp[1]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[20]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[20]),
- .Q(uuid_stamp[20]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[21]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[21]),
- .Q(uuid_stamp[21]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[22]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[22]),
- .Q(uuid_stamp[22]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[23]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[23]),
- .Q(uuid_stamp[23]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[24]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[24]),
- .Q(uuid_stamp[24]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[25]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[25]),
- .Q(uuid_stamp[25]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[26]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[26]),
- .Q(uuid_stamp[26]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[27]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[27]),
- .Q(uuid_stamp[27]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[28]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[28]),
- .Q(uuid_stamp[28]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[29]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[29]),
- .Q(uuid_stamp[29]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[2]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[2]),
- .Q(uuid_stamp[2]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[30]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[30]),
- .Q(uuid_stamp[30]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[31]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[31]),
- .Q(uuid_stamp[31]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[32]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[32]),
- .Q(uuid_stamp[32]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[33]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[33]),
- .Q(uuid_stamp[33]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[34]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[34]),
- .Q(uuid_stamp[34]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[35]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[35]),
- .Q(uuid_stamp[35]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[36]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[36]),
- .Q(uuid_stamp[36]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[37]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[37]),
- .Q(uuid_stamp[37]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[38]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[38]),
- .Q(uuid_stamp[38]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[39]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[39]),
- .Q(uuid_stamp[39]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[3]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[3]),
- .Q(uuid_stamp[3]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[40]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[40]),
- .Q(uuid_stamp[40]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[41]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[41]),
- .Q(uuid_stamp[41]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[42]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[42]),
- .Q(uuid_stamp[42]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[43]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[43]),
- .Q(uuid_stamp[43]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[44]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[44]),
- .Q(uuid_stamp[44]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[45]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[45]),
- .Q(uuid_stamp[45]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[46]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[46]),
- .Q(uuid_stamp[46]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[47]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[47]),
- .Q(uuid_stamp[47]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[48]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[48]),
- .Q(uuid_stamp[48]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[49]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[49]),
- .Q(uuid_stamp[49]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[4]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[4]),
- .Q(uuid_stamp[4]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[50]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[50]),
- .Q(uuid_stamp[50]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[51]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[51]),
- .Q(uuid_stamp[51]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[52]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[52]),
- .Q(uuid_stamp[52]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[53]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[53]),
- .Q(uuid_stamp[53]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[54]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[54]),
- .Q(uuid_stamp[54]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[55]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[55]),
- .Q(uuid_stamp[55]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[56]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[56]),
- .Q(uuid_stamp[56]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[57]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[57]),
- .Q(uuid_stamp[57]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[58]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[58]),
- .Q(uuid_stamp[58]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[59]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[59]),
- .Q(uuid_stamp[59]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[5]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[5]),
- .Q(uuid_stamp[5]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[60]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[60]),
- .Q(uuid_stamp[60]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[61]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[61]),
- .Q(uuid_stamp[61]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[62]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[62]),
- .Q(uuid_stamp[62]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[63]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[63]),
- .Q(uuid_stamp[63]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[64]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[64]),
- .Q(uuid_stamp[64]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[65]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[65]),
- .Q(uuid_stamp[65]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[66]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[66]),
- .Q(uuid_stamp[66]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[67]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[67]),
- .Q(uuid_stamp[67]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[68]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[68]),
- .Q(uuid_stamp[68]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[69]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[69]),
- .Q(uuid_stamp[69]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[6]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[6]),
- .Q(uuid_stamp[6]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[70]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[70]),
- .Q(uuid_stamp[70]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[71]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[71]),
- .Q(uuid_stamp[71]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[72]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[72]),
- .Q(uuid_stamp[72]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[73]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[73]),
- .Q(uuid_stamp[73]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[74]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[74]),
- .Q(uuid_stamp[74]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[75]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[75]),
- .Q(uuid_stamp[75]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[76]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[76]),
- .Q(uuid_stamp[76]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[77]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[77]),
- .Q(uuid_stamp[77]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[78]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[78]),
- .Q(uuid_stamp[78]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[79]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[79]),
- .Q(uuid_stamp[79]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[7]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[7]),
- .Q(uuid_stamp[7]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[80]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[80]),
- .Q(uuid_stamp[80]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[81]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[81]),
- .Q(uuid_stamp[81]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[82]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[82]),
- .Q(uuid_stamp[82]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[83]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[83]),
- .Q(uuid_stamp[83]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[84]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[84]),
- .Q(uuid_stamp[84]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[85]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[85]),
- .Q(uuid_stamp[85]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[86]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[86]),
- .Q(uuid_stamp[86]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[87]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[87]),
- .Q(uuid_stamp[87]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[88]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[88]),
- .Q(uuid_stamp[88]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[89]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[89]),
- .Q(uuid_stamp[89]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[8]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[8]),
- .Q(uuid_stamp[8]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[90]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[90]),
- .Q(uuid_stamp[90]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[91]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[91]),
- .Q(uuid_stamp[91]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[92]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[92]),
- .Q(uuid_stamp[92]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[93]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[93]),
- .Q(uuid_stamp[93]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[94]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[94]),
- .Q(uuid_stamp[94]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[95]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[95]),
- .Q(uuid_stamp[95]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[96]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[96]),
- .Q(uuid_stamp[96]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[97]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[97]),
- .Q(uuid_stamp[97]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[98]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[98]),
- .Q(uuid_stamp[98]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[99]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[99]),
- .Q(uuid_stamp[99]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[9]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[9]),
- .Q(uuid_stamp[9]),
- .R(1'b0));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_stub.v
deleted file mode 100644
index 9380081..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_stub.v
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:36 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub
-// /home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0_stub.v
-// Design : scalp_zynqps_vio_0_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "vio,Vivado 2019.2" *)
-module scalp_zynqps_vio_0_0(clk, probe_out0)
-/* synthesis syn_black_box black_box_pad_pin="clk,probe_out0[0:0]" */;
- input clk;
- output [0:0]probe_out0;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd
deleted file mode 100644
index e32bf26..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd
+++ /dev/null
@@ -1,62 +0,0 @@
--- (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
---
--- This file contains confidential and proprietary information
--- of Xilinx, Inc. and is protected under U.S. and
--- international copyright and other intellectual property
--- laws.
---
--- DISCLAIMER
--- This disclaimer is not a license and does not grant any
--- rights to the materials distributed herewith. Except as
--- otherwise provided in a valid license issued to you by
--- Xilinx, and to the maximum extent permitted by applicable
--- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
--- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
--- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
--- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
--- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
--- (2) Xilinx shall not be liable (whether in contract or tort,
--- including negligence, or under any other theory of
--- liability) for any loss or damage of any kind or nature
--- related to, arising under or in connection with these
--- materials, including for any direct, or any indirect,
--- special, incidental, or consequential loss or damage
--- (including loss of data, profits, goodwill, or any type of
--- loss or damage suffered as a result of any action brought
--- by a third party) even if such damage or loss was
--- reasonably foreseeable or Xilinx had been advised of the
--- possibility of the same.
---
--- CRITICAL APPLICATIONS
--- Xilinx products are not designed or intended to be fail-
--- safe, or for use in any application requiring fail-safe
--- performance, such as life-support or safety devices or
--- systems, Class III medical devices, nuclear facilities,
--- applications related to the deployment of airbags, or any
--- other applications that could lead to death, personal
--- injury, or severe property or environmental damage
--- (individually and collectively, "Critical
--- Applications"). Customer assumes the sole risk and
--- liability of any use of Xilinx products in Critical
--- Applications, subject only to applicable laws and
--- regulations governing limitations on product liability.
---
--- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
--- PART OF THIS FILE AT ALL TIMES.
---
--- DO NOT MODIFY THIS FILE.
-
-LIBRARY ieee;
-USE ieee.std_logic_1164.ALL;
-USE ieee.numeric_std.ALL;
-
-ENTITY scalp_zynqps_vio_0_0 IS
-PORT (
-CLK : IN STD_LOGIC;
-
-probe_out0 : OUT STD_LOGIC_VECTOR(0 DOWNTO 0) := "0"
-);
-END scalp_zynqps_vio_0_0;
-ARCHITECTURE scalp_zynqps_vio_0_0_arch OF scalp_zynqps_vio_0_0 IS
-BEGIN
-END scalp_zynqps_vio_0_0_arch;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/synth/scalp_zynqps_vio_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/synth/scalp_zynqps_vio_0_0.v
deleted file mode 100644
index 494512c..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/synth/scalp_zynqps_vio_0_0.v
+++ /dev/null
@@ -1,1378 +0,0 @@
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-(* X_CORE_INFO = "vio,Vivado 2019.2" *)
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_vio_0_0,vio,{}" *)
-(* CORE_GENERATION_INFO = "scalp_zynqps_vio_0_0,vio,{x_ipProduct=Vivado 2019.2,x_ipVendor=xilinx.com,x_ipLibrary=ip,x_ipName=vio,x_ipVersion=3.0,x_ipLanguage=VHDL,C_XLNX_HW_PROBE_INFO=DEFAULT,C_XDEVICEFAMILY=zynq,C_CORE_TYPE=2,C_CORE_INFO1=0,C_CORE_INFO2=0,C_NUM_PROBE_IN=0,C_NUM_PROBE_OUT=1,C_EN_PROBE_IN_ACTIVITY=0,C_MAJOR_VERSION=2013,C_MINOR_VERSION=1,C_BUILD_REVISION=0,C_CORE_MAJOR_VER=2,C_CORE_MINOR_VER=0,C_CORE_MINOR_ALPHA_VER=97,C_XSDB_SLAVE_TYPE=33,C_NEXT_SLAVE=0,C_CSE_DRV_VER=1,C_USE_TEST_REG=1,C_PIPE_IFACE=0,C_PROBE_IN0_WIDTH=1,C_PROBE_IN1_WIDTH=1,C_PROBE_IN2_WIDTH=1,C_PROBE_IN3_WIDTH=1,C_PROBE_IN4_WIDTH=1,C_PROBE_IN5_WIDTH=1,C_PROBE_IN6_WIDTH=1,C_PROBE_IN7_WIDTH=1,C_PROBE_IN8_WIDTH=1,C_PROBE_IN9_WIDTH=1,C_PROBE_IN10_WIDTH=1,C_PROBE_IN11_WIDTH=1,C_PROBE_IN12_WIDTH=1,C_PROBE_IN13_WIDTH=1,C_PROBE_IN14_WIDTH=1,C_PROBE_IN15_WIDTH=1,C_PROBE_IN16_WIDTH=1,C_PROBE_IN17_WIDTH=1,C_PROBE_IN18_WIDTH=1,C_PROBE_IN19_WIDTH=1,C_PROBE_IN20_WIDTH=1,C_PROBE_IN21_WIDTH=1,C_PROBE_IN22_WIDTH=1,C_PROBE_IN23_WIDTH=1,C_PROBE_IN24_WIDTH=1,C_PROBE_IN25_WIDTH=1,C_PROBE_IN26_WIDTH=1,C_PROBE_IN27_WIDTH=1,C_PROBE_IN28_WIDTH=1,C_PROBE_IN29_WIDTH=1,C_PROBE_IN30_WIDTH=1,C_PROBE_IN31_WIDTH=1,C_PROBE_IN32_WIDTH=1,C_PROBE_IN33_WIDTH=1,C_PROBE_IN34_WIDTH=1,C_PROBE_IN35_WIDTH=1,C_PROBE_IN36_WIDTH=1,C_PROBE_IN37_WIDTH=1,C_PROBE_IN38_WIDTH=1,C_PROBE_IN39_WIDTH=1,C_PROBE_IN40_WIDTH=1,C_PROBE_IN41_WIDTH=1,C_PROBE_IN42_WIDTH=1,C_PROBE_IN43_WIDTH=1,C_PROBE_IN44_WIDTH=1,C_PROBE_IN45_WIDTH=1,C_PROBE_IN46_WIDTH=1,C_PROBE_IN47_WIDTH=1,C_PROBE_IN48_WIDTH=1,C_PROBE_IN49_WIDTH=1,C_PROBE_IN50_WIDTH=1,C_PROBE_IN51_WIDTH=1,C_PROBE_IN52_WIDTH=1,C_PROBE_IN53_WIDTH=1,C_PROBE_IN54_WIDTH=1,C_PROBE_IN55_WIDTH=1,C_PROBE_IN56_WIDTH=1,C_PROBE_IN57_WIDTH=1,C_PROBE_IN58_WIDTH=1,C_PROBE_IN59_WIDTH=1,C_PROBE_IN60_WIDTH=1,C_PROBE_IN61_WIDTH=1,C_PROBE_IN62_WIDTH=1,C_PROBE_IN63_WIDTH=1,C_PROBE_IN64_WIDTH=1,C_PROBE_IN65_WIDTH=1,C_PROBE_IN66_WIDTH=1,C_PROBE_IN67_WIDTH=1,C_PROBE_IN68_WIDTH=1,C_PROBE_IN69_WIDTH=1,C_PROBE_IN70_WIDTH=1,C_PROBE_IN71_WIDTH=1,C_PROBE_IN72_WIDTH=1,\
-C_PROBE_IN73_WIDTH=1,C_PROBE_IN74_WIDTH=1,C_PROBE_IN75_WIDTH=1,C_PROBE_IN76_WIDTH=1,C_PROBE_IN77_WIDTH=1,C_PROBE_IN78_WIDTH=1,C_PROBE_IN79_WIDTH=1,C_PROBE_IN80_WIDTH=1,C_PROBE_IN81_WIDTH=1,C_PROBE_IN82_WIDTH=1,C_PROBE_IN83_WIDTH=1,C_PROBE_IN84_WIDTH=1,C_PROBE_IN85_WIDTH=1,C_PROBE_IN86_WIDTH=1,C_PROBE_IN87_WIDTH=1,C_PROBE_IN88_WIDTH=1,C_PROBE_IN89_WIDTH=1,C_PROBE_IN90_WIDTH=1,C_PROBE_IN91_WIDTH=1,C_PROBE_IN92_WIDTH=1,C_PROBE_IN93_WIDTH=1,C_PROBE_IN94_WIDTH=1,C_PROBE_IN95_WIDTH=1,C_PROBE_IN96_WIDTH=1,C_PROBE_IN97_WIDTH=1,C_PROBE_IN98_WIDTH=1,C_PROBE_IN99_WIDTH=1,C_PROBE_IN100_WIDTH=1,C_PROBE_IN101_WIDTH=1,C_PROBE_IN102_WIDTH=1,C_PROBE_IN103_WIDTH=1,C_PROBE_IN104_WIDTH=1,C_PROBE_IN105_WIDTH=1,C_PROBE_IN106_WIDTH=1,C_PROBE_IN107_WIDTH=1,C_PROBE_IN108_WIDTH=1,C_PROBE_IN109_WIDTH=1,C_PROBE_IN110_WIDTH=1,C_PROBE_IN111_WIDTH=1,C_PROBE_IN112_WIDTH=1,C_PROBE_IN113_WIDTH=1,C_PROBE_IN114_WIDTH=1,C_PROBE_IN115_WIDTH=1,C_PROBE_IN116_WIDTH=1,C_PROBE_IN117_WIDTH=1,C_PROBE_IN118_WIDTH=1,C_PROBE_IN119_WIDTH=1,C_PROBE_IN120_WIDTH=1,C_PROBE_IN121_WIDTH=1,C_PROBE_IN122_WIDTH=1,C_PROBE_IN123_WIDTH=1,C_PROBE_IN124_WIDTH=1,C_PROBE_IN125_WIDTH=1,C_PROBE_IN126_WIDTH=1,C_PROBE_IN127_WIDTH=1,C_PROBE_IN128_WIDTH=1,C_PROBE_IN129_WIDTH=1,C_PROBE_IN130_WIDTH=1,C_PROBE_IN131_WIDTH=1,C_PROBE_IN132_WIDTH=1,C_PROBE_IN133_WIDTH=1,C_PROBE_IN134_WIDTH=1,C_PROBE_IN135_WIDTH=1,C_PROBE_IN136_WIDTH=1,C_PROBE_IN137_WIDTH=1,C_PROBE_IN138_WIDTH=1,C_PROBE_IN139_WIDTH=1,C_PROBE_IN140_WIDTH=1,C_PROBE_IN141_WIDTH=1,C_PROBE_IN142_WIDTH=1,C_PROBE_IN143_WIDTH=1,C_PROBE_IN144_WIDTH=1,C_PROBE_IN145_WIDTH=1,C_PROBE_IN146_WIDTH=1,C_PROBE_IN147_WIDTH=1,C_PROBE_IN148_WIDTH=1,C_PROBE_IN149_WIDTH=1,C_PROBE_IN150_WIDTH=1,C_PROBE_IN151_WIDTH=1,C_PROBE_IN152_WIDTH=1,C_PROBE_IN153_WIDTH=1,C_PROBE_IN154_WIDTH=1,C_PROBE_IN155_WIDTH=1,C_PROBE_IN156_WIDTH=1,C_PROBE_IN157_WIDTH=1,C_PROBE_IN158_WIDTH=1,C_PROBE_IN159_WIDTH=1,C_PROBE_IN160_WIDTH=1,C_PROBE_IN161_WIDTH=1,C_PROBE_IN162_WIDTH=1,C_PROBE_IN163_WIDTH=1,C_PROBE_IN164_WIDTH=1,C_PROBE_IN165_WIDTH=1,C_PROBE_IN166_WIDTH=1,C_PROBE_IN167_WIDTH=1,C_PROBE_IN168_WIDTH=1,C_PROBE_IN169_WIDTH=1,C_PROBE_IN170_WIDTH=1,C_PROBE_IN171_WIDTH=1,C_PROBE_IN172_WIDTH=1,\
-C_PROBE_IN173_WIDTH=1,C_PROBE_IN174_WIDTH=1,C_PROBE_IN175_WIDTH=1,C_PROBE_IN176_WIDTH=1,C_PROBE_IN177_WIDTH=1,C_PROBE_IN178_WIDTH=1,C_PROBE_IN179_WIDTH=1,C_PROBE_IN180_WIDTH=1,C_PROBE_IN181_WIDTH=1,C_PROBE_IN182_WIDTH=1,C_PROBE_IN183_WIDTH=1,C_PROBE_IN184_WIDTH=1,C_PROBE_IN185_WIDTH=1,C_PROBE_IN186_WIDTH=1,C_PROBE_IN187_WIDTH=1,C_PROBE_IN188_WIDTH=1,C_PROBE_IN189_WIDTH=1,C_PROBE_IN190_WIDTH=1,C_PROBE_IN191_WIDTH=1,C_PROBE_IN192_WIDTH=1,C_PROBE_IN193_WIDTH=1,C_PROBE_IN194_WIDTH=1,C_PROBE_IN195_WIDTH=1,C_PROBE_IN196_WIDTH=1,C_PROBE_IN197_WIDTH=1,C_PROBE_IN198_WIDTH=1,C_PROBE_IN199_WIDTH=1,C_PROBE_IN200_WIDTH=1,C_PROBE_IN201_WIDTH=1,C_PROBE_IN202_WIDTH=1,C_PROBE_IN203_WIDTH=1,C_PROBE_IN204_WIDTH=1,C_PROBE_IN205_WIDTH=1,C_PROBE_IN206_WIDTH=1,C_PROBE_IN207_WIDTH=1,C_PROBE_IN208_WIDTH=1,C_PROBE_IN209_WIDTH=1,C_PROBE_IN210_WIDTH=1,C_PROBE_IN211_WIDTH=1,C_PROBE_IN212_WIDTH=1,C_PROBE_IN213_WIDTH=1,C_PROBE_IN214_WIDTH=1,C_PROBE_IN215_WIDTH=1,C_PROBE_IN216_WIDTH=1,C_PROBE_IN217_WIDTH=1,C_PROBE_IN218_WIDTH=1,C_PROBE_IN219_WIDTH=1,C_PROBE_IN220_WIDTH=1,C_PROBE_IN221_WIDTH=1,C_PROBE_IN222_WIDTH=1,C_PROBE_IN223_WIDTH=1,C_PROBE_IN224_WIDTH=1,C_PROBE_IN225_WIDTH=1,C_PROBE_IN226_WIDTH=1,C_PROBE_IN227_WIDTH=1,C_PROBE_IN228_WIDTH=1,C_PROBE_IN229_WIDTH=1,C_PROBE_IN230_WIDTH=1,C_PROBE_IN231_WIDTH=1,C_PROBE_IN232_WIDTH=1,C_PROBE_IN233_WIDTH=1,C_PROBE_IN234_WIDTH=1,C_PROBE_IN235_WIDTH=1,C_PROBE_IN236_WIDTH=1,C_PROBE_IN237_WIDTH=1,C_PROBE_IN238_WIDTH=1,C_PROBE_IN239_WIDTH=1,C_PROBE_IN240_WIDTH=1,C_PROBE_IN241_WIDTH=1,C_PROBE_IN242_WIDTH=1,C_PROBE_IN243_WIDTH=1,C_PROBE_IN244_WIDTH=1,C_PROBE_IN245_WIDTH=1,C_PROBE_IN246_WIDTH=1,C_PROBE_IN247_WIDTH=1,C_PROBE_IN248_WIDTH=1,C_PROBE_IN249_WIDTH=1,C_PROBE_IN250_WIDTH=1,C_PROBE_IN251_WIDTH=1,C_PROBE_IN252_WIDTH=1,C_PROBE_IN253_WIDTH=1,C_PROBE_IN254_WIDTH=1,C_PROBE_IN255_WIDTH=1,C_PROBE_OUT0_WIDTH=1,C_PROBE_OUT1_WIDTH=1,C_PROBE_OUT2_WIDTH=1,C_PROBE_OUT3_WIDTH=1,C_PROBE_OUT4_WIDTH=1,C_PROBE_OUT5_WIDTH=1,C_PROBE_OUT6_WIDTH=1,C_PROBE_OUT7_WIDTH=1,C_PROBE_OUT8_WIDTH=1,C_PROBE_OUT9_WIDTH=1,C_PROBE_OUT10_WIDTH=1,C_PROBE_OUT11_WIDTH=1,C_PROBE_OUT12_WIDTH=1,C_PROBE_OUT13_WIDTH=1,C_PROBE_OUT14_WIDTH=1,C_PROBE_OUT15_WIDTH=1,C_PROBE_OUT16_WIDTH=1,\
-C_PROBE_OUT17_WIDTH=1,C_PROBE_OUT18_WIDTH=1,C_PROBE_OUT19_WIDTH=1,C_PROBE_OUT20_WIDTH=1,C_PROBE_OUT21_WIDTH=1,C_PROBE_OUT22_WIDTH=1,C_PROBE_OUT23_WIDTH=1,C_PROBE_OUT24_WIDTH=1,C_PROBE_OUT25_WIDTH=1,C_PROBE_OUT26_WIDTH=1,C_PROBE_OUT27_WIDTH=1,C_PROBE_OUT28_WIDTH=1,C_PROBE_OUT29_WIDTH=1,C_PROBE_OUT30_WIDTH=1,C_PROBE_OUT31_WIDTH=1,C_PROBE_OUT32_WIDTH=1,C_PROBE_OUT33_WIDTH=1,C_PROBE_OUT34_WIDTH=1,C_PROBE_OUT35_WIDTH=1,C_PROBE_OUT36_WIDTH=1,C_PROBE_OUT37_WIDTH=1,C_PROBE_OUT38_WIDTH=1,C_PROBE_OUT39_WIDTH=1,C_PROBE_OUT40_WIDTH=1,C_PROBE_OUT41_WIDTH=1,C_PROBE_OUT42_WIDTH=1,C_PROBE_OUT43_WIDTH=1,C_PROBE_OUT44_WIDTH=1,C_PROBE_OUT45_WIDTH=1,C_PROBE_OUT46_WIDTH=1,C_PROBE_OUT47_WIDTH=1,C_PROBE_OUT48_WIDTH=1,C_PROBE_OUT49_WIDTH=1,C_PROBE_OUT50_WIDTH=1,C_PROBE_OUT51_WIDTH=1,C_PROBE_OUT52_WIDTH=1,C_PROBE_OUT53_WIDTH=1,C_PROBE_OUT54_WIDTH=1,C_PROBE_OUT55_WIDTH=1,C_PROBE_OUT56_WIDTH=1,C_PROBE_OUT57_WIDTH=1,C_PROBE_OUT58_WIDTH=1,C_PROBE_OUT59_WIDTH=1,C_PROBE_OUT60_WIDTH=1,C_PROBE_OUT61_WIDTH=1,C_PROBE_OUT62_WIDTH=1,C_PROBE_OUT63_WIDTH=1,C_PROBE_OUT64_WIDTH=1,C_PROBE_OUT65_WIDTH=1,C_PROBE_OUT66_WIDTH=1,C_PROBE_OUT67_WIDTH=1,C_PROBE_OUT68_WIDTH=1,C_PROBE_OUT69_WIDTH=1,C_PROBE_OUT70_WIDTH=1,C_PROBE_OUT71_WIDTH=1,C_PROBE_OUT72_WIDTH=1,C_PROBE_OUT73_WIDTH=1,C_PROBE_OUT74_WIDTH=1,C_PROBE_OUT75_WIDTH=1,C_PROBE_OUT76_WIDTH=1,C_PROBE_OUT77_WIDTH=1,C_PROBE_OUT78_WIDTH=1,C_PROBE_OUT79_WIDTH=1,C_PROBE_OUT80_WIDTH=1,C_PROBE_OUT81_WIDTH=1,C_PROBE_OUT82_WIDTH=1,C_PROBE_OUT83_WIDTH=1,C_PROBE_OUT84_WIDTH=1,C_PROBE_OUT85_WIDTH=1,C_PROBE_OUT86_WIDTH=1,C_PROBE_OUT87_WIDTH=1,C_PROBE_OUT88_WIDTH=1,C_PROBE_OUT89_WIDTH=1,C_PROBE_OUT90_WIDTH=1,C_PROBE_OUT91_WIDTH=1,C_PROBE_OUT92_WIDTH=1,C_PROBE_OUT93_WIDTH=1,C_PROBE_OUT94_WIDTH=1,C_PROBE_OUT95_WIDTH=1,C_PROBE_OUT96_WIDTH=1,C_PROBE_OUT97_WIDTH=1,C_PROBE_OUT98_WIDTH=1,C_PROBE_OUT99_WIDTH=1,C_PROBE_OUT100_WIDTH=1,C_PROBE_OUT101_WIDTH=1,C_PROBE_OUT102_WIDTH=1,C_PROBE_OUT103_WIDTH=1,C_PROBE_OUT104_WIDTH=1,C_PROBE_OUT105_WIDTH=1,C_PROBE_OUT106_WIDTH=1,C_PROBE_OUT107_WIDTH=1,C_PROBE_OUT108_WIDTH=1,C_PROBE_OUT109_WIDTH=1,C_PROBE_OUT110_WIDTH=1,C_PROBE_OUT111_WIDTH=1,C_PROBE_OUT112_WIDTH=1,C_PROBE_OUT113_WIDTH=1,C_PROBE_OUT114_WIDTH=1,C_PROBE_OUT115_WIDTH=1,C_PROBE_OUT116_WIDTH=1,\
-C_PROBE_OUT117_WIDTH=1,C_PROBE_OUT118_WIDTH=1,C_PROBE_OUT119_WIDTH=1,C_PROBE_OUT120_WIDTH=1,C_PROBE_OUT121_WIDTH=1,C_PROBE_OUT122_WIDTH=1,C_PROBE_OUT123_WIDTH=1,C_PROBE_OUT124_WIDTH=1,C_PROBE_OUT125_WIDTH=1,C_PROBE_OUT126_WIDTH=1,C_PROBE_OUT127_WIDTH=1,C_PROBE_OUT128_WIDTH=1,C_PROBE_OUT129_WIDTH=1,C_PROBE_OUT130_WIDTH=1,C_PROBE_OUT131_WIDTH=1,C_PROBE_OUT132_WIDTH=1,C_PROBE_OUT133_WIDTH=1,C_PROBE_OUT134_WIDTH=1,C_PROBE_OUT135_WIDTH=1,C_PROBE_OUT136_WIDTH=1,C_PROBE_OUT137_WIDTH=1,C_PROBE_OUT138_WIDTH=1,C_PROBE_OUT139_WIDTH=1,C_PROBE_OUT140_WIDTH=1,C_PROBE_OUT141_WIDTH=1,C_PROBE_OUT142_WIDTH=1,C_PROBE_OUT143_WIDTH=1,C_PROBE_OUT144_WIDTH=1,C_PROBE_OUT145_WIDTH=1,C_PROBE_OUT146_WIDTH=1,C_PROBE_OUT147_WIDTH=1,C_PROBE_OUT148_WIDTH=1,C_PROBE_OUT149_WIDTH=1,C_PROBE_OUT150_WIDTH=1,C_PROBE_OUT151_WIDTH=1,C_PROBE_OUT152_WIDTH=1,C_PROBE_OUT153_WIDTH=1,C_PROBE_OUT154_WIDTH=1,C_PROBE_OUT155_WIDTH=1,C_PROBE_OUT156_WIDTH=1,C_PROBE_OUT157_WIDTH=1,C_PROBE_OUT158_WIDTH=1,C_PROBE_OUT159_WIDTH=1,C_PROBE_OUT160_WIDTH=1,C_PROBE_OUT161_WIDTH=1,C_PROBE_OUT162_WIDTH=1,C_PROBE_OUT163_WIDTH=1,C_PROBE_OUT164_WIDTH=1,C_PROBE_OUT165_WIDTH=1,C_PROBE_OUT166_WIDTH=1,C_PROBE_OUT167_WIDTH=1,C_PROBE_OUT168_WIDTH=1,C_PROBE_OUT169_WIDTH=1,C_PROBE_OUT170_WIDTH=1,C_PROBE_OUT171_WIDTH=1,C_PROBE_OUT172_WIDTH=1,C_PROBE_OUT173_WIDTH=1,C_PROBE_OUT174_WIDTH=1,C_PROBE_OUT175_WIDTH=1,C_PROBE_OUT176_WIDTH=1,C_PROBE_OUT177_WIDTH=1,C_PROBE_OUT178_WIDTH=1,C_PROBE_OUT179_WIDTH=1,C_PROBE_OUT180_WIDTH=1,C_PROBE_OUT181_WIDTH=1,C_PROBE_OUT182_WIDTH=1,C_PROBE_OUT183_WIDTH=1,C_PROBE_OUT184_WIDTH=1,C_PROBE_OUT185_WIDTH=1,C_PROBE_OUT186_WIDTH=1,C_PROBE_OUT187_WIDTH=1,C_PROBE_OUT188_WIDTH=1,C_PROBE_OUT189_WIDTH=1,C_PROBE_OUT190_WIDTH=1,C_PROBE_OUT191_WIDTH=1,C_PROBE_OUT192_WIDTH=1,C_PROBE_OUT193_WIDTH=1,C_PROBE_OUT194_WIDTH=1,C_PROBE_OUT195_WIDTH=1,C_PROBE_OUT196_WIDTH=1,C_PROBE_OUT197_WIDTH=1,C_PROBE_OUT198_WIDTH=1,C_PROBE_OUT199_WIDTH=1,C_PROBE_OUT200_WIDTH=1,C_PROBE_OUT201_WIDTH=1,C_PROBE_OUT202_WIDTH=1,C_PROBE_OUT203_WIDTH=1,C_PROBE_OUT204_WIDTH=1,C_PROBE_OUT205_WIDTH=1,C_PROBE_OUT206_WIDTH=1,C_PROBE_OUT207_WIDTH=1,C_PROBE_OUT208_WIDTH=1,C_PROBE_OUT209_WIDTH=1,C_PROBE_OUT210_WIDTH=1,C_PROBE_OUT211_WIDTH=1,C_PROBE_OUT212_WIDTH=1,C_PROBE_OUT213_WIDTH=1,C_PROBE_OUT214_WIDTH=1,C_PROBE_OUT215_WIDTH=1,C_PROBE_OUT216_WIDTH=1,\
-C_PROBE_OUT217_WIDTH=1,C_PROBE_OUT218_WIDTH=1,C_PROBE_OUT219_WIDTH=1,C_PROBE_OUT220_WIDTH=1,C_PROBE_OUT221_WIDTH=1,C_PROBE_OUT222_WIDTH=1,C_PROBE_OUT223_WIDTH=1,C_PROBE_OUT224_WIDTH=1,C_PROBE_OUT225_WIDTH=1,C_PROBE_OUT226_WIDTH=1,C_PROBE_OUT227_WIDTH=1,C_PROBE_OUT228_WIDTH=1,C_PROBE_OUT229_WIDTH=1,C_PROBE_OUT230_WIDTH=1,C_PROBE_OUT231_WIDTH=1,C_PROBE_OUT232_WIDTH=1,C_PROBE_OUT233_WIDTH=1,C_PROBE_OUT234_WIDTH=1,C_PROBE_OUT235_WIDTH=1,C_PROBE_OUT236_WIDTH=1,C_PROBE_OUT237_WIDTH=1,C_PROBE_OUT238_WIDTH=1,C_PROBE_OUT239_WIDTH=1,C_PROBE_OUT240_WIDTH=1,C_PROBE_OUT241_WIDTH=1,C_PROBE_OUT242_WIDTH=1,C_PROBE_OUT243_WIDTH=1,C_PROBE_OUT244_WIDTH=1,C_PROBE_OUT245_WIDTH=1,C_PROBE_OUT246_WIDTH=1,C_PROBE_OUT247_WIDTH=1,C_PROBE_OUT248_WIDTH=1,C_PROBE_OUT249_WIDTH=1,C_PROBE_OUT250_WIDTH=1,C_PROBE_OUT251_WIDTH=1,C_PROBE_OUT252_WIDTH=1,C_PROBE_OUT253_WIDTH=1,C_PROBE_OUT254_WIDTH=1,C_PROBE_OUT255_WIDTH=1,C_PROBE_OUT0_INIT_VAL=0x0,C_PROBE_OUT1_INIT_VAL=0,C_PROBE_OUT2_INIT_VAL=0,C_PROBE_OUT3_INIT_VAL=0,C_PROBE_OUT4_INIT_VAL=0,C_PROBE_OUT5_INIT_VAL=0,C_PROBE_OUT6_INIT_VAL=0,C_PROBE_OUT7_INIT_VAL=0,C_PROBE_OUT8_INIT_VAL=0,C_PROBE_OUT9_INIT_VAL=0,C_PROBE_OUT10_INIT_VAL=0,C_PROBE_OUT11_INIT_VAL=0,C_PROBE_OUT12_INIT_VAL=0,C_PROBE_OUT13_INIT_VAL=0,C_PROBE_OUT14_INIT_VAL=0,C_PROBE_OUT15_INIT_VAL=0,C_PROBE_OUT16_INIT_VAL=0,C_PROBE_OUT17_INIT_VAL=0,C_PROBE_OUT18_INIT_VAL=0,C_PROBE_OUT19_INIT_VAL=0,C_PROBE_OUT20_INIT_VAL=0,C_PROBE_OUT21_INIT_VAL=0,C_PROBE_OUT22_INIT_VAL=0,C_PROBE_OUT23_INIT_VAL=0,C_PROBE_OUT24_INIT_VAL=0,C_PROBE_OUT25_INIT_VAL=0,C_PROBE_OUT26_INIT_VAL=0,C_PROBE_OUT27_INIT_VAL=0,C_PROBE_OUT28_INIT_VAL=0,C_PROBE_OUT29_INIT_VAL=0,C_PROBE_OUT30_INIT_VAL=0,C_PROBE_OUT31_INIT_VAL=0,C_PROBE_OUT32_INIT_VAL=0,C_PROBE_OUT33_INIT_VAL=0,C_PROBE_OUT34_INIT_VAL=0,C_PROBE_OUT35_INIT_VAL=0,C_PROBE_OUT36_INIT_VAL=0,C_PROBE_OUT37_INIT_VAL=0,C_PROBE_OUT38_INIT_VAL=0,C_PROBE_OUT39_INIT_VAL=0,C_PROBE_OUT40_INIT_VAL=0,C_PROBE_OUT41_INIT_VAL=0,C_PROBE_OUT42_INIT_VAL=0,C_PROBE_OUT43_INIT_VAL=0,C_PROBE_OUT44_INIT_VAL=0,C_PROBE_OUT45_INIT_VAL=0,C_PROBE_OUT46_INIT_VAL=0,C_PROBE_OUT47_INIT_VAL=0,C_PROBE_OUT48_INIT_VAL=0,C_PROBE_OUT49_INIT_VAL=0,C_PROBE_OUT50_INIT_VAL=0,C_PROBE_OUT51_INIT_VAL=0,C_PROBE_OUT52_INIT_VAL=0,C_PROBE_OUT53_INIT_VAL=0,C_PROBE_OUT54_INIT_VAL=0,C_PROBE_OUT55_INIT_VAL=0,C_PROBE_OUT56_INIT_VAL=0,C_PROBE_OUT57_INIT_VAL=0,C_PROBE_OUT58_INIT_VAL=0,C_PROBE_OUT59_INIT_VAL=0,C_PROBE_OUT60_INIT_VAL=0,\
-C_PROBE_OUT61_INIT_VAL=0,C_PROBE_OUT62_INIT_VAL=0,C_PROBE_OUT63_INIT_VAL=0,C_PROBE_OUT64_INIT_VAL=0,C_PROBE_OUT65_INIT_VAL=0,C_PROBE_OUT66_INIT_VAL=0,C_PROBE_OUT67_INIT_VAL=0,C_PROBE_OUT68_INIT_VAL=0,C_PROBE_OUT69_INIT_VAL=0,C_PROBE_OUT70_INIT_VAL=0,C_PROBE_OUT71_INIT_VAL=0,C_PROBE_OUT72_INIT_VAL=0,C_PROBE_OUT73_INIT_VAL=0,C_PROBE_OUT74_INIT_VAL=0,C_PROBE_OUT75_INIT_VAL=0,C_PROBE_OUT76_INIT_VAL=0,C_PROBE_OUT77_INIT_VAL=0,C_PROBE_OUT78_INIT_VAL=0,C_PROBE_OUT79_INIT_VAL=0,C_PROBE_OUT80_INIT_VAL=0,C_PROBE_OUT81_INIT_VAL=0,C_PROBE_OUT82_INIT_VAL=0,C_PROBE_OUT83_INIT_VAL=0,C_PROBE_OUT84_INIT_VAL=0,C_PROBE_OUT85_INIT_VAL=0,C_PROBE_OUT86_INIT_VAL=0,C_PROBE_OUT87_INIT_VAL=0,C_PROBE_OUT88_INIT_VAL=0,C_PROBE_OUT89_INIT_VAL=0,C_PROBE_OUT90_INIT_VAL=0,C_PROBE_OUT91_INIT_VAL=0,C_PROBE_OUT92_INIT_VAL=0,C_PROBE_OUT93_INIT_VAL=0,C_PROBE_OUT94_INIT_VAL=0,C_PROBE_OUT95_INIT_VAL=0,C_PROBE_OUT96_INIT_VAL=0,C_PROBE_OUT97_INIT_VAL=0,C_PROBE_OUT98_INIT_VAL=0,C_PROBE_OUT99_INIT_VAL=0,C_PROBE_OUT100_INIT_VAL=0,C_PROBE_OUT101_INIT_VAL=0,C_PROBE_OUT102_INIT_VAL=0,C_PROBE_OUT103_INIT_VAL=0,C_PROBE_OUT104_INIT_VAL=0,C_PROBE_OUT105_INIT_VAL=0,C_PROBE_OUT106_INIT_VAL=0,C_PROBE_OUT107_INIT_VAL=0,C_PROBE_OUT108_INIT_VAL=0,C_PROBE_OUT109_INIT_VAL=0,C_PROBE_OUT110_INIT_VAL=0,C_PROBE_OUT111_INIT_VAL=0,C_PROBE_OUT112_INIT_VAL=0,C_PROBE_OUT113_INIT_VAL=0,C_PROBE_OUT114_INIT_VAL=0,C_PROBE_OUT115_INIT_VAL=0,C_PROBE_OUT116_INIT_VAL=0,C_PROBE_OUT117_INIT_VAL=0,C_PROBE_OUT118_INIT_VAL=0,C_PROBE_OUT119_INIT_VAL=0,C_PROBE_OUT120_INIT_VAL=0,C_PROBE_OUT121_INIT_VAL=0,C_PROBE_OUT122_INIT_VAL=0,C_PROBE_OUT123_INIT_VAL=0,C_PROBE_OUT124_INIT_VAL=0,C_PROBE_OUT125_INIT_VAL=0,C_PROBE_OUT126_INIT_VAL=0,C_PROBE_OUT127_INIT_VAL=0,C_PROBE_OUT128_INIT_VAL=0,C_PROBE_OUT129_INIT_VAL=0,C_PROBE_OUT130_INIT_VAL=0,C_PROBE_OUT131_INIT_VAL=0,C_PROBE_OUT132_INIT_VAL=0,C_PROBE_OUT133_INIT_VAL=0,C_PROBE_OUT134_INIT_VAL=0,C_PROBE_OUT135_INIT_VAL=0,C_PROBE_OUT136_INIT_VAL=0,C_PROBE_OUT137_INIT_VAL=0,C_PROBE_OUT138_INIT_VAL=0,C_PROBE_OUT139_INIT_VAL=0,C_PROBE_OUT140_INIT_VAL=0,C_PROBE_OUT141_INIT_VAL=0,C_PROBE_OUT142_INIT_VAL=0,C_PROBE_OUT143_INIT_VAL=0,C_PROBE_OUT144_INIT_VAL=0,C_PROBE_OUT145_INIT_VAL=0,C_PROBE_OUT146_INIT_VAL=0,C_PROBE_OUT147_INIT_VAL=0,C_PROBE_OUT148_INIT_VAL=0,C_PROBE_OUT149_INIT_VAL=0,C_PROBE_OUT150_INIT_VAL=0,C_PROBE_OUT151_INIT_VAL=0,C_PROBE_OUT152_INIT_VAL=0,C_PROBE_OUT153_INIT_VAL=0,C_PROBE_OUT154_INIT_VAL=0,C_PROBE_OUT155_INIT_VAL=0,C_PROBE_OUT156_INIT_VAL=0,C_PROBE_OUT157_INIT_VAL=0,C_PROBE_OUT158_INIT_VAL=0,C_PROBE_OUT159_INIT_VAL=0,C_PROBE_OUT160_INIT_VAL=0,\
-C_PROBE_OUT161_INIT_VAL=0,C_PROBE_OUT162_INIT_VAL=0,C_PROBE_OUT163_INIT_VAL=0,C_PROBE_OUT164_INIT_VAL=0,C_PROBE_OUT165_INIT_VAL=0,C_PROBE_OUT166_INIT_VAL=0,C_PROBE_OUT167_INIT_VAL=0,C_PROBE_OUT168_INIT_VAL=0,C_PROBE_OUT169_INIT_VAL=0,C_PROBE_OUT170_INIT_VAL=0,C_PROBE_OUT171_INIT_VAL=0,C_PROBE_OUT172_INIT_VAL=0,C_PROBE_OUT173_INIT_VAL=0,C_PROBE_OUT174_INIT_VAL=0,C_PROBE_OUT175_INIT_VAL=0,C_PROBE_OUT176_INIT_VAL=0,C_PROBE_OUT177_INIT_VAL=0,C_PROBE_OUT178_INIT_VAL=0,C_PROBE_OUT179_INIT_VAL=0,C_PROBE_OUT180_INIT_VAL=0,C_PROBE_OUT181_INIT_VAL=0,C_PROBE_OUT182_INIT_VAL=0,C_PROBE_OUT183_INIT_VAL=0,C_PROBE_OUT184_INIT_VAL=0,C_PROBE_OUT185_INIT_VAL=0,C_PROBE_OUT186_INIT_VAL=0,C_PROBE_OUT187_INIT_VAL=0,C_PROBE_OUT188_INIT_VAL=0,C_PROBE_OUT189_INIT_VAL=0,C_PROBE_OUT190_INIT_VAL=0,C_PROBE_OUT191_INIT_VAL=0,C_PROBE_OUT192_INIT_VAL=0,C_PROBE_OUT193_INIT_VAL=0,C_PROBE_OUT194_INIT_VAL=0,C_PROBE_OUT195_INIT_VAL=0,C_PROBE_OUT196_INIT_VAL=0,C_PROBE_OUT197_INIT_VAL=0,C_PROBE_OUT198_INIT_VAL=0,C_PROBE_OUT199_INIT_VAL=0,C_PROBE_OUT200_INIT_VAL=0,C_PROBE_OUT201_INIT_VAL=0,C_PROBE_OUT202_INIT_VAL=0,C_PROBE_OUT203_INIT_VAL=0,C_PROBE_OUT204_INIT_VAL=0,C_PROBE_OUT205_INIT_VAL=0,C_PROBE_OUT206_INIT_VAL=0,C_PROBE_OUT207_INIT_VAL=0,C_PROBE_OUT208_INIT_VAL=0,C_PROBE_OUT209_INIT_VAL=0,C_PROBE_OUT210_INIT_VAL=0,C_PROBE_OUT211_INIT_VAL=0,C_PROBE_OUT212_INIT_VAL=0,C_PROBE_OUT213_INIT_VAL=0,C_PROBE_OUT214_INIT_VAL=0,C_PROBE_OUT215_INIT_VAL=0,C_PROBE_OUT216_INIT_VAL=0,C_PROBE_OUT217_INIT_VAL=0,C_PROBE_OUT218_INIT_VAL=0,C_PROBE_OUT219_INIT_VAL=0,C_PROBE_OUT220_INIT_VAL=0,C_PROBE_OUT221_INIT_VAL=0,C_PROBE_OUT222_INIT_VAL=0,C_PROBE_OUT223_INIT_VAL=0,C_PROBE_OUT224_INIT_VAL=0,C_PROBE_OUT225_INIT_VAL=0,C_PROBE_OUT226_INIT_VAL=0,C_PROBE_OUT227_INIT_VAL=0,C_PROBE_OUT228_INIT_VAL=0,C_PROBE_OUT229_INIT_VAL=0,C_PROBE_OUT230_INIT_VAL=0,C_PROBE_OUT231_INIT_VAL=0,C_PROBE_OUT232_INIT_VAL=0,C_PROBE_OUT233_INIT_VAL=0,C_PROBE_OUT234_INIT_VAL=0,C_PROBE_OUT235_INIT_VAL=0,C_PROBE_OUT236_INIT_VAL=0,C_PROBE_OUT237_INIT_VAL=0,C_PROBE_OUT238_INIT_VAL=0,C_PROBE_OUT239_INIT_VAL=0,C_PROBE_OUT240_INIT_VAL=0,C_PROBE_OUT241_INIT_VAL=0,C_PROBE_OUT242_INIT_VAL=0,C_PROBE_OUT243_INIT_VAL=0,C_PROBE_OUT244_INIT_VAL=0,C_PROBE_OUT245_INIT_VAL=0,C_PROBE_OUT246_INIT_VAL=0,C_PROBE_OUT247_INIT_VAL=0,C_PROBE_OUT248_INIT_VAL=0,C_PROBE_OUT249_INIT_VAL=0,C_PROBE_OUT250_INIT_VAL=0,C_PROBE_OUT251_INIT_VAL=0,C_PROBE_OUT252_INIT_VAL=0,C_PROBE_OUT253_INIT_VAL=0,C_PROBE_OUT254_INIT_VAL=0,C_PROBE_OUT255_INIT_VAL=0}" *)
-module scalp_zynqps_vio_0_0 (
-clk,
-
-probe_out0
-);
-
-input clk;
-
-output [0 : 0] probe_out0;
-
-
-wire [16:0] sl_oport0;
-wire [36:0] sl_iport0;
-
-vio_v3_0_19_vio #(
-.C_XLNX_HW_PROBE_INFO("DEFAULT"),
-.C_XDEVICEFAMILY("zynq"),
-.C_CORE_TYPE(2),
-.C_CORE_INFO1(0),
-.C_CORE_INFO2(0),
-.C_NUM_PROBE_IN(0),
-.C_EN_PROBE_IN_ACTIVITY(0),
-.C_NUM_PROBE_OUT(1),
-.C_MAJOR_VERSION(2013),
-.C_MINOR_VERSION(1),
-.C_BUILD_REVISION(0),
-.C_CORE_MAJOR_VER(2),
-.C_CORE_MINOR_VER(0),
-.C_CORE_MINOR_ALPHA_VER(97),
-.C_XSDB_SLAVE_TYPE(33),
-.C_NEXT_SLAVE(0),
-.C_CSE_DRV_VER(1),
-.C_USE_TEST_REG(1),
-.C_PIPE_IFACE(0),
-.C_PROBE_IN0_WIDTH(1),
-.C_PROBE_IN1_WIDTH(1),
-.C_PROBE_IN2_WIDTH(1),
-.C_PROBE_IN3_WIDTH(1),
-.C_PROBE_IN4_WIDTH(1),
-.C_PROBE_IN5_WIDTH(1),
-.C_PROBE_IN6_WIDTH(1),
-.C_PROBE_IN7_WIDTH(1),
-.C_PROBE_IN8_WIDTH(1),
-.C_PROBE_IN9_WIDTH(1),
-.C_PROBE_IN10_WIDTH(1),
-.C_PROBE_IN11_WIDTH(1),
-.C_PROBE_IN12_WIDTH(1),
-.C_PROBE_IN13_WIDTH(1),
-.C_PROBE_IN14_WIDTH(1),
-.C_PROBE_IN15_WIDTH(1),
-.C_PROBE_IN16_WIDTH(1),
-.C_PROBE_IN17_WIDTH(1),
-.C_PROBE_IN18_WIDTH(1),
-.C_PROBE_IN19_WIDTH(1),
-.C_PROBE_IN20_WIDTH(1),
-.C_PROBE_IN21_WIDTH(1),
-.C_PROBE_IN22_WIDTH(1),
-.C_PROBE_IN23_WIDTH(1),
-.C_PROBE_IN24_WIDTH(1),
-.C_PROBE_IN25_WIDTH(1),
-.C_PROBE_IN26_WIDTH(1),
-.C_PROBE_IN27_WIDTH(1),
-.C_PROBE_IN28_WIDTH(1),
-.C_PROBE_IN29_WIDTH(1),
-.C_PROBE_IN30_WIDTH(1),
-.C_PROBE_IN31_WIDTH(1),
-.C_PROBE_IN32_WIDTH(1),
-.C_PROBE_IN33_WIDTH(1),
-.C_PROBE_IN34_WIDTH(1),
-.C_PROBE_IN35_WIDTH(1),
-.C_PROBE_IN36_WIDTH(1),
-.C_PROBE_IN37_WIDTH(1),
-.C_PROBE_IN38_WIDTH(1),
-.C_PROBE_IN39_WIDTH(1),
-.C_PROBE_IN40_WIDTH(1),
-.C_PROBE_IN41_WIDTH(1),
-.C_PROBE_IN42_WIDTH(1),
-.C_PROBE_IN43_WIDTH(1),
-.C_PROBE_IN44_WIDTH(1),
-.C_PROBE_IN45_WIDTH(1),
-.C_PROBE_IN46_WIDTH(1),
-.C_PROBE_IN47_WIDTH(1),
-.C_PROBE_IN48_WIDTH(1),
-.C_PROBE_IN49_WIDTH(1),
-.C_PROBE_IN50_WIDTH(1),
-.C_PROBE_IN51_WIDTH(1),
-.C_PROBE_IN52_WIDTH(1),
-.C_PROBE_IN53_WIDTH(1),
-.C_PROBE_IN54_WIDTH(1),
-.C_PROBE_IN55_WIDTH(1),
-.C_PROBE_IN56_WIDTH(1),
-.C_PROBE_IN57_WIDTH(1),
-.C_PROBE_IN58_WIDTH(1),
-.C_PROBE_IN59_WIDTH(1),
-.C_PROBE_IN60_WIDTH(1),
-.C_PROBE_IN61_WIDTH(1),
-.C_PROBE_IN62_WIDTH(1),
-.C_PROBE_IN63_WIDTH(1),
-.C_PROBE_IN64_WIDTH(1),
-.C_PROBE_IN65_WIDTH(1),
-.C_PROBE_IN66_WIDTH(1),
-.C_PROBE_IN67_WIDTH(1),
-.C_PROBE_IN68_WIDTH(1),
-.C_PROBE_IN69_WIDTH(1),
-.C_PROBE_IN70_WIDTH(1),
-.C_PROBE_IN71_WIDTH(1),
-.C_PROBE_IN72_WIDTH(1),
-.C_PROBE_IN73_WIDTH(1),
-.C_PROBE_IN74_WIDTH(1),
-.C_PROBE_IN75_WIDTH(1),
-.C_PROBE_IN76_WIDTH(1),
-.C_PROBE_IN77_WIDTH(1),
-.C_PROBE_IN78_WIDTH(1),
-.C_PROBE_IN79_WIDTH(1),
-.C_PROBE_IN80_WIDTH(1),
-.C_PROBE_IN81_WIDTH(1),
-.C_PROBE_IN82_WIDTH(1),
-.C_PROBE_IN83_WIDTH(1),
-.C_PROBE_IN84_WIDTH(1),
-.C_PROBE_IN85_WIDTH(1),
-.C_PROBE_IN86_WIDTH(1),
-.C_PROBE_IN87_WIDTH(1),
-.C_PROBE_IN88_WIDTH(1),
-.C_PROBE_IN89_WIDTH(1),
-.C_PROBE_IN90_WIDTH(1),
-.C_PROBE_IN91_WIDTH(1),
-.C_PROBE_IN92_WIDTH(1),
-.C_PROBE_IN93_WIDTH(1),
-.C_PROBE_IN94_WIDTH(1),
-.C_PROBE_IN95_WIDTH(1),
-.C_PROBE_IN96_WIDTH(1),
-.C_PROBE_IN97_WIDTH(1),
-.C_PROBE_IN98_WIDTH(1),
-.C_PROBE_IN99_WIDTH(1),
-.C_PROBE_IN100_WIDTH(1),
-.C_PROBE_IN101_WIDTH(1),
-.C_PROBE_IN102_WIDTH(1),
-.C_PROBE_IN103_WIDTH(1),
-.C_PROBE_IN104_WIDTH(1),
-.C_PROBE_IN105_WIDTH(1),
-.C_PROBE_IN106_WIDTH(1),
-.C_PROBE_IN107_WIDTH(1),
-.C_PROBE_IN108_WIDTH(1),
-.C_PROBE_IN109_WIDTH(1),
-.C_PROBE_IN110_WIDTH(1),
-.C_PROBE_IN111_WIDTH(1),
-.C_PROBE_IN112_WIDTH(1),
-.C_PROBE_IN113_WIDTH(1),
-.C_PROBE_IN114_WIDTH(1),
-.C_PROBE_IN115_WIDTH(1),
-.C_PROBE_IN116_WIDTH(1),
-.C_PROBE_IN117_WIDTH(1),
-.C_PROBE_IN118_WIDTH(1),
-.C_PROBE_IN119_WIDTH(1),
-.C_PROBE_IN120_WIDTH(1),
-.C_PROBE_IN121_WIDTH(1),
-.C_PROBE_IN122_WIDTH(1),
-.C_PROBE_IN123_WIDTH(1),
-.C_PROBE_IN124_WIDTH(1),
-.C_PROBE_IN125_WIDTH(1),
-.C_PROBE_IN126_WIDTH(1),
-.C_PROBE_IN127_WIDTH(1),
-.C_PROBE_IN128_WIDTH(1),
-.C_PROBE_IN129_WIDTH(1),
-.C_PROBE_IN130_WIDTH(1),
-.C_PROBE_IN131_WIDTH(1),
-.C_PROBE_IN132_WIDTH(1),
-.C_PROBE_IN133_WIDTH(1),
-.C_PROBE_IN134_WIDTH(1),
-.C_PROBE_IN135_WIDTH(1),
-.C_PROBE_IN136_WIDTH(1),
-.C_PROBE_IN137_WIDTH(1),
-.C_PROBE_IN138_WIDTH(1),
-.C_PROBE_IN139_WIDTH(1),
-.C_PROBE_IN140_WIDTH(1),
-.C_PROBE_IN141_WIDTH(1),
-.C_PROBE_IN142_WIDTH(1),
-.C_PROBE_IN143_WIDTH(1),
-.C_PROBE_IN144_WIDTH(1),
-.C_PROBE_IN145_WIDTH(1),
-.C_PROBE_IN146_WIDTH(1),
-.C_PROBE_IN147_WIDTH(1),
-.C_PROBE_IN148_WIDTH(1),
-.C_PROBE_IN149_WIDTH(1),
-.C_PROBE_IN150_WIDTH(1),
-.C_PROBE_IN151_WIDTH(1),
-.C_PROBE_IN152_WIDTH(1),
-.C_PROBE_IN153_WIDTH(1),
-.C_PROBE_IN154_WIDTH(1),
-.C_PROBE_IN155_WIDTH(1),
-.C_PROBE_IN156_WIDTH(1),
-.C_PROBE_IN157_WIDTH(1),
-.C_PROBE_IN158_WIDTH(1),
-.C_PROBE_IN159_WIDTH(1),
-.C_PROBE_IN160_WIDTH(1),
-.C_PROBE_IN161_WIDTH(1),
-.C_PROBE_IN162_WIDTH(1),
-.C_PROBE_IN163_WIDTH(1),
-.C_PROBE_IN164_WIDTH(1),
-.C_PROBE_IN165_WIDTH(1),
-.C_PROBE_IN166_WIDTH(1),
-.C_PROBE_IN167_WIDTH(1),
-.C_PROBE_IN168_WIDTH(1),
-.C_PROBE_IN169_WIDTH(1),
-.C_PROBE_IN170_WIDTH(1),
-.C_PROBE_IN171_WIDTH(1),
-.C_PROBE_IN172_WIDTH(1),
-.C_PROBE_IN173_WIDTH(1),
-.C_PROBE_IN174_WIDTH(1),
-.C_PROBE_IN175_WIDTH(1),
-.C_PROBE_IN176_WIDTH(1),
-.C_PROBE_IN177_WIDTH(1),
-.C_PROBE_IN178_WIDTH(1),
-.C_PROBE_IN179_WIDTH(1),
-.C_PROBE_IN180_WIDTH(1),
-.C_PROBE_IN181_WIDTH(1),
-.C_PROBE_IN182_WIDTH(1),
-.C_PROBE_IN183_WIDTH(1),
-.C_PROBE_IN184_WIDTH(1),
-.C_PROBE_IN185_WIDTH(1),
-.C_PROBE_IN186_WIDTH(1),
-.C_PROBE_IN187_WIDTH(1),
-.C_PROBE_IN188_WIDTH(1),
-.C_PROBE_IN189_WIDTH(1),
-.C_PROBE_IN190_WIDTH(1),
-.C_PROBE_IN191_WIDTH(1),
-.C_PROBE_IN192_WIDTH(1),
-.C_PROBE_IN193_WIDTH(1),
-.C_PROBE_IN194_WIDTH(1),
-.C_PROBE_IN195_WIDTH(1),
-.C_PROBE_IN196_WIDTH(1),
-.C_PROBE_IN197_WIDTH(1),
-.C_PROBE_IN198_WIDTH(1),
-.C_PROBE_IN199_WIDTH(1),
-.C_PROBE_IN200_WIDTH(1),
-.C_PROBE_IN201_WIDTH(1),
-.C_PROBE_IN202_WIDTH(1),
-.C_PROBE_IN203_WIDTH(1),
-.C_PROBE_IN204_WIDTH(1),
-.C_PROBE_IN205_WIDTH(1),
-.C_PROBE_IN206_WIDTH(1),
-.C_PROBE_IN207_WIDTH(1),
-.C_PROBE_IN208_WIDTH(1),
-.C_PROBE_IN209_WIDTH(1),
-.C_PROBE_IN210_WIDTH(1),
-.C_PROBE_IN211_WIDTH(1),
-.C_PROBE_IN212_WIDTH(1),
-.C_PROBE_IN213_WIDTH(1),
-.C_PROBE_IN214_WIDTH(1),
-.C_PROBE_IN215_WIDTH(1),
-.C_PROBE_IN216_WIDTH(1),
-.C_PROBE_IN217_WIDTH(1),
-.C_PROBE_IN218_WIDTH(1),
-.C_PROBE_IN219_WIDTH(1),
-.C_PROBE_IN220_WIDTH(1),
-.C_PROBE_IN221_WIDTH(1),
-.C_PROBE_IN222_WIDTH(1),
-.C_PROBE_IN223_WIDTH(1),
-.C_PROBE_IN224_WIDTH(1),
-.C_PROBE_IN225_WIDTH(1),
-.C_PROBE_IN226_WIDTH(1),
-.C_PROBE_IN227_WIDTH(1),
-.C_PROBE_IN228_WIDTH(1),
-.C_PROBE_IN229_WIDTH(1),
-.C_PROBE_IN230_WIDTH(1),
-.C_PROBE_IN231_WIDTH(1),
-.C_PROBE_IN232_WIDTH(1),
-.C_PROBE_IN233_WIDTH(1),
-.C_PROBE_IN234_WIDTH(1),
-.C_PROBE_IN235_WIDTH(1),
-.C_PROBE_IN236_WIDTH(1),
-.C_PROBE_IN237_WIDTH(1),
-.C_PROBE_IN238_WIDTH(1),
-.C_PROBE_IN239_WIDTH(1),
-.C_PROBE_IN240_WIDTH(1),
-.C_PROBE_IN241_WIDTH(1),
-.C_PROBE_IN242_WIDTH(1),
-.C_PROBE_IN243_WIDTH(1),
-.C_PROBE_IN244_WIDTH(1),
-.C_PROBE_IN245_WIDTH(1),
-.C_PROBE_IN246_WIDTH(1),
-.C_PROBE_IN247_WIDTH(1),
-.C_PROBE_IN248_WIDTH(1),
-.C_PROBE_IN249_WIDTH(1),
-.C_PROBE_IN250_WIDTH(1),
-.C_PROBE_IN251_WIDTH(1),
-.C_PROBE_IN252_WIDTH(1),
-.C_PROBE_IN253_WIDTH(1),
-.C_PROBE_IN254_WIDTH(1),
-.C_PROBE_IN255_WIDTH(1),
-.C_PROBE_OUT0_WIDTH(1),
-.C_PROBE_OUT1_WIDTH(1),
-.C_PROBE_OUT2_WIDTH(1),
-.C_PROBE_OUT3_WIDTH(1),
-.C_PROBE_OUT4_WIDTH(1),
-.C_PROBE_OUT5_WIDTH(1),
-.C_PROBE_OUT6_WIDTH(1),
-.C_PROBE_OUT7_WIDTH(1),
-.C_PROBE_OUT8_WIDTH(1),
-.C_PROBE_OUT9_WIDTH(1),
-.C_PROBE_OUT10_WIDTH(1),
-.C_PROBE_OUT11_WIDTH(1),
-.C_PROBE_OUT12_WIDTH(1),
-.C_PROBE_OUT13_WIDTH(1),
-.C_PROBE_OUT14_WIDTH(1),
-.C_PROBE_OUT15_WIDTH(1),
-.C_PROBE_OUT16_WIDTH(1),
-.C_PROBE_OUT17_WIDTH(1),
-.C_PROBE_OUT18_WIDTH(1),
-.C_PROBE_OUT19_WIDTH(1),
-.C_PROBE_OUT20_WIDTH(1),
-.C_PROBE_OUT21_WIDTH(1),
-.C_PROBE_OUT22_WIDTH(1),
-.C_PROBE_OUT23_WIDTH(1),
-.C_PROBE_OUT24_WIDTH(1),
-.C_PROBE_OUT25_WIDTH(1),
-.C_PROBE_OUT26_WIDTH(1),
-.C_PROBE_OUT27_WIDTH(1),
-.C_PROBE_OUT28_WIDTH(1),
-.C_PROBE_OUT29_WIDTH(1),
-.C_PROBE_OUT30_WIDTH(1),
-.C_PROBE_OUT31_WIDTH(1),
-.C_PROBE_OUT32_WIDTH(1),
-.C_PROBE_OUT33_WIDTH(1),
-.C_PROBE_OUT34_WIDTH(1),
-.C_PROBE_OUT35_WIDTH(1),
-.C_PROBE_OUT36_WIDTH(1),
-.C_PROBE_OUT37_WIDTH(1),
-.C_PROBE_OUT38_WIDTH(1),
-.C_PROBE_OUT39_WIDTH(1),
-.C_PROBE_OUT40_WIDTH(1),
-.C_PROBE_OUT41_WIDTH(1),
-.C_PROBE_OUT42_WIDTH(1),
-.C_PROBE_OUT43_WIDTH(1),
-.C_PROBE_OUT44_WIDTH(1),
-.C_PROBE_OUT45_WIDTH(1),
-.C_PROBE_OUT46_WIDTH(1),
-.C_PROBE_OUT47_WIDTH(1),
-.C_PROBE_OUT48_WIDTH(1),
-.C_PROBE_OUT49_WIDTH(1),
-.C_PROBE_OUT50_WIDTH(1),
-.C_PROBE_OUT51_WIDTH(1),
-.C_PROBE_OUT52_WIDTH(1),
-.C_PROBE_OUT53_WIDTH(1),
-.C_PROBE_OUT54_WIDTH(1),
-.C_PROBE_OUT55_WIDTH(1),
-.C_PROBE_OUT56_WIDTH(1),
-.C_PROBE_OUT57_WIDTH(1),
-.C_PROBE_OUT58_WIDTH(1),
-.C_PROBE_OUT59_WIDTH(1),
-.C_PROBE_OUT60_WIDTH(1),
-.C_PROBE_OUT61_WIDTH(1),
-.C_PROBE_OUT62_WIDTH(1),
-.C_PROBE_OUT63_WIDTH(1),
-.C_PROBE_OUT64_WIDTH(1),
-.C_PROBE_OUT65_WIDTH(1),
-.C_PROBE_OUT66_WIDTH(1),
-.C_PROBE_OUT67_WIDTH(1),
-.C_PROBE_OUT68_WIDTH(1),
-.C_PROBE_OUT69_WIDTH(1),
-.C_PROBE_OUT70_WIDTH(1),
-.C_PROBE_OUT71_WIDTH(1),
-.C_PROBE_OUT72_WIDTH(1),
-.C_PROBE_OUT73_WIDTH(1),
-.C_PROBE_OUT74_WIDTH(1),
-.C_PROBE_OUT75_WIDTH(1),
-.C_PROBE_OUT76_WIDTH(1),
-.C_PROBE_OUT77_WIDTH(1),
-.C_PROBE_OUT78_WIDTH(1),
-.C_PROBE_OUT79_WIDTH(1),
-.C_PROBE_OUT80_WIDTH(1),
-.C_PROBE_OUT81_WIDTH(1),
-.C_PROBE_OUT82_WIDTH(1),
-.C_PROBE_OUT83_WIDTH(1),
-.C_PROBE_OUT84_WIDTH(1),
-.C_PROBE_OUT85_WIDTH(1),
-.C_PROBE_OUT86_WIDTH(1),
-.C_PROBE_OUT87_WIDTH(1),
-.C_PROBE_OUT88_WIDTH(1),
-.C_PROBE_OUT89_WIDTH(1),
-.C_PROBE_OUT90_WIDTH(1),
-.C_PROBE_OUT91_WIDTH(1),
-.C_PROBE_OUT92_WIDTH(1),
-.C_PROBE_OUT93_WIDTH(1),
-.C_PROBE_OUT94_WIDTH(1),
-.C_PROBE_OUT95_WIDTH(1),
-.C_PROBE_OUT96_WIDTH(1),
-.C_PROBE_OUT97_WIDTH(1),
-.C_PROBE_OUT98_WIDTH(1),
-.C_PROBE_OUT99_WIDTH(1),
-.C_PROBE_OUT100_WIDTH(1),
-.C_PROBE_OUT101_WIDTH(1),
-.C_PROBE_OUT102_WIDTH(1),
-.C_PROBE_OUT103_WIDTH(1),
-.C_PROBE_OUT104_WIDTH(1),
-.C_PROBE_OUT105_WIDTH(1),
-.C_PROBE_OUT106_WIDTH(1),
-.C_PROBE_OUT107_WIDTH(1),
-.C_PROBE_OUT108_WIDTH(1),
-.C_PROBE_OUT109_WIDTH(1),
-.C_PROBE_OUT110_WIDTH(1),
-.C_PROBE_OUT111_WIDTH(1),
-.C_PROBE_OUT112_WIDTH(1),
-.C_PROBE_OUT113_WIDTH(1),
-.C_PROBE_OUT114_WIDTH(1),
-.C_PROBE_OUT115_WIDTH(1),
-.C_PROBE_OUT116_WIDTH(1),
-.C_PROBE_OUT117_WIDTH(1),
-.C_PROBE_OUT118_WIDTH(1),
-.C_PROBE_OUT119_WIDTH(1),
-.C_PROBE_OUT120_WIDTH(1),
-.C_PROBE_OUT121_WIDTH(1),
-.C_PROBE_OUT122_WIDTH(1),
-.C_PROBE_OUT123_WIDTH(1),
-.C_PROBE_OUT124_WIDTH(1),
-.C_PROBE_OUT125_WIDTH(1),
-.C_PROBE_OUT126_WIDTH(1),
-.C_PROBE_OUT127_WIDTH(1),
-.C_PROBE_OUT128_WIDTH(1),
-.C_PROBE_OUT129_WIDTH(1),
-.C_PROBE_OUT130_WIDTH(1),
-.C_PROBE_OUT131_WIDTH(1),
-.C_PROBE_OUT132_WIDTH(1),
-.C_PROBE_OUT133_WIDTH(1),
-.C_PROBE_OUT134_WIDTH(1),
-.C_PROBE_OUT135_WIDTH(1),
-.C_PROBE_OUT136_WIDTH(1),
-.C_PROBE_OUT137_WIDTH(1),
-.C_PROBE_OUT138_WIDTH(1),
-.C_PROBE_OUT139_WIDTH(1),
-.C_PROBE_OUT140_WIDTH(1),
-.C_PROBE_OUT141_WIDTH(1),
-.C_PROBE_OUT142_WIDTH(1),
-.C_PROBE_OUT143_WIDTH(1),
-.C_PROBE_OUT144_WIDTH(1),
-.C_PROBE_OUT145_WIDTH(1),
-.C_PROBE_OUT146_WIDTH(1),
-.C_PROBE_OUT147_WIDTH(1),
-.C_PROBE_OUT148_WIDTH(1),
-.C_PROBE_OUT149_WIDTH(1),
-.C_PROBE_OUT150_WIDTH(1),
-.C_PROBE_OUT151_WIDTH(1),
-.C_PROBE_OUT152_WIDTH(1),
-.C_PROBE_OUT153_WIDTH(1),
-.C_PROBE_OUT154_WIDTH(1),
-.C_PROBE_OUT155_WIDTH(1),
-.C_PROBE_OUT156_WIDTH(1),
-.C_PROBE_OUT157_WIDTH(1),
-.C_PROBE_OUT158_WIDTH(1),
-.C_PROBE_OUT159_WIDTH(1),
-.C_PROBE_OUT160_WIDTH(1),
-.C_PROBE_OUT161_WIDTH(1),
-.C_PROBE_OUT162_WIDTH(1),
-.C_PROBE_OUT163_WIDTH(1),
-.C_PROBE_OUT164_WIDTH(1),
-.C_PROBE_OUT165_WIDTH(1),
-.C_PROBE_OUT166_WIDTH(1),
-.C_PROBE_OUT167_WIDTH(1),
-.C_PROBE_OUT168_WIDTH(1),
-.C_PROBE_OUT169_WIDTH(1),
-.C_PROBE_OUT170_WIDTH(1),
-.C_PROBE_OUT171_WIDTH(1),
-.C_PROBE_OUT172_WIDTH(1),
-.C_PROBE_OUT173_WIDTH(1),
-.C_PROBE_OUT174_WIDTH(1),
-.C_PROBE_OUT175_WIDTH(1),
-.C_PROBE_OUT176_WIDTH(1),
-.C_PROBE_OUT177_WIDTH(1),
-.C_PROBE_OUT178_WIDTH(1),
-.C_PROBE_OUT179_WIDTH(1),
-.C_PROBE_OUT180_WIDTH(1),
-.C_PROBE_OUT181_WIDTH(1),
-.C_PROBE_OUT182_WIDTH(1),
-.C_PROBE_OUT183_WIDTH(1),
-.C_PROBE_OUT184_WIDTH(1),
-.C_PROBE_OUT185_WIDTH(1),
-.C_PROBE_OUT186_WIDTH(1),
-.C_PROBE_OUT187_WIDTH(1),
-.C_PROBE_OUT188_WIDTH(1),
-.C_PROBE_OUT189_WIDTH(1),
-.C_PROBE_OUT190_WIDTH(1),
-.C_PROBE_OUT191_WIDTH(1),
-.C_PROBE_OUT192_WIDTH(1),
-.C_PROBE_OUT193_WIDTH(1),
-.C_PROBE_OUT194_WIDTH(1),
-.C_PROBE_OUT195_WIDTH(1),
-.C_PROBE_OUT196_WIDTH(1),
-.C_PROBE_OUT197_WIDTH(1),
-.C_PROBE_OUT198_WIDTH(1),
-.C_PROBE_OUT199_WIDTH(1),
-.C_PROBE_OUT200_WIDTH(1),
-.C_PROBE_OUT201_WIDTH(1),
-.C_PROBE_OUT202_WIDTH(1),
-.C_PROBE_OUT203_WIDTH(1),
-.C_PROBE_OUT204_WIDTH(1),
-.C_PROBE_OUT205_WIDTH(1),
-.C_PROBE_OUT206_WIDTH(1),
-.C_PROBE_OUT207_WIDTH(1),
-.C_PROBE_OUT208_WIDTH(1),
-.C_PROBE_OUT209_WIDTH(1),
-.C_PROBE_OUT210_WIDTH(1),
-.C_PROBE_OUT211_WIDTH(1),
-.C_PROBE_OUT212_WIDTH(1),
-.C_PROBE_OUT213_WIDTH(1),
-.C_PROBE_OUT214_WIDTH(1),
-.C_PROBE_OUT215_WIDTH(1),
-.C_PROBE_OUT216_WIDTH(1),
-.C_PROBE_OUT217_WIDTH(1),
-.C_PROBE_OUT218_WIDTH(1),
-.C_PROBE_OUT219_WIDTH(1),
-.C_PROBE_OUT220_WIDTH(1),
-.C_PROBE_OUT221_WIDTH(1),
-.C_PROBE_OUT222_WIDTH(1),
-.C_PROBE_OUT223_WIDTH(1),
-.C_PROBE_OUT224_WIDTH(1),
-.C_PROBE_OUT225_WIDTH(1),
-.C_PROBE_OUT226_WIDTH(1),
-.C_PROBE_OUT227_WIDTH(1),
-.C_PROBE_OUT228_WIDTH(1),
-.C_PROBE_OUT229_WIDTH(1),
-.C_PROBE_OUT230_WIDTH(1),
-.C_PROBE_OUT231_WIDTH(1),
-.C_PROBE_OUT232_WIDTH(1),
-.C_PROBE_OUT233_WIDTH(1),
-.C_PROBE_OUT234_WIDTH(1),
-.C_PROBE_OUT235_WIDTH(1),
-.C_PROBE_OUT236_WIDTH(1),
-.C_PROBE_OUT237_WIDTH(1),
-.C_PROBE_OUT238_WIDTH(1),
-.C_PROBE_OUT239_WIDTH(1),
-.C_PROBE_OUT240_WIDTH(1),
-.C_PROBE_OUT241_WIDTH(1),
-.C_PROBE_OUT242_WIDTH(1),
-.C_PROBE_OUT243_WIDTH(1),
-.C_PROBE_OUT244_WIDTH(1),
-.C_PROBE_OUT245_WIDTH(1),
-.C_PROBE_OUT246_WIDTH(1),
-.C_PROBE_OUT247_WIDTH(1),
-.C_PROBE_OUT248_WIDTH(1),
-.C_PROBE_OUT249_WIDTH(1),
-.C_PROBE_OUT250_WIDTH(1),
-.C_PROBE_OUT251_WIDTH(1),
-.C_PROBE_OUT252_WIDTH(1),
-.C_PROBE_OUT253_WIDTH(1),
-.C_PROBE_OUT254_WIDTH(1),
-.C_PROBE_OUT255_WIDTH(1),
-.C_PROBE_OUT0_INIT_VAL('h0),
-.C_PROBE_OUT1_INIT_VAL('h0),
-.C_PROBE_OUT2_INIT_VAL('h0),
-.C_PROBE_OUT3_INIT_VAL('h0),
-.C_PROBE_OUT4_INIT_VAL('h0),
-.C_PROBE_OUT5_INIT_VAL('h0),
-.C_PROBE_OUT6_INIT_VAL('h0),
-.C_PROBE_OUT7_INIT_VAL('h0),
-.C_PROBE_OUT8_INIT_VAL('h0),
-.C_PROBE_OUT9_INIT_VAL('h0),
-.C_PROBE_OUT10_INIT_VAL('h0),
-.C_PROBE_OUT11_INIT_VAL('h0),
-.C_PROBE_OUT12_INIT_VAL('h0),
-.C_PROBE_OUT13_INIT_VAL('h0),
-.C_PROBE_OUT14_INIT_VAL('h0),
-.C_PROBE_OUT15_INIT_VAL('h0),
-.C_PROBE_OUT16_INIT_VAL('h0),
-.C_PROBE_OUT17_INIT_VAL('h0),
-.C_PROBE_OUT18_INIT_VAL('h0),
-.C_PROBE_OUT19_INIT_VAL('h0),
-.C_PROBE_OUT20_INIT_VAL('h0),
-.C_PROBE_OUT21_INIT_VAL('h0),
-.C_PROBE_OUT22_INIT_VAL('h0),
-.C_PROBE_OUT23_INIT_VAL('h0),
-.C_PROBE_OUT24_INIT_VAL('h0),
-.C_PROBE_OUT25_INIT_VAL('h0),
-.C_PROBE_OUT26_INIT_VAL('h0),
-.C_PROBE_OUT27_INIT_VAL('h0),
-.C_PROBE_OUT28_INIT_VAL('h0),
-.C_PROBE_OUT29_INIT_VAL('h0),
-.C_PROBE_OUT30_INIT_VAL('h0),
-.C_PROBE_OUT31_INIT_VAL('h0),
-.C_PROBE_OUT32_INIT_VAL('h0),
-.C_PROBE_OUT33_INIT_VAL('h0),
-.C_PROBE_OUT34_INIT_VAL('h0),
-.C_PROBE_OUT35_INIT_VAL('h0),
-.C_PROBE_OUT36_INIT_VAL('h0),
-.C_PROBE_OUT37_INIT_VAL('h0),
-.C_PROBE_OUT38_INIT_VAL('h0),
-.C_PROBE_OUT39_INIT_VAL('h0),
-.C_PROBE_OUT40_INIT_VAL('h0),
-.C_PROBE_OUT41_INIT_VAL('h0),
-.C_PROBE_OUT42_INIT_VAL('h0),
-.C_PROBE_OUT43_INIT_VAL('h0),
-.C_PROBE_OUT44_INIT_VAL('h0),
-.C_PROBE_OUT45_INIT_VAL('h0),
-.C_PROBE_OUT46_INIT_VAL('h0),
-.C_PROBE_OUT47_INIT_VAL('h0),
-.C_PROBE_OUT48_INIT_VAL('h0),
-.C_PROBE_OUT49_INIT_VAL('h0),
-.C_PROBE_OUT50_INIT_VAL('h0),
-.C_PROBE_OUT51_INIT_VAL('h0),
-.C_PROBE_OUT52_INIT_VAL('h0),
-.C_PROBE_OUT53_INIT_VAL('h0),
-.C_PROBE_OUT54_INIT_VAL('h0),
-.C_PROBE_OUT55_INIT_VAL('h0),
-.C_PROBE_OUT56_INIT_VAL('h0),
-.C_PROBE_OUT57_INIT_VAL('h0),
-.C_PROBE_OUT58_INIT_VAL('h0),
-.C_PROBE_OUT59_INIT_VAL('h0),
-.C_PROBE_OUT60_INIT_VAL('h0),
-.C_PROBE_OUT61_INIT_VAL('h0),
-.C_PROBE_OUT62_INIT_VAL('h0),
-.C_PROBE_OUT63_INIT_VAL('h0),
-.C_PROBE_OUT64_INIT_VAL('h0),
-.C_PROBE_OUT65_INIT_VAL('h0),
-.C_PROBE_OUT66_INIT_VAL('h0),
-.C_PROBE_OUT67_INIT_VAL('h0),
-.C_PROBE_OUT68_INIT_VAL('h0),
-.C_PROBE_OUT69_INIT_VAL('h0),
-.C_PROBE_OUT70_INIT_VAL('h0),
-.C_PROBE_OUT71_INIT_VAL('h0),
-.C_PROBE_OUT72_INIT_VAL('h0),
-.C_PROBE_OUT73_INIT_VAL('h0),
-.C_PROBE_OUT74_INIT_VAL('h0),
-.C_PROBE_OUT75_INIT_VAL('h0),
-.C_PROBE_OUT76_INIT_VAL('h0),
-.C_PROBE_OUT77_INIT_VAL('h0),
-.C_PROBE_OUT78_INIT_VAL('h0),
-.C_PROBE_OUT79_INIT_VAL('h0),
-.C_PROBE_OUT80_INIT_VAL('h0),
-.C_PROBE_OUT81_INIT_VAL('h0),
-.C_PROBE_OUT82_INIT_VAL('h0),
-.C_PROBE_OUT83_INIT_VAL('h0),
-.C_PROBE_OUT84_INIT_VAL('h0),
-.C_PROBE_OUT85_INIT_VAL('h0),
-.C_PROBE_OUT86_INIT_VAL('h0),
-.C_PROBE_OUT87_INIT_VAL('h0),
-.C_PROBE_OUT88_INIT_VAL('h0),
-.C_PROBE_OUT89_INIT_VAL('h0),
-.C_PROBE_OUT90_INIT_VAL('h0),
-.C_PROBE_OUT91_INIT_VAL('h0),
-.C_PROBE_OUT92_INIT_VAL('h0),
-.C_PROBE_OUT93_INIT_VAL('h0),
-.C_PROBE_OUT94_INIT_VAL('h0),
-.C_PROBE_OUT95_INIT_VAL('h0),
-.C_PROBE_OUT96_INIT_VAL('h0),
-.C_PROBE_OUT97_INIT_VAL('h0),
-.C_PROBE_OUT98_INIT_VAL('h0),
-.C_PROBE_OUT99_INIT_VAL('h0),
-.C_PROBE_OUT100_INIT_VAL('h0),
-.C_PROBE_OUT101_INIT_VAL('h0),
-.C_PROBE_OUT102_INIT_VAL('h0),
-.C_PROBE_OUT103_INIT_VAL('h0),
-.C_PROBE_OUT104_INIT_VAL('h0),
-.C_PROBE_OUT105_INIT_VAL('h0),
-.C_PROBE_OUT106_INIT_VAL('h0),
-.C_PROBE_OUT107_INIT_VAL('h0),
-.C_PROBE_OUT108_INIT_VAL('h0),
-.C_PROBE_OUT109_INIT_VAL('h0),
-.C_PROBE_OUT110_INIT_VAL('h0),
-.C_PROBE_OUT111_INIT_VAL('h0),
-.C_PROBE_OUT112_INIT_VAL('h0),
-.C_PROBE_OUT113_INIT_VAL('h0),
-.C_PROBE_OUT114_INIT_VAL('h0),
-.C_PROBE_OUT115_INIT_VAL('h0),
-.C_PROBE_OUT116_INIT_VAL('h0),
-.C_PROBE_OUT117_INIT_VAL('h0),
-.C_PROBE_OUT118_INIT_VAL('h0),
-.C_PROBE_OUT119_INIT_VAL('h0),
-.C_PROBE_OUT120_INIT_VAL('h0),
-.C_PROBE_OUT121_INIT_VAL('h0),
-.C_PROBE_OUT122_INIT_VAL('h0),
-.C_PROBE_OUT123_INIT_VAL('h0),
-.C_PROBE_OUT124_INIT_VAL('h0),
-.C_PROBE_OUT125_INIT_VAL('h0),
-.C_PROBE_OUT126_INIT_VAL('h0),
-.C_PROBE_OUT127_INIT_VAL('h0),
-.C_PROBE_OUT128_INIT_VAL('h0),
-.C_PROBE_OUT129_INIT_VAL('h0),
-.C_PROBE_OUT130_INIT_VAL('h0),
-.C_PROBE_OUT131_INIT_VAL('h0),
-.C_PROBE_OUT132_INIT_VAL('h0),
-.C_PROBE_OUT133_INIT_VAL('h0),
-.C_PROBE_OUT134_INIT_VAL('h0),
-.C_PROBE_OUT135_INIT_VAL('h0),
-.C_PROBE_OUT136_INIT_VAL('h0),
-.C_PROBE_OUT137_INIT_VAL('h0),
-.C_PROBE_OUT138_INIT_VAL('h0),
-.C_PROBE_OUT139_INIT_VAL('h0),
-.C_PROBE_OUT140_INIT_VAL('h0),
-.C_PROBE_OUT141_INIT_VAL('h0),
-.C_PROBE_OUT142_INIT_VAL('h0),
-.C_PROBE_OUT143_INIT_VAL('h0),
-.C_PROBE_OUT144_INIT_VAL('h0),
-.C_PROBE_OUT145_INIT_VAL('h0),
-.C_PROBE_OUT146_INIT_VAL('h0),
-.C_PROBE_OUT147_INIT_VAL('h0),
-.C_PROBE_OUT148_INIT_VAL('h0),
-.C_PROBE_OUT149_INIT_VAL('h0),
-.C_PROBE_OUT150_INIT_VAL('h0),
-.C_PROBE_OUT151_INIT_VAL('h0),
-.C_PROBE_OUT152_INIT_VAL('h0),
-.C_PROBE_OUT153_INIT_VAL('h0),
-.C_PROBE_OUT154_INIT_VAL('h0),
-.C_PROBE_OUT155_INIT_VAL('h0),
-.C_PROBE_OUT156_INIT_VAL('h0),
-.C_PROBE_OUT157_INIT_VAL('h0),
-.C_PROBE_OUT158_INIT_VAL('h0),
-.C_PROBE_OUT159_INIT_VAL('h0),
-.C_PROBE_OUT160_INIT_VAL('h0),
-.C_PROBE_OUT161_INIT_VAL('h0),
-.C_PROBE_OUT162_INIT_VAL('h0),
-.C_PROBE_OUT163_INIT_VAL('h0),
-.C_PROBE_OUT164_INIT_VAL('h0),
-.C_PROBE_OUT165_INIT_VAL('h0),
-.C_PROBE_OUT166_INIT_VAL('h0),
-.C_PROBE_OUT167_INIT_VAL('h0),
-.C_PROBE_OUT168_INIT_VAL('h0),
-.C_PROBE_OUT169_INIT_VAL('h0),
-.C_PROBE_OUT170_INIT_VAL('h0),
-.C_PROBE_OUT171_INIT_VAL('h0),
-.C_PROBE_OUT172_INIT_VAL('h0),
-.C_PROBE_OUT173_INIT_VAL('h0),
-.C_PROBE_OUT174_INIT_VAL('h0),
-.C_PROBE_OUT175_INIT_VAL('h0),
-.C_PROBE_OUT176_INIT_VAL('h0),
-.C_PROBE_OUT177_INIT_VAL('h0),
-.C_PROBE_OUT178_INIT_VAL('h0),
-.C_PROBE_OUT179_INIT_VAL('h0),
-.C_PROBE_OUT180_INIT_VAL('h0),
-.C_PROBE_OUT181_INIT_VAL('h0),
-.C_PROBE_OUT182_INIT_VAL('h0),
-.C_PROBE_OUT183_INIT_VAL('h0),
-.C_PROBE_OUT184_INIT_VAL('h0),
-.C_PROBE_OUT185_INIT_VAL('h0),
-.C_PROBE_OUT186_INIT_VAL('h0),
-.C_PROBE_OUT187_INIT_VAL('h0),
-.C_PROBE_OUT188_INIT_VAL('h0),
-.C_PROBE_OUT189_INIT_VAL('h0),
-.C_PROBE_OUT190_INIT_VAL('h0),
-.C_PROBE_OUT191_INIT_VAL('h0),
-.C_PROBE_OUT192_INIT_VAL('h0),
-.C_PROBE_OUT193_INIT_VAL('h0),
-.C_PROBE_OUT194_INIT_VAL('h0),
-.C_PROBE_OUT195_INIT_VAL('h0),
-.C_PROBE_OUT196_INIT_VAL('h0),
-.C_PROBE_OUT197_INIT_VAL('h0),
-.C_PROBE_OUT198_INIT_VAL('h0),
-.C_PROBE_OUT199_INIT_VAL('h0),
-.C_PROBE_OUT200_INIT_VAL('h0),
-.C_PROBE_OUT201_INIT_VAL('h0),
-.C_PROBE_OUT202_INIT_VAL('h0),
-.C_PROBE_OUT203_INIT_VAL('h0),
-.C_PROBE_OUT204_INIT_VAL('h0),
-.C_PROBE_OUT205_INIT_VAL('h0),
-.C_PROBE_OUT206_INIT_VAL('h0),
-.C_PROBE_OUT207_INIT_VAL('h0),
-.C_PROBE_OUT208_INIT_VAL('h0),
-.C_PROBE_OUT209_INIT_VAL('h0),
-.C_PROBE_OUT210_INIT_VAL('h0),
-.C_PROBE_OUT211_INIT_VAL('h0),
-.C_PROBE_OUT212_INIT_VAL('h0),
-.C_PROBE_OUT213_INIT_VAL('h0),
-.C_PROBE_OUT214_INIT_VAL('h0),
-.C_PROBE_OUT215_INIT_VAL('h0),
-.C_PROBE_OUT216_INIT_VAL('h0),
-.C_PROBE_OUT217_INIT_VAL('h0),
-.C_PROBE_OUT218_INIT_VAL('h0),
-.C_PROBE_OUT219_INIT_VAL('h0),
-.C_PROBE_OUT220_INIT_VAL('h0),
-.C_PROBE_OUT221_INIT_VAL('h0),
-.C_PROBE_OUT222_INIT_VAL('h0),
-.C_PROBE_OUT223_INIT_VAL('h0),
-.C_PROBE_OUT224_INIT_VAL('h0),
-.C_PROBE_OUT225_INIT_VAL('h0),
-.C_PROBE_OUT226_INIT_VAL('h0),
-.C_PROBE_OUT227_INIT_VAL('h0),
-.C_PROBE_OUT228_INIT_VAL('h0),
-.C_PROBE_OUT229_INIT_VAL('h0),
-.C_PROBE_OUT230_INIT_VAL('h0),
-.C_PROBE_OUT231_INIT_VAL('h0),
-.C_PROBE_OUT232_INIT_VAL('h0),
-.C_PROBE_OUT233_INIT_VAL('h0),
-.C_PROBE_OUT234_INIT_VAL('h0),
-.C_PROBE_OUT235_INIT_VAL('h0),
-.C_PROBE_OUT236_INIT_VAL('h0),
-.C_PROBE_OUT237_INIT_VAL('h0),
-.C_PROBE_OUT238_INIT_VAL('h0),
-.C_PROBE_OUT239_INIT_VAL('h0),
-.C_PROBE_OUT240_INIT_VAL('h0),
-.C_PROBE_OUT241_INIT_VAL('h0),
-.C_PROBE_OUT242_INIT_VAL('h0),
-.C_PROBE_OUT243_INIT_VAL('h0),
-.C_PROBE_OUT244_INIT_VAL('h0),
-.C_PROBE_OUT245_INIT_VAL('h0),
-.C_PROBE_OUT246_INIT_VAL('h0),
-.C_PROBE_OUT247_INIT_VAL('h0),
-.C_PROBE_OUT248_INIT_VAL('h0),
-.C_PROBE_OUT249_INIT_VAL('h0),
-.C_PROBE_OUT250_INIT_VAL('h0),
-.C_PROBE_OUT251_INIT_VAL('h0),
-.C_PROBE_OUT252_INIT_VAL('h0),
-.C_PROBE_OUT253_INIT_VAL('h0),
-.C_PROBE_OUT254_INIT_VAL('h0),
-.C_PROBE_OUT255_INIT_VAL('h0)
-) inst (
-.clk(clk),
-.sl_iport0(sl_iport0),
-.sl_oport0(sl_oport0),
-.probe_in0(0),
-.probe_in1(0),
-.probe_in2(0),
-.probe_in3(0),
-.probe_in4(0),
-.probe_in5(0),
-.probe_in6(0),
-.probe_in7(0),
-.probe_in8(0),
-.probe_in9(0),
-.probe_in10(0),
-.probe_in11(0),
-.probe_in12(0),
-.probe_in13(0),
-.probe_in14(0),
-.probe_in15(0),
-.probe_in16(0),
-.probe_in17(0),
-.probe_in18(0),
-.probe_in19(0),
-.probe_in20(0),
-.probe_in21(0),
-.probe_in22(0),
-.probe_in23(0),
-.probe_in24(0),
-.probe_in25(0),
-.probe_in26(0),
-.probe_in27(0),
-.probe_in28(0),
-.probe_in29(0),
-.probe_in30(0),
-.probe_in31(0),
-.probe_in32(0),
-.probe_in33(0),
-.probe_in34(0),
-.probe_in35(0),
-.probe_in36(0),
-.probe_in37(0),
-.probe_in38(0),
-.probe_in39(0),
-.probe_in40(0),
-.probe_in41(0),
-.probe_in42(0),
-.probe_in43(0),
-.probe_in44(0),
-.probe_in45(0),
-.probe_in46(0),
-.probe_in47(0),
-.probe_in48(0),
-.probe_in49(0),
-.probe_in50(0),
-.probe_in51(0),
-.probe_in52(0),
-.probe_in53(0),
-.probe_in54(0),
-.probe_in55(0),
-.probe_in56(0),
-.probe_in57(0),
-.probe_in58(0),
-.probe_in59(0),
-.probe_in60(0),
-.probe_in61(0),
-.probe_in62(0),
-.probe_in63(0),
-.probe_in64(0),
-.probe_in65(0),
-.probe_in66(0),
-.probe_in67(0),
-.probe_in68(0),
-.probe_in69(0),
-.probe_in70(0),
-.probe_in71(0),
-.probe_in72(0),
-.probe_in73(0),
-.probe_in74(0),
-.probe_in75(0),
-.probe_in76(0),
-.probe_in77(0),
-.probe_in78(0),
-.probe_in79(0),
-.probe_in80(0),
-.probe_in81(0),
-.probe_in82(0),
-.probe_in83(0),
-.probe_in84(0),
-.probe_in85(0),
-.probe_in86(0),
-.probe_in87(0),
-.probe_in88(0),
-.probe_in89(0),
-.probe_in90(0),
-.probe_in91(0),
-.probe_in92(0),
-.probe_in93(0),
-.probe_in94(0),
-.probe_in95(0),
-.probe_in96(0),
-.probe_in97(0),
-.probe_in98(0),
-.probe_in99(0),
-.probe_in100(0),
-.probe_in101(0),
-.probe_in102(0),
-.probe_in103(0),
-.probe_in104(0),
-.probe_in105(0),
-.probe_in106(0),
-.probe_in107(0),
-.probe_in108(0),
-.probe_in109(0),
-.probe_in110(0),
-.probe_in111(0),
-.probe_in112(0),
-.probe_in113(0),
-.probe_in114(0),
-.probe_in115(0),
-.probe_in116(0),
-.probe_in117(0),
-.probe_in118(0),
-.probe_in119(0),
-.probe_in120(0),
-.probe_in121(0),
-.probe_in122(0),
-.probe_in123(0),
-.probe_in124(0),
-.probe_in125(0),
-.probe_in126(0),
-.probe_in127(0),
-.probe_in128(0),
-.probe_in129(0),
-.probe_in130(0),
-.probe_in131(0),
-.probe_in132(0),
-.probe_in133(0),
-.probe_in134(0),
-.probe_in135(0),
-.probe_in136(0),
-.probe_in137(0),
-.probe_in138(0),
-.probe_in139(0),
-.probe_in140(0),
-.probe_in141(0),
-.probe_in142(0),
-.probe_in143(0),
-.probe_in144(0),
-.probe_in145(0),
-.probe_in146(0),
-.probe_in147(0),
-.probe_in148(0),
-.probe_in149(0),
-.probe_in150(0),
-.probe_in151(0),
-.probe_in152(0),
-.probe_in153(0),
-.probe_in154(0),
-.probe_in155(0),
-.probe_in156(0),
-.probe_in157(0),
-.probe_in158(0),
-.probe_in159(0),
-.probe_in160(0),
-.probe_in161(0),
-.probe_in162(0),
-.probe_in163(0),
-.probe_in164(0),
-.probe_in165(0),
-.probe_in166(0),
-.probe_in167(0),
-.probe_in168(0),
-.probe_in169(0),
-.probe_in170(0),
-.probe_in171(0),
-.probe_in172(0),
-.probe_in173(0),
-.probe_in174(0),
-.probe_in175(0),
-.probe_in176(0),
-.probe_in177(0),
-.probe_in178(0),
-.probe_in179(0),
-.probe_in180(0),
-.probe_in181(0),
-.probe_in182(0),
-.probe_in183(0),
-.probe_in184(0),
-.probe_in185(0),
-.probe_in186(0),
-.probe_in187(0),
-.probe_in188(0),
-.probe_in189(0),
-.probe_in190(0),
-.probe_in191(0),
-.probe_in192(0),
-.probe_in193(0),
-.probe_in194(0),
-.probe_in195(0),
-.probe_in196(0),
-.probe_in197(0),
-.probe_in198(0),
-.probe_in199(0),
-.probe_in200(0),
-.probe_in201(0),
-.probe_in202(0),
-.probe_in203(0),
-.probe_in204(0),
-.probe_in205(0),
-.probe_in206(0),
-.probe_in207(0),
-.probe_in208(0),
-.probe_in209(0),
-.probe_in210(0),
-.probe_in211(0),
-.probe_in212(0),
-.probe_in213(0),
-.probe_in214(0),
-.probe_in215(0),
-.probe_in216(0),
-.probe_in217(0),
-.probe_in218(0),
-.probe_in219(0),
-.probe_in220(0),
-.probe_in221(0),
-.probe_in222(0),
-.probe_in223(0),
-.probe_in224(0),
-.probe_in225(0),
-.probe_in226(0),
-.probe_in227(0),
-.probe_in228(0),
-.probe_in229(0),
-.probe_in230(0),
-.probe_in231(0),
-.probe_in232(0),
-.probe_in233(0),
-.probe_in234(0),
-.probe_in235(0),
-.probe_in236(0),
-.probe_in237(0),
-.probe_in238(0),
-.probe_in239(0),
-.probe_in240(0),
-.probe_in241(0),
-.probe_in242(0),
-.probe_in243(0),
-.probe_in244(0),
-.probe_in245(0),
-.probe_in246(0),
-.probe_in247(0),
-.probe_in248(0),
-.probe_in249(0),
-.probe_in250(0),
-.probe_in251(0),
-.probe_in252(0),
-.probe_in253(0),
-.probe_in254(0),
-.probe_in255(0),
-.probe_out0(probe_out0),
-.probe_out1(),
-.probe_out2(),
-.probe_out3(),
-.probe_out4(),
-.probe_out5(),
-.probe_out6(),
-.probe_out7(),
-.probe_out8(),
-.probe_out9(),
-.probe_out10(),
-.probe_out11(),
-.probe_out12(),
-.probe_out13(),
-.probe_out14(),
-.probe_out15(),
-.probe_out16(),
-.probe_out17(),
-.probe_out18(),
-.probe_out19(),
-.probe_out20(),
-.probe_out21(),
-.probe_out22(),
-.probe_out23(),
-.probe_out24(),
-.probe_out25(),
-.probe_out26(),
-.probe_out27(),
-.probe_out28(),
-.probe_out29(),
-.probe_out30(),
-.probe_out31(),
-.probe_out32(),
-.probe_out33(),
-.probe_out34(),
-.probe_out35(),
-.probe_out36(),
-.probe_out37(),
-.probe_out38(),
-.probe_out39(),
-.probe_out40(),
-.probe_out41(),
-.probe_out42(),
-.probe_out43(),
-.probe_out44(),
-.probe_out45(),
-.probe_out46(),
-.probe_out47(),
-.probe_out48(),
-.probe_out49(),
-.probe_out50(),
-.probe_out51(),
-.probe_out52(),
-.probe_out53(),
-.probe_out54(),
-.probe_out55(),
-.probe_out56(),
-.probe_out57(),
-.probe_out58(),
-.probe_out59(),
-.probe_out60(),
-.probe_out61(),
-.probe_out62(),
-.probe_out63(),
-.probe_out64(),
-.probe_out65(),
-.probe_out66(),
-.probe_out67(),
-.probe_out68(),
-.probe_out69(),
-.probe_out70(),
-.probe_out71(),
-.probe_out72(),
-.probe_out73(),
-.probe_out74(),
-.probe_out75(),
-.probe_out76(),
-.probe_out77(),
-.probe_out78(),
-.probe_out79(),
-.probe_out80(),
-.probe_out81(),
-.probe_out82(),
-.probe_out83(),
-.probe_out84(),
-.probe_out85(),
-.probe_out86(),
-.probe_out87(),
-.probe_out88(),
-.probe_out89(),
-.probe_out90(),
-.probe_out91(),
-.probe_out92(),
-.probe_out93(),
-.probe_out94(),
-.probe_out95(),
-.probe_out96(),
-.probe_out97(),
-.probe_out98(),
-.probe_out99(),
-.probe_out100(),
-.probe_out101(),
-.probe_out102(),
-.probe_out103(),
-.probe_out104(),
-.probe_out105(),
-.probe_out106(),
-.probe_out107(),
-.probe_out108(),
-.probe_out109(),
-.probe_out110(),
-.probe_out111(),
-.probe_out112(),
-.probe_out113(),
-.probe_out114(),
-.probe_out115(),
-.probe_out116(),
-.probe_out117(),
-.probe_out118(),
-.probe_out119(),
-.probe_out120(),
-.probe_out121(),
-.probe_out122(),
-.probe_out123(),
-.probe_out124(),
-.probe_out125(),
-.probe_out126(),
-.probe_out127(),
-.probe_out128(),
-.probe_out129(),
-.probe_out130(),
-.probe_out131(),
-.probe_out132(),
-.probe_out133(),
-.probe_out134(),
-.probe_out135(),
-.probe_out136(),
-.probe_out137(),
-.probe_out138(),
-.probe_out139(),
-.probe_out140(),
-.probe_out141(),
-.probe_out142(),
-.probe_out143(),
-.probe_out144(),
-.probe_out145(),
-.probe_out146(),
-.probe_out147(),
-.probe_out148(),
-.probe_out149(),
-.probe_out150(),
-.probe_out151(),
-.probe_out152(),
-.probe_out153(),
-.probe_out154(),
-.probe_out155(),
-.probe_out156(),
-.probe_out157(),
-.probe_out158(),
-.probe_out159(),
-.probe_out160(),
-.probe_out161(),
-.probe_out162(),
-.probe_out163(),
-.probe_out164(),
-.probe_out165(),
-.probe_out166(),
-.probe_out167(),
-.probe_out168(),
-.probe_out169(),
-.probe_out170(),
-.probe_out171(),
-.probe_out172(),
-.probe_out173(),
-.probe_out174(),
-.probe_out175(),
-.probe_out176(),
-.probe_out177(),
-.probe_out178(),
-.probe_out179(),
-.probe_out180(),
-.probe_out181(),
-.probe_out182(),
-.probe_out183(),
-.probe_out184(),
-.probe_out185(),
-.probe_out186(),
-.probe_out187(),
-.probe_out188(),
-.probe_out189(),
-.probe_out190(),
-.probe_out191(),
-.probe_out192(),
-.probe_out193(),
-.probe_out194(),
-.probe_out195(),
-.probe_out196(),
-.probe_out197(),
-.probe_out198(),
-.probe_out199(),
-.probe_out200(),
-.probe_out201(),
-.probe_out202(),
-.probe_out203(),
-.probe_out204(),
-.probe_out205(),
-.probe_out206(),
-.probe_out207(),
-.probe_out208(),
-.probe_out209(),
-.probe_out210(),
-.probe_out211(),
-.probe_out212(),
-.probe_out213(),
-.probe_out214(),
-.probe_out215(),
-.probe_out216(),
-.probe_out217(),
-.probe_out218(),
-.probe_out219(),
-.probe_out220(),
-.probe_out221(),
-.probe_out222(),
-.probe_out223(),
-.probe_out224(),
-.probe_out225(),
-.probe_out226(),
-.probe_out227(),
-.probe_out228(),
-.probe_out229(),
-.probe_out230(),
-.probe_out231(),
-.probe_out232(),
-.probe_out233(),
-.probe_out234(),
-.probe_out235(),
-.probe_out236(),
-.probe_out237(),
-.probe_out238(),
-.probe_out239(),
-.probe_out240(),
-.probe_out241(),
-.probe_out242(),
-.probe_out243(),
-.probe_out244(),
-.probe_out245(),
-.probe_out246(),
-.probe_out247(),
-.probe_out248(),
-.probe_out249(),
-.probe_out250(),
-.probe_out251(),
-.probe_out252(),
-.probe_out253(),
-.probe_out254(),
-.probe_out255()
-)/* synthesis syn_noprune=1 */;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/122e/hdl/xsdbs_v1_0_vl_rfs.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/122e/hdl/xsdbs_v1_0_vl_rfs.v
deleted file mode 100755
index 7a52987..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/122e/hdl/xsdbs_v1_0_vl_rfs.v
+++ /dev/null
@@ -1,520 +0,0 @@
-`pragma protect begin_protected
-`pragma protect version = 1
-`pragma protect encrypt_agent = "XILINX"
-`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2019.1"
-`pragma protect key_keyowner = "Cadence Design Systems.", key_keyname = "cds_rsa_key", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
-`pragma protect key_block
-MXx6522AObP5IFTlcIuVM7G10F3elAm2A9QyBFfQrckMYdW7hITs7EoK45w7tw8ydIgMKTNM3VDh
-HMs+Frb7/w==
-
-`pragma protect key_keyowner = "Synopsys", key_keyname = "SNPS-VCS-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-IjtXJiULbpa4PJS66fGgQJdnq9Y0Akm7HynNL6VoqZokVHBLnHwCrOpYBv7bgFeWiLxzZb4u9MJX
-abgPdfEsnKt6xr/fn1X32aoiN7t8YwUq3V19+tFlnPO1LwwDx32Uj5NvsZ+RGag7N/mAgcoGj4+W
-d0/yikxyJH/TLTO0JGA=
-
-`pragma protect key_keyowner = "Aldec", key_keyname = "ALDEC15_001", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-wSRGIWddXI6sz6ijAVp6uUwCzumYhNcEGBd9jQ95l4nDkABgKVEJ6J1KDwNWi6J1aIkMseUc1OtA
-P8KT21I5oRjCvydIAV21MXsdMiz4UqKtonOmMo9VbQyGFvVbEzKSQfoO4vvy3YoEQN7GnDg8FdJN
-GDJcbfhsJGwruZdQVi/yk/3rFnWyhIyMmQ5BKH0wpVODuXDAHH4YFkSdwQ3kqM+HOBIhC5ANlsLU
-MYZmBYhxs8kIHDDPx2tIbNdv4IfF5o7CY9G7UwBSesg4llOjBss7hyilEftMHq65Qu3nzEffSh43
-awSFbPsaEkuNTPX3e3XmHIHkUHd5qkZSzlbsJw==
-
-`pragma protect key_keyowner = "ATRENTA", key_keyname = "ATR-SG-2015-RSA-3", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-jz7a2zairo8+13qE3muEnzWZ6XmGmq+3O+vHiFVlYAHIi1hWZJ6Vtv4oiclfLrZnq/KAKT/m4+M3
-XbNNXDaO1dmfsM4Rmlusg+f1AqozFpfksu+r9nSlzFFCcj8qcJTQSwQcJrFkTcBLnbARxexd8fCJ
-cei3lHlK7N5EL2lwZ1Fgu/QGbugEbx3KC+va+K7U93vsT7vY6Vm6ZBqE9OupRaoOUJcVzRT+4pFo
-36aB8aBoz3NRzFofLlaIFH8tg/WlnbraITlZhZPCFdlbE3ume9heT/k9W4e6gjWyXidu/6kwgYTJ
-T02edPx2z4XpOPNEXEARABxwiA+7eOB9vCm9vQ==
-
-`pragma protect key_keyowner = "Xilinx", key_keyname = "xilinxt_2019_02", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-hK4qCHmcVatWn7ok1RC21WBk85eNYbW4km3/ldZiEDz6UpaeAgUa6ETKTRb+WJvJI3zWCFS3OYeM
-QHlJo889Wb7le/kyuhVBV+WDXk/CUtn0rr0y7YVdCE0bOw8ucUo7X1FizPuJsrBa0WsBjnBbMizX
-9P0KG7mmFJVqRwy+c3K3KZN2xuvaC3pB6kHtuXBFkG6haO7QZOMBLSvX5HNM0PwWcMRLEIylN13g
-PSmu4uzVz51mgTMV/fWKuAmKGbobROdznvx8B9wB2ip+Z5ZA264QR3KUtpa2VQQ8r/cyP9vyYsj5
-8Cx5DZn7Y0gv5YCHf45pM/tr5jed7+NkcBD1uw==
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VELOCE-RSA", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-NADy9ZGuTBlIk+TaS7NYzJQBEo8WpOTcEpVrjWmpeYAdPrQ4WEYcKTqMXZyFAZAI/T8qfdsqeTq+
-L0jqM56LiI8a4s+j3wo/Wr4AWg3lL89nnAOBW2aX8p3lw8I/jvGk37kq6K6lgb1lZ64la7Tby6QT
-LnbGMzcWnzKUb/GwyrY=
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VERIF-SIM-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-EWLzIq/OAP8tCOytoYFX7bEdLUkcKrwZyE79F2UeimmxIwrFzUkGPsKXB+piS7Sn49oCM2P7ZB98
-wd9pQsNyy49Viopj5pKBUdTvdMLx27M+Y13ycF9sLt50Vnn8rBOYXHhEXH+cJhd6KJ2Q2r0xfElf
-cwJD+Wanm8YXQ1/FG/+chANRHuuvBxhRCsMVnjC9BCC/YSNSFlALn4pStvfrhsM+gxf1Zth8OkVz
-EM38/F8PxnR/6a69qQqvvbFcnKtQN2QTn65qOWgbpeygY53GUXPoof7POkn6IHhxGd6EI535tkxZ
-PFKnWHNOJJk4xK0C8EO/P0oodmosD1wA3+b1yg==
-
-`pragma protect key_keyowner = "Real Intent", key_keyname = "RI-RSA-KEY-1", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-OqJQdyypoVbXEmcDJl6irTBm2Q5xaWpdj+S3fmPOjWArXcoaHlK1DKahCaviuZVuKvroyfYUhrRF
-qqoKxQR9IwOoEMfYr9Dq0svhJUaDfTW5dFi9AFCkhf6sQThJaDWlOIW7ZOT6ns39AI+oB2rQCpZE
-MWNnHYpZ9G4JXg7shKHdfYIQVq7Doj6jtdbovFXSS4lxyjphG13w+5cCmJMcqhhDMMWz+0d+gAgM
-yEXmFKKjZbH5JBayFVjwDj6nnIMULHSAAcPse4I9OGKWdKQIOR56oFJIQAHebDZ692WcJc1FHYWp
-SqJzQEzaRwqFbzhIrGQW8S0/DZM6dXunKcChTg==
-
-`pragma protect data_method = "AES128-CBC"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 25472)
-`pragma protect data_block
-RpXdHfWT0AgEua5AvwD9wnX+EStJCLm8kG5zctgSzH5zMGNkVwjBbT1s1H9wbuEXWJT/Pt25SMam
-1b7bd3MtG428WxyJ/zQ9Bz0Nc4u2gSEjXsTibKEtRi449oA+S0dXvyU7JDHzLDeboefU3M0iqluS
-yG54FrvpKDF089Rwyg4wygBy+WAtL/wd1v8dJyFwGBoFQ/pzWVGTw5NPg8Xv327QnwDmAWHx2aHE
-SUySMQSWqAA6S7u2sp1Ye7Lc21TDI5LaJwMpzNCld1ZqQbpduGmVDXWhHxAjDrrrLIILNQ5tbTIR
-MENjIChnYlCB4mxcBwCELCc23sI5WBnfzK0P36epCGOK4rkBIuf+HCAtjzQlq1PH3B6ZNzzJNvKe
-wgdpB4SVgxHdC6HPylIGrtIgeL3J78fgPQ8vm/M5BuLrbTWHuKXhsyrX18ZABjtcnW2ziWbLJVqt
-F+Xx0eRcmJQr1aHES1yGtxW42Q/QYw6KZPOODPxO1OIPZs+eLGsnahaULv1ZvY0KXiaa3kSSrEbR
-vLAMgzvvrAY/zWU4FVv6r7sGSBkio1Ap4sG7cFBIsyTGoRped7TTHeakn7wz33wYqtbTbHWVwD48
-Sb5uxwYv6EsBYGk2Ae1ztDW4/FhyQhxFx3mUyjfpgYQK6bymKglzzcXKhv27CE60of6dwJu2jKiJ
-srnn0eurYntMYIDtPrgGDr9U1EdEdBKZbv7XNKTG+1Ql3NujhMMES/Ettn5YOV4XReTWvQV8ESYO
-DfjdKaB19fNpWDdndLs5X5gdACScbMLDgxODlCIgeGuvFA6kP4ApR606YUx66zpSYV7ZyOjsg4+C
-iOM9xA4bbp8l+UZJK3KCFfaBBj+rwqxO2HnViB+vCwip1KnH9o9qzHIHuWDvNNFtdXwLRaXKp93C
-PxBqrtuWqG67RMMMnmFEjCSsHMrN6ou6OXuJr+wlUJgyCMPtCa4pMCedDLJldMlXyBwOc2/7MlOT
-PTTN+29B2M2bsWLpkSSZO0Q9PDsIEcvEXJNKzjUcRuPYBxyTh9lAIgrHKOQMLxO4HcsZDhEhSJXr
-JV6zhRv/cLR5xchHPWvx+fuFQNDa4oYUl9sYRXbIR+y8ft9pRlQLzqHaFaJH0okDsL9PD9euuRlU
-rxrrPLrPeVsM9aOTgDhdN+0Cxi3mnE79cUy3TdXCHCth9IpXuNqXhzpelY2UQj9RUQZSlcUG5hJu
-xv4hNUOKWjEtSDFpq2AH7gLHF7GJnnDEvqY+Nd7VFDNKPDIJv1J1sBv+JjT0pj3raI8Bf6td/ce0
-akAcl5xurFG1N/us5EFvVyQ0khLbqyMlxMuN/wY/eRoISqgoHcTrNBCsykZuhZ/PT7tIpq1gNcny
-b3m+4bUYx15BQhQdxJzKPrIqZT+jCiPWYJzHj4Mivlt5b+J+jTtDdfszuymXo4lmxun5pkgyctoG
-EBEetmJJw9sywVNzGLGt1LLOtJv5TrM9pVUGof9vQEqLvrgoQyjJYwjgNcKYTIzNIQ37uuiR4ENp
-EBQ8kT2Sm0ia5ve5zGPcjhox/j4zAy7Vl28WG3DWojf9oh3X1H7h4C9R8YECElIQb66UT1TIqZ24
-qSWBZfpUmgB32K7vaXxXgu7fESqvOpzZdDVOnbedw5xStG+fal0sBkjPwTB3FAtmEznRaC50TvpL
-IkvjUm31HZywdRY1iXCU6meDTMUs7t9MIJqzITdNeBVo4M4OjwVSwg3/PkXhnJoPDqdEIS888kZS
-xy1OwUvlbtDSsVmmSBXfmWBs7UKZZCNJS2lbl63+CxQJjS85my24YXsF5HNwhqtKhCB0aHuuDTLi
-lopeAyxu4Zgt9/Tq+KDduXLrukGfRDX7oy32WUf0Mx/FyWyl3BzS7mAgw0PA+Cs3zjp+sscMp99t
-7kSDXBCRl3DhVvIWGkcV3hSnZFaOK0sTeHyDMAgQvFhQ9CmX65IV0f7p9XZIpvdKGYl2etz6tO2Y
-Y+i+qyPIEzqtcwa8gkseq3PXyl8oHgzQG99Zg4DUlNhX6HKGLSx1bYWR/T8LiyoBJj7YtmK/EEWS
-NMQGctqNze+qtx5Mhg95SeUk8xleqWoCz2SXvIxmBC1fY0OxrCXQZ62PDZR2k9iv/Jd/fjCc0VPx
-lLkZ+rtEs/2b/SK8ewIzbBAljHbuaju4SOoFY+itoqnRhVPO6CCzfBgwsUkYF8I3O6WDpzc/xnJx
-qLQfOLriD16Vnm2bMTbOXOMfHNKeptK6YTnUVJSOgj9ejDzaHcjU0BDj+HNXsla18kmSgnCPYzoG
-RsbugjmNiGu30aDsZyjFkoacKTUOFfWEKcrwS3WA+QeXakYe1QhGxMftG9HFmSUScIDstr4bqs+A
-lOzco79NBNCGNHZVigknLxdzDcTTwyCtFo7oHeu3q1okNgPdIM0gaI5yAIRynLiFHhW5F0VPo7h0
-44dtXlg5Hw+8WtlzCJm+bG3ltBjcZSrwkLFs5Spj5KlG0Wuhgo60EEK3mpx3SjWJ9ggGJ8wah02q
-W8loucdgsLa7ytFmxJCB/nZPkq52EgvHjwLA0y7xPU8b98Pym4U2BJXfgMW5zer85/qFL56DDKNg
-3fRWj7pc/IJf5THgBiXr7lttzeLZkZ/RSZBvxOlN4FKVHU1U8UA1c/a7SJElMjS/6TEz1g3Bc7gw
-/fozN3gHH7DRzAU8H8PMELjwRANe6n0tkNxJB1ltEpKIPbOEGpkxmmocqpF/Nwy5mmamhAi+492s
-E/nreMijqSwSISO1Qy4IRXjgWmFFENqDapUnFe5Sqm/MHJ9zwSdTKB57nesvjSwNsUpB9P637+uT
-iRNUk0abpz3OdolCVpYz9Bele+GaJbbcNGRFJ4bMqN2oAVOfxGOSbSFntrEjfwin07t9EX1kZM34
-9BXUos153cpYqEcmAg3Wm5aYbt7/AsTuHt5J3dhFuAEfH4a1vuRzm+tbKTmq3KOdzWj6+4fgfJMy
-oK3NGjQRQs8gPvt+xiJfXTNfI+Go44wE3xum7GRlImRzXqN9L54HH/AZlgUpJ6N6HXksAeau0S3B
-EqRlbeU3Ys9CytFAo9kkc5CKbqMxQ21RsJwfqtHTVadMpI00Wt5L/mnQAwYBowcCj/O6YrSiGLs+
-eJc/6c/2UkGBkNqmUaZeA91s17xKHcd3vzyqpRJDSRIXeO4DsnZFdF1PFmDzjKdPJL3wzXRQ1Cs1
-5hkDXbzdcUIG311SqsTgh/iVFIZQKl541MtvEpaNJeu+Rz6PFgxYR9BQQD5ZfR/Fe0jrJ5rOLyM0
-LLzuxU2NbpQkiNEsqNIwKEhCo+uUxApwmFhqv4HskfKm0IXKioXVlvETZealuVODItOzV5N6d8QT
-h3qfyCdbvBiG98hXqC4RNWj0LH/rpCnSo4ONjWSNRN/QVwOkL+gaJCp/aqVDPwmlq1MDMQbjHnJ1
-jFkldNBDbmNaopOhMlBRthsD1U8CTvkslNsaE2dYUcszbudDqDJNhxSqK7VKVUERa+c0NCRtozAd
-8mPH+ngOTck/EDeJr+XkoUQhuTKsCGonUAUaiF5vIpkXYzkuvHnYwWmuW/tTSm8L0oPIlBwqHfeu
-FwYH9S5nZg2SPTTqmtaiuu340DaASda9VSHVHkTh+pSdnJAMnn1InhKCqHSP99u6BXD5pfXwR7Mh
-Vjz+vhi9RcKvhPzS7MI8zMtuOSNnLTuH/e1Em7Q863PJQ4iol+c/047d8TvbynTdFLLQX43HtGpS
-BUrR/sRu/RR3ZXFeb+zxQ7ARfG+WbNwfX2mzoOnVuBF9jfi5tmDVgSYHHHI2HW4BruyvF6J2h9+B
-V6UTSJIohENb0/cWEH6xTAsvtN4qt/p7Xk8PFns9wwUF9zUR52hoNGfIBdjyS+I1X8YVeAL2anV1
-FphkD5s5d8JlZ3VXlOE0j4NJx9lbIyBk4urFaTyMk+OCGXB9xRCAXZ2fSsvZkMgY0yNZiwMnZeKu
-fYcgqp5a5BPzJZrmPQBBDntPTKFWObNfJFArgk5VHe3rQHNgqzI4paCqM0wY0NX9pBrFKXAN0RMh
-opvXG7vo01bJ/y4XR7hoAZ+JdI1jv5ebbGdVAI0GbEngldxu7BICMlb+hkcmVagbw6vSj+NPozhP
-VlBAHmP/deYCsbUtNqhj0a4c0uaI5hjMTbuyhNc4Nr71orziksJzuMIJUzO8FsKGJQ1Aj9LOI8Zh
-ZwRkDv2gWxkCjzKYpxNjWZerUu3kBOJn9QipnXkFoI4IpNiH33rA4T+V36ZSxpd8pidiRYKCtgYT
-1ta70QT83VdJYudTXlgGXzlFwBbqo0MYpM6qegW0jY4oABDjELbQf0f7iRIq5XMNVf1M3N4bac4A
-JU4iVUn4P4KfC7SyO1muxeRnNfST3ANMyVULUtTMSyd6xbpoLmeciaUTAzhm5XMMKgvS3UYzAPxK
-1X55OLFCr1TF28eg3OXTv3fWCXVVstmvJI9Qh4vNo6QAc7V05eWm9mEdJlcF+s3paj0h4AksTiMe
-F4SaJhfmQhDDDUs3OEJdWutU8BAKhWLfVKlLNEOCQG8NGfRbWaWcYJff5EA4IK6KLfiD2/JRx/R/
-eG55ZuhMKkQej+iCV82BN6zhIM92UdjHvQrHjrPKDQWgqeEoszPaa78WrqeVBQnqhRu6YrwJnfN8
-Mi5USq5189NI2MLQq/u3TJkxpk+UEPI5JI0sI64mzAKmZ/cLX5IYR5dB1CPvrIflMlkC/AUnlqrC
-IhUDFB1nUyOM2pzKWBRAzztIUzJ62Gzw3duCgDr2DCnDuM+9mwGcPsbYpj523BihCCbyOr6iOIrX
-nZ8O0qSX6271aUhkhxm2MBLDJdhdW3LqUL+blVQ8Cs8yVy5bIRgDBHZHUVk/AHXQT0/gTxigBL9V
-OU+KTY+avEAXF7ABBoV7/E7zhvU3iZwuEbAez+gufuecPYw3CEeYMoaQn9ox+DCMd/9AKyct6M1x
-ugQof1AaRwqoA9p8b4QkgbNT0a2uxP7KGF6UBEKWxc4C+x71oZ1MS1S5OQs777d6IPGZlU1oZt8i
-/q/tZMLXHC2broMLnyahYMbEl4qVOfZHcM2ZyXvS1JqhSSlkmMz47Gj/+4RVbtn6N7/BUkhis/4Z
-76Je68t/oeSrXzi5dyK4qHuhHWiyf6AolJLdLPc8n0xMKKGlHkNHhV5Kr5+j7TDP4JF88bGVBGm1
-giu49bPMumfToHF9zth9Vgvweor6/OfdUtHm1lY2xbjBMwhvAPtDSlW3JStJs+nTC1ckEdgBKnSC
-blsE5JQNpYwXdHPvcLrOAPR1IkaVOuL35nQsXkyYQJOVWuZUJ0B14MFFT55QC6LhOpeR3l8Ci32b
-947MVuN440rolHDyBHpyn9fhXeX//bnfkxjDnXHRWIMzwsUxdMwsA5WwRZ6WobWiDHDEPNYa8B0y
-9I39ZxbYXxH+rVNce22QY/Ywza7jrm/cuUoK9FF+4P7ga98BFUWeEgxvpbb1cKLbQK4NncdEr/JW
-lQxE2TcQECwfFdp4mZNrTZULsjks5B4oVNGARI7crEEJ1ldosRkl47b4Xrut5P1EO7l2ivXX/qQB
-eurqR0Avp/htL65NmHwaClS1C4bWIwdMEdyK1o1oVog+U02F9m40LfKQ8g3LyuSlNOwHrSkt94Ni
-o2joINJ9rqukG3JRJWQQq0G4vL1V+eIOOqKTbgxwC5ElHMGTH17MhhVjeUbxkuSttgDmxecLLz7U
-dcMvcAoGX994KGreF1+augPGYqB6AdCT597JexqVQqpTJyctpfg5pT8Ke4957Tcx2ah3kFb7h9Fl
-BbuJvDHTugWROFxetVQeKiR/6th4C9YOWpTJsFqXsPK5rNC9yJyhMEA5Khw0qlPFm837fboz4A8K
-P1NLKo+gCouqWQs0n1MqhVJYxS90oYxHFJKrkV59Jq+jelJGafO6Rvz95xd86K5ieHiukXxfOzdF
-sz29916yC1OWDs8eH/vGvzUlWlmjjDlFtB3uuE8efoszjgxarskOlRlO5qSTcBJDEZr8HoqlTo9s
-7zlesP7fopgqzitRNaS2MwoZd2p+w/nZd0kLOqRHBF1wXqYr8lkpzQ/nsUq1/voDoRBYUHKu4KSN
-EHfSv1WQxb02rDKEdPwdP3L/DcdKdXtbF7wwJQ3SVoDVaMXW4ETsboKH4vfQiKLrMU2lwvd67+6u
-qAKKqyClctk02hhrutb0WgHMgeJIWMfW9cKyzlMhuqKWYSIpfhyP1VvKDUyrsr0MW3zf7gw3CeJ4
-YxmAPusYFZkXGv20mhTCU/tj4Svvpa6DBrPwmg2MRPddGzLacwDxaB3q/RwxMS6cJP7vqPCSG2AV
-bNxzyZ8NtixFU3KF0R+TYKaDmibx/Cp7/skdqzH0D+jv75e8wSaaSlo1fcUrsSFezGaib4jtHOiK
-zf28CzEDPSRuWhJZaOc0kwtPYs8B7EYCBOiuaSsH2AF5Zp/ssMmx+KWAFKpEyER9Nxo5yC1uQSig
-Y9fDBR86RTUG187SZh3gbOpRMlw+SDw2No8PUOZHZiTi6vD2yd+q/h67HYPm0goTDOBph1sa71MI
-X4gMbav94WVQm65VkYumz54HfD30Nyxuf4NIYhYtLOdm5tr6CxiEaBeD/Sb1kfvxfZeG94H/npWM
-/WnY8/8FH8lCdHUiiasvY0UYn9Gyrz29bXWuyVTxPEb4f6QBjS06efIrGiUGvVexOZINcWeyCUUK
-r2vjL8e0+r0PdhCw6ljjA7I3UJNs0+PClo6tJarT7a/VWB4Qm6ja3YYrfxpdP17WjpeOpErSBDxB
-550sgqRnVmgMy+JBBjSSTAneb8f29JHNcGTsIjetL/O14tz4lquF9npmxxGnjoF3WNestfOzK0KJ
-utVs+iFfoYTHgh8f7SbKBXUAj/uF+e/BBd8A3uXHMV+z1UiPHNq+fXfiLnFiKdmRNIGWQC3cRXjm
-MkyBOfkFyAKqKpuXFooIq9jH5ryQOh6ZpFBjxobRayG03vj2S+H2DcWRGduxC7+eVUEQergbdW61
-Owz3r4AEGqehMiu6S8WDiLD47akwQFFibsUDFh7zvHUgEMTu2rx1cg1QH51qWD7IFS5KAJNOXoeN
-kaBPtv0ATdbGhuaKbdLXVzbPwAoQKh0S8tOE0Yjzl6Zv3Z9qS2aG0JAq2ayhlMZiJtPRPMFKt6l7
-pI1nBE379Buo4CiNag5k/9mstfbQtYP3nfPHyrefyalJ+9jluXPG6BWwJD6oHD1ZDODevrN/6J08
-NUjCXr2bWIcmh4pPf9Vb0PixbsMgOs5TcNe64EVdn4VytNw2/VIUk2+Me4knWYlyYg/n2/PJSIcW
-rRX5Xdd7RqoVNKk9ir/Zop+y+vtBc+MnjwqofNPpxechute+vjj1qHn2m6dsQMK1Jipprv7+TM4o
-+3rjkh/ccpUqUbedkRqE2U8nXvfJvPfzKbnqFdJaSZ47wDbV3YxIMse4Rc5pnsBnr9pk0+RkGbs+
-Q+AxTRGp/jNJX71TFmtscJbq0MuEm291fgi7JMgaoSYK7CcPE49qsVsdVEkaTTSPLjg0aGIt2YZo
-4KSYS+4YFf/pDQJbYYcMr8xdI7yepC/g4o1hNEjCseq17iEyh+Tk6uBmdST6l8G6lT4DwSDDXbWd
-lVVLF9pIxd7TOw7w2AxMPc/uRkMGFuseHEFKAkT05wrs4w5RbtpK+zKv+PK+OD4oT1ORhphWePqG
-0N1FlO8gjKAAPQKqQewTCB/hP1l0bkTCz7+RY9ASu+YmnG2wK6iOxMGtadGTZMNSqXRaX5IWhCaQ
-nxsfYMVRgLkM7B8hG11QIu4IogRurs7k16iDNlPW+sk0P+GBiJrf1jBHjuig6TBJttvcCyIPfk65
-5J7CW5BpwQeCCMuTBBir8fKuBfTYpDYOnwT5qEzN7RGJLucJRcNx/acBtsm7D1LRie4tVkSLUJwk
-xvu2pmy8Db9vO2bDXcan7976x5b9cvHwrD1mlOA7rCho4gdtm4helk1LLUD/k9IS/pAV+JHoeo1k
-NQREgtGL3YL/mzPOE6Cj4MtY8dJYGWvRFPm7MIfS3GAef+eXIRbirhakUoTIi8D7c8ARqwaxkk8T
-2DUlERDMO8NWSWDPY2Ry7eo8gXbqnbDQRT+/hRFLMicS3Q8QQhx3vWjsYD11VjlnCsmlB6NR6yQM
-atb47LO9ze5BU4xnrgPqCtHBqT/XCN18IF7W6XNaHMePSiag1ulyN6LKg7aaH/W3KjUT8mxRdXGR
-xUA2Z45cei9TxWvObKR80lyE0ZKDQw0+LYNn9+32YVaUyDEDGLqsaTBXGhsArM1Q6IlkwvQ9IjDR
-OV7PPy0cEBIjwY+ZstZ5Jq7DpmEuppk7mX+FZZ+C5y5wedIQXG2R5mbaCWXRPYaabgH4g3VAirQq
-rwx22l3ErWI8RvZxn1TzRBv6zFXGr6sVHH++rWrGvkWhVL3DsdEeVvyoiTvxlwJQk0xI1mC7Xb2Y
-XZWKT10tTBcjzL8kydLard7f5h/JPFvYa5hsX3ZRibga460cCl+eYRTESXdj8vTqbJqpdvL3Ihes
-JTnljmHqv/F0od9PhHjK+dcksMFdAM5sv6x1oUqDM32MT8Rp8YzmJJrBGEARg2OPQglcFFEd8Aqo
-nBAfmPKJa4HOqYKwVf/DR8Dg0KugURM/EKS6ha+OTgdT+RImDi7bbAQ5Ml8B8RflvMwxDtxQDe6a
-DhFPSIxjucvXnRneBbcN2VxLgA/x3+2t/6+GEy6DClVh1sBatwb66HFSZwl42EyvCrZ3riGwCRtf
-onwXRjQotAunvNr1djCbVrSN+aELJ/xxjIa6w4AA2BqjozcEhE8bcpJBiXDG5UO+xBl5m/AOZ7gD
-cfLTQ9ClCR+upL6ALBSjTfLEVAqxHXOBLvoMCg19pniajoLUzXLmvVsCQkf6/2CKb0cClEECzq5Z
-QaPQVfSNes8moI8zUoG2ef+GFz7nwvZT/xoy35X9GtH8bJUlRdTR+BtupTy2VUKp/pt4oOjVWilc
-vYv7zsAQ0uvt+Q3qMv40zi/mFbxSL07r+0KbzpTCcCic74q+NRLYpLtT69xE988Dwf0YATlmHCzj
-SsFR3Z2vT4BHXnIT7XZeWePk2HyC8n+aaBdDiTBuYtMvePbG8Wc5w7vEB9h0EB5J0cUvyuKV8+D3
-pOJzZwVa/R+frzZypvLfgzOumyulQRqTkC8lsYcVwwNflj4zMtAq9rn6vOvftaiBGCRxh+RO4AMc
-qCZYaQUv4AlXpIhLQynMp+QXndtbHt2dKNF/V6wqSiDZkYT8vU3H3MRF8SbawW+0qzk5ru8AvLxg
-hHgjytN3edhj74DDvrC0sdB03hGffCeM1ryNbx+FRvCNIRpaGE1bLWPrLgx8UCMhG1/en4cZnNgC
-rE3PIgOuPtOCBRghVvDHIAq9PPAWnbnP2NlGznqv7mfqf166VkuF5s5bQojjAnc5xtPFhIJ+VoGQ
-VZ3Wegx2cX8iH8gaRxqiYoI2BH9fXA5WXUzDijlrAHyor434x1ID8a6LTuipLTcUVV++gkdmCucA
-PIZJwI2D2h9A2meARQfmEXl7USPXQWpV7I5wYWsO9M03F2Chm87WXc/tpAlmkLGEZQDPxhakR/S5
-pd1exBZZHN0DXYBjxsnrg1pB28W9GKXLHVNBm3Eqessqt0hTCjk949TW6vzGilhinz0aA2tvFBzI
-vTHSIMlwvySUFat0Iq+vXGDRnDdQm3XcHHoTm9HDtxbfSrnTyoapQ3S67sqCeUGowQZ0BWHSMxxu
-t81igSMxOBTR3TUM+6yESvfr5Ybx7sHJtlUmlNcgYYdogHufYUQAJJTaQF2scDffLr0nk4LPyxd7
-dRtKtftK/nUZCNA5+rt+gfo/hydI9c04eBB7GsYwP/YFBit301exAHUcv6CO+filWwljyqIC22bI
-Jdv7CwzVKjIyDE/hV9D1e1VLpGGWvqHTfaT9LviPoY5feTzYaztdUwIdp0o7ZXrXBjXg1PIC88Ry
-g+t2qMkV95Z5pFjALwWei01A9aqzslSyEqmey22cs5/cnzfME3EQ14pUq3uZXEu+axHLl3u+W62N
-btqzQ2WhUjDuGuDIV81oJUkMMB26VGT9AieIa0cDkkQqhUOkJaapxFfQ5aWRbg8U3q8jX/MrSElS
-ApFMOxHVXzXFu48Pr7q6zjCeQgKAB1vAV5qnkTPiAs+C7dAqNCq8KcfrRZjVq2Y2lKNlyknaWfjH
-cohKphuMMPs9FWVFy3r3a23fT3/raCMRfxKdByToZkyYrrUgdtFgD+JSJj1F7zH6oHCTiWQOLPA9
-KbrmWgoeN5iGG0ZJg4uDdmlAh6LSHH4h2fNAEA/UfaM1n4TfCa1xHMwlansU+3rXJ5tw1SMnve2Y
-X9ijIqcjwK2huSJEXropVulyOXpYC03Jr5Cp1ZKILOkEdDexuT/U7tZF3+ZtRuQXyQQiyec/Obl8
-ZyO0VUvKaO0VJRls2ODg6pD4fgU9kR6n+E5y5RpPf5t+uI1xfodKJvpvas+DP3oKxnR6VJPFZYj5
-GgQxZ9W71I7qpKfdAFWjupohBrDSrQnhZ1hQyFgeMyKGMyZVNgOIC524C7IctVWKQtB3FrQj/wms
-4zmFDQf001O31E1saMeoa/7q44YIkmEscPXJAaKp1C92WGMJUduPIkBAvQGnR693h/YlUwbjiIXo
-9ZDgvwxLClAYTD/frwHlp5Xodu0GTrA49192yMMCn/bstDuyvg7Eiv5tSLxSM2tGoHy5rUIIjYJ9
-JW7PWddE7txkMKuS9iPLsj+JISk14HQzKN+jEnfdKbZC5JoknaLRDor7H2pzDfVnUNMZ55hM/CQd
-LjNfYIX/7aE3Vs6AzNw9j3KVXGT+clToJ60ie7wh8WS5t8e5C9poDLuZy8Fez18zixUwAStYNoPC
-iXewDuo/zwRHQHuQcEdQKrnsnAU1yIiTbujkCQMhQ76RGSyPqrXIAgD2awiPYbUHkxb0phIxZz3R
-Qe6flbIsDm8ILVtN2A0ycCcPhCxODJdW2VpvQ+ZRoMUDCIK8YCxpkcoxIcVxv2CMIlMQI3LDu+Df
-8hxHAluYT9sWMvGzxUZOCNQ4J6JhidIATWJ1yGE/E455pv/lOjX1rRyw4jHtJyVK3DddeMiBzcC2
-HBPTkrEVr1wIUrHHLs/AkBJhWAUUkbMOaOHgkHr8JzwndjAgkWjAbpkahYAoQqn4fl2dqQ+34tx/
-i3d6NQTc7uJXDUH8d/QkZk0HZ+uukx07ToNq4ZAqfWVWy29HaTz7HOO1gdmQvPQpFoOA3rsRTOCT
-Rm1ir2w7I6j2rDU/gOY4AQMcjyGWFTEMKn0Ewz7JC5Jc2joyHaO+MqPsA2ZhwsbPR/AjLgaWCPvc
-sSJAQw0JAYi7IIvImUlCmVWo6VH4ls9c80ZW3YXKMI0wPgA1O7xkst+PZpznXmtWDSaGxpJ7ltWF
-HffYWIXAGz7FRbVgOda3cOT/GV9cOvIG94KwMXLzqhAwHXkddYKVPPrLcyGqEIcPIvr13Hu/7TzP
-Jilv6w5CEbGngWDmtVLqLCgh7QqYO8t3JCTndD0X+x1lVlbUrTAM90I8FZjqHr0xFHOor3ObHMOl
-A90tVINpGdAPjKyLRmE+E0c5Ugz+p1rNDNhFXClmbh++siBqga0hmhlPHcfi1mlWIh0UZcjts171
-C29m2QCbNEQqLPEWfjnIEw6jfKIDoxIrThLiuIvO2qRJ4Y03hEcYjt3bkT9CmCGoE7R9rwXLBK9a
-D1krVYNMF6ws/uT81Mde8eeCoIo/jUbIvREFmXuZfWjagBv6zYNPM7QiQzY4KWeErApC5KizQuDe
-Vq9mMLjdi01iW+PJSK+EbViSFTCR5ce+Fs8elhEshBTL0iHC/EsX2Y9+ejFeGFo7NINfDYM6d18B
-9Cn+eBo0r89K8KRrMjcC0wPaNYaeUcPmF0d+W5O/uWxCjy0mtwsvQgY+zFTOB/aW6ZkAYxW2thIq
-wipxwL886pu/8jnfRO671RSHmEQUg3Lf2mvxvqWm77WurPXVdDyigbXEwHaFXqZP75OWOAa3urIv
-h5mjMPoxx01nJF0B14L9DZBQXaC//pIpPqeJNJLV7lv9C20yJy6U7ZWNKxL/trNNUXM9N+WxWvBD
-POlkxKhff3gTvvC/R7228SJA64ZYvBs+JihS5faS3UIcEuGIip85NWK084ijFpLt/pa538Hx/yoE
-NSGEircFYUd+7AWkub2nVc/1kNDcoyNAKw9i+l6i7uSBsLSPpKwFib4d/ygLyTW1XB4rQbNUXvxM
-+aqya6zBbXIUaGxNhXo1izkpcfeAr1RfVdHtlalzq8Ny5n9a/mjKbgsBn92Xg8MlPMnHP9DLoImi
-e1B73jsunDnYTbbAE7dgd+8agnCCoW5qMXvRtiUNNzy5+CkLdn9doCLykOvDhOaQrR4R78TtDXgN
-ZEAetI3D0gsdfbu+Hn/IgLYFXsx3yKdjbyNseYHuQvwg170JySqkdDQOuw7vQhOSa9R1sph1f+3a
-rzuxkjxaZF4gepgwymlg3+AD8EzA7x6bz2SX5Sda+6DB5PwIepw49/webMmsAVkMTlRa9xwyhz1X
-q+uMHV3zNFRibX92zQLpBqSveYrMoSF0msosIdjGewzmTKJDVWSss8uX/V7mVChwtyNYGEkthWmw
-4rlcVSVsaBwTnebfOklPv/2/QjmSnPUwIfq84SBrZYCxEoelaHr5jWBtWxt0bwJdlDeCeAZZb7bH
-vJAVjsA1RWIFLfPPjBOGm8SIfL/7/uKncPUzHQ8H5scxyyzhCmr34ICsY10YzHX4T67uuA2gPt9i
-l7rfPP895jsLxhlFnkCZKRCa3W/RKCFFUFI3lXcmvrGDvkOJvMOWBDSq2q/uTjkJ1zvYcRWwfW8O
-x6FzfnrD15qkfATDu98PVHRMruCO7WutBqrzbRSEmbrb5/YCER1+IGQXwCCSSrTQnK0h2oxgcxbc
-8LrPbiOybQf858+0U/Z8qJMkYhagnIp+/ha3CcN2fPTiWCfDlD8R3w7zWdNYyCRS7qo+CDoio+6r
-/e7ZJGymOzEgFy+eVbLbrzhcLPaQ4VBUcdoFfyDT+raMQBCU/Tyo2KPttsT86Y2Gp1vNdEZEmQLw
-FCogxp9br3e6q+JWdmQvvEbsZeeY34S+jo6R8XLtdvlklbGynn97vgc4f1f/fDvwl8vTG7StUwar
-R41mJgP1g8e1sd3Ft25rJVQXjDt/EfnjOc2OlByUtHAdiEmClW9I0n/VZP48Zw9n9fMTd0kN/LqD
-TgVHMjZtXl816vDcRYSFOVXuo91XIFtJbvG/5PQXUc47+7AOapY2npKa8R9lQFUdhwHs2y6oPCtv
-IX+r5zmEQYxxqwVnDmQ1+W5g0ToPTaXKn8aRNaWf/SLN3Swu7SvgFH2gEc53kZLx94sAtDm0Nr7o
-A0h1MdUkkepSi08+CZ+9xhJ0LWq1R8gckHDi6iJuJZjU//odDilgGJ1A/0cbkWqyiccwgXQHf+Mv
-APjqm8GfDXflXrChVl4wUeJMN6+2pKIYHReFN1d/u+kSwfbQ3HUnbZ0xzRzEPgOUQQBH+vS/CYTe
-ZjezvpVijejuzeepJMzfo+2JsbbNXWlRjNcXjcRZnrCX5xvtzFrFGAhU459LhTYXnRzDO+Qo22+E
-hsdGGn9NjkvebG9CDo1Q6mt14Kb55RYx1FH7TAS8TM1d5l+BGelko0IyhZiSOLIeAm6oBgCuznDN
-Z+ovHBS+yoHgN9AqDQfspLgX4Zn/PCofYmPwJL//hcVPSnJLJ5/4Y7RjE1VYjVOM7ITH8tBJ/QiY
-xAXCmZ5Qr2DqIN9ZCtF1bi1lQF5BVzAuf6MyOGrEF5rlIDrCFU3P1WPkNququ4JtZYZKgsHxa1S/
-erLsLCD4rRw3zrp2UFxEmQOwZecmwHTugktcErDjE9DduYCKA3C9fFr43slnCDJYlRkUH+vYgleP
-5z+o4/3iPuvziERCyeLTzhkt+NHjFea5fMVyZMeZCBjqI0t83Rm8rkpJliGPH9/AtGeB5rdJTBoC
-fwNFfihf2e32pLEAVd2g6pf/ja1HYbUdxfjLoHspGl82pg3z0QW92kt51WreNV5RkCznnVLiBZ64
-PLO5sbykPgHy0qKhMIPjUN2vcVPsN+FXKmHaFCW26pE1DZEna3g2o7+fvFh9MR6LmIf+uvMvo7WQ
-C7ffAa45cdV+zXYWHaMJ56wBvxYxLhCnYVoWusF6PDPq7nD4ElicOcr6iiH/qayVpMj3UhjhEEJ9
-DeSPJRcl3uwR+fOG+3GW2zrMsbqnuJl06j3HYkSdycsOW8EXnxqBJRoq6DY/9bc74RSWpoUv7irV
-n4vEjCmTH4FjdK4WRbkaImyn1Lzq2+a+wh6pg5sK+I89GZcon/oP/3BUHf72JXchX9FPrD7mi3WA
-fG7cVu84lc5n2Q0R8O/3uFniVmClM1r5e9muKYaDl/r1Foq9Yo5hGLZRDVUiRjm/Qn8VKE0Iticq
-s6y0yCYZkBX1rRdCjO5MoZtcKG1GpboqEZYCa4twUnVicuGNsXpnDKSjN8ZZRQweFd4DISyBRdXb
-GXPNLb6wcV3r+Qbqp9sirFmlnmSWelj+woJNNn3ys8nXaleN0+VWsEAuCuYHBzUC6H6G346HLGHB
-Xeezr3jdtcGShW59LWbeQrKhb6wxUBfyDsdXy5hNAM4/4TzqXGNMcFQ3H/yhRuVpKHRvz0uzZr9f
-vXGnylN3VyhzqrESXRUb+RVgkB+wroLeNobM+fX272Q8hxRP3uoDjTLIhq32rvt26aZgeXJ7AEyc
-3+PI9sfRe4eZIIJbRRvP2GMWWsVnobY7zszUtm8PTpfQCtucHxxPhf1Fwr3kVj46yNZ+GvI5ubmO
-W5iA8b7RHCA940akz030Gk3QD5h3jVdZxOTN0qGnkISHb3kjNAKtwwDXJaH4RgcEIXpLM8YXbaT4
-QpIHXuZxDbBignIsGLJjhBgYvETAbp5Wo5uBPOC7DhYhXCPdd8XdNr5EgA6cUF1RUIEXKF1GJZ7p
-+p9KRbqV/Ql3GFoKpsDwusg7cnlPg/gbwinjvCgcgVRq9CEBaAyD2Q9rI7vKr0/EPgBjEIOBiYls
-/Svzx9Nur91zwEmmsTX6PVvkxZSXGp9fLgSwfeXAsfNPKPBR9cyAerPXEsKIi1VKVmDko99SeOjk
-OsI3dU5w7ZxeyOpyGcT5MDy9MvXfwCDN4CZyrCD8Aa5AepedK1Jw+PDwRvv6q28dLmxwAoULbNgo
-S7cQIoQfTz8qOKliVycae0SyLkjyGBIxDq4mM1eJifOkf0SGtYT/C0yhHrumCSfVEL58dmVJXIVj
-+TFS2ddwQ1/GlelOHnaw6ptXl8gY7Yy/HQI4SoJE8XBsSDjvlARDB0szAhro9MC+AgOgGbuaEwu6
-E95RCZPfwsMFF1HX138RcvpnbLxsFd2ttFhxJUWGvo44gI+WeaejPS4ONZ9ba1aU8MJ4ya+h72Gd
-/nZqJENF6aToINzx6O4nA9nHBiU017Kd2lKYEghJIoxaaVHVXeMqwUW1T60sjRjeNY3WcU0tpG5k
-IhTUhZi/ZcY2tAr4TscPEjcK70qozLrFpHggw0BfbVAExBd7lcWagKLdA4f2TF/7RyAH9ICXO4Z7
-kHjPqr4EzIovr65QDz7HajHn/w4Kv179gh1z6PptAeqLp/T5htnNpLVMyFlTQtxV30AaWGdtKEi2
-4LfXQLRdHJiRwaTiebdP00i/PQHK0O8Rt7jEQajkKvHM6AaIFPr/DsB05lH2inBaE4o4MUiHoVnZ
-82NBwcNJII1zIkAmIx8gIgF8F8UWPZTzfKVZAjJjUXnYYSBW2W7rZaItU0UDi2v/fLJQ8UCoha1N
-UstedUpVSg+8PqoK+d0Z7/6SgKb5JhIj35OxjpN50YzCdbD84+dqBqELhSf6/uNk51Zg4X3mr9DL
-+OQC5Xh2exuQDwD2EPw/Le3jZ0gUbrHlgitGtfaPDLKijnsxv8mShWiUkEd44O6niYiwi5KT9mLX
-5gCNxNfdaTehwuJI5MIxsNjvNBGvjGjg3MnaekUJlwitUzE8rXlV4yGbQ9aMwEzAif6MnqMI/t4q
-zF5QvGoP83q74TniQPwS+u7ZGMuwGyBoDhc2aPaqn/F0Fqk2BIgga7QSxTUe4dqa4YScGU3Yg+aF
-6dT8AlQG8+pG3T7XqOS39nVWvnzvFlM3W1k/sttgkQ6HoJPhwqFX0l1dWv2lCZVfd87FoHQGeknz
-N8/gpYbe6CFYnY+n6VdiiqiWkkg61+dKcaIexT95CEfIgL6cufdDqblBuvuMQ7S0aArvIUlqjkVf
-Tr7ai/xMss+bXdp8OhfPSfVoNnolE6vUTL/x0Q9e+3w2o5W3HWHl3niUyDdGE1vcJy7aLSjr/J9u
-v+kzhCMbD6LxhV2Dksp3ekQDSMzd1yDdcO8av99Ay/w5e/+rgsPRAFc+nS4iWLK3p7H2133FXzyq
-ZyfG1txpqiUbMyRrEM6P8M2Mr7YCN210K8JPkva25Q9pDhi3+F01taksmtZpVDAfbd7CggT8wmem
-dgeZ4C/T8Or117hoxSpRr1J8b6Xio8yv9aFqTK50PKYv44I4AL1xSbCh6B6XIs4IHdsZzBlUUihb
-MMxiD6UiYDTS0NP8DbHMnH2r2myA0GUs11H16GPi1BCOTLH82UvwfQxhvzgucCl6hl8HziUpe8SK
-FeMCt2I4lnoeKhIB2g2vTOHZ4/kfWuLQ6T0P6A6ny9TlveHhoDExZlBoDa5CYWE6TXQDkyyNypoR
-m5sbzalSAkS5B9UcqTh1D7i98t8XwlKNdxsHW1D13zZ8FfhWQuj3ajfjJRbX17pqOcvIqGzpqB3q
-aQSebK+/YCZ9Zkxd91wBxDeDg2mzzv4RDUXGCu0TNzKbajeB/hAkpx1dEOQE4hEuJ7Q88fLDZgNF
-9vifjiTuEBiK7dD19H1Er2bfEHbL/ADJj6A3j7iMmeACPlZzvx6BbJyeOudbehc8jA1XSyKofWUn
-YSX8jmqb1LeTKvNhRAvbPJW6md6mENH3xJ9FGN980eMQDGHGbkDTmtCwn98+ysvY2sPnNgZJNHOD
-CJ0l0c/tOt1wfeZWSW7BinGA05yn23fpwXsTPFcjlRfSWhOGahj2AEZ4zNX4PL8I+zZ70wSidzP6
-CKAcpMRf9VhWnN90hpm1CNHYI0waOileJZ16kdW+U1PIKqIKE4YUUFt98e5RHpb5bVm1EM1h/qk1
-iOerT1mJ9kMkriCC1/onWeO0sa9JP1MNjdIbrHcpShdhkTbnkrEfrCuSg8rNgn5KFirm5KwsSkUk
-mSnLg04JYl0KEHMEqvWDWtpJH2jaNA1DPu9soMN2l3cUuqTq2d+yl8MWqc7a0+12f4oylLk4kCP0
-jq6cy7CPy2pW2hN9YuIlqGlHjJ46vO3Qt/C2Ep/MVjPNlx+DHxR2wK/olCL1yAlRoUbDCxlWwfPS
-zO+Kfj4nI/zRk5000/aZkLr9IzfSdFJNorJ1SKA3dq3H6fBviSUq2RNrFEQorT4uEbANoqOVS7Zz
-GJV+SMekiDnx/Jtwkmd5s4App41e2OCh0Z4Sgh9Bsy1rVhzPM3Qv+p/jxxQThtB7CkGwB+3w+tnO
-uxmCTW060YQYG7958Wvnjz9Y3gy2nHc7JxykmEEbla0xhZgisChlFIRjk4ZnhqkYtK+2PzQx/hFq
-qko1NMmEm/Us0hKTQmYS9eGDiUV5FcCxwY8n8VF4lZ9GWsz/sVNizHXYi+Bd7YJEWe0DfUMj4mkB
-LV7X1caT/xYYvZyiVEitXopu9dr7dZnRKNFbPLtmv1c5x4UbkI974Dt3HjxhBEH9iZlU+ORBPpFE
-lwlFU9tSbtSZu/E8WL4VGn12l1gS27xXndTVdx3R0urO//wlFDu3iQQBo83fwI7ceBmG8G9kbjN9
-6mdR5sWo4DTmDAuYEcX/AZVKKaqvB1ZxYln2ZMbsOQa07tubsB0RtLGyvcSzHKBg01wCEAb/FpkW
-MDsKUDcNfxwzLUf8usRUF5Q/JImw6c625KY06EEFWEXh3AAwh2Z3PZF/WXG6prxl0P0SPIs/7BAy
-3XZMlv6lJUI+zGDGs5QnpjjUdxsK6ylRxIfuygQHMaCRaVobV9D0N97+DnGg/CNL35KElaM9hbqe
-EA1PAlrXUcTL1QvNy9mW5FqMLsdj+RsE4UGqeovA1Ln+nVFtlvjKSp49hQgqj+sbAa6AQaebnpqi
-80Nj1ftLJuIl3AvDsyt7JDKo7oxKAin7p/ddSJz7fYZ4ACC1Km44MuEOHRCyq+JWmmxEJzlVhFGh
-5vtgRLo+n7iEglPqB+784lZXmyA7bNMX9ZQsdtO6Eu5X+2rk2HLcE06KeduQ8h3AROCRNDtEz/J3
-GzJ/XwWd9xl2oci81wVmkgg+nwtEFCoxBoF5C1zdmuTtOmNDlYrKRFvrczB49V4KODxgViW3h9X4
-dmbpEL9uEi5hjwaTI+kS18/ts7iYYKAqXK9wZ3zTt6pRlz3o97+4j7XNfTFMy60D1Pm3g1z7fyPj
-2wlEdt7VQ1iwkTT6HsZ+OAqgdAynO0KbS0COJ9rcjzIWR8HWO9HDIjUWIpWARZdM5SJSY9lUFcxz
-kKkZYIEFoo5P7uE1XkZJjbxAeWlcFm7htqNqTAxhc8X4vK8sYJCwgYCuaRrotFBRYQBe1noGNAZh
-K9vvkyVt93/Rc8mEklX+NYrNWW46jcju9uVOcnJXDz8uyTzrKeLRHpnxqVFZuxJkhG3l0dmQBNyW
-m6TbZv10GUeU2KTRtnAaf/2smLwWyv4O85bvJyqJIsFmlN2uqm4jRAqI6qhrnPFr7MPpdWS2yLPe
-Bp0IzJ8y9o1dYvbUQnPjpeEuAQwa6HQA7KJpCYu20mNJvPBnTB+e8uH1yVfThfpi8pqQYgzNgIh8
-vvgCkVqPWyjqoOXLXG6g+HrrrHElRVQvcvQq5CCer31rjdX92CkGDOG7qh60YyPJFQNBfTDWhrw0
-lxwH5GxkZjFwHMFsHMzQmhnnVZVXQOFpGfXBTImLse5DFiyTsswodsdUFO5nIQbu5UxWPOjJmZEt
-dzlg0JbFJNB2pU6Vz0quV0ZKsExoj7lEJ6hUmNhtiozl4OzO91kjOiU/d8SU46zbfvdh9HSCavrM
-Vb4WvuaBGC5Lof+FpxEa8GV/aOGdP/QhojQyGYQDNxl5/3kErTSBh+MK4qsal1EkT5W71QN+loLo
-Hc+s4Odkek2tRKeij+kRcmFxtnHLy1qe21Ibv6ze9y1FBUr6JJj0Jtyu/2ZoAQT/bpP04gahg980
-DVxBi/6iK/ww+olAQ7KxUTeh7UsCKtaD9XIDgmAhk3J/v8U1d5YjfTBVOXBw2t9qnrPIm7vmUOuT
-6xvVuwdKBcgU3fzu16rh/GjWVs1123w+R+E56kPpmItWEtQ9mJkAAfi6zFeqxcwzLdqstxFyy8Ge
-V3NYnWyFE8zz5wBtEpQww2Cfice6dIv4Yu/sLitfXo8cdbZXcDFYP87yVYGj58AXj1o5irrMjLlL
-L3Q2iO+894mnb7Q8L1aAs3Mek0n+IE4DDsYnv2syLEHmNpXcdMd/mViRwOiDwg1AY9zWpvpRQhaq
-tGOF2RTX1tUIbPLOFWlBr2yU6hUS30RLqJhZLoBuRNQqvxVNmNpUHp8F/eQrNMwpAq8NJhS9AJgP
-v06//VedaP/IRDHm4quGG50bxZDU3aLA7/9c3rr4+UbDVSc5I23iEDhyztIFKNj1d7xdVXVAZSo9
-+pBrHdny9HyGN9pt2OtdYcJyCox1HKXbK7R+wYYsMRJzZNEgPGWtFf86iEITOa6Uk8AHhyw6MBA1
-YDz1/rawM9WyHjxHA/ifWna2GRBDF4tKNM6ygtKDe6RChZvOgBmyY2yrw7mocTzbG+2Mc4nBk8Wj
-aYQA1uEzCKz29zDX3H48ZoVjJLCuKysK40xMOR/e9KhgTk/4TL2GSRfNDtbs0WgsQ04oWP1wnPll
-lesiB60fPAdlcHE/zFcNZK4/AIF/J0eOROkT3cigXujdV6m+hHCfARg4TnABK07wwGdp5Ie/e5ud
-dKp1kS+JmIc5lt1pZSKs7aIfmSxF3gCjV2KKyGvYkcxnGzCMFReSeIJWwNA/CBTLBQB4pNgnsHkv
-3VNNIdFU/2kMplT0LoNiXuVs+hIB5aPZLV34Xf06nFDDk486kcbGKpWG8BU8rmYjMWrp253fpUua
-3iwx3SVhtmBHlGQyMyCGsSNAX+QLNyMpKI3dQEupKebWbyhlU5tP70lODOcehIDgf4KiWqqOL5sW
-z8xy6lfNgHuyNMnCgwwgw3DTe9M9gTxDZP9+xXvfwDX3wQ8A2J4sdpS9n3e6gFK/uwMZrW8a1v7u
-YGMxJhMTKbwv2ArUnUvI1ajqrLj9G5Daq21vi2XOQYyqNsR75wjUrJIKLaYQOWG3UMsk+W2eTTrB
-VKRvTNE/BW2Gfz0XnTM4EpGCswNvfMTGpYsKg0lIE/rTe7+A8bKM2z6U7VuGWPd5lqa/KFhbf4IC
-86k3KU2Q5d1hq3x5MJrske++OQcZ15HKaCjL7i8WiDDhAOioJP7z3YkP922Spey9fSjgFNBdi0pq
-ltbRj/LYujRnrNECBj44gzWwXwWKqSegA2XTJ540u5jTE15DGIB8qD8M7C7PjkFY08msXXi2id3Z
-UF0w3uEubbhmOzEdECCSE9MexMYONGLVAYkWzPdnMNZUMRQFbFwT+jNtA814Y1R7I8H9YYhKa+P0
-GNK0AqQqnr5e0bGlqrNFqP1VGpOf3QpneHUMS2wyu6UndrWVHJnoGKifuZa0WScUMpzMj+XWV85r
-b+9w6namjgLkjMLwAqyg5Ju8ny/lFLhRQ/ty3JTilJR6NKDkBV2mIJP198PG9G5/VqJZr4bspXu3
-szMmtyuyS2f0URuvxM4m9m8wRliOSNC7S3pmETxhXP96jQ3JAlo1XsvTdwJQ2GRWJQaXtCx7yn+7
-B09ipPsIh2635vPNTt6tXzs0n/f3oUhGFll5SGPYDY1kiduE0XFgJhRUQTDGDGLfM4f8xt9ltloe
-Wrs+rq8XOKVZPzNIz0whBJQdKbkCCkMdxy3Zm2eEYCz2ob5+ZAJvMolPPn7KJTHII/Gmxes26FG6
-qYWfRdW0B6mVsa/NyTtvRo+wHV0kM6FcvH5EvivCRmq2DZ2F1Bas1TmF+XQWhVcbVR3WLX7YjZlt
-SRASzdQPu0wLq5hBIX27IGf6Kofy2ox1Fzh0HLdYnf7CReBh6gRhaOIjL2EorTCMEFMVvB41t5WJ
-D5Kpugdfxmo+MCx1glhtOzAF/bVFl5zBN8kBhA9AzZczd4e+9sjhU71jV0u9NQWqwgewYBUT2USP
-/HW9bDoG2sHhmf55QcgRU+x9YVR5e60u+p8ngKL6gZdYGmWZNU1+0TlbcU5MdCF2GQjEVxSemeZU
-VvfkCcC78E9wrn+VyZMzp0k2VuCwC23KvseuTW+AarEmCFK8MQYJEn78t/Ic8A74KdNFvllDQNQf
-DXuJpMlxr6N/0hJdQBrPfkMpi9UTRm7RoMItBjRh3HVYyOXWB8oIEZ3icwMCwdKnEBT8UlAndErk
-aO+FweoI9ZSzm8BkZUhGSP3rGDDU/mSO/T4aqt0UczWKqc9ufruPtKzmsy/R8rwsZW4hjbFxobUw
-UBYMAaYQniw23GST/C8T0B6EH8dMHZxno79cNPqzvUYUS6AlccQeNyTpQHbFl7EUnnIaEjLHwetI
-D/bRl7J5ED/C5kbGkgeFayMzGQ7qNmXtpEDTF1aUFO9E7P0dYj0cGvn/0kpaxwNQrjvo0qYmb2oD
-sZymsqvENnrxOp1G0GIbFTySTewLyHSft7cYpUbL1uxi6rXDX2lezcO1bwzGIUWbzmUfTQReDKKr
-YlUXgcED2vnIyqDYO2K0RD2w6sh7mxUum8Fw14exgkR4t9WB+SQWst+bYXaHbIEnQuafcGDBVuBF
-v4sAV04/hSvNVKaZ5+fNHfBkOriHCAU0n2eSYiZTtAJ8HymM1yFBgW560QWkPpLlg2zksQuz35k3
-CmKepTgW6SWbum0p9Sh8eF921GpG1KWWDO+o9LNgWqfrUCJ/vlZLCxW+h5CahWxkTjS9Wqe6blD5
-IwoR6lJMackwoXR4Z9rYMAssoYrwB7vSpm1NIumkSCPlFPj3zuSx8BIDP6R2GIA7z4QduPhcS+p2
-mJAHWmwLYZvRvI7zhqy2kDvA4cc5MRrVJFsgPHTH+yZIT27rn8TjOcuo3M61JCuda7xrxuomkche
-3NNmcUXK70XCE9kBc7igO9JiLMKYG3jgeNYdmjaxSupomABYzFbEVFHME1aeFB22fRg78nQdMhLp
-dFyIDFnVMawL3ElcmfwjxdcZr9HX2nniIb2WQuJI4mMAGV9n+x4AlY413TUfoBjr1cMiHGdp1tVu
-Pc3Mo+e1RYIalEES0R1PyYhZHE4o/8JjxdKjSmQ3/IxCTugdYfnhvseK6B2PQH4kQaF7cAGB04A9
-vsoOsWgS+/ad9iVTbFD8wGbg2M17IrGHowpQxP/3jh7PJCbZdw0qQL0A6eE0V5Cy7xSH80fPFH5a
-xeEVT0Onzj/hN0cI97GlX+9YHgyo8QHQO522lpHdJV5ESUDO9yDHmlqbaIcLC2A+iOQz5SutFMPB
-LULbfQnOf4M70c5WO4+6eHn3TLZzjFfqylDehF/2z2/A4TpEj51yT6p0RBRemrOawze0VaGbKNXw
-XwDejkHcLCJ8AYBOjNhDoktBsFk+6auOELWs/of6zxomEMyvJCSb3jiIPL69G0KxTzSdYv0cDj7K
-BAZ4zJGho1wra2Gy5ay66oiODpro31BcPodZFQCBAchyZcfrf0NMKlxsw3eQC4B/H25NPGrys/1t
-Xmm9k7ejnyPP5FdJF5gSl9sgCfhq6rnpIHTYSjCQrX/oCEihh5C5hAhBR0ODWxddjjDwLJoeHJEI
-+s3ewc5mBHz3KRP3U1W0CiEGfIbUQlabeeYdVE8W8SSXCReLnv6tLVh+4uj5JnEnbFp/2krdZW0n
-ZPfMzkh6pdxPR6DbBFugvf1TvopPkbR9+qIckw54e8IJll0VUl1jF19QxOEfyqw60UX0bDfXVEPM
-/k2A6VWRHZTsW9xHcHOvo0u9SPuUNz3UhmQpeYz229DRBY42o6RsL7SZvx8wnRtWwy/wllh487vZ
-EAG3sJSMy23eGpQ+PfgnerNMKQTNO24A8jpGNB0oZSKVuJjTXBKZKD7d/si6nZtWXu7ZrwrI21LU
-cZAGodo9+sSikEaLRZK8cxY0KqDYwTunMbzfqb36lJfRLhNm1yDivBZD2KcD00bKuq1ULnsohvNs
-bCGx/TOQ9lCy/Q+9rg9sfx6sQfymJWAwVQ/O4pMEMCgad2QkUuZ2RjD3tR34XMqnZwCnZDD+jSXh
-91mmMUSCZdj/exdQIpzpCF1J8jAMTAb7nuDzuQwdTiJ1lICN53vZFQ6mzIgnt07ZXCPxIkqwhGEa
-rh8/DCr4dRC50yOzME6efNmbh+Y+fNJ2hy1XWe5cU0R7OeWwsQuCcbfCu2YJ/KqijDQ/5b04MdXd
-isXf3l7lXMZZLnRyT94UM9YIi0jzvn2jrvUt9K9A4m+Cyf1GmA/ZhlgOKFY8su8/DZV7ddj9fAhD
-sZWawrKXtj7docKPpeHZ2D2aNAEDD0V+0pMaOYp9Rt1upExtq/KoFMyQV2gN2zGVh/zKXFLw7HfL
-tH/Mmnn+ybFYrIsmaHqIvaMTTW1l7bnixbSRweA1pu7V5xYl8Oys15veM8OfzUP8buvHJ/lrzgaM
-V1Y+dthyEp8bi+pEOB4pQ/JhI1se8X6aqS2qPMnIU/WYOooQL5O2ewUBzj4lmkVssNYx7kuNS8Ey
-l9e7buTjXjfRLYHLP9x0uTZKP30JQR+HAxXNnwtDvHkI1BktzqIL8dwLruLG9R3yQqpNoQoSoveX
-k3cnpujoE7nr4avJeVQ6jzzCZBfBRrOI7mLgr8UciPckfRWvqF2jmTByMeHT6u7bBPVoiKIqvkUe
-hkSa1ex0ROn2CTAQ9p/mmRKCu9Tvx319/MBHrxXO7qF77DLwMXKizpEzGhgNSMQVAqfV53QwGA3C
-/hM2ZD2y0HdBYonr2gai2uuCusdPdE2nSukULSn6fI616du6CgBynkScRyDU7XRIMF/AjLjK7I4e
-V/9vy0vByc6VyjxZxUpCRKwfxPplEJhcaq1AmOZLjv0+KMDd/78i6MoDncnKNYDL5EvTY7JhTeWX
-Nbvkh7BNZq1xkP026a/oPmMz3IbMzzT8cUVoU30vOkYPDIr3+k4ysrDFegF+Ea5Qxj9fBzNid3UG
-oUKUykFlpqjLu6oFTxpbGSMalAVvux4x+z3mKvXrR4xXuauTnYMX91I82KK1Lat5ZQ416VDzRCi1
-+H4Az1ugkoMyjS81MBrDBmNmzx9Mu6fjHzkEIJ+PzqtpE0Jj5Dcu042IoOqfogNzuqvzrOOr8rFW
-wqvmtJoUsD/Ve2BLJJlpil9sPvM5Y5ljTpeHlQX77VgqavNabvGh9l0Hq41wzT1s8yLQ1WX4MsJ3
-2tk+MgITBvQ6scUeB2v/nwZZgDMoeYOBZUDyw5tFDBA2ZiISOGVLGh59vsFE+59+lhuVOOfYKekw
-T8IcKNODtAv9Dxym4RMvgpTlNC2xAOYafag5eobQuq6ZI6PC+tR/fh80e+ZIFKyTFA2zktS3WA+W
-CCcs6NMNhAMIBp1MXRxDx+qXIWoyEbh4AdJi6Bg3Bjcr5xejs6V0DvdAUkw3vsWOOin9iRZZmZDh
-10jOw2tyTdROpooj2s41qGeEA8Ods7VrGT3jaZqbZpavywZeuD7wmYZQnrFhUSCCEcgn3W9e61rO
-enxgfQz8zlbqIv7siU4g0kxEyN9v4Qxg3hQ6q0RXAADJc/NECfJzo37zpKTNRZK26vAzFhbUi2j1
-KezC2tMLRe+yFnvscBvZkABGScIFhbz3IrXKFg16byLAxPvCH0ZI4D17fbYC5sDO7Py2ZhcsWBc8
-ypdfksUwdJu4s1NCddcbyat1JqmEPxs9I5fxkqg3otgttTXNO6evHE6CBlExyI4YuKzHcYUctx8H
-NGUf8ZSEPXnn6c7wZVIsWW0LU05E5PENBRCooYCbrEkp8cBxCEvD8B8lK9dgW0ItjRtbWfSqFM+d
-rjtBOAg9fPbHALYW8hsl20YCX/Nnll3CRn48nnvxO0wKUastefVBps8GogL0+w85nYeQglDiYiir
-PvxYnizOtgXq/QcFIFRQvwfkuai7MVLOkP8k+kiWrtjMQvFUcTnndT5v32mmPtMkDaOqz+zaMPeX
-FfqTTJS2pLY21zQJVSFDiK4eQdJy12sbp3x+OSkjqI/SOed3a7v9/glSCK5mp8Zkf7KtaIHb04so
-34SrzMTJTO4dwSynDDp9fVFfw19NS7R8wpnGQTiCh3eMkjur/sLQyrWgXwONqz3wN0IXCGMdNAvc
-VPGt87dZrEpUk7lVFZHahLsn32IMgxycO0xsD+K1xzNtRfTIbvI7VavGs9LpyaBp4FyJISgpeF20
-64PARSRuhRNals0AGDnsI41/iGQl65o1o+z6J4q5tAKytfMDeBzDHv9z7vt0214/1G8jc5mMyc9V
-Gx7HuoS+KRwwuT2lTZEV48IqYeWYfbDJBle1N8KyeR+zV5QBCs+IrwRkcE6Y1Op5wyATJ1LN7gLd
-ePvL0ni2MBuU4ho5U8CWtfKlcB2/PiqBri2JPGsVy0KVX5+WvGpxW/2j123/Fb8MP1XoaqYUN8vh
-L81V+gPq9nDy5JMAJIgINcMuGO2r9WSV36MRjnjSAx6Am++8SjZH6lG+rvDnOKTmSCsqtfj37xHG
-v7ptlnAdvnk2ufWuUATZZVwWNST+OkRjyZKq67zZezd+LGwpUeszZbBq3ZxRi9pVW2/coFmf1Dpz
-AbXzbxI1rgJyWs2k3ZQchM4bKcQ1iyiSlGFzbK/DO5XFlHp00bmHqSgJRKVWgz4+ySLVtiW1JquB
-sq5b8FPurj5fIfWn2CZrXKmU23liCip4bA+KHH0tv7j/ZeD2WPyNFOJtSg0rsjOrBh3s7IiT3oBB
-S0jWpnW4RY229DKyTOwHt7l69VjHl+/QVpNQYGPB5hhChAI1T8WYXauXCqjP8OiDU5FO/jR/A1/O
-MmifvjUZHciFw3+LAibklFQl3Bsxx5ZV4CK9eEfeHhe35n51QbzzqCtmDeGd/CYbU0b+6/GPFgV+
-d85yhyXCaHQNVIxw8yTO7P1WRL6Qqu/TDmccZFOff0GPfokE4lNE6FQahdmELxNHGJnMLLZV3GcX
-HfzUGtalX9op3ryb5G9nv4jVZ1ZY+NyJKcXdtkjK7gkZDZN9JYhlSLvDbFccq6VsfoNkN5wXqzEy
-mGHSfI3GCXv+ddQeCShLzap9pwNgn8/fANx2v529jdpK1F3ifilEmGYdMOy7b4bGmgVwQzA8Neqa
-nl+v+F8WRM4zQsytK4GJBMIwB+sJ0Keqg4BUeAVQtSo9d8THA3X/CjGzIoViovXyOdF1B/JBJZrx
-w2BswLfR1tXrJyoZo4y4elZbXk/ZSuMILcHZcpR/jX6BUN7+3t+Y0rRDCAkh9RB52q2YVMjhS8JZ
-BsoaKTQCF2RImP7Uj74Y3UFnNma77DMcN0g8dziGGctwEZCTfR1PTS/cZjA57cTKBnKTKLNqVzCX
-0cN85OCH4yzrBh0w8zhBzSsn84RG9QwbBtlXaswP2Nu7VwMPbvrPI2XOKRr3NhSEi1kqa+pQms0l
-a6Dq+IoG1u5Vt0I0/LTdNnAWhcFfpvwgXYEpdpUt67EH/WU1WeNEUh6ZICoJZmSyDR2DwY8cdQNj
-lJA/YEOcSFVS3C9GjzjpPVaXZV1A/pnGQA0QvdsBh7xD6d+c78SPoMmhISGlKzziK0l+cesMYZRq
-PnThhskltWG7STrf2EQjn1Ja25QSulM/MQRuWHsi8gzaU9np7cW9rSaKAB+Udp3T6uRZDipfwXzr
-d5hX7v7yzxPRfDyLfWVvHhwxS6RWeOUD5OnedVNt7A6NVxP0+1hAtrZlSSaN3b5S27c6N+fQvMbL
-iHWQ8bfjof19JcmYXWwYgrt+CkdnE+Bfs1XHYXXYlNjfg2s6M+7EG/Z8HvlWHdguse9CUKwCzcAp
-fE2rd0r27mojf/jqIyq2yn8Mb/WdETC4cr1ampKphJI+U+sQk/cyw31lnRnwqUPNQaHTnMcKbEBf
-rIaOMPxlGn+qPtj8EBjtlrLTvTw9YISd2ZOVHy33EjSLu8uykQGANTVFni+PzxyvbP+q+4TqpwLs
-c5IS3ASu3th0eMQ2up/SbOJeeZ2ek/E617mzei2A4kp8VuiSxonVZqjrLX4M5vLh/OL83XZKUJo2
-mpscVoTUd/tz2Q1+HL/nnEB0fSJY1/31cyAP5u/4r+od40L27qEVBchDpM8/B0wQp0G2phmlMX9e
-SYZpW0SFnOexRYZlrnwz9PiobIWgkmMv0C1W76oTyFtDYvM+PlqvRJcfd+5q5ITgsCEiMqXmY/Zf
-i8Iz4OKHRjFWZYesMwtrPNBvTE9m0VSDA/XTBbaOXByqEVx45NdAS0sF2ZcT4Oqwl/wMizdoCT8W
-of8qmEPWNMxgzprAW/L0TQBTORMcKwjMZcRMQwc4/bP23qmsicnTHaBNmYzwzEkjrTXP2Ryd67Fv
-uuewbZFhVgwDNnjyzrdNBgGp5kKBG+XGzuwYq39j2E+eU+xCcJrctEtgZYFlixPOZO1MOzDOvMfy
-AL18W8AJAjSdaDh7M19gWPmIjs8mMz2at7F6jjYdr4VLNwQyPgHHccxuf5/+gfnF9vB23HB+7CEx
-ShssndXyZwYow6irqn+QEpc37KLOKU4v+YLTMHEsWprGE49zW8wS01yw8a7UvIuPTQRKtgzXlXP6
-OLqcbum+TMC0e23N+wZHY+PimLHHYGyTRM7soyC4h+dI/AWpEaj2WD+9OHYGmCU2zaiVyOXPdqvn
-UvPRM2L/neP7BamJfYU56lXS2IpxAdjZGe5Z8iLQYqCkW9+qh8/3HZiQ0p3b1+8RjIYvN8oCMHQD
-2XDDWWklaRGGXyzr5Az8D9ghrTFQYIRwCzup8wMJo3hTN2i/5b1H4gAz3QFvZEWs0xUAV+rMumEB
-UtgAnJggddsGSymlhXARIsadw1l6zrq1meQY9nIPfz2+NnPh2lPIMs6cIWZPJ7QzlfQrW0EqIsf4
-jj0Q2Fe9NViVHUpvbSbWysofOGkPA7hYHMV7iw1Tt8RCLwGFWS2umFnJvelPCDtngjH1uwNORqtR
-c8KSJJSoUSFbYN2dNJbaUJfP4gVVt2y/uX3DSYQr/27OGSKfdbTz0LXk50eC1WIw58LD8+SdobkG
-crfqfU8HH4UT4UyZvmCpZIgHS0HxIPcA53aJ7tQ9ybGUHSuEhAfGwOfWFJmVxz4qxS24EMOqLqrt
-eg9unGtyaH3jcrg6K8e0TK13tUNUhNu0ZFlDclmPK8KqzL3JV9kogOiHoOIUYK7fAdGKY1B84/Nm
-LII0ph1JHbNYwcM+kNHqjkGLh++e8u94OWTMJYhDleAbd5SJzRX/AjZPqUnsD2n0Ucw1CHAcWYJL
-N1oFOjfzuQXxhhUhHn4iGeMfGV89hmGd2lxox+k9LA1vpeb6sZbdNSZ1gDc+YNB4fkovtQ9vbSyd
-t0TSiYP5yWkHTKSLHlyD0iYXjwij+S9KraAwOGFc8+QTS3XUc+Hzs9UMXDnmPN0frLePUOoibIkh
-0UdXh3gxZTdlUZsPI3+d3OQ3eG7dOOI5dwIf8gb82W2ea1zbW4NjBD1WLih5eoceAEgmimuRJDBm
-xIH2ggA4EbTmNUyPWqa2xgvD5y2o02r79QLhUVZucmnOpMeynFmuvPqomUlnUE7GF/kwX3ZQF3FW
-fylQheFXnZMsrxkcAyLvDlIwDcBtouWQ0nn0C0f+5zDBrt6Z4CIaDYezHfsRHsQ5Wdu98OIKoXvL
-82DmGazGfTdCbpgbNhxZtuoGLicfFCGugQMiYKnwaS0rdTGlZPHS5MQS4+g26FQA5tItYgPPW71R
-voTaM6tQ0pH+o1r/a1vqEOOKgkKwSbcK8hx1mdGbT8mRaqDeK0z9mstQeiGssIhRGX3JG0xurVb3
-9h4vINECDJ3WjkC5vxKZycNIUTdaZlrpCEd0UMjx0ha2jXT80RiTWqeUy90aMAWIl3rRcJyw8yT1
-rKeehShEliSZL4vF8tr0jGTV61wnWjD+VRSiX0LBgGDvyCMuxHjmWCzixwA1rN4gzEZF2ttJRaSY
-UGl/DNfl0aqt/t6D5sak+1QZBesY/7s/EJwAhFYOoRU54N4V+vH2RB8xVrbZ6DZnTaTkLluUXYMA
-AjWEK0y2U64zf3jtSOsVCiIoYonisazP1b/+5y2GiE4xtY353p2alQ1VH+9+AFxsiwBma68570Pp
-mVgITelUsZyQMnoqOT9gF5YfgVQu8CnwJDLgGe7/hbSpNp82tCA9QkzEo0mG45tthVJshJMdGFoH
-sUXRTTGyiUPxbVJWu8o2wZVf3q4GrxfNlX8t88nu/dL7znaEg34CUJ2o4/3GYSaqVGlXKtP4Qcrd
-t3v8GrjJ8SHG8BueE84M/1vR/2CHfPkZnrmyP8GoDLSDhQGzNimZMTNOOTNASHL3d36LIuxQWBwM
-fmCHvmdyr3mYPjEBHW0EMCBlwp4fL2US6e0F7WptXgeI6TT+Qa3ls0ox/QTVdy3mjiWhXrb3f1CH
-MahEdsfeMTY5P32ePbu+34pEDPygq9/wm/YaTABEBvUfjtXbRI4d0CFrteVzwIJOGH6AduvBH4ld
-NXxn20zRayGebWs5QyvlGCVbes1C9IZFgPvLvWA0xdC80hvzqJMYLoYFtXYw8ySGMl8+H9WwdVMh
-1+P4PDfcU/8iZssAGdwzTblAEQMTrmHi8+ZwRR/I7iDajhPypfi5fsyhta5MRRcinRapt/RmAjq5
-GBMw3cKI1DO8tqk9P0UmolXWlOxYZfbLfYy9dBNKuvJX+mgYeWbYJlub+hu9crVEOSxuS6jCcsMQ
-YAbn5sAbYPiyjefj5YmSNdSCQq2SeY2nLujBvDcyLBQEjoaCFknSEbj3UXTnlPwuzRHPNnBzByIQ
-Cf/I5DEAg1pwFALFxyLdyH0RpU2ncC3vqVbk3KxI/7UUHSE2voB8Kx1Up2zzHgetmEwMeNslWQ/c
-fQx2cWNDhUNjZtAKz/7BZLdGZWlErieNB7XGoT5cC8jvQEs1OS8A4YylF2LKEDgnQrWa+/lWnT3C
-dNrSw5s8O2D8Eobg+FIHOWQXWIq2u/mWMDx43RVtujhrFz0yYattM9ckkYr5q3Mrs9yHoo7sIxHm
-A2CUS6vbwDa6lkzXunUgAE8RVh9Hgc8EteReRhis2Up5LPBN3mORxR6Kc3Ow066oyTk0PAhn654k
-TAw3URyL//IV4hPa2xiH4zwVq3+Wwl72N2+aV5fw65sxsXCcR9e1d8SA1Mk0nHNMsiNrdb+aC1wE
-VFV0HLfIPgj3kwk+ajwv8fp6/imZ1wZd7+/mJ38WVEcJZPHUwAftsJ+Qui/SfnfbMleu3/QMXkzm
-VZtpReuXP4yfoMj5TEQoFIlYntloCTPM/FKtB/A7wxFhy05LOTduV95BuX9DhyIocrAlaMfuwvHq
-9souEI75N0qwJJHFWIkUkdFMBu3SoFlqlXIJCtxOIZRFX7AblBYT8ElPlbIGmnm/q/Dnt+BaoYaK
-bnAD2HsF4oJsHGjC87iaLyarw6MhMRG3dt86VjIY/ArTZDZStI/oKan7pvcwgqCgJ+UjqrgtKc/I
-MQHZEfcQrhp0jwjo9FP0KnCjGsx+i+4xfyY9LVBtMQAAg7DOEwwDYxmB8lNhbw7so+pr5Oaduxe/
-63ktjoSNsxSZw1VUdkpQZCd0O42ETavnjdcvuDSwsbZP5mbprcBMpLv+2joWXLo5GWVtOfQ2dg6y
-jH8rJ1Gnb4XKNCbmof1dbLu3ETghahfDHw+24y40UVoXCG3mjATviuMbM8H3kVxS9A/eYYwzpSzv
-lVXcYfA1u3+h6gsRPkt5iiBvbfXKM+WtdohltgULqvShFJl0O4wqy43ymLipCcl85i09Xvfn7dSB
-rTdB6CbEWyoejKm11YkXaNMgujUJAxIwYyvZw2h91oYYcy3MMvgVhZ1fEqwLYRsJ7jVw2o/xZvVO
-G9uD4WBCHvOnDGfobPxyZBFXVW5ay3lbBkTJXP9ExbXuvbXEcdibCwSR5xgWnZwLReI4bLHZaY65
-qNi5P2le1yC3apdGFHmEDIPAh9Oo78VkYnWU+XxtTzugSEmkxYg3ALEQ3LRf/Z6kwRzXbNxVBD9x
-20OPQJWPEG8eLNFfr1Vcp3zzf8eM9/V77wSZr2VauziN0W4vzwF7Dp6DN+Mhr+4CFVyly/qbyzlg
-Hz4k91fB/rNsv5ZNqlZX1E3LubG6GU+YuRf5tdz3sScQAYvwF3SBQk7YYXLbP5PtlUkSccoYh78E
-QoXREK4G/bD4kWfBPtRLc9sr6beWz4M8EkagfA03NM5Pze85KEdnhD9dYLxVAi0TYEvaJDc74JdK
-E//fiBN40BaxgHwj+ReIGVV297AL64RNavW6FPrf0c2ZWiN99uqgTbz8dDAF/0mfKHhmfSv2pck9
-wwBZsjtBtmwOcPbj8VMKjNtE+bJc+ioqkgXAcfryZYW6w4a42Fd4kUXmCkZHjHwX4H9U7LtqApRd
-9TZ/dKTbY6nzl0dwO4twf+6B5yZO2LmzT/ovtSShVeU3tgTCHJf5QqmehdOqbRPy3sr6tfgXtFcJ
-pkW9v2TLQ4XIrVxxJH7B09f+F0YlcRL8vbdaeePhYIiOdsPfry7oLtle5/gic9+bU78QOo32tEWJ
-ftG2fSb7C8UAa/EQF3VaT6JYOja/4145hW5hr2k50NsK8BjrmPkGmZjeY8M/VLqhiu6gXpmhg9NV
-LeVIgJw5ySFa/gAtJfFVxhqNXP7zxPTmLQRQOcTRNMO2wLJL8plIGJNVQ7IcyL8Y1iie11uf3Cz6
-i3TDRlfCtHPOXRJ8pi65Edc/uyT32I3nZ3nPUtDHdkpEE/bcXcmy2HCBmnAaKSPiZ8AdUigZx1y1
-M6GEzEc6jKxm6c1a16/4fIHk80lJeBHTdj8q6v3q1iASaJU+c9mB+ONxudVW826GtyWvh2SirRrA
-t1Za31C4UGu/kqxgiFG43Bz8qHuGJA6i11ZssGz+aqWqGDuABJ6EawJ/lZqCScmA163lxRFnUO23
-bbGf43/tYfXqWJZtt4TBEUHafg9XD/yAwJWA8OHTJd8GcxkS/uTWpiE3BSetxAyWCgk3M12X5Xei
-RIEIPiKBLe9PYJVylOihMqp2EqxfOmnz33+0mxz7ph/n9QsmgarH8tHwWcqvb1GnM/I1u3BuQaY5
-8EQSxHQGMsvgv6S0SE165lgz3NgcWhIG07f2KMAH17jPKDsMU7HDpGHrx42LraCqR5M0DZZJA/go
-PKjF7EAi5S5fFf+MBund1QUACy+VL0S1ku8t6/U11qGVskAK8pBCgci77gD7yLuwd8ZCWgKabNj6
-wVpm9woIWzSIHEDthD6/S16nd3aBCJjCJ3H8ngJM2xuSMecHAuZrOe9VYBA6GKOtOas64WYBJhiB
-aFomnMnOae5nU6xAegln15OgV0BM0CDQdH9iFUWmMEkBjVMcbWMyOS211BDOeuIXYvWQiX+NBElV
-vepxBQozKBh0WVp+ain57lszURxOL5EH+ndDbBK+RFaE71LzmFHc71PILkJUiDCAeKfVA1M6Bff0
-wrem64V+FjJTVPXm5ZTrfCQ0eQ8qv6mGD7DUuqtvRX98wgH5zIulRHbYbkfhoXOk6euDzJNmkIgZ
-+WAC5WOdl2FNOVNDfmlAEh2g1JYHkvNwMhzIGNJPJKRVmBF8qjXlMulAiCTcuf7rvb5Qo0vmPkx9
-9Ym4KuY8QzwvTFthDddQhc8bSyNNuE5lv7ZK0b+ktaMIjw3/2FvnJ3XCellwlwTo92BMAwOTeASG
-WLAT0Lax09lDpsGqro24YdASlvUm1VvlSKItcNhMo+mZnCvWzyEtUFs5EgcQU16Ow5vOKjyLKAw/
-b1W/ddrjdZTJiUWAO8Co1lOSYdzHpECkkf9aQsiprkxqqJr8XrPvGLqfPtO6CRRHmj/hxYDR1/o7
-W7+87D/hLyEFvAelSXtQNmotuXVW77QdFXvoC6Li/HtEXmgBNsUjoWe5LjSZzlSEOA2tA7K5KMfU
-TeJF07DNrLs/P4XDZJV/HqxH+LNe6x/Eq1zJ1UvKk5Epr7/TYl3f45huzogfEm03iKr1RGhbB1yL
-Wo5FGckBEG+RgN3QhPkYYOst86N3uHxFszKt5nkaFyqy7zvXcyCk2xBMJlNdEfJO+3wduDyP1YYB
-w5mP91SOw/URCgCvkSp9J81e9ZjHWv+MjEgfgqF/rkxUusP13dgDa5QWLYjBNsBJde4A9aY0hOX4
-DwzYqORpiKiWafUxueb0iNDABT2bn5bYizOkqye8qEST+yqG94cL5XFUdNdOKxvZiwm6EL14sYE8
-12jVzMrsQQdUHYOMqgYDRCUxLw++Hv+nANkawMKBcucb+gnOLvOP9bo/cf8nLQ3Wy0J57w0viN8p
-Y+1DgbTW5McCFj2jBeuh1ijWOGFr158JbPScTcLX1jNGZSuZB0SKS7GPVRGC1SOlTfZJwNrwWKzg
-6z9wd4f4vjWY5+sdp7EHAdIHYcBK57Vegq2XNjhetk9DMx7DY4aiD5GYBUsPGoFrD6bvY0tAsu04
-QsUWvuBDAO9Z38SvjUMiD5LxkhJuqNrxuHEvoRriDNJmrOJy55CsfSCH3aXBKt/UmjHdIU7t/IqP
-6RLR9akZglhS2ZUkAOBDN7M+aCDyctT5OxMd5EZHpeUqMku4fy+jJO22NTLfZkykBCwuilSQJISk
-jffXO9hdAGg5zXHZjvi9h/njjHQknHsT6eIB3qAF16WeMjFD5FyBxBkqqURNCQJl68GSYoTeQMfl
-6oRfg+nkEHAqyrpSjp8Dfz2XmzV/f6I9u8XDqDWlqWx0dpeLgtGwGBIFeQe6J9CQEqg=
-`pragma protect end_protected
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/1b7e/hdl/ltlib_v1_0_vl_rfs.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/1b7e/hdl/ltlib_v1_0_vl_rfs.v
deleted file mode 100755
index 9e91dca..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/1b7e/hdl/ltlib_v1_0_vl_rfs.v
+++ /dev/null
@@ -1,1209 +0,0 @@
-`pragma protect begin_protected
-`pragma protect version = 1
-`pragma protect encrypt_agent = "XILINX"
-`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2019.1"
-`pragma protect key_keyowner = "Cadence Design Systems.", key_keyname = "cds_rsa_key", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
-`pragma protect key_block
-UN03o+mSONS3zDreZGW1O/XihzMhTI/GtpEgvb/iRA5dE+iKLLA4NYJaz1Am9j3F/cQo41D8hlwX
-zWeLHFkLlw==
-
-`pragma protect key_keyowner = "Synopsys", key_keyname = "SNPS-VCS-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-W3DfJleEtpXkjCL7DJ1E4AgH62XsKe5dQkqUPRQMcs7S9+DOs2JJhHTDegcCFNqURdERCG5HKrBv
-yBQML6feE0LJoVM/Zn2oU4ccvoo7qEf8O9PalAsUGRmNFHDMjcxIB+O50NSQmKkZq2Ed57FlJ0lT
-tH6zw1eZ01ovjd5mwBE=
-
-`pragma protect key_keyowner = "Aldec", key_keyname = "ALDEC15_001", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-c4ONrOHaO1wzvd0coMAXN5CnXPzikraR3oxxWTIRuUjd/Kupr+cYb/6AWC8WvmXS01EEl7Xv/P98
-Cyb9VXMB/uNqsAS6+WwTzGlORiyd/P13gDS445AckCC9GqgArGJ86tkqoJjQW3QZ9yTGOAVGvHmV
-vh7/SFehQqPNsJ4/s+ZRDKxsKpR6LOSJAXJ83zTCN9eraPB0gPieHG7EU2QjyM3Hs2TNWiSErd8R
-ubF5xHuIEy5BhALcL80gOndKv+RlBxykP6hOQB5suA1bIyd8eTRP71nb6wTEwJeEmbmjpU/GOSea
-DslVCBJgiSfbfDwDtDez4MMbF0LeZ5PgP3ko3A==
-
-`pragma protect key_keyowner = "ATRENTA", key_keyname = "ATR-SG-2015-RSA-3", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-sKLrFpjLfNAJR7WADXYcgXBtVwMa/cQGdmBaBUjby/wE937pmRyQhFxop7VVWDfCpRAgw4lfb/iE
-WjV0kXg4nPPyXAH4YFXIEqePYH09O2efgBEivzu/ycxrKWrWiRhQKzdqg3Mxo1E9lSXYV9ISlCUa
-7H4YOjlP0sRbkkAUo1n/kDGPr8JCuGCaSpmUGL77CKl73U1cMmIqh8a3rzaxXaGNPyVqO7MrJFh3
-/pdHTKw+OnfisUXdaV4nHTvZeYw81YRp2OW0Yu4R0rkgXFjbgX5tNysjnKaAa2vh5rTZLBsng4x1
-llGPC/3pse6qVTL916Zj/z2XgpkgyjUidf943g==
-
-`pragma protect key_keyowner = "Xilinx", key_keyname = "xilinxt_2019_02", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-lFQcmoq25VL1FjwtfuLm1wa9VTysr4ZEDDVxOXCn6q+BND4MXkLPI2hPgd3v6N+l0ooVE9nDJqrx
-v121QLbhE/wptc533B2gW/3OU8eWGA6xckwcpTjolvok0ie3u4w1oKgdI4LBO4nhiwkQ708QPfKr
-6AZq6DxEGKbWBe/RUgpYVVb5XqefxEVBZ+Bw7JWZMLmsV696x0mWBgWmTPqvPXGnXOT/FWIQdbiS
-6dqJEjFWja3P7SzkSpb+QGaqNEt8sb/46+Yl4yWNQ24YuQuTPVVo78jx3ookqeZqYXT6ZTvHDpUO
-UylcpY2da0Zo55S0BB8QLNpD4b+DQ5sCEH+U3Q==
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VELOCE-RSA", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-HgM5+dT8B0B+cmNXqPGh6Nc0Cc8mo5Lp2YYbJ4PlAZzDzoCcUelPl4uSFFtOPpeQKFOF+g7hS/a9
-7KhxiCCOhVKhh77KHUIZFQT6QEVDMoMtw6ZHmgWJ5SkuDOoP6uBz7OAFh5p6G5UpRkFD2YPkRhi6
-UuKivo3dRL5F+gbdpMg=
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VERIF-SIM-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-Ost1X3vm61eNmGuRoRVxijnQeIF6qthN5gFDgIBSxVO383aam9CrGMYlDaNSkO1Mtu5Gh4rOVFbW
-Twudha/kf30+BDkDlXdbvQ7hZJJstw+8DpwkYHwgBMW3/w7e+Uglt0iN/WzvtiO3F2gOPeV56H+v
-uBKrjSqmLuCx65RUnqvJ8ovQZ3jR/KmgrXh1gCeyVOqDlDHUFWbVCPfl2CJng2ybgKs3BZY+2fFC
-oQ5nED6FeOCyWICfBKf5e0LokH0G65DaO/ALKIS8MIcntgUf+iROlzxRpIfVkDX/wLBqEYFzdw4X
-e/UT7crJ8GKkuO3Aa4koq/F/ihS7s2rKdFcZtQ==
-
-`pragma protect key_keyowner = "Real Intent", key_keyname = "RI-RSA-KEY-1", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-QtPllVRsI8gfcNGGY5vc7f5B9H8vOFwPXCB6d21p9ahbdc7s/3uyIe8o9afINVeslj+4OW+nEHST
-pjw6lCO/yNAHCthE+X70AfNCy+IGwykbvdCvTn6Ss0vGX+iCZlWgMXevemjimILr9RGVfipah6g3
-iQOJjv/7d7sY1PV+ghI+69//jbioARxHC4eR9/Ns8HDSuRy4HZ7BOSnHmSzZETCXj7DcyU3GT+36
-+crNlz01SM3zmUvwP9n2SZ7O1dXFDj7HQegzt/20EseXlC12EDEpSyc1tjVUtrx7h2pn+NGEBEVy
-FwsJ3S7BMCd7XfAy2KOjdnd4rrk4KDsfwVjNbg==
-
-`pragma protect data_method = "AES128-CBC"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64736)
-`pragma protect data_block
-tO3M6tKHcyVqvmt3rcsbkQuGmcu1FKh3yiG2YpS2tWVSzOsxaQK/Y7D8r7i1XyGONOzlF6bFj8aK
-lr3LbCrjAoFNZ7jLlEQnNdKeHlPNtlbRl4QINjlCBfBOSpsENptZ4BxSKjxB5M3g6mH2KYry6ovp
-aGwjahVYEnNw6N8Q5KEp0rYWMpckVPEf87SXyvkan/gbNT0yiAUg2Rw00eimOKgpMrNiI37cB4gS
-ddZMEyhlAAQW1RB8CUNbxz8zwQAf/0gR1Ln2m4aAObfO0FhuPtFteQyZQUrtPIipuUp8SAolqwDF
-/EnYgBRGYUQwqWh8Me6Vxepk6APOQ3TR3JVcGcnEr7vHvsrtduLOmepwfdx+tSWGtGm973PLLgKz
-FlYMJ1aQ8InWl5sm75ePze1yqSWUnNBqh6C0odRXlmLwS8BBSLDy4zOxXxuvJ1DrMT/bTsyQkR+3
-OGxO8Q5jKiC9keEbCectBtJ7gO69eU9tP9V4nCgQDWJadizjqiCF2pQfYM8cznGdGZjIRAnYg5XW
-e15eIDHC/pxALzsywYoeiKoRzS38+uxvbl8qlhVwuW2UB31T4pg8NWHDR/V4nq+QzZPw1Sth0HcD
-ZUVDR+euB3u5KxTKKsbZwop8OJ1OjAbIKrIQRBKnCTfolibINtCPX/OmFP+knAeNDw+RbIA3MZrB
-piekrhpuZz9FpRNojh/+QJHWspqUYwEq8KWxFURbsMtpz7RZi+OS28LsdrpxdWrPZO2jWROHt1w1
-o7lXmr5aKVevxpyksFcosg6zIb4PTEvX2h99xh6KThdlEFASMO/MVmwKOrVjdjaVfK/DaiXgJtGg
-S0dUTsDi0ke4LGxJ2PyU5AUw5EccjGIEFq76kjcryAWgD/eMRlIsHQQxklN5x4fpxXdwoT1Iyw1U
-cK2xj+p9JvRHQpA7jeHX/syI+HtsM7ZfbeRLXRXHxP3qd+d+rgu+k2gF82V1R0flDAwxpod8ZUFX
-3LcAcZKfAtUOuP42U/H4QKuw+1fRhohLLWoMl6k2FhGsGjfKYZP9f0dM+L2ReLOzXbvW5csEqkbK
-anIirWZBswxGjffj2A+syVSmRAFns5WbB0ztZGGSOYCAI1pnWRvTbCbKjVLGJYmLuKMkJnsltyTZ
-mLbueWTeHa48vqhhTKO68rRWsT0XTEsaXyr2MHieqO8TkTdck0avLnvfXlEFiMgyGYA9kK4DwyvU
-8Ab2ID01yjz+esSmqXQMjcWU5n+Bs9bQpRvj2XI971s/eUKunC6TEGf+ezojZHjCd4dkXj0Z+HPP
-T9FdgnKgs8GkTDZ4aAlwm8oLtv0+JuuOehI5TT+d83YVC9SWBCpi4QovDNDvEjbaaQiSiyeXn7yZ
-npOKcMnGgMItSSMZpZqt3UD5gd7NPZEPV9i+6zNO9dJ/ORtTdJDsgTWChjGxdgg4B+3hZ9+MHcS1
-kfELM7NYgFO7U1w9Wyo4EYKliMPaPHIiFAkrCYTlFUji8tjKYU/2ZlPatT/UMULEKlaIU8Fps+2Q
-FLBQ0lNgDVt5anCixnJTUh08BRv1XEdraxqZi8+1R+4Gkcih2Zy6s7QB/ddpky4Gxf7x91g8Gcgg
-mtRkiR+SOhMHG8QuOH2yqTU4e3ASNNiN40Etq4/Tw1vSCCLIxvSyq5OmC1jl2INnkHsK0WaBZnDI
-djZ9w493c4pssS8ZqnSMFTx+aijByQqbf02IhvKO2CKazlAAks/sNCPziDprVldbOdHA/rvt8n9D
-Ypc2W5GCBIclPWjBNKKqQuLNVDhSseKhtnvDRjbE0WSxXsoE6bk/gmUhmnjg8fywfpv3oz1KspTw
-X107dTGdp7PrBs6X3QTvV/2ZwfoK6Iqmw8GEmb2sf7iko4kDjVi9RuVvL9UsVRwqJuFp6/TEUK4y
-epBfXtFJAJZyKAAIJCB/YjcAgONbUl1PpnnmhAvsxL02VudG7sq6zKPuliSaVf2hrQFhU/0B+nmk
-+r2x2HxjQnZf6v1gk5kBq1JSw7Y/2zzMN3w1BgQVu6BN7mQFDw+aGI5i4DMV36WWCv9u+lcTQR5L
-lu4XmFeHhTuKLtLgYDZ5+gW5IdZSAAUSlrCyEazheq5V8ZHoNbxv8mKy+XtF4qKRu70RAWKT4wMG
-+QKxUStCdsks6oY9+XHV1JoVHu+e1+UEtqrc2CPLK0dabbNgA2DHe7C1Bj/D+fliWrzerxWo0Bae
-HvVLr2f9V5H4/RspON87bI/wkegu5NXnbkE39ZWt+4Pnp5uvXg3vXEi0oJQFG7oORGU/X05VvgDT
-zlamckDlOCI5fzYn9zhsffTHXhTJu+H+Co7/EpDcqKzQ3QoEmCi2ZyGDmgPZ5Mz4praFnLEmeM5U
-JEUHZDBGeVsQOlgTFnmY4UyAV1kJJRtls1oMXnWqU9KkNqNBYNm0Tev+dD4g1cINxsIbhIHEVBRq
-3OB0muV+d1wpQ/8Srl2O3VPksr1xNH5L6q5zgR03W1fKMRgRJgnNoUhkhVunas+7CxLhrVpdbOuT
-cZyfjaFHeKpqH5a3EUmn+ITLqp/lXvA5xi7YhJIh+pz0J/gQarws4GHhfRYH50+jparSo1NUoBnc
-8JNLMzofCa3PzMlv3lhF+QMXPI/igamfatGpoa0X4yX8Iy5kn/gj9aixM9nlLNHiGkJvi1YTyeXJ
-FbZq7S6zMhtiLMpRTwhzsPFDFrrJkjda7wZz2BAvnMjPr5uR0xNBYU6zgsQGnV3McS4+arr00J4X
-YdyeeYiXqrSLm3hCJWKNcdyZtD5IwvJiAlcJ7dguXrJMDoUwhQTi6NsJR63FBRqhZra0otkjpi4V
-RP8yOFnMu4824b0V0QfD9IiSXT21nfjNB2V0uhghb2EVc7ehU7njJLe2dOHQq9dVTOe1MonJvvVV
-I76D3FWFNbzJiNXTNO/Zer67ga/YYYicE91FnuHwS7f2nQ89Xsk/NKHKY6RvgRfpcuZhWARi6fw7
-TMbCY6FXgBuUP/vjR10j+ePtXsGMCow/Y75g0FQ5vs7aQ58ZIWwS/300WTNBfUI2zi7hmNjqnu88
-F6byWLJ2HmmsPzLKosxV4Uo63r9qsV+5deVvT+x660t6UfcQtSNUwAtgAEADjgH7OyOlh62/TlLv
-MB80zgohD69glPl4o39HTnLjuUSftrYwZkjsf2BvyPSDbrt72GqWzv/J2YPQ6brEp4BAopa4Wn+D
-T9opfYi/RRbjPA7qWQA0q8232gNX1zn365VYUNbb9xgS/rDPQZxKGjfRkJvhL7JCUelhGVlBcpyS
-Ss67SnCJ+nLk76Zh2aLeUwRBIywk1Qco/BNRZ4yIzFlxEXgHWHskG4QqM++zQEhS6TCCYUX/59rV
-E5ZL6nBQ9W2y0k88/NhojR1xFs/pdOZ4mEyXjIA2+He/77BMTpD+UgkIhHYlWoDx/xOjivRC+YsE
-sdwWkI/nUqA1kEsbYl1AZYPrqqPSVd3Z1gN/NKZNGU6lES2N6cbOYRmqwUqGUzJnyLAZOMGabVWT
-av26aW1WSs6XmrFKOEO8RB5Zy5KCzkRhBw75sjbyu3eIsaC6j3PZ0PnhLdEbDUa2f0O+ORAJkvCr
-j3w+4fn4lJWUmXen40JlhK4vBwOjsdQm87KW/yv6lOi9lKk56XnO38eKXniGr4OOyUZErt0ExB5c
-4mXrn1yysiiamKB796sIehJ6wct31RkYd1I2OIb1pA/4lB9sL8MIcJGB9JiWa7GShJYDOk7faw/8
-5QcNfFryeXK7Aom8Ez7D59s1JBuCzF1lHSMAz4y7FN0FXPXYLWehu/5zDeiBJB787eNNHcI04Aiv
-mBZHW57HxrDaDcFpRTxK/KWUlG+vOvtHWEwt+g4SHrBwQ7+3FotPdOoT3AizJlLH9SpHhlSc1dg1
-jwaWGuNrdLO1+Ak+wuP1+sA998t5jL21dmjC4NPJCWwn+vdh/ygRoxRAJxTgSeh8HGr8DvcIwvdQ
-VMzapTiA78xmFThX6ngAeLIWXI4p7b6AM7Ar0XiUar1igxXjCoiD3Qc3YbUb/3V2KJjPO+409Taj
-4liWutXtjk2E9yPbjAdDCxSWf8UKvX+3b+pDae7UfrMBKy9icRZ6bCYDkE0QhnroWG3dQ/y2wAdw
-tTm3Yg+GEYjY4B3QVwKpV+A+d6nr50YC+zMAQs6FZA0gbBWZzivpvkJMKT5hlzOO/Q8t+yvLyheD
-cMx1jPvG7D0iSIdshz37JlHbpkPdnWMYzv+2gGF2Y7DZraVnd1BwMRjT7JFw/5q8plhrW1yQepHx
-HQE3ABY1lnAW1jJk8cF4bg+im7/l3tWNP6OBqxTaF1xMgIpR5pnLAiWoX5oRl4owhlJ6IrGS6xc+
-Bvc7v5p4ApKOezw89pKQax1zs0ydy3OghUF7IK9Zv6HmtqOmvf2t8PQi/Me1MilA7qQWQYM7awrW
-TS/gaXE5bhBkeSh/4EeOxL+b77ikB3qnnbniZJNsCp7G6lXk/mrTx8gA+DCfl1RzyoW0z79YW9Ry
-ZCVPuOinH8SAQxvi/LyJEzmPhheG36WETnFM+HGl8u2IU7I/fZCcwqr+gKfHj9CFsMf9KdyzUFBR
-KSZw7CNZ4KpYXr5PugaUwpo4g6OC6AKsdhEAqSI82S7ZezS3k4tiZi+dgLffkF+Nj379pr5S/ZsQ
-J695N9R7waXLTb5u5IED7fzd14Y24L31MHEXsLWA+kKCSqCYdE2JS8CARlQ8IyOJV6e/9pPTXxW3
-JgIukCx5Ob3Kq8TmqP4HAdcJ6rRMgP7GqObnwF9wiZ6Uxp0r1CuqKrqjvv0zAWCNruw8Yq72ZuVD
-XWIO/Oxvd/ghJnB69PPrGVEsGK+N/rtXCxyRlFMy/w75xxV9sHX/6yLmZ3CdjUAh0Vc+BZJwUWl/
-0xiNj8sBZNniNbLp2+O9KxZ9xuPi3qSgWpLxWvJrxGJ2cwlcsM3uRimvzSyRcwB/Z585SllaeHgn
-6/W4VGsKm9BBiNe4Ghca7Nz7OlA6v3O6M37/eQNBzEcmEcEQj6+zuT91A6Dafswv2r7qknVTvyH/
-jpcYypS70C99UmdTQQF2Siyl7p/jRdwZPQvIrCwa1jVpIbAGkZmkNVd2ye0sq5N0XpfJ6ehBz00k
-qzPPo+J+tGY6//hdGLbA1ZAQJdzdnAD+r1LOscemYRASVk5jaiyC6UUUiRF8Ummpzn6Lt2ZAxA8A
-Jo4FmeWdmSBRBm+6djQBNMdSCp04oK91uFj28/x9sj3Ab98r6UiFXbQuMA00OdMvFY2dO70E6URR
-P8T4yWnfLNfkq2nWTuuQ8s57b2vv2VEMnOMp/5W/3Uhp6eutpNGdJD9mDvUXyzzxn0NSpPERdI06
-Z94p8s0TadgTkruU+3/NITDFQ5hP1s1au7b8p1P6FQbcl1KHJHojh06Br9a4zKkLFLOg8iSA3ywk
-Qp4ul/TbexdDSSCVJosr09jWNL5wHbzbV/u+nUimvlJRv8dZplFG9tzD1YDZxVsw5wX6n10GLlYT
-LFChbz1Jw1FG99pV4ttbqk1ikO1dMjBG21WWZ9unRGEdaF+XVilNoZoNroHVwa7+o7nwVW95Qbwt
-vfJmpLxewJ6RjmOA4OaTyAjSutZ8l6N9yDjdlmVSZOqAwGXvmKXBH7keGRk7/hKXU7erdU0RoO52
-vd3BCX37SeYvoG9OhbOB1v+V0sKTUnszhR5NdqNCDdhTezQjvR1MHw+gHyLYL0eXFA+BkrgXygeX
-9Zox7/QmLSNBldMkOaE89WKeZTTZSvcVUVDLqlmk/5h/yINcaLSc07dB6HPIjcm/8Tl+clRE8mG1
-K4U35+ArdAx75ZFV0eSoGersY7mGXMnfsM63kkutmZuedbYsoT6cGZGjHKvJwRWi7JNvsG7zzoYK
-TammDO70F2VHE0Uv1we1aGpDOJlA5lu3Y1UB1SWAsrxvhhNWsalEinQMAA4v+N7XNac0whbrHN+o
-HYAM9yjb/o5+ZwSoY6tbGjdJZcbJ46C0X0MZelN7Z9BZtaaIe37DZosWUNwgQv6nTbOYc02GR2rQ
-uvL2/goAdJlTzIMlBCLRYu23jhTT4rIWrkUG71VPcLsWmevjh7KMm4M7aFGk4vwHqcjTZm2ODGSn
-cIL7F/2aw+k8MlcjmFsQv5x8xFNy6Pqa0xOPWswcyQO4ZtnoDvqD9LGNm63S0AO17zAI9KLQ9vU0
-cdiph5opGng0/ymrO/JrEZ/6+OJQABp3SKAlh7S+5t1s7g5mhQ47UXtIN65q721EaWIyF3Eq1nYo
-XRB/LzZWDnfTGMCF3y6+Zh0gR3nSG0FV6nMXBA0Ay+mn6CcrPJRUYBNTerlhxhdXXaf3CGUU4vw1
-SZkfGVHH7dK1nPzvxsbwxtYIpURdFaPSBrvbvh4mdmxhi1eowIqzhkUC6B2qTCv3sTOeXGCV/f7G
-V7kai9N2TwlXjbv6hdPppUbs48OeA/mjiuoAfx5Z3klRkBUozsei2gSJYZpPN3JGM/nKhVXamcnW
-sgmxS5d++PYbENKfNirXXMZWulEH6erzENw5d0VsWgPMnmadHXFkPyEKp/anXCF0rMljOR8Il/fS
-638GHM4tIlyUTNeGIVLuidZG0F7g6DfNUR2qfP7y9ynrpn6EbVEnlYv8VcCAWb5YwGJKehHELQGG
-p33lq9lwwgVkGglP/4YVgyQSAN+SwGdf7McLyNgZcgopUa5bmRO8bW9r9NYqisSdRa/CuBZiygPO
-5g5Ry5Ho/akcKTK3Twr8KhsoaLKqcsVU8XDHcx5mqBeRzUse0S2hmLk78mV3eZKcUvQ6mWqJ3+RN
-6ane5EZ4uZYDCjVuxGXiukplot1fvHHNVJkIZK08eFFMqlucRbFsbVIv3DXXSK6JCngrKVqmrkz1
-jv67+onAicFlX4YPJxkYePILW6uVCbL8kwFYkhP6mi1L5IRW0eVxrOY9qtI8KyxE8mFl53jSzX9q
-oDT3FII7ICuK/Gh/u/6zrA9TZyQI63Ffory2u/y41+N3Jzxx2LJh5Y4dAkJZR4PRQIeWBkqzj/d7
-+ad6k8h58LWsHNPaY13xkxMfrVNquizCuUX9QlNWLX1qg/4cCAHeCMcJCb/iFXagdQ1FXMj7NpVm
-kchvqrr5ykuw6adSGd3WloyiAqspUYc06mjgtBov8cnmtut2lF6ivUYabODOIQJrTgCyo7SDTb7O
-fRYOiT9vo2hev4Sm38qw/wMOb+FxYBzczmLI/gsGzmadxNP86abRvqM5Hfr0lttteWkSwHcaJAy7
-ddONImoss4rXoWXIjAx2Hvc/C/eNCDOOYee4kBVQnUyk14G3KI1L4ZfQ5x0HyvUVFqznP5AnQAOm
-mc2A54cIzFGZ+ckj2wEhztXWlTdt6CXGIMGErRslLnCS3LmUJrm49m3JcKuSrfb89Eh962WA3s+j
-Ki4/5WmdMbEGgymVHxIFwiEhppMSSWMsO/mTfODPSvucE9tNSfCr3+mB2ryKKQ19QUqr8RsdKRTk
-6DzZEMjh8fp20YgoJSpwz/DqqR3HE2kOuf/nA/A8cGnIwEXarx22gSZsvICgiJ6cAsjMiJ2BXEIG
-rN31dVnRXKSBaVMcRSJ7au+GEtPEHirr5R7270tv2arsPH48brShazT4jWkd2blInCJ5ErhICujb
-XzN/hshQxI8Zhk7cb4Qm3u8rgMyPzEWTNuE25smOTBh924HfJsNOCFwuku7Q4OwnTAJukRt+a6S2
-W+GV+KVGK2p5vm5glojl852hNhvV/FTrjqVSk2n5biJOVGEmweFIneg3xjw3TVeZx0g2HI0FLj/h
-hkN0xYH89NSqxUPYDYkw5F8y6WV9jPuh08kQZNsN5n0PlViks/LvQkql82oo9isIWM2WXomOqUcG
-YxjYGcq7By+nK8G3A2SStYXbkvSy9LXG5bAavQ8QzCUAxffaxoOUykzOwP5NxvpoUWO5oHJrED1F
-KtxR6SbciuZXziJPAP258ziXcfQuM727IEGxhjtSUd/kqi0uwBd4y8bZTs5X0hGxHawE1Y27krUP
-ev0vNonGkNHQNkiO2+KfZ1JJNwBAIdFG0vu5pNl6hcDqjYRkXT6xV9Po8+dV97/4x1OTzmaE0xDV
-XTF3l8prXzPq48iRVwhcSM0pnm5BuAJcTDWAaH+VIxKRyb0ZF7ERgPqXmcs9IGVq0xavAs6LH8TD
-WEdIsIPvDXmD73hmIq3BsqIdJca6suwRBCIQ+jqCR8YCJbZBp/pCNcCMOwNcpa/VCr5SiwHijmqD
-WEBoA/9vNqSyr0dVetpOYZpscqh9169KfUqpDPHFm+C9RkazmYmaSsvjR4Sn1VomNjtprgtqqjSa
-gWQA7kZ83Gca3db++lAEAWzRKw2o4+69i4tG7R7BpkpcdSYgoQXD5w/il8WbaFhVRJaaDld0noOk
-1ppzfRoIk9us1duT62ADXahJAn7ujCYcGwQCsfsWgrYbKPhfSigNHuXTlJQe8SR6O2hhAV8dTiQj
-mCFnvctevUI27g8yozZxt1YBElsBT+/5MYqjjFBDzsV31YKsRH6E0TOwjL8elw4G8tAe7l17dq40
-ExO/ZAqrI1EngWerTCbk8WxuU4rmnBCsWwVJxPQ8q/2jqEVibawSox5lE0Obn5tQ73PUb5+0d0s+
-f/L5meN6rxQAnjCBpmebIkqs32P+sVzl1h0FSbYskoBoCYqBKVT4IAEV66L6ApoNlB4ejCGbjNTu
-T/99W2Bpsm3GejnQvmDP3g7T+1oxDRIobOLc8Y8T4SMgr/2YRjSt5FVaykRKysDmG2Sxp5dDLfp4
-EizMeF1+zt/HAJUoPt0zEyey5cN4asE6AfqKqEZNjV6rqClcnjqSW4AF8qyjosTIN9aZBAzWYgyz
-eUDNpHLy6JPr+z4AzU/9MjIo+Lh4U2q532X+PesEK+LU6pqNQCVJUZAdTIEUWpfLl7AS0C3wMgqA
-EGEHPmOjsLGBz5jlfAkx0UASLM+2lDOUtE1T4SrXefQ4THGVfv9i+o4TTnDFdhlTZ5jJpvg03nuy
-k8n313uCDAtsn7YotXrf4A5V0WUDBcqj9awA2YHZkZlOcJnABmTVD9xCQLwtXWg2wyZoZFKIgSOM
-p8fmsWXXANXABOr9lRiCeNwNlEK3g5wk7Y6YX2dHVVvrgR2uDkcga9H/GeLNBU9TFMzSwXYoyee2
-i+pi9/EJBzvoMVXv0Mhi94mIDsPhZBz850pBv9fNtC9VGR0xDzPTDSde8FfFbAOZlMqGVIUWyCvu
-x/sa6Ll/idWHPUzLyxrb4uvlMfA9GZhVAx8Y/gJPrZ8SEonwIOhseyL/d3Vwe4J1HfrzScmiBKX/
-Xao7+RDM5DecE/czGJqJcNiuKhSW4F4k9/TBKUUJx0p559NyMtZsbvBky3Q/oKHIjK1x3aBKEXNt
-TpErsnkCrvoUuvQoY2NwRadCmBFGASjlF6VssW8v2/huou37kACtu2mtSBwDp2Brjt2T84q+NxJh
-obGaixH1SpDUASQl4qn8ZkQFJXcvYcOT8ast6kcVN0Sg5YFcPLU5c/eFB5nx1urVK7KuP/WE9b/L
-PdcSKWM4RGMivDcRuu1/4JVyC93CIsi40HL2gWwYVHASkj3KpYmYXeu8Bf8V7/zOJOyYGfWdLZk2
-i2TWH9H7ux0PITvpevpcpceoNoAzXuxxLonOJpiY+38v/SaQYr+LMEOfU5p2hyotJYzuerT5jXXV
-KSBBXQtcF7ooUrCNux4jr/Uhe12Pam2T8CkLQwU2a2LAVDvDpzRzSIFO3gSgNF6QbgW7K1GEmJFI
-ws+KZA2KEDXZTjCfoydOy88734kUpKK6cq41xTr+pUAzfqCe244DC3Lj1XNlEMM9SR3EXUzIzCtQ
-X4xnttdIF9P7GZ6RLU/5c6EGnyKxiSn/AiHdhDKnhPXAl0vNI/Sgw1D1uUiQG61riqtU7kXF0mKG
-Yz7fqdceC06wJtDxrRemq2cye4N398evu94WGADMSBuCuEi9uCfKxie/zHYsygOhaV09Nm97exoc
-YNflXKHGMtKAlwOzFx9UQlWuDYMUqVC3yo8HzDiQasW7Ci4cXO7FqSTHV7RbpZY4YTS686iA+R+d
-N1lq3/PPsJJ+Y59j6SZQhKNzs+rPqgNuRGp9MGd8aBZfs4M99GyiUxD/doxKoy8VAHL8IzrQ+xja
-ECkMjDE729O6NFON4hNjyGM3PMueQfIpJwvl+y8/tCpowf4xhTSFQBTSxTy8Mtp1qbw6au+CMqUO
-N4by8tGMEJWo6lxpx9JbWKehKsFONyrIgPsDeuveTjYTYNCYo1GKYNYFXtyP2DNWh2k46K0/vI9C
-SZQN5Y4chjl8yq9qeJXmCmg5jJIEim5n13VvZzE2DkPFAQ2N2vxk21fJX5oEVQ3NT/n+0GugzLE1
-u+vuP600L3nU66s5pVFS0RQxgZc2f754C7GSoMOtaS3+9mhlCiZQmVCruv0QyA0dmX7ClNJTdjHW
-e+84gQkiQyZPku6bxDHCZygU5dRporoYQ3L8pSMvE4FDv0BCZCIKPrjWGqGpt6+Q+AvbKGUCcM4S
-Ip8QQK2zZQe41YP23TS0DXMWwy1Iq8PhqUkMVMBjIAfTBHa60XNv2j8yO0BfEuCTflyx8R082S1q
-IDvOtPcAngrq3wfd49BluwDmLUd4705wesNTNe8NCu93P096f+6wL6/RpyYVnjgYusPjVNwoM2rL
-kSkV+VCifSU+Ie3Ma+lE9BDbDR6CUQNuT+olS6KtJ5PyyeiaHPhcP9SSshc5dbaPwj3MK9VWh19Y
-CuwN7pmku+3zoZhFQjTz8Lx1B38jHXJ5WsIPU+3ImUoIO2owWoB2q4n2BGWLx6RZtcNcuh3fjZ0r
-TKVUGDFAmwdCwsnFh6YzGF2rlMVu+/kXb2Stw4M23TL/FsKgo8sEKDm0k4U03/h1kSB0VfNxbkbs
-MsYIwY86cfG0el4UB3L+raQ3dDXoAbIO7zPIcIFzMicvPwamD0J338UKLHczMRkBYpvHSPxl29c7
-STxpmBFF8U8XIORGvUMRg9S1U+m0lAgVVoNq6R0YefCYu/CLgpQ/7cruHUQsZLOegurYLO41wSLk
-CnxdHWu9q9SrpMknRdbzEz7OCZQnwvic+V77fzijy1X1VRqgzORVpkjTaDBwesVPggZMOPMYnKQH
-3N0Wod7vxGIh02i4ohkGc/2TTULYnElIl02AC4JOVkehFaG3+OP378Nw7cTfh/9gGwnSLLqPLymW
-n3NXomixsghd35l1QOFq2WZX9Z5vmC8ehYXsgDC2gHVOnDg5jvqDg9w4ab3gVfsWUzP0HhVu7xEr
-5MXKfX1QjHbecGb+Emk+qi4joMWRy1H4hhA/KHqvw/PWsqH1v1q1eY7IhuA5/oaoYkQagGMJrH9Y
-9wG2sK+pJuy1zTA10BB2SnJh9QQcKJW2NKSpr4ujEtQ1x/WBptUaOOatAcPyEcHvLoSOzUJK+el3
-uzkfzg9dfX9R6yqQnigIbN7iTd/hhetpaa0ciQ7rBV0n4iNxrWXi4UKBj/K4OcJG6v5jxjyFYHvL
-8A7fKS9twRBOGVVZnCdxkEscJBsvBsJ3F03xtBLi2jd3slB5JNA6WVyO2EoU1csCixpRsF/ErQFH
-dWEi+4psyE/QS+7n1BiBtmuruvH5qxPJNzkHrz6QdM1BNyZNKKQX7t3QYHorl3g0pBMzlOhr9mYj
-Yfu803YVATUt1CerqK3kuocV4Ikl6JiRdCBJSQ3NACFDatTIoyEg6h1tiX0CrukOV/V+nLIiptAN
-phd4ZZu8LXHP1etzkcW8iyyZF/ZynM39euQE322feOyH6p8fHUPvi8vrW12dCXX2stVJoym7N1uj
-18U32aD8PapqKX4z44mkb3PjNFnn174HnhHIa0lrVxYsqh6o3u/OwxzteGwuknp0DHRUfiScLpkA
-tcTW4V+BhZYECsuqMUhipLffpWBtR8tlevmjmdonO+Gc7yI1agdP5pyuLnjUCwMQ2DKk2H6fVIUg
-wVGKIYTPObocaKoPIoI9NVJQB6i7gPbNOWBTAwHHkv3sifCD1ZrXH/FoNg8ipvGTtuAg4gZc48aV
-4Jc762tGVqxQzGTuDnEfiDi9xu6ffuvp043xSPqHADxECKNqnH6Jsy70antD4rzhwbJsHWziouuk
-z/ytFBCszJJQhekq8K6gTqm1vJSWzvfavh8vecha0w9qopgq2RzTATusf2v0a2KoaxoSWx0/ravU
-abroWGcL/hu41jeSJC0OMRFGNdWBtiJDLT9oWd3vTucP1m4/F/qJpYbIPqi276DqQtzzg887166z
-riUTtwZlx1WcDM2M510LU3IPazDpUAJ/sAnZb31ZjtywiNnRZc+5252K7g0dKaYKNfHWKYYAXq4x
-xfoqoz2W3zP/ISKmFwtOPxSBwIBuphBctni+9iYy9NasE79n7eRXh/60Z3l6bUBcWIWNHuhBSCrh
-Fz1R29+0rIsFXbifRnaQv645ahBbaFr4gBF6ySbAjDQYM/4vgmFpQEJRdX8h/K0KZE0hY/YW/34L
-7wuEcZQJU79hZEYNXJQuMdM0cKt9Nr1ngS59jqlpb+DCx/IJ47gV68l18rtMs9SkLuzsRoRTvtr4
-sx1zyDtnqdWVexNsZQfxi5t1rqfGri4E/vutQ1c+xM7Kkjr1VY1bsHJ9G8R75Pw7OWtorWFp+8R7
-jSToGr9iWx+2LKp1oHjHxbbbjdl5PLHr/tB7PvZl3ckyV4MqPTY8kTGuvqWf7qdd8w1jW3u2Xk8q
-MnBn5lSABOt+QVU3jeAD6tS7mX3B11/H9/JUSKMWabh07vhzIN2cIHfg3OxqsdTMhdF4YEADndUf
-UrTa/JQPtIe0AxRD4qhxOj5aH+8yKEJ+Ofi8jCZV8nIHKhgsSUfEdnVN1KP0mH335cydwYkIYZ+R
-ifoWwVC9Mnr+OqpWkr3hmQeglZNlUNruRyKKB0rUmSlCu/G4KGooXhKHuxVp9HwretitcePEf2BT
-v69JBbgi+rTDiJgmN6VhSMOyMS+5qsqYbfofFPcQu8mTqS4NzCxSwGnIpYLiRhU8Bj4x1uAHgECt
-acAYpMM9HAnUlc6tb6pQ/GcbxC+aBfQNAT9/KVARTHwjIdb88qShW2Ap4jrULXqKcrOGsxCFRDok
-WpQKt+nDF8uhB/VM4VQJoeJG0xZiZY7rN+erxzyNM0VZKdSt8e1EmbeNC+y/SeZEqbOXHRTR9YvJ
-DoEkUmY3O36cA5a7+qIZaHetF+DkCwAaeZq1raYFcHFfk/p1gcnPs2y3QUIvg+0CxhpUS617I0Zo
-DWG5WVw6cQqY3GaRbmQB773R1k+kwyxfiAXmim+IB86Fb/eFlktHbw41O4Q7IJnLzL95140lXaLF
-/W+8OcxrM0RBKAXJwXG4bgVbXyYa9FFNFdEYzE7mJ6cLqZLMA5igLPn+YCrcxDA4GHaoNlflf2xK
-z+6ay8yEhqafgMquF0cS+OBUYHWKwsDmXHD6A4c+N7cYAuH8X4EJCKwyGI6MtTFugIu94OB41FTi
-JagfzHPstXwJ3ZHX9mlWPLXsCI7AGenasDN+SGH+glbgou3mf5jlVUwYjSZVSn+pJAW6+MQmGTrU
-Y14eNCY+D53kBnCZWg1y7YQjCy2mnQGU5w6ktSZ02Xdre9NWlKdGCBSCi6orH/yIiZKBxCrq2wdm
-3LuCtCD+ztprr32oksRVakoPbp+wj+XlOujnkDtzTm3dyIwh3nyspK/eaBWxBKdvcKd1ZrdJicXI
-6hPb9BppbyY0AUC9Kf38aHxc7dXGllxP7lYpFnGt5NkpTMFVLAbxY0se0WAxlBvjdeUiO/7REWpp
-V3sQyPjLluvWpXpUyK0bh8v7ft8Kio7KMU+klbWcicEGMzNJn9N1cy8Bbdqw32B1kpcvTGhfZN+M
-2em7yMIIRdm7eWEcvtAo9jvCVOsSvcivZzdXm96QbHHf4IprmiBvhXv5jh7UrSnOQtCJEJXoXlyI
-GLzfcFFo5kRlkg0TXBSHWwTL8FE1D8Pu7DHX7WYN90bvZFhO68JHesXR12poAHqs/E9MzZQyRsNZ
-affutRd/aI91ctTPp44r6xkkStPh64B+EFa2siceFpSNAiixx7VIsyNLEwp03sKbpifx3MVOYz9r
-al70hLCHANqrh646Ghank+OjdOrSUrotvtFVcUUurc3AwiUvkP+x/M5DJPcrwEXfhGWoHC8AP3Ej
-zjwgyS09dY42cbW1U3brfTGhT604zDUQaks4v5AUGHwpE+hfHkYwPzFcFFamLKrJPYT6M1FGxPuc
-tyVlP/TRoTAS6NR7lYAwgOlV6c/La2bVtWG3htDL8mDsiJh+sibAaVVw7UsjH4Zue9eP8uPUS/o3
-8cpEeMrxBy1Qq5110mQF9IwP2NhV7fmAOFHUUsEBY0jcRoZbjTLUmvbnFWiyTXhVI/vrTKePm62P
-iM3fGHw0L9OK49wUMJi+7b3qCV9Q1tTv8OoRdUzP0GZBJO2y4jaXuCwL3kIXK0KK1fHsVIe5BOEF
-kQdlJv3lMbbrE43Y0850I/rMuHx664rEG1gZ/YRxe0bVRk1kSL4GAlww312X74LEPXTBI3an/qWr
-N6wPFD/YiNy37vrQlkdUmop7ZdO9mmC4VHdrpw2wfag2tUXlvRk9MGrmebdd45j/ho/JyF2oM3Ua
-73TDuKpZyGx0XpxiwGhfmRKcK86nJD+Tg82P7dO5h144OS0ZcartObu/XZX8Kt3pVcJkPmD5rzce
-N3omwEocWkGMsobNIoT5EQqGusxck9FipjRPIUeALUDaNwIHCt2sSaUtHGdCtDHT9Iir240Ju2n1
-wt0mYtV/7n4xdN+uI+5jAVMuM5VQoJbcJXkhHSh9i/r5lFwdOEgbe+3+KY0Awq2SXtEPQj4XVToY
-BjPmfetdvNKW/K0LjWcHj+oqFzO9fhTl8o/JcPHMNe7aQ1IZCpqbscSJOD3CBcsnNDc3cyvcgO8P
-tEAkCPIV0YlcYjS+kR4FNUM0RApBHCo3yqOVzJzHzlYT/zpH9fV/dY550shFgs6HaaLZ8trIAYka
-u4aMUhrcOxcbYcleIYl7U9wb2mDduYSQ0lqtwUKqDtzFQE6OHCZEVSqNJnFqzeOn66vF59A05qL/
-3xxk4u7CQ69tCPVyzHzfBQDtmSTz762hJ0UKzGZhyeEXggnucjSAk/YOJKexb/bbOvQ33g+Imv1l
-38kX8MhpnDqwEfghx9mX1RWM9NDoZax2noBwmC5KiNuvswq30SVY5YD746sudKH8vSQZTq+AY2A/
-X5/xewm2Ze3mYLzw3ROTLP9WIGRD79NdyxmcBqjaJ251PKt6TTPRzR2FXRDY8kp1COWhru7xxMz7
-DgcEjQExNwXHreJ2cvPkDCQtSmWj90Z5CQxuhXDhVey6gYN0ikzCFVet+86PeU2NMsy9fSCZgR4s
-HyIpuzD/9YdfmIvuKL49Ty/7YmUJFSaQFr3/rtnYwkpd+qmyUW8mdS6QwE/8vQ70wfh8cGVFlbiC
-J6VzVKM0crsdu09UvM+6HTj7vIMgCPZTsdCTTln6JgYNydbCllpkTgXlb06j37wCwRoslIrm2M4D
-U1S2934Ud8y+re7zd7dNnADYvu5FanEqQMYwBgy1Nbaj7m1G7U9Kxx99FuyIM8vVjQp7B/X6ym65
-tawUpLdNrbRS1ktqK+yuU8FtWNT1OyPlJFtzXBKS4rcs+2IgTFxluGDIxD9swsj/vv8wvRHyJQvw
-15McKHfCoZiXuu/NA+hr4uD7kChFXCUa2zUGWcrxNGgrAYKLwfcaQmgpRvXZ+N8i+zeqD3jShaAZ
-fJqB5gtSOOYJO9kOj7hYx1Lt+mfsqFM+IcAp66x8hTuPTD2YUJ50qCV3QouV5NmiCQSJGXWVKGv7
-sGfZGJlxHMcU7e/7hD9+zAoKz5t3fNO0FE5LXoyGueSub7jmk22UqNIf+fGFcTkLy4NCAn9xooV7
-l+Qli76wKB9G7oDc+D1R8mTQVoK2FwNWF8A0nLt80l4LU/J+YooeqMuHZDZITthcWzWluoSk3UrP
-nzSEKBgdx3z5LO89HH9a19vToZ7Q1rGZt6Od1mikxNYRFBJoFu+JpCBCFziW7JSMWC7zfMJd5KJz
-HahL6yc2t5kCTEEjLYHX9iCZDwFJgueoC6lWQILY7q3YAI1gY5bu+UFB8w2zo/pnFOTApdOpx9pX
-rlo/3ESFpyasJOevBZ400zlBLvVpoZMQ9VObW8pFQKBTXNzpLSqzoG8j6JtCAoWBfvGVSpF1baGt
-xvZk4c7VcrSGvRp7cvvilktEQY/msFPX2V00UoJw11Zt5HJVcQzU0hV/ezNmXPQePzBLtFWtHr5I
-cUy0Ub0RHlFC2j7Bd3/F2oRvFBeLWkjdy75jCSVpCzitXx3SQIgNrYCPWelTfC3JLaNb85Ha3ZN8
-m2XKTKUwB+LNEHI+qPoPkdJ1icqI7znpuwaBE8K+n6Y+CDt3KTPI9FywiAhRpuygvHzo372sDDff
-asfTP0lTzuUwvg31rk39BINUvrFLV3f/jQb+WtFFq1cUCD2T7S1PEC6YpAOhcMcdaUtwzZO5/EYd
-+D4+yfOm4pud6FEitRHkg+5CCfUh55P0WDxhWBI9WkpF/imzb4flGaZHGNPMdskkzPXbDSDNM6/H
-PxypaJvfxg1VCtEI7rUG6SZEvR+CkHOzhohiLQPyWEluVxT3iGQvT5J1SLGultuV3xa3Y6klC+i1
-oU/8x+WUyMTHGKkjrVrp/mec7Foat/7jgHgfDklS1hYPKYQvauapCG/Myz6J+1FyvqqoPpfqLSWy
-jee7XHLi1YzUuFuAyas8e5oY8ioGlJy6bnQskNLkSvMpG9K16onSTIFPtQ/qwPnMUiiugkudRTCw
-K7+9Y82TEQool9JUQJDz5WZV7FJyV5As0jGAmKHRE5KjfV/fki3KN+YNOePIN1Hb0P3h+8/cuaLF
-snG46NtQM/XONM4Y/k4k/7zx5j3IuoEdDaf9VGZjVqfzdonkoCoWhkyRdv95mUbUUCzqDWczCz43
-zJMkyHGdoSP7F9fTrrd+O4KkwvJv0H0ZhBCr/7cPeNr2oAeojmyzScu2mu14bop5lX/3+ojPKqr2
-RkL5/c//JafYMegQ2Dtr6Mn9+2mXipKW9m2i1NUAQMu3M8M/VqPTe1OVxDPGXB7Bz5nPQVQ+cD5v
-5shgYBknmkev3P41FTur8ptVJclMyJXSyxpRCL51C3O5uJRpiRKlYZdNfbA9qQFqWYdFq+A2XFE3
-Reo7eb9ltn9KDKDtJ/7Xbw/fBE7Eqlzc5rGd4hSxKiKsdR4g9KDZHRLJahlGVxrmdiI8jLaTVnYl
-4EPubDpMdiFE+QV9hve967rGvGCV+Uh5oggEzn+UDhf0oaxQehOm5jahwKB6LMjhaTkFX5m/OkUz
-QK7T6AnV76fmFIsl6C3ddqVYhf9aP4EDH1eSXTtjR8IR22yyJ1rN+5wdMsxt1khW0nRyaAbx2cax
-aaVR3UEQdMIuf95UM6vuXyfsD74UK14d0rkbGdUbbukFHVF+qgbWSwGg+GA3yEUtGbbiY53qOPqU
-xpqo5wR0q5JlTS3bwgSb8+urv83mGUiwvN3Jp7ySGKzbUMAYvX+zs+6BZsMSETY6VYOALFFAn11g
-IeIH32EU6WFBl2bWSnLrXdd4mh9XpinyRUZ8UYVqPPLUCXe/+k29nDhLuyOv6lFCAEPwYlx8lLaW
-c3jSTL3jsdsEXQyGI/jPmqFpp8sQECmY+/iY+ptUh81y7MEfRchfI5VDaQ9WVU+mDCcbWOhfADPq
-l9iVbtt4MkqSkE02HGQhJhJki5gnhgyLQjYV0ayWmUAixKC/1DqA60e4yh+dFELTFvg/ad2Ui0xl
-9k/zsI7VPJNg+Mz91BdhEa6Q+6hVgEN5JAEUiAEGqRDd6KmAu3BlSHncUP/pMv/pSgnJEYpywfdD
-U7usQQcayZ1QCFwa+FTaCx6uGqFqFpTwiQCKq2lPQswU4zJyC11knPj0Cb2lUBMdmjhwLyqoS+N0
-isvY/rwLd4se1y6LY6zDjL2ewt4yxAnEpnfeA5dD7ANtAa6RuYuLuQ37ADZGpcKCcMojbz0qDdv+
-a92esYaKu7wkW6MZd8x7m9UnK59LvvNczhUJqXTTydYlzM25I84KNlnQDKGGF0MnGMpg6Lpkw8Im
-8yXnqubZzzLxzXV9upOFZCd3IwlHvP6vxjIANUD+4MQTGXmsM8/2e2fIkPfURWizUH2Qbln6gkWf
-+ZE5sPb7haz3pSQ20UEHFouR2HXerSQ/JD+Aw5zm8MrFW7XdsFFelCXD7oRO/1AiQcZHeKNAny/q
-D/7YJpxnQ/SLyenrTwOM0ZIa0CFs08lLj+2lxQYlyRRbLM9GqjkUmhLKw8RJHTA8WmK0FJDZVQBy
-kXcuMCvQu7oQvLt8KIJrzsLfmKbkwkDaGT8Fd/BZc4Mh0EiRUOnEXH0fHU+J/WjbHD5D5lzD1pKi
-1QqqPrMKbFmdDaYcn1sLZFvFyOuq0D+nq1NFh90z5zURZfaHkf4C54VBH6F516zzE7PJq5WuMEQb
-/l1M5V+8UOceB9Ebn+0vIEQZgwsu6PebXMDZ0RWoY9WIo4/N2cV0tpBWVvzRiyBQJY3YbpjPGdB5
-q6dBym9CkvnBq8/8KCE3KSRlDOWCuFA6TIq53mQ9HtZ7AbnG5UakUa6K+uX5ofjkVFm0A6aYdPnd
-l4ZSLACZWZ1qNkgQWxbiOtn2Us8d+t6mxssl8F+pmU7IcC1NFop0Bdd/pd+e4FOs/XoCZIXYLzQI
-NBRACKBizQ0AK/PL7plquKSegpaK6wyq03av4h0356kNTE4Ac+zAa8tUTQrF2CtjMv3dw1R9NHOK
-7Fjm78z3jzHdpZ9sFGBXVBnX5FV6rOxpSeu/CqGTxcWmXMzSZMqDWFg52bJEEDTft48IRBeq7a9k
-J3NoBwlqsIeVP5p5cXfkJxdm6wdXvmYi8ij0IQEX3Qvef7RPp9tHp2eJQvIRWpd+Bx5x9OM0ZYUc
-6TjUWIFlpXO9VW93jwhTxtDr+ti9ROARU4VplUB8ZLWzaNcHIvCUkhJXf9d6Nrhb0IEQ3/wLzBcN
-g1BtSEdWffOsFzW3MN3O8vy3xgkGa2+KSp8u5irxzQcbdH9T8/4C3swJEn/QGmrZq/iiBJ5tCaAa
-+cP1m2X2nLBnp9C8GP425YYFoUq+/VYc6rffqZymdKyDuwXKWhg+aFFR9B9njudhbz6fkeJPzU7s
-wnd7rd3GKb6K+Bd/fK1f7I83xUBW+GiO6JaHuDGdlmud/LSihBh0DyBK9bsyPMVr2DfFgumHv1SN
-z61/pJ1EpVFk68Y7VHN8J4Gpc5rC3mxiylZ4j0goim5ip2t47YCM33ZzsALWcg3yt0Fxed4jeSWf
-38b2VNJC/GtK/3f3C+BNQS0+A5uO66/XyhJJTup0Oz2rOm52eLhFkf4J3Ie+uOdqfGcownXKksz3
-hebDk7IXXXGR3xtq9286Akfzh1P8A86nlfu5GHyLRggya/geFgu9Lga5bpjtBEIlBkbxO+YyEZmM
-m9Pcfe/WDa3N2wV0NrcurRke1JgiTF+qht249BVngPUjReZI/DWeoK1fTMnnaATXr6r2e7diY3Ja
-9U8XPR6dXDSIQW0T1tCDi69to1aiuuUun681/1PTkFo59CiuDn3ELqtlPRjrqckwNeAz2eGuhFkF
-wNb9cIZEMcXuP4OnbzOBhl6FKmlMNWL49OMTD7DkWlPtJLamb2ImG7qcQOK5SBiYnKd5B7JHW/vS
-uwyDVRhtrXROE8Ou8Uvc3VnnrDzNey41ySLzRVi0bcYfD82nxpTtwSR87IJu5z/CRXqI8BZabuRY
-Awze97xlSgf8FpBQ1ueDuIXY8EYjburA2YwdD3r5XxLZwLchq/QLSpVrXA2ZnyDAUt39W+wKUlfs
-Id9GP+caL0s+grA2YfdiOOtFBW0yS7hOklbNhDGjbb4sNGWMKfMdcll+jj38xFLHwC+VqgxtTNHC
-xrGWvDp9woC8brw6g8f/++2WsBgOKa2qqPqj/N82QG6eO3Oel4qkJ3apsvkl3K1ck+VJcn8k2k9z
-GhcYoYQ1t1nuQg7iLqjRf9ZimwIgwtOtsrsSQZ0e8XUY/0yJYO8bV9lR0mkKliwy2gO36S1E4077
-fbv/wMH/6TyCLIK/9FA+Q6gsjFk/hYY6gD6HG8Dpw0FmqZ+Y2i30sfNpeMhjTMnwLZeyYEFlYSMy
-7eRo1DRQa4KWz+aI3mbNHLa7LBbSOrqrdb0x6XgfMmoDMCodmlZF2F3uiOptjC38EjEaqGDSWBux
-5auS65ldk+iIA6f1BQkrl/mv1zeTUNOOiG/F0vDfvuZTV72YW7ldJMTIQbCB4mvUeyXuSX8MWDTM
-F3R7FLWzimKNewkoOTyFCgBgJd5QQvfS9mYrdFz2+4ZcUCcSLrVOiQkbAICyDc0gpruxRTk+xt7Z
-q383qt9EyXZWHnU1S2O7XG0i/HSUG5q5wUTKrXGfjBFCKXQ+dGt35EnhlwMF9N2hTY6wrNLJiPAD
-FI1eco5hgp556kYA+V8c+ioi8OSfKlMqw5iEUFg8VHzHRIjBeAeEpdR+YjG1PnVmbSlhXHMv/+xh
-NencVHjUwhWAMiYR8zI8nTq+kmFSGZpsU9mLoxIZomQwxeEE7uSDs1TCtlsJ783raoNzVGxo4rcv
-5Jje/94SdlcST+YXNAeGXa9qsumGbpZ7rgC8tzZTaEGLwaKCqMCyvYwM54MRo7r47H0g9lNr5OmX
-70JIRn8aAFgow2wcLTQD2SQHCh/JrpQS5hHLjBhhiadQPULJYHoyGU5iHI86Xf+XOIiMn04gZ4l4
-zFjFHldGZj2QmCH0bYma6PNvc6vvH4X4BOdo5uB32Q7Bc2zQH/U41YoKmEPJ+OIZULc2pxwkm37Q
-Mi/BLuSJpwwk5uP9oYn5oqMAMCehN7YI0SekGmojem21Op26CyE80LVKPSFwKEAlqKmnB52OokR8
-9GQKtfMt3n6KH7jbh6/F/9z4TdiKqui6yKhXynujOOpz0CEj8ydffZP/fPA1tVHl/mguLxtLPBGS
-u7Tydc5iZS36VpV016JCXIuqoLK4SEn4Pfhg4H6I26+I+qrnIs5bSg2XxUAynFx2bEcYQTP9bG4a
-9CiohyZSZA3Z7Y878F2UhSe1s5z+HPWsbEeIkR8Gro3HDUVaSykPURPvnOqk0GBn9A/O3xJrPZPX
-yyfUqel0wZAY3hfIyBvzinISozvYJWXfb7XWkpLAMu8iEbWAv+sfCI9BXLaFom8L0obaTtT24PmC
-oGZM7k/zfzw8XUd1voKlFHfugxzgb3z3y5NvvrrrDOEb7+4FxKsjwL3ImwyLvhvv3YiOfXl3XNXb
-tUAzvQihRLC+MGr8hVdK19rNqKw8Igx4piZ1YPEKe+BMsXYIqVaqPxrocz7wiCse8KsLntGTKLk6
-s1NRQ3oOZeML8BGYvrDOQ+6jXA7c7fYkr15o8fzAY5eGtdwFG+ET7XRfySyZxqUGC4hjzLoozntL
-njkoe+a4XVDHJFvhZY4AHGTYRq5GGMJ8yTxIYQHpJSjrs6qfxY3YHp4t+LYbXDRNUaHwEYz/+xyl
-hrsVEpn4UA58dWy9xEAeBbHS3otEPrzNVBxVutFeF+NUO8YN3wGUaf7T4SvDcyPzopitrD6VnWJP
-8GGmbWA6KXyLVLGlEv63Aswoe04RYlvZ1rFkMIM5x9ggUGpN/yOtwOiSwqt65C9zvHW3XrNT7XWo
-PJYdo/o/wu5F47E2/BnrdhWl6MywhtYJMcM2mfIwmhVWU4OFrisLNuzn239x9WZ4kdAK1Xef3otU
-gZcjdRsrJD0vGfwSK7x0e63AJZ21lT54DuMPceKLGpGT/VnVgOGfUnEvcN1WJC/2WFHy9VnNh8GE
-NEBnSCCZPAlXFemxBNEO3rlB7JOSLsaAsA46vJSGv6smQoMU7ZbP2qqaKykndrnwY2K7WfD6Ra96
-8ddTEu2doloAqeBNn8tKyHqZlQEgEa73A41gLzdSf1H0IodVskYTZ1y6R6Oeo5V0V7C8Iuk9fdAF
-NPaAO1BYgOwB9jakYrt6zrQ4DB7PTZ4jMEHeHZtyenkafK1Af6I0UxTDUuWXSs35Jra8dZSPMmiQ
-yx+E4Yw1rcUVgl3iLh20zOid3S905Vffp0pYHOu9Q3vcnKnhEthXNBbGYzykbZZI2B1N9WQ5NrRw
-IZIW83pgGoYp9nnZrWFqKMxXsJZqfqhws8/+Nrg7yxqBDEiJPrevnvX+a74aktskeFXKT4Yz6e0i
-2vYou22cJehEO9QC18vy3tZiSy8U2M7Ec0bBg+Vo63DW3coQVTCNqwSt7FanUhk8ae0QcaNL3T6u
-SQtuxvtEzYFvD4r2yew3s/lT1fwfBOhPFEMJ0FnZN9MfqDZAd4QmLPilvI1y0A4j9UdSBhdF778U
-JJjxVGgaDZfjdJ0jTnLvod2DXWw5PIx3Oq934xYhLCef3UnBRkkNu0UJ2SWs4fg6g7gC8DRWno7X
-isAkcZpQHUQt5YwceIZokYVJMpWE+iBsIyhqWB5y09A8F0wgxuQCsjcoyduImS34feCZXPNpnU3p
-WYjbJ/MrdxLSKJnuD/tET2o/F6osUN+9w7fxmd8FAtNB4YevhGrmfgNXta2SlBMh5HQG5ymm1Tnu
-LBPY9GXpZqJ1RiP+5rPBlcwepJsnYvM0eaCtQk2eiskXfe7r5L7Hzsph2kc2mO1MF/kWvfQDkMXI
-Y0zChwYb6w+rU1yEIm8G0TJ1rSYbUh/aJzRv+dG3jr2kfcwOtS4EdvZFB24kDDVGTmZV1VybyNUw
-cpxk3LclNJooOctsKJgzSTALbyxKqTLOmb8OCq9cThddL99+ZzZ0sRIpyaeuLnpAnApCyZ5RZmxG
-asCYE6hrdak3XBv0JtPVyW0Pxlc693p3d6/LZsTcFr0o+QjRGmV4X3jd1W5DOtbGpvgyztpc/lfK
-2A23NJt7KeHP7USMepmx0NX4i/k2JGFex+WKAbibRoZN9YKlLCSMV4EEVloZkWIRyDeke9krLHz0
-F9vxHWHMqjabUk0pKVwAeoDobMcgJA1sQuha6ydQRK9AEgch20uDZAV/63xYX7yHbS439YNjIKZy
-eY9ejW+LbIwkhVimw0/bPppganyYATIt/j05yW7hPjdqLb6F6ePTxT+1lexdvliNQ7roZNPK/PoP
-b7tYSDVs42jYFbYUNN0eYHYbHDm7P+gJ3VscTgB4fwX8gR9FbY/PWLfaiZwJ2lbIUvQzJNTKMOzH
-EUNn+4Ocxv8yOf9KOCKv3vBrf0a/DIl2QAT477G6klh55qXFU6SChcvvD0CuV3k/XO+VAIEU1qaH
-TeFM65aUDWYwaVpBUywnIEckLnjL/xEuLDTBiJCGWZu6hNcBU3CY0NJ7MfyN6+k7QP+y+M683OxL
-/kITXuKDJe5+tadzLYtA78GTk5w+U+MnwVrLvDbwYIuNMP9JT0tnQKnyszPqSrW3L9cvRKsC3xoY
-7LV2RZWg3pebUAeWCyoZtxJXUucIcd7fdWgnEkVz/CWj7AW7hm19MDIN7Q5AtMsUrzQyxU8QjTSw
-kL7N85NvG7BG6TxHf0DOOME7l+b1zhYTPr1eyDwiAqxgDF58sAFdBrJyTxAcAQVDggxUZ6ZnIb0n
-AitYE53Drh3nlMdqf1aw/bhEWBZhzd7RTeDK/IED5buWZWsxgDzoqrytQPJeZ2/8ISfKvLhYw5cr
-8qesf+5SzpK3vsCwqnyerEttWa9zmHpZDevkKZxIsixi4eVOFq3pdZE5BYOPuljvHr3YFm54BYdB
-qScNOUr/mpJGe386IxVpkj+A2On+aDSNC7pl4uORdGTOhfSQYLMzK+AjBNogFI+bNqaMq4OhmG1f
-Uqc2DXw2buw6/tOu5jYKS2PxRdbht5H1PCq4DfkWKO4W8FRahkGvm6Hn4fk3cJK3WecXCFLTli1E
-54LSPh5VsVlcxfthdyLt9uHP2e98ucoVi1grpOwtt61tCpm0onYoC1zGnMrqSMhoQxE0iD82hWpZ
-3nmxvCOOqeconndEraUweCPDJadwrtx40FFzXnqW/1tXdQANx2LdB3byinlPA5SozatgjKbBiS2o
-QpMtZPUoxuCdwIW/DpuEXMh4xhWKNpo4VOlcVMJCiBIcVn4o8JrWrGN3x0OflCKpjFKTHjDloB/m
-SbluTkavSXGY/QiEz0zkR6Lkyk0A4ence5BtDVtqTL4889p72SNLcERTVGRRrO5Vo8fi9F6ijnTZ
-2Drq4d+VB84T654142ADpJnOG2S8N0OVovw6SU2hUr8zsvbhe4YQuF1UYscRXkq+MobgwO21Skno
-QZHCnptbyNWqs+jLgEgWn1EN2MWXnF32sbggBF05eHJQLwpWoJSzqjpixjpNr/SR9uCQVcFUhDpM
-he2Wuh83/ZMe4cYAk0oPT5bijHnVmdmLevMXDMO8FkyOX7THt9sIprjiCMwMOg/ADLZ+bl1G1ySs
-wJUk1nTkztBl232GS8Z74lP6UC54f/qctefjZPt4pFP0V8kyYGrk7AMU8b2n6PcsOhPgDp5e5T3m
-wg/L1AsiK/AA7MI35vZWV+2aoWd3NWgbhksb0DO81BQhg75GcWNqP173j3rSwvCMR1RXFwgRNraL
-cRf+7IklB/pS9NsFfwl9smlOz6bbaoHbeyvbIYQUH0eJVZ+sqYqWaRy0Ifp8Y8l73gUpajft5Dib
-F8RmN1cJqiIgDAcZt2OO8aPeKMdGUOqpN2Lb0gLAgpPQS9vNgcHlS1impSO1ShQSKj488XVv0G7b
-iIug5yO8dPOrRO0yM0bHe+E9VmrhsrJC5pu64jnW4aBfrdKHRX2jY6qx+nE35ba09voS1EeMi/PQ
-+bzs5yjEaJbB0bGb711I5QYI5QIYnfqhMLwXLC1t1X0OxYtEQDsT9vyX+A6IzmxOaGh93VTF5/0m
-0Ypn1jqYGgCloLFt/lyaE6fYy8XCPi9Y1bp37WWGyUHjYWhirkVHQpFV/sjrQGHOwxsfP0zJ3sgS
-T+G8m3KISI2GMqqjEHys5xhIxCVTXd4g+4lXDCViGXEfuDwwq9TPjrRUw976bKoUgSaKVVeFFyw9
-FDTWgV+CccAgmS+oDLT2q1Jx2HfjJMB/WGLP2XA17kKASfV0HFa1tbKQ7uI6Lu/LgDK88PWHh5ES
-LDsOMLfSG4wvWUW0IkiqlfHSl/MIQHer4DWjp3YZ4uzk+OAjErmJfA7C2eCxU+zcpvUB4SldYScu
-EEfxiHW8lHTG5RzHY5XKCEkg7LVjAifYO/9hLtil3g1u0P5p/0Q7g8RNrrF6BVnhR7pJpDzhJmTN
-s4Ht9lZCzCJ6+NkKe4FpAyCbUeHOFwg4ulid2RhJZiGL2PDx6ODgcJdWs/PBebfIGnBhT6MOTrG/
-zgX6T2UkyphzyWm8KQELg1e0T4jWCqajYc2yc0vF521bxxMNjNPWdWnro/TeztLa8E7GBljX6TN8
-ienSaBOXEq7JaT7kk3mVVGQ+OI8YLAzxDPZ2Gtkwdp9tLywzvMcGdPw9m1YeTU6HiyrjMVl04Xx5
-BoS2asOz+DGaDgdQPnWilqRiNXoTD8QQp97vy3ARP+WsNC1DziLl7DaJ0WEKZK9efzCEsCIPhf4R
-QubwLrcaZn+rTUNbdDHkmwcfUAnPJmRJDS2Et++xTcwCp/eQ7T+4c9QBt8M9fgik5MhOif4JCa5t
-OeoOpLJ61mRI0/ljHaXF1XeetyNMC8LYEZiHq2Ar5Bg+Bvm9P+elPTjhr3jhgMAMXFUwxxUpkWyH
-kwVMJ675Q4BEBuR3+QzEAzcC9tpuPtpXcat8xOUMha5jIMrQbMeIE8GYO9VrizS5Z5gZU5d+GMBI
-Wa/H1aj2yQauoyEElbugVH6Pjox3p9WAtqMl2ExMh/oS2Th9G8ytUJesKyVaGiZD4J+lU86t7ub2
-hrJ7R6HRllZ9WL+oSEeP+gAkyDDFona/3B1ixYFO1aPZIvzo298NNdHlTPArfJUyVPJAoj7lmN62
-6YDFD+fYwTqjjo/WY1DnGoGV2M5+7yywex+QskTqx8eiwOCZMazVv0YSDThaqDY0v7fhNKcm/ugY
-iEjWUwfeOkqSfKpkogLI5TOVGdFLHcom6VUgVH/WrVLlRQtEZF5Cu1/+GYLeZxRUJy7Y8/nthaRU
-xrAlvX3of+PAsnZS28VeCwIejN8WDBVYjZNbYdFcgjCxqOI1h7OrAQl/tfOv1GJRtg2kIFCo96bt
-W7hYmv2Ese1fXVPqL9PbkKI5JKx/xNKTmO4xLCwTJOPlqDnTYm/qSNK8cQnP0UtHUIN8AyolEIEe
-tO1Jd0An2B797xhcY9w//+E27P+MDby/tnt1F6PvdP7G+9YqADRWcXChHgornLoV1pjBCiqGV4Yc
-lOGR7oYmchVXb5bEbtMkPjoJ5ujiOnvIE/UigNI3X1lscjfb7ajJDS8P7NqAv7B+B4FefDcxLh2H
-iXFzcP4R2xCsQi9R4LIn+YQ8mqS3SA36Ka1F9kiWpwUQmM1slCu8F4SFkB68VaY8aaQYF9BAqqWh
-B69+MOhMhblfJqmesiGEuhgpqKt1tmvrv0aV4TqlFX2+tBfdFqjLYbkQ8KuEDiwtD/THe3WIkmHr
-mSFsyFduGfsU/70ouAD4gltRCzGTkbByi8X9zyIfX0cDlXovZ5TB9daecbkvsF2ytRSBx+/KLx0T
-UyZ2kAzPiPxREsjcoJECiwsXFxUkUlzucj7Hr5iZ3xiKG1bv9CW1iGbseKRQO5/kmP6Q979BxI9w
-GsgF2BKTyVYGDBdlUmUumu6x//5FpP3mK0T3K9l73uba4x9REMBtMHRG2YsEyY8I2TVFi48Z5cxj
-OuEJ5gMW+H5o6SUXYo4CbRhOTHpnoGcWNeOWkZLHPGS+sPCkaIYDmmOxG/StBUKRn752o4AB1V+w
-mGQiethY+xjXq2nfQQp8PvBX9rg+WOhstF/ZmvAaYuTejAZUeKdQq09zuJzUmvfo4qGVJ73haI5r
-2mB0pa2gyzX4TPIAIeV8bFWxa263ZQUjLEX/plRe+eooE+5IbG1cjiz18VTSCDQEzBzseoWUrhQh
-M+5obcYSw6HwZG1uH/iXbd+Z2Poeit38Mjo9AQNg9AIyGys++4OeYTTGqIuejGdd+cAbVF8ruCZV
-SgGoV+LbgJZkIKd/GCKJaVmNWQ+ps8HxnjbfxkeVeyivhTBnF3zGOxxBx3Xw3nXXJWKynYqgY+vz
-HKqOX+zHfW/4gAYzD6TNAgBLkSb2OUXpsw8OQGWZYg0224bAiGBqD/JTcBbdJvrv64y4Ji6hC8J2
-jwgOl51TBAfTjq8H+kAOMHkvanWb2GE+7CWm5u7NCig2rdNMGwOrkS+HMEXLh2I0iGpu1nZANKVr
-Lc3787y9ufP05zgtT5N413jSyyhkikX91IyuZ3oMwykorp5DfLgfkpdEV6dzvbMnOKt5aCbxKHfG
-yVND/eorA6BAYsZ9Nj+x3XifgI9fixKqTLS8uDAAWrLuAVXfni0vIq63FK+4hWwZva9ZJ2aScux/
-/9HekaV7I2jIWn+gkHLZZHFegcV221VfL2VfY3RbiR5lj7E73j67hQK1HrTxE9VNp8TgXJ7a6TRz
-heATyAdazJB3Yar/V4FWD4TMKCBLfZDDMfbRstBwa/GQLosqWuMfBeSycGCP9VHqdDL+Nekz8WEW
-77SEKxdOmtFsR8oo88BuDGOStXt9h0VOgWAUiu2v1TUzwEQQOuHXTntxFmMSA8hKuAIUPW+L7+c5
-bE8fu77myK7BHWnqkgI0Os5UKPONLHhFoaim87thr8VdwzQXU6WVNJ7xTtRt+tUuidjS4H0sLKaJ
-LzWkukoLadBRNlMh1YUV0qophnVaV5cHRxjdhM/YvXtNgH+FwAZcD08UabeBXzN/x0pDCDrzvrFz
-FMxUagtOpOkFKDviH7Klq9rnpZRNwVJP+TruoVEuQlnBGylfN07bM96SXQciCGKBgjIQMuAvOlPS
-hZQ0Dv8GwQzfOdTMW4lLc46kJT1Macqx6Re33ofnTURKTtyZb5xtpTLyPmTG+lNSa1dpYibOpGoA
-ALhawtazeFjpD5g+Sgwcyy2aUmAYvetbCq/V2NA30pZ5CrOPLMvz75edkpiZFP4zIqZduYDJrntk
-CPggVcoTm423mBlwpigUao/zGKZhivb97swVPi0yDI9DmhFLSJtr067ULSIJSXTqjmnSzY1k1/iN
-Q5WzRqeSOqgyTfXlhu/cyZR+NHcMDOyne4m3BvowbEWRT3oYNJJnkooukP/EL9n5xrVzX3PA/PMq
-pqooXrPtDr+zztHeMOGiVee2SGIEskkcNLF7RGRvszWhRuujWvJaFsSyB+Cp8EwjqkKhWCXeU5Zd
-kiHiy/Lc0IRMRX1x68Wm/s1VtqWtuktTXe+8xL3Mt3ddoXNAggRwJauhDTHKeF02DVop45h4aWtB
-AXtwLYBkUuW0+sUUlqmyyMNSGJ15qr0M+ojWagBaY6Qa4+F/gwrfFItJNWYnzE//KdAJ+NGm9dbs
-fiTARSCGIqYxtQ5+C1xYtwPn6sIvutVH+OxZrUF+7nXQ/qSoC7hLDc9/jHQMMGvnWznF3m4DTkOe
-OEC9Ed8ofj/VqIwQToA1EAQwNY2SWu1YuF9lhpyW2zPYNuBzIc5Rk3d621VvSMfQAaq0l4jqJljy
-6RJGWnpk1mFk6unIuTLNtzZ9XgNvFVuu34NFGG+gTp4/ppyMvtgUblb7juttLIBewSvjcpnAUOJ8
-OkKMrpmh1srYCZ4yV9FTwSH3uLHh4cp0y52prKngz2HOrb7xUqFD60+4ui1qxVCUsTHCcIPwc6vF
-pA+QUrJrwn6uu/PhDkBp5VDyeA736p1T6+W9lfY3KbvzJJCUZi1fS+7+eIjcIjMN0nOG3YjcATdu
-TIASA7P8lM+9k6NASkbvhuI+oMqZOcR5DocMZ88tfugXmE4mphQjcSV+bNFwF5y6RPBz3TlyC/tX
-1cXInvdjS8HQqYYJwGDQ/x0hQR6LGgODI6UAGUU0nzcHFvWu7L3G+BDpOH6rQR2/QooAfUl9FRze
-y5xlmMQ2VnbVFNseVqYZ1fKmT3q6hFqdlujKI3t/aX+9wIMkB5722tb5r61xk9L2YRSzCw3M7LIx
-BfV1K7vw9sREczjXy1HJjs8rMsL4q87fx1KLRslxeXBPofvGFbNdOB1DirOxtkIV1PDCP1txLQz1
-xlRF/PXwBK8IXCeZaplN2xSYleeAshVkkFmjOKPR1nON36chDh06IuZpqMNioJb77wvEvwUSSiQG
-R5mdII0WeKAuZ+aF/Imi3DD7Nz75o9LXxBiRmaTnkn4IQORGO36t3g2/LkihR7R4gwKc7K0gIMiG
-i+T/4N4c72Yv2ySTS6ydZLvl6FcFcM48Ve4GRMDqfvTGhjpEZ2rFI/trmwCo8ra+85hw3kQbhcmR
-c+dsv+bBCm6hIRyfO7jLeZDPO1qvua10JPFxXGKlLJT7EOxuZRdFpYHmQoTthtHpolpv3Y/TAhwQ
-+Dok+bFrSWdLct4X2EY4jyrG63IW4MP6M83O7bjtGVV47btO1sgF2hUcANNUYfs8f366jn1WuJRY
-K0cMZBnFpOmHXz+bv+/tDfmR69N6CwrSF6LqOuO50g1/hZIO4z285bvkXzc4XT9ig0nPwKbJGYAA
-bsFowA32UMG4DaD6Zs07kUCXtQJ/9TeZcK7mY5nAilDVvtRp2RrzqTlBfXmCZ6L/0Cyz5VfHy4kQ
-kLzUOIlaX2TQNfMQbPgu3ZgdPp9xpGpyVjqGMGcOdkVq9E+ayc6yA+I9WpUxr0vZql4QzE27kOk4
-iGwWwekpfzcxg1UJ18aPmt8zfEhz6gvpse9kY6Kd16ypfXu78sjoaT+slAxcByJbU5QqwgZ1JJCS
-sC6uqJzzv1hdWWK7rQqvf1KCgESbp24rMg2wgOrxNwZ+7Ykq+nPIT+y6UNyeGMNcc7UQZqYtceRh
-7RUk78whMIWZ/c0L31hjiMsLxN114ib8hK1xzoPQpsL94cMDua3kzjYbmiaCFibEe91HVXTkmX7j
-FZKbyWLrkSx6D9Y9QfNTCyydUlnlMzvQvO0BEFQ3UpX6xFpM4kSAz/A/kFrpN5BvKoCzMsIiwTlW
-89syR6fhtDmJBQcA20lH+ZtDN1rhipWGUw6H/6OPvIjZ2knW1G5ytWgoMiINb0Ipt/SJPf9d0iEg
-hP7vGll+veROEgc2ej5SFVNBj8AdvKzVVgHWOSPkLuS49e6FkaOMfmrrm5c8TrTQtIAK9sLt7Jw2
-1Kl3xQzMi28gikvlmA8tVl5a8vcHmUwbuGgBDgunibX/mzaTetss9ITqPAplqXC2ltjiokgsWCkh
-bo62JpyPi0MTmz70J9CIbS8Kq4nfIWJYQirhUjRB08MZ5nIfdLgsPsP6EyH4zABTYKYYr5W9mNd7
-lArwSQwDebAFlNQHlz1uO6PTQuTqV5WOPNwJF/hcARfKU/Y04iGEFKh3YoLFtYfKyBVoAhxHOojb
-npLEagMh6hePn6F7gwTv05T+t5YlUirtauCIfs9UsJnRiItzxBNa8vY2NpemDdhSuadN++tjXK/+
-tBTW4EMREO8j79XyOkHdWf+TFj0nFz5j06Fsmawa/RZOD9SpKCCSJKRLortmwcJNejvUT9d7Gbgo
-CYITxX/zUFgdV6IIbjdu1FZXkqtrguk5Wlr/Qh2e7Fga4GtWS879gb/Yv2dWM7iqscg2pfOIoaCY
-NB1jiSaLOIyhx8j6nVKOGwC0go2rVyzoycCqVyht3E83ahboFPCrhtV7IOfr6+m+K7Cj+uFwbc4d
-dx6zssQsCz6+NaW+rf7vkfzNO/dk1JE+9MOFigBL8jHDI/hWnyqcJf3b8U5LqUn/a1si5iS/BFZ8
-rt793pVGQ+AscFAT8V0Fbg5UrdyqFVkPPR1EgfxTd82OZ3qo136XmHVINiAMqpdzqxPMtOamTepP
-Aawpvz6j3uHmN72kjqc97aybBFAA8kLrpqjudbyJcYAgyBPIWpf2ukn26QBgKWZ5KNyQ6Gb9BVz4
-xxUMGJASArvslGY+WpmvCni/tr6Q5LGwtqulvDN98+6PBBnXVs8iF+UQkkQA2K70o71hieYAfviZ
-6FOKal57vOjzkiOkbZ/xZkQd7y7KBC62xp4EFs4UMCYOyL2TlsBWcGRxZsvMO0aSG9ds1X0StBPW
-hoWhtiK7Y0MjthS7c3RxxdK54tcX1r7o6O1grRShh3IKZd7vjiQ8nbwVAVTdN73A0O+bzWXPxCqx
-f4gW8+guHaMLDe2akNZpiQow+F8l62fyTBlKyQiX/jhBHYV9Yi2op1DKaB83Yyp1sYHvhZ/TQDmx
-JLYqICugEyzRU8zCSsQ2LUNZKzSao2K4O2iUH1LNONhUscMSMB1Ao/344dCx/98p4QrC8DWgY9X2
-aH5+ZSEI0D3o0vBkqdKsaEqW9MGDyJBLc6UGhhzydAVkuAz0pk0f5W3JWqAh0UB09H7Y9Ql03Az3
-LFsFDSRwTu7TF/SlyxAZFFa+djG2RL0joiVJkyIqPEawUdyr83mOBYjIPMdaWXM4zBAlZH7akTyQ
-AwDV0eHWxE1pqgaOG5z4wqrLNiPIVIkzsStJX/IyXrcxvYCgiGyNFyWc79HEqy0tSswxjFzviaNC
-ToVLm+dYKez8yQS4xgIgmxqgc92VpIlnmtf5AvTDjwPtMV+3QaUIzHL4FDPCTqJnEkCJkQ/mowQr
-p072IXYsYt9kqXMpQ4Mny/DzZoo/mxtZuc0lWPqEmp3Yy+V0TcjX5wdy2VcbYhGd0Yf5FcMMZMmc
-fvkmU9iT2JFGW+vdGEB95+olZ0swWjVd9Gu4DYG5MJV/xyQVHuvCCdvocx7aRIOaSk3ihSgAXBKQ
-kNbGmgd8oTOG84EvbgtfbIEkf4qJpeBWQxCMinACrIA7Mz0gKkUQForcBa1Et128qFq8roAhf19u
-xTpcy6kcx0a8lMY7YoP937fcNh42EzvJhk8A2sId6D5hW1yqDTCHfke6QCQ6UG33BMTRZqc1yqCw
-87uzeiavT1nuJ3f+KKsy2wfm57q/c6RtuB3WOT62PL8e6TKUWc6Q1MkU11PslBQtsiUD5orRAusM
-N8oOD0jlkEGl6+NqpszemkWt7x94yOBMI4qOmg4wSHxU2Sx1ZdqEg+SIgQvVu3HXuEP+44DRf9Je
-BxoHpdS2r3SJH47BD11N/W3lMcQ42HVhfvynwLsDSUp8kQPpL+GALs+yLkdsNnkQClWxhuwai9nb
-YEwzhcRb7bsp/8m67CgzNZzBBIOVYdPd9UpAolw3ur8WXA18xpzVRPyOdQSY2UxFMkrdrHiNYVqT
-ur7Z6BY/qdSCvm83C+vBVoRZ3/rKqZt/+w1iL2MJ4vEhrLcZ5sbjLsZe1+dA+qou/WsK4WKNNHOF
-WxHw0+T/lQhLv2c+7LFCpHelRdvUYW6pzAOLWKNKD48bK8wr4VLY1TZuD//3acKyxzwpp67L9foK
-/Rr8vF30Eb5dGqLnYeJ45E6HsmU9fepySnRBiavWuZZcl8A55B74IHORYQL6TjICwT4c2UUZv00i
-/U8CMKumuJAI//oSfW6v+Thr1rC/bKALCo/FKUSDPwvSNO0oX6mpwDCezWOftv3fVL52DDHMpZrv
-lacIE6yA4MC/VuveonEOmA5k2FNssFnF2cv/+K7z0vbCY+gsNInUF/Oxjiiylt79vaahuEy4FiW2
-VzB4r3HrG6VOUnv/ZcIfjdzGlZuH/bL24ZDreArRTInfYLvd6qNT1ZKrZ/R3/zA+A7/UWz79SfMX
-pkVODwi42/KcdoQ4uscnRtzqi6WDUMMMBjAMvWT+nLmLIcq+IjIcxYl2voua04Gt4kmAcKHuJYNl
-e/r9yzj7vXAqnzaHFiOlCK+efZz2qYAz4UJjUrpK5MF3dijA7hkWFPEIf5VRCdjCN6g4sCsMCQ28
-HRdCqw4CskDl4SstxmNkZlDxaPPdwCCM4oqEocx14Hsr+uN8XkZMvMmxHirBW1QVAKrO49lcblFT
-iM6wFnH1VSUe6eIVtG2mvjslwFgVC67VmHluAS9t7H16p0WAxQ/YbCtc1C9levwB1B09kEsSDzO7
-SCVpdcowFyl4aNEQbjKDaTU6YRkwki2vHbVM5TN2S0l94pM9V4GxBwGqglxUhahnD8mfhDQZxhuZ
-Gs986reVbkw6b94lGixfSO/k9GIIJZ4TlwR9kOhUoOVKTrxbIj+FZUwz2D8xtIaFjaF/y+jxy8ZM
-Js9dBQghns/Vt5HxXCJZrR+KAo/1jX0zKpnVQYpvtY5nhy5ttapi5fVazKaw188US0E/fOrUrUkz
-IEFvMNtWW5ZALbd7zepRNrqfkuzQHvTDWQ4g6lsaal1Zs/1Ot5cDOYpvAU4zuPKBkINEQ1+zIRj8
-c1TaF5+OggVyDNEBOpzdOCyfYw4idzwqKZrkjFC3E7jLopMZwh7TdCdrFroDRYvz7eYI8rMet4bA
-c0y2s7uiWCb7taLp+l5g8JRpWwc2pY+tMgx9ZJGeVWUPrKz3Rq6Wm2O3HiKwvAzjpY5fLfMdN4k0
-kpC8KAtSuaig8YK3QgYlmsYTyWAjSGE+7hHblL2efNumDdom2t0P/JHDcp5SRAhF/oFYof48aovm
-oWxZ8ynM79ZGP8ZewfAGXc/E8YSkwLhURfiS7v9dDugOU7q3roHV2pqlOTl3uKO3aHAcf5Y2JxdN
-xpP2qo7y4RlWwyq+DebDeeH9ng7k7ySjzJ7RB9o+EL9kmoqVLW6R9PUtylmbeM/SYaa7TJwjU06+
-Wnz7BoT7MQgKB0LxSDIuXNkxrwnD+knMcmvsZUdvkGdmPMXtWx5hAezMZf33Cv0MJUss9LtAsZ2m
-DxTNDePzBF1ChJP7tRmLW1+3WVZArbzxkOlbu6EkYjBs60pqZ1hPJMnN8g5INY9LgZB10HZpWdli
-nSKTxHqp+b5tmTv9o5vyGWv5cq2i3W1jvffA+fZ7kxqfrW9IudrbSLeYt8eEcjz5qal78SU1QW0s
-sxhbE9EcfyHq3C5nb+ETQlPhB7/ece8+Iq4aUFNu9CnaHcoHGFVNwPJkutyrKUgaCNv5xT18nlsc
-BgOr4seoDxR5cedS9pke89I82IW7ZL4HvsY5Il3+oZ9QJdPRtt6J6WzMRtofXSA6ASTl+V4tJb/g
-BbvFdYLQNqYJZwzyhg1Q/jwPR0XWnF5uDVl5aXbo2SF9l1uMWKxx6s5yn1onJOGXa2yrngfsGlhN
-+VgrMyzm/yH5o1J0WfJxO6/6YJnQPZ6vGtOTGUa3m+A09Do0b4RhZHZc/g06ylrleOIYZhcM4JI8
-X91CUBSx82PwOk5pX2GS80pe/3UO4TmWROPCsm64WSbI/UBRMMcQ9t/1gmW/GgasLTXa/LpspPl6
-hpR8TpC3AbOMYLvkYaU/RyDMIW6vw8QiiWEVURj/UxJPsDrygpLv0kH7ZvZkK6eZzMoCG2kUYFd9
-9X52vQHufLAygXkqvAOjK28T9plCicFnS0qtlUi76qr4C5tZawLxkXPBE+eud1hoSUimtsenoo5H
-UWdJHv6sgnffhEbI/AggEk7tSAtMaUKHaPDJk7V1Kg5B/EsJ4zKeSp7owZOECcBdMJBHrKSKKiLH
-IPgP/atAnTfxTiqPfrLHiKknB5fTh+pTpC51ljI4od4lvwOCz7iRTSq6jH2r/SUODqTVe1fo/d2R
-Y/nVeEQNpsL6v3IgK93wpamObubpPHVu7o5Tm/BmA5gwsjU0Db9vEXQFZ7oqzehQtvxfcDzEwQZG
-7my8KifFo1PBusokqJK49BntT2GgYD6lQH3ksTXc7k1xt5FkGaODjsXocvuWwZ2HzG6TvuIti8Xc
-jkHzUY6/OCps+bp5RXaWsUKiXyIUeWAuw11Sh8WmaVBAWA3m79bGtoH3tvWQo6VGXDPZ4AxeNKvo
-Q4ykupvRr2Q1pWo07LHhrA1ZZPlSZvj/N7+E+mPpJACGGgghtKixos5ZkXPAyvoNYvdQFoC7JSpC
-L4NvmWZfhBjoGKjMo4R2YlQqzvj1W4wc27yE93h8Z0C1qN+SSec7SR7ZIsJZOHk8PPo3GxspWa0X
-8mXsq3jCVA5K7dVI+13QimrbrJuZiSWfgxZ/eUIibfBHZ4vendG574sWIos5i6hmW0LOIKObmVaQ
-iAmK1K01sl+x6jpfGW0lJNTXyz5M5nn1TusQlbmx8aOGYPm2/za6PKrBEzueB7sTSEYtwuyERXuk
-YEsXe0XnUwCp759OliECWVolrILSzLYKNc5v9BprKXuZHslS0Bhdxmf9pV9sb0EZjcQhgU8DlEWG
-kiH3qcABEFokHdf8ppq6A3tI07Ovzj1h6F5WYXB+tcps9iDhpEvTWW13TDJ8KHfAIzeCguLtGO2h
-wCQwes6Fj4PSFn9kLeJakZ1iOosNq9IYiApaGD01VtbqDk2K1Q5OL/DTnu5BkM5PtDzhf5AK9UT5
-jLaWM2zTdVGCIp5/eimx2QWSBUo+0XrMBs+sY6Y8GMxqccPJXJCJXQGp85W3zkPQdhHCu3+rKHhN
-drTf8ccn/UVz91bJIQ9Xoj2FCnqeN9A8b+DOS29ujRbVpdBxva7Ob6buy7ldSG4cELb+KiCe1B9S
-LV2aCfeRAf9YAOW0GmZR9gMvIBIW/1ZkzQ4As5hV8/+qNoAGgtr3e02v001tTJb4oC4kzDXSp9Qd
-xBfrXF5ooue+asaZKrIUsNZ8hP0FF9PelhCYwnqmcc2Z/FtFQqr80Q+1/M8EepFukxHqdnX7yqjW
-udncVAw+2fKkz9KaXBo9tOYKwpt4G48eo9+Bc3zRkVf/7frDGlRaRRgXoCZ+ZnyBXtJx/kNs1hcW
-S2P8X4jRt7qwwyGvF6L2uYVt2tWIpTCrYsF5DbEhKS0VnMjzN6vjh5QmQl4KSV7rUycyYmZar2Uu
-cSEeXyUz10di+r9Igf16C/XmyilMyo5FknjXmVW4FTn5z6et4tldR4AMAzUeLoOaA1xmjGlbie9k
-mcnQGnceiC+mBPAJWRrNXRJPKUsv+QR86eJO60ndfiKen43y970EduuJKcIIgs4RXCZvXBON5o6p
-GKV8qhUWq03lsISyjjzv8NT25WE3qCmOSts/wY320B8SfHHorYqMbHyUbdrlrAP7fjtctdN/tItG
-qyDMeYxXxi4/xvVYY6vz8Xvov7/+k0fkoMI95mLArg7zNsLes/XbekFlyhFcrbF0O5mVS6yT/gZE
-vH4TZlpQXsH+SK3xLdjS5LkSsOEHsRJqGYBBuIVKqy8XA58AAFDGTy3fuZKDKh+2QmS0SazfYWNp
-tJDVW3VVLa4e5QHvx0JseTMsIC82Ri1GTgk63GGSI8hOR8Nkj2gdurDroaJJcSQYJRDwoKaRA+DF
-eMwhPX+aR/QptRqSBKAzpXWNCB4SId/0x8/XMoBw/kAD78Tco9dpZDmckY2AIMBRRBgp9BWHMJsO
-detOoELIzEv6gSGKfBR0PXBvs+MSaC5fu+4TqDFC5RKs2Q1vsH81s0+vpndZNZ23KpGpQg8ZYAMV
-ejGNUWOFGZRJeVk4sDgarnseh+2Ku936Eft3HUaEexpfLgP077r/sRCD4GOf1N2va41irqehmNK/
-hrt1g4n0C7Mexkupm8dzJaxOPKGkewG2K8VRaOoAeP882ndXMGP9TrXc/edybXf7CPS4VUDO2Srx
-sYlshTs3Aj/D1Ri5CAXKn9V8HvseW42Sr27cOO/mkaPxdn+OK77mOAyNMxxymoIonO3CurTeAmnD
-6lwtcEEuZBKV9MuTx9MioROc0vP/3qC3OGapMUcjzaUv8lnxAkMJaI24GWPIVYIHbn05pJ2K7O3K
-Ct0nxe0EzEnOEL3QENtDLaclrJzZLKv7+/CufZr8OR/z2Z2ztiiYkR50UEj0eTYeJ+lUR2/OzrFj
-/gIYHPF9sxy9vI/RBK+VXTz5NZkqA/yK7JE6lK7Im92lo3xRf5+N+bO32EyHYGHEitKaW0Swo39r
-S3GgNBMptB5pVZyXnuOiGNXLNjoL3Ui//2EAE4XohA99OQ/o920PBp4JvQ+tF9gVx4LJ/iO1viXg
-RkcfA/aGVi3RTZM1vph+KMrNBvsoksn7IQ4Zr33vMyxy29NINoxQZHAdilTQQ6HlJnPMP3GT0fiI
-XJnX1jD+CL0NYUNVYnMYiQvMRS4/uIPFB0QbdYLlUaAAbA/RxYCCoL+A0edF8M71g4Dfu2F83tqV
-jsfthoarH/FzjGlIOsXJ4rC3XHDmxj59hh27nZOFZjpoMy9F42l6foANdVV1BxnCYZVjNPQBQlIr
-shA+YHCZjWQDmKQL95TEhPiCfYGeIdsKRl/GzEgrNl4ynX9nqV0Ynhl/Ox4HWbPK2F/AzSE1co0a
-T2d/t6jy05oYc1yrZsyHUSUuNvQNXcFXGadCDS3RdZtN2qLVFp7qch8rDg9pxdt/BoL7pvx0oMad
-dzo5vTPMYam3DknC53DhzY6ghiviGaeS1sWdYs7J0isqe9jVuUPFGqb31pYz4iLE7YvSTCGyMaNC
-WLK/4NgynB+EiYSwj1CujL51uRvos/6cNk6CiU1rnQ1o4sOUCc50YD00dlBveRGIzcwirLcCUQsQ
-asNvr0pLVoLyzEklDx5hNgRu7iviFd/CTLAlnJtBrfcOZxlb7gdozvYCnFtKtrj5dYDdrv6wmSDF
-safyX1r/uc2XJABfCbyg66vCwuD0x4lnsXEhhxgzsrej8G+WzHXUD5wqpdpcR679TRDt8W+lag6w
-Uiw5v0TSYkLom3gyFgrxckgJSBA9SQQtYk5fR/0fotyWSvSkSlFPgjaaIB29tjiS0A9+/Lq1Xisn
-YUYlbClyqSwm+h3CNBoPJPuBMsgvsvW5EvSQAA4F5Vbgm5n+gKRkNdRQiK9JiasoT7FwZiVAkR+9
-+lV8I/90Hmda56d1HCDIcK7rHpJZLh9Nbe3L7PmxNXaJFireQp8CwslOP4sNLifSnD5klrrtECVl
-BadPr0+n6IfISOS7AO4UV5jodXeJwe8YBho2YgKsWT2hvWd+8mo9IjTxMy3NBSVGRHh2ERvgJ0Ma
-Ss52HV8z9yCM7amMn5x+4FmoxmdCbLP6ioN7Ns1oHLcpwUg0/v9NNS/YgK6+j8uY95FwnlVKLyLA
-8/OrJzkADDEwe12wh81adTtBh4hF1DZiv5NDQXo3jnKTYsdN0+qWtIvxkxM1dTKLND/FZOLk0ZQ3
-1Z9Z6/qNqNUkae0hh/iqNj9J86gSgp3WU49OtCPIJ2ToXs8BBoWgMS43Ye9EDzQIPkqjAv+uWPTk
-s4fJ9jr6MnVokTGEFZKBg1z6zRw9dZMCe7QhVfQYzyVKYo+fxTAwFUCeDM11z7petPRunmPmt/yK
-vctg2UG8gro+KB8psIDjheUhKHVWfW67k0nkMwXPIjki++m46nsf9FatQTd1b7E/ne+QtdWCqACm
-a+E4kVDGvEEx6+lIKutoXWCNfKAvbEM+O+R7NFXWBgJ6JHFWWU36Ho8pYAudFRGd8IcTDQ03ysKv
-OREJ/JNTb8hkK0PwE2yFNhBi0J0cLHcMwt2SUN+Y2U2oWTu3+MjyGUC16x0z7qk+7do6R/1WRwTl
-iRiWmlsS+kBoyxbe6ziBT6cg03FeJm3QitxqICRB/aLjyH8sTDDI1mamVPUgQpw7AVCGvv6CsWJN
-t9/C2fA97/KPHuefHvuTEfdjU94+lE+9O4cuJRRcA+anIF6EZtL1jaD5vCg7Xb0H5IhTctTRPuN0
-XNiemeVIOWq2EsnmK7xQZYthSUnm2FOLpJoIqkj59EOqZRvbsigr2nUfuQTxARZaLSRiXgOSwfBp
-tWwklKC9IbHpzU+JRUK4PeesK9pOiUBISQCuKv3Dtau8eptzxuJmete4RM7Dkm+huH3k1fbljo7R
-8ZNlGO+4mENJt9xmhXdTTFyERiqhM+XYgiKlNkM99QMG2gXJDJ5miuqgO5CoWmFzbJUGnOLl9w5O
-8WQRb+nAjfl6BJVVt+kEDVzM/sCGLxmgemkX1tzF8XJvJvC3hJuh7Jv3eG/7RH1ks0Q2VErTPRup
-3jweJRGGNFV+bLRO+ns3x1QDRkOGb3rZyLZJlcz/O80ldEyRpRoi/Vbhutcl0Xb6WtCp+hepapw1
-1tZmSwlX5fw8s+pRgxwaeZq2Jrhe5TBmiWmUCImTD6bbW22gLXfZ7ZZG9rDaBfqanggLBz/VxHle
-LOVxkUX4oNKHkKE8CzHFQp6mizCXl1C7KYd8XCvxCXonL0YFGuN1/OrMr1iqSIT/6PJDOifCog1x
-j7g8Pwwy/dPCwh+/cPUV9MhXUXC6AyOJgXL9JdsW+3zJp+IRfoYCLVGssYDvOJur0MykgSs+mg0h
-4t28kes6ldsg5MiIhaBq7b60zCcfA3/n+kZHNGEBEG5n/LftmlkygFGyhNaP5KWybYTbxTXICTeT
-8uSrFUDMhbMbL58SD4/1DWt7bp3goNGtiIsSNjZgCEq2QA3CuKKxVY5U2Tg90m6Paro+mhZ9z3tx
-foJKXQgd9yj3QEdW3JpzKer/xYslw2B649eBCJfoXgy5M9frA0ZltwpQ8akZV+zY4zZOY30K5TWM
-+TgZBvf6h64OGYfxq901j+xo5vKw5EhdXwtTF3OlRxefRYyD2TZ3AliGXx5uWdmC/G9vD5n52Uu2
-98/8hLopBznIVjrxheG3He3idQ4GwNOnmsI5EAcRBfA8BOuwkBjDZt+07Wpc4QBQcO5xcOHPofsU
-E/Qbgugj3sUZOf7q1tdbmM0ncd7tFr6DjhMeKPMVBCLTSkJ+HZvR4o955sAeJguGZyPwu30rWoYn
-l/PrJst6B+ky0qYCWD9vz1t2kIutwAQfxS0Pidq036ZPJxKUZmAUaSxOTmA65nRliBh7P8LSx7iZ
-Gp3geQIJfnqWGVA6w+AuvJdrpasEd+VQgKRCooV09J32lHL9I2FB3SsP3B4iIGaH84eLBcOPfDxW
-0Qios7Kq0rcLP4eMKOw4iDQAukxwx2Ff38bZvwEN0HvJAl317Bu2hsAtEkkzbL2kjlWogFy4MthD
-7yhQsQlvUBiGMn29xgc4VHeFw4TjRkfWvTLfIDuJJs+0GRWrHNZdyahdavS8x+5afnAOaROzi/Gk
-PW3ZElYf5kI0pj8EoqPC3BG30OcicKRh0Upb/H8nL3KDi65+ddtpXzLn4adNJ9eOuvImRjVJV/kS
-oMBYI4E/NIUbrHCQSPMJ00M8FgILrhLkAUGcwkdvxKMnUVqlY7PKoWnzqbyHKsyc24dyrx1maUrt
-hGNxL+Kfm8sfQN2iqfpvz+b+b40goJF1lSUxANlSzvE76dHV6P7AE0XCF+tCMYJJbLJ7WRM8CEf9
-vTTSJ5rxnvQ3KmkB8iJpcw7eggsurIpTyQ16U2yxq6GZE99o9VUgy6/rScK3wxirEB9F+DUgV1Qv
-pgudCuMXNgz2N83bozj5RY8/9gBQEni0tEjbInh1wQUgVBBQqct7hJd3gHLi0CuxYThlxNQ0efDP
-38WWcWEVQ0iNIv0Ex4R1bb5L/stV63Neyw7TWF/J/KspprQOaZwU5GVD4LgYkFlNEWeGtjZkjO6H
-rSnG5DDF5plHTQmL3JXKs7XPrlG/2XVKS7OrUXY7rInESLdfLgCGyt4sooXQg5G1oy6Ufop36u/3
-o3apSfA/onOwN8negfMAJ8QobkuOgOmuwcKw+nrGWPzzOa0KVQVF/XhnFdleTGyoC6cOR8awmI9z
-JyDMibFAlip8UCGljY+dy8sh/JVNMIcOT+mYX/Pv2jVc1CK4H97zxocbABFU+6VgPLRYbdCq6Czp
-QYpgJRN7A0sMMVcTs898BpS1emMZjgPf45C5ccjguXQkF/UAq1aDCyjH0hEvwMb0OCY9paZDOXxG
-uJhkbYTHWbIryQYG6u4hqcBfLZO8X3ivT8Rc8P5rxpVzCidM+YTw/1KWDVXChkYXc/8Os6MrqUCp
-4Wc8WhGuZHfL3C///HYr5/uBqouXeoSyH3xNKe34yd1fzBzEDreb21Y5P77XsBYPOgRjFe9E6vXy
-kLIgXhaVdUfJFW29i3ixQMxDw+b8thoWn9+oGKAFbp4cD6AGv1SCJnc4asHX+m8NrZArIhcpz0Pa
-MD2T5evyNQifT4C81dks/c3Z9Vsx74s4+BTg9CIyndu9ra5ds9MLnzLbiUAhVMYpfM7JzG+yAXRr
-1WZWG6QcBjTqYmnU+kCQz2k017SWV5DBoT83SbkifG2uOcA+qdsbXtFUqIkLZ95DwUWdSrH1fprR
-sEAYODrlzZ/hdfG1NV1H3HgaH0RdddNu2lUA0nVBD/6w7ChlHbN3AygrQpbCHN+VmK8FMTSw/7nI
-ENgbfvB19nFJ6jkQzUMbwcMauuyX7uOyZB4wMDDERWJF2TtO0Slq/YOeuxY6zrK4tpjwP8f1/eWe
-OJ2L+Y63jRxAdif7ZWOx5SuB+rF7f1cw9saRpc5Rt1CQvuzV/2z+31bSm5GN4OTPh9jTvBVxISzG
-Yere717cMMx7e8VCOEUDZLto3qYXuC+392ydE1AHnPhpPuW9e57ETqBBiyaMlg75ch7IIa2KQcEW
-Gyij7ljwaoiz6MSDOo3ZQE/TjZNVb1Z1ASYKmnW2/YWVhomUC9Y0a/Ix7LOGigtZGvpmTIbPQUtI
-m0M1DYnLwHEjGD5HcJxGXBouSlh0lHiQGnqxaRaG7rka7fY4DXs1f3J9UAZJipVvUULMiD33DnAa
-n6J7Ul6axITmu9eKBj3F8ss3GjMF2v2OSkUfNDb1dt0Vdu/xPSZsjhdcdDSfNKVtuH7oH5c39xAh
-11bylZoc+VStI7VOvafgltK1rSN+1ftWlBU0TLcqGFBzPr4MdlaqTe/27WTlb82k+UyenQohZDiq
-29/+H/zooeEFPeLzcRgIMW9Npp8Z+wBYShgC7/jtUP7WITlvTEpJOhjUIBpaiLaEv3uuwkILwJRC
-zq1nQzadM4SEfNNh6qP14x/kTc1GLEVcShApG6MiaPwAGd4pcGmRYQVuNxwr2iVQvuohpyORPW20
-2/Cn5wPGNMV3MbXvgfDLTYJKyYO72xjziUvGNVJSTmPh4F75djEGOGZkOsOpC6WUFDIYTQOL7dA0
-c5j6Akk0n74q+Ube4g3uC967BGUsnUXvGsCuMpY6yq1XNOSe3MMXs5mKAJ0HLWSkoxaS+XhaSjzm
-bbvbUctywbpg6FkOWOLwGa+gOKhGHQwMR39wWMEqlQUZnKdjJ/9YJ9xkIRFk7f1R8+LLjZ86xuMY
-hdSnulKJsOZ5GVanMn5hBBLxjOxtVL92YcYm0NidIyK/QviFr8YyY8dQXOUVmaP0DZY0HUvDY1/c
-9lWZJfv7PQ7ycSjzTvzAANYshKmvxJhRMp5wHHr2vRUDwSQVz33gjFSVTg8XVgxa0oM74lPF1Rh+
-v3NVnRX/190BSr/q49HV6g0MuJISni3mIhoHoGACfG+I43Lg9u+u1yiuZOsqk5oc647dkUxxQUV6
-tPLiyV9+QH125V5mQNB14JN69xLErVLjvHiE5/OfHe8C3eTa7vYBfqbjzMmgoiZyk9H504kaEPFt
-ccjPwp0qJjmlcTAHIgy5TAxTOnjRL1mUeU81smIJT0cJCUqr0WlYjUzDXbHCpJ4wqqqSvXlc6g92
-6WuC+hF4R1vQ16rxeyG2Jr9q+TLdzMUktGpU4iAVRUUTme3ozwuwFXPyrC8ewjPsoFoCp1NRUUGF
-k8rI3+3ynvxxjLi46VVfNMP82IAV0HAjUAd3/zw/NAcRdrb65etS600S33jn+XLx8h1rmdKtGzDe
-i3WrNkYjQnrU26CgFz+sonvaGi1ZJFybLrlywIB/8AcGjYkOqfFvixcNozN5mVDCnC3U/p7/sbQP
-3RHQHblFolcjMh4GDatYaSYFot1+6WEoeFWQkuHtiQaEMxVwk6xcSQ3DzxuHrxynX8OuyiLkOEvO
-pjtgrMiLq2HjKxBcvQBKIkQMNKTh/+cA/F67l9LjBJI5DkTdBZhgCCA6YcJmPJg+Ec+RfAEMUMkO
-NNv2MRWDeAbuT/2Gfd8Daq3AHE3Yev0Wpxbj0nJQ3+20QO0hAd/h5XHVCRRv29jzFRR1OGdLJTXQ
-3PFYJ07TI+Jz+hjp0ahxteOCrladrUUQs7UNatMLH67AeFbCkgw+WEwQQ4wBKyhNokl/rn7PF3vU
-2sCF/qRZb3rFwOmq9CLUlGIAplFaRqiNRF9JIymAgyOB3kZfnUIXT9r6HS7truTLNQIn6gOX0e18
-jO0Ge+xhRpOWvveg0LUUo2PUEwmcoRsMx5fdh0JlIKF0BfTsv9Ana35mpmGpEp6SAcA7r6JxGy8H
-7/yjJfExII/jwF+Yifq98GT9pJsrtZJ5d1A8+HmD3b2fsUy5BDIiAKEe6ys2bSNbgH+SUB44qel8
-F7oAhGy5aRPcWk1jToQhyHdt6aN9lFqEXyEPk+DgCTjPN33hQ87jK+H359ghYrxz7VGhKL8FRlMY
-pYTT5K4vuuiyAwBSMvhl6gjXNa5v8OhsLwsdQhZ53BtAKgoTs1kclbN3wjHzoVGdi632O2Io+Hc8
-UteHT67+HohzcC7Hv7yxsUUQp0526c2KNydcgCgy8SDPLdeb6/nrE0r/LYZHtQepua5em/Y2j/h0
-xXMKvYvsOCr2ZBR00vT+QNeDvGsVEln0H0oUeyZkBSwUhR6nADmB796JqsxF5deggnz+TqaQvp6J
-uB0e+sCmrDLYBHPh/6LpQjrFSUw2PoxWW71OwAta/DhrtFUzjNIyChDpC1ft770eVn/DR7A3HxqV
-NlGJqx7kGsLniUuQ8p/FRuwrhUSjrEnJmyXARW1ILELNZ0Wrlxyop8GcQK805Ip+jqkbEJoE0nEf
-t4DCpme6+LXhVjcDiVNN3IgRHRt3DRL4gEnz3qtGpBXRwdHgH1tJKte52O0q0RpeucMcfAwvQNCo
-Q2xarzuj79XhUspeJ9c0cX8xfygRjpdt29I5piDf4hU4DevinCIV+Mf37/z+0q8ZRtG4fi8YMDva
-qUQ2ms69gzSMyR04v9UD8hGdOPuygzNw2j65pN0WUFAFWT2+7+Y/0qElJZ95FFmD5+x7NfZpgPaB
-/Ze9tX7ZBLcDk7kmEgtwzJtYZfmYRWY4RpUenEQHmgK1L8cU849CXTsWTHIufIc80qtaQMqo7Snf
-OZ649Ep8mcwojXvrsf4/ASisr82FlaxbpGPISSaqiX6k7XybDu1kCO07FlHdkkvdKNVa4zY6gTOD
-w/q1Zj+AlKapDlDHBfd0MfvNH8ctJ1+rAnjDhbpPUr47Pe2rel0gtS9ADjYn1gJG/xrsvosHJxB/
-miL8avjVfczur3fRTtwq8RTUVA/Nf0dRJy3rM3QqP5xUVyOeobJNMcTCWGreiWTq1KfAtrJeX3ZA
-IZqdbS38OEPnuJcDM/jCxQG7laLLXPGM2Z+on5+6bEs3k6IvdKk7JbtgT+9EdiZY2TAOLA/3wh3I
-6rK4rPy8pc4QrBdRGBDTtjDVkMIpWzC5o5BhQNJbgFAKAKIXHF9a/IBAVwGWe3zQI+yuPzL7k55v
-fXbXRPqMGJduahaIzjLyM+wFvRAIIG8bnDugEIJ1qmdju9z6HxPhI49oPlIB56AUAKPUI25IfDvC
-c0cJXepi+TIO4CoUjeCBJhyjsFJtWyuk46rt7RGNOoQiqoJfFnkr5uYsCIXSvq4h0swqClHWvqDk
-J7GET0LvtnWWIQEQ9WSIgctqI7ShFR88zICTp/E9LsG9X6m2cgqGzkI9qVuYc1HTTd0w8LLrhrYg
-i45DDMcuSuln+uqA2ZbRH5z7GK9DODWMLhS8CAu/Wtv+APaegifldCJAeZU2Dfz9ocOoWRTiLH6q
-wN5yfh/ONmhD/NQ4vVItavfy8sno4YaNq6RblrEpOHNwE6yo3gWl8rXVAol9g1a7kY1OxfMqzC8Q
-DBHL0Zoq8tMdy4FvMFalU5I7D1aOCCkIYsucQahDc6WJZvcHCAR7ANuMrSAN/DxgGFbds25EQ77j
-c81+OzC+z82EVYa6spHM/azaSVFE3QGvZh8iZ63L+92X8caVyW/OP/2V1DMvyMALjTw1HC4rJpgw
-5C1EWFOkJFb/hULzzVUalHbObmKHvG7aIXtgdo0Fx35y6Ig0LrcNyd4VhC7XNroVNISx9Bf6e7cC
-ownAHg/geCvb8JOdLm0ap/f7zOCWMmAv6x2tMO2bPoBqUFt2l+ZO2r6uACFVVszmHb9cdcfcXMdA
-ZbOMe9Cr30D6XhogK1USKqNKsTqhpFp0+0CGr5/xamFZ15+tI3XZvuNdiY8QbMnoGJoZmkIMdsk2
-8AlmKY66aX4cJkcNIvn5e6iHcQd4ku/fh9VENe8VAi9hguQD0S1Fw9wjkVHFbCD8v5Ckx9MmNs+g
-Rzt71olsahAIHaBfYZ/xH0jYrpKHr0IywafDI9gyJNuexGBfHp2Puj6Z/30cfaW23ZZUnuJn068N
-aH03zkhFFASYZKdj0zJtIUatLEZNxpoIqX2khRhbNpuOl6SsxdtmJthJ6tFw+FcfgX63J8NgKRcz
-Q+TfEgHomjJGTCQ73xHts1aMXuG8mjuzuCj4vyvwC9f8g5Y9dW0CSnl2rVGrzo8mwOuUZ2XCWZxY
-/Y8oVzHBLRgHGHu8nA/6MvOaVEUEWpgjN9DOlHTlVgY8vVQ09p88aiNEu/RKXuCgjcQK//mB3G/s
-meum5xwYoVnalKvykeyUKV0V7QiJlv9GJHqUowdSOh+XSx6u8+UeP3UNkzacMI33vu4UzDbZrOBt
-Fn4JCo0jGJNN+MRaGS8q8GCBucbJEM8aqxcpe9MKCyruaRCKgvHh253NEfWqolGIK+qvfZk/4wqW
-BUtUplj6GD8WeQFKAM6NnVizOW8YJgYUgkNn/AzR+JJkFudT9weI+4c9sy+8bS6LoMMq/RuBgAMd
-ec8adkFMK9isFk/YeSBFXwd6lk2lA4rbaD6pmF1u6mg4rGKZDbePrCN3FGe633ndMGL8Tfrl8KPF
-Th6V3caGZUa4gihUlGAe3Qggd43EJZKFqZgc88E3Ub1v4Xe+QeuqtrxydMSzvuAK5AsW4A9lJBRK
-o9yVE/G92O04bZja6prC0+oLj+spLWYVaZmfegFGeDOErawplrWOOpZ5wMRzZpSdYS3GXMVAYYV5
-06S0GBOxurLpwPonp55LnVJoJA8c4qw+Nvr3UPPIY7XTX8s5kk72q3vgYDvZUYF61Q1hYlk9zV78
-nBQ4RhAqg/tlsaZiRhCOSeWJvX059eyzdHFSUd7vIkDo5TFUw+2V/WN5RY7Tat4arY4Yo7uqMk8K
-P2VUk6Z9tq1JVFaIoupU6qoj/SVELrbUtHHCtYVMC9bmvsvnl70YRbSuxB01zdGI9umlHQnD/meM
-kbh4adr2p1sbK2ce8B1VmwRfAsN7dEnZcKKfaPKmKHn3ECBiOGEkP7lYP/rOvC/LKpc5XyDVyntq
-SxWPCsCMMxn8jhnQdFu8XsJFWzEpm+au1nOcBgkV32laobFoD0ElWLmtmAnOBq+sOW0qwoxespgC
-lrWcO2V4PzA0gxqKgoYHyJ1W+cSESUa2Hi981D0oU2eOvQVc5itYU9Sz2Md5hJIXBXr8OlgSTTgk
-QqktpgeNPVSIuRJeEhlIMRUqLvn6rwj4Uk983t6g/6/tyKsgW22iWdpjary3BOM6aKZdn4e/PWkA
-0W901wiyFvWV1DldhL220UYhqO0JP18Dpy4NbYE0VaHZwEoPforEdjtCTiqyjLgRMbGl3fyGs4oi
-Pgd9Rjlu2XiW9MW7gBXMKMgKas9td4UiyX3XK2AuEv6l4txI+3f7nEKN0tASZBHiJXL/4YclgXQi
-l4c1tyhwOK97wvlSgOT+SL7sC3M8zIFKWxx7XRvDObgxJdGUP+A1sCMQIV4FDlqRMsQj6nu0cvZH
-XIvm3p0NkSth5l0qSeuuAC6znG3B2y6Ze2FVndpLxYovirqaj++eCLZIyLB8rMKCuMLGE2gPJ8T7
-bAMKVOOBl2v/9NcexIQMqyi63F/9Qz/elJtdEy8m+gsnlJhiwHYJpWVfY0hhNNhY4/vRFFg6ULi+
-K9Is17XkS2uQBfR68mZtnZmWX0zwOQYJs3Wt8dnYecRgtQQcmg9N9ej1vsh1x4b4KtK8cjiiHkwo
-LZKz5KOPx4RSSBV4+9sf3Pmfq3jJC+M+Xf3Alh/Y3qKTg2i8CdTlc3SDZLkRLZRielImW1qyOzeC
-TffJZb1r/jSKMlwW00W84mHguBFYFnzLygqLy6+tUrofB/PWFK1OyXnXSt1BxuZLIoh8UutrYLo/
-ZPw1zCOzIFsdAoatgKwzeP7wlwvwlHbL+3EFbcOG1e1N/1BVJiFhQlDnnZzBLIf4Loe4ZYMhtBWz
-/h+eOmLTXHOcVR0tiJoO+RE7Zveu9IVHbS5Ctd13TirQEN48WDTJJ2/tmyCPKWIgsSygkq/zuqDG
-fAsSShM0NkwBM6L6c8huoUqSYETA5yK2KYbZjNnFNliBfE9vZB5GF9EMo489GWjEk6JdreLK17el
-GlfWg45CVt+/J6ewRIqC9MCr8e2wZvFAWnq+ZZUTDMweP4OH41x0pL+u5+3Z2Jlj5X6wbchdomQ5
-TIkdke3eEE1oVh3VYxXQ2Xikdwj2MM9KIJi+7nuUlcn9zoD6nJ7tFOl4LmWB8UrTDn1kvAYd1wJR
-GiiYMdlBxSHeT2IIL7xVV1gnQVB0a2Fje2b9bFyatUWNlqKCQoYX/iJAB9dRkP7wijv8GWDa7ZpJ
-o2WJPSltLN2dHfmLFCS+Fbv9Jjjsc0aXiAOG8AooY/1nxeryyEulo6Pe2L7GQbhAPqXDy6E1i21s
-dzV2MMon9jU8t+lcDUWX+6EEzdGV+RwZw6Ahsh+/lrAQq5OybayPhCqoDZ2VxcXX8PMsw62DnzlS
-/SSlLTfPDM05MY5StW5j+xnhxMt/TngjC6quoBU/k349+870WE5jJa6AcdHim2w8TqqqStzC/3h3
-+XnMi1vBOAF+IMDieTG2bIKPSOxtCJph5DxPk2+WIA65OySslV0sD5qAkCrwOIrt060/RxjAJWwH
-2Mo1p/XpL3JiK8WMEV8+ilr6H0ma7hmZFAu4cjr30wVhYwQCiBmzznPQZcWnwjl1jMTpsdJFGNzf
-zUXaFqKuxNMNMpylH12JsIXFCIWmw6a56v2pKZ5o9CoA6Oon18WUSTUIWIBPhcrj5+3sv/rOmv8t
-W7f4f52hF7yleFIo4a0KoXZkRAn665g98Qhy+45o6Qy2/rZ/4EJfxO3CxKWpW63y8NSzdyBzSxrH
-54mNkBQ8O8g9N6le9rBmdgIvudc9SQbHh/5idgJ4bqYvfCBQcsVkN6Z1DGHYo4lJAZ27uA0oRqGq
-loUxqg6cDy0mpRUXWzomkOLXGLdAqSon+BRk03IRYWAfi5yFp4+qK3GzbgMu9JiL6liKe9AvI6pd
-PPg5o97TUkuijOOfTjWraRCrKXEgsiFijSR/o0jnsWp4O20D4vfU5QdCDw9nHnzy794Ae17BLb3d
-mNaIaO4xciLbLKjX/+5Ju187MbON0toncd9E7gAk3iJ6VQfI/3sAWiHRKn6/YhSJ5v7FbxMsfn8e
-kNHz2vtXZk7wYubvPiJI1pepMHdsJ4HhZTjm4B8rMEBdOCvq8eWyiYSTd1NWqpXb8eDE+oFSkEOf
-oFblc45efDKGzlPJUhFz9+J2B010IklsF/hq4lGnRU4STCjTMUy1cRMnwV3LfK/f+SXbqhkEhwJh
-cf/oExXynTd0hegmFrjbwj0jva9aqCSIgBP09sy7s2JRo1qOwPShwe5nFGFK9O6bgX95qyz3kJPb
-8czn0gs+cvAmlwtjDr0ojEoj8Pdu6cxLQnH3RgptUZbxXyoRHy6VL2JjGkillxYh8W1gQP6/8JP7
-ACfx9Amt/GKl5ojJvsEq4NdsQmZP36XTG4IkDerf3gMvmTbCiT2Q5ocCoZ9kcHsPyYTMvoi7N+bt
-RUEaeWitsxMBmczSkBSnB8a4X0TGRM1Vbwvx5NQ+uJlVawVXncL3Tv2cI2WBxQpQbJwDJdeR1B4k
-BdRgzE/9HYPimQjevziM/GNeaEJPwHqfPzS62M/O4BEtFQK5b/LW8GJhO6YqOnxS+TSKsSlj0+Yi
-i5nDCro7Y7EpMCC0cgf/EK/o1f4PznhZypjGfgQAHdnCP7nrofJB09har9x17knIrrgGsmsGFB8a
-XtCqT9CUNFx9e/Bk/o0SgWekEy563swgpMQ19iv3LFWcvCPDGuLJmzHl7Qlj4T9+pZ+XVgGczI9U
-9y+XaNnv/ys3nBaEdqtukDz993igzymBQmj2EqRwG1EU7N6LD5sTcB6R2Q56FgXUcwnUpOplOuZD
-OftcKUzSDu5neRyMhlvHqRsH7pwJVtNgknAFXNLg2qSZMxF+2Ze9v7DSNneHjeuHZfbcIDV6Zxmd
-p7PGXxwmgLkL0nuIDefluSmS7TFh5WEkMiyN7cpBB01QTsqsb/oa/wNUexg/a4wjVgW61T3u1/UN
-l1lktRxU3y67OBaz29QM0AxdlMy2RHphN5Nh1PsQxulnKOi3NQPQoNbcHSubt/iKyEVwXFHpocFQ
-/qtQkqJkj9ZnZCBqHU3Yalv14YsUXu7tl+prGNEQyP7bKtSdMEphsKrlolZynD8cWVSahUq+YeL1
-VCdmdh9S8Nx/QnY9UBg6B38lDzFF1r4CXUUN/HayUzkm8Skk5X0tzRioO15wLvBkJ2kHLjcEGczA
-rKgW54Eyu1RQVs5IbVMDVqjv2Gl4zHhDH6rxhYNjqKopYPYKrxhEHhvV8LjUd9j2NCUSxPWxdChj
-CGiONXI/q23JB8o78qQuF8fetfl+EHw/uvUxOGMAe0B9O6FRjKvRth2UBWbkC9TLtW1OdEwvoqiQ
-VKKYF3Q2VdyRugS+FvW7qPhydEA8BW0oJyi1OVrnjn4f1lN5Q1NoEEM9ZvTqGi/vIWvn/H2BbTFS
-zVB5Nf7P4B71/hzh0v39iS+Xv4gN32NVXtoqrSpjt0Uhp3sfXZGkC2ZdVSZ81gyGgKVsFtCUoNbj
-UBBkvymPbR2YbeLGGU3Wb2bB/L9scyIkQAsDX0MI1Wjgmv3FjfPsehM6qY8NJrEW/ToU4WXMztIk
-+pzYeoa4eV6Izvu5EmLVoRQ5K9iyeSxD2B96KZHqhu7dyesg99U/ULLXQrc6rsufG5RFLmX5LTrj
-HU6e0LL2RWq7S4yOoVV0M5xrFWVd0AkbWA86ED9tlnh82JvUunrlyekn+fwH8DQ/0QMq22KJ0CMQ
-D6meDysGHCAb/RsKuuAcZSubkNyxTLEptYVOtfS689rVf0U5X+lQZph41nKmxB+bVihuZGzGVFN2
-Shy74vsRzf/CRLcsmWQtXaUPOTzULeYCwVwXmKYtK6oyvO+FHYVBhEOA9GoWUeK3nMIvtj81yRsG
-S186EuhhNISRsJZQyD7WL2hnhfGIVyZD6mHIe1R/xpkU8bnUiP5JMdQnqwwLiEpsXCHFIRBm8QzE
-Us6P5Hwr6D4/e7eFum6lx2RpQdebwyx4YqIYmYvnUsuZwwCKjJ3azfGD4JJpFQg78vz6z4dXQEep
-Ka9S0iUZP3Xl9/i0F4I7zgEYXQbMWEiN7mpYo4oaLRIHvorN7YnxbvnYCrx4lAd+I6YnqJ2DymOo
-pKbeNaNSvSV2cN3XaV+/ldPwC8DPE88xwgxZOEx5O1IHs1tTgKf1v9OWj8ePUXMdlvFF4xwuGoy/
-qY7mvStYEx8lJ8mMV9P6Z+v0fvIcjtco2i4wUji8My8c5RWqsJN3gI9neMD0KfPbCmn2mrrmawb2
-JMQtpKnMWXTM4eLHJFN9d5NwfbfUbTbyimWl+c56Dm1Zp5L2oNoWEA0RW896IhIpZxkU1TvlTWQs
-h1GW2zGc70F3r9wVuJ/gJL9eQSsd61LfUalGYBbM1bTdTuQX4xqaw1k0/ly6bDtDLm3XRNqM6/m9
-R9Bs0xoLJ5eBWSlUCiD0uFQH8KrKwjuQZ1mq7N5L85FNhrmlF2YlrF7Zen6tmAtMlHAm9ff5FvM8
-k68rTMKN9eFKPBlzk0837PiLtjDK6msE6IP81yVDt5/nUCl1MLu1SXt1XXLgI9hDTfPoO1Yym7w+
-5X5zyaxlnXKHRpZTmRZnAPgw/BnjXJuvHyu4YJb6jdY8LRgalSeAPm3DdtvHl8uJfHY0ojE/+ja2
-hsS3nIBNhQsh7/xIeGhsk3GhdU3tzH5Af1PXsYkUPbVEhUzvE/J5MZCImew0ZQgEqAAqqr89aQkx
-GNWUw4QYstoPg468Wmor/H/J/FPlclSlKn7TqZJAOP3+aQp8h78dSNpC8EOuac17EuOIS+akUVkQ
-Gp3huqHCwDOTuJhAiGKzYSoZlVcPGbbtG/WoDUzbLcrur/pAiYuCoqieTdgpIXOKwE/3/u6jdSsw
-6jKBbxKxt0S/z9EpbmVPE8Y4oqyTXF2q6eVxpdTJKxktk2oMdy6cRoBoKKeG7PLRE2faH4CqkUJS
-NPwKoI7sWDlpAzS7bb2fwyQWW7jtiLiwdjVDnSLei9HtO4EoWy98h1FF8As3N3Rw6EpE7pMs0f4e
-4HBYELkaGcMvf5rE45Ygnip3qu4p4SvLEd0meg58vJ2WwOAWqrp6lw+Cqyxn5N7x0w5GkPdpRdTO
-5W28AuX4pdaYBzGI9axnS8KOqrTPmw9RuPwgBTq590lRAB5IdF5tcNHHtQcbSgsFz2vBEPlxYaGh
-zvhQcp43+zhiwpn/qezVGfmm/4x7ip+yDHz/+M5doBnBYMxjEzURwnOTfULrbD8CCJHlz+6NXQ7O
-UgvvMvWM8+xC6JYjjuvzdy33OwmHGzzQchn8ssp/Kw6/jQAQgd2WXULvQYqc7kT8SyUvjbleMG3I
-RWBj046tqKLiUfYfgFrqACtaHednj78ok6ANLHjfRHLjlzibhkkeyrTw6S99rxEi+nB2vZfyL7H1
-Ck3KD+6sXS+OXDrYmy5xqtFBQGNsPUrPL55FKi7RErH/sU3n5Ap6ybIXm7F3IurfdmxzQ8bMnjMV
-zDGFaGfL1RytDB9jB4/L6sa5WlMZyHkpdFK381CSzJfSn8T+12y41Vy8psufWo7OUcOrd+icznxs
-zXs3WeeO/uwAPZZ2WNMgJqTlvNoAOP6SOW77PQPMBdxkF5KeH4LJULL+X+LzvsIvVSeykDWRaUAV
-CgyzlGvRF9LrVP9ymY8+6OkGjVmXBV5UX3I00THfI/elTfBhe+9RpzInF1e+KEacYkjPHVBIzwek
-WaOC0ExcN1IE4stvKR76dLCnE64y+ZdTZ0CG+lKS27OjZoOP4ujFGfoTTTq8rcOgDqqzNfTN6I/+
-E9xEHvqIjKiHRvyAU/O3EaN6XlW3q5Virogqe+k45i2w5eb7L6ho3rdFM3t/BKR1G2jFgce/wv8I
-ZU/+3M5PowVbNZNwkR61oBttkSSinM3Ql6DET7lSPQmlOLylIEo62V63iRo7c43m2LLXbymuYRu9
-WJGWajD6ES2CbuCdrPn7tA/cY+m8tm6z4XA3s6iOQBSxdbkYQC6eGQp60BbEybQG9FlynH+BZViy
-BKjCBedgbDdEWEn6Q/L24bNXaxvBQVi4cuZo0CCKG2tuNgH6UG9zNcstLCpAOestA6pHHon7aJoM
-uvsst4JU+Q4L3mv/9CiQnewnmwF5lnRm//4eCVhgevuY9oRnCQgoGvOyYJkZCVNWthne94Vje1YA
-vql5oKGX4inQLmm7D8RyQWbs6BC8f8sioU+ZifHQTFDUD0PIrbcgvsT5naZrG358b4gXc6fXRtQj
-7dcF6LzTvcMGuBtdWZPnFbhFvKfO7+cwDNISxpK33q6doOvgF98Tpdsbi1C33AvE5xfvskCtvK6a
-bYMgjblsZf0rK2UGCvYQ30h5Q2b3VqWJ031jbwfaHMJ0swqhTTdnR+iynq71l17VXgnO2oYdv2Pn
-E2Qu5GhArSM5XbFIEuB1ZY3c6agZt/7h6CtPy54pCRe6JPDsTcSTs2w8Y/ud5qkRhkRnqvYJCVrZ
-411BE6PH+J5AXb9wGuHBPq7Hj45mMB+UNwg3qx26eqtQ1CYoVnRIC2sM/9ub/jeEv2/ZtGdybenx
-p2HLA1uJaBznIaU8EMfItCaPft0/lTe97583Br0xD2i38H+cWgD/2+MoRKAGi8qoy+ASgJeg2xpL
-yVLptQzDJrDMffCvculevCNTO2+CnA3liJ3OJo/TRSeePBgWFIgrdbSLscsVHxLADLFxQYhfaMEC
-kP2GKWRSMIo4xRxQ6mcUzMhzvwAoFbPcQtmW/CxTUIwLw68ALQGL3qsqRqRe+v9ZWnGqhsJFg5Jt
-dZSNOak8g7S/x/6+fVPufk8DgOjFG5d2JXEyMJO5j9yH24PhQ8ZTGLQnyQQXkrR6s5lwMqhUwbK/
-ETTU3CZbdbzhHCkiILmqqbUgpsU1loGN3IDgMFtXlLz8Z0cv5NPOdnmBUQra3mdjX82sgmAgDgKx
-Vi8HHn1FVpfiTDg23fir41wn07DamenjI43AG1T7VM5WP3j/fpkGCk0RlBMSCzLPTDLv5+nijKV2
-5gefc5oFvdXMZLsHo9ltCUxFB1OlEFGzbksHjocIwu1xImA2nbd91jhDBThXCUPwLWZzAj5pQIAP
-uERjC0jIFANzu33vO4C0cDA+NoYhaxoFu8Lgl07rLkgQXqbQNGKxpHjbnRxULpH4KXO2yaBUB1Pn
-9xDo+JT3AexIKU700Wp12YCX8gZMCrffXGdk7+PGwif6pXLh6EIgCTmS6TcEwjMxJ3DWfWidILUD
-md6U+N/twFowwwLSMewfx5vh75nxGjn6sn+QFwWo/CqWMeJjnW7z1avHNw+/o6JbkdZLSHUx/N+q
-PPOzDfOrHHtyQvxqMWIdO2QaDZ/FUBCsEUGHOLFI5m7X8VfpheC79bv0QkJBZtvr4rcICZPROjkj
-gqRuICL4+YXS3YBSJZe5zUrUdu1eXpznPhCRrDoLKUXoS6WDarOdPYMxKbMFnAfEpAwc/i0GD8fC
-QS9BahkNfOPwz0gJgW3vuge6DnuUC8RYPPdEsfIkR/MFu4pVwAnKbk3MuyqJFINXWak+WiYWtnDu
-WcJu+WzIRGXt4INsD2bbJWDylkra85kl9av3KzAqakEV6kIrAJtbVeZ3/4/ibL3o09WXaP5ql6Ym
-IgKgmJ/JJ47t9zt9s53ufWALGTAcJLQLzP8yS/OCoC4su02FVC+Zg3xjQkW1TYD6oVijKu05Hw4M
-M8DC2q2z2QGbRnO05PHuiXOYdSi5lIe8eLk4k2WbMvPx0mevumokYaVpfsdH1xjDPqww5Pz6bvUd
-/Bm0LujLjuGhZxtlDznNY6hKO6zlyReo4AworfdNT0UVUwhNktfaMY5ih1kkS+jhIkVRAHUzRQGp
-oCsh9QvxuGvg4wxM28oQ34PdqLPrMBVsDziayRTdZPvdkgrmQKUCzl4lFHJZ9qaIuvPCdTE1MUBS
-vELEfRLRtB1LdrcuFJJJTcMzrEMDm3lyevfIqgWmw4geykG9jyx/n72GTcJI7ATZ4lWdrmbozMII
-MMop2O3RFFIxymsJVnqa7YXC+U226nI2r2Hy42cJmS/Ju659FVAa4mIEMIFxfnDDN+NjVFjNlUMO
-LkP0N8vFSTCaApxm/4kCqgSIww7PiA/08FRJkXhVbGHWqb3uVtlKTPWB2ug11Ckc+B8GE1pmu6k3
-QscwxqwEhCZyAgUL10L76VqNnPFiV7MtHzV+g/FqGkgJbdNZ3LGcJVr/el7Rm+3irI7eunxv319Z
-HH7lH31Xa+5j9jTwdJE+ldkw4CoJ3x6uTlmwGrg63qlo+Di68dEQvUByFc5DgppALV64VX8+Gn3A
-Jsn394lzXelR2tYQnRVbdcYZJ7LW0aUJu2fGq3rAz/fnSJlCN9WzuCB7JBXmj0/uMA2ihWPxItfN
-4OZTFf0ExYNQ30xafYugL8CenZLVaFGrKZQHxZiPvG7youAW4B2NCNgMdVxRfYZjLyBrJIQQAVC7
-j7BLas1vmspNaXPThWyAhlr6YH6Q4ctBfK6eGED0UIe3KQE8h+A+FWAu+J2l84JFLqHwLGYxaXKw
-aDvRWftRkkQFM4Xb7iir3bVToukfxPGWPkZg69H+cGXSUwIRWnJeHHBdIVhTJCDlDaofOyhmOA56
-XhkFRE6DTbe/q+xjFSKVsxp6XVFZyDDBsY7NxNTRaVxAif/BqyLPPYJNuCJ4O6NO/CUXEo82K8/R
-gREXqYbzRt4EXVRsZKykzbEd4l0CKcAXbRUZzg41DEkCicj+wmQgvNW/j+NLjXQe9pSWOdHCYbRE
-R+EXoDmTrN3PhfyJQX+TcXFz3AlfgwnvHU0btlpAu65iZynRWhko1FiJBhQLu8zECp/jlFRm7htP
-TrvUuFPkWBStBrq4TumetKMqfwlJGnJ6bpxTzl33RY2UbycBZFbKhObIOH4svc0zbP3hqSmKfNzq
-FsngZ0EwbpxfcfccodRX0iktxU/rEpSvhBNAk77G2/kPhLFQHoE244K3ZVepu+Qe2L/lWV423dux
-CzIXHvzJzgsacYHmqpYSMZz3cBDrgMl3BUSU4+J7XSa6du0EG6p2jKov29xX3Evjfb1R/eUF9GEI
-sq5oI56C7oK9KkXpT5FAQJbOLePMYwlXe46yHYEiUSmjXOE/B/t0lZxlca9MiQ+xCUeABrhhv2Ys
-k2pHOMkr88ANQStXBJ5Ktk/cmMSUEWxcbRJEjRbVeraKBgrNqc99bPmrF9vnl6WG6170hV85XwZY
-tf9JjmUVEuSEJcOvMi9EU616guwazgSEqxXRIzYZiK8hMvve+jEEdz+YVFayGPylawSeH6AAjj99
-31PlOVHeVl3FBY3UYlyez8mqF3QtwkzEb2icDh6hrjDJV6Mdsl3eiSm+oRHpmo8JZHQjLA+1B29z
-zhQYqkNXZNTt+h9NZWcs5Npj0kK9HtEfb5IW79MIth7Oaq2W5tOHasqiRrNtNUiJFShiUgj00ZCP
-FU11aPfbMsjLqmlFU+6D/vx4BH2+a2PB/2RF30UkVgpoL6OdOa2xgcV0jHRwMUf+pnXtK8tnqQQ/
-r3LyfS3gmCRo/sm/zu+S7NHinCrBr1WERuMcIWpHwj/RrKyrUaFtziXdTaCFJ/+bdCtrXlQqyjfs
-RMIGx3WAuKRr2qg/id+8PbrQgAgPrN3sOuQpSnW9Zq/+5+cA4DSaJjv/51dsOkU+Ns0HmvUqZOxK
-+8xmne1YS0lK9Hytq0HprtZVG7cORZ0uHrStQbwZcNSYPiXesu2b6FZOgNtXuj+YTm+Gcq0ptoGW
-UpBmLP/rJ6Ea63JnT65cqddhGlzSeBVPJ2EYDUsmk9TYle1snM7CDX8UPgdR97yhwjx+Poz/ZkAQ
-1+S/jqV6OXcsv/5gwMXshHTSQZCC8tc2gTjUlalRBSHz3LaB8/fxQtMvm9rmm6RBXuqGCnO7Eoa+
-ymu65x068xf6aHtHH9llONfMDtk3LeAyCXHN6cHiXq/TNKtT9yMYoGcA4QCol5Axf8IDU1s/6Qpj
-H0/8ls5+Zeke9crL5WNcfNb8h0KSXWO9VP1JwTHk4Lq94lCiEvzdVgwMNOA0TZcHzq9rZaP7+yrS
-yCLz3FVc1l888zL6tyXDyMkaF8uMQaVTV3oV9GK+6k28N8OJKlfMIWIXHqv5EA63gDmglSqdhDa7
-53S9fynWM/XevjsSGDf0OSJtnOHB8JvTWDUYdOgQlQNnnmrwmvz4WeoNxumMurSWYA2DwgvI6lKw
-FtrkCe4dxlY9vebUsTf3b4fX5LjzXgeWYKqIqpVc5KAqrx34DoT+TG5MTNsrW/sgaaoS7vmjgJ3k
-J2wAWp0OxPp2X6UZwQJxetnrG682P53US79rYwVJS+gu5LmMiqHSBjtlzEvZcBPgTFWwW0RGEmTw
-CTd3wENn3HXEVX5kBdZyx3w+iP0gZWlUfNQEDk2SVOgJFCE0zdNEoVxoT2hkJ4SsvKUiuua6gAXR
-d6LJC/NBZ0dDotkAt0uQMwqI1kcj3hgPOFHg3u46b9bG5uEE5me+ggbIso4xz821fQvSh3FhuD4y
-epyrt52lg+opZ1DTmWkTcgdQf5YXbmutHkB2ZIG/n5qCs12GY0fWG+KwOX/aTAn6U3+kXKZV3GI5
-yaqUGP70FeMRb6OV7H/OQtSnS5TULKBhipjllXSnXgiE0d/Fqy1zVoRbjvXhZWAeFag/o8c0tOF2
-r7W5iAZCFgPNxUdYLMv9ez8Xbd30J2gj1AlrVSlWERRZdUo/KcsYkLPG+CWe29xcLAVpm9yfN+H/
-VrKgT9HGclUqv92W1/Xl86GVzxrdouja0hiB9flh2oZkkG2WXtaWy4Oi7Ypv3Vr96+MSsn1gPDXJ
-Ol/hf65GpDYxKt30w/2ykny6WddBsFRSxejbWjWxeooSfnz7v/49AhnzP8PioduTpVXQOrkNrm7v
-z+MQXd8FqKxGG7n9cnvHwSdAszyu/S1ZrgLrj4x55qI59M0oWkeih2g7/i7TSOUAn7EykAD2xmGJ
-fDbboTka6A1Rl4PlkfUc3jituy6fa+8t1oyiM1sBoienbiszsdQy4w8CR4E2eXKvWtif5zQFXx6S
-PPoLX8daWZ61thpfaLpQ0wErzlB/cfrSls5guQ878nCFZn4H80L+8G0F0REYE0yROTIi4fwe5ZVI
-SS9njjMPXLy+AKTt/pAn2HycsqyFvOSFLg9rbbFhDofC2UJS3cHP7LeI91b6htKPo0j2NPanZLDj
-MW7LBha7xP2TR2LhlT120NqKcqBpglsmLWx/DPJTwGQcHsICUvnlu3cf0qhsavEllp1tMhoNeAAa
-I3uXKGaGnl4ofvmhOl6omlChBKk2RypYZMiww2XsC+k9fxj4vUT/egBvXBifpgQyVfbQzaSMoyMH
-fJ8/H/mKH7LmYj3ABrpvy0vJPstnGoVR6MMfAzHPoqmzdTnqCTlzRW3LtZ2dH/6fC8MszSi7FQZ4
-U5VkNfC2+mIB+uJLJ5GzPg542DY//hmcUj0LovGK97g11Hu3TwPaSkNP/hX3VCBXE1DksOD84TkL
-CAUcjvc/YbjkMd+2QqRBpZ9T4ilxFdoAZAfl4Dx0eJkAphOBGm/rFGCLC3CkC5Sy65Ojrn3/dMZX
-sY4G1pjYtn5sIDPJOTtIiPG/k8+IFX7w/o4sjrR/PKkG70hRFmcevl5rSzkr/Tds6SPjJK1ATffO
-TplBXIVTE+e2FbY+AQHeYGe3iI77aulEZK+OAjgJik/28nSQWnT2gGtl/uu2m4rbMwrP5EaL+U69
-V3DbfC5i11vU6gaQaYNuHC9DwmtWAa4EfV6ZzogVU5z7ODywvAH1WECm9eKhEiV0iVc8kagTeQji
-23hGEK69vN5l5MmmkFxRNB5ygi/dWwtvzjwlk9hn/Fva2FurWdM+/1lZNJrs8OxAR+4l6DJ1uJ1F
-6MAs9AkWR8vCAGjkD8k7MsMhK3vxtVYqK+qb2chKY1SAeFuqaU+ADFemq5ALO0EMJWVn2qKpBK6W
-usBX//tfABoS4oy9326eZeK1sFkXaRqFbRb9D59bXpeuDxGM2FV1+M0yEh3QhGntSNsyTMnaYGZY
-NRKSwU3ySiwfj2bLKkFXJIew01Jqc/R1iHaI/07e8ykLseg7tY0S1rHcofZVpZdPxFOafi6TJ4d4
-IK/zDj74P+Jc4g45gKz3HfdsR2RQzGQPoZcqcTxbuL3b+/BsQAmwJc6VpV5Jb/LpDJObooN0/9UM
-QXnHWfsrVCAbWjMCFQcr/QJz/SV/UsRC+hT45E4mN9ozinPMMZRmTjJwHhFTHbV7NTPl8T7m81EA
-Qb1FQhZRvG1VWtsRVUFbskUGFhE2tMvjQ8Mx8KrVMDuAwNmeZwf0BNO0Bhkgog9Z6c6wPTxVcQr1
-fMQY4orSqPl8xmHzA+dkqi2ZXPPduu8DIuqCecejnZiX7GMwfFJlpTm1uD7M9iQaMUzSV2AY9eY+
-wkqs877cMJpIyRiAxB0Em5R1bkbm5DJNLUbc5739QyyUozz4S1gFRYIM6u3HZR5l2yXnTiDaZ/gV
-soqu3iwQA5yT/JHoCxaphF1OuwCb9Q9qjKzl0vNyCDeS4fWLNIdDoRpmURWestgQWrOPL9vyM/DN
-HwxIFLm5Uw6JazQScpInx9MIkQEpv43bJnd/41n8cTty6Zq64qWj0OznYDNoMqKcIqRPUV5qTwvR
-yCgtTk51du6vlQ/R/gYMwBCG2ku/Ld+QOdliXK/urND3MbTPxRAgjs/sPhJI0VI1PBRUZl3t6dW6
-i7+5iCgk4KoWZMZvhX3ExWMHF+x/TIWuOFFXmwK3LMxOxfazhgUXz/gdO2HTpXpsOk6Ksllv2EUL
-Uyt5G7z3mLEhWcVm0hMVF5FXMOJMsm/i6DI4czU71CTdry1vtVmTeFyrTFz5Td+QLv3VXWXh7phF
-2+cytrxOeJ7+ooicNWnNvSmVJDW+GhWW+O2uZ1XlT3KX7kuxc1KwGN3Gotn0TBJ6/Gn6X9sFy0O0
-wwa4Jsm26gBh0NAoUJL4YEG5zkcUhwKGHu1C1Q4pCnd7nPQNeWMHnjFKL/6qDvslklhe4W3VNwAA
-4ZRY/pbWCD0zjMj41gNh2c2wfhPUG/+6+MwBRvFD0nev1YLvLuHEPHgY/moeOAdpJRpSGHVwELio
-S+QMY8ZtdyUvLSyT88pTF+5c9QV42Pc2ELbQaPD2RJCRUKq47S3UtcR5ot/9MLjXSQGmS6uidrV5
-wQELoSChT+ykMjFc4EVccX1HlAhqSCaTlgaDciMKj0DrTPryPnWoYxMmiXH5akXP46WpKx4Vj8kO
-KyHdv9Fu+otQU9R0Nq7jUhnS1xL4upjqa0h1gqox6OSwFKt/ElYuugLkZkwFVXTve7ej6ZZ98Dut
-BH8Id5ApGtUOBlFPWNThj5Ly2JXpN1ySO1H5+4UMUyWKwnKSFN1Emo6qAj5/H4CwiC59aAXnlWjh
-LKYH4MdhGxgIZ/ybNE0O0wEFXJ7pqcRPdECXsmC7W3lJgmpla3vg9rDlXK8besx162uGoyX+p3zE
-vfK6VR8DM0xnH72y0fTD60SXnIKwg6bJyVW+PEFs5j7oglEDKbA6XUgCC9NVrnnrP1wQ+LUcYiv8
-FGUnKcKNajGwkVcZOrW8VyjZE8pbACWC3yqp/lLAFjCHXCdVsEcC6XFjvtsdvx3E8bYQ0H7RO+XF
-BPjQn+LhitNubvr1SCaYXZlYimY+kzqMLnot5AqXV1bymEOyMGlC6+4hYUMkKoGbNudH9oEezJ4r
-utXBWVT8iCvRMbhkbRnw0yZ2HNlIM7okVIXf86SFO/SSBKqHiNxflbGaQmfqG6DYP0TQCn1ZTgch
-he1kkoXmgS7EpzunDDS8agsYlax/A7ZjlKydoST6EKeEpBsspQ+lan0EqdvcP9g9Bb8nWp65U9yZ
-m0tG38DM5TbJBrRBmjAeVrG7NrW0pSlXT5GVMZsMGyC/tW9yYa3rxctI3yPeGbQXOatnHtehf2Po
-0olU+yHNDsxJbgFHvjIFDW3sBLRhRpfFC/qcLQaXlAuj3uKAISGcXq6bZ46HuDEpELluRaLiZrUa
-TyKByExSlenjifTQKmSYWaV9pDsS4aR7YSGQJLkxrPcbNyipCGLH1VNEz8AvocjWeIQ2Fp7FtnlV
-ncGy25nWKEKeUGQKcBSuMSS7kPywMs2PItVd3NUEVdr5JqkdoYu12vvidUu3Eb2v6zry/U0w7kIV
-N/Vj6Ht0qGYLLIdAGKEXBwrn4e6z/dbfaslu+5VBUBFbDOM5gU3+t/dqjsser98qyptnJj7kjf3o
-xLKsowVzHkrrEj/tZ0m/wHNFEWKoC6YTxlajcs993pasVBQoGOOT1M/L9OrxVRGkB7Od452uJFE+
-NCIBDMiafHyKpAMqaMhjtwMN5vF04lsN8t8h9ndQE+Kdbxx3IYqwdmmkXFmMakxJowhXRzjjsiR6
-MFDcoFTZaz8XGoOxIa9zckGmBbwe83v5eULg4pzE9k19U/lKPzHHbJeiY8mU0vyLy1MBTvVn+3hG
-X0mOoTvjNZq5qwgA8xdcSUCU8KUkk8rk86zEBtSde2kguhispYRkJgeLDg+1u6RkdjRgwd8bFCIR
-H4luH7aaU2WUAvpWUb4vfAyX2/KbficRN2+VFnOiKDa7K6LXjp1QMjx+OY9N38kfdPkY9nVyGFV/
-wysJyd9QxyZn59gD8a7+sSIyqZSR/+hAJ3fSU80rDi/x/mfZ78p2J5KyPQOJcFvseuPzWLzaOl/0
-f0R6QpZslgu8DnMY/GS3TZ0HJLVovo904zNF114paZ+rvi4ACBkwuHhrlMlL1guKHmmH20gsIxvp
-39eRrdqFFrdCUiFwUyTNNwA6wdhjnNGHz/or5NwQt//uWA0x0D9XNWd3f8gx6TlqJuAKFaU1J9mS
-HtuDRhoQljPl8SoljJl+4NqDua0RQzV5IWOHUZx2jOvyG3W3kGmNdy0aAo7mMP58xa3z2UbLDuh2
-2TmCvQNFPI8xpxwYS1j4995OrMK00doSz84ree7/FOOFJ9muejVzQKUCFNaym3KNPNOzjPZKsVfw
-lajOmkRbCM5SzwlxyaILb3/RCja87+Zgx9OxNZSW0Vle4mXGCMjNp2qktvVdYhfM+H34cJ+QdrK+
-rutJV5E96tYc6kiG/XS6qjk/m//qA0uJ52+Bmq4OYaOhDfzZoajDJD5AcG4wUhCIi5kPrMTVygDb
-a4b2v9GUbHIA676KKvAskUBC+VjtLTVxRZQ7gGVb0u7te5tqu76zQPrFOyLH/aR9DRw7FbYqclK3
-KQDgskHWggrsMdV+ipLi4hpFBwcRhZUmoQclVwwSwnlUMnk8W75FmgjTQ5tIBWTJTHEcq4xpHFCb
-pUNprVAstj8szZY/Lq2wppOO29e8Xn8Nz/wlJyOK0WIzc70zJS3xdIceipg0H30NN0coq1+6m4j0
-n39xhWIfErYdnPaGrD715ZgZHIKaGJnPWg54RpG0lP0L7YX8RDq1gN79TILNe7pb0ITUTMw3KNSB
-o34p35OaYWhta1AX12dwkHaKjVVCCLyPthI0WQEPLt0rg/3brk6bGB+FhA4ap6Gw4wvpqmj1Qxmk
-yhXJ7jTK2OmSvRBkmipIrqU/vwqHP94fp17yyS0ijAmG0pWcPH9q7Fycu6F2/N+d7Neqb5GAkjEE
-xnvFXsLrnfoDiY6H8wSUdqnbvbMAM3KS0gbqoPrvsgLzTXerLkgS3MstocjHFQFRJmkNn9XRah6R
-7njJA6AqnhY11OVnGX7XOnE37bkPuBwq1DCM3Gu9FPMm0TYC0SsCqhG39HKbvtVoygMlg+dmBWEj
-2uKuWGcNK8vFv2bz2xkDsNALKqoFdof7IHdv61UBzO/UN3AfcMf7yj6N66ozzKhEIY6cGEmMQ9is
-E15BbMYC5dci/VscJ/DBYWwdrS30w745iKYm+S/Vm6x0YfNI7eLGpbpQQZrBz00D+xIhY6uoe075
-5qfn6cQ34yZWrs57PzmgNHioaQgkRtvuoT3zch0mTpI0Yh6DzcQm3PYaAjzGvzoZBoiWxgpfOukD
-+8eAF9H7usLgSl1GhkkZwzyf7KxfnAszuDRWXiwFahzd73RzRVChS7n7IYOErQw0BUnehrxvS8gq
-60q/CZ5n4o8UZHZWg8idgkA30vwDF+dn6YEo83sKVfrwR2XDwSKnuc8of0HjXj7M/ENNwTanikMV
-1mhu7jvmpg/MpDzflx56wupd+kDQTxT7FiDv5LORSkkNkP6LdYN1c9GhiuWSIPdjgXiDmmnxXv3l
-EhqDUbal+zNgzwBKfvYGx0brXVu6qdYGeFG31Gps2bHCUGO8ajKjot3wrLSpjJKWozll9l4tYaEs
-SuKFOLH7MNvMGs5lfeQf+8Ibl7GDVM4VGMV0/+d3fZZWdwsXJJNiMG2xijRQKqrqpYiRR0H+yx80
-PBLaQan0QUdk3eGbZyXucZm+bkwrztjTi2nI0hp0WIEuH8JWHf5z+1cHprqkQpOPhh4At/+55F42
-4PTpFQskSgCOa04XMr3J5pxbx2Iem/9btbqFEihziXOBU12TnIfNY8XIpRGy4oNqLj/cgiPYm9VG
-oJ0IWzjJq1PEWUoMEtlOvZOlqDNMa/IL36fd+BNW58EXvQE1DWvHHi7Qo2yuNNfYqcIOiSfSu8bQ
-YAS+6PVOpzjMMPTu94usvh/6hsOCX7tL55ydXe3N6Y5RaE5pqUl2LHe7p3pvS3w0FvwjSFoX7b6w
-1thiRItae+hggRZml593LwjBvVzRc5wyQwwFGZEw6yHmOwztneIIR3VJVZ/VsLLdqgIu17rC62JD
-ySOF8CWjUc2sD15oLHcDlFy2SZojlDwoUXKBtahO2B69FxMUeQSIL3P6efqlbhpDlC0zVd/11NrK
-qIaIbsdpKl+sl6Pjkyfzc07SMuGo04/h8I1t8p2Lz+qJevQBiJ+QEr5TkTf/qqyltVW4a7kedvMA
-ub025HVUoYLBP3kne6EwgloNJKoFC9ZxZtZyieHs0yBi/J4witfEQRAgxosdmVWWyGE9/OlC5a14
-/jKFAZiiXibVTj/pQ+GCJrre7gq+3KAER4/iNN1i1rrXL+5mt04DO5L7yVKyzBg4X2NxtFdQOyqc
-3UtxU+soPUBr7eIrZK5zXBT/gUJswP02eUpi1bHYY+byIpkNhwURcfWEfn0vCY5Yr8DOuSTbnYpq
-MQgFCvFE4gG1lxreslqaaRS/uXzFfN3IiLcTFnUKDSn34f2pRAzMMeL8jlwXXNpn+yKvM6/wh/Uq
-e3XQLDuUE/Z4cLQehsKKXMU+TAJB/ZwtDivq0fcd27laQ8UKdCUaCIINskhT3WEF/9EckSTO+tkJ
-xo1+Atjbj5Sbr+EMf0n7+n1vTVCuYjlCBchMdcsmPfdh+/4Bmccutt1Nv6wFYx4LxERVwvqw+0j4
-ayGaR73tSoEX+eBs8SLg9zNRRDbWyN7mmDlAAWfFBgQ8AtGp8mdBSquSjevZe+Gka/nXgzIBLDHd
-DoQDXEANTJ1rrazPNcUL0luKCb+R1pbT+gF9U2X2mTcfojcyvjxE3XdEH+2Tbad/dsN12MOWdueq
-aTpv5mq6D/c4CUrC2aSaPzGGqwffuMqnXdNcmZbT4cWvOf0JI08FNf1Z+F+l9StpcDK7x+Yx7ilf
-JnfjmITiApzeQg5jMFoaKWND095Yz3QKRbU/ZmO0NHf7Rh35Fsl0hYXy2LlvSd5i2Cp116BdxKrU
-Xfc4Y60b/5g9QyvEMBuPFP80PtgRIvFuwQ3YlveeXvrjT+sPWXXP+2ZfQBdEN+MLynlMvtxX9f2G
-pE++6wPXfwpUM8I9jvL6Mv/FxmlFtKcEVkf7q3dUOCeTjzOMy/xIGpceEaF5QVYGuebfuRMIR9aV
-1ATNgH8U7oJW1i/tyl9TywCCgBkzIkucJVoyzl6dP1lftyIsdLwKKJyJ+wFs1AffN8x1mn2WdxCa
-yJ+vRBi2msxZrocd4cPivaynY0T7+ctagd0G1qAGaX891hmYEIXh5+HiApHrHRTv+1JAAhqW5hYb
-vKz63SxC3ggJj59U9pVqzpTgBkATyZROkeuMlJMwo0M4qIWJ4pQLWx7tOLyt86c5my/wnFEitgv7
-WiDQYWD3Za3dSkCjmYyQdT5j6ZA6swydzEG5FVUufTbpJs5KmdurEEceRVgrDv0f8hjCaEP+kH/F
-8p1Rj4mknt5YqXkOtRsMwL66l0fUbe9oJN1qfZgQ6Me3pJxesks7u0KGOhD5pTDq2uNP5HWtzNNm
-Wj1T8AI8/V7LIXgaCHSOp7sbLaQpBZbHI2IgeR94yDRuJzDW3IYCYHYx8c33D1ZHytdL5LwfjF5J
-0G2wZoTuAVgYz9gv/NKUBSXA189AQQ8nBJ4+87rE/zWaX2443k01Iy4OKbB1kNM0SARc0DGeiiUf
-YzVdJcaNLvxIz3e81i1SfwldXCcxGSLxUH7+2FNx8/rd04XODkRNREyPB2Prh9wzvJe8G4znm311
-YElgKlENhXXCMzRbwh999nwGlNZYHHOdvpnDqCYRBrzLFtOGYeA8HNSUaL7WUGIBfI484If68AUG
-MDvzT5WkbfcMLKPjhmQdB/T3QTi7vmdYDXhP7QWt/INnXflXJ57iHNP9StZGzArevm0HWBYvkBhG
-9rJzU1fQ63yKSfZAriXpPPvR33HbE7mhrp9VtD21u0S06UKR7ypA/DYx34m7YOkas/eYigvLIaR2
-wQr8sQBdB7Y9n+e2LE4TnonTMCujVkEiH35jz1AmN50VRKpu2W7r5CuCsaSBctS5Rq2bMYN2xgsw
-O1Vb+kM7Z7BPOUpaqdeYuUbgVPUdijMDq/4YZ9xYZYr0JHv0M84cc3mBRIrwQaqZh1sRo5keS3kK
-nd8G4KSTdBolsJIUtStR+RCaGPlFza48rkhj9ZBUcQjNuFEyzjH3oby2fescm9n5era41/dcfOGS
-wwT/JQ9AAo9gO5zbAMyUeK4Ql5/xzemoRWqGAuTubT2ck7ScYuFTMHW+IyH3Rl7y0p8r9sBkTEiF
-FAPOnIJcaIBzDT/BSpUHUlm8Dgri+ku8KJ8ZvnLtDb6g4GkWuC/q8MYlqpg5uQzrsGFO1ygrgmNK
-8ZuAD+fKKr56Lw9X8wo0vqe8t2y39VFvRm02qFeeHLPjS2V3Cr4gp9gPLyL6jJo+9iQfMITmDdET
-xYjfRdYe6582GqDDOvH62Cv767XPKqq8IE5Qbuuo/zCz8zmi89EG7lhiLbnoRVSpPgy62fYyDSk0
-C/nkXmkUDR47SGFtN+MafzurOqiWfWpn2fGr/L+zWsxsv+jgyK+rLYmsruUXrs8jpGq8EYg+EXIh
-5nAUc5r9Mc7053mn1pMduQbS/2GaRjqZ7h/8E5wdBZOpM56SfwfH6ud1GAsrtSnHjttxJdVYHLwr
-eKmN1jzJ6aX+7i5RYFfknX7emG6JS6zFAQTk7ooCvK73D14YeNnYuLycrmUfZxChtin3BgWv34wO
-q0nVKhSjQ2OiyRrKuabAq8etiweKoaNaj48PWaajuaUDVFyQWc5drLiImNqDDf+qv63llDMZeXA1
-4PnueA3slj8PWVokcesk6GVcUlYcIgZLXPs+AxpzLHxGpz0u+10UyCJScpldqssLAkZi+TQU9tll
-qvkEFzZ1Ag5VSSNErjRfPj2Oa10CknDr/CYSwDRJrjapgG19yAAVuIOuJM150l0iVhG+2TDqx4x7
-m+2PJ0Ialh8U1D9oAxhEItn60Em/8q2RudnOkGatrnaqMEGQR+yE7d21kskm87vJE8MVoDKCpJc9
-nWkd4+taD9W2V9tnyY+Wy6p0YlmVzCnb6ZQ0Zp1z51ypQ9EgVhoEvZ7bc3aneZ18TimE2E3c0xKw
-ylwQom05ribWcoyh9EmREtL9GlfyziB83KxH0MLh+tqOePrHmmcwE+B0+2ameQ3krAvtueGm5q93
-5tLefIjnUuMbOFmxE3TTteEIcQ6I9D8nKdLYECSFp3ZZo5frZ9DXvog7OwPhTwrUaBDOEXtsE4Or
-u8k7xc7M4dT3tqofMvSOfZlzQjk+11GXCpTguUyzYLHDgh3ybCOyaRs19vsf7FqIYsR00F7XpRxx
-mnByfvOjOFgGCJ22I0pBRMNWTYWgDvavii/j+eVe2AzGqzxXwnQMDOt++44kp6bcpPCiu4BFbIMo
-nLdIxhuI05j8lYkJK9/9QH5JNw6D9zC2ZLjyv4lnMGtkjp/wgiKABeMHcJ96VGGBaajV++vS+cgF
-1WatzIZdy+oNvEk0WFF1HMfw0mlbbzJU7K+RaBjlQVT1U0Jswqnn9/4dmYV9X8GJzTsfp+ZpFyry
-XKfVCVMVTlW0A3C1L0ODkc/sFzZ0wQlwelEfSo+MFf4wqUuKuVajoMSBj2zdB52ydghEVPZrKtuk
-aKRZt09u+U0P7LMFVNfMb88NwNBFGTNfv6ra0pmKUeNnTC9M9Va8jMDeT/EhR25IARJ9taaXooln
-nAtBvWQu84rGc4rvgibBr/u/E6y2LitS3bANJawa1m6m1ZzBYknnoSAjhQQsGgBqBqDIjQ67QWyD
-l93Ce5/ql5yE0S2ISZ1kFcuYFoaqyMfQa/XUvAYsFTtT1BFe0IclEaTuB4l5KPb7iSNsszhyVafU
-n8zp4J6HGNyWumLi+UaVCIVwASBSUCVzwHZRbxqJBgIU9xN9grXUGKkLof+I2y2i8emaPY9T2O/U
-K65Y4Mj6Ydetg7vb4v1/BoH93BACTtmcgDjO7Y660YDx4UCLJT9z0UXXfAGl2rbOjl6akOfVNXnf
-fW1Ruh131R9SqxscqwBZJClmwwOrylXHC3vYpYOYdNgq6zTZELjEVFM5bnqNpY/RsvjKkHyk9tDK
-8hkMvpDW3nXd3DyKZFPy/aq+Cv+8YjVLSnChzzgCpcNebpYthht3PzJBdc/f+dwlPXG5kjZWDE4D
-Osuz7IrhUJ+vl6JrBka7ScLcckQ+SC8DYan8wj2kUD8N3zn/0LGSqBswYbkmym0UBpPDCzet6C/Q
-jlt6rlow4Mu3Ck9aDJxvVDqewkdFOSOYwe+OaNqtzpfFf37gjX/6nbDFW6jGKMbJ3207eJjGl19S
-qkRRZHlO+A54+vmd91XDEBeHCOn9z8AW6oHrLlz/E7WY4cu+CmrS0eZj+3r6XFT1Gv3O3sDexUu5
-rVccO/C/JcT8IThzMqzR3rFPTLWgRxvJ6Uv1lK2r5zy49PDQwXbJft++3sKbPsFru5hb8B0CRSCV
-mS659NJ1ZO5F1Dqw4458ypEJTwEh9Ve86Om3BypGFILSAfvpQKc0NDzKssyJ3p/uQIqxaJ/vxkqp
-z2sWd5/jeTX7boXW7y2xEt861awdwj6vDIvGPtwNyK9K4W+E0ctut914butOP7pK8g8p+p5XeqFW
-THgXS5KryAe5Hw55w5Eicvizvnq94XtOq+aRsjHeCV/QgxI7W3YEzv45bQ/4C4Kj0Hg3qvHem493
-URZlUkv7L+JsvCfJ82Jia2PuGWgs0x7BwgdQZ77mFPq5TdUpb0OcuplqDiHO12VHNZihCseFRTkV
-9TZQ0wjLYbwOIHEX4yDQzpCoggwymXdsTSePLTSYjoIbblMl/lxUSaAp5sno7Zl+LchbsUcMegzy
-gwM3Gs8u2bjbPVVLeBeULkPSSthtHrEhaD9ApKRlqUXkexkV8WrLRkU+8rZK8y78Bnb/KKE5NbOu
-qmRONq2ve2ykwJyp2WhBzueG6RURNsYLGp8ejxIXAijbS4dfMvud/f3B41/asuM6n8yQ1s+822+I
-eT+RHezgdcAvSoWV1ZB6/cOYwY9UbY7Kz1u6B8uWVtKidSiTQjfjhMSmk5lEY1c56fHSJqQVoX70
-9OSI4ho8SLYkp8MpLACFh2MS9WwRaDj2jyBsPB0YZ+1Y0ob2vYkupgdAGV7hAgK7E7+Y/YCuJkOT
-7KYD1RInJSoXTs5pBWgihYnuQVXKeELhF7S3VCHmvlgV7QtxjMMVm5kHbrr8AhTzpAOyACeXiDh6
-5CPT//pp9HuBb/IbffPL8SuiLehKqWindJQTT0Z61uKHifl9ILVEP024ClckBDMxRPC1qHbrZEqc
-H00KrehdOU61DRLhypki6asXvkHo6cNITePnjopY4+raSs2/1VJBWMW3kjiDdT0+YKZDFQRs6w/W
-lfxjYZXFPaxeiVGTx0UdqNq2D4bxVviEX+qm1Lqs00POyCm6yQnEX13aQTjk+T0N0NjX7vjivr+m
-GfmYKN3Xq2SxRGaDTV8619UwAT4ZwRahe0vEIz3U0VHflERVAd/vwISerViq/vMx4vhK8Xb6rHl0
-N1bTRv7kH/SyvG77YrfONJguLjtGhEbgMk6ju3ewr0NToJdBvoGDy2UMPEFNsG4X0RtAWn7SAwdI
-Zb3CiK6fsZoY5qLmmTCofWss7vWe57Al+XMvthytfjEXxnlCNbwe/3NzBV/qWmEIgb6u/5rcbh+d
-96vGR4szRtfoH5PcZzaEMQ3L2dlse1nLF/5zNmdKqJhXW/cFX4idf4nPQ+ntf5VuV+guw1qLCYh7
-lvks1E3wsMQ7Ynx+U6jwZYByd9HH/bPJVqP9HlfntAhACKsy2EunCywR1NnSKgQlcWgkeRWj0QVK
-68dXy04ZgFvJOe7L2TyKLtt9LBZH8suRWzq4qWcSYepk3B33pmPDSoucZi3NxTpL32WjReiW6E3P
-ZqxzQgzav7NpJ6yIxOmgSLbRZF39bb48Q2LCdfyHXf6lkLKJYkCSeDskwr3QvJtUwOVhWZM69QQC
-lEOenThHV3S+lhICdiYCpnM4izlPDSggfXGoI2eKxi2ohPyS2g+URoCs4zMVzDismQEZR5Jtd/Rr
-dQk7IDBjeVYOYq/85FQdspcM6VxFVdFRD61pAyOyhUEzgDWop0t/wqL0PKmgj91FZjQR42tR2bqM
-fQHgTgXo10p1/ZOnQFG08kfxXxoLExvIG/S3grkkJnDDPfHUmkHEGp5FRxlMPPuXm9hzhpIlgGGv
-rCSbQ6Fts4thd5P5l5XcqCW23nLKau3S7XZ6Fndpc2bhpcUFmfQArutWaYsBiYtoKQLoZZoiNCkm
-0QyMrhOEoKrCLDzzh3EAnfLajuNrThcaqThH/Q/hseZKJ0FIr1JvwEwRRLBrtybclZ1ZKTlKYXLY
-NU8oIxLqg99gkn4WzN7n3vK/Qxmqk5Qr3xSH6Zj+AQJ7faFSrvxWVx7gD3+0s/euzuohXug8Qj3S
-jQSYK/GWr7wxzuPDpZ5uuhrMNUQeGtYYUFTkv/pOW385z1IqibddHdTClDnjaAs4ouE3J7L6RKTD
-BJhszjZSOtgmPRLycjmbgk6ZFOVPYhdPqb3GPD0frcX3CMIbiyHAqvgPQd9QdvLuRcAaRhYi96vQ
-6/lsBymqzThSkUvxMJYXHjMYZ2J+zT14+8wRGMeuv69zR30oXGnGfVbqSnNpBzMo7Lo5ANxfkjl9
-/FKWzg5ROBovV182TXBLhA0a5OLwC3NgV2eQf/jm4wRvnmQuZ27L1y0crEKq3zD55zvSEBZsATd9
-XEGxUcK4UCD4xaa3OYh8U/p1xfcPsmGdyeQxpSqP0Io8zMWG70UZl1zE1he92FqEIWLXTEJ3snRt
-5v3ok9vw7thnWpQdCpaDQoKNdx7cXzO2LLunqdd1bde8ty2y+fUTocoWYZRH3RAgk9VpjyJJSig6
-qtldkFTPrMLp39xeOBZk70LJgxdcsFSJ1pk7cZlfpFIwNr66bmnwF5rNn3oTpQv3FpFydNBznXLC
-hFyM4b64YdoqRn0UlSAqAM/ObmYMA3DrrRGAyzqmWih8C/FQwvOzjK+PyHROO7U7RtQtDpKMORHD
-cdbl2kPzmczcRabnHbfVt4jVJ9ktAXArnQKHlYgvywvXzwFtucvH5laE9/2EdI1LHUunIlRHSWUL
-4EUcUMA7vBQHh+sVQrAeM8k4nD0uSl81FxpOv4CvFujh0kXtu5SfFN5hqfgzbm+UFI5qJb1E8MJh
-FjQZEgtwyHjMKxoYBKZlcb/QTLOWIbp77xMLGyygwQ3hN2DlH/mB1zr0U/Sow7LtMQXZaZ5OjQD4
-/w0HnsdmV1qRIiMaqHj/421w/By82EpvLPcbJiXhtU91zWVv/2Kj0zRNZcqSis8pF++NNe0Oij9o
-spr45Jofc/CDgHStiVzKCAmblOXvkzfG9hxqVz8yVyT7LZNFXGMu91EESN2fWwtqSwmd+k4A6YZy
-tK2tRMEEJ9QFHkAuqQ4Eo1Xa+uSYCdrpTGnd8w0BtHf1ycOR9j8DbGAEMu0VHT8WiKMwKMYKjlMF
-HbBt6HAmW0oQYY0Z2+QGBHJTlnlHaq3R1SXfZauS+FV55YFURr4wVja80djBkM6LTlYX0cCTgMzS
-0d+ZpA+lm4nqwEXrZIIalwFFiUFMLocRReEOP3YadKmWpZ0+6Ky2PRDQOWOWdD6eig0jbz3jXNqy
-0umuODAEtQUynZ/N9S4ZDyxnivN8J9FYww3DcgBWBeaZ/O54OpqJbdovTAontw9HVmurMBHS2qZs
-CMd6BUdS4l6XtwGKJRzlxdHiG+Gb4lDMsAW2pYqCTUTv23Gbvp6daZz9oFv3RAyqGsPs+p6qgg1c
-H+jztxy/vhMOvhSiKfhxY1+3+os+wKxW/3XoAICQJfpfVnrHlmApCHcOpXGJdOIqULJ7DcHEdD1e
-CiXYgokGtDELGj7MTp148olhyUSMKQsQZcU3fdwIhrk3wYDCzXxNP//BkhTIAY3JoV6zjgipweBy
-hbf9qV/jyEOqkl7mw3KcKg3xVFmN6ABlT0ZjjEXmNRAF8OxQjfn8LaP/jFNBKildn3geXmNi20DR
-tXF9MO9VTNXa6w1uBfNHay41XmI3o8dN5/VATTXQHv4yk8Bco4HuujibQyXXKx5L8sLhl1yOuYIJ
-zKoReDGhx2ZkBhNaLPMdA9HikgTs/iaSAVkzhoa8M3o15l/j11NDMK+H1R7EIGeJh40oKfQE6Wet
-Uo0Dk2JkirapbnbRofEMQXBiuDHAZyDLWeQ4KLxRIQ9kvTc+uNklxMhPBOXFdQvBXnq0zjnUFP4V
-oFl/GPk+USU2jCp/+rvE7h+pV29T5d4K+PsxOCwyx0J9XpxrXC741Ch8l0L8NxBsUII+RVdBROTA
-iibcVOM0w77kcI1yU4eK+A0YdonzwtPnrMluoE33gGpx1pFmuuqJvPfWTsxi/+L8r8YaE6BiGF/w
-97X/XQQwVkDLwjOPfv+i//q38ivXkGv0OxSuWiVPVsGIX5ROvOjhid1nD4AY8Tzz5GeMip13ytds
-2M7GHQnvkF4b1mSN1zJwN5s9a7hgxUFfsXYXUYCGr4fbTh2/F6BOlG99EJk4BssqEjBSc59dDsog
-opRjpB6d1kH6b3XWnMa7+XhTj9PjxdifyXRcR8xnH/oQmtVYIsJdh2qqmecLRCTUd35GEyEpeeiK
-brnL2xuQzizeu7G0ufhiyCHE2BQuCsmL4eus2owCRZeL0hvrwK2NEYK92jpYgdoJjnbxyy1P50L7
-88cxiDfBgrImITS4Tmp+NRYFOXPVW/wI3W57RgjYHkhdvUE25n7/GFYvE3U9U/pZhz1QYvggJUxY
-URe0HxcbAzNSxrkiObp1vYqb51ojHDsGRtXSpoCwZVOcSBPMX2Ox/5tQgdtsmWNRz6reKmi/gvu2
-gE4qFK6pyRQ/qh7w3YSxdCNdhXn8U4YYyCuhaH0U2gO9lHYTDzHfhrYp9wlKjFZvv79+lPISz06P
-x9ApREzBonfHRjwBZjkcySH/g/3tKeP6x0ZB+mwACVdJJy7u2DsQb/CdQCoBGqEDOD4JlgoTSUNX
-9AnSu/+IaRTPiM5D1RT3Sl8+4p3LcRUVAQOFItq5HYulb7YtRGdkrGMyetTy5Xi7lPai7cJi+2PM
-l+h/UGTmUyJGEBWj+MIZWKFOjFgapw/C4jyeIK71n5VUQS+K85b2HaE80yH4WhQOTRfN6vWRJsEd
-F9jwRTJJXJa6X9lXCkODfv/lJvdUeiWSTEEuKOE2X7t5tAc5Un4v0c/KSegP8m2bKOjdShYNBAK4
-YvvZ6He0yj/VDrAlTkQetnwXLIZDKLc0p+o2mSmRZkge1P1EKp5yeek3+FXoPrGsootMuhKakEPE
-VyaWO7Uxvco6I7xP/SSbYgdcxVf+B+q8a7oLZiTMW0WnxX8Cz3ZBOwY0ZqQHgHGabmrTYO1gL8DR
-yqRRJ3d0lI3H2qAWrxBgqVAyDsk2c8d0kLyetfWlim5kNwCfYMklPKvhX2Pjz9Qu883Atrni0+Rg
-0SVqHD8+xUxYS+Y+13PBq2DIz3AruViKoPefwN95x1k7a80p7F4w0x2XOkgOWpKwZruD/cxwL0mY
-bdnPtBj065EHtbhbu6L7I7VXy0CazVAFazonQw931SuwPiUdzfaMZM7p77ZgywV+kuebtUybcM2L
-oGXuTqcKtaFld3iWrqD5jZysrsovS4/5zKQWOKTN4CxjwM5d5lUS29vNfJNJfSfilVbm/mFkGriI
-CJ3cKtgJhQYmGre9A0HU17E/mK5lGn6teMDdrNNJoiYy2db9J9aHypzAl1WP0gnQ5efmADbm9yZl
-6hS40UjFg5jWqNTHxy/+X3OMtp9rUfE846b8vowt8XJv9P8eRenFOnYONSyc1aPqG7lg+bZ+DkN+
-dd5qzsH3jiBSeOBiO10ZasbhU1VgqXsd8DrgxpiW9AYbKAZSbN6Cp3hRtXENAt9W3srKTVg/Pro2
-CCL4wVdOpgaiz2fHD9qlhYETIbT94Jz0smTnxIT0JXtfUeqEfUiDCK26P4kLHNm7HlScE7iz4JPP
-N+Cn1+RpS/ye/Nk5Myu6ZUH8pqOt4cuLZlXNFgAMqReJcfyNJxNhHaolSRpNYEzdbpSTrX3y+NTv
-j5t5wNelbAT8eHx3St6Zv7XPdbFGSmX8XvbL+W5LL5w/e6dTScC4FFtXi9SC6CXXF3W7nxBfYLHV
-Taqw0R+latZCDzcdoZ2U+jXnrnK0Er2YWAXQzhihsSzA2a+FuUCJBt7LSLhP6JXvvVbUSxA1f0Kk
-ecP/LQnoherwPQThHzpArpTVvy/7xOB4BvvKdrvSJK5HrIWBPzRaQMVvZ8U7Y02mjPewpYKWjgLy
-cIBZiAxiLB3+ynDwUj/vWo3MXqYi1Hbjxzw/am0KLILnROQ22a0u8V0ZOVw3owt8GGtE2YSuZOxC
-rl6pt5xDXJ0NicJtsoEGHrL3QZ1gZwmlDjuoDamOBBelVLdPB7I9BT8pSz5eN7Y37iOTKAAo/k1h
-XNgpSmrqysPzecV4TOSNjz/2DpEgTTGG2cX4XgAjNtgPdu2Rhx4sUreroIlI4oX85R3tQ7R5jLJU
-37PSnhS7udNtWzj+2OPi2FIpk35EwG4aXspnEWY4wXd9aMvt1/7ZBopRy4K2K5hKMhdv4qvCidQ3
-JRIgFsBBmnUcbi+QLLh275Cju07TdULUOwzM+sOHDQ4X4rhtcqXX9fF659uFBuMimeX/7oVAcBEN
-GhMtaaIH/SzpTQYj7pNb3o6GSHWuhC/UEj4ovkdSR/5zX0JdY/onDd3OdI5RJoSR5bARXCYC9DW4
-pZQC4cdS6YwRtjMgGHSeFOYCLFjnhU6dqy5w0vw4IpcXOF//VI7UQ9xEXj7lNVKyrgHJu6ocOzfd
-2M6v2x4fvm3Hd92QGmC6BC2Rb9kANaMxMp+qTp9ps4eInln6kbBkIUTxbexgoruOSiOJfqdc9m1Q
-7tzAKtvq5bkrp7K2cAa1wJQ8LlxHm0PTO2eUmHT6nP10y9VE8E6/WdUpUj11wycoWfG6gLZGNC25
-C4KRxCtHlswmxNPRWvB9rrpLkOMho5BJ5xZOJvXWI5tuoZtmb9xcHXESXV/TSBY3QXFlJV9+2Y0B
-eazyMEexYq3J4IQO6ji6TX+VRXdx0Sl59TQ/mh8qbyHuJSSd2vA1OtHDtvLrHk+IEy8JeuZfCfNr
-ByY03tTBU51FMvOBggzEDpreffmd8Lw9j7HeotnXRhPjdoXte5bew8NGo9dq08CG3h8jeiQc6Ky8
-vk3TGOan+B5K9W76z6xL+nxe6JXCVHokdw6jIPo/oUDZo7pnCAHAYxwnj6cmb+9lHmSLMoxXlwLf
-zSy8Sr/yWbCKjcBDCsnw01ygISetAly+QNt9YbwfJMsQwjpsNOF2r1CNNwMTBFEA1Datv44ie9tm
-mJv4ZUZz8jvWgMNyeap6DGsESp5X0S55owBtxruEgRD/u5woXBGXGzVmGpW5nBF3ecfv7D+aHKR8
-dHwoFDVLBNkLEFdmh/OdTRscGtSw6uWtRMzxA4TrDYAfX0Ub1jVPigBCNEehNK554biAgY5L6Ttr
-0zWg6gLmkok5AhcdpsnveMGwE6DcsNS22dDeiFbZS3kcwL8DBZXbGdNcKUTn7JxmFDz+3LDYpqHw
-MGBRvFGmFXbDaQGbARlQKBkkFjqjnS8VsPb2L67O061zcRBbyob61wqfZh8W6XwABjxgP3bt0kE7
-gpl+B1wRZ3ca/83mcZRqL6r+CINxOzrLmBMaBo9EmgwFiT1VSQswmz9j+zv02l1IgXwYTpTUSLPa
-pzEIvZ9vuMBxFHeIANCsAo+8QiFk2ZyVLzWOdT0TdpnXq3AH1gNQYhRBXZZYsaMPVbqIXz+0iiKs
-Z9sR4CMC4iTT78qQv5MSiosofZquRiEO42NWBhxNrxj1RB32NpNnn2glRqy9LWsRuxKb2ecLZEpK
-DS5NUdmaI3CMGfMmR/iLlugFf2l5KTQmvgWahJqgbtGv2x1wBxqtZXXMgsiHXF3SYJ24kJ4X6QHV
-tsn1dZpqhLYGTwAy5lffzsAHU69wa/gWuATVIGCLngpIC9Oh29OUBkeAsqgE7ztwPUX42od8yi0X
-yBpSc4nDb940I5cnHtxfKf/M6p3RZprIjhv8AmG2sGfXTpbePmTGo+UIcz64+hDgm1G82OF28QgH
-elTqnYGwynZcBtsBNEpsN5JIUZOExoe566Hfm41R+eXTFHiqtDi97wGKOJOOH5M8yZjqEcG6S9C8
-0TvjCf2K2Tx7i5MwXiQzBzLkjGFd+t6pX2cQE6Wv18+1rPtziVGIiFMR42zFQgQ0ZEu8ljc0aZGa
-H3hXAPMVBW/l9ORxmkWpPReL8Ycd7Y6tHud9KzDL3nymcWpxpQmixm+mnpWNWiWdsOP3Z2O+doWz
-TsZG7FqdzQ9jI25n5cGi5kOInZH6xN345fE9C2jzFe1dm1l0Mp1BEF5Whj7o9jE5X00ftQTNsoXi
-x9t7HYI4ZogyIBf37nIiwORmgFR6Z2Vf0H6P/t5owbMzPVHY2T6XZbGQx5XDsmbKhIlyUf2ah6J0
-OmzYR8arYkjaJDQi+4MLKNWfhuujOd2GtRLDyOQfwlDb50s23IRq9Ou6tmL6jqkjC+C4+R7KO/nx
-6HJzE17W4JSFuWM+/KtpPHnJAzjay+QKZmbwkG3JKZwhZ+rt5awgch2JZ0dFqWp+6tPq2uJxOQ2x
-SSYzl0Zti9j/l1NdwMmQ2KxCajyLMifcaIu2f2GqtfdSqGF8hrmN1b0dIo1Fd+M1S3GK2GoJMGAq
-U00P+nrjNKheY+a3EoeZmhdsN0uad7eOqlDso8SoOS1qU8zjZnbOkYjqx7+0qz+7iS5CxOe2KnfC
-We4WLBOQSWM7XJiVW70tNEVulgKaawOrpCSjlZZnjGjLaJw8b4AtghPIP/J5Q+frtl9LVUFnfxPg
-Vqk9JzjMdgQE6+OvKTa26a+w8S+kScRKhJqwF9G7a30P1D/sseIfPNwfGuN6ectrDmbLbL8/mlek
-nXoAUrS1wCrvCrC9DHfk5v6gr5/0gYeRT6QoYAu/NpsAJwoIVuycD19OV4l9GpGnaqlxO62IEqrz
-jI2bSIU2kU5YyMpvRc5Jf9qSNBmuMyJZO9wAseoZEy698/r+Dn0GAiuv6zGBSW6aOT5uLhl3wO37
-NJer7kkRZrsEMRLJ4c7osA3bXj7Nh54vdUn3TDwl9P6XWIuBk+N95wVEiaw2uuskylCJt9gGs2CT
-XU2+XPfCIUF08rCGIdkQtkU/0AqbHfZQcZm/mR/RltSd5RRdClI8uQFxowZ2wFAZAdb3OtUT/VQm
-oUdlpjFThpNIzCJiXGrSUz8yRi3nNbIXCabO6EUd9m71m7xRH2CL1hsPJFDQsOB2cUF+Lo1PuEyU
-u/Q+M81yT3RXHR0WJU19f9k4HLe1cNqeV2qdyg3FRCSezaBQtFD3HPsak2cuJR1Ld0z3QGlKrHVy
-FAH8dDPGU31pYQcE/uP61VBf+R/ua/aL3kgnmI2YCaboXONFZeMtK9rfcRdTy2BgrH3HGMyQgf2I
-e7hzFX95TrPGo9x5MdLqX/E9p9mCI4V0nNugIu2fGvOgQcdr1rt5I54mpHbuqwzR4aTvaD9KXNYs
-CAS2oLAUmUjFgYDgFAg17/sfCpgi1KXNoTytLVWqMdZ0QMPlN/gypjcAphs98lkCUcejvrAZ7byn
-Q2uHJJOzN1QeiNhFqSqvwwOmEjf4qv0uMpD7omSZwS/RCys9HhG4oNeVTAAXLg/6aq63JAHfHsSM
-yfke6rg/lOj6Y9wC9n79Z4SNg4XTzb86JoCzv22zOsz1RQQbe9VjabhKJdxiDWNmAaXYmy6AaoH+
-3FoBcoJ+26gaopOH2UgUnETdvk4hrVrTZPEJyxqdZ0716L97oaOGHnhoXpUSpYwxEPGdCZOfz/iZ
-YuCQIUveR1ZTvNnShm+60YuzhrmMpdL3VxZORm6rNU+vqB/rjP1QKgzS7AgwCLAIYCKAHLOHrfc3
-e48uQkiraUiW9y1FRloiKw/NRtKU3RIOMhJT7Uc6pIw5X7640Wd3RPUI1nPD2XLxYg/piehVuBN0
-H7K+SEwe4i+x7BQNms7rcCUc50n7SC/KSTZxJY6edqSaVQqmVjbs7m3JVj4Px6A3IH8WPULZ3Yg1
-FftDWlGORtYWB6KWyGAoAliQCf8ICoIE9X/Lyr22dM6Bnuu2LuK3b/TToJez980E7H8YTf0avCTD
-wBc/0WaikQbc2lTCu+2S8pSs9mLaZ1VfNROd+g91pMra12NGfjCfNSZmLSvp3vnMpZ0TgoVHlqK8
-oWqDtQs/axVHb3pK/SIaur/+OV16E4CmbRd5K2oA8aa2X4VDbN8Jb8WEeK7KLPf9SnsgN/OqRPH3
-FpUnuBkYTP5IgL8eNxiWPJ8VKJLhEsDeiGdpApcavjE1bmiGFZ8+sO6jyhiv/bpPvsJRAUcyFUdh
-Sp2rgD0SJKGvDET4VgzEiHb19FYws460dXZTesjJQidJGmntFos9vBv7IK/4iUdqrl0nzJ5Tp5in
-i+0l7aKuvzMbKQKdamWYsR49HY6KSZVa+TtsLYj9nv/L7RJ6To786uAi4B9lYH/ABVi05+ygbhFR
-Q3yowaOwV8RE5GLbEBj+9YYiIpqIVgIcUWzV4DaC4U9hhdkMU94c7Ou8p/w4YAtKDATNR9NAkaCS
-A2TavTV3P3EvwwMqXhnZ+K3e31FUWFpPo2FFdpeYutWPyMRVem/zpyMD5ViMKbZaJ8DCF0GAtubh
-pItu/qYCRsigT2crVMHVhIYOAwBHc65nS3QpFY4Bkg4O+49tWuUXx+y0G//MHOBH2SARThdUqFQz
-DJOgi2+hAI1vGnSElS9vJshYP4ZaEM+enh72+1xvo6gJ/QIMaunzOnHreWa2F72zoc2W7yTTirEl
-ao1TsDnsoQezItBFuWYBw+dcsboq6/3diaUok4bNtkWYSmkuQmmko1fXMj5thN7uKC6BJxURB/84
-M2FdDC6j8Ev4OIQ7vUqef7KuajrlA/GN3gqPdDt154OTb0plEfAbpH80VUtq9AqwmibnRsXTPgb8
-dUpmX4iVODWUiHSAgI1cgjNVmtknuOxBnD+HA5di2pvKjdg0n7cubJwZRc/iFvujUA8yzFYeP0oN
-0NWpWC2ZZzXmyNKSaQDmBhLoGhrih6umRhNIYfmxXLsr+K/N5hSkZE++DzsMwTPzUbW6iR5B78gX
-vEt5N1xDYyA3ndCo0tmAX8WHhDTD3epepBpriX1pxPjAvkaY1jt5i9MqOvvgiDTOi94kDOLy69HI
-gVbMN8kO3wShzBkQpeLdYVq01bW3YcseUucQ7/NDzIN9DgfXcEv/ZOULWeaLzsxPC36pDfSmrHy/
-tiWxz4Tjljv3XeAa7MUPZYUKag2Vjl2m/WKPKgwDsQeX/cAo83HO/sBUMWwLO+Ka1+5p6Mie84YV
-kUTB1axJo1wCzvLnbQ0iN0OjpbBC7rDO3ZKQL6onTBrlS7rMEMZrYXj1WkFyiRNKKif3/1fQPR8U
-PGFa7AVSWtw9jKynEjLd7L4y/o0V+PToyeJI6AyTQyj4eWTkOF23JeNV8RL5Q0XqH/vREFJIdh7W
-4/PzV6KqHDiKUkN94FvYecl38VDyo5VFFzELX4z09l+yxH2Ba4v5OZvMWvrgJfX3doLFRgDr2as+
-PBIvUAqmNunFZXFNJm+WtKMaIvrpOhrJv/DVLIg6d0YUW+PuWfLtzpu0fucfyl752HJnmjoAtZFX
-2scGw0Jl5PdKM5dOwh+7UM9s/PRDPymIqXc0Zrbd3WyRqzbbQmt+B7Jxn6W2kYcTusbbi9WsUq4f
-Le2YC6ySQ7eSRUFithGQ/Y0dKXasuPRQPMj0FHMZnHnwbDVlxNvyn2Q90U5LGEIoY/UfmFUOXFRa
-GskFlLTnwDqo7eA0hVADsmjvxk08KNlmlOz3i0JWMVJUSrCSyEkuXM57YWivU15Hu818Dy5bF0VP
-ULNmKdZud+tg+rypshU2IuPLuDeED0kHgpdqUpu4jGoPOdmQdTuKKZBF52h3jb7W2PZc3wCAXbQb
-oP8+VQPirbMGPnaUCLaJ+hOyxrA6XByWb3Tizp2EyBike2KrQKXcXS4nN2KfwnhNoTGyg/tKiRb5
-jTxj81xAvin0CvN8rl2HcT3rGEbIOYSXeUqrA4+L/ntfu/Xb/Nfy/vGV5AVxZJpkr9w27ddTzzSb
-3gFnlLKrmGL+0M3Le0preIjAe9K4TzbLbykuLmSfiWe59+to4j+V8RjWkEu+yrURvdQk/Ffp4ccH
-vsxRHcT6gupGziMI0fn8XHPVPLsul3M4dM0XEImbnwxt37zsR6WgorF7UNQHapsYrdKKcLwLAbX5
-G00rpb+pd0JaWZP/tTYxljkM9LJ0tQYQ/39qX/XKhrrelEFMZ1Rhe+j/sxdBDQylxymheSkMmu27
-M9OYsgxna3aIfThCq3Dnq8CAFcyxT6ubMs4hTnmLngmhmWN4RQINPtGR2tJMelg8MMXDLaUCJ3N7
-cfzxNEPLN77IzDQB3Q9RzUDe15+LHNyTLj0gt/PDUV3pHSnyslq28DwsJ76A5XxIcjg57he94jpz
-oFKlAMRN016U+69SGyX6OVtF+sOfHz0nIzrrpwL/EdtTttcnK2U97WrU9UdpD0a2y+xZHhjz8o9T
-ePGLXCXFw6l/84XoxDpbR0KGuOinyQvwSUCSO0lI5z2+01txQac8b+w/UL6rqwfLT/YG2Xwa/LsI
-PHOLIC0xT88le4v87vSFFUwfSwB0GKzmn80rMWC1Dfaz3XU96TRRAQHtoARKBcWEHjcckH2Q+ucx
-S+k7X58M17WHs43ZzPL37L/IR2/S+ekT5KUNNSLZRb5aLflZkmFPpMJbL7nrqduIroD9E9X+evkz
-Bjk+IG2M1bLCZN6405mnuq7GldEBpANf5OttGx3ro8SuOwmoqCXNHihxMY/ntYJ7cSthkvVRNKrj
-Ht8F3SQtlj5MH9/4pTMii4Iz1AwEiBv1HyPx15G/gGiHIfOYqFfOgCxN8adfG+eyJNW4jMjKEbaX
-ZXkTL2FKnA6Mpz7cCvDXJkYAA/TNAS2wJqiynqK/4iHNA0PAIkN+4yzing/zV8mipeFXB/vrcZ0g
-6FJWaHfwHJve8DLuVEOBZeaa+4NR+vCPWv4Qtz9+OuB+MKTvWzDjBHEWEeVXAxsX1CQUBZiHlhfB
-APzyJ+KtIjFkTUp9HvKihmMWILb2zJRYTVZHm6k3a81/M+A3TLLwx5XH57q8EgLvb+81Rg4Ym1cD
-mdIB/8XBOf8Zbj9+j3QKTZTVMjHCfe5Vp+Bd5DwS0N6tI/PmuqzjMVPP5ExvW1lKRr8gXtJZfSLU
-0U0oqL59C6HtegwCUA5nhogmu03hXIImpJEY4Kb8/Q9TNXdJ3u557uUBQSSrclBk1k4RgAsA0Nm4
-BtKwNWZ0ewHs9Ze1I0QLURspKwcwW00es0850ZSVU1gvLfFn2BpQdMWvzPNIan6+iRUock9jp9kn
-GH0oEfgM9SXItV7931zMECUP5sSmTy+fuKTSdOtZ2VZh5pm2h+yfYoHLLC3Td6s1O4zbc78qg6/c
-+lvUfyKF8RVY6a+9RPrMjZnrunUNp6i9zqr12TyA9ZhZGhVxlZW4qmjsO7aZvobYoRrcYS3AkNVd
-IqHnF0qmkPTAWUpCyHkWXwEoutIH1hYauNf8nJa22t1Nq7WiPJXcXGZwI6D1aQDK8VWkLZA+Ch6C
-6kmWN2zq3w+OwbNFx+GB+pP9aBU8qGpt/Ctk9blEizFGO8Ne9bnRZptD/YvC2mB5xdDeJbdwwST5
-GJainWihN3cvGb9mnHKUuOyBEdySc2y2rGfUWFCm3aoQYo7jrLFzXD4v+kwITiiXPNkPoRKRnYGl
-Qpc00Devn2IZTO7I23WJH8t9w/oGPPoiiohjmtNGw6GGiFm/OmV3QycV1k9FcktGcuAnjSUgDgOw
-kWpjBDgGKaTx4AZpD3KMcsPuElYphyiGiG3hVG7GdYNrGVVF4nW73/ViANZkiQqckqj3bFAgC37O
-P7s0o42rsV2n0g40ntETbA8jmgK5/+CcMhtmRKMwruygzlyWZvj65B3sZBb6PjLh2nSrZYDURXzl
-140TrcUvnj+8aJqh4bgVUC4tS72lGh3SahZRtWDwlm6tusXRE87OXP1GAVGFoF/FZC0e2AicDdKC
-GRZxLV0mL4QflbQwnbr0n7aU2TxlOzjvEP6KBEhIo5HLoszGxWoGxJ+bztRgv4ZLjnyATjbHEcyG
-6M+Fi9Ji54mO52gdw05ctWvDkruJokLrRVWJI87TVPchZT96TxQyK5QbQCC0zfRYAXYjTUZJaCHR
-wPo6rLKZBLUin0dpNFdpx6dHspukpypnSsuXjdG+o/45A9GneCgFztq4zpFAaXGsJ/4rTjZbQawF
-6FK0Z8ZmFp5TW5g89rUHGpSB30rqifCAOgurMX7zI+Cnxf9ZGr5hGbjm8cAs7EYETvnI3m46AcV0
-r5NqwRITtPPA8bpBA2ELZaNl2D/mbyBXIbiBTIeW2ZwZuR55biHVKQZjcgtqzJ8UKUPfY2OUk334
-niF9Jg5lEEAQCfTFchL+dl6UW3poUCh1eGE3AjfdSaS6tfLNA0pVSMIxvmcwfJAPUHYfTpyksYgs
-p5aSuAfujWFvn2/uieY48CstwcssHlixcH1XrOoOUiW3TyVVCYi9Lm9hpPZbOktr7XfUoylZVrmx
-Vs7Io7/WqVPnHKZYd6b1SfUfCWzFdGLlHk4fZVRD7oj5Rt6agP81K4qdReC1211B+oAAKAp6pzKE
-qxmO25ZX95LHgVELbgwbKzG2wRg7765Y7ssT4ZR0ceWbGmjU2mQru5uEMSArIjJY6fYZS9qUwAan
-EdsLZKBti3oML08tWFlJMi+DVGZZlD9lcaYdTnhfLZrjnDmLe11ELj2Us1bfNWdXLyTyWc12TUfh
-a3fEkfiSSMDXmbT/WZNcdjInkwKxH72zM6f9KMWl1eSrcZGphePUnC/uLPDWGt/TSz+7f1Jm9wrc
-mfvVMPzUbneRVPlGEj6b8Q9WEV73EzfDK8n5psztOvhdu72dvwpHV5mu7VkUKjXImW7WPv1fvUto
-yJWrmhryuA3CArE9nX94FsWAoLPHYxR0eNpttCNJsRAe2xj/d64JcvtYowLqQqQNw2jb407v1c1i
-HuvIJfen4Y7VkE7BCGwdv/gUITzIqOs8iSpMuZwjNbXJpC791WzT1sJUNeVia8If6K8QwgSvKqxW
-nMfq/dQO8whjVVJLywMaEfcjud1oiQWNEE14tCNuxeDXR7gOV07lxceZWUuErv7BKOqWZlu4mvV6
-Cb5rQcZ14Tnip6BdiHj9VCBmuOTfNBPLO/FOOYzavackPr/W1kRDTd9vYBABObVjt84KFMIRSWco
-LQKOA1cmDMBCwD4YqWKnZFans+ZrAFEw75GxUkZQd+kVImaGRpNrB1Qs1/yAtu30KWe3749dIlmk
-g5kWtEzf7e78DqVkOVLVKRR1yfn+YwE5rJnIJrokjevrZAn2P9fzWlMqMjVJ+m62h946h+/F9lzM
-EGxwZYwrgXsBJPD0ygfQ5szoL3x+cmjA0UMjzLk6KDzbdU5Vb3M56CYpkdA4mxQfERsLinPmCsp8
-S8J04dcRqR7I+DgoPnwHC9E/pembi79Zsep5mdityn97Ho5fPMTbNy8T+i/wGObqBI1+Hqhxg+8e
-E9kJEPbj6MeiKtfqX4NpTEJ8jBGD6iNCUe+uR0/GQK8BQwDA62GGsQ59Q8/gKWK1yZGwH0O+PriE
-NMydIKi90Tln8+3qUCVftahrEISdWn/Lrp+EPpo+qZyEV6DdvwvxDkKIWlZ/0EbP/PPlMCWlBIgx
-VSlLbgopd7szi9RLnfT4sVcJ+pHcK1Q/wsdcyhpCLjS8F07WkJ+MVAf5Wz8JG0t1auQEsgFWUq9E
-DR2lwV7MO5NiGa/0wQj7UZpnvr8kXHWVJO9/EfyiHYxle5iF7lloVZuNonIZkw3E4EqzWSxw2Gz+
-LNB10LfS7id6kRGhpwQmY1uhAo9lyXiMtiKDBTa6bwEL9t66lWK/1oOzFvqP+H9JUxChi9eWhm0c
-lPL2VZAkJh2TdqtQfH4pxECru8eSERwQfdu8ohi6QINJOWe1Tt6C9Q9VNm8dHbyhlvh8TnZvzvJK
-QwHLPudvDIQ5STBtFQj90Gi4HSQu1j3q1iSyLreOJahvFpDSZPtibhszRXe3/t2fspz8UMRKH+hA
-4d6Iwj3xX8TXFHhYqAHGn8UmPGBbAtSruATAl21qKOE6vHiXogMXgbCExAbvYiPiJGkNhghFdTTi
-d0ExMAqOLhp8EfpHwSUZLp5QFJhAprPxms5o37S2tZxxCr2ESqRk+KyQNwXZCh5b7VjfdK3dmtlW
-NvfH26rKlKHJE+bw32qsWE7YLNuNVeP20yCVfKna5BnDmuc9XOcn1BEexXq2yGlS0ix4mVzc/ztH
-QEbT2mVf3IyzMHUTeF1bPV1kMKpWCEaBDVqk3Rc6kTmcq26R/DveOyOs0KBzc0zjlVcdFBbKJbDp
-gh/k5+Pvz7REtDSfpeuUxxttd0BGwivnhUAGOpj7Wd201zOIQ1fH2kAeCc9eMW8EHM5SRShS79za
-lpkWFj7o9UcNAoR6uRph/cY3W9McsHgRkt9JsHdvN5bmaxtofr+uh0a0vVN86e9QE0GT8i1qdx9E
-Ts43S0tcU6FU5Dm0kDHvaZRvakxwrdxBWaZIvXd4vDRBCjEunKGGjBbcDY0vrZ5xrysjh33IFyrH
-gOdVVKJXUVKTdu5dRVatUcqJY0jpQ86DE/QtOnmu41QHGEo0o/xs+tK+XK7QggNe4hfbYVfqoE8S
-DBtrTLXpSYyXkDG15ac+8yzFzbyJMVrySsOFxtKnENcCtN0cSXs/xX+YuMv8YHDOQ7NnSoB5buXA
-yt4vHeRZWvecTvA0Be/XI8PCBznht+L5zMRQN6eO2ADjqctjofKceBILkDWKSGVUFqQ7W1sR5DTa
-KXSFmvIATx2u/dHQXAFRfqk8/VWqYYWQiWTGRdqVgpYXcyfhR+moyEbhBX1O7U+YBZK9rJZVrd9l
-tuN4Vc1dtec4A9kvGfvbpL/4bMiFOf4kTdyqxuhrKBpRDbI4MS218/+rktyohHvJx/WIjxDfM0KM
-Zx05LMCPQRJ9ekwh54beJPBOLxN0yZk4V5JaZ0z0le5SXV61NDDA8XIyqNTCGyW+F6wB2AIJNySi
-TKv4xm8qqPsorSaSZaQ/Q8WDARds7UvIK82uRQZoaK69QUMPWV7SizSGP+1zAq3fGpIP+H7m38XV
-JixlZIOMDEO/kmZ8RPErVGB5AnRIuuMHJDvSukihWhLezNtaCMfmKANV6stvi5GpuScxBLr4GsN6
-OKy+CEUzBPVpNzyYs/35YblAqdtpLrZLxu97J7i0M9F/59y7Tp0S5RxEF+kcuTIikZxX2k/vt9j7
-K4rI+e/tEItss67oAvD9oa1qOnfVt9ZdE0nDo6VYEfhDRDmC8AavW8fBXXXsG1bvHDll1BRjlCTs
-KQkI0RHtm+mJskLrI7oPlm9ccN9clsz8+0on8IhhOiTZjovRWfECMbQ5ObUgDZE4ML4BxpYp5mb0
-JJOstKKubArOBoDMFxVdERcUIQpmFM+YQcyV8TkahwldxR7osznoIGmCPj3fTkffsnSaUPTa9wGq
-HE0c/jVB1kYjiJys73qMzv2SQPpBQ9CX5ZPS+DQoFthAR9Gztu6+PFPVL3SqcfFUVRwkY4gTm2wt
-Z45VdzBW0L7O7fJw5BM5I4RaIzCyMIgx0Us3KFw3TWdV5954tm6j2XOEF1ozNUUSf1ADn86aghR1
-wq+HWvBObUaM1OgQzCTT7HQXCoh0rlJXtSgetXWO30gafESrywfM/t903AEMGLprtFg8pRj6UNGW
-tjhKZ33bqr3QOnWpaiSRcBKW9tkOEAKshSJ3FmKmjV76pXu+LHFevW4ZhrDT0Ndg2aLw6y1UamAV
-dwbT0cvr/8Kn3aBElyBnx91UNMzn9hG0GqIKbZkI3MkC0wTQgXTshPMhcbENQvrS9pQXy2swbqyM
-Vx8lLlRpAtxhjruQ7gkT2ndOSjPpeAyHWQN+9VkHXEdErjCrvxfKP/nlpDzI4w6a1ZWPpAq2Ge1M
-VOUNfTftoEd1CBBPYMIoNoFHMa5RT/KjpKXtFs20DbduBGYL/6GZpwadvu46M0KL44bIbqbn6Y72
-MoYh4dxhxD5uGyc/rLGTWAoZvITqJYY2OS36sLqu8ICy+Rfd8/yyT00Idif7seANx5bzEYUzFHzk
-vBIQhpCzLMaHHFe/gN4DDijvbScVvHHp3IcXzBFS8vOh9hDDnvWSEumXyRrem+4CAetqiWr3EB9J
-n4SXYqhovDmCVLr2mR/SOXbgmkFkdoFNG16l5Aivz9Bo16m9ZmqlkbFpWl0l+9orVIjr1ctyM35t
-eUphuMoP6Oq8EDCJJen5GgHczRW70oMFazDHAoBEU/MA6Lb+TLUhmqecdz9PtDERLvZxTwfI98hb
-u8xjrh5PbpCFToeKH5qmYZzKo/NSOJrEJ8ehskF9O7kGfimvFU9nK7wyMuAO4HIGJoIpvMjgGLcm
-DErX8nPMvUWBajXul+B6oOvw0YMKIiAT6riuychNdqT08SzHKotSJdcfELbu6/P3GUGVjDfZc2Gv
-0wY66rwSQGy+VqLRmwUuIjhTKz5u4VdOUNcwU6cJqPZhU72I6QSWHAZucKxn8hun1Wk2xMKHw19Y
-MJDQQPHhcb5oHPzoVIrVkZWcvSjDWq614wrrzD9RFX9Fd5DuCuB0o0Rl17jtGeXixa7S+w0vAdib
-JOgzvuY24EJeh5+aq25KsJF8Lq/t8y1dPJoGATWEHtkxS20dEmqFh+GbXmpa3eOiqITTcwBtuMPU
-BOpyfzmwrBUtET13hFhekBbhRXGcPRgxuMKThqXz7xre9iwII1EymdmCWDira2bBhDjSGXPxBCNM
-jbrlyY0BNmSLDKSOzmNt2IeSkQAbg1asonntHecDF14xieGxc0LZ5EWQ3OJ6giJLu/3+ew5aj/xK
-zsPTfFOolCax3k5I5XnQi+SuWdM/B9I/OwR3pH/pGIRwMnLgrheG+UPg+FWg6qYTLMYAdQbwmlp9
-2tfYnPy6ScKSLwAPKVmuXAfszsHt3uy7SiBIqvMUPPwa1Z5rZd1gwRYJjcyCU6m3vObqSGN2ms7I
-7obM8RKnEGEYUeDV3zT5oSZ1ThYWILDRAiFTZY+aPdExIXmEzyygr2Rj0cR03reFgCxWC1vnNiB9
-BOerxwDnop98y22I0NYyLZ8TsRdGcHgy5LAsXGLBnyWP4AbK/AYcBjc=
-`pragma protect end_protected
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v
deleted file mode 100755
index 9c42c12..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v
+++ /dev/null
@@ -1,80 +0,0 @@
-`timescale 1ns / 1ps
-/*
--------------------------------------------------------------------------------
--- $Id: util_vector_logic.v 2.0 2017/01/01
--------------------------------------------------------------------------------
---
--- ***************************************************************************
--- ** Copyright(C) 2017 by Xilinx, Inc. All rights reserved. **
--- ** **
--- ** This text contains proprietary, confidential **
--- ** information of Xilinx, Inc. , is distributed by **
--- ** under license from Xilinx, Inc., and may be used, **
--- ** copied and/or disclosed only pursuant to the terms **
--- ** of a valid license agreement with Xilinx, Inc. **
--- ** **
--- ** Unmodified source code is guaranteed to place and route, **
--- ** function and run at speed according to the datasheet **
--- ** specification. Source code is provided "as-is", with no **
--- ** obligation on the part of Xilinx to provide support. **
--- ** **
--- ** Xilinx Hotline support of source code IP shall only include **
--- ** standard level Xilinx Hotline support, and will only address **
--- ** issues and questions related to the standard released Netlist **
--- ** version of the core (and thus indirectly, the original core source). **
--- ** **
--- ** The Xilinx Support Hotline does not have access to source **
--- ** code and therefore cannot answer specific questions related **
--- ** to source HDL. The Xilinx Support Hotline will only be able **
--- ** to confirm the problem in the Netlist version of the core. **
--- ** **
--- ** This copyright and support notice must be retained as part **
--- ** of this text at all times. **
--- ***************************************************************************
---
--------------------------------------------------------------------------------
--- Filename: util_vector_logic.v
---
--- Description:
---
--- Verilog-Standard:
--------------------------------------------------------------------------------
-*/
-
-
-module util_vector_logic_v2_0_1_util_vector_logic ( Op1, Op2, Res);
-
-parameter C_OPERATION = "and";
-parameter integer C_SIZE = 8;
-
-input [C_SIZE - 1:0] Op1;
-input [C_SIZE - 1:0] Op2;
-output [C_SIZE - 1:0] Res;
-
-//wire [C_SIZE - 1:0] Res;
-//parameter C_Oper = C_OPERATION;
-
-generate if (C_OPERATION == "and") begin: GEN_AND_OP
- assign Res = Op1 & Op2;
-end
-endgenerate
-
-generate if (C_OPERATION == "or") begin: GEN_OR_OP
- assign Res = Op1 | Op2;
-end
-endgenerate
-
-generate if (C_OPERATION == "xor") begin: GEN_XOR_OP
- assign Res = Op1 ^ Op2;
-end
-endgenerate
-
-generate if (C_OPERATION == "not") begin: GEN_NOT_OP
- assign Res = ~Op1;
-end
-endgenerate
-
-endmodule // module util_vector_logic
-
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_apis.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_apis.v
deleted file mode 100755
index 6cc9738..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_apis.v
+++ /dev/null
@@ -1,842 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_apis.v
- *
- * Date : 2012-11
- *
- * Description : Set of Zynq VIP APIs that are used for writing tests.
- *
- *****************************************************************************/
-
- /* API for setting the STOP_ON_ERROR*/
- task automatic set_stop_on_error;
- input LEVEL;
- begin
- $display("[%0d] : %0s : Setting Stop On Error as %0b",$time, DISP_INFO, LEVEL);
- STOP_ON_ERROR = LEVEL;
-// M_AXI_GP0.master.set_stop_on_error(LEVEL);
-// M_AXI_GP1.master.set_stop_on_error(LEVEL);
-// S_AXI_GP0.slave.set_stop_on_error(LEVEL);
-// S_AXI_GP1.slave.set_stop_on_error(LEVEL);
-// S_AXI_HP0.slave.set_stop_on_error(LEVEL);
-// S_AXI_HP1.slave.set_stop_on_error(LEVEL);
-// S_AXI_HP2.slave.set_stop_on_error(LEVEL);
-// S_AXI_HP3.slave.set_stop_on_error(LEVEL);
-// S_AXI_ACP.slave.set_stop_on_error(LEVEL);
- M_AXI_GP0.STOP_ON_ERROR = LEVEL;
- M_AXI_GP1.STOP_ON_ERROR = LEVEL;
- S_AXI_GP0.STOP_ON_ERROR = LEVEL;
- S_AXI_GP1.STOP_ON_ERROR = LEVEL;
- S_AXI_HP0.STOP_ON_ERROR = LEVEL;
- S_AXI_HP1.STOP_ON_ERROR = LEVEL;
- S_AXI_HP2.STOP_ON_ERROR = LEVEL;
- S_AXI_HP3.STOP_ON_ERROR = LEVEL;
- S_AXI_ACP.STOP_ON_ERROR = LEVEL;
-
- end
- endtask
-
- /* API for setting the verbosity for channel level info*/
- task automatic set_channel_level_info;
- input [1023:0] name;
- input LEVEL;
- begin
- $display("[%0d] : [%0s] : %0s Port/s : Setting Channel Level Info as %0b",$time, DISP_INFO, name , LEVEL);
- case(name)
-// "M_AXI_GP0" : M_AXI_GP0.master.set_channel_level_info(LEVEL);
-// "M_AXI_GP1" : M_AXI_GP1.master.set_channel_level_info(LEVEL);
-// "S_AXI_GP0" : S_AXI_GP0.slave.set_channel_level_info(LEVEL);
-// "S_AXI_GP1" : S_AXI_GP1.slave.set_channel_level_info(LEVEL);
-// "S_AXI_HP0" : S_AXI_HP0.slave.set_channel_level_info(LEVEL);
-// "S_AXI_HP1" : S_AXI_HP1.slave.set_channel_level_info(LEVEL);
-// "S_AXI_HP2" : S_AXI_HP2.slave.set_channel_level_info(LEVEL);
-// "S_AXI_HP3" : S_AXI_HP3.slave.set_channel_level_info(LEVEL);
-// "S_AXI_ACP" : S_AXI_ACP.slave.set_channel_level_info(LEVEL);
- "ALL" : begin
-// M_AXI_GP0.master.set_channel_level_info(LEVEL);
-// M_AXI_GP1.master.set_channel_level_info(LEVEL);
-// S_AXI_GP0.slave.set_channel_level_info(LEVEL);
-// S_AXI_GP1.slave.set_channel_level_info(LEVEL);
-// S_AXI_HP0.slave.set_channel_level_info(LEVEL);
-// S_AXI_HP1.slave.set_channel_level_info(LEVEL);
-// S_AXI_HP2.slave.set_channel_level_info(LEVEL);
-// S_AXI_HP3.slave.set_channel_level_info(LEVEL);
-// S_AXI_ACP.slave.set_channel_level_info(LEVEL);
- end
- default : $display("[%0d] : %0s : Invalid Port name (%0s)",$time, DISP_ERR, name);
- endcase
- end
- endtask
-
- /* API for setting the verbosity for function level info*/
- task automatic set_function_level_info;
- input [1023:0] name;
- input LEVEL;
- begin
- $display("[%0d] : [%0s] : %0s Port/s : Setting Function Level Info as %0b",$time, DISP_INFO, name , LEVEL);
- case(name)
-// "M_AXI_GP0" : M_AXI_GP0.master.set_function_level_info(LEVEL);
-// "M_AXI_GP1" : M_AXI_GP1.master.set_function_level_info(LEVEL);
-// "S_AXI_GP0" : S_AXI_GP0.slave.set_function_level_info(LEVEL);
-// "S_AXI_GP1" : S_AXI_GP1.slave.set_function_level_info(LEVEL);
-// "S_AXI_HP0" : S_AXI_HP0.slave.set_function_level_info(LEVEL);
-// "S_AXI_HP1" : S_AXI_HP1.slave.set_function_level_info(LEVEL);
-// "S_AXI_HP2" : S_AXI_HP2.slave.set_function_level_info(LEVEL);
-// "S_AXI_HP3" : S_AXI_HP3.slave.set_function_level_info(LEVEL);
-// "S_AXI_ACP" : S_AXI_ACP.slave.set_function_level_info(LEVEL);
- "ALL" : begin
-// M_AXI_GP0.master.set_function_level_info(LEVEL);
-// M_AXI_GP1.master.set_function_level_info(LEVEL);
-// S_AXI_GP0.slave.set_function_level_info(LEVEL);
-// S_AXI_GP1.slave.set_function_level_info(LEVEL);
-// S_AXI_HP0.slave.set_function_level_info(LEVEL);
-// S_AXI_HP1.slave.set_function_level_info(LEVEL);
-// S_AXI_HP2.slave.set_function_level_info(LEVEL);
-// S_AXI_HP3.slave.set_function_level_info(LEVEL);
-// S_AXI_ACP.slave.set_function_level_info(LEVEL);
- end
- default : $display("[%0d] : %0s : Invalid Port name (%0s)",$time, DISP_ERR, name);
- endcase
- end
- endtask
-
- /* API for setting the Message verbosity */
- task automatic set_debug_level_info;
- input LEVEL;
- begin
- $display("[%0d] : %0s : Setting Debug Level Info as %0b",$time, DISP_INFO, LEVEL);
- DEBUG_INFO = LEVEL;
- M_AXI_GP0.DEBUG_INFO = LEVEL;
- M_AXI_GP1.DEBUG_INFO = LEVEL;
- S_AXI_GP0.DEBUG_INFO = LEVEL;
- S_AXI_GP1.DEBUG_INFO = LEVEL;
- S_AXI_HP0.DEBUG_INFO = LEVEL;
- S_AXI_HP1.DEBUG_INFO = LEVEL;
- S_AXI_HP2.DEBUG_INFO = LEVEL;
- S_AXI_HP3.DEBUG_INFO = LEVEL;
- S_AXI_ACP.DEBUG_INFO = LEVEL;
- end
- endtask
-
- /* API for setting ARQos Values */
- task automatic set_arqos;
- input [1023:0] name;
- input [axi_qos_width-1:0] value;
- begin
- $display("[%0d] : [%0s] : %0s Port/s : Setting AWQOS as %0b",$time, DISP_INFO, name , value);
- case(name)
- "S_AXI_GP0" : S_AXI_GP0.set_arqos(value);
- "S_AXI_GP1" : S_AXI_GP1.set_arqos(value);
- "S_AXI_HP0" : S_AXI_HP0.set_arqos(value);
- "S_AXI_HP1" : S_AXI_HP1.set_arqos(value);
- "S_AXI_HP2" : S_AXI_HP2.set_arqos(value);
- "S_AXI_HP3" : S_AXI_HP3.set_arqos(value);
- "S_AXI_ACP" : S_AXI_ACP.set_arqos(value);
- default : $display("[%0d] : %0s : Invalid Slave Port name (%0s)",$time, DISP_ERR, name);
- endcase
- end
- endtask
-
- /* API for setting AWQos Values */
- task automatic set_awqos;
- input [1023:0] name;
- input [axi_qos_width-1:0] value;
- begin
- $display("[%0d] : [%0s] : %0s Port/s : Setting ARQOS as %0b",$time, DISP_INFO, name , value);
- case(name)
- "S_AXI_GP0" : S_AXI_GP0.set_awqos(value);
- "S_AXI_GP1" : S_AXI_GP1.set_awqos(value);
- "S_AXI_HP0" : S_AXI_HP0.set_awqos(value);
- "S_AXI_HP1" : S_AXI_HP1.set_awqos(value);
- "S_AXI_HP2" : S_AXI_HP2.set_awqos(value);
- "S_AXI_HP3" : S_AXI_HP3.set_awqos(value);
- "S_AXI_ACP" : S_AXI_ACP.set_awqos(value);
- default : $display("[%0d] : %0s : Invalid Slave Port (%0s)",$time, DISP_ERR, name);
- endcase
- end
- endtask
-
- /* API for soft reset control */
- task automatic fpga_soft_reset;
- input[data_width-1:0] reset_ctrl;
- begin
- if(DEBUG_INFO) $display("[%0d] : %0s : FPGA Soft Reset called for 0x%0h",$time, DISP_INFO, reset_ctrl);
- gen_rst.fpga_soft_reset(reset_ctrl);
- end
- endtask
-
- /* API for por and strb reset control */
-// task automatic por_srstb_reset;
-// input por_reset_ctrl;
-// begin
-// if(DEBUG_INFO) $display("[%0d] : %0s : POR and STRB Reset called for 0x%0h",$time, DISP_INFO, por_reset_ctrl);
-// // gen_rst.por_srstb_reset(por_reset_ctrl);
-// gen_rst.por_srstb_reset(por_reset_ctrl);
-//
-// end
-// endtask
-
- /* API for pre-loading memories from (DDR/OCM model) */
- task automatic pre_load_mem_from_file;
- input [(max_chars*8)-1:0] file_name;
- input [addr_width-1:0] start_addr;
- input [int_width-1:0] no_of_bytes;
- reg [1:0] mem_type;
- integer succ;
- begin
- mem_type = decode_address(start_addr);
- succ = $fopen(file_name,"r");
- if(succ == 0) begin
- $display("[%0d] : %0s : '%0s' doesn't exist. 'pre_load_mem_from_file' call failed ...\n",$time, DISP_ERR, file_name);
- if(STOP_ON_ERROR) $stop;
- end
- else if(check_addr_aligned(start_addr)) begin
- case(mem_type)
- OCM_MEM : begin
- if (!C_HIGH_OCM_EN)
- ocmc.ocm.pre_load_mem_from_file(file_name,start_addr,no_of_bytes);
- else
- ocmc.ocm.pre_load_mem_from_file(file_name,(start_addr - high_ocm_start_addr),no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> OCM Memory is pre-loaded with %0d bytes of data from file %0s",$time, DISP_INFO, start_addr, no_of_bytes, file_name);
- end
- DDR_MEM : begin
- ddrc.ddr.pre_load_mem_from_file(file_name,start_addr,no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> DDR Memory is pre-loaded with %0d bytes of data from file %0s",$time, DISP_INFO, start_addr, no_of_bytes, file_name);
- end
- default : begin
- $display("[%0d] : %0s : Address(0x%0h) is out-of-range. 'pre_load_mem_from_file' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'pre_load_mem_from_file' call failed ...",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR)
- $stop;
- end
- end
- endtask
-
- /* API for pre-loading memories (DDR/OCM) */
- task automatic pre_load_mem;
- input [1:0] data_type;
- input [addr_width-1:0] start_addr;
- input [int_width-1:0] no_of_bytes;
- reg [1:0] mem_type;
- begin
- mem_type = decode_address(start_addr);
- if(check_addr_aligned(start_addr)) begin
- case(mem_type)
- OCM_MEM : begin
- if (!C_HIGH_OCM_EN)
- ocmc.ocm.pre_load_mem(data_type,start_addr,no_of_bytes);
- else
- ocmc.ocm.pre_load_mem(data_type,(start_addr - high_ocm_start_addr),no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> OCM Memory is pre-loaded with %0d bytes of data",$time, DISP_INFO, start_addr, no_of_bytes);
- end
- DDR_MEM : begin
- ddrc.ddr.pre_load_mem(data_type,start_addr,no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> DDR Memory is pre-loaded with %0d bytes of data",$time, DISP_INFO, start_addr, no_of_bytes);
- end
- default : begin
- $display("[%0d] : %0s : Address(0x%0h) is out-of-range. 'pre_load_mem' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'pre_load_mem' call failed ...",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- end
- endtask
-
- /* API for backdoor write to memories (DDR/OCM) */
- task automatic write_mem;
- input [max_burst_bits-1 :0] data;
- input [addr_width-1:0] start_addr;
- input [max_burst_bytes_width:0] no_of_bytes;
- reg [1:0] mem_type;
- integer succ;
- begin
- mem_type = decode_address(start_addr);
- if(check_addr_aligned(start_addr)) begin
- case(mem_type)
- OCM_MEM : begin
- if (!C_HIGH_OCM_EN)
- ocmc.ocm.write_mem(data,start_addr,no_of_bytes,all_strb_valid);
- else
- ocmc.ocm.write_mem(data,(start_addr - high_ocm_start_addr),no_of_bytes,all_strb_valid);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> Write %0d bytes of data to OCM Memory",$time, DISP_INFO, start_addr, no_of_bytes);
- end
- DDR_MEM : begin
- ddrc.ddr.write_mem(data,start_addr,no_of_bytes,all_strb_valid);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> Write %0d bytes of data to DDR Memory",$time, DISP_INFO, start_addr, no_of_bytes);
- end
- default : begin
- $display("[%0d] : %0s : Address(0x%0h) is out-of-range. 'write_mem' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'write_mem' call failed ...",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR)
- $stop;
- end
- end
- endtask
-
- /* read_memory */
- task automatic read_mem;
- input [addr_width-1:0] start_addr;
- input [max_burst_bytes_width :0] no_of_bytes;
- output[max_burst_bits-1 :0] data;
- reg [1:0] mem_type;
- integer succ;
- begin
- mem_type = decode_address(start_addr);
- if(check_addr_aligned(start_addr)) begin
- case(mem_type)
- OCM_MEM : begin
- if (!C_HIGH_OCM_EN)
- ocmc.ocm.read_mem(data,start_addr,no_of_bytes);
- else
- ocmc.ocm.read_mem(data,(start_addr - high_ocm_start_addr),no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> Read %0d bytes of data from OCM Memory ",$time, DISP_INFO, start_addr, no_of_bytes);
- end
- DDR_MEM : begin
- ddrc.ddr.read_mem(data,start_addr,no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> Read %0d bytes of data from DDR Memory",$time, DISP_INFO, start_addr, no_of_bytes);
- end
- default : begin
- $display("[%0d] : %0s : Address(0x%0h) is out-of-range. 'read_mem' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'read_mem' call failed ...",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR)
- $stop;
- end
- end
- endtask
-
- /* API for backdoor read to memories (DDR/OCM) */
- task automatic peek_mem_to_file;
- input [(max_chars*8)-1:0] file_name;
- input [addr_width-1:0] start_addr;
- input [int_width-1:0] no_of_bytes;
- reg [1:0] mem_type;
- integer succ;
- begin
- mem_type = decode_address(start_addr);
- if(check_addr_aligned(start_addr)) begin
- case(mem_type)
- OCM_MEM : begin
- if (!C_HIGH_OCM_EN)
- ocmc.ocm.peek_mem_to_file(file_name,start_addr,no_of_bytes);
- else
- ocmc.ocm.peek_mem_to_file(file_name,(start_addr - high_ocm_start_addr),no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> Peeked %0d bytes of data from OCM Memory to file %0s",$time, DISP_INFO, start_addr, no_of_bytes, file_name);
- end
- DDR_MEM : begin
- ddrc.ddr.peek_mem_to_file(file_name,start_addr,no_of_bytes);
- if(DEBUG_INFO)
- $display("[%0d] : %0s : Starting Address(0x%0h) -> Peeked %0d bytes of data from DDR Memory to file %0s",$time, DISP_INFO, start_addr, no_of_bytes, file_name);
- end
- default : begin
- $display("[%0d] : %0s : Address(0x%0h) is out-of-range. 'peek_mem_to_file' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'peek_mem_to_file' call failed ...",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR)
- $stop;
- end
- end
- endtask
-
- /* API to read interrupt status */
- task automatic read_interrupt;
- output[irq_width-1:0] irq_status;
- begin
- irq_status = IRQ_F2P;
- if(DEBUG_INFO) $display("[%0d] : %0s : Reading Interrupt Status as 0x%0h",$time, DISP_INFO, irq_status);
- end
- endtask
-
- /* API to wait on interrup */
- task automatic wait_interrupt;
- input [3:0] irq;
- output[irq_width-1:0] irq_status;
- begin
- if(DEBUG_INFO) $display("[%0d] : %0s : Waiting on Interrupt irq[%0d]",$time, DISP_INFO, irq);
-
- case(irq)
- 0 : wait(IRQ_F2P[0] === 1'b1);
- 1 : wait(IRQ_F2P[1] === 1'b1);
- 2 : wait(IRQ_F2P[2] === 1'b1);
- 3 : wait(IRQ_F2P[3] === 1'b1);
- 4 : wait(IRQ_F2P[4] === 1'b1);
- 5 : wait(IRQ_F2P[5] === 1'b1);
- 6 : wait(IRQ_F2P[6] === 1'b1);
- 7 : wait(IRQ_F2P[7] === 1'b1);
- 8 : wait(IRQ_F2P[8] === 1'b1);
- 9 : wait(IRQ_F2P[9] === 1'b1);
- 10: wait(IRQ_F2P[10] === 1'b1);
- 11: wait(IRQ_F2P[11] === 1'b1);
- 12: wait(IRQ_F2P[12] === 1'b1);
- 13: wait(IRQ_F2P[13] === 1'b1);
- 14: wait(IRQ_F2P[14] === 1'b1);
- 15: wait(IRQ_F2P[15] === 1'b1);
- default : $display("[%0d] : %0s : Only 16 Interrupt lines (irq_fp0:irq_fp15) are supported",$time, DISP_ERR);
- endcase
- if(DEBUG_INFO) $display("[%0d] : %0s : Received Interrupt irq[%0d]",$time, DISP_INFO, irq);
- irq_status = IRQ_F2P;
- end
- endtask
-
- /* API to wait for a certain match pattern*/
- task automatic wait_mem_update;
- input[addr_width-1:0] address;
- input[data_width-1:0] data_in;
- output[data_width-1:0] data_out;
- reg[data_width-1:0] datao;
- begin
- if(mem_update_key) begin
- mem_update_key = 0;
- if(DEBUG_INFO) $display("[%0d] : %0s : 'wait_mem_update' called for Address(0x%0h) , Match Pattern(0x%0h) \n",$time, DISP_INFO, address, data_in);
- if(check_addr_aligned(address)) begin
- ddrc.ddr.wait_mem_update(address, datao);
- if(datao != data_in)begin
- $display("[%0d] : %0s : Address(0x%0h) -> DATA PATTERN MATCH FAILED, Expected data = 0x%0h, Received data = 0x%0h \n",$time, DISP_ERR, address, data_in,datao);
- $stop;
- end else
- $display("[%0d] : %0s : Address(0x%0h) -> DATA PATTERN(0x%0h) MATCHED \n",$time, DISP_INFO, address, data_in);
- data_out = datao;
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'wait_mem_update' call failed ...\n",$time, DISP_ERR, address);
- if(STOP_ON_ERROR) $stop;
- end
- mem_update_key = 1;
- end else
- $display("[%0d] : %0s : One instance of 'wait_mem_update' thread is already running.Only one instance can be called at a time ...\n",$time, DISP_WARN);
- end
- endtask
-
-
- /* API to initiate a WRITE transaction on one of the AXI-Master ports*/
- task automatic write_from_file;
- input [(max_chars*8)-1:0] file_name;
- input [addr_width-1:0] start_addr;
- input [int_width-1:0] wr_size;
- output [axi_rsp_width-1:0] response;
- integer succ;
- begin
- succ = $fopen(file_name,"r");
- if(succ == 0) begin
- $display("[%0d] : %0s : '%0s' doesn't exist. 'write_from_file' call failed ...\n",$time, DISP_ERR, file_name);
- if(STOP_ON_ERROR) $stop;
- end
- else if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(check_addr_aligned(start_addr)) begin
- $fclose(succ);
- // case(start_addr[31:30])
- if (start_addr[31:30] === 2'b01) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes from file %0s",$time, DISP_INFO, start_addr, wr_size, file_name);
- M_AXI_GP0.write_from_file(file_name,start_addr,wr_size,response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Write for Starting Address(0x%0h)",$time, DISP_INFO, start_addr);
- end else if(start_addr[31:30] === 2'b10) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes from file %0s",$time, DISP_INFO, start_addr, wr_size, file_name);
- M_AXI_GP1.write_from_file(file_name,start_addr,wr_size,response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Write for Starting Address(0x%0h)",$time, DISP_INFO, start_addr);
- end else begin
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'write_from_file' call failed ...\n",$time, DISP_ERR, start_addr);
- end
- // endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'write_from_file' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- end
- endtask
-
- /* API to initiate a READ transaction on one of the AXI-Master ports*/
- task automatic read_to_file;
- input [(max_chars*8)-1:0] file_name;
- input [addr_width-1:0] start_addr;
- input [int_width-1:0] rd_size;
- output [axi_rsp_width-1:0] response;
- begin
- if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range\n",$time, DISP_ERR , start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(check_addr_aligned(start_addr)) begin
- // case(start_addr[31:30])
- if (start_addr[31:30] === 2'b01) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Read -> %0d bytes to file %0s",$time, DISP_INFO, start_addr, rd_size, file_name);
- M_AXI_GP0.read_to_file(file_name,start_addr,rd_size,response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Read for Starting Address(0x%0h)",$time, DISP_INFO, start_addr);
- end else if(start_addr[31:30] === 2'b10) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Read -> %0d bytes to file %0s",$time, DISP_INFO, start_addr, rd_size, file_name);
- M_AXI_GP1.read_to_file(file_name,start_addr,rd_size,response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Read for Starting Address(0x%0h)",$time, DISP_INFO, start_addr);
- // end
- // default : $display("[%0d] : %0s : Invalid Address(0x%0h) 'read_to_file' call failed ...\n",$time, DISP_ERR, start_addr);
- // endcase
- end else begin
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'read_to_file' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end
- end
- end
- endtask
-
- /* API to initiate a WRITE transaction(<= 128 bytes) on one of the AXI-Master ports*/
- task automatic write_data;
- input [addr_width-1:0] start_addr;
- input [max_transfer_bytes_width:0] wr_size;
- input [(max_transfer_bytes*8)-1:0] w_data;
- output [axi_rsp_width-1:0] response;
- reg[511:0] rsp;
- begin
- if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range. 'write_data' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(wr_size > max_transfer_bytes) begin
- $display("[%0d] : %0s : Byte Size supported is 128 bytes only. 'write_data' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(start_addr[31:30] === GP_M0) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes",$time, DISP_INFO, start_addr, wr_size);
- M_AXI_GP0.write_data(start_addr,wr_size,w_data,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Write for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else if(start_addr[31:30] === GP_M1) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes",$time, DISP_INFO, start_addr, wr_size);
- M_AXI_GP1.write_data(start_addr,wr_size,w_data,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Write for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'write_data' call failed ...\n",$time, DISP_ERR, start_addr);
- end
- endtask
-
- /* API to initiate a READ transaction(<= 128 bytes) on one of the AXI-Master ports*/
- task automatic read_data;
- input [addr_width-1:0] start_addr;
- input [max_transfer_bytes_width:0] rd_size;
- output[(max_transfer_bytes*8)-1:0] rd_data;
- output [axi_rsp_width-1:0] response;
- reg[511:0] rsp;
- begin
- if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range 'read_data' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(rd_size > max_transfer_bytes) begin
- $display("[%0d] : %0s : Byte Size supported is 128 bytes only.'read_data' call failed ... \n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(start_addr[31:30] === GP_M0) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Read -> %0d bytes",$time, DISP_INFO, start_addr, rd_size);
- M_AXI_GP0.read_data(start_addr,rd_size,rd_data,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Read for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else if(start_addr[31:30] === GP_M1) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Read -> %0d bytes",$time, DISP_INFO, start_addr, rd_size);
- M_AXI_GP1.read_data(start_addr,rd_size,rd_data,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Read for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'read_data' call failed ...\n",$time, DISP_ERR, start_addr);
- end
- endtask
-
-/* Hooks to call to VIP APIs */
- task automatic write_burst(input [addr_width-1:0] start_addr,input [axi_len_width-1:0] len,input [axi_size_width-1:0] siz,input [axi_brst_type_width-1:0] burst,input [axi_lock_width-1:0] lck,input [axi_cache_width-1:0] cache,input [axi_prot_width-1:0] prot,input [(axi_mgp_data_width*axi_burst_len)-1:0] data,input integer datasize, output [axi_rsp_width-1:0] response);
- reg[511:0] rsp;
- begin
- if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range. 'write_burst' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(start_addr[31:30] === 2'b01) begin
- // end else if(start_addr[31:30] === GP_M0) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes",$time, DISP_INFO, start_addr, datasize);
- M_AXI_GP0.write_burst(start_addr,len,siz,burst,lck,cache,prot,data,datasize,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Write for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else if(start_addr[31:30] === 2'b10) begin
- // end else if(start_addr[31:30] === GP_M1) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes",$time, DISP_INFO, start_addr, datasize);
- M_AXI_GP1.write_burst(start_addr,len,siz,burst,lck,cache,prot,data,datasize,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Write for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'write_burst' call failed ... \n",$time, DISP_ERR, start_addr);
- end
- endtask
-
- task automatic write_burst_concurrent(input [addr_width-1:0] start_addr,input [axi_len_width-1:0] len,input [axi_size_width-1:0] siz,input [axi_brst_type_width-1:0] burst,input [axi_lock_width-1:0] lck,input [axi_cache_width-1:0] cache,input [axi_prot_width-1:0] prot,input [(axi_mgp_data_width*axi_burst_len)-1:0] data,input integer datasize, output [axi_rsp_width-1:0] response);
- reg[511:0] rsp; /// string for response
- begin
- if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range. 'write_burst_concurrent' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(start_addr[31:30] === 2'b01) begin
- // end else if(start_addr[31:30] === GP_M0) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes",$time, DISP_INFO, start_addr, datasize);
- M_AXI_GP0.write_burst_concurrent(start_addr,len,siz,burst,lck,cache,prot,data,datasize,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Write for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else if(start_addr[31:30] === 2'b10) begin
- // end else if(start_addr[31:30] === GP_M1) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Write -> %0d bytes",$time, DISP_INFO, start_addr, datasize);
- M_AXI_GP1.write_burst_concurrent(start_addr,len,siz,burst,lck,cache,prot,data,datasize,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Write for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'write_burst_concurrent' call failed ... \n",$time, DISP_ERR, start_addr);
- end
- endtask
-
- task automatic read_burst;
- input [addr_width-1:0] start_addr;
- input [axi_len_width-1:0] len;
- input [axi_size_width-1:0] siz;
- input [axi_brst_type_width-1:0] burst;
- input [axi_lock_width-1:0] lck;
- input [axi_cache_width-1:0] cache;
- input [axi_prot_width-1:0] prot;
- output [(axi_mgp_data_width*axi_burst_len)-1:0] data;
- output [(axi_rsp_width*axi_burst_len)-1:0] response;
- reg[511:0] rsp;
- begin
- if(!check_master_address(start_addr)) begin
- $display("[%0d] : %0s : Master Address(0x%0h) is out of range. 'read_burst' call failed ...\n",$time, DISP_ERR, start_addr);
- if(STOP_ON_ERROR) $stop;
- end else if(start_addr[31:30] === 2'b01) begin
- // end else if(start_addr[31:30] === GP_M0) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Starting Address(0x%0h) -> AXI Read",$time, DISP_INFO, start_addr);
- M_AXI_GP0.read_burst(start_addr,len,siz,burst,lck,cache,prot,data,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : Done AXI Read for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else if(start_addr[31:30] === 2'b10) begin
- // end else if(start_addr[31:30] === GP_M1) begin
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Starting Address(0x%0h) -> AXI Read",$time, DISP_INFO, start_addr);
- M_AXI_GP1.read_burst(start_addr,len,siz,burst,lck,cache,prot,data,response);
- rsp = get_resp(response);
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : Done AXI Read for Starting Address(0x%0h) with Response '%0s'",$time, DISP_INFO, start_addr, rsp);
- end else
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'read_burst' call failed ... \n",$time, DISP_ERR, start_addr);
- end
- endtask
-
- task automatic wait_reg_update;
- input [addr_width-1:0] addr;
- input [data_width-1:0] data_i;
- input [data_width-1:0] mask_i;
- input [int_width-1:0] time_interval;
- input [int_width-1:0] time_out;
- output [data_width-1:0] data_o;
-
- reg upd_done0;
- reg upd_done1;
- begin
- if(!check_master_address(addr)) begin
- $display("[%0d] : %0s : Address(0x%0h) is out of range. 'wait_reg_update' call failed ...\n",$time, DISP_ERR, addr);
- if(STOP_ON_ERROR) $stop;
- end else if(addr[31:30] === 2'b01) begin
- // end else if(addr[31:30] === GP_M0) begin
- if(reg_update_key_0) begin
- reg_update_key_0 = 0;
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP0 : %0s : 'wait_reg_update' called for Address(0x%0h), Mask(0x%0h), Match Pattern(0x%0h) \n ",$time, DISP_INFO, addr, mask_i, data_i);
- M_AXI_GP0.wait_reg_update(addr, data_i, mask_i, time_interval, time_out, data_o, upd_done0);
- if(DEBUG_INFO && upd_done0)
- $display("[%0d] : M_AXI_GP0 : %0s : Register mapped at Address(0x%0h) is updated ",$time, DISP_INFO, addr);
- reg_update_key_0 = 1;
- end else
- $display("[%0d] : M_AXI_GP0 : One instance of 'wait_reg_update' thread is already running.Only one instance can be called at a time ...\n",$time, DISP_WARN);
- end else if(addr[31:30] === 2'b10) begin
- // end else if(addr[31:30] === GP_M1) begin
- if(reg_update_key_1) begin
- reg_update_key_1 = 0;
- if(DEBUG_INFO)
- $display("[%0d] : M_AXI_GP1 : %0s : 'wait_reg_update' called for Address(0x%0h), Mask(0x%0h), Match Pattern(0x%0h) \n ",$time, DISP_INFO, addr, mask_i, data_i);
- M_AXI_GP1.wait_reg_update(addr, data_i, mask_i, time_interval, time_out, data_o, upd_done1);
- if(DEBUG_INFO && upd_done1)
- $display("[%0d] : M_AXI_GP1 : %0s : Register mapped at Address(0x%0h) is updated ",$time, DISP_INFO, addr);
- reg_update_key_1 = 1;
- end else
- $display("[%0d] : M_AXI_GP1 : One instance of 'wait_reg_update' thread is already running.Only one instance can be called at a time ...\n",$time, DISP_WARN);
- end else
- $display("[%0d] : %0s : Invalid Address(0x%0h) 'wait_reg_update' call failed ... \n",$time, DISP_ERR, addr);
- end
- endtask
-
-/* API to read register map */
- task read_register_map;
- input [addr_width-1:0] start_addr;
- input [max_regs_width:0] no_of_registers;
- output[max_burst_bits-1 :0] data;
- reg [max_regs_width:0] no_of_regs;
- begin
- no_of_regs = no_of_registers;
- if(no_of_registers > 32) begin
- $display("[%0d] : %0s : No_of_Registers(%0d) exceeds the supported number (32).\n Only 32 registers will be read.",$time, DISP_ERR, start_addr);
- no_of_regs = 32;
- end
- if(check_addr_aligned(start_addr)) begin
- if(decode_address(start_addr) == REG_MEM) begin
- if(DEBUG_INFO) $display("[%0d] : %0s : Reading Registers starting address (0x%0h) -> %0d registers",$time, DISP_INFO, start_addr,no_of_regs );
- regc.regm.read_reg_mem(data,start_addr,no_of_regs*4); /// as each register is of 4 bytes
- if(DEBUG_INFO) $display("[%0d] : %0s : DONE -> Reading Registers starting address (0x%0h), Data returned(0x%0h)",$time, DISP_INFO, start_addr, data );
- end else begin
- $display("[%0d] : %0s : Invalid Address(0x%0h) for Register Read. 'read_register_map' call failed ...",$time, DISP_ERR, start_addr);
- end
- end else begin
- data = 0;
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'read_register_map' call failed ...",$time, DISP_ERR, start_addr);
- end
- end
- endtask
-
-/* API to read single register */
- task read_register;
- input [addr_width-1:0] addr;
- output[data_width-1:0] data;
- begin
- if(check_addr_aligned(addr)) begin
- if(decode_address(addr) == REG_MEM) begin
- if(DEBUG_INFO) $display("[%0d] : %0s : Reading Register (0x%0h) ",$time, DISP_INFO, addr );
- regc.regm.get_data(addr >> 2, data);
- if(DEBUG_INFO) $display("[%0d] : %0s : DONE -> Reading Register (0x%0h), Data returned(0x%0h)",$time, DISP_INFO, addr, data );
- end else begin
- $display("[%0d] : %0s : Invalid Address(0x%0h) for Register Read. 'read_register' call failed ...",$time, DISP_ERR, addr);
- end
- end else begin
- data = 0;
- $display("[%0d] : %0s : Address(0x%0h) has to be 32-bit aligned. 'read_register' call failed ...",$time, DISP_ERR, addr);
- end
-
- end
- endtask
-
- /* API to set the AXI-Slave profile*/
- task automatic set_slave_profile;
- input[1023:0] name;
- input[1:0] latency ;
- begin
- if(DEBUG_INFO) $display("[%0d] : %0s : %0s Port/s : Setting Slave profile",$time, DISP_INFO, name);
- case(name)
- "S_AXI_GP0" : S_AXI_GP0.set_latency_type(latency);
- "S_AXI_GP1" : S_AXI_GP1.set_latency_type(latency);
- "S_AXI_HP0" : S_AXI_HP0.set_latency_type(latency);
- "S_AXI_HP1" : S_AXI_HP1.set_latency_type(latency);
- "S_AXI_HP2" : S_AXI_HP2.set_latency_type(latency);
- "S_AXI_HP3" : S_AXI_HP3.set_latency_type(latency);
- "S_AXI_ACP" : S_AXI_ACP.set_latency_type(latency);
- "ALL" : begin
- S_AXI_GP0.set_latency_type(latency);
- S_AXI_GP1.set_latency_type(latency);
- S_AXI_HP0.set_latency_type(latency);
- S_AXI_HP1.set_latency_type(latency);
- S_AXI_HP2.set_latency_type(latency);
- S_AXI_HP3.set_latency_type(latency);
- S_AXI_ACP.set_latency_type(latency);
- end
- endcase
- end
- endtask
-
-
-/*------------------------------ LOCAL APIs ------------------------------------------------ */
-
- /* local API for address decoding*/
- function automatic [1:0] decode_address;
- input [addr_width-1:0] address;
- begin
- if(!C_HIGH_OCM_EN && (address < ocm_end_addr || address >= ocm_low_addr ))
- decode_address = OCM_MEM; /// OCM
- else if(address >= ddr_start_addr && address <= ddr_end_addr)
- decode_address = DDR_MEM; /// DDR
- else if(C_HIGH_OCM_EN && address >= high_ocm_start_addr)
- decode_address = OCM_MEM; /// OCM
- else if(address >= reg_start_addr && reg_start_addr <= reg_end_addr)
- decode_address = REG_MEM; /// Register Map
- else
- decode_address = INVALID_MEM_TYPE; /// ERROR in Address
- end
- endfunction
-
- /* local API for checking address is 32-bit (4-byte) aligned */
- function automatic check_addr_aligned;
- input [addr_width-1:0] address;
- begin
- if((address%4) !=0 ) begin //
- check_addr_aligned = 0; ///not_aligned
- end else
- check_addr_aligned = 1;
- end
- endfunction
-
- /* local API to check address for GP Masters */
- function check_master_address;
- input [addr_width-1:0] address;
- begin
- if(address >= m_axi_gp0_baseaddr && address <= m_axi_gp0_highaddr)
- check_master_address = 1'b1;
- else if(address >= m_axi_gp1_baseaddr && address <= m_axi_gp1_highaddr)
- check_master_address = 1'b1;
- else
- check_master_address = 1'b0; /// ERROR in Address
- end
- endfunction
-
- /* Response decode */
- function automatic [511:0] get_resp;
- input[axi_rsp_width-1:0] response;
- begin
- case(response)
- 2'b00 : get_resp = "OKAY";
- 2'b01 : get_resp = "EXOKAY";
- 2'b10 : get_resp = "SLVERR";
- 2'b11 : get_resp = "DECERR";
- endcase
- end
- endfunction
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_acp.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_acp.v
deleted file mode 100755
index 6672bf0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_acp.v
+++ /dev/null
@@ -1,94 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_axi_acp.v
- *
- * Date : 2012-11
- *
- * Description : Connections for ACP port
- *
- *****************************************************************************/
-
-/* AXI Slave ACP */
- processing_system7_vip_v1_0_8_axi_slave_acp #( C_USE_S_AXI_ACP, // enable
- axi_acp_name, // name
- axi_acp_data_width, // data width
- addr_width, /// address width
- axi_acp_id_width, // ID width
- C_S_AXI_ACP_BASEADDR, // slave base address
- C_S_AXI_ACP_HIGHADDR,// slave size
- axi_acp_outstanding, // outstanding transactions // 7 Reads and 3 Writes
- axi_slv_excl_support, // Exclusive access support
- axi_acp_wr_outstanding,
- axi_acp_rd_outstanding)
- S_AXI_ACP(.S_RESETN (net_axi_acp_rstn),
- .S_ACLK (S_AXI_ACP_ACLK),
- // Write Address Channel
- .S_AWID (S_AXI_ACP_AWID),
- .S_AWADDR (S_AXI_ACP_AWADDR),
- .S_AWLEN (S_AXI_ACP_AWLEN),
- .S_AWSIZE (S_AXI_ACP_AWSIZE),
- .S_AWBURST (S_AXI_ACP_AWBURST),
- .S_AWLOCK (S_AXI_ACP_AWLOCK),
- .S_AWCACHE (S_AXI_ACP_AWCACHE),
- .S_AWPROT (S_AXI_ACP_AWPROT),
- .S_AWVALID (S_AXI_ACP_AWVALID),
- .S_AWREADY (S_AXI_ACP_AWREADY),
- // Write Data Channel Signals.
- .S_WID (S_AXI_ACP_WID),
- .S_WDATA (S_AXI_ACP_WDATA),
- .S_WSTRB (S_AXI_ACP_WSTRB),
- .S_WLAST (S_AXI_ACP_WLAST),
- .S_WVALID (S_AXI_ACP_WVALID),
- .S_WREADY (S_AXI_ACP_WREADY),
- // Write Response Channel Signals.
- .S_BID (S_AXI_ACP_BID),
- .S_BRESP (S_AXI_ACP_BRESP),
- .S_BVALID (S_AXI_ACP_BVALID),
- .S_BREADY (S_AXI_ACP_BREADY),
- // Read Address Channel Signals.
- .S_ARID (S_AXI_ACP_ARID),
- .S_ARADDR (S_AXI_ACP_ARADDR),
- .S_ARLEN (S_AXI_ACP_ARLEN),
- .S_ARSIZE (S_AXI_ACP_ARSIZE),
- .S_ARBURST (S_AXI_ACP_ARBURST),
- .S_ARLOCK (S_AXI_ACP_ARLOCK),
- .S_ARCACHE (S_AXI_ACP_ARCACHE),
- .S_ARPROT (S_AXI_ACP_ARPROT),
- .S_ARVALID (S_AXI_ACP_ARVALID),
- .S_ARREADY (S_AXI_ACP_ARREADY),
- // Read Data Channel Signals.
- .S_RID (S_AXI_ACP_RID),
- .S_RDATA (S_AXI_ACP_RDATA),
- .S_RRESP (S_AXI_ACP_RRESP),
- .S_RLAST (S_AXI_ACP_RLAST),
- .S_RVALID (S_AXI_ACP_RVALID),
- .S_RREADY (S_AXI_ACP_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_ACP_AWQOS),
- .S_ARQOS (S_AXI_ACP_ARQOS), // Side band signals
-
- .SW_CLK (net_sw_clk),
-/* This goes to port 0 of DDR and port 0 of OCM , port 0 of REG*/
- .WR_DATA_ACK_DDR (ddr_wr_ack_port0),
- .WR_DATA_ACK_OCM (ocm_wr_ack_port0),
- .WR_DATA (net_wr_data_acp),
- .WR_DATA_STRB (net_wr_strb_acp),
- .WR_ADDR (net_wr_addr_acp),
- .WR_BYTES (net_wr_bytes_acp),
- .WR_DATA_VALID_DDR (ddr_wr_dv_port0),
- .WR_DATA_VALID_OCM (ocm_wr_dv_port0),
- .WR_QOS (net_wr_qos_acp),
-
- .RD_REQ_DDR (ddr_rd_req_port0),
- .RD_REQ_OCM (ocm_rd_req_port0),
- .RD_REQ_REG (reg_rd_req_port0),
- .RD_ADDR (net_rd_addr_acp),
- .RD_DATA_DDR (ddr_rd_data_port0),
- .RD_DATA_OCM (ocm_rd_data_port0),
- .RD_DATA_REG (reg_rd_data_port0),
- .RD_BYTES (net_rd_bytes_acp),
- .RD_DATA_VALID_DDR (ddr_rd_dv_port0),
- .RD_DATA_VALID_OCM (ocm_rd_dv_port0),
- .RD_DATA_VALID_REG (reg_rd_dv_port0),
- .RD_QOS (net_rd_qos_acp)
-
-);
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_gp.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_gp.v
deleted file mode 100755
index 4fedf80..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_gp.v
+++ /dev/null
@@ -1,311 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_axi_gp.v
- *
- * Date : 2012-11
- *
- * Description : Connections for AXI GP ports
- *
- *****************************************************************************/
-
- /* IDs for Masters
- // l2m1 (CPU000)
- 12'b11_000_000_00_00
- 12'b11_010_000_00_00
- 12'b11_011_000_00_00
- 12'b11_100_000_00_00
- 12'b11_101_000_00_00
- 12'b11_110_000_00_00
- 12'b11_111_000_00_00
- // l2m1 (CPU001)
- 12'b11_000_001_00_00
- 12'b11_010_001_00_00
- 12'b11_011_001_00_00
- 12'b11_100_001_00_00
- 12'b11_101_001_00_00
- 12'b11_110_001_00_00
- 12'b11_111_001_00_00
- */
-
-/* AXI -Master GP0 */
- processing_system7_vip_v1_0_8_axi_master #(C_USE_M_AXI_GP0, // enable
- axi_mgp0_name,// name
- axi_mgp_data_width, /// Data Width
- addr_width, /// Address width
- axi_mgp_id_width, //// ID Width
- axi_mgp_outstanding, //// Outstanding transactions
- axi_mst_excl_support, // EXCL Access Support
- axi_mgp_wr_id, //WR_ID
- axi_mgp_rd_id) //RD_ID
- M_AXI_GP0(.M_RESETN (net_axi_mgp0_rstn),
- .M_ACLK (M_AXI_GP0_ACLK),
- // Write Address Channel
- .M_AWID (M_AXI_GP0_AWID_FULL),
- .M_AWADDR (M_AXI_GP0_AWADDR),
- .M_AWLEN (M_AXI_GP0_AWLEN),
- .M_AWSIZE (M_AXI_GP0_AWSIZE),
- .M_AWBURST (M_AXI_GP0_AWBURST),
- .M_AWLOCK (M_AXI_GP0_AWLOCK),
- .M_AWCACHE (M_AXI_GP0_AWCACHE),
- .M_AWPROT (M_AXI_GP0_AWPROT),
- .M_AWVALID (M_AXI_GP0_AWVALID),
- .M_AWREADY (M_AXI_GP0_AWREADY),
- // Write Data Channel Signals.
- .M_WID (M_AXI_GP0_WID_FULL),
- .M_WDATA (M_AXI_GP0_WDATA),
- .M_WSTRB (M_AXI_GP0_WSTRB),
- .M_WLAST (M_AXI_GP0_WLAST),
- .M_WVALID (M_AXI_GP0_WVALID),
- .M_WREADY (M_AXI_GP0_WREADY),
- // Write Response Channel Signals.
- .M_BID (M_AXI_GP0_BID_FULL),
- .M_BRESP (M_AXI_GP0_BRESP),
- .M_BVALID (M_AXI_GP0_BVALID),
- .M_BREADY (M_AXI_GP0_BREADY),
- // Read Address Channel Signals.
- .M_ARID (M_AXI_GP0_ARID_FULL),
- .M_ARADDR (M_AXI_GP0_ARADDR),
- .M_ARLEN (M_AXI_GP0_ARLEN),
- .M_ARSIZE (M_AXI_GP0_ARSIZE),
- .M_ARBURST (M_AXI_GP0_ARBURST),
- .M_ARLOCK (M_AXI_GP0_ARLOCK),
- .M_ARCACHE (M_AXI_GP0_ARCACHE),
- .M_ARPROT (M_AXI_GP0_ARPROT),
- .M_ARVALID (M_AXI_GP0_ARVALID),
- .M_ARREADY (M_AXI_GP0_ARREADY),
- // Read Data Channel Signals.
- .M_RID (M_AXI_GP0_RID_FULL),
- .M_RDATA (M_AXI_GP0_RDATA),
- .M_RRESP (M_AXI_GP0_RRESP),
- .M_RLAST (M_AXI_GP0_RLAST),
- .M_RVALID (M_AXI_GP0_RVALID),
- .M_RREADY (M_AXI_GP0_RREADY),
- // Side band signals
- .M_AWQOS (M_AXI_GP0_AWQOS),
- .M_ARQOS (M_AXI_GP0_ARQOS)
- );
-
- /* AXI Master GP1 */
- processing_system7_vip_v1_0_8_axi_master #(C_USE_M_AXI_GP1, // enable
- axi_mgp1_name,// name
- axi_mgp_data_width, /// Data Width
- addr_width, /// Address width
- axi_mgp_id_width, //// ID Width
- axi_mgp_outstanding, //// Outstanding transactions
- axi_mst_excl_support, // EXCL Access Support
- axi_mgp_wr_id, //WR_ID
- axi_mgp_rd_id) //RD_ID
- M_AXI_GP1(.M_RESETN (net_axi_mgp1_rstn),
- .M_ACLK (M_AXI_GP1_ACLK),
- // Write Address Channel
- .M_AWID (M_AXI_GP1_AWID_FULL),
- .M_AWADDR (M_AXI_GP1_AWADDR),
- .M_AWLEN (M_AXI_GP1_AWLEN),
- .M_AWSIZE (M_AXI_GP1_AWSIZE),
- .M_AWBURST (M_AXI_GP1_AWBURST),
- .M_AWLOCK (M_AXI_GP1_AWLOCK),
- .M_AWCACHE (M_AXI_GP1_AWCACHE),
- .M_AWPROT (M_AXI_GP1_AWPROT),
- .M_AWVALID (M_AXI_GP1_AWVALID),
- .M_AWREADY (M_AXI_GP1_AWREADY),
- // Write Data Channel Signals.
- .M_WID (M_AXI_GP1_WID_FULL),
- .M_WDATA (M_AXI_GP1_WDATA),
- .M_WSTRB (M_AXI_GP1_WSTRB),
- .M_WLAST (M_AXI_GP1_WLAST),
- .M_WVALID (M_AXI_GP1_WVALID),
- .M_WREADY (M_AXI_GP1_WREADY),
- // Write Response Channel Signals.
- .M_BID (M_AXI_GP1_BID_FULL),
- .M_BRESP (M_AXI_GP1_BRESP),
- .M_BVALID (M_AXI_GP1_BVALID),
- .M_BREADY (M_AXI_GP1_BREADY),
- // Read Address Channel Signals.
- .M_ARID (M_AXI_GP1_ARID_FULL),
- .M_ARADDR (M_AXI_GP1_ARADDR),
- .M_ARLEN (M_AXI_GP1_ARLEN),
- .M_ARSIZE (M_AXI_GP1_ARSIZE),
- .M_ARBURST (M_AXI_GP1_ARBURST),
- .M_ARLOCK (M_AXI_GP1_ARLOCK),
- .M_ARCACHE (M_AXI_GP1_ARCACHE),
- .M_ARPROT (M_AXI_GP1_ARPROT),
- .M_ARVALID (M_AXI_GP1_ARVALID),
- .M_ARREADY (M_AXI_GP1_ARREADY),
- // Read Data Channel Signals.
- .M_RID (M_AXI_GP1_RID_FULL),
- .M_RDATA (M_AXI_GP1_RDATA),
- .M_RRESP (M_AXI_GP1_RRESP),
- .M_RLAST (M_AXI_GP1_RLAST),
- .M_RVALID (M_AXI_GP1_RVALID),
- .M_RREADY (M_AXI_GP1_RREADY),
- // Side band signals
- .M_AWQOS (M_AXI_GP1_AWQOS),
- .M_ARQOS (M_AXI_GP1_ARQOS)
- );
-
-/* AXI Slave GP0 */
- processing_system7_vip_v1_0_8_axi_slave #(C_USE_S_AXI_GP0, /// enable
- axi_sgp0_name, //name
- axi_sgp_data_width, /// data width
- addr_width, /// address width
- axi_sgp_id_width, /// ID width
- C_S_AXI_GP0_BASEADDR,//// base address
- C_S_AXI_GP0_HIGHADDR,/// Memory size (high_addr - base_addr)
- axi_sgp_outstanding, // outstanding transactions
- axi_slv_excl_support, // exclusive access not supported
- axi_sgp_wr_outstanding,
- axi_sgp_rd_outstanding)
- S_AXI_GP0(.S_RESETN (net_axi_gp0_rstn),
- .S_ACLK (S_AXI_GP0_ACLK),
- // Write Address Channel
- .S_AWID (S_AXI_GP0_AWID),
- .S_AWADDR (S_AXI_GP0_AWADDR),
- .S_AWLEN (S_AXI_GP0_AWLEN),
- .S_AWSIZE (S_AXI_GP0_AWSIZE),
- .S_AWBURST (S_AXI_GP0_AWBURST),
- .S_AWLOCK (S_AXI_GP0_AWLOCK),
- .S_AWCACHE (S_AXI_GP0_AWCACHE),
- .S_AWPROT (S_AXI_GP0_AWPROT),
- .S_AWVALID (S_AXI_GP0_AWVALID),
- .S_AWREADY (S_AXI_GP0_AWREADY),
- // Write Data Channel Signals.
- .S_WID (S_AXI_GP0_WID),
- .S_WDATA (S_AXI_GP0_WDATA),
- .S_WSTRB (S_AXI_GP0_WSTRB),
- .S_WLAST (S_AXI_GP0_WLAST),
- .S_WVALID (S_AXI_GP0_WVALID),
- .S_WREADY (S_AXI_GP0_WREADY),
- // Write Response Channel Signals.
- .S_BID (S_AXI_GP0_BID),
- .S_BRESP (S_AXI_GP0_BRESP),
- .S_BVALID (S_AXI_GP0_BVALID),
- .S_BREADY (S_AXI_GP0_BREADY),
- // Read Address Channel Signals.
- .S_ARID (S_AXI_GP0_ARID),
- .S_ARADDR (S_AXI_GP0_ARADDR),
- .S_ARLEN (S_AXI_GP0_ARLEN),
- .S_ARSIZE (S_AXI_GP0_ARSIZE),
- .S_ARBURST (S_AXI_GP0_ARBURST),
- .S_ARLOCK (S_AXI_GP0_ARLOCK),
- .S_ARCACHE (S_AXI_GP0_ARCACHE),
- .S_ARPROT (S_AXI_GP0_ARPROT),
- .S_ARVALID (S_AXI_GP0_ARVALID),
- .S_ARREADY (S_AXI_GP0_ARREADY),
- // Read Data Channel Signals.
- .S_RID (S_AXI_GP0_RID),
- .S_RDATA (S_AXI_GP0_RDATA),
- .S_RRESP (S_AXI_GP0_RRESP),
- .S_RLAST (S_AXI_GP0_RLAST),
- .S_RVALID (S_AXI_GP0_RVALID),
- .S_RREADY (S_AXI_GP0_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_GP0_AWQOS),
- .S_ARQOS (S_AXI_GP0_ARQOS),
-
- .SW_CLK (net_sw_clk),
- .WR_DATA_ACK_OCM (net_wr_ack_ocm_gp0),
- .WR_DATA_ACK_DDR (net_wr_ack_ddr_gp0),
- .WR_DATA (net_wr_data_gp0),
- .WR_DATA_STRB (net_wr_strb_gp0),
- .WR_ADDR (net_wr_addr_gp0),
- .WR_BYTES (net_wr_bytes_gp0),
- .WR_DATA_VALID_OCM (net_wr_dv_ocm_gp0),
- .WR_DATA_VALID_DDR (net_wr_dv_ddr_gp0),
- .WR_QOS (net_wr_qos_gp0),
- .RD_REQ_DDR (net_rd_req_ddr_gp0),
- .RD_REQ_OCM (net_rd_req_ocm_gp0),
- .RD_REQ_REG (net_rd_req_reg_gp0),
- .RD_ADDR (net_rd_addr_gp0),
- .RD_DATA_DDR (net_rd_data_ddr_gp0),
- .RD_DATA_OCM (net_rd_data_ocm_gp0),
- .RD_DATA_REG (net_rd_data_reg_gp0),
- .RD_BYTES (net_rd_bytes_gp0),
- .RD_DATA_VALID_DDR (net_rd_dv_ddr_gp0),
- .RD_DATA_VALID_OCM (net_rd_dv_ocm_gp0),
- .RD_DATA_VALID_REG (net_rd_dv_reg_gp0),
- .RD_QOS (net_rd_qos_gp0)
-
-);
-
-/* AXI Slave GP1 */
- processing_system7_vip_v1_0_8_axi_slave #(C_USE_S_AXI_GP1, /// enable
- axi_sgp1_name, //name
- axi_sgp_data_width, /// data width
- addr_width, /// address width
- axi_sgp_id_width, /// ID width
- C_S_AXI_GP1_BASEADDR,//// base address
- C_S_AXI_GP1_HIGHADDR,/// HIGh_addr
- axi_sgp_outstanding, // outstanding transactions
- axi_slv_excl_support, // exclusive access
- axi_sgp_wr_outstanding,
- axi_sgp_rd_outstanding)
- S_AXI_GP1(.S_RESETN (net_axi_gp1_rstn),
- .S_ACLK (S_AXI_GP1_ACLK),
- // Write Address Channel
- .S_AWID (S_AXI_GP1_AWID),
- .S_AWADDR (S_AXI_GP1_AWADDR),
- .S_AWLEN (S_AXI_GP1_AWLEN),
- .S_AWSIZE (S_AXI_GP1_AWSIZE),
- .S_AWBURST (S_AXI_GP1_AWBURST),
- .S_AWLOCK (S_AXI_GP1_AWLOCK),
- .S_AWCACHE (S_AXI_GP1_AWCACHE),
- .S_AWPROT (S_AXI_GP1_AWPROT),
- .S_AWVALID (S_AXI_GP1_AWVALID),
- .S_AWREADY (S_AXI_GP1_AWREADY),
- // Write Data Channel Signals.
- .S_WID (S_AXI_GP1_WID),
- .S_WDATA (S_AXI_GP1_WDATA),
- .S_WSTRB (S_AXI_GP1_WSTRB),
- .S_WLAST (S_AXI_GP1_WLAST),
- .S_WVALID (S_AXI_GP1_WVALID),
- .S_WREADY (S_AXI_GP1_WREADY),
- // Write Response Channel Signals.
- .S_BID (S_AXI_GP1_BID),
- .S_BRESP (S_AXI_GP1_BRESP),
- .S_BVALID (S_AXI_GP1_BVALID),
- .S_BREADY (S_AXI_GP1_BREADY),
- // Read Address Channel Signals.
- .S_ARID (S_AXI_GP1_ARID),
- .S_ARADDR (S_AXI_GP1_ARADDR),
- .S_ARLEN (S_AXI_GP1_ARLEN),
- .S_ARSIZE (S_AXI_GP1_ARSIZE),
- .S_ARBURST (S_AXI_GP1_ARBURST),
- .S_ARLOCK (S_AXI_GP1_ARLOCK),
- .S_ARCACHE (S_AXI_GP1_ARCACHE),
- .S_ARPROT (S_AXI_GP1_ARPROT),
- .S_ARVALID (S_AXI_GP1_ARVALID),
- .S_ARREADY (S_AXI_GP1_ARREADY),
- // Read Data Channel Signals.
- .S_RID (S_AXI_GP1_RID),
- .S_RDATA (S_AXI_GP1_RDATA),
- .S_RRESP (S_AXI_GP1_RRESP),
- .S_RLAST (S_AXI_GP1_RLAST),
- .S_RVALID (S_AXI_GP1_RVALID),
- .S_RREADY (S_AXI_GP1_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_GP1_AWQOS),
- .S_ARQOS (S_AXI_GP1_ARQOS),
-
- .SW_CLK (net_sw_clk),
- .WR_DATA_ACK_DDR (net_wr_ack_ddr_gp1),
- .WR_DATA_ACK_OCM (net_wr_ack_ocm_gp1),
- .WR_DATA (net_wr_data_gp1),
- .WR_DATA_STRB (net_wr_strb_gp1),
- .WR_ADDR (net_wr_addr_gp1),
- .WR_BYTES (net_wr_bytes_gp1),
- .WR_DATA_VALID_OCM (net_wr_dv_ocm_gp1),
- .WR_DATA_VALID_DDR (net_wr_dv_ddr_gp1),
- .WR_QOS (net_wr_qos_gp1),
- .RD_REQ_OCM (net_rd_req_ocm_gp1),
- .RD_REQ_DDR (net_rd_req_ddr_gp1),
- .RD_REQ_REG (net_rd_req_reg_gp1),
- .RD_ADDR (net_rd_addr_gp1),
- .RD_DATA_DDR (net_rd_data_ddr_gp1),
- .RD_DATA_OCM (net_rd_data_ocm_gp1),
- .RD_DATA_REG (net_rd_data_reg_gp1),
- .RD_BYTES (net_rd_bytes_gp1),
- .RD_DATA_VALID_OCM (net_rd_dv_ocm_gp1),
- .RD_DATA_VALID_DDR (net_rd_dv_ddr_gp1),
- .RD_DATA_VALID_REG (net_rd_dv_reg_gp1),
- .RD_QOS (net_rd_qos_gp1)
-
-);
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_hp.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_hp.v
deleted file mode 100755
index a96d4d7..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_axi_hp.v
+++ /dev/null
@@ -1,350 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_axi_hp.v
- *
- * Date : 2012-11
- *
- * Description : Connections for AXI HP ports
- *
- *****************************************************************************/
-
-/* AXI Slave HP0 */
- processing_system7_vip_v1_0_8_afi_slave #( C_USE_S_AXI_HP0, // enable
- axi_hp0_name, // name
- C_S_AXI_HP0_DATA_WIDTH, // data width
- addr_width, /// address width
- axi_hp_id_width, // ID width
- C_S_AXI_HP0_BASEADDR, // slave base address
- C_S_AXI_HP0_HIGHADDR, // slave size
- axi_hp_outstanding, // outstanding transactions // dynamic for AFI ports
- axi_slv_excl_support) // Exclusive access support
- S_AXI_HP0(.S_RESETN (net_axi_hp0_rstn),
- .S_ACLK (S_AXI_HP0_ACLK),
- // Write Address channel
- .S_AWID (S_AXI_HP0_AWID),
- .S_AWADDR (S_AXI_HP0_AWADDR),
- .S_AWLEN (S_AXI_HP0_AWLEN),
- .S_AWSIZE (S_AXI_HP0_AWSIZE),
- .S_AWBURST (S_AXI_HP0_AWBURST),
- .S_AWLOCK (S_AXI_HP0_AWLOCK),
- .S_AWCACHE (S_AXI_HP0_AWCACHE),
- .S_AWPROT (S_AXI_HP0_AWPROT),
- .S_AWVALID (S_AXI_HP0_AWVALID),
- .S_AWREADY (S_AXI_HP0_AWREADY),
- // Write Data channel signals.
- .S_WID (S_AXI_HP0_WID),
- .S_WDATA (S_AXI_HP0_WDATA),
- .S_WSTRB (S_AXI_HP0_WSTRB),
- .S_WLAST (S_AXI_HP0_WLAST),
- .S_WVALID (S_AXI_HP0_WVALID),
- .S_WREADY (S_AXI_HP0_WREADY),
- // Write Response channel signals.
- .S_BID (S_AXI_HP0_BID),
- .S_BRESP (S_AXI_HP0_BRESP),
- .S_BVALID (S_AXI_HP0_BVALID),
- .S_BREADY (S_AXI_HP0_BREADY),
- // Read Address channel signals.
- .S_ARID (S_AXI_HP0_ARID),
- .S_ARADDR (S_AXI_HP0_ARADDR),
- .S_ARLEN (S_AXI_HP0_ARLEN),
- .S_ARSIZE (S_AXI_HP0_ARSIZE),
- .S_ARBURST (S_AXI_HP0_ARBURST),
- .S_ARLOCK (S_AXI_HP0_ARLOCK),
- .S_ARCACHE (S_AXI_HP0_ARCACHE),
- .S_ARPROT (S_AXI_HP0_ARPROT),
- .S_ARVALID (S_AXI_HP0_ARVALID),
- .S_ARREADY (S_AXI_HP0_ARREADY),
- // Read Data channel signals.
- .S_RID (S_AXI_HP0_RID),
- .S_RDATA (S_AXI_HP0_RDATA),
- .S_RRESP (S_AXI_HP0_RRESP),
- .S_RLAST (S_AXI_HP0_RLAST),
- .S_RVALID (S_AXI_HP0_RVALID),
- .S_RREADY (S_AXI_HP0_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_HP0_AWQOS),
- .S_ARQOS (S_AXI_HP0_ARQOS),
- // these are needed only for HP ports
- .S_RDISSUECAP1_EN (S_AXI_HP0_RDISSUECAP1_EN),
- .S_WRISSUECAP1_EN (S_AXI_HP0_WRISSUECAP1_EN),
- .S_RCOUNT (S_AXI_HP0_RCOUNT),
- .S_WCOUNT (S_AXI_HP0_WCOUNT),
- .S_RACOUNT (S_AXI_HP0_RACOUNT),
- .S_WACOUNT (S_AXI_HP0_WACOUNT),
-
- .SW_CLK (net_sw_clk),
- .WR_DATA_ACK_DDR (net_wr_ack_ddr_hp0),
- .WR_DATA_ACK_OCM (net_wr_ack_ocm_hp0),
- .WR_DATA (net_wr_data_hp0),
- .WR_DATA_STRB (net_wr_strb_hp0),
- .WR_ADDR (net_wr_addr_hp0),
- .WR_BYTES (net_wr_bytes_hp0),
- .WR_DATA_VALID_DDR (net_wr_dv_ddr_hp0),
- .WR_DATA_VALID_OCM (net_wr_dv_ocm_hp0),
- .WR_QOS (net_wr_qos_hp0),
- .RD_REQ_DDR (net_rd_req_ddr_hp0),
- .RD_REQ_OCM (net_rd_req_ocm_hp0),
- .RD_ADDR (net_rd_addr_hp0),
- .RD_DATA_DDR (net_rd_data_ddr_hp0),
- .RD_DATA_OCM (net_rd_data_ocm_hp0),
- .RD_BYTES (net_rd_bytes_hp0),
- .RD_DATA_VALID_DDR (net_rd_dv_ddr_hp0),
- .RD_DATA_VALID_OCM (net_rd_dv_ocm_hp0),
- .RD_QOS (net_rd_qos_hp0)
- );
-
-/* AXI Slave HP1 */
- processing_system7_vip_v1_0_8_afi_slave #( C_USE_S_AXI_HP1, // enable
- axi_hp1_name, // name
- C_S_AXI_HP1_DATA_WIDTH, // data width
- addr_width, /// address width
- axi_hp_id_width, // ID width
- C_S_AXI_HP1_BASEADDR, // slave base address
- C_S_AXI_HP1_HIGHADDR, // Slave size
- axi_hp_outstanding, // outstanding transactions // dynamic for AFI ports
- axi_slv_excl_support) // Exclusive access support
- S_AXI_HP1(.S_RESETN (net_axi_hp1_rstn),
- .S_ACLK (S_AXI_HP1_ACLK),
- // Write Address channel
- .S_AWID (S_AXI_HP1_AWID),
- .S_AWADDR (S_AXI_HP1_AWADDR),
- .S_AWLEN (S_AXI_HP1_AWLEN),
- .S_AWSIZE (S_AXI_HP1_AWSIZE),
- .S_AWBURST (S_AXI_HP1_AWBURST),
- .S_AWLOCK (S_AXI_HP1_AWLOCK),
- .S_AWCACHE (S_AXI_HP1_AWCACHE),
- .S_AWPROT (S_AXI_HP1_AWPROT),
- .S_AWVALID (S_AXI_HP1_AWVALID),
- .S_AWREADY (S_AXI_HP1_AWREADY),
- // Write Data channel signals.
- .S_WID (S_AXI_HP1_WID),
- .S_WDATA (S_AXI_HP1_WDATA),
- .S_WSTRB (S_AXI_HP1_WSTRB),
- .S_WLAST (S_AXI_HP1_WLAST),
- .S_WVALID (S_AXI_HP1_WVALID),
- .S_WREADY (S_AXI_HP1_WREADY),
- // Write Response channel signals.
- .S_BID (S_AXI_HP1_BID),
- .S_BRESP (S_AXI_HP1_BRESP),
- .S_BVALID (S_AXI_HP1_BVALID),
- .S_BREADY (S_AXI_HP1_BREADY),
- // Read Address channel signals.
- .S_ARID (S_AXI_HP1_ARID),
- .S_ARADDR (S_AXI_HP1_ARADDR),
- .S_ARLEN (S_AXI_HP1_ARLEN),
- .S_ARSIZE (S_AXI_HP1_ARSIZE),
- .S_ARBURST (S_AXI_HP1_ARBURST),
- .S_ARLOCK (S_AXI_HP1_ARLOCK),
- .S_ARCACHE (S_AXI_HP1_ARCACHE),
- .S_ARPROT (S_AXI_HP1_ARPROT),
- .S_ARVALID (S_AXI_HP1_ARVALID),
- .S_ARREADY (S_AXI_HP1_ARREADY),
- // Read Data channel signals.
- .S_RID (S_AXI_HP1_RID),
- .S_RDATA (S_AXI_HP1_RDATA),
- .S_RRESP (S_AXI_HP1_RRESP),
- .S_RLAST (S_AXI_HP1_RLAST),
- .S_RVALID (S_AXI_HP1_RVALID),
- .S_RREADY (S_AXI_HP1_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_HP1_AWQOS),
- .S_ARQOS (S_AXI_HP1_ARQOS),
- // these are needed only for HP ports
- .S_RDISSUECAP1_EN (S_AXI_HP1_RDISSUECAP1_EN),
- .S_WRISSUECAP1_EN (S_AXI_HP1_WRISSUECAP1_EN),
- .S_RCOUNT (S_AXI_HP1_RCOUNT),
- .S_WCOUNT (S_AXI_HP1_WCOUNT),
- .S_RACOUNT (S_AXI_HP1_RACOUNT),
- .S_WACOUNT (S_AXI_HP1_WACOUNT),
-
- .SW_CLK (net_sw_clk),
- .WR_DATA_ACK_DDR (net_wr_ack_ddr_hp1),
- .WR_DATA_ACK_OCM (net_wr_ack_ocm_hp1),
- .WR_DATA (net_wr_data_hp1),
- .WR_DATA_STRB (net_wr_strb_hp1),
- .WR_ADDR (net_wr_addr_hp1),
- .WR_BYTES (net_wr_bytes_hp1),
- .WR_DATA_VALID_DDR (net_wr_dv_ddr_hp1),
- .WR_DATA_VALID_OCM (net_wr_dv_ocm_hp1),
- .WR_QOS (net_wr_qos_hp1),
- .RD_REQ_DDR (net_rd_req_ddr_hp1),
- .RD_REQ_OCM (net_rd_req_ocm_hp1),
- .RD_ADDR (net_rd_addr_hp1),
- .RD_DATA_DDR (net_rd_data_ddr_hp1),
- .RD_DATA_OCM (net_rd_data_ocm_hp1),
- .RD_BYTES (net_rd_bytes_hp1),
- .RD_DATA_VALID_DDR (net_rd_dv_ddr_hp1),
- .RD_DATA_VALID_OCM (net_rd_dv_ocm_hp1),
- .RD_QOS (net_rd_qos_hp1)
-
- );
-
-/* AXI Slave HP2 */
- processing_system7_vip_v1_0_8_afi_slave #( C_USE_S_AXI_HP2, // enable
- axi_hp2_name, // name
- C_S_AXI_HP2_DATA_WIDTH, // data width
- addr_width, /// address width
- axi_hp_id_width, // ID width
- C_S_AXI_HP2_BASEADDR, // slave base address
- C_S_AXI_HP2_HIGHADDR, // SLave size
- axi_hp_outstanding, // outstanding transactions // dynamic for AFI ports
- axi_slv_excl_support) // Exclusive access support
- S_AXI_HP2(.S_RESETN (net_axi_hp2_rstn),
- .S_ACLK (S_AXI_HP2_ACLK),
- // Write Address channel
- .S_AWID (S_AXI_HP2_AWID),
- .S_AWADDR (S_AXI_HP2_AWADDR),
- .S_AWLEN (S_AXI_HP2_AWLEN),
- .S_AWSIZE (S_AXI_HP2_AWSIZE),
- .S_AWBURST (S_AXI_HP2_AWBURST),
- .S_AWLOCK (S_AXI_HP2_AWLOCK),
- .S_AWCACHE (S_AXI_HP2_AWCACHE),
- .S_AWPROT (S_AXI_HP2_AWPROT),
- .S_AWVALID (S_AXI_HP2_AWVALID),
- .S_AWREADY (S_AXI_HP2_AWREADY),
- // Write Data channel signals.
- .S_WID (S_AXI_HP2_WID),
- .S_WDATA (S_AXI_HP2_WDATA),
- .S_WSTRB (S_AXI_HP2_WSTRB),
- .S_WLAST (S_AXI_HP2_WLAST),
- .S_WVALID (S_AXI_HP2_WVALID),
- .S_WREADY (S_AXI_HP2_WREADY),
- // Write Response channel signals.
- .S_BID (S_AXI_HP2_BID),
- .S_BRESP (S_AXI_HP2_BRESP),
- .S_BVALID (S_AXI_HP2_BVALID),
- .S_BREADY (S_AXI_HP2_BREADY),
- // Read Address channel signals.
- .S_ARID (S_AXI_HP2_ARID),
- .S_ARADDR (S_AXI_HP2_ARADDR),
- .S_ARLEN (S_AXI_HP2_ARLEN),
- .S_ARSIZE (S_AXI_HP2_ARSIZE),
- .S_ARBURST (S_AXI_HP2_ARBURST),
- .S_ARLOCK (S_AXI_HP2_ARLOCK),
- .S_ARCACHE (S_AXI_HP2_ARCACHE),
- .S_ARPROT (S_AXI_HP2_ARPROT),
- .S_ARVALID (S_AXI_HP2_ARVALID),
- .S_ARREADY (S_AXI_HP2_ARREADY),
- // Read Data channel signals.
- .S_RID (S_AXI_HP2_RID),
- .S_RDATA (S_AXI_HP2_RDATA),
- .S_RRESP (S_AXI_HP2_RRESP),
- .S_RLAST (S_AXI_HP2_RLAST),
- .S_RVALID (S_AXI_HP2_RVALID),
- .S_RREADY (S_AXI_HP2_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_HP2_AWQOS),
- .S_ARQOS (S_AXI_HP2_ARQOS),
- // these are needed only for HP ports
- .S_RDISSUECAP1_EN (S_AXI_HP2_RDISSUECAP1_EN),
- .S_WRISSUECAP1_EN (S_AXI_HP2_WRISSUECAP1_EN),
- .S_RCOUNT (S_AXI_HP2_RCOUNT),
- .S_WCOUNT (S_AXI_HP2_WCOUNT),
- .S_RACOUNT (S_AXI_HP2_RACOUNT),
- .S_WACOUNT (S_AXI_HP2_WACOUNT),
-
- .SW_CLK (net_sw_clk),
- .WR_DATA_ACK_DDR (net_wr_ack_ddr_hp2),
- .WR_DATA_ACK_OCM (net_wr_ack_ocm_hp2),
- .WR_DATA (net_wr_data_hp2),
- .WR_DATA_STRB (net_wr_strb_hp2),
- .WR_ADDR (net_wr_addr_hp2),
- .WR_BYTES (net_wr_bytes_hp2),
- .WR_DATA_VALID_DDR (net_wr_dv_ddr_hp2),
- .WR_DATA_VALID_OCM (net_wr_dv_ocm_hp2),
- .WR_QOS (net_wr_qos_hp2),
- .RD_REQ_DDR (net_rd_req_ddr_hp2),
- .RD_REQ_OCM (net_rd_req_ocm_hp2),
- .RD_ADDR (net_rd_addr_hp2),
- .RD_DATA_DDR (net_rd_data_ddr_hp2),
- .RD_DATA_OCM (net_rd_data_ocm_hp2),
- .RD_BYTES (net_rd_bytes_hp2),
- .RD_DATA_VALID_DDR (net_rd_dv_ddr_hp2),
- .RD_DATA_VALID_OCM (net_rd_dv_ocm_hp2),
- .RD_QOS (net_rd_qos_hp2)
-
- );
-
-/* AXI Slave HP3 */
- processing_system7_vip_v1_0_8_afi_slave #( C_USE_S_AXI_HP3, // enable
- axi_hp3_name, // name
- C_S_AXI_HP3_DATA_WIDTH, // data width
- addr_width, /// address width
- axi_hp_id_width, // ID width
- C_S_AXI_HP3_BASEADDR, // slave base address
- C_S_AXI_HP3_HIGHADDR, // SLave size
- axi_hp_outstanding, // outstanding transactions // dynamic for AFI ports
- axi_slv_excl_support) // Exclusive access support
- S_AXI_HP3(.S_RESETN (net_axi_hp3_rstn),
- .S_ACLK (S_AXI_HP3_ACLK),
- // Write ADDRESS CHANNEL
- .S_AWID (S_AXI_HP3_AWID),
- .S_AWADDR (S_AXI_HP3_AWADDR),
- .S_AWLEN (S_AXI_HP3_AWLEN),
- .S_AWSIZE (S_AXI_HP3_AWSIZE),
- .S_AWBURST (S_AXI_HP3_AWBURST),
- .S_AWLOCK (S_AXI_HP3_AWLOCK),
- .S_AWCACHE (S_AXI_HP3_AWCACHE),
- .S_AWPROT (S_AXI_HP3_AWPROT),
- .S_AWVALID (S_AXI_HP3_AWVALID),
- .S_AWREADY (S_AXI_HP3_AWREADY),
- // Write Data channel signals.
- .S_WID (S_AXI_HP3_WID),
- .S_WDATA (S_AXI_HP3_WDATA),
- .S_WSTRB (S_AXI_HP3_WSTRB),
- .S_WLAST (S_AXI_HP3_WLAST),
- .S_WVALID (S_AXI_HP3_WVALID),
- .S_WREADY (S_AXI_HP3_WREADY),
- // Write Response channel signals.
- .S_BID (S_AXI_HP3_BID),
- .S_BRESP (S_AXI_HP3_BRESP),
- .S_BVALID (S_AXI_HP3_BVALID),
- .S_BREADY (S_AXI_HP3_BREADY),
- // Read Address channel signals.
- .S_ARID (S_AXI_HP3_ARID),
- .S_ARADDR (S_AXI_HP3_ARADDR),
- .S_ARLEN (S_AXI_HP3_ARLEN),
- .S_ARSIZE (S_AXI_HP3_ARSIZE),
- .S_ARBURST (S_AXI_HP3_ARBURST),
- .S_ARLOCK (S_AXI_HP3_ARLOCK),
- .S_ARCACHE (S_AXI_HP3_ARCACHE),
- .S_ARPROT (S_AXI_HP3_ARPROT),
- .S_ARVALID (S_AXI_HP3_ARVALID),
- .S_ARREADY (S_AXI_HP3_ARREADY),
- // Read Data channel signals.
- .S_RID (S_AXI_HP3_RID),
- .S_RDATA (S_AXI_HP3_RDATA),
- .S_RRESP (S_AXI_HP3_RRESP),
- .S_RLAST (S_AXI_HP3_RLAST),
- .S_RVALID (S_AXI_HP3_RVALID),
- .S_RREADY (S_AXI_HP3_RREADY),
- // Side band signals
- .S_AWQOS (S_AXI_HP3_AWQOS),
- .S_ARQOS (S_AXI_HP3_ARQOS),
- // these are needed only for HP ports
- .S_RDISSUECAP1_EN (S_AXI_HP3_RDISSUECAP1_EN),
- .S_WRISSUECAP1_EN (S_AXI_HP3_WRISSUECAP1_EN),
- .S_RCOUNT (S_AXI_HP3_RCOUNT),
- .S_WCOUNT (S_AXI_HP3_WCOUNT),
- .S_RACOUNT (S_AXI_HP3_RACOUNT),
- .S_WACOUNT (S_AXI_HP3_WACOUNT),
-
- .SW_CLK (net_sw_clk),
- .WR_DATA_ACK_DDR (net_wr_ack_ddr_hp3),
- .WR_DATA_ACK_OCM (net_wr_ack_ocm_hp3),
- .WR_DATA (net_wr_data_hp3),
- .WR_DATA_STRB (net_wr_strb_hp3),
- .WR_ADDR (net_wr_addr_hp3),
- .WR_BYTES (net_wr_bytes_hp3),
- .WR_DATA_VALID_DDR (net_wr_dv_ddr_hp3),
- .WR_DATA_VALID_OCM (net_wr_dv_ocm_hp3),
- .WR_QOS (net_wr_qos_hp3),
- .RD_REQ_DDR (net_rd_req_ddr_hp3),
- .RD_REQ_OCM (net_rd_req_ocm_hp3),
- .RD_ADDR (net_rd_addr_hp3),
- .RD_DATA_DDR (net_rd_data_ddr_hp3),
- .RD_DATA_OCM (net_rd_data_ocm_hp3),
- .RD_BYTES (net_rd_bytes_hp3),
- .RD_DATA_VALID_DDR (net_rd_dv_ddr_hp3),
- .RD_DATA_VALID_OCM (net_rd_dv_ocm_hp3),
- .RD_QOS (net_rd_qos_hp3)
- );
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_local_params.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_local_params.v
deleted file mode 100755
index 3635125..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_local_params.v
+++ /dev/null
@@ -1,244 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_local_params.v
- *
- * Date : 2012-11
- *
- * Description : Parameters used in Zynq VIP
- *
- *****************************************************************************/
-
-
-/* local */
-parameter m_axi_gp0_baseaddr = 32'h4000_0000;
-parameter m_axi_gp1_baseaddr = 32'h8000_0000;
-parameter m_axi_gp0_highaddr = 32'h7FFF_FFFF;
-parameter m_axi_gp1_highaddr = 32'hBFFF_FFFF;
-
-parameter addr_width = 32; // maximum address width
-parameter data_width = 32; // maximum data width.
-parameter max_chars = 128; // max characters for file name
-parameter mem_width = data_width/8; /// memory width in bytes
-parameter shft_addr_bits = clogb2(mem_width); /// Address to be right shifted
-parameter int_width = 32; //integre width
-
-/* for internal read/write APIs used for data transfers */
-parameter max_burst_len = 16; /// maximum brst length on axi
-parameter max_data_width = 64; // maximum data width for internal AXI bursts
-parameter max_burst_bits = (max_data_width * max_burst_len); // maximum data width for internal AXI bursts
-parameter max_burst_bytes = (max_burst_bits)/8; // maximum data bytes in each transfer
-parameter max_burst_bytes_width = clogb2(max_burst_bytes); // maximum data width for internal AXI bursts
-
-parameter max_registers = 32;
-parameter max_regs_width = clogb2(max_registers);
-
-parameter REG_MEM = 2'b00, DDR_MEM = 2'b01, OCM_MEM = 2'b10, INVALID_MEM_TYPE = 2'b11;
-
-/* Interrupt bits supported */
-parameter irq_width = 16;
-
-/* GP Master0 & Master1 address decode */
-parameter GP_M0 = 2'b01;
-parameter GP_M1 = 2'b10;
-
-parameter ALL_RANDOM= 2'b00;
-parameter ALL_ZEROS = 2'b01;
-parameter ALL_ONES = 2'b10;
-
-parameter ddr_start_addr = 32'h0008_0000;
-parameter ddr_end_addr = 32'h7FFF_FFFF;
-
-parameter ocm_start_addr = 32'h0000_0000;
-parameter ocm_end_addr = 32'h0003_FFFF;
-parameter high_ocm_start_addr = 32'hFFFC_0000;
-parameter high_ocm_end_addr = 32'hFFFF_FFFF;
-parameter ocm_low_addr = 32'hFFFF_0000;
-
-parameter reg_start_addr = 32'hE000_0000;
-parameter reg_end_addr = 32'hF8F0_2F80;
-
-
-/* for Master port APIs and AXI protocol related signal widths*/
-parameter axi_burst_len = 16;
-parameter axi_len_width = clogb2(axi_burst_len);
-parameter axi_size_width = 3;
-parameter axi_brst_type_width = 2;
-parameter axi_lock_width = 2;
-parameter axi_cache_width = 4;
-parameter axi_prot_width = 3;
-parameter axi_rsp_width = 2;
-parameter axi_mgp_data_width = 32;
-parameter axi_mgp_id_width = 12;
-parameter axi_mgp_outstanding = 8;
-parameter axi_mgp_wr_id = 12'hC00;
-parameter axi_mgp_rd_id = 12'hC0C;
-parameter axi_mgp0_name = "M_AXI_GP0";
-parameter axi_mgp1_name = "M_AXI_GP1";
-parameter axi_qos_width = 4;
-parameter max_transfer_bytes = 256; // For Master APIs.
-parameter max_transfer_bytes_width = clogb2(max_transfer_bytes); // For Master APIs.
-
-
-/* for GP slave ports*/
-parameter axi_sgp_data_width = 32;
-parameter axi_sgp_id_width = 6;
-parameter axi_sgp_rd_outstanding = 8;
-parameter axi_sgp_wr_outstanding = 8;
-parameter axi_sgp_outstanding = axi_sgp_rd_outstanding + axi_sgp_wr_outstanding;
-parameter axi_sgp0_name = "S_AXI_GP0";
-parameter axi_sgp1_name = "S_AXI_GP1";
-
-/* for ACP slave ports*/
-parameter axi_acp_data_width = 64;
-parameter axi_acp_id_width = 3;
-parameter axi_acp_rd_outstanding = 7;
-parameter axi_acp_wr_outstanding = 3;
-parameter axi_acp_outstanding = axi_acp_rd_outstanding + axi_acp_wr_outstanding;
-parameter axi_acp_name = "S_AXI_ACP";
-
-/* for HP slave ports*/
-parameter axi_hp_id_width = 6;
-parameter axi_hp_outstanding = 256; /// dynamic based on RCOUNT, WCOUNT ..
-parameter axi_hp0_name = "S_AXI_HP0";
-parameter axi_hp1_name = "S_AXI_HP1";
-parameter axi_hp2_name = "S_AXI_HP2";
-parameter axi_hp3_name = "S_AXI_HP3";
-
-
-parameter axi_slv_excl_support = 0; // For Slave ports EXCL access is not supported
-parameter axi_mst_excl_support = 1; // For Master ports EXCL access is supported
-
-/* AXI transfer types */
-parameter AXI_FIXED = 2'b00;
-parameter AXI_INCR = 2'b01;
-parameter AXI_WRAP = 2'b10;
-
-/* Exclusive Access */
-parameter AXI_NRML = 2'b00;
-parameter AXI_EXCL = 2'b01;
-parameter AXI_LOCK = 2'b10;
-
-/* AXI Response types */
-parameter AXI_OK = 2'b00;
-parameter AXI_EXCL_OK = 2'b01;
-parameter AXI_SLV_ERR = 2'b10;
-parameter AXI_DEC_ERR = 2'b11;
-
-function automatic integer clogb2;
- input [31:0] value;
- begin
- value = value - 1;
- for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1) begin
- value = value >> 1;
- end
- end
-endfunction
-
-/* needed only for AFI modules and axi_slave modules for internal WRITE FIFOs and RESP FIFOs and interconnect fifo models */
- /* WR FIFO data */
- // parameter wr_fifo_data_bits = axi_qos_width + addr_width + max_burst_bits + (max_burst_bytes_width+1);
- // parameter wr_fifo_data_bits = axi_qos_width + addr_width + max_burst_bits + (max_burst_bytes_width+1);
- // parameter wr_fifo_data_bits = ((data_bus_width/8)*axi_burst_len) + (data_bus_width*axi_burst_len) + axi_qos_width + addr_width + (max_burst_bytes_width+1);
- // parameter wr_bytes_lsb = 0;
- // parameter wr_bytes_msb = max_burst_bytes_width;
- // parameter wr_addr_lsb = wr_bytes_msb + 1;
- // parameter wr_addr_msb = wr_addr_lsb + addr_width-1;
- // parameter wr_data_lsb = wr_addr_msb + 1;
- // parameter wr_data_msb = wr_data_lsb + max_burst_bits-1;
- // parameter wr_data_msb = wr_data_lsb + (data_bus_width*axi_burst_len)-1;
- // parameter wr_qos_lsb = wr_data_msb + 1;
- // `parameter wr_qos_msb = wr_qos_lsb + axi_qos_width-1;
-
- /* WR AFI FIFO data */
- /* ID - 1071:1066
- Resp - 1065:1064
- data - 1063:40
- address - 39:8
- valid_bytes - 7:0
- */
- // parameter wr_afi_fifo_data_bits = axi_qos_width + axi_len_width + axi_hp_id_width + axi_rsp_width + max_burst_bits + addr_width + (max_burst_bytes_width+1);
- // parameter wr_afi_bytes_lsb = 0;
- // parameter wr_afi_bytes_msb = max_burst_bytes_width;
- // parameter wr_afi_addr_lsb = wr_afi_bytes_msb + 1;
- // parameter wr_afi_addr_msb = wr_afi_addr_lsb + addr_width-1;
- // parameter wr_afi_data_lsb = wr_afi_addr_msb + 1;
- // parameter wr_afi_rsp_msb = wr_afi_rsp_lsb + axi_rsp_width-1;
- // parameter wr_afi_id_lsb = wr_afi_rsp_msb + 1;
- // parameter wr_afi_id_msb = wr_afi_id_lsb + axi_hp_id_width-1;
- // parameter wr_afi_ln_lsb = wr_afi_id_msb + 1;
- // parameter wr_afi_ln_msb = wr_afi_ln_lsb + axi_len_width-1;
- // parameter wr_afi_qos_lsb = wr_afi_ln_msb + 1;
- // parameter wr_afi_qos_msb = wr_afi_qos_lsb + axi_qos_width-1;
-
-
- parameter afi_fifo_size = 1024; /// AFI FIFO is stored as 1024-bytes
- parameter afi_fifo_databits = 64; /// AFI FIFO is stored as 64-bits i.e 8 bytes per location (8 bytes(64-bits) * 128 locations = 1024 bytes)
- parameter afi_fifo_locations= afi_fifo_size/(afi_fifo_databits/8); /// AFI FIFO is stored as 128-locations with 8 bytes per location
-
-/* for interconnect fifo models */
- parameter intr_max_outstanding = 8;
- parameter intr_cnt_width = clogb2(intr_max_outstanding)+1;
- parameter rd_info_bits = addr_width + axi_size_width + axi_brst_type_width + axi_len_width + axi_hp_id_width + axi_rsp_width + (max_burst_bytes_width+1);
- parameter rd_afi_fifo_bits = max_burst_bits + rd_info_bits ;
-
- //Read Burst Data, addr, size, burst, len, RID, RRESP, valid bytes
- parameter rd_afi_bytes_lsb = 0;
- parameter rd_afi_bytes_msb = max_burst_bytes_width;
- parameter rd_afi_rsp_lsb = rd_afi_bytes_msb + 1;
- parameter rd_afi_rsp_msb = rd_afi_rsp_lsb + axi_rsp_width-1;
- parameter rd_afi_id_lsb = rd_afi_rsp_msb + 1;
- parameter rd_afi_id_msb = rd_afi_id_lsb + axi_hp_id_width-1;
- parameter rd_afi_ln_lsb = rd_afi_id_msb + 1;
- parameter rd_afi_ln_msb = rd_afi_ln_lsb + axi_len_width-1;
- parameter rd_afi_brst_lsb = rd_afi_ln_msb + 1;
- parameter rd_afi_brst_msb = rd_afi_brst_lsb + axi_brst_type_width-1;
- parameter rd_afi_siz_lsb = rd_afi_brst_msb + 1;
- parameter rd_afi_siz_msb = rd_afi_siz_lsb + axi_size_width-1;
- parameter rd_afi_addr_lsb = rd_afi_siz_msb + 1;
- parameter rd_afi_addr_msb = rd_afi_addr_lsb + addr_width-1;
- parameter rd_afi_data_lsb = rd_afi_addr_msb + 1;
- parameter rd_afi_data_msb = rd_afi_data_lsb + max_burst_bits-1;
-
-
-/* Latency types */
- parameter BEST_CASE = 0;
- parameter AVG_CASE = 1;
- parameter WORST_CASE = 2;
- parameter RANDOM_CASE = 3;
-
-/* Latency Parameters ACP */
- parameter acp_wr_min = 21;
- parameter acp_wr_avg = 16;
- parameter acp_wr_max = 27;
- parameter acp_rd_min = 34;
- parameter acp_rd_avg = 125;
- parameter acp_rd_max = 130;
-
-/* Latency Parameters GP */
- parameter gp_wr_min = 21;
- parameter gp_wr_avg = 16;
- parameter gp_wr_max = 46;
- parameter gp_rd_min = 38;
- parameter gp_rd_avg = 125;
- parameter gp_rd_max = 130;
-
-/* Latency Parameters HP */
- parameter afi_wr_min = 37;
- parameter afi_wr_avg = 41;
- parameter afi_wr_max = 42;
- parameter afi_rd_min = 41;
- parameter afi_rd_avg = 221;
- parameter afi_rd_max = 229;
-
-/* ID VALID and INVALID */
- parameter secure_access_enabled = 0;
- parameter id_invalid = 0;
- parameter id_valid = 1;
-
-/* Display */
- parameter DISP_INFO = "*ZYNQ_VIP_INFO";
- parameter DISP_WARN = "*ZYNQ_VIP_WARNING";
- parameter DISP_ERR = "*ZYNQ_VIP_ERROR";
- parameter DISP_INT_INFO = "ZYNQ_VIP_INT_INFO";
-
- parameter all_strb_valid = 2048'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_init.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_init.v
deleted file mode 100755
index 72b4ff0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_init.v
+++ /dev/null
@@ -1,2924 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_reg_init.v
- *
- * Date : 2012-11
- *
- * Description : Initialize register default values.
- *
- *****************************************************************************/
-
-// Register default value info for chip pele_ps
-// This code was auto-generated by xregdb.py ver. 0.68, Thu Jul 12 10:32:25 2012
-// 54 modules, 2532 registers.
-
-
-// ************************************************************
-// Module afi0 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( afi0__AFI_RDCHAN_CTRL, val_afi0__AFI_RDCHAN_CTRL);
-set_reset_data( afi0__AFI_RDCHAN_ISSUINGCAP, val_afi0__AFI_RDCHAN_ISSUINGCAP);
-set_reset_data( afi0__AFI_RDQOS, val_afi0__AFI_RDQOS);
-set_reset_data( afi0__AFI_RDDATAFIFO_LEVEL, val_afi0__AFI_RDDATAFIFO_LEVEL);
-set_reset_data( afi0__AFI_RDDEBUG, val_afi0__AFI_RDDEBUG);
-set_reset_data( afi0__AFI_WRCHAN_CTRL, val_afi0__AFI_WRCHAN_CTRL);
-set_reset_data( afi0__AFI_WRCHAN_ISSUINGCAP, val_afi0__AFI_WRCHAN_ISSUINGCAP);
-set_reset_data( afi0__AFI_WRQOS, val_afi0__AFI_WRQOS);
-set_reset_data( afi0__AFI_WRDATAFIFO_LEVEL, val_afi0__AFI_WRDATAFIFO_LEVEL);
-set_reset_data( afi0__AFI_WRDEBUG, val_afi0__AFI_WRDEBUG);
-
-// ************************************************************
-// Module afi1 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( afi1__AFI_RDCHAN_CTRL, val_afi1__AFI_RDCHAN_CTRL);
-set_reset_data( afi1__AFI_RDCHAN_ISSUINGCAP, val_afi1__AFI_RDCHAN_ISSUINGCAP);
-set_reset_data( afi1__AFI_RDQOS, val_afi1__AFI_RDQOS);
-set_reset_data( afi1__AFI_RDDATAFIFO_LEVEL, val_afi1__AFI_RDDATAFIFO_LEVEL);
-set_reset_data( afi1__AFI_RDDEBUG, val_afi1__AFI_RDDEBUG);
-set_reset_data( afi1__AFI_WRCHAN_CTRL, val_afi1__AFI_WRCHAN_CTRL);
-set_reset_data( afi1__AFI_WRCHAN_ISSUINGCAP, val_afi1__AFI_WRCHAN_ISSUINGCAP);
-set_reset_data( afi1__AFI_WRQOS, val_afi1__AFI_WRQOS);
-set_reset_data( afi1__AFI_WRDATAFIFO_LEVEL, val_afi1__AFI_WRDATAFIFO_LEVEL);
-set_reset_data( afi1__AFI_WRDEBUG, val_afi1__AFI_WRDEBUG);
-
-// ************************************************************
-// Module afi2 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( afi2__AFI_RDCHAN_CTRL, val_afi2__AFI_RDCHAN_CTRL);
-set_reset_data( afi2__AFI_RDCHAN_ISSUINGCAP, val_afi2__AFI_RDCHAN_ISSUINGCAP);
-set_reset_data( afi2__AFI_RDQOS, val_afi2__AFI_RDQOS);
-set_reset_data( afi2__AFI_RDDATAFIFO_LEVEL, val_afi2__AFI_RDDATAFIFO_LEVEL);
-set_reset_data( afi2__AFI_RDDEBUG, val_afi2__AFI_RDDEBUG);
-set_reset_data( afi2__AFI_WRCHAN_CTRL, val_afi2__AFI_WRCHAN_CTRL);
-set_reset_data( afi2__AFI_WRCHAN_ISSUINGCAP, val_afi2__AFI_WRCHAN_ISSUINGCAP);
-set_reset_data( afi2__AFI_WRQOS, val_afi2__AFI_WRQOS);
-set_reset_data( afi2__AFI_WRDATAFIFO_LEVEL, val_afi2__AFI_WRDATAFIFO_LEVEL);
-set_reset_data( afi2__AFI_WRDEBUG, val_afi2__AFI_WRDEBUG);
-
-// ************************************************************
-// Module afi3 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( afi3__AFI_RDCHAN_CTRL, val_afi3__AFI_RDCHAN_CTRL);
-set_reset_data( afi3__AFI_RDCHAN_ISSUINGCAP, val_afi3__AFI_RDCHAN_ISSUINGCAP);
-set_reset_data( afi3__AFI_RDQOS, val_afi3__AFI_RDQOS);
-set_reset_data( afi3__AFI_RDDATAFIFO_LEVEL, val_afi3__AFI_RDDATAFIFO_LEVEL);
-set_reset_data( afi3__AFI_RDDEBUG, val_afi3__AFI_RDDEBUG);
-set_reset_data( afi3__AFI_WRCHAN_CTRL, val_afi3__AFI_WRCHAN_CTRL);
-set_reset_data( afi3__AFI_WRCHAN_ISSUINGCAP, val_afi3__AFI_WRCHAN_ISSUINGCAP);
-set_reset_data( afi3__AFI_WRQOS, val_afi3__AFI_WRQOS);
-set_reset_data( afi3__AFI_WRDATAFIFO_LEVEL, val_afi3__AFI_WRDATAFIFO_LEVEL);
-set_reset_data( afi3__AFI_WRDEBUG, val_afi3__AFI_WRDEBUG);
-
-// ************************************************************
-// Module can0 can
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( can0__SRR, val_can0__SRR);
-set_reset_data( can0__MSR, val_can0__MSR);
-set_reset_data( can0__BRPR, val_can0__BRPR);
-set_reset_data( can0__BTR, val_can0__BTR);
-set_reset_data( can0__ECR, val_can0__ECR);
-set_reset_data( can0__ESR, val_can0__ESR);
-set_reset_data( can0__SR, val_can0__SR);
-set_reset_data( can0__ISR, val_can0__ISR);
-set_reset_data( can0__IER, val_can0__IER);
-set_reset_data( can0__ICR, val_can0__ICR);
-set_reset_data( can0__TCR, val_can0__TCR);
-set_reset_data( can0__WIR, val_can0__WIR);
-set_reset_data( can0__TXFIFO_ID, val_can0__TXFIFO_ID);
-set_reset_data( can0__TXFIFO_DLC, val_can0__TXFIFO_DLC);
-set_reset_data( can0__TXFIFO_DATA1, val_can0__TXFIFO_DATA1);
-set_reset_data( can0__TXFIFO_DATA2, val_can0__TXFIFO_DATA2);
-set_reset_data( can0__TXHPB_ID, val_can0__TXHPB_ID);
-set_reset_data( can0__TXHPB_DLC, val_can0__TXHPB_DLC);
-set_reset_data( can0__TXHPB_DATA1, val_can0__TXHPB_DATA1);
-set_reset_data( can0__TXHPB_DATA2, val_can0__TXHPB_DATA2);
-set_reset_data( can0__RXFIFO_ID, val_can0__RXFIFO_ID);
-set_reset_data( can0__RXFIFO_DLC, val_can0__RXFIFO_DLC);
-set_reset_data( can0__RXFIFO_DATA1, val_can0__RXFIFO_DATA1);
-set_reset_data( can0__RXFIFO_DATA2, val_can0__RXFIFO_DATA2);
-set_reset_data( can0__AFR, val_can0__AFR);
-set_reset_data( can0__AFMR1, val_can0__AFMR1);
-set_reset_data( can0__AFIR1, val_can0__AFIR1);
-set_reset_data( can0__AFMR2, val_can0__AFMR2);
-set_reset_data( can0__AFIR2, val_can0__AFIR2);
-set_reset_data( can0__AFMR3, val_can0__AFMR3);
-set_reset_data( can0__AFIR3, val_can0__AFIR3);
-set_reset_data( can0__AFMR4, val_can0__AFMR4);
-set_reset_data( can0__AFIR4, val_can0__AFIR4);
-
-// ************************************************************
-// Module can1 can
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( can1__SRR, val_can1__SRR);
-set_reset_data( can1__MSR, val_can1__MSR);
-set_reset_data( can1__BRPR, val_can1__BRPR);
-set_reset_data( can1__BTR, val_can1__BTR);
-set_reset_data( can1__ECR, val_can1__ECR);
-set_reset_data( can1__ESR, val_can1__ESR);
-set_reset_data( can1__SR, val_can1__SR);
-set_reset_data( can1__ISR, val_can1__ISR);
-set_reset_data( can1__IER, val_can1__IER);
-set_reset_data( can1__ICR, val_can1__ICR);
-set_reset_data( can1__TCR, val_can1__TCR);
-set_reset_data( can1__WIR, val_can1__WIR);
-set_reset_data( can1__TXFIFO_ID, val_can1__TXFIFO_ID);
-set_reset_data( can1__TXFIFO_DLC, val_can1__TXFIFO_DLC);
-set_reset_data( can1__TXFIFO_DATA1, val_can1__TXFIFO_DATA1);
-set_reset_data( can1__TXFIFO_DATA2, val_can1__TXFIFO_DATA2);
-set_reset_data( can1__TXHPB_ID, val_can1__TXHPB_ID);
-set_reset_data( can1__TXHPB_DLC, val_can1__TXHPB_DLC);
-set_reset_data( can1__TXHPB_DATA1, val_can1__TXHPB_DATA1);
-set_reset_data( can1__TXHPB_DATA2, val_can1__TXHPB_DATA2);
-set_reset_data( can1__RXFIFO_ID, val_can1__RXFIFO_ID);
-set_reset_data( can1__RXFIFO_DLC, val_can1__RXFIFO_DLC);
-set_reset_data( can1__RXFIFO_DATA1, val_can1__RXFIFO_DATA1);
-set_reset_data( can1__RXFIFO_DATA2, val_can1__RXFIFO_DATA2);
-set_reset_data( can1__AFR, val_can1__AFR);
-set_reset_data( can1__AFMR1, val_can1__AFMR1);
-set_reset_data( can1__AFIR1, val_can1__AFIR1);
-set_reset_data( can1__AFMR2, val_can1__AFMR2);
-set_reset_data( can1__AFIR2, val_can1__AFIR2);
-set_reset_data( can1__AFMR3, val_can1__AFMR3);
-set_reset_data( can1__AFIR3, val_can1__AFIR3);
-set_reset_data( can1__AFMR4, val_can1__AFMR4);
-set_reset_data( can1__AFIR4, val_can1__AFIR4);
-
-// ************************************************************
-// Module ddrc ddrc
-// doc version: 1.25
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( ddrc__ddrc_ctrl, val_ddrc__ddrc_ctrl);
-set_reset_data( ddrc__Two_rank_cfg, val_ddrc__Two_rank_cfg);
-set_reset_data( ddrc__HPR_reg, val_ddrc__HPR_reg);
-set_reset_data( ddrc__LPR_reg, val_ddrc__LPR_reg);
-set_reset_data( ddrc__WR_reg, val_ddrc__WR_reg);
-set_reset_data( ddrc__DRAM_param_reg0, val_ddrc__DRAM_param_reg0);
-set_reset_data( ddrc__DRAM_param_reg1, val_ddrc__DRAM_param_reg1);
-set_reset_data( ddrc__DRAM_param_reg2, val_ddrc__DRAM_param_reg2);
-set_reset_data( ddrc__DRAM_param_reg3, val_ddrc__DRAM_param_reg3);
-set_reset_data( ddrc__DRAM_param_reg4, val_ddrc__DRAM_param_reg4);
-set_reset_data( ddrc__DRAM_init_param, val_ddrc__DRAM_init_param);
-set_reset_data( ddrc__DRAM_EMR_reg, val_ddrc__DRAM_EMR_reg);
-set_reset_data( ddrc__DRAM_EMR_MR_reg, val_ddrc__DRAM_EMR_MR_reg);
-set_reset_data( ddrc__DRAM_burst8_rdwr, val_ddrc__DRAM_burst8_rdwr);
-set_reset_data( ddrc__DRAM_disable_DQ, val_ddrc__DRAM_disable_DQ);
-set_reset_data( ddrc__DRAM_addr_map_bank, val_ddrc__DRAM_addr_map_bank);
-set_reset_data( ddrc__DRAM_addr_map_col, val_ddrc__DRAM_addr_map_col);
-set_reset_data( ddrc__DRAM_addr_map_row, val_ddrc__DRAM_addr_map_row);
-set_reset_data( ddrc__DRAM_ODT_reg, val_ddrc__DRAM_ODT_reg);
-set_reset_data( ddrc__phy_dbg_reg, val_ddrc__phy_dbg_reg);
-set_reset_data( ddrc__phy_cmd_timeout_rddata_cpt, val_ddrc__phy_cmd_timeout_rddata_cpt);
-set_reset_data( ddrc__mode_sts_reg, val_ddrc__mode_sts_reg);
-set_reset_data( ddrc__DLL_calib, val_ddrc__DLL_calib);
-set_reset_data( ddrc__ODT_delay_hold, val_ddrc__ODT_delay_hold);
-set_reset_data( ddrc__ctrl_reg1, val_ddrc__ctrl_reg1);
-set_reset_data( ddrc__ctrl_reg2, val_ddrc__ctrl_reg2);
-set_reset_data( ddrc__ctrl_reg3, val_ddrc__ctrl_reg3);
-set_reset_data( ddrc__ctrl_reg4, val_ddrc__ctrl_reg4);
-set_reset_data( ddrc__ctrl_reg5, val_ddrc__ctrl_reg5);
-set_reset_data( ddrc__ctrl_reg6, val_ddrc__ctrl_reg6);
-set_reset_data( ddrc__CHE_REFRESH_TIMER01, val_ddrc__CHE_REFRESH_TIMER01);
-set_reset_data( ddrc__CHE_T_ZQ, val_ddrc__CHE_T_ZQ);
-set_reset_data( ddrc__CHE_T_ZQ_Short_Interval_Reg, val_ddrc__CHE_T_ZQ_Short_Interval_Reg);
-set_reset_data( ddrc__deep_pwrdwn_reg, val_ddrc__deep_pwrdwn_reg);
-set_reset_data( ddrc__reg_2c, val_ddrc__reg_2c);
-set_reset_data( ddrc__reg_2d, val_ddrc__reg_2d);
-set_reset_data( ddrc__dfi_timing, val_ddrc__dfi_timing);
-set_reset_data( ddrc__refresh_timer_2, val_ddrc__refresh_timer_2);
-set_reset_data( ddrc__nc_timing, val_ddrc__nc_timing);
-set_reset_data( ddrc__CHE_ECC_CONTROL_REG_OFFSET, val_ddrc__CHE_ECC_CONTROL_REG_OFFSET);
-set_reset_data( ddrc__CHE_CORR_ECC_LOG_REG_OFFSET, val_ddrc__CHE_CORR_ECC_LOG_REG_OFFSET);
-set_reset_data( ddrc__CHE_CORR_ECC_ADDR_REG_OFFSET, val_ddrc__CHE_CORR_ECC_ADDR_REG_OFFSET);
-set_reset_data( ddrc__CHE_CORR_ECC_DATA_31_0_REG_OFFSET, val_ddrc__CHE_CORR_ECC_DATA_31_0_REG_OFFSET);
-set_reset_data( ddrc__CHE_CORR_ECC_DATA_63_32_REG_OFFSET, val_ddrc__CHE_CORR_ECC_DATA_63_32_REG_OFFSET);
-set_reset_data( ddrc__CHE_CORR_ECC_DATA_71_64_REG_OFFSET, val_ddrc__CHE_CORR_ECC_DATA_71_64_REG_OFFSET);
-set_reset_data( ddrc__CHE_UNCORR_ECC_LOG_REG_OFFSET, val_ddrc__CHE_UNCORR_ECC_LOG_REG_OFFSET);
-set_reset_data( ddrc__CHE_UNCORR_ECC_ADDR_REG_OFFSET, val_ddrc__CHE_UNCORR_ECC_ADDR_REG_OFFSET);
-set_reset_data( ddrc__CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET, val_ddrc__CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET);
-set_reset_data( ddrc__CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET, val_ddrc__CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET);
-set_reset_data( ddrc__CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET, val_ddrc__CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET);
-set_reset_data( ddrc__CHE_ECC_STATS_REG_OFFSET, val_ddrc__CHE_ECC_STATS_REG_OFFSET);
-set_reset_data( ddrc__ECC_scrub, val_ddrc__ECC_scrub);
-set_reset_data( ddrc__CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET, val_ddrc__CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET);
-set_reset_data( ddrc__CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET, val_ddrc__CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET);
-set_reset_data( ddrc__phy_rcvr_enable, val_ddrc__phy_rcvr_enable);
-set_reset_data( ddrc__PHY_Config0, val_ddrc__PHY_Config0);
-set_reset_data( ddrc__PHY_Config1, val_ddrc__PHY_Config1);
-set_reset_data( ddrc__PHY_Config2, val_ddrc__PHY_Config2);
-set_reset_data( ddrc__PHY_Config3, val_ddrc__PHY_Config3);
-set_reset_data( ddrc__phy_init_ratio0, val_ddrc__phy_init_ratio0);
-set_reset_data( ddrc__phy_init_ratio1, val_ddrc__phy_init_ratio1);
-set_reset_data( ddrc__phy_init_ratio2, val_ddrc__phy_init_ratio2);
-set_reset_data( ddrc__phy_init_ratio3, val_ddrc__phy_init_ratio3);
-set_reset_data( ddrc__phy_rd_dqs_cfg0, val_ddrc__phy_rd_dqs_cfg0);
-set_reset_data( ddrc__phy_rd_dqs_cfg1, val_ddrc__phy_rd_dqs_cfg1);
-set_reset_data( ddrc__phy_rd_dqs_cfg2, val_ddrc__phy_rd_dqs_cfg2);
-set_reset_data( ddrc__phy_rd_dqs_cfg3, val_ddrc__phy_rd_dqs_cfg3);
-set_reset_data( ddrc__phy_wr_dqs_cfg0, val_ddrc__phy_wr_dqs_cfg0);
-set_reset_data( ddrc__phy_wr_dqs_cfg1, val_ddrc__phy_wr_dqs_cfg1);
-set_reset_data( ddrc__phy_wr_dqs_cfg2, val_ddrc__phy_wr_dqs_cfg2);
-set_reset_data( ddrc__phy_wr_dqs_cfg3, val_ddrc__phy_wr_dqs_cfg3);
-set_reset_data( ddrc__phy_we_cfg0, val_ddrc__phy_we_cfg0);
-set_reset_data( ddrc__phy_we_cfg1, val_ddrc__phy_we_cfg1);
-set_reset_data( ddrc__phy_we_cfg2, val_ddrc__phy_we_cfg2);
-set_reset_data( ddrc__phy_we_cfg3, val_ddrc__phy_we_cfg3);
-set_reset_data( ddrc__wr_data_slv0, val_ddrc__wr_data_slv0);
-set_reset_data( ddrc__wr_data_slv1, val_ddrc__wr_data_slv1);
-set_reset_data( ddrc__wr_data_slv2, val_ddrc__wr_data_slv2);
-set_reset_data( ddrc__wr_data_slv3, val_ddrc__wr_data_slv3);
-set_reset_data( ddrc__reg_64, val_ddrc__reg_64);
-set_reset_data( ddrc__reg_65, val_ddrc__reg_65);
-set_reset_data( ddrc__reg69_6a0, val_ddrc__reg69_6a0);
-set_reset_data( ddrc__reg69_6a1, val_ddrc__reg69_6a1);
-set_reset_data( ddrc__reg6c_6d2, val_ddrc__reg6c_6d2);
-set_reset_data( ddrc__reg6c_6d3, val_ddrc__reg6c_6d3);
-set_reset_data( ddrc__reg6e_710, val_ddrc__reg6e_710);
-set_reset_data( ddrc__reg6e_711, val_ddrc__reg6e_711);
-set_reset_data( ddrc__reg6e_712, val_ddrc__reg6e_712);
-set_reset_data( ddrc__reg6e_713, val_ddrc__reg6e_713);
-set_reset_data( ddrc__phy_dll_sts0, val_ddrc__phy_dll_sts0);
-set_reset_data( ddrc__phy_dll_sts1, val_ddrc__phy_dll_sts1);
-set_reset_data( ddrc__phy_dll_sts2, val_ddrc__phy_dll_sts2);
-set_reset_data( ddrc__phy_dll_sts3, val_ddrc__phy_dll_sts3);
-set_reset_data( ddrc__dll_lock_sts, val_ddrc__dll_lock_sts);
-set_reset_data( ddrc__phy_ctrl_sts, val_ddrc__phy_ctrl_sts);
-set_reset_data( ddrc__phy_ctrl_sts_reg2, val_ddrc__phy_ctrl_sts_reg2);
-set_reset_data( ddrc__axi_id, val_ddrc__axi_id);
-set_reset_data( ddrc__page_mask, val_ddrc__page_mask);
-set_reset_data( ddrc__axi_priority_wr_port0, val_ddrc__axi_priority_wr_port0);
-set_reset_data( ddrc__axi_priority_wr_port1, val_ddrc__axi_priority_wr_port1);
-set_reset_data( ddrc__axi_priority_wr_port2, val_ddrc__axi_priority_wr_port2);
-set_reset_data( ddrc__axi_priority_wr_port3, val_ddrc__axi_priority_wr_port3);
-set_reset_data( ddrc__axi_priority_rd_port0, val_ddrc__axi_priority_rd_port0);
-set_reset_data( ddrc__axi_priority_rd_port1, val_ddrc__axi_priority_rd_port1);
-set_reset_data( ddrc__axi_priority_rd_port2, val_ddrc__axi_priority_rd_port2);
-set_reset_data( ddrc__axi_priority_rd_port3, val_ddrc__axi_priority_rd_port3);
-set_reset_data( ddrc__AHB_priority_cfg0, val_ddrc__AHB_priority_cfg0);
-set_reset_data( ddrc__AHB_priority_cfg1, val_ddrc__AHB_priority_cfg1);
-set_reset_data( ddrc__AHB_priority_cfg2, val_ddrc__AHB_priority_cfg2);
-set_reset_data( ddrc__AHB_priority_cfg3, val_ddrc__AHB_priority_cfg3);
-set_reset_data( ddrc__perf_mon0, val_ddrc__perf_mon0);
-set_reset_data( ddrc__perf_mon1, val_ddrc__perf_mon1);
-set_reset_data( ddrc__perf_mon2, val_ddrc__perf_mon2);
-set_reset_data( ddrc__perf_mon3, val_ddrc__perf_mon3);
-set_reset_data( ddrc__perf_mon20, val_ddrc__perf_mon20);
-set_reset_data( ddrc__perf_mon21, val_ddrc__perf_mon21);
-set_reset_data( ddrc__perf_mon22, val_ddrc__perf_mon22);
-set_reset_data( ddrc__perf_mon23, val_ddrc__perf_mon23);
-set_reset_data( ddrc__perf_mon30, val_ddrc__perf_mon30);
-set_reset_data( ddrc__perf_mon31, val_ddrc__perf_mon31);
-set_reset_data( ddrc__perf_mon32, val_ddrc__perf_mon32);
-set_reset_data( ddrc__perf_mon33, val_ddrc__perf_mon33);
-set_reset_data( ddrc__trusted_mem_cfg, val_ddrc__trusted_mem_cfg);
-set_reset_data( ddrc__excl_access_cfg0, val_ddrc__excl_access_cfg0);
-set_reset_data( ddrc__excl_access_cfg1, val_ddrc__excl_access_cfg1);
-set_reset_data( ddrc__excl_access_cfg2, val_ddrc__excl_access_cfg2);
-set_reset_data( ddrc__excl_access_cfg3, val_ddrc__excl_access_cfg3);
-set_reset_data( ddrc__mode_reg_read, val_ddrc__mode_reg_read);
-set_reset_data( ddrc__lpddr_ctrl0, val_ddrc__lpddr_ctrl0);
-set_reset_data( ddrc__lpddr_ctrl1, val_ddrc__lpddr_ctrl1);
-set_reset_data( ddrc__lpddr_ctrl2, val_ddrc__lpddr_ctrl2);
-set_reset_data( ddrc__lpddr_ctrl3, val_ddrc__lpddr_ctrl3);
-set_reset_data( ddrc__phy_wr_lvl_fsm, val_ddrc__phy_wr_lvl_fsm);
-set_reset_data( ddrc__phy_rd_lvl_fsm, val_ddrc__phy_rd_lvl_fsm);
-set_reset_data( ddrc__phy_gate_lvl_fsm, val_ddrc__phy_gate_lvl_fsm);
-
-// ************************************************************
-// Module debug_axim axim
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_axim__GLOBAL_CTRL, val_debug_axim__GLOBAL_CTRL);
-set_reset_data( debug_axim__GLOBAL_STATUS, val_debug_axim__GLOBAL_STATUS);
-set_reset_data( debug_axim__FILTER_CTRL, val_debug_axim__FILTER_CTRL);
-set_reset_data( debug_axim__TRIGGER_CTRL, val_debug_axim__TRIGGER_CTRL);
-set_reset_data( debug_axim__TRIGGER_STATUS, val_debug_axim__TRIGGER_STATUS);
-set_reset_data( debug_axim__PACKET_CTRL, val_debug_axim__PACKET_CTRL);
-set_reset_data( debug_axim__TOUT_CTRL, val_debug_axim__TOUT_CTRL);
-set_reset_data( debug_axim__TOUT_THRESH, val_debug_axim__TOUT_THRESH);
-set_reset_data( debug_axim__FIFO_CURRENT, val_debug_axim__FIFO_CURRENT);
-set_reset_data( debug_axim__FIFO_HYSTER, val_debug_axim__FIFO_HYSTER);
-set_reset_data( debug_axim__SYNC_CURRENT, val_debug_axim__SYNC_CURRENT);
-set_reset_data( debug_axim__SYNC_RELOAD, val_debug_axim__SYNC_RELOAD);
-set_reset_data( debug_axim__TSTMP_CURRENT, val_debug_axim__TSTMP_CURRENT);
-set_reset_data( debug_axim__ADDR0_MASK, val_debug_axim__ADDR0_MASK);
-set_reset_data( debug_axim__ADDR0_LOWER, val_debug_axim__ADDR0_LOWER);
-set_reset_data( debug_axim__ADDR0_UPPER, val_debug_axim__ADDR0_UPPER);
-set_reset_data( debug_axim__ADDR0_MISC, val_debug_axim__ADDR0_MISC);
-set_reset_data( debug_axim__ADDR1_MASK, val_debug_axim__ADDR1_MASK);
-set_reset_data( debug_axim__ADDR1_LOWER, val_debug_axim__ADDR1_LOWER);
-set_reset_data( debug_axim__ADDR1_UPPER, val_debug_axim__ADDR1_UPPER);
-set_reset_data( debug_axim__ADDR1_MISC, val_debug_axim__ADDR1_MISC);
-set_reset_data( debug_axim__ADDR2_MASK, val_debug_axim__ADDR2_MASK);
-set_reset_data( debug_axim__ADDR2_LOWER, val_debug_axim__ADDR2_LOWER);
-set_reset_data( debug_axim__ADDR2_UPPER, val_debug_axim__ADDR2_UPPER);
-set_reset_data( debug_axim__ADDR2_MISC, val_debug_axim__ADDR2_MISC);
-set_reset_data( debug_axim__ADDR3_MASK, val_debug_axim__ADDR3_MASK);
-set_reset_data( debug_axim__ADDR3_LOWER, val_debug_axim__ADDR3_LOWER);
-set_reset_data( debug_axim__ADDR3_UPPER, val_debug_axim__ADDR3_UPPER);
-set_reset_data( debug_axim__ADDR3_MISC, val_debug_axim__ADDR3_MISC);
-set_reset_data( debug_axim__ID0_MASK, val_debug_axim__ID0_MASK);
-set_reset_data( debug_axim__ID0_LOWER, val_debug_axim__ID0_LOWER);
-set_reset_data( debug_axim__ID0_UPPER, val_debug_axim__ID0_UPPER);
-set_reset_data( debug_axim__ID0_MISC, val_debug_axim__ID0_MISC);
-set_reset_data( debug_axim__ID1_MASK, val_debug_axim__ID1_MASK);
-set_reset_data( debug_axim__ID1_LOWER, val_debug_axim__ID1_LOWER);
-set_reset_data( debug_axim__ID1_UPPER, val_debug_axim__ID1_UPPER);
-set_reset_data( debug_axim__ID1_MISC, val_debug_axim__ID1_MISC);
-set_reset_data( debug_axim__ID2_MASK, val_debug_axim__ID2_MASK);
-set_reset_data( debug_axim__ID2_LOWER, val_debug_axim__ID2_LOWER);
-set_reset_data( debug_axim__ID2_UPPER, val_debug_axim__ID2_UPPER);
-set_reset_data( debug_axim__ID2_MISC, val_debug_axim__ID2_MISC);
-set_reset_data( debug_axim__ID3_MASK, val_debug_axim__ID3_MASK);
-set_reset_data( debug_axim__ID3_LOWER, val_debug_axim__ID3_LOWER);
-set_reset_data( debug_axim__ID3_UPPER, val_debug_axim__ID3_UPPER);
-set_reset_data( debug_axim__ID3_MISC, val_debug_axim__ID3_MISC);
-set_reset_data( debug_axim__AXI_SEL, val_debug_axim__AXI_SEL);
-set_reset_data( debug_axim__IT_TRIGOUT, val_debug_axim__IT_TRIGOUT);
-set_reset_data( debug_axim__IT_TRIGOUTACK, val_debug_axim__IT_TRIGOUTACK);
-set_reset_data( debug_axim__IT_TRIGIN, val_debug_axim__IT_TRIGIN);
-set_reset_data( debug_axim__IT_TRIGINACK, val_debug_axim__IT_TRIGINACK);
-set_reset_data( debug_axim__IT_ATBDATA, val_debug_axim__IT_ATBDATA);
-set_reset_data( debug_axim__IT_ATBSTATUS, val_debug_axim__IT_ATBSTATUS);
-set_reset_data( debug_axim__IT_ATBCTRL1, val_debug_axim__IT_ATBCTRL1);
-set_reset_data( debug_axim__IT_ATBCTRL0, val_debug_axim__IT_ATBCTRL0);
-set_reset_data( debug_axim__IT_CTRL, val_debug_axim__IT_CTRL);
-set_reset_data( debug_axim__CLAIM_SET, val_debug_axim__CLAIM_SET);
-set_reset_data( debug_axim__CLAIM_CLEAR, val_debug_axim__CLAIM_CLEAR);
-set_reset_data( debug_axim__LOCK_ACCESS, val_debug_axim__LOCK_ACCESS);
-set_reset_data( debug_axim__LOCK_STATUS, val_debug_axim__LOCK_STATUS);
-set_reset_data( debug_axim__AUTH_STATUS, val_debug_axim__AUTH_STATUS);
-set_reset_data( debug_axim__DEV_ID, val_debug_axim__DEV_ID);
-set_reset_data( debug_axim__DEV_TYPE, val_debug_axim__DEV_TYPE);
-set_reset_data( debug_axim__PERIPHID4, val_debug_axim__PERIPHID4);
-set_reset_data( debug_axim__PERIPHID5, val_debug_axim__PERIPHID5);
-set_reset_data( debug_axim__PERIPHID6, val_debug_axim__PERIPHID6);
-set_reset_data( debug_axim__PERIPHID7, val_debug_axim__PERIPHID7);
-set_reset_data( debug_axim__PERIPHID0, val_debug_axim__PERIPHID0);
-set_reset_data( debug_axim__PERIPHID1, val_debug_axim__PERIPHID1);
-set_reset_data( debug_axim__PERIPHID2, val_debug_axim__PERIPHID2);
-set_reset_data( debug_axim__PERIPHID3, val_debug_axim__PERIPHID3);
-set_reset_data( debug_axim__COMPID0, val_debug_axim__COMPID0);
-set_reset_data( debug_axim__COMPID1, val_debug_axim__COMPID1);
-set_reset_data( debug_axim__COMPID2, val_debug_axim__COMPID2);
-set_reset_data( debug_axim__COMPID3, val_debug_axim__COMPID3);
-
-// ************************************************************
-// Module debug_cpu_cti0 cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cpu_cti0__CTICONTROL, val_debug_cpu_cti0__CTICONTROL);
-set_reset_data( debug_cpu_cti0__CTIINTACK, val_debug_cpu_cti0__CTIINTACK);
-set_reset_data( debug_cpu_cti0__CTIAPPSET, val_debug_cpu_cti0__CTIAPPSET);
-set_reset_data( debug_cpu_cti0__CTIAPPCLEAR, val_debug_cpu_cti0__CTIAPPCLEAR);
-set_reset_data( debug_cpu_cti0__CTIAPPPULSE, val_debug_cpu_cti0__CTIAPPPULSE);
-set_reset_data( debug_cpu_cti0__CTIINEN0, val_debug_cpu_cti0__CTIINEN0);
-set_reset_data( debug_cpu_cti0__CTIINEN1, val_debug_cpu_cti0__CTIINEN1);
-set_reset_data( debug_cpu_cti0__CTIINEN2, val_debug_cpu_cti0__CTIINEN2);
-set_reset_data( debug_cpu_cti0__CTIINEN3, val_debug_cpu_cti0__CTIINEN3);
-set_reset_data( debug_cpu_cti0__CTIINEN4, val_debug_cpu_cti0__CTIINEN4);
-set_reset_data( debug_cpu_cti0__CTIINEN5, val_debug_cpu_cti0__CTIINEN5);
-set_reset_data( debug_cpu_cti0__CTIINEN6, val_debug_cpu_cti0__CTIINEN6);
-set_reset_data( debug_cpu_cti0__CTIINEN7, val_debug_cpu_cti0__CTIINEN7);
-set_reset_data( debug_cpu_cti0__CTIOUTEN0, val_debug_cpu_cti0__CTIOUTEN0);
-set_reset_data( debug_cpu_cti0__CTIOUTEN1, val_debug_cpu_cti0__CTIOUTEN1);
-set_reset_data( debug_cpu_cti0__CTIOUTEN2, val_debug_cpu_cti0__CTIOUTEN2);
-set_reset_data( debug_cpu_cti0__CTIOUTEN3, val_debug_cpu_cti0__CTIOUTEN3);
-set_reset_data( debug_cpu_cti0__CTIOUTEN4, val_debug_cpu_cti0__CTIOUTEN4);
-set_reset_data( debug_cpu_cti0__CTIOUTEN5, val_debug_cpu_cti0__CTIOUTEN5);
-set_reset_data( debug_cpu_cti0__CTIOUTEN6, val_debug_cpu_cti0__CTIOUTEN6);
-set_reset_data( debug_cpu_cti0__CTIOUTEN7, val_debug_cpu_cti0__CTIOUTEN7);
-set_reset_data( debug_cpu_cti0__CTITRIGINSTATUS, val_debug_cpu_cti0__CTITRIGINSTATUS);
-set_reset_data( debug_cpu_cti0__CTITRIGOUTSTATUS, val_debug_cpu_cti0__CTITRIGOUTSTATUS);
-set_reset_data( debug_cpu_cti0__CTICHINSTATUS, val_debug_cpu_cti0__CTICHINSTATUS);
-set_reset_data( debug_cpu_cti0__CTICHOUTSTATUS, val_debug_cpu_cti0__CTICHOUTSTATUS);
-set_reset_data( debug_cpu_cti0__CTIGATE, val_debug_cpu_cti0__CTIGATE);
-set_reset_data( debug_cpu_cti0__ASICCTL, val_debug_cpu_cti0__ASICCTL);
-set_reset_data( debug_cpu_cti0__ITCHINACK, val_debug_cpu_cti0__ITCHINACK);
-set_reset_data( debug_cpu_cti0__ITTRIGINACK, val_debug_cpu_cti0__ITTRIGINACK);
-set_reset_data( debug_cpu_cti0__ITCHOUT, val_debug_cpu_cti0__ITCHOUT);
-set_reset_data( debug_cpu_cti0__ITTRIGOUT, val_debug_cpu_cti0__ITTRIGOUT);
-set_reset_data( debug_cpu_cti0__ITCHOUTACK, val_debug_cpu_cti0__ITCHOUTACK);
-set_reset_data( debug_cpu_cti0__ITTRIGOUTACK, val_debug_cpu_cti0__ITTRIGOUTACK);
-set_reset_data( debug_cpu_cti0__ITCHIN, val_debug_cpu_cti0__ITCHIN);
-set_reset_data( debug_cpu_cti0__ITTRIGIN, val_debug_cpu_cti0__ITTRIGIN);
-set_reset_data( debug_cpu_cti0__ITCTRL, val_debug_cpu_cti0__ITCTRL);
-set_reset_data( debug_cpu_cti0__CTSR, val_debug_cpu_cti0__CTSR);
-set_reset_data( debug_cpu_cti0__CTCR, val_debug_cpu_cti0__CTCR);
-set_reset_data( debug_cpu_cti0__LAR, val_debug_cpu_cti0__LAR);
-set_reset_data( debug_cpu_cti0__LSR, val_debug_cpu_cti0__LSR);
-set_reset_data( debug_cpu_cti0__ASR, val_debug_cpu_cti0__ASR);
-set_reset_data( debug_cpu_cti0__DEVID, val_debug_cpu_cti0__DEVID);
-set_reset_data( debug_cpu_cti0__DTIR, val_debug_cpu_cti0__DTIR);
-set_reset_data( debug_cpu_cti0__PERIPHID4, val_debug_cpu_cti0__PERIPHID4);
-set_reset_data( debug_cpu_cti0__PERIPHID5, val_debug_cpu_cti0__PERIPHID5);
-set_reset_data( debug_cpu_cti0__PERIPHID6, val_debug_cpu_cti0__PERIPHID6);
-set_reset_data( debug_cpu_cti0__PERIPHID7, val_debug_cpu_cti0__PERIPHID7);
-set_reset_data( debug_cpu_cti0__PERIPHID0, val_debug_cpu_cti0__PERIPHID0);
-set_reset_data( debug_cpu_cti0__PERIPHID1, val_debug_cpu_cti0__PERIPHID1);
-set_reset_data( debug_cpu_cti0__PERIPHID2, val_debug_cpu_cti0__PERIPHID2);
-set_reset_data( debug_cpu_cti0__PERIPHID3, val_debug_cpu_cti0__PERIPHID3);
-set_reset_data( debug_cpu_cti0__COMPID0, val_debug_cpu_cti0__COMPID0);
-set_reset_data( debug_cpu_cti0__COMPID1, val_debug_cpu_cti0__COMPID1);
-set_reset_data( debug_cpu_cti0__COMPID2, val_debug_cpu_cti0__COMPID2);
-set_reset_data( debug_cpu_cti0__COMPID3, val_debug_cpu_cti0__COMPID3);
-
-// ************************************************************
-// Module debug_cpu_cti1 cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cpu_cti1__CTICONTROL, val_debug_cpu_cti1__CTICONTROL);
-set_reset_data( debug_cpu_cti1__CTIINTACK, val_debug_cpu_cti1__CTIINTACK);
-set_reset_data( debug_cpu_cti1__CTIAPPSET, val_debug_cpu_cti1__CTIAPPSET);
-set_reset_data( debug_cpu_cti1__CTIAPPCLEAR, val_debug_cpu_cti1__CTIAPPCLEAR);
-set_reset_data( debug_cpu_cti1__CTIAPPPULSE, val_debug_cpu_cti1__CTIAPPPULSE);
-set_reset_data( debug_cpu_cti1__CTIINEN0, val_debug_cpu_cti1__CTIINEN0);
-set_reset_data( debug_cpu_cti1__CTIINEN1, val_debug_cpu_cti1__CTIINEN1);
-set_reset_data( debug_cpu_cti1__CTIINEN2, val_debug_cpu_cti1__CTIINEN2);
-set_reset_data( debug_cpu_cti1__CTIINEN3, val_debug_cpu_cti1__CTIINEN3);
-set_reset_data( debug_cpu_cti1__CTIINEN4, val_debug_cpu_cti1__CTIINEN4);
-set_reset_data( debug_cpu_cti1__CTIINEN5, val_debug_cpu_cti1__CTIINEN5);
-set_reset_data( debug_cpu_cti1__CTIINEN6, val_debug_cpu_cti1__CTIINEN6);
-set_reset_data( debug_cpu_cti1__CTIINEN7, val_debug_cpu_cti1__CTIINEN7);
-set_reset_data( debug_cpu_cti1__CTIOUTEN0, val_debug_cpu_cti1__CTIOUTEN0);
-set_reset_data( debug_cpu_cti1__CTIOUTEN1, val_debug_cpu_cti1__CTIOUTEN1);
-set_reset_data( debug_cpu_cti1__CTIOUTEN2, val_debug_cpu_cti1__CTIOUTEN2);
-set_reset_data( debug_cpu_cti1__CTIOUTEN3, val_debug_cpu_cti1__CTIOUTEN3);
-set_reset_data( debug_cpu_cti1__CTIOUTEN4, val_debug_cpu_cti1__CTIOUTEN4);
-set_reset_data( debug_cpu_cti1__CTIOUTEN5, val_debug_cpu_cti1__CTIOUTEN5);
-set_reset_data( debug_cpu_cti1__CTIOUTEN6, val_debug_cpu_cti1__CTIOUTEN6);
-set_reset_data( debug_cpu_cti1__CTIOUTEN7, val_debug_cpu_cti1__CTIOUTEN7);
-set_reset_data( debug_cpu_cti1__CTITRIGINSTATUS, val_debug_cpu_cti1__CTITRIGINSTATUS);
-set_reset_data( debug_cpu_cti1__CTITRIGOUTSTATUS, val_debug_cpu_cti1__CTITRIGOUTSTATUS);
-set_reset_data( debug_cpu_cti1__CTICHINSTATUS, val_debug_cpu_cti1__CTICHINSTATUS);
-set_reset_data( debug_cpu_cti1__CTICHOUTSTATUS, val_debug_cpu_cti1__CTICHOUTSTATUS);
-set_reset_data( debug_cpu_cti1__CTIGATE, val_debug_cpu_cti1__CTIGATE);
-set_reset_data( debug_cpu_cti1__ASICCTL, val_debug_cpu_cti1__ASICCTL);
-set_reset_data( debug_cpu_cti1__ITCHINACK, val_debug_cpu_cti1__ITCHINACK);
-set_reset_data( debug_cpu_cti1__ITTRIGINACK, val_debug_cpu_cti1__ITTRIGINACK);
-set_reset_data( debug_cpu_cti1__ITCHOUT, val_debug_cpu_cti1__ITCHOUT);
-set_reset_data( debug_cpu_cti1__ITTRIGOUT, val_debug_cpu_cti1__ITTRIGOUT);
-set_reset_data( debug_cpu_cti1__ITCHOUTACK, val_debug_cpu_cti1__ITCHOUTACK);
-set_reset_data( debug_cpu_cti1__ITTRIGOUTACK, val_debug_cpu_cti1__ITTRIGOUTACK);
-set_reset_data( debug_cpu_cti1__ITCHIN, val_debug_cpu_cti1__ITCHIN);
-set_reset_data( debug_cpu_cti1__ITTRIGIN, val_debug_cpu_cti1__ITTRIGIN);
-set_reset_data( debug_cpu_cti1__ITCTRL, val_debug_cpu_cti1__ITCTRL);
-set_reset_data( debug_cpu_cti1__CTSR, val_debug_cpu_cti1__CTSR);
-set_reset_data( debug_cpu_cti1__CTCR, val_debug_cpu_cti1__CTCR);
-set_reset_data( debug_cpu_cti1__LAR, val_debug_cpu_cti1__LAR);
-set_reset_data( debug_cpu_cti1__LSR, val_debug_cpu_cti1__LSR);
-set_reset_data( debug_cpu_cti1__ASR, val_debug_cpu_cti1__ASR);
-set_reset_data( debug_cpu_cti1__DEVID, val_debug_cpu_cti1__DEVID);
-set_reset_data( debug_cpu_cti1__DTIR, val_debug_cpu_cti1__DTIR);
-set_reset_data( debug_cpu_cti1__PERIPHID4, val_debug_cpu_cti1__PERIPHID4);
-set_reset_data( debug_cpu_cti1__PERIPHID5, val_debug_cpu_cti1__PERIPHID5);
-set_reset_data( debug_cpu_cti1__PERIPHID6, val_debug_cpu_cti1__PERIPHID6);
-set_reset_data( debug_cpu_cti1__PERIPHID7, val_debug_cpu_cti1__PERIPHID7);
-set_reset_data( debug_cpu_cti1__PERIPHID0, val_debug_cpu_cti1__PERIPHID0);
-set_reset_data( debug_cpu_cti1__PERIPHID1, val_debug_cpu_cti1__PERIPHID1);
-set_reset_data( debug_cpu_cti1__PERIPHID2, val_debug_cpu_cti1__PERIPHID2);
-set_reset_data( debug_cpu_cti1__PERIPHID3, val_debug_cpu_cti1__PERIPHID3);
-set_reset_data( debug_cpu_cti1__COMPID0, val_debug_cpu_cti1__COMPID0);
-set_reset_data( debug_cpu_cti1__COMPID1, val_debug_cpu_cti1__COMPID1);
-set_reset_data( debug_cpu_cti1__COMPID2, val_debug_cpu_cti1__COMPID2);
-set_reset_data( debug_cpu_cti1__COMPID3, val_debug_cpu_cti1__COMPID3);
-
-// ************************************************************
-// Module debug_cpu_pmu0 cortexa9_pmu
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cpu_pmu0__PMXEVCNTR0, val_debug_cpu_pmu0__PMXEVCNTR0);
-set_reset_data( debug_cpu_pmu0__PMXEVCNTR1, val_debug_cpu_pmu0__PMXEVCNTR1);
-set_reset_data( debug_cpu_pmu0__PMXEVCNTR2, val_debug_cpu_pmu0__PMXEVCNTR2);
-set_reset_data( debug_cpu_pmu0__PMXEVCNTR3, val_debug_cpu_pmu0__PMXEVCNTR3);
-set_reset_data( debug_cpu_pmu0__PMXEVCNTR4, val_debug_cpu_pmu0__PMXEVCNTR4);
-set_reset_data( debug_cpu_pmu0__PMXEVCNTR5, val_debug_cpu_pmu0__PMXEVCNTR5);
-set_reset_data( debug_cpu_pmu0__PMCCNTR, val_debug_cpu_pmu0__PMCCNTR);
-set_reset_data( debug_cpu_pmu0__PMXEVTYPER0, val_debug_cpu_pmu0__PMXEVTYPER0);
-set_reset_data( debug_cpu_pmu0__PMXEVTYPER1, val_debug_cpu_pmu0__PMXEVTYPER1);
-set_reset_data( debug_cpu_pmu0__PMXEVTYPER2, val_debug_cpu_pmu0__PMXEVTYPER2);
-set_reset_data( debug_cpu_pmu0__PMXEVTYPER3, val_debug_cpu_pmu0__PMXEVTYPER3);
-set_reset_data( debug_cpu_pmu0__PMXEVTYPER4, val_debug_cpu_pmu0__PMXEVTYPER4);
-set_reset_data( debug_cpu_pmu0__PMXEVTYPER5, val_debug_cpu_pmu0__PMXEVTYPER5);
-set_reset_data( debug_cpu_pmu0__PMCNTENSET, val_debug_cpu_pmu0__PMCNTENSET);
-set_reset_data( debug_cpu_pmu0__PMCNTENCLR, val_debug_cpu_pmu0__PMCNTENCLR);
-set_reset_data( debug_cpu_pmu0__PMINTENSET, val_debug_cpu_pmu0__PMINTENSET);
-set_reset_data( debug_cpu_pmu0__PMINTENCLR, val_debug_cpu_pmu0__PMINTENCLR);
-set_reset_data( debug_cpu_pmu0__PMOVSR, val_debug_cpu_pmu0__PMOVSR);
-set_reset_data( debug_cpu_pmu0__PMSWINC, val_debug_cpu_pmu0__PMSWINC);
-set_reset_data( debug_cpu_pmu0__PMCR, val_debug_cpu_pmu0__PMCR);
-set_reset_data( debug_cpu_pmu0__PMUSERENR, val_debug_cpu_pmu0__PMUSERENR);
-
-// ************************************************************
-// Module debug_cpu_pmu1 cortexa9_pmu
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cpu_pmu1__PMXEVCNTR0, val_debug_cpu_pmu1__PMXEVCNTR0);
-set_reset_data( debug_cpu_pmu1__PMXEVCNTR1, val_debug_cpu_pmu1__PMXEVCNTR1);
-set_reset_data( debug_cpu_pmu1__PMXEVCNTR2, val_debug_cpu_pmu1__PMXEVCNTR2);
-set_reset_data( debug_cpu_pmu1__PMXEVCNTR3, val_debug_cpu_pmu1__PMXEVCNTR3);
-set_reset_data( debug_cpu_pmu1__PMXEVCNTR4, val_debug_cpu_pmu1__PMXEVCNTR4);
-set_reset_data( debug_cpu_pmu1__PMXEVCNTR5, val_debug_cpu_pmu1__PMXEVCNTR5);
-set_reset_data( debug_cpu_pmu1__PMCCNTR, val_debug_cpu_pmu1__PMCCNTR);
-set_reset_data( debug_cpu_pmu1__PMXEVTYPER0, val_debug_cpu_pmu1__PMXEVTYPER0);
-set_reset_data( debug_cpu_pmu1__PMXEVTYPER1, val_debug_cpu_pmu1__PMXEVTYPER1);
-set_reset_data( debug_cpu_pmu1__PMXEVTYPER2, val_debug_cpu_pmu1__PMXEVTYPER2);
-set_reset_data( debug_cpu_pmu1__PMXEVTYPER3, val_debug_cpu_pmu1__PMXEVTYPER3);
-set_reset_data( debug_cpu_pmu1__PMXEVTYPER4, val_debug_cpu_pmu1__PMXEVTYPER4);
-set_reset_data( debug_cpu_pmu1__PMXEVTYPER5, val_debug_cpu_pmu1__PMXEVTYPER5);
-set_reset_data( debug_cpu_pmu1__PMCNTENSET, val_debug_cpu_pmu1__PMCNTENSET);
-set_reset_data( debug_cpu_pmu1__PMCNTENCLR, val_debug_cpu_pmu1__PMCNTENCLR);
-set_reset_data( debug_cpu_pmu1__PMINTENSET, val_debug_cpu_pmu1__PMINTENSET);
-set_reset_data( debug_cpu_pmu1__PMINTENCLR, val_debug_cpu_pmu1__PMINTENCLR);
-set_reset_data( debug_cpu_pmu1__PMOVSR, val_debug_cpu_pmu1__PMOVSR);
-set_reset_data( debug_cpu_pmu1__PMSWINC, val_debug_cpu_pmu1__PMSWINC);
-set_reset_data( debug_cpu_pmu1__PMCR, val_debug_cpu_pmu1__PMCR);
-set_reset_data( debug_cpu_pmu1__PMUSERENR, val_debug_cpu_pmu1__PMUSERENR);
-
-// ************************************************************
-// Module debug_cpu_ptm0 ptm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cpu_ptm0__ETMCR, val_debug_cpu_ptm0__ETMCR);
-set_reset_data( debug_cpu_ptm0__ETMCCR, val_debug_cpu_ptm0__ETMCCR);
-set_reset_data( debug_cpu_ptm0__ETMTRIGGER, val_debug_cpu_ptm0__ETMTRIGGER);
-set_reset_data( debug_cpu_ptm0__ETMSR, val_debug_cpu_ptm0__ETMSR);
-set_reset_data( debug_cpu_ptm0__ETMSCR, val_debug_cpu_ptm0__ETMSCR);
-set_reset_data( debug_cpu_ptm0__ETMTSSCR, val_debug_cpu_ptm0__ETMTSSCR);
-set_reset_data( debug_cpu_ptm0__ETMTECR1, val_debug_cpu_ptm0__ETMTECR1);
-set_reset_data( debug_cpu_ptm0__ETMACVR1, val_debug_cpu_ptm0__ETMACVR1);
-set_reset_data( debug_cpu_ptm0__ETMACVR2, val_debug_cpu_ptm0__ETMACVR2);
-set_reset_data( debug_cpu_ptm0__ETMACVR3, val_debug_cpu_ptm0__ETMACVR3);
-set_reset_data( debug_cpu_ptm0__ETMACVR4, val_debug_cpu_ptm0__ETMACVR4);
-set_reset_data( debug_cpu_ptm0__ETMACVR5, val_debug_cpu_ptm0__ETMACVR5);
-set_reset_data( debug_cpu_ptm0__ETMACVR6, val_debug_cpu_ptm0__ETMACVR6);
-set_reset_data( debug_cpu_ptm0__ETMACVR7, val_debug_cpu_ptm0__ETMACVR7);
-set_reset_data( debug_cpu_ptm0__ETMACVR8, val_debug_cpu_ptm0__ETMACVR8);
-set_reset_data( debug_cpu_ptm0__ETMACTR1, val_debug_cpu_ptm0__ETMACTR1);
-set_reset_data( debug_cpu_ptm0__ETMACTR2, val_debug_cpu_ptm0__ETMACTR2);
-set_reset_data( debug_cpu_ptm0__ETMACTR3, val_debug_cpu_ptm0__ETMACTR3);
-set_reset_data( debug_cpu_ptm0__ETMACTR4, val_debug_cpu_ptm0__ETMACTR4);
-set_reset_data( debug_cpu_ptm0__ETMACTR5, val_debug_cpu_ptm0__ETMACTR5);
-set_reset_data( debug_cpu_ptm0__ETMACTR6, val_debug_cpu_ptm0__ETMACTR6);
-set_reset_data( debug_cpu_ptm0__ETMACTR7, val_debug_cpu_ptm0__ETMACTR7);
-set_reset_data( debug_cpu_ptm0__ETMACTR8, val_debug_cpu_ptm0__ETMACTR8);
-set_reset_data( debug_cpu_ptm0__ETMCNTRLDVR1, val_debug_cpu_ptm0__ETMCNTRLDVR1);
-set_reset_data( debug_cpu_ptm0__ETMCNTRLDVR2, val_debug_cpu_ptm0__ETMCNTRLDVR2);
-set_reset_data( debug_cpu_ptm0__ETMCNTENR1, val_debug_cpu_ptm0__ETMCNTENR1);
-set_reset_data( debug_cpu_ptm0__ETMCNTENR2, val_debug_cpu_ptm0__ETMCNTENR2);
-set_reset_data( debug_cpu_ptm0__ETMCNTRLDEVR1, val_debug_cpu_ptm0__ETMCNTRLDEVR1);
-set_reset_data( debug_cpu_ptm0__ETMCNTRLDEVR2, val_debug_cpu_ptm0__ETMCNTRLDEVR2);
-set_reset_data( debug_cpu_ptm0__ETMCNTVR1, val_debug_cpu_ptm0__ETMCNTVR1);
-set_reset_data( debug_cpu_ptm0__ETMCNTVR2, val_debug_cpu_ptm0__ETMCNTVR2);
-set_reset_data( debug_cpu_ptm0__ETMSQ12EVR, val_debug_cpu_ptm0__ETMSQ12EVR);
-set_reset_data( debug_cpu_ptm0__ETMSQ21EVR, val_debug_cpu_ptm0__ETMSQ21EVR);
-set_reset_data( debug_cpu_ptm0__ETMSQ23EVR, val_debug_cpu_ptm0__ETMSQ23EVR);
-set_reset_data( debug_cpu_ptm0__ETMSQ31EVR, val_debug_cpu_ptm0__ETMSQ31EVR);
-set_reset_data( debug_cpu_ptm0__ETMSQ32EVR, val_debug_cpu_ptm0__ETMSQ32EVR);
-set_reset_data( debug_cpu_ptm0__ETMSQ13EVR, val_debug_cpu_ptm0__ETMSQ13EVR);
-set_reset_data( debug_cpu_ptm0__ETMSQR, val_debug_cpu_ptm0__ETMSQR);
-set_reset_data( debug_cpu_ptm0__ETMEXTOUTEVR1, val_debug_cpu_ptm0__ETMEXTOUTEVR1);
-set_reset_data( debug_cpu_ptm0__ETMEXTOUTEVR2, val_debug_cpu_ptm0__ETMEXTOUTEVR2);
-set_reset_data( debug_cpu_ptm0__ETMCIDCVR1, val_debug_cpu_ptm0__ETMCIDCVR1);
-set_reset_data( debug_cpu_ptm0__ETMCIDCMR, val_debug_cpu_ptm0__ETMCIDCMR);
-set_reset_data( debug_cpu_ptm0__ETMSYNCFR, val_debug_cpu_ptm0__ETMSYNCFR);
-set_reset_data( debug_cpu_ptm0__ETMIDR, val_debug_cpu_ptm0__ETMIDR);
-set_reset_data( debug_cpu_ptm0__ETMCCER, val_debug_cpu_ptm0__ETMCCER);
-set_reset_data( debug_cpu_ptm0__ETMEXTINSELR, val_debug_cpu_ptm0__ETMEXTINSELR);
-set_reset_data( debug_cpu_ptm0__ETMAUXCR, val_debug_cpu_ptm0__ETMAUXCR);
-set_reset_data( debug_cpu_ptm0__ETMTRACEIDR, val_debug_cpu_ptm0__ETMTRACEIDR);
-set_reset_data( debug_cpu_ptm0__OSLSR, val_debug_cpu_ptm0__OSLSR);
-set_reset_data( debug_cpu_ptm0__ETMPDSR, val_debug_cpu_ptm0__ETMPDSR);
-set_reset_data( debug_cpu_ptm0__ITMISCOUT, val_debug_cpu_ptm0__ITMISCOUT);
-set_reset_data( debug_cpu_ptm0__ITMISCIN, val_debug_cpu_ptm0__ITMISCIN);
-set_reset_data( debug_cpu_ptm0__ITTRIGGER, val_debug_cpu_ptm0__ITTRIGGER);
-set_reset_data( debug_cpu_ptm0__ITATBDATA0, val_debug_cpu_ptm0__ITATBDATA0);
-set_reset_data( debug_cpu_ptm0__ITATBCTR2, val_debug_cpu_ptm0__ITATBCTR2);
-set_reset_data( debug_cpu_ptm0__ITATBID, val_debug_cpu_ptm0__ITATBID);
-set_reset_data( debug_cpu_ptm0__ITATBCTR0, val_debug_cpu_ptm0__ITATBCTR0);
-set_reset_data( debug_cpu_ptm0__ETMITCTRL, val_debug_cpu_ptm0__ETMITCTRL);
-set_reset_data( debug_cpu_ptm0__CTSR, val_debug_cpu_ptm0__CTSR);
-set_reset_data( debug_cpu_ptm0__CTCR, val_debug_cpu_ptm0__CTCR);
-set_reset_data( debug_cpu_ptm0__LAR, val_debug_cpu_ptm0__LAR);
-set_reset_data( debug_cpu_ptm0__LSR, val_debug_cpu_ptm0__LSR);
-set_reset_data( debug_cpu_ptm0__ASR, val_debug_cpu_ptm0__ASR);
-set_reset_data( debug_cpu_ptm0__DEVID, val_debug_cpu_ptm0__DEVID);
-set_reset_data( debug_cpu_ptm0__DTIR, val_debug_cpu_ptm0__DTIR);
-set_reset_data( debug_cpu_ptm0__PERIPHID4, val_debug_cpu_ptm0__PERIPHID4);
-set_reset_data( debug_cpu_ptm0__PERIPHID5, val_debug_cpu_ptm0__PERIPHID5);
-set_reset_data( debug_cpu_ptm0__PERIPHID6, val_debug_cpu_ptm0__PERIPHID6);
-set_reset_data( debug_cpu_ptm0__PERIPHID7, val_debug_cpu_ptm0__PERIPHID7);
-set_reset_data( debug_cpu_ptm0__PERIPHID0, val_debug_cpu_ptm0__PERIPHID0);
-set_reset_data( debug_cpu_ptm0__PERIPHID1, val_debug_cpu_ptm0__PERIPHID1);
-set_reset_data( debug_cpu_ptm0__PERIPHID2, val_debug_cpu_ptm0__PERIPHID2);
-set_reset_data( debug_cpu_ptm0__PERIPHID3, val_debug_cpu_ptm0__PERIPHID3);
-set_reset_data( debug_cpu_ptm0__COMPID0, val_debug_cpu_ptm0__COMPID0);
-set_reset_data( debug_cpu_ptm0__COMPID1, val_debug_cpu_ptm0__COMPID1);
-set_reset_data( debug_cpu_ptm0__COMPID2, val_debug_cpu_ptm0__COMPID2);
-set_reset_data( debug_cpu_ptm0__COMPID3, val_debug_cpu_ptm0__COMPID3);
-
-// ************************************************************
-// Module debug_cpu_ptm1 ptm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cpu_ptm1__ETMCR, val_debug_cpu_ptm1__ETMCR);
-set_reset_data( debug_cpu_ptm1__ETMCCR, val_debug_cpu_ptm1__ETMCCR);
-set_reset_data( debug_cpu_ptm1__ETMTRIGGER, val_debug_cpu_ptm1__ETMTRIGGER);
-set_reset_data( debug_cpu_ptm1__ETMSR, val_debug_cpu_ptm1__ETMSR);
-set_reset_data( debug_cpu_ptm1__ETMSCR, val_debug_cpu_ptm1__ETMSCR);
-set_reset_data( debug_cpu_ptm1__ETMTSSCR, val_debug_cpu_ptm1__ETMTSSCR);
-set_reset_data( debug_cpu_ptm1__ETMTECR1, val_debug_cpu_ptm1__ETMTECR1);
-set_reset_data( debug_cpu_ptm1__ETMACVR1, val_debug_cpu_ptm1__ETMACVR1);
-set_reset_data( debug_cpu_ptm1__ETMACVR2, val_debug_cpu_ptm1__ETMACVR2);
-set_reset_data( debug_cpu_ptm1__ETMACVR3, val_debug_cpu_ptm1__ETMACVR3);
-set_reset_data( debug_cpu_ptm1__ETMACVR4, val_debug_cpu_ptm1__ETMACVR4);
-set_reset_data( debug_cpu_ptm1__ETMACVR5, val_debug_cpu_ptm1__ETMACVR5);
-set_reset_data( debug_cpu_ptm1__ETMACVR6, val_debug_cpu_ptm1__ETMACVR6);
-set_reset_data( debug_cpu_ptm1__ETMACVR7, val_debug_cpu_ptm1__ETMACVR7);
-set_reset_data( debug_cpu_ptm1__ETMACVR8, val_debug_cpu_ptm1__ETMACVR8);
-set_reset_data( debug_cpu_ptm1__ETMACTR1, val_debug_cpu_ptm1__ETMACTR1);
-set_reset_data( debug_cpu_ptm1__ETMACTR2, val_debug_cpu_ptm1__ETMACTR2);
-set_reset_data( debug_cpu_ptm1__ETMACTR3, val_debug_cpu_ptm1__ETMACTR3);
-set_reset_data( debug_cpu_ptm1__ETMACTR4, val_debug_cpu_ptm1__ETMACTR4);
-set_reset_data( debug_cpu_ptm1__ETMACTR5, val_debug_cpu_ptm1__ETMACTR5);
-set_reset_data( debug_cpu_ptm1__ETMACTR6, val_debug_cpu_ptm1__ETMACTR6);
-set_reset_data( debug_cpu_ptm1__ETMACTR7, val_debug_cpu_ptm1__ETMACTR7);
-set_reset_data( debug_cpu_ptm1__ETMACTR8, val_debug_cpu_ptm1__ETMACTR8);
-set_reset_data( debug_cpu_ptm1__ETMCNTRLDVR1, val_debug_cpu_ptm1__ETMCNTRLDVR1);
-set_reset_data( debug_cpu_ptm1__ETMCNTRLDVR2, val_debug_cpu_ptm1__ETMCNTRLDVR2);
-set_reset_data( debug_cpu_ptm1__ETMCNTENR1, val_debug_cpu_ptm1__ETMCNTENR1);
-set_reset_data( debug_cpu_ptm1__ETMCNTENR2, val_debug_cpu_ptm1__ETMCNTENR2);
-set_reset_data( debug_cpu_ptm1__ETMCNTRLDEVR1, val_debug_cpu_ptm1__ETMCNTRLDEVR1);
-set_reset_data( debug_cpu_ptm1__ETMCNTRLDEVR2, val_debug_cpu_ptm1__ETMCNTRLDEVR2);
-set_reset_data( debug_cpu_ptm1__ETMCNTVR1, val_debug_cpu_ptm1__ETMCNTVR1);
-set_reset_data( debug_cpu_ptm1__ETMCNTVR2, val_debug_cpu_ptm1__ETMCNTVR2);
-set_reset_data( debug_cpu_ptm1__ETMSQ12EVR, val_debug_cpu_ptm1__ETMSQ12EVR);
-set_reset_data( debug_cpu_ptm1__ETMSQ21EVR, val_debug_cpu_ptm1__ETMSQ21EVR);
-set_reset_data( debug_cpu_ptm1__ETMSQ23EVR, val_debug_cpu_ptm1__ETMSQ23EVR);
-set_reset_data( debug_cpu_ptm1__ETMSQ31EVR, val_debug_cpu_ptm1__ETMSQ31EVR);
-set_reset_data( debug_cpu_ptm1__ETMSQ32EVR, val_debug_cpu_ptm1__ETMSQ32EVR);
-set_reset_data( debug_cpu_ptm1__ETMSQ13EVR, val_debug_cpu_ptm1__ETMSQ13EVR);
-set_reset_data( debug_cpu_ptm1__ETMSQR, val_debug_cpu_ptm1__ETMSQR);
-set_reset_data( debug_cpu_ptm1__ETMEXTOUTEVR1, val_debug_cpu_ptm1__ETMEXTOUTEVR1);
-set_reset_data( debug_cpu_ptm1__ETMEXTOUTEVR2, val_debug_cpu_ptm1__ETMEXTOUTEVR2);
-set_reset_data( debug_cpu_ptm1__ETMCIDCVR1, val_debug_cpu_ptm1__ETMCIDCVR1);
-set_reset_data( debug_cpu_ptm1__ETMCIDCMR, val_debug_cpu_ptm1__ETMCIDCMR);
-set_reset_data( debug_cpu_ptm1__ETMSYNCFR, val_debug_cpu_ptm1__ETMSYNCFR);
-set_reset_data( debug_cpu_ptm1__ETMIDR, val_debug_cpu_ptm1__ETMIDR);
-set_reset_data( debug_cpu_ptm1__ETMCCER, val_debug_cpu_ptm1__ETMCCER);
-set_reset_data( debug_cpu_ptm1__ETMEXTINSELR, val_debug_cpu_ptm1__ETMEXTINSELR);
-set_reset_data( debug_cpu_ptm1__ETMAUXCR, val_debug_cpu_ptm1__ETMAUXCR);
-set_reset_data( debug_cpu_ptm1__ETMTRACEIDR, val_debug_cpu_ptm1__ETMTRACEIDR);
-set_reset_data( debug_cpu_ptm1__OSLSR, val_debug_cpu_ptm1__OSLSR);
-set_reset_data( debug_cpu_ptm1__ETMPDSR, val_debug_cpu_ptm1__ETMPDSR);
-set_reset_data( debug_cpu_ptm1__ITMISCOUT, val_debug_cpu_ptm1__ITMISCOUT);
-set_reset_data( debug_cpu_ptm1__ITMISCIN, val_debug_cpu_ptm1__ITMISCIN);
-set_reset_data( debug_cpu_ptm1__ITTRIGGER, val_debug_cpu_ptm1__ITTRIGGER);
-set_reset_data( debug_cpu_ptm1__ITATBDATA0, val_debug_cpu_ptm1__ITATBDATA0);
-set_reset_data( debug_cpu_ptm1__ITATBCTR2, val_debug_cpu_ptm1__ITATBCTR2);
-set_reset_data( debug_cpu_ptm1__ITATBID, val_debug_cpu_ptm1__ITATBID);
-set_reset_data( debug_cpu_ptm1__ITATBCTR0, val_debug_cpu_ptm1__ITATBCTR0);
-set_reset_data( debug_cpu_ptm1__ETMITCTRL, val_debug_cpu_ptm1__ETMITCTRL);
-set_reset_data( debug_cpu_ptm1__CTSR, val_debug_cpu_ptm1__CTSR);
-set_reset_data( debug_cpu_ptm1__CTCR, val_debug_cpu_ptm1__CTCR);
-set_reset_data( debug_cpu_ptm1__LAR, val_debug_cpu_ptm1__LAR);
-set_reset_data( debug_cpu_ptm1__LSR, val_debug_cpu_ptm1__LSR);
-set_reset_data( debug_cpu_ptm1__ASR, val_debug_cpu_ptm1__ASR);
-set_reset_data( debug_cpu_ptm1__DEVID, val_debug_cpu_ptm1__DEVID);
-set_reset_data( debug_cpu_ptm1__DTIR, val_debug_cpu_ptm1__DTIR);
-set_reset_data( debug_cpu_ptm1__PERIPHID4, val_debug_cpu_ptm1__PERIPHID4);
-set_reset_data( debug_cpu_ptm1__PERIPHID5, val_debug_cpu_ptm1__PERIPHID5);
-set_reset_data( debug_cpu_ptm1__PERIPHID6, val_debug_cpu_ptm1__PERIPHID6);
-set_reset_data( debug_cpu_ptm1__PERIPHID7, val_debug_cpu_ptm1__PERIPHID7);
-set_reset_data( debug_cpu_ptm1__PERIPHID0, val_debug_cpu_ptm1__PERIPHID0);
-set_reset_data( debug_cpu_ptm1__PERIPHID1, val_debug_cpu_ptm1__PERIPHID1);
-set_reset_data( debug_cpu_ptm1__PERIPHID2, val_debug_cpu_ptm1__PERIPHID2);
-set_reset_data( debug_cpu_ptm1__PERIPHID3, val_debug_cpu_ptm1__PERIPHID3);
-set_reset_data( debug_cpu_ptm1__COMPID0, val_debug_cpu_ptm1__COMPID0);
-set_reset_data( debug_cpu_ptm1__COMPID1, val_debug_cpu_ptm1__COMPID1);
-set_reset_data( debug_cpu_ptm1__COMPID2, val_debug_cpu_ptm1__COMPID2);
-set_reset_data( debug_cpu_ptm1__COMPID3, val_debug_cpu_ptm1__COMPID3);
-
-// ************************************************************
-// Module debug_cti_axim cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cti_axim__CTICONTROL, val_debug_cti_axim__CTICONTROL);
-set_reset_data( debug_cti_axim__CTIINTACK, val_debug_cti_axim__CTIINTACK);
-set_reset_data( debug_cti_axim__CTIAPPSET, val_debug_cti_axim__CTIAPPSET);
-set_reset_data( debug_cti_axim__CTIAPPCLEAR, val_debug_cti_axim__CTIAPPCLEAR);
-set_reset_data( debug_cti_axim__CTIAPPPULSE, val_debug_cti_axim__CTIAPPPULSE);
-set_reset_data( debug_cti_axim__CTIINEN0, val_debug_cti_axim__CTIINEN0);
-set_reset_data( debug_cti_axim__CTIINEN1, val_debug_cti_axim__CTIINEN1);
-set_reset_data( debug_cti_axim__CTIINEN2, val_debug_cti_axim__CTIINEN2);
-set_reset_data( debug_cti_axim__CTIINEN3, val_debug_cti_axim__CTIINEN3);
-set_reset_data( debug_cti_axim__CTIINEN4, val_debug_cti_axim__CTIINEN4);
-set_reset_data( debug_cti_axim__CTIINEN5, val_debug_cti_axim__CTIINEN5);
-set_reset_data( debug_cti_axim__CTIINEN6, val_debug_cti_axim__CTIINEN6);
-set_reset_data( debug_cti_axim__CTIINEN7, val_debug_cti_axim__CTIINEN7);
-set_reset_data( debug_cti_axim__CTIOUTEN0, val_debug_cti_axim__CTIOUTEN0);
-set_reset_data( debug_cti_axim__CTIOUTEN1, val_debug_cti_axim__CTIOUTEN1);
-set_reset_data( debug_cti_axim__CTIOUTEN2, val_debug_cti_axim__CTIOUTEN2);
-set_reset_data( debug_cti_axim__CTIOUTEN3, val_debug_cti_axim__CTIOUTEN3);
-set_reset_data( debug_cti_axim__CTIOUTEN4, val_debug_cti_axim__CTIOUTEN4);
-set_reset_data( debug_cti_axim__CTIOUTEN5, val_debug_cti_axim__CTIOUTEN5);
-set_reset_data( debug_cti_axim__CTIOUTEN6, val_debug_cti_axim__CTIOUTEN6);
-set_reset_data( debug_cti_axim__CTIOUTEN7, val_debug_cti_axim__CTIOUTEN7);
-set_reset_data( debug_cti_axim__CTITRIGINSTATUS, val_debug_cti_axim__CTITRIGINSTATUS);
-set_reset_data( debug_cti_axim__CTITRIGOUTSTATUS, val_debug_cti_axim__CTITRIGOUTSTATUS);
-set_reset_data( debug_cti_axim__CTICHINSTATUS, val_debug_cti_axim__CTICHINSTATUS);
-set_reset_data( debug_cti_axim__CTICHOUTSTATUS, val_debug_cti_axim__CTICHOUTSTATUS);
-set_reset_data( debug_cti_axim__CTIGATE, val_debug_cti_axim__CTIGATE);
-set_reset_data( debug_cti_axim__ASICCTL, val_debug_cti_axim__ASICCTL);
-set_reset_data( debug_cti_axim__ITCHINACK, val_debug_cti_axim__ITCHINACK);
-set_reset_data( debug_cti_axim__ITTRIGINACK, val_debug_cti_axim__ITTRIGINACK);
-set_reset_data( debug_cti_axim__ITCHOUT, val_debug_cti_axim__ITCHOUT);
-set_reset_data( debug_cti_axim__ITTRIGOUT, val_debug_cti_axim__ITTRIGOUT);
-set_reset_data( debug_cti_axim__ITCHOUTACK, val_debug_cti_axim__ITCHOUTACK);
-set_reset_data( debug_cti_axim__ITTRIGOUTACK, val_debug_cti_axim__ITTRIGOUTACK);
-set_reset_data( debug_cti_axim__ITCHIN, val_debug_cti_axim__ITCHIN);
-set_reset_data( debug_cti_axim__ITTRIGIN, val_debug_cti_axim__ITTRIGIN);
-set_reset_data( debug_cti_axim__ITCTRL, val_debug_cti_axim__ITCTRL);
-set_reset_data( debug_cti_axim__CTSR, val_debug_cti_axim__CTSR);
-set_reset_data( debug_cti_axim__CTCR, val_debug_cti_axim__CTCR);
-set_reset_data( debug_cti_axim__LAR, val_debug_cti_axim__LAR);
-set_reset_data( debug_cti_axim__LSR, val_debug_cti_axim__LSR);
-set_reset_data( debug_cti_axim__ASR, val_debug_cti_axim__ASR);
-set_reset_data( debug_cti_axim__DEVID, val_debug_cti_axim__DEVID);
-set_reset_data( debug_cti_axim__DTIR, val_debug_cti_axim__DTIR);
-set_reset_data( debug_cti_axim__PERIPHID4, val_debug_cti_axim__PERIPHID4);
-set_reset_data( debug_cti_axim__PERIPHID5, val_debug_cti_axim__PERIPHID5);
-set_reset_data( debug_cti_axim__PERIPHID6, val_debug_cti_axim__PERIPHID6);
-set_reset_data( debug_cti_axim__PERIPHID7, val_debug_cti_axim__PERIPHID7);
-set_reset_data( debug_cti_axim__PERIPHID0, val_debug_cti_axim__PERIPHID0);
-set_reset_data( debug_cti_axim__PERIPHID1, val_debug_cti_axim__PERIPHID1);
-set_reset_data( debug_cti_axim__PERIPHID2, val_debug_cti_axim__PERIPHID2);
-set_reset_data( debug_cti_axim__PERIPHID3, val_debug_cti_axim__PERIPHID3);
-set_reset_data( debug_cti_axim__COMPID0, val_debug_cti_axim__COMPID0);
-set_reset_data( debug_cti_axim__COMPID1, val_debug_cti_axim__COMPID1);
-set_reset_data( debug_cti_axim__COMPID2, val_debug_cti_axim__COMPID2);
-set_reset_data( debug_cti_axim__COMPID3, val_debug_cti_axim__COMPID3);
-
-// ************************************************************
-// Module debug_cti_etb_tpiu cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cti_etb_tpiu__CTICONTROL, val_debug_cti_etb_tpiu__CTICONTROL);
-set_reset_data( debug_cti_etb_tpiu__CTIINTACK, val_debug_cti_etb_tpiu__CTIINTACK);
-set_reset_data( debug_cti_etb_tpiu__CTIAPPSET, val_debug_cti_etb_tpiu__CTIAPPSET);
-set_reset_data( debug_cti_etb_tpiu__CTIAPPCLEAR, val_debug_cti_etb_tpiu__CTIAPPCLEAR);
-set_reset_data( debug_cti_etb_tpiu__CTIAPPPULSE, val_debug_cti_etb_tpiu__CTIAPPPULSE);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN0, val_debug_cti_etb_tpiu__CTIINEN0);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN1, val_debug_cti_etb_tpiu__CTIINEN1);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN2, val_debug_cti_etb_tpiu__CTIINEN2);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN3, val_debug_cti_etb_tpiu__CTIINEN3);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN4, val_debug_cti_etb_tpiu__CTIINEN4);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN5, val_debug_cti_etb_tpiu__CTIINEN5);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN6, val_debug_cti_etb_tpiu__CTIINEN6);
-set_reset_data( debug_cti_etb_tpiu__CTIINEN7, val_debug_cti_etb_tpiu__CTIINEN7);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN0, val_debug_cti_etb_tpiu__CTIOUTEN0);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN1, val_debug_cti_etb_tpiu__CTIOUTEN1);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN2, val_debug_cti_etb_tpiu__CTIOUTEN2);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN3, val_debug_cti_etb_tpiu__CTIOUTEN3);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN4, val_debug_cti_etb_tpiu__CTIOUTEN4);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN5, val_debug_cti_etb_tpiu__CTIOUTEN5);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN6, val_debug_cti_etb_tpiu__CTIOUTEN6);
-set_reset_data( debug_cti_etb_tpiu__CTIOUTEN7, val_debug_cti_etb_tpiu__CTIOUTEN7);
-set_reset_data( debug_cti_etb_tpiu__CTITRIGINSTATUS, val_debug_cti_etb_tpiu__CTITRIGINSTATUS);
-set_reset_data( debug_cti_etb_tpiu__CTITRIGOUTSTATUS, val_debug_cti_etb_tpiu__CTITRIGOUTSTATUS);
-set_reset_data( debug_cti_etb_tpiu__CTICHINSTATUS, val_debug_cti_etb_tpiu__CTICHINSTATUS);
-set_reset_data( debug_cti_etb_tpiu__CTICHOUTSTATUS, val_debug_cti_etb_tpiu__CTICHOUTSTATUS);
-set_reset_data( debug_cti_etb_tpiu__CTIGATE, val_debug_cti_etb_tpiu__CTIGATE);
-set_reset_data( debug_cti_etb_tpiu__ASICCTL, val_debug_cti_etb_tpiu__ASICCTL);
-set_reset_data( debug_cti_etb_tpiu__ITCHINACK, val_debug_cti_etb_tpiu__ITCHINACK);
-set_reset_data( debug_cti_etb_tpiu__ITTRIGINACK, val_debug_cti_etb_tpiu__ITTRIGINACK);
-set_reset_data( debug_cti_etb_tpiu__ITCHOUT, val_debug_cti_etb_tpiu__ITCHOUT);
-set_reset_data( debug_cti_etb_tpiu__ITTRIGOUT, val_debug_cti_etb_tpiu__ITTRIGOUT);
-set_reset_data( debug_cti_etb_tpiu__ITCHOUTACK, val_debug_cti_etb_tpiu__ITCHOUTACK);
-set_reset_data( debug_cti_etb_tpiu__ITTRIGOUTACK, val_debug_cti_etb_tpiu__ITTRIGOUTACK);
-set_reset_data( debug_cti_etb_tpiu__ITCHIN, val_debug_cti_etb_tpiu__ITCHIN);
-set_reset_data( debug_cti_etb_tpiu__ITTRIGIN, val_debug_cti_etb_tpiu__ITTRIGIN);
-set_reset_data( debug_cti_etb_tpiu__ITCTRL, val_debug_cti_etb_tpiu__ITCTRL);
-set_reset_data( debug_cti_etb_tpiu__CTSR, val_debug_cti_etb_tpiu__CTSR);
-set_reset_data( debug_cti_etb_tpiu__CTCR, val_debug_cti_etb_tpiu__CTCR);
-set_reset_data( debug_cti_etb_tpiu__LAR, val_debug_cti_etb_tpiu__LAR);
-set_reset_data( debug_cti_etb_tpiu__LSR, val_debug_cti_etb_tpiu__LSR);
-set_reset_data( debug_cti_etb_tpiu__ASR, val_debug_cti_etb_tpiu__ASR);
-set_reset_data( debug_cti_etb_tpiu__DEVID, val_debug_cti_etb_tpiu__DEVID);
-set_reset_data( debug_cti_etb_tpiu__DTIR, val_debug_cti_etb_tpiu__DTIR);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID4, val_debug_cti_etb_tpiu__PERIPHID4);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID5, val_debug_cti_etb_tpiu__PERIPHID5);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID6, val_debug_cti_etb_tpiu__PERIPHID6);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID7, val_debug_cti_etb_tpiu__PERIPHID7);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID0, val_debug_cti_etb_tpiu__PERIPHID0);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID1, val_debug_cti_etb_tpiu__PERIPHID1);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID2, val_debug_cti_etb_tpiu__PERIPHID2);
-set_reset_data( debug_cti_etb_tpiu__PERIPHID3, val_debug_cti_etb_tpiu__PERIPHID3);
-set_reset_data( debug_cti_etb_tpiu__COMPID0, val_debug_cti_etb_tpiu__COMPID0);
-set_reset_data( debug_cti_etb_tpiu__COMPID1, val_debug_cti_etb_tpiu__COMPID1);
-set_reset_data( debug_cti_etb_tpiu__COMPID2, val_debug_cti_etb_tpiu__COMPID2);
-set_reset_data( debug_cti_etb_tpiu__COMPID3, val_debug_cti_etb_tpiu__COMPID3);
-
-// ************************************************************
-// Module debug_cti_ftm cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_cti_ftm__CTICONTROL, val_debug_cti_ftm__CTICONTROL);
-set_reset_data( debug_cti_ftm__CTIINTACK, val_debug_cti_ftm__CTIINTACK);
-set_reset_data( debug_cti_ftm__CTIAPPSET, val_debug_cti_ftm__CTIAPPSET);
-set_reset_data( debug_cti_ftm__CTIAPPCLEAR, val_debug_cti_ftm__CTIAPPCLEAR);
-set_reset_data( debug_cti_ftm__CTIAPPPULSE, val_debug_cti_ftm__CTIAPPPULSE);
-set_reset_data( debug_cti_ftm__CTIINEN0, val_debug_cti_ftm__CTIINEN0);
-set_reset_data( debug_cti_ftm__CTIINEN1, val_debug_cti_ftm__CTIINEN1);
-set_reset_data( debug_cti_ftm__CTIINEN2, val_debug_cti_ftm__CTIINEN2);
-set_reset_data( debug_cti_ftm__CTIINEN3, val_debug_cti_ftm__CTIINEN3);
-set_reset_data( debug_cti_ftm__CTIINEN4, val_debug_cti_ftm__CTIINEN4);
-set_reset_data( debug_cti_ftm__CTIINEN5, val_debug_cti_ftm__CTIINEN5);
-set_reset_data( debug_cti_ftm__CTIINEN6, val_debug_cti_ftm__CTIINEN6);
-set_reset_data( debug_cti_ftm__CTIINEN7, val_debug_cti_ftm__CTIINEN7);
-set_reset_data( debug_cti_ftm__CTIOUTEN0, val_debug_cti_ftm__CTIOUTEN0);
-set_reset_data( debug_cti_ftm__CTIOUTEN1, val_debug_cti_ftm__CTIOUTEN1);
-set_reset_data( debug_cti_ftm__CTIOUTEN2, val_debug_cti_ftm__CTIOUTEN2);
-set_reset_data( debug_cti_ftm__CTIOUTEN3, val_debug_cti_ftm__CTIOUTEN3);
-set_reset_data( debug_cti_ftm__CTIOUTEN4, val_debug_cti_ftm__CTIOUTEN4);
-set_reset_data( debug_cti_ftm__CTIOUTEN5, val_debug_cti_ftm__CTIOUTEN5);
-set_reset_data( debug_cti_ftm__CTIOUTEN6, val_debug_cti_ftm__CTIOUTEN6);
-set_reset_data( debug_cti_ftm__CTIOUTEN7, val_debug_cti_ftm__CTIOUTEN7);
-set_reset_data( debug_cti_ftm__CTITRIGINSTATUS, val_debug_cti_ftm__CTITRIGINSTATUS);
-set_reset_data( debug_cti_ftm__CTITRIGOUTSTATUS, val_debug_cti_ftm__CTITRIGOUTSTATUS);
-set_reset_data( debug_cti_ftm__CTICHINSTATUS, val_debug_cti_ftm__CTICHINSTATUS);
-set_reset_data( debug_cti_ftm__CTICHOUTSTATUS, val_debug_cti_ftm__CTICHOUTSTATUS);
-set_reset_data( debug_cti_ftm__CTIGATE, val_debug_cti_ftm__CTIGATE);
-set_reset_data( debug_cti_ftm__ASICCTL, val_debug_cti_ftm__ASICCTL);
-set_reset_data( debug_cti_ftm__ITCHINACK, val_debug_cti_ftm__ITCHINACK);
-set_reset_data( debug_cti_ftm__ITTRIGINACK, val_debug_cti_ftm__ITTRIGINACK);
-set_reset_data( debug_cti_ftm__ITCHOUT, val_debug_cti_ftm__ITCHOUT);
-set_reset_data( debug_cti_ftm__ITTRIGOUT, val_debug_cti_ftm__ITTRIGOUT);
-set_reset_data( debug_cti_ftm__ITCHOUTACK, val_debug_cti_ftm__ITCHOUTACK);
-set_reset_data( debug_cti_ftm__ITTRIGOUTACK, val_debug_cti_ftm__ITTRIGOUTACK);
-set_reset_data( debug_cti_ftm__ITCHIN, val_debug_cti_ftm__ITCHIN);
-set_reset_data( debug_cti_ftm__ITTRIGIN, val_debug_cti_ftm__ITTRIGIN);
-set_reset_data( debug_cti_ftm__ITCTRL, val_debug_cti_ftm__ITCTRL);
-set_reset_data( debug_cti_ftm__CTSR, val_debug_cti_ftm__CTSR);
-set_reset_data( debug_cti_ftm__CTCR, val_debug_cti_ftm__CTCR);
-set_reset_data( debug_cti_ftm__LAR, val_debug_cti_ftm__LAR);
-set_reset_data( debug_cti_ftm__LSR, val_debug_cti_ftm__LSR);
-set_reset_data( debug_cti_ftm__ASR, val_debug_cti_ftm__ASR);
-set_reset_data( debug_cti_ftm__DEVID, val_debug_cti_ftm__DEVID);
-set_reset_data( debug_cti_ftm__DTIR, val_debug_cti_ftm__DTIR);
-set_reset_data( debug_cti_ftm__PERIPHID4, val_debug_cti_ftm__PERIPHID4);
-set_reset_data( debug_cti_ftm__PERIPHID5, val_debug_cti_ftm__PERIPHID5);
-set_reset_data( debug_cti_ftm__PERIPHID6, val_debug_cti_ftm__PERIPHID6);
-set_reset_data( debug_cti_ftm__PERIPHID7, val_debug_cti_ftm__PERIPHID7);
-set_reset_data( debug_cti_ftm__PERIPHID0, val_debug_cti_ftm__PERIPHID0);
-set_reset_data( debug_cti_ftm__PERIPHID1, val_debug_cti_ftm__PERIPHID1);
-set_reset_data( debug_cti_ftm__PERIPHID2, val_debug_cti_ftm__PERIPHID2);
-set_reset_data( debug_cti_ftm__PERIPHID3, val_debug_cti_ftm__PERIPHID3);
-set_reset_data( debug_cti_ftm__COMPID0, val_debug_cti_ftm__COMPID0);
-set_reset_data( debug_cti_ftm__COMPID1, val_debug_cti_ftm__COMPID1);
-set_reset_data( debug_cti_ftm__COMPID2, val_debug_cti_ftm__COMPID2);
-set_reset_data( debug_cti_ftm__COMPID3, val_debug_cti_ftm__COMPID3);
-
-// ************************************************************
-// Module debug_dap_rom dap
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_dap_rom__ROMENTRY00, val_debug_dap_rom__ROMENTRY00);
-set_reset_data( debug_dap_rom__ROMENTRY01, val_debug_dap_rom__ROMENTRY01);
-set_reset_data( debug_dap_rom__ROMENTRY02, val_debug_dap_rom__ROMENTRY02);
-set_reset_data( debug_dap_rom__ROMENTRY03, val_debug_dap_rom__ROMENTRY03);
-set_reset_data( debug_dap_rom__ROMENTRY04, val_debug_dap_rom__ROMENTRY04);
-set_reset_data( debug_dap_rom__ROMENTRY05, val_debug_dap_rom__ROMENTRY05);
-set_reset_data( debug_dap_rom__ROMENTRY06, val_debug_dap_rom__ROMENTRY06);
-set_reset_data( debug_dap_rom__ROMENTRY07, val_debug_dap_rom__ROMENTRY07);
-set_reset_data( debug_dap_rom__ROMENTRY08, val_debug_dap_rom__ROMENTRY08);
-set_reset_data( debug_dap_rom__ROMENTRY09, val_debug_dap_rom__ROMENTRY09);
-set_reset_data( debug_dap_rom__ROMENTRY10, val_debug_dap_rom__ROMENTRY10);
-set_reset_data( debug_dap_rom__ROMENTRY11, val_debug_dap_rom__ROMENTRY11);
-set_reset_data( debug_dap_rom__ROMENTRY12, val_debug_dap_rom__ROMENTRY12);
-set_reset_data( debug_dap_rom__ROMENTRY13, val_debug_dap_rom__ROMENTRY13);
-set_reset_data( debug_dap_rom__ROMENTRY14, val_debug_dap_rom__ROMENTRY14);
-set_reset_data( debug_dap_rom__ROMENTRY15, val_debug_dap_rom__ROMENTRY15);
-set_reset_data( debug_dap_rom__PERIPHID4, val_debug_dap_rom__PERIPHID4);
-set_reset_data( debug_dap_rom__PERIPHID5, val_debug_dap_rom__PERIPHID5);
-set_reset_data( debug_dap_rom__PERIPHID6, val_debug_dap_rom__PERIPHID6);
-set_reset_data( debug_dap_rom__PERIPHID7, val_debug_dap_rom__PERIPHID7);
-set_reset_data( debug_dap_rom__PERIPHID0, val_debug_dap_rom__PERIPHID0);
-set_reset_data( debug_dap_rom__PERIPHID1, val_debug_dap_rom__PERIPHID1);
-set_reset_data( debug_dap_rom__PERIPHID2, val_debug_dap_rom__PERIPHID2);
-set_reset_data( debug_dap_rom__PERIPHID3, val_debug_dap_rom__PERIPHID3);
-set_reset_data( debug_dap_rom__COMPID0, val_debug_dap_rom__COMPID0);
-set_reset_data( debug_dap_rom__COMPID1, val_debug_dap_rom__COMPID1);
-set_reset_data( debug_dap_rom__COMPID2, val_debug_dap_rom__COMPID2);
-set_reset_data( debug_dap_rom__COMPID3, val_debug_dap_rom__COMPID3);
-
-// ************************************************************
-// Module debug_etb etb
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_etb__RDP, val_debug_etb__RDP);
-set_reset_data( debug_etb__STS, val_debug_etb__STS);
-set_reset_data( debug_etb__RRD, val_debug_etb__RRD);
-set_reset_data( debug_etb__RRP, val_debug_etb__RRP);
-set_reset_data( debug_etb__RWP, val_debug_etb__RWP);
-set_reset_data( debug_etb__TRG, val_debug_etb__TRG);
-set_reset_data( debug_etb__CTL, val_debug_etb__CTL);
-set_reset_data( debug_etb__RWD, val_debug_etb__RWD);
-set_reset_data( debug_etb__FFSR, val_debug_etb__FFSR);
-set_reset_data( debug_etb__FFCR, val_debug_etb__FFCR);
-set_reset_data( debug_etb__ITMISCOP0, val_debug_etb__ITMISCOP0);
-set_reset_data( debug_etb__ITTRFLINACK, val_debug_etb__ITTRFLINACK);
-set_reset_data( debug_etb__ITTRFLIN, val_debug_etb__ITTRFLIN);
-set_reset_data( debug_etb__ITATBDATA0, val_debug_etb__ITATBDATA0);
-set_reset_data( debug_etb__ITATBCTR2, val_debug_etb__ITATBCTR2);
-set_reset_data( debug_etb__ITATBCTR1, val_debug_etb__ITATBCTR1);
-set_reset_data( debug_etb__ITATBCTR0, val_debug_etb__ITATBCTR0);
-set_reset_data( debug_etb__IMCR, val_debug_etb__IMCR);
-set_reset_data( debug_etb__CTSR, val_debug_etb__CTSR);
-set_reset_data( debug_etb__CTCR, val_debug_etb__CTCR);
-set_reset_data( debug_etb__LAR, val_debug_etb__LAR);
-set_reset_data( debug_etb__LSR, val_debug_etb__LSR);
-set_reset_data( debug_etb__ASR, val_debug_etb__ASR);
-set_reset_data( debug_etb__DEVID, val_debug_etb__DEVID);
-set_reset_data( debug_etb__DTIR, val_debug_etb__DTIR);
-set_reset_data( debug_etb__PERIPHID4, val_debug_etb__PERIPHID4);
-set_reset_data( debug_etb__PERIPHID5, val_debug_etb__PERIPHID5);
-set_reset_data( debug_etb__PERIPHID6, val_debug_etb__PERIPHID6);
-set_reset_data( debug_etb__PERIPHID7, val_debug_etb__PERIPHID7);
-set_reset_data( debug_etb__PERIPHID0, val_debug_etb__PERIPHID0);
-set_reset_data( debug_etb__PERIPHID1, val_debug_etb__PERIPHID1);
-set_reset_data( debug_etb__PERIPHID2, val_debug_etb__PERIPHID2);
-set_reset_data( debug_etb__PERIPHID3, val_debug_etb__PERIPHID3);
-set_reset_data( debug_etb__COMPID0, val_debug_etb__COMPID0);
-set_reset_data( debug_etb__COMPID1, val_debug_etb__COMPID1);
-set_reset_data( debug_etb__COMPID2, val_debug_etb__COMPID2);
-set_reset_data( debug_etb__COMPID3, val_debug_etb__COMPID3);
-
-// ************************************************************
-// Module debug_ftm ftm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_ftm__FTMGLBCTRL, val_debug_ftm__FTMGLBCTRL);
-set_reset_data( debug_ftm__FTMSTATUS, val_debug_ftm__FTMSTATUS);
-set_reset_data( debug_ftm__FTMCONTROL, val_debug_ftm__FTMCONTROL);
-set_reset_data( debug_ftm__FTMP2FDBG0, val_debug_ftm__FTMP2FDBG0);
-set_reset_data( debug_ftm__FTMP2FDBG1, val_debug_ftm__FTMP2FDBG1);
-set_reset_data( debug_ftm__FTMP2FDBG2, val_debug_ftm__FTMP2FDBG2);
-set_reset_data( debug_ftm__FTMP2FDBG3, val_debug_ftm__FTMP2FDBG3);
-set_reset_data( debug_ftm__FTMF2PDBG0, val_debug_ftm__FTMF2PDBG0);
-set_reset_data( debug_ftm__FTMF2PDBG1, val_debug_ftm__FTMF2PDBG1);
-set_reset_data( debug_ftm__FTMF2PDBG2, val_debug_ftm__FTMF2PDBG2);
-set_reset_data( debug_ftm__FTMF2PDBG3, val_debug_ftm__FTMF2PDBG3);
-set_reset_data( debug_ftm__CYCOUNTPRE, val_debug_ftm__CYCOUNTPRE);
-set_reset_data( debug_ftm__FTMSYNCRELOAD, val_debug_ftm__FTMSYNCRELOAD);
-set_reset_data( debug_ftm__FTMSYNCCOUT, val_debug_ftm__FTMSYNCCOUT);
-set_reset_data( debug_ftm__FTMATID, val_debug_ftm__FTMATID);
-set_reset_data( debug_ftm__FTMITTRIGOUTACK, val_debug_ftm__FTMITTRIGOUTACK);
-set_reset_data( debug_ftm__FTMITTRIGGER, val_debug_ftm__FTMITTRIGGER);
-set_reset_data( debug_ftm__FTMITTRACEDIS, val_debug_ftm__FTMITTRACEDIS);
-set_reset_data( debug_ftm__FTMITCYCCOUNT, val_debug_ftm__FTMITCYCCOUNT);
-set_reset_data( debug_ftm__FTMITATBDATA0, val_debug_ftm__FTMITATBDATA0);
-set_reset_data( debug_ftm__FTMITATBCTR2, val_debug_ftm__FTMITATBCTR2);
-set_reset_data( debug_ftm__FTMITATBCTR1, val_debug_ftm__FTMITATBCTR1);
-set_reset_data( debug_ftm__FTMITATBCTR0, val_debug_ftm__FTMITATBCTR0);
-set_reset_data( debug_ftm__FTMITCR, val_debug_ftm__FTMITCR);
-set_reset_data( debug_ftm__CLAIMTAGSET, val_debug_ftm__CLAIMTAGSET);
-set_reset_data( debug_ftm__CLAIMTAGCLR, val_debug_ftm__CLAIMTAGCLR);
-set_reset_data( debug_ftm__LOCK_ACCESS, val_debug_ftm__LOCK_ACCESS);
-set_reset_data( debug_ftm__LOCK_STATUS, val_debug_ftm__LOCK_STATUS);
-set_reset_data( debug_ftm__FTMAUTHSTATUS, val_debug_ftm__FTMAUTHSTATUS);
-set_reset_data( debug_ftm__FTMDEVID, val_debug_ftm__FTMDEVID);
-set_reset_data( debug_ftm__FTMDEV_TYPE, val_debug_ftm__FTMDEV_TYPE);
-set_reset_data( debug_ftm__FTMPERIPHID4, val_debug_ftm__FTMPERIPHID4);
-set_reset_data( debug_ftm__FTMPERIPHID5, val_debug_ftm__FTMPERIPHID5);
-set_reset_data( debug_ftm__FTMPERIPHID6, val_debug_ftm__FTMPERIPHID6);
-set_reset_data( debug_ftm__FTMPERIPHID7, val_debug_ftm__FTMPERIPHID7);
-set_reset_data( debug_ftm__FTMPERIPHID0, val_debug_ftm__FTMPERIPHID0);
-set_reset_data( debug_ftm__FTMPERIPHID1, val_debug_ftm__FTMPERIPHID1);
-set_reset_data( debug_ftm__FTMPERIPHID2, val_debug_ftm__FTMPERIPHID2);
-set_reset_data( debug_ftm__FTMPERIPHID3, val_debug_ftm__FTMPERIPHID3);
-set_reset_data( debug_ftm__FTMCOMPONID0, val_debug_ftm__FTMCOMPONID0);
-set_reset_data( debug_ftm__FTMCOMPONID1, val_debug_ftm__FTMCOMPONID1);
-set_reset_data( debug_ftm__FTMCOMPONID2, val_debug_ftm__FTMCOMPONID2);
-set_reset_data( debug_ftm__FTMCOMPONID3, val_debug_ftm__FTMCOMPONID3);
-
-// ************************************************************
-// Module debug_funnel funnel
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_funnel__Control, val_debug_funnel__Control);
-set_reset_data( debug_funnel__PriControl, val_debug_funnel__PriControl);
-set_reset_data( debug_funnel__ITATBDATA0, val_debug_funnel__ITATBDATA0);
-set_reset_data( debug_funnel__ITATBCTR2, val_debug_funnel__ITATBCTR2);
-set_reset_data( debug_funnel__ITATBCTR1, val_debug_funnel__ITATBCTR1);
-set_reset_data( debug_funnel__ITATBCTR0, val_debug_funnel__ITATBCTR0);
-set_reset_data( debug_funnel__IMCR, val_debug_funnel__IMCR);
-set_reset_data( debug_funnel__CTSR, val_debug_funnel__CTSR);
-set_reset_data( debug_funnel__CTCR, val_debug_funnel__CTCR);
-set_reset_data( debug_funnel__LAR, val_debug_funnel__LAR);
-set_reset_data( debug_funnel__LSR, val_debug_funnel__LSR);
-set_reset_data( debug_funnel__ASR, val_debug_funnel__ASR);
-set_reset_data( debug_funnel__DEVID, val_debug_funnel__DEVID);
-set_reset_data( debug_funnel__DTIR, val_debug_funnel__DTIR);
-set_reset_data( debug_funnel__PERIPHID4, val_debug_funnel__PERIPHID4);
-set_reset_data( debug_funnel__PERIPHID5, val_debug_funnel__PERIPHID5);
-set_reset_data( debug_funnel__PERIPHID6, val_debug_funnel__PERIPHID6);
-set_reset_data( debug_funnel__PERIPHID7, val_debug_funnel__PERIPHID7);
-set_reset_data( debug_funnel__PERIPHID0, val_debug_funnel__PERIPHID0);
-set_reset_data( debug_funnel__PERIPHID1, val_debug_funnel__PERIPHID1);
-set_reset_data( debug_funnel__PERIPHID2, val_debug_funnel__PERIPHID2);
-set_reset_data( debug_funnel__PERIPHID3, val_debug_funnel__PERIPHID3);
-set_reset_data( debug_funnel__COMPID0, val_debug_funnel__COMPID0);
-set_reset_data( debug_funnel__COMPID1, val_debug_funnel__COMPID1);
-set_reset_data( debug_funnel__COMPID2, val_debug_funnel__COMPID2);
-set_reset_data( debug_funnel__COMPID3, val_debug_funnel__COMPID3);
-
-// ************************************************************
-// Module debug_itm itm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_itm__StimPort00, val_debug_itm__StimPort00);
-set_reset_data( debug_itm__StimPort01, val_debug_itm__StimPort01);
-set_reset_data( debug_itm__StimPort02, val_debug_itm__StimPort02);
-set_reset_data( debug_itm__StimPort03, val_debug_itm__StimPort03);
-set_reset_data( debug_itm__StimPort04, val_debug_itm__StimPort04);
-set_reset_data( debug_itm__StimPort05, val_debug_itm__StimPort05);
-set_reset_data( debug_itm__StimPort06, val_debug_itm__StimPort06);
-set_reset_data( debug_itm__StimPort07, val_debug_itm__StimPort07);
-set_reset_data( debug_itm__StimPort08, val_debug_itm__StimPort08);
-set_reset_data( debug_itm__StimPort09, val_debug_itm__StimPort09);
-set_reset_data( debug_itm__StimPort10, val_debug_itm__StimPort10);
-set_reset_data( debug_itm__StimPort11, val_debug_itm__StimPort11);
-set_reset_data( debug_itm__StimPort12, val_debug_itm__StimPort12);
-set_reset_data( debug_itm__StimPort13, val_debug_itm__StimPort13);
-set_reset_data( debug_itm__StimPort14, val_debug_itm__StimPort14);
-set_reset_data( debug_itm__StimPort15, val_debug_itm__StimPort15);
-set_reset_data( debug_itm__StimPort16, val_debug_itm__StimPort16);
-set_reset_data( debug_itm__StimPort17, val_debug_itm__StimPort17);
-set_reset_data( debug_itm__StimPort18, val_debug_itm__StimPort18);
-set_reset_data( debug_itm__StimPort19, val_debug_itm__StimPort19);
-set_reset_data( debug_itm__StimPort20, val_debug_itm__StimPort20);
-set_reset_data( debug_itm__StimPort21, val_debug_itm__StimPort21);
-set_reset_data( debug_itm__StimPort22, val_debug_itm__StimPort22);
-set_reset_data( debug_itm__StimPort23, val_debug_itm__StimPort23);
-set_reset_data( debug_itm__StimPort24, val_debug_itm__StimPort24);
-set_reset_data( debug_itm__StimPort25, val_debug_itm__StimPort25);
-set_reset_data( debug_itm__StimPort26, val_debug_itm__StimPort26);
-set_reset_data( debug_itm__StimPort27, val_debug_itm__StimPort27);
-set_reset_data( debug_itm__StimPort28, val_debug_itm__StimPort28);
-set_reset_data( debug_itm__StimPort29, val_debug_itm__StimPort29);
-set_reset_data( debug_itm__StimPort30, val_debug_itm__StimPort30);
-set_reset_data( debug_itm__StimPort31, val_debug_itm__StimPort31);
-set_reset_data( debug_itm__TER, val_debug_itm__TER);
-set_reset_data( debug_itm__TTR, val_debug_itm__TTR);
-set_reset_data( debug_itm__CR, val_debug_itm__CR);
-set_reset_data( debug_itm__SCR, val_debug_itm__SCR);
-set_reset_data( debug_itm__ITTRIGOUTACK, val_debug_itm__ITTRIGOUTACK);
-set_reset_data( debug_itm__ITTRIGOUT, val_debug_itm__ITTRIGOUT);
-set_reset_data( debug_itm__ITATBDATA0, val_debug_itm__ITATBDATA0);
-set_reset_data( debug_itm__ITATBCTR2, val_debug_itm__ITATBCTR2);
-set_reset_data( debug_itm__ITATABCTR1, val_debug_itm__ITATABCTR1);
-set_reset_data( debug_itm__ITATBCTR0, val_debug_itm__ITATBCTR0);
-set_reset_data( debug_itm__IMCR, val_debug_itm__IMCR);
-set_reset_data( debug_itm__CTSR, val_debug_itm__CTSR);
-set_reset_data( debug_itm__CTCR, val_debug_itm__CTCR);
-set_reset_data( debug_itm__LAR, val_debug_itm__LAR);
-set_reset_data( debug_itm__LSR, val_debug_itm__LSR);
-set_reset_data( debug_itm__ASR, val_debug_itm__ASR);
-set_reset_data( debug_itm__DEVID, val_debug_itm__DEVID);
-set_reset_data( debug_itm__DTIR, val_debug_itm__DTIR);
-set_reset_data( debug_itm__PERIPHID4, val_debug_itm__PERIPHID4);
-set_reset_data( debug_itm__PERIPHID5, val_debug_itm__PERIPHID5);
-set_reset_data( debug_itm__PERIPHID6, val_debug_itm__PERIPHID6);
-set_reset_data( debug_itm__PERIPHID7, val_debug_itm__PERIPHID7);
-set_reset_data( debug_itm__PERIPHID0, val_debug_itm__PERIPHID0);
-set_reset_data( debug_itm__PERIPHID1, val_debug_itm__PERIPHID1);
-set_reset_data( debug_itm__PERIPHID2, val_debug_itm__PERIPHID2);
-set_reset_data( debug_itm__PERIPHID3, val_debug_itm__PERIPHID3);
-set_reset_data( debug_itm__COMPID0, val_debug_itm__COMPID0);
-set_reset_data( debug_itm__COMPID1, val_debug_itm__COMPID1);
-set_reset_data( debug_itm__COMPID2, val_debug_itm__COMPID2);
-set_reset_data( debug_itm__COMPID3, val_debug_itm__COMPID3);
-
-// ************************************************************
-// Module debug_tpiu tpiu
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( debug_tpiu__SuppSize, val_debug_tpiu__SuppSize);
-set_reset_data( debug_tpiu__CurrentSize, val_debug_tpiu__CurrentSize);
-set_reset_data( debug_tpiu__SuppTrigMode, val_debug_tpiu__SuppTrigMode);
-set_reset_data( debug_tpiu__TrigCount, val_debug_tpiu__TrigCount);
-set_reset_data( debug_tpiu__TrigMult, val_debug_tpiu__TrigMult);
-set_reset_data( debug_tpiu__SuppTest, val_debug_tpiu__SuppTest);
-set_reset_data( debug_tpiu__CurrentTest, val_debug_tpiu__CurrentTest);
-set_reset_data( debug_tpiu__TestRepeatCount, val_debug_tpiu__TestRepeatCount);
-set_reset_data( debug_tpiu__FFSR, val_debug_tpiu__FFSR);
-set_reset_data( debug_tpiu__FFCR, val_debug_tpiu__FFCR);
-set_reset_data( debug_tpiu__FormatSyncCount, val_debug_tpiu__FormatSyncCount);
-set_reset_data( debug_tpiu__EXTCTLIn, val_debug_tpiu__EXTCTLIn);
-set_reset_data( debug_tpiu__EXTCTLOut, val_debug_tpiu__EXTCTLOut);
-set_reset_data( debug_tpiu__ITTRFLINACK, val_debug_tpiu__ITTRFLINACK);
-set_reset_data( debug_tpiu__ITTRFLIN, val_debug_tpiu__ITTRFLIN);
-set_reset_data( debug_tpiu__ITATBDATA0, val_debug_tpiu__ITATBDATA0);
-set_reset_data( debug_tpiu__ITATBCTR2, val_debug_tpiu__ITATBCTR2);
-set_reset_data( debug_tpiu__ITATBCTR1, val_debug_tpiu__ITATBCTR1);
-set_reset_data( debug_tpiu__ITATBCTR0, val_debug_tpiu__ITATBCTR0);
-set_reset_data( debug_tpiu__IMCR, val_debug_tpiu__IMCR);
-set_reset_data( debug_tpiu__CTSR, val_debug_tpiu__CTSR);
-set_reset_data( debug_tpiu__CTCR, val_debug_tpiu__CTCR);
-set_reset_data( debug_tpiu__LAR, val_debug_tpiu__LAR);
-set_reset_data( debug_tpiu__LSR, val_debug_tpiu__LSR);
-set_reset_data( debug_tpiu__ASR, val_debug_tpiu__ASR);
-set_reset_data( debug_tpiu__DEVID, val_debug_tpiu__DEVID);
-set_reset_data( debug_tpiu__DTIR, val_debug_tpiu__DTIR);
-set_reset_data( debug_tpiu__PERIPHID4, val_debug_tpiu__PERIPHID4);
-set_reset_data( debug_tpiu__PERIPHID5, val_debug_tpiu__PERIPHID5);
-set_reset_data( debug_tpiu__PERIPHID6, val_debug_tpiu__PERIPHID6);
-set_reset_data( debug_tpiu__PERIPHID7, val_debug_tpiu__PERIPHID7);
-set_reset_data( debug_tpiu__PERIPHID0, val_debug_tpiu__PERIPHID0);
-set_reset_data( debug_tpiu__PERIPHID1, val_debug_tpiu__PERIPHID1);
-set_reset_data( debug_tpiu__PERIPHID2, val_debug_tpiu__PERIPHID2);
-set_reset_data( debug_tpiu__PERIPHID3, val_debug_tpiu__PERIPHID3);
-set_reset_data( debug_tpiu__COMPID0, val_debug_tpiu__COMPID0);
-set_reset_data( debug_tpiu__COMPID1, val_debug_tpiu__COMPID1);
-set_reset_data( debug_tpiu__COMPID2, val_debug_tpiu__COMPID2);
-set_reset_data( debug_tpiu__COMPID3, val_debug_tpiu__COMPID3);
-
-// ************************************************************
-// Module devcfg devcfg
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( devcfg__CTRL, val_devcfg__CTRL);
-set_reset_data( devcfg__LOCK, val_devcfg__LOCK);
-set_reset_data( devcfg__CFG, val_devcfg__CFG);
-set_reset_data( devcfg__INT_STS, val_devcfg__INT_STS);
-set_reset_data( devcfg__INT_MASK, val_devcfg__INT_MASK);
-set_reset_data( devcfg__STATUS, val_devcfg__STATUS);
-set_reset_data( devcfg__DMA_SRC_ADDR, val_devcfg__DMA_SRC_ADDR);
-set_reset_data( devcfg__DMA_DST_ADDR, val_devcfg__DMA_DST_ADDR);
-set_reset_data( devcfg__DMA_SRC_LEN, val_devcfg__DMA_SRC_LEN);
-set_reset_data( devcfg__DMA_DEST_LEN, val_devcfg__DMA_DEST_LEN);
-set_reset_data( devcfg__ROM_SHADOW, val_devcfg__ROM_SHADOW);
-set_reset_data( devcfg__MULTIBOOT_ADDR, val_devcfg__MULTIBOOT_ADDR);
-set_reset_data( devcfg__SW_ID, val_devcfg__SW_ID);
-set_reset_data( devcfg__UNLOCK, val_devcfg__UNLOCK);
-set_reset_data( devcfg__MCTRL, val_devcfg__MCTRL);
-set_reset_data( devcfg__XADCIF_CFG, val_devcfg__XADCIF_CFG);
-set_reset_data( devcfg__XADCIF_INT_STS, val_devcfg__XADCIF_INT_STS);
-set_reset_data( devcfg__XADCIF_INT_MASK, val_devcfg__XADCIF_INT_MASK);
-set_reset_data( devcfg__XADCIF_MSTS, val_devcfg__XADCIF_MSTS);
-set_reset_data( devcfg__XADCIF_CMDFIFO, val_devcfg__XADCIF_CMDFIFO);
-set_reset_data( devcfg__XADCIF_RDFIFO, val_devcfg__XADCIF_RDFIFO);
-set_reset_data( devcfg__XADCIF_MCTL, val_devcfg__XADCIF_MCTL);
-
-// ************************************************************
-// Module dmac0_ns dmac
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( dmac0_ns__DSR, val_dmac0_ns__DSR);
-set_reset_data( dmac0_ns__DPC, val_dmac0_ns__DPC);
-set_reset_data( dmac0_ns__INTEN, val_dmac0_ns__INTEN);
-set_reset_data( dmac0_ns__INT_EVENT_RIS, val_dmac0_ns__INT_EVENT_RIS);
-set_reset_data( dmac0_ns__INTMIS, val_dmac0_ns__INTMIS);
-set_reset_data( dmac0_ns__INTCLR, val_dmac0_ns__INTCLR);
-set_reset_data( dmac0_ns__FSRD, val_dmac0_ns__FSRD);
-set_reset_data( dmac0_ns__FSRC, val_dmac0_ns__FSRC);
-set_reset_data( dmac0_ns__FTRD, val_dmac0_ns__FTRD);
-set_reset_data( dmac0_ns__FTR0, val_dmac0_ns__FTR0);
-set_reset_data( dmac0_ns__FTR1, val_dmac0_ns__FTR1);
-set_reset_data( dmac0_ns__FTR2, val_dmac0_ns__FTR2);
-set_reset_data( dmac0_ns__FTR3, val_dmac0_ns__FTR3);
-set_reset_data( dmac0_ns__FTR4, val_dmac0_ns__FTR4);
-set_reset_data( dmac0_ns__FTR5, val_dmac0_ns__FTR5);
-set_reset_data( dmac0_ns__FTR6, val_dmac0_ns__FTR6);
-set_reset_data( dmac0_ns__FTR7, val_dmac0_ns__FTR7);
-set_reset_data( dmac0_ns__CSR0, val_dmac0_ns__CSR0);
-set_reset_data( dmac0_ns__CPC0, val_dmac0_ns__CPC0);
-set_reset_data( dmac0_ns__CSR1, val_dmac0_ns__CSR1);
-set_reset_data( dmac0_ns__CPC1, val_dmac0_ns__CPC1);
-set_reset_data( dmac0_ns__CSR2, val_dmac0_ns__CSR2);
-set_reset_data( dmac0_ns__CPC2, val_dmac0_ns__CPC2);
-set_reset_data( dmac0_ns__CSR3, val_dmac0_ns__CSR3);
-set_reset_data( dmac0_ns__CPC3, val_dmac0_ns__CPC3);
-set_reset_data( dmac0_ns__CSR4, val_dmac0_ns__CSR4);
-set_reset_data( dmac0_ns__CPC4, val_dmac0_ns__CPC4);
-set_reset_data( dmac0_ns__CSR5, val_dmac0_ns__CSR5);
-set_reset_data( dmac0_ns__CPC5, val_dmac0_ns__CPC5);
-set_reset_data( dmac0_ns__CSR6, val_dmac0_ns__CSR6);
-set_reset_data( dmac0_ns__CPC6, val_dmac0_ns__CPC6);
-set_reset_data( dmac0_ns__CSR7, val_dmac0_ns__CSR7);
-set_reset_data( dmac0_ns__CPC7, val_dmac0_ns__CPC7);
-set_reset_data( dmac0_ns__SAR0, val_dmac0_ns__SAR0);
-set_reset_data( dmac0_ns__DAR0, val_dmac0_ns__DAR0);
-set_reset_data( dmac0_ns__CCR0, val_dmac0_ns__CCR0);
-set_reset_data( dmac0_ns__LC0_0, val_dmac0_ns__LC0_0);
-set_reset_data( dmac0_ns__LC1_0, val_dmac0_ns__LC1_0);
-set_reset_data( dmac0_ns__SAR1, val_dmac0_ns__SAR1);
-set_reset_data( dmac0_ns__DAR1, val_dmac0_ns__DAR1);
-set_reset_data( dmac0_ns__CCR1, val_dmac0_ns__CCR1);
-set_reset_data( dmac0_ns__LC0_1, val_dmac0_ns__LC0_1);
-set_reset_data( dmac0_ns__LC1_1, val_dmac0_ns__LC1_1);
-set_reset_data( dmac0_ns__SAR2, val_dmac0_ns__SAR2);
-set_reset_data( dmac0_ns__DAR2, val_dmac0_ns__DAR2);
-set_reset_data( dmac0_ns__CCR2, val_dmac0_ns__CCR2);
-set_reset_data( dmac0_ns__LC0_2, val_dmac0_ns__LC0_2);
-set_reset_data( dmac0_ns__LC1_2, val_dmac0_ns__LC1_2);
-set_reset_data( dmac0_ns__SAR3, val_dmac0_ns__SAR3);
-set_reset_data( dmac0_ns__DAR3, val_dmac0_ns__DAR3);
-set_reset_data( dmac0_ns__CCR3, val_dmac0_ns__CCR3);
-set_reset_data( dmac0_ns__LC0_3, val_dmac0_ns__LC0_3);
-set_reset_data( dmac0_ns__LC1_3, val_dmac0_ns__LC1_3);
-set_reset_data( dmac0_ns__SAR4, val_dmac0_ns__SAR4);
-set_reset_data( dmac0_ns__DAR4, val_dmac0_ns__DAR4);
-set_reset_data( dmac0_ns__CCR4, val_dmac0_ns__CCR4);
-set_reset_data( dmac0_ns__LC0_4, val_dmac0_ns__LC0_4);
-set_reset_data( dmac0_ns__LC1_4, val_dmac0_ns__LC1_4);
-set_reset_data( dmac0_ns__SAR5, val_dmac0_ns__SAR5);
-set_reset_data( dmac0_ns__DAR5, val_dmac0_ns__DAR5);
-set_reset_data( dmac0_ns__CCR5, val_dmac0_ns__CCR5);
-set_reset_data( dmac0_ns__LC0_5, val_dmac0_ns__LC0_5);
-set_reset_data( dmac0_ns__LC1_5, val_dmac0_ns__LC1_5);
-set_reset_data( dmac0_ns__SAR6, val_dmac0_ns__SAR6);
-set_reset_data( dmac0_ns__DAR6, val_dmac0_ns__DAR6);
-set_reset_data( dmac0_ns__CCR6, val_dmac0_ns__CCR6);
-set_reset_data( dmac0_ns__LC0_6, val_dmac0_ns__LC0_6);
-set_reset_data( dmac0_ns__LC1_6, val_dmac0_ns__LC1_6);
-set_reset_data( dmac0_ns__SAR7, val_dmac0_ns__SAR7);
-set_reset_data( dmac0_ns__DAR7, val_dmac0_ns__DAR7);
-set_reset_data( dmac0_ns__CCR7, val_dmac0_ns__CCR7);
-set_reset_data( dmac0_ns__LC0_7, val_dmac0_ns__LC0_7);
-set_reset_data( dmac0_ns__LC1_7, val_dmac0_ns__LC1_7);
-set_reset_data( dmac0_ns__DBGSTATUS, val_dmac0_ns__DBGSTATUS);
-set_reset_data( dmac0_ns__DBGCMD, val_dmac0_ns__DBGCMD);
-set_reset_data( dmac0_ns__DBGINST0, val_dmac0_ns__DBGINST0);
-set_reset_data( dmac0_ns__DBGINST1, val_dmac0_ns__DBGINST1);
-set_reset_data( dmac0_ns__CR0, val_dmac0_ns__CR0);
-set_reset_data( dmac0_ns__CR1, val_dmac0_ns__CR1);
-set_reset_data( dmac0_ns__CR2, val_dmac0_ns__CR2);
-set_reset_data( dmac0_ns__CR3, val_dmac0_ns__CR3);
-set_reset_data( dmac0_ns__CR4, val_dmac0_ns__CR4);
-set_reset_data( dmac0_ns__CRD, val_dmac0_ns__CRD);
-set_reset_data( dmac0_ns__WD, val_dmac0_ns__WD);
-set_reset_data( dmac0_ns__periph_id_0, val_dmac0_ns__periph_id_0);
-set_reset_data( dmac0_ns__periph_id_1, val_dmac0_ns__periph_id_1);
-set_reset_data( dmac0_ns__periph_id_2, val_dmac0_ns__periph_id_2);
-set_reset_data( dmac0_ns__periph_id_3, val_dmac0_ns__periph_id_3);
-set_reset_data( dmac0_ns__pcell_id_0, val_dmac0_ns__pcell_id_0);
-set_reset_data( dmac0_ns__pcell_id_1, val_dmac0_ns__pcell_id_1);
-set_reset_data( dmac0_ns__pcell_id_2, val_dmac0_ns__pcell_id_2);
-set_reset_data( dmac0_ns__pcell_id_3, val_dmac0_ns__pcell_id_3);
-
-// ************************************************************
-// Module dmac0_s dmac
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( dmac0_s__DSR, val_dmac0_s__DSR);
-set_reset_data( dmac0_s__DPC, val_dmac0_s__DPC);
-set_reset_data( dmac0_s__INTEN, val_dmac0_s__INTEN);
-set_reset_data( dmac0_s__INT_EVENT_RIS, val_dmac0_s__INT_EVENT_RIS);
-set_reset_data( dmac0_s__INTMIS, val_dmac0_s__INTMIS);
-set_reset_data( dmac0_s__INTCLR, val_dmac0_s__INTCLR);
-set_reset_data( dmac0_s__FSRD, val_dmac0_s__FSRD);
-set_reset_data( dmac0_s__FSRC, val_dmac0_s__FSRC);
-set_reset_data( dmac0_s__FTRD, val_dmac0_s__FTRD);
-set_reset_data( dmac0_s__FTR0, val_dmac0_s__FTR0);
-set_reset_data( dmac0_s__FTR1, val_dmac0_s__FTR1);
-set_reset_data( dmac0_s__FTR2, val_dmac0_s__FTR2);
-set_reset_data( dmac0_s__FTR3, val_dmac0_s__FTR3);
-set_reset_data( dmac0_s__FTR4, val_dmac0_s__FTR4);
-set_reset_data( dmac0_s__FTR5, val_dmac0_s__FTR5);
-set_reset_data( dmac0_s__FTR6, val_dmac0_s__FTR6);
-set_reset_data( dmac0_s__FTR7, val_dmac0_s__FTR7);
-set_reset_data( dmac0_s__CSR0, val_dmac0_s__CSR0);
-set_reset_data( dmac0_s__CPC0, val_dmac0_s__CPC0);
-set_reset_data( dmac0_s__CSR1, val_dmac0_s__CSR1);
-set_reset_data( dmac0_s__CPC1, val_dmac0_s__CPC1);
-set_reset_data( dmac0_s__CSR2, val_dmac0_s__CSR2);
-set_reset_data( dmac0_s__CPC2, val_dmac0_s__CPC2);
-set_reset_data( dmac0_s__CSR3, val_dmac0_s__CSR3);
-set_reset_data( dmac0_s__CPC3, val_dmac0_s__CPC3);
-set_reset_data( dmac0_s__CSR4, val_dmac0_s__CSR4);
-set_reset_data( dmac0_s__CPC4, val_dmac0_s__CPC4);
-set_reset_data( dmac0_s__CSR5, val_dmac0_s__CSR5);
-set_reset_data( dmac0_s__CPC5, val_dmac0_s__CPC5);
-set_reset_data( dmac0_s__CSR6, val_dmac0_s__CSR6);
-set_reset_data( dmac0_s__CPC6, val_dmac0_s__CPC6);
-set_reset_data( dmac0_s__CSR7, val_dmac0_s__CSR7);
-set_reset_data( dmac0_s__CPC7, val_dmac0_s__CPC7);
-set_reset_data( dmac0_s__SAR0, val_dmac0_s__SAR0);
-set_reset_data( dmac0_s__DAR0, val_dmac0_s__DAR0);
-set_reset_data( dmac0_s__CCR0, val_dmac0_s__CCR0);
-set_reset_data( dmac0_s__LC0_0, val_dmac0_s__LC0_0);
-set_reset_data( dmac0_s__LC1_0, val_dmac0_s__LC1_0);
-set_reset_data( dmac0_s__SAR1, val_dmac0_s__SAR1);
-set_reset_data( dmac0_s__DAR1, val_dmac0_s__DAR1);
-set_reset_data( dmac0_s__CCR1, val_dmac0_s__CCR1);
-set_reset_data( dmac0_s__LC0_1, val_dmac0_s__LC0_1);
-set_reset_data( dmac0_s__LC1_1, val_dmac0_s__LC1_1);
-set_reset_data( dmac0_s__SAR2, val_dmac0_s__SAR2);
-set_reset_data( dmac0_s__DAR2, val_dmac0_s__DAR2);
-set_reset_data( dmac0_s__CCR2, val_dmac0_s__CCR2);
-set_reset_data( dmac0_s__LC0_2, val_dmac0_s__LC0_2);
-set_reset_data( dmac0_s__LC1_2, val_dmac0_s__LC1_2);
-set_reset_data( dmac0_s__SAR3, val_dmac0_s__SAR3);
-set_reset_data( dmac0_s__DAR3, val_dmac0_s__DAR3);
-set_reset_data( dmac0_s__CCR3, val_dmac0_s__CCR3);
-set_reset_data( dmac0_s__LC0_3, val_dmac0_s__LC0_3);
-set_reset_data( dmac0_s__LC1_3, val_dmac0_s__LC1_3);
-set_reset_data( dmac0_s__SAR4, val_dmac0_s__SAR4);
-set_reset_data( dmac0_s__DAR4, val_dmac0_s__DAR4);
-set_reset_data( dmac0_s__CCR4, val_dmac0_s__CCR4);
-set_reset_data( dmac0_s__LC0_4, val_dmac0_s__LC0_4);
-set_reset_data( dmac0_s__LC1_4, val_dmac0_s__LC1_4);
-set_reset_data( dmac0_s__SAR5, val_dmac0_s__SAR5);
-set_reset_data( dmac0_s__DAR5, val_dmac0_s__DAR5);
-set_reset_data( dmac0_s__CCR5, val_dmac0_s__CCR5);
-set_reset_data( dmac0_s__LC0_5, val_dmac0_s__LC0_5);
-set_reset_data( dmac0_s__LC1_5, val_dmac0_s__LC1_5);
-set_reset_data( dmac0_s__SAR6, val_dmac0_s__SAR6);
-set_reset_data( dmac0_s__DAR6, val_dmac0_s__DAR6);
-set_reset_data( dmac0_s__CCR6, val_dmac0_s__CCR6);
-set_reset_data( dmac0_s__LC0_6, val_dmac0_s__LC0_6);
-set_reset_data( dmac0_s__LC1_6, val_dmac0_s__LC1_6);
-set_reset_data( dmac0_s__SAR7, val_dmac0_s__SAR7);
-set_reset_data( dmac0_s__DAR7, val_dmac0_s__DAR7);
-set_reset_data( dmac0_s__CCR7, val_dmac0_s__CCR7);
-set_reset_data( dmac0_s__LC0_7, val_dmac0_s__LC0_7);
-set_reset_data( dmac0_s__LC1_7, val_dmac0_s__LC1_7);
-set_reset_data( dmac0_s__DBGSTATUS, val_dmac0_s__DBGSTATUS);
-set_reset_data( dmac0_s__DBGCMD, val_dmac0_s__DBGCMD);
-set_reset_data( dmac0_s__DBGINST0, val_dmac0_s__DBGINST0);
-set_reset_data( dmac0_s__DBGINST1, val_dmac0_s__DBGINST1);
-set_reset_data( dmac0_s__CR0, val_dmac0_s__CR0);
-set_reset_data( dmac0_s__CR1, val_dmac0_s__CR1);
-set_reset_data( dmac0_s__CR2, val_dmac0_s__CR2);
-set_reset_data( dmac0_s__CR3, val_dmac0_s__CR3);
-set_reset_data( dmac0_s__CR4, val_dmac0_s__CR4);
-set_reset_data( dmac0_s__CRD, val_dmac0_s__CRD);
-set_reset_data( dmac0_s__WD, val_dmac0_s__WD);
-set_reset_data( dmac0_s__periph_id_0, val_dmac0_s__periph_id_0);
-set_reset_data( dmac0_s__periph_id_1, val_dmac0_s__periph_id_1);
-set_reset_data( dmac0_s__periph_id_2, val_dmac0_s__periph_id_2);
-set_reset_data( dmac0_s__periph_id_3, val_dmac0_s__periph_id_3);
-set_reset_data( dmac0_s__pcell_id_0, val_dmac0_s__pcell_id_0);
-set_reset_data( dmac0_s__pcell_id_1, val_dmac0_s__pcell_id_1);
-set_reset_data( dmac0_s__pcell_id_2, val_dmac0_s__pcell_id_2);
-set_reset_data( dmac0_s__pcell_id_3, val_dmac0_s__pcell_id_3);
-
-// ************************************************************
-// Module efuse_ctrl efuse_ctrl
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( efuse_ctrl__WR_LOCK, val_efuse_ctrl__WR_LOCK);
-set_reset_data( efuse_ctrl__WR_UNLOCK, val_efuse_ctrl__WR_UNLOCK);
-set_reset_data( efuse_ctrl__WR_LOCKSTA, val_efuse_ctrl__WR_LOCKSTA);
-set_reset_data( efuse_ctrl__CFG, val_efuse_ctrl__CFG);
-set_reset_data( efuse_ctrl__STATUS, val_efuse_ctrl__STATUS);
-set_reset_data( efuse_ctrl__CONTROL, val_efuse_ctrl__CONTROL);
-set_reset_data( efuse_ctrl__PGM_STBW, val_efuse_ctrl__PGM_STBW);
-set_reset_data( efuse_ctrl__RD_STBW, val_efuse_ctrl__RD_STBW);
-
-// ************************************************************
-// Module gem0 GEM
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gem0__net_ctrl, val_gem0__net_ctrl);
-set_reset_data( gem0__net_cfg, val_gem0__net_cfg);
-set_reset_data( gem0__net_status, val_gem0__net_status);
-set_reset_data( gem0__user_io, val_gem0__user_io);
-set_reset_data( gem0__dma_cfg, val_gem0__dma_cfg);
-set_reset_data( gem0__tx_status, val_gem0__tx_status);
-set_reset_data( gem0__rx_qbar, val_gem0__rx_qbar);
-set_reset_data( gem0__tx_qbar, val_gem0__tx_qbar);
-set_reset_data( gem0__rx_status, val_gem0__rx_status);
-set_reset_data( gem0__intr_status, val_gem0__intr_status);
-set_reset_data( gem0__intr_en, val_gem0__intr_en);
-set_reset_data( gem0__intr_dis, val_gem0__intr_dis);
-set_reset_data( gem0__intr_mask, val_gem0__intr_mask);
-set_reset_data( gem0__phy_maint, val_gem0__phy_maint);
-set_reset_data( gem0__rx_pauseq, val_gem0__rx_pauseq);
-set_reset_data( gem0__tx_pauseq, val_gem0__tx_pauseq);
-set_reset_data( gem0__tx_partial_st_fwd, val_gem0__tx_partial_st_fwd);
-set_reset_data( gem0__rx_partial_st_fwd, val_gem0__rx_partial_st_fwd);
-set_reset_data( gem0__hash_bot, val_gem0__hash_bot);
-set_reset_data( gem0__hash_top, val_gem0__hash_top);
-set_reset_data( gem0__spec_addr1_bot, val_gem0__spec_addr1_bot);
-set_reset_data( gem0__spec_addr1_top, val_gem0__spec_addr1_top);
-set_reset_data( gem0__spec_addr2_bot, val_gem0__spec_addr2_bot);
-set_reset_data( gem0__spec_addr2_top, val_gem0__spec_addr2_top);
-set_reset_data( gem0__spec_addr3_bot, val_gem0__spec_addr3_bot);
-set_reset_data( gem0__spec_addr3_top, val_gem0__spec_addr3_top);
-set_reset_data( gem0__spec_addr4_bot, val_gem0__spec_addr4_bot);
-set_reset_data( gem0__spec_addr4_top, val_gem0__spec_addr4_top);
-set_reset_data( gem0__type_id_match1, val_gem0__type_id_match1);
-set_reset_data( gem0__type_id_match2, val_gem0__type_id_match2);
-set_reset_data( gem0__type_id_match3, val_gem0__type_id_match3);
-set_reset_data( gem0__type_id_match4, val_gem0__type_id_match4);
-set_reset_data( gem0__wake_on_lan, val_gem0__wake_on_lan);
-set_reset_data( gem0__ipg_stretch, val_gem0__ipg_stretch);
-set_reset_data( gem0__stacked_vlan, val_gem0__stacked_vlan);
-set_reset_data( gem0__tx_pfc_pause, val_gem0__tx_pfc_pause);
-set_reset_data( gem0__spec_addr1_mask_bot, val_gem0__spec_addr1_mask_bot);
-set_reset_data( gem0__spec_addr1_mask_top, val_gem0__spec_addr1_mask_top);
-set_reset_data( gem0__module_id, val_gem0__module_id);
-set_reset_data( gem0__octets_tx_bot, val_gem0__octets_tx_bot);
-set_reset_data( gem0__octets_tx_top, val_gem0__octets_tx_top);
-set_reset_data( gem0__frames_tx, val_gem0__frames_tx);
-set_reset_data( gem0__broadcast_frames_tx, val_gem0__broadcast_frames_tx);
-set_reset_data( gem0__multi_frames_tx, val_gem0__multi_frames_tx);
-set_reset_data( gem0__pause_frames_tx, val_gem0__pause_frames_tx);
-set_reset_data( gem0__frames_64b_tx, val_gem0__frames_64b_tx);
-set_reset_data( gem0__frames_65to127b_tx, val_gem0__frames_65to127b_tx);
-set_reset_data( gem0__frames_128to255b_tx, val_gem0__frames_128to255b_tx);
-set_reset_data( gem0__frames_256to511b_tx, val_gem0__frames_256to511b_tx);
-set_reset_data( gem0__frames_512to1023b_tx, val_gem0__frames_512to1023b_tx);
-set_reset_data( gem0__frames_1024to1518b_tx, val_gem0__frames_1024to1518b_tx);
-set_reset_data( gem0__frames_gt1518b_tx, val_gem0__frames_gt1518b_tx);
-set_reset_data( gem0__tx_under_runs, val_gem0__tx_under_runs);
-set_reset_data( gem0__single_collisn_frames, val_gem0__single_collisn_frames);
-set_reset_data( gem0__multi_collisn_frames, val_gem0__multi_collisn_frames);
-set_reset_data( gem0__excessive_collisns, val_gem0__excessive_collisns);
-set_reset_data( gem0__late_collisns, val_gem0__late_collisns);
-set_reset_data( gem0__deferred_tx_frames, val_gem0__deferred_tx_frames);
-set_reset_data( gem0__carrier_sense_errs, val_gem0__carrier_sense_errs);
-set_reset_data( gem0__octets_rx_bot, val_gem0__octets_rx_bot);
-set_reset_data( gem0__octets_rx_top, val_gem0__octets_rx_top);
-set_reset_data( gem0__frames_rx, val_gem0__frames_rx);
-set_reset_data( gem0__bdcast_fames_rx, val_gem0__bdcast_fames_rx);
-set_reset_data( gem0__multi_frames_rx, val_gem0__multi_frames_rx);
-set_reset_data( gem0__pause_rx, val_gem0__pause_rx);
-set_reset_data( gem0__frames_64b_rx, val_gem0__frames_64b_rx);
-set_reset_data( gem0__frames_65to127b_rx, val_gem0__frames_65to127b_rx);
-set_reset_data( gem0__frames_128to255b_rx, val_gem0__frames_128to255b_rx);
-set_reset_data( gem0__frames_256to511b_rx, val_gem0__frames_256to511b_rx);
-set_reset_data( gem0__frames_512to1023b_rx, val_gem0__frames_512to1023b_rx);
-set_reset_data( gem0__frames_1024to1518b_rx, val_gem0__frames_1024to1518b_rx);
-set_reset_data( gem0__frames_gt1518b_rx, val_gem0__frames_gt1518b_rx);
-set_reset_data( gem0__undersz_rx, val_gem0__undersz_rx);
-set_reset_data( gem0__oversz_rx, val_gem0__oversz_rx);
-set_reset_data( gem0__jab_rx, val_gem0__jab_rx);
-set_reset_data( gem0__fcs_errors, val_gem0__fcs_errors);
-set_reset_data( gem0__length_field_errors, val_gem0__length_field_errors);
-set_reset_data( gem0__rx_symbol_errors, val_gem0__rx_symbol_errors);
-set_reset_data( gem0__align_errors, val_gem0__align_errors);
-set_reset_data( gem0__rx_resource_errors, val_gem0__rx_resource_errors);
-set_reset_data( gem0__rx_overrun_errors, val_gem0__rx_overrun_errors);
-set_reset_data( gem0__ip_hdr_csum_errors, val_gem0__ip_hdr_csum_errors);
-set_reset_data( gem0__tcp_csum_errors, val_gem0__tcp_csum_errors);
-set_reset_data( gem0__udp_csum_errors, val_gem0__udp_csum_errors);
-set_reset_data( gem0__timer_strobe_s, val_gem0__timer_strobe_s);
-set_reset_data( gem0__timer_strobe_ns, val_gem0__timer_strobe_ns);
-set_reset_data( gem0__timer_s, val_gem0__timer_s);
-set_reset_data( gem0__timer_ns, val_gem0__timer_ns);
-set_reset_data( gem0__timer_adjust, val_gem0__timer_adjust);
-set_reset_data( gem0__timer_incr, val_gem0__timer_incr);
-set_reset_data( gem0__ptp_tx_s, val_gem0__ptp_tx_s);
-set_reset_data( gem0__ptp_tx_ns, val_gem0__ptp_tx_ns);
-set_reset_data( gem0__ptp_rx_s, val_gem0__ptp_rx_s);
-set_reset_data( gem0__ptp_rx_ns, val_gem0__ptp_rx_ns);
-set_reset_data( gem0__ptp_peer_tx_s, val_gem0__ptp_peer_tx_s);
-set_reset_data( gem0__ptp_peer_tx_ns, val_gem0__ptp_peer_tx_ns);
-set_reset_data( gem0__ptp_peer_rx_s, val_gem0__ptp_peer_rx_s);
-set_reset_data( gem0__ptp_peer_rx_ns, val_gem0__ptp_peer_rx_ns);
-set_reset_data( gem0__pcs_ctrl, val_gem0__pcs_ctrl);
-set_reset_data( gem0__pcs_status, val_gem0__pcs_status);
-set_reset_data( gem0__pcs_upper_phy_id, val_gem0__pcs_upper_phy_id);
-set_reset_data( gem0__pcs_lower_phy_id, val_gem0__pcs_lower_phy_id);
-set_reset_data( gem0__pcs_autoneg_ad, val_gem0__pcs_autoneg_ad);
-set_reset_data( gem0__pcs_autoneg_ability, val_gem0__pcs_autoneg_ability);
-set_reset_data( gem0__pcs_autonec_exp, val_gem0__pcs_autonec_exp);
-set_reset_data( gem0__pcs_autoneg_next_pg, val_gem0__pcs_autoneg_next_pg);
-set_reset_data( gem0__pcs_autoneg_pnext_pg, val_gem0__pcs_autoneg_pnext_pg);
-set_reset_data( gem0__pcs_extended_status, val_gem0__pcs_extended_status);
-set_reset_data( gem0__design_cfg1, val_gem0__design_cfg1);
-set_reset_data( gem0__design_cfg2, val_gem0__design_cfg2);
-set_reset_data( gem0__design_cfg3, val_gem0__design_cfg3);
-set_reset_data( gem0__design_cfg4, val_gem0__design_cfg4);
-set_reset_data( gem0__design_cfg5, val_gem0__design_cfg5);
-set_reset_data( gem0__design_cfg6, val_gem0__design_cfg6);
-set_reset_data( gem0__design_cfg7, val_gem0__design_cfg7);
-set_reset_data( gem0__isr_pq1, val_gem0__isr_pq1);
-set_reset_data( gem0__isr_pq2, val_gem0__isr_pq2);
-set_reset_data( gem0__isr_pq3, val_gem0__isr_pq3);
-set_reset_data( gem0__isr_pq4, val_gem0__isr_pq4);
-set_reset_data( gem0__isr_pq5, val_gem0__isr_pq5);
-set_reset_data( gem0__isr_pq6, val_gem0__isr_pq6);
-set_reset_data( gem0__isr_pq7, val_gem0__isr_pq7);
-set_reset_data( gem0__tx_qbar_q1, val_gem0__tx_qbar_q1);
-set_reset_data( gem0__tx_qbar_q2, val_gem0__tx_qbar_q2);
-set_reset_data( gem0__tx_qbar_q3, val_gem0__tx_qbar_q3);
-set_reset_data( gem0__tx_qbar_q4, val_gem0__tx_qbar_q4);
-set_reset_data( gem0__tx_qbar_q5, val_gem0__tx_qbar_q5);
-set_reset_data( gem0__tx_qbar_q6, val_gem0__tx_qbar_q6);
-set_reset_data( gem0__tx_qbar_q7, val_gem0__tx_qbar_q7);
-set_reset_data( gem0__rx_qbar_q1, val_gem0__rx_qbar_q1);
-set_reset_data( gem0__rx_qbar_q2, val_gem0__rx_qbar_q2);
-set_reset_data( gem0__rx_qbar_q3, val_gem0__rx_qbar_q3);
-set_reset_data( gem0__rx_qbar_q4, val_gem0__rx_qbar_q4);
-set_reset_data( gem0__rx_qbar_q5, val_gem0__rx_qbar_q5);
-set_reset_data( gem0__rx_qbar_q6, val_gem0__rx_qbar_q6);
-set_reset_data( gem0__rx_qbar_q7, val_gem0__rx_qbar_q7);
-set_reset_data( gem0__rx_bufsz_q1, val_gem0__rx_bufsz_q1);
-set_reset_data( gem0__rx_bufsz_q2, val_gem0__rx_bufsz_q2);
-set_reset_data( gem0__rx_bufsz_q3, val_gem0__rx_bufsz_q3);
-set_reset_data( gem0__rx_bufsz_q4, val_gem0__rx_bufsz_q4);
-set_reset_data( gem0__rx_bufsz_q5, val_gem0__rx_bufsz_q5);
-set_reset_data( gem0__rx_bufsz_q6, val_gem0__rx_bufsz_q6);
-set_reset_data( gem0__rx_bufsz_q7, val_gem0__rx_bufsz_q7);
-set_reset_data( gem0__screen_t1_r0, val_gem0__screen_t1_r0);
-set_reset_data( gem0__screen_t1_r1, val_gem0__screen_t1_r1);
-set_reset_data( gem0__screen_t1_r2, val_gem0__screen_t1_r2);
-set_reset_data( gem0__screen_t1_r3, val_gem0__screen_t1_r3);
-set_reset_data( gem0__screen_t1_r4, val_gem0__screen_t1_r4);
-set_reset_data( gem0__screen_t1_r5, val_gem0__screen_t1_r5);
-set_reset_data( gem0__screen_t1_r6, val_gem0__screen_t1_r6);
-set_reset_data( gem0__screen_t1_r7, val_gem0__screen_t1_r7);
-set_reset_data( gem0__screen_t1_r8, val_gem0__screen_t1_r8);
-set_reset_data( gem0__screen_t1_r9, val_gem0__screen_t1_r9);
-set_reset_data( gem0__screen_t1_r10, val_gem0__screen_t1_r10);
-set_reset_data( gem0__screen_t1_r11, val_gem0__screen_t1_r11);
-set_reset_data( gem0__screen_t1_r12, val_gem0__screen_t1_r12);
-set_reset_data( gem0__screen_t1_r13, val_gem0__screen_t1_r13);
-set_reset_data( gem0__screen_t1_r14, val_gem0__screen_t1_r14);
-set_reset_data( gem0__screen_t1_r15, val_gem0__screen_t1_r15);
-set_reset_data( gem0__screen_t2_r0, val_gem0__screen_t2_r0);
-set_reset_data( gem0__screen_t2_r1, val_gem0__screen_t2_r1);
-set_reset_data( gem0__screen_t2_r2, val_gem0__screen_t2_r2);
-set_reset_data( gem0__screen_t2_r3, val_gem0__screen_t2_r3);
-set_reset_data( gem0__screen_t2_r4, val_gem0__screen_t2_r4);
-set_reset_data( gem0__screen_t2_r5, val_gem0__screen_t2_r5);
-set_reset_data( gem0__screen_t2_r6, val_gem0__screen_t2_r6);
-set_reset_data( gem0__screen_t2_r7, val_gem0__screen_t2_r7);
-set_reset_data( gem0__screen_t2_r8, val_gem0__screen_t2_r8);
-set_reset_data( gem0__screen_t2_r9, val_gem0__screen_t2_r9);
-set_reset_data( gem0__screen_t2_r10, val_gem0__screen_t2_r10);
-set_reset_data( gem0__screen_t2_r11, val_gem0__screen_t2_r11);
-set_reset_data( gem0__screen_t2_r12, val_gem0__screen_t2_r12);
-set_reset_data( gem0__screen_t2_r13, val_gem0__screen_t2_r13);
-set_reset_data( gem0__screen_t2_r14, val_gem0__screen_t2_r14);
-set_reset_data( gem0__screen_t2_r15, val_gem0__screen_t2_r15);
-set_reset_data( gem0__intr_en_pq1, val_gem0__intr_en_pq1);
-set_reset_data( gem0__intr_en_pq2, val_gem0__intr_en_pq2);
-set_reset_data( gem0__intr_en_pq3, val_gem0__intr_en_pq3);
-set_reset_data( gem0__intr_en_pq4, val_gem0__intr_en_pq4);
-set_reset_data( gem0__intr_en_pq5, val_gem0__intr_en_pq5);
-set_reset_data( gem0__intr_en_pq6, val_gem0__intr_en_pq6);
-set_reset_data( gem0__intr_en_pq7, val_gem0__intr_en_pq7);
-set_reset_data( gem0__intr_dis_pq1, val_gem0__intr_dis_pq1);
-set_reset_data( gem0__intr_dis_pq2, val_gem0__intr_dis_pq2);
-set_reset_data( gem0__intr_dis_pq3, val_gem0__intr_dis_pq3);
-set_reset_data( gem0__intr_dis_pq4, val_gem0__intr_dis_pq4);
-set_reset_data( gem0__intr_dis_pq5, val_gem0__intr_dis_pq5);
-set_reset_data( gem0__intr_dis_pq6, val_gem0__intr_dis_pq6);
-set_reset_data( gem0__intr_dis_pq7, val_gem0__intr_dis_pq7);
-set_reset_data( gem0__intr_mask_pq1, val_gem0__intr_mask_pq1);
-set_reset_data( gem0__intr_mask_pq2, val_gem0__intr_mask_pq2);
-set_reset_data( gem0__intr_mask_pq3, val_gem0__intr_mask_pq3);
-set_reset_data( gem0__intr_mask_pq4, val_gem0__intr_mask_pq4);
-set_reset_data( gem0__intr_mask_pq5, val_gem0__intr_mask_pq5);
-set_reset_data( gem0__intr_mask_pq6, val_gem0__intr_mask_pq6);
-set_reset_data( gem0__intr_mask_pq7, val_gem0__intr_mask_pq7);
-
-// ************************************************************
-// Module gem1 GEM
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gem1__net_ctrl, val_gem1__net_ctrl);
-set_reset_data( gem1__net_cfg, val_gem1__net_cfg);
-set_reset_data( gem1__net_status, val_gem1__net_status);
-set_reset_data( gem1__user_io, val_gem1__user_io);
-set_reset_data( gem1__dma_cfg, val_gem1__dma_cfg);
-set_reset_data( gem1__tx_status, val_gem1__tx_status);
-set_reset_data( gem1__rx_qbar, val_gem1__rx_qbar);
-set_reset_data( gem1__tx_qbar, val_gem1__tx_qbar);
-set_reset_data( gem1__rx_status, val_gem1__rx_status);
-set_reset_data( gem1__intr_status, val_gem1__intr_status);
-set_reset_data( gem1__intr_en, val_gem1__intr_en);
-set_reset_data( gem1__intr_dis, val_gem1__intr_dis);
-set_reset_data( gem1__intr_mask, val_gem1__intr_mask);
-set_reset_data( gem1__phy_maint, val_gem1__phy_maint);
-set_reset_data( gem1__rx_pauseq, val_gem1__rx_pauseq);
-set_reset_data( gem1__tx_pauseq, val_gem1__tx_pauseq);
-set_reset_data( gem1__tx_partial_st_fwd, val_gem1__tx_partial_st_fwd);
-set_reset_data( gem1__rx_partial_st_fwd, val_gem1__rx_partial_st_fwd);
-set_reset_data( gem1__hash_bot, val_gem1__hash_bot);
-set_reset_data( gem1__hash_top, val_gem1__hash_top);
-set_reset_data( gem1__spec_addr1_bot, val_gem1__spec_addr1_bot);
-set_reset_data( gem1__spec_addr1_top, val_gem1__spec_addr1_top);
-set_reset_data( gem1__spec_addr2_bot, val_gem1__spec_addr2_bot);
-set_reset_data( gem1__spec_addr2_top, val_gem1__spec_addr2_top);
-set_reset_data( gem1__spec_addr3_bot, val_gem1__spec_addr3_bot);
-set_reset_data( gem1__spec_addr3_top, val_gem1__spec_addr3_top);
-set_reset_data( gem1__spec_addr4_bot, val_gem1__spec_addr4_bot);
-set_reset_data( gem1__spec_addr4_top, val_gem1__spec_addr4_top);
-set_reset_data( gem1__type_id_match1, val_gem1__type_id_match1);
-set_reset_data( gem1__type_id_match2, val_gem1__type_id_match2);
-set_reset_data( gem1__type_id_match3, val_gem1__type_id_match3);
-set_reset_data( gem1__type_id_match4, val_gem1__type_id_match4);
-set_reset_data( gem1__wake_on_lan, val_gem1__wake_on_lan);
-set_reset_data( gem1__ipg_stretch, val_gem1__ipg_stretch);
-set_reset_data( gem1__stacked_vlan, val_gem1__stacked_vlan);
-set_reset_data( gem1__tx_pfc_pause, val_gem1__tx_pfc_pause);
-set_reset_data( gem1__spec_addr1_mask_bot, val_gem1__spec_addr1_mask_bot);
-set_reset_data( gem1__spec_addr1_mask_top, val_gem1__spec_addr1_mask_top);
-set_reset_data( gem1__module_id, val_gem1__module_id);
-set_reset_data( gem1__octets_tx_bot, val_gem1__octets_tx_bot);
-set_reset_data( gem1__octets_tx_top, val_gem1__octets_tx_top);
-set_reset_data( gem1__frames_tx, val_gem1__frames_tx);
-set_reset_data( gem1__broadcast_frames_tx, val_gem1__broadcast_frames_tx);
-set_reset_data( gem1__multi_frames_tx, val_gem1__multi_frames_tx);
-set_reset_data( gem1__pause_frames_tx, val_gem1__pause_frames_tx);
-set_reset_data( gem1__frames_64b_tx, val_gem1__frames_64b_tx);
-set_reset_data( gem1__frames_65to127b_tx, val_gem1__frames_65to127b_tx);
-set_reset_data( gem1__frames_128to255b_tx, val_gem1__frames_128to255b_tx);
-set_reset_data( gem1__frames_256to511b_tx, val_gem1__frames_256to511b_tx);
-set_reset_data( gem1__frames_512to1023b_tx, val_gem1__frames_512to1023b_tx);
-set_reset_data( gem1__frames_1024to1518b_tx, val_gem1__frames_1024to1518b_tx);
-set_reset_data( gem1__frames_gt1518b_tx, val_gem1__frames_gt1518b_tx);
-set_reset_data( gem1__tx_under_runs, val_gem1__tx_under_runs);
-set_reset_data( gem1__single_collisn_frames, val_gem1__single_collisn_frames);
-set_reset_data( gem1__multi_collisn_frames, val_gem1__multi_collisn_frames);
-set_reset_data( gem1__excessive_collisns, val_gem1__excessive_collisns);
-set_reset_data( gem1__late_collisns, val_gem1__late_collisns);
-set_reset_data( gem1__deferred_tx_frames, val_gem1__deferred_tx_frames);
-set_reset_data( gem1__carrier_sense_errs, val_gem1__carrier_sense_errs);
-set_reset_data( gem1__octets_rx_bot, val_gem1__octets_rx_bot);
-set_reset_data( gem1__octets_rx_top, val_gem1__octets_rx_top);
-set_reset_data( gem1__frames_rx, val_gem1__frames_rx);
-set_reset_data( gem1__bdcast_fames_rx, val_gem1__bdcast_fames_rx);
-set_reset_data( gem1__multi_frames_rx, val_gem1__multi_frames_rx);
-set_reset_data( gem1__pause_rx, val_gem1__pause_rx);
-set_reset_data( gem1__frames_64b_rx, val_gem1__frames_64b_rx);
-set_reset_data( gem1__frames_65to127b_rx, val_gem1__frames_65to127b_rx);
-set_reset_data( gem1__frames_128to255b_rx, val_gem1__frames_128to255b_rx);
-set_reset_data( gem1__frames_256to511b_rx, val_gem1__frames_256to511b_rx);
-set_reset_data( gem1__frames_512to1023b_rx, val_gem1__frames_512to1023b_rx);
-set_reset_data( gem1__frames_1024to1518b_rx, val_gem1__frames_1024to1518b_rx);
-set_reset_data( gem1__frames_gt1518b_rx, val_gem1__frames_gt1518b_rx);
-set_reset_data( gem1__undersz_rx, val_gem1__undersz_rx);
-set_reset_data( gem1__oversz_rx, val_gem1__oversz_rx);
-set_reset_data( gem1__jab_rx, val_gem1__jab_rx);
-set_reset_data( gem1__fcs_errors, val_gem1__fcs_errors);
-set_reset_data( gem1__length_field_errors, val_gem1__length_field_errors);
-set_reset_data( gem1__rx_symbol_errors, val_gem1__rx_symbol_errors);
-set_reset_data( gem1__align_errors, val_gem1__align_errors);
-set_reset_data( gem1__rx_resource_errors, val_gem1__rx_resource_errors);
-set_reset_data( gem1__rx_overrun_errors, val_gem1__rx_overrun_errors);
-set_reset_data( gem1__ip_hdr_csum_errors, val_gem1__ip_hdr_csum_errors);
-set_reset_data( gem1__tcp_csum_errors, val_gem1__tcp_csum_errors);
-set_reset_data( gem1__udp_csum_errors, val_gem1__udp_csum_errors);
-set_reset_data( gem1__timer_strobe_s, val_gem1__timer_strobe_s);
-set_reset_data( gem1__timer_strobe_ns, val_gem1__timer_strobe_ns);
-set_reset_data( gem1__timer_s, val_gem1__timer_s);
-set_reset_data( gem1__timer_ns, val_gem1__timer_ns);
-set_reset_data( gem1__timer_adjust, val_gem1__timer_adjust);
-set_reset_data( gem1__timer_incr, val_gem1__timer_incr);
-set_reset_data( gem1__ptp_tx_s, val_gem1__ptp_tx_s);
-set_reset_data( gem1__ptp_tx_ns, val_gem1__ptp_tx_ns);
-set_reset_data( gem1__ptp_rx_s, val_gem1__ptp_rx_s);
-set_reset_data( gem1__ptp_rx_ns, val_gem1__ptp_rx_ns);
-set_reset_data( gem1__ptp_peer_tx_s, val_gem1__ptp_peer_tx_s);
-set_reset_data( gem1__ptp_peer_tx_ns, val_gem1__ptp_peer_tx_ns);
-set_reset_data( gem1__ptp_peer_rx_s, val_gem1__ptp_peer_rx_s);
-set_reset_data( gem1__ptp_peer_rx_ns, val_gem1__ptp_peer_rx_ns);
-set_reset_data( gem1__pcs_ctrl, val_gem1__pcs_ctrl);
-set_reset_data( gem1__pcs_status, val_gem1__pcs_status);
-set_reset_data( gem1__pcs_upper_phy_id, val_gem1__pcs_upper_phy_id);
-set_reset_data( gem1__pcs_lower_phy_id, val_gem1__pcs_lower_phy_id);
-set_reset_data( gem1__pcs_autoneg_ad, val_gem1__pcs_autoneg_ad);
-set_reset_data( gem1__pcs_autoneg_ability, val_gem1__pcs_autoneg_ability);
-set_reset_data( gem1__pcs_autonec_exp, val_gem1__pcs_autonec_exp);
-set_reset_data( gem1__pcs_autoneg_next_pg, val_gem1__pcs_autoneg_next_pg);
-set_reset_data( gem1__pcs_autoneg_pnext_pg, val_gem1__pcs_autoneg_pnext_pg);
-set_reset_data( gem1__pcs_extended_status, val_gem1__pcs_extended_status);
-set_reset_data( gem1__design_cfg1, val_gem1__design_cfg1);
-set_reset_data( gem1__design_cfg2, val_gem1__design_cfg2);
-set_reset_data( gem1__design_cfg3, val_gem1__design_cfg3);
-set_reset_data( gem1__design_cfg4, val_gem1__design_cfg4);
-set_reset_data( gem1__design_cfg5, val_gem1__design_cfg5);
-set_reset_data( gem1__design_cfg6, val_gem1__design_cfg6);
-set_reset_data( gem1__design_cfg7, val_gem1__design_cfg7);
-set_reset_data( gem1__isr_pq1, val_gem1__isr_pq1);
-set_reset_data( gem1__isr_pq2, val_gem1__isr_pq2);
-set_reset_data( gem1__isr_pq3, val_gem1__isr_pq3);
-set_reset_data( gem1__isr_pq4, val_gem1__isr_pq4);
-set_reset_data( gem1__isr_pq5, val_gem1__isr_pq5);
-set_reset_data( gem1__isr_pq6, val_gem1__isr_pq6);
-set_reset_data( gem1__isr_pq7, val_gem1__isr_pq7);
-set_reset_data( gem1__tx_qbar_q1, val_gem1__tx_qbar_q1);
-set_reset_data( gem1__tx_qbar_q2, val_gem1__tx_qbar_q2);
-set_reset_data( gem1__tx_qbar_q3, val_gem1__tx_qbar_q3);
-set_reset_data( gem1__tx_qbar_q4, val_gem1__tx_qbar_q4);
-set_reset_data( gem1__tx_qbar_q5, val_gem1__tx_qbar_q5);
-set_reset_data( gem1__tx_qbar_q6, val_gem1__tx_qbar_q6);
-set_reset_data( gem1__tx_qbar_q7, val_gem1__tx_qbar_q7);
-set_reset_data( gem1__rx_qbar_q1, val_gem1__rx_qbar_q1);
-set_reset_data( gem1__rx_qbar_q2, val_gem1__rx_qbar_q2);
-set_reset_data( gem1__rx_qbar_q3, val_gem1__rx_qbar_q3);
-set_reset_data( gem1__rx_qbar_q4, val_gem1__rx_qbar_q4);
-set_reset_data( gem1__rx_qbar_q5, val_gem1__rx_qbar_q5);
-set_reset_data( gem1__rx_qbar_q6, val_gem1__rx_qbar_q6);
-set_reset_data( gem1__rx_qbar_q7, val_gem1__rx_qbar_q7);
-set_reset_data( gem1__rx_bufsz_q1, val_gem1__rx_bufsz_q1);
-set_reset_data( gem1__rx_bufsz_q2, val_gem1__rx_bufsz_q2);
-set_reset_data( gem1__rx_bufsz_q3, val_gem1__rx_bufsz_q3);
-set_reset_data( gem1__rx_bufsz_q4, val_gem1__rx_bufsz_q4);
-set_reset_data( gem1__rx_bufsz_q5, val_gem1__rx_bufsz_q5);
-set_reset_data( gem1__rx_bufsz_q6, val_gem1__rx_bufsz_q6);
-set_reset_data( gem1__rx_bufsz_q7, val_gem1__rx_bufsz_q7);
-set_reset_data( gem1__screen_t1_r0, val_gem1__screen_t1_r0);
-set_reset_data( gem1__screen_t1_r1, val_gem1__screen_t1_r1);
-set_reset_data( gem1__screen_t1_r2, val_gem1__screen_t1_r2);
-set_reset_data( gem1__screen_t1_r3, val_gem1__screen_t1_r3);
-set_reset_data( gem1__screen_t1_r4, val_gem1__screen_t1_r4);
-set_reset_data( gem1__screen_t1_r5, val_gem1__screen_t1_r5);
-set_reset_data( gem1__screen_t1_r6, val_gem1__screen_t1_r6);
-set_reset_data( gem1__screen_t1_r7, val_gem1__screen_t1_r7);
-set_reset_data( gem1__screen_t1_r8, val_gem1__screen_t1_r8);
-set_reset_data( gem1__screen_t1_r9, val_gem1__screen_t1_r9);
-set_reset_data( gem1__screen_t1_r10, val_gem1__screen_t1_r10);
-set_reset_data( gem1__screen_t1_r11, val_gem1__screen_t1_r11);
-set_reset_data( gem1__screen_t1_r12, val_gem1__screen_t1_r12);
-set_reset_data( gem1__screen_t1_r13, val_gem1__screen_t1_r13);
-set_reset_data( gem1__screen_t1_r14, val_gem1__screen_t1_r14);
-set_reset_data( gem1__screen_t1_r15, val_gem1__screen_t1_r15);
-set_reset_data( gem1__screen_t2_r0, val_gem1__screen_t2_r0);
-set_reset_data( gem1__screen_t2_r1, val_gem1__screen_t2_r1);
-set_reset_data( gem1__screen_t2_r2, val_gem1__screen_t2_r2);
-set_reset_data( gem1__screen_t2_r3, val_gem1__screen_t2_r3);
-set_reset_data( gem1__screen_t2_r4, val_gem1__screen_t2_r4);
-set_reset_data( gem1__screen_t2_r5, val_gem1__screen_t2_r5);
-set_reset_data( gem1__screen_t2_r6, val_gem1__screen_t2_r6);
-set_reset_data( gem1__screen_t2_r7, val_gem1__screen_t2_r7);
-set_reset_data( gem1__screen_t2_r8, val_gem1__screen_t2_r8);
-set_reset_data( gem1__screen_t2_r9, val_gem1__screen_t2_r9);
-set_reset_data( gem1__screen_t2_r10, val_gem1__screen_t2_r10);
-set_reset_data( gem1__screen_t2_r11, val_gem1__screen_t2_r11);
-set_reset_data( gem1__screen_t2_r12, val_gem1__screen_t2_r12);
-set_reset_data( gem1__screen_t2_r13, val_gem1__screen_t2_r13);
-set_reset_data( gem1__screen_t2_r14, val_gem1__screen_t2_r14);
-set_reset_data( gem1__screen_t2_r15, val_gem1__screen_t2_r15);
-set_reset_data( gem1__intr_en_pq1, val_gem1__intr_en_pq1);
-set_reset_data( gem1__intr_en_pq2, val_gem1__intr_en_pq2);
-set_reset_data( gem1__intr_en_pq3, val_gem1__intr_en_pq3);
-set_reset_data( gem1__intr_en_pq4, val_gem1__intr_en_pq4);
-set_reset_data( gem1__intr_en_pq5, val_gem1__intr_en_pq5);
-set_reset_data( gem1__intr_en_pq6, val_gem1__intr_en_pq6);
-set_reset_data( gem1__intr_en_pq7, val_gem1__intr_en_pq7);
-set_reset_data( gem1__intr_dis_pq1, val_gem1__intr_dis_pq1);
-set_reset_data( gem1__intr_dis_pq2, val_gem1__intr_dis_pq2);
-set_reset_data( gem1__intr_dis_pq3, val_gem1__intr_dis_pq3);
-set_reset_data( gem1__intr_dis_pq4, val_gem1__intr_dis_pq4);
-set_reset_data( gem1__intr_dis_pq5, val_gem1__intr_dis_pq5);
-set_reset_data( gem1__intr_dis_pq6, val_gem1__intr_dis_pq6);
-set_reset_data( gem1__intr_dis_pq7, val_gem1__intr_dis_pq7);
-set_reset_data( gem1__intr_mask_pq1, val_gem1__intr_mask_pq1);
-set_reset_data( gem1__intr_mask_pq2, val_gem1__intr_mask_pq2);
-set_reset_data( gem1__intr_mask_pq3, val_gem1__intr_mask_pq3);
-set_reset_data( gem1__intr_mask_pq4, val_gem1__intr_mask_pq4);
-set_reset_data( gem1__intr_mask_pq5, val_gem1__intr_mask_pq5);
-set_reset_data( gem1__intr_mask_pq6, val_gem1__intr_mask_pq6);
-set_reset_data( gem1__intr_mask_pq7, val_gem1__intr_mask_pq7);
-
-// ************************************************************
-// Module gpio gpio
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gpio__MASK_DATA_0_LSW, val_gpio__MASK_DATA_0_LSW);
-set_reset_data( gpio__MASK_DATA_0_MSW, val_gpio__MASK_DATA_0_MSW);
-set_reset_data( gpio__MASK_DATA_1_LSW, val_gpio__MASK_DATA_1_LSW);
-set_reset_data( gpio__MASK_DATA_1_MSW, val_gpio__MASK_DATA_1_MSW);
-set_reset_data( gpio__MASK_DATA_2_LSW, val_gpio__MASK_DATA_2_LSW);
-set_reset_data( gpio__MASK_DATA_2_MSW, val_gpio__MASK_DATA_2_MSW);
-set_reset_data( gpio__MASK_DATA_3_LSW, val_gpio__MASK_DATA_3_LSW);
-set_reset_data( gpio__MASK_DATA_3_MSW, val_gpio__MASK_DATA_3_MSW);
-set_reset_data( gpio__DATA_0, val_gpio__DATA_0);
-set_reset_data( gpio__DATA_1, val_gpio__DATA_1);
-set_reset_data( gpio__DATA_2, val_gpio__DATA_2);
-set_reset_data( gpio__DATA_3, val_gpio__DATA_3);
-set_reset_data( gpio__DATA_0_RO, val_gpio__DATA_0_RO);
-set_reset_data( gpio__DATA_1_RO, val_gpio__DATA_1_RO);
-set_reset_data( gpio__DATA_2_RO, val_gpio__DATA_2_RO);
-set_reset_data( gpio__DATA_3_RO, val_gpio__DATA_3_RO);
-set_reset_data( gpio__BYPM_0, val_gpio__BYPM_0);
-set_reset_data( gpio__DIRM_0, val_gpio__DIRM_0);
-set_reset_data( gpio__OEN_0, val_gpio__OEN_0);
-set_reset_data( gpio__INT_MASK_0, val_gpio__INT_MASK_0);
-set_reset_data( gpio__INT_EN_0, val_gpio__INT_EN_0);
-set_reset_data( gpio__INT_DIS_0, val_gpio__INT_DIS_0);
-set_reset_data( gpio__INT_STAT_0, val_gpio__INT_STAT_0);
-set_reset_data( gpio__INT_TYPE_0, val_gpio__INT_TYPE_0);
-set_reset_data( gpio__INT_POLARITY_0, val_gpio__INT_POLARITY_0);
-set_reset_data( gpio__INT_ANY_0, val_gpio__INT_ANY_0);
-set_reset_data( gpio__BYPM_1, val_gpio__BYPM_1);
-set_reset_data( gpio__DIRM_1, val_gpio__DIRM_1);
-set_reset_data( gpio__OEN_1, val_gpio__OEN_1);
-set_reset_data( gpio__INT_MASK_1, val_gpio__INT_MASK_1);
-set_reset_data( gpio__INT_EN_1, val_gpio__INT_EN_1);
-set_reset_data( gpio__INT_DIS_1, val_gpio__INT_DIS_1);
-set_reset_data( gpio__INT_STAT_1, val_gpio__INT_STAT_1);
-set_reset_data( gpio__INT_TYPE_1, val_gpio__INT_TYPE_1);
-set_reset_data( gpio__INT_POLARITY_1, val_gpio__INT_POLARITY_1);
-set_reset_data( gpio__INT_ANY_1, val_gpio__INT_ANY_1);
-set_reset_data( gpio__BYPM_2, val_gpio__BYPM_2);
-set_reset_data( gpio__DIRM_2, val_gpio__DIRM_2);
-set_reset_data( gpio__OEN_2, val_gpio__OEN_2);
-set_reset_data( gpio__INT_MASK_2, val_gpio__INT_MASK_2);
-set_reset_data( gpio__INT_EN_2, val_gpio__INT_EN_2);
-set_reset_data( gpio__INT_DIS_2, val_gpio__INT_DIS_2);
-set_reset_data( gpio__INT_STAT_2, val_gpio__INT_STAT_2);
-set_reset_data( gpio__INT_TYPE_2, val_gpio__INT_TYPE_2);
-set_reset_data( gpio__INT_POLARITY_2, val_gpio__INT_POLARITY_2);
-set_reset_data( gpio__INT_ANY_2, val_gpio__INT_ANY_2);
-set_reset_data( gpio__BYPM_3, val_gpio__BYPM_3);
-set_reset_data( gpio__DIRM_3, val_gpio__DIRM_3);
-set_reset_data( gpio__OEN_3, val_gpio__OEN_3);
-set_reset_data( gpio__INT_MASK_3, val_gpio__INT_MASK_3);
-set_reset_data( gpio__INT_EN_3, val_gpio__INT_EN_3);
-set_reset_data( gpio__INT_DIS_3, val_gpio__INT_DIS_3);
-set_reset_data( gpio__INT_STAT_3, val_gpio__INT_STAT_3);
-set_reset_data( gpio__INT_TYPE_3, val_gpio__INT_TYPE_3);
-set_reset_data( gpio__INT_POLARITY_3, val_gpio__INT_POLARITY_3);
-set_reset_data( gpio__INT_ANY_3, val_gpio__INT_ANY_3);
-
-// ************************************************************
-// Module gpv_iou_switch gpv_iou_switch
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gpv_iou_switch__Remap, val_gpv_iou_switch__Remap);
-set_reset_data( gpv_iou_switch__security2_sdio0, val_gpv_iou_switch__security2_sdio0);
-set_reset_data( gpv_iou_switch__security3_sdio1, val_gpv_iou_switch__security3_sdio1);
-set_reset_data( gpv_iou_switch__security4_qspi, val_gpv_iou_switch__security4_qspi);
-set_reset_data( gpv_iou_switch__security5_miou, val_gpv_iou_switch__security5_miou);
-set_reset_data( gpv_iou_switch__security6_apb_slaves, val_gpv_iou_switch__security6_apb_slaves);
-set_reset_data( gpv_iou_switch__security7_smc, val_gpv_iou_switch__security7_smc);
-set_reset_data( gpv_iou_switch__peripheral_id4, val_gpv_iou_switch__peripheral_id4);
-set_reset_data( gpv_iou_switch__peripheral_id5, val_gpv_iou_switch__peripheral_id5);
-set_reset_data( gpv_iou_switch__peripheral_id6, val_gpv_iou_switch__peripheral_id6);
-set_reset_data( gpv_iou_switch__peripheral_id7, val_gpv_iou_switch__peripheral_id7);
-set_reset_data( gpv_iou_switch__peripheral_id0, val_gpv_iou_switch__peripheral_id0);
-set_reset_data( gpv_iou_switch__peripheral_id1, val_gpv_iou_switch__peripheral_id1);
-set_reset_data( gpv_iou_switch__peripheral_id2, val_gpv_iou_switch__peripheral_id2);
-set_reset_data( gpv_iou_switch__peripheral_id3, val_gpv_iou_switch__peripheral_id3);
-set_reset_data( gpv_iou_switch__component_id0, val_gpv_iou_switch__component_id0);
-set_reset_data( gpv_iou_switch__component_id1, val_gpv_iou_switch__component_id1);
-set_reset_data( gpv_iou_switch__component_id2, val_gpv_iou_switch__component_id2);
-set_reset_data( gpv_iou_switch__component_id3, val_gpv_iou_switch__component_id3);
-set_reset_data( gpv_iou_switch__fn_mod_bm_iss_sdio0, val_gpv_iou_switch__fn_mod_bm_iss_sdio0);
-set_reset_data( gpv_iou_switch__ahb_cntl_sdio0, val_gpv_iou_switch__ahb_cntl_sdio0);
-set_reset_data( gpv_iou_switch__fn_mod_bm_iss_sdio1, val_gpv_iou_switch__fn_mod_bm_iss_sdio1);
-set_reset_data( gpv_iou_switch__ahb_cntl_sdio1, val_gpv_iou_switch__ahb_cntl_sdio1);
-set_reset_data( gpv_iou_switch__fn_mod_bm_iss_qspi, val_gpv_iou_switch__fn_mod_bm_iss_qspi);
-set_reset_data( gpv_iou_switch__fn_mod_bm_iss_miou, val_gpv_iou_switch__fn_mod_bm_iss_miou);
-set_reset_data( gpv_iou_switch__fn_mod_bm_iss_smc, val_gpv_iou_switch__fn_mod_bm_iss_smc);
-set_reset_data( gpv_iou_switch__fn_mod_ahb_gem0, val_gpv_iou_switch__fn_mod_ahb_gem0);
-set_reset_data( gpv_iou_switch__read_qos_gem0, val_gpv_iou_switch__read_qos_gem0);
-set_reset_data( gpv_iou_switch__write_qos_gem0, val_gpv_iou_switch__write_qos_gem0);
-set_reset_data( gpv_iou_switch__fn_mod_iss_gem0, val_gpv_iou_switch__fn_mod_iss_gem0);
-set_reset_data( gpv_iou_switch__fn_mod_ahb_gem1, val_gpv_iou_switch__fn_mod_ahb_gem1);
-set_reset_data( gpv_iou_switch__read_qos_gem1, val_gpv_iou_switch__read_qos_gem1);
-set_reset_data( gpv_iou_switch__write_qos_gem1, val_gpv_iou_switch__write_qos_gem1);
-set_reset_data( gpv_iou_switch__fn_mod_iss_gem1, val_gpv_iou_switch__fn_mod_iss_gem1);
-set_reset_data( gpv_iou_switch__fn_mod_ahb_usb0, val_gpv_iou_switch__fn_mod_ahb_usb0);
-set_reset_data( gpv_iou_switch__read_qos_usb0, val_gpv_iou_switch__read_qos_usb0);
-set_reset_data( gpv_iou_switch__write_qos_usb0, val_gpv_iou_switch__write_qos_usb0);
-set_reset_data( gpv_iou_switch__fn_mod_iss_usb0, val_gpv_iou_switch__fn_mod_iss_usb0);
-set_reset_data( gpv_iou_switch__fn_mod_ahb_usb1, val_gpv_iou_switch__fn_mod_ahb_usb1);
-set_reset_data( gpv_iou_switch__read_qos_usb1, val_gpv_iou_switch__read_qos_usb1);
-set_reset_data( gpv_iou_switch__write_qos_usb1, val_gpv_iou_switch__write_qos_usb1);
-set_reset_data( gpv_iou_switch__fn_mod_iss_usb1, val_gpv_iou_switch__fn_mod_iss_usb1);
-set_reset_data( gpv_iou_switch__fn_mod_ahb_sdio0, val_gpv_iou_switch__fn_mod_ahb_sdio0);
-set_reset_data( gpv_iou_switch__read_qos_sdio0, val_gpv_iou_switch__read_qos_sdio0);
-set_reset_data( gpv_iou_switch__write_qos_sdio0, val_gpv_iou_switch__write_qos_sdio0);
-set_reset_data( gpv_iou_switch__fn_mod_iss_sdio0, val_gpv_iou_switch__fn_mod_iss_sdio0);
-set_reset_data( gpv_iou_switch__fn_mod_ahb_sdio1, val_gpv_iou_switch__fn_mod_ahb_sdio1);
-set_reset_data( gpv_iou_switch__read_qos_sdio1, val_gpv_iou_switch__read_qos_sdio1);
-set_reset_data( gpv_iou_switch__write_qos_sdio1, val_gpv_iou_switch__write_qos_sdio1);
-set_reset_data( gpv_iou_switch__fn_mod_iss_sdio1, val_gpv_iou_switch__fn_mod_iss_sdio1);
-set_reset_data( gpv_iou_switch__fn_mod_iss_siou, val_gpv_iou_switch__fn_mod_iss_siou);
-
-// ************************************************************
-// Module gpv_qos301_cpu qos301
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gpv_qos301_cpu__qos_cntl, val_gpv_qos301_cpu__qos_cntl);
-set_reset_data( gpv_qos301_cpu__max_ot, val_gpv_qos301_cpu__max_ot);
-set_reset_data( gpv_qos301_cpu__max_comb_ot, val_gpv_qos301_cpu__max_comb_ot);
-set_reset_data( gpv_qos301_cpu__aw_p, val_gpv_qos301_cpu__aw_p);
-set_reset_data( gpv_qos301_cpu__aw_b, val_gpv_qos301_cpu__aw_b);
-set_reset_data( gpv_qos301_cpu__aw_r, val_gpv_qos301_cpu__aw_r);
-set_reset_data( gpv_qos301_cpu__ar_p, val_gpv_qos301_cpu__ar_p);
-set_reset_data( gpv_qos301_cpu__ar_b, val_gpv_qos301_cpu__ar_b);
-set_reset_data( gpv_qos301_cpu__ar_r, val_gpv_qos301_cpu__ar_r);
-
-// ************************************************************
-// Module gpv_qos301_dmac qos301
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gpv_qos301_dmac__qos_cntl, val_gpv_qos301_dmac__qos_cntl);
-set_reset_data( gpv_qos301_dmac__max_ot, val_gpv_qos301_dmac__max_ot);
-set_reset_data( gpv_qos301_dmac__max_comb_ot, val_gpv_qos301_dmac__max_comb_ot);
-set_reset_data( gpv_qos301_dmac__aw_p, val_gpv_qos301_dmac__aw_p);
-set_reset_data( gpv_qos301_dmac__aw_b, val_gpv_qos301_dmac__aw_b);
-set_reset_data( gpv_qos301_dmac__aw_r, val_gpv_qos301_dmac__aw_r);
-set_reset_data( gpv_qos301_dmac__ar_p, val_gpv_qos301_dmac__ar_p);
-set_reset_data( gpv_qos301_dmac__ar_b, val_gpv_qos301_dmac__ar_b);
-set_reset_data( gpv_qos301_dmac__ar_r, val_gpv_qos301_dmac__ar_r);
-
-// ************************************************************
-// Module gpv_qos301_iou qos301
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gpv_qos301_iou__qos_cntl, val_gpv_qos301_iou__qos_cntl);
-set_reset_data( gpv_qos301_iou__max_ot, val_gpv_qos301_iou__max_ot);
-set_reset_data( gpv_qos301_iou__max_comb_ot, val_gpv_qos301_iou__max_comb_ot);
-set_reset_data( gpv_qos301_iou__aw_p, val_gpv_qos301_iou__aw_p);
-set_reset_data( gpv_qos301_iou__aw_b, val_gpv_qos301_iou__aw_b);
-set_reset_data( gpv_qos301_iou__aw_r, val_gpv_qos301_iou__aw_r);
-set_reset_data( gpv_qos301_iou__ar_p, val_gpv_qos301_iou__ar_p);
-set_reset_data( gpv_qos301_iou__ar_b, val_gpv_qos301_iou__ar_b);
-set_reset_data( gpv_qos301_iou__ar_r, val_gpv_qos301_iou__ar_r);
-
-// ************************************************************
-// Module gpv_trustzone nic301_addr_region_ctrl_registers
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( gpv_trustzone__Remap, val_gpv_trustzone__Remap);
-set_reset_data( gpv_trustzone__security_fssw_s0, val_gpv_trustzone__security_fssw_s0);
-set_reset_data( gpv_trustzone__security_fssw_s1, val_gpv_trustzone__security_fssw_s1);
-set_reset_data( gpv_trustzone__security_apb, val_gpv_trustzone__security_apb);
-
-// ************************************************************
-// Module i2c0 IIC
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( i2c0__Control_reg0, val_i2c0__Control_reg0);
-set_reset_data( i2c0__Status_reg0, val_i2c0__Status_reg0);
-set_reset_data( i2c0__I2C_address_reg0, val_i2c0__I2C_address_reg0);
-set_reset_data( i2c0__I2C_data_reg0, val_i2c0__I2C_data_reg0);
-set_reset_data( i2c0__Interrupt_status_reg0, val_i2c0__Interrupt_status_reg0);
-set_reset_data( i2c0__Transfer_size_reg0, val_i2c0__Transfer_size_reg0);
-set_reset_data( i2c0__Slave_mon_pause_reg0, val_i2c0__Slave_mon_pause_reg0);
-set_reset_data( i2c0__Time_out_reg0, val_i2c0__Time_out_reg0);
-set_reset_data( i2c0__Intrpt_mask_reg0, val_i2c0__Intrpt_mask_reg0);
-set_reset_data( i2c0__Intrpt_enable_reg0, val_i2c0__Intrpt_enable_reg0);
-set_reset_data( i2c0__Intrpt_disable_reg0, val_i2c0__Intrpt_disable_reg0);
-
-// ************************************************************
-// Module i2c1 IIC
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( i2c1__Control_reg0, val_i2c1__Control_reg0);
-set_reset_data( i2c1__Status_reg0, val_i2c1__Status_reg0);
-set_reset_data( i2c1__I2C_address_reg0, val_i2c1__I2C_address_reg0);
-set_reset_data( i2c1__I2C_data_reg0, val_i2c1__I2C_data_reg0);
-set_reset_data( i2c1__Interrupt_status_reg0, val_i2c1__Interrupt_status_reg0);
-set_reset_data( i2c1__Transfer_size_reg0, val_i2c1__Transfer_size_reg0);
-set_reset_data( i2c1__Slave_mon_pause_reg0, val_i2c1__Slave_mon_pause_reg0);
-set_reset_data( i2c1__Time_out_reg0, val_i2c1__Time_out_reg0);
-set_reset_data( i2c1__Intrpt_mask_reg0, val_i2c1__Intrpt_mask_reg0);
-set_reset_data( i2c1__Intrpt_enable_reg0, val_i2c1__Intrpt_enable_reg0);
-set_reset_data( i2c1__Intrpt_disable_reg0, val_i2c1__Intrpt_disable_reg0);
-
-// ************************************************************
-// Module l2cache L2Cpl310
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( l2cache__reg0_cache_id, val_l2cache__reg0_cache_id);
-set_reset_data( l2cache__reg0_cache_type, val_l2cache__reg0_cache_type);
-set_reset_data( l2cache__reg1_control, val_l2cache__reg1_control);
-set_reset_data( l2cache__reg1_aux_control, val_l2cache__reg1_aux_control);
-set_reset_data( l2cache__reg1_tag_ram_control, val_l2cache__reg1_tag_ram_control);
-set_reset_data( l2cache__reg1_data_ram_control, val_l2cache__reg1_data_ram_control);
-set_reset_data( l2cache__reg2_ev_counter_ctrl, val_l2cache__reg2_ev_counter_ctrl);
-set_reset_data( l2cache__reg2_ev_counter1_cfg, val_l2cache__reg2_ev_counter1_cfg);
-set_reset_data( l2cache__reg2_ev_counter0_cfg, val_l2cache__reg2_ev_counter0_cfg);
-set_reset_data( l2cache__reg2_ev_counter1, val_l2cache__reg2_ev_counter1);
-set_reset_data( l2cache__reg2_ev_counter0, val_l2cache__reg2_ev_counter0);
-set_reset_data( l2cache__reg2_int_mask, val_l2cache__reg2_int_mask);
-set_reset_data( l2cache__reg2_int_mask_status, val_l2cache__reg2_int_mask_status);
-set_reset_data( l2cache__reg2_int_raw_status, val_l2cache__reg2_int_raw_status);
-set_reset_data( l2cache__reg2_int_clear, val_l2cache__reg2_int_clear);
-set_reset_data( l2cache__reg7_cache_sync, val_l2cache__reg7_cache_sync);
-set_reset_data( l2cache__reg7_inv_pa, val_l2cache__reg7_inv_pa);
-set_reset_data( l2cache__reg7_inv_way, val_l2cache__reg7_inv_way);
-set_reset_data( l2cache__reg7_clean_pa, val_l2cache__reg7_clean_pa);
-set_reset_data( l2cache__reg7_clean_index, val_l2cache__reg7_clean_index);
-set_reset_data( l2cache__reg7_clean_way, val_l2cache__reg7_clean_way);
-set_reset_data( l2cache__reg7_clean_inv_pa, val_l2cache__reg7_clean_inv_pa);
-set_reset_data( l2cache__reg7_clean_inv_index, val_l2cache__reg7_clean_inv_index);
-set_reset_data( l2cache__reg7_clean_inv_way, val_l2cache__reg7_clean_inv_way);
-set_reset_data( l2cache__reg9_d_lockdown0, val_l2cache__reg9_d_lockdown0);
-set_reset_data( l2cache__reg9_i_lockdown0, val_l2cache__reg9_i_lockdown0);
-set_reset_data( l2cache__reg9_d_lockdown1, val_l2cache__reg9_d_lockdown1);
-set_reset_data( l2cache__reg9_i_lockdown1, val_l2cache__reg9_i_lockdown1);
-set_reset_data( l2cache__reg9_d_lockdown2, val_l2cache__reg9_d_lockdown2);
-set_reset_data( l2cache__reg9_i_lockdown2, val_l2cache__reg9_i_lockdown2);
-set_reset_data( l2cache__reg9_d_lockdown3, val_l2cache__reg9_d_lockdown3);
-set_reset_data( l2cache__reg9_i_lockdown3, val_l2cache__reg9_i_lockdown3);
-set_reset_data( l2cache__reg9_d_lockdown4, val_l2cache__reg9_d_lockdown4);
-set_reset_data( l2cache__reg9_i_lockdown4, val_l2cache__reg9_i_lockdown4);
-set_reset_data( l2cache__reg9_d_lockdown5, val_l2cache__reg9_d_lockdown5);
-set_reset_data( l2cache__reg9_i_lockdown5, val_l2cache__reg9_i_lockdown5);
-set_reset_data( l2cache__reg9_d_lockdown6, val_l2cache__reg9_d_lockdown6);
-set_reset_data( l2cache__reg9_i_lockdown6, val_l2cache__reg9_i_lockdown6);
-set_reset_data( l2cache__reg9_d_lockdown7, val_l2cache__reg9_d_lockdown7);
-set_reset_data( l2cache__reg9_i_lockdown7, val_l2cache__reg9_i_lockdown7);
-set_reset_data( l2cache__reg9_lock_line_en, val_l2cache__reg9_lock_line_en);
-set_reset_data( l2cache__reg9_unlock_way, val_l2cache__reg9_unlock_way);
-set_reset_data( l2cache__reg12_addr_filtering_start, val_l2cache__reg12_addr_filtering_start);
-set_reset_data( l2cache__reg12_addr_filtering_end, val_l2cache__reg12_addr_filtering_end);
-set_reset_data( l2cache__reg15_debug_ctrl, val_l2cache__reg15_debug_ctrl);
-set_reset_data( l2cache__reg15_prefetch_ctrl, val_l2cache__reg15_prefetch_ctrl);
-set_reset_data( l2cache__reg15_power_ctrl, val_l2cache__reg15_power_ctrl);
-
-// ************************************************************
-// Module mpcore mpcore
-// doc version: 1.3
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( mpcore__SCU_CONTROL_REGISTER, val_mpcore__SCU_CONTROL_REGISTER);
-set_reset_data( mpcore__SCU_CONFIGURATION_REGISTER, val_mpcore__SCU_CONFIGURATION_REGISTER);
-set_reset_data( mpcore__SCU_CPU_Power_Status_Register, val_mpcore__SCU_CPU_Power_Status_Register);
-set_reset_data( mpcore__SCU_Invalidate_All_Registers_in_Secure_State, val_mpcore__SCU_Invalidate_All_Registers_in_Secure_State);
-set_reset_data( mpcore__Filtering_Start_Address_Register, val_mpcore__Filtering_Start_Address_Register);
-set_reset_data( mpcore__Filtering_End_Address_Register, val_mpcore__Filtering_End_Address_Register);
-set_reset_data( mpcore__SCU_Access_Control_Register_SAC, val_mpcore__SCU_Access_Control_Register_SAC);
-set_reset_data( mpcore__SCU_Non_secure_Access_Control_Register, val_mpcore__SCU_Non_secure_Access_Control_Register);
-set_reset_data( mpcore__ICCICR, val_mpcore__ICCICR);
-set_reset_data( mpcore__ICCPMR, val_mpcore__ICCPMR);
-set_reset_data( mpcore__ICCBPR, val_mpcore__ICCBPR);
-set_reset_data( mpcore__ICCIAR, val_mpcore__ICCIAR);
-set_reset_data( mpcore__ICCEOIR, val_mpcore__ICCEOIR);
-set_reset_data( mpcore__ICCRPR, val_mpcore__ICCRPR);
-set_reset_data( mpcore__ICCHPIR, val_mpcore__ICCHPIR);
-set_reset_data( mpcore__ICCABPR, val_mpcore__ICCABPR);
-set_reset_data( mpcore__ICCIDR, val_mpcore__ICCIDR);
-set_reset_data( mpcore__Global_Timer_Counter_Register0, val_mpcore__Global_Timer_Counter_Register0);
-set_reset_data( mpcore__Global_Timer_Counter_Register1, val_mpcore__Global_Timer_Counter_Register1);
-set_reset_data( mpcore__Global_Timer_Control_Register, val_mpcore__Global_Timer_Control_Register);
-set_reset_data( mpcore__Global_Timer_Interrupt_Status_Register, val_mpcore__Global_Timer_Interrupt_Status_Register);
-set_reset_data( mpcore__Comparator_Value_Register0, val_mpcore__Comparator_Value_Register0);
-set_reset_data( mpcore__Comparator_Value_Register1, val_mpcore__Comparator_Value_Register1);
-set_reset_data( mpcore__Auto_increment_Register, val_mpcore__Auto_increment_Register);
-set_reset_data( mpcore__Private_Timer_Load_Register, val_mpcore__Private_Timer_Load_Register);
-set_reset_data( mpcore__Private_Timer_Counter_Register, val_mpcore__Private_Timer_Counter_Register);
-set_reset_data( mpcore__Private_Timer_Control_Register, val_mpcore__Private_Timer_Control_Register);
-set_reset_data( mpcore__Private_Timer_Interrupt_Status_Register, val_mpcore__Private_Timer_Interrupt_Status_Register);
-set_reset_data( mpcore__Watchdog_Load_Register, val_mpcore__Watchdog_Load_Register);
-set_reset_data( mpcore__Watchdog_Counter_Register, val_mpcore__Watchdog_Counter_Register);
-set_reset_data( mpcore__Watchdog_Control_Register, val_mpcore__Watchdog_Control_Register);
-set_reset_data( mpcore__Watchdog_Interrupt_Status_Register, val_mpcore__Watchdog_Interrupt_Status_Register);
-set_reset_data( mpcore__Watchdog_Reset_Status_Register, val_mpcore__Watchdog_Reset_Status_Register);
-set_reset_data( mpcore__Watchdog_Disable_Register, val_mpcore__Watchdog_Disable_Register);
-set_reset_data( mpcore__ICDDCR, val_mpcore__ICDDCR);
-set_reset_data( mpcore__ICDICTR, val_mpcore__ICDICTR);
-set_reset_data( mpcore__ICDIIDR, val_mpcore__ICDIIDR);
-set_reset_data( mpcore__ICDISR0, val_mpcore__ICDISR0);
-set_reset_data( mpcore__ICDISR1, val_mpcore__ICDISR1);
-set_reset_data( mpcore__ICDISR2, val_mpcore__ICDISR2);
-set_reset_data( mpcore__ICDISER0, val_mpcore__ICDISER0);
-set_reset_data( mpcore__ICDISER1, val_mpcore__ICDISER1);
-set_reset_data( mpcore__ICDISER2, val_mpcore__ICDISER2);
-set_reset_data( mpcore__ICDICER0, val_mpcore__ICDICER0);
-set_reset_data( mpcore__ICDICER1, val_mpcore__ICDICER1);
-set_reset_data( mpcore__ICDICER2, val_mpcore__ICDICER2);
-set_reset_data( mpcore__ICDISPR0, val_mpcore__ICDISPR0);
-set_reset_data( mpcore__ICDISPR1, val_mpcore__ICDISPR1);
-set_reset_data( mpcore__ICDISPR2, val_mpcore__ICDISPR2);
-set_reset_data( mpcore__ICDICPR0, val_mpcore__ICDICPR0);
-set_reset_data( mpcore__ICDICPR1, val_mpcore__ICDICPR1);
-set_reset_data( mpcore__ICDICPR2, val_mpcore__ICDICPR2);
-set_reset_data( mpcore__ICDABR0, val_mpcore__ICDABR0);
-set_reset_data( mpcore__ICDABR1, val_mpcore__ICDABR1);
-set_reset_data( mpcore__ICDABR2, val_mpcore__ICDABR2);
-set_reset_data( mpcore__ICDIPR0, val_mpcore__ICDIPR0);
-set_reset_data( mpcore__ICDIPR1, val_mpcore__ICDIPR1);
-set_reset_data( mpcore__ICDIPR2, val_mpcore__ICDIPR2);
-set_reset_data( mpcore__ICDIPR3, val_mpcore__ICDIPR3);
-set_reset_data( mpcore__ICDIPR4, val_mpcore__ICDIPR4);
-set_reset_data( mpcore__ICDIPR5, val_mpcore__ICDIPR5);
-set_reset_data( mpcore__ICDIPR6, val_mpcore__ICDIPR6);
-set_reset_data( mpcore__ICDIPR7, val_mpcore__ICDIPR7);
-set_reset_data( mpcore__ICDIPR8, val_mpcore__ICDIPR8);
-set_reset_data( mpcore__ICDIPR9, val_mpcore__ICDIPR9);
-set_reset_data( mpcore__ICDIPR10, val_mpcore__ICDIPR10);
-set_reset_data( mpcore__ICDIPR11, val_mpcore__ICDIPR11);
-set_reset_data( mpcore__ICDIPR12, val_mpcore__ICDIPR12);
-set_reset_data( mpcore__ICDIPR13, val_mpcore__ICDIPR13);
-set_reset_data( mpcore__ICDIPR14, val_mpcore__ICDIPR14);
-set_reset_data( mpcore__ICDIPR15, val_mpcore__ICDIPR15);
-set_reset_data( mpcore__ICDIPR16, val_mpcore__ICDIPR16);
-set_reset_data( mpcore__ICDIPR17, val_mpcore__ICDIPR17);
-set_reset_data( mpcore__ICDIPR18, val_mpcore__ICDIPR18);
-set_reset_data( mpcore__ICDIPR19, val_mpcore__ICDIPR19);
-set_reset_data( mpcore__ICDIPR20, val_mpcore__ICDIPR20);
-set_reset_data( mpcore__ICDIPR21, val_mpcore__ICDIPR21);
-set_reset_data( mpcore__ICDIPR22, val_mpcore__ICDIPR22);
-set_reset_data( mpcore__ICDIPR23, val_mpcore__ICDIPR23);
-set_reset_data( mpcore__ICDIPTR0, val_mpcore__ICDIPTR0);
-set_reset_data( mpcore__ICDIPTR1, val_mpcore__ICDIPTR1);
-set_reset_data( mpcore__ICDIPTR2, val_mpcore__ICDIPTR2);
-set_reset_data( mpcore__ICDIPTR3, val_mpcore__ICDIPTR3);
-set_reset_data( mpcore__ICDIPTR4, val_mpcore__ICDIPTR4);
-set_reset_data( mpcore__ICDIPTR5, val_mpcore__ICDIPTR5);
-set_reset_data( mpcore__ICDIPTR6, val_mpcore__ICDIPTR6);
-set_reset_data( mpcore__ICDIPTR7, val_mpcore__ICDIPTR7);
-set_reset_data( mpcore__ICDIPTR8, val_mpcore__ICDIPTR8);
-set_reset_data( mpcore__ICDIPTR9, val_mpcore__ICDIPTR9);
-set_reset_data( mpcore__ICDIPTR10, val_mpcore__ICDIPTR10);
-set_reset_data( mpcore__ICDIPTR11, val_mpcore__ICDIPTR11);
-set_reset_data( mpcore__ICDIPTR12, val_mpcore__ICDIPTR12);
-set_reset_data( mpcore__ICDIPTR13, val_mpcore__ICDIPTR13);
-set_reset_data( mpcore__ICDIPTR14, val_mpcore__ICDIPTR14);
-set_reset_data( mpcore__ICDIPTR15, val_mpcore__ICDIPTR15);
-set_reset_data( mpcore__ICDIPTR16, val_mpcore__ICDIPTR16);
-set_reset_data( mpcore__ICDIPTR17, val_mpcore__ICDIPTR17);
-set_reset_data( mpcore__ICDIPTR18, val_mpcore__ICDIPTR18);
-set_reset_data( mpcore__ICDIPTR19, val_mpcore__ICDIPTR19);
-set_reset_data( mpcore__ICDIPTR20, val_mpcore__ICDIPTR20);
-set_reset_data( mpcore__ICDIPTR21, val_mpcore__ICDIPTR21);
-set_reset_data( mpcore__ICDIPTR22, val_mpcore__ICDIPTR22);
-set_reset_data( mpcore__ICDIPTR23, val_mpcore__ICDIPTR23);
-set_reset_data( mpcore__ICDICFR0, val_mpcore__ICDICFR0);
-set_reset_data( mpcore__ICDICFR1, val_mpcore__ICDICFR1);
-set_reset_data( mpcore__ICDICFR2, val_mpcore__ICDICFR2);
-set_reset_data( mpcore__ICDICFR3, val_mpcore__ICDICFR3);
-set_reset_data( mpcore__ICDICFR4, val_mpcore__ICDICFR4);
-set_reset_data( mpcore__ICDICFR5, val_mpcore__ICDICFR5);
-set_reset_data( mpcore__ppi_status, val_mpcore__ppi_status);
-set_reset_data( mpcore__spi_status_0, val_mpcore__spi_status_0);
-set_reset_data( mpcore__spi_status_1, val_mpcore__spi_status_1);
-set_reset_data( mpcore__ICDSGIR, val_mpcore__ICDSGIR);
-set_reset_data( mpcore__ICPIDR4, val_mpcore__ICPIDR4);
-set_reset_data( mpcore__ICPIDR5, val_mpcore__ICPIDR5);
-set_reset_data( mpcore__ICPIDR6, val_mpcore__ICPIDR6);
-set_reset_data( mpcore__ICPIDR7, val_mpcore__ICPIDR7);
-set_reset_data( mpcore__ICPIDR0, val_mpcore__ICPIDR0);
-set_reset_data( mpcore__ICPIDR1, val_mpcore__ICPIDR1);
-set_reset_data( mpcore__ICPIDR2, val_mpcore__ICPIDR2);
-set_reset_data( mpcore__ICPIDR3, val_mpcore__ICPIDR3);
-set_reset_data( mpcore__ICCIDR0, val_mpcore__ICCIDR0);
-set_reset_data( mpcore__ICCIDR1, val_mpcore__ICCIDR1);
-set_reset_data( mpcore__ICCIDR2, val_mpcore__ICCIDR2);
-set_reset_data( mpcore__ICCIDR3, val_mpcore__ICCIDR3);
-
-// ************************************************************
-// Module ocm ocm
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( ocm__OCM_PARITY_CTRL, val_ocm__OCM_PARITY_CTRL);
-set_reset_data( ocm__OCM_PARITY_ERRADDRESS, val_ocm__OCM_PARITY_ERRADDRESS);
-set_reset_data( ocm__OCM_IRQ_STS, val_ocm__OCM_IRQ_STS);
-set_reset_data( ocm__OCM_CONTROL, val_ocm__OCM_CONTROL);
-
-// ************************************************************
-// Module qspi qspi
-// doc version: 0.8, based on 11/01/10 Linear Quad-SPI Controller
-/// Design Specification document
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( qspi__Config_reg, val_qspi__Config_reg);
-set_reset_data( qspi__Intr_status_REG, val_qspi__Intr_status_REG);
-set_reset_data( qspi__Intrpt_en_REG, val_qspi__Intrpt_en_REG);
-set_reset_data( qspi__Intrpt_dis_REG, val_qspi__Intrpt_dis_REG);
-set_reset_data( qspi__Intrpt_mask_REG, val_qspi__Intrpt_mask_REG);
-set_reset_data( qspi__En_REG, val_qspi__En_REG);
-set_reset_data( qspi__Delay_REG, val_qspi__Delay_REG);
-set_reset_data( qspi__TXD0, val_qspi__TXD0);
-set_reset_data( qspi__Rx_data_REG, val_qspi__Rx_data_REG);
-set_reset_data( qspi__Slave_Idle_count_REG, val_qspi__Slave_Idle_count_REG);
-set_reset_data( qspi__TX_thres_REG, val_qspi__TX_thres_REG);
-set_reset_data( qspi__RX_thres_REG, val_qspi__RX_thres_REG);
-set_reset_data( qspi__GPIO, val_qspi__GPIO);
-set_reset_data( qspi__LPBK_DLY_ADJ, val_qspi__LPBK_DLY_ADJ);
-set_reset_data( qspi__TXD1, val_qspi__TXD1);
-set_reset_data( qspi__TXD2, val_qspi__TXD2);
-set_reset_data( qspi__TXD3, val_qspi__TXD3);
-set_reset_data( qspi__LQSPI_CFG, val_qspi__LQSPI_CFG);
-set_reset_data( qspi__LQSPI_STS, val_qspi__LQSPI_STS);
-set_reset_data( qspi__MOD_ID, val_qspi__MOD_ID);
-
-// ************************************************************
-// Module sd0 sdio
-// doc version: 4.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( sd0__SDMA_system_address_register, val_sd0__SDMA_system_address_register);
-set_reset_data( sd0__Block_Size_Block_Count, val_sd0__Block_Size_Block_Count);
-set_reset_data( sd0__Argument, val_sd0__Argument);
-set_reset_data( sd0__Transfer_Mode_Command, val_sd0__Transfer_Mode_Command);
-set_reset_data( sd0__Response0, val_sd0__Response0);
-set_reset_data( sd0__Response1, val_sd0__Response1);
-set_reset_data( sd0__Response2, val_sd0__Response2);
-set_reset_data( sd0__Response3, val_sd0__Response3);
-set_reset_data( sd0__Buffer_Data_Port, val_sd0__Buffer_Data_Port);
-set_reset_data( sd0__Present_State, val_sd0__Present_State);
-set_reset_data( sd0__Host_control_Power_control_Block_Gap_Control_Wakeup_control, val_sd0__Host_control_Power_control_Block_Gap_Control_Wakeup_control);
-set_reset_data( sd0__Clock_Control_Timeout_control_Software_reset, val_sd0__Clock_Control_Timeout_control_Software_reset);
-set_reset_data( sd0__Normal_interrupt_status_Error_interrupt_status, val_sd0__Normal_interrupt_status_Error_interrupt_status);
-set_reset_data( sd0__Normal_interrupt_status_enable_Error_interrupt_status_enable, val_sd0__Normal_interrupt_status_enable_Error_interrupt_status_enable);
-set_reset_data( sd0__Normal_interrupt_signal_enable_Error_interrupt_signal_enable, val_sd0__Normal_interrupt_signal_enable_Error_interrupt_signal_enable);
-set_reset_data( sd0__Auto_CMD12_error_status, val_sd0__Auto_CMD12_error_status);
-set_reset_data( sd0__Capabilities, val_sd0__Capabilities);
-set_reset_data( sd0__Maximum_current_capabilities, val_sd0__Maximum_current_capabilities);
-set_reset_data( sd0__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status, val_sd0__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status);
-set_reset_data( sd0__ADMA_error_status, val_sd0__ADMA_error_status);
-set_reset_data( sd0__ADMA_system_address, val_sd0__ADMA_system_address);
-set_reset_data( sd0__Boot_Timeout_control, val_sd0__Boot_Timeout_control);
-set_reset_data( sd0__Debug_Selection, val_sd0__Debug_Selection);
-set_reset_data( sd0__SPI_interrupt_support, val_sd0__SPI_interrupt_support);
-set_reset_data( sd0__Slot_interrupt_status_Host_controller_version, val_sd0__Slot_interrupt_status_Host_controller_version);
-
-// ************************************************************
-// Module sd1 sdio
-// doc version: 4.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( sd1__SDMA_system_address_register, val_sd1__SDMA_system_address_register);
-set_reset_data( sd1__Block_Size_Block_Count, val_sd1__Block_Size_Block_Count);
-set_reset_data( sd1__Argument, val_sd1__Argument);
-set_reset_data( sd1__Transfer_Mode_Command, val_sd1__Transfer_Mode_Command);
-set_reset_data( sd1__Response0, val_sd1__Response0);
-set_reset_data( sd1__Response1, val_sd1__Response1);
-set_reset_data( sd1__Response2, val_sd1__Response2);
-set_reset_data( sd1__Response3, val_sd1__Response3);
-set_reset_data( sd1__Buffer_Data_Port, val_sd1__Buffer_Data_Port);
-set_reset_data( sd1__Present_State, val_sd1__Present_State);
-set_reset_data( sd1__Host_control_Power_control_Block_Gap_Control_Wakeup_control, val_sd1__Host_control_Power_control_Block_Gap_Control_Wakeup_control);
-set_reset_data( sd1__Clock_Control_Timeout_control_Software_reset, val_sd1__Clock_Control_Timeout_control_Software_reset);
-set_reset_data( sd1__Normal_interrupt_status_Error_interrupt_status, val_sd1__Normal_interrupt_status_Error_interrupt_status);
-set_reset_data( sd1__Normal_interrupt_status_enable_Error_interrupt_status_enable, val_sd1__Normal_interrupt_status_enable_Error_interrupt_status_enable);
-set_reset_data( sd1__Normal_interrupt_signal_enable_Error_interrupt_signal_enable, val_sd1__Normal_interrupt_signal_enable_Error_interrupt_signal_enable);
-set_reset_data( sd1__Auto_CMD12_error_status, val_sd1__Auto_CMD12_error_status);
-set_reset_data( sd1__Capabilities, val_sd1__Capabilities);
-set_reset_data( sd1__Maximum_current_capabilities, val_sd1__Maximum_current_capabilities);
-set_reset_data( sd1__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status, val_sd1__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status);
-set_reset_data( sd1__ADMA_error_status, val_sd1__ADMA_error_status);
-set_reset_data( sd1__ADMA_system_address, val_sd1__ADMA_system_address);
-set_reset_data( sd1__Boot_Timeout_control, val_sd1__Boot_Timeout_control);
-set_reset_data( sd1__Debug_Selection, val_sd1__Debug_Selection);
-set_reset_data( sd1__SPI_interrupt_support, val_sd1__SPI_interrupt_support);
-set_reset_data( sd1__Slot_interrupt_status_Host_controller_version, val_sd1__Slot_interrupt_status_Host_controller_version);
-
-// ************************************************************
-// Module slcr slcr
-// doc version: 1.3, based on 11/18/2010 SLCR_spec.doc
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( slcr__SCL, val_slcr__SCL);
-set_reset_data( slcr__SLCR_LOCK, val_slcr__SLCR_LOCK);
-set_reset_data( slcr__SLCR_UNLOCK, val_slcr__SLCR_UNLOCK);
-set_reset_data( slcr__SLCR_LOCKSTA, val_slcr__SLCR_LOCKSTA);
-set_reset_data( slcr__ARM_PLL_CTRL, val_slcr__ARM_PLL_CTRL);
-set_reset_data( slcr__DDR_PLL_CTRL, val_slcr__DDR_PLL_CTRL);
-set_reset_data( slcr__IO_PLL_CTRL, val_slcr__IO_PLL_CTRL);
-set_reset_data( slcr__PLL_STATUS, val_slcr__PLL_STATUS);
-set_reset_data( slcr__ARM_PLL_CFG, val_slcr__ARM_PLL_CFG);
-set_reset_data( slcr__DDR_PLL_CFG, val_slcr__DDR_PLL_CFG);
-set_reset_data( slcr__IO_PLL_CFG, val_slcr__IO_PLL_CFG);
-set_reset_data( slcr__PLL_BG_CTRL, val_slcr__PLL_BG_CTRL);
-set_reset_data( slcr__ARM_CLK_CTRL, val_slcr__ARM_CLK_CTRL);
-set_reset_data( slcr__DDR_CLK_CTRL, val_slcr__DDR_CLK_CTRL);
-set_reset_data( slcr__DCI_CLK_CTRL, val_slcr__DCI_CLK_CTRL);
-set_reset_data( slcr__APER_CLK_CTRL, val_slcr__APER_CLK_CTRL);
-set_reset_data( slcr__USB0_CLK_CTRL, val_slcr__USB0_CLK_CTRL);
-set_reset_data( slcr__USB1_CLK_CTRL, val_slcr__USB1_CLK_CTRL);
-set_reset_data( slcr__GEM0_RCLK_CTRL, val_slcr__GEM0_RCLK_CTRL);
-set_reset_data( slcr__GEM1_RCLK_CTRL, val_slcr__GEM1_RCLK_CTRL);
-set_reset_data( slcr__GEM0_CLK_CTRL, val_slcr__GEM0_CLK_CTRL);
-set_reset_data( slcr__GEM1_CLK_CTRL, val_slcr__GEM1_CLK_CTRL);
-set_reset_data( slcr__SMC_CLK_CTRL, val_slcr__SMC_CLK_CTRL);
-set_reset_data( slcr__LQSPI_CLK_CTRL, val_slcr__LQSPI_CLK_CTRL);
-set_reset_data( slcr__SDIO_CLK_CTRL, val_slcr__SDIO_CLK_CTRL);
-set_reset_data( slcr__UART_CLK_CTRL, val_slcr__UART_CLK_CTRL);
-set_reset_data( slcr__SPI_CLK_CTRL, val_slcr__SPI_CLK_CTRL);
-set_reset_data( slcr__CAN_CLK_CTRL, val_slcr__CAN_CLK_CTRL);
-set_reset_data( slcr__CAN_MIOCLK_CTRL, val_slcr__CAN_MIOCLK_CTRL);
-set_reset_data( slcr__DBG_CLK_CTRL, val_slcr__DBG_CLK_CTRL);
-set_reset_data( slcr__PCAP_CLK_CTRL, val_slcr__PCAP_CLK_CTRL);
-set_reset_data( slcr__TOPSW_CLK_CTRL, val_slcr__TOPSW_CLK_CTRL);
-set_reset_data( slcr__FPGA0_CLK_CTRL, val_slcr__FPGA0_CLK_CTRL);
-set_reset_data( slcr__FPGA0_THR_CTRL, val_slcr__FPGA0_THR_CTRL);
-set_reset_data( slcr__FPGA0_THR_CNT, val_slcr__FPGA0_THR_CNT);
-set_reset_data( slcr__FPGA0_THR_STA, val_slcr__FPGA0_THR_STA);
-set_reset_data( slcr__FPGA1_CLK_CTRL, val_slcr__FPGA1_CLK_CTRL);
-set_reset_data( slcr__FPGA1_THR_CTRL, val_slcr__FPGA1_THR_CTRL);
-set_reset_data( slcr__FPGA1_THR_CNT, val_slcr__FPGA1_THR_CNT);
-set_reset_data( slcr__FPGA1_THR_STA, val_slcr__FPGA1_THR_STA);
-set_reset_data( slcr__FPGA2_CLK_CTRL, val_slcr__FPGA2_CLK_CTRL);
-set_reset_data( slcr__FPGA2_THR_CTRL, val_slcr__FPGA2_THR_CTRL);
-set_reset_data( slcr__FPGA2_THR_CNT, val_slcr__FPGA2_THR_CNT);
-set_reset_data( slcr__FPGA2_THR_STA, val_slcr__FPGA2_THR_STA);
-set_reset_data( slcr__FPGA3_CLK_CTRL, val_slcr__FPGA3_CLK_CTRL);
-set_reset_data( slcr__FPGA3_THR_CTRL, val_slcr__FPGA3_THR_CTRL);
-set_reset_data( slcr__FPGA3_THR_CNT, val_slcr__FPGA3_THR_CNT);
-set_reset_data( slcr__FPGA3_THR_STA, val_slcr__FPGA3_THR_STA);
-set_reset_data( slcr__SRST_UART_CTRL, val_slcr__SRST_UART_CTRL);
-set_reset_data( slcr__BANDGAP_TRIM, val_slcr__BANDGAP_TRIM);
-set_reset_data( slcr__CC_TEST, val_slcr__CC_TEST);
-set_reset_data( slcr__PLL_PREDIVISOR, val_slcr__PLL_PREDIVISOR);
-set_reset_data( slcr__CLK_621_TRUE, val_slcr__CLK_621_TRUE);
-set_reset_data( slcr__PICTURE_DBG, val_slcr__PICTURE_DBG);
-set_reset_data( slcr__PICTURE_DBG_UCNT, val_slcr__PICTURE_DBG_UCNT);
-set_reset_data( slcr__PICTURE_DBG_LCNT, val_slcr__PICTURE_DBG_LCNT);
-set_reset_data( slcr__PSS_RST_CTRL, val_slcr__PSS_RST_CTRL);
-set_reset_data( slcr__DDR_RST_CTRL, val_slcr__DDR_RST_CTRL);
-set_reset_data( slcr__TOPSW_RST_CTRL, val_slcr__TOPSW_RST_CTRL);
-set_reset_data( slcr__DMAC_RST_CTRL, val_slcr__DMAC_RST_CTRL);
-set_reset_data( slcr__USB_RST_CTRL, val_slcr__USB_RST_CTRL);
-set_reset_data( slcr__GEM_RST_CTRL, val_slcr__GEM_RST_CTRL);
-set_reset_data( slcr__SDIO_RST_CTRL, val_slcr__SDIO_RST_CTRL);
-set_reset_data( slcr__SPI_RST_CTRL, val_slcr__SPI_RST_CTRL);
-set_reset_data( slcr__CAN_RST_CTRL, val_slcr__CAN_RST_CTRL);
-set_reset_data( slcr__I2C_RST_CTRL, val_slcr__I2C_RST_CTRL);
-set_reset_data( slcr__UART_RST_CTRL, val_slcr__UART_RST_CTRL);
-set_reset_data( slcr__GPIO_RST_CTRL, val_slcr__GPIO_RST_CTRL);
-set_reset_data( slcr__LQSPI_RST_CTRL, val_slcr__LQSPI_RST_CTRL);
-set_reset_data( slcr__SMC_RST_CTRL, val_slcr__SMC_RST_CTRL);
-set_reset_data( slcr__OCM_RST_CTRL, val_slcr__OCM_RST_CTRL);
-set_reset_data( slcr__DEVCI_RST_CTRL, val_slcr__DEVCI_RST_CTRL);
-set_reset_data( slcr__FPGA_RST_CTRL, val_slcr__FPGA_RST_CTRL);
-set_reset_data( slcr__A9_CPU_RST_CTRL, val_slcr__A9_CPU_RST_CTRL);
-set_reset_data( slcr__RS_AWDT_CTRL, val_slcr__RS_AWDT_CTRL);
-set_reset_data( slcr__RST_REASON, val_slcr__RST_REASON);
-set_reset_data( slcr__RST_REASON_CLR, val_slcr__RST_REASON_CLR);
-set_reset_data( slcr__REBOOT_STATUS, val_slcr__REBOOT_STATUS);
-set_reset_data( slcr__BOOT_MODE, val_slcr__BOOT_MODE);
-set_reset_data( slcr__APU_CTRL, val_slcr__APU_CTRL);
-set_reset_data( slcr__WDT_CLK_SEL, val_slcr__WDT_CLK_SEL);
-set_reset_data( slcr__TZ_OCM_RAM0, val_slcr__TZ_OCM_RAM0);
-set_reset_data( slcr__TZ_OCM_RAM1, val_slcr__TZ_OCM_RAM1);
-set_reset_data( slcr__TZ_OCM_ROM, val_slcr__TZ_OCM_ROM);
-set_reset_data( slcr__TZ_DDR_RAM, val_slcr__TZ_DDR_RAM);
-set_reset_data( slcr__TZ_DMA_NS, val_slcr__TZ_DMA_NS);
-set_reset_data( slcr__TZ_DMA_IRQ_NS, val_slcr__TZ_DMA_IRQ_NS);
-set_reset_data( slcr__TZ_DMA_PERIPH_NS, val_slcr__TZ_DMA_PERIPH_NS);
-set_reset_data( slcr__TZ_GEM, val_slcr__TZ_GEM);
-set_reset_data( slcr__TZ_SDIO, val_slcr__TZ_SDIO);
-set_reset_data( slcr__TZ_USB, val_slcr__TZ_USB);
-set_reset_data( slcr__TZ_FPGA_M, val_slcr__TZ_FPGA_M);
-set_reset_data( slcr__TZ_FPGA_AFI, val_slcr__TZ_FPGA_AFI);
-set_reset_data( slcr__DBG_CTRL, val_slcr__DBG_CTRL);
-set_reset_data( slcr__PSS_IDCODE, val_slcr__PSS_IDCODE);
-set_reset_data( slcr__DDR_URGENT, val_slcr__DDR_URGENT);
-set_reset_data( slcr__DDR_CAL_START, val_slcr__DDR_CAL_START);
-set_reset_data( slcr__DDR_REF_START, val_slcr__DDR_REF_START);
-set_reset_data( slcr__DDR_CMD_STA, val_slcr__DDR_CMD_STA);
-set_reset_data( slcr__DDR_URGENT_SEL, val_slcr__DDR_URGENT_SEL);
-set_reset_data( slcr__DDR_DFI_STATUS, val_slcr__DDR_DFI_STATUS);
-set_reset_data( slcr__MIO_PIN_00, val_slcr__MIO_PIN_00);
-set_reset_data( slcr__MIO_PIN_01, val_slcr__MIO_PIN_01);
-set_reset_data( slcr__MIO_PIN_02, val_slcr__MIO_PIN_02);
-set_reset_data( slcr__MIO_PIN_03, val_slcr__MIO_PIN_03);
-set_reset_data( slcr__MIO_PIN_04, val_slcr__MIO_PIN_04);
-set_reset_data( slcr__MIO_PIN_05, val_slcr__MIO_PIN_05);
-set_reset_data( slcr__MIO_PIN_06, val_slcr__MIO_PIN_06);
-set_reset_data( slcr__MIO_PIN_07, val_slcr__MIO_PIN_07);
-set_reset_data( slcr__MIO_PIN_08, val_slcr__MIO_PIN_08);
-set_reset_data( slcr__MIO_PIN_09, val_slcr__MIO_PIN_09);
-set_reset_data( slcr__MIO_PIN_10, val_slcr__MIO_PIN_10);
-set_reset_data( slcr__MIO_PIN_11, val_slcr__MIO_PIN_11);
-set_reset_data( slcr__MIO_PIN_12, val_slcr__MIO_PIN_12);
-set_reset_data( slcr__MIO_PIN_13, val_slcr__MIO_PIN_13);
-set_reset_data( slcr__MIO_PIN_14, val_slcr__MIO_PIN_14);
-set_reset_data( slcr__MIO_PIN_15, val_slcr__MIO_PIN_15);
-set_reset_data( slcr__MIO_PIN_16, val_slcr__MIO_PIN_16);
-set_reset_data( slcr__MIO_PIN_17, val_slcr__MIO_PIN_17);
-set_reset_data( slcr__MIO_PIN_18, val_slcr__MIO_PIN_18);
-set_reset_data( slcr__MIO_PIN_19, val_slcr__MIO_PIN_19);
-set_reset_data( slcr__MIO_PIN_20, val_slcr__MIO_PIN_20);
-set_reset_data( slcr__MIO_PIN_21, val_slcr__MIO_PIN_21);
-set_reset_data( slcr__MIO_PIN_22, val_slcr__MIO_PIN_22);
-set_reset_data( slcr__MIO_PIN_23, val_slcr__MIO_PIN_23);
-set_reset_data( slcr__MIO_PIN_24, val_slcr__MIO_PIN_24);
-set_reset_data( slcr__MIO_PIN_25, val_slcr__MIO_PIN_25);
-set_reset_data( slcr__MIO_PIN_26, val_slcr__MIO_PIN_26);
-set_reset_data( slcr__MIO_PIN_27, val_slcr__MIO_PIN_27);
-set_reset_data( slcr__MIO_PIN_28, val_slcr__MIO_PIN_28);
-set_reset_data( slcr__MIO_PIN_29, val_slcr__MIO_PIN_29);
-set_reset_data( slcr__MIO_PIN_30, val_slcr__MIO_PIN_30);
-set_reset_data( slcr__MIO_PIN_31, val_slcr__MIO_PIN_31);
-set_reset_data( slcr__MIO_PIN_32, val_slcr__MIO_PIN_32);
-set_reset_data( slcr__MIO_PIN_33, val_slcr__MIO_PIN_33);
-set_reset_data( slcr__MIO_PIN_34, val_slcr__MIO_PIN_34);
-set_reset_data( slcr__MIO_PIN_35, val_slcr__MIO_PIN_35);
-set_reset_data( slcr__MIO_PIN_36, val_slcr__MIO_PIN_36);
-set_reset_data( slcr__MIO_PIN_37, val_slcr__MIO_PIN_37);
-set_reset_data( slcr__MIO_PIN_38, val_slcr__MIO_PIN_38);
-set_reset_data( slcr__MIO_PIN_39, val_slcr__MIO_PIN_39);
-set_reset_data( slcr__MIO_PIN_40, val_slcr__MIO_PIN_40);
-set_reset_data( slcr__MIO_PIN_41, val_slcr__MIO_PIN_41);
-set_reset_data( slcr__MIO_PIN_42, val_slcr__MIO_PIN_42);
-set_reset_data( slcr__MIO_PIN_43, val_slcr__MIO_PIN_43);
-set_reset_data( slcr__MIO_PIN_44, val_slcr__MIO_PIN_44);
-set_reset_data( slcr__MIO_PIN_45, val_slcr__MIO_PIN_45);
-set_reset_data( slcr__MIO_PIN_46, val_slcr__MIO_PIN_46);
-set_reset_data( slcr__MIO_PIN_47, val_slcr__MIO_PIN_47);
-set_reset_data( slcr__MIO_PIN_48, val_slcr__MIO_PIN_48);
-set_reset_data( slcr__MIO_PIN_49, val_slcr__MIO_PIN_49);
-set_reset_data( slcr__MIO_PIN_50, val_slcr__MIO_PIN_50);
-set_reset_data( slcr__MIO_PIN_51, val_slcr__MIO_PIN_51);
-set_reset_data( slcr__MIO_PIN_52, val_slcr__MIO_PIN_52);
-set_reset_data( slcr__MIO_PIN_53, val_slcr__MIO_PIN_53);
-set_reset_data( slcr__MIO_FMIO_GEM_SEL, val_slcr__MIO_FMIO_GEM_SEL);
-set_reset_data( slcr__MIO_LOOPBACK, val_slcr__MIO_LOOPBACK);
-set_reset_data( slcr__MIO_MST_TRI0, val_slcr__MIO_MST_TRI0);
-set_reset_data( slcr__MIO_MST_TRI1, val_slcr__MIO_MST_TRI1);
-set_reset_data( slcr__SD0_WP_CD_SEL, val_slcr__SD0_WP_CD_SEL);
-set_reset_data( slcr__SD1_WP_CD_SEL, val_slcr__SD1_WP_CD_SEL);
-set_reset_data( slcr__LVL_SHFTR_EN, val_slcr__LVL_SHFTR_EN);
-set_reset_data( slcr__OCM_CFG, val_slcr__OCM_CFG);
-set_reset_data( slcr__CPU0_RAM0, val_slcr__CPU0_RAM0);
-set_reset_data( slcr__CPU0_RAM1, val_slcr__CPU0_RAM1);
-set_reset_data( slcr__CPU0_RAM2, val_slcr__CPU0_RAM2);
-set_reset_data( slcr__CPU1_RAM0, val_slcr__CPU1_RAM0);
-set_reset_data( slcr__CPU1_RAM1, val_slcr__CPU1_RAM1);
-set_reset_data( slcr__CPU1_RAM2, val_slcr__CPU1_RAM2);
-set_reset_data( slcr__SCU_RAM, val_slcr__SCU_RAM);
-set_reset_data( slcr__L2C_RAM, val_slcr__L2C_RAM);
-set_reset_data( slcr__IOU_RAM_GEM01, val_slcr__IOU_RAM_GEM01);
-set_reset_data( slcr__IOU_RAM_USB01, val_slcr__IOU_RAM_USB01);
-set_reset_data( slcr__IOU_RAM_SDIO0, val_slcr__IOU_RAM_SDIO0);
-set_reset_data( slcr__IOU_RAM_SDIO1, val_slcr__IOU_RAM_SDIO1);
-set_reset_data( slcr__IOU_RAM_CAN0, val_slcr__IOU_RAM_CAN0);
-set_reset_data( slcr__IOU_RAM_CAN1, val_slcr__IOU_RAM_CAN1);
-set_reset_data( slcr__IOU_RAM_LQSPI, val_slcr__IOU_RAM_LQSPI);
-set_reset_data( slcr__DMAC_RAM, val_slcr__DMAC_RAM);
-set_reset_data( slcr__AFI0_RAM0, val_slcr__AFI0_RAM0);
-set_reset_data( slcr__AFI0_RAM1, val_slcr__AFI0_RAM1);
-set_reset_data( slcr__AFI0_RAM2, val_slcr__AFI0_RAM2);
-set_reset_data( slcr__AFI1_RAM0, val_slcr__AFI1_RAM0);
-set_reset_data( slcr__AFI1_RAM1, val_slcr__AFI1_RAM1);
-set_reset_data( slcr__AFI1_RAM2, val_slcr__AFI1_RAM2);
-set_reset_data( slcr__AFI2_RAM0, val_slcr__AFI2_RAM0);
-set_reset_data( slcr__AFI2_RAM1, val_slcr__AFI2_RAM1);
-set_reset_data( slcr__AFI2_RAM2, val_slcr__AFI2_RAM2);
-set_reset_data( slcr__AFI3_RAM0, val_slcr__AFI3_RAM0);
-set_reset_data( slcr__AFI3_RAM1, val_slcr__AFI3_RAM1);
-set_reset_data( slcr__AFI3_RAM2, val_slcr__AFI3_RAM2);
-set_reset_data( slcr__OCM_RAM, val_slcr__OCM_RAM);
-set_reset_data( slcr__OCM_ROM0, val_slcr__OCM_ROM0);
-set_reset_data( slcr__OCM_ROM1, val_slcr__OCM_ROM1);
-set_reset_data( slcr__DEVCI_RAM, val_slcr__DEVCI_RAM);
-set_reset_data( slcr__CSG_RAM, val_slcr__CSG_RAM);
-set_reset_data( slcr__GPIOB_CTRL, val_slcr__GPIOB_CTRL);
-set_reset_data( slcr__GPIOB_CFG_CMOS18, val_slcr__GPIOB_CFG_CMOS18);
-set_reset_data( slcr__GPIOB_CFG_CMOS25, val_slcr__GPIOB_CFG_CMOS25);
-set_reset_data( slcr__GPIOB_CFG_CMOS33, val_slcr__GPIOB_CFG_CMOS33);
-set_reset_data( slcr__GPIOB_CFG_LVTTL, val_slcr__GPIOB_CFG_LVTTL);
-set_reset_data( slcr__GPIOB_CFG_HSTL, val_slcr__GPIOB_CFG_HSTL);
-set_reset_data( slcr__GPIOB_DRVR_BIAS_CTRL, val_slcr__GPIOB_DRVR_BIAS_CTRL);
-set_reset_data( slcr__DDRIOB_ADDR0, val_slcr__DDRIOB_ADDR0);
-set_reset_data( slcr__DDRIOB_ADDR1, val_slcr__DDRIOB_ADDR1);
-set_reset_data( slcr__DDRIOB_DATA0, val_slcr__DDRIOB_DATA0);
-set_reset_data( slcr__DDRIOB_DATA1, val_slcr__DDRIOB_DATA1);
-set_reset_data( slcr__DDRIOB_DIFF0, val_slcr__DDRIOB_DIFF0);
-set_reset_data( slcr__DDRIOB_DIFF1, val_slcr__DDRIOB_DIFF1);
-set_reset_data( slcr__DDRIOB_CLOCK, val_slcr__DDRIOB_CLOCK);
-set_reset_data( slcr__DDRIOB_DRIVE_SLEW_ADDR, val_slcr__DDRIOB_DRIVE_SLEW_ADDR);
-set_reset_data( slcr__DDRIOB_DRIVE_SLEW_DATA, val_slcr__DDRIOB_DRIVE_SLEW_DATA);
-set_reset_data( slcr__DDRIOB_DRIVE_SLEW_DIFF, val_slcr__DDRIOB_DRIVE_SLEW_DIFF);
-set_reset_data( slcr__DDRIOB_DRIVE_SLEW_CLOCK, val_slcr__DDRIOB_DRIVE_SLEW_CLOCK);
-set_reset_data( slcr__DDRIOB_DDR_CTRL, val_slcr__DDRIOB_DDR_CTRL);
-set_reset_data( slcr__DDRIOB_DCI_CTRL, val_slcr__DDRIOB_DCI_CTRL);
-set_reset_data( slcr__DDRIOB_DCI_STATUS, val_slcr__DDRIOB_DCI_STATUS);
-
-// ************************************************************
-// Module smcc pl353
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( smcc__memc_status, val_smcc__memc_status);
-set_reset_data( smcc__memif_cfg, val_smcc__memif_cfg);
-set_reset_data( smcc__memc_cfg_set, val_smcc__memc_cfg_set);
-set_reset_data( smcc__memc_cfg_clr, val_smcc__memc_cfg_clr);
-set_reset_data( smcc__direct_cmd, val_smcc__direct_cmd);
-set_reset_data( smcc__set_cycles, val_smcc__set_cycles);
-set_reset_data( smcc__set_opmode, val_smcc__set_opmode);
-set_reset_data( smcc__refresh_period_0, val_smcc__refresh_period_0);
-set_reset_data( smcc__refresh_period_1, val_smcc__refresh_period_1);
-set_reset_data( smcc__sram_cycles0_0, val_smcc__sram_cycles0_0);
-set_reset_data( smcc__opmode0_0, val_smcc__opmode0_0);
-set_reset_data( smcc__sram_cycles0_1, val_smcc__sram_cycles0_1);
-set_reset_data( smcc__opmode0_1, val_smcc__opmode0_1);
-set_reset_data( smcc__nand_cycles1_0, val_smcc__nand_cycles1_0);
-set_reset_data( smcc__opmode1_0, val_smcc__opmode1_0);
-set_reset_data( smcc__user_status, val_smcc__user_status);
-set_reset_data( smcc__user_config, val_smcc__user_config);
-set_reset_data( smcc__ecc_status_0, val_smcc__ecc_status_0);
-set_reset_data( smcc__ecc_memcfg_0, val_smcc__ecc_memcfg_0);
-set_reset_data( smcc__ecc_memcommand1_0, val_smcc__ecc_memcommand1_0);
-set_reset_data( smcc__ecc_memcommand2_0, val_smcc__ecc_memcommand2_0);
-set_reset_data( smcc__ecc_addr0_0, val_smcc__ecc_addr0_0);
-set_reset_data( smcc__ecc_addr1_0, val_smcc__ecc_addr1_0);
-set_reset_data( smcc__ecc_value0_0, val_smcc__ecc_value0_0);
-set_reset_data( smcc__ecc_value1_0, val_smcc__ecc_value1_0);
-set_reset_data( smcc__ecc_value2_0, val_smcc__ecc_value2_0);
-set_reset_data( smcc__ecc_value3_0, val_smcc__ecc_value3_0);
-set_reset_data( smcc__ecc_status_1, val_smcc__ecc_status_1);
-set_reset_data( smcc__ecc_memcfg_1, val_smcc__ecc_memcfg_1);
-set_reset_data( smcc__ecc_memcommand1_1, val_smcc__ecc_memcommand1_1);
-set_reset_data( smcc__ecc_memcommand2_1, val_smcc__ecc_memcommand2_1);
-set_reset_data( smcc__ecc_addr0_1, val_smcc__ecc_addr0_1);
-set_reset_data( smcc__ecc_addr1_1, val_smcc__ecc_addr1_1);
-set_reset_data( smcc__ecc_value0_1, val_smcc__ecc_value0_1);
-set_reset_data( smcc__ecc_value1_1, val_smcc__ecc_value1_1);
-set_reset_data( smcc__ecc_value2_1, val_smcc__ecc_value2_1);
-set_reset_data( smcc__ecc_value3_1, val_smcc__ecc_value3_1);
-set_reset_data( smcc__integration_test, val_smcc__integration_test);
-set_reset_data( smcc__periph_id_0, val_smcc__periph_id_0);
-set_reset_data( smcc__periph_id_1, val_smcc__periph_id_1);
-set_reset_data( smcc__periph_id_2, val_smcc__periph_id_2);
-set_reset_data( smcc__periph_id_3, val_smcc__periph_id_3);
-set_reset_data( smcc__pcell_id_0, val_smcc__pcell_id_0);
-set_reset_data( smcc__pcell_id_1, val_smcc__pcell_id_1);
-set_reset_data( smcc__pcell_id_2, val_smcc__pcell_id_2);
-set_reset_data( smcc__pcell_id_3, val_smcc__pcell_id_3);
-
-// ************************************************************
-// Module spi0 SPI
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( spi0__Config_reg0, val_spi0__Config_reg0);
-set_reset_data( spi0__Intr_status_reg0, val_spi0__Intr_status_reg0);
-set_reset_data( spi0__Intrpt_en_reg0, val_spi0__Intrpt_en_reg0);
-set_reset_data( spi0__Intrpt_dis_reg0, val_spi0__Intrpt_dis_reg0);
-set_reset_data( spi0__Intrpt_mask_reg0, val_spi0__Intrpt_mask_reg0);
-set_reset_data( spi0__En_reg0, val_spi0__En_reg0);
-set_reset_data( spi0__Delay_reg0, val_spi0__Delay_reg0);
-set_reset_data( spi0__Tx_data_reg0, val_spi0__Tx_data_reg0);
-set_reset_data( spi0__Rx_data_reg0, val_spi0__Rx_data_reg0);
-set_reset_data( spi0__Slave_Idle_count_reg0, val_spi0__Slave_Idle_count_reg0);
-set_reset_data( spi0__TX_thres_reg0, val_spi0__TX_thres_reg0);
-set_reset_data( spi0__RX_thres_reg0, val_spi0__RX_thres_reg0);
-set_reset_data( spi0__Mod_id_reg0, val_spi0__Mod_id_reg0);
-
-// ************************************************************
-// Module spi1 SPI
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( spi1__Config_reg0, val_spi1__Config_reg0);
-set_reset_data( spi1__Intr_status_reg0, val_spi1__Intr_status_reg0);
-set_reset_data( spi1__Intrpt_en_reg0, val_spi1__Intrpt_en_reg0);
-set_reset_data( spi1__Intrpt_dis_reg0, val_spi1__Intrpt_dis_reg0);
-set_reset_data( spi1__Intrpt_mask_reg0, val_spi1__Intrpt_mask_reg0);
-set_reset_data( spi1__En_reg0, val_spi1__En_reg0);
-set_reset_data( spi1__Delay_reg0, val_spi1__Delay_reg0);
-set_reset_data( spi1__Tx_data_reg0, val_spi1__Tx_data_reg0);
-set_reset_data( spi1__Rx_data_reg0, val_spi1__Rx_data_reg0);
-set_reset_data( spi1__Slave_Idle_count_reg0, val_spi1__Slave_Idle_count_reg0);
-set_reset_data( spi1__TX_thres_reg0, val_spi1__TX_thres_reg0);
-set_reset_data( spi1__RX_thres_reg0, val_spi1__RX_thres_reg0);
-set_reset_data( spi1__Mod_id_reg0, val_spi1__Mod_id_reg0);
-
-// ************************************************************
-// Module swdt swdt
-// doc version: 2.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( swdt__MODE, val_swdt__MODE);
-set_reset_data( swdt__CONTROL, val_swdt__CONTROL);
-set_reset_data( swdt__RESTART, val_swdt__RESTART);
-set_reset_data( swdt__STATUS, val_swdt__STATUS);
-
-// ************************************************************
-// Module ttc0 ttc
-// doc version: 2.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( ttc0__Clock_Control_1, val_ttc0__Clock_Control_1);
-set_reset_data( ttc0__Clock_Control_2, val_ttc0__Clock_Control_2);
-set_reset_data( ttc0__Clock_Control_3, val_ttc0__Clock_Control_3);
-set_reset_data( ttc0__Counter_Control_1, val_ttc0__Counter_Control_1);
-set_reset_data( ttc0__Counter_Control_2, val_ttc0__Counter_Control_2);
-set_reset_data( ttc0__Counter_Control_3, val_ttc0__Counter_Control_3);
-set_reset_data( ttc0__Counter_Value_1, val_ttc0__Counter_Value_1);
-set_reset_data( ttc0__Counter_Value_2, val_ttc0__Counter_Value_2);
-set_reset_data( ttc0__Counter_Value_3, val_ttc0__Counter_Value_3);
-set_reset_data( ttc0__Interval_Counter_1, val_ttc0__Interval_Counter_1);
-set_reset_data( ttc0__Interval_Counter_2, val_ttc0__Interval_Counter_2);
-set_reset_data( ttc0__Interval_Counter_3, val_ttc0__Interval_Counter_3);
-set_reset_data( ttc0__Match_1_Counter_1, val_ttc0__Match_1_Counter_1);
-set_reset_data( ttc0__Match_1_Counter_2, val_ttc0__Match_1_Counter_2);
-set_reset_data( ttc0__Match_1_Counter_3, val_ttc0__Match_1_Counter_3);
-set_reset_data( ttc0__Match_2_Counter_1, val_ttc0__Match_2_Counter_1);
-set_reset_data( ttc0__Match_2_Counter_2, val_ttc0__Match_2_Counter_2);
-set_reset_data( ttc0__Match_2_Counter_3, val_ttc0__Match_2_Counter_3);
-set_reset_data( ttc0__Match_3_Counter_1, val_ttc0__Match_3_Counter_1);
-set_reset_data( ttc0__Match_3_Counter_2, val_ttc0__Match_3_Counter_2);
-set_reset_data( ttc0__Match_3_Counter_3, val_ttc0__Match_3_Counter_3);
-set_reset_data( ttc0__Interrupt_Register_1, val_ttc0__Interrupt_Register_1);
-set_reset_data( ttc0__Interrupt_Register_2, val_ttc0__Interrupt_Register_2);
-set_reset_data( ttc0__Interrupt_Register_3, val_ttc0__Interrupt_Register_3);
-set_reset_data( ttc0__Interrupt_Enable_1, val_ttc0__Interrupt_Enable_1);
-set_reset_data( ttc0__Interrupt_Enable_2, val_ttc0__Interrupt_Enable_2);
-set_reset_data( ttc0__Interrupt_Enable_3, val_ttc0__Interrupt_Enable_3);
-set_reset_data( ttc0__Event_Control_Timer_1, val_ttc0__Event_Control_Timer_1);
-set_reset_data( ttc0__Event_Control_Timer_2, val_ttc0__Event_Control_Timer_2);
-set_reset_data( ttc0__Event_Control_Timer_3, val_ttc0__Event_Control_Timer_3);
-set_reset_data( ttc0__Event_Register_1, val_ttc0__Event_Register_1);
-set_reset_data( ttc0__Event_Register_2, val_ttc0__Event_Register_2);
-set_reset_data( ttc0__Event_Register_3, val_ttc0__Event_Register_3);
-
-// ************************************************************
-// Module ttc1 ttc
-// doc version: 2.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( ttc1__Clock_Control_1, val_ttc1__Clock_Control_1);
-set_reset_data( ttc1__Clock_Control_2, val_ttc1__Clock_Control_2);
-set_reset_data( ttc1__Clock_Control_3, val_ttc1__Clock_Control_3);
-set_reset_data( ttc1__Counter_Control_1, val_ttc1__Counter_Control_1);
-set_reset_data( ttc1__Counter_Control_2, val_ttc1__Counter_Control_2);
-set_reset_data( ttc1__Counter_Control_3, val_ttc1__Counter_Control_3);
-set_reset_data( ttc1__Counter_Value_1, val_ttc1__Counter_Value_1);
-set_reset_data( ttc1__Counter_Value_2, val_ttc1__Counter_Value_2);
-set_reset_data( ttc1__Counter_Value_3, val_ttc1__Counter_Value_3);
-set_reset_data( ttc1__Interval_Counter_1, val_ttc1__Interval_Counter_1);
-set_reset_data( ttc1__Interval_Counter_2, val_ttc1__Interval_Counter_2);
-set_reset_data( ttc1__Interval_Counter_3, val_ttc1__Interval_Counter_3);
-set_reset_data( ttc1__Match_1_Counter_1, val_ttc1__Match_1_Counter_1);
-set_reset_data( ttc1__Match_1_Counter_2, val_ttc1__Match_1_Counter_2);
-set_reset_data( ttc1__Match_1_Counter_3, val_ttc1__Match_1_Counter_3);
-set_reset_data( ttc1__Match_2_Counter_1, val_ttc1__Match_2_Counter_1);
-set_reset_data( ttc1__Match_2_Counter_2, val_ttc1__Match_2_Counter_2);
-set_reset_data( ttc1__Match_2_Counter_3, val_ttc1__Match_2_Counter_3);
-set_reset_data( ttc1__Match_3_Counter_1, val_ttc1__Match_3_Counter_1);
-set_reset_data( ttc1__Match_3_Counter_2, val_ttc1__Match_3_Counter_2);
-set_reset_data( ttc1__Match_3_Counter_3, val_ttc1__Match_3_Counter_3);
-set_reset_data( ttc1__Interrupt_Register_1, val_ttc1__Interrupt_Register_1);
-set_reset_data( ttc1__Interrupt_Register_2, val_ttc1__Interrupt_Register_2);
-set_reset_data( ttc1__Interrupt_Register_3, val_ttc1__Interrupt_Register_3);
-set_reset_data( ttc1__Interrupt_Enable_1, val_ttc1__Interrupt_Enable_1);
-set_reset_data( ttc1__Interrupt_Enable_2, val_ttc1__Interrupt_Enable_2);
-set_reset_data( ttc1__Interrupt_Enable_3, val_ttc1__Interrupt_Enable_3);
-set_reset_data( ttc1__Event_Control_Timer_1, val_ttc1__Event_Control_Timer_1);
-set_reset_data( ttc1__Event_Control_Timer_2, val_ttc1__Event_Control_Timer_2);
-set_reset_data( ttc1__Event_Control_Timer_3, val_ttc1__Event_Control_Timer_3);
-set_reset_data( ttc1__Event_Register_1, val_ttc1__Event_Register_1);
-set_reset_data( ttc1__Event_Register_2, val_ttc1__Event_Register_2);
-set_reset_data( ttc1__Event_Register_3, val_ttc1__Event_Register_3);
-
-// ************************************************************
-// Module uart0 UART
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( uart0__Control_reg0, val_uart0__Control_reg0);
-set_reset_data( uart0__mode_reg0, val_uart0__mode_reg0);
-set_reset_data( uart0__Intrpt_en_reg0, val_uart0__Intrpt_en_reg0);
-set_reset_data( uart0__Intrpt_dis_reg0, val_uart0__Intrpt_dis_reg0);
-set_reset_data( uart0__Intrpt_mask_reg0, val_uart0__Intrpt_mask_reg0);
-set_reset_data( uart0__Chnl_int_sts_reg0, val_uart0__Chnl_int_sts_reg0);
-set_reset_data( uart0__Baud_rate_gen_reg0, val_uart0__Baud_rate_gen_reg0);
-set_reset_data( uart0__Rcvr_timeout_reg0, val_uart0__Rcvr_timeout_reg0);
-set_reset_data( uart0__Rcvr_FIFO_trigger_level0, val_uart0__Rcvr_FIFO_trigger_level0);
-set_reset_data( uart0__Modem_ctrl_reg0, val_uart0__Modem_ctrl_reg0);
-set_reset_data( uart0__Modem_sts_reg0, val_uart0__Modem_sts_reg0);
-set_reset_data( uart0__Channel_sts_reg0, val_uart0__Channel_sts_reg0);
-set_reset_data( uart0__TX_RX_FIFO0, val_uart0__TX_RX_FIFO0);
-set_reset_data( uart0__Baud_rate_divider_reg0, val_uart0__Baud_rate_divider_reg0);
-set_reset_data( uart0__Flow_delay_reg0, val_uart0__Flow_delay_reg0);
-set_reset_data( uart0__IR_min_rcv_pulse_wdth0, val_uart0__IR_min_rcv_pulse_wdth0);
-set_reset_data( uart0__IR_transmitted_pulse_wdth0, val_uart0__IR_transmitted_pulse_wdth0);
-set_reset_data( uart0__Tx_FIFO_trigger_level0, val_uart0__Tx_FIFO_trigger_level0);
-
-// ************************************************************
-// Module uart1 UART
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( uart1__Control_reg0, val_uart1__Control_reg0);
-set_reset_data( uart1__mode_reg0, val_uart1__mode_reg0);
-set_reset_data( uart1__Intrpt_en_reg0, val_uart1__Intrpt_en_reg0);
-set_reset_data( uart1__Intrpt_dis_reg0, val_uart1__Intrpt_dis_reg0);
-set_reset_data( uart1__Intrpt_mask_reg0, val_uart1__Intrpt_mask_reg0);
-set_reset_data( uart1__Chnl_int_sts_reg0, val_uart1__Chnl_int_sts_reg0);
-set_reset_data( uart1__Baud_rate_gen_reg0, val_uart1__Baud_rate_gen_reg0);
-set_reset_data( uart1__Rcvr_timeout_reg0, val_uart1__Rcvr_timeout_reg0);
-set_reset_data( uart1__Rcvr_FIFO_trigger_level0, val_uart1__Rcvr_FIFO_trigger_level0);
-set_reset_data( uart1__Modem_ctrl_reg0, val_uart1__Modem_ctrl_reg0);
-set_reset_data( uart1__Modem_sts_reg0, val_uart1__Modem_sts_reg0);
-set_reset_data( uart1__Channel_sts_reg0, val_uart1__Channel_sts_reg0);
-set_reset_data( uart1__TX_RX_FIFO0, val_uart1__TX_RX_FIFO0);
-set_reset_data( uart1__Baud_rate_divider_reg0, val_uart1__Baud_rate_divider_reg0);
-set_reset_data( uart1__Flow_delay_reg0, val_uart1__Flow_delay_reg0);
-set_reset_data( uart1__IR_min_rcv_pulse_wdth0, val_uart1__IR_min_rcv_pulse_wdth0);
-set_reset_data( uart1__IR_transmitted_pulse_wdth0, val_uart1__IR_transmitted_pulse_wdth0);
-set_reset_data( uart1__Tx_FIFO_trigger_level0, val_uart1__Tx_FIFO_trigger_level0);
-
-// ************************************************************
-// Module usb0 usb
-// doc version: 1.3
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( usb0__ID, val_usb0__ID);
-set_reset_data( usb0__HWGENERAL, val_usb0__HWGENERAL);
-set_reset_data( usb0__HWHOST, val_usb0__HWHOST);
-set_reset_data( usb0__HWDEVICE, val_usb0__HWDEVICE);
-set_reset_data( usb0__HWTXBUF, val_usb0__HWTXBUF);
-set_reset_data( usb0__HWRXBUF, val_usb0__HWRXBUF);
-set_reset_data( usb0__GPTIMER0LD, val_usb0__GPTIMER0LD);
-set_reset_data( usb0__GPTIMER0CTRL, val_usb0__GPTIMER0CTRL);
-set_reset_data( usb0__GPTIMER1LD, val_usb0__GPTIMER1LD);
-set_reset_data( usb0__GPTIMER1CTRL, val_usb0__GPTIMER1CTRL);
-set_reset_data( usb0__SBUSCFG, val_usb0__SBUSCFG);
-set_reset_data( usb0__CAPLENGTH_HCIVERSION, val_usb0__CAPLENGTH_HCIVERSION);
-set_reset_data( usb0__HCSPARAMS, val_usb0__HCSPARAMS);
-set_reset_data( usb0__HCCPARAMS, val_usb0__HCCPARAMS);
-set_reset_data( usb0__DCIVERSION, val_usb0__DCIVERSION);
-set_reset_data( usb0__DCCPARAMS, val_usb0__DCCPARAMS);
-set_reset_data( usb0__USBCMD, val_usb0__USBCMD);
-set_reset_data( usb0__USBSTS, val_usb0__USBSTS);
-set_reset_data( usb0__USBINTR, val_usb0__USBINTR);
-set_reset_data( usb0__FRINDEX, val_usb0__FRINDEX);
-set_reset_data( usb0__PERIODICLISTBASE_DEVICEADDR, val_usb0__PERIODICLISTBASE_DEVICEADDR);
-set_reset_data( usb0__ASYNCLISTADDR_ENDPOINTLISTADDR, val_usb0__ASYNCLISTADDR_ENDPOINTLISTADDR);
-set_reset_data( usb0__TTCTRL, val_usb0__TTCTRL);
-set_reset_data( usb0__BURSTSIZE, val_usb0__BURSTSIZE);
-set_reset_data( usb0__TXFILLTUNING, val_usb0__TXFILLTUNING);
-set_reset_data( usb0__TXTTFILLTUNING, val_usb0__TXTTFILLTUNING);
-set_reset_data( usb0__IC_USB, val_usb0__IC_USB);
-set_reset_data( usb0__ULPI_VIEWPORT, val_usb0__ULPI_VIEWPORT);
-set_reset_data( usb0__ENDPTNAK, val_usb0__ENDPTNAK);
-set_reset_data( usb0__ENDPTNAKEN, val_usb0__ENDPTNAKEN);
-set_reset_data( usb0__CONFIGFLAG, val_usb0__CONFIGFLAG);
-set_reset_data( usb0__PORTSC1, val_usb0__PORTSC1);
-set_reset_data( usb0__OTGSC, val_usb0__OTGSC);
-set_reset_data( usb0__USBMODE, val_usb0__USBMODE);
-set_reset_data( usb0__ENDPTSETUPSTAT, val_usb0__ENDPTSETUPSTAT);
-set_reset_data( usb0__ENDPTPRIME, val_usb0__ENDPTPRIME);
-set_reset_data( usb0__ENDPTFLUSH, val_usb0__ENDPTFLUSH);
-set_reset_data( usb0__ENDPTSTAT, val_usb0__ENDPTSTAT);
-set_reset_data( usb0__ENDPTCOMPLETE, val_usb0__ENDPTCOMPLETE);
-set_reset_data( usb0__ENDPTCTRL0, val_usb0__ENDPTCTRL0);
-set_reset_data( usb0__ENDPTCTRL1, val_usb0__ENDPTCTRL1);
-set_reset_data( usb0__ENDPTCTRL2, val_usb0__ENDPTCTRL2);
-set_reset_data( usb0__ENDPTCTRL3, val_usb0__ENDPTCTRL3);
-set_reset_data( usb0__ENDPTCTRL4, val_usb0__ENDPTCTRL4);
-set_reset_data( usb0__ENDPTCTRL5, val_usb0__ENDPTCTRL5);
-set_reset_data( usb0__ENDPTCTRL6, val_usb0__ENDPTCTRL6);
-set_reset_data( usb0__ENDPTCTRL7, val_usb0__ENDPTCTRL7);
-set_reset_data( usb0__ENDPTCTRL8, val_usb0__ENDPTCTRL8);
-set_reset_data( usb0__ENDPTCTRL9, val_usb0__ENDPTCTRL9);
-set_reset_data( usb0__ENDPTCTRL10, val_usb0__ENDPTCTRL10);
-set_reset_data( usb0__ENDPTCTRL11, val_usb0__ENDPTCTRL11);
-set_reset_data( usb0__ENDPTCTRL12, val_usb0__ENDPTCTRL12);
-
-// ************************************************************
-// Module usb1 usb
-// doc version: 1.3
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-set_reset_data( usb1__ID, val_usb1__ID);
-set_reset_data( usb1__HWGENERAL, val_usb1__HWGENERAL);
-set_reset_data( usb1__HWHOST, val_usb1__HWHOST);
-set_reset_data( usb1__HWDEVICE, val_usb1__HWDEVICE);
-set_reset_data( usb1__HWTXBUF, val_usb1__HWTXBUF);
-set_reset_data( usb1__HWRXBUF, val_usb1__HWRXBUF);
-set_reset_data( usb1__GPTIMER0LD, val_usb1__GPTIMER0LD);
-set_reset_data( usb1__GPTIMER0CTRL, val_usb1__GPTIMER0CTRL);
-set_reset_data( usb1__GPTIMER1LD, val_usb1__GPTIMER1LD);
-set_reset_data( usb1__GPTIMER1CTRL, val_usb1__GPTIMER1CTRL);
-set_reset_data( usb1__SBUSCFG, val_usb1__SBUSCFG);
-set_reset_data( usb1__CAPLENGTH_HCIVERSION, val_usb1__CAPLENGTH_HCIVERSION);
-set_reset_data( usb1__HCSPARAMS, val_usb1__HCSPARAMS);
-set_reset_data( usb1__HCCPARAMS, val_usb1__HCCPARAMS);
-set_reset_data( usb1__DCIVERSION, val_usb1__DCIVERSION);
-set_reset_data( usb1__DCCPARAMS, val_usb1__DCCPARAMS);
-set_reset_data( usb1__USBCMD, val_usb1__USBCMD);
-set_reset_data( usb1__USBSTS, val_usb1__USBSTS);
-set_reset_data( usb1__USBINTR, val_usb1__USBINTR);
-set_reset_data( usb1__FRINDEX, val_usb1__FRINDEX);
-set_reset_data( usb1__PERIODICLISTBASE_DEVICEADDR, val_usb1__PERIODICLISTBASE_DEVICEADDR);
-set_reset_data( usb1__ASYNCLISTADDR_ENDPOINTLISTADDR, val_usb1__ASYNCLISTADDR_ENDPOINTLISTADDR);
-set_reset_data( usb1__TTCTRL, val_usb1__TTCTRL);
-set_reset_data( usb1__BURSTSIZE, val_usb1__BURSTSIZE);
-set_reset_data( usb1__TXFILLTUNING, val_usb1__TXFILLTUNING);
-set_reset_data( usb1__TXTTFILLTUNING, val_usb1__TXTTFILLTUNING);
-set_reset_data( usb1__IC_USB, val_usb1__IC_USB);
-set_reset_data( usb1__ULPI_VIEWPORT, val_usb1__ULPI_VIEWPORT);
-set_reset_data( usb1__ENDPTNAK, val_usb1__ENDPTNAK);
-set_reset_data( usb1__ENDPTNAKEN, val_usb1__ENDPTNAKEN);
-set_reset_data( usb1__CONFIGFLAG, val_usb1__CONFIGFLAG);
-set_reset_data( usb1__PORTSC1, val_usb1__PORTSC1);
-set_reset_data( usb1__OTGSC, val_usb1__OTGSC);
-set_reset_data( usb1__USBMODE, val_usb1__USBMODE);
-set_reset_data( usb1__ENDPTSETUPSTAT, val_usb1__ENDPTSETUPSTAT);
-set_reset_data( usb1__ENDPTPRIME, val_usb1__ENDPTPRIME);
-set_reset_data( usb1__ENDPTFLUSH, val_usb1__ENDPTFLUSH);
-set_reset_data( usb1__ENDPTSTAT, val_usb1__ENDPTSTAT);
-set_reset_data( usb1__ENDPTCOMPLETE, val_usb1__ENDPTCOMPLETE);
-set_reset_data( usb1__ENDPTCTRL0, val_usb1__ENDPTCTRL0);
-set_reset_data( usb1__ENDPTCTRL1, val_usb1__ENDPTCTRL1);
-set_reset_data( usb1__ENDPTCTRL2, val_usb1__ENDPTCTRL2);
-set_reset_data( usb1__ENDPTCTRL3, val_usb1__ENDPTCTRL3);
-set_reset_data( usb1__ENDPTCTRL4, val_usb1__ENDPTCTRL4);
-set_reset_data( usb1__ENDPTCTRL5, val_usb1__ENDPTCTRL5);
-set_reset_data( usb1__ENDPTCTRL6, val_usb1__ENDPTCTRL6);
-set_reset_data( usb1__ENDPTCTRL7, val_usb1__ENDPTCTRL7);
-set_reset_data( usb1__ENDPTCTRL8, val_usb1__ENDPTCTRL8);
-set_reset_data( usb1__ENDPTCTRL9, val_usb1__ENDPTCTRL9);
-set_reset_data( usb1__ENDPTCTRL10, val_usb1__ENDPTCTRL10);
-set_reset_data( usb1__ENDPTCTRL11, val_usb1__ENDPTCTRL11);
-set_reset_data( usb1__ENDPTCTRL12, val_usb1__ENDPTCTRL12);
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_params.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_params.v
deleted file mode 100755
index 22bf4b8..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_reg_params.v
+++ /dev/null
@@ -1,10519 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_reg_params.v
- *
- * Date : 2012-11
- *
- * Description : Parameters for Register Address and Default values.
- *
- *****************************************************************************/
-
-// Register default value info for chip pele_ps
-// This code was auto-generated by xregdb.py ver. 0.68, Thu Jul 12 10:32:25 2012
-// 54 modules, 2532 registers.
-
-
-// ************************************************************
-// Module afi0 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter afi0__AFI_RDCHAN_CTRL = 32'hF8008000;
-parameter val_afi0__AFI_RDCHAN_CTRL = 32'h00000000;
-parameter mask_afi0__AFI_RDCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi0__AFI_RDCHAN_ISSUINGCAP = 32'hF8008004;
-parameter val_afi0__AFI_RDCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi0__AFI_RDCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi0__AFI_RDQOS = 32'hF8008008;
-parameter val_afi0__AFI_RDQOS = 32'h00000000;
-parameter mask_afi0__AFI_RDQOS = 32'hFFFFFFFF;
-
-parameter afi0__AFI_RDDATAFIFO_LEVEL = 32'hF800800C;
-parameter val_afi0__AFI_RDDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi0__AFI_RDDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi0__AFI_RDDEBUG = 32'hF8008010;
-parameter val_afi0__AFI_RDDEBUG = 32'h00000000;
-parameter mask_afi0__AFI_RDDEBUG = 32'hFFFFFFFF;
-
-parameter afi0__AFI_WRCHAN_CTRL = 32'hF8008014;
-parameter val_afi0__AFI_WRCHAN_CTRL = 32'h00000F00;
-parameter mask_afi0__AFI_WRCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi0__AFI_WRCHAN_ISSUINGCAP = 32'hF8008018;
-parameter val_afi0__AFI_WRCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi0__AFI_WRCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi0__AFI_WRQOS = 32'hF800801C;
-parameter val_afi0__AFI_WRQOS = 32'h00000000;
-parameter mask_afi0__AFI_WRQOS = 32'hFFFFFFFF;
-
-parameter afi0__AFI_WRDATAFIFO_LEVEL = 32'hF8008020;
-parameter val_afi0__AFI_WRDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi0__AFI_WRDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi0__AFI_WRDEBUG = 32'hF8008024;
-parameter val_afi0__AFI_WRDEBUG = 32'h00000000;
-parameter mask_afi0__AFI_WRDEBUG = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module afi1 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter afi1__AFI_RDCHAN_CTRL = 32'hF8009000;
-parameter val_afi1__AFI_RDCHAN_CTRL = 32'h00000000;
-parameter mask_afi1__AFI_RDCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi1__AFI_RDCHAN_ISSUINGCAP = 32'hF8009004;
-parameter val_afi1__AFI_RDCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi1__AFI_RDCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi1__AFI_RDQOS = 32'hF8009008;
-parameter val_afi1__AFI_RDQOS = 32'h00000000;
-parameter mask_afi1__AFI_RDQOS = 32'hFFFFFFFF;
-
-parameter afi1__AFI_RDDATAFIFO_LEVEL = 32'hF800900C;
-parameter val_afi1__AFI_RDDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi1__AFI_RDDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi1__AFI_RDDEBUG = 32'hF8009010;
-parameter val_afi1__AFI_RDDEBUG = 32'h00000000;
-parameter mask_afi1__AFI_RDDEBUG = 32'hFFFFFFFF;
-
-parameter afi1__AFI_WRCHAN_CTRL = 32'hF8009014;
-parameter val_afi1__AFI_WRCHAN_CTRL = 32'h00000F00;
-parameter mask_afi1__AFI_WRCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi1__AFI_WRCHAN_ISSUINGCAP = 32'hF8009018;
-parameter val_afi1__AFI_WRCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi1__AFI_WRCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi1__AFI_WRQOS = 32'hF800901C;
-parameter val_afi1__AFI_WRQOS = 32'h00000000;
-parameter mask_afi1__AFI_WRQOS = 32'hFFFFFFFF;
-
-parameter afi1__AFI_WRDATAFIFO_LEVEL = 32'hF8009020;
-parameter val_afi1__AFI_WRDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi1__AFI_WRDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi1__AFI_WRDEBUG = 32'hF8009024;
-parameter val_afi1__AFI_WRDEBUG = 32'h00000000;
-parameter mask_afi1__AFI_WRDEBUG = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module afi2 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter afi2__AFI_RDCHAN_CTRL = 32'hF800A000;
-parameter val_afi2__AFI_RDCHAN_CTRL = 32'h00000000;
-parameter mask_afi2__AFI_RDCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi2__AFI_RDCHAN_ISSUINGCAP = 32'hF800A004;
-parameter val_afi2__AFI_RDCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi2__AFI_RDCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi2__AFI_RDQOS = 32'hF800A008;
-parameter val_afi2__AFI_RDQOS = 32'h00000000;
-parameter mask_afi2__AFI_RDQOS = 32'hFFFFFFFF;
-
-parameter afi2__AFI_RDDATAFIFO_LEVEL = 32'hF800A00C;
-parameter val_afi2__AFI_RDDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi2__AFI_RDDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi2__AFI_RDDEBUG = 32'hF800A010;
-parameter val_afi2__AFI_RDDEBUG = 32'h00000000;
-parameter mask_afi2__AFI_RDDEBUG = 32'hFFFFFFFF;
-
-parameter afi2__AFI_WRCHAN_CTRL = 32'hF800A014;
-parameter val_afi2__AFI_WRCHAN_CTRL = 32'h00000F00;
-parameter mask_afi2__AFI_WRCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi2__AFI_WRCHAN_ISSUINGCAP = 32'hF800A018;
-parameter val_afi2__AFI_WRCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi2__AFI_WRCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi2__AFI_WRQOS = 32'hF800A01C;
-parameter val_afi2__AFI_WRQOS = 32'h00000000;
-parameter mask_afi2__AFI_WRQOS = 32'hFFFFFFFF;
-
-parameter afi2__AFI_WRDATAFIFO_LEVEL = 32'hF800A020;
-parameter val_afi2__AFI_WRDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi2__AFI_WRDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi2__AFI_WRDEBUG = 32'hF800A024;
-parameter val_afi2__AFI_WRDEBUG = 32'h00000000;
-parameter mask_afi2__AFI_WRDEBUG = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module afi3 AFI
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter afi3__AFI_RDCHAN_CTRL = 32'hF800B000;
-parameter val_afi3__AFI_RDCHAN_CTRL = 32'h00000000;
-parameter mask_afi3__AFI_RDCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi3__AFI_RDCHAN_ISSUINGCAP = 32'hF800B004;
-parameter val_afi3__AFI_RDCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi3__AFI_RDCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi3__AFI_RDQOS = 32'hF800B008;
-parameter val_afi3__AFI_RDQOS = 32'h00000000;
-parameter mask_afi3__AFI_RDQOS = 32'hFFFFFFFF;
-
-parameter afi3__AFI_RDDATAFIFO_LEVEL = 32'hF800B00C;
-parameter val_afi3__AFI_RDDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi3__AFI_RDDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi3__AFI_RDDEBUG = 32'hF800B010;
-parameter val_afi3__AFI_RDDEBUG = 32'h00000000;
-parameter mask_afi3__AFI_RDDEBUG = 32'hFFFFFFFF;
-
-parameter afi3__AFI_WRCHAN_CTRL = 32'hF800B014;
-parameter val_afi3__AFI_WRCHAN_CTRL = 32'h00000F00;
-parameter mask_afi3__AFI_WRCHAN_CTRL = 32'hFFFFFFFF;
-
-parameter afi3__AFI_WRCHAN_ISSUINGCAP = 32'hF800B018;
-parameter val_afi3__AFI_WRCHAN_ISSUINGCAP = 32'h00000007;
-parameter mask_afi3__AFI_WRCHAN_ISSUINGCAP = 32'hFFFFFFFF;
-
-parameter afi3__AFI_WRQOS = 32'hF800B01C;
-parameter val_afi3__AFI_WRQOS = 32'h00000000;
-parameter mask_afi3__AFI_WRQOS = 32'hFFFFFFFF;
-
-parameter afi3__AFI_WRDATAFIFO_LEVEL = 32'hF800B020;
-parameter val_afi3__AFI_WRDATAFIFO_LEVEL = 32'h00000000;
-parameter mask_afi3__AFI_WRDATAFIFO_LEVEL = 32'hFFFFFFFF;
-
-parameter afi3__AFI_WRDEBUG = 32'hF800B024;
-parameter val_afi3__AFI_WRDEBUG = 32'h00000000;
-parameter mask_afi3__AFI_WRDEBUG = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module can0 can
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter can0__SRR = 32'hE0008000;
-parameter val_can0__SRR = 32'h00000000;
-parameter mask_can0__SRR = 32'hFFFFFFFF;
-
-parameter can0__MSR = 32'hE0008004;
-parameter val_can0__MSR = 32'h00000000;
-parameter mask_can0__MSR = 32'hFFFFFFFF;
-
-parameter can0__BRPR = 32'hE0008008;
-parameter val_can0__BRPR = 32'h00000000;
-parameter mask_can0__BRPR = 32'hFFFFFFFF;
-
-parameter can0__BTR = 32'hE000800C;
-parameter val_can0__BTR = 32'h00000000;
-parameter mask_can0__BTR = 32'hFFFFFFFF;
-
-parameter can0__ECR = 32'hE0008010;
-parameter val_can0__ECR = 32'h00000000;
-parameter mask_can0__ECR = 32'hFFFFFFFF;
-
-parameter can0__ESR = 32'hE0008014;
-parameter val_can0__ESR = 32'h00000000;
-parameter mask_can0__ESR = 32'hFFFFFFFF;
-
-parameter can0__SR = 32'hE0008018;
-parameter val_can0__SR = 32'h00000001;
-parameter mask_can0__SR = 32'hFFFFFFFF;
-
-parameter can0__ISR = 32'hE000801C;
-parameter val_can0__ISR = 32'h00006000;
-parameter mask_can0__ISR = 32'hFFFFFFFF;
-
-parameter can0__IER = 32'hE0008020;
-parameter val_can0__IER = 32'h00000000;
-parameter mask_can0__IER = 32'hFFFFFFFF;
-
-parameter can0__ICR = 32'hE0008024;
-parameter val_can0__ICR = 32'h00000000;
-parameter mask_can0__ICR = 32'hFFFFFFFF;
-
-parameter can0__TCR = 32'hE0008028;
-parameter val_can0__TCR = 32'h00000000;
-parameter mask_can0__TCR = 32'hFFFFFFFF;
-
-parameter can0__WIR = 32'hE000802C;
-parameter val_can0__WIR = 32'h00003F3F;
-parameter mask_can0__WIR = 32'hFFFFFFFF;
-
-parameter can0__TXFIFO_ID = 32'hE0008030;
-parameter val_can0__TXFIFO_ID = 32'h00000000;
-parameter mask_can0__TXFIFO_ID = 32'hFFFFFFFF;
-
-parameter can0__TXFIFO_DLC = 32'hE0008034;
-parameter val_can0__TXFIFO_DLC = 32'h00000000;
-parameter mask_can0__TXFIFO_DLC = 32'hFFFFFFFF;
-
-parameter can0__TXFIFO_DATA1 = 32'hE0008038;
-parameter val_can0__TXFIFO_DATA1 = 32'h00000000;
-parameter mask_can0__TXFIFO_DATA1 = 32'hFFFFFFFF;
-
-parameter can0__TXFIFO_DATA2 = 32'hE000803C;
-parameter val_can0__TXFIFO_DATA2 = 32'h00000000;
-parameter mask_can0__TXFIFO_DATA2 = 32'hFFFFFFFF;
-
-parameter can0__TXHPB_ID = 32'hE0008040;
-parameter val_can0__TXHPB_ID = 32'h00000000;
-parameter mask_can0__TXHPB_ID = 32'hFFFFFFFF;
-
-parameter can0__TXHPB_DLC = 32'hE0008044;
-parameter val_can0__TXHPB_DLC = 32'h00000000;
-parameter mask_can0__TXHPB_DLC = 32'hFFFFFFFF;
-
-parameter can0__TXHPB_DATA1 = 32'hE0008048;
-parameter val_can0__TXHPB_DATA1 = 32'h00000000;
-parameter mask_can0__TXHPB_DATA1 = 32'hFFFFFFFF;
-
-parameter can0__TXHPB_DATA2 = 32'hE000804C;
-parameter val_can0__TXHPB_DATA2 = 32'h00000000;
-parameter mask_can0__TXHPB_DATA2 = 32'hFFFFFFFF;
-
-parameter can0__RXFIFO_ID = 32'hE0008050;
-parameter val_can0__RXFIFO_ID = 32'h00000000;
-parameter mask_can0__RXFIFO_ID = 32'h00000000;
-
-parameter can0__RXFIFO_DLC = 32'hE0008054;
-parameter val_can0__RXFIFO_DLC = 32'h00000000;
-parameter mask_can0__RXFIFO_DLC = 32'h00000000;
-
-parameter can0__RXFIFO_DATA1 = 32'hE0008058;
-parameter val_can0__RXFIFO_DATA1 = 32'h00000000;
-parameter mask_can0__RXFIFO_DATA1 = 32'h00000000;
-
-parameter can0__RXFIFO_DATA2 = 32'hE000805C;
-parameter val_can0__RXFIFO_DATA2 = 32'h00000000;
-parameter mask_can0__RXFIFO_DATA2 = 32'h00000000;
-
-parameter can0__AFR = 32'hE0008060;
-parameter val_can0__AFR = 32'h00000000;
-parameter mask_can0__AFR = 32'hFFFFFFFF;
-
-parameter can0__AFMR1 = 32'hE0008064;
-parameter val_can0__AFMR1 = 32'h00000000;
-parameter mask_can0__AFMR1 = 32'h00000000;
-
-parameter can0__AFIR1 = 32'hE0008068;
-parameter val_can0__AFIR1 = 32'h00000000;
-parameter mask_can0__AFIR1 = 32'h00000000;
-
-parameter can0__AFMR2 = 32'hE000806C;
-parameter val_can0__AFMR2 = 32'h00000000;
-parameter mask_can0__AFMR2 = 32'h00000000;
-
-parameter can0__AFIR2 = 32'hE0008070;
-parameter val_can0__AFIR2 = 32'h00000000;
-parameter mask_can0__AFIR2 = 32'h00000000;
-
-parameter can0__AFMR3 = 32'hE0008074;
-parameter val_can0__AFMR3 = 32'h00000000;
-parameter mask_can0__AFMR3 = 32'h00000000;
-
-parameter can0__AFIR3 = 32'hE0008078;
-parameter val_can0__AFIR3 = 32'h00000000;
-parameter mask_can0__AFIR3 = 32'h00000000;
-
-parameter can0__AFMR4 = 32'hE000807C;
-parameter val_can0__AFMR4 = 32'h00000000;
-parameter mask_can0__AFMR4 = 32'h00000000;
-
-parameter can0__AFIR4 = 32'hE0008080;
-parameter val_can0__AFIR4 = 32'h00000000;
-parameter mask_can0__AFIR4 = 32'h00000000;
-
-
-// ************************************************************
-// Module can1 can
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter can1__SRR = 32'hE0009000;
-parameter val_can1__SRR = 32'h00000000;
-parameter mask_can1__SRR = 32'hFFFFFFFF;
-
-parameter can1__MSR = 32'hE0009004;
-parameter val_can1__MSR = 32'h00000000;
-parameter mask_can1__MSR = 32'hFFFFFFFF;
-
-parameter can1__BRPR = 32'hE0009008;
-parameter val_can1__BRPR = 32'h00000000;
-parameter mask_can1__BRPR = 32'hFFFFFFFF;
-
-parameter can1__BTR = 32'hE000900C;
-parameter val_can1__BTR = 32'h00000000;
-parameter mask_can1__BTR = 32'hFFFFFFFF;
-
-parameter can1__ECR = 32'hE0009010;
-parameter val_can1__ECR = 32'h00000000;
-parameter mask_can1__ECR = 32'hFFFFFFFF;
-
-parameter can1__ESR = 32'hE0009014;
-parameter val_can1__ESR = 32'h00000000;
-parameter mask_can1__ESR = 32'hFFFFFFFF;
-
-parameter can1__SR = 32'hE0009018;
-parameter val_can1__SR = 32'h00000001;
-parameter mask_can1__SR = 32'hFFFFFFFF;
-
-parameter can1__ISR = 32'hE000901C;
-parameter val_can1__ISR = 32'h00006000;
-parameter mask_can1__ISR = 32'hFFFFFFFF;
-
-parameter can1__IER = 32'hE0009020;
-parameter val_can1__IER = 32'h00000000;
-parameter mask_can1__IER = 32'hFFFFFFFF;
-
-parameter can1__ICR = 32'hE0009024;
-parameter val_can1__ICR = 32'h00000000;
-parameter mask_can1__ICR = 32'hFFFFFFFF;
-
-parameter can1__TCR = 32'hE0009028;
-parameter val_can1__TCR = 32'h00000000;
-parameter mask_can1__TCR = 32'hFFFFFFFF;
-
-parameter can1__WIR = 32'hE000902C;
-parameter val_can1__WIR = 32'h00003F3F;
-parameter mask_can1__WIR = 32'hFFFFFFFF;
-
-parameter can1__TXFIFO_ID = 32'hE0009030;
-parameter val_can1__TXFIFO_ID = 32'h00000000;
-parameter mask_can1__TXFIFO_ID = 32'hFFFFFFFF;
-
-parameter can1__TXFIFO_DLC = 32'hE0009034;
-parameter val_can1__TXFIFO_DLC = 32'h00000000;
-parameter mask_can1__TXFIFO_DLC = 32'hFFFFFFFF;
-
-parameter can1__TXFIFO_DATA1 = 32'hE0009038;
-parameter val_can1__TXFIFO_DATA1 = 32'h00000000;
-parameter mask_can1__TXFIFO_DATA1 = 32'hFFFFFFFF;
-
-parameter can1__TXFIFO_DATA2 = 32'hE000903C;
-parameter val_can1__TXFIFO_DATA2 = 32'h00000000;
-parameter mask_can1__TXFIFO_DATA2 = 32'hFFFFFFFF;
-
-parameter can1__TXHPB_ID = 32'hE0009040;
-parameter val_can1__TXHPB_ID = 32'h00000000;
-parameter mask_can1__TXHPB_ID = 32'hFFFFFFFF;
-
-parameter can1__TXHPB_DLC = 32'hE0009044;
-parameter val_can1__TXHPB_DLC = 32'h00000000;
-parameter mask_can1__TXHPB_DLC = 32'hFFFFFFFF;
-
-parameter can1__TXHPB_DATA1 = 32'hE0009048;
-parameter val_can1__TXHPB_DATA1 = 32'h00000000;
-parameter mask_can1__TXHPB_DATA1 = 32'hFFFFFFFF;
-
-parameter can1__TXHPB_DATA2 = 32'hE000904C;
-parameter val_can1__TXHPB_DATA2 = 32'h00000000;
-parameter mask_can1__TXHPB_DATA2 = 32'hFFFFFFFF;
-
-parameter can1__RXFIFO_ID = 32'hE0009050;
-parameter val_can1__RXFIFO_ID = 32'h00000000;
-parameter mask_can1__RXFIFO_ID = 32'h00000000;
-
-parameter can1__RXFIFO_DLC = 32'hE0009054;
-parameter val_can1__RXFIFO_DLC = 32'h00000000;
-parameter mask_can1__RXFIFO_DLC = 32'h00000000;
-
-parameter can1__RXFIFO_DATA1 = 32'hE0009058;
-parameter val_can1__RXFIFO_DATA1 = 32'h00000000;
-parameter mask_can1__RXFIFO_DATA1 = 32'h00000000;
-
-parameter can1__RXFIFO_DATA2 = 32'hE000905C;
-parameter val_can1__RXFIFO_DATA2 = 32'h00000000;
-parameter mask_can1__RXFIFO_DATA2 = 32'h00000000;
-
-parameter can1__AFR = 32'hE0009060;
-parameter val_can1__AFR = 32'h00000000;
-parameter mask_can1__AFR = 32'hFFFFFFFF;
-
-parameter can1__AFMR1 = 32'hE0009064;
-parameter val_can1__AFMR1 = 32'h00000000;
-parameter mask_can1__AFMR1 = 32'h00000000;
-
-parameter can1__AFIR1 = 32'hE0009068;
-parameter val_can1__AFIR1 = 32'h00000000;
-parameter mask_can1__AFIR1 = 32'h00000000;
-
-parameter can1__AFMR2 = 32'hE000906C;
-parameter val_can1__AFMR2 = 32'h00000000;
-parameter mask_can1__AFMR2 = 32'h00000000;
-
-parameter can1__AFIR2 = 32'hE0009070;
-parameter val_can1__AFIR2 = 32'h00000000;
-parameter mask_can1__AFIR2 = 32'h00000000;
-
-parameter can1__AFMR3 = 32'hE0009074;
-parameter val_can1__AFMR3 = 32'h00000000;
-parameter mask_can1__AFMR3 = 32'h00000000;
-
-parameter can1__AFIR3 = 32'hE0009078;
-parameter val_can1__AFIR3 = 32'h00000000;
-parameter mask_can1__AFIR3 = 32'h00000000;
-
-parameter can1__AFMR4 = 32'hE000907C;
-parameter val_can1__AFMR4 = 32'h00000000;
-parameter mask_can1__AFMR4 = 32'h00000000;
-
-parameter can1__AFIR4 = 32'hE0009080;
-parameter val_can1__AFIR4 = 32'h00000000;
-parameter mask_can1__AFIR4 = 32'h00000000;
-
-
-// ************************************************************
-// Module ddrc ddrc
-// doc version: 1.25
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter ddrc__ddrc_ctrl = 32'hF8006000;
-parameter val_ddrc__ddrc_ctrl = 32'h00000200;
-parameter mask_ddrc__ddrc_ctrl = 32'hFFFFFFFF;
-
-parameter ddrc__Two_rank_cfg = 32'hF8006004;
-parameter val_ddrc__Two_rank_cfg = 32'h000C1076;
-parameter mask_ddrc__Two_rank_cfg = 32'h1FFFFFFF;
-
-parameter ddrc__HPR_reg = 32'hF8006008;
-parameter val_ddrc__HPR_reg = 32'h03C0780F;
-parameter mask_ddrc__HPR_reg = 32'h03FFFFFF;
-
-parameter ddrc__LPR_reg = 32'hF800600C;
-parameter val_ddrc__LPR_reg = 32'h03C0780F;
-parameter mask_ddrc__LPR_reg = 32'h03FFFFFF;
-
-parameter ddrc__WR_reg = 32'hF8006010;
-parameter val_ddrc__WR_reg = 32'h0007F80F;
-parameter mask_ddrc__WR_reg = 32'h03FFFFFF;
-
-parameter ddrc__DRAM_param_reg0 = 32'hF8006014;
-parameter val_ddrc__DRAM_param_reg0 = 32'h00041016;
-parameter mask_ddrc__DRAM_param_reg0 = 32'h001FFFFF;
-
-parameter ddrc__DRAM_param_reg1 = 32'hF8006018;
-parameter val_ddrc__DRAM_param_reg1 = 32'h351B48D9;
-parameter mask_ddrc__DRAM_param_reg1 = 32'hF7FFFFFF;
-
-parameter ddrc__DRAM_param_reg2 = 32'hF800601C;
-parameter val_ddrc__DRAM_param_reg2 = 32'h83015904;
-parameter mask_ddrc__DRAM_param_reg2 = 32'hFFFFFFFF;
-
-parameter ddrc__DRAM_param_reg3 = 32'hF8006020;
-parameter val_ddrc__DRAM_param_reg3 = 32'h250882D0;
-parameter mask_ddrc__DRAM_param_reg3 = 32'hFFFFFFFF;
-
-parameter ddrc__DRAM_param_reg4 = 32'hF8006024;
-parameter val_ddrc__DRAM_param_reg4 = 32'h0000003C;
-parameter mask_ddrc__DRAM_param_reg4 = 32'h0FFFFFFF;
-
-parameter ddrc__DRAM_init_param = 32'hF8006028;
-parameter val_ddrc__DRAM_init_param = 32'h00002007;
-parameter mask_ddrc__DRAM_init_param = 32'h00003FFF;
-
-parameter ddrc__DRAM_EMR_reg = 32'hF800602C;
-parameter val_ddrc__DRAM_EMR_reg = 32'h00000008;
-parameter mask_ddrc__DRAM_EMR_reg = 32'hFFFFFFFF;
-
-parameter ddrc__DRAM_EMR_MR_reg = 32'hF8006030;
-parameter val_ddrc__DRAM_EMR_MR_reg = 32'h00000940;
-parameter mask_ddrc__DRAM_EMR_MR_reg = 32'hFFFFFFFF;
-
-parameter ddrc__DRAM_burst8_rdwr = 32'hF8006034;
-parameter val_ddrc__DRAM_burst8_rdwr = 32'h00020034;
-parameter mask_ddrc__DRAM_burst8_rdwr = 32'h1FFFFFFF;
-
-parameter ddrc__DRAM_disable_DQ = 32'hF8006038;
-parameter val_ddrc__DRAM_disable_DQ = 32'h00000000;
-parameter mask_ddrc__DRAM_disable_DQ = 32'h00001FFF;
-
-parameter ddrc__DRAM_addr_map_bank = 32'hF800603C;
-parameter val_ddrc__DRAM_addr_map_bank = 32'h00000F77;
-parameter mask_ddrc__DRAM_addr_map_bank = 32'h000FFFFF;
-
-parameter ddrc__DRAM_addr_map_col = 32'hF8006040;
-parameter val_ddrc__DRAM_addr_map_col = 32'hFFF00000;
-parameter mask_ddrc__DRAM_addr_map_col = 32'hFFFFFFFF;
-
-parameter ddrc__DRAM_addr_map_row = 32'hF8006044;
-parameter val_ddrc__DRAM_addr_map_row = 32'h0FF55555;
-parameter mask_ddrc__DRAM_addr_map_row = 32'h0FFFFFFF;
-
-parameter ddrc__DRAM_ODT_reg = 32'hF8006048;
-parameter val_ddrc__DRAM_ODT_reg = 32'h00000249;
-parameter mask_ddrc__DRAM_ODT_reg = 32'h3FFFFFFF;
-
-parameter ddrc__phy_dbg_reg = 32'hF800604C;
-parameter val_ddrc__phy_dbg_reg = 32'h00000000;
-parameter mask_ddrc__phy_dbg_reg = 32'h000FFFFF;
-
-parameter ddrc__phy_cmd_timeout_rddata_cpt = 32'hF8006050;
-parameter val_ddrc__phy_cmd_timeout_rddata_cpt = 32'h00010200;
-parameter mask_ddrc__phy_cmd_timeout_rddata_cpt = 32'hFFFFFFFF;
-
-parameter ddrc__mode_sts_reg = 32'hF8006054;
-parameter val_ddrc__mode_sts_reg = 32'h00000000;
-parameter mask_ddrc__mode_sts_reg = 32'h001FFFFF;
-
-parameter ddrc__DLL_calib = 32'hF8006058;
-parameter val_ddrc__DLL_calib = 32'h00000101;
-parameter mask_ddrc__DLL_calib = 32'h0001FFFF;
-
-parameter ddrc__ODT_delay_hold = 32'hF800605C;
-parameter val_ddrc__ODT_delay_hold = 32'h00000023;
-parameter mask_ddrc__ODT_delay_hold = 32'h0000FFFF;
-
-parameter ddrc__ctrl_reg1 = 32'hF8006060;
-parameter val_ddrc__ctrl_reg1 = 32'h0000003E;
-parameter mask_ddrc__ctrl_reg1 = 32'h00001FFF;
-
-parameter ddrc__ctrl_reg2 = 32'hF8006064;
-parameter val_ddrc__ctrl_reg2 = 32'h00020000;
-parameter mask_ddrc__ctrl_reg2 = 32'h0003FFFF;
-
-parameter ddrc__ctrl_reg3 = 32'hF8006068;
-parameter val_ddrc__ctrl_reg3 = 32'h00284027;
-parameter mask_ddrc__ctrl_reg3 = 32'h03FFFFFF;
-
-parameter ddrc__ctrl_reg4 = 32'hF800606C;
-parameter val_ddrc__ctrl_reg4 = 32'h00001610;
-parameter mask_ddrc__ctrl_reg4 = 32'h0000FFFF;
-
-parameter ddrc__ctrl_reg5 = 32'hF8006078;
-parameter val_ddrc__ctrl_reg5 = 32'h00455111;
-parameter mask_ddrc__ctrl_reg5 = 32'hFFFFFFFF;
-
-parameter ddrc__ctrl_reg6 = 32'hF800607C;
-parameter val_ddrc__ctrl_reg6 = 32'h00032222;
-parameter mask_ddrc__ctrl_reg6 = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_REFRESH_TIMER01 = 32'hF80060A0;
-parameter val_ddrc__CHE_REFRESH_TIMER01 = 32'h00008000;
-parameter mask_ddrc__CHE_REFRESH_TIMER01 = 32'h00FFFFFF;
-
-parameter ddrc__CHE_T_ZQ = 32'hF80060A4;
-parameter val_ddrc__CHE_T_ZQ = 32'h10300802;
-parameter mask_ddrc__CHE_T_ZQ = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_T_ZQ_Short_Interval_Reg = 32'hF80060A8;
-parameter val_ddrc__CHE_T_ZQ_Short_Interval_Reg = 32'h0020003A;
-parameter mask_ddrc__CHE_T_ZQ_Short_Interval_Reg = 32'h0FFFFFFF;
-
-parameter ddrc__deep_pwrdwn_reg = 32'hF80060AC;
-parameter val_ddrc__deep_pwrdwn_reg = 32'h00000000;
-parameter mask_ddrc__deep_pwrdwn_reg = 32'h000001FF;
-
-parameter ddrc__reg_2c = 32'hF80060B0;
-parameter val_ddrc__reg_2c = 32'h00000000;
-parameter mask_ddrc__reg_2c = 32'h1FFFFFFF;
-
-parameter ddrc__reg_2d = 32'hF80060B4;
-parameter val_ddrc__reg_2d = 32'h00000200;
-parameter mask_ddrc__reg_2d = 32'h000007FF;
-
-parameter ddrc__dfi_timing = 32'hF80060B8;
-parameter val_ddrc__dfi_timing = 32'h00200067;
-parameter mask_ddrc__dfi_timing = 32'h01FFFFFF;
-
-parameter ddrc__refresh_timer_2 = 32'hF80060BC;
-parameter val_ddrc__refresh_timer_2 = 32'h00000000;
-parameter mask_ddrc__refresh_timer_2 = 32'h00FFFFFF;
-
-parameter ddrc__nc_timing = 32'hF80060C0;
-parameter val_ddrc__nc_timing = 32'h00000000;
-parameter mask_ddrc__nc_timing = 32'h003FFFFF;
-
-parameter ddrc__CHE_ECC_CONTROL_REG_OFFSET = 32'hF80060C4;
-parameter val_ddrc__CHE_ECC_CONTROL_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_ECC_CONTROL_REG_OFFSET = 32'h00000003;
-
-parameter ddrc__CHE_CORR_ECC_LOG_REG_OFFSET = 32'hF80060C8;
-parameter val_ddrc__CHE_CORR_ECC_LOG_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_CORR_ECC_LOG_REG_OFFSET = 32'h000000FF;
-
-parameter ddrc__CHE_CORR_ECC_ADDR_REG_OFFSET = 32'hF80060CC;
-parameter val_ddrc__CHE_CORR_ECC_ADDR_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_CORR_ECC_ADDR_REG_OFFSET = 32'h7FFFFFFF;
-
-parameter ddrc__CHE_CORR_ECC_DATA_31_0_REG_OFFSET = 32'hF80060D0;
-parameter val_ddrc__CHE_CORR_ECC_DATA_31_0_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_CORR_ECC_DATA_31_0_REG_OFFSET = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_CORR_ECC_DATA_63_32_REG_OFFSET = 32'hF80060D4;
-parameter val_ddrc__CHE_CORR_ECC_DATA_63_32_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_CORR_ECC_DATA_63_32_REG_OFFSET = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_CORR_ECC_DATA_71_64_REG_OFFSET = 32'hF80060D8;
-parameter val_ddrc__CHE_CORR_ECC_DATA_71_64_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_CORR_ECC_DATA_71_64_REG_OFFSET = 32'h000000FF;
-
-parameter ddrc__CHE_UNCORR_ECC_LOG_REG_OFFSET = 32'hF80060DC;
-parameter val_ddrc__CHE_UNCORR_ECC_LOG_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_UNCORR_ECC_LOG_REG_OFFSET = 32'h00000001;
-
-parameter ddrc__CHE_UNCORR_ECC_ADDR_REG_OFFSET = 32'hF80060E0;
-parameter val_ddrc__CHE_UNCORR_ECC_ADDR_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_UNCORR_ECC_ADDR_REG_OFFSET = 32'h7FFFFFFF;
-
-parameter ddrc__CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET = 32'hF80060E4;
-parameter val_ddrc__CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET = 32'hF80060E8;
-parameter val_ddrc__CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_UNCORR_ECC_DATA_63_32_REG_OFFSET = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET = 32'hF80060EC;
-parameter val_ddrc__CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_UNCORR_ECC_DATA_71_64_REG_OFFSET = 32'h000000FF;
-
-parameter ddrc__CHE_ECC_STATS_REG_OFFSET = 32'hF80060F0;
-parameter val_ddrc__CHE_ECC_STATS_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_ECC_STATS_REG_OFFSET = 32'h0000FFFF;
-
-parameter ddrc__ECC_scrub = 32'hF80060F4;
-parameter val_ddrc__ECC_scrub = 32'h00000008;
-parameter mask_ddrc__ECC_scrub = 32'h0000000F;
-
-parameter ddrc__CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET = 32'hF80060F8;
-parameter val_ddrc__CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_ECC_CORR_BIT_MASK_31_0_REG_OFFSET = 32'hFFFFFFFF;
-
-parameter ddrc__CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET = 32'hF80060FC;
-parameter val_ddrc__CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET = 32'h00000000;
-parameter mask_ddrc__CHE_ECC_CORR_BIT_MASK_63_32_REG_OFFSET = 32'hFFFFFFFF;
-
-parameter ddrc__phy_rcvr_enable = 32'hF8006114;
-parameter val_ddrc__phy_rcvr_enable = 32'h00000000;
-parameter mask_ddrc__phy_rcvr_enable = 32'h000000FF;
-
-parameter ddrc__PHY_Config0 = 32'hF8006118;
-parameter val_ddrc__PHY_Config0 = 32'h40000001;
-parameter mask_ddrc__PHY_Config0 = 32'h7FFFFFFF;
-
-parameter ddrc__PHY_Config1 = 32'hF800611C;
-parameter val_ddrc__PHY_Config1 = 32'h40000001;
-parameter mask_ddrc__PHY_Config1 = 32'h7FFFFFFF;
-
-parameter ddrc__PHY_Config2 = 32'hF8006120;
-parameter val_ddrc__PHY_Config2 = 32'h40000001;
-parameter mask_ddrc__PHY_Config2 = 32'h7FFFFFFF;
-
-parameter ddrc__PHY_Config3 = 32'hF8006124;
-parameter val_ddrc__PHY_Config3 = 32'h40000001;
-parameter mask_ddrc__PHY_Config3 = 32'h7FFFFFFF;
-
-parameter ddrc__phy_init_ratio0 = 32'hF800612C;
-parameter val_ddrc__phy_init_ratio0 = 32'h00000000;
-parameter mask_ddrc__phy_init_ratio0 = 32'h000FFFFF;
-
-parameter ddrc__phy_init_ratio1 = 32'hF8006130;
-parameter val_ddrc__phy_init_ratio1 = 32'h00000000;
-parameter mask_ddrc__phy_init_ratio1 = 32'h000FFFFF;
-
-parameter ddrc__phy_init_ratio2 = 32'hF8006134;
-parameter val_ddrc__phy_init_ratio2 = 32'h00000000;
-parameter mask_ddrc__phy_init_ratio2 = 32'h000FFFFF;
-
-parameter ddrc__phy_init_ratio3 = 32'hF8006138;
-parameter val_ddrc__phy_init_ratio3 = 32'h00000000;
-parameter mask_ddrc__phy_init_ratio3 = 32'h000FFFFF;
-
-parameter ddrc__phy_rd_dqs_cfg0 = 32'hF8006140;
-parameter val_ddrc__phy_rd_dqs_cfg0 = 32'h00000040;
-parameter mask_ddrc__phy_rd_dqs_cfg0 = 32'h000FFFFF;
-
-parameter ddrc__phy_rd_dqs_cfg1 = 32'hF8006144;
-parameter val_ddrc__phy_rd_dqs_cfg1 = 32'h00000040;
-parameter mask_ddrc__phy_rd_dqs_cfg1 = 32'h000FFFFF;
-
-parameter ddrc__phy_rd_dqs_cfg2 = 32'hF8006148;
-parameter val_ddrc__phy_rd_dqs_cfg2 = 32'h00000040;
-parameter mask_ddrc__phy_rd_dqs_cfg2 = 32'h000FFFFF;
-
-parameter ddrc__phy_rd_dqs_cfg3 = 32'hF800614C;
-parameter val_ddrc__phy_rd_dqs_cfg3 = 32'h00000040;
-parameter mask_ddrc__phy_rd_dqs_cfg3 = 32'h000FFFFF;
-
-parameter ddrc__phy_wr_dqs_cfg0 = 32'hF8006154;
-parameter val_ddrc__phy_wr_dqs_cfg0 = 32'h00000000;
-parameter mask_ddrc__phy_wr_dqs_cfg0 = 32'h000FFFFF;
-
-parameter ddrc__phy_wr_dqs_cfg1 = 32'hF8006158;
-parameter val_ddrc__phy_wr_dqs_cfg1 = 32'h00000000;
-parameter mask_ddrc__phy_wr_dqs_cfg1 = 32'h000FFFFF;
-
-parameter ddrc__phy_wr_dqs_cfg2 = 32'hF800615C;
-parameter val_ddrc__phy_wr_dqs_cfg2 = 32'h00000000;
-parameter mask_ddrc__phy_wr_dqs_cfg2 = 32'h000FFFFF;
-
-parameter ddrc__phy_wr_dqs_cfg3 = 32'hF8006160;
-parameter val_ddrc__phy_wr_dqs_cfg3 = 32'h00000000;
-parameter mask_ddrc__phy_wr_dqs_cfg3 = 32'h000FFFFF;
-
-parameter ddrc__phy_we_cfg0 = 32'hF8006168;
-parameter val_ddrc__phy_we_cfg0 = 32'h00000040;
-parameter mask_ddrc__phy_we_cfg0 = 32'h001FFFFF;
-
-parameter ddrc__phy_we_cfg1 = 32'hF800616C;
-parameter val_ddrc__phy_we_cfg1 = 32'h00000040;
-parameter mask_ddrc__phy_we_cfg1 = 32'h001FFFFF;
-
-parameter ddrc__phy_we_cfg2 = 32'hF8006170;
-parameter val_ddrc__phy_we_cfg2 = 32'h00000040;
-parameter mask_ddrc__phy_we_cfg2 = 32'h001FFFFF;
-
-parameter ddrc__phy_we_cfg3 = 32'hF8006174;
-parameter val_ddrc__phy_we_cfg3 = 32'h00000040;
-parameter mask_ddrc__phy_we_cfg3 = 32'h001FFFFF;
-
-parameter ddrc__wr_data_slv0 = 32'hF800617C;
-parameter val_ddrc__wr_data_slv0 = 32'h00000080;
-parameter mask_ddrc__wr_data_slv0 = 32'h000FFFFF;
-
-parameter ddrc__wr_data_slv1 = 32'hF8006180;
-parameter val_ddrc__wr_data_slv1 = 32'h00000080;
-parameter mask_ddrc__wr_data_slv1 = 32'h000FFFFF;
-
-parameter ddrc__wr_data_slv2 = 32'hF8006184;
-parameter val_ddrc__wr_data_slv2 = 32'h00000080;
-parameter mask_ddrc__wr_data_slv2 = 32'h000FFFFF;
-
-parameter ddrc__wr_data_slv3 = 32'hF8006188;
-parameter val_ddrc__wr_data_slv3 = 32'h00000080;
-parameter mask_ddrc__wr_data_slv3 = 32'h000FFFFF;
-
-parameter ddrc__reg_64 = 32'hF8006190;
-parameter val_ddrc__reg_64 = 32'h10020000;
-parameter mask_ddrc__reg_64 = 32'hFFFFFFFF;
-
-parameter ddrc__reg_65 = 32'hF8006194;
-parameter val_ddrc__reg_65 = 32'h00000000;
-parameter mask_ddrc__reg_65 = 32'h000FFFFF;
-
-parameter ddrc__reg69_6a0 = 32'hF80061A4;
-parameter val_ddrc__reg69_6a0 = 32'h000F0000;
-parameter mask_ddrc__reg69_6a0 = 32'h1FFFFFFF;
-
-parameter ddrc__reg69_6a1 = 32'hF80061A8;
-parameter val_ddrc__reg69_6a1 = 32'h000F0000;
-parameter mask_ddrc__reg69_6a1 = 32'h1FFFFFFF;
-
-parameter ddrc__reg6c_6d2 = 32'hF80061B0;
-parameter val_ddrc__reg6c_6d2 = 32'h000F0000;
-parameter mask_ddrc__reg6c_6d2 = 32'h1FFFFFFF;
-
-parameter ddrc__reg6c_6d3 = 32'hF80061B4;
-parameter val_ddrc__reg6c_6d3 = 32'h000F0000;
-parameter mask_ddrc__reg6c_6d3 = 32'h1FFFFFFF;
-
-parameter ddrc__reg6e_710 = 32'hF80061B8;
-parameter val_ddrc__reg6e_710 = 32'h00000000;
-parameter mask_ddrc__reg6e_710 = 32'h00000000;
-
-parameter ddrc__reg6e_711 = 32'hF80061BC;
-parameter val_ddrc__reg6e_711 = 32'h00000000;
-parameter mask_ddrc__reg6e_711 = 32'h00000000;
-
-parameter ddrc__reg6e_712 = 32'hF80061C0;
-parameter val_ddrc__reg6e_712 = 32'h00000000;
-parameter mask_ddrc__reg6e_712 = 32'h00000000;
-
-parameter ddrc__reg6e_713 = 32'hF80061C4;
-parameter val_ddrc__reg6e_713 = 32'h00000000;
-parameter mask_ddrc__reg6e_713 = 32'h00000000;
-
-parameter ddrc__phy_dll_sts0 = 32'hF80061CC;
-parameter val_ddrc__phy_dll_sts0 = 32'h00000000;
-parameter mask_ddrc__phy_dll_sts0 = 32'h07FFFFFF;
-
-parameter ddrc__phy_dll_sts1 = 32'hF80061D0;
-parameter val_ddrc__phy_dll_sts1 = 32'h00000000;
-parameter mask_ddrc__phy_dll_sts1 = 32'h07FFFFFF;
-
-parameter ddrc__phy_dll_sts2 = 32'hF80061D4;
-parameter val_ddrc__phy_dll_sts2 = 32'h00000000;
-parameter mask_ddrc__phy_dll_sts2 = 32'h07FFFFFF;
-
-parameter ddrc__phy_dll_sts3 = 32'hF80061D8;
-parameter val_ddrc__phy_dll_sts3 = 32'h00000000;
-parameter mask_ddrc__phy_dll_sts3 = 32'h07FFFFFF;
-
-parameter ddrc__dll_lock_sts = 32'hF80061E0;
-parameter val_ddrc__dll_lock_sts = 32'h00000000;
-parameter mask_ddrc__dll_lock_sts = 32'h00FFFFFF;
-
-parameter ddrc__phy_ctrl_sts = 32'hF80061E4;
-parameter val_ddrc__phy_ctrl_sts = 32'h00000000;
-parameter mask_ddrc__phy_ctrl_sts = 32'h3FF80000;
-
-parameter ddrc__phy_ctrl_sts_reg2 = 32'hF80061E8;
-parameter val_ddrc__phy_ctrl_sts_reg2 = 32'h00000000;
-parameter mask_ddrc__phy_ctrl_sts_reg2 = 32'h07FFFFFF;
-
-parameter ddrc__axi_id = 32'hF8006200;
-parameter val_ddrc__axi_id = 32'h00153042;
-parameter mask_ddrc__axi_id = 32'h03FFFFFF;
-
-parameter ddrc__page_mask = 32'hF8006204;
-parameter val_ddrc__page_mask = 32'h00000000;
-parameter mask_ddrc__page_mask = 32'hFFFFFFFF;
-
-parameter ddrc__axi_priority_wr_port0 = 32'hF8006208;
-parameter val_ddrc__axi_priority_wr_port0 = 32'h000803FF;
-parameter mask_ddrc__axi_priority_wr_port0 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_wr_port1 = 32'hF800620C;
-parameter val_ddrc__axi_priority_wr_port1 = 32'h000803FF;
-parameter mask_ddrc__axi_priority_wr_port1 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_wr_port2 = 32'hF8006210;
-parameter val_ddrc__axi_priority_wr_port2 = 32'h000803FF;
-parameter mask_ddrc__axi_priority_wr_port2 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_wr_port3 = 32'hF8006214;
-parameter val_ddrc__axi_priority_wr_port3 = 32'h000803FF;
-parameter mask_ddrc__axi_priority_wr_port3 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_rd_port0 = 32'hF8006218;
-parameter val_ddrc__axi_priority_rd_port0 = 32'h000003FF;
-parameter mask_ddrc__axi_priority_rd_port0 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_rd_port1 = 32'hF800621C;
-parameter val_ddrc__axi_priority_rd_port1 = 32'h000003FF;
-parameter mask_ddrc__axi_priority_rd_port1 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_rd_port2 = 32'hF8006220;
-parameter val_ddrc__axi_priority_rd_port2 = 32'h000003FF;
-parameter mask_ddrc__axi_priority_rd_port2 = 32'h000FFFFF;
-
-parameter ddrc__axi_priority_rd_port3 = 32'hF8006224;
-parameter val_ddrc__axi_priority_rd_port3 = 32'h000003FF;
-parameter mask_ddrc__axi_priority_rd_port3 = 32'h000FFFFF;
-
-parameter ddrc__AHB_priority_cfg0 = 32'hF8006248;
-parameter val_ddrc__AHB_priority_cfg0 = 32'h000003FF;
-parameter mask_ddrc__AHB_priority_cfg0 = 32'h000FFFFF;
-
-parameter ddrc__AHB_priority_cfg1 = 32'hF800624C;
-parameter val_ddrc__AHB_priority_cfg1 = 32'h000003FF;
-parameter mask_ddrc__AHB_priority_cfg1 = 32'h000FFFFF;
-
-parameter ddrc__AHB_priority_cfg2 = 32'hF8006250;
-parameter val_ddrc__AHB_priority_cfg2 = 32'h000003FF;
-parameter mask_ddrc__AHB_priority_cfg2 = 32'h000FFFFF;
-
-parameter ddrc__AHB_priority_cfg3 = 32'hF8006254;
-parameter val_ddrc__AHB_priority_cfg3 = 32'h000003FF;
-parameter mask_ddrc__AHB_priority_cfg3 = 32'h000FFFFF;
-
-parameter ddrc__perf_mon0 = 32'hF8006260;
-parameter val_ddrc__perf_mon0 = 32'h00000000;
-parameter mask_ddrc__perf_mon0 = 32'h7FFFFFFF;
-
-parameter ddrc__perf_mon1 = 32'hF8006264;
-parameter val_ddrc__perf_mon1 = 32'h00000000;
-parameter mask_ddrc__perf_mon1 = 32'h7FFFFFFF;
-
-parameter ddrc__perf_mon2 = 32'hF8006268;
-parameter val_ddrc__perf_mon2 = 32'h00000000;
-parameter mask_ddrc__perf_mon2 = 32'h7FFFFFFF;
-
-parameter ddrc__perf_mon3 = 32'hF800626C;
-parameter val_ddrc__perf_mon3 = 32'h00000000;
-parameter mask_ddrc__perf_mon3 = 32'h7FFFFFFF;
-
-parameter ddrc__perf_mon20 = 32'hF8006270;
-parameter val_ddrc__perf_mon20 = 32'h00000000;
-parameter mask_ddrc__perf_mon20 = 32'hFFFFFFFF;
-
-parameter ddrc__perf_mon21 = 32'hF8006274;
-parameter val_ddrc__perf_mon21 = 32'h00000000;
-parameter mask_ddrc__perf_mon21 = 32'hFFFFFFFF;
-
-parameter ddrc__perf_mon22 = 32'hF8006278;
-parameter val_ddrc__perf_mon22 = 32'h00000000;
-parameter mask_ddrc__perf_mon22 = 32'hFFFFFFFF;
-
-parameter ddrc__perf_mon23 = 32'hF800627C;
-parameter val_ddrc__perf_mon23 = 32'h00000000;
-parameter mask_ddrc__perf_mon23 = 32'hFFFFFFFF;
-
-parameter ddrc__perf_mon30 = 32'hF8006280;
-parameter val_ddrc__perf_mon30 = 32'h00000000;
-parameter mask_ddrc__perf_mon30 = 32'h0000FFFF;
-
-parameter ddrc__perf_mon31 = 32'hF8006284;
-parameter val_ddrc__perf_mon31 = 32'h00000000;
-parameter mask_ddrc__perf_mon31 = 32'h0000FFFF;
-
-parameter ddrc__perf_mon32 = 32'hF8006288;
-parameter val_ddrc__perf_mon32 = 32'h00000000;
-parameter mask_ddrc__perf_mon32 = 32'h0000FFFF;
-
-parameter ddrc__perf_mon33 = 32'hF800628C;
-parameter val_ddrc__perf_mon33 = 32'h00000000;
-parameter mask_ddrc__perf_mon33 = 32'h0000FFFF;
-
-parameter ddrc__trusted_mem_cfg = 32'hF8006290;
-parameter val_ddrc__trusted_mem_cfg = 32'h00000000;
-parameter mask_ddrc__trusted_mem_cfg = 32'h0000FFFF;
-
-parameter ddrc__excl_access_cfg0 = 32'hF8006294;
-parameter val_ddrc__excl_access_cfg0 = 32'h00000000;
-parameter mask_ddrc__excl_access_cfg0 = 32'h0003FFFF;
-
-parameter ddrc__excl_access_cfg1 = 32'hF8006298;
-parameter val_ddrc__excl_access_cfg1 = 32'h00000000;
-parameter mask_ddrc__excl_access_cfg1 = 32'h0003FFFF;
-
-parameter ddrc__excl_access_cfg2 = 32'hF800629C;
-parameter val_ddrc__excl_access_cfg2 = 32'h00000000;
-parameter mask_ddrc__excl_access_cfg2 = 32'h0003FFFF;
-
-parameter ddrc__excl_access_cfg3 = 32'hF80062A0;
-parameter val_ddrc__excl_access_cfg3 = 32'h00000000;
-parameter mask_ddrc__excl_access_cfg3 = 32'h0003FFFF;
-
-parameter ddrc__mode_reg_read = 32'hF80062A4;
-parameter val_ddrc__mode_reg_read = 32'h00000000;
-parameter mask_ddrc__mode_reg_read = 32'hFFFFFFFF;
-
-parameter ddrc__lpddr_ctrl0 = 32'hF80062A8;
-parameter val_ddrc__lpddr_ctrl0 = 32'h00000000;
-parameter mask_ddrc__lpddr_ctrl0 = 32'h00000FFF;
-
-parameter ddrc__lpddr_ctrl1 = 32'hF80062AC;
-parameter val_ddrc__lpddr_ctrl1 = 32'h00000000;
-parameter mask_ddrc__lpddr_ctrl1 = 32'hFFFFFFFF;
-
-parameter ddrc__lpddr_ctrl2 = 32'hF80062B0;
-parameter val_ddrc__lpddr_ctrl2 = 32'h003C0015;
-parameter mask_ddrc__lpddr_ctrl2 = 32'h003FFFFF;
-
-parameter ddrc__lpddr_ctrl3 = 32'hF80062B4;
-parameter val_ddrc__lpddr_ctrl3 = 32'h00000601;
-parameter mask_ddrc__lpddr_ctrl3 = 32'h0003FFFF;
-
-parameter ddrc__phy_wr_lvl_fsm = 32'hF80062B8;
-parameter val_ddrc__phy_wr_lvl_fsm = 32'h00004444;
-parameter mask_ddrc__phy_wr_lvl_fsm = 32'h00007FFF;
-
-parameter ddrc__phy_rd_lvl_fsm = 32'hF80062BC;
-parameter val_ddrc__phy_rd_lvl_fsm = 32'h00008888;
-parameter mask_ddrc__phy_rd_lvl_fsm = 32'h0000FFFF;
-
-parameter ddrc__phy_gate_lvl_fsm = 32'hF80062C0;
-parameter val_ddrc__phy_gate_lvl_fsm = 32'h00004444;
-parameter mask_ddrc__phy_gate_lvl_fsm = 32'h00007FFF;
-
-
-// ************************************************************
-// Module debug_axim axim
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_axim__GLOBAL_CTRL = 32'hF880C000;
-parameter val_debug_axim__GLOBAL_CTRL = 32'h00000002;
-parameter mask_debug_axim__GLOBAL_CTRL = 32'h00000003;
-
-parameter debug_axim__GLOBAL_STATUS = 32'hF880C004;
-parameter val_debug_axim__GLOBAL_STATUS = 32'h00001000;
-parameter mask_debug_axim__GLOBAL_STATUS = 32'h00001FC3;
-
-parameter debug_axim__FILTER_CTRL = 32'hF880C010;
-parameter val_debug_axim__FILTER_CTRL = 32'h00000000;
-parameter mask_debug_axim__FILTER_CTRL = 32'h0000007F;
-
-parameter debug_axim__TRIGGER_CTRL = 32'hF880C020;
-parameter val_debug_axim__TRIGGER_CTRL = 32'h00000000;
-parameter mask_debug_axim__TRIGGER_CTRL = 32'h0000FFFF;
-
-parameter debug_axim__TRIGGER_STATUS = 32'hF880C024;
-parameter val_debug_axim__TRIGGER_STATUS = 32'h00000000;
-parameter mask_debug_axim__TRIGGER_STATUS = 32'h00000003;
-
-parameter debug_axim__PACKET_CTRL = 32'hF880C030;
-parameter val_debug_axim__PACKET_CTRL = 32'h00070000;
-parameter mask_debug_axim__PACKET_CTRL = 32'h0007FFFF;
-
-parameter debug_axim__TOUT_CTRL = 32'hF880C040;
-parameter val_debug_axim__TOUT_CTRL = 32'h00000000;
-parameter mask_debug_axim__TOUT_CTRL = 32'h0000007F;
-
-parameter debug_axim__TOUT_THRESH = 32'hF880C044;
-parameter val_debug_axim__TOUT_THRESH = 32'h00008000;
-parameter mask_debug_axim__TOUT_THRESH = 32'hFFFFFFFF;
-
-parameter debug_axim__FIFO_CURRENT = 32'hF880C050;
-parameter val_debug_axim__FIFO_CURRENT = 32'h80000000;
-parameter mask_debug_axim__FIFO_CURRENT = 32'hFFFFFFFF;
-
-parameter debug_axim__FIFO_HYSTER = 32'hF880C054;
-parameter val_debug_axim__FIFO_HYSTER = 32'h00000100;
-parameter mask_debug_axim__FIFO_HYSTER = 32'h000003FF;
-
-parameter debug_axim__SYNC_CURRENT = 32'hF880C060;
-parameter val_debug_axim__SYNC_CURRENT = 32'h00000000;
-parameter mask_debug_axim__SYNC_CURRENT = 32'h00000FFF;
-
-parameter debug_axim__SYNC_RELOAD = 32'hF880C064;
-parameter val_debug_axim__SYNC_RELOAD = 32'h00000800;
-parameter mask_debug_axim__SYNC_RELOAD = 32'h00000FFF;
-
-parameter debug_axim__TSTMP_CURRENT = 32'hF880C070;
-parameter val_debug_axim__TSTMP_CURRENT = 32'h00000000;
-parameter mask_debug_axim__TSTMP_CURRENT = 32'h00000000;
-
-parameter debug_axim__ADDR0_MASK = 32'hF880C200;
-parameter val_debug_axim__ADDR0_MASK = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR0_MASK = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR0_LOWER = 32'hF880C204;
-parameter val_debug_axim__ADDR0_LOWER = 32'h00000000;
-parameter mask_debug_axim__ADDR0_LOWER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR0_UPPER = 32'hF880C208;
-parameter val_debug_axim__ADDR0_UPPER = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR0_UPPER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR0_MISC = 32'hF880C20C;
-parameter val_debug_axim__ADDR0_MISC = 32'h00000000;
-parameter mask_debug_axim__ADDR0_MISC = 32'h00007FFF;
-
-parameter debug_axim__ADDR1_MASK = 32'hF880C210;
-parameter val_debug_axim__ADDR1_MASK = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR1_MASK = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR1_LOWER = 32'hF880C214;
-parameter val_debug_axim__ADDR1_LOWER = 32'h00000000;
-parameter mask_debug_axim__ADDR1_LOWER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR1_UPPER = 32'hF880C218;
-parameter val_debug_axim__ADDR1_UPPER = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR1_UPPER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR1_MISC = 32'hF880C21C;
-parameter val_debug_axim__ADDR1_MISC = 32'h00000000;
-parameter mask_debug_axim__ADDR1_MISC = 32'h00007FFF;
-
-parameter debug_axim__ADDR2_MASK = 32'hF880C220;
-parameter val_debug_axim__ADDR2_MASK = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR2_MASK = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR2_LOWER = 32'hF880C224;
-parameter val_debug_axim__ADDR2_LOWER = 32'h00000000;
-parameter mask_debug_axim__ADDR2_LOWER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR2_UPPER = 32'hF880C228;
-parameter val_debug_axim__ADDR2_UPPER = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR2_UPPER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR2_MISC = 32'hF880C22C;
-parameter val_debug_axim__ADDR2_MISC = 32'h00000000;
-parameter mask_debug_axim__ADDR2_MISC = 32'h00007FFF;
-
-parameter debug_axim__ADDR3_MASK = 32'hF880C230;
-parameter val_debug_axim__ADDR3_MASK = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR3_MASK = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR3_LOWER = 32'hF880C234;
-parameter val_debug_axim__ADDR3_LOWER = 32'h00000000;
-parameter mask_debug_axim__ADDR3_LOWER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR3_UPPER = 32'hF880C238;
-parameter val_debug_axim__ADDR3_UPPER = 32'h7FFFFFFC;
-parameter mask_debug_axim__ADDR3_UPPER = 32'h7FFFFFFF;
-
-parameter debug_axim__ADDR3_MISC = 32'hF880C23C;
-parameter val_debug_axim__ADDR3_MISC = 32'h00000000;
-parameter mask_debug_axim__ADDR3_MISC = 32'h00007FFF;
-
-parameter debug_axim__ID0_MASK = 32'hF880C300;
-parameter val_debug_axim__ID0_MASK = 32'h000003FF;
-parameter mask_debug_axim__ID0_MASK = 32'h000003FF;
-
-parameter debug_axim__ID0_LOWER = 32'hF880C304;
-parameter val_debug_axim__ID0_LOWER = 32'h00000000;
-parameter mask_debug_axim__ID0_LOWER = 32'h000003FF;
-
-parameter debug_axim__ID0_UPPER = 32'hF880C308;
-parameter val_debug_axim__ID0_UPPER = 32'h000003FF;
-parameter mask_debug_axim__ID0_UPPER = 32'h000003FF;
-
-parameter debug_axim__ID0_MISC = 32'hF880C30C;
-parameter val_debug_axim__ID0_MISC = 32'h00000000;
-parameter mask_debug_axim__ID0_MISC = 32'h00003FFF;
-
-parameter debug_axim__ID1_MASK = 32'hF880C310;
-parameter val_debug_axim__ID1_MASK = 32'h000003FF;
-parameter mask_debug_axim__ID1_MASK = 32'h000003FF;
-
-parameter debug_axim__ID1_LOWER = 32'hF880C314;
-parameter val_debug_axim__ID1_LOWER = 32'h00000000;
-parameter mask_debug_axim__ID1_LOWER = 32'h000003FF;
-
-parameter debug_axim__ID1_UPPER = 32'hF880C318;
-parameter val_debug_axim__ID1_UPPER = 32'h000003FF;
-parameter mask_debug_axim__ID1_UPPER = 32'h000003FF;
-
-parameter debug_axim__ID1_MISC = 32'hF880C31C;
-parameter val_debug_axim__ID1_MISC = 32'h00000000;
-parameter mask_debug_axim__ID1_MISC = 32'h00003FFF;
-
-parameter debug_axim__ID2_MASK = 32'hF880C320;
-parameter val_debug_axim__ID2_MASK = 32'h000003FF;
-parameter mask_debug_axim__ID2_MASK = 32'h000003FF;
-
-parameter debug_axim__ID2_LOWER = 32'hF880C324;
-parameter val_debug_axim__ID2_LOWER = 32'h00000000;
-parameter mask_debug_axim__ID2_LOWER = 32'h000003FF;
-
-parameter debug_axim__ID2_UPPER = 32'hF880C328;
-parameter val_debug_axim__ID2_UPPER = 32'h000003FF;
-parameter mask_debug_axim__ID2_UPPER = 32'h000003FF;
-
-parameter debug_axim__ID2_MISC = 32'hF880C32C;
-parameter val_debug_axim__ID2_MISC = 32'h00000000;
-parameter mask_debug_axim__ID2_MISC = 32'h00003FFF;
-
-parameter debug_axim__ID3_MASK = 32'hF880C330;
-parameter val_debug_axim__ID3_MASK = 32'h000003FF;
-parameter mask_debug_axim__ID3_MASK = 32'h000003FF;
-
-parameter debug_axim__ID3_LOWER = 32'hF880C334;
-parameter val_debug_axim__ID3_LOWER = 32'h00000000;
-parameter mask_debug_axim__ID3_LOWER = 32'h000003FF;
-
-parameter debug_axim__ID3_UPPER = 32'hF880C338;
-parameter val_debug_axim__ID3_UPPER = 32'h000003FF;
-parameter mask_debug_axim__ID3_UPPER = 32'h000003FF;
-
-parameter debug_axim__ID3_MISC = 32'hF880C33C;
-parameter val_debug_axim__ID3_MISC = 32'h00000000;
-parameter mask_debug_axim__ID3_MISC = 32'h00003FFF;
-
-parameter debug_axim__AXI_SEL = 32'hF880C800;
-parameter val_debug_axim__AXI_SEL = 32'h00000000;
-parameter mask_debug_axim__AXI_SEL = 32'h00000007;
-
-parameter debug_axim__IT_TRIGOUT = 32'hF880CED0;
-parameter val_debug_axim__IT_TRIGOUT = 32'h00000000;
-parameter mask_debug_axim__IT_TRIGOUT = 32'h00000001;
-
-parameter debug_axim__IT_TRIGOUTACK = 32'hF880CED4;
-parameter val_debug_axim__IT_TRIGOUTACK = 32'h00000000;
-parameter mask_debug_axim__IT_TRIGOUTACK = 32'h00000000;
-
-parameter debug_axim__IT_TRIGIN = 32'hF880CED8;
-parameter val_debug_axim__IT_TRIGIN = 32'h00000000;
-parameter mask_debug_axim__IT_TRIGIN = 32'h00000000;
-
-parameter debug_axim__IT_TRIGINACK = 32'hF880CEDC;
-parameter val_debug_axim__IT_TRIGINACK = 32'h00000000;
-parameter mask_debug_axim__IT_TRIGINACK = 32'h00000001;
-
-parameter debug_axim__IT_ATBDATA = 32'hF880CEEC;
-parameter val_debug_axim__IT_ATBDATA = 32'h00000000;
-parameter mask_debug_axim__IT_ATBDATA = 32'h0000001F;
-
-parameter debug_axim__IT_ATBSTATUS = 32'hF880CEF0;
-parameter val_debug_axim__IT_ATBSTATUS = 32'h00000000;
-parameter mask_debug_axim__IT_ATBSTATUS = 32'h00000000;
-
-parameter debug_axim__IT_ATBCTRL1 = 32'hF880CEF4;
-parameter val_debug_axim__IT_ATBCTRL1 = 32'h00000000;
-parameter mask_debug_axim__IT_ATBCTRL1 = 32'h0000007F;
-
-parameter debug_axim__IT_ATBCTRL0 = 32'hF880CEF8;
-parameter val_debug_axim__IT_ATBCTRL0 = 32'h00000000;
-parameter mask_debug_axim__IT_ATBCTRL0 = 32'h000003FF;
-
-parameter debug_axim__IT_CTRL = 32'hF880CF00;
-parameter val_debug_axim__IT_CTRL = 32'h00000000;
-parameter mask_debug_axim__IT_CTRL = 32'h00000001;
-
-parameter debug_axim__CLAIM_SET = 32'hF880CFA0;
-parameter val_debug_axim__CLAIM_SET = 32'h00000001;
-parameter mask_debug_axim__CLAIM_SET = 32'h0000000F;
-
-parameter debug_axim__CLAIM_CLEAR = 32'hF880CFA4;
-parameter val_debug_axim__CLAIM_CLEAR = 32'h00000000;
-parameter mask_debug_axim__CLAIM_CLEAR = 32'h0000000F;
-
-parameter debug_axim__LOCK_ACCESS = 32'hF880CFB0;
-parameter val_debug_axim__LOCK_ACCESS = 32'h00000000;
-parameter mask_debug_axim__LOCK_ACCESS = 32'hFFFFFFFF;
-
-parameter debug_axim__LOCK_STATUS = 32'hF880CFB4;
-parameter val_debug_axim__LOCK_STATUS = 32'h00000003;
-parameter mask_debug_axim__LOCK_STATUS = 32'h00000007;
-
-parameter debug_axim__AUTH_STATUS = 32'hF880CFB8;
-parameter val_debug_axim__AUTH_STATUS = 32'h00000000;
-parameter mask_debug_axim__AUTH_STATUS = 32'h00000033;
-
-parameter debug_axim__DEV_ID = 32'hF880CFC8;
-parameter val_debug_axim__DEV_ID = 32'h00000000;
-parameter mask_debug_axim__DEV_ID = 32'hFFFFFFFF;
-
-parameter debug_axim__DEV_TYPE = 32'hF880CFCC;
-parameter val_debug_axim__DEV_TYPE = 32'h00000043;
-parameter mask_debug_axim__DEV_TYPE = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID4 = 32'hF880CFD0;
-parameter val_debug_axim__PERIPHID4 = 32'h00000003;
-parameter mask_debug_axim__PERIPHID4 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID5 = 32'hF880CFD4;
-parameter val_debug_axim__PERIPHID5 = 32'h00000000;
-parameter mask_debug_axim__PERIPHID5 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID6 = 32'hF880CFD8;
-parameter val_debug_axim__PERIPHID6 = 32'h00000000;
-parameter mask_debug_axim__PERIPHID6 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID7 = 32'hF880CFDC;
-parameter val_debug_axim__PERIPHID7 = 32'h00000000;
-parameter mask_debug_axim__PERIPHID7 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID0 = 32'hF880CFE0;
-parameter val_debug_axim__PERIPHID0 = 32'h000000B2;
-parameter mask_debug_axim__PERIPHID0 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID1 = 32'hF880CFE4;
-parameter val_debug_axim__PERIPHID1 = 32'h00000093;
-parameter mask_debug_axim__PERIPHID1 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID2 = 32'hF880CFE8;
-parameter val_debug_axim__PERIPHID2 = 32'h00000008;
-parameter mask_debug_axim__PERIPHID2 = 32'hFFFFFFFF;
-
-parameter debug_axim__PERIPHID3 = 32'hF880CFEC;
-parameter val_debug_axim__PERIPHID3 = 32'h00000002;
-parameter mask_debug_axim__PERIPHID3 = 32'hFFFFFFFF;
-
-parameter debug_axim__COMPID0 = 32'hF880CFF0;
-parameter val_debug_axim__COMPID0 = 32'h0000000D;
-parameter mask_debug_axim__COMPID0 = 32'hFFFFFFFF;
-
-parameter debug_axim__COMPID1 = 32'hF880CFF4;
-parameter val_debug_axim__COMPID1 = 32'h00000090;
-parameter mask_debug_axim__COMPID1 = 32'hFFFFFFFF;
-
-parameter debug_axim__COMPID2 = 32'hF880CFF8;
-parameter val_debug_axim__COMPID2 = 32'h00000005;
-parameter mask_debug_axim__COMPID2 = 32'hFFFFFFFF;
-
-parameter debug_axim__COMPID3 = 32'hF880CFFC;
-parameter val_debug_axim__COMPID3 = 32'h000000B1;
-parameter mask_debug_axim__COMPID3 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module debug_cpu_cti0 cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cpu_cti0__CTICONTROL = 32'hF8898000;
-parameter val_debug_cpu_cti0__CTICONTROL = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTICONTROL = 32'h00000001;
-
-parameter debug_cpu_cti0__CTIINTACK = 32'hF8898010;
-parameter val_debug_cpu_cti0__CTIINTACK = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINTACK = 32'h000000FF;
-
-parameter debug_cpu_cti0__CTIAPPSET = 32'hF8898014;
-parameter val_debug_cpu_cti0__CTIAPPSET = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIAPPSET = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIAPPCLEAR = 32'hF8898018;
-parameter val_debug_cpu_cti0__CTIAPPCLEAR = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIAPPCLEAR = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIAPPPULSE = 32'hF889801C;
-parameter val_debug_cpu_cti0__CTIAPPPULSE = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIAPPPULSE = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN0 = 32'hF8898020;
-parameter val_debug_cpu_cti0__CTIINEN0 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN0 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN1 = 32'hF8898024;
-parameter val_debug_cpu_cti0__CTIINEN1 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN1 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN2 = 32'hF8898028;
-parameter val_debug_cpu_cti0__CTIINEN2 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN2 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN3 = 32'hF889802C;
-parameter val_debug_cpu_cti0__CTIINEN3 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN3 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN4 = 32'hF8898030;
-parameter val_debug_cpu_cti0__CTIINEN4 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN4 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN5 = 32'hF8898034;
-parameter val_debug_cpu_cti0__CTIINEN5 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN5 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN6 = 32'hF8898038;
-parameter val_debug_cpu_cti0__CTIINEN6 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN6 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIINEN7 = 32'hF889803C;
-parameter val_debug_cpu_cti0__CTIINEN7 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIINEN7 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN0 = 32'hF88980A0;
-parameter val_debug_cpu_cti0__CTIOUTEN0 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN0 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN1 = 32'hF88980A4;
-parameter val_debug_cpu_cti0__CTIOUTEN1 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN1 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN2 = 32'hF88980A8;
-parameter val_debug_cpu_cti0__CTIOUTEN2 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN2 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN3 = 32'hF88980AC;
-parameter val_debug_cpu_cti0__CTIOUTEN3 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN3 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN4 = 32'hF88980B0;
-parameter val_debug_cpu_cti0__CTIOUTEN4 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN4 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN5 = 32'hF88980B4;
-parameter val_debug_cpu_cti0__CTIOUTEN5 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN5 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN6 = 32'hF88980B8;
-parameter val_debug_cpu_cti0__CTIOUTEN6 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN6 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIOUTEN7 = 32'hF88980BC;
-parameter val_debug_cpu_cti0__CTIOUTEN7 = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTIOUTEN7 = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTITRIGINSTATUS = 32'hF8898130;
-parameter val_debug_cpu_cti0__CTITRIGINSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTITRIGINSTATUS = 32'h00000000;
-
-parameter debug_cpu_cti0__CTITRIGOUTSTATUS = 32'hF8898134;
-parameter val_debug_cpu_cti0__CTITRIGOUTSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTITRIGOUTSTATUS = 32'h000000FF;
-
-parameter debug_cpu_cti0__CTICHINSTATUS = 32'hF8898138;
-parameter val_debug_cpu_cti0__CTICHINSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTICHINSTATUS = 32'h00000000;
-
-parameter debug_cpu_cti0__CTICHOUTSTATUS = 32'hF889813C;
-parameter val_debug_cpu_cti0__CTICHOUTSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTICHOUTSTATUS = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTIGATE = 32'hF8898140;
-parameter val_debug_cpu_cti0__CTIGATE = 32'h0000000F;
-parameter mask_debug_cpu_cti0__CTIGATE = 32'h0000000F;
-
-parameter debug_cpu_cti0__ASICCTL = 32'hF8898144;
-parameter val_debug_cpu_cti0__ASICCTL = 32'h00000000;
-parameter mask_debug_cpu_cti0__ASICCTL = 32'h000000FF;
-
-parameter debug_cpu_cti0__ITCHINACK = 32'hF8898EDC;
-parameter val_debug_cpu_cti0__ITCHINACK = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITCHINACK = 32'h0000000F;
-
-parameter debug_cpu_cti0__ITTRIGINACK = 32'hF8898EE0;
-parameter val_debug_cpu_cti0__ITTRIGINACK = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITTRIGINACK = 32'h000000FF;
-
-parameter debug_cpu_cti0__ITCHOUT = 32'hF8898EE4;
-parameter val_debug_cpu_cti0__ITCHOUT = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITCHOUT = 32'h0000000F;
-
-parameter debug_cpu_cti0__ITTRIGOUT = 32'hF8898EE8;
-parameter val_debug_cpu_cti0__ITTRIGOUT = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITTRIGOUT = 32'h000000FF;
-
-parameter debug_cpu_cti0__ITCHOUTACK = 32'hF8898EEC;
-parameter val_debug_cpu_cti0__ITCHOUTACK = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITCHOUTACK = 32'h0000000F;
-
-parameter debug_cpu_cti0__ITTRIGOUTACK = 32'hF8898EF0;
-parameter val_debug_cpu_cti0__ITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITTRIGOUTACK = 32'h000000FF;
-
-parameter debug_cpu_cti0__ITCHIN = 32'hF8898EF4;
-parameter val_debug_cpu_cti0__ITCHIN = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITCHIN = 32'h0000000F;
-
-parameter debug_cpu_cti0__ITTRIGIN = 32'hF8898EF8;
-parameter val_debug_cpu_cti0__ITTRIGIN = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITTRIGIN = 32'h000000FF;
-
-parameter debug_cpu_cti0__ITCTRL = 32'hF8898F00;
-parameter val_debug_cpu_cti0__ITCTRL = 32'h00000000;
-parameter mask_debug_cpu_cti0__ITCTRL = 32'h00000001;
-
-parameter debug_cpu_cti0__CTSR = 32'hF8898FA0;
-parameter val_debug_cpu_cti0__CTSR = 32'h0000000F;
-parameter mask_debug_cpu_cti0__CTSR = 32'h0000000F;
-
-parameter debug_cpu_cti0__CTCR = 32'hF8898FA4;
-parameter val_debug_cpu_cti0__CTCR = 32'h00000000;
-parameter mask_debug_cpu_cti0__CTCR = 32'h0000000F;
-
-parameter debug_cpu_cti0__LAR = 32'hF8898FB0;
-parameter val_debug_cpu_cti0__LAR = 32'h00000000;
-parameter mask_debug_cpu_cti0__LAR = 32'hFFFFFFFF;
-
-parameter debug_cpu_cti0__LSR = 32'hF8898FB4;
-parameter val_debug_cpu_cti0__LSR = 32'h00000003;
-parameter mask_debug_cpu_cti0__LSR = 32'h00000007;
-
-parameter debug_cpu_cti0__ASR = 32'hF8898FB8;
-parameter val_debug_cpu_cti0__ASR = 32'h00000005;
-parameter mask_debug_cpu_cti0__ASR = 32'h00000005;
-
-parameter debug_cpu_cti0__DEVID = 32'hF8898FC8;
-parameter val_debug_cpu_cti0__DEVID = 32'h00040800;
-parameter mask_debug_cpu_cti0__DEVID = 32'h000FFFFF;
-
-parameter debug_cpu_cti0__DTIR = 32'hF8898FCC;
-parameter val_debug_cpu_cti0__DTIR = 32'h00000014;
-parameter mask_debug_cpu_cti0__DTIR = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID4 = 32'hF8898FD0;
-parameter val_debug_cpu_cti0__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cpu_cti0__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID5 = 32'hF8898FD4;
-parameter val_debug_cpu_cti0__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cpu_cti0__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID6 = 32'hF8898FD8;
-parameter val_debug_cpu_cti0__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cpu_cti0__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID7 = 32'hF8898FDC;
-parameter val_debug_cpu_cti0__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cpu_cti0__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID0 = 32'hF8898FE0;
-parameter val_debug_cpu_cti0__PERIPHID0 = 32'h00000006;
-parameter mask_debug_cpu_cti0__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID1 = 32'hF8898FE4;
-parameter val_debug_cpu_cti0__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cpu_cti0__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID2 = 32'hF8898FE8;
-parameter val_debug_cpu_cti0__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_cpu_cti0__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cpu_cti0__PERIPHID3 = 32'hF8898FEC;
-parameter val_debug_cpu_cti0__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cpu_cti0__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cpu_cti0__COMPID0 = 32'hF8898FF0;
-parameter val_debug_cpu_cti0__COMPID0 = 32'h0000000D;
-parameter mask_debug_cpu_cti0__COMPID0 = 32'h000000FF;
-
-parameter debug_cpu_cti0__COMPID1 = 32'hF8898FF4;
-parameter val_debug_cpu_cti0__COMPID1 = 32'h00000090;
-parameter mask_debug_cpu_cti0__COMPID1 = 32'h000000FF;
-
-parameter debug_cpu_cti0__COMPID2 = 32'hF8898FF8;
-parameter val_debug_cpu_cti0__COMPID2 = 32'h00000005;
-parameter mask_debug_cpu_cti0__COMPID2 = 32'h000000FF;
-
-parameter debug_cpu_cti0__COMPID3 = 32'hF8898FFC;
-parameter val_debug_cpu_cti0__COMPID3 = 32'h000000B1;
-parameter mask_debug_cpu_cti0__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_cpu_cti1 cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cpu_cti1__CTICONTROL = 32'hF8899000;
-parameter val_debug_cpu_cti1__CTICONTROL = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTICONTROL = 32'h00000001;
-
-parameter debug_cpu_cti1__CTIINTACK = 32'hF8899010;
-parameter val_debug_cpu_cti1__CTIINTACK = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINTACK = 32'h000000FF;
-
-parameter debug_cpu_cti1__CTIAPPSET = 32'hF8899014;
-parameter val_debug_cpu_cti1__CTIAPPSET = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIAPPSET = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIAPPCLEAR = 32'hF8899018;
-parameter val_debug_cpu_cti1__CTIAPPCLEAR = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIAPPCLEAR = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIAPPPULSE = 32'hF889901C;
-parameter val_debug_cpu_cti1__CTIAPPPULSE = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIAPPPULSE = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN0 = 32'hF8899020;
-parameter val_debug_cpu_cti1__CTIINEN0 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN0 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN1 = 32'hF8899024;
-parameter val_debug_cpu_cti1__CTIINEN1 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN1 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN2 = 32'hF8899028;
-parameter val_debug_cpu_cti1__CTIINEN2 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN2 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN3 = 32'hF889902C;
-parameter val_debug_cpu_cti1__CTIINEN3 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN3 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN4 = 32'hF8899030;
-parameter val_debug_cpu_cti1__CTIINEN4 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN4 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN5 = 32'hF8899034;
-parameter val_debug_cpu_cti1__CTIINEN5 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN5 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN6 = 32'hF8899038;
-parameter val_debug_cpu_cti1__CTIINEN6 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN6 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIINEN7 = 32'hF889903C;
-parameter val_debug_cpu_cti1__CTIINEN7 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIINEN7 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN0 = 32'hF88990A0;
-parameter val_debug_cpu_cti1__CTIOUTEN0 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN0 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN1 = 32'hF88990A4;
-parameter val_debug_cpu_cti1__CTIOUTEN1 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN1 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN2 = 32'hF88990A8;
-parameter val_debug_cpu_cti1__CTIOUTEN2 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN2 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN3 = 32'hF88990AC;
-parameter val_debug_cpu_cti1__CTIOUTEN3 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN3 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN4 = 32'hF88990B0;
-parameter val_debug_cpu_cti1__CTIOUTEN4 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN4 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN5 = 32'hF88990B4;
-parameter val_debug_cpu_cti1__CTIOUTEN5 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN5 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN6 = 32'hF88990B8;
-parameter val_debug_cpu_cti1__CTIOUTEN6 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN6 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIOUTEN7 = 32'hF88990BC;
-parameter val_debug_cpu_cti1__CTIOUTEN7 = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTIOUTEN7 = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTITRIGINSTATUS = 32'hF8899130;
-parameter val_debug_cpu_cti1__CTITRIGINSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTITRIGINSTATUS = 32'h00000000;
-
-parameter debug_cpu_cti1__CTITRIGOUTSTATUS = 32'hF8899134;
-parameter val_debug_cpu_cti1__CTITRIGOUTSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTITRIGOUTSTATUS = 32'h000000FF;
-
-parameter debug_cpu_cti1__CTICHINSTATUS = 32'hF8899138;
-parameter val_debug_cpu_cti1__CTICHINSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTICHINSTATUS = 32'h00000000;
-
-parameter debug_cpu_cti1__CTICHOUTSTATUS = 32'hF889913C;
-parameter val_debug_cpu_cti1__CTICHOUTSTATUS = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTICHOUTSTATUS = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTIGATE = 32'hF8899140;
-parameter val_debug_cpu_cti1__CTIGATE = 32'h0000000F;
-parameter mask_debug_cpu_cti1__CTIGATE = 32'h0000000F;
-
-parameter debug_cpu_cti1__ASICCTL = 32'hF8899144;
-parameter val_debug_cpu_cti1__ASICCTL = 32'h00000000;
-parameter mask_debug_cpu_cti1__ASICCTL = 32'h000000FF;
-
-parameter debug_cpu_cti1__ITCHINACK = 32'hF8899EDC;
-parameter val_debug_cpu_cti1__ITCHINACK = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITCHINACK = 32'h0000000F;
-
-parameter debug_cpu_cti1__ITTRIGINACK = 32'hF8899EE0;
-parameter val_debug_cpu_cti1__ITTRIGINACK = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITTRIGINACK = 32'h000000FF;
-
-parameter debug_cpu_cti1__ITCHOUT = 32'hF8899EE4;
-parameter val_debug_cpu_cti1__ITCHOUT = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITCHOUT = 32'h0000000F;
-
-parameter debug_cpu_cti1__ITTRIGOUT = 32'hF8899EE8;
-parameter val_debug_cpu_cti1__ITTRIGOUT = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITTRIGOUT = 32'h000000FF;
-
-parameter debug_cpu_cti1__ITCHOUTACK = 32'hF8899EEC;
-parameter val_debug_cpu_cti1__ITCHOUTACK = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITCHOUTACK = 32'h0000000F;
-
-parameter debug_cpu_cti1__ITTRIGOUTACK = 32'hF8899EF0;
-parameter val_debug_cpu_cti1__ITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITTRIGOUTACK = 32'h000000FF;
-
-parameter debug_cpu_cti1__ITCHIN = 32'hF8899EF4;
-parameter val_debug_cpu_cti1__ITCHIN = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITCHIN = 32'h0000000F;
-
-parameter debug_cpu_cti1__ITTRIGIN = 32'hF8899EF8;
-parameter val_debug_cpu_cti1__ITTRIGIN = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITTRIGIN = 32'h000000FF;
-
-parameter debug_cpu_cti1__ITCTRL = 32'hF8899F00;
-parameter val_debug_cpu_cti1__ITCTRL = 32'h00000000;
-parameter mask_debug_cpu_cti1__ITCTRL = 32'h00000001;
-
-parameter debug_cpu_cti1__CTSR = 32'hF8899FA0;
-parameter val_debug_cpu_cti1__CTSR = 32'h0000000F;
-parameter mask_debug_cpu_cti1__CTSR = 32'h0000000F;
-
-parameter debug_cpu_cti1__CTCR = 32'hF8899FA4;
-parameter val_debug_cpu_cti1__CTCR = 32'h00000000;
-parameter mask_debug_cpu_cti1__CTCR = 32'h0000000F;
-
-parameter debug_cpu_cti1__LAR = 32'hF8899FB0;
-parameter val_debug_cpu_cti1__LAR = 32'h00000000;
-parameter mask_debug_cpu_cti1__LAR = 32'hFFFFFFFF;
-
-parameter debug_cpu_cti1__LSR = 32'hF8899FB4;
-parameter val_debug_cpu_cti1__LSR = 32'h00000003;
-parameter mask_debug_cpu_cti1__LSR = 32'h00000007;
-
-parameter debug_cpu_cti1__ASR = 32'hF8899FB8;
-parameter val_debug_cpu_cti1__ASR = 32'h00000005;
-parameter mask_debug_cpu_cti1__ASR = 32'h00000005;
-
-parameter debug_cpu_cti1__DEVID = 32'hF8899FC8;
-parameter val_debug_cpu_cti1__DEVID = 32'h00040800;
-parameter mask_debug_cpu_cti1__DEVID = 32'h000FFFFF;
-
-parameter debug_cpu_cti1__DTIR = 32'hF8899FCC;
-parameter val_debug_cpu_cti1__DTIR = 32'h00000014;
-parameter mask_debug_cpu_cti1__DTIR = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID4 = 32'hF8899FD0;
-parameter val_debug_cpu_cti1__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cpu_cti1__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID5 = 32'hF8899FD4;
-parameter val_debug_cpu_cti1__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cpu_cti1__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID6 = 32'hF8899FD8;
-parameter val_debug_cpu_cti1__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cpu_cti1__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID7 = 32'hF8899FDC;
-parameter val_debug_cpu_cti1__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cpu_cti1__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID0 = 32'hF8899FE0;
-parameter val_debug_cpu_cti1__PERIPHID0 = 32'h00000006;
-parameter mask_debug_cpu_cti1__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID1 = 32'hF8899FE4;
-parameter val_debug_cpu_cti1__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cpu_cti1__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID2 = 32'hF8899FE8;
-parameter val_debug_cpu_cti1__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_cpu_cti1__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cpu_cti1__PERIPHID3 = 32'hF8899FEC;
-parameter val_debug_cpu_cti1__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cpu_cti1__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cpu_cti1__COMPID0 = 32'hF8899FF0;
-parameter val_debug_cpu_cti1__COMPID0 = 32'h0000000D;
-parameter mask_debug_cpu_cti1__COMPID0 = 32'h000000FF;
-
-parameter debug_cpu_cti1__COMPID1 = 32'hF8899FF4;
-parameter val_debug_cpu_cti1__COMPID1 = 32'h00000090;
-parameter mask_debug_cpu_cti1__COMPID1 = 32'h000000FF;
-
-parameter debug_cpu_cti1__COMPID2 = 32'hF8899FF8;
-parameter val_debug_cpu_cti1__COMPID2 = 32'h00000005;
-parameter mask_debug_cpu_cti1__COMPID2 = 32'h000000FF;
-
-parameter debug_cpu_cti1__COMPID3 = 32'hF8899FFC;
-parameter val_debug_cpu_cti1__COMPID3 = 32'h000000B1;
-parameter mask_debug_cpu_cti1__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_cpu_pmu0 cortexa9_pmu
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cpu_pmu0__PMXEVCNTR0 = 32'hF8891000;
-parameter val_debug_cpu_pmu0__PMXEVCNTR0 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVCNTR0 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVCNTR1 = 32'hF8891004;
-parameter val_debug_cpu_pmu0__PMXEVCNTR1 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVCNTR1 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVCNTR2 = 32'hF8891008;
-parameter val_debug_cpu_pmu0__PMXEVCNTR2 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVCNTR2 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVCNTR3 = 32'hF889100C;
-parameter val_debug_cpu_pmu0__PMXEVCNTR3 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVCNTR3 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVCNTR4 = 32'hF8891010;
-parameter val_debug_cpu_pmu0__PMXEVCNTR4 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVCNTR4 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVCNTR5 = 32'hF8891014;
-parameter val_debug_cpu_pmu0__PMXEVCNTR5 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVCNTR5 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMCCNTR = 32'hF889107C;
-parameter val_debug_cpu_pmu0__PMCCNTR = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMCCNTR = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVTYPER0 = 32'hF8891400;
-parameter val_debug_cpu_pmu0__PMXEVTYPER0 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVTYPER0 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVTYPER1 = 32'hF8891404;
-parameter val_debug_cpu_pmu0__PMXEVTYPER1 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVTYPER1 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVTYPER2 = 32'hF8891408;
-parameter val_debug_cpu_pmu0__PMXEVTYPER2 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVTYPER2 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVTYPER3 = 32'hF889140C;
-parameter val_debug_cpu_pmu0__PMXEVTYPER3 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVTYPER3 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVTYPER4 = 32'hF8891410;
-parameter val_debug_cpu_pmu0__PMXEVTYPER4 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVTYPER4 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMXEVTYPER5 = 32'hF8891414;
-parameter val_debug_cpu_pmu0__PMXEVTYPER5 = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMXEVTYPER5 = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMCNTENSET = 32'hF8891C00;
-parameter val_debug_cpu_pmu0__PMCNTENSET = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMCNTENSET = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu0__PMCNTENCLR = 32'hF8891C20;
-parameter val_debug_cpu_pmu0__PMCNTENCLR = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMCNTENCLR = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu0__PMINTENSET = 32'hF8891C40;
-parameter val_debug_cpu_pmu0__PMINTENSET = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMINTENSET = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu0__PMINTENCLR = 32'hF8891C60;
-parameter val_debug_cpu_pmu0__PMINTENCLR = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMINTENCLR = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu0__PMOVSR = 32'hF8891C80;
-parameter val_debug_cpu_pmu0__PMOVSR = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMOVSR = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMSWINC = 32'hF8891CA0;
-parameter val_debug_cpu_pmu0__PMSWINC = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMSWINC = 32'h00000000;
-
-parameter debug_cpu_pmu0__PMCR = 32'hF8891E04;
-parameter val_debug_cpu_pmu0__PMCR = 32'h41093000;
-parameter mask_debug_cpu_pmu0__PMCR = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu0__PMUSERENR = 32'hF8891E08;
-parameter val_debug_cpu_pmu0__PMUSERENR = 32'h00000000;
-parameter mask_debug_cpu_pmu0__PMUSERENR = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module debug_cpu_pmu1 cortexa9_pmu
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cpu_pmu1__PMXEVCNTR0 = 32'hF8893000;
-parameter val_debug_cpu_pmu1__PMXEVCNTR0 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVCNTR0 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVCNTR1 = 32'hF8893004;
-parameter val_debug_cpu_pmu1__PMXEVCNTR1 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVCNTR1 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVCNTR2 = 32'hF8893008;
-parameter val_debug_cpu_pmu1__PMXEVCNTR2 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVCNTR2 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVCNTR3 = 32'hF889300C;
-parameter val_debug_cpu_pmu1__PMXEVCNTR3 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVCNTR3 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVCNTR4 = 32'hF8893010;
-parameter val_debug_cpu_pmu1__PMXEVCNTR4 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVCNTR4 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVCNTR5 = 32'hF8893014;
-parameter val_debug_cpu_pmu1__PMXEVCNTR5 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVCNTR5 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMCCNTR = 32'hF889307C;
-parameter val_debug_cpu_pmu1__PMCCNTR = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMCCNTR = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVTYPER0 = 32'hF8893400;
-parameter val_debug_cpu_pmu1__PMXEVTYPER0 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVTYPER0 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVTYPER1 = 32'hF8893404;
-parameter val_debug_cpu_pmu1__PMXEVTYPER1 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVTYPER1 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVTYPER2 = 32'hF8893408;
-parameter val_debug_cpu_pmu1__PMXEVTYPER2 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVTYPER2 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVTYPER3 = 32'hF889340C;
-parameter val_debug_cpu_pmu1__PMXEVTYPER3 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVTYPER3 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVTYPER4 = 32'hF8893410;
-parameter val_debug_cpu_pmu1__PMXEVTYPER4 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVTYPER4 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMXEVTYPER5 = 32'hF8893414;
-parameter val_debug_cpu_pmu1__PMXEVTYPER5 = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMXEVTYPER5 = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMCNTENSET = 32'hF8893C00;
-parameter val_debug_cpu_pmu1__PMCNTENSET = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMCNTENSET = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu1__PMCNTENCLR = 32'hF8893C20;
-parameter val_debug_cpu_pmu1__PMCNTENCLR = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMCNTENCLR = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu1__PMINTENSET = 32'hF8893C40;
-parameter val_debug_cpu_pmu1__PMINTENSET = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMINTENSET = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu1__PMINTENCLR = 32'hF8893C60;
-parameter val_debug_cpu_pmu1__PMINTENCLR = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMINTENCLR = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu1__PMOVSR = 32'hF8893C80;
-parameter val_debug_cpu_pmu1__PMOVSR = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMOVSR = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMSWINC = 32'hF8893CA0;
-parameter val_debug_cpu_pmu1__PMSWINC = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMSWINC = 32'h00000000;
-
-parameter debug_cpu_pmu1__PMCR = 32'hF8893E04;
-parameter val_debug_cpu_pmu1__PMCR = 32'h41093000;
-parameter mask_debug_cpu_pmu1__PMCR = 32'hFFFFFFFF;
-
-parameter debug_cpu_pmu1__PMUSERENR = 32'hF8893E08;
-parameter val_debug_cpu_pmu1__PMUSERENR = 32'h00000000;
-parameter mask_debug_cpu_pmu1__PMUSERENR = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module debug_cpu_ptm0 ptm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cpu_ptm0__ETMCR = 32'hF889C000;
-parameter val_debug_cpu_ptm0__ETMCR = 32'h00000400;
-parameter mask_debug_cpu_ptm0__ETMCR = 32'h3FFFFFFF;
-
-parameter debug_cpu_ptm0__ETMCCR = 32'hF889C004;
-parameter val_debug_cpu_ptm0__ETMCCR = 32'h8D294004;
-parameter mask_debug_cpu_ptm0__ETMCCR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMTRIGGER = 32'hF889C008;
-parameter val_debug_cpu_ptm0__ETMTRIGGER = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMTRIGGER = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSR = 32'hF889C010;
-parameter val_debug_cpu_ptm0__ETMSR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSR = 32'h0000000F;
-
-parameter debug_cpu_ptm0__ETMSCR = 32'hF889C014;
-parameter val_debug_cpu_ptm0__ETMSCR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSCR = 32'h00007FFF;
-
-parameter debug_cpu_ptm0__ETMTSSCR = 32'hF889C018;
-parameter val_debug_cpu_ptm0__ETMTSSCR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMTSSCR = 32'h00FFFFFF;
-
-parameter debug_cpu_ptm0__ETMTECR1 = 32'hF889C024;
-parameter val_debug_cpu_ptm0__ETMTECR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMTECR1 = 32'h03FFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR1 = 32'hF889C040;
-parameter val_debug_cpu_ptm0__ETMACVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR1 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR2 = 32'hF889C044;
-parameter val_debug_cpu_ptm0__ETMACVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR2 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR3 = 32'hF889C048;
-parameter val_debug_cpu_ptm0__ETMACVR3 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR3 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR4 = 32'hF889C04C;
-parameter val_debug_cpu_ptm0__ETMACVR4 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR4 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR5 = 32'hF889C050;
-parameter val_debug_cpu_ptm0__ETMACVR5 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR5 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR6 = 32'hF889C054;
-parameter val_debug_cpu_ptm0__ETMACVR6 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR6 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR7 = 32'hF889C058;
-parameter val_debug_cpu_ptm0__ETMACVR7 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR7 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACVR8 = 32'hF889C05C;
-parameter val_debug_cpu_ptm0__ETMACVR8 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMACVR8 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMACTR1 = 32'hF889C080;
-parameter val_debug_cpu_ptm0__ETMACTR1 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR1 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR2 = 32'hF889C084;
-parameter val_debug_cpu_ptm0__ETMACTR2 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR2 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR3 = 32'hF889C088;
-parameter val_debug_cpu_ptm0__ETMACTR3 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR3 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR4 = 32'hF889C08C;
-parameter val_debug_cpu_ptm0__ETMACTR4 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR4 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR5 = 32'hF889C090;
-parameter val_debug_cpu_ptm0__ETMACTR5 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR5 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR6 = 32'hF889C094;
-parameter val_debug_cpu_ptm0__ETMACTR6 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR6 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR7 = 32'hF889C098;
-parameter val_debug_cpu_ptm0__ETMACTR7 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR7 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMACTR8 = 32'hF889C09C;
-parameter val_debug_cpu_ptm0__ETMACTR8 = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMACTR8 = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMCNTRLDVR1 = 32'hF889C140;
-parameter val_debug_cpu_ptm0__ETMCNTRLDVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCNTRLDVR1 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTRLDVR2 = 32'hF889C144;
-parameter val_debug_cpu_ptm0__ETMCNTRLDVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCNTRLDVR2 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTENR1 = 32'hF889C150;
-parameter val_debug_cpu_ptm0__ETMCNTENR1 = 32'h00020000;
-parameter mask_debug_cpu_ptm0__ETMCNTENR1 = 32'h0003FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTENR2 = 32'hF889C154;
-parameter val_debug_cpu_ptm0__ETMCNTENR2 = 32'h00020000;
-parameter mask_debug_cpu_ptm0__ETMCNTENR2 = 32'h0003FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTRLDEVR1 = 32'hF889C160;
-parameter val_debug_cpu_ptm0__ETMCNTRLDEVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCNTRLDEVR1 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTRLDEVR2 = 32'hF889C164;
-parameter val_debug_cpu_ptm0__ETMCNTRLDEVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCNTRLDEVR2 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTVR1 = 32'hF889C170;
-parameter val_debug_cpu_ptm0__ETMCNTVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCNTVR1 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm0__ETMCNTVR2 = 32'hF889C174;
-parameter val_debug_cpu_ptm0__ETMCNTVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCNTVR2 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm0__ETMSQ12EVR = 32'hF889C180;
-parameter val_debug_cpu_ptm0__ETMSQ12EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQ12EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSQ21EVR = 32'hF889C184;
-parameter val_debug_cpu_ptm0__ETMSQ21EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQ21EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSQ23EVR = 32'hF889C188;
-parameter val_debug_cpu_ptm0__ETMSQ23EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQ23EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSQ31EVR = 32'hF889C18C;
-parameter val_debug_cpu_ptm0__ETMSQ31EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQ31EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSQ32EVR = 32'hF889C190;
-parameter val_debug_cpu_ptm0__ETMSQ32EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQ32EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSQ13EVR = 32'hF889C194;
-parameter val_debug_cpu_ptm0__ETMSQ13EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQ13EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMSQR = 32'hF889C19C;
-parameter val_debug_cpu_ptm0__ETMSQR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMSQR = 32'h00000003;
-
-parameter debug_cpu_ptm0__ETMEXTOUTEVR1 = 32'hF889C1A0;
-parameter val_debug_cpu_ptm0__ETMEXTOUTEVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMEXTOUTEVR1 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMEXTOUTEVR2 = 32'hF889C1A4;
-parameter val_debug_cpu_ptm0__ETMEXTOUTEVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMEXTOUTEVR2 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm0__ETMCIDCVR1 = 32'hF889C1B0;
-parameter val_debug_cpu_ptm0__ETMCIDCVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCIDCVR1 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMCIDCMR = 32'hF889C1BC;
-parameter val_debug_cpu_ptm0__ETMCIDCMR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMCIDCMR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMSYNCFR = 32'hF889C1E0;
-parameter val_debug_cpu_ptm0__ETMSYNCFR = 32'h00000400;
-parameter mask_debug_cpu_ptm0__ETMSYNCFR = 32'h00000FFF;
-
-parameter debug_cpu_ptm0__ETMIDR = 32'hF889C1E4;
-parameter val_debug_cpu_ptm0__ETMIDR = 32'h411CF300;
-parameter mask_debug_cpu_ptm0__ETMIDR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMCCER = 32'hF889C1E8;
-parameter val_debug_cpu_ptm0__ETMCCER = 32'h00C019A2;
-parameter mask_debug_cpu_ptm0__ETMCCER = 32'h03FFFFFF;
-
-parameter debug_cpu_ptm0__ETMEXTINSELR = 32'hF889C1EC;
-parameter val_debug_cpu_ptm0__ETMEXTINSELR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMEXTINSELR = 32'h00003FFF;
-
-parameter debug_cpu_ptm0__ETMAUXCR = 32'hF889C1FC;
-parameter val_debug_cpu_ptm0__ETMAUXCR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMAUXCR = 32'h0000000F;
-
-parameter debug_cpu_ptm0__ETMTRACEIDR = 32'hF889C200;
-parameter val_debug_cpu_ptm0__ETMTRACEIDR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMTRACEIDR = 32'h0000007F;
-
-parameter debug_cpu_ptm0__OSLSR = 32'hF889C304;
-parameter val_debug_cpu_ptm0__OSLSR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__OSLSR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ETMPDSR = 32'hF889C314;
-parameter val_debug_cpu_ptm0__ETMPDSR = 32'h00000001;
-parameter mask_debug_cpu_ptm0__ETMPDSR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__ITMISCOUT = 32'hF889CEDC;
-parameter val_debug_cpu_ptm0__ITMISCOUT = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITMISCOUT = 32'h000003FF;
-
-parameter debug_cpu_ptm0__ITMISCIN = 32'hF889CEE0;
-parameter val_debug_cpu_ptm0__ITMISCIN = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITMISCIN = 32'h00000020;
-
-parameter debug_cpu_ptm0__ITTRIGGER = 32'hF889CEE8;
-parameter val_debug_cpu_ptm0__ITTRIGGER = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITTRIGGER = 32'h00000001;
-
-parameter debug_cpu_ptm0__ITATBDATA0 = 32'hF889CEEC;
-parameter val_debug_cpu_ptm0__ITATBDATA0 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITATBDATA0 = 32'h0000001F;
-
-parameter debug_cpu_ptm0__ITATBCTR2 = 32'hF889CEF0;
-parameter val_debug_cpu_ptm0__ITATBCTR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITATBCTR2 = 32'h00000000;
-
-parameter debug_cpu_ptm0__ITATBID = 32'hF889CEF4;
-parameter val_debug_cpu_ptm0__ITATBID = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITATBID = 32'h0000007F;
-
-parameter debug_cpu_ptm0__ITATBCTR0 = 32'hF889CEF8;
-parameter val_debug_cpu_ptm0__ITATBCTR0 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ITATBCTR0 = 32'h000003FF;
-
-parameter debug_cpu_ptm0__ETMITCTRL = 32'hF889CF00;
-parameter val_debug_cpu_ptm0__ETMITCTRL = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ETMITCTRL = 32'h00000001;
-
-parameter debug_cpu_ptm0__CTSR = 32'hF889CFA0;
-parameter val_debug_cpu_ptm0__CTSR = 32'h000000FF;
-parameter mask_debug_cpu_ptm0__CTSR = 32'h000000FF;
-
-parameter debug_cpu_ptm0__CTCR = 32'hF889CFA4;
-parameter val_debug_cpu_ptm0__CTCR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__CTCR = 32'h000000FF;
-
-parameter debug_cpu_ptm0__LAR = 32'hF889CFB0;
-parameter val_debug_cpu_ptm0__LAR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__LAR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__LSR = 32'hF889CFB4;
-parameter val_debug_cpu_ptm0__LSR = 32'h00000003;
-parameter mask_debug_cpu_ptm0__LSR = 32'h00000007;
-
-parameter debug_cpu_ptm0__ASR = 32'hF889CFB8;
-parameter val_debug_cpu_ptm0__ASR = 32'h00000000;
-parameter mask_debug_cpu_ptm0__ASR = 32'h000000F3;
-
-parameter debug_cpu_ptm0__DEVID = 32'hF889CFC8;
-parameter val_debug_cpu_ptm0__DEVID = 32'h00000000;
-parameter mask_debug_cpu_ptm0__DEVID = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm0__DTIR = 32'hF889CFCC;
-parameter val_debug_cpu_ptm0__DTIR = 32'h00000013;
-parameter mask_debug_cpu_ptm0__DTIR = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID4 = 32'hF889CFD0;
-parameter val_debug_cpu_ptm0__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cpu_ptm0__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID5 = 32'hF889CFD4;
-parameter val_debug_cpu_ptm0__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID6 = 32'hF889CFD8;
-parameter val_debug_cpu_ptm0__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID7 = 32'hF889CFDC;
-parameter val_debug_cpu_ptm0__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID0 = 32'hF889CFE0;
-parameter val_debug_cpu_ptm0__PERIPHID0 = 32'h00000050;
-parameter mask_debug_cpu_ptm0__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID1 = 32'hF889CFE4;
-parameter val_debug_cpu_ptm0__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cpu_ptm0__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID2 = 32'hF889CFE8;
-parameter val_debug_cpu_ptm0__PERIPHID2 = 32'h0000001B;
-parameter mask_debug_cpu_ptm0__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__PERIPHID3 = 32'hF889CFEC;
-parameter val_debug_cpu_ptm0__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cpu_ptm0__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__COMPID0 = 32'hF889CFF0;
-parameter val_debug_cpu_ptm0__COMPID0 = 32'h0000000D;
-parameter mask_debug_cpu_ptm0__COMPID0 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__COMPID1 = 32'hF889CFF4;
-parameter val_debug_cpu_ptm0__COMPID1 = 32'h00000090;
-parameter mask_debug_cpu_ptm0__COMPID1 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__COMPID2 = 32'hF889CFF8;
-parameter val_debug_cpu_ptm0__COMPID2 = 32'h00000005;
-parameter mask_debug_cpu_ptm0__COMPID2 = 32'h000000FF;
-
-parameter debug_cpu_ptm0__COMPID3 = 32'hF889CFFC;
-parameter val_debug_cpu_ptm0__COMPID3 = 32'h000000B1;
-parameter mask_debug_cpu_ptm0__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_cpu_ptm1 ptm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cpu_ptm1__ETMCR = 32'hF889D000;
-parameter val_debug_cpu_ptm1__ETMCR = 32'h00000400;
-parameter mask_debug_cpu_ptm1__ETMCR = 32'h3FFFFFFF;
-
-parameter debug_cpu_ptm1__ETMCCR = 32'hF889D004;
-parameter val_debug_cpu_ptm1__ETMCCR = 32'h8D294004;
-parameter mask_debug_cpu_ptm1__ETMCCR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMTRIGGER = 32'hF889D008;
-parameter val_debug_cpu_ptm1__ETMTRIGGER = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMTRIGGER = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSR = 32'hF889D010;
-parameter val_debug_cpu_ptm1__ETMSR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSR = 32'h0000000F;
-
-parameter debug_cpu_ptm1__ETMSCR = 32'hF889D014;
-parameter val_debug_cpu_ptm1__ETMSCR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSCR = 32'h00007FFF;
-
-parameter debug_cpu_ptm1__ETMTSSCR = 32'hF889D018;
-parameter val_debug_cpu_ptm1__ETMTSSCR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMTSSCR = 32'h00FFFFFF;
-
-parameter debug_cpu_ptm1__ETMTECR1 = 32'hF889D024;
-parameter val_debug_cpu_ptm1__ETMTECR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMTECR1 = 32'h03FFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR1 = 32'hF889D040;
-parameter val_debug_cpu_ptm1__ETMACVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR1 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR2 = 32'hF889D044;
-parameter val_debug_cpu_ptm1__ETMACVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR2 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR3 = 32'hF889D048;
-parameter val_debug_cpu_ptm1__ETMACVR3 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR3 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR4 = 32'hF889D04C;
-parameter val_debug_cpu_ptm1__ETMACVR4 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR4 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR5 = 32'hF889D050;
-parameter val_debug_cpu_ptm1__ETMACVR5 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR5 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR6 = 32'hF889D054;
-parameter val_debug_cpu_ptm1__ETMACVR6 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR6 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR7 = 32'hF889D058;
-parameter val_debug_cpu_ptm1__ETMACVR7 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR7 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACVR8 = 32'hF889D05C;
-parameter val_debug_cpu_ptm1__ETMACVR8 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMACVR8 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMACTR1 = 32'hF889D080;
-parameter val_debug_cpu_ptm1__ETMACTR1 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR1 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR2 = 32'hF889D084;
-parameter val_debug_cpu_ptm1__ETMACTR2 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR2 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR3 = 32'hF889D088;
-parameter val_debug_cpu_ptm1__ETMACTR3 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR3 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR4 = 32'hF889D08C;
-parameter val_debug_cpu_ptm1__ETMACTR4 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR4 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR5 = 32'hF889D090;
-parameter val_debug_cpu_ptm1__ETMACTR5 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR5 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR6 = 32'hF889D094;
-parameter val_debug_cpu_ptm1__ETMACTR6 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR6 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR7 = 32'hF889D098;
-parameter val_debug_cpu_ptm1__ETMACTR7 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR7 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMACTR8 = 32'hF889D09C;
-parameter val_debug_cpu_ptm1__ETMACTR8 = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMACTR8 = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMCNTRLDVR1 = 32'hF889D140;
-parameter val_debug_cpu_ptm1__ETMCNTRLDVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCNTRLDVR1 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTRLDVR2 = 32'hF889D144;
-parameter val_debug_cpu_ptm1__ETMCNTRLDVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCNTRLDVR2 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTENR1 = 32'hF889D150;
-parameter val_debug_cpu_ptm1__ETMCNTENR1 = 32'h00020000;
-parameter mask_debug_cpu_ptm1__ETMCNTENR1 = 32'h0003FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTENR2 = 32'hF889D154;
-parameter val_debug_cpu_ptm1__ETMCNTENR2 = 32'h00020000;
-parameter mask_debug_cpu_ptm1__ETMCNTENR2 = 32'h0003FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTRLDEVR1 = 32'hF889D160;
-parameter val_debug_cpu_ptm1__ETMCNTRLDEVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCNTRLDEVR1 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTRLDEVR2 = 32'hF889D164;
-parameter val_debug_cpu_ptm1__ETMCNTRLDEVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCNTRLDEVR2 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTVR1 = 32'hF889D170;
-parameter val_debug_cpu_ptm1__ETMCNTVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCNTVR1 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm1__ETMCNTVR2 = 32'hF889D174;
-parameter val_debug_cpu_ptm1__ETMCNTVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCNTVR2 = 32'h0000FFFF;
-
-parameter debug_cpu_ptm1__ETMSQ12EVR = 32'hF889D180;
-parameter val_debug_cpu_ptm1__ETMSQ12EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQ12EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSQ21EVR = 32'hF889D184;
-parameter val_debug_cpu_ptm1__ETMSQ21EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQ21EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSQ23EVR = 32'hF889D188;
-parameter val_debug_cpu_ptm1__ETMSQ23EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQ23EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSQ31EVR = 32'hF889D18C;
-parameter val_debug_cpu_ptm1__ETMSQ31EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQ31EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSQ32EVR = 32'hF889D190;
-parameter val_debug_cpu_ptm1__ETMSQ32EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQ32EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSQ13EVR = 32'hF889D194;
-parameter val_debug_cpu_ptm1__ETMSQ13EVR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQ13EVR = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMSQR = 32'hF889D19C;
-parameter val_debug_cpu_ptm1__ETMSQR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMSQR = 32'h00000003;
-
-parameter debug_cpu_ptm1__ETMEXTOUTEVR1 = 32'hF889D1A0;
-parameter val_debug_cpu_ptm1__ETMEXTOUTEVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMEXTOUTEVR1 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMEXTOUTEVR2 = 32'hF889D1A4;
-parameter val_debug_cpu_ptm1__ETMEXTOUTEVR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMEXTOUTEVR2 = 32'h0001FFFF;
-
-parameter debug_cpu_ptm1__ETMCIDCVR1 = 32'hF889D1B0;
-parameter val_debug_cpu_ptm1__ETMCIDCVR1 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCIDCVR1 = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMCIDCMR = 32'hF889D1BC;
-parameter val_debug_cpu_ptm1__ETMCIDCMR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMCIDCMR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMSYNCFR = 32'hF889D1E0;
-parameter val_debug_cpu_ptm1__ETMSYNCFR = 32'h00000400;
-parameter mask_debug_cpu_ptm1__ETMSYNCFR = 32'h00000FFF;
-
-parameter debug_cpu_ptm1__ETMIDR = 32'hF889D1E4;
-parameter val_debug_cpu_ptm1__ETMIDR = 32'h411CF300;
-parameter mask_debug_cpu_ptm1__ETMIDR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMCCER = 32'hF889D1E8;
-parameter val_debug_cpu_ptm1__ETMCCER = 32'h00C019A2;
-parameter mask_debug_cpu_ptm1__ETMCCER = 32'h03FFFFFF;
-
-parameter debug_cpu_ptm1__ETMEXTINSELR = 32'hF889D1EC;
-parameter val_debug_cpu_ptm1__ETMEXTINSELR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMEXTINSELR = 32'h00003FFF;
-
-parameter debug_cpu_ptm1__ETMAUXCR = 32'hF889D1FC;
-parameter val_debug_cpu_ptm1__ETMAUXCR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMAUXCR = 32'h0000000F;
-
-parameter debug_cpu_ptm1__ETMTRACEIDR = 32'hF889D200;
-parameter val_debug_cpu_ptm1__ETMTRACEIDR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMTRACEIDR = 32'h0000007F;
-
-parameter debug_cpu_ptm1__OSLSR = 32'hF889D304;
-parameter val_debug_cpu_ptm1__OSLSR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__OSLSR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ETMPDSR = 32'hF889D314;
-parameter val_debug_cpu_ptm1__ETMPDSR = 32'h00000001;
-parameter mask_debug_cpu_ptm1__ETMPDSR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__ITMISCOUT = 32'hF889DEDC;
-parameter val_debug_cpu_ptm1__ITMISCOUT = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITMISCOUT = 32'h000003FF;
-
-parameter debug_cpu_ptm1__ITMISCIN = 32'hF889DEE0;
-parameter val_debug_cpu_ptm1__ITMISCIN = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITMISCIN = 32'h00000020;
-
-parameter debug_cpu_ptm1__ITTRIGGER = 32'hF889DEE8;
-parameter val_debug_cpu_ptm1__ITTRIGGER = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITTRIGGER = 32'h00000001;
-
-parameter debug_cpu_ptm1__ITATBDATA0 = 32'hF889DEEC;
-parameter val_debug_cpu_ptm1__ITATBDATA0 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITATBDATA0 = 32'h0000001F;
-
-parameter debug_cpu_ptm1__ITATBCTR2 = 32'hF889DEF0;
-parameter val_debug_cpu_ptm1__ITATBCTR2 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITATBCTR2 = 32'h00000000;
-
-parameter debug_cpu_ptm1__ITATBID = 32'hF889DEF4;
-parameter val_debug_cpu_ptm1__ITATBID = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITATBID = 32'h0000007F;
-
-parameter debug_cpu_ptm1__ITATBCTR0 = 32'hF889DEF8;
-parameter val_debug_cpu_ptm1__ITATBCTR0 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ITATBCTR0 = 32'h000003FF;
-
-parameter debug_cpu_ptm1__ETMITCTRL = 32'hF889DF00;
-parameter val_debug_cpu_ptm1__ETMITCTRL = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ETMITCTRL = 32'h00000001;
-
-parameter debug_cpu_ptm1__CTSR = 32'hF889DFA0;
-parameter val_debug_cpu_ptm1__CTSR = 32'h000000FF;
-parameter mask_debug_cpu_ptm1__CTSR = 32'h000000FF;
-
-parameter debug_cpu_ptm1__CTCR = 32'hF889DFA4;
-parameter val_debug_cpu_ptm1__CTCR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__CTCR = 32'h000000FF;
-
-parameter debug_cpu_ptm1__LAR = 32'hF889DFB0;
-parameter val_debug_cpu_ptm1__LAR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__LAR = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__LSR = 32'hF889DFB4;
-parameter val_debug_cpu_ptm1__LSR = 32'h00000003;
-parameter mask_debug_cpu_ptm1__LSR = 32'h00000007;
-
-parameter debug_cpu_ptm1__ASR = 32'hF889DFB8;
-parameter val_debug_cpu_ptm1__ASR = 32'h00000000;
-parameter mask_debug_cpu_ptm1__ASR = 32'h000000F3;
-
-parameter debug_cpu_ptm1__DEVID = 32'hF889DFC8;
-parameter val_debug_cpu_ptm1__DEVID = 32'h00000000;
-parameter mask_debug_cpu_ptm1__DEVID = 32'hFFFFFFFF;
-
-parameter debug_cpu_ptm1__DTIR = 32'hF889DFCC;
-parameter val_debug_cpu_ptm1__DTIR = 32'h00000013;
-parameter mask_debug_cpu_ptm1__DTIR = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID4 = 32'hF889DFD0;
-parameter val_debug_cpu_ptm1__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cpu_ptm1__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID5 = 32'hF889DFD4;
-parameter val_debug_cpu_ptm1__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID6 = 32'hF889DFD8;
-parameter val_debug_cpu_ptm1__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID7 = 32'hF889DFDC;
-parameter val_debug_cpu_ptm1__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID0 = 32'hF889DFE0;
-parameter val_debug_cpu_ptm1__PERIPHID0 = 32'h00000050;
-parameter mask_debug_cpu_ptm1__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID1 = 32'hF889DFE4;
-parameter val_debug_cpu_ptm1__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cpu_ptm1__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID2 = 32'hF889DFE8;
-parameter val_debug_cpu_ptm1__PERIPHID2 = 32'h0000001B;
-parameter mask_debug_cpu_ptm1__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__PERIPHID3 = 32'hF889DFEC;
-parameter val_debug_cpu_ptm1__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cpu_ptm1__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__COMPID0 = 32'hF889DFF0;
-parameter val_debug_cpu_ptm1__COMPID0 = 32'h0000000D;
-parameter mask_debug_cpu_ptm1__COMPID0 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__COMPID1 = 32'hF889DFF4;
-parameter val_debug_cpu_ptm1__COMPID1 = 32'h00000090;
-parameter mask_debug_cpu_ptm1__COMPID1 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__COMPID2 = 32'hF889DFF8;
-parameter val_debug_cpu_ptm1__COMPID2 = 32'h00000005;
-parameter mask_debug_cpu_ptm1__COMPID2 = 32'h000000FF;
-
-parameter debug_cpu_ptm1__COMPID3 = 32'hF889DFFC;
-parameter val_debug_cpu_ptm1__COMPID3 = 32'h000000B1;
-parameter mask_debug_cpu_ptm1__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_cti_axim cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cti_axim__CTICONTROL = 32'hF880A000;
-parameter val_debug_cti_axim__CTICONTROL = 32'h00000000;
-parameter mask_debug_cti_axim__CTICONTROL = 32'h00000001;
-
-parameter debug_cti_axim__CTIINTACK = 32'hF880A010;
-parameter val_debug_cti_axim__CTIINTACK = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINTACK = 32'h000000FF;
-
-parameter debug_cti_axim__CTIAPPSET = 32'hF880A014;
-parameter val_debug_cti_axim__CTIAPPSET = 32'h00000000;
-parameter mask_debug_cti_axim__CTIAPPSET = 32'h0000000F;
-
-parameter debug_cti_axim__CTIAPPCLEAR = 32'hF880A018;
-parameter val_debug_cti_axim__CTIAPPCLEAR = 32'h00000000;
-parameter mask_debug_cti_axim__CTIAPPCLEAR = 32'h0000000F;
-
-parameter debug_cti_axim__CTIAPPPULSE = 32'hF880A01C;
-parameter val_debug_cti_axim__CTIAPPPULSE = 32'h00000000;
-parameter mask_debug_cti_axim__CTIAPPPULSE = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN0 = 32'hF880A020;
-parameter val_debug_cti_axim__CTIINEN0 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN0 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN1 = 32'hF880A024;
-parameter val_debug_cti_axim__CTIINEN1 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN1 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN2 = 32'hF880A028;
-parameter val_debug_cti_axim__CTIINEN2 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN2 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN3 = 32'hF880A02C;
-parameter val_debug_cti_axim__CTIINEN3 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN3 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN4 = 32'hF880A030;
-parameter val_debug_cti_axim__CTIINEN4 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN4 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN5 = 32'hF880A034;
-parameter val_debug_cti_axim__CTIINEN5 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN5 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN6 = 32'hF880A038;
-parameter val_debug_cti_axim__CTIINEN6 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN6 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIINEN7 = 32'hF880A03C;
-parameter val_debug_cti_axim__CTIINEN7 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIINEN7 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN0 = 32'hF880A0A0;
-parameter val_debug_cti_axim__CTIOUTEN0 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN0 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN1 = 32'hF880A0A4;
-parameter val_debug_cti_axim__CTIOUTEN1 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN1 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN2 = 32'hF880A0A8;
-parameter val_debug_cti_axim__CTIOUTEN2 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN2 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN3 = 32'hF880A0AC;
-parameter val_debug_cti_axim__CTIOUTEN3 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN3 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN4 = 32'hF880A0B0;
-parameter val_debug_cti_axim__CTIOUTEN4 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN4 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN5 = 32'hF880A0B4;
-parameter val_debug_cti_axim__CTIOUTEN5 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN5 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN6 = 32'hF880A0B8;
-parameter val_debug_cti_axim__CTIOUTEN6 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN6 = 32'h0000000F;
-
-parameter debug_cti_axim__CTIOUTEN7 = 32'hF880A0BC;
-parameter val_debug_cti_axim__CTIOUTEN7 = 32'h00000000;
-parameter mask_debug_cti_axim__CTIOUTEN7 = 32'h0000000F;
-
-parameter debug_cti_axim__CTITRIGINSTATUS = 32'hF880A130;
-parameter val_debug_cti_axim__CTITRIGINSTATUS = 32'h00000000;
-parameter mask_debug_cti_axim__CTITRIGINSTATUS = 32'h00000000;
-
-parameter debug_cti_axim__CTITRIGOUTSTATUS = 32'hF880A134;
-parameter val_debug_cti_axim__CTITRIGOUTSTATUS = 32'h00000000;
-parameter mask_debug_cti_axim__CTITRIGOUTSTATUS = 32'h000000FF;
-
-parameter debug_cti_axim__CTICHINSTATUS = 32'hF880A138;
-parameter val_debug_cti_axim__CTICHINSTATUS = 32'h00000000;
-parameter mask_debug_cti_axim__CTICHINSTATUS = 32'h00000000;
-
-parameter debug_cti_axim__CTICHOUTSTATUS = 32'hF880A13C;
-parameter val_debug_cti_axim__CTICHOUTSTATUS = 32'h00000000;
-parameter mask_debug_cti_axim__CTICHOUTSTATUS = 32'h0000000F;
-
-parameter debug_cti_axim__CTIGATE = 32'hF880A140;
-parameter val_debug_cti_axim__CTIGATE = 32'h0000000F;
-parameter mask_debug_cti_axim__CTIGATE = 32'h0000000F;
-
-parameter debug_cti_axim__ASICCTL = 32'hF880A144;
-parameter val_debug_cti_axim__ASICCTL = 32'h00000000;
-parameter mask_debug_cti_axim__ASICCTL = 32'h000000FF;
-
-parameter debug_cti_axim__ITCHINACK = 32'hF880AEDC;
-parameter val_debug_cti_axim__ITCHINACK = 32'h00000000;
-parameter mask_debug_cti_axim__ITCHINACK = 32'h0000000F;
-
-parameter debug_cti_axim__ITTRIGINACK = 32'hF880AEE0;
-parameter val_debug_cti_axim__ITTRIGINACK = 32'h00000000;
-parameter mask_debug_cti_axim__ITTRIGINACK = 32'h000000FF;
-
-parameter debug_cti_axim__ITCHOUT = 32'hF880AEE4;
-parameter val_debug_cti_axim__ITCHOUT = 32'h00000000;
-parameter mask_debug_cti_axim__ITCHOUT = 32'h0000000F;
-
-parameter debug_cti_axim__ITTRIGOUT = 32'hF880AEE8;
-parameter val_debug_cti_axim__ITTRIGOUT = 32'h00000000;
-parameter mask_debug_cti_axim__ITTRIGOUT = 32'h000000FF;
-
-parameter debug_cti_axim__ITCHOUTACK = 32'hF880AEEC;
-parameter val_debug_cti_axim__ITCHOUTACK = 32'h00000000;
-parameter mask_debug_cti_axim__ITCHOUTACK = 32'h0000000F;
-
-parameter debug_cti_axim__ITTRIGOUTACK = 32'hF880AEF0;
-parameter val_debug_cti_axim__ITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_cti_axim__ITTRIGOUTACK = 32'h000000FF;
-
-parameter debug_cti_axim__ITCHIN = 32'hF880AEF4;
-parameter val_debug_cti_axim__ITCHIN = 32'h00000000;
-parameter mask_debug_cti_axim__ITCHIN = 32'h0000000F;
-
-parameter debug_cti_axim__ITTRIGIN = 32'hF880AEF8;
-parameter val_debug_cti_axim__ITTRIGIN = 32'h00000000;
-parameter mask_debug_cti_axim__ITTRIGIN = 32'h000000FF;
-
-parameter debug_cti_axim__ITCTRL = 32'hF880AF00;
-parameter val_debug_cti_axim__ITCTRL = 32'h00000000;
-parameter mask_debug_cti_axim__ITCTRL = 32'h00000001;
-
-parameter debug_cti_axim__CTSR = 32'hF880AFA0;
-parameter val_debug_cti_axim__CTSR = 32'h0000000F;
-parameter mask_debug_cti_axim__CTSR = 32'h0000000F;
-
-parameter debug_cti_axim__CTCR = 32'hF880AFA4;
-parameter val_debug_cti_axim__CTCR = 32'h00000000;
-parameter mask_debug_cti_axim__CTCR = 32'h0000000F;
-
-parameter debug_cti_axim__LAR = 32'hF880AFB0;
-parameter val_debug_cti_axim__LAR = 32'h00000000;
-parameter mask_debug_cti_axim__LAR = 32'hFFFFFFFF;
-
-parameter debug_cti_axim__LSR = 32'hF880AFB4;
-parameter val_debug_cti_axim__LSR = 32'h00000003;
-parameter mask_debug_cti_axim__LSR = 32'h00000007;
-
-parameter debug_cti_axim__ASR = 32'hF880AFB8;
-parameter val_debug_cti_axim__ASR = 32'h00000005;
-parameter mask_debug_cti_axim__ASR = 32'h00000005;
-
-parameter debug_cti_axim__DEVID = 32'hF880AFC8;
-parameter val_debug_cti_axim__DEVID = 32'h00040800;
-parameter mask_debug_cti_axim__DEVID = 32'h000FFFFF;
-
-parameter debug_cti_axim__DTIR = 32'hF880AFCC;
-parameter val_debug_cti_axim__DTIR = 32'h00000014;
-parameter mask_debug_cti_axim__DTIR = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID4 = 32'hF880AFD0;
-parameter val_debug_cti_axim__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cti_axim__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID5 = 32'hF880AFD4;
-parameter val_debug_cti_axim__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cti_axim__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID6 = 32'hF880AFD8;
-parameter val_debug_cti_axim__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cti_axim__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID7 = 32'hF880AFDC;
-parameter val_debug_cti_axim__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cti_axim__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID0 = 32'hF880AFE0;
-parameter val_debug_cti_axim__PERIPHID0 = 32'h00000006;
-parameter mask_debug_cti_axim__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID1 = 32'hF880AFE4;
-parameter val_debug_cti_axim__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cti_axim__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID2 = 32'hF880AFE8;
-parameter val_debug_cti_axim__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_cti_axim__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cti_axim__PERIPHID3 = 32'hF880AFEC;
-parameter val_debug_cti_axim__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cti_axim__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cti_axim__COMPID0 = 32'hF880AFF0;
-parameter val_debug_cti_axim__COMPID0 = 32'h0000000D;
-parameter mask_debug_cti_axim__COMPID0 = 32'h000000FF;
-
-parameter debug_cti_axim__COMPID1 = 32'hF880AFF4;
-parameter val_debug_cti_axim__COMPID1 = 32'h00000090;
-parameter mask_debug_cti_axim__COMPID1 = 32'h000000FF;
-
-parameter debug_cti_axim__COMPID2 = 32'hF880AFF8;
-parameter val_debug_cti_axim__COMPID2 = 32'h00000005;
-parameter mask_debug_cti_axim__COMPID2 = 32'h000000FF;
-
-parameter debug_cti_axim__COMPID3 = 32'hF880AFFC;
-parameter val_debug_cti_axim__COMPID3 = 32'h000000B1;
-parameter mask_debug_cti_axim__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_cti_etb_tpiu cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cti_etb_tpiu__CTICONTROL = 32'hF8802000;
-parameter val_debug_cti_etb_tpiu__CTICONTROL = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTICONTROL = 32'h00000001;
-
-parameter debug_cti_etb_tpiu__CTIINTACK = 32'hF8802010;
-parameter val_debug_cti_etb_tpiu__CTIINTACK = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINTACK = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__CTIAPPSET = 32'hF8802014;
-parameter val_debug_cti_etb_tpiu__CTIAPPSET = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIAPPSET = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIAPPCLEAR = 32'hF8802018;
-parameter val_debug_cti_etb_tpiu__CTIAPPCLEAR = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIAPPCLEAR = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIAPPPULSE = 32'hF880201C;
-parameter val_debug_cti_etb_tpiu__CTIAPPPULSE = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIAPPPULSE = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN0 = 32'hF8802020;
-parameter val_debug_cti_etb_tpiu__CTIINEN0 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN0 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN1 = 32'hF8802024;
-parameter val_debug_cti_etb_tpiu__CTIINEN1 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN1 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN2 = 32'hF8802028;
-parameter val_debug_cti_etb_tpiu__CTIINEN2 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN2 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN3 = 32'hF880202C;
-parameter val_debug_cti_etb_tpiu__CTIINEN3 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN3 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN4 = 32'hF8802030;
-parameter val_debug_cti_etb_tpiu__CTIINEN4 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN4 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN5 = 32'hF8802034;
-parameter val_debug_cti_etb_tpiu__CTIINEN5 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN5 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN6 = 32'hF8802038;
-parameter val_debug_cti_etb_tpiu__CTIINEN6 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN6 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIINEN7 = 32'hF880203C;
-parameter val_debug_cti_etb_tpiu__CTIINEN7 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIINEN7 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN0 = 32'hF88020A0;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN0 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN0 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN1 = 32'hF88020A4;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN1 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN1 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN2 = 32'hF88020A8;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN2 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN2 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN3 = 32'hF88020AC;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN3 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN3 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN4 = 32'hF88020B0;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN4 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN4 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN5 = 32'hF88020B4;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN5 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN5 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN6 = 32'hF88020B8;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN6 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN6 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIOUTEN7 = 32'hF88020BC;
-parameter val_debug_cti_etb_tpiu__CTIOUTEN7 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTIOUTEN7 = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTITRIGINSTATUS = 32'hF8802130;
-parameter val_debug_cti_etb_tpiu__CTITRIGINSTATUS = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTITRIGINSTATUS = 32'h00000000;
-
-parameter debug_cti_etb_tpiu__CTITRIGOUTSTATUS = 32'hF8802134;
-parameter val_debug_cti_etb_tpiu__CTITRIGOUTSTATUS = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTITRIGOUTSTATUS = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__CTICHINSTATUS = 32'hF8802138;
-parameter val_debug_cti_etb_tpiu__CTICHINSTATUS = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTICHINSTATUS = 32'h00000000;
-
-parameter debug_cti_etb_tpiu__CTICHOUTSTATUS = 32'hF880213C;
-parameter val_debug_cti_etb_tpiu__CTICHOUTSTATUS = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTICHOUTSTATUS = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTIGATE = 32'hF8802140;
-parameter val_debug_cti_etb_tpiu__CTIGATE = 32'h0000000F;
-parameter mask_debug_cti_etb_tpiu__CTIGATE = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__ASICCTL = 32'hF8802144;
-parameter val_debug_cti_etb_tpiu__ASICCTL = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ASICCTL = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__ITCHINACK = 32'hF8802EDC;
-parameter val_debug_cti_etb_tpiu__ITCHINACK = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITCHINACK = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__ITTRIGINACK = 32'hF8802EE0;
-parameter val_debug_cti_etb_tpiu__ITTRIGINACK = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITTRIGINACK = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__ITCHOUT = 32'hF8802EE4;
-parameter val_debug_cti_etb_tpiu__ITCHOUT = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITCHOUT = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__ITTRIGOUT = 32'hF8802EE8;
-parameter val_debug_cti_etb_tpiu__ITTRIGOUT = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITTRIGOUT = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__ITCHOUTACK = 32'hF8802EEC;
-parameter val_debug_cti_etb_tpiu__ITCHOUTACK = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITCHOUTACK = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__ITTRIGOUTACK = 32'hF8802EF0;
-parameter val_debug_cti_etb_tpiu__ITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITTRIGOUTACK = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__ITCHIN = 32'hF8802EF4;
-parameter val_debug_cti_etb_tpiu__ITCHIN = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITCHIN = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__ITTRIGIN = 32'hF8802EF8;
-parameter val_debug_cti_etb_tpiu__ITTRIGIN = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITTRIGIN = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__ITCTRL = 32'hF8802F00;
-parameter val_debug_cti_etb_tpiu__ITCTRL = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__ITCTRL = 32'h00000001;
-
-parameter debug_cti_etb_tpiu__CTSR = 32'hF8802FA0;
-parameter val_debug_cti_etb_tpiu__CTSR = 32'h0000000F;
-parameter mask_debug_cti_etb_tpiu__CTSR = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__CTCR = 32'hF8802FA4;
-parameter val_debug_cti_etb_tpiu__CTCR = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__CTCR = 32'h0000000F;
-
-parameter debug_cti_etb_tpiu__LAR = 32'hF8802FB0;
-parameter val_debug_cti_etb_tpiu__LAR = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__LAR = 32'hFFFFFFFF;
-
-parameter debug_cti_etb_tpiu__LSR = 32'hF8802FB4;
-parameter val_debug_cti_etb_tpiu__LSR = 32'h00000003;
-parameter mask_debug_cti_etb_tpiu__LSR = 32'h00000007;
-
-parameter debug_cti_etb_tpiu__ASR = 32'hF8802FB8;
-parameter val_debug_cti_etb_tpiu__ASR = 32'h00000005;
-parameter mask_debug_cti_etb_tpiu__ASR = 32'h00000005;
-
-parameter debug_cti_etb_tpiu__DEVID = 32'hF8802FC8;
-parameter val_debug_cti_etb_tpiu__DEVID = 32'h00040800;
-parameter mask_debug_cti_etb_tpiu__DEVID = 32'h000FFFFF;
-
-parameter debug_cti_etb_tpiu__DTIR = 32'hF8802FCC;
-parameter val_debug_cti_etb_tpiu__DTIR = 32'h00000014;
-parameter mask_debug_cti_etb_tpiu__DTIR = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID4 = 32'hF8802FD0;
-parameter val_debug_cti_etb_tpiu__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cti_etb_tpiu__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID5 = 32'hF8802FD4;
-parameter val_debug_cti_etb_tpiu__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID6 = 32'hF8802FD8;
-parameter val_debug_cti_etb_tpiu__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID7 = 32'hF8802FDC;
-parameter val_debug_cti_etb_tpiu__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID0 = 32'hF8802FE0;
-parameter val_debug_cti_etb_tpiu__PERIPHID0 = 32'h00000006;
-parameter mask_debug_cti_etb_tpiu__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID1 = 32'hF8802FE4;
-parameter val_debug_cti_etb_tpiu__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cti_etb_tpiu__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID2 = 32'hF8802FE8;
-parameter val_debug_cti_etb_tpiu__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_cti_etb_tpiu__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__PERIPHID3 = 32'hF8802FEC;
-parameter val_debug_cti_etb_tpiu__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cti_etb_tpiu__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__COMPID0 = 32'hF8802FF0;
-parameter val_debug_cti_etb_tpiu__COMPID0 = 32'h0000000D;
-parameter mask_debug_cti_etb_tpiu__COMPID0 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__COMPID1 = 32'hF8802FF4;
-parameter val_debug_cti_etb_tpiu__COMPID1 = 32'h00000090;
-parameter mask_debug_cti_etb_tpiu__COMPID1 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__COMPID2 = 32'hF8802FF8;
-parameter val_debug_cti_etb_tpiu__COMPID2 = 32'h00000005;
-parameter mask_debug_cti_etb_tpiu__COMPID2 = 32'h000000FF;
-
-parameter debug_cti_etb_tpiu__COMPID3 = 32'hF8802FFC;
-parameter val_debug_cti_etb_tpiu__COMPID3 = 32'h000000B1;
-parameter mask_debug_cti_etb_tpiu__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_cti_ftm cti
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_cti_ftm__CTICONTROL = 32'hF8809000;
-parameter val_debug_cti_ftm__CTICONTROL = 32'h00000000;
-parameter mask_debug_cti_ftm__CTICONTROL = 32'h00000001;
-
-parameter debug_cti_ftm__CTIINTACK = 32'hF8809010;
-parameter val_debug_cti_ftm__CTIINTACK = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINTACK = 32'h000000FF;
-
-parameter debug_cti_ftm__CTIAPPSET = 32'hF8809014;
-parameter val_debug_cti_ftm__CTIAPPSET = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIAPPSET = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIAPPCLEAR = 32'hF8809018;
-parameter val_debug_cti_ftm__CTIAPPCLEAR = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIAPPCLEAR = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIAPPPULSE = 32'hF880901C;
-parameter val_debug_cti_ftm__CTIAPPPULSE = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIAPPPULSE = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN0 = 32'hF8809020;
-parameter val_debug_cti_ftm__CTIINEN0 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN0 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN1 = 32'hF8809024;
-parameter val_debug_cti_ftm__CTIINEN1 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN1 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN2 = 32'hF8809028;
-parameter val_debug_cti_ftm__CTIINEN2 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN2 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN3 = 32'hF880902C;
-parameter val_debug_cti_ftm__CTIINEN3 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN3 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN4 = 32'hF8809030;
-parameter val_debug_cti_ftm__CTIINEN4 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN4 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN5 = 32'hF8809034;
-parameter val_debug_cti_ftm__CTIINEN5 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN5 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN6 = 32'hF8809038;
-parameter val_debug_cti_ftm__CTIINEN6 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN6 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIINEN7 = 32'hF880903C;
-parameter val_debug_cti_ftm__CTIINEN7 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIINEN7 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN0 = 32'hF88090A0;
-parameter val_debug_cti_ftm__CTIOUTEN0 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN0 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN1 = 32'hF88090A4;
-parameter val_debug_cti_ftm__CTIOUTEN1 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN1 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN2 = 32'hF88090A8;
-parameter val_debug_cti_ftm__CTIOUTEN2 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN2 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN3 = 32'hF88090AC;
-parameter val_debug_cti_ftm__CTIOUTEN3 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN3 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN4 = 32'hF88090B0;
-parameter val_debug_cti_ftm__CTIOUTEN4 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN4 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN5 = 32'hF88090B4;
-parameter val_debug_cti_ftm__CTIOUTEN5 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN5 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN6 = 32'hF88090B8;
-parameter val_debug_cti_ftm__CTIOUTEN6 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN6 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIOUTEN7 = 32'hF88090BC;
-parameter val_debug_cti_ftm__CTIOUTEN7 = 32'h00000000;
-parameter mask_debug_cti_ftm__CTIOUTEN7 = 32'h0000000F;
-
-parameter debug_cti_ftm__CTITRIGINSTATUS = 32'hF8809130;
-parameter val_debug_cti_ftm__CTITRIGINSTATUS = 32'h00000000;
-parameter mask_debug_cti_ftm__CTITRIGINSTATUS = 32'h00000000;
-
-parameter debug_cti_ftm__CTITRIGOUTSTATUS = 32'hF8809134;
-parameter val_debug_cti_ftm__CTITRIGOUTSTATUS = 32'h00000000;
-parameter mask_debug_cti_ftm__CTITRIGOUTSTATUS = 32'h000000FF;
-
-parameter debug_cti_ftm__CTICHINSTATUS = 32'hF8809138;
-parameter val_debug_cti_ftm__CTICHINSTATUS = 32'h00000000;
-parameter mask_debug_cti_ftm__CTICHINSTATUS = 32'h00000000;
-
-parameter debug_cti_ftm__CTICHOUTSTATUS = 32'hF880913C;
-parameter val_debug_cti_ftm__CTICHOUTSTATUS = 32'h00000000;
-parameter mask_debug_cti_ftm__CTICHOUTSTATUS = 32'h0000000F;
-
-parameter debug_cti_ftm__CTIGATE = 32'hF8809140;
-parameter val_debug_cti_ftm__CTIGATE = 32'h0000000F;
-parameter mask_debug_cti_ftm__CTIGATE = 32'h0000000F;
-
-parameter debug_cti_ftm__ASICCTL = 32'hF8809144;
-parameter val_debug_cti_ftm__ASICCTL = 32'h00000000;
-parameter mask_debug_cti_ftm__ASICCTL = 32'h000000FF;
-
-parameter debug_cti_ftm__ITCHINACK = 32'hF8809EDC;
-parameter val_debug_cti_ftm__ITCHINACK = 32'h00000000;
-parameter mask_debug_cti_ftm__ITCHINACK = 32'h0000000F;
-
-parameter debug_cti_ftm__ITTRIGINACK = 32'hF8809EE0;
-parameter val_debug_cti_ftm__ITTRIGINACK = 32'h00000000;
-parameter mask_debug_cti_ftm__ITTRIGINACK = 32'h000000FF;
-
-parameter debug_cti_ftm__ITCHOUT = 32'hF8809EE4;
-parameter val_debug_cti_ftm__ITCHOUT = 32'h00000000;
-parameter mask_debug_cti_ftm__ITCHOUT = 32'h0000000F;
-
-parameter debug_cti_ftm__ITTRIGOUT = 32'hF8809EE8;
-parameter val_debug_cti_ftm__ITTRIGOUT = 32'h00000000;
-parameter mask_debug_cti_ftm__ITTRIGOUT = 32'h000000FF;
-
-parameter debug_cti_ftm__ITCHOUTACK = 32'hF8809EEC;
-parameter val_debug_cti_ftm__ITCHOUTACK = 32'h00000000;
-parameter mask_debug_cti_ftm__ITCHOUTACK = 32'h0000000F;
-
-parameter debug_cti_ftm__ITTRIGOUTACK = 32'hF8809EF0;
-parameter val_debug_cti_ftm__ITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_cti_ftm__ITTRIGOUTACK = 32'h000000FF;
-
-parameter debug_cti_ftm__ITCHIN = 32'hF8809EF4;
-parameter val_debug_cti_ftm__ITCHIN = 32'h00000000;
-parameter mask_debug_cti_ftm__ITCHIN = 32'h0000000F;
-
-parameter debug_cti_ftm__ITTRIGIN = 32'hF8809EF8;
-parameter val_debug_cti_ftm__ITTRIGIN = 32'h00000000;
-parameter mask_debug_cti_ftm__ITTRIGIN = 32'h000000FF;
-
-parameter debug_cti_ftm__ITCTRL = 32'hF8809F00;
-parameter val_debug_cti_ftm__ITCTRL = 32'h00000000;
-parameter mask_debug_cti_ftm__ITCTRL = 32'h00000001;
-
-parameter debug_cti_ftm__CTSR = 32'hF8809FA0;
-parameter val_debug_cti_ftm__CTSR = 32'h0000000F;
-parameter mask_debug_cti_ftm__CTSR = 32'h0000000F;
-
-parameter debug_cti_ftm__CTCR = 32'hF8809FA4;
-parameter val_debug_cti_ftm__CTCR = 32'h00000000;
-parameter mask_debug_cti_ftm__CTCR = 32'h0000000F;
-
-parameter debug_cti_ftm__LAR = 32'hF8809FB0;
-parameter val_debug_cti_ftm__LAR = 32'h00000000;
-parameter mask_debug_cti_ftm__LAR = 32'hFFFFFFFF;
-
-parameter debug_cti_ftm__LSR = 32'hF8809FB4;
-parameter val_debug_cti_ftm__LSR = 32'h00000003;
-parameter mask_debug_cti_ftm__LSR = 32'h00000007;
-
-parameter debug_cti_ftm__ASR = 32'hF8809FB8;
-parameter val_debug_cti_ftm__ASR = 32'h00000005;
-parameter mask_debug_cti_ftm__ASR = 32'h00000005;
-
-parameter debug_cti_ftm__DEVID = 32'hF8809FC8;
-parameter val_debug_cti_ftm__DEVID = 32'h00040800;
-parameter mask_debug_cti_ftm__DEVID = 32'h000FFFFF;
-
-parameter debug_cti_ftm__DTIR = 32'hF8809FCC;
-parameter val_debug_cti_ftm__DTIR = 32'h00000014;
-parameter mask_debug_cti_ftm__DTIR = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID4 = 32'hF8809FD0;
-parameter val_debug_cti_ftm__PERIPHID4 = 32'h00000004;
-parameter mask_debug_cti_ftm__PERIPHID4 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID5 = 32'hF8809FD4;
-parameter val_debug_cti_ftm__PERIPHID5 = 32'h00000000;
-parameter mask_debug_cti_ftm__PERIPHID5 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID6 = 32'hF8809FD8;
-parameter val_debug_cti_ftm__PERIPHID6 = 32'h00000000;
-parameter mask_debug_cti_ftm__PERIPHID6 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID7 = 32'hF8809FDC;
-parameter val_debug_cti_ftm__PERIPHID7 = 32'h00000000;
-parameter mask_debug_cti_ftm__PERIPHID7 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID0 = 32'hF8809FE0;
-parameter val_debug_cti_ftm__PERIPHID0 = 32'h00000006;
-parameter mask_debug_cti_ftm__PERIPHID0 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID1 = 32'hF8809FE4;
-parameter val_debug_cti_ftm__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_cti_ftm__PERIPHID1 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID2 = 32'hF8809FE8;
-parameter val_debug_cti_ftm__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_cti_ftm__PERIPHID2 = 32'h000000FF;
-
-parameter debug_cti_ftm__PERIPHID3 = 32'hF8809FEC;
-parameter val_debug_cti_ftm__PERIPHID3 = 32'h00000000;
-parameter mask_debug_cti_ftm__PERIPHID3 = 32'h000000FF;
-
-parameter debug_cti_ftm__COMPID0 = 32'hF8809FF0;
-parameter val_debug_cti_ftm__COMPID0 = 32'h0000000D;
-parameter mask_debug_cti_ftm__COMPID0 = 32'h000000FF;
-
-parameter debug_cti_ftm__COMPID1 = 32'hF8809FF4;
-parameter val_debug_cti_ftm__COMPID1 = 32'h00000090;
-parameter mask_debug_cti_ftm__COMPID1 = 32'h000000FF;
-
-parameter debug_cti_ftm__COMPID2 = 32'hF8809FF8;
-parameter val_debug_cti_ftm__COMPID2 = 32'h00000005;
-parameter mask_debug_cti_ftm__COMPID2 = 32'h000000FF;
-
-parameter debug_cti_ftm__COMPID3 = 32'hF8809FFC;
-parameter val_debug_cti_ftm__COMPID3 = 32'h000000B1;
-parameter mask_debug_cti_ftm__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_dap_rom dap
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_dap_rom__ROMENTRY00 = 32'hF8800000;
-parameter val_debug_dap_rom__ROMENTRY00 = 32'h00001003;
-parameter mask_debug_dap_rom__ROMENTRY00 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY01 = 32'hF8800004;
-parameter val_debug_dap_rom__ROMENTRY01 = 32'h00002003;
-parameter mask_debug_dap_rom__ROMENTRY01 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY02 = 32'hF8800008;
-parameter val_debug_dap_rom__ROMENTRY02 = 32'h00003003;
-parameter mask_debug_dap_rom__ROMENTRY02 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY03 = 32'hF880000C;
-parameter val_debug_dap_rom__ROMENTRY03 = 32'h00004003;
-parameter mask_debug_dap_rom__ROMENTRY03 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY04 = 32'hF8800010;
-parameter val_debug_dap_rom__ROMENTRY04 = 32'h00005003;
-parameter mask_debug_dap_rom__ROMENTRY04 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY05 = 32'hF8800014;
-parameter val_debug_dap_rom__ROMENTRY05 = 32'h00009003;
-parameter mask_debug_dap_rom__ROMENTRY05 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY06 = 32'hF8800018;
-parameter val_debug_dap_rom__ROMENTRY06 = 32'h0000A003;
-parameter mask_debug_dap_rom__ROMENTRY06 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY07 = 32'hF880001C;
-parameter val_debug_dap_rom__ROMENTRY07 = 32'h0000B003;
-parameter mask_debug_dap_rom__ROMENTRY07 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY08 = 32'hF8800020;
-parameter val_debug_dap_rom__ROMENTRY08 = 32'h0000C003;
-parameter mask_debug_dap_rom__ROMENTRY08 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY09 = 32'hF8800024;
-parameter val_debug_dap_rom__ROMENTRY09 = 32'h00080003;
-parameter mask_debug_dap_rom__ROMENTRY09 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY10 = 32'hF8800028;
-parameter val_debug_dap_rom__ROMENTRY10 = 32'h00000000;
-parameter mask_debug_dap_rom__ROMENTRY10 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY11 = 32'hF880002C;
-parameter val_debug_dap_rom__ROMENTRY11 = 32'h00000000;
-parameter mask_debug_dap_rom__ROMENTRY11 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY12 = 32'hF8800030;
-parameter val_debug_dap_rom__ROMENTRY12 = 32'h00000000;
-parameter mask_debug_dap_rom__ROMENTRY12 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY13 = 32'hF8800034;
-parameter val_debug_dap_rom__ROMENTRY13 = 32'h00000000;
-parameter mask_debug_dap_rom__ROMENTRY13 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY14 = 32'hF8800038;
-parameter val_debug_dap_rom__ROMENTRY14 = 32'h00000000;
-parameter mask_debug_dap_rom__ROMENTRY14 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__ROMENTRY15 = 32'hF880003C;
-parameter val_debug_dap_rom__ROMENTRY15 = 32'h00000000;
-parameter mask_debug_dap_rom__ROMENTRY15 = 32'hFFFFFFFF;
-
-parameter debug_dap_rom__PERIPHID4 = 32'hF8800FD0;
-parameter val_debug_dap_rom__PERIPHID4 = 32'h00000003;
-parameter mask_debug_dap_rom__PERIPHID4 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID5 = 32'hF8800FD4;
-parameter val_debug_dap_rom__PERIPHID5 = 32'h00000000;
-parameter mask_debug_dap_rom__PERIPHID5 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID6 = 32'hF8800FD8;
-parameter val_debug_dap_rom__PERIPHID6 = 32'h00000000;
-parameter mask_debug_dap_rom__PERIPHID6 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID7 = 32'hF8800FDC;
-parameter val_debug_dap_rom__PERIPHID7 = 32'h00000000;
-parameter mask_debug_dap_rom__PERIPHID7 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID0 = 32'hF8800FE0;
-parameter val_debug_dap_rom__PERIPHID0 = 32'h000000B2;
-parameter mask_debug_dap_rom__PERIPHID0 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID1 = 32'hF8800FE4;
-parameter val_debug_dap_rom__PERIPHID1 = 32'h00000093;
-parameter mask_debug_dap_rom__PERIPHID1 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID2 = 32'hF8800FE8;
-parameter val_debug_dap_rom__PERIPHID2 = 32'h00000008;
-parameter mask_debug_dap_rom__PERIPHID2 = 32'h000000FF;
-
-parameter debug_dap_rom__PERIPHID3 = 32'hF8800FEC;
-parameter val_debug_dap_rom__PERIPHID3 = 32'h00000000;
-parameter mask_debug_dap_rom__PERIPHID3 = 32'h000000FF;
-
-parameter debug_dap_rom__COMPID0 = 32'hF8800FF0;
-parameter val_debug_dap_rom__COMPID0 = 32'h0000000D;
-parameter mask_debug_dap_rom__COMPID0 = 32'h000000FF;
-
-parameter debug_dap_rom__COMPID1 = 32'hF8800FF4;
-parameter val_debug_dap_rom__COMPID1 = 32'h00000010;
-parameter mask_debug_dap_rom__COMPID1 = 32'h000000FF;
-
-parameter debug_dap_rom__COMPID2 = 32'hF8800FF8;
-parameter val_debug_dap_rom__COMPID2 = 32'h00000005;
-parameter mask_debug_dap_rom__COMPID2 = 32'h000000FF;
-
-parameter debug_dap_rom__COMPID3 = 32'hF8800FFC;
-parameter val_debug_dap_rom__COMPID3 = 32'h000000B1;
-parameter mask_debug_dap_rom__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_etb etb
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_etb__RDP = 32'hF8801004;
-parameter val_debug_etb__RDP = 32'h00000400;
-parameter mask_debug_etb__RDP = 32'hFFFFFFFF;
-
-parameter debug_etb__STS = 32'hF880100C;
-parameter val_debug_etb__STS = 32'h00000000;
-parameter mask_debug_etb__STS = 32'h0000000F;
-
-parameter debug_etb__RRD = 32'hF8801010;
-parameter val_debug_etb__RRD = 32'h00000000;
-parameter mask_debug_etb__RRD = 32'hFFFFFFFF;
-
-parameter debug_etb__RRP = 32'hF8801014;
-parameter val_debug_etb__RRP = 32'h00000000;
-parameter mask_debug_etb__RRP = 32'h000003FF;
-
-parameter debug_etb__RWP = 32'hF8801018;
-parameter val_debug_etb__RWP = 32'h00000000;
-parameter mask_debug_etb__RWP = 32'h000003FF;
-
-parameter debug_etb__TRG = 32'hF880101C;
-parameter val_debug_etb__TRG = 32'h00000000;
-parameter mask_debug_etb__TRG = 32'h000003FF;
-
-parameter debug_etb__CTL = 32'hF8801020;
-parameter val_debug_etb__CTL = 32'h00000000;
-parameter mask_debug_etb__CTL = 32'h00000001;
-
-parameter debug_etb__RWD = 32'hF8801024;
-parameter val_debug_etb__RWD = 32'h00000000;
-parameter mask_debug_etb__RWD = 32'hFFFFFFFF;
-
-parameter debug_etb__FFSR = 32'hF8801300;
-parameter val_debug_etb__FFSR = 32'h00000000;
-parameter mask_debug_etb__FFSR = 32'h00000003;
-
-parameter debug_etb__FFCR = 32'hF8801304;
-parameter val_debug_etb__FFCR = 32'h00000200;
-parameter mask_debug_etb__FFCR = 32'h00003FFF;
-
-parameter debug_etb__ITMISCOP0 = 32'hF8801EE0;
-parameter val_debug_etb__ITMISCOP0 = 32'h00000000;
-parameter mask_debug_etb__ITMISCOP0 = 32'h00000003;
-
-parameter debug_etb__ITTRFLINACK = 32'hF8801EE4;
-parameter val_debug_etb__ITTRFLINACK = 32'h00000000;
-parameter mask_debug_etb__ITTRFLINACK = 32'h00000003;
-
-parameter debug_etb__ITTRFLIN = 32'hF8801EE8;
-parameter val_debug_etb__ITTRFLIN = 32'h00000000;
-parameter mask_debug_etb__ITTRFLIN = 32'h00000003;
-
-parameter debug_etb__ITATBDATA0 = 32'hF8801EEC;
-parameter val_debug_etb__ITATBDATA0 = 32'h00000000;
-parameter mask_debug_etb__ITATBDATA0 = 32'h0000001F;
-
-parameter debug_etb__ITATBCTR2 = 32'hF8801EF0;
-parameter val_debug_etb__ITATBCTR2 = 32'h00000000;
-parameter mask_debug_etb__ITATBCTR2 = 32'h00000003;
-
-parameter debug_etb__ITATBCTR1 = 32'hF8801EF4;
-parameter val_debug_etb__ITATBCTR1 = 32'h00000000;
-parameter mask_debug_etb__ITATBCTR1 = 32'h0000007F;
-
-parameter debug_etb__ITATBCTR0 = 32'hF8801EF8;
-parameter val_debug_etb__ITATBCTR0 = 32'h00000000;
-parameter mask_debug_etb__ITATBCTR0 = 32'h000003FF;
-
-parameter debug_etb__IMCR = 32'hF8801F00;
-parameter val_debug_etb__IMCR = 32'h00000000;
-parameter mask_debug_etb__IMCR = 32'h00000001;
-
-parameter debug_etb__CTSR = 32'hF8801FA0;
-parameter val_debug_etb__CTSR = 32'h0000000F;
-parameter mask_debug_etb__CTSR = 32'h0000000F;
-
-parameter debug_etb__CTCR = 32'hF8801FA4;
-parameter val_debug_etb__CTCR = 32'h00000000;
-parameter mask_debug_etb__CTCR = 32'h0000000F;
-
-parameter debug_etb__LAR = 32'hF8801FB0;
-parameter val_debug_etb__LAR = 32'h00000000;
-parameter mask_debug_etb__LAR = 32'hFFFFFFFF;
-
-parameter debug_etb__LSR = 32'hF8801FB4;
-parameter val_debug_etb__LSR = 32'h00000003;
-parameter mask_debug_etb__LSR = 32'h00000007;
-
-parameter debug_etb__ASR = 32'hF8801FB8;
-parameter val_debug_etb__ASR = 32'h00000000;
-parameter mask_debug_etb__ASR = 32'h000000FF;
-
-parameter debug_etb__DEVID = 32'hF8801FC8;
-parameter val_debug_etb__DEVID = 32'h00000000;
-parameter mask_debug_etb__DEVID = 32'h0000003F;
-
-parameter debug_etb__DTIR = 32'hF8801FCC;
-parameter val_debug_etb__DTIR = 32'h00000021;
-parameter mask_debug_etb__DTIR = 32'h000000FF;
-
-parameter debug_etb__PERIPHID4 = 32'hF8801FD0;
-parameter val_debug_etb__PERIPHID4 = 32'h00000004;
-parameter mask_debug_etb__PERIPHID4 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID5 = 32'hF8801FD4;
-parameter val_debug_etb__PERIPHID5 = 32'h00000000;
-parameter mask_debug_etb__PERIPHID5 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID6 = 32'hF8801FD8;
-parameter val_debug_etb__PERIPHID6 = 32'h00000000;
-parameter mask_debug_etb__PERIPHID6 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID7 = 32'hF8801FDC;
-parameter val_debug_etb__PERIPHID7 = 32'h00000000;
-parameter mask_debug_etb__PERIPHID7 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID0 = 32'hF8801FE0;
-parameter val_debug_etb__PERIPHID0 = 32'h00000007;
-parameter mask_debug_etb__PERIPHID0 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID1 = 32'hF8801FE4;
-parameter val_debug_etb__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_etb__PERIPHID1 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID2 = 32'hF8801FE8;
-parameter val_debug_etb__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_etb__PERIPHID2 = 32'h000000FF;
-
-parameter debug_etb__PERIPHID3 = 32'hF8801FEC;
-parameter val_debug_etb__PERIPHID3 = 32'h00000000;
-parameter mask_debug_etb__PERIPHID3 = 32'h000000FF;
-
-parameter debug_etb__COMPID0 = 32'hF8801FF0;
-parameter val_debug_etb__COMPID0 = 32'h0000000D;
-parameter mask_debug_etb__COMPID0 = 32'h000000FF;
-
-parameter debug_etb__COMPID1 = 32'hF8801FF4;
-parameter val_debug_etb__COMPID1 = 32'h00000090;
-parameter mask_debug_etb__COMPID1 = 32'h000000FF;
-
-parameter debug_etb__COMPID2 = 32'hF8801FF8;
-parameter val_debug_etb__COMPID2 = 32'h00000005;
-parameter mask_debug_etb__COMPID2 = 32'h000000FF;
-
-parameter debug_etb__COMPID3 = 32'hF8801FFC;
-parameter val_debug_etb__COMPID3 = 32'h000000B1;
-parameter mask_debug_etb__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_ftm ftm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_ftm__FTMGLBCTRL = 32'hF880B000;
-parameter val_debug_ftm__FTMGLBCTRL = 32'h00000000;
-parameter mask_debug_ftm__FTMGLBCTRL = 32'h00000001;
-
-parameter debug_ftm__FTMSTATUS = 32'hF880B004;
-parameter val_debug_ftm__FTMSTATUS = 32'h00000082;
-parameter mask_debug_ftm__FTMSTATUS = 32'h000000FF;
-
-parameter debug_ftm__FTMCONTROL = 32'hF880B008;
-parameter val_debug_ftm__FTMCONTROL = 32'h00000000;
-parameter mask_debug_ftm__FTMCONTROL = 32'h00000007;
-
-parameter debug_ftm__FTMP2FDBG0 = 32'hF880B00C;
-parameter val_debug_ftm__FTMP2FDBG0 = 32'h00000000;
-parameter mask_debug_ftm__FTMP2FDBG0 = 32'h000000FF;
-
-parameter debug_ftm__FTMP2FDBG1 = 32'hF880B010;
-parameter val_debug_ftm__FTMP2FDBG1 = 32'h00000000;
-parameter mask_debug_ftm__FTMP2FDBG1 = 32'h000000FF;
-
-parameter debug_ftm__FTMP2FDBG2 = 32'hF880B014;
-parameter val_debug_ftm__FTMP2FDBG2 = 32'h00000000;
-parameter mask_debug_ftm__FTMP2FDBG2 = 32'h000000FF;
-
-parameter debug_ftm__FTMP2FDBG3 = 32'hF880B018;
-parameter val_debug_ftm__FTMP2FDBG3 = 32'h00000000;
-parameter mask_debug_ftm__FTMP2FDBG3 = 32'h000000FF;
-
-parameter debug_ftm__FTMF2PDBG0 = 32'hF880B01C;
-parameter val_debug_ftm__FTMF2PDBG0 = 32'h00000000;
-parameter mask_debug_ftm__FTMF2PDBG0 = 32'h000000FF;
-
-parameter debug_ftm__FTMF2PDBG1 = 32'hF880B020;
-parameter val_debug_ftm__FTMF2PDBG1 = 32'h00000000;
-parameter mask_debug_ftm__FTMF2PDBG1 = 32'h000000FF;
-
-parameter debug_ftm__FTMF2PDBG2 = 32'hF880B024;
-parameter val_debug_ftm__FTMF2PDBG2 = 32'h00000000;
-parameter mask_debug_ftm__FTMF2PDBG2 = 32'h000000FF;
-
-parameter debug_ftm__FTMF2PDBG3 = 32'hF880B028;
-parameter val_debug_ftm__FTMF2PDBG3 = 32'h00000000;
-parameter mask_debug_ftm__FTMF2PDBG3 = 32'h000000FF;
-
-parameter debug_ftm__CYCOUNTPRE = 32'hF880B02C;
-parameter val_debug_ftm__CYCOUNTPRE = 32'h00000000;
-parameter mask_debug_ftm__CYCOUNTPRE = 32'h0000000F;
-
-parameter debug_ftm__FTMSYNCRELOAD = 32'hF880B030;
-parameter val_debug_ftm__FTMSYNCRELOAD = 32'h00000000;
-parameter mask_debug_ftm__FTMSYNCRELOAD = 32'h00000FFF;
-
-parameter debug_ftm__FTMSYNCCOUT = 32'hF880B034;
-parameter val_debug_ftm__FTMSYNCCOUT = 32'h00000000;
-parameter mask_debug_ftm__FTMSYNCCOUT = 32'h00000FFF;
-
-parameter debug_ftm__FTMATID = 32'hF880B400;
-parameter val_debug_ftm__FTMATID = 32'h00000000;
-parameter mask_debug_ftm__FTMATID = 32'h0000007F;
-
-parameter debug_ftm__FTMITTRIGOUTACK = 32'hF880BED0;
-parameter val_debug_ftm__FTMITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_ftm__FTMITTRIGOUTACK = 32'h0000000F;
-
-parameter debug_ftm__FTMITTRIGGER = 32'hF880BED4;
-parameter val_debug_ftm__FTMITTRIGGER = 32'h00000000;
-parameter mask_debug_ftm__FTMITTRIGGER = 32'h0000000F;
-
-parameter debug_ftm__FTMITTRACEDIS = 32'hF880BED8;
-parameter val_debug_ftm__FTMITTRACEDIS = 32'h00000000;
-parameter mask_debug_ftm__FTMITTRACEDIS = 32'h00000001;
-
-parameter debug_ftm__FTMITCYCCOUNT = 32'hF880BEDC;
-parameter val_debug_ftm__FTMITCYCCOUNT = 32'h00000001;
-parameter mask_debug_ftm__FTMITCYCCOUNT = 32'hFFFFFFFF;
-
-parameter debug_ftm__FTMITATBDATA0 = 32'hF880BEEC;
-parameter val_debug_ftm__FTMITATBDATA0 = 32'h00000000;
-parameter mask_debug_ftm__FTMITATBDATA0 = 32'h0000001F;
-
-parameter debug_ftm__FTMITATBCTR2 = 32'hF880BEF0;
-parameter val_debug_ftm__FTMITATBCTR2 = 32'h00000001;
-parameter mask_debug_ftm__FTMITATBCTR2 = 32'h00000003;
-
-parameter debug_ftm__FTMITATBCTR1 = 32'hF880BEF4;
-parameter val_debug_ftm__FTMITATBCTR1 = 32'h00000000;
-parameter mask_debug_ftm__FTMITATBCTR1 = 32'h0000007F;
-
-parameter debug_ftm__FTMITATBCTR0 = 32'hF880BEF8;
-parameter val_debug_ftm__FTMITATBCTR0 = 32'h00000000;
-parameter mask_debug_ftm__FTMITATBCTR0 = 32'h000003FF;
-
-parameter debug_ftm__FTMITCR = 32'hF880BF00;
-parameter val_debug_ftm__FTMITCR = 32'h00000000;
-parameter mask_debug_ftm__FTMITCR = 32'h00000001;
-
-parameter debug_ftm__CLAIMTAGSET = 32'hF880BFA0;
-parameter val_debug_ftm__CLAIMTAGSET = 32'h000000FF;
-parameter mask_debug_ftm__CLAIMTAGSET = 32'h000000FF;
-
-parameter debug_ftm__CLAIMTAGCLR = 32'hF880BFA4;
-parameter val_debug_ftm__CLAIMTAGCLR = 32'h000000FF;
-parameter mask_debug_ftm__CLAIMTAGCLR = 32'h000000FF;
-
-parameter debug_ftm__LOCK_ACCESS = 32'hF880BFB0;
-parameter val_debug_ftm__LOCK_ACCESS = 32'h00000000;
-parameter mask_debug_ftm__LOCK_ACCESS = 32'hFFFFFFFF;
-
-parameter debug_ftm__LOCK_STATUS = 32'hF880BFB4;
-parameter val_debug_ftm__LOCK_STATUS = 32'h00000003;
-parameter mask_debug_ftm__LOCK_STATUS = 32'h00000007;
-
-parameter debug_ftm__FTMAUTHSTATUS = 32'hF880BFB8;
-parameter val_debug_ftm__FTMAUTHSTATUS = 32'h00000088;
-parameter mask_debug_ftm__FTMAUTHSTATUS = 32'h000000FF;
-
-parameter debug_ftm__FTMDEVID = 32'hF880BFC8;
-parameter val_debug_ftm__FTMDEVID = 32'h00000000;
-parameter mask_debug_ftm__FTMDEVID = 32'h00000001;
-
-parameter debug_ftm__FTMDEV_TYPE = 32'hF880BFCC;
-parameter val_debug_ftm__FTMDEV_TYPE = 32'h00000033;
-parameter mask_debug_ftm__FTMDEV_TYPE = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID4 = 32'hF880BFD0;
-parameter val_debug_ftm__FTMPERIPHID4 = 32'h00000000;
-parameter mask_debug_ftm__FTMPERIPHID4 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID5 = 32'hF880BFD4;
-parameter val_debug_ftm__FTMPERIPHID5 = 32'h00000000;
-parameter mask_debug_ftm__FTMPERIPHID5 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID6 = 32'hF880BFD8;
-parameter val_debug_ftm__FTMPERIPHID6 = 32'h00000000;
-parameter mask_debug_ftm__FTMPERIPHID6 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID7 = 32'hF880BFDC;
-parameter val_debug_ftm__FTMPERIPHID7 = 32'h00000000;
-parameter mask_debug_ftm__FTMPERIPHID7 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID0 = 32'hF880BFE0;
-parameter val_debug_ftm__FTMPERIPHID0 = 32'h00000001;
-parameter mask_debug_ftm__FTMPERIPHID0 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID1 = 32'hF880BFE4;
-parameter val_debug_ftm__FTMPERIPHID1 = 32'h00000090;
-parameter mask_debug_ftm__FTMPERIPHID1 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID2 = 32'hF880BFE8;
-parameter val_debug_ftm__FTMPERIPHID2 = 32'h0000000C;
-parameter mask_debug_ftm__FTMPERIPHID2 = 32'h000000FF;
-
-parameter debug_ftm__FTMPERIPHID3 = 32'hF880BFEC;
-parameter val_debug_ftm__FTMPERIPHID3 = 32'h00000000;
-parameter mask_debug_ftm__FTMPERIPHID3 = 32'h000000FF;
-
-parameter debug_ftm__FTMCOMPONID0 = 32'hF880BFF0;
-parameter val_debug_ftm__FTMCOMPONID0 = 32'h0000000D;
-parameter mask_debug_ftm__FTMCOMPONID0 = 32'h000000FF;
-
-parameter debug_ftm__FTMCOMPONID1 = 32'hF880BFF4;
-parameter val_debug_ftm__FTMCOMPONID1 = 32'h00000090;
-parameter mask_debug_ftm__FTMCOMPONID1 = 32'h000000FF;
-
-parameter debug_ftm__FTMCOMPONID2 = 32'hF880BFF8;
-parameter val_debug_ftm__FTMCOMPONID2 = 32'h00000005;
-parameter mask_debug_ftm__FTMCOMPONID2 = 32'h000000FF;
-
-parameter debug_ftm__FTMCOMPONID3 = 32'hF880BFFC;
-parameter val_debug_ftm__FTMCOMPONID3 = 32'h000000B1;
-parameter mask_debug_ftm__FTMCOMPONID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_funnel funnel
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_funnel__Control = 32'hF8804000;
-parameter val_debug_funnel__Control = 32'h00000300;
-parameter mask_debug_funnel__Control = 32'h00000FFF;
-
-parameter debug_funnel__PriControl = 32'hF8804004;
-parameter val_debug_funnel__PriControl = 32'h00FAC688;
-parameter mask_debug_funnel__PriControl = 32'h00FFFFFF;
-
-parameter debug_funnel__ITATBDATA0 = 32'hF8804EEC;
-parameter val_debug_funnel__ITATBDATA0 = 32'h00000000;
-parameter mask_debug_funnel__ITATBDATA0 = 32'h0000001F;
-
-parameter debug_funnel__ITATBCTR2 = 32'hF8804EF0;
-parameter val_debug_funnel__ITATBCTR2 = 32'h00000000;
-parameter mask_debug_funnel__ITATBCTR2 = 32'h00000003;
-
-parameter debug_funnel__ITATBCTR1 = 32'hF8804EF4;
-parameter val_debug_funnel__ITATBCTR1 = 32'h00000000;
-parameter mask_debug_funnel__ITATBCTR1 = 32'h0000007F;
-
-parameter debug_funnel__ITATBCTR0 = 32'hF8804EF8;
-parameter val_debug_funnel__ITATBCTR0 = 32'h00000000;
-parameter mask_debug_funnel__ITATBCTR0 = 32'h000003FF;
-
-parameter debug_funnel__IMCR = 32'hF8804F00;
-parameter val_debug_funnel__IMCR = 32'h00000000;
-parameter mask_debug_funnel__IMCR = 32'h00000001;
-
-parameter debug_funnel__CTSR = 32'hF8804FA0;
-parameter val_debug_funnel__CTSR = 32'h0000000F;
-parameter mask_debug_funnel__CTSR = 32'h0000000F;
-
-parameter debug_funnel__CTCR = 32'hF8804FA4;
-parameter val_debug_funnel__CTCR = 32'h00000000;
-parameter mask_debug_funnel__CTCR = 32'h0000000F;
-
-parameter debug_funnel__LAR = 32'hF8804FB0;
-parameter val_debug_funnel__LAR = 32'h00000000;
-parameter mask_debug_funnel__LAR = 32'hFFFFFFFF;
-
-parameter debug_funnel__LSR = 32'hF8804FB4;
-parameter val_debug_funnel__LSR = 32'h00000003;
-parameter mask_debug_funnel__LSR = 32'h00000007;
-
-parameter debug_funnel__ASR = 32'hF8804FB8;
-parameter val_debug_funnel__ASR = 32'h00000000;
-parameter mask_debug_funnel__ASR = 32'h000000FF;
-
-parameter debug_funnel__DEVID = 32'hF8804FC8;
-parameter val_debug_funnel__DEVID = 32'h00000028;
-parameter mask_debug_funnel__DEVID = 32'h000000FF;
-
-parameter debug_funnel__DTIR = 32'hF8804FCC;
-parameter val_debug_funnel__DTIR = 32'h00000012;
-parameter mask_debug_funnel__DTIR = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID4 = 32'hF8804FD0;
-parameter val_debug_funnel__PERIPHID4 = 32'h00000004;
-parameter mask_debug_funnel__PERIPHID4 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID5 = 32'hF8804FD4;
-parameter val_debug_funnel__PERIPHID5 = 32'h00000000;
-parameter mask_debug_funnel__PERIPHID5 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID6 = 32'hF8804FD8;
-parameter val_debug_funnel__PERIPHID6 = 32'h00000000;
-parameter mask_debug_funnel__PERIPHID6 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID7 = 32'hF8804FDC;
-parameter val_debug_funnel__PERIPHID7 = 32'h00000000;
-parameter mask_debug_funnel__PERIPHID7 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID0 = 32'hF8804FE0;
-parameter val_debug_funnel__PERIPHID0 = 32'h00000008;
-parameter mask_debug_funnel__PERIPHID0 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID1 = 32'hF8804FE4;
-parameter val_debug_funnel__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_funnel__PERIPHID1 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID2 = 32'hF8804FE8;
-parameter val_debug_funnel__PERIPHID2 = 32'h0000001B;
-parameter mask_debug_funnel__PERIPHID2 = 32'h000000FF;
-
-parameter debug_funnel__PERIPHID3 = 32'hF8804FEC;
-parameter val_debug_funnel__PERIPHID3 = 32'h00000000;
-parameter mask_debug_funnel__PERIPHID3 = 32'h000000FF;
-
-parameter debug_funnel__COMPID0 = 32'hF8804FF0;
-parameter val_debug_funnel__COMPID0 = 32'h0000000D;
-parameter mask_debug_funnel__COMPID0 = 32'h000000FF;
-
-parameter debug_funnel__COMPID1 = 32'hF8804FF4;
-parameter val_debug_funnel__COMPID1 = 32'h00000090;
-parameter mask_debug_funnel__COMPID1 = 32'h000000FF;
-
-parameter debug_funnel__COMPID2 = 32'hF8804FF8;
-parameter val_debug_funnel__COMPID2 = 32'h00000005;
-parameter mask_debug_funnel__COMPID2 = 32'h000000FF;
-
-parameter debug_funnel__COMPID3 = 32'hF8804FFC;
-parameter val_debug_funnel__COMPID3 = 32'h000000B1;
-parameter mask_debug_funnel__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_itm itm
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_itm__StimPort00 = 32'hF8805000;
-parameter val_debug_itm__StimPort00 = 32'h00000000;
-parameter mask_debug_itm__StimPort00 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort01 = 32'hF8805004;
-parameter val_debug_itm__StimPort01 = 32'h00000000;
-parameter mask_debug_itm__StimPort01 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort02 = 32'hF8805008;
-parameter val_debug_itm__StimPort02 = 32'h00000000;
-parameter mask_debug_itm__StimPort02 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort03 = 32'hF880500C;
-parameter val_debug_itm__StimPort03 = 32'h00000000;
-parameter mask_debug_itm__StimPort03 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort04 = 32'hF8805010;
-parameter val_debug_itm__StimPort04 = 32'h00000000;
-parameter mask_debug_itm__StimPort04 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort05 = 32'hF8805014;
-parameter val_debug_itm__StimPort05 = 32'h00000000;
-parameter mask_debug_itm__StimPort05 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort06 = 32'hF8805018;
-parameter val_debug_itm__StimPort06 = 32'h00000000;
-parameter mask_debug_itm__StimPort06 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort07 = 32'hF880501C;
-parameter val_debug_itm__StimPort07 = 32'h00000000;
-parameter mask_debug_itm__StimPort07 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort08 = 32'hF8805020;
-parameter val_debug_itm__StimPort08 = 32'h00000000;
-parameter mask_debug_itm__StimPort08 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort09 = 32'hF8805024;
-parameter val_debug_itm__StimPort09 = 32'h00000000;
-parameter mask_debug_itm__StimPort09 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort10 = 32'hF8805028;
-parameter val_debug_itm__StimPort10 = 32'h00000000;
-parameter mask_debug_itm__StimPort10 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort11 = 32'hF880502C;
-parameter val_debug_itm__StimPort11 = 32'h00000000;
-parameter mask_debug_itm__StimPort11 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort12 = 32'hF8805030;
-parameter val_debug_itm__StimPort12 = 32'h00000000;
-parameter mask_debug_itm__StimPort12 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort13 = 32'hF8805034;
-parameter val_debug_itm__StimPort13 = 32'h00000000;
-parameter mask_debug_itm__StimPort13 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort14 = 32'hF8805038;
-parameter val_debug_itm__StimPort14 = 32'h00000000;
-parameter mask_debug_itm__StimPort14 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort15 = 32'hF880503C;
-parameter val_debug_itm__StimPort15 = 32'h00000000;
-parameter mask_debug_itm__StimPort15 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort16 = 32'hF8805040;
-parameter val_debug_itm__StimPort16 = 32'h00000000;
-parameter mask_debug_itm__StimPort16 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort17 = 32'hF8805044;
-parameter val_debug_itm__StimPort17 = 32'h00000000;
-parameter mask_debug_itm__StimPort17 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort18 = 32'hF8805048;
-parameter val_debug_itm__StimPort18 = 32'h00000000;
-parameter mask_debug_itm__StimPort18 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort19 = 32'hF880504C;
-parameter val_debug_itm__StimPort19 = 32'h00000000;
-parameter mask_debug_itm__StimPort19 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort20 = 32'hF8805050;
-parameter val_debug_itm__StimPort20 = 32'h00000000;
-parameter mask_debug_itm__StimPort20 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort21 = 32'hF8805054;
-parameter val_debug_itm__StimPort21 = 32'h00000000;
-parameter mask_debug_itm__StimPort21 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort22 = 32'hF8805058;
-parameter val_debug_itm__StimPort22 = 32'h00000000;
-parameter mask_debug_itm__StimPort22 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort23 = 32'hF880505C;
-parameter val_debug_itm__StimPort23 = 32'h00000000;
-parameter mask_debug_itm__StimPort23 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort24 = 32'hF8805060;
-parameter val_debug_itm__StimPort24 = 32'h00000000;
-parameter mask_debug_itm__StimPort24 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort25 = 32'hF8805064;
-parameter val_debug_itm__StimPort25 = 32'h00000000;
-parameter mask_debug_itm__StimPort25 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort26 = 32'hF8805068;
-parameter val_debug_itm__StimPort26 = 32'h00000000;
-parameter mask_debug_itm__StimPort26 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort27 = 32'hF880506C;
-parameter val_debug_itm__StimPort27 = 32'h00000000;
-parameter mask_debug_itm__StimPort27 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort28 = 32'hF8805070;
-parameter val_debug_itm__StimPort28 = 32'h00000000;
-parameter mask_debug_itm__StimPort28 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort29 = 32'hF8805074;
-parameter val_debug_itm__StimPort29 = 32'h00000000;
-parameter mask_debug_itm__StimPort29 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort30 = 32'hF8805078;
-parameter val_debug_itm__StimPort30 = 32'h00000000;
-parameter mask_debug_itm__StimPort30 = 32'hFFFFFFFF;
-
-parameter debug_itm__StimPort31 = 32'hF880507C;
-parameter val_debug_itm__StimPort31 = 32'h00000000;
-parameter mask_debug_itm__StimPort31 = 32'hFFFFFFFF;
-
-parameter debug_itm__TER = 32'hF8805E00;
-parameter val_debug_itm__TER = 32'h00000000;
-parameter mask_debug_itm__TER = 32'hFFFFFFFF;
-
-parameter debug_itm__TTR = 32'hF8805E20;
-parameter val_debug_itm__TTR = 32'h00000000;
-parameter mask_debug_itm__TTR = 32'hFFFFFFFF;
-
-parameter debug_itm__CR = 32'hF8805E80;
-parameter val_debug_itm__CR = 32'h00000004;
-parameter mask_debug_itm__CR = 32'h00FFFFFF;
-
-parameter debug_itm__SCR = 32'hF8805E90;
-parameter val_debug_itm__SCR = 32'h00000400;
-parameter mask_debug_itm__SCR = 32'h00000FFF;
-
-parameter debug_itm__ITTRIGOUTACK = 32'hF8805EE4;
-parameter val_debug_itm__ITTRIGOUTACK = 32'h00000000;
-parameter mask_debug_itm__ITTRIGOUTACK = 32'h00000001;
-
-parameter debug_itm__ITTRIGOUT = 32'hF8805EE8;
-parameter val_debug_itm__ITTRIGOUT = 32'h00000000;
-parameter mask_debug_itm__ITTRIGOUT = 32'h00000001;
-
-parameter debug_itm__ITATBDATA0 = 32'hF8805EEC;
-parameter val_debug_itm__ITATBDATA0 = 32'h00000000;
-parameter mask_debug_itm__ITATBDATA0 = 32'h00000003;
-
-parameter debug_itm__ITATBCTR2 = 32'hF8805EF0;
-parameter val_debug_itm__ITATBCTR2 = 32'h00000001;
-parameter mask_debug_itm__ITATBCTR2 = 32'h00000001;
-
-parameter debug_itm__ITATABCTR1 = 32'hF8805EF4;
-parameter val_debug_itm__ITATABCTR1 = 32'h00000000;
-parameter mask_debug_itm__ITATABCTR1 = 32'h0000007F;
-
-parameter debug_itm__ITATBCTR0 = 32'hF8805EF8;
-parameter val_debug_itm__ITATBCTR0 = 32'h00000000;
-parameter mask_debug_itm__ITATBCTR0 = 32'h00000003;
-
-parameter debug_itm__IMCR = 32'hF8805F00;
-parameter val_debug_itm__IMCR = 32'h00000000;
-parameter mask_debug_itm__IMCR = 32'h00000001;
-
-parameter debug_itm__CTSR = 32'hF8805FA0;
-parameter val_debug_itm__CTSR = 32'h000000FF;
-parameter mask_debug_itm__CTSR = 32'h000000FF;
-
-parameter debug_itm__CTCR = 32'hF8805FA4;
-parameter val_debug_itm__CTCR = 32'h00000000;
-parameter mask_debug_itm__CTCR = 32'h000000FF;
-
-parameter debug_itm__LAR = 32'hF8805FB0;
-parameter val_debug_itm__LAR = 32'h00000000;
-parameter mask_debug_itm__LAR = 32'hFFFFFFFF;
-
-parameter debug_itm__LSR = 32'hF8805FB4;
-parameter val_debug_itm__LSR = 32'h00000003;
-parameter mask_debug_itm__LSR = 32'h00000007;
-
-parameter debug_itm__ASR = 32'hF8805FB8;
-parameter val_debug_itm__ASR = 32'h00000088;
-parameter mask_debug_itm__ASR = 32'h000000FF;
-
-parameter debug_itm__DEVID = 32'hF8805FC8;
-parameter val_debug_itm__DEVID = 32'h00000020;
-parameter mask_debug_itm__DEVID = 32'h00001FFF;
-
-parameter debug_itm__DTIR = 32'hF8805FCC;
-parameter val_debug_itm__DTIR = 32'h00000043;
-parameter mask_debug_itm__DTIR = 32'h000000FF;
-
-parameter debug_itm__PERIPHID4 = 32'hF8805FD0;
-parameter val_debug_itm__PERIPHID4 = 32'h00000004;
-parameter mask_debug_itm__PERIPHID4 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID5 = 32'hF8805FD4;
-parameter val_debug_itm__PERIPHID5 = 32'h00000000;
-parameter mask_debug_itm__PERIPHID5 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID6 = 32'hF8805FD8;
-parameter val_debug_itm__PERIPHID6 = 32'h00000000;
-parameter mask_debug_itm__PERIPHID6 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID7 = 32'hF8805FDC;
-parameter val_debug_itm__PERIPHID7 = 32'h00000000;
-parameter mask_debug_itm__PERIPHID7 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID0 = 32'hF8805FE0;
-parameter val_debug_itm__PERIPHID0 = 32'h00000013;
-parameter mask_debug_itm__PERIPHID0 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID1 = 32'hF8805FE4;
-parameter val_debug_itm__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_itm__PERIPHID1 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID2 = 32'hF8805FE8;
-parameter val_debug_itm__PERIPHID2 = 32'h0000002B;
-parameter mask_debug_itm__PERIPHID2 = 32'h000000FF;
-
-parameter debug_itm__PERIPHID3 = 32'hF8805FEC;
-parameter val_debug_itm__PERIPHID3 = 32'h00000000;
-parameter mask_debug_itm__PERIPHID3 = 32'h000000FF;
-
-parameter debug_itm__COMPID0 = 32'hF8805FF0;
-parameter val_debug_itm__COMPID0 = 32'h0000000D;
-parameter mask_debug_itm__COMPID0 = 32'h000000FF;
-
-parameter debug_itm__COMPID1 = 32'hF8805FF4;
-parameter val_debug_itm__COMPID1 = 32'h00000090;
-parameter mask_debug_itm__COMPID1 = 32'h000000FF;
-
-parameter debug_itm__COMPID2 = 32'hF8805FF8;
-parameter val_debug_itm__COMPID2 = 32'h00000005;
-parameter mask_debug_itm__COMPID2 = 32'h000000FF;
-
-parameter debug_itm__COMPID3 = 32'hF8805FFC;
-parameter val_debug_itm__COMPID3 = 32'h000000B1;
-parameter mask_debug_itm__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module debug_tpiu tpiu
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter debug_tpiu__SuppSize = 32'hF8803000;
-parameter val_debug_tpiu__SuppSize = 32'hFFFFFFFF;
-parameter mask_debug_tpiu__SuppSize = 32'hFFFFFFFF;
-
-parameter debug_tpiu__CurrentSize = 32'hF8803004;
-parameter val_debug_tpiu__CurrentSize = 32'h00000001;
-parameter mask_debug_tpiu__CurrentSize = 32'hFFFFFFFF;
-
-parameter debug_tpiu__SuppTrigMode = 32'hF8803100;
-parameter val_debug_tpiu__SuppTrigMode = 32'h0000011F;
-parameter mask_debug_tpiu__SuppTrigMode = 32'h0003FFFF;
-
-parameter debug_tpiu__TrigCount = 32'hF8803104;
-parameter val_debug_tpiu__TrigCount = 32'h00000000;
-parameter mask_debug_tpiu__TrigCount = 32'h000000FF;
-
-parameter debug_tpiu__TrigMult = 32'hF8803108;
-parameter val_debug_tpiu__TrigMult = 32'h00000000;
-parameter mask_debug_tpiu__TrigMult = 32'h0000001F;
-
-parameter debug_tpiu__SuppTest = 32'hF8803200;
-parameter val_debug_tpiu__SuppTest = 32'h0003000F;
-parameter mask_debug_tpiu__SuppTest = 32'h0003FFFF;
-
-parameter debug_tpiu__CurrentTest = 32'hF8803204;
-parameter val_debug_tpiu__CurrentTest = 32'h00000000;
-parameter mask_debug_tpiu__CurrentTest = 32'h0003FFFF;
-
-parameter debug_tpiu__TestRepeatCount = 32'hF8803208;
-parameter val_debug_tpiu__TestRepeatCount = 32'h00000000;
-parameter mask_debug_tpiu__TestRepeatCount = 32'h000000FF;
-
-parameter debug_tpiu__FFSR = 32'hF8803300;
-parameter val_debug_tpiu__FFSR = 32'h00000006;
-parameter mask_debug_tpiu__FFSR = 32'h00000007;
-
-parameter debug_tpiu__FFCR = 32'hF8803304;
-parameter val_debug_tpiu__FFCR = 32'h00000000;
-parameter mask_debug_tpiu__FFCR = 32'h00003FFF;
-
-parameter debug_tpiu__FormatSyncCount = 32'hF8803308;
-parameter val_debug_tpiu__FormatSyncCount = 32'h00000040;
-parameter mask_debug_tpiu__FormatSyncCount = 32'h00000FFF;
-
-parameter debug_tpiu__EXTCTLIn = 32'hF8803400;
-parameter val_debug_tpiu__EXTCTLIn = 32'h00000000;
-parameter mask_debug_tpiu__EXTCTLIn = 32'h000000FF;
-
-parameter debug_tpiu__EXTCTLOut = 32'hF8803404;
-parameter val_debug_tpiu__EXTCTLOut = 32'h00000000;
-parameter mask_debug_tpiu__EXTCTLOut = 32'h000000FF;
-
-parameter debug_tpiu__ITTRFLINACK = 32'hF8803EE4;
-parameter val_debug_tpiu__ITTRFLINACK = 32'h00000000;
-parameter mask_debug_tpiu__ITTRFLINACK = 32'h00000003;
-
-parameter debug_tpiu__ITTRFLIN = 32'hF8803EE8;
-parameter val_debug_tpiu__ITTRFLIN = 32'h00000000;
-parameter mask_debug_tpiu__ITTRFLIN = 32'h00000000;
-
-parameter debug_tpiu__ITATBDATA0 = 32'hF8803EEC;
-parameter val_debug_tpiu__ITATBDATA0 = 32'h00000000;
-parameter mask_debug_tpiu__ITATBDATA0 = 32'h00000000;
-
-parameter debug_tpiu__ITATBCTR2 = 32'hF8803EF0;
-parameter val_debug_tpiu__ITATBCTR2 = 32'h00000000;
-parameter mask_debug_tpiu__ITATBCTR2 = 32'h00000003;
-
-parameter debug_tpiu__ITATBCTR1 = 32'hF8803EF4;
-parameter val_debug_tpiu__ITATBCTR1 = 32'h00000000;
-parameter mask_debug_tpiu__ITATBCTR1 = 32'h00000000;
-
-parameter debug_tpiu__ITATBCTR0 = 32'hF8803EF8;
-parameter val_debug_tpiu__ITATBCTR0 = 32'h00000000;
-parameter mask_debug_tpiu__ITATBCTR0 = 32'h00000000;
-
-parameter debug_tpiu__IMCR = 32'hF8803F00;
-parameter val_debug_tpiu__IMCR = 32'h00000000;
-parameter mask_debug_tpiu__IMCR = 32'h00000001;
-
-parameter debug_tpiu__CTSR = 32'hF8803FA0;
-parameter val_debug_tpiu__CTSR = 32'h0000000F;
-parameter mask_debug_tpiu__CTSR = 32'h0000000F;
-
-parameter debug_tpiu__CTCR = 32'hF8803FA4;
-parameter val_debug_tpiu__CTCR = 32'h00000000;
-parameter mask_debug_tpiu__CTCR = 32'h0000000F;
-
-parameter debug_tpiu__LAR = 32'hF8803FB0;
-parameter val_debug_tpiu__LAR = 32'h00000000;
-parameter mask_debug_tpiu__LAR = 32'hFFFFFFFF;
-
-parameter debug_tpiu__LSR = 32'hF8803FB4;
-parameter val_debug_tpiu__LSR = 32'h00000003;
-parameter mask_debug_tpiu__LSR = 32'h00000007;
-
-parameter debug_tpiu__ASR = 32'hF8803FB8;
-parameter val_debug_tpiu__ASR = 32'h00000000;
-parameter mask_debug_tpiu__ASR = 32'h000000FF;
-
-parameter debug_tpiu__DEVID = 32'hF8803FC8;
-parameter val_debug_tpiu__DEVID = 32'h000000A0;
-parameter mask_debug_tpiu__DEVID = 32'h00000FFF;
-
-parameter debug_tpiu__DTIR = 32'hF8803FCC;
-parameter val_debug_tpiu__DTIR = 32'h00000011;
-parameter mask_debug_tpiu__DTIR = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID4 = 32'hF8803FD0;
-parameter val_debug_tpiu__PERIPHID4 = 32'h00000004;
-parameter mask_debug_tpiu__PERIPHID4 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID5 = 32'hF8803FD4;
-parameter val_debug_tpiu__PERIPHID5 = 32'h00000000;
-parameter mask_debug_tpiu__PERIPHID5 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID6 = 32'hF8803FD8;
-parameter val_debug_tpiu__PERIPHID6 = 32'h00000000;
-parameter mask_debug_tpiu__PERIPHID6 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID7 = 32'hF8803FDC;
-parameter val_debug_tpiu__PERIPHID7 = 32'h00000000;
-parameter mask_debug_tpiu__PERIPHID7 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID0 = 32'hF8803FE0;
-parameter val_debug_tpiu__PERIPHID0 = 32'h00000012;
-parameter mask_debug_tpiu__PERIPHID0 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID1 = 32'hF8803FE4;
-parameter val_debug_tpiu__PERIPHID1 = 32'h000000B9;
-parameter mask_debug_tpiu__PERIPHID1 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID2 = 32'hF8803FE8;
-parameter val_debug_tpiu__PERIPHID2 = 32'h0000004B;
-parameter mask_debug_tpiu__PERIPHID2 = 32'h000000FF;
-
-parameter debug_tpiu__PERIPHID3 = 32'hF8803FEC;
-parameter val_debug_tpiu__PERIPHID3 = 32'h00000000;
-parameter mask_debug_tpiu__PERIPHID3 = 32'h000000FF;
-
-parameter debug_tpiu__COMPID0 = 32'hF8803FF0;
-parameter val_debug_tpiu__COMPID0 = 32'h0000000D;
-parameter mask_debug_tpiu__COMPID0 = 32'h000000FF;
-
-parameter debug_tpiu__COMPID1 = 32'hF8803FF4;
-parameter val_debug_tpiu__COMPID1 = 32'h00000090;
-parameter mask_debug_tpiu__COMPID1 = 32'h000000FF;
-
-parameter debug_tpiu__COMPID2 = 32'hF8803FF8;
-parameter val_debug_tpiu__COMPID2 = 32'h00000005;
-parameter mask_debug_tpiu__COMPID2 = 32'h000000FF;
-
-parameter debug_tpiu__COMPID3 = 32'hF8803FFC;
-parameter val_debug_tpiu__COMPID3 = 32'h000000B1;
-parameter mask_debug_tpiu__COMPID3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module devcfg devcfg
-// doc version: 1.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter devcfg__CTRL = 32'hF8007000;
-parameter val_devcfg__CTRL = 32'h0C000000;
-parameter mask_devcfg__CTRL = 32'hFFFFFFFF;
-
-parameter devcfg__LOCK = 32'hF8007004;
-parameter val_devcfg__LOCK = 32'h00000000;
-parameter mask_devcfg__LOCK = 32'hFFFFFFFF;
-
-parameter devcfg__CFG = 32'hF8007008;
-parameter val_devcfg__CFG = 32'h0000050B;
-parameter mask_devcfg__CFG = 32'hFFFFFFFF;
-
-parameter devcfg__INT_STS = 32'hF800700C;
-parameter val_devcfg__INT_STS = 32'h00000000;
-parameter mask_devcfg__INT_STS = 32'hFFFFFFFF;
-
-parameter devcfg__INT_MASK = 32'hF8007010;
-parameter val_devcfg__INT_MASK = 32'hFFFFFFFF;
-parameter mask_devcfg__INT_MASK = 32'hFFFFFFFF;
-
-parameter devcfg__STATUS = 32'hF8007014;
-parameter val_devcfg__STATUS = 32'h40000820;
-parameter mask_devcfg__STATUS = 32'hFFFFFFFF;
-
-parameter devcfg__DMA_SRC_ADDR = 32'hF8007018;
-parameter val_devcfg__DMA_SRC_ADDR = 32'h00000000;
-parameter mask_devcfg__DMA_SRC_ADDR = 32'hFFFFFFFF;
-
-parameter devcfg__DMA_DST_ADDR = 32'hF800701C;
-parameter val_devcfg__DMA_DST_ADDR = 32'h00000000;
-parameter mask_devcfg__DMA_DST_ADDR = 32'hFFFFFFFF;
-
-parameter devcfg__DMA_SRC_LEN = 32'hF8007020;
-parameter val_devcfg__DMA_SRC_LEN = 32'h00000000;
-parameter mask_devcfg__DMA_SRC_LEN = 32'hFFFFFFFF;
-
-parameter devcfg__DMA_DEST_LEN = 32'hF8007024;
-parameter val_devcfg__DMA_DEST_LEN = 32'h00000000;
-parameter mask_devcfg__DMA_DEST_LEN = 32'hFFFFFFFF;
-
-parameter devcfg__ROM_SHADOW = 32'hF8007028;
-parameter val_devcfg__ROM_SHADOW = 32'h00000000;
-parameter mask_devcfg__ROM_SHADOW = 32'hFFFFFFFF;
-
-parameter devcfg__MULTIBOOT_ADDR = 32'hF800702C;
-parameter val_devcfg__MULTIBOOT_ADDR = 32'h00000000;
-parameter mask_devcfg__MULTIBOOT_ADDR = 32'hFFFFFFFF;
-
-parameter devcfg__SW_ID = 32'hF8007030;
-parameter val_devcfg__SW_ID = 32'h00000000;
-parameter mask_devcfg__SW_ID = 32'hFFFFFFFF;
-
-parameter devcfg__UNLOCK = 32'hF8007034;
-parameter val_devcfg__UNLOCK = 32'h00000000;
-parameter mask_devcfg__UNLOCK = 32'hFFFFFFFF;
-
-parameter devcfg__MCTRL = 32'hF8007080;
-parameter val_devcfg__MCTRL = 32'h00800000;
-parameter mask_devcfg__MCTRL = 32'h0FFFFFFF;
-
-parameter devcfg__XADCIF_CFG = 32'hF8007100;
-parameter val_devcfg__XADCIF_CFG = 32'h00001114;
-parameter mask_devcfg__XADCIF_CFG = 32'hFFFFFFFF;
-
-parameter devcfg__XADCIF_INT_STS = 32'hF8007104;
-parameter val_devcfg__XADCIF_INT_STS = 32'h00000200;
-parameter mask_devcfg__XADCIF_INT_STS = 32'hFFFFFFFF;
-
-parameter devcfg__XADCIF_INT_MASK = 32'hF8007108;
-parameter val_devcfg__XADCIF_INT_MASK = 32'hFFFFFFFF;
-parameter mask_devcfg__XADCIF_INT_MASK = 32'hFFFFFFFF;
-
-parameter devcfg__XADCIF_MSTS = 32'hF800710C;
-parameter val_devcfg__XADCIF_MSTS = 32'h00000500;
-parameter mask_devcfg__XADCIF_MSTS = 32'hFFFFFFFF;
-
-parameter devcfg__XADCIF_CMDFIFO = 32'hF8007110;
-parameter val_devcfg__XADCIF_CMDFIFO = 32'h00000000;
-parameter mask_devcfg__XADCIF_CMDFIFO = 32'hFFFFFFFF;
-
-parameter devcfg__XADCIF_RDFIFO = 32'hF8007114;
-parameter val_devcfg__XADCIF_RDFIFO = 32'h00000000;
-parameter mask_devcfg__XADCIF_RDFIFO = 32'hFFFFFFFF;
-
-parameter devcfg__XADCIF_MCTL = 32'hF8007118;
-parameter val_devcfg__XADCIF_MCTL = 32'h00000010;
-parameter mask_devcfg__XADCIF_MCTL = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module dmac0_ns dmac
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter dmac0_ns__DSR = 32'hF8004000;
-parameter val_dmac0_ns__DSR = 32'h00000000;
-parameter mask_dmac0_ns__DSR = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DPC = 32'hF8004004;
-parameter val_dmac0_ns__DPC = 32'h00000000;
-parameter mask_dmac0_ns__DPC = 32'hFFFFFFFF;
-
-parameter dmac0_ns__INTEN = 32'hF8004020;
-parameter val_dmac0_ns__INTEN = 32'h00000000;
-parameter mask_dmac0_ns__INTEN = 32'hFFFFFFFF;
-
-parameter dmac0_ns__INT_EVENT_RIS = 32'hF8004024;
-parameter val_dmac0_ns__INT_EVENT_RIS = 32'h00000000;
-parameter mask_dmac0_ns__INT_EVENT_RIS = 32'hFFFFFFFF;
-
-parameter dmac0_ns__INTMIS = 32'hF8004028;
-parameter val_dmac0_ns__INTMIS = 32'h00000000;
-parameter mask_dmac0_ns__INTMIS = 32'hFFFFFFFF;
-
-parameter dmac0_ns__INTCLR = 32'hF800402C;
-parameter val_dmac0_ns__INTCLR = 32'h00000000;
-parameter mask_dmac0_ns__INTCLR = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FSRD = 32'hF8004030;
-parameter val_dmac0_ns__FSRD = 32'h00000000;
-parameter mask_dmac0_ns__FSRD = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FSRC = 32'hF8004034;
-parameter val_dmac0_ns__FSRC = 32'h00000000;
-parameter mask_dmac0_ns__FSRC = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTRD = 32'hF8004038;
-parameter val_dmac0_ns__FTRD = 32'h00000000;
-parameter mask_dmac0_ns__FTRD = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR0 = 32'hF8004040;
-parameter val_dmac0_ns__FTR0 = 32'h00000000;
-parameter mask_dmac0_ns__FTR0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR1 = 32'hF8004044;
-parameter val_dmac0_ns__FTR1 = 32'h00000000;
-parameter mask_dmac0_ns__FTR1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR2 = 32'hF8004048;
-parameter val_dmac0_ns__FTR2 = 32'h00000000;
-parameter mask_dmac0_ns__FTR2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR3 = 32'hF800404C;
-parameter val_dmac0_ns__FTR3 = 32'h00000000;
-parameter mask_dmac0_ns__FTR3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR4 = 32'hF8004050;
-parameter val_dmac0_ns__FTR4 = 32'h00000000;
-parameter mask_dmac0_ns__FTR4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR5 = 32'hF8004054;
-parameter val_dmac0_ns__FTR5 = 32'h00000000;
-parameter mask_dmac0_ns__FTR5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR6 = 32'hF8004058;
-parameter val_dmac0_ns__FTR6 = 32'h00000000;
-parameter mask_dmac0_ns__FTR6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__FTR7 = 32'hF800405C;
-parameter val_dmac0_ns__FTR7 = 32'h00000000;
-parameter mask_dmac0_ns__FTR7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR0 = 32'hF8004100;
-parameter val_dmac0_ns__CSR0 = 32'h00000000;
-parameter mask_dmac0_ns__CSR0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC0 = 32'hF8004104;
-parameter val_dmac0_ns__CPC0 = 32'h00000000;
-parameter mask_dmac0_ns__CPC0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR1 = 32'hF8004108;
-parameter val_dmac0_ns__CSR1 = 32'h00000000;
-parameter mask_dmac0_ns__CSR1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC1 = 32'hF800410C;
-parameter val_dmac0_ns__CPC1 = 32'h00000000;
-parameter mask_dmac0_ns__CPC1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR2 = 32'hF8004110;
-parameter val_dmac0_ns__CSR2 = 32'h00000000;
-parameter mask_dmac0_ns__CSR2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC2 = 32'hF8004114;
-parameter val_dmac0_ns__CPC2 = 32'h00000000;
-parameter mask_dmac0_ns__CPC2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR3 = 32'hF8004118;
-parameter val_dmac0_ns__CSR3 = 32'h00000000;
-parameter mask_dmac0_ns__CSR3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC3 = 32'hF800411C;
-parameter val_dmac0_ns__CPC3 = 32'h00000000;
-parameter mask_dmac0_ns__CPC3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR4 = 32'hF8004120;
-parameter val_dmac0_ns__CSR4 = 32'h00000000;
-parameter mask_dmac0_ns__CSR4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC4 = 32'hF8004124;
-parameter val_dmac0_ns__CPC4 = 32'h00000000;
-parameter mask_dmac0_ns__CPC4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR5 = 32'hF8004128;
-parameter val_dmac0_ns__CSR5 = 32'h00000000;
-parameter mask_dmac0_ns__CSR5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC5 = 32'hF800412C;
-parameter val_dmac0_ns__CPC5 = 32'h00000000;
-parameter mask_dmac0_ns__CPC5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR6 = 32'hF8004130;
-parameter val_dmac0_ns__CSR6 = 32'h00000000;
-parameter mask_dmac0_ns__CSR6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC6 = 32'hF8004134;
-parameter val_dmac0_ns__CPC6 = 32'h00000000;
-parameter mask_dmac0_ns__CPC6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CSR7 = 32'hF8004138;
-parameter val_dmac0_ns__CSR7 = 32'h00000000;
-parameter mask_dmac0_ns__CSR7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CPC7 = 32'hF800413C;
-parameter val_dmac0_ns__CPC7 = 32'h00000000;
-parameter mask_dmac0_ns__CPC7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR0 = 32'hF8004400;
-parameter val_dmac0_ns__SAR0 = 32'h00000000;
-parameter mask_dmac0_ns__SAR0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR0 = 32'hF8004404;
-parameter val_dmac0_ns__DAR0 = 32'h00000000;
-parameter mask_dmac0_ns__DAR0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR0 = 32'hF8004408;
-parameter val_dmac0_ns__CCR0 = 32'h00000000;
-parameter mask_dmac0_ns__CCR0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_0 = 32'hF800440C;
-parameter val_dmac0_ns__LC0_0 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_0 = 32'hF8004410;
-parameter val_dmac0_ns__LC1_0 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR1 = 32'hF8004420;
-parameter val_dmac0_ns__SAR1 = 32'h00000000;
-parameter mask_dmac0_ns__SAR1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR1 = 32'hF8004424;
-parameter val_dmac0_ns__DAR1 = 32'h00000000;
-parameter mask_dmac0_ns__DAR1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR1 = 32'hF8004428;
-parameter val_dmac0_ns__CCR1 = 32'h00000000;
-parameter mask_dmac0_ns__CCR1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_1 = 32'hF800442C;
-parameter val_dmac0_ns__LC0_1 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_1 = 32'hF8004430;
-parameter val_dmac0_ns__LC1_1 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR2 = 32'hF8004440;
-parameter val_dmac0_ns__SAR2 = 32'h00000000;
-parameter mask_dmac0_ns__SAR2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR2 = 32'hF8004444;
-parameter val_dmac0_ns__DAR2 = 32'h00000000;
-parameter mask_dmac0_ns__DAR2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR2 = 32'hF8004448;
-parameter val_dmac0_ns__CCR2 = 32'h00000000;
-parameter mask_dmac0_ns__CCR2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_2 = 32'hF800444C;
-parameter val_dmac0_ns__LC0_2 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_2 = 32'hF8004450;
-parameter val_dmac0_ns__LC1_2 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR3 = 32'hF8004460;
-parameter val_dmac0_ns__SAR3 = 32'h00000000;
-parameter mask_dmac0_ns__SAR3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR3 = 32'hF8004464;
-parameter val_dmac0_ns__DAR3 = 32'h00000000;
-parameter mask_dmac0_ns__DAR3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR3 = 32'hF8004468;
-parameter val_dmac0_ns__CCR3 = 32'h00000000;
-parameter mask_dmac0_ns__CCR3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_3 = 32'hF800446C;
-parameter val_dmac0_ns__LC0_3 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_3 = 32'hF8004470;
-parameter val_dmac0_ns__LC1_3 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR4 = 32'hF8004480;
-parameter val_dmac0_ns__SAR4 = 32'h00000000;
-parameter mask_dmac0_ns__SAR4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR4 = 32'hF8004484;
-parameter val_dmac0_ns__DAR4 = 32'h00000000;
-parameter mask_dmac0_ns__DAR4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR4 = 32'hF8004488;
-parameter val_dmac0_ns__CCR4 = 32'h00000000;
-parameter mask_dmac0_ns__CCR4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_4 = 32'hF800448C;
-parameter val_dmac0_ns__LC0_4 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_4 = 32'hF8004490;
-parameter val_dmac0_ns__LC1_4 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR5 = 32'hF80044A0;
-parameter val_dmac0_ns__SAR5 = 32'h00000000;
-parameter mask_dmac0_ns__SAR5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR5 = 32'hF80044A4;
-parameter val_dmac0_ns__DAR5 = 32'h00000000;
-parameter mask_dmac0_ns__DAR5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR5 = 32'hF80044A8;
-parameter val_dmac0_ns__CCR5 = 32'h00000000;
-parameter mask_dmac0_ns__CCR5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_5 = 32'hF80044AC;
-parameter val_dmac0_ns__LC0_5 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_5 = 32'hF80044B0;
-parameter val_dmac0_ns__LC1_5 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_5 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR6 = 32'hF80044C0;
-parameter val_dmac0_ns__SAR6 = 32'h00000000;
-parameter mask_dmac0_ns__SAR6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR6 = 32'hF80044C4;
-parameter val_dmac0_ns__DAR6 = 32'h00000000;
-parameter mask_dmac0_ns__DAR6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR6 = 32'hF80044C8;
-parameter val_dmac0_ns__CCR6 = 32'h00000000;
-parameter mask_dmac0_ns__CCR6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_6 = 32'hF80044CC;
-parameter val_dmac0_ns__LC0_6 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_6 = 32'hF80044D0;
-parameter val_dmac0_ns__LC1_6 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_6 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__SAR7 = 32'hF80044E0;
-parameter val_dmac0_ns__SAR7 = 32'h00000000;
-parameter mask_dmac0_ns__SAR7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DAR7 = 32'hF80044E4;
-parameter val_dmac0_ns__DAR7 = 32'h00000000;
-parameter mask_dmac0_ns__DAR7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CCR7 = 32'hF80044E8;
-parameter val_dmac0_ns__CCR7 = 32'h00000000;
-parameter mask_dmac0_ns__CCR7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC0_7 = 32'hF80044EC;
-parameter val_dmac0_ns__LC0_7 = 32'h00000000;
-parameter mask_dmac0_ns__LC0_7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__LC1_7 = 32'hF80044F0;
-parameter val_dmac0_ns__LC1_7 = 32'h00000000;
-parameter mask_dmac0_ns__LC1_7 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DBGSTATUS = 32'hF8004D00;
-parameter val_dmac0_ns__DBGSTATUS = 32'h00000000;
-parameter mask_dmac0_ns__DBGSTATUS = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DBGCMD = 32'hF8004D04;
-parameter val_dmac0_ns__DBGCMD = 32'h00000000;
-parameter mask_dmac0_ns__DBGCMD = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DBGINST0 = 32'hF8004D08;
-parameter val_dmac0_ns__DBGINST0 = 32'h00000000;
-parameter mask_dmac0_ns__DBGINST0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__DBGINST1 = 32'hF8004D0C;
-parameter val_dmac0_ns__DBGINST1 = 32'h00000000;
-parameter mask_dmac0_ns__DBGINST1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CR0 = 32'hF8004E00;
-parameter val_dmac0_ns__CR0 = 32'h00000000;
-parameter mask_dmac0_ns__CR0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CR1 = 32'hF8004E04;
-parameter val_dmac0_ns__CR1 = 32'h00000000;
-parameter mask_dmac0_ns__CR1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CR2 = 32'hF8004E08;
-parameter val_dmac0_ns__CR2 = 32'h00000000;
-parameter mask_dmac0_ns__CR2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CR3 = 32'hF8004E0C;
-parameter val_dmac0_ns__CR3 = 32'h00000000;
-parameter mask_dmac0_ns__CR3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CR4 = 32'hF8004E10;
-parameter val_dmac0_ns__CR4 = 32'h00000000;
-parameter mask_dmac0_ns__CR4 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__CRD = 32'hF8004E14;
-parameter val_dmac0_ns__CRD = 32'h00000000;
-parameter mask_dmac0_ns__CRD = 32'hFFFFFFFF;
-
-parameter dmac0_ns__WD = 32'hF8004E80;
-parameter val_dmac0_ns__WD = 32'h00000000;
-parameter mask_dmac0_ns__WD = 32'hFFFFFFFF;
-
-parameter dmac0_ns__periph_id_0 = 32'hF8004FE0;
-parameter val_dmac0_ns__periph_id_0 = 32'h00000000;
-parameter mask_dmac0_ns__periph_id_0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__periph_id_1 = 32'hF8004FE4;
-parameter val_dmac0_ns__periph_id_1 = 32'h00000000;
-parameter mask_dmac0_ns__periph_id_1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__periph_id_2 = 32'hF8004FE8;
-parameter val_dmac0_ns__periph_id_2 = 32'h00000000;
-parameter mask_dmac0_ns__periph_id_2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__periph_id_3 = 32'hF8004FEC;
-parameter val_dmac0_ns__periph_id_3 = 32'h00000000;
-parameter mask_dmac0_ns__periph_id_3 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__pcell_id_0 = 32'hF8004FF0;
-parameter val_dmac0_ns__pcell_id_0 = 32'h00000000;
-parameter mask_dmac0_ns__pcell_id_0 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__pcell_id_1 = 32'hF8004FF4;
-parameter val_dmac0_ns__pcell_id_1 = 32'h00000000;
-parameter mask_dmac0_ns__pcell_id_1 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__pcell_id_2 = 32'hF8004FF8;
-parameter val_dmac0_ns__pcell_id_2 = 32'h00000000;
-parameter mask_dmac0_ns__pcell_id_2 = 32'hFFFFFFFF;
-
-parameter dmac0_ns__pcell_id_3 = 32'hF8004FFC;
-parameter val_dmac0_ns__pcell_id_3 = 32'h00000000;
-parameter mask_dmac0_ns__pcell_id_3 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module dmac0_s dmac
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter dmac0_s__DSR = 32'hF8003000;
-parameter val_dmac0_s__DSR = 32'h00000000;
-parameter mask_dmac0_s__DSR = 32'hFFFFFFFF;
-
-parameter dmac0_s__DPC = 32'hF8003004;
-parameter val_dmac0_s__DPC = 32'h00000000;
-parameter mask_dmac0_s__DPC = 32'hFFFFFFFF;
-
-parameter dmac0_s__INTEN = 32'hF8003020;
-parameter val_dmac0_s__INTEN = 32'h00000000;
-parameter mask_dmac0_s__INTEN = 32'hFFFFFFFF;
-
-parameter dmac0_s__INT_EVENT_RIS = 32'hF8003024;
-parameter val_dmac0_s__INT_EVENT_RIS = 32'h00000000;
-parameter mask_dmac0_s__INT_EVENT_RIS = 32'hFFFFFFFF;
-
-parameter dmac0_s__INTMIS = 32'hF8003028;
-parameter val_dmac0_s__INTMIS = 32'h00000000;
-parameter mask_dmac0_s__INTMIS = 32'hFFFFFFFF;
-
-parameter dmac0_s__INTCLR = 32'hF800302C;
-parameter val_dmac0_s__INTCLR = 32'h00000000;
-parameter mask_dmac0_s__INTCLR = 32'hFFFFFFFF;
-
-parameter dmac0_s__FSRD = 32'hF8003030;
-parameter val_dmac0_s__FSRD = 32'h00000000;
-parameter mask_dmac0_s__FSRD = 32'hFFFFFFFF;
-
-parameter dmac0_s__FSRC = 32'hF8003034;
-parameter val_dmac0_s__FSRC = 32'h00000000;
-parameter mask_dmac0_s__FSRC = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTRD = 32'hF8003038;
-parameter val_dmac0_s__FTRD = 32'h00000000;
-parameter mask_dmac0_s__FTRD = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR0 = 32'hF8003040;
-parameter val_dmac0_s__FTR0 = 32'h00000000;
-parameter mask_dmac0_s__FTR0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR1 = 32'hF8003044;
-parameter val_dmac0_s__FTR1 = 32'h00000000;
-parameter mask_dmac0_s__FTR1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR2 = 32'hF8003048;
-parameter val_dmac0_s__FTR2 = 32'h00000000;
-parameter mask_dmac0_s__FTR2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR3 = 32'hF800304C;
-parameter val_dmac0_s__FTR3 = 32'h00000000;
-parameter mask_dmac0_s__FTR3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR4 = 32'hF8003050;
-parameter val_dmac0_s__FTR4 = 32'h00000000;
-parameter mask_dmac0_s__FTR4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR5 = 32'hF8003054;
-parameter val_dmac0_s__FTR5 = 32'h00000000;
-parameter mask_dmac0_s__FTR5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR6 = 32'hF8003058;
-parameter val_dmac0_s__FTR6 = 32'h00000000;
-parameter mask_dmac0_s__FTR6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__FTR7 = 32'hF800305C;
-parameter val_dmac0_s__FTR7 = 32'h00000000;
-parameter mask_dmac0_s__FTR7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR0 = 32'hF8003100;
-parameter val_dmac0_s__CSR0 = 32'h00000000;
-parameter mask_dmac0_s__CSR0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC0 = 32'hF8003104;
-parameter val_dmac0_s__CPC0 = 32'h00000000;
-parameter mask_dmac0_s__CPC0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR1 = 32'hF8003108;
-parameter val_dmac0_s__CSR1 = 32'h00000000;
-parameter mask_dmac0_s__CSR1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC1 = 32'hF800310C;
-parameter val_dmac0_s__CPC1 = 32'h00000000;
-parameter mask_dmac0_s__CPC1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR2 = 32'hF8003110;
-parameter val_dmac0_s__CSR2 = 32'h00000000;
-parameter mask_dmac0_s__CSR2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC2 = 32'hF8003114;
-parameter val_dmac0_s__CPC2 = 32'h00000000;
-parameter mask_dmac0_s__CPC2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR3 = 32'hF8003118;
-parameter val_dmac0_s__CSR3 = 32'h00000000;
-parameter mask_dmac0_s__CSR3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC3 = 32'hF800311C;
-parameter val_dmac0_s__CPC3 = 32'h00000000;
-parameter mask_dmac0_s__CPC3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR4 = 32'hF8003120;
-parameter val_dmac0_s__CSR4 = 32'h00000000;
-parameter mask_dmac0_s__CSR4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC4 = 32'hF8003124;
-parameter val_dmac0_s__CPC4 = 32'h00000000;
-parameter mask_dmac0_s__CPC4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR5 = 32'hF8003128;
-parameter val_dmac0_s__CSR5 = 32'h00000000;
-parameter mask_dmac0_s__CSR5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC5 = 32'hF800312C;
-parameter val_dmac0_s__CPC5 = 32'h00000000;
-parameter mask_dmac0_s__CPC5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR6 = 32'hF8003130;
-parameter val_dmac0_s__CSR6 = 32'h00000000;
-parameter mask_dmac0_s__CSR6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC6 = 32'hF8003134;
-parameter val_dmac0_s__CPC6 = 32'h00000000;
-parameter mask_dmac0_s__CPC6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CSR7 = 32'hF8003138;
-parameter val_dmac0_s__CSR7 = 32'h00000000;
-parameter mask_dmac0_s__CSR7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CPC7 = 32'hF800313C;
-parameter val_dmac0_s__CPC7 = 32'h00000000;
-parameter mask_dmac0_s__CPC7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR0 = 32'hF8003400;
-parameter val_dmac0_s__SAR0 = 32'h00000000;
-parameter mask_dmac0_s__SAR0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR0 = 32'hF8003404;
-parameter val_dmac0_s__DAR0 = 32'h00000000;
-parameter mask_dmac0_s__DAR0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR0 = 32'hF8003408;
-parameter val_dmac0_s__CCR0 = 32'h00800200;
-parameter mask_dmac0_s__CCR0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_0 = 32'hF800340C;
-parameter val_dmac0_s__LC0_0 = 32'h00000000;
-parameter mask_dmac0_s__LC0_0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_0 = 32'hF8003410;
-parameter val_dmac0_s__LC1_0 = 32'h00000000;
-parameter mask_dmac0_s__LC1_0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR1 = 32'hF8003420;
-parameter val_dmac0_s__SAR1 = 32'h00000000;
-parameter mask_dmac0_s__SAR1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR1 = 32'hF8003424;
-parameter val_dmac0_s__DAR1 = 32'h00000000;
-parameter mask_dmac0_s__DAR1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR1 = 32'hF8003428;
-parameter val_dmac0_s__CCR1 = 32'h00800200;
-parameter mask_dmac0_s__CCR1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_1 = 32'hF800342C;
-parameter val_dmac0_s__LC0_1 = 32'h00000000;
-parameter mask_dmac0_s__LC0_1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_1 = 32'hF8003430;
-parameter val_dmac0_s__LC1_1 = 32'h00000000;
-parameter mask_dmac0_s__LC1_1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR2 = 32'hF8003440;
-parameter val_dmac0_s__SAR2 = 32'h00000000;
-parameter mask_dmac0_s__SAR2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR2 = 32'hF8003444;
-parameter val_dmac0_s__DAR2 = 32'h00000000;
-parameter mask_dmac0_s__DAR2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR2 = 32'hF8003448;
-parameter val_dmac0_s__CCR2 = 32'h00800200;
-parameter mask_dmac0_s__CCR2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_2 = 32'hF800344C;
-parameter val_dmac0_s__LC0_2 = 32'h00000000;
-parameter mask_dmac0_s__LC0_2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_2 = 32'hF8003450;
-parameter val_dmac0_s__LC1_2 = 32'h00000000;
-parameter mask_dmac0_s__LC1_2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR3 = 32'hF8003460;
-parameter val_dmac0_s__SAR3 = 32'h00000000;
-parameter mask_dmac0_s__SAR3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR3 = 32'hF8003464;
-parameter val_dmac0_s__DAR3 = 32'h00000000;
-parameter mask_dmac0_s__DAR3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR3 = 32'hF8003468;
-parameter val_dmac0_s__CCR3 = 32'h00800200;
-parameter mask_dmac0_s__CCR3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_3 = 32'hF800346C;
-parameter val_dmac0_s__LC0_3 = 32'h00000000;
-parameter mask_dmac0_s__LC0_3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_3 = 32'hF8003470;
-parameter val_dmac0_s__LC1_3 = 32'h00000000;
-parameter mask_dmac0_s__LC1_3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR4 = 32'hF8003480;
-parameter val_dmac0_s__SAR4 = 32'h00000000;
-parameter mask_dmac0_s__SAR4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR4 = 32'hF8003484;
-parameter val_dmac0_s__DAR4 = 32'h00000000;
-parameter mask_dmac0_s__DAR4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR4 = 32'hF8003488;
-parameter val_dmac0_s__CCR4 = 32'h00800200;
-parameter mask_dmac0_s__CCR4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_4 = 32'hF800348C;
-parameter val_dmac0_s__LC0_4 = 32'h00000000;
-parameter mask_dmac0_s__LC0_4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_4 = 32'hF8003490;
-parameter val_dmac0_s__LC1_4 = 32'h00000000;
-parameter mask_dmac0_s__LC1_4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR5 = 32'hF80034A0;
-parameter val_dmac0_s__SAR5 = 32'h00000000;
-parameter mask_dmac0_s__SAR5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR5 = 32'hF80034A4;
-parameter val_dmac0_s__DAR5 = 32'h00000000;
-parameter mask_dmac0_s__DAR5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR5 = 32'hF80034A8;
-parameter val_dmac0_s__CCR5 = 32'h00800200;
-parameter mask_dmac0_s__CCR5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_5 = 32'hF80034AC;
-parameter val_dmac0_s__LC0_5 = 32'h00000000;
-parameter mask_dmac0_s__LC0_5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_5 = 32'hF80034B0;
-parameter val_dmac0_s__LC1_5 = 32'h00000000;
-parameter mask_dmac0_s__LC1_5 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR6 = 32'hF80034C0;
-parameter val_dmac0_s__SAR6 = 32'h00000000;
-parameter mask_dmac0_s__SAR6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR6 = 32'hF80034C4;
-parameter val_dmac0_s__DAR6 = 32'h00000000;
-parameter mask_dmac0_s__DAR6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR6 = 32'hF80034C8;
-parameter val_dmac0_s__CCR6 = 32'h00800200;
-parameter mask_dmac0_s__CCR6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_6 = 32'hF80034CC;
-parameter val_dmac0_s__LC0_6 = 32'h00000000;
-parameter mask_dmac0_s__LC0_6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_6 = 32'hF80034D0;
-parameter val_dmac0_s__LC1_6 = 32'h00000000;
-parameter mask_dmac0_s__LC1_6 = 32'hFFFFFFFF;
-
-parameter dmac0_s__SAR7 = 32'hF80034E0;
-parameter val_dmac0_s__SAR7 = 32'h00000000;
-parameter mask_dmac0_s__SAR7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DAR7 = 32'hF80034E4;
-parameter val_dmac0_s__DAR7 = 32'h00000000;
-parameter mask_dmac0_s__DAR7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CCR7 = 32'hF80034E8;
-parameter val_dmac0_s__CCR7 = 32'h00800200;
-parameter mask_dmac0_s__CCR7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC0_7 = 32'hF80034EC;
-parameter val_dmac0_s__LC0_7 = 32'h00000000;
-parameter mask_dmac0_s__LC0_7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__LC1_7 = 32'hF80034F0;
-parameter val_dmac0_s__LC1_7 = 32'h00000000;
-parameter mask_dmac0_s__LC1_7 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DBGSTATUS = 32'hF8003D00;
-parameter val_dmac0_s__DBGSTATUS = 32'h00000000;
-parameter mask_dmac0_s__DBGSTATUS = 32'hFFFFFFFF;
-
-parameter dmac0_s__DBGCMD = 32'hF8003D04;
-parameter val_dmac0_s__DBGCMD = 32'h00000000;
-parameter mask_dmac0_s__DBGCMD = 32'hFFFFFFFF;
-
-parameter dmac0_s__DBGINST0 = 32'hF8003D08;
-parameter val_dmac0_s__DBGINST0 = 32'h00000000;
-parameter mask_dmac0_s__DBGINST0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__DBGINST1 = 32'hF8003D0C;
-parameter val_dmac0_s__DBGINST1 = 32'h00000000;
-parameter mask_dmac0_s__DBGINST1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CR0 = 32'hF8003E00;
-parameter val_dmac0_s__CR0 = 32'h001E3071;
-parameter mask_dmac0_s__CR0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CR1 = 32'hF8003E04;
-parameter val_dmac0_s__CR1 = 32'h00000074;
-parameter mask_dmac0_s__CR1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CR2 = 32'hF8003E08;
-parameter val_dmac0_s__CR2 = 32'h00000000;
-parameter mask_dmac0_s__CR2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CR3 = 32'hF8003E0C;
-parameter val_dmac0_s__CR3 = 32'h00000000;
-parameter mask_dmac0_s__CR3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CR4 = 32'hF8003E10;
-parameter val_dmac0_s__CR4 = 32'h00000000;
-parameter mask_dmac0_s__CR4 = 32'hFFFFFFFF;
-
-parameter dmac0_s__CRD = 32'hF8003E14;
-parameter val_dmac0_s__CRD = 32'h07FF7F73;
-parameter mask_dmac0_s__CRD = 32'hFFFFFFFF;
-
-parameter dmac0_s__WD = 32'hF8003E80;
-parameter val_dmac0_s__WD = 32'h00000000;
-parameter mask_dmac0_s__WD = 32'hFFFFFFFF;
-
-parameter dmac0_s__periph_id_0 = 32'hF8003FE0;
-parameter val_dmac0_s__periph_id_0 = 32'h00000030;
-parameter mask_dmac0_s__periph_id_0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__periph_id_1 = 32'hF8003FE4;
-parameter val_dmac0_s__periph_id_1 = 32'h00000013;
-parameter mask_dmac0_s__periph_id_1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__periph_id_2 = 32'hF8003FE8;
-parameter val_dmac0_s__periph_id_2 = 32'h00000024;
-parameter mask_dmac0_s__periph_id_2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__periph_id_3 = 32'hF8003FEC;
-parameter val_dmac0_s__periph_id_3 = 32'h00000000;
-parameter mask_dmac0_s__periph_id_3 = 32'hFFFFFFFF;
-
-parameter dmac0_s__pcell_id_0 = 32'hF8003FF0;
-parameter val_dmac0_s__pcell_id_0 = 32'h0000000D;
-parameter mask_dmac0_s__pcell_id_0 = 32'hFFFFFFFF;
-
-parameter dmac0_s__pcell_id_1 = 32'hF8003FF4;
-parameter val_dmac0_s__pcell_id_1 = 32'h000000F0;
-parameter mask_dmac0_s__pcell_id_1 = 32'hFFFFFFFF;
-
-parameter dmac0_s__pcell_id_2 = 32'hF8003FF8;
-parameter val_dmac0_s__pcell_id_2 = 32'h00000005;
-parameter mask_dmac0_s__pcell_id_2 = 32'hFFFFFFFF;
-
-parameter dmac0_s__pcell_id_3 = 32'hF8003FFC;
-parameter val_dmac0_s__pcell_id_3 = 32'h000000B1;
-parameter mask_dmac0_s__pcell_id_3 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module efuse_ctrl efuse_ctrl
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter efuse_ctrl__WR_LOCK = 32'hF800D000;
-parameter val_efuse_ctrl__WR_LOCK = 32'h00000000;
-parameter mask_efuse_ctrl__WR_LOCK = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__WR_UNLOCK = 32'hF800D004;
-parameter val_efuse_ctrl__WR_UNLOCK = 32'h00000000;
-parameter mask_efuse_ctrl__WR_UNLOCK = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__WR_LOCKSTA = 32'hF800D008;
-parameter val_efuse_ctrl__WR_LOCKSTA = 32'h00000001;
-parameter mask_efuse_ctrl__WR_LOCKSTA = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__CFG = 32'hF800D00C;
-parameter val_efuse_ctrl__CFG = 32'h00010F00;
-parameter mask_efuse_ctrl__CFG = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__STATUS = 32'hF800D010;
-parameter val_efuse_ctrl__STATUS = 32'h00100000;
-parameter mask_efuse_ctrl__STATUS = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__CONTROL = 32'hF800D014;
-parameter val_efuse_ctrl__CONTROL = 32'h00000003;
-parameter mask_efuse_ctrl__CONTROL = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__PGM_STBW = 32'hF800D018;
-parameter val_efuse_ctrl__PGM_STBW = 32'h000002D0;
-parameter mask_efuse_ctrl__PGM_STBW = 32'hFFFFFFFF;
-
-parameter efuse_ctrl__RD_STBW = 32'hF800D01C;
-parameter val_efuse_ctrl__RD_STBW = 32'h0000000B;
-parameter mask_efuse_ctrl__RD_STBW = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module gem0 GEM
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gem0__net_ctrl = 32'hE000B000;
-parameter val_gem0__net_ctrl = 32'h00000000;
-parameter mask_gem0__net_ctrl = 32'hFFFFFFFF;
-
-parameter gem0__net_cfg = 32'hE000B004;
-parameter val_gem0__net_cfg = 32'h00080000;
-parameter mask_gem0__net_cfg = 32'hFFFFFFFF;
-
-parameter gem0__net_status = 32'hE000B008;
-parameter val_gem0__net_status = 32'h00000004;
-parameter mask_gem0__net_status = 32'hFFFFFFFD;
-
-parameter gem0__user_io = 32'hE000B00C;
-parameter val_gem0__user_io = 32'h00000000;
-parameter mask_gem0__user_io = 32'h0000FFFF;
-
-parameter gem0__dma_cfg = 32'hE000B010;
-parameter val_gem0__dma_cfg = 32'h00020784;
-parameter mask_gem0__dma_cfg = 32'hFFFFFFFF;
-
-parameter gem0__tx_status = 32'hE000B014;
-parameter val_gem0__tx_status = 32'h00000000;
-parameter mask_gem0__tx_status = 32'hFFFFFFFF;
-
-parameter gem0__rx_qbar = 32'hE000B018;
-parameter val_gem0__rx_qbar = 32'h00000000;
-parameter mask_gem0__rx_qbar = 32'hFFFFFFFF;
-
-parameter gem0__tx_qbar = 32'hE000B01C;
-parameter val_gem0__tx_qbar = 32'h00000000;
-parameter mask_gem0__tx_qbar = 32'hFFFFFFFF;
-
-parameter gem0__rx_status = 32'hE000B020;
-parameter val_gem0__rx_status = 32'h00000000;
-parameter mask_gem0__rx_status = 32'hFFFFFFFF;
-
-parameter gem0__intr_status = 32'hE000B024;
-parameter val_gem0__intr_status = 32'h00000000;
-parameter mask_gem0__intr_status = 32'hFFFFFFFF;
-
-parameter gem0__intr_en = 32'hE000B028;
-parameter val_gem0__intr_en = 32'h00000000;
-parameter mask_gem0__intr_en = 32'h00000000;
-
-parameter gem0__intr_dis = 32'hE000B02C;
-parameter val_gem0__intr_dis = 32'h00000000;
-parameter mask_gem0__intr_dis = 32'h00000000;
-
-parameter gem0__intr_mask = 32'hE000B030;
-parameter val_gem0__intr_mask = 32'h0001FFFF;
-parameter mask_gem0__intr_mask = 32'hFC01FFFF;
-
-parameter gem0__phy_maint = 32'hE000B034;
-parameter val_gem0__phy_maint = 32'h00000000;
-parameter mask_gem0__phy_maint = 32'hFFFFFFFF;
-
-parameter gem0__rx_pauseq = 32'hE000B038;
-parameter val_gem0__rx_pauseq = 32'h00000000;
-parameter mask_gem0__rx_pauseq = 32'hFFFFFFFF;
-
-parameter gem0__tx_pauseq = 32'hE000B03C;
-parameter val_gem0__tx_pauseq = 32'h0000FFFF;
-parameter mask_gem0__tx_pauseq = 32'hFFFFFFFF;
-
-parameter gem0__tx_partial_st_fwd = 32'hE000B040;
-parameter val_gem0__tx_partial_st_fwd = 32'h000003FF;
-parameter mask_gem0__tx_partial_st_fwd = 32'hFFFFFFFF;
-
-parameter gem0__rx_partial_st_fwd = 32'hE000B044;
-parameter val_gem0__rx_partial_st_fwd = 32'h000003FF;
-parameter mask_gem0__rx_partial_st_fwd = 32'hFFFFFFFF;
-
-parameter gem0__hash_bot = 32'hE000B080;
-parameter val_gem0__hash_bot = 32'h00000000;
-parameter mask_gem0__hash_bot = 32'hFFFFFFFF;
-
-parameter gem0__hash_top = 32'hE000B084;
-parameter val_gem0__hash_top = 32'h00000000;
-parameter mask_gem0__hash_top = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr1_bot = 32'hE000B088;
-parameter val_gem0__spec_addr1_bot = 32'h00000000;
-parameter mask_gem0__spec_addr1_bot = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr1_top = 32'hE000B08C;
-parameter val_gem0__spec_addr1_top = 32'h00000000;
-parameter mask_gem0__spec_addr1_top = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr2_bot = 32'hE000B090;
-parameter val_gem0__spec_addr2_bot = 32'h00000000;
-parameter mask_gem0__spec_addr2_bot = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr2_top = 32'hE000B094;
-parameter val_gem0__spec_addr2_top = 32'h00000000;
-parameter mask_gem0__spec_addr2_top = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr3_bot = 32'hE000B098;
-parameter val_gem0__spec_addr3_bot = 32'h00000000;
-parameter mask_gem0__spec_addr3_bot = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr3_top = 32'hE000B09C;
-parameter val_gem0__spec_addr3_top = 32'h00000000;
-parameter mask_gem0__spec_addr3_top = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr4_bot = 32'hE000B0A0;
-parameter val_gem0__spec_addr4_bot = 32'h00000000;
-parameter mask_gem0__spec_addr4_bot = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr4_top = 32'hE000B0A4;
-parameter val_gem0__spec_addr4_top = 32'h00000000;
-parameter mask_gem0__spec_addr4_top = 32'hFFFFFFFF;
-
-parameter gem0__type_id_match1 = 32'hE000B0A8;
-parameter val_gem0__type_id_match1 = 32'h00000000;
-parameter mask_gem0__type_id_match1 = 32'hFFFFFFFF;
-
-parameter gem0__type_id_match2 = 32'hE000B0AC;
-parameter val_gem0__type_id_match2 = 32'h00000000;
-parameter mask_gem0__type_id_match2 = 32'hFFFFFFFF;
-
-parameter gem0__type_id_match3 = 32'hE000B0B0;
-parameter val_gem0__type_id_match3 = 32'h00000000;
-parameter mask_gem0__type_id_match3 = 32'hFFFFFFFF;
-
-parameter gem0__type_id_match4 = 32'hE000B0B4;
-parameter val_gem0__type_id_match4 = 32'h00000000;
-parameter mask_gem0__type_id_match4 = 32'hFFFFFFFF;
-
-parameter gem0__wake_on_lan = 32'hE000B0B8;
-parameter val_gem0__wake_on_lan = 32'h00000000;
-parameter mask_gem0__wake_on_lan = 32'hFFFFFFFF;
-
-parameter gem0__ipg_stretch = 32'hE000B0BC;
-parameter val_gem0__ipg_stretch = 32'h00000000;
-parameter mask_gem0__ipg_stretch = 32'hFFFFFFFF;
-
-parameter gem0__stacked_vlan = 32'hE000B0C0;
-parameter val_gem0__stacked_vlan = 32'h00000000;
-parameter mask_gem0__stacked_vlan = 32'hFFFFFFFF;
-
-parameter gem0__tx_pfc_pause = 32'hE000B0C4;
-parameter val_gem0__tx_pfc_pause = 32'h00000000;
-parameter mask_gem0__tx_pfc_pause = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr1_mask_bot = 32'hE000B0C8;
-parameter val_gem0__spec_addr1_mask_bot = 32'h00000000;
-parameter mask_gem0__spec_addr1_mask_bot = 32'hFFFFFFFF;
-
-parameter gem0__spec_addr1_mask_top = 32'hE000B0CC;
-parameter val_gem0__spec_addr1_mask_top = 32'h00000000;
-parameter mask_gem0__spec_addr1_mask_top = 32'hFFFFFFFF;
-
-parameter gem0__module_id = 32'hE000B0FC;
-parameter val_gem0__module_id = 32'h00020118;
-parameter mask_gem0__module_id = 32'hFFFFFFFF;
-
-parameter gem0__octets_tx_bot = 32'hE000B100;
-parameter val_gem0__octets_tx_bot = 32'h00000000;
-parameter mask_gem0__octets_tx_bot = 32'hFFFFFFFF;
-
-parameter gem0__octets_tx_top = 32'hE000B104;
-parameter val_gem0__octets_tx_top = 32'h00000000;
-parameter mask_gem0__octets_tx_top = 32'hFFFFFFFF;
-
-parameter gem0__frames_tx = 32'hE000B108;
-parameter val_gem0__frames_tx = 32'h00000000;
-parameter mask_gem0__frames_tx = 32'hFFFFFFFF;
-
-parameter gem0__broadcast_frames_tx = 32'hE000B10C;
-parameter val_gem0__broadcast_frames_tx = 32'h00000000;
-parameter mask_gem0__broadcast_frames_tx = 32'hFFFFFFFF;
-
-parameter gem0__multi_frames_tx = 32'hE000B110;
-parameter val_gem0__multi_frames_tx = 32'h00000000;
-parameter mask_gem0__multi_frames_tx = 32'hFFFFFFFF;
-
-parameter gem0__pause_frames_tx = 32'hE000B114;
-parameter val_gem0__pause_frames_tx = 32'h00000000;
-parameter mask_gem0__pause_frames_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_64b_tx = 32'hE000B118;
-parameter val_gem0__frames_64b_tx = 32'h00000000;
-parameter mask_gem0__frames_64b_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_65to127b_tx = 32'hE000B11C;
-parameter val_gem0__frames_65to127b_tx = 32'h00000000;
-parameter mask_gem0__frames_65to127b_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_128to255b_tx = 32'hE000B120;
-parameter val_gem0__frames_128to255b_tx = 32'h00000000;
-parameter mask_gem0__frames_128to255b_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_256to511b_tx = 32'hE000B124;
-parameter val_gem0__frames_256to511b_tx = 32'h00000000;
-parameter mask_gem0__frames_256to511b_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_512to1023b_tx = 32'hE000B128;
-parameter val_gem0__frames_512to1023b_tx = 32'h00000000;
-parameter mask_gem0__frames_512to1023b_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_1024to1518b_tx = 32'hE000B12C;
-parameter val_gem0__frames_1024to1518b_tx = 32'h00000000;
-parameter mask_gem0__frames_1024to1518b_tx = 32'hFFFFFFFF;
-
-parameter gem0__frames_gt1518b_tx = 32'hE000B130;
-parameter val_gem0__frames_gt1518b_tx = 32'h00000000;
-parameter mask_gem0__frames_gt1518b_tx = 32'hFFFFFFFF;
-
-parameter gem0__tx_under_runs = 32'hE000B134;
-parameter val_gem0__tx_under_runs = 32'h00000000;
-parameter mask_gem0__tx_under_runs = 32'hFFFFFFFF;
-
-parameter gem0__single_collisn_frames = 32'hE000B138;
-parameter val_gem0__single_collisn_frames = 32'h00000000;
-parameter mask_gem0__single_collisn_frames = 32'hFFFFFFFF;
-
-parameter gem0__multi_collisn_frames = 32'hE000B13C;
-parameter val_gem0__multi_collisn_frames = 32'h00000000;
-parameter mask_gem0__multi_collisn_frames = 32'hFFFFFFFF;
-
-parameter gem0__excessive_collisns = 32'hE000B140;
-parameter val_gem0__excessive_collisns = 32'h00000000;
-parameter mask_gem0__excessive_collisns = 32'hFFFFFFFF;
-
-parameter gem0__late_collisns = 32'hE000B144;
-parameter val_gem0__late_collisns = 32'h00000000;
-parameter mask_gem0__late_collisns = 32'hFFFFFFFF;
-
-parameter gem0__deferred_tx_frames = 32'hE000B148;
-parameter val_gem0__deferred_tx_frames = 32'h00000000;
-parameter mask_gem0__deferred_tx_frames = 32'hFFFFFFFF;
-
-parameter gem0__carrier_sense_errs = 32'hE000B14C;
-parameter val_gem0__carrier_sense_errs = 32'h00000000;
-parameter mask_gem0__carrier_sense_errs = 32'hFFFFFFFF;
-
-parameter gem0__octets_rx_bot = 32'hE000B150;
-parameter val_gem0__octets_rx_bot = 32'h00000000;
-parameter mask_gem0__octets_rx_bot = 32'hFFFFFFFF;
-
-parameter gem0__octets_rx_top = 32'hE000B154;
-parameter val_gem0__octets_rx_top = 32'h00000000;
-parameter mask_gem0__octets_rx_top = 32'hFFFFFFFF;
-
-parameter gem0__frames_rx = 32'hE000B158;
-parameter val_gem0__frames_rx = 32'h00000000;
-parameter mask_gem0__frames_rx = 32'hFFFFFFFF;
-
-parameter gem0__bdcast_fames_rx = 32'hE000B15C;
-parameter val_gem0__bdcast_fames_rx = 32'h00000000;
-parameter mask_gem0__bdcast_fames_rx = 32'hFFFFFFFF;
-
-parameter gem0__multi_frames_rx = 32'hE000B160;
-parameter val_gem0__multi_frames_rx = 32'h00000000;
-parameter mask_gem0__multi_frames_rx = 32'hFFFFFFFF;
-
-parameter gem0__pause_rx = 32'hE000B164;
-parameter val_gem0__pause_rx = 32'h00000000;
-parameter mask_gem0__pause_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_64b_rx = 32'hE000B168;
-parameter val_gem0__frames_64b_rx = 32'h00000000;
-parameter mask_gem0__frames_64b_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_65to127b_rx = 32'hE000B16C;
-parameter val_gem0__frames_65to127b_rx = 32'h00000000;
-parameter mask_gem0__frames_65to127b_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_128to255b_rx = 32'hE000B170;
-parameter val_gem0__frames_128to255b_rx = 32'h00000000;
-parameter mask_gem0__frames_128to255b_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_256to511b_rx = 32'hE000B174;
-parameter val_gem0__frames_256to511b_rx = 32'h00000000;
-parameter mask_gem0__frames_256to511b_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_512to1023b_rx = 32'hE000B178;
-parameter val_gem0__frames_512to1023b_rx = 32'h00000000;
-parameter mask_gem0__frames_512to1023b_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_1024to1518b_rx = 32'hE000B17C;
-parameter val_gem0__frames_1024to1518b_rx = 32'h00000000;
-parameter mask_gem0__frames_1024to1518b_rx = 32'hFFFFFFFF;
-
-parameter gem0__frames_gt1518b_rx = 32'hE000B180;
-parameter val_gem0__frames_gt1518b_rx = 32'h00000000;
-parameter mask_gem0__frames_gt1518b_rx = 32'hFFFFFFFF;
-
-parameter gem0__undersz_rx = 32'hE000B184;
-parameter val_gem0__undersz_rx = 32'h00000000;
-parameter mask_gem0__undersz_rx = 32'hFFFFFFFF;
-
-parameter gem0__oversz_rx = 32'hE000B188;
-parameter val_gem0__oversz_rx = 32'h00000000;
-parameter mask_gem0__oversz_rx = 32'hFFFFFFFF;
-
-parameter gem0__jab_rx = 32'hE000B18C;
-parameter val_gem0__jab_rx = 32'h00000000;
-parameter mask_gem0__jab_rx = 32'hFFFFFFFF;
-
-parameter gem0__fcs_errors = 32'hE000B190;
-parameter val_gem0__fcs_errors = 32'h00000000;
-parameter mask_gem0__fcs_errors = 32'hFFFFFFFF;
-
-parameter gem0__length_field_errors = 32'hE000B194;
-parameter val_gem0__length_field_errors = 32'h00000000;
-parameter mask_gem0__length_field_errors = 32'hFFFFFFFF;
-
-parameter gem0__rx_symbol_errors = 32'hE000B198;
-parameter val_gem0__rx_symbol_errors = 32'h00000000;
-parameter mask_gem0__rx_symbol_errors = 32'hFFFFFFFF;
-
-parameter gem0__align_errors = 32'hE000B19C;
-parameter val_gem0__align_errors = 32'h00000000;
-parameter mask_gem0__align_errors = 32'hFFFFFFFF;
-
-parameter gem0__rx_resource_errors = 32'hE000B1A0;
-parameter val_gem0__rx_resource_errors = 32'h00000000;
-parameter mask_gem0__rx_resource_errors = 32'hFFFFFFFF;
-
-parameter gem0__rx_overrun_errors = 32'hE000B1A4;
-parameter val_gem0__rx_overrun_errors = 32'h00000000;
-parameter mask_gem0__rx_overrun_errors = 32'hFFFFFFFF;
-
-parameter gem0__ip_hdr_csum_errors = 32'hE000B1A8;
-parameter val_gem0__ip_hdr_csum_errors = 32'h00000000;
-parameter mask_gem0__ip_hdr_csum_errors = 32'hFFFFFFFF;
-
-parameter gem0__tcp_csum_errors = 32'hE000B1AC;
-parameter val_gem0__tcp_csum_errors = 32'h00000000;
-parameter mask_gem0__tcp_csum_errors = 32'hFFFFFFFF;
-
-parameter gem0__udp_csum_errors = 32'hE000B1B0;
-parameter val_gem0__udp_csum_errors = 32'h00000000;
-parameter mask_gem0__udp_csum_errors = 32'hFFFFFFFF;
-
-parameter gem0__timer_strobe_s = 32'hE000B1C8;
-parameter val_gem0__timer_strobe_s = 32'h00000000;
-parameter mask_gem0__timer_strobe_s = 32'hFFFFFFFF;
-
-parameter gem0__timer_strobe_ns = 32'hE000B1CC;
-parameter val_gem0__timer_strobe_ns = 32'h00000000;
-parameter mask_gem0__timer_strobe_ns = 32'hFFFFFFFF;
-
-parameter gem0__timer_s = 32'hE000B1D0;
-parameter val_gem0__timer_s = 32'h00000000;
-parameter mask_gem0__timer_s = 32'hFFFFFFFF;
-
-parameter gem0__timer_ns = 32'hE000B1D4;
-parameter val_gem0__timer_ns = 32'h00000000;
-parameter mask_gem0__timer_ns = 32'hFFFFFFFF;
-
-parameter gem0__timer_adjust = 32'hE000B1D8;
-parameter val_gem0__timer_adjust = 32'h00000000;
-parameter mask_gem0__timer_adjust = 32'hFFFFFFFF;
-
-parameter gem0__timer_incr = 32'hE000B1DC;
-parameter val_gem0__timer_incr = 32'h00000000;
-parameter mask_gem0__timer_incr = 32'hFFFFFFFF;
-
-parameter gem0__ptp_tx_s = 32'hE000B1E0;
-parameter val_gem0__ptp_tx_s = 32'h00000000;
-parameter mask_gem0__ptp_tx_s = 32'hFFFFFFFF;
-
-parameter gem0__ptp_tx_ns = 32'hE000B1E4;
-parameter val_gem0__ptp_tx_ns = 32'h00000000;
-parameter mask_gem0__ptp_tx_ns = 32'hFFFFFFFF;
-
-parameter gem0__ptp_rx_s = 32'hE000B1E8;
-parameter val_gem0__ptp_rx_s = 32'h00000000;
-parameter mask_gem0__ptp_rx_s = 32'hFFFFFFFF;
-
-parameter gem0__ptp_rx_ns = 32'hE000B1EC;
-parameter val_gem0__ptp_rx_ns = 32'h00000000;
-parameter mask_gem0__ptp_rx_ns = 32'hFFFFFFFF;
-
-parameter gem0__ptp_peer_tx_s = 32'hE000B1F0;
-parameter val_gem0__ptp_peer_tx_s = 32'h00000000;
-parameter mask_gem0__ptp_peer_tx_s = 32'hFFFFFFFF;
-
-parameter gem0__ptp_peer_tx_ns = 32'hE000B1F4;
-parameter val_gem0__ptp_peer_tx_ns = 32'h00000000;
-parameter mask_gem0__ptp_peer_tx_ns = 32'hFFFFFFFF;
-
-parameter gem0__ptp_peer_rx_s = 32'hE000B1F8;
-parameter val_gem0__ptp_peer_rx_s = 32'h00000000;
-parameter mask_gem0__ptp_peer_rx_s = 32'hFFFFFFFF;
-
-parameter gem0__ptp_peer_rx_ns = 32'hE000B1FC;
-parameter val_gem0__ptp_peer_rx_ns = 32'h00000000;
-parameter mask_gem0__ptp_peer_rx_ns = 32'hFFFFFFFF;
-
-parameter gem0__pcs_ctrl = 32'hE000B200;
-parameter val_gem0__pcs_ctrl = 32'h00000000;
-parameter mask_gem0__pcs_ctrl = 32'h00000000;
-
-parameter gem0__pcs_status = 32'hE000B204;
-parameter val_gem0__pcs_status = 32'h00000000;
-parameter mask_gem0__pcs_status = 32'h00000000;
-
-parameter gem0__pcs_upper_phy_id = 32'hE000B208;
-parameter val_gem0__pcs_upper_phy_id = 32'h00000000;
-parameter mask_gem0__pcs_upper_phy_id = 32'h00000000;
-
-parameter gem0__pcs_lower_phy_id = 32'hE000B20C;
-parameter val_gem0__pcs_lower_phy_id = 32'h00000000;
-parameter mask_gem0__pcs_lower_phy_id = 32'h00000000;
-
-parameter gem0__pcs_autoneg_ad = 32'hE000B210;
-parameter val_gem0__pcs_autoneg_ad = 32'h00000000;
-parameter mask_gem0__pcs_autoneg_ad = 32'h00000000;
-
-parameter gem0__pcs_autoneg_ability = 32'hE000B214;
-parameter val_gem0__pcs_autoneg_ability = 32'h00000000;
-parameter mask_gem0__pcs_autoneg_ability = 32'h00000000;
-
-parameter gem0__pcs_autonec_exp = 32'hE000B218;
-parameter val_gem0__pcs_autonec_exp = 32'h00000000;
-parameter mask_gem0__pcs_autonec_exp = 32'h00000000;
-
-parameter gem0__pcs_autoneg_next_pg = 32'hE000B21C;
-parameter val_gem0__pcs_autoneg_next_pg = 32'h00000000;
-parameter mask_gem0__pcs_autoneg_next_pg = 32'h00000000;
-
-parameter gem0__pcs_autoneg_pnext_pg = 32'hE000B220;
-parameter val_gem0__pcs_autoneg_pnext_pg = 32'h00000000;
-parameter mask_gem0__pcs_autoneg_pnext_pg = 32'h00000000;
-
-parameter gem0__pcs_extended_status = 32'hE000B23C;
-parameter val_gem0__pcs_extended_status = 32'h00000000;
-parameter mask_gem0__pcs_extended_status = 32'h00000000;
-
-parameter gem0__design_cfg1 = 32'hE000B280;
-parameter val_gem0__design_cfg1 = 32'h02000000;
-parameter mask_gem0__design_cfg1 = 32'h0E000000;
-
-parameter gem0__design_cfg2 = 32'hE000B284;
-parameter val_gem0__design_cfg2 = 32'h2A813FFF;
-parameter mask_gem0__design_cfg2 = 32'h3FCFFFFF;
-
-parameter gem0__design_cfg3 = 32'hE000B288;
-parameter val_gem0__design_cfg3 = 32'h00000000;
-parameter mask_gem0__design_cfg3 = 32'hFFFFFFFF;
-
-parameter gem0__design_cfg4 = 32'hE000B28C;
-parameter val_gem0__design_cfg4 = 32'h00000000;
-parameter mask_gem0__design_cfg4 = 32'hFFFFFFFF;
-
-parameter gem0__design_cfg5 = 32'hE000B290;
-parameter val_gem0__design_cfg5 = 32'h002F2045;
-parameter mask_gem0__design_cfg5 = 32'h0FFFFCFF;
-
-parameter gem0__design_cfg6 = 32'hE000B294;
-parameter val_gem0__design_cfg6 = 32'h00000000;
-parameter mask_gem0__design_cfg6 = 32'h00000000;
-
-parameter gem0__design_cfg7 = 32'hE000B298;
-parameter val_gem0__design_cfg7 = 32'h00000000;
-parameter mask_gem0__design_cfg7 = 32'h00000000;
-
-parameter gem0__isr_pq1 = 32'hE000B400;
-parameter val_gem0__isr_pq1 = 32'h00000000;
-parameter mask_gem0__isr_pq1 = 32'h00000000;
-
-parameter gem0__isr_pq2 = 32'hE000B404;
-parameter val_gem0__isr_pq2 = 32'h00000000;
-parameter mask_gem0__isr_pq2 = 32'h00000000;
-
-parameter gem0__isr_pq3 = 32'hE000B408;
-parameter val_gem0__isr_pq3 = 32'h00000000;
-parameter mask_gem0__isr_pq3 = 32'h00000000;
-
-parameter gem0__isr_pq4 = 32'hE000B40C;
-parameter val_gem0__isr_pq4 = 32'h00000000;
-parameter mask_gem0__isr_pq4 = 32'h00000000;
-
-parameter gem0__isr_pq5 = 32'hE000B410;
-parameter val_gem0__isr_pq5 = 32'h00000000;
-parameter mask_gem0__isr_pq5 = 32'h00000000;
-
-parameter gem0__isr_pq6 = 32'hE000B414;
-parameter val_gem0__isr_pq6 = 32'h00000000;
-parameter mask_gem0__isr_pq6 = 32'h00000000;
-
-parameter gem0__isr_pq7 = 32'hE000B418;
-parameter val_gem0__isr_pq7 = 32'h00000000;
-parameter mask_gem0__isr_pq7 = 32'h00000000;
-
-parameter gem0__tx_qbar_q1 = 32'hE000B440;
-parameter val_gem0__tx_qbar_q1 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q1 = 32'h00000000;
-
-parameter gem0__tx_qbar_q2 = 32'hE000B444;
-parameter val_gem0__tx_qbar_q2 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q2 = 32'h00000000;
-
-parameter gem0__tx_qbar_q3 = 32'hE000B448;
-parameter val_gem0__tx_qbar_q3 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q3 = 32'h00000000;
-
-parameter gem0__tx_qbar_q4 = 32'hE000B44C;
-parameter val_gem0__tx_qbar_q4 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q4 = 32'h00000000;
-
-parameter gem0__tx_qbar_q5 = 32'hE000B450;
-parameter val_gem0__tx_qbar_q5 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q5 = 32'h00000000;
-
-parameter gem0__tx_qbar_q6 = 32'hE000B454;
-parameter val_gem0__tx_qbar_q6 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q6 = 32'h00000000;
-
-parameter gem0__tx_qbar_q7 = 32'hE000B458;
-parameter val_gem0__tx_qbar_q7 = 32'h00000000;
-parameter mask_gem0__tx_qbar_q7 = 32'h00000000;
-
-parameter gem0__rx_qbar_q1 = 32'hE000B480;
-parameter val_gem0__rx_qbar_q1 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q1 = 32'h00000000;
-
-parameter gem0__rx_qbar_q2 = 32'hE000B484;
-parameter val_gem0__rx_qbar_q2 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q2 = 32'h00000000;
-
-parameter gem0__rx_qbar_q3 = 32'hE000B488;
-parameter val_gem0__rx_qbar_q3 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q3 = 32'h00000000;
-
-parameter gem0__rx_qbar_q4 = 32'hE000B48C;
-parameter val_gem0__rx_qbar_q4 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q4 = 32'h00000000;
-
-parameter gem0__rx_qbar_q5 = 32'hE000B490;
-parameter val_gem0__rx_qbar_q5 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q5 = 32'h00000000;
-
-parameter gem0__rx_qbar_q6 = 32'hE000B494;
-parameter val_gem0__rx_qbar_q6 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q6 = 32'h00000000;
-
-parameter gem0__rx_qbar_q7 = 32'hE000B498;
-parameter val_gem0__rx_qbar_q7 = 32'h00000000;
-parameter mask_gem0__rx_qbar_q7 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q1 = 32'hE000B4A0;
-parameter val_gem0__rx_bufsz_q1 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q1 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q2 = 32'hE000B4A4;
-parameter val_gem0__rx_bufsz_q2 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q2 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q3 = 32'hE000B4A8;
-parameter val_gem0__rx_bufsz_q3 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q3 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q4 = 32'hE000B4AC;
-parameter val_gem0__rx_bufsz_q4 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q4 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q5 = 32'hE000B4B0;
-parameter val_gem0__rx_bufsz_q5 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q5 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q6 = 32'hE000B4B4;
-parameter val_gem0__rx_bufsz_q6 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q6 = 32'h00000000;
-
-parameter gem0__rx_bufsz_q7 = 32'hE000B4B8;
-parameter val_gem0__rx_bufsz_q7 = 32'h00000000;
-parameter mask_gem0__rx_bufsz_q7 = 32'h00000000;
-
-parameter gem0__screen_t1_r0 = 32'hE000B500;
-parameter val_gem0__screen_t1_r0 = 32'h00000000;
-parameter mask_gem0__screen_t1_r0 = 32'h00000000;
-
-parameter gem0__screen_t1_r1 = 32'hE000B504;
-parameter val_gem0__screen_t1_r1 = 32'h00000000;
-parameter mask_gem0__screen_t1_r1 = 32'h00000000;
-
-parameter gem0__screen_t1_r2 = 32'hE000B508;
-parameter val_gem0__screen_t1_r2 = 32'h00000000;
-parameter mask_gem0__screen_t1_r2 = 32'h00000000;
-
-parameter gem0__screen_t1_r3 = 32'hE000B50C;
-parameter val_gem0__screen_t1_r3 = 32'h00000000;
-parameter mask_gem0__screen_t1_r3 = 32'h00000000;
-
-parameter gem0__screen_t1_r4 = 32'hE000B510;
-parameter val_gem0__screen_t1_r4 = 32'h00000000;
-parameter mask_gem0__screen_t1_r4 = 32'h00000000;
-
-parameter gem0__screen_t1_r5 = 32'hE000B514;
-parameter val_gem0__screen_t1_r5 = 32'h00000000;
-parameter mask_gem0__screen_t1_r5 = 32'h00000000;
-
-parameter gem0__screen_t1_r6 = 32'hE000B518;
-parameter val_gem0__screen_t1_r6 = 32'h00000000;
-parameter mask_gem0__screen_t1_r6 = 32'h00000000;
-
-parameter gem0__screen_t1_r7 = 32'hE000B51C;
-parameter val_gem0__screen_t1_r7 = 32'h00000000;
-parameter mask_gem0__screen_t1_r7 = 32'h00000000;
-
-parameter gem0__screen_t1_r8 = 32'hE000B520;
-parameter val_gem0__screen_t1_r8 = 32'h00000000;
-parameter mask_gem0__screen_t1_r8 = 32'h00000000;
-
-parameter gem0__screen_t1_r9 = 32'hE000B524;
-parameter val_gem0__screen_t1_r9 = 32'h00000000;
-parameter mask_gem0__screen_t1_r9 = 32'h00000000;
-
-parameter gem0__screen_t1_r10 = 32'hE000B528;
-parameter val_gem0__screen_t1_r10 = 32'h00000000;
-parameter mask_gem0__screen_t1_r10 = 32'h00000000;
-
-parameter gem0__screen_t1_r11 = 32'hE000B52C;
-parameter val_gem0__screen_t1_r11 = 32'h00000000;
-parameter mask_gem0__screen_t1_r11 = 32'h00000000;
-
-parameter gem0__screen_t1_r12 = 32'hE000B530;
-parameter val_gem0__screen_t1_r12 = 32'h00000000;
-parameter mask_gem0__screen_t1_r12 = 32'h00000000;
-
-parameter gem0__screen_t1_r13 = 32'hE000B534;
-parameter val_gem0__screen_t1_r13 = 32'h00000000;
-parameter mask_gem0__screen_t1_r13 = 32'h00000000;
-
-parameter gem0__screen_t1_r14 = 32'hE000B538;
-parameter val_gem0__screen_t1_r14 = 32'h00000000;
-parameter mask_gem0__screen_t1_r14 = 32'h00000000;
-
-parameter gem0__screen_t1_r15 = 32'hE000B53C;
-parameter val_gem0__screen_t1_r15 = 32'h00000000;
-parameter mask_gem0__screen_t1_r15 = 32'h00000000;
-
-parameter gem0__screen_t2_r0 = 32'hE000B540;
-parameter val_gem0__screen_t2_r0 = 32'h00000000;
-parameter mask_gem0__screen_t2_r0 = 32'h00000000;
-
-parameter gem0__screen_t2_r1 = 32'hE000B544;
-parameter val_gem0__screen_t2_r1 = 32'h00000000;
-parameter mask_gem0__screen_t2_r1 = 32'h00000000;
-
-parameter gem0__screen_t2_r2 = 32'hE000B548;
-parameter val_gem0__screen_t2_r2 = 32'h00000000;
-parameter mask_gem0__screen_t2_r2 = 32'h00000000;
-
-parameter gem0__screen_t2_r3 = 32'hE000B54C;
-parameter val_gem0__screen_t2_r3 = 32'h00000000;
-parameter mask_gem0__screen_t2_r3 = 32'h00000000;
-
-parameter gem0__screen_t2_r4 = 32'hE000B550;
-parameter val_gem0__screen_t2_r4 = 32'h00000000;
-parameter mask_gem0__screen_t2_r4 = 32'h00000000;
-
-parameter gem0__screen_t2_r5 = 32'hE000B554;
-parameter val_gem0__screen_t2_r5 = 32'h00000000;
-parameter mask_gem0__screen_t2_r5 = 32'h00000000;
-
-parameter gem0__screen_t2_r6 = 32'hE000B558;
-parameter val_gem0__screen_t2_r6 = 32'h00000000;
-parameter mask_gem0__screen_t2_r6 = 32'h00000000;
-
-parameter gem0__screen_t2_r7 = 32'hE000B55C;
-parameter val_gem0__screen_t2_r7 = 32'h00000000;
-parameter mask_gem0__screen_t2_r7 = 32'h00000000;
-
-parameter gem0__screen_t2_r8 = 32'hE000B560;
-parameter val_gem0__screen_t2_r8 = 32'h00000000;
-parameter mask_gem0__screen_t2_r8 = 32'h00000000;
-
-parameter gem0__screen_t2_r9 = 32'hE000B564;
-parameter val_gem0__screen_t2_r9 = 32'h00000000;
-parameter mask_gem0__screen_t2_r9 = 32'h00000000;
-
-parameter gem0__screen_t2_r10 = 32'hE000B568;
-parameter val_gem0__screen_t2_r10 = 32'h00000000;
-parameter mask_gem0__screen_t2_r10 = 32'h00000000;
-
-parameter gem0__screen_t2_r11 = 32'hE000B56C;
-parameter val_gem0__screen_t2_r11 = 32'h00000000;
-parameter mask_gem0__screen_t2_r11 = 32'h00000000;
-
-parameter gem0__screen_t2_r12 = 32'hE000B570;
-parameter val_gem0__screen_t2_r12 = 32'h00000000;
-parameter mask_gem0__screen_t2_r12 = 32'h00000000;
-
-parameter gem0__screen_t2_r13 = 32'hE000B574;
-parameter val_gem0__screen_t2_r13 = 32'h00000000;
-parameter mask_gem0__screen_t2_r13 = 32'h00000000;
-
-parameter gem0__screen_t2_r14 = 32'hE000B578;
-parameter val_gem0__screen_t2_r14 = 32'h00000000;
-parameter mask_gem0__screen_t2_r14 = 32'h00000000;
-
-parameter gem0__screen_t2_r15 = 32'hE000B57C;
-parameter val_gem0__screen_t2_r15 = 32'h00000000;
-parameter mask_gem0__screen_t2_r15 = 32'h00000000;
-
-parameter gem0__intr_en_pq1 = 32'hE000B600;
-parameter val_gem0__intr_en_pq1 = 32'h00000000;
-parameter mask_gem0__intr_en_pq1 = 32'h00000000;
-
-parameter gem0__intr_en_pq2 = 32'hE000B604;
-parameter val_gem0__intr_en_pq2 = 32'h00000000;
-parameter mask_gem0__intr_en_pq2 = 32'h00000000;
-
-parameter gem0__intr_en_pq3 = 32'hE000B608;
-parameter val_gem0__intr_en_pq3 = 32'h00000000;
-parameter mask_gem0__intr_en_pq3 = 32'h00000000;
-
-parameter gem0__intr_en_pq4 = 32'hE000B60C;
-parameter val_gem0__intr_en_pq4 = 32'h00000000;
-parameter mask_gem0__intr_en_pq4 = 32'h00000000;
-
-parameter gem0__intr_en_pq5 = 32'hE000B610;
-parameter val_gem0__intr_en_pq5 = 32'h00000000;
-parameter mask_gem0__intr_en_pq5 = 32'h00000000;
-
-parameter gem0__intr_en_pq6 = 32'hE000B614;
-parameter val_gem0__intr_en_pq6 = 32'h00000000;
-parameter mask_gem0__intr_en_pq6 = 32'h00000000;
-
-parameter gem0__intr_en_pq7 = 32'hE000B618;
-parameter val_gem0__intr_en_pq7 = 32'h00000000;
-parameter mask_gem0__intr_en_pq7 = 32'h00000000;
-
-parameter gem0__intr_dis_pq1 = 32'hE000B620;
-parameter val_gem0__intr_dis_pq1 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq1 = 32'h00000000;
-
-parameter gem0__intr_dis_pq2 = 32'hE000B624;
-parameter val_gem0__intr_dis_pq2 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq2 = 32'h00000000;
-
-parameter gem0__intr_dis_pq3 = 32'hE000B628;
-parameter val_gem0__intr_dis_pq3 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq3 = 32'h00000000;
-
-parameter gem0__intr_dis_pq4 = 32'hE000B62C;
-parameter val_gem0__intr_dis_pq4 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq4 = 32'h00000000;
-
-parameter gem0__intr_dis_pq5 = 32'hE000B630;
-parameter val_gem0__intr_dis_pq5 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq5 = 32'h00000000;
-
-parameter gem0__intr_dis_pq6 = 32'hE000B634;
-parameter val_gem0__intr_dis_pq6 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq6 = 32'h00000000;
-
-parameter gem0__intr_dis_pq7 = 32'hE000B638;
-parameter val_gem0__intr_dis_pq7 = 32'h00000000;
-parameter mask_gem0__intr_dis_pq7 = 32'h00000000;
-
-parameter gem0__intr_mask_pq1 = 32'hE000B640;
-parameter val_gem0__intr_mask_pq1 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq1 = 32'h00000000;
-
-parameter gem0__intr_mask_pq2 = 32'hE000B644;
-parameter val_gem0__intr_mask_pq2 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq2 = 32'h00000000;
-
-parameter gem0__intr_mask_pq3 = 32'hE000B648;
-parameter val_gem0__intr_mask_pq3 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq3 = 32'h00000000;
-
-parameter gem0__intr_mask_pq4 = 32'hE000B64C;
-parameter val_gem0__intr_mask_pq4 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq4 = 32'h00000000;
-
-parameter gem0__intr_mask_pq5 = 32'hE000B650;
-parameter val_gem0__intr_mask_pq5 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq5 = 32'h00000000;
-
-parameter gem0__intr_mask_pq6 = 32'hE000B654;
-parameter val_gem0__intr_mask_pq6 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq6 = 32'h00000000;
-
-parameter gem0__intr_mask_pq7 = 32'hE000B658;
-parameter val_gem0__intr_mask_pq7 = 32'h00000000;
-parameter mask_gem0__intr_mask_pq7 = 32'h00000000;
-
-
-// ************************************************************
-// Module gem1 GEM
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gem1__net_ctrl = 32'hE000C000;
-parameter val_gem1__net_ctrl = 32'h00000000;
-parameter mask_gem1__net_ctrl = 32'hFFFFFFFF;
-
-parameter gem1__net_cfg = 32'hE000C004;
-parameter val_gem1__net_cfg = 32'h00080000;
-parameter mask_gem1__net_cfg = 32'hFFFFFFFF;
-
-parameter gem1__net_status = 32'hE000C008;
-parameter val_gem1__net_status = 32'h00000004;
-parameter mask_gem1__net_status = 32'hFFFFFFFD;
-
-parameter gem1__user_io = 32'hE000C00C;
-parameter val_gem1__user_io = 32'h00000000;
-parameter mask_gem1__user_io = 32'h0000FFFF;
-
-parameter gem1__dma_cfg = 32'hE000C010;
-parameter val_gem1__dma_cfg = 32'h00020784;
-parameter mask_gem1__dma_cfg = 32'hFFFFFFFF;
-
-parameter gem1__tx_status = 32'hE000C014;
-parameter val_gem1__tx_status = 32'h00000000;
-parameter mask_gem1__tx_status = 32'hFFFFFFFF;
-
-parameter gem1__rx_qbar = 32'hE000C018;
-parameter val_gem1__rx_qbar = 32'h00000000;
-parameter mask_gem1__rx_qbar = 32'hFFFFFFFF;
-
-parameter gem1__tx_qbar = 32'hE000C01C;
-parameter val_gem1__tx_qbar = 32'h00000000;
-parameter mask_gem1__tx_qbar = 32'hFFFFFFFF;
-
-parameter gem1__rx_status = 32'hE000C020;
-parameter val_gem1__rx_status = 32'h00000000;
-parameter mask_gem1__rx_status = 32'hFFFFFFFF;
-
-parameter gem1__intr_status = 32'hE000C024;
-parameter val_gem1__intr_status = 32'h00000000;
-parameter mask_gem1__intr_status = 32'hFFFFFFFF;
-
-parameter gem1__intr_en = 32'hE000C028;
-parameter val_gem1__intr_en = 32'h00000000;
-parameter mask_gem1__intr_en = 32'h00000000;
-
-parameter gem1__intr_dis = 32'hE000C02C;
-parameter val_gem1__intr_dis = 32'h00000000;
-parameter mask_gem1__intr_dis = 32'h00000000;
-
-parameter gem1__intr_mask = 32'hE000C030;
-parameter val_gem1__intr_mask = 32'h0001FFFF;
-parameter mask_gem1__intr_mask = 32'hFC01FFFF;
-
-parameter gem1__phy_maint = 32'hE000C034;
-parameter val_gem1__phy_maint = 32'h00000000;
-parameter mask_gem1__phy_maint = 32'hFFFFFFFF;
-
-parameter gem1__rx_pauseq = 32'hE000C038;
-parameter val_gem1__rx_pauseq = 32'h00000000;
-parameter mask_gem1__rx_pauseq = 32'hFFFFFFFF;
-
-parameter gem1__tx_pauseq = 32'hE000C03C;
-parameter val_gem1__tx_pauseq = 32'h0000FFFF;
-parameter mask_gem1__tx_pauseq = 32'hFFFFFFFF;
-
-parameter gem1__tx_partial_st_fwd = 32'hE000C040;
-parameter val_gem1__tx_partial_st_fwd = 32'h000003FF;
-parameter mask_gem1__tx_partial_st_fwd = 32'hFFFFFFFF;
-
-parameter gem1__rx_partial_st_fwd = 32'hE000C044;
-parameter val_gem1__rx_partial_st_fwd = 32'h000003FF;
-parameter mask_gem1__rx_partial_st_fwd = 32'hFFFFFFFF;
-
-parameter gem1__hash_bot = 32'hE000C080;
-parameter val_gem1__hash_bot = 32'h00000000;
-parameter mask_gem1__hash_bot = 32'hFFFFFFFF;
-
-parameter gem1__hash_top = 32'hE000C084;
-parameter val_gem1__hash_top = 32'h00000000;
-parameter mask_gem1__hash_top = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr1_bot = 32'hE000C088;
-parameter val_gem1__spec_addr1_bot = 32'h00000000;
-parameter mask_gem1__spec_addr1_bot = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr1_top = 32'hE000C08C;
-parameter val_gem1__spec_addr1_top = 32'h00000000;
-parameter mask_gem1__spec_addr1_top = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr2_bot = 32'hE000C090;
-parameter val_gem1__spec_addr2_bot = 32'h00000000;
-parameter mask_gem1__spec_addr2_bot = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr2_top = 32'hE000C094;
-parameter val_gem1__spec_addr2_top = 32'h00000000;
-parameter mask_gem1__spec_addr2_top = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr3_bot = 32'hE000C098;
-parameter val_gem1__spec_addr3_bot = 32'h00000000;
-parameter mask_gem1__spec_addr3_bot = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr3_top = 32'hE000C09C;
-parameter val_gem1__spec_addr3_top = 32'h00000000;
-parameter mask_gem1__spec_addr3_top = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr4_bot = 32'hE000C0A0;
-parameter val_gem1__spec_addr4_bot = 32'h00000000;
-parameter mask_gem1__spec_addr4_bot = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr4_top = 32'hE000C0A4;
-parameter val_gem1__spec_addr4_top = 32'h00000000;
-parameter mask_gem1__spec_addr4_top = 32'hFFFFFFFF;
-
-parameter gem1__type_id_match1 = 32'hE000C0A8;
-parameter val_gem1__type_id_match1 = 32'h00000000;
-parameter mask_gem1__type_id_match1 = 32'hFFFFFFFF;
-
-parameter gem1__type_id_match2 = 32'hE000C0AC;
-parameter val_gem1__type_id_match2 = 32'h00000000;
-parameter mask_gem1__type_id_match2 = 32'hFFFFFFFF;
-
-parameter gem1__type_id_match3 = 32'hE000C0B0;
-parameter val_gem1__type_id_match3 = 32'h00000000;
-parameter mask_gem1__type_id_match3 = 32'hFFFFFFFF;
-
-parameter gem1__type_id_match4 = 32'hE000C0B4;
-parameter val_gem1__type_id_match4 = 32'h00000000;
-parameter mask_gem1__type_id_match4 = 32'hFFFFFFFF;
-
-parameter gem1__wake_on_lan = 32'hE000C0B8;
-parameter val_gem1__wake_on_lan = 32'h00000000;
-parameter mask_gem1__wake_on_lan = 32'hFFFFFFFF;
-
-parameter gem1__ipg_stretch = 32'hE000C0BC;
-parameter val_gem1__ipg_stretch = 32'h00000000;
-parameter mask_gem1__ipg_stretch = 32'hFFFFFFFF;
-
-parameter gem1__stacked_vlan = 32'hE000C0C0;
-parameter val_gem1__stacked_vlan = 32'h00000000;
-parameter mask_gem1__stacked_vlan = 32'hFFFFFFFF;
-
-parameter gem1__tx_pfc_pause = 32'hE000C0C4;
-parameter val_gem1__tx_pfc_pause = 32'h00000000;
-parameter mask_gem1__tx_pfc_pause = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr1_mask_bot = 32'hE000C0C8;
-parameter val_gem1__spec_addr1_mask_bot = 32'h00000000;
-parameter mask_gem1__spec_addr1_mask_bot = 32'hFFFFFFFF;
-
-parameter gem1__spec_addr1_mask_top = 32'hE000C0CC;
-parameter val_gem1__spec_addr1_mask_top = 32'h00000000;
-parameter mask_gem1__spec_addr1_mask_top = 32'hFFFFFFFF;
-
-parameter gem1__module_id = 32'hE000C0FC;
-parameter val_gem1__module_id = 32'h00020118;
-parameter mask_gem1__module_id = 32'hFFFFFFFF;
-
-parameter gem1__octets_tx_bot = 32'hE000C100;
-parameter val_gem1__octets_tx_bot = 32'h00000000;
-parameter mask_gem1__octets_tx_bot = 32'hFFFFFFFF;
-
-parameter gem1__octets_tx_top = 32'hE000C104;
-parameter val_gem1__octets_tx_top = 32'h00000000;
-parameter mask_gem1__octets_tx_top = 32'hFFFFFFFF;
-
-parameter gem1__frames_tx = 32'hE000C108;
-parameter val_gem1__frames_tx = 32'h00000000;
-parameter mask_gem1__frames_tx = 32'hFFFFFFFF;
-
-parameter gem1__broadcast_frames_tx = 32'hE000C10C;
-parameter val_gem1__broadcast_frames_tx = 32'h00000000;
-parameter mask_gem1__broadcast_frames_tx = 32'hFFFFFFFF;
-
-parameter gem1__multi_frames_tx = 32'hE000C110;
-parameter val_gem1__multi_frames_tx = 32'h00000000;
-parameter mask_gem1__multi_frames_tx = 32'hFFFFFFFF;
-
-parameter gem1__pause_frames_tx = 32'hE000C114;
-parameter val_gem1__pause_frames_tx = 32'h00000000;
-parameter mask_gem1__pause_frames_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_64b_tx = 32'hE000C118;
-parameter val_gem1__frames_64b_tx = 32'h00000000;
-parameter mask_gem1__frames_64b_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_65to127b_tx = 32'hE000C11C;
-parameter val_gem1__frames_65to127b_tx = 32'h00000000;
-parameter mask_gem1__frames_65to127b_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_128to255b_tx = 32'hE000C120;
-parameter val_gem1__frames_128to255b_tx = 32'h00000000;
-parameter mask_gem1__frames_128to255b_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_256to511b_tx = 32'hE000C124;
-parameter val_gem1__frames_256to511b_tx = 32'h00000000;
-parameter mask_gem1__frames_256to511b_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_512to1023b_tx = 32'hE000C128;
-parameter val_gem1__frames_512to1023b_tx = 32'h00000000;
-parameter mask_gem1__frames_512to1023b_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_1024to1518b_tx = 32'hE000C12C;
-parameter val_gem1__frames_1024to1518b_tx = 32'h00000000;
-parameter mask_gem1__frames_1024to1518b_tx = 32'hFFFFFFFF;
-
-parameter gem1__frames_gt1518b_tx = 32'hE000C130;
-parameter val_gem1__frames_gt1518b_tx = 32'h00000000;
-parameter mask_gem1__frames_gt1518b_tx = 32'hFFFFFFFF;
-
-parameter gem1__tx_under_runs = 32'hE000C134;
-parameter val_gem1__tx_under_runs = 32'h00000000;
-parameter mask_gem1__tx_under_runs = 32'hFFFFFFFF;
-
-parameter gem1__single_collisn_frames = 32'hE000C138;
-parameter val_gem1__single_collisn_frames = 32'h00000000;
-parameter mask_gem1__single_collisn_frames = 32'hFFFFFFFF;
-
-parameter gem1__multi_collisn_frames = 32'hE000C13C;
-parameter val_gem1__multi_collisn_frames = 32'h00000000;
-parameter mask_gem1__multi_collisn_frames = 32'hFFFFFFFF;
-
-parameter gem1__excessive_collisns = 32'hE000C140;
-parameter val_gem1__excessive_collisns = 32'h00000000;
-parameter mask_gem1__excessive_collisns = 32'hFFFFFFFF;
-
-parameter gem1__late_collisns = 32'hE000C144;
-parameter val_gem1__late_collisns = 32'h00000000;
-parameter mask_gem1__late_collisns = 32'hFFFFFFFF;
-
-parameter gem1__deferred_tx_frames = 32'hE000C148;
-parameter val_gem1__deferred_tx_frames = 32'h00000000;
-parameter mask_gem1__deferred_tx_frames = 32'hFFFFFFFF;
-
-parameter gem1__carrier_sense_errs = 32'hE000C14C;
-parameter val_gem1__carrier_sense_errs = 32'h00000000;
-parameter mask_gem1__carrier_sense_errs = 32'hFFFFFFFF;
-
-parameter gem1__octets_rx_bot = 32'hE000C150;
-parameter val_gem1__octets_rx_bot = 32'h00000000;
-parameter mask_gem1__octets_rx_bot = 32'hFFFFFFFF;
-
-parameter gem1__octets_rx_top = 32'hE000C154;
-parameter val_gem1__octets_rx_top = 32'h00000000;
-parameter mask_gem1__octets_rx_top = 32'hFFFFFFFF;
-
-parameter gem1__frames_rx = 32'hE000C158;
-parameter val_gem1__frames_rx = 32'h00000000;
-parameter mask_gem1__frames_rx = 32'hFFFFFFFF;
-
-parameter gem1__bdcast_fames_rx = 32'hE000C15C;
-parameter val_gem1__bdcast_fames_rx = 32'h00000000;
-parameter mask_gem1__bdcast_fames_rx = 32'hFFFFFFFF;
-
-parameter gem1__multi_frames_rx = 32'hE000C160;
-parameter val_gem1__multi_frames_rx = 32'h00000000;
-parameter mask_gem1__multi_frames_rx = 32'hFFFFFFFF;
-
-parameter gem1__pause_rx = 32'hE000C164;
-parameter val_gem1__pause_rx = 32'h00000000;
-parameter mask_gem1__pause_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_64b_rx = 32'hE000C168;
-parameter val_gem1__frames_64b_rx = 32'h00000000;
-parameter mask_gem1__frames_64b_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_65to127b_rx = 32'hE000C16C;
-parameter val_gem1__frames_65to127b_rx = 32'h00000000;
-parameter mask_gem1__frames_65to127b_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_128to255b_rx = 32'hE000C170;
-parameter val_gem1__frames_128to255b_rx = 32'h00000000;
-parameter mask_gem1__frames_128to255b_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_256to511b_rx = 32'hE000C174;
-parameter val_gem1__frames_256to511b_rx = 32'h00000000;
-parameter mask_gem1__frames_256to511b_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_512to1023b_rx = 32'hE000C178;
-parameter val_gem1__frames_512to1023b_rx = 32'h00000000;
-parameter mask_gem1__frames_512to1023b_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_1024to1518b_rx = 32'hE000C17C;
-parameter val_gem1__frames_1024to1518b_rx = 32'h00000000;
-parameter mask_gem1__frames_1024to1518b_rx = 32'hFFFFFFFF;
-
-parameter gem1__frames_gt1518b_rx = 32'hE000C180;
-parameter val_gem1__frames_gt1518b_rx = 32'h00000000;
-parameter mask_gem1__frames_gt1518b_rx = 32'hFFFFFFFF;
-
-parameter gem1__undersz_rx = 32'hE000C184;
-parameter val_gem1__undersz_rx = 32'h00000000;
-parameter mask_gem1__undersz_rx = 32'hFFFFFFFF;
-
-parameter gem1__oversz_rx = 32'hE000C188;
-parameter val_gem1__oversz_rx = 32'h00000000;
-parameter mask_gem1__oversz_rx = 32'hFFFFFFFF;
-
-parameter gem1__jab_rx = 32'hE000C18C;
-parameter val_gem1__jab_rx = 32'h00000000;
-parameter mask_gem1__jab_rx = 32'hFFFFFFFF;
-
-parameter gem1__fcs_errors = 32'hE000C190;
-parameter val_gem1__fcs_errors = 32'h00000000;
-parameter mask_gem1__fcs_errors = 32'hFFFFFFFF;
-
-parameter gem1__length_field_errors = 32'hE000C194;
-parameter val_gem1__length_field_errors = 32'h00000000;
-parameter mask_gem1__length_field_errors = 32'hFFFFFFFF;
-
-parameter gem1__rx_symbol_errors = 32'hE000C198;
-parameter val_gem1__rx_symbol_errors = 32'h00000000;
-parameter mask_gem1__rx_symbol_errors = 32'hFFFFFFFF;
-
-parameter gem1__align_errors = 32'hE000C19C;
-parameter val_gem1__align_errors = 32'h00000000;
-parameter mask_gem1__align_errors = 32'hFFFFFFFF;
-
-parameter gem1__rx_resource_errors = 32'hE000C1A0;
-parameter val_gem1__rx_resource_errors = 32'h00000000;
-parameter mask_gem1__rx_resource_errors = 32'hFFFFFFFF;
-
-parameter gem1__rx_overrun_errors = 32'hE000C1A4;
-parameter val_gem1__rx_overrun_errors = 32'h00000000;
-parameter mask_gem1__rx_overrun_errors = 32'hFFFFFFFF;
-
-parameter gem1__ip_hdr_csum_errors = 32'hE000C1A8;
-parameter val_gem1__ip_hdr_csum_errors = 32'h00000000;
-parameter mask_gem1__ip_hdr_csum_errors = 32'hFFFFFFFF;
-
-parameter gem1__tcp_csum_errors = 32'hE000C1AC;
-parameter val_gem1__tcp_csum_errors = 32'h00000000;
-parameter mask_gem1__tcp_csum_errors = 32'hFFFFFFFF;
-
-parameter gem1__udp_csum_errors = 32'hE000C1B0;
-parameter val_gem1__udp_csum_errors = 32'h00000000;
-parameter mask_gem1__udp_csum_errors = 32'hFFFFFFFF;
-
-parameter gem1__timer_strobe_s = 32'hE000C1C8;
-parameter val_gem1__timer_strobe_s = 32'h00000000;
-parameter mask_gem1__timer_strobe_s = 32'hFFFFFFFF;
-
-parameter gem1__timer_strobe_ns = 32'hE000C1CC;
-parameter val_gem1__timer_strobe_ns = 32'h00000000;
-parameter mask_gem1__timer_strobe_ns = 32'hFFFFFFFF;
-
-parameter gem1__timer_s = 32'hE000C1D0;
-parameter val_gem1__timer_s = 32'h00000000;
-parameter mask_gem1__timer_s = 32'hFFFFFFFF;
-
-parameter gem1__timer_ns = 32'hE000C1D4;
-parameter val_gem1__timer_ns = 32'h00000000;
-parameter mask_gem1__timer_ns = 32'hFFFFFFFF;
-
-parameter gem1__timer_adjust = 32'hE000C1D8;
-parameter val_gem1__timer_adjust = 32'h00000000;
-parameter mask_gem1__timer_adjust = 32'hFFFFFFFF;
-
-parameter gem1__timer_incr = 32'hE000C1DC;
-parameter val_gem1__timer_incr = 32'h00000000;
-parameter mask_gem1__timer_incr = 32'hFFFFFFFF;
-
-parameter gem1__ptp_tx_s = 32'hE000C1E0;
-parameter val_gem1__ptp_tx_s = 32'h00000000;
-parameter mask_gem1__ptp_tx_s = 32'hFFFFFFFF;
-
-parameter gem1__ptp_tx_ns = 32'hE000C1E4;
-parameter val_gem1__ptp_tx_ns = 32'h00000000;
-parameter mask_gem1__ptp_tx_ns = 32'hFFFFFFFF;
-
-parameter gem1__ptp_rx_s = 32'hE000C1E8;
-parameter val_gem1__ptp_rx_s = 32'h00000000;
-parameter mask_gem1__ptp_rx_s = 32'hFFFFFFFF;
-
-parameter gem1__ptp_rx_ns = 32'hE000C1EC;
-parameter val_gem1__ptp_rx_ns = 32'h00000000;
-parameter mask_gem1__ptp_rx_ns = 32'hFFFFFFFF;
-
-parameter gem1__ptp_peer_tx_s = 32'hE000C1F0;
-parameter val_gem1__ptp_peer_tx_s = 32'h00000000;
-parameter mask_gem1__ptp_peer_tx_s = 32'hFFFFFFFF;
-
-parameter gem1__ptp_peer_tx_ns = 32'hE000C1F4;
-parameter val_gem1__ptp_peer_tx_ns = 32'h00000000;
-parameter mask_gem1__ptp_peer_tx_ns = 32'hFFFFFFFF;
-
-parameter gem1__ptp_peer_rx_s = 32'hE000C1F8;
-parameter val_gem1__ptp_peer_rx_s = 32'h00000000;
-parameter mask_gem1__ptp_peer_rx_s = 32'hFFFFFFFF;
-
-parameter gem1__ptp_peer_rx_ns = 32'hE000C1FC;
-parameter val_gem1__ptp_peer_rx_ns = 32'h00000000;
-parameter mask_gem1__ptp_peer_rx_ns = 32'hFFFFFFFF;
-
-parameter gem1__pcs_ctrl = 32'hE000C200;
-parameter val_gem1__pcs_ctrl = 32'h00000000;
-parameter mask_gem1__pcs_ctrl = 32'h00000000;
-
-parameter gem1__pcs_status = 32'hE000C204;
-parameter val_gem1__pcs_status = 32'h00000000;
-parameter mask_gem1__pcs_status = 32'h00000000;
-
-parameter gem1__pcs_upper_phy_id = 32'hE000C208;
-parameter val_gem1__pcs_upper_phy_id = 32'h00000000;
-parameter mask_gem1__pcs_upper_phy_id = 32'h00000000;
-
-parameter gem1__pcs_lower_phy_id = 32'hE000C20C;
-parameter val_gem1__pcs_lower_phy_id = 32'h00000000;
-parameter mask_gem1__pcs_lower_phy_id = 32'h00000000;
-
-parameter gem1__pcs_autoneg_ad = 32'hE000C210;
-parameter val_gem1__pcs_autoneg_ad = 32'h00000000;
-parameter mask_gem1__pcs_autoneg_ad = 32'h00000000;
-
-parameter gem1__pcs_autoneg_ability = 32'hE000C214;
-parameter val_gem1__pcs_autoneg_ability = 32'h00000000;
-parameter mask_gem1__pcs_autoneg_ability = 32'h00000000;
-
-parameter gem1__pcs_autonec_exp = 32'hE000C218;
-parameter val_gem1__pcs_autonec_exp = 32'h00000000;
-parameter mask_gem1__pcs_autonec_exp = 32'h00000000;
-
-parameter gem1__pcs_autoneg_next_pg = 32'hE000C21C;
-parameter val_gem1__pcs_autoneg_next_pg = 32'h00000000;
-parameter mask_gem1__pcs_autoneg_next_pg = 32'h00000000;
-
-parameter gem1__pcs_autoneg_pnext_pg = 32'hE000C220;
-parameter val_gem1__pcs_autoneg_pnext_pg = 32'h00000000;
-parameter mask_gem1__pcs_autoneg_pnext_pg = 32'h00000000;
-
-parameter gem1__pcs_extended_status = 32'hE000C23C;
-parameter val_gem1__pcs_extended_status = 32'h00000000;
-parameter mask_gem1__pcs_extended_status = 32'h00000000;
-
-parameter gem1__design_cfg1 = 32'hE000C280;
-parameter val_gem1__design_cfg1 = 32'h02000000;
-parameter mask_gem1__design_cfg1 = 32'h0E000000;
-
-parameter gem1__design_cfg2 = 32'hE000C284;
-parameter val_gem1__design_cfg2 = 32'h2A813FFF;
-parameter mask_gem1__design_cfg2 = 32'h3FCFFFFF;
-
-parameter gem1__design_cfg3 = 32'hE000C288;
-parameter val_gem1__design_cfg3 = 32'h00000000;
-parameter mask_gem1__design_cfg3 = 32'hFFFFFFFF;
-
-parameter gem1__design_cfg4 = 32'hE000C28C;
-parameter val_gem1__design_cfg4 = 32'h00000000;
-parameter mask_gem1__design_cfg4 = 32'hFFFFFFFF;
-
-parameter gem1__design_cfg5 = 32'hE000C290;
-parameter val_gem1__design_cfg5 = 32'h002F2045;
-parameter mask_gem1__design_cfg5 = 32'h0FFFFCFF;
-
-parameter gem1__design_cfg6 = 32'hE000C294;
-parameter val_gem1__design_cfg6 = 32'h00000000;
-parameter mask_gem1__design_cfg6 = 32'h00000000;
-
-parameter gem1__design_cfg7 = 32'hE000C298;
-parameter val_gem1__design_cfg7 = 32'h00000000;
-parameter mask_gem1__design_cfg7 = 32'h00000000;
-
-parameter gem1__isr_pq1 = 32'hE000C400;
-parameter val_gem1__isr_pq1 = 32'h00000000;
-parameter mask_gem1__isr_pq1 = 32'h00000000;
-
-parameter gem1__isr_pq2 = 32'hE000C404;
-parameter val_gem1__isr_pq2 = 32'h00000000;
-parameter mask_gem1__isr_pq2 = 32'h00000000;
-
-parameter gem1__isr_pq3 = 32'hE000C408;
-parameter val_gem1__isr_pq3 = 32'h00000000;
-parameter mask_gem1__isr_pq3 = 32'h00000000;
-
-parameter gem1__isr_pq4 = 32'hE000C40C;
-parameter val_gem1__isr_pq4 = 32'h00000000;
-parameter mask_gem1__isr_pq4 = 32'h00000000;
-
-parameter gem1__isr_pq5 = 32'hE000C410;
-parameter val_gem1__isr_pq5 = 32'h00000000;
-parameter mask_gem1__isr_pq5 = 32'h00000000;
-
-parameter gem1__isr_pq6 = 32'hE000C414;
-parameter val_gem1__isr_pq6 = 32'h00000000;
-parameter mask_gem1__isr_pq6 = 32'h00000000;
-
-parameter gem1__isr_pq7 = 32'hE000C418;
-parameter val_gem1__isr_pq7 = 32'h00000000;
-parameter mask_gem1__isr_pq7 = 32'h00000000;
-
-parameter gem1__tx_qbar_q1 = 32'hE000C440;
-parameter val_gem1__tx_qbar_q1 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q1 = 32'h00000000;
-
-parameter gem1__tx_qbar_q2 = 32'hE000C444;
-parameter val_gem1__tx_qbar_q2 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q2 = 32'h00000000;
-
-parameter gem1__tx_qbar_q3 = 32'hE000C448;
-parameter val_gem1__tx_qbar_q3 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q3 = 32'h00000000;
-
-parameter gem1__tx_qbar_q4 = 32'hE000C44C;
-parameter val_gem1__tx_qbar_q4 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q4 = 32'h00000000;
-
-parameter gem1__tx_qbar_q5 = 32'hE000C450;
-parameter val_gem1__tx_qbar_q5 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q5 = 32'h00000000;
-
-parameter gem1__tx_qbar_q6 = 32'hE000C454;
-parameter val_gem1__tx_qbar_q6 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q6 = 32'h00000000;
-
-parameter gem1__tx_qbar_q7 = 32'hE000C458;
-parameter val_gem1__tx_qbar_q7 = 32'h00000000;
-parameter mask_gem1__tx_qbar_q7 = 32'h00000000;
-
-parameter gem1__rx_qbar_q1 = 32'hE000C480;
-parameter val_gem1__rx_qbar_q1 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q1 = 32'h00000000;
-
-parameter gem1__rx_qbar_q2 = 32'hE000C484;
-parameter val_gem1__rx_qbar_q2 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q2 = 32'h00000000;
-
-parameter gem1__rx_qbar_q3 = 32'hE000C488;
-parameter val_gem1__rx_qbar_q3 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q3 = 32'h00000000;
-
-parameter gem1__rx_qbar_q4 = 32'hE000C48C;
-parameter val_gem1__rx_qbar_q4 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q4 = 32'h00000000;
-
-parameter gem1__rx_qbar_q5 = 32'hE000C490;
-parameter val_gem1__rx_qbar_q5 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q5 = 32'h00000000;
-
-parameter gem1__rx_qbar_q6 = 32'hE000C494;
-parameter val_gem1__rx_qbar_q6 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q6 = 32'h00000000;
-
-parameter gem1__rx_qbar_q7 = 32'hE000C498;
-parameter val_gem1__rx_qbar_q7 = 32'h00000000;
-parameter mask_gem1__rx_qbar_q7 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q1 = 32'hE000C4A0;
-parameter val_gem1__rx_bufsz_q1 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q1 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q2 = 32'hE000C4A4;
-parameter val_gem1__rx_bufsz_q2 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q2 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q3 = 32'hE000C4A8;
-parameter val_gem1__rx_bufsz_q3 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q3 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q4 = 32'hE000C4AC;
-parameter val_gem1__rx_bufsz_q4 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q4 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q5 = 32'hE000C4B0;
-parameter val_gem1__rx_bufsz_q5 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q5 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q6 = 32'hE000C4B4;
-parameter val_gem1__rx_bufsz_q6 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q6 = 32'h00000000;
-
-parameter gem1__rx_bufsz_q7 = 32'hE000C4B8;
-parameter val_gem1__rx_bufsz_q7 = 32'h00000000;
-parameter mask_gem1__rx_bufsz_q7 = 32'h00000000;
-
-parameter gem1__screen_t1_r0 = 32'hE000C500;
-parameter val_gem1__screen_t1_r0 = 32'h00000000;
-parameter mask_gem1__screen_t1_r0 = 32'h00000000;
-
-parameter gem1__screen_t1_r1 = 32'hE000C504;
-parameter val_gem1__screen_t1_r1 = 32'h00000000;
-parameter mask_gem1__screen_t1_r1 = 32'h00000000;
-
-parameter gem1__screen_t1_r2 = 32'hE000C508;
-parameter val_gem1__screen_t1_r2 = 32'h00000000;
-parameter mask_gem1__screen_t1_r2 = 32'h00000000;
-
-parameter gem1__screen_t1_r3 = 32'hE000C50C;
-parameter val_gem1__screen_t1_r3 = 32'h00000000;
-parameter mask_gem1__screen_t1_r3 = 32'h00000000;
-
-parameter gem1__screen_t1_r4 = 32'hE000C510;
-parameter val_gem1__screen_t1_r4 = 32'h00000000;
-parameter mask_gem1__screen_t1_r4 = 32'h00000000;
-
-parameter gem1__screen_t1_r5 = 32'hE000C514;
-parameter val_gem1__screen_t1_r5 = 32'h00000000;
-parameter mask_gem1__screen_t1_r5 = 32'h00000000;
-
-parameter gem1__screen_t1_r6 = 32'hE000C518;
-parameter val_gem1__screen_t1_r6 = 32'h00000000;
-parameter mask_gem1__screen_t1_r6 = 32'h00000000;
-
-parameter gem1__screen_t1_r7 = 32'hE000C51C;
-parameter val_gem1__screen_t1_r7 = 32'h00000000;
-parameter mask_gem1__screen_t1_r7 = 32'h00000000;
-
-parameter gem1__screen_t1_r8 = 32'hE000C520;
-parameter val_gem1__screen_t1_r8 = 32'h00000000;
-parameter mask_gem1__screen_t1_r8 = 32'h00000000;
-
-parameter gem1__screen_t1_r9 = 32'hE000C524;
-parameter val_gem1__screen_t1_r9 = 32'h00000000;
-parameter mask_gem1__screen_t1_r9 = 32'h00000000;
-
-parameter gem1__screen_t1_r10 = 32'hE000C528;
-parameter val_gem1__screen_t1_r10 = 32'h00000000;
-parameter mask_gem1__screen_t1_r10 = 32'h00000000;
-
-parameter gem1__screen_t1_r11 = 32'hE000C52C;
-parameter val_gem1__screen_t1_r11 = 32'h00000000;
-parameter mask_gem1__screen_t1_r11 = 32'h00000000;
-
-parameter gem1__screen_t1_r12 = 32'hE000C530;
-parameter val_gem1__screen_t1_r12 = 32'h00000000;
-parameter mask_gem1__screen_t1_r12 = 32'h00000000;
-
-parameter gem1__screen_t1_r13 = 32'hE000C534;
-parameter val_gem1__screen_t1_r13 = 32'h00000000;
-parameter mask_gem1__screen_t1_r13 = 32'h00000000;
-
-parameter gem1__screen_t1_r14 = 32'hE000C538;
-parameter val_gem1__screen_t1_r14 = 32'h00000000;
-parameter mask_gem1__screen_t1_r14 = 32'h00000000;
-
-parameter gem1__screen_t1_r15 = 32'hE000C53C;
-parameter val_gem1__screen_t1_r15 = 32'h00000000;
-parameter mask_gem1__screen_t1_r15 = 32'h00000000;
-
-parameter gem1__screen_t2_r0 = 32'hE000C540;
-parameter val_gem1__screen_t2_r0 = 32'h00000000;
-parameter mask_gem1__screen_t2_r0 = 32'h00000000;
-
-parameter gem1__screen_t2_r1 = 32'hE000C544;
-parameter val_gem1__screen_t2_r1 = 32'h00000000;
-parameter mask_gem1__screen_t2_r1 = 32'h00000000;
-
-parameter gem1__screen_t2_r2 = 32'hE000C548;
-parameter val_gem1__screen_t2_r2 = 32'h00000000;
-parameter mask_gem1__screen_t2_r2 = 32'h00000000;
-
-parameter gem1__screen_t2_r3 = 32'hE000C54C;
-parameter val_gem1__screen_t2_r3 = 32'h00000000;
-parameter mask_gem1__screen_t2_r3 = 32'h00000000;
-
-parameter gem1__screen_t2_r4 = 32'hE000C550;
-parameter val_gem1__screen_t2_r4 = 32'h00000000;
-parameter mask_gem1__screen_t2_r4 = 32'h00000000;
-
-parameter gem1__screen_t2_r5 = 32'hE000C554;
-parameter val_gem1__screen_t2_r5 = 32'h00000000;
-parameter mask_gem1__screen_t2_r5 = 32'h00000000;
-
-parameter gem1__screen_t2_r6 = 32'hE000C558;
-parameter val_gem1__screen_t2_r6 = 32'h00000000;
-parameter mask_gem1__screen_t2_r6 = 32'h00000000;
-
-parameter gem1__screen_t2_r7 = 32'hE000C55C;
-parameter val_gem1__screen_t2_r7 = 32'h00000000;
-parameter mask_gem1__screen_t2_r7 = 32'h00000000;
-
-parameter gem1__screen_t2_r8 = 32'hE000C560;
-parameter val_gem1__screen_t2_r8 = 32'h00000000;
-parameter mask_gem1__screen_t2_r8 = 32'h00000000;
-
-parameter gem1__screen_t2_r9 = 32'hE000C564;
-parameter val_gem1__screen_t2_r9 = 32'h00000000;
-parameter mask_gem1__screen_t2_r9 = 32'h00000000;
-
-parameter gem1__screen_t2_r10 = 32'hE000C568;
-parameter val_gem1__screen_t2_r10 = 32'h00000000;
-parameter mask_gem1__screen_t2_r10 = 32'h00000000;
-
-parameter gem1__screen_t2_r11 = 32'hE000C56C;
-parameter val_gem1__screen_t2_r11 = 32'h00000000;
-parameter mask_gem1__screen_t2_r11 = 32'h00000000;
-
-parameter gem1__screen_t2_r12 = 32'hE000C570;
-parameter val_gem1__screen_t2_r12 = 32'h00000000;
-parameter mask_gem1__screen_t2_r12 = 32'h00000000;
-
-parameter gem1__screen_t2_r13 = 32'hE000C574;
-parameter val_gem1__screen_t2_r13 = 32'h00000000;
-parameter mask_gem1__screen_t2_r13 = 32'h00000000;
-
-parameter gem1__screen_t2_r14 = 32'hE000C578;
-parameter val_gem1__screen_t2_r14 = 32'h00000000;
-parameter mask_gem1__screen_t2_r14 = 32'h00000000;
-
-parameter gem1__screen_t2_r15 = 32'hE000C57C;
-parameter val_gem1__screen_t2_r15 = 32'h00000000;
-parameter mask_gem1__screen_t2_r15 = 32'h00000000;
-
-parameter gem1__intr_en_pq1 = 32'hE000C600;
-parameter val_gem1__intr_en_pq1 = 32'h00000000;
-parameter mask_gem1__intr_en_pq1 = 32'h00000000;
-
-parameter gem1__intr_en_pq2 = 32'hE000C604;
-parameter val_gem1__intr_en_pq2 = 32'h00000000;
-parameter mask_gem1__intr_en_pq2 = 32'h00000000;
-
-parameter gem1__intr_en_pq3 = 32'hE000C608;
-parameter val_gem1__intr_en_pq3 = 32'h00000000;
-parameter mask_gem1__intr_en_pq3 = 32'h00000000;
-
-parameter gem1__intr_en_pq4 = 32'hE000C60C;
-parameter val_gem1__intr_en_pq4 = 32'h00000000;
-parameter mask_gem1__intr_en_pq4 = 32'h00000000;
-
-parameter gem1__intr_en_pq5 = 32'hE000C610;
-parameter val_gem1__intr_en_pq5 = 32'h00000000;
-parameter mask_gem1__intr_en_pq5 = 32'h00000000;
-
-parameter gem1__intr_en_pq6 = 32'hE000C614;
-parameter val_gem1__intr_en_pq6 = 32'h00000000;
-parameter mask_gem1__intr_en_pq6 = 32'h00000000;
-
-parameter gem1__intr_en_pq7 = 32'hE000C618;
-parameter val_gem1__intr_en_pq7 = 32'h00000000;
-parameter mask_gem1__intr_en_pq7 = 32'h00000000;
-
-parameter gem1__intr_dis_pq1 = 32'hE000C620;
-parameter val_gem1__intr_dis_pq1 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq1 = 32'h00000000;
-
-parameter gem1__intr_dis_pq2 = 32'hE000C624;
-parameter val_gem1__intr_dis_pq2 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq2 = 32'h00000000;
-
-parameter gem1__intr_dis_pq3 = 32'hE000C628;
-parameter val_gem1__intr_dis_pq3 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq3 = 32'h00000000;
-
-parameter gem1__intr_dis_pq4 = 32'hE000C62C;
-parameter val_gem1__intr_dis_pq4 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq4 = 32'h00000000;
-
-parameter gem1__intr_dis_pq5 = 32'hE000C630;
-parameter val_gem1__intr_dis_pq5 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq5 = 32'h00000000;
-
-parameter gem1__intr_dis_pq6 = 32'hE000C634;
-parameter val_gem1__intr_dis_pq6 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq6 = 32'h00000000;
-
-parameter gem1__intr_dis_pq7 = 32'hE000C638;
-parameter val_gem1__intr_dis_pq7 = 32'h00000000;
-parameter mask_gem1__intr_dis_pq7 = 32'h00000000;
-
-parameter gem1__intr_mask_pq1 = 32'hE000C640;
-parameter val_gem1__intr_mask_pq1 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq1 = 32'h00000000;
-
-parameter gem1__intr_mask_pq2 = 32'hE000C644;
-parameter val_gem1__intr_mask_pq2 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq2 = 32'h00000000;
-
-parameter gem1__intr_mask_pq3 = 32'hE000C648;
-parameter val_gem1__intr_mask_pq3 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq3 = 32'h00000000;
-
-parameter gem1__intr_mask_pq4 = 32'hE000C64C;
-parameter val_gem1__intr_mask_pq4 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq4 = 32'h00000000;
-
-parameter gem1__intr_mask_pq5 = 32'hE000C650;
-parameter val_gem1__intr_mask_pq5 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq5 = 32'h00000000;
-
-parameter gem1__intr_mask_pq6 = 32'hE000C654;
-parameter val_gem1__intr_mask_pq6 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq6 = 32'h00000000;
-
-parameter gem1__intr_mask_pq7 = 32'hE000C658;
-parameter val_gem1__intr_mask_pq7 = 32'h00000000;
-parameter mask_gem1__intr_mask_pq7 = 32'h00000000;
-
-
-// ************************************************************
-// Module gpio gpio
-// doc version:
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gpio__MASK_DATA_0_LSW = 32'hE000A000;
-parameter val_gpio__MASK_DATA_0_LSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_0_LSW = 32'hFFFF0000;
-
-parameter gpio__MASK_DATA_0_MSW = 32'hE000A004;
-parameter val_gpio__MASK_DATA_0_MSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_0_MSW = 32'hFFFF0000;
-
-parameter gpio__MASK_DATA_1_LSW = 32'hE000A008;
-parameter val_gpio__MASK_DATA_1_LSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_1_LSW = 32'hFFFF0000;
-
-parameter gpio__MASK_DATA_1_MSW = 32'hE000A00C;
-parameter val_gpio__MASK_DATA_1_MSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_1_MSW = 32'h003FFFC0;
-
-parameter gpio__MASK_DATA_2_LSW = 32'hE000A010;
-parameter val_gpio__MASK_DATA_2_LSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_2_LSW = 32'hFFFFFFFF;
-
-parameter gpio__MASK_DATA_2_MSW = 32'hE000A014;
-parameter val_gpio__MASK_DATA_2_MSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_2_MSW = 32'hFFFFFFFF;
-
-parameter gpio__MASK_DATA_3_LSW = 32'hE000A018;
-parameter val_gpio__MASK_DATA_3_LSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_3_LSW = 32'hFFFFFFFF;
-
-parameter gpio__MASK_DATA_3_MSW = 32'hE000A01C;
-parameter val_gpio__MASK_DATA_3_MSW = 32'h00000000;
-parameter mask_gpio__MASK_DATA_3_MSW = 32'hFFFFFFFF;
-
-parameter gpio__DATA_0 = 32'hE000A040;
-parameter val_gpio__DATA_0 = 32'h00000000;
-parameter mask_gpio__DATA_0 = 32'h00000000;
-
-parameter gpio__DATA_1 = 32'hE000A044;
-parameter val_gpio__DATA_1 = 32'h00000000;
-parameter mask_gpio__DATA_1 = 32'h00000000;
-
-parameter gpio__DATA_2 = 32'hE000A048;
-parameter val_gpio__DATA_2 = 32'h00000000;
-parameter mask_gpio__DATA_2 = 32'hFFFFFFFF;
-
-parameter gpio__DATA_3 = 32'hE000A04C;
-parameter val_gpio__DATA_3 = 32'h00000000;
-parameter mask_gpio__DATA_3 = 32'hFFFFFFFF;
-
-parameter gpio__DATA_0_RO = 32'hE000A060;
-parameter val_gpio__DATA_0_RO = 32'h00000000;
-parameter mask_gpio__DATA_0_RO = 32'h00000000;
-
-parameter gpio__DATA_1_RO = 32'hE000A064;
-parameter val_gpio__DATA_1_RO = 32'h00000000;
-parameter mask_gpio__DATA_1_RO = 32'h00000000;
-
-parameter gpio__DATA_2_RO = 32'hE000A068;
-parameter val_gpio__DATA_2_RO = 32'h00000000;
-parameter mask_gpio__DATA_2_RO = 32'hFFFFFFFF;
-
-parameter gpio__DATA_3_RO = 32'hE000A06C;
-parameter val_gpio__DATA_3_RO = 32'h00000000;
-parameter mask_gpio__DATA_3_RO = 32'hFFFFFFFF;
-
-parameter gpio__BYPM_0 = 32'hE000A200;
-parameter val_gpio__BYPM_0 = 32'h00000000;
-parameter mask_gpio__BYPM_0 = 32'hFFFFFFFF;
-
-parameter gpio__DIRM_0 = 32'hE000A204;
-parameter val_gpio__DIRM_0 = 32'h00000000;
-parameter mask_gpio__DIRM_0 = 32'hFFFFFFFF;
-
-parameter gpio__OEN_0 = 32'hE000A208;
-parameter val_gpio__OEN_0 = 32'h00000000;
-parameter mask_gpio__OEN_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_MASK_0 = 32'hE000A20C;
-parameter val_gpio__INT_MASK_0 = 32'h00000000;
-parameter mask_gpio__INT_MASK_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_EN_0 = 32'hE000A210;
-parameter val_gpio__INT_EN_0 = 32'h00000000;
-parameter mask_gpio__INT_EN_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_DIS_0 = 32'hE000A214;
-parameter val_gpio__INT_DIS_0 = 32'h00000000;
-parameter mask_gpio__INT_DIS_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_STAT_0 = 32'hE000A218;
-parameter val_gpio__INT_STAT_0 = 32'h00000000;
-parameter mask_gpio__INT_STAT_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_TYPE_0 = 32'hE000A21C;
-parameter val_gpio__INT_TYPE_0 = 32'hFFFFFFFF;
-parameter mask_gpio__INT_TYPE_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_POLARITY_0 = 32'hE000A220;
-parameter val_gpio__INT_POLARITY_0 = 32'h00000000;
-parameter mask_gpio__INT_POLARITY_0 = 32'hFFFFFFFF;
-
-parameter gpio__INT_ANY_0 = 32'hE000A224;
-parameter val_gpio__INT_ANY_0 = 32'h00000000;
-parameter mask_gpio__INT_ANY_0 = 32'hFFFFFFFF;
-
-parameter gpio__BYPM_1 = 32'hE000A240;
-parameter val_gpio__BYPM_1 = 32'h00000000;
-parameter mask_gpio__BYPM_1 = 32'h003FFFFF;
-
-parameter gpio__DIRM_1 = 32'hE000A244;
-parameter val_gpio__DIRM_1 = 32'h00000000;
-parameter mask_gpio__DIRM_1 = 32'h003FFFFF;
-
-parameter gpio__OEN_1 = 32'hE000A248;
-parameter val_gpio__OEN_1 = 32'h00000000;
-parameter mask_gpio__OEN_1 = 32'h003FFFFF;
-
-parameter gpio__INT_MASK_1 = 32'hE000A24C;
-parameter val_gpio__INT_MASK_1 = 32'h00000000;
-parameter mask_gpio__INT_MASK_1 = 32'h003FFFFF;
-
-parameter gpio__INT_EN_1 = 32'hE000A250;
-parameter val_gpio__INT_EN_1 = 32'h00000000;
-parameter mask_gpio__INT_EN_1 = 32'h003FFFFF;
-
-parameter gpio__INT_DIS_1 = 32'hE000A254;
-parameter val_gpio__INT_DIS_1 = 32'h00000000;
-parameter mask_gpio__INT_DIS_1 = 32'h003FFFFF;
-
-parameter gpio__INT_STAT_1 = 32'hE000A258;
-parameter val_gpio__INT_STAT_1 = 32'h00000000;
-parameter mask_gpio__INT_STAT_1 = 32'h003FFFFF;
-
-parameter gpio__INT_TYPE_1 = 32'hE000A25C;
-parameter val_gpio__INT_TYPE_1 = 32'h003FFFFF;
-parameter mask_gpio__INT_TYPE_1 = 32'h003FFFFF;
-
-parameter gpio__INT_POLARITY_1 = 32'hE000A260;
-parameter val_gpio__INT_POLARITY_1 = 32'h00000000;
-parameter mask_gpio__INT_POLARITY_1 = 32'h003FFFFF;
-
-parameter gpio__INT_ANY_1 = 32'hE000A264;
-parameter val_gpio__INT_ANY_1 = 32'h00000000;
-parameter mask_gpio__INT_ANY_1 = 32'h003FFFFF;
-
-parameter gpio__BYPM_2 = 32'hE000A280;
-parameter val_gpio__BYPM_2 = 32'h00000000;
-parameter mask_gpio__BYPM_2 = 32'hFFFFFFFF;
-
-parameter gpio__DIRM_2 = 32'hE000A284;
-parameter val_gpio__DIRM_2 = 32'h00000000;
-parameter mask_gpio__DIRM_2 = 32'hFFFFFFFF;
-
-parameter gpio__OEN_2 = 32'hE000A288;
-parameter val_gpio__OEN_2 = 32'h00000000;
-parameter mask_gpio__OEN_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_MASK_2 = 32'hE000A28C;
-parameter val_gpio__INT_MASK_2 = 32'h00000000;
-parameter mask_gpio__INT_MASK_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_EN_2 = 32'hE000A290;
-parameter val_gpio__INT_EN_2 = 32'h00000000;
-parameter mask_gpio__INT_EN_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_DIS_2 = 32'hE000A294;
-parameter val_gpio__INT_DIS_2 = 32'h00000000;
-parameter mask_gpio__INT_DIS_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_STAT_2 = 32'hE000A298;
-parameter val_gpio__INT_STAT_2 = 32'h00000000;
-parameter mask_gpio__INT_STAT_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_TYPE_2 = 32'hE000A29C;
-parameter val_gpio__INT_TYPE_2 = 32'hFFFFFFFF;
-parameter mask_gpio__INT_TYPE_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_POLARITY_2 = 32'hE000A2A0;
-parameter val_gpio__INT_POLARITY_2 = 32'h00000000;
-parameter mask_gpio__INT_POLARITY_2 = 32'hFFFFFFFF;
-
-parameter gpio__INT_ANY_2 = 32'hE000A2A4;
-parameter val_gpio__INT_ANY_2 = 32'h00000000;
-parameter mask_gpio__INT_ANY_2 = 32'hFFFFFFFF;
-
-parameter gpio__BYPM_3 = 32'hE000A2C0;
-parameter val_gpio__BYPM_3 = 32'h00000000;
-parameter mask_gpio__BYPM_3 = 32'hFFFFFFFF;
-
-parameter gpio__DIRM_3 = 32'hE000A2C4;
-parameter val_gpio__DIRM_3 = 32'h00000000;
-parameter mask_gpio__DIRM_3 = 32'hFFFFFFFF;
-
-parameter gpio__OEN_3 = 32'hE000A2C8;
-parameter val_gpio__OEN_3 = 32'h00000000;
-parameter mask_gpio__OEN_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_MASK_3 = 32'hE000A2CC;
-parameter val_gpio__INT_MASK_3 = 32'h00000000;
-parameter mask_gpio__INT_MASK_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_EN_3 = 32'hE000A2D0;
-parameter val_gpio__INT_EN_3 = 32'h00000000;
-parameter mask_gpio__INT_EN_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_DIS_3 = 32'hE000A2D4;
-parameter val_gpio__INT_DIS_3 = 32'h00000000;
-parameter mask_gpio__INT_DIS_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_STAT_3 = 32'hE000A2D8;
-parameter val_gpio__INT_STAT_3 = 32'h00000000;
-parameter mask_gpio__INT_STAT_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_TYPE_3 = 32'hE000A2DC;
-parameter val_gpio__INT_TYPE_3 = 32'hFFFFFFFF;
-parameter mask_gpio__INT_TYPE_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_POLARITY_3 = 32'hE000A2E0;
-parameter val_gpio__INT_POLARITY_3 = 32'h00000000;
-parameter mask_gpio__INT_POLARITY_3 = 32'hFFFFFFFF;
-
-parameter gpio__INT_ANY_3 = 32'hE000A2E4;
-parameter val_gpio__INT_ANY_3 = 32'h00000000;
-parameter mask_gpio__INT_ANY_3 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module gpv_iou_switch gpv_iou_switch
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gpv_iou_switch__Remap = 32'hE0200000;
-parameter val_gpv_iou_switch__Remap = 32'h00000000;
-parameter mask_gpv_iou_switch__Remap = 32'h000000FF;
-
-parameter gpv_iou_switch__security2_sdio0 = 32'hE0200008;
-parameter val_gpv_iou_switch__security2_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__security2_sdio0 = 32'h00000001;
-
-parameter gpv_iou_switch__security3_sdio1 = 32'hE020000C;
-parameter val_gpv_iou_switch__security3_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__security3_sdio1 = 32'h00000001;
-
-parameter gpv_iou_switch__security4_qspi = 32'hE0200010;
-parameter val_gpv_iou_switch__security4_qspi = 32'h00000000;
-parameter mask_gpv_iou_switch__security4_qspi = 32'h00000001;
-
-parameter gpv_iou_switch__security5_miou = 32'hE0200014;
-parameter val_gpv_iou_switch__security5_miou = 32'h00000000;
-parameter mask_gpv_iou_switch__security5_miou = 32'h00000001;
-
-parameter gpv_iou_switch__security6_apb_slaves = 32'hE0200018;
-parameter val_gpv_iou_switch__security6_apb_slaves = 32'h00000000;
-parameter mask_gpv_iou_switch__security6_apb_slaves = 32'h00007FFF;
-
-parameter gpv_iou_switch__security7_smc = 32'hE020001C;
-parameter val_gpv_iou_switch__security7_smc = 32'h00000000;
-parameter mask_gpv_iou_switch__security7_smc = 32'h00000001;
-
-parameter gpv_iou_switch__peripheral_id4 = 32'hE0201FD0;
-parameter val_gpv_iou_switch__peripheral_id4 = 32'h00000004;
-parameter mask_gpv_iou_switch__peripheral_id4 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id5 = 32'hE0201FD4;
-parameter val_gpv_iou_switch__peripheral_id5 = 32'h00000000;
-parameter mask_gpv_iou_switch__peripheral_id5 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id6 = 32'hE0201FD8;
-parameter val_gpv_iou_switch__peripheral_id6 = 32'h00000000;
-parameter mask_gpv_iou_switch__peripheral_id6 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id7 = 32'hE0201FDC;
-parameter val_gpv_iou_switch__peripheral_id7 = 32'h00000000;
-parameter mask_gpv_iou_switch__peripheral_id7 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id0 = 32'hE0201FE0;
-parameter val_gpv_iou_switch__peripheral_id0 = 32'h00000001;
-parameter mask_gpv_iou_switch__peripheral_id0 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id1 = 32'hE0201FE4;
-parameter val_gpv_iou_switch__peripheral_id1 = 32'h000000B3;
-parameter mask_gpv_iou_switch__peripheral_id1 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id2 = 32'hE0201FE8;
-parameter val_gpv_iou_switch__peripheral_id2 = 32'h0000005B;
-parameter mask_gpv_iou_switch__peripheral_id2 = 32'h000000FF;
-
-parameter gpv_iou_switch__peripheral_id3 = 32'hE0201FEC;
-parameter val_gpv_iou_switch__peripheral_id3 = 32'h00000000;
-parameter mask_gpv_iou_switch__peripheral_id3 = 32'h000000FF;
-
-parameter gpv_iou_switch__component_id0 = 32'hE0201FF0;
-parameter val_gpv_iou_switch__component_id0 = 32'h0000000D;
-parameter mask_gpv_iou_switch__component_id0 = 32'h000000FF;
-
-parameter gpv_iou_switch__component_id1 = 32'hE0201FF4;
-parameter val_gpv_iou_switch__component_id1 = 32'h000000F0;
-parameter mask_gpv_iou_switch__component_id1 = 32'h000000FF;
-
-parameter gpv_iou_switch__component_id2 = 32'hE0201FF8;
-parameter val_gpv_iou_switch__component_id2 = 32'h00000005;
-parameter mask_gpv_iou_switch__component_id2 = 32'h000000FF;
-
-parameter gpv_iou_switch__component_id3 = 32'hE0201FFC;
-parameter val_gpv_iou_switch__component_id3 = 32'h000000B1;
-parameter mask_gpv_iou_switch__component_id3 = 32'h000000FF;
-
-parameter gpv_iou_switch__fn_mod_bm_iss_sdio0 = 32'hE0202008;
-parameter val_gpv_iou_switch__fn_mod_bm_iss_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_bm_iss_sdio0 = 32'h00000003;
-
-parameter gpv_iou_switch__ahb_cntl_sdio0 = 32'hE0202044;
-parameter val_gpv_iou_switch__ahb_cntl_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__ahb_cntl_sdio0 = 32'h00000000;
-
-parameter gpv_iou_switch__fn_mod_bm_iss_sdio1 = 32'hE0203008;
-parameter val_gpv_iou_switch__fn_mod_bm_iss_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_bm_iss_sdio1 = 32'h00000003;
-
-parameter gpv_iou_switch__ahb_cntl_sdio1 = 32'hE0203044;
-parameter val_gpv_iou_switch__ahb_cntl_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__ahb_cntl_sdio1 = 32'h00000000;
-
-parameter gpv_iou_switch__fn_mod_bm_iss_qspi = 32'hE0204008;
-parameter val_gpv_iou_switch__fn_mod_bm_iss_qspi = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_bm_iss_qspi = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_bm_iss_miou = 32'hE0205008;
-parameter val_gpv_iou_switch__fn_mod_bm_iss_miou = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_bm_iss_miou = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_bm_iss_smc = 32'hE0207008;
-parameter val_gpv_iou_switch__fn_mod_bm_iss_smc = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_bm_iss_smc = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_ahb_gem0 = 32'hE0242028;
-parameter val_gpv_iou_switch__fn_mod_ahb_gem0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_ahb_gem0 = 32'h00000007;
-
-parameter gpv_iou_switch__read_qos_gem0 = 32'hE0242100;
-parameter val_gpv_iou_switch__read_qos_gem0 = 32'h00000000;
-parameter mask_gpv_iou_switch__read_qos_gem0 = 32'h0000000F;
-
-parameter gpv_iou_switch__write_qos_gem0 = 32'hE0242104;
-parameter val_gpv_iou_switch__write_qos_gem0 = 32'h00000000;
-parameter mask_gpv_iou_switch__write_qos_gem0 = 32'h0000000F;
-
-parameter gpv_iou_switch__fn_mod_iss_gem0 = 32'hE0242108;
-parameter val_gpv_iou_switch__fn_mod_iss_gem0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_gem0 = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_ahb_gem1 = 32'hE0243028;
-parameter val_gpv_iou_switch__fn_mod_ahb_gem1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_ahb_gem1 = 32'h00000007;
-
-parameter gpv_iou_switch__read_qos_gem1 = 32'hE0243100;
-parameter val_gpv_iou_switch__read_qos_gem1 = 32'h00000000;
-parameter mask_gpv_iou_switch__read_qos_gem1 = 32'h0000000F;
-
-parameter gpv_iou_switch__write_qos_gem1 = 32'hE0243104;
-parameter val_gpv_iou_switch__write_qos_gem1 = 32'h00000000;
-parameter mask_gpv_iou_switch__write_qos_gem1 = 32'h0000000F;
-
-parameter gpv_iou_switch__fn_mod_iss_gem1 = 32'hE0243108;
-parameter val_gpv_iou_switch__fn_mod_iss_gem1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_gem1 = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_ahb_usb0 = 32'hE0244028;
-parameter val_gpv_iou_switch__fn_mod_ahb_usb0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_ahb_usb0 = 32'h00000007;
-
-parameter gpv_iou_switch__read_qos_usb0 = 32'hE0244100;
-parameter val_gpv_iou_switch__read_qos_usb0 = 32'h00000000;
-parameter mask_gpv_iou_switch__read_qos_usb0 = 32'h0000000F;
-
-parameter gpv_iou_switch__write_qos_usb0 = 32'hE0244104;
-parameter val_gpv_iou_switch__write_qos_usb0 = 32'h00000000;
-parameter mask_gpv_iou_switch__write_qos_usb0 = 32'h0000000F;
-
-parameter gpv_iou_switch__fn_mod_iss_usb0 = 32'hE0244108;
-parameter val_gpv_iou_switch__fn_mod_iss_usb0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_usb0 = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_ahb_usb1 = 32'hE0245028;
-parameter val_gpv_iou_switch__fn_mod_ahb_usb1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_ahb_usb1 = 32'h00000007;
-
-parameter gpv_iou_switch__read_qos_usb1 = 32'hE0245100;
-parameter val_gpv_iou_switch__read_qos_usb1 = 32'h00000000;
-parameter mask_gpv_iou_switch__read_qos_usb1 = 32'h0000000F;
-
-parameter gpv_iou_switch__write_qos_usb1 = 32'hE0245104;
-parameter val_gpv_iou_switch__write_qos_usb1 = 32'h00000000;
-parameter mask_gpv_iou_switch__write_qos_usb1 = 32'h0000000F;
-
-parameter gpv_iou_switch__fn_mod_iss_usb1 = 32'hE0245108;
-parameter val_gpv_iou_switch__fn_mod_iss_usb1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_usb1 = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_ahb_sdio0 = 32'hE0246028;
-parameter val_gpv_iou_switch__fn_mod_ahb_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_ahb_sdio0 = 32'h00000007;
-
-parameter gpv_iou_switch__read_qos_sdio0 = 32'hE0246100;
-parameter val_gpv_iou_switch__read_qos_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__read_qos_sdio0 = 32'h0000000F;
-
-parameter gpv_iou_switch__write_qos_sdio0 = 32'hE0246104;
-parameter val_gpv_iou_switch__write_qos_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__write_qos_sdio0 = 32'h0000000F;
-
-parameter gpv_iou_switch__fn_mod_iss_sdio0 = 32'hE0246108;
-parameter val_gpv_iou_switch__fn_mod_iss_sdio0 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_sdio0 = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_ahb_sdio1 = 32'hE0247028;
-parameter val_gpv_iou_switch__fn_mod_ahb_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_ahb_sdio1 = 32'h00000007;
-
-parameter gpv_iou_switch__read_qos_sdio1 = 32'hE0247100;
-parameter val_gpv_iou_switch__read_qos_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__read_qos_sdio1 = 32'h0000000F;
-
-parameter gpv_iou_switch__write_qos_sdio1 = 32'hE0247104;
-parameter val_gpv_iou_switch__write_qos_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__write_qos_sdio1 = 32'h0000000F;
-
-parameter gpv_iou_switch__fn_mod_iss_sdio1 = 32'hE0247108;
-parameter val_gpv_iou_switch__fn_mod_iss_sdio1 = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_sdio1 = 32'h00000003;
-
-parameter gpv_iou_switch__fn_mod_iss_siou = 32'hE0249108;
-parameter val_gpv_iou_switch__fn_mod_iss_siou = 32'h00000000;
-parameter mask_gpv_iou_switch__fn_mod_iss_siou = 32'h00000003;
-
-
-// ************************************************************
-// Module gpv_qos301_cpu qos301
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gpv_qos301_cpu__qos_cntl = 32'hF894610C;
-parameter val_gpv_qos301_cpu__qos_cntl = 32'h00000000;
-parameter mask_gpv_qos301_cpu__qos_cntl = 32'h000000FF;
-
-parameter gpv_qos301_cpu__max_ot = 32'hF8946110;
-parameter val_gpv_qos301_cpu__max_ot = 32'h00000000;
-parameter mask_gpv_qos301_cpu__max_ot = 32'h3FFF3FFF;
-
-parameter gpv_qos301_cpu__max_comb_ot = 32'hF8946114;
-parameter val_gpv_qos301_cpu__max_comb_ot = 32'h00000000;
-parameter mask_gpv_qos301_cpu__max_comb_ot = 32'h00007FFF;
-
-parameter gpv_qos301_cpu__aw_p = 32'hF8946118;
-parameter val_gpv_qos301_cpu__aw_p = 32'h00000000;
-parameter mask_gpv_qos301_cpu__aw_p = 32'hFF000000;
-
-parameter gpv_qos301_cpu__aw_b = 32'hF894611C;
-parameter val_gpv_qos301_cpu__aw_b = 32'h00000000;
-parameter mask_gpv_qos301_cpu__aw_b = 32'h0000FFFF;
-
-parameter gpv_qos301_cpu__aw_r = 32'hF8946120;
-parameter val_gpv_qos301_cpu__aw_r = 32'h00000000;
-parameter mask_gpv_qos301_cpu__aw_r = 32'hFFF00000;
-
-parameter gpv_qos301_cpu__ar_p = 32'hF8946124;
-parameter val_gpv_qos301_cpu__ar_p = 32'h00000000;
-parameter mask_gpv_qos301_cpu__ar_p = 32'hFF000000;
-
-parameter gpv_qos301_cpu__ar_b = 32'hF8946128;
-parameter val_gpv_qos301_cpu__ar_b = 32'h00000000;
-parameter mask_gpv_qos301_cpu__ar_b = 32'h0000FFFF;
-
-parameter gpv_qos301_cpu__ar_r = 32'hF894612C;
-parameter val_gpv_qos301_cpu__ar_r = 32'h00000000;
-parameter mask_gpv_qos301_cpu__ar_r = 32'hFFF00000;
-
-
-// ************************************************************
-// Module gpv_qos301_dmac qos301
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gpv_qos301_dmac__qos_cntl = 32'hF894710C;
-parameter val_gpv_qos301_dmac__qos_cntl = 32'h00000000;
-parameter mask_gpv_qos301_dmac__qos_cntl = 32'h000000FF;
-
-parameter gpv_qos301_dmac__max_ot = 32'hF8947110;
-parameter val_gpv_qos301_dmac__max_ot = 32'h00000000;
-parameter mask_gpv_qos301_dmac__max_ot = 32'h3FFF3FFF;
-
-parameter gpv_qos301_dmac__max_comb_ot = 32'hF8947114;
-parameter val_gpv_qos301_dmac__max_comb_ot = 32'h00000000;
-parameter mask_gpv_qos301_dmac__max_comb_ot = 32'h00007FFF;
-
-parameter gpv_qos301_dmac__aw_p = 32'hF8947118;
-parameter val_gpv_qos301_dmac__aw_p = 32'h00000000;
-parameter mask_gpv_qos301_dmac__aw_p = 32'hFF000000;
-
-parameter gpv_qos301_dmac__aw_b = 32'hF894711C;
-parameter val_gpv_qos301_dmac__aw_b = 32'h00000000;
-parameter mask_gpv_qos301_dmac__aw_b = 32'h0000FFFF;
-
-parameter gpv_qos301_dmac__aw_r = 32'hF8947120;
-parameter val_gpv_qos301_dmac__aw_r = 32'h00000000;
-parameter mask_gpv_qos301_dmac__aw_r = 32'hFFF00000;
-
-parameter gpv_qos301_dmac__ar_p = 32'hF8947124;
-parameter val_gpv_qos301_dmac__ar_p = 32'h00000000;
-parameter mask_gpv_qos301_dmac__ar_p = 32'hFF000000;
-
-parameter gpv_qos301_dmac__ar_b = 32'hF8947128;
-parameter val_gpv_qos301_dmac__ar_b = 32'h00000000;
-parameter mask_gpv_qos301_dmac__ar_b = 32'h0000FFFF;
-
-parameter gpv_qos301_dmac__ar_r = 32'hF894712C;
-parameter val_gpv_qos301_dmac__ar_r = 32'h00000000;
-parameter mask_gpv_qos301_dmac__ar_r = 32'hFFF00000;
-
-
-// ************************************************************
-// Module gpv_qos301_iou qos301
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gpv_qos301_iou__qos_cntl = 32'hF894810C;
-parameter val_gpv_qos301_iou__qos_cntl = 32'h00000000;
-parameter mask_gpv_qos301_iou__qos_cntl = 32'h000000FF;
-
-parameter gpv_qos301_iou__max_ot = 32'hF8948110;
-parameter val_gpv_qos301_iou__max_ot = 32'h00000000;
-parameter mask_gpv_qos301_iou__max_ot = 32'h3FFF3FFF;
-
-parameter gpv_qos301_iou__max_comb_ot = 32'hF8948114;
-parameter val_gpv_qos301_iou__max_comb_ot = 32'h00000000;
-parameter mask_gpv_qos301_iou__max_comb_ot = 32'h00007FFF;
-
-parameter gpv_qos301_iou__aw_p = 32'hF8948118;
-parameter val_gpv_qos301_iou__aw_p = 32'h00000000;
-parameter mask_gpv_qos301_iou__aw_p = 32'hFF000000;
-
-parameter gpv_qos301_iou__aw_b = 32'hF894811C;
-parameter val_gpv_qos301_iou__aw_b = 32'h00000000;
-parameter mask_gpv_qos301_iou__aw_b = 32'h0000FFFF;
-
-parameter gpv_qos301_iou__aw_r = 32'hF8948120;
-parameter val_gpv_qos301_iou__aw_r = 32'h00000000;
-parameter mask_gpv_qos301_iou__aw_r = 32'hFFF00000;
-
-parameter gpv_qos301_iou__ar_p = 32'hF8948124;
-parameter val_gpv_qos301_iou__ar_p = 32'h00000000;
-parameter mask_gpv_qos301_iou__ar_p = 32'hFF000000;
-
-parameter gpv_qos301_iou__ar_b = 32'hF8948128;
-parameter val_gpv_qos301_iou__ar_b = 32'h00000000;
-parameter mask_gpv_qos301_iou__ar_b = 32'h0000FFFF;
-
-parameter gpv_qos301_iou__ar_r = 32'hF894812C;
-parameter val_gpv_qos301_iou__ar_r = 32'h00000000;
-parameter mask_gpv_qos301_iou__ar_r = 32'hFFF00000;
-
-
-// ************************************************************
-// Module gpv_trustzone nic301_addr_region_ctrl_registers
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter gpv_trustzone__Remap = 32'hF8900000;
-parameter val_gpv_trustzone__Remap = 32'h00000000;
-parameter mask_gpv_trustzone__Remap = 32'h000000C0;
-
-parameter gpv_trustzone__security_fssw_s0 = 32'hF890001C;
-parameter val_gpv_trustzone__security_fssw_s0 = 32'h00000000;
-parameter mask_gpv_trustzone__security_fssw_s0 = 32'h00000001;
-
-parameter gpv_trustzone__security_fssw_s1 = 32'hF8900020;
-parameter val_gpv_trustzone__security_fssw_s1 = 32'h00000000;
-parameter mask_gpv_trustzone__security_fssw_s1 = 32'h00000001;
-
-parameter gpv_trustzone__security_apb = 32'hF8900028;
-parameter val_gpv_trustzone__security_apb = 32'h00000000;
-parameter mask_gpv_trustzone__security_apb = 32'h0000003F;
-
-
-// ************************************************************
-// Module i2c0 IIC
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter i2c0__Control_reg0 = 32'hE0004000;
-parameter val_i2c0__Control_reg0 = 32'h00000000;
-parameter mask_i2c0__Control_reg0 = 32'h0000FFFF;
-
-parameter i2c0__Status_reg0 = 32'hE0004004;
-parameter val_i2c0__Status_reg0 = 32'h00000000;
-parameter mask_i2c0__Status_reg0 = 32'h0000FFFF;
-
-parameter i2c0__I2C_address_reg0 = 32'hE0004008;
-parameter val_i2c0__I2C_address_reg0 = 32'h00000000;
-parameter mask_i2c0__I2C_address_reg0 = 32'h0000FFFF;
-
-parameter i2c0__I2C_data_reg0 = 32'hE000400C;
-parameter val_i2c0__I2C_data_reg0 = 32'h00000000;
-parameter mask_i2c0__I2C_data_reg0 = 32'h0000FFFF;
-
-parameter i2c0__Interrupt_status_reg0 = 32'hE0004010;
-parameter val_i2c0__Interrupt_status_reg0 = 32'h00000000;
-parameter mask_i2c0__Interrupt_status_reg0 = 32'h0000FFFF;
-
-parameter i2c0__Transfer_size_reg0 = 32'hE0004014;
-parameter val_i2c0__Transfer_size_reg0 = 32'h00000000;
-parameter mask_i2c0__Transfer_size_reg0 = 32'h000000FF;
-
-parameter i2c0__Slave_mon_pause_reg0 = 32'hE0004018;
-parameter val_i2c0__Slave_mon_pause_reg0 = 32'h00000000;
-parameter mask_i2c0__Slave_mon_pause_reg0 = 32'h000000FF;
-
-parameter i2c0__Time_out_reg0 = 32'hE000401C;
-parameter val_i2c0__Time_out_reg0 = 32'h0000001F;
-parameter mask_i2c0__Time_out_reg0 = 32'h000000FF;
-
-parameter i2c0__Intrpt_mask_reg0 = 32'hE0004020;
-parameter val_i2c0__Intrpt_mask_reg0 = 32'h000002FF;
-parameter mask_i2c0__Intrpt_mask_reg0 = 32'h0000FFFF;
-
-parameter i2c0__Intrpt_enable_reg0 = 32'hE0004024;
-parameter val_i2c0__Intrpt_enable_reg0 = 32'h00000000;
-parameter mask_i2c0__Intrpt_enable_reg0 = 32'h0000FFFF;
-
-parameter i2c0__Intrpt_disable_reg0 = 32'hE0004028;
-parameter val_i2c0__Intrpt_disable_reg0 = 32'h00000000;
-parameter mask_i2c0__Intrpt_disable_reg0 = 32'h0000FFFF;
-
-
-// ************************************************************
-// Module i2c1 IIC
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter i2c1__Control_reg0 = 32'hE0005000;
-parameter val_i2c1__Control_reg0 = 32'h00000000;
-parameter mask_i2c1__Control_reg0 = 32'h0000FFFF;
-
-parameter i2c1__Status_reg0 = 32'hE0005004;
-parameter val_i2c1__Status_reg0 = 32'h00000000;
-parameter mask_i2c1__Status_reg0 = 32'h0000FFFF;
-
-parameter i2c1__I2C_address_reg0 = 32'hE0005008;
-parameter val_i2c1__I2C_address_reg0 = 32'h00000000;
-parameter mask_i2c1__I2C_address_reg0 = 32'h0000FFFF;
-
-parameter i2c1__I2C_data_reg0 = 32'hE000500C;
-parameter val_i2c1__I2C_data_reg0 = 32'h00000000;
-parameter mask_i2c1__I2C_data_reg0 = 32'h0000FFFF;
-
-parameter i2c1__Interrupt_status_reg0 = 32'hE0005010;
-parameter val_i2c1__Interrupt_status_reg0 = 32'h00000000;
-parameter mask_i2c1__Interrupt_status_reg0 = 32'h0000FFFF;
-
-parameter i2c1__Transfer_size_reg0 = 32'hE0005014;
-parameter val_i2c1__Transfer_size_reg0 = 32'h00000000;
-parameter mask_i2c1__Transfer_size_reg0 = 32'h000000FF;
-
-parameter i2c1__Slave_mon_pause_reg0 = 32'hE0005018;
-parameter val_i2c1__Slave_mon_pause_reg0 = 32'h00000000;
-parameter mask_i2c1__Slave_mon_pause_reg0 = 32'h000000FF;
-
-parameter i2c1__Time_out_reg0 = 32'hE000501C;
-parameter val_i2c1__Time_out_reg0 = 32'h0000001F;
-parameter mask_i2c1__Time_out_reg0 = 32'h000000FF;
-
-parameter i2c1__Intrpt_mask_reg0 = 32'hE0005020;
-parameter val_i2c1__Intrpt_mask_reg0 = 32'h000002FF;
-parameter mask_i2c1__Intrpt_mask_reg0 = 32'h0000FFFF;
-
-parameter i2c1__Intrpt_enable_reg0 = 32'hE0005024;
-parameter val_i2c1__Intrpt_enable_reg0 = 32'h00000000;
-parameter mask_i2c1__Intrpt_enable_reg0 = 32'h0000FFFF;
-
-parameter i2c1__Intrpt_disable_reg0 = 32'hE0005028;
-parameter val_i2c1__Intrpt_disable_reg0 = 32'h00000000;
-parameter mask_i2c1__Intrpt_disable_reg0 = 32'h0000FFFF;
-
-
-// ************************************************************
-// Module l2cache L2Cpl310
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter l2cache__reg0_cache_id = 32'hF8F02000;
-parameter val_l2cache__reg0_cache_id = 32'h410000C8;
-parameter mask_l2cache__reg0_cache_id = 32'hFFFFFFFF;
-
-parameter l2cache__reg0_cache_type = 32'hF8F02004;
-parameter val_l2cache__reg0_cache_type = 32'h9E300300;
-parameter mask_l2cache__reg0_cache_type = 32'hFFFFFFFF;
-
-parameter l2cache__reg1_control = 32'hF8F02100;
-parameter val_l2cache__reg1_control = 32'h00000000;
-parameter mask_l2cache__reg1_control = 32'h7FFFFFFF;
-
-parameter l2cache__reg1_aux_control = 32'hF8F02104;
-parameter val_l2cache__reg1_aux_control = 32'h02050000;
-parameter mask_l2cache__reg1_aux_control = 32'hFFFFFFFF;
-
-parameter l2cache__reg1_tag_ram_control = 32'hF8F02108;
-parameter val_l2cache__reg1_tag_ram_control = 32'h00000777;
-parameter mask_l2cache__reg1_tag_ram_control = 32'hFFFFFFFF;
-
-parameter l2cache__reg1_data_ram_control = 32'hF8F0210C;
-parameter val_l2cache__reg1_data_ram_control = 32'h00000777;
-parameter mask_l2cache__reg1_data_ram_control = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_ev_counter_ctrl = 32'hF8F02200;
-parameter val_l2cache__reg2_ev_counter_ctrl = 32'h00000000;
-parameter mask_l2cache__reg2_ev_counter_ctrl = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_ev_counter1_cfg = 32'hF8F02204;
-parameter val_l2cache__reg2_ev_counter1_cfg = 32'h00000000;
-parameter mask_l2cache__reg2_ev_counter1_cfg = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_ev_counter0_cfg = 32'hF8F02208;
-parameter val_l2cache__reg2_ev_counter0_cfg = 32'h00000000;
-parameter mask_l2cache__reg2_ev_counter0_cfg = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_ev_counter1 = 32'hF8F0220C;
-parameter val_l2cache__reg2_ev_counter1 = 32'h00000000;
-parameter mask_l2cache__reg2_ev_counter1 = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_ev_counter0 = 32'hF8F02210;
-parameter val_l2cache__reg2_ev_counter0 = 32'h00000000;
-parameter mask_l2cache__reg2_ev_counter0 = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_int_mask = 32'hF8F02214;
-parameter val_l2cache__reg2_int_mask = 32'h00000000;
-parameter mask_l2cache__reg2_int_mask = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_int_mask_status = 32'hF8F02218;
-parameter val_l2cache__reg2_int_mask_status = 32'h00000000;
-parameter mask_l2cache__reg2_int_mask_status = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_int_raw_status = 32'hF8F0221C;
-parameter val_l2cache__reg2_int_raw_status = 32'h00000000;
-parameter mask_l2cache__reg2_int_raw_status = 32'hFFFFFFFF;
-
-parameter l2cache__reg2_int_clear = 32'hF8F02220;
-parameter val_l2cache__reg2_int_clear = 32'h00000000;
-parameter mask_l2cache__reg2_int_clear = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_cache_sync = 32'hF8F02730;
-parameter val_l2cache__reg7_cache_sync = 32'h00000000;
-parameter mask_l2cache__reg7_cache_sync = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_inv_pa = 32'hF8F02770;
-parameter val_l2cache__reg7_inv_pa = 32'h00000000;
-parameter mask_l2cache__reg7_inv_pa = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_inv_way = 32'hF8F0277C;
-parameter val_l2cache__reg7_inv_way = 32'h00000000;
-parameter mask_l2cache__reg7_inv_way = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_clean_pa = 32'hF8F027B0;
-parameter val_l2cache__reg7_clean_pa = 32'h00000000;
-parameter mask_l2cache__reg7_clean_pa = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_clean_index = 32'hF8F027B8;
-parameter val_l2cache__reg7_clean_index = 32'h00000000;
-parameter mask_l2cache__reg7_clean_index = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_clean_way = 32'hF8F027BC;
-parameter val_l2cache__reg7_clean_way = 32'h00000000;
-parameter mask_l2cache__reg7_clean_way = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_clean_inv_pa = 32'hF8F027F0;
-parameter val_l2cache__reg7_clean_inv_pa = 32'h00000000;
-parameter mask_l2cache__reg7_clean_inv_pa = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_clean_inv_index = 32'hF8F027F8;
-parameter val_l2cache__reg7_clean_inv_index = 32'h00000000;
-parameter mask_l2cache__reg7_clean_inv_index = 32'hFFFFFFFF;
-
-parameter l2cache__reg7_clean_inv_way = 32'hF8F027FC;
-parameter val_l2cache__reg7_clean_inv_way = 32'h00000000;
-parameter mask_l2cache__reg7_clean_inv_way = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown0 = 32'hF8F02900;
-parameter val_l2cache__reg9_d_lockdown0 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown0 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown0 = 32'hF8F02904;
-parameter val_l2cache__reg9_i_lockdown0 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown0 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown1 = 32'hF8F02908;
-parameter val_l2cache__reg9_d_lockdown1 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown1 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown1 = 32'hF8F0290C;
-parameter val_l2cache__reg9_i_lockdown1 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown1 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown2 = 32'hF8F02910;
-parameter val_l2cache__reg9_d_lockdown2 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown2 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown2 = 32'hF8F02914;
-parameter val_l2cache__reg9_i_lockdown2 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown2 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown3 = 32'hF8F02918;
-parameter val_l2cache__reg9_d_lockdown3 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown3 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown3 = 32'hF8F0291C;
-parameter val_l2cache__reg9_i_lockdown3 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown3 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown4 = 32'hF8F02920;
-parameter val_l2cache__reg9_d_lockdown4 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown4 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown4 = 32'hF8F02924;
-parameter val_l2cache__reg9_i_lockdown4 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown4 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown5 = 32'hF8F02928;
-parameter val_l2cache__reg9_d_lockdown5 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown5 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown5 = 32'hF8F0292C;
-parameter val_l2cache__reg9_i_lockdown5 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown5 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown6 = 32'hF8F02930;
-parameter val_l2cache__reg9_d_lockdown6 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown6 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown6 = 32'hF8F02934;
-parameter val_l2cache__reg9_i_lockdown6 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown6 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_d_lockdown7 = 32'hF8F02938;
-parameter val_l2cache__reg9_d_lockdown7 = 32'h00000000;
-parameter mask_l2cache__reg9_d_lockdown7 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_i_lockdown7 = 32'hF8F0293C;
-parameter val_l2cache__reg9_i_lockdown7 = 32'h00000000;
-parameter mask_l2cache__reg9_i_lockdown7 = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_lock_line_en = 32'hF8F02950;
-parameter val_l2cache__reg9_lock_line_en = 32'h00000000;
-parameter mask_l2cache__reg9_lock_line_en = 32'hFFFFFFFF;
-
-parameter l2cache__reg9_unlock_way = 32'hF8F02954;
-parameter val_l2cache__reg9_unlock_way = 32'h00000000;
-parameter mask_l2cache__reg9_unlock_way = 32'hFFFFFFFF;
-
-parameter l2cache__reg12_addr_filtering_start = 32'hF8F02C00;
-parameter val_l2cache__reg12_addr_filtering_start = 32'h40000001;
-parameter mask_l2cache__reg12_addr_filtering_start = 32'hFFFFFFFF;
-
-parameter l2cache__reg12_addr_filtering_end = 32'hF8F02C04;
-parameter val_l2cache__reg12_addr_filtering_end = 32'hFFF00000;
-parameter mask_l2cache__reg12_addr_filtering_end = 32'hFFFFFFFF;
-
-parameter l2cache__reg15_debug_ctrl = 32'hF8F02F40;
-parameter val_l2cache__reg15_debug_ctrl = 32'h00000000;
-parameter mask_l2cache__reg15_debug_ctrl = 32'hFFFFFFFF;
-
-parameter l2cache__reg15_prefetch_ctrl = 32'hF8F02F60;
-parameter val_l2cache__reg15_prefetch_ctrl = 32'h00000000;
-parameter mask_l2cache__reg15_prefetch_ctrl = 32'hFFFFFFFF;
-
-parameter l2cache__reg15_power_ctrl = 32'hF8F02F80;
-parameter val_l2cache__reg15_power_ctrl = 32'h00000000;
-parameter mask_l2cache__reg15_power_ctrl = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module mpcore mpcore
-// doc version: 1.3
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter mpcore__SCU_CONTROL_REGISTER = 32'hF8F00000;
-parameter val_mpcore__SCU_CONTROL_REGISTER = 32'h00000002;
-parameter mask_mpcore__SCU_CONTROL_REGISTER = 32'hFFFFFFFF;
-
-parameter mpcore__SCU_CONFIGURATION_REGISTER = 32'hF8F00004;
-parameter val_mpcore__SCU_CONFIGURATION_REGISTER = 32'h00000501;
-parameter mask_mpcore__SCU_CONFIGURATION_REGISTER = 32'hFFFFFFFF;
-
-parameter mpcore__SCU_CPU_Power_Status_Register = 32'hF8F00008;
-parameter val_mpcore__SCU_CPU_Power_Status_Register = 32'h00000000;
-parameter mask_mpcore__SCU_CPU_Power_Status_Register = 32'hFFFFFFFF;
-
-parameter mpcore__SCU_Invalidate_All_Registers_in_Secure_State = 32'hF8F0000C;
-parameter val_mpcore__SCU_Invalidate_All_Registers_in_Secure_State = 32'h00000000;
-parameter mask_mpcore__SCU_Invalidate_All_Registers_in_Secure_State = 32'hFFFFFFFF;
-
-parameter mpcore__Filtering_Start_Address_Register = 32'hF8F00040;
-parameter val_mpcore__Filtering_Start_Address_Register = 32'h00100000;
-parameter mask_mpcore__Filtering_Start_Address_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Filtering_End_Address_Register = 32'hF8F00044;
-parameter val_mpcore__Filtering_End_Address_Register = 32'h00000000;
-parameter mask_mpcore__Filtering_End_Address_Register = 32'hFFFFFFFF;
-
-parameter mpcore__SCU_Access_Control_Register_SAC = 32'hF8F00050;
-parameter val_mpcore__SCU_Access_Control_Register_SAC = 32'h0000000F;
-parameter mask_mpcore__SCU_Access_Control_Register_SAC = 32'hFFFFFFFF;
-
-parameter mpcore__SCU_Non_secure_Access_Control_Register = 32'hF8F00054;
-parameter val_mpcore__SCU_Non_secure_Access_Control_Register = 32'h00000000;
-parameter mask_mpcore__SCU_Non_secure_Access_Control_Register = 32'hFFFFFFFF;
-
-parameter mpcore__ICCICR = 32'hF8F00100;
-parameter val_mpcore__ICCICR = 32'h00000000;
-parameter mask_mpcore__ICCICR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCPMR = 32'hF8F00104;
-parameter val_mpcore__ICCPMR = 32'h00000000;
-parameter mask_mpcore__ICCPMR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCBPR = 32'hF8F00108;
-parameter val_mpcore__ICCBPR = 32'h00000002;
-parameter mask_mpcore__ICCBPR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCIAR = 32'hF8F0010C;
-parameter val_mpcore__ICCIAR = 32'h000003FF;
-parameter mask_mpcore__ICCIAR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCEOIR = 32'hF8F00110;
-parameter val_mpcore__ICCEOIR = 32'h00000000;
-parameter mask_mpcore__ICCEOIR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCRPR = 32'hF8F00114;
-parameter val_mpcore__ICCRPR = 32'h000000FF;
-parameter mask_mpcore__ICCRPR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCHPIR = 32'hF8F00118;
-parameter val_mpcore__ICCHPIR = 32'h000003FF;
-parameter mask_mpcore__ICCHPIR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCABPR = 32'hF8F0011C;
-parameter val_mpcore__ICCABPR = 32'h00000003;
-parameter mask_mpcore__ICCABPR = 32'hFFFFFFFF;
-
-parameter mpcore__ICCIDR = 32'hF8F001FC;
-parameter val_mpcore__ICCIDR = 32'h3901243B;
-parameter mask_mpcore__ICCIDR = 32'hFFFFFFFF;
-
-parameter mpcore__Global_Timer_Counter_Register0 = 32'hF8F00200;
-parameter val_mpcore__Global_Timer_Counter_Register0 = 32'h00000000;
-parameter mask_mpcore__Global_Timer_Counter_Register0 = 32'hFFFFFFFF;
-
-parameter mpcore__Global_Timer_Counter_Register1 = 32'hF8F00204;
-parameter val_mpcore__Global_Timer_Counter_Register1 = 32'h00000000;
-parameter mask_mpcore__Global_Timer_Counter_Register1 = 32'hFFFFFFFF;
-
-parameter mpcore__Global_Timer_Control_Register = 32'hF8F00208;
-parameter val_mpcore__Global_Timer_Control_Register = 32'h00000000;
-parameter mask_mpcore__Global_Timer_Control_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Global_Timer_Interrupt_Status_Register = 32'hF8F0020C;
-parameter val_mpcore__Global_Timer_Interrupt_Status_Register = 32'h00000000;
-parameter mask_mpcore__Global_Timer_Interrupt_Status_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Comparator_Value_Register0 = 32'hF8F00210;
-parameter val_mpcore__Comparator_Value_Register0 = 32'h00000000;
-parameter mask_mpcore__Comparator_Value_Register0 = 32'hFFFFFFFF;
-
-parameter mpcore__Comparator_Value_Register1 = 32'hF8F00214;
-parameter val_mpcore__Comparator_Value_Register1 = 32'h00000000;
-parameter mask_mpcore__Comparator_Value_Register1 = 32'hFFFFFFFF;
-
-parameter mpcore__Auto_increment_Register = 32'hF8F00218;
-parameter val_mpcore__Auto_increment_Register = 32'h00000000;
-parameter mask_mpcore__Auto_increment_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Private_Timer_Load_Register = 32'hF8F00600;
-parameter val_mpcore__Private_Timer_Load_Register = 32'h00000000;
-parameter mask_mpcore__Private_Timer_Load_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Private_Timer_Counter_Register = 32'hF8F00604;
-parameter val_mpcore__Private_Timer_Counter_Register = 32'h00000000;
-parameter mask_mpcore__Private_Timer_Counter_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Private_Timer_Control_Register = 32'hF8F00608;
-parameter val_mpcore__Private_Timer_Control_Register = 32'h00000000;
-parameter mask_mpcore__Private_Timer_Control_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Private_Timer_Interrupt_Status_Register = 32'hF8F0060C;
-parameter val_mpcore__Private_Timer_Interrupt_Status_Register = 32'h00000000;
-parameter mask_mpcore__Private_Timer_Interrupt_Status_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Watchdog_Load_Register = 32'hF8F00620;
-parameter val_mpcore__Watchdog_Load_Register = 32'h00000000;
-parameter mask_mpcore__Watchdog_Load_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Watchdog_Counter_Register = 32'hF8F00624;
-parameter val_mpcore__Watchdog_Counter_Register = 32'h00000000;
-parameter mask_mpcore__Watchdog_Counter_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Watchdog_Control_Register = 32'hF8F00628;
-parameter val_mpcore__Watchdog_Control_Register = 32'h00000000;
-parameter mask_mpcore__Watchdog_Control_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Watchdog_Interrupt_Status_Register = 32'hF8F0062C;
-parameter val_mpcore__Watchdog_Interrupt_Status_Register = 32'h00000000;
-parameter mask_mpcore__Watchdog_Interrupt_Status_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Watchdog_Reset_Status_Register = 32'hF8F00630;
-parameter val_mpcore__Watchdog_Reset_Status_Register = 32'h00000000;
-parameter mask_mpcore__Watchdog_Reset_Status_Register = 32'hFFFFFFFF;
-
-parameter mpcore__Watchdog_Disable_Register = 32'hF8F00634;
-parameter val_mpcore__Watchdog_Disable_Register = 32'h00000000;
-parameter mask_mpcore__Watchdog_Disable_Register = 32'hFFFFFFFF;
-
-parameter mpcore__ICDDCR = 32'hF8F01000;
-parameter val_mpcore__ICDDCR = 32'h00000000;
-parameter mask_mpcore__ICDDCR = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICTR = 32'hF8F01004;
-parameter val_mpcore__ICDICTR = 32'h00000C22;
-parameter mask_mpcore__ICDICTR = 32'hE000FFFF;
-
-parameter mpcore__ICDIIDR = 32'hF8F01008;
-parameter val_mpcore__ICDIIDR = 32'h0102043B;
-parameter mask_mpcore__ICDIIDR = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISR0 = 32'hF8F01080;
-parameter val_mpcore__ICDISR0 = 32'h00000000;
-parameter mask_mpcore__ICDISR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISR1 = 32'hF8F01084;
-parameter val_mpcore__ICDISR1 = 32'h00000000;
-parameter mask_mpcore__ICDISR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISR2 = 32'hF8F01088;
-parameter val_mpcore__ICDISR2 = 32'h00000000;
-parameter mask_mpcore__ICDISR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISER0 = 32'hF8F01100;
-parameter val_mpcore__ICDISER0 = 32'h0000FFFF;
-parameter mask_mpcore__ICDISER0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISER1 = 32'hF8F01104;
-parameter val_mpcore__ICDISER1 = 32'h00000000;
-parameter mask_mpcore__ICDISER1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISER2 = 32'hF8F01108;
-parameter val_mpcore__ICDISER2 = 32'h00000000;
-parameter mask_mpcore__ICDISER2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICER0 = 32'hF8F01180;
-parameter val_mpcore__ICDICER0 = 32'h0000FFFF;
-parameter mask_mpcore__ICDICER0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICER1 = 32'hF8F01184;
-parameter val_mpcore__ICDICER1 = 32'h00000000;
-parameter mask_mpcore__ICDICER1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICER2 = 32'hF8F01188;
-parameter val_mpcore__ICDICER2 = 32'h00000000;
-parameter mask_mpcore__ICDICER2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISPR0 = 32'hF8F01200;
-parameter val_mpcore__ICDISPR0 = 32'h00000000;
-parameter mask_mpcore__ICDISPR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISPR1 = 32'hF8F01204;
-parameter val_mpcore__ICDISPR1 = 32'h00000000;
-parameter mask_mpcore__ICDISPR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDISPR2 = 32'hF8F01208;
-parameter val_mpcore__ICDISPR2 = 32'h00000000;
-parameter mask_mpcore__ICDISPR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICPR0 = 32'hF8F01280;
-parameter val_mpcore__ICDICPR0 = 32'h00000000;
-parameter mask_mpcore__ICDICPR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICPR1 = 32'hF8F01284;
-parameter val_mpcore__ICDICPR1 = 32'h00000000;
-parameter mask_mpcore__ICDICPR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICPR2 = 32'hF8F01288;
-parameter val_mpcore__ICDICPR2 = 32'h00000000;
-parameter mask_mpcore__ICDICPR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDABR0 = 32'hF8F01300;
-parameter val_mpcore__ICDABR0 = 32'h00000000;
-parameter mask_mpcore__ICDABR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDABR1 = 32'hF8F01304;
-parameter val_mpcore__ICDABR1 = 32'h00000000;
-parameter mask_mpcore__ICDABR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDABR2 = 32'hF8F01308;
-parameter val_mpcore__ICDABR2 = 32'h00000000;
-parameter mask_mpcore__ICDABR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR0 = 32'hF8F01400;
-parameter val_mpcore__ICDIPR0 = 32'h00000000;
-parameter mask_mpcore__ICDIPR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR1 = 32'hF8F01404;
-parameter val_mpcore__ICDIPR1 = 32'h00000000;
-parameter mask_mpcore__ICDIPR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR2 = 32'hF8F01408;
-parameter val_mpcore__ICDIPR2 = 32'h00000000;
-parameter mask_mpcore__ICDIPR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR3 = 32'hF8F0140C;
-parameter val_mpcore__ICDIPR3 = 32'h00000000;
-parameter mask_mpcore__ICDIPR3 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR4 = 32'hF8F01410;
-parameter val_mpcore__ICDIPR4 = 32'h00000000;
-parameter mask_mpcore__ICDIPR4 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR5 = 32'hF8F01414;
-parameter val_mpcore__ICDIPR5 = 32'h00000000;
-parameter mask_mpcore__ICDIPR5 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR6 = 32'hF8F01418;
-parameter val_mpcore__ICDIPR6 = 32'h00000000;
-parameter mask_mpcore__ICDIPR6 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR7 = 32'hF8F0141C;
-parameter val_mpcore__ICDIPR7 = 32'h00000000;
-parameter mask_mpcore__ICDIPR7 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR8 = 32'hF8F01420;
-parameter val_mpcore__ICDIPR8 = 32'h00000000;
-parameter mask_mpcore__ICDIPR8 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR9 = 32'hF8F01424;
-parameter val_mpcore__ICDIPR9 = 32'h00000000;
-parameter mask_mpcore__ICDIPR9 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR10 = 32'hF8F01428;
-parameter val_mpcore__ICDIPR10 = 32'h00000000;
-parameter mask_mpcore__ICDIPR10 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR11 = 32'hF8F0142C;
-parameter val_mpcore__ICDIPR11 = 32'h00000000;
-parameter mask_mpcore__ICDIPR11 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR12 = 32'hF8F01430;
-parameter val_mpcore__ICDIPR12 = 32'h00000000;
-parameter mask_mpcore__ICDIPR12 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR13 = 32'hF8F01434;
-parameter val_mpcore__ICDIPR13 = 32'h00000000;
-parameter mask_mpcore__ICDIPR13 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR14 = 32'hF8F01438;
-parameter val_mpcore__ICDIPR14 = 32'h00000000;
-parameter mask_mpcore__ICDIPR14 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR15 = 32'hF8F0143C;
-parameter val_mpcore__ICDIPR15 = 32'h00000000;
-parameter mask_mpcore__ICDIPR15 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR16 = 32'hF8F01440;
-parameter val_mpcore__ICDIPR16 = 32'h00000000;
-parameter mask_mpcore__ICDIPR16 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR17 = 32'hF8F01444;
-parameter val_mpcore__ICDIPR17 = 32'h00000000;
-parameter mask_mpcore__ICDIPR17 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR18 = 32'hF8F01448;
-parameter val_mpcore__ICDIPR18 = 32'h00000000;
-parameter mask_mpcore__ICDIPR18 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR19 = 32'hF8F0144C;
-parameter val_mpcore__ICDIPR19 = 32'h00000000;
-parameter mask_mpcore__ICDIPR19 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR20 = 32'hF8F01450;
-parameter val_mpcore__ICDIPR20 = 32'h00000000;
-parameter mask_mpcore__ICDIPR20 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR21 = 32'hF8F01454;
-parameter val_mpcore__ICDIPR21 = 32'h00000000;
-parameter mask_mpcore__ICDIPR21 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR22 = 32'hF8F01458;
-parameter val_mpcore__ICDIPR22 = 32'h00000000;
-parameter mask_mpcore__ICDIPR22 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPR23 = 32'hF8F0145C;
-parameter val_mpcore__ICDIPR23 = 32'h00000000;
-parameter mask_mpcore__ICDIPR23 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR0 = 32'hF8F01800;
-parameter val_mpcore__ICDIPTR0 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR1 = 32'hF8F01804;
-parameter val_mpcore__ICDIPTR1 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR2 = 32'hF8F01808;
-parameter val_mpcore__ICDIPTR2 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR3 = 32'hF8F0180C;
-parameter val_mpcore__ICDIPTR3 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR3 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR4 = 32'hF8F01810;
-parameter val_mpcore__ICDIPTR4 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR4 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR5 = 32'hF8F01814;
-parameter val_mpcore__ICDIPTR5 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR5 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR6 = 32'hF8F01818;
-parameter val_mpcore__ICDIPTR6 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR6 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR7 = 32'hF8F0181C;
-parameter val_mpcore__ICDIPTR7 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR7 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR8 = 32'hF8F01820;
-parameter val_mpcore__ICDIPTR8 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR8 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR9 = 32'hF8F01824;
-parameter val_mpcore__ICDIPTR9 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR9 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR10 = 32'hF8F01828;
-parameter val_mpcore__ICDIPTR10 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR10 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR11 = 32'hF8F0182C;
-parameter val_mpcore__ICDIPTR11 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR11 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR12 = 32'hF8F01830;
-parameter val_mpcore__ICDIPTR12 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR12 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR13 = 32'hF8F01834;
-parameter val_mpcore__ICDIPTR13 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR13 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR14 = 32'hF8F01838;
-parameter val_mpcore__ICDIPTR14 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR14 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR15 = 32'hF8F0183C;
-parameter val_mpcore__ICDIPTR15 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR15 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR16 = 32'hF8F01840;
-parameter val_mpcore__ICDIPTR16 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR16 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR17 = 32'hF8F01844;
-parameter val_mpcore__ICDIPTR17 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR17 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR18 = 32'hF8F01848;
-parameter val_mpcore__ICDIPTR18 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR18 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR19 = 32'hF8F0184C;
-parameter val_mpcore__ICDIPTR19 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR19 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR20 = 32'hF8F01850;
-parameter val_mpcore__ICDIPTR20 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR20 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR21 = 32'hF8F01854;
-parameter val_mpcore__ICDIPTR21 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR21 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR22 = 32'hF8F01858;
-parameter val_mpcore__ICDIPTR22 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR22 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDIPTR23 = 32'hF8F0185C;
-parameter val_mpcore__ICDIPTR23 = 32'h01010101;
-parameter mask_mpcore__ICDIPTR23 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICFR0 = 32'hF8F01C00;
-parameter val_mpcore__ICDICFR0 = 32'hAAAAAAAA;
-parameter mask_mpcore__ICDICFR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICFR1 = 32'hF8F01C04;
-parameter val_mpcore__ICDICFR1 = 32'h7DC00000;
-parameter mask_mpcore__ICDICFR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICFR2 = 32'hF8F01C08;
-parameter val_mpcore__ICDICFR2 = 32'h55555555;
-parameter mask_mpcore__ICDICFR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICFR3 = 32'hF8F01C0C;
-parameter val_mpcore__ICDICFR3 = 32'h55555555;
-parameter mask_mpcore__ICDICFR3 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICFR4 = 32'hF8F01C10;
-parameter val_mpcore__ICDICFR4 = 32'h55555555;
-parameter mask_mpcore__ICDICFR4 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDICFR5 = 32'hF8F01C14;
-parameter val_mpcore__ICDICFR5 = 32'h55555555;
-parameter mask_mpcore__ICDICFR5 = 32'hFFFFFFFF;
-
-parameter mpcore__ppi_status = 32'hF8F01D00;
-parameter val_mpcore__ppi_status = 32'h00000000;
-parameter mask_mpcore__ppi_status = 32'hFFFFFFFF;
-
-parameter mpcore__spi_status_0 = 32'hF8F01D04;
-parameter val_mpcore__spi_status_0 = 32'h00000000;
-parameter mask_mpcore__spi_status_0 = 32'hFFFFFFFF;
-
-parameter mpcore__spi_status_1 = 32'hF8F01D08;
-parameter val_mpcore__spi_status_1 = 32'h00000000;
-parameter mask_mpcore__spi_status_1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICDSGIR = 32'hF8F01F00;
-parameter val_mpcore__ICDSGIR = 32'h00000000;
-parameter mask_mpcore__ICDSGIR = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR4 = 32'hF8F01FD0;
-parameter val_mpcore__ICPIDR4 = 32'h00000004;
-parameter mask_mpcore__ICPIDR4 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR5 = 32'hF8F01FD4;
-parameter val_mpcore__ICPIDR5 = 32'h00000000;
-parameter mask_mpcore__ICPIDR5 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR6 = 32'hF8F01FD8;
-parameter val_mpcore__ICPIDR6 = 32'h00000000;
-parameter mask_mpcore__ICPIDR6 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR7 = 32'hF8F01FDC;
-parameter val_mpcore__ICPIDR7 = 32'h00000000;
-parameter mask_mpcore__ICPIDR7 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR0 = 32'hF8F01FE0;
-parameter val_mpcore__ICPIDR0 = 32'h00000090;
-parameter mask_mpcore__ICPIDR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR1 = 32'hF8F01FE4;
-parameter val_mpcore__ICPIDR1 = 32'h000000B3;
-parameter mask_mpcore__ICPIDR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR2 = 32'hF8F01FE8;
-parameter val_mpcore__ICPIDR2 = 32'h0000001B;
-parameter mask_mpcore__ICPIDR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICPIDR3 = 32'hF8F01FEC;
-parameter val_mpcore__ICPIDR3 = 32'h00000000;
-parameter mask_mpcore__ICPIDR3 = 32'hFFFFFFFF;
-
-parameter mpcore__ICCIDR0 = 32'hF8F01FF0;
-parameter val_mpcore__ICCIDR0 = 32'h0000000D;
-parameter mask_mpcore__ICCIDR0 = 32'hFFFFFFFF;
-
-parameter mpcore__ICCIDR1 = 32'hF8F01FF4;
-parameter val_mpcore__ICCIDR1 = 32'h000000F0;
-parameter mask_mpcore__ICCIDR1 = 32'hFFFFFFFF;
-
-parameter mpcore__ICCIDR2 = 32'hF8F01FF8;
-parameter val_mpcore__ICCIDR2 = 32'h00000005;
-parameter mask_mpcore__ICCIDR2 = 32'hFFFFFFFF;
-
-parameter mpcore__ICCIDR3 = 32'hF8F01FFC;
-parameter val_mpcore__ICCIDR3 = 32'h000000B1;
-parameter mask_mpcore__ICCIDR3 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module ocm ocm
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter ocm__OCM_PARITY_CTRL = 32'hF800C000;
-parameter val_ocm__OCM_PARITY_CTRL = 32'h00000000;
-parameter mask_ocm__OCM_PARITY_CTRL = 32'hFFFFFFFF;
-
-parameter ocm__OCM_PARITY_ERRADDRESS = 32'hF800C004;
-parameter val_ocm__OCM_PARITY_ERRADDRESS = 32'h00000000;
-parameter mask_ocm__OCM_PARITY_ERRADDRESS = 32'hFFFFFFFF;
-
-parameter ocm__OCM_IRQ_STS = 32'hF800C008;
-parameter val_ocm__OCM_IRQ_STS = 32'h00000000;
-parameter mask_ocm__OCM_IRQ_STS = 32'hFFFFFFFF;
-
-parameter ocm__OCM_CONTROL = 32'hF800C00C;
-parameter val_ocm__OCM_CONTROL = 32'h00000000;
-parameter mask_ocm__OCM_CONTROL = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module qspi qspi
-// doc version: 0.8, based on 11/01/10 Linear Quad-SPI Controller
-// Design Specification document
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter qspi__Config_reg = 32'hE000D000;
-parameter val_qspi__Config_reg = 32'h80000000;
-parameter mask_qspi__Config_reg = 32'hFFFDFFFF;
-
-parameter qspi__Intr_status_REG = 32'hE000D004;
-parameter val_qspi__Intr_status_REG = 32'h00000004;
-parameter mask_qspi__Intr_status_REG = 32'hFFFFFFFF;
-
-parameter qspi__Intrpt_en_REG = 32'hE000D008;
-parameter val_qspi__Intrpt_en_REG = 32'h00000000;
-parameter mask_qspi__Intrpt_en_REG = 32'hFFFFFFFF;
-
-parameter qspi__Intrpt_dis_REG = 32'hE000D00C;
-parameter val_qspi__Intrpt_dis_REG = 32'h00000000;
-parameter mask_qspi__Intrpt_dis_REG = 32'hFFFFFFFF;
-
-parameter qspi__Intrpt_mask_REG = 32'hE000D010;
-parameter val_qspi__Intrpt_mask_REG = 32'h00000000;
-parameter mask_qspi__Intrpt_mask_REG = 32'hFFFFFFFF;
-
-parameter qspi__En_REG = 32'hE000D014;
-parameter val_qspi__En_REG = 32'h00000000;
-parameter mask_qspi__En_REG = 32'hFFFFFFFF;
-
-parameter qspi__Delay_REG = 32'hE000D018;
-parameter val_qspi__Delay_REG = 32'h00000000;
-parameter mask_qspi__Delay_REG = 32'hFFFFFFFF;
-
-parameter qspi__TXD0 = 32'hE000D01C;
-parameter val_qspi__TXD0 = 32'h00000000;
-parameter mask_qspi__TXD0 = 32'hFFFFFFFF;
-
-parameter qspi__Rx_data_REG = 32'hE000D020;
-parameter val_qspi__Rx_data_REG = 32'h00000000;
-parameter mask_qspi__Rx_data_REG = 32'hFFFFFFFF;
-
-parameter qspi__Slave_Idle_count_REG = 32'hE000D024;
-parameter val_qspi__Slave_Idle_count_REG = 32'h000000FF;
-parameter mask_qspi__Slave_Idle_count_REG = 32'hFFFFFFFF;
-
-parameter qspi__TX_thres_REG = 32'hE000D028;
-parameter val_qspi__TX_thres_REG = 32'h00000001;
-parameter mask_qspi__TX_thres_REG = 32'hFFFFFFFF;
-
-parameter qspi__RX_thres_REG = 32'hE000D02C;
-parameter val_qspi__RX_thres_REG = 32'h00000001;
-parameter mask_qspi__RX_thres_REG = 32'hFFFFFFFF;
-
-parameter qspi__GPIO = 32'hE000D030;
-parameter val_qspi__GPIO = 32'h00000001;
-parameter mask_qspi__GPIO = 32'hFFFFFFFF;
-
-parameter qspi__LPBK_DLY_ADJ = 32'hE000D038;
-parameter val_qspi__LPBK_DLY_ADJ = 32'h00000033;
-parameter mask_qspi__LPBK_DLY_ADJ = 32'hFFFFFFFF;
-
-parameter qspi__TXD1 = 32'hE000D080;
-parameter val_qspi__TXD1 = 32'h00000000;
-parameter mask_qspi__TXD1 = 32'hFFFFFFFF;
-
-parameter qspi__TXD2 = 32'hE000D084;
-parameter val_qspi__TXD2 = 32'h00000000;
-parameter mask_qspi__TXD2 = 32'hFFFFFFFF;
-
-parameter qspi__TXD3 = 32'hE000D088;
-parameter val_qspi__TXD3 = 32'h00000000;
-parameter mask_qspi__TXD3 = 32'hFFFFFFFF;
-
-parameter qspi__LQSPI_CFG = 32'hE000D0A0;
-parameter val_qspi__LQSPI_CFG = 32'h03A002EB;
-parameter mask_qspi__LQSPI_CFG = 32'hFBFF07FF;
-
-parameter qspi__LQSPI_STS = 32'hE000D0A4;
-parameter val_qspi__LQSPI_STS = 32'h00000000;
-parameter mask_qspi__LQSPI_STS = 32'h000001FF;
-
-parameter qspi__MOD_ID = 32'hE000D0FC;
-parameter val_qspi__MOD_ID = 32'h01090101;
-parameter mask_qspi__MOD_ID = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module sd0 sdio
-// doc version: 4.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter sd0__SDMA_system_address_register = 32'hE0100000;
-parameter val_sd0__SDMA_system_address_register = 32'h00000000;
-parameter mask_sd0__SDMA_system_address_register = 32'hFFFFFFFF;
-
-parameter sd0__Block_Size_Block_Count = 32'hE0100004;
-parameter val_sd0__Block_Size_Block_Count = 32'h00000000;
-parameter mask_sd0__Block_Size_Block_Count = 32'hFFFFFFFF;
-
-parameter sd0__Argument = 32'hE0100008;
-parameter val_sd0__Argument = 32'h00000000;
-parameter mask_sd0__Argument = 32'hFFFFFFFF;
-
-parameter sd0__Transfer_Mode_Command = 32'hE010000C;
-parameter val_sd0__Transfer_Mode_Command = 32'h00000000;
-parameter mask_sd0__Transfer_Mode_Command = 32'h1FFFFFFF;
-
-parameter sd0__Response0 = 32'hE0100010;
-parameter val_sd0__Response0 = 32'h00000000;
-parameter mask_sd0__Response0 = 32'hFFFFFFFF;
-
-parameter sd0__Response1 = 32'hE0100014;
-parameter val_sd0__Response1 = 32'h00000000;
-parameter mask_sd0__Response1 = 32'hFFFFFFFF;
-
-parameter sd0__Response2 = 32'hE0100018;
-parameter val_sd0__Response2 = 32'h00000000;
-parameter mask_sd0__Response2 = 32'hFFFFFFFF;
-
-parameter sd0__Response3 = 32'hE010001C;
-parameter val_sd0__Response3 = 32'h00000000;
-parameter mask_sd0__Response3 = 32'hFFFFFFFF;
-
-parameter sd0__Buffer_Data_Port = 32'hE0100020;
-parameter val_sd0__Buffer_Data_Port = 32'h00000000;
-parameter mask_sd0__Buffer_Data_Port = 32'hFFFFFFFF;
-
-parameter sd0__Present_State = 32'hE0100024;
-parameter val_sd0__Present_State = 32'h01F20000;
-parameter mask_sd0__Present_State = 32'h01FFFFFF;
-
-parameter sd0__Host_control_Power_control_Block_Gap_Control_Wakeup_control = 32'hE0100028;
-parameter val_sd0__Host_control_Power_control_Block_Gap_Control_Wakeup_control = 32'h00000000;
-parameter mask_sd0__Host_control_Power_control_Block_Gap_Control_Wakeup_control = 32'hFFFFFFFF;
-
-parameter sd0__Clock_Control_Timeout_control_Software_reset = 32'hE010002C;
-parameter val_sd0__Clock_Control_Timeout_control_Software_reset = 32'h00000000;
-parameter mask_sd0__Clock_Control_Timeout_control_Software_reset = 32'h07FFFFFF;
-
-parameter sd0__Normal_interrupt_status_Error_interrupt_status = 32'hE0100030;
-parameter val_sd0__Normal_interrupt_status_Error_interrupt_status = 32'h00000000;
-parameter mask_sd0__Normal_interrupt_status_Error_interrupt_status = 32'h3FFFFFFF;
-
-parameter sd0__Normal_interrupt_status_enable_Error_interrupt_status_enable = 32'hE0100034;
-parameter val_sd0__Normal_interrupt_status_enable_Error_interrupt_status_enable = 32'h00000000;
-parameter mask_sd0__Normal_interrupt_status_enable_Error_interrupt_status_enable = 32'h3FFFFFFF;
-
-parameter sd0__Normal_interrupt_signal_enable_Error_interrupt_signal_enable = 32'hE0100038;
-parameter val_sd0__Normal_interrupt_signal_enable_Error_interrupt_signal_enable = 32'h00000000;
-parameter mask_sd0__Normal_interrupt_signal_enable_Error_interrupt_signal_enable = 32'h3FFFFFFF;
-
-parameter sd0__Auto_CMD12_error_status = 32'hE010003C;
-parameter val_sd0__Auto_CMD12_error_status = 32'h00000000;
-parameter mask_sd0__Auto_CMD12_error_status = 32'h000000FF;
-
-parameter sd0__Capabilities = 32'hE0100040;
-parameter val_sd0__Capabilities = 32'h69EC0080;
-parameter mask_sd0__Capabilities = 32'h7FFFFFFF;
-
-parameter sd0__Maximum_current_capabilities = 32'hE0100048;
-parameter val_sd0__Maximum_current_capabilities = 32'h00000001;
-parameter mask_sd0__Maximum_current_capabilities = 32'h00FFFFFF;
-
-parameter sd0__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status = 32'hE0100050;
-parameter val_sd0__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status = 32'h00000000;
-parameter mask_sd0__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status = 32'hFFFFFFFF;
-
-parameter sd0__ADMA_error_status = 32'hE0100054;
-parameter val_sd0__ADMA_error_status = 32'h00000000;
-parameter mask_sd0__ADMA_error_status = 32'h00000007;
-
-parameter sd0__ADMA_system_address = 32'hE0100058;
-parameter val_sd0__ADMA_system_address = 32'h00000000;
-parameter mask_sd0__ADMA_system_address = 32'hFFFFFFFF;
-
-parameter sd0__Boot_Timeout_control = 32'hE0100060;
-parameter val_sd0__Boot_Timeout_control = 32'h00000000;
-parameter mask_sd0__Boot_Timeout_control = 32'hFFFFFFFF;
-
-parameter sd0__Debug_Selection = 32'hE0100064;
-parameter val_sd0__Debug_Selection = 32'h00000000;
-parameter mask_sd0__Debug_Selection = 32'h00000001;
-
-parameter sd0__SPI_interrupt_support = 32'hE01000F0;
-parameter val_sd0__SPI_interrupt_support = 32'h00000000;
-parameter mask_sd0__SPI_interrupt_support = 32'h000000FF;
-
-parameter sd0__Slot_interrupt_status_Host_controller_version = 32'hE01000FC;
-parameter val_sd0__Slot_interrupt_status_Host_controller_version = 32'h89010000;
-parameter mask_sd0__Slot_interrupt_status_Host_controller_version = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module sd1 sdio
-// doc version: 4.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter sd1__SDMA_system_address_register = 32'hE0101000;
-parameter val_sd1__SDMA_system_address_register = 32'h00000000;
-parameter mask_sd1__SDMA_system_address_register = 32'hFFFFFFFF;
-
-parameter sd1__Block_Size_Block_Count = 32'hE0101004;
-parameter val_sd1__Block_Size_Block_Count = 32'h00000000;
-parameter mask_sd1__Block_Size_Block_Count = 32'hFFFFFFFF;
-
-parameter sd1__Argument = 32'hE0101008;
-parameter val_sd1__Argument = 32'h00000000;
-parameter mask_sd1__Argument = 32'hFFFFFFFF;
-
-parameter sd1__Transfer_Mode_Command = 32'hE010100C;
-parameter val_sd1__Transfer_Mode_Command = 32'h00000000;
-parameter mask_sd1__Transfer_Mode_Command = 32'h1FFFFFFF;
-
-parameter sd1__Response0 = 32'hE0101010;
-parameter val_sd1__Response0 = 32'h00000000;
-parameter mask_sd1__Response0 = 32'hFFFFFFFF;
-
-parameter sd1__Response1 = 32'hE0101014;
-parameter val_sd1__Response1 = 32'h00000000;
-parameter mask_sd1__Response1 = 32'hFFFFFFFF;
-
-parameter sd1__Response2 = 32'hE0101018;
-parameter val_sd1__Response2 = 32'h00000000;
-parameter mask_sd1__Response2 = 32'hFFFFFFFF;
-
-parameter sd1__Response3 = 32'hE010101C;
-parameter val_sd1__Response3 = 32'h00000000;
-parameter mask_sd1__Response3 = 32'hFFFFFFFF;
-
-parameter sd1__Buffer_Data_Port = 32'hE0101020;
-parameter val_sd1__Buffer_Data_Port = 32'h00000000;
-parameter mask_sd1__Buffer_Data_Port = 32'hFFFFFFFF;
-
-parameter sd1__Present_State = 32'hE0101024;
-parameter val_sd1__Present_State = 32'h01F20000;
-parameter mask_sd1__Present_State = 32'h01FFFFFF;
-
-parameter sd1__Host_control_Power_control_Block_Gap_Control_Wakeup_control = 32'hE0101028;
-parameter val_sd1__Host_control_Power_control_Block_Gap_Control_Wakeup_control = 32'h00000000;
-parameter mask_sd1__Host_control_Power_control_Block_Gap_Control_Wakeup_control = 32'hFFFFFFFF;
-
-parameter sd1__Clock_Control_Timeout_control_Software_reset = 32'hE010102C;
-parameter val_sd1__Clock_Control_Timeout_control_Software_reset = 32'h00000000;
-parameter mask_sd1__Clock_Control_Timeout_control_Software_reset = 32'h07FFFFFF;
-
-parameter sd1__Normal_interrupt_status_Error_interrupt_status = 32'hE0101030;
-parameter val_sd1__Normal_interrupt_status_Error_interrupt_status = 32'h00000000;
-parameter mask_sd1__Normal_interrupt_status_Error_interrupt_status = 32'h3FFFFFFF;
-
-parameter sd1__Normal_interrupt_status_enable_Error_interrupt_status_enable = 32'hE0101034;
-parameter val_sd1__Normal_interrupt_status_enable_Error_interrupt_status_enable = 32'h00000000;
-parameter mask_sd1__Normal_interrupt_status_enable_Error_interrupt_status_enable = 32'h3FFFFFFF;
-
-parameter sd1__Normal_interrupt_signal_enable_Error_interrupt_signal_enable = 32'hE0101038;
-parameter val_sd1__Normal_interrupt_signal_enable_Error_interrupt_signal_enable = 32'h00000000;
-parameter mask_sd1__Normal_interrupt_signal_enable_Error_interrupt_signal_enable = 32'h3FFFFFFF;
-
-parameter sd1__Auto_CMD12_error_status = 32'hE010103C;
-parameter val_sd1__Auto_CMD12_error_status = 32'h00000000;
-parameter mask_sd1__Auto_CMD12_error_status = 32'h000000FF;
-
-parameter sd1__Capabilities = 32'hE0101040;
-parameter val_sd1__Capabilities = 32'h69EC0080;
-parameter mask_sd1__Capabilities = 32'h7FFFFFFF;
-
-parameter sd1__Maximum_current_capabilities = 32'hE0101048;
-parameter val_sd1__Maximum_current_capabilities = 32'h00000001;
-parameter mask_sd1__Maximum_current_capabilities = 32'h00FFFFFF;
-
-parameter sd1__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status = 32'hE0101050;
-parameter val_sd1__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status = 32'h00000000;
-parameter mask_sd1__Force_event_for_AutoCmd12_Error_Status_Force_event_register_for_error_interrupt_status = 32'hFFFFFFFF;
-
-parameter sd1__ADMA_error_status = 32'hE0101054;
-parameter val_sd1__ADMA_error_status = 32'h00000000;
-parameter mask_sd1__ADMA_error_status = 32'h00000007;
-
-parameter sd1__ADMA_system_address = 32'hE0101058;
-parameter val_sd1__ADMA_system_address = 32'h00000000;
-parameter mask_sd1__ADMA_system_address = 32'hFFFFFFFF;
-
-parameter sd1__Boot_Timeout_control = 32'hE0101060;
-parameter val_sd1__Boot_Timeout_control = 32'h00000000;
-parameter mask_sd1__Boot_Timeout_control = 32'hFFFFFFFF;
-
-parameter sd1__Debug_Selection = 32'hE0101064;
-parameter val_sd1__Debug_Selection = 32'h00000000;
-parameter mask_sd1__Debug_Selection = 32'h00000001;
-
-parameter sd1__SPI_interrupt_support = 32'hE01010F0;
-parameter val_sd1__SPI_interrupt_support = 32'h00000000;
-parameter mask_sd1__SPI_interrupt_support = 32'h000000FF;
-
-parameter sd1__Slot_interrupt_status_Host_controller_version = 32'hE01010FC;
-parameter val_sd1__Slot_interrupt_status_Host_controller_version = 32'h89010000;
-parameter mask_sd1__Slot_interrupt_status_Host_controller_version = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module slcr slcr
-// doc version: 1.3, based on 11/18/2010 SLCR_spec.doc
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter slcr__SCL = 32'hF8000000;
-parameter val_slcr__SCL = 32'h00000000;
-parameter mask_slcr__SCL = 32'hFFFFFFFF;
-
-parameter slcr__SLCR_LOCK = 32'hF8000004;
-parameter val_slcr__SLCR_LOCK = 32'h00000000;
-parameter mask_slcr__SLCR_LOCK = 32'hFFFFFFFF;
-
-parameter slcr__SLCR_UNLOCK = 32'hF8000008;
-parameter val_slcr__SLCR_UNLOCK = 32'h00000000;
-parameter mask_slcr__SLCR_UNLOCK = 32'hFFFFFFFF;
-
-parameter slcr__SLCR_LOCKSTA = 32'hF800000C;
-parameter val_slcr__SLCR_LOCKSTA = 32'h00000001;
-parameter mask_slcr__SLCR_LOCKSTA = 32'hFFFFFFFF;
-
-parameter slcr__ARM_PLL_CTRL = 32'hF8000100;
-parameter val_slcr__ARM_PLL_CTRL = 32'h0001A008;
-parameter mask_slcr__ARM_PLL_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DDR_PLL_CTRL = 32'hF8000104;
-parameter val_slcr__DDR_PLL_CTRL = 32'h0001A008;
-parameter mask_slcr__DDR_PLL_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__IO_PLL_CTRL = 32'hF8000108;
-parameter val_slcr__IO_PLL_CTRL = 32'h0001A008;
-parameter mask_slcr__IO_PLL_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__PLL_STATUS = 32'hF800010C;
-parameter val_slcr__PLL_STATUS = 32'h0000003F;
-parameter mask_slcr__PLL_STATUS = 32'hFFFFFFFF;
-
-parameter slcr__ARM_PLL_CFG = 32'hF8000110;
-parameter val_slcr__ARM_PLL_CFG = 32'h00177EA0;
-parameter mask_slcr__ARM_PLL_CFG = 32'hFFFFFFFF;
-
-parameter slcr__DDR_PLL_CFG = 32'hF8000114;
-parameter val_slcr__DDR_PLL_CFG = 32'h00177EA0;
-parameter mask_slcr__DDR_PLL_CFG = 32'hFFFFFFFF;
-
-parameter slcr__IO_PLL_CFG = 32'hF8000118;
-parameter val_slcr__IO_PLL_CFG = 32'h00177EA0;
-parameter mask_slcr__IO_PLL_CFG = 32'hFFFFFFFF;
-
-parameter slcr__PLL_BG_CTRL = 32'hF800011C;
-parameter val_slcr__PLL_BG_CTRL = 32'h00000000;
-parameter mask_slcr__PLL_BG_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__ARM_CLK_CTRL = 32'hF8000120;
-parameter val_slcr__ARM_CLK_CTRL = 32'h1F000400;
-parameter mask_slcr__ARM_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DDR_CLK_CTRL = 32'hF8000124;
-parameter val_slcr__DDR_CLK_CTRL = 32'h18400003;
-parameter mask_slcr__DDR_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DCI_CLK_CTRL = 32'hF8000128;
-parameter val_slcr__DCI_CLK_CTRL = 32'h01E03201;
-parameter mask_slcr__DCI_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__APER_CLK_CTRL = 32'hF800012C;
-parameter val_slcr__APER_CLK_CTRL = 32'h01FFCCCD;
-parameter mask_slcr__APER_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__USB0_CLK_CTRL = 32'hF8000130;
-parameter val_slcr__USB0_CLK_CTRL = 32'h00101941;
-parameter mask_slcr__USB0_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__USB1_CLK_CTRL = 32'hF8000134;
-parameter val_slcr__USB1_CLK_CTRL = 32'h00101941;
-parameter mask_slcr__USB1_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GEM0_RCLK_CTRL = 32'hF8000138;
-parameter val_slcr__GEM0_RCLK_CTRL = 32'h00000001;
-parameter mask_slcr__GEM0_RCLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GEM1_RCLK_CTRL = 32'hF800013C;
-parameter val_slcr__GEM1_RCLK_CTRL = 32'h00000001;
-parameter mask_slcr__GEM1_RCLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GEM0_CLK_CTRL = 32'hF8000140;
-parameter val_slcr__GEM0_CLK_CTRL = 32'h00003C01;
-parameter mask_slcr__GEM0_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GEM1_CLK_CTRL = 32'hF8000144;
-parameter val_slcr__GEM1_CLK_CTRL = 32'h00003C01;
-parameter mask_slcr__GEM1_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__SMC_CLK_CTRL = 32'hF8000148;
-parameter val_slcr__SMC_CLK_CTRL = 32'h00003C21;
-parameter mask_slcr__SMC_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__LQSPI_CLK_CTRL = 32'hF800014C;
-parameter val_slcr__LQSPI_CLK_CTRL = 32'h00002821;
-parameter mask_slcr__LQSPI_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__SDIO_CLK_CTRL = 32'hF8000150;
-parameter val_slcr__SDIO_CLK_CTRL = 32'h00001E03;
-parameter mask_slcr__SDIO_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__UART_CLK_CTRL = 32'hF8000154;
-parameter val_slcr__UART_CLK_CTRL = 32'h00003F03;
-parameter mask_slcr__UART_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__SPI_CLK_CTRL = 32'hF8000158;
-parameter val_slcr__SPI_CLK_CTRL = 32'h00003F03;
-parameter mask_slcr__SPI_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__CAN_CLK_CTRL = 32'hF800015C;
-parameter val_slcr__CAN_CLK_CTRL = 32'h00501903;
-parameter mask_slcr__CAN_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__CAN_MIOCLK_CTRL = 32'hF8000160;
-parameter val_slcr__CAN_MIOCLK_CTRL = 32'h00000000;
-parameter mask_slcr__CAN_MIOCLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DBG_CLK_CTRL = 32'hF8000164;
-parameter val_slcr__DBG_CLK_CTRL = 32'h00000F03;
-parameter mask_slcr__DBG_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__PCAP_CLK_CTRL = 32'hF8000168;
-parameter val_slcr__PCAP_CLK_CTRL = 32'h00000F01;
-parameter mask_slcr__PCAP_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__TOPSW_CLK_CTRL = 32'hF800016C;
-parameter val_slcr__TOPSW_CLK_CTRL = 32'h00000000;
-parameter mask_slcr__TOPSW_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA0_CLK_CTRL = 32'hF8000170;
-parameter val_slcr__FPGA0_CLK_CTRL = 32'h00101800;
-parameter mask_slcr__FPGA0_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA0_THR_CTRL = 32'hF8000174;
-parameter val_slcr__FPGA0_THR_CTRL = 32'h00000000;
-parameter mask_slcr__FPGA0_THR_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA0_THR_CNT = 32'hF8000178;
-parameter val_slcr__FPGA0_THR_CNT = 32'h00000000;
-parameter mask_slcr__FPGA0_THR_CNT = 32'hFFFFFFFF;
-
-parameter slcr__FPGA0_THR_STA = 32'hF800017C;
-parameter val_slcr__FPGA0_THR_STA = 32'h00010000;
-parameter mask_slcr__FPGA0_THR_STA = 32'hFFFFFFFF;
-
-parameter slcr__FPGA1_CLK_CTRL = 32'hF8000180;
-parameter val_slcr__FPGA1_CLK_CTRL = 32'h00101800;
-parameter mask_slcr__FPGA1_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA1_THR_CTRL = 32'hF8000184;
-parameter val_slcr__FPGA1_THR_CTRL = 32'h00000000;
-parameter mask_slcr__FPGA1_THR_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA1_THR_CNT = 32'hF8000188;
-parameter val_slcr__FPGA1_THR_CNT = 32'h00000000;
-parameter mask_slcr__FPGA1_THR_CNT = 32'hFFFFFFFF;
-
-parameter slcr__FPGA1_THR_STA = 32'hF800018C;
-parameter val_slcr__FPGA1_THR_STA = 32'h00010000;
-parameter mask_slcr__FPGA1_THR_STA = 32'hFFFFFFFF;
-
-parameter slcr__FPGA2_CLK_CTRL = 32'hF8000190;
-parameter val_slcr__FPGA2_CLK_CTRL = 32'h00101800;
-parameter mask_slcr__FPGA2_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA2_THR_CTRL = 32'hF8000194;
-parameter val_slcr__FPGA2_THR_CTRL = 32'h00000000;
-parameter mask_slcr__FPGA2_THR_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA2_THR_CNT = 32'hF8000198;
-parameter val_slcr__FPGA2_THR_CNT = 32'h00000000;
-parameter mask_slcr__FPGA2_THR_CNT = 32'hFFFFFFFF;
-
-parameter slcr__FPGA2_THR_STA = 32'hF800019C;
-parameter val_slcr__FPGA2_THR_STA = 32'h00010000;
-parameter mask_slcr__FPGA2_THR_STA = 32'hFFFFFFFF;
-
-parameter slcr__FPGA3_CLK_CTRL = 32'hF80001A0;
-parameter val_slcr__FPGA3_CLK_CTRL = 32'h00101800;
-parameter mask_slcr__FPGA3_CLK_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA3_THR_CTRL = 32'hF80001A4;
-parameter val_slcr__FPGA3_THR_CTRL = 32'h00000000;
-parameter mask_slcr__FPGA3_THR_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA3_THR_CNT = 32'hF80001A8;
-parameter val_slcr__FPGA3_THR_CNT = 32'h00000000;
-parameter mask_slcr__FPGA3_THR_CNT = 32'hFFFFFFFF;
-
-parameter slcr__FPGA3_THR_STA = 32'hF80001AC;
-parameter val_slcr__FPGA3_THR_STA = 32'h00010000;
-parameter mask_slcr__FPGA3_THR_STA = 32'hFFFFFFFF;
-
-parameter slcr__SRST_UART_CTRL = 32'hF80001B0;
-parameter val_slcr__SRST_UART_CTRL = 32'h00000000;
-parameter mask_slcr__SRST_UART_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__BANDGAP_TRIM = 32'hF80001B8;
-parameter val_slcr__BANDGAP_TRIM = 32'h0000001F;
-parameter mask_slcr__BANDGAP_TRIM = 32'hFFFFFFFF;
-
-parameter slcr__CC_TEST = 32'hF80001BC;
-parameter val_slcr__CC_TEST = 32'h00000000;
-parameter mask_slcr__CC_TEST = 32'hFFFFFFFF;
-
-parameter slcr__PLL_PREDIVISOR = 32'hF80001C0;
-parameter val_slcr__PLL_PREDIVISOR = 32'h00000001;
-parameter mask_slcr__PLL_PREDIVISOR = 32'hFFFFFFFF;
-
-parameter slcr__CLK_621_TRUE = 32'hF80001C4;
-parameter val_slcr__CLK_621_TRUE = 32'h00000001;
-parameter mask_slcr__CLK_621_TRUE = 32'hFFFFFFC1;
-
-parameter slcr__PICTURE_DBG = 32'hF80001D0;
-parameter val_slcr__PICTURE_DBG = 32'h00000000;
-parameter mask_slcr__PICTURE_DBG = 32'hFFFFFFFF;
-
-parameter slcr__PICTURE_DBG_UCNT = 32'hF80001D4;
-parameter val_slcr__PICTURE_DBG_UCNT = 32'h00000000;
-parameter mask_slcr__PICTURE_DBG_UCNT = 32'hFFFFFFFF;
-
-parameter slcr__PICTURE_DBG_LCNT = 32'hF80001D8;
-parameter val_slcr__PICTURE_DBG_LCNT = 32'h00000000;
-parameter mask_slcr__PICTURE_DBG_LCNT = 32'hFFFFFFFF;
-
-parameter slcr__PSS_RST_CTRL = 32'hF8000200;
-parameter val_slcr__PSS_RST_CTRL = 32'h00000000;
-parameter mask_slcr__PSS_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DDR_RST_CTRL = 32'hF8000204;
-parameter val_slcr__DDR_RST_CTRL = 32'h00000000;
-parameter mask_slcr__DDR_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__TOPSW_RST_CTRL = 32'hF8000208;
-parameter val_slcr__TOPSW_RST_CTRL = 32'h00000000;
-parameter mask_slcr__TOPSW_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DMAC_RST_CTRL = 32'hF800020C;
-parameter val_slcr__DMAC_RST_CTRL = 32'h00000000;
-parameter mask_slcr__DMAC_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__USB_RST_CTRL = 32'hF8000210;
-parameter val_slcr__USB_RST_CTRL = 32'h00000000;
-parameter mask_slcr__USB_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GEM_RST_CTRL = 32'hF8000214;
-parameter val_slcr__GEM_RST_CTRL = 32'h00000000;
-parameter mask_slcr__GEM_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__SDIO_RST_CTRL = 32'hF8000218;
-parameter val_slcr__SDIO_RST_CTRL = 32'h00000000;
-parameter mask_slcr__SDIO_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__SPI_RST_CTRL = 32'hF800021C;
-parameter val_slcr__SPI_RST_CTRL = 32'h00000000;
-parameter mask_slcr__SPI_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__CAN_RST_CTRL = 32'hF8000220;
-parameter val_slcr__CAN_RST_CTRL = 32'h00000000;
-parameter mask_slcr__CAN_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__I2C_RST_CTRL = 32'hF8000224;
-parameter val_slcr__I2C_RST_CTRL = 32'h00000000;
-parameter mask_slcr__I2C_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__UART_RST_CTRL = 32'hF8000228;
-parameter val_slcr__UART_RST_CTRL = 32'h00000000;
-parameter mask_slcr__UART_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GPIO_RST_CTRL = 32'hF800022C;
-parameter val_slcr__GPIO_RST_CTRL = 32'h00000000;
-parameter mask_slcr__GPIO_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__LQSPI_RST_CTRL = 32'hF8000230;
-parameter val_slcr__LQSPI_RST_CTRL = 32'h00000000;
-parameter mask_slcr__LQSPI_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__SMC_RST_CTRL = 32'hF8000234;
-parameter val_slcr__SMC_RST_CTRL = 32'h00000000;
-parameter mask_slcr__SMC_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__OCM_RST_CTRL = 32'hF8000238;
-parameter val_slcr__OCM_RST_CTRL = 32'h00000000;
-parameter mask_slcr__OCM_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DEVCI_RST_CTRL = 32'hF800023C;
-parameter val_slcr__DEVCI_RST_CTRL = 32'h00000000;
-parameter mask_slcr__DEVCI_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__FPGA_RST_CTRL = 32'hF8000240;
-parameter val_slcr__FPGA_RST_CTRL = 32'h01F33F0F;
-parameter mask_slcr__FPGA_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__A9_CPU_RST_CTRL = 32'hF8000244;
-parameter val_slcr__A9_CPU_RST_CTRL = 32'h00000000;
-parameter mask_slcr__A9_CPU_RST_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__RS_AWDT_CTRL = 32'hF800024C;
-parameter val_slcr__RS_AWDT_CTRL = 32'h00000000;
-parameter mask_slcr__RS_AWDT_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__RST_REASON = 32'hF8000250;
-parameter val_slcr__RST_REASON = 32'h00000040;
-parameter mask_slcr__RST_REASON = 32'hFFFFFFFF;
-
-parameter slcr__RST_REASON_CLR = 32'hF8000254;
-parameter val_slcr__RST_REASON_CLR = 32'h00000000;
-parameter mask_slcr__RST_REASON_CLR = 32'hFFFFFFFF;
-
-parameter slcr__REBOOT_STATUS = 32'hF8000258;
-parameter val_slcr__REBOOT_STATUS = 32'h00400000;
-parameter mask_slcr__REBOOT_STATUS = 32'hFFFFFFFF;
-
-parameter slcr__BOOT_MODE = 32'hF800025C;
-parameter val_slcr__BOOT_MODE = 32'h00000000;
-parameter mask_slcr__BOOT_MODE = 32'hFFFFFFF0;
-
-parameter slcr__APU_CTRL = 32'hF8000300;
-parameter val_slcr__APU_CTRL = 32'h00000000;
-parameter mask_slcr__APU_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__WDT_CLK_SEL = 32'hF8000304;
-parameter val_slcr__WDT_CLK_SEL = 32'h00000000;
-parameter mask_slcr__WDT_CLK_SEL = 32'hFFFFFFFF;
-
-parameter slcr__TZ_OCM_RAM0 = 32'hF8000400;
-parameter val_slcr__TZ_OCM_RAM0 = 32'h00000000;
-parameter mask_slcr__TZ_OCM_RAM0 = 32'hFFFFFFFF;
-
-parameter slcr__TZ_OCM_RAM1 = 32'hF8000404;
-parameter val_slcr__TZ_OCM_RAM1 = 32'h00000000;
-parameter mask_slcr__TZ_OCM_RAM1 = 32'hFFFFFFFF;
-
-parameter slcr__TZ_OCM_ROM = 32'hF8000408;
-parameter val_slcr__TZ_OCM_ROM = 32'h00000000;
-parameter mask_slcr__TZ_OCM_ROM = 32'hFFFFFFFF;
-
-parameter slcr__TZ_DDR_RAM = 32'hF8000430;
-parameter val_slcr__TZ_DDR_RAM = 32'h00000000;
-parameter mask_slcr__TZ_DDR_RAM = 32'h00000001;
-
-parameter slcr__TZ_DMA_NS = 32'hF8000440;
-parameter val_slcr__TZ_DMA_NS = 32'h00000000;
-parameter mask_slcr__TZ_DMA_NS = 32'hFFFFFFFF;
-
-parameter slcr__TZ_DMA_IRQ_NS = 32'hF8000444;
-parameter val_slcr__TZ_DMA_IRQ_NS = 32'h00000000;
-parameter mask_slcr__TZ_DMA_IRQ_NS = 32'hFFFFFFFF;
-
-parameter slcr__TZ_DMA_PERIPH_NS = 32'hF8000448;
-parameter val_slcr__TZ_DMA_PERIPH_NS = 32'h00000000;
-parameter mask_slcr__TZ_DMA_PERIPH_NS = 32'hFFFFFFFF;
-
-parameter slcr__TZ_GEM = 32'hF8000450;
-parameter val_slcr__TZ_GEM = 32'h00000000;
-parameter mask_slcr__TZ_GEM = 32'hFFFFFFFF;
-
-parameter slcr__TZ_SDIO = 32'hF8000454;
-parameter val_slcr__TZ_SDIO = 32'h00000000;
-parameter mask_slcr__TZ_SDIO = 32'hFFFFFFFF;
-
-parameter slcr__TZ_USB = 32'hF8000458;
-parameter val_slcr__TZ_USB = 32'h00000000;
-parameter mask_slcr__TZ_USB = 32'hFFFFFFFF;
-
-parameter slcr__TZ_FPGA_M = 32'hF8000484;
-parameter val_slcr__TZ_FPGA_M = 32'h00000000;
-parameter mask_slcr__TZ_FPGA_M = 32'hFFFFFFFF;
-
-parameter slcr__TZ_FPGA_AFI = 32'hF8000488;
-parameter val_slcr__TZ_FPGA_AFI = 32'h00000000;
-parameter mask_slcr__TZ_FPGA_AFI = 32'hFFFFFFFF;
-
-parameter slcr__DBG_CTRL = 32'hF8000500;
-parameter val_slcr__DBG_CTRL = 32'h00000000;
-parameter mask_slcr__DBG_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__PSS_IDCODE = 32'hF8000530;
-parameter val_slcr__PSS_IDCODE = 32'h03720093;
-parameter mask_slcr__PSS_IDCODE = 32'h0FFE0FFF;
-
-parameter slcr__DDR_URGENT = 32'hF8000600;
-parameter val_slcr__DDR_URGENT = 32'h00000000;
-parameter mask_slcr__DDR_URGENT = 32'hFFFFFFFF;
-
-parameter slcr__DDR_CAL_START = 32'hF800060C;
-parameter val_slcr__DDR_CAL_START = 32'h00000000;
-parameter mask_slcr__DDR_CAL_START = 32'hFFFFFFFF;
-
-parameter slcr__DDR_REF_START = 32'hF8000614;
-parameter val_slcr__DDR_REF_START = 32'h00000000;
-parameter mask_slcr__DDR_REF_START = 32'hFFFFFFFF;
-
-parameter slcr__DDR_CMD_STA = 32'hF8000618;
-parameter val_slcr__DDR_CMD_STA = 32'h00000000;
-parameter mask_slcr__DDR_CMD_STA = 32'hFFFFFFFF;
-
-parameter slcr__DDR_URGENT_SEL = 32'hF800061C;
-parameter val_slcr__DDR_URGENT_SEL = 32'h00000000;
-parameter mask_slcr__DDR_URGENT_SEL = 32'hFFFFFFFF;
-
-parameter slcr__DDR_DFI_STATUS = 32'hF8000620;
-parameter val_slcr__DDR_DFI_STATUS = 32'h00000000;
-parameter mask_slcr__DDR_DFI_STATUS = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_00 = 32'hF8000700;
-parameter val_slcr__MIO_PIN_00 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_00 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_01 = 32'hF8000704;
-parameter val_slcr__MIO_PIN_01 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_01 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_02 = 32'hF8000708;
-parameter val_slcr__MIO_PIN_02 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_02 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_03 = 32'hF800070C;
-parameter val_slcr__MIO_PIN_03 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_03 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_04 = 32'hF8000710;
-parameter val_slcr__MIO_PIN_04 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_04 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_05 = 32'hF8000714;
-parameter val_slcr__MIO_PIN_05 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_05 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_06 = 32'hF8000718;
-parameter val_slcr__MIO_PIN_06 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_06 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_07 = 32'hF800071C;
-parameter val_slcr__MIO_PIN_07 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_07 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_08 = 32'hF8000720;
-parameter val_slcr__MIO_PIN_08 = 32'h00000601;
-parameter mask_slcr__MIO_PIN_08 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_09 = 32'hF8000724;
-parameter val_slcr__MIO_PIN_09 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_09 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_10 = 32'hF8000728;
-parameter val_slcr__MIO_PIN_10 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_10 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_11 = 32'hF800072C;
-parameter val_slcr__MIO_PIN_11 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_11 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_12 = 32'hF8000730;
-parameter val_slcr__MIO_PIN_12 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_12 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_13 = 32'hF8000734;
-parameter val_slcr__MIO_PIN_13 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_13 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_14 = 32'hF8000738;
-parameter val_slcr__MIO_PIN_14 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_14 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_15 = 32'hF800073C;
-parameter val_slcr__MIO_PIN_15 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_15 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_16 = 32'hF8000740;
-parameter val_slcr__MIO_PIN_16 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_16 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_17 = 32'hF8000744;
-parameter val_slcr__MIO_PIN_17 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_17 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_18 = 32'hF8000748;
-parameter val_slcr__MIO_PIN_18 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_18 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_19 = 32'hF800074C;
-parameter val_slcr__MIO_PIN_19 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_19 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_20 = 32'hF8000750;
-parameter val_slcr__MIO_PIN_20 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_20 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_21 = 32'hF8000754;
-parameter val_slcr__MIO_PIN_21 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_21 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_22 = 32'hF8000758;
-parameter val_slcr__MIO_PIN_22 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_22 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_23 = 32'hF800075C;
-parameter val_slcr__MIO_PIN_23 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_23 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_24 = 32'hF8000760;
-parameter val_slcr__MIO_PIN_24 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_24 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_25 = 32'hF8000764;
-parameter val_slcr__MIO_PIN_25 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_25 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_26 = 32'hF8000768;
-parameter val_slcr__MIO_PIN_26 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_26 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_27 = 32'hF800076C;
-parameter val_slcr__MIO_PIN_27 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_27 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_28 = 32'hF8000770;
-parameter val_slcr__MIO_PIN_28 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_28 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_29 = 32'hF8000774;
-parameter val_slcr__MIO_PIN_29 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_29 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_30 = 32'hF8000778;
-parameter val_slcr__MIO_PIN_30 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_30 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_31 = 32'hF800077C;
-parameter val_slcr__MIO_PIN_31 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_31 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_32 = 32'hF8000780;
-parameter val_slcr__MIO_PIN_32 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_32 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_33 = 32'hF8000784;
-parameter val_slcr__MIO_PIN_33 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_33 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_34 = 32'hF8000788;
-parameter val_slcr__MIO_PIN_34 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_34 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_35 = 32'hF800078C;
-parameter val_slcr__MIO_PIN_35 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_35 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_36 = 32'hF8000790;
-parameter val_slcr__MIO_PIN_36 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_36 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_37 = 32'hF8000794;
-parameter val_slcr__MIO_PIN_37 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_37 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_38 = 32'hF8000798;
-parameter val_slcr__MIO_PIN_38 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_38 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_39 = 32'hF800079C;
-parameter val_slcr__MIO_PIN_39 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_39 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_40 = 32'hF80007A0;
-parameter val_slcr__MIO_PIN_40 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_40 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_41 = 32'hF80007A4;
-parameter val_slcr__MIO_PIN_41 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_41 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_42 = 32'hF80007A8;
-parameter val_slcr__MIO_PIN_42 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_42 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_43 = 32'hF80007AC;
-parameter val_slcr__MIO_PIN_43 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_43 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_44 = 32'hF80007B0;
-parameter val_slcr__MIO_PIN_44 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_44 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_45 = 32'hF80007B4;
-parameter val_slcr__MIO_PIN_45 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_45 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_46 = 32'hF80007B8;
-parameter val_slcr__MIO_PIN_46 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_46 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_47 = 32'hF80007BC;
-parameter val_slcr__MIO_PIN_47 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_47 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_48 = 32'hF80007C0;
-parameter val_slcr__MIO_PIN_48 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_48 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_49 = 32'hF80007C4;
-parameter val_slcr__MIO_PIN_49 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_49 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_50 = 32'hF80007C8;
-parameter val_slcr__MIO_PIN_50 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_50 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_51 = 32'hF80007CC;
-parameter val_slcr__MIO_PIN_51 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_51 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_52 = 32'hF80007D0;
-parameter val_slcr__MIO_PIN_52 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_52 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_PIN_53 = 32'hF80007D4;
-parameter val_slcr__MIO_PIN_53 = 32'h00001601;
-parameter mask_slcr__MIO_PIN_53 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_FMIO_GEM_SEL = 32'hF8000800;
-parameter val_slcr__MIO_FMIO_GEM_SEL = 32'h00000000;
-parameter mask_slcr__MIO_FMIO_GEM_SEL = 32'hFFFFFFFF;
-
-parameter slcr__MIO_LOOPBACK = 32'hF8000804;
-parameter val_slcr__MIO_LOOPBACK = 32'h00000000;
-parameter mask_slcr__MIO_LOOPBACK = 32'hFFFFFFFF;
-
-parameter slcr__MIO_MST_TRI0 = 32'hF800080C;
-parameter val_slcr__MIO_MST_TRI0 = 32'hFFFFFFFF;
-parameter mask_slcr__MIO_MST_TRI0 = 32'hFFFFFFFF;
-
-parameter slcr__MIO_MST_TRI1 = 32'hF8000810;
-parameter val_slcr__MIO_MST_TRI1 = 32'h003FFFFF;
-parameter mask_slcr__MIO_MST_TRI1 = 32'hFFFFFFFF;
-
-parameter slcr__SD0_WP_CD_SEL = 32'hF8000830;
-parameter val_slcr__SD0_WP_CD_SEL = 32'h00000000;
-parameter mask_slcr__SD0_WP_CD_SEL = 32'hFFFFFFFF;
-
-parameter slcr__SD1_WP_CD_SEL = 32'hF8000834;
-parameter val_slcr__SD1_WP_CD_SEL = 32'h00000000;
-parameter mask_slcr__SD1_WP_CD_SEL = 32'hFFFFFFFF;
-
-parameter slcr__LVL_SHFTR_EN = 32'hF8000900;
-parameter val_slcr__LVL_SHFTR_EN = 32'h00000000;
-parameter mask_slcr__LVL_SHFTR_EN = 32'hFFFFFFFF;
-
-parameter slcr__OCM_CFG = 32'hF8000910;
-parameter val_slcr__OCM_CFG = 32'h00000000;
-parameter mask_slcr__OCM_CFG = 32'hFFFFFFFF;
-
-parameter slcr__CPU0_RAM0 = 32'hF8000A00;
-parameter val_slcr__CPU0_RAM0 = 32'h00020202;
-parameter mask_slcr__CPU0_RAM0 = 32'h00FFFFFF;
-
-parameter slcr__CPU0_RAM1 = 32'hF8000A04;
-parameter val_slcr__CPU0_RAM1 = 32'h00020202;
-parameter mask_slcr__CPU0_RAM1 = 32'h00FFFFFF;
-
-parameter slcr__CPU0_RAM2 = 32'hF8000A08;
-parameter val_slcr__CPU0_RAM2 = 32'h02020202;
-parameter mask_slcr__CPU0_RAM2 = 32'hFFFFFFFF;
-
-parameter slcr__CPU1_RAM0 = 32'hF8000A0C;
-parameter val_slcr__CPU1_RAM0 = 32'h00020202;
-parameter mask_slcr__CPU1_RAM0 = 32'h00FFFFFF;
-
-parameter slcr__CPU1_RAM1 = 32'hF8000A10;
-parameter val_slcr__CPU1_RAM1 = 32'h00020202;
-parameter mask_slcr__CPU1_RAM1 = 32'h00FFFFFF;
-
-parameter slcr__CPU1_RAM2 = 32'hF8000A14;
-parameter val_slcr__CPU1_RAM2 = 32'h02020202;
-parameter mask_slcr__CPU1_RAM2 = 32'hFFFFFFFF;
-
-parameter slcr__SCU_RAM = 32'hF8000A18;
-parameter val_slcr__SCU_RAM = 32'h00000002;
-parameter mask_slcr__SCU_RAM = 32'h000000FF;
-
-parameter slcr__L2C_RAM = 32'hF8000A1C;
-parameter val_slcr__L2C_RAM = 32'h00020202;
-parameter mask_slcr__L2C_RAM = 32'h00FFFFFF;
-
-parameter slcr__IOU_RAM_GEM01 = 32'hF8000A30;
-parameter val_slcr__IOU_RAM_GEM01 = 32'h09090909;
-parameter mask_slcr__IOU_RAM_GEM01 = 32'hFFFFFFFF;
-
-parameter slcr__IOU_RAM_USB01 = 32'hF8000A34;
-parameter val_slcr__IOU_RAM_USB01 = 32'h09090909;
-parameter mask_slcr__IOU_RAM_USB01 = 32'hFFFFFFFF;
-
-parameter slcr__IOU_RAM_SDIO0 = 32'hF8000A38;
-parameter val_slcr__IOU_RAM_SDIO0 = 32'h09090909;
-parameter mask_slcr__IOU_RAM_SDIO0 = 32'hFFFFFFFF;
-
-parameter slcr__IOU_RAM_SDIO1 = 32'hF8000A3C;
-parameter val_slcr__IOU_RAM_SDIO1 = 32'h09090909;
-parameter mask_slcr__IOU_RAM_SDIO1 = 32'hFFFFFFFF;
-
-parameter slcr__IOU_RAM_CAN0 = 32'hF8000A40;
-parameter val_slcr__IOU_RAM_CAN0 = 32'h00090909;
-parameter mask_slcr__IOU_RAM_CAN0 = 32'h00FFFFFF;
-
-parameter slcr__IOU_RAM_CAN1 = 32'hF8000A44;
-parameter val_slcr__IOU_RAM_CAN1 = 32'h00090909;
-parameter mask_slcr__IOU_RAM_CAN1 = 32'h00FFFFFF;
-
-parameter slcr__IOU_RAM_LQSPI = 32'hF8000A48;
-parameter val_slcr__IOU_RAM_LQSPI = 32'h00000909;
-parameter mask_slcr__IOU_RAM_LQSPI = 32'h0000FFFF;
-
-parameter slcr__DMAC_RAM = 32'hF8000A50;
-parameter val_slcr__DMAC_RAM = 32'h00000009;
-parameter mask_slcr__DMAC_RAM = 32'h000000FF;
-
-parameter slcr__AFI0_RAM0 = 32'hF8000A60;
-parameter val_slcr__AFI0_RAM0 = 32'h09090909;
-parameter mask_slcr__AFI0_RAM0 = 32'hFFFFFFFF;
-
-parameter slcr__AFI0_RAM1 = 32'hF8000A64;
-parameter val_slcr__AFI0_RAM1 = 32'h09090909;
-parameter mask_slcr__AFI0_RAM1 = 32'hFFFFFFFF;
-
-parameter slcr__AFI0_RAM2 = 32'hF8000A68;
-parameter val_slcr__AFI0_RAM2 = 32'h00000909;
-parameter mask_slcr__AFI0_RAM2 = 32'h0000FFFF;
-
-parameter slcr__AFI1_RAM0 = 32'hF8000A6C;
-parameter val_slcr__AFI1_RAM0 = 32'h09090909;
-parameter mask_slcr__AFI1_RAM0 = 32'hFFFFFFFF;
-
-parameter slcr__AFI1_RAM1 = 32'hF8000A70;
-parameter val_slcr__AFI1_RAM1 = 32'h09090909;
-parameter mask_slcr__AFI1_RAM1 = 32'hFFFFFFFF;
-
-parameter slcr__AFI1_RAM2 = 32'hF8000A74;
-parameter val_slcr__AFI1_RAM2 = 32'h00000909;
-parameter mask_slcr__AFI1_RAM2 = 32'h0000FFFF;
-
-parameter slcr__AFI2_RAM0 = 32'hF8000A78;
-parameter val_slcr__AFI2_RAM0 = 32'h09090909;
-parameter mask_slcr__AFI2_RAM0 = 32'hFFFFFFFF;
-
-parameter slcr__AFI2_RAM1 = 32'hF8000A7C;
-parameter val_slcr__AFI2_RAM1 = 32'h09090909;
-parameter mask_slcr__AFI2_RAM1 = 32'hFFFFFFFF;
-
-parameter slcr__AFI2_RAM2 = 32'hF8000A80;
-parameter val_slcr__AFI2_RAM2 = 32'h00000909;
-parameter mask_slcr__AFI2_RAM2 = 32'h0000FFFF;
-
-parameter slcr__AFI3_RAM0 = 32'hF8000A84;
-parameter val_slcr__AFI3_RAM0 = 32'h09090909;
-parameter mask_slcr__AFI3_RAM0 = 32'hFFFFFFFF;
-
-parameter slcr__AFI3_RAM1 = 32'hF8000A88;
-parameter val_slcr__AFI3_RAM1 = 32'h09090909;
-parameter mask_slcr__AFI3_RAM1 = 32'hFFFFFFFF;
-
-parameter slcr__AFI3_RAM2 = 32'hF8000A8C;
-parameter val_slcr__AFI3_RAM2 = 32'h00000909;
-parameter mask_slcr__AFI3_RAM2 = 32'h0000FFFF;
-
-parameter slcr__OCM_RAM = 32'hF8000A90;
-parameter val_slcr__OCM_RAM = 32'h01010101;
-parameter mask_slcr__OCM_RAM = 32'hFFFFFFFF;
-
-parameter slcr__OCM_ROM0 = 32'hF8000A94;
-parameter val_slcr__OCM_ROM0 = 32'h09090909;
-parameter mask_slcr__OCM_ROM0 = 32'hFFFFFFFF;
-
-parameter slcr__OCM_ROM1 = 32'hF8000A98;
-parameter val_slcr__OCM_ROM1 = 32'h09090909;
-parameter mask_slcr__OCM_ROM1 = 32'hFFFFFFFF;
-
-parameter slcr__DEVCI_RAM = 32'hF8000AA0;
-parameter val_slcr__DEVCI_RAM = 32'h00000909;
-parameter mask_slcr__DEVCI_RAM = 32'h0000FFFF;
-
-parameter slcr__CSG_RAM = 32'hF8000AB0;
-parameter val_slcr__CSG_RAM = 32'h00000001;
-parameter mask_slcr__CSG_RAM = 32'h000000FF;
-
-parameter slcr__GPIOB_CTRL = 32'hF8000B00;
-parameter val_slcr__GPIOB_CTRL = 32'h00000000;
-parameter mask_slcr__GPIOB_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__GPIOB_CFG_CMOS18 = 32'hF8000B04;
-parameter val_slcr__GPIOB_CFG_CMOS18 = 32'h00000000;
-parameter mask_slcr__GPIOB_CFG_CMOS18 = 32'hFFFFFFFF;
-
-parameter slcr__GPIOB_CFG_CMOS25 = 32'hF8000B08;
-parameter val_slcr__GPIOB_CFG_CMOS25 = 32'h00000000;
-parameter mask_slcr__GPIOB_CFG_CMOS25 = 32'hFFFFFFFF;
-
-parameter slcr__GPIOB_CFG_CMOS33 = 32'hF8000B0C;
-parameter val_slcr__GPIOB_CFG_CMOS33 = 32'h00000000;
-parameter mask_slcr__GPIOB_CFG_CMOS33 = 32'hFFFFFFFF;
-
-parameter slcr__GPIOB_CFG_LVTTL = 32'hF8000B10;
-parameter val_slcr__GPIOB_CFG_LVTTL = 32'h00000000;
-parameter mask_slcr__GPIOB_CFG_LVTTL = 32'hFFFFFFFF;
-
-parameter slcr__GPIOB_CFG_HSTL = 32'hF8000B14;
-parameter val_slcr__GPIOB_CFG_HSTL = 32'h00000000;
-parameter mask_slcr__GPIOB_CFG_HSTL = 32'hFFFFFFFF;
-
-parameter slcr__GPIOB_DRVR_BIAS_CTRL = 32'hF8000B18;
-parameter val_slcr__GPIOB_DRVR_BIAS_CTRL = 32'h00000000;
-parameter mask_slcr__GPIOB_DRVR_BIAS_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_ADDR0 = 32'hF8000B40;
-parameter val_slcr__DDRIOB_ADDR0 = 32'h00000800;
-parameter mask_slcr__DDRIOB_ADDR0 = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_ADDR1 = 32'hF8000B44;
-parameter val_slcr__DDRIOB_ADDR1 = 32'h00000800;
-parameter mask_slcr__DDRIOB_ADDR1 = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DATA0 = 32'hF8000B48;
-parameter val_slcr__DDRIOB_DATA0 = 32'h00000800;
-parameter mask_slcr__DDRIOB_DATA0 = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DATA1 = 32'hF8000B4C;
-parameter val_slcr__DDRIOB_DATA1 = 32'h00000800;
-parameter mask_slcr__DDRIOB_DATA1 = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DIFF0 = 32'hF8000B50;
-parameter val_slcr__DDRIOB_DIFF0 = 32'h00000800;
-parameter mask_slcr__DDRIOB_DIFF0 = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DIFF1 = 32'hF8000B54;
-parameter val_slcr__DDRIOB_DIFF1 = 32'h00000800;
-parameter mask_slcr__DDRIOB_DIFF1 = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_CLOCK = 32'hF8000B58;
-parameter val_slcr__DDRIOB_CLOCK = 32'h00000800;
-parameter mask_slcr__DDRIOB_CLOCK = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DRIVE_SLEW_ADDR = 32'hF8000B5C;
-parameter val_slcr__DDRIOB_DRIVE_SLEW_ADDR = 32'h00000000;
-parameter mask_slcr__DDRIOB_DRIVE_SLEW_ADDR = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DRIVE_SLEW_DATA = 32'hF8000B60;
-parameter val_slcr__DDRIOB_DRIVE_SLEW_DATA = 32'h00000000;
-parameter mask_slcr__DDRIOB_DRIVE_SLEW_DATA = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DRIVE_SLEW_DIFF = 32'hF8000B64;
-parameter val_slcr__DDRIOB_DRIVE_SLEW_DIFF = 32'h00000000;
-parameter mask_slcr__DDRIOB_DRIVE_SLEW_DIFF = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DRIVE_SLEW_CLOCK = 32'hF8000B68;
-parameter val_slcr__DDRIOB_DRIVE_SLEW_CLOCK = 32'h00000000;
-parameter mask_slcr__DDRIOB_DRIVE_SLEW_CLOCK = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DDR_CTRL = 32'hF8000B6C;
-parameter val_slcr__DDRIOB_DDR_CTRL = 32'h00000000;
-parameter mask_slcr__DDRIOB_DDR_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DCI_CTRL = 32'hF8000B70;
-parameter val_slcr__DDRIOB_DCI_CTRL = 32'h00000020;
-parameter mask_slcr__DDRIOB_DCI_CTRL = 32'hFFFFFFFF;
-
-parameter slcr__DDRIOB_DCI_STATUS = 32'hF8000B74;
-parameter val_slcr__DDRIOB_DCI_STATUS = 32'h00000000;
-parameter mask_slcr__DDRIOB_DCI_STATUS = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module smcc pl353
-// doc version: 1.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter smcc__memc_status = 32'hE000E000;
-parameter val_smcc__memc_status = 32'h00000000;
-parameter mask_smcc__memc_status = 32'h00001FFF;
-
-parameter smcc__memif_cfg = 32'hE000E004;
-parameter val_smcc__memif_cfg = 32'h00011205;
-parameter mask_smcc__memif_cfg = 32'h0003FFFF;
-
-parameter smcc__memc_cfg_set = 32'hE000E008;
-parameter val_smcc__memc_cfg_set = 32'h00000000;
-parameter mask_smcc__memc_cfg_set = 32'h00000000;
-
-parameter smcc__memc_cfg_clr = 32'hE000E00C;
-parameter val_smcc__memc_cfg_clr = 32'h00000000;
-parameter mask_smcc__memc_cfg_clr = 32'h00000000;
-
-parameter smcc__direct_cmd = 32'hE000E010;
-parameter val_smcc__direct_cmd = 32'h00000000;
-parameter mask_smcc__direct_cmd = 32'h00000000;
-
-parameter smcc__set_cycles = 32'hE000E014;
-parameter val_smcc__set_cycles = 32'h00000000;
-parameter mask_smcc__set_cycles = 32'h00000000;
-
-parameter smcc__set_opmode = 32'hE000E018;
-parameter val_smcc__set_opmode = 32'h00000000;
-parameter mask_smcc__set_opmode = 32'h00000000;
-
-parameter smcc__refresh_period_0 = 32'hE000E020;
-parameter val_smcc__refresh_period_0 = 32'h00000000;
-parameter mask_smcc__refresh_period_0 = 32'h0000000F;
-
-parameter smcc__refresh_period_1 = 32'hE000E024;
-parameter val_smcc__refresh_period_1 = 32'h00000000;
-parameter mask_smcc__refresh_period_1 = 32'h0000000F;
-
-parameter smcc__sram_cycles0_0 = 32'hE000E100;
-parameter val_smcc__sram_cycles0_0 = 32'h0002B3CC;
-parameter mask_smcc__sram_cycles0_0 = 32'h001FFFFF;
-
-parameter smcc__opmode0_0 = 32'hE000E104;
-parameter val_smcc__opmode0_0 = 32'hE2FE0800;
-parameter mask_smcc__opmode0_0 = 32'hFFFFFFFF;
-
-parameter smcc__sram_cycles0_1 = 32'hE000E120;
-parameter val_smcc__sram_cycles0_1 = 32'h0002B3CC;
-parameter mask_smcc__sram_cycles0_1 = 32'h001FFFFF;
-
-parameter smcc__opmode0_1 = 32'hE000E124;
-parameter val_smcc__opmode0_1 = 32'hE4FE0800;
-parameter mask_smcc__opmode0_1 = 32'hFFFFFFFF;
-
-parameter smcc__nand_cycles1_0 = 32'hE000E180;
-parameter val_smcc__nand_cycles1_0 = 32'h0024ABCC;
-parameter mask_smcc__nand_cycles1_0 = 32'h00FFFFFF;
-
-parameter smcc__opmode1_0 = 32'hE000E184;
-parameter val_smcc__opmode1_0 = 32'hE1FF0001;
-parameter mask_smcc__opmode1_0 = 32'hFFFFFFFF;
-
-parameter smcc__user_status = 32'hE000E200;
-parameter val_smcc__user_status = 32'h00000000;
-parameter mask_smcc__user_status = 32'h000000FF;
-
-parameter smcc__user_config = 32'hE000E204;
-parameter val_smcc__user_config = 32'h00000000;
-parameter mask_smcc__user_config = 32'h00000000;
-
-parameter smcc__ecc_status_0 = 32'hE000E300;
-parameter val_smcc__ecc_status_0 = 32'h00000000;
-parameter mask_smcc__ecc_status_0 = 32'h3FFFFFFF;
-
-parameter smcc__ecc_memcfg_0 = 32'hE000E304;
-parameter val_smcc__ecc_memcfg_0 = 32'h00000000;
-parameter mask_smcc__ecc_memcfg_0 = 32'h00001FFF;
-
-parameter smcc__ecc_memcommand1_0 = 32'hE000E308;
-parameter val_smcc__ecc_memcommand1_0 = 32'h00000000;
-parameter mask_smcc__ecc_memcommand1_0 = 32'h01FFFFFF;
-
-parameter smcc__ecc_memcommand2_0 = 32'hE000E30C;
-parameter val_smcc__ecc_memcommand2_0 = 32'h00000000;
-parameter mask_smcc__ecc_memcommand2_0 = 32'h01FFFFFF;
-
-parameter smcc__ecc_addr0_0 = 32'hE000E310;
-parameter val_smcc__ecc_addr0_0 = 32'h00000000;
-parameter mask_smcc__ecc_addr0_0 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_addr1_0 = 32'hE000E314;
-parameter val_smcc__ecc_addr1_0 = 32'h00000000;
-parameter mask_smcc__ecc_addr1_0 = 32'h00FFFFFF;
-
-parameter smcc__ecc_value0_0 = 32'hE000E318;
-parameter val_smcc__ecc_value0_0 = 32'h00000000;
-parameter mask_smcc__ecc_value0_0 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_value1_0 = 32'hE000E31C;
-parameter val_smcc__ecc_value1_0 = 32'h00000000;
-parameter mask_smcc__ecc_value1_0 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_value2_0 = 32'hE000E320;
-parameter val_smcc__ecc_value2_0 = 32'h00000000;
-parameter mask_smcc__ecc_value2_0 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_value3_0 = 32'hE000E324;
-parameter val_smcc__ecc_value3_0 = 32'h00000000;
-parameter mask_smcc__ecc_value3_0 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_status_1 = 32'hE000E400;
-parameter val_smcc__ecc_status_1 = 32'h00000000;
-parameter mask_smcc__ecc_status_1 = 32'h3FFFFFFF;
-
-parameter smcc__ecc_memcfg_1 = 32'hE000E404;
-parameter val_smcc__ecc_memcfg_1 = 32'h00000043;
-parameter mask_smcc__ecc_memcfg_1 = 32'h00001FFF;
-
-parameter smcc__ecc_memcommand1_1 = 32'hE000E408;
-parameter val_smcc__ecc_memcommand1_1 = 32'h01300080;
-parameter mask_smcc__ecc_memcommand1_1 = 32'h01FFFFFF;
-
-parameter smcc__ecc_memcommand2_1 = 32'hE000E40C;
-parameter val_smcc__ecc_memcommand2_1 = 32'h01E00585;
-parameter mask_smcc__ecc_memcommand2_1 = 32'h01FFFFFF;
-
-parameter smcc__ecc_addr0_1 = 32'hE000E410;
-parameter val_smcc__ecc_addr0_1 = 32'h00000000;
-parameter mask_smcc__ecc_addr0_1 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_addr1_1 = 32'hE000E414;
-parameter val_smcc__ecc_addr1_1 = 32'h00000000;
-parameter mask_smcc__ecc_addr1_1 = 32'h00FFFFFF;
-
-parameter smcc__ecc_value0_1 = 32'hE000E418;
-parameter val_smcc__ecc_value0_1 = 32'h00000000;
-parameter mask_smcc__ecc_value0_1 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_value1_1 = 32'hE000E41C;
-parameter val_smcc__ecc_value1_1 = 32'h00000000;
-parameter mask_smcc__ecc_value1_1 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_value2_1 = 32'hE000E420;
-parameter val_smcc__ecc_value2_1 = 32'h00000000;
-parameter mask_smcc__ecc_value2_1 = 32'hFFFFFFFF;
-
-parameter smcc__ecc_value3_1 = 32'hE000E424;
-parameter val_smcc__ecc_value3_1 = 32'h00000000;
-parameter mask_smcc__ecc_value3_1 = 32'hFFFFFFFF;
-
-parameter smcc__integration_test = 32'hE000EE00;
-parameter val_smcc__integration_test = 32'h00000000;
-parameter mask_smcc__integration_test = 32'hFFFFFFFF;
-
-parameter smcc__periph_id_0 = 32'hE000EFE0;
-parameter val_smcc__periph_id_0 = 32'h00000053;
-parameter mask_smcc__periph_id_0 = 32'h000000FF;
-
-parameter smcc__periph_id_1 = 32'hE000EFE4;
-parameter val_smcc__periph_id_1 = 32'h00000013;
-parameter mask_smcc__periph_id_1 = 32'h000000FF;
-
-parameter smcc__periph_id_2 = 32'hE000EFE8;
-parameter val_smcc__periph_id_2 = 32'h00000054;
-parameter mask_smcc__periph_id_2 = 32'h000000FF;
-
-parameter smcc__periph_id_3 = 32'hE000EFEC;
-parameter val_smcc__periph_id_3 = 32'h00000000;
-parameter mask_smcc__periph_id_3 = 32'h00000001;
-
-parameter smcc__pcell_id_0 = 32'hE000EFF0;
-parameter val_smcc__pcell_id_0 = 32'h0000000D;
-parameter mask_smcc__pcell_id_0 = 32'h000000FF;
-
-parameter smcc__pcell_id_1 = 32'hE000EFF4;
-parameter val_smcc__pcell_id_1 = 32'h000000F0;
-parameter mask_smcc__pcell_id_1 = 32'h000000FF;
-
-parameter smcc__pcell_id_2 = 32'hE000EFF8;
-parameter val_smcc__pcell_id_2 = 32'h00000005;
-parameter mask_smcc__pcell_id_2 = 32'h000000FF;
-
-parameter smcc__pcell_id_3 = 32'hE000EFFC;
-parameter val_smcc__pcell_id_3 = 32'h000000B1;
-parameter mask_smcc__pcell_id_3 = 32'h000000FF;
-
-
-// ************************************************************
-// Module spi0 SPI
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter spi0__Config_reg0 = 32'hE0006000;
-parameter val_spi0__Config_reg0 = 32'h00020000;
-parameter mask_spi0__Config_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Intr_status_reg0 = 32'hE0006004;
-parameter val_spi0__Intr_status_reg0 = 32'h00000004;
-parameter mask_spi0__Intr_status_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Intrpt_en_reg0 = 32'hE0006008;
-parameter val_spi0__Intrpt_en_reg0 = 32'h00000000;
-parameter mask_spi0__Intrpt_en_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Intrpt_dis_reg0 = 32'hE000600C;
-parameter val_spi0__Intrpt_dis_reg0 = 32'h00000000;
-parameter mask_spi0__Intrpt_dis_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Intrpt_mask_reg0 = 32'hE0006010;
-parameter val_spi0__Intrpt_mask_reg0 = 32'h00000000;
-parameter mask_spi0__Intrpt_mask_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__En_reg0 = 32'hE0006014;
-parameter val_spi0__En_reg0 = 32'h00000000;
-parameter mask_spi0__En_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Delay_reg0 = 32'hE0006018;
-parameter val_spi0__Delay_reg0 = 32'h00000000;
-parameter mask_spi0__Delay_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Tx_data_reg0 = 32'hE000601C;
-parameter val_spi0__Tx_data_reg0 = 32'h00000000;
-parameter mask_spi0__Tx_data_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Rx_data_reg0 = 32'hE0006020;
-parameter val_spi0__Rx_data_reg0 = 32'h00000000;
-parameter mask_spi0__Rx_data_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Slave_Idle_count_reg0 = 32'hE0006024;
-parameter val_spi0__Slave_Idle_count_reg0 = 32'h000000FF;
-parameter mask_spi0__Slave_Idle_count_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__TX_thres_reg0 = 32'hE0006028;
-parameter val_spi0__TX_thres_reg0 = 32'h00000001;
-parameter mask_spi0__TX_thres_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__RX_thres_reg0 = 32'hE000602C;
-parameter val_spi0__RX_thres_reg0 = 32'h00000001;
-parameter mask_spi0__RX_thres_reg0 = 32'hFFFFFFFF;
-
-parameter spi0__Mod_id_reg0 = 32'hE00060FC;
-parameter val_spi0__Mod_id_reg0 = 32'h00090106;
-parameter mask_spi0__Mod_id_reg0 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module spi1 SPI
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter spi1__Config_reg0 = 32'hE0007000;
-parameter val_spi1__Config_reg0 = 32'h00020000;
-parameter mask_spi1__Config_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Intr_status_reg0 = 32'hE0007004;
-parameter val_spi1__Intr_status_reg0 = 32'h00000004;
-parameter mask_spi1__Intr_status_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Intrpt_en_reg0 = 32'hE0007008;
-parameter val_spi1__Intrpt_en_reg0 = 32'h00000000;
-parameter mask_spi1__Intrpt_en_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Intrpt_dis_reg0 = 32'hE000700C;
-parameter val_spi1__Intrpt_dis_reg0 = 32'h00000000;
-parameter mask_spi1__Intrpt_dis_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Intrpt_mask_reg0 = 32'hE0007010;
-parameter val_spi1__Intrpt_mask_reg0 = 32'h00000000;
-parameter mask_spi1__Intrpt_mask_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__En_reg0 = 32'hE0007014;
-parameter val_spi1__En_reg0 = 32'h00000000;
-parameter mask_spi1__En_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Delay_reg0 = 32'hE0007018;
-parameter val_spi1__Delay_reg0 = 32'h00000000;
-parameter mask_spi1__Delay_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Tx_data_reg0 = 32'hE000701C;
-parameter val_spi1__Tx_data_reg0 = 32'h00000000;
-parameter mask_spi1__Tx_data_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Rx_data_reg0 = 32'hE0007020;
-parameter val_spi1__Rx_data_reg0 = 32'h00000000;
-parameter mask_spi1__Rx_data_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Slave_Idle_count_reg0 = 32'hE0007024;
-parameter val_spi1__Slave_Idle_count_reg0 = 32'h000000FF;
-parameter mask_spi1__Slave_Idle_count_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__TX_thres_reg0 = 32'hE0007028;
-parameter val_spi1__TX_thres_reg0 = 32'h00000001;
-parameter mask_spi1__TX_thres_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__RX_thres_reg0 = 32'hE000702C;
-parameter val_spi1__RX_thres_reg0 = 32'h00000001;
-parameter mask_spi1__RX_thres_reg0 = 32'hFFFFFFFF;
-
-parameter spi1__Mod_id_reg0 = 32'hE00070FC;
-parameter val_spi1__Mod_id_reg0 = 32'h00090106;
-parameter mask_spi1__Mod_id_reg0 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module swdt swdt
-// doc version: 2.1
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter swdt__MODE = 32'hF8005000;
-parameter val_swdt__MODE = 32'h000001C2;
-parameter mask_swdt__MODE = 32'h00FFFFFF;
-
-parameter swdt__CONTROL = 32'hF8005004;
-parameter val_swdt__CONTROL = 32'h03FFC3FC;
-parameter mask_swdt__CONTROL = 32'h03FFFFFF;
-
-parameter swdt__RESTART = 32'hF8005008;
-parameter val_swdt__RESTART = 32'h00000000;
-parameter mask_swdt__RESTART = 32'h0000FFFF;
-
-parameter swdt__STATUS = 32'hF800500C;
-parameter val_swdt__STATUS = 32'h00000000;
-parameter mask_swdt__STATUS = 32'h00000001;
-
-
-// ************************************************************
-// Module ttc0 ttc
-// doc version: 2.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter ttc0__Clock_Control_1 = 32'hF8001000;
-parameter val_ttc0__Clock_Control_1 = 32'h00000000;
-parameter mask_ttc0__Clock_Control_1 = 32'h0000007F;
-
-parameter ttc0__Clock_Control_2 = 32'hF8001004;
-parameter val_ttc0__Clock_Control_2 = 32'h00000000;
-parameter mask_ttc0__Clock_Control_2 = 32'h0000007F;
-
-parameter ttc0__Clock_Control_3 = 32'hF8001008;
-parameter val_ttc0__Clock_Control_3 = 32'h00000000;
-parameter mask_ttc0__Clock_Control_3 = 32'h0000007F;
-
-parameter ttc0__Counter_Control_1 = 32'hF800100C;
-parameter val_ttc0__Counter_Control_1 = 32'h00000021;
-parameter mask_ttc0__Counter_Control_1 = 32'h0000007F;
-
-parameter ttc0__Counter_Control_2 = 32'hF8001010;
-parameter val_ttc0__Counter_Control_2 = 32'h00000021;
-parameter mask_ttc0__Counter_Control_2 = 32'h0000007F;
-
-parameter ttc0__Counter_Control_3 = 32'hF8001014;
-parameter val_ttc0__Counter_Control_3 = 32'h00000021;
-parameter mask_ttc0__Counter_Control_3 = 32'h0000007F;
-
-parameter ttc0__Counter_Value_1 = 32'hF8001018;
-parameter val_ttc0__Counter_Value_1 = 32'h00000000;
-parameter mask_ttc0__Counter_Value_1 = 32'h0000FFFF;
-
-parameter ttc0__Counter_Value_2 = 32'hF800101C;
-parameter val_ttc0__Counter_Value_2 = 32'h00000000;
-parameter mask_ttc0__Counter_Value_2 = 32'h0000FFFF;
-
-parameter ttc0__Counter_Value_3 = 32'hF8001020;
-parameter val_ttc0__Counter_Value_3 = 32'h00000000;
-parameter mask_ttc0__Counter_Value_3 = 32'h0000FFFF;
-
-parameter ttc0__Interval_Counter_1 = 32'hF8001024;
-parameter val_ttc0__Interval_Counter_1 = 32'h00000000;
-parameter mask_ttc0__Interval_Counter_1 = 32'h0000FFFF;
-
-parameter ttc0__Interval_Counter_2 = 32'hF8001028;
-parameter val_ttc0__Interval_Counter_2 = 32'h00000000;
-parameter mask_ttc0__Interval_Counter_2 = 32'h0000FFFF;
-
-parameter ttc0__Interval_Counter_3 = 32'hF800102C;
-parameter val_ttc0__Interval_Counter_3 = 32'h00000000;
-parameter mask_ttc0__Interval_Counter_3 = 32'h0000FFFF;
-
-parameter ttc0__Match_1_Counter_1 = 32'hF8001030;
-parameter val_ttc0__Match_1_Counter_1 = 32'h00000000;
-parameter mask_ttc0__Match_1_Counter_1 = 32'h0000FFFF;
-
-parameter ttc0__Match_1_Counter_2 = 32'hF8001034;
-parameter val_ttc0__Match_1_Counter_2 = 32'h00000000;
-parameter mask_ttc0__Match_1_Counter_2 = 32'h0000FFFF;
-
-parameter ttc0__Match_1_Counter_3 = 32'hF8001038;
-parameter val_ttc0__Match_1_Counter_3 = 32'h00000000;
-parameter mask_ttc0__Match_1_Counter_3 = 32'h0000FFFF;
-
-parameter ttc0__Match_2_Counter_1 = 32'hF800103C;
-parameter val_ttc0__Match_2_Counter_1 = 32'h00000000;
-parameter mask_ttc0__Match_2_Counter_1 = 32'h0000FFFF;
-
-parameter ttc0__Match_2_Counter_2 = 32'hF8001040;
-parameter val_ttc0__Match_2_Counter_2 = 32'h00000000;
-parameter mask_ttc0__Match_2_Counter_2 = 32'h0000FFFF;
-
-parameter ttc0__Match_2_Counter_3 = 32'hF8001044;
-parameter val_ttc0__Match_2_Counter_3 = 32'h00000000;
-parameter mask_ttc0__Match_2_Counter_3 = 32'h0000FFFF;
-
-parameter ttc0__Match_3_Counter_1 = 32'hF8001048;
-parameter val_ttc0__Match_3_Counter_1 = 32'h00000000;
-parameter mask_ttc0__Match_3_Counter_1 = 32'h0000FFFF;
-
-parameter ttc0__Match_3_Counter_2 = 32'hF800104C;
-parameter val_ttc0__Match_3_Counter_2 = 32'h00000000;
-parameter mask_ttc0__Match_3_Counter_2 = 32'h0000FFFF;
-
-parameter ttc0__Match_3_Counter_3 = 32'hF8001050;
-parameter val_ttc0__Match_3_Counter_3 = 32'h00000000;
-parameter mask_ttc0__Match_3_Counter_3 = 32'h0000FFFF;
-
-parameter ttc0__Interrupt_Register_1 = 32'hF8001054;
-parameter val_ttc0__Interrupt_Register_1 = 32'h00000000;
-parameter mask_ttc0__Interrupt_Register_1 = 32'h0000003F;
-
-parameter ttc0__Interrupt_Register_2 = 32'hF8001058;
-parameter val_ttc0__Interrupt_Register_2 = 32'h00000000;
-parameter mask_ttc0__Interrupt_Register_2 = 32'h0000003F;
-
-parameter ttc0__Interrupt_Register_3 = 32'hF800105C;
-parameter val_ttc0__Interrupt_Register_3 = 32'h00000000;
-parameter mask_ttc0__Interrupt_Register_3 = 32'h0000003F;
-
-parameter ttc0__Interrupt_Enable_1 = 32'hF8001060;
-parameter val_ttc0__Interrupt_Enable_1 = 32'h00000000;
-parameter mask_ttc0__Interrupt_Enable_1 = 32'h0000003F;
-
-parameter ttc0__Interrupt_Enable_2 = 32'hF8001064;
-parameter val_ttc0__Interrupt_Enable_2 = 32'h00000000;
-parameter mask_ttc0__Interrupt_Enable_2 = 32'h0000003F;
-
-parameter ttc0__Interrupt_Enable_3 = 32'hF8001068;
-parameter val_ttc0__Interrupt_Enable_3 = 32'h00000000;
-parameter mask_ttc0__Interrupt_Enable_3 = 32'h0000003F;
-
-parameter ttc0__Event_Control_Timer_1 = 32'hF800106C;
-parameter val_ttc0__Event_Control_Timer_1 = 32'h00000000;
-parameter mask_ttc0__Event_Control_Timer_1 = 32'h00000007;
-
-parameter ttc0__Event_Control_Timer_2 = 32'hF8001070;
-parameter val_ttc0__Event_Control_Timer_2 = 32'h00000000;
-parameter mask_ttc0__Event_Control_Timer_2 = 32'h00000007;
-
-parameter ttc0__Event_Control_Timer_3 = 32'hF8001074;
-parameter val_ttc0__Event_Control_Timer_3 = 32'h00000000;
-parameter mask_ttc0__Event_Control_Timer_3 = 32'h00000007;
-
-parameter ttc0__Event_Register_1 = 32'hF8001078;
-parameter val_ttc0__Event_Register_1 = 32'h00000000;
-parameter mask_ttc0__Event_Register_1 = 32'h0000FFFF;
-
-parameter ttc0__Event_Register_2 = 32'hF800107C;
-parameter val_ttc0__Event_Register_2 = 32'h00000000;
-parameter mask_ttc0__Event_Register_2 = 32'h0000FFFF;
-
-parameter ttc0__Event_Register_3 = 32'hF8001080;
-parameter val_ttc0__Event_Register_3 = 32'h00000000;
-parameter mask_ttc0__Event_Register_3 = 32'h0000FFFF;
-
-
-// ************************************************************
-// Module ttc1 ttc
-// doc version: 2.0
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter ttc1__Clock_Control_1 = 32'hF8002000;
-parameter val_ttc1__Clock_Control_1 = 32'h00000000;
-parameter mask_ttc1__Clock_Control_1 = 32'h0000007F;
-
-parameter ttc1__Clock_Control_2 = 32'hF8002004;
-parameter val_ttc1__Clock_Control_2 = 32'h00000000;
-parameter mask_ttc1__Clock_Control_2 = 32'h0000007F;
-
-parameter ttc1__Clock_Control_3 = 32'hF8002008;
-parameter val_ttc1__Clock_Control_3 = 32'h00000000;
-parameter mask_ttc1__Clock_Control_3 = 32'h0000007F;
-
-parameter ttc1__Counter_Control_1 = 32'hF800200C;
-parameter val_ttc1__Counter_Control_1 = 32'h00000021;
-parameter mask_ttc1__Counter_Control_1 = 32'h0000007F;
-
-parameter ttc1__Counter_Control_2 = 32'hF8002010;
-parameter val_ttc1__Counter_Control_2 = 32'h00000021;
-parameter mask_ttc1__Counter_Control_2 = 32'h0000007F;
-
-parameter ttc1__Counter_Control_3 = 32'hF8002014;
-parameter val_ttc1__Counter_Control_3 = 32'h00000021;
-parameter mask_ttc1__Counter_Control_3 = 32'h0000007F;
-
-parameter ttc1__Counter_Value_1 = 32'hF8002018;
-parameter val_ttc1__Counter_Value_1 = 32'h00000000;
-parameter mask_ttc1__Counter_Value_1 = 32'h0000FFFF;
-
-parameter ttc1__Counter_Value_2 = 32'hF800201C;
-parameter val_ttc1__Counter_Value_2 = 32'h00000000;
-parameter mask_ttc1__Counter_Value_2 = 32'h0000FFFF;
-
-parameter ttc1__Counter_Value_3 = 32'hF8002020;
-parameter val_ttc1__Counter_Value_3 = 32'h00000000;
-parameter mask_ttc1__Counter_Value_3 = 32'h0000FFFF;
-
-parameter ttc1__Interval_Counter_1 = 32'hF8002024;
-parameter val_ttc1__Interval_Counter_1 = 32'h00000000;
-parameter mask_ttc1__Interval_Counter_1 = 32'h0000FFFF;
-
-parameter ttc1__Interval_Counter_2 = 32'hF8002028;
-parameter val_ttc1__Interval_Counter_2 = 32'h00000000;
-parameter mask_ttc1__Interval_Counter_2 = 32'h0000FFFF;
-
-parameter ttc1__Interval_Counter_3 = 32'hF800202C;
-parameter val_ttc1__Interval_Counter_3 = 32'h00000000;
-parameter mask_ttc1__Interval_Counter_3 = 32'h0000FFFF;
-
-parameter ttc1__Match_1_Counter_1 = 32'hF8002030;
-parameter val_ttc1__Match_1_Counter_1 = 32'h00000000;
-parameter mask_ttc1__Match_1_Counter_1 = 32'h0000FFFF;
-
-parameter ttc1__Match_1_Counter_2 = 32'hF8002034;
-parameter val_ttc1__Match_1_Counter_2 = 32'h00000000;
-parameter mask_ttc1__Match_1_Counter_2 = 32'h0000FFFF;
-
-parameter ttc1__Match_1_Counter_3 = 32'hF8002038;
-parameter val_ttc1__Match_1_Counter_3 = 32'h00000000;
-parameter mask_ttc1__Match_1_Counter_3 = 32'h0000FFFF;
-
-parameter ttc1__Match_2_Counter_1 = 32'hF800203C;
-parameter val_ttc1__Match_2_Counter_1 = 32'h00000000;
-parameter mask_ttc1__Match_2_Counter_1 = 32'h0000FFFF;
-
-parameter ttc1__Match_2_Counter_2 = 32'hF8002040;
-parameter val_ttc1__Match_2_Counter_2 = 32'h00000000;
-parameter mask_ttc1__Match_2_Counter_2 = 32'h0000FFFF;
-
-parameter ttc1__Match_2_Counter_3 = 32'hF8002044;
-parameter val_ttc1__Match_2_Counter_3 = 32'h00000000;
-parameter mask_ttc1__Match_2_Counter_3 = 32'h0000FFFF;
-
-parameter ttc1__Match_3_Counter_1 = 32'hF8002048;
-parameter val_ttc1__Match_3_Counter_1 = 32'h00000000;
-parameter mask_ttc1__Match_3_Counter_1 = 32'h0000FFFF;
-
-parameter ttc1__Match_3_Counter_2 = 32'hF800204C;
-parameter val_ttc1__Match_3_Counter_2 = 32'h00000000;
-parameter mask_ttc1__Match_3_Counter_2 = 32'h0000FFFF;
-
-parameter ttc1__Match_3_Counter_3 = 32'hF8002050;
-parameter val_ttc1__Match_3_Counter_3 = 32'h00000000;
-parameter mask_ttc1__Match_3_Counter_3 = 32'h0000FFFF;
-
-parameter ttc1__Interrupt_Register_1 = 32'hF8002054;
-parameter val_ttc1__Interrupt_Register_1 = 32'h00000000;
-parameter mask_ttc1__Interrupt_Register_1 = 32'h0000003F;
-
-parameter ttc1__Interrupt_Register_2 = 32'hF8002058;
-parameter val_ttc1__Interrupt_Register_2 = 32'h00000000;
-parameter mask_ttc1__Interrupt_Register_2 = 32'h0000003F;
-
-parameter ttc1__Interrupt_Register_3 = 32'hF800205C;
-parameter val_ttc1__Interrupt_Register_3 = 32'h00000000;
-parameter mask_ttc1__Interrupt_Register_3 = 32'h0000003F;
-
-parameter ttc1__Interrupt_Enable_1 = 32'hF8002060;
-parameter val_ttc1__Interrupt_Enable_1 = 32'h00000000;
-parameter mask_ttc1__Interrupt_Enable_1 = 32'h0000003F;
-
-parameter ttc1__Interrupt_Enable_2 = 32'hF8002064;
-parameter val_ttc1__Interrupt_Enable_2 = 32'h00000000;
-parameter mask_ttc1__Interrupt_Enable_2 = 32'h0000003F;
-
-parameter ttc1__Interrupt_Enable_3 = 32'hF8002068;
-parameter val_ttc1__Interrupt_Enable_3 = 32'h00000000;
-parameter mask_ttc1__Interrupt_Enable_3 = 32'h0000003F;
-
-parameter ttc1__Event_Control_Timer_1 = 32'hF800206C;
-parameter val_ttc1__Event_Control_Timer_1 = 32'h00000000;
-parameter mask_ttc1__Event_Control_Timer_1 = 32'h00000007;
-
-parameter ttc1__Event_Control_Timer_2 = 32'hF8002070;
-parameter val_ttc1__Event_Control_Timer_2 = 32'h00000000;
-parameter mask_ttc1__Event_Control_Timer_2 = 32'h00000007;
-
-parameter ttc1__Event_Control_Timer_3 = 32'hF8002074;
-parameter val_ttc1__Event_Control_Timer_3 = 32'h00000000;
-parameter mask_ttc1__Event_Control_Timer_3 = 32'h00000007;
-
-parameter ttc1__Event_Register_1 = 32'hF8002078;
-parameter val_ttc1__Event_Register_1 = 32'h00000000;
-parameter mask_ttc1__Event_Register_1 = 32'h0000FFFF;
-
-parameter ttc1__Event_Register_2 = 32'hF800207C;
-parameter val_ttc1__Event_Register_2 = 32'h00000000;
-parameter mask_ttc1__Event_Register_2 = 32'h0000FFFF;
-
-parameter ttc1__Event_Register_3 = 32'hF8002080;
-parameter val_ttc1__Event_Register_3 = 32'h00000000;
-parameter mask_ttc1__Event_Register_3 = 32'h0000FFFF;
-
-
-// ************************************************************
-// Module uart0 UART
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter uart0__Control_reg0 = 32'hE0000000;
-parameter val_uart0__Control_reg0 = 32'h00000128;
-parameter mask_uart0__Control_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__mode_reg0 = 32'hE0000004;
-parameter val_uart0__mode_reg0 = 32'h00000000;
-parameter mask_uart0__mode_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Intrpt_en_reg0 = 32'hE0000008;
-parameter val_uart0__Intrpt_en_reg0 = 32'h00000000;
-parameter mask_uart0__Intrpt_en_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Intrpt_dis_reg0 = 32'hE000000C;
-parameter val_uart0__Intrpt_dis_reg0 = 32'h00000000;
-parameter mask_uart0__Intrpt_dis_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Intrpt_mask_reg0 = 32'hE0000010;
-parameter val_uart0__Intrpt_mask_reg0 = 32'h00000000;
-parameter mask_uart0__Intrpt_mask_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Chnl_int_sts_reg0 = 32'hE0000014;
-parameter val_uart0__Chnl_int_sts_reg0 = 32'h00000200;
-parameter mask_uart0__Chnl_int_sts_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Baud_rate_gen_reg0 = 32'hE0000018;
-parameter val_uart0__Baud_rate_gen_reg0 = 32'h0000028B;
-parameter mask_uart0__Baud_rate_gen_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Rcvr_timeout_reg0 = 32'hE000001C;
-parameter val_uart0__Rcvr_timeout_reg0 = 32'h00000000;
-parameter mask_uart0__Rcvr_timeout_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Rcvr_FIFO_trigger_level0 = 32'hE0000020;
-parameter val_uart0__Rcvr_FIFO_trigger_level0 = 32'h00000020;
-parameter mask_uart0__Rcvr_FIFO_trigger_level0 = 32'hFFFFFFFF;
-
-parameter uart0__Modem_ctrl_reg0 = 32'hE0000024;
-parameter val_uart0__Modem_ctrl_reg0 = 32'h00000000;
-parameter mask_uart0__Modem_ctrl_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Modem_sts_reg0 = 32'hE0000028;
-parameter val_uart0__Modem_sts_reg0 = 32'h00000000;
-parameter mask_uart0__Modem_sts_reg0 = 32'h00000000;
-
-parameter uart0__Channel_sts_reg0 = 32'hE000002C;
-parameter val_uart0__Channel_sts_reg0 = 32'h00000000;
-parameter mask_uart0__Channel_sts_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__TX_RX_FIFO0 = 32'hE0000030;
-parameter val_uart0__TX_RX_FIFO0 = 32'h00000000;
-parameter mask_uart0__TX_RX_FIFO0 = 32'hFFFFFFFF;
-
-parameter uart0__Baud_rate_divider_reg0 = 32'hE0000034;
-parameter val_uart0__Baud_rate_divider_reg0 = 32'h0000000F;
-parameter mask_uart0__Baud_rate_divider_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__Flow_delay_reg0 = 32'hE0000038;
-parameter val_uart0__Flow_delay_reg0 = 32'h00000000;
-parameter mask_uart0__Flow_delay_reg0 = 32'hFFFFFFFF;
-
-parameter uart0__IR_min_rcv_pulse_wdth0 = 32'hE000003C;
-parameter val_uart0__IR_min_rcv_pulse_wdth0 = 32'h00000000;
-parameter mask_uart0__IR_min_rcv_pulse_wdth0 = 32'hFFFFFFFF;
-
-parameter uart0__IR_transmitted_pulse_wdth0 = 32'hE0000040;
-parameter val_uart0__IR_transmitted_pulse_wdth0 = 32'h00000000;
-parameter mask_uart0__IR_transmitted_pulse_wdth0 = 32'hFFFF00FF;
-
-parameter uart0__Tx_FIFO_trigger_level0 = 32'hE0000044;
-parameter val_uart0__Tx_FIFO_trigger_level0 = 32'h00000020;
-parameter mask_uart0__Tx_FIFO_trigger_level0 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module uart1 UART
-// doc version: 1.2
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter uart1__Control_reg0 = 32'hE0001000;
-parameter val_uart1__Control_reg0 = 32'h00000128;
-parameter mask_uart1__Control_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__mode_reg0 = 32'hE0001004;
-parameter val_uart1__mode_reg0 = 32'h00000000;
-parameter mask_uart1__mode_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Intrpt_en_reg0 = 32'hE0001008;
-parameter val_uart1__Intrpt_en_reg0 = 32'h00000000;
-parameter mask_uart1__Intrpt_en_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Intrpt_dis_reg0 = 32'hE000100C;
-parameter val_uart1__Intrpt_dis_reg0 = 32'h00000000;
-parameter mask_uart1__Intrpt_dis_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Intrpt_mask_reg0 = 32'hE0001010;
-parameter val_uart1__Intrpt_mask_reg0 = 32'h00000000;
-parameter mask_uart1__Intrpt_mask_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Chnl_int_sts_reg0 = 32'hE0001014;
-parameter val_uart1__Chnl_int_sts_reg0 = 32'h00000200;
-parameter mask_uart1__Chnl_int_sts_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Baud_rate_gen_reg0 = 32'hE0001018;
-parameter val_uart1__Baud_rate_gen_reg0 = 32'h0000028B;
-parameter mask_uart1__Baud_rate_gen_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Rcvr_timeout_reg0 = 32'hE000101C;
-parameter val_uart1__Rcvr_timeout_reg0 = 32'h00000000;
-parameter mask_uart1__Rcvr_timeout_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Rcvr_FIFO_trigger_level0 = 32'hE0001020;
-parameter val_uart1__Rcvr_FIFO_trigger_level0 = 32'h00000020;
-parameter mask_uart1__Rcvr_FIFO_trigger_level0 = 32'hFFFFFFFF;
-
-parameter uart1__Modem_ctrl_reg0 = 32'hE0001024;
-parameter val_uart1__Modem_ctrl_reg0 = 32'h00000000;
-parameter mask_uart1__Modem_ctrl_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Modem_sts_reg0 = 32'hE0001028;
-parameter val_uart1__Modem_sts_reg0 = 32'h00000000;
-parameter mask_uart1__Modem_sts_reg0 = 32'h00000000;
-
-parameter uart1__Channel_sts_reg0 = 32'hE000102C;
-parameter val_uart1__Channel_sts_reg0 = 32'h00000000;
-parameter mask_uart1__Channel_sts_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__TX_RX_FIFO0 = 32'hE0001030;
-parameter val_uart1__TX_RX_FIFO0 = 32'h00000000;
-parameter mask_uart1__TX_RX_FIFO0 = 32'hFFFFFFFF;
-
-parameter uart1__Baud_rate_divider_reg0 = 32'hE0001034;
-parameter val_uart1__Baud_rate_divider_reg0 = 32'h0000000F;
-parameter mask_uart1__Baud_rate_divider_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__Flow_delay_reg0 = 32'hE0001038;
-parameter val_uart1__Flow_delay_reg0 = 32'h00000000;
-parameter mask_uart1__Flow_delay_reg0 = 32'hFFFFFFFF;
-
-parameter uart1__IR_min_rcv_pulse_wdth0 = 32'hE000103C;
-parameter val_uart1__IR_min_rcv_pulse_wdth0 = 32'h00000000;
-parameter mask_uart1__IR_min_rcv_pulse_wdth0 = 32'hFFFFFFFF;
-
-parameter uart1__IR_transmitted_pulse_wdth0 = 32'hE0001040;
-parameter val_uart1__IR_transmitted_pulse_wdth0 = 32'h00000000;
-parameter mask_uart1__IR_transmitted_pulse_wdth0 = 32'hFFFF00FF;
-
-parameter uart1__Tx_FIFO_trigger_level0 = 32'hE0001044;
-parameter val_uart1__Tx_FIFO_trigger_level0 = 32'h00000020;
-parameter mask_uart1__Tx_FIFO_trigger_level0 = 32'hFFFFFFFF;
-
-
-// ************************************************************
-// Module usb0 usb
-// doc version: 1.3
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter usb0__ID = 32'hE0002000;
-parameter val_usb0__ID = 32'hE441FA05;
-parameter mask_usb0__ID = 32'hFFFFFFFF;
-
-parameter usb0__HWGENERAL = 32'hE0002004;
-parameter val_usb0__HWGENERAL = 32'h00000083;
-parameter mask_usb0__HWGENERAL = 32'h00000FFF;
-
-parameter usb0__HWHOST = 32'hE0002008;
-parameter val_usb0__HWHOST = 32'h10020001;
-parameter mask_usb0__HWHOST = 32'hFFFFFFFF;
-
-parameter usb0__HWDEVICE = 32'hE000200C;
-parameter val_usb0__HWDEVICE = 32'h00000019;
-parameter mask_usb0__HWDEVICE = 32'h0000003F;
-
-parameter usb0__HWTXBUF = 32'hE0002010;
-parameter val_usb0__HWTXBUF = 32'h80060A10;
-parameter mask_usb0__HWTXBUF = 32'hFFFFFFFF;
-
-parameter usb0__HWRXBUF = 32'hE0002014;
-parameter val_usb0__HWRXBUF = 32'h00000A10;
-parameter mask_usb0__HWRXBUF = 32'hFF00FFFF;
-
-parameter usb0__GPTIMER0LD = 32'hE0002080;
-parameter val_usb0__GPTIMER0LD = 32'h00000000;
-parameter mask_usb0__GPTIMER0LD = 32'h00FFFFFF;
-
-parameter usb0__GPTIMER0CTRL = 32'hE0002084;
-parameter val_usb0__GPTIMER0CTRL = 32'h00000000;
-parameter mask_usb0__GPTIMER0CTRL = 32'hFFFFFFFF;
-
-parameter usb0__GPTIMER1LD = 32'hE0002088;
-parameter val_usb0__GPTIMER1LD = 32'h00000000;
-parameter mask_usb0__GPTIMER1LD = 32'h00FFFFFF;
-
-parameter usb0__GPTIMER1CTRL = 32'hE000208C;
-parameter val_usb0__GPTIMER1CTRL = 32'h00000000;
-parameter mask_usb0__GPTIMER1CTRL = 32'hFFFFFFFF;
-
-parameter usb0__SBUSCFG = 32'hE0002090;
-parameter val_usb0__SBUSCFG = 32'h00000003;
-parameter mask_usb0__SBUSCFG = 32'h00000007;
-
-parameter usb0__CAPLENGTH_HCIVERSION = 32'hE0002100;
-parameter val_usb0__CAPLENGTH_HCIVERSION = 32'h01000040;
-parameter mask_usb0__CAPLENGTH_HCIVERSION = 32'hFFFFFFFF;
-
-parameter usb0__HCSPARAMS = 32'hE0002104;
-parameter val_usb0__HCSPARAMS = 32'h00010011;
-parameter mask_usb0__HCSPARAMS = 32'h0FFFFFFF;
-
-parameter usb0__HCCPARAMS = 32'hE0002108;
-parameter val_usb0__HCCPARAMS = 32'h00000006;
-parameter mask_usb0__HCCPARAMS = 32'h0000FFFF;
-
-parameter usb0__DCIVERSION = 32'hE0002120;
-parameter val_usb0__DCIVERSION = 32'h00000001;
-parameter mask_usb0__DCIVERSION = 32'h0000FFFF;
-
-parameter usb0__DCCPARAMS = 32'hE0002124;
-parameter val_usb0__DCCPARAMS = 32'h0000018C;
-parameter mask_usb0__DCCPARAMS = 32'h000001FF;
-
-parameter usb0__USBCMD = 32'hE0002140;
-parameter val_usb0__USBCMD = 32'h00000B00;
-parameter mask_usb0__USBCMD = 32'h00FFFFFF;
-
-parameter usb0__USBSTS = 32'hE0002144;
-parameter val_usb0__USBSTS = 32'h00000000;
-parameter mask_usb0__USBSTS = 32'h03FFFFFF;
-
-parameter usb0__USBINTR = 32'hE0002148;
-parameter val_usb0__USBINTR = 32'h00000000;
-parameter mask_usb0__USBINTR = 32'h03FF0FFF;
-
-parameter usb0__FRINDEX = 32'hE000214C;
-parameter val_usb0__FRINDEX = 32'h00000000;
-parameter mask_usb0__FRINDEX = 32'h00003FFF;
-
-parameter usb0__PERIODICLISTBASE_DEVICEADDR = 32'hE0002154;
-parameter val_usb0__PERIODICLISTBASE_DEVICEADDR = 32'h00000000;
-parameter mask_usb0__PERIODICLISTBASE_DEVICEADDR = 32'hFFFFFFFF;
-
-parameter usb0__ASYNCLISTADDR_ENDPOINTLISTADDR = 32'hE0002158;
-parameter val_usb0__ASYNCLISTADDR_ENDPOINTLISTADDR = 32'h00000000;
-parameter mask_usb0__ASYNCLISTADDR_ENDPOINTLISTADDR = 32'hFFFFFFFF;
-
-parameter usb0__TTCTRL = 32'hE000215C;
-parameter val_usb0__TTCTRL = 32'h00000000;
-parameter mask_usb0__TTCTRL = 32'hFFFFFFFF;
-
-parameter usb0__BURSTSIZE = 32'hE0002160;
-parameter val_usb0__BURSTSIZE = 32'h00001010;
-parameter mask_usb0__BURSTSIZE = 32'h0001FFFF;
-
-parameter usb0__TXFILLTUNING = 32'hE0002164;
-parameter val_usb0__TXFILLTUNING = 32'h00020000;
-parameter mask_usb0__TXFILLTUNING = 32'h003FFFFF;
-
-parameter usb0__TXTTFILLTUNING = 32'hE0002168;
-parameter val_usb0__TXTTFILLTUNING = 32'h00000000;
-parameter mask_usb0__TXTTFILLTUNING = 32'h00001FFF;
-
-parameter usb0__IC_USB = 32'hE000216C;
-parameter val_usb0__IC_USB = 32'h00000000;
-parameter mask_usb0__IC_USB = 32'hFFFFFFFF;
-
-parameter usb0__ULPI_VIEWPORT = 32'hE0002170;
-parameter val_usb0__ULPI_VIEWPORT = 32'h00000000;
-parameter mask_usb0__ULPI_VIEWPORT = 32'hFFFFFFFF;
-
-parameter usb0__ENDPTNAK = 32'hE0002178;
-parameter val_usb0__ENDPTNAK = 32'h00000000;
-parameter mask_usb0__ENDPTNAK = 32'hFFFFFFFF;
-
-parameter usb0__ENDPTNAKEN = 32'hE000217C;
-parameter val_usb0__ENDPTNAKEN = 32'h00000000;
-parameter mask_usb0__ENDPTNAKEN = 32'hFFFFFFFF;
-
-parameter usb0__CONFIGFLAG = 32'hE0002180;
-parameter val_usb0__CONFIGFLAG = 32'h00000001;
-parameter mask_usb0__CONFIGFLAG = 32'hFFFFFFFF;
-
-parameter usb0__PORTSC1 = 32'hE0002184;
-parameter val_usb0__PORTSC1 = 32'h00000000;
-parameter mask_usb0__PORTSC1 = 32'hFFFFFFFF;
-
-parameter usb0__OTGSC = 32'hE00021A4;
-parameter val_usb0__OTGSC = 32'h00000020;
-parameter mask_usb0__OTGSC = 32'hFFFFFFFF;
-
-parameter usb0__USBMODE = 32'hE00021A8;
-parameter val_usb0__USBMODE = 32'h00000000;
-parameter mask_usb0__USBMODE = 32'h0000FFFF;
-
-parameter usb0__ENDPTSETUPSTAT = 32'hE00021AC;
-parameter val_usb0__ENDPTSETUPSTAT = 32'h00000000;
-parameter mask_usb0__ENDPTSETUPSTAT = 32'h0000FFFF;
-
-parameter usb0__ENDPTPRIME = 32'hE00021B0;
-parameter val_usb0__ENDPTPRIME = 32'h00000000;
-parameter mask_usb0__ENDPTPRIME = 32'hFFFFFFFF;
-
-parameter usb0__ENDPTFLUSH = 32'hE00021B4;
-parameter val_usb0__ENDPTFLUSH = 32'h00000000;
-parameter mask_usb0__ENDPTFLUSH = 32'hFFFFFFFF;
-
-parameter usb0__ENDPTSTAT = 32'hE00021B8;
-parameter val_usb0__ENDPTSTAT = 32'h00000000;
-parameter mask_usb0__ENDPTSTAT = 32'hFFFFFFFF;
-
-parameter usb0__ENDPTCOMPLETE = 32'hE00021BC;
-parameter val_usb0__ENDPTCOMPLETE = 32'h00000000;
-parameter mask_usb0__ENDPTCOMPLETE = 32'hFFFFFFFF;
-
-parameter usb0__ENDPTCTRL0 = 32'hE00021C0;
-parameter val_usb0__ENDPTCTRL0 = 32'h00800080;
-parameter mask_usb0__ENDPTCTRL0 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL1 = 32'hE00021C4;
-parameter val_usb0__ENDPTCTRL1 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL1 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL2 = 32'hE00021C8;
-parameter val_usb0__ENDPTCTRL2 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL2 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL3 = 32'hE00021CC;
-parameter val_usb0__ENDPTCTRL3 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL3 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL4 = 32'hE00021D0;
-parameter val_usb0__ENDPTCTRL4 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL4 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL5 = 32'hE00021D4;
-parameter val_usb0__ENDPTCTRL5 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL5 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL6 = 32'hE00021D8;
-parameter val_usb0__ENDPTCTRL6 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL6 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL7 = 32'hE00021DC;
-parameter val_usb0__ENDPTCTRL7 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL7 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL8 = 32'hE00021E0;
-parameter val_usb0__ENDPTCTRL8 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL8 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL9 = 32'hE00021E4;
-parameter val_usb0__ENDPTCTRL9 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL9 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL10 = 32'hE00021E8;
-parameter val_usb0__ENDPTCTRL10 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL10 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL11 = 32'hE00021EC;
-parameter val_usb0__ENDPTCTRL11 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL11 = 32'h00FFFFFF;
-
-parameter usb0__ENDPTCTRL12 = 32'hE00021F0;
-parameter val_usb0__ENDPTCTRL12 = 32'h00000000;
-parameter mask_usb0__ENDPTCTRL12 = 32'h00FFFFFF;
-
-
-// ************************************************************
-// Module usb1 usb
-// doc version: 1.3
-// ************************************************************
-
-// ADDRESS DEVFALUE MASK NAME
-parameter usb1__ID = 32'hE0003000;
-parameter val_usb1__ID = 32'hE441FA05;
-parameter mask_usb1__ID = 32'hFFFFFFFF;
-
-parameter usb1__HWGENERAL = 32'hE0003004;
-parameter val_usb1__HWGENERAL = 32'h00000083;
-parameter mask_usb1__HWGENERAL = 32'h00000FFF;
-
-parameter usb1__HWHOST = 32'hE0003008;
-parameter val_usb1__HWHOST = 32'h10020001;
-parameter mask_usb1__HWHOST = 32'hFFFFFFFF;
-
-parameter usb1__HWDEVICE = 32'hE000300C;
-parameter val_usb1__HWDEVICE = 32'h00000019;
-parameter mask_usb1__HWDEVICE = 32'h0000003F;
-
-parameter usb1__HWTXBUF = 32'hE0003010;
-parameter val_usb1__HWTXBUF = 32'h80060A10;
-parameter mask_usb1__HWTXBUF = 32'hFFFFFFFF;
-
-parameter usb1__HWRXBUF = 32'hE0003014;
-parameter val_usb1__HWRXBUF = 32'h00000A10;
-parameter mask_usb1__HWRXBUF = 32'hFF00FFFF;
-
-parameter usb1__GPTIMER0LD = 32'hE0003080;
-parameter val_usb1__GPTIMER0LD = 32'h00000000;
-parameter mask_usb1__GPTIMER0LD = 32'h00FFFFFF;
-
-parameter usb1__GPTIMER0CTRL = 32'hE0003084;
-parameter val_usb1__GPTIMER0CTRL = 32'h00000000;
-parameter mask_usb1__GPTIMER0CTRL = 32'hFFFFFFFF;
-
-parameter usb1__GPTIMER1LD = 32'hE0003088;
-parameter val_usb1__GPTIMER1LD = 32'h00000000;
-parameter mask_usb1__GPTIMER1LD = 32'h00FFFFFF;
-
-parameter usb1__GPTIMER1CTRL = 32'hE000308C;
-parameter val_usb1__GPTIMER1CTRL = 32'h00000000;
-parameter mask_usb1__GPTIMER1CTRL = 32'hFFFFFFFF;
-
-parameter usb1__SBUSCFG = 32'hE0003090;
-parameter val_usb1__SBUSCFG = 32'h00000003;
-parameter mask_usb1__SBUSCFG = 32'h00000007;
-
-parameter usb1__CAPLENGTH_HCIVERSION = 32'hE0003100;
-parameter val_usb1__CAPLENGTH_HCIVERSION = 32'h01000040;
-parameter mask_usb1__CAPLENGTH_HCIVERSION = 32'hFFFFFFFF;
-
-parameter usb1__HCSPARAMS = 32'hE0003104;
-parameter val_usb1__HCSPARAMS = 32'h00010011;
-parameter mask_usb1__HCSPARAMS = 32'h0FFFFFFF;
-
-parameter usb1__HCCPARAMS = 32'hE0003108;
-parameter val_usb1__HCCPARAMS = 32'h00000006;
-parameter mask_usb1__HCCPARAMS = 32'h0000FFFF;
-
-parameter usb1__DCIVERSION = 32'hE0003120;
-parameter val_usb1__DCIVERSION = 32'h00000001;
-parameter mask_usb1__DCIVERSION = 32'h0000FFFF;
-
-parameter usb1__DCCPARAMS = 32'hE0003124;
-parameter val_usb1__DCCPARAMS = 32'h0000018C;
-parameter mask_usb1__DCCPARAMS = 32'h000001FF;
-
-parameter usb1__USBCMD = 32'hE0003140;
-parameter val_usb1__USBCMD = 32'h00000B00;
-parameter mask_usb1__USBCMD = 32'h00FFFFFF;
-
-parameter usb1__USBSTS = 32'hE0003144;
-parameter val_usb1__USBSTS = 32'h00000000;
-parameter mask_usb1__USBSTS = 32'h03FFFFFF;
-
-parameter usb1__USBINTR = 32'hE0003148;
-parameter val_usb1__USBINTR = 32'h00000000;
-parameter mask_usb1__USBINTR = 32'h03FF0FFF;
-
-parameter usb1__FRINDEX = 32'hE000314C;
-parameter val_usb1__FRINDEX = 32'h00000000;
-parameter mask_usb1__FRINDEX = 32'h00003FFF;
-
-parameter usb1__PERIODICLISTBASE_DEVICEADDR = 32'hE0003154;
-parameter val_usb1__PERIODICLISTBASE_DEVICEADDR = 32'h00000000;
-parameter mask_usb1__PERIODICLISTBASE_DEVICEADDR = 32'hFFFFFFFF;
-
-parameter usb1__ASYNCLISTADDR_ENDPOINTLISTADDR = 32'hE0003158;
-parameter val_usb1__ASYNCLISTADDR_ENDPOINTLISTADDR = 32'h00000000;
-parameter mask_usb1__ASYNCLISTADDR_ENDPOINTLISTADDR = 32'hFFFFFFFF;
-
-parameter usb1__TTCTRL = 32'hE000315C;
-parameter val_usb1__TTCTRL = 32'h00000000;
-parameter mask_usb1__TTCTRL = 32'hFFFFFFFF;
-
-parameter usb1__BURSTSIZE = 32'hE0003160;
-parameter val_usb1__BURSTSIZE = 32'h00001010;
-parameter mask_usb1__BURSTSIZE = 32'h0001FFFF;
-
-parameter usb1__TXFILLTUNING = 32'hE0003164;
-parameter val_usb1__TXFILLTUNING = 32'h00020000;
-parameter mask_usb1__TXFILLTUNING = 32'h003FFFFF;
-
-parameter usb1__TXTTFILLTUNING = 32'hE0003168;
-parameter val_usb1__TXTTFILLTUNING = 32'h00000000;
-parameter mask_usb1__TXTTFILLTUNING = 32'h00001FFF;
-
-parameter usb1__IC_USB = 32'hE000316C;
-parameter val_usb1__IC_USB = 32'h00000000;
-parameter mask_usb1__IC_USB = 32'hFFFFFFFF;
-
-parameter usb1__ULPI_VIEWPORT = 32'hE0003170;
-parameter val_usb1__ULPI_VIEWPORT = 32'h00000000;
-parameter mask_usb1__ULPI_VIEWPORT = 32'hFFFFFFFF;
-
-parameter usb1__ENDPTNAK = 32'hE0003178;
-parameter val_usb1__ENDPTNAK = 32'h00000000;
-parameter mask_usb1__ENDPTNAK = 32'hFFFFFFFF;
-
-parameter usb1__ENDPTNAKEN = 32'hE000317C;
-parameter val_usb1__ENDPTNAKEN = 32'h00000000;
-parameter mask_usb1__ENDPTNAKEN = 32'hFFFFFFFF;
-
-parameter usb1__CONFIGFLAG = 32'hE0003180;
-parameter val_usb1__CONFIGFLAG = 32'h00000001;
-parameter mask_usb1__CONFIGFLAG = 32'hFFFFFFFF;
-
-parameter usb1__PORTSC1 = 32'hE0003184;
-parameter val_usb1__PORTSC1 = 32'h00000000;
-parameter mask_usb1__PORTSC1 = 32'hFFFFFFFF;
-
-parameter usb1__OTGSC = 32'hE00031A4;
-parameter val_usb1__OTGSC = 32'h00000020;
-parameter mask_usb1__OTGSC = 32'hFFFFFFFF;
-
-parameter usb1__USBMODE = 32'hE00031A8;
-parameter val_usb1__USBMODE = 32'h00000000;
-parameter mask_usb1__USBMODE = 32'h0000FFFF;
-
-parameter usb1__ENDPTSETUPSTAT = 32'hE00031AC;
-parameter val_usb1__ENDPTSETUPSTAT = 32'h00000000;
-parameter mask_usb1__ENDPTSETUPSTAT = 32'h0000FFFF;
-
-parameter usb1__ENDPTPRIME = 32'hE00031B0;
-parameter val_usb1__ENDPTPRIME = 32'h00000000;
-parameter mask_usb1__ENDPTPRIME = 32'hFFFFFFFF;
-
-parameter usb1__ENDPTFLUSH = 32'hE00031B4;
-parameter val_usb1__ENDPTFLUSH = 32'h00000000;
-parameter mask_usb1__ENDPTFLUSH = 32'hFFFFFFFF;
-
-parameter usb1__ENDPTSTAT = 32'hE00031B8;
-parameter val_usb1__ENDPTSTAT = 32'h00000000;
-parameter mask_usb1__ENDPTSTAT = 32'hFFFFFFFF;
-
-parameter usb1__ENDPTCOMPLETE = 32'hE00031BC;
-parameter val_usb1__ENDPTCOMPLETE = 32'h00000000;
-parameter mask_usb1__ENDPTCOMPLETE = 32'hFFFFFFFF;
-
-parameter usb1__ENDPTCTRL0 = 32'hE00031C0;
-parameter val_usb1__ENDPTCTRL0 = 32'h00800080;
-parameter mask_usb1__ENDPTCTRL0 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL1 = 32'hE00031C4;
-parameter val_usb1__ENDPTCTRL1 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL1 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL2 = 32'hE00031C8;
-parameter val_usb1__ENDPTCTRL2 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL2 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL3 = 32'hE00031CC;
-parameter val_usb1__ENDPTCTRL3 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL3 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL4 = 32'hE00031D0;
-parameter val_usb1__ENDPTCTRL4 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL4 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL5 = 32'hE00031D4;
-parameter val_usb1__ENDPTCTRL5 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL5 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL6 = 32'hE00031D8;
-parameter val_usb1__ENDPTCTRL6 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL6 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL7 = 32'hE00031DC;
-parameter val_usb1__ENDPTCTRL7 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL7 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL8 = 32'hE00031E0;
-parameter val_usb1__ENDPTCTRL8 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL8 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL9 = 32'hE00031E4;
-parameter val_usb1__ENDPTCTRL9 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL9 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL10 = 32'hE00031E8;
-parameter val_usb1__ENDPTCTRL10 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL10 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL11 = 32'hE00031EC;
-parameter val_usb1__ENDPTCTRL11 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL11 = 32'h00FFFFFF;
-
-parameter usb1__ENDPTCTRL12 = 32'hE00031F0;
-parameter val_usb1__ENDPTCTRL12 = 32'h00000000;
-parameter mask_usb1__ENDPTCTRL12 = 32'h00FFFFFF;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_unused_ports.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_unused_ports.v
deleted file mode 100755
index 770ceb4..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_8_unused_ports.v
+++ /dev/null
@@ -1,433 +0,0 @@
-/*****************************************************************************
- * File : processing_system7_vip_v1_0_8_unused_ports.v
- *
- * Date : 2012-11
- *
- * Description : Semantic checks for unused ports.
- *
- *****************************************************************************/
-
-/* CAN */
-assign CAN0_PHY_TX = 0;
-assign CAN1_PHY_TX = 0;
-always @(CAN0_PHY_RX or CAN1_PHY_RX)
-begin
- if(CAN0_PHY_RX | CAN1_PHY_RX)
- $display("[%0d] : %0s : CAN Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* ETHERNET */
-/* ------------------------------------------- */
-
-assign ENET0_GMII_TX_EN = 0;
-assign ENET0_GMII_TX_ER = 0;
-assign ENET0_MDIO_MDC = 0;
-assign ENET0_MDIO_O = 0; /// confirm
-assign ENET0_MDIO_T = 0;
-assign ENET0_PTP_DELAY_REQ_RX = 0;
-assign ENET0_PTP_DELAY_REQ_TX = 0;
-assign ENET0_PTP_PDELAY_REQ_RX = 0;
-assign ENET0_PTP_PDELAY_REQ_TX = 0;
-assign ENET0_PTP_PDELAY_RESP_RX = 0;
-assign ENET0_PTP_PDELAY_RESP_TX = 0;
-assign ENET0_PTP_SYNC_FRAME_RX = 0;
-assign ENET0_PTP_SYNC_FRAME_TX = 0;
-assign ENET0_SOF_RX = 0;
-assign ENET0_SOF_TX = 0;
-assign ENET0_GMII_TXD = 0;
-always@(ENET0_GMII_COL or ENET0_GMII_CRS or ENET0_EXT_INTIN or
- ENET0_GMII_RX_CLK or ENET0_GMII_RX_DV or ENET0_GMII_RX_ER or
- ENET0_GMII_TX_CLK or ENET0_MDIO_I or ENET0_GMII_RXD)
-begin
- if(ENET0_GMII_COL | ENET0_GMII_CRS | ENET0_EXT_INTIN |
- ENET0_GMII_RX_CLK | ENET0_GMII_RX_DV | ENET0_GMII_RX_ER |
- ENET0_GMII_TX_CLK | ENET0_MDIO_I )
- $display("[%0d] : %0s : ETHERNET Interface is not supported.",$time, DISP_ERR);
-end
-
-assign ENET1_GMII_TX_EN = 0;
-assign ENET1_GMII_TX_ER = 0;
-assign ENET1_MDIO_MDC = 0;
-assign ENET1_MDIO_O = 0;/// confirm
-assign ENET1_MDIO_T = 0;
-assign ENET1_PTP_DELAY_REQ_RX = 0;
-assign ENET1_PTP_DELAY_REQ_TX = 0;
-assign ENET1_PTP_PDELAY_REQ_RX = 0;
-assign ENET1_PTP_PDELAY_REQ_TX = 0;
-assign ENET1_PTP_PDELAY_RESP_RX = 0;
-assign ENET1_PTP_PDELAY_RESP_TX = 0;
-assign ENET1_PTP_SYNC_FRAME_RX = 0;
-assign ENET1_PTP_SYNC_FRAME_TX = 0;
-assign ENET1_SOF_RX = 0;
-assign ENET1_SOF_TX = 0;
-assign ENET1_GMII_TXD = 0;
-always@(ENET1_GMII_COL or ENET1_GMII_CRS or ENET1_EXT_INTIN or
- ENET1_GMII_RX_CLK or ENET1_GMII_RX_DV or ENET1_GMII_RX_ER or
- ENET1_GMII_TX_CLK or ENET1_MDIO_I or ENET1_GMII_RXD)
-begin
- if(ENET1_GMII_COL | ENET1_GMII_CRS | ENET1_EXT_INTIN |
- ENET1_GMII_RX_CLK | ENET1_GMII_RX_DV | ENET1_GMII_RX_ER |
- ENET1_GMII_TX_CLK | ENET1_MDIO_I )
- $display("[%0d] : %0s : ETHERNET Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* GPIO */
-/* ------------------------------------------- */
-
-assign GPIO_O = 0;
-assign GPIO_T = 0;
-always@(GPIO_I)
-begin
-// if(GPIO_I !== 0)
-// $display("[%0d] : %0s : GPIO Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* I2C */
-/* ------------------------------------------- */
-
-assign I2C0_SDA_O = 0;
-assign I2C0_SDA_T = 0;
-assign I2C0_SCL_O = 0;
-assign I2C0_SCL_T = 0;
-assign I2C1_SDA_O = 0;
-assign I2C1_SDA_T = 0;
-assign I2C1_SCL_O = 0;
-assign I2C1_SCL_T = 0;
-always@(I2C0_SDA_I or I2C0_SCL_I or I2C1_SDA_I or I2C1_SCL_I )
-begin
- if(I2C0_SDA_I | I2C0_SCL_I | I2C1_SDA_I | I2C1_SCL_I)
- $display("[%0d] : %0s : I2C Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* JTAG */
-/* ------------------------------------------- */
-
-assign PJTAG_TD_T = 0;
-assign PJTAG_TD_O = 0;
-always@(PJTAG_TCK or PJTAG_TMS or PJTAG_TD_I)
-begin
- if(PJTAG_TCK | PJTAG_TMS | PJTAG_TD_I)
- $display("[%0d] : %0s : JTAG Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* SDIO */
-/* ------------------------------------------- */
-
-assign SDIO0_CLK = 0;
-assign SDIO0_CMD_O = 0;
-assign SDIO0_CMD_T = 0;
-assign SDIO0_DATA_O = 0;
-assign SDIO0_DATA_T = 0;
-assign SDIO0_LED = 0;
-assign SDIO0_BUSPOW = 0;
-assign SDIO0_BUSVOLT = 0;
-always@(SDIO0_CLK_FB or SDIO0_CMD_I or SDIO0_DATA_I or SDIO0_CDN or SDIO0_WP )
-begin
- if(SDIO0_CLK_FB | SDIO0_CMD_I | SDIO0_CDN | SDIO0_WP )
- $display("[%0d] : %0s : SDIO Interface is not supported.",$time, DISP_ERR);
-end
-
-assign SDIO1_CLK = 0;
-assign SDIO1_CMD_O = 0;
-assign SDIO1_CMD_T = 0;
-assign SDIO1_DATA_O = 0;
-assign SDIO1_DATA_T = 0;
-assign SDIO1_LED = 0;
-assign SDIO1_BUSPOW = 0;
-assign SDIO1_BUSVOLT = 0;
-always@(SDIO1_CLK_FB or SDIO1_CMD_I or SDIO1_DATA_I or SDIO1_CDN or SDIO1_WP )
-begin
- if(SDIO1_CLK_FB | SDIO1_CMD_I | SDIO1_CDN | SDIO1_WP )
- $display("[%0d] : %0s : SDIO Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* SPI */
-/* ------------------------------------------- */
-
-assign SPI0_SCLK_O = 0;
-assign SPI0_SCLK_T = 0;
-assign SPI0_MOSI_O = 0;
-assign SPI0_MOSI_T = 0;
-assign SPI0_MISO_O = 0;
-assign SPI0_MISO_T = 0;
-assign SPI0_SS_O = 0; /// confirm
-assign SPI0_SS1_O = 0;/// confirm
-assign SPI0_SS2_O = 0;/// confirm
-assign SPI0_SS_T = 0;
-always@(SPI0_SCLK_I or SPI0_MOSI_I or SPI0_MISO_I or SPI0_SS_I)
-begin
- if(SPI0_SCLK_I | SPI0_MOSI_I | SPI0_MISO_I | SPI0_SS_I)
- $display("[%0d] : %0s : SPI Interface is not supported.",$time, DISP_ERR);
-end
-
-assign SPI1_SCLK_O = 0;
-assign SPI1_SCLK_T = 0;
-assign SPI1_MOSI_O = 0;
-assign SPI1_MOSI_T = 0;
-assign SPI1_MISO_O = 0;
-assign SPI1_MISO_T = 0;
-assign SPI1_SS_O = 0;
-assign SPI1_SS1_O = 0;
-assign SPI1_SS2_O = 0;
-assign SPI1_SS_T = 0;
-always@(SPI1_SCLK_I or SPI1_MOSI_I or SPI1_MISO_I or SPI1_SS_I)
-begin
- if(SPI1_SCLK_I | SPI1_MOSI_I | SPI1_MISO_I | SPI1_SS_I)
- $display("[%0d] : %0s : SPI Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* UART */
-/* ------------------------------------------- */
-/// confirm
-assign UART0_DTRN = 0;
-assign UART0_RTSN = 0;
-assign UART0_TX = 0;
-always@(UART0_CTSN or UART0_DCDN or UART0_DSRN or UART0_RIN or UART0_RX)
-begin
- if(UART0_CTSN | UART0_DCDN | UART0_DSRN | UART0_RIN | UART0_RX)
- $display("[%0d] : %0s : UART Interface is not supported.",$time, DISP_ERR);
-end
-
-assign UART1_DTRN = 0;
-assign UART1_RTSN = 0;
-assign UART1_TX = 0;
-always@(UART1_CTSN or UART1_DCDN or UART1_DSRN or UART1_RIN or UART1_RX)
-begin
- if(UART1_CTSN | UART1_DCDN | UART1_DSRN | UART1_RIN | UART1_RX)
- $display("[%0d] : %0s : UART Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* TTC */
-/* ------------------------------------------- */
-
-assign TTC0_WAVE0_OUT = 0;
-assign TTC0_WAVE1_OUT = 0;
-assign TTC0_WAVE2_OUT = 0;
-always@(TTC0_CLK0_IN or TTC0_CLK1_IN or TTC0_CLK2_IN)
-begin
- if(TTC0_CLK0_IN | TTC0_CLK1_IN | TTC0_CLK2_IN)
- $display("[%0d] : %0s : TTC Interface is not supported.",$time, DISP_ERR);
-end
-
-assign TTC1_WAVE0_OUT = 0;
-assign TTC1_WAVE1_OUT = 0;
-assign TTC1_WAVE2_OUT = 0;
-always@(TTC1_CLK0_IN or TTC1_CLK1_IN or TTC1_CLK2_IN)
-begin
- if(TTC1_CLK0_IN | TTC1_CLK1_IN | TTC1_CLK2_IN)
- $display("[%0d] : %0s : TTC Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* WDT */
-/* ------------------------------------------- */
-
-assign WDT_RST_OUT = 0;
-always@(WDT_CLK_IN)
-begin
- if(WDT_CLK_IN)
- $display("[%0d] : %0s : WDT Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* TRACE */
-/* ------------------------------------------- */
-
-assign TRACE_CTL = 0;
-assign TRACE_DATA = 0;
-always@(TRACE_CLK)
-begin
- if(TRACE_CLK)
- $display("[%0d] : %0s : TRACE Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* USB */
-/* ------------------------------------------- */
-assign USB0_PORT_INDCTL = 0;
-assign USB0_VBUS_PWRSELECT = 0;
-always@(USB0_VBUS_PWRFAULT)
-begin
- if(USB0_VBUS_PWRFAULT)
- $display("[%0d] : %0s : USB Interface is not supported.",$time, DISP_ERR);
-end
-
-assign USB1_PORT_INDCTL = 0;
-assign USB1_VBUS_PWRSELECT = 0;
-always@(USB1_VBUS_PWRFAULT)
-begin
- if(USB1_VBUS_PWRFAULT)
- $display("[%0d] : %0s : USB Interface is not supported.",$time, DISP_ERR);
-end
-
-always@(SRAM_INTIN)
-begin
- if(SRAM_INTIN)
- $display("[%0d] : %0s : SRAM_INTIN is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* DMA */
-/* ------------------------------------------- */
-
-assign DMA0_DATYPE = 0;
-assign DMA0_DAVALID = 0;
-assign DMA0_DRREADY = 0;
-assign DMA0_RSTN = 0;
-always@(DMA0_ACLK or DMA0_DAREADY or DMA0_DRLAST or DMA0_DRVALID or DMA0_DRTYPE)
-begin
- if(DMA0_ACLK | DMA0_DAREADY | DMA0_DRLAST | DMA0_DRVALID | DMA0_DRTYPE)
- $display("[%0d] : %0s : DMA Interface is not supported.",$time, DISP_ERR);
-end
-
-assign DMA1_DATYPE = 0;
-assign DMA1_DAVALID = 0;
-assign DMA1_DRREADY = 0;
-assign DMA1_RSTN = 0;
-always@(DMA1_ACLK or DMA1_DAREADY or DMA1_DRLAST or DMA1_DRVALID or DMA1_DRTYPE)
-begin
- if(DMA1_ACLK | DMA1_DAREADY | DMA1_DRLAST | DMA1_DRVALID | DMA1_DRTYPE)
- $display("[%0d] : %0s : DMA Interface is not supported.",$time, DISP_ERR);
-end
-
-assign DMA2_DATYPE = 0;
-assign DMA2_DAVALID = 0;
-assign DMA2_DRREADY = 0;
-assign DMA2_RSTN = 0;
-always@(DMA2_ACLK or DMA2_DAREADY or DMA2_DRLAST or DMA2_DRVALID or DMA2_DRTYPE)
-begin
- if(DMA2_ACLK | DMA2_DAREADY | DMA2_DRLAST | DMA2_DRVALID | DMA2_DRTYPE)
- $display("[%0d] : %0s : DMA Interface is not supported.",$time, DISP_ERR);
-end
-
-assign DMA3_DATYPE = 0;
-assign DMA3_DAVALID = 0;
-assign DMA3_DRREADY = 0;
-assign DMA3_RSTN = 0;
-always@(DMA3_ACLK or DMA3_DAREADY or DMA3_DRLAST or DMA3_DRVALID or DMA3_DRTYPE)
-begin
- if(DMA3_ACLK | DMA3_DAREADY | DMA3_DRLAST | DMA3_DRVALID | DMA3_DRTYPE)
- $display("[%0d] : %0s : DMA Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* FTM */
-/* ------------------------------------------- */
-
-assign FTMT_F2P_TRIGACK = 0;
-assign FTMT_P2F_TRIG = 0;
-assign FTMT_P2F_DEBUG = 0;
-always@(FTMD_TRACEIN_DATA or FTMD_TRACEIN_VALID or FTMD_TRACEIN_CLK or
- FTMD_TRACEIN_ATID or FTMT_F2P_TRIG or FTMT_F2P_DEBUG or FTMT_P2F_TRIGACK)
-begin
- if(FTMD_TRACEIN_DATA | FTMD_TRACEIN_VALID | FTMD_TRACEIN_CLK | FTMD_TRACEIN_ATID | FTMT_F2P_TRIG | FTMT_F2P_DEBUG | FTMT_P2F_TRIGACK)
- $display("[%0d] : %0s : FTM Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* EVENT */
-/* ------------------------------------------- */
-
-assign EVENT_EVENTO = 0;
-assign EVENT_STANDBYWFE = 0;
-assign EVENT_STANDBYWFI = 0;
-always@(EVENT_EVENTI)
-begin
- if(EVENT_EVENTI)
- $display("[%0d] : %0s : EVENT Interface is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* MIO */
-/* ------------------------------------------- */
-
-always@(MIO)
-begin
-// if(MIO !== 0)
-// $display("[%0d] : %0s : MIO is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* FCLK_TRIG */
-/* ------------------------------------------- */
-
-always@(FCLK_CLKTRIG3_N or FCLK_CLKTRIG2_N or FCLK_CLKTRIG1_N or FCLK_CLKTRIG0_N )
-begin
- if(FCLK_CLKTRIG3_N | FCLK_CLKTRIG2_N | FCLK_CLKTRIG1_N | FCLK_CLKTRIG0_N )
- $display("[%0d] : %0s : FCLK_TRIG is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* MISC */
-/* ------------------------------------------- */
-
-always@(FPGA_IDLE_N)
-begin
- if(FPGA_IDLE_N)
- $display("[%0d] : %0s : FPGA_IDLE_N is not supported.",$time, DISP_ERR);
-end
-
-always@(DDR_ARB)
-begin
-// if(DDR_ARB !== 0)
-// $display("[%0d] : %0s : DDR_ARB is not supported.",$time, DISP_ERR);
-end
-
-always@(Core0_nFIQ or Core0_nIRQ or Core1_nFIQ or Core1_nIRQ )
-begin
- if(Core0_nFIQ | Core0_nIRQ | Core1_nFIQ | Core1_nIRQ)
- $display("[%0d] : %0s : CORE FIQ,IRQ is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* DDR */
-/* ------------------------------------------- */
-
-assign DDR_WEB = 0;
-always@(DDR_Clk or DDR_CS_n)
-begin
-if(!DDR_CS_n)
- $display("[%0d] : %0s : EXTERNAL DDR is not supported.",$time, DISP_ERR);
-end
-
-/* ------------------------------------------- */
-/* IRQ_P2F */
-/* ------------------------------------------- */
-
-assign IRQ_P2F_DMAC_ABORT = 0;
-assign IRQ_P2F_DMAC0 = 0;
-assign IRQ_P2F_DMAC1 = 0;
-assign IRQ_P2F_DMAC2 = 0;
-assign IRQ_P2F_DMAC3 = 0;
-assign IRQ_P2F_DMAC4 = 0;
-assign IRQ_P2F_DMAC5 = 0;
-assign IRQ_P2F_DMAC6 = 0;
-assign IRQ_P2F_DMAC7 = 0;
-assign IRQ_P2F_SMC = 0;
-assign IRQ_P2F_QSPI = 0;
-assign IRQ_P2F_CTI = 0;
-assign IRQ_P2F_GPIO = 0;
-assign IRQ_P2F_USB0 = 0;
-assign IRQ_P2F_ENET0 = 0;
-assign IRQ_P2F_ENET_WAKE0 = 0;
-assign IRQ_P2F_SDIO0 = 0;
-assign IRQ_P2F_I2C0 = 0;
-assign IRQ_P2F_SPI0 = 0;
-assign IRQ_P2F_UART0 = 0;
-assign IRQ_P2F_CAN0 = 0;
-assign IRQ_P2F_USB1 = 0;
-assign IRQ_P2F_ENET1 = 0;
-assign IRQ_P2F_ENET_WAKE1 = 0;
-assign IRQ_P2F_SDIO1 = 0;
-assign IRQ_P2F_I2C1 = 0;
-assign IRQ_P2F_SPI1 = 0;
-assign IRQ_P2F_UART1 = 0;
-assign IRQ_P2F_CAN1 = 0;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v
deleted file mode 100755
index 90a0bf5..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v
+++ /dev/null
@@ -1,31 +0,0 @@
-//------------------------------------------------------------------------
-//--
-//-- Filename : xlconstant.v
-//--
-//-- Date : 06/05/12
-//--
-//-- Description : VERILOG description of a constant block. This
-//-- block does not use a core.
-//--
-//------------------------------------------------------------------------
-
-
-//------------------------------------------------------------------------
-//--
-//-- Module : xlconstant
-//--
-//-- Architecture : behavior
-//--
-//-- Description : Top level VERILOG description of constant block
-//--
-//------------------------------------------------------------------------
-`timescale 1ps/1ps
-module xlconstant_v1_1_6_xlconstant (dout);
- parameter CONST_VAL = 1;
- parameter CONST_WIDTH = 1;
- output [CONST_WIDTH-1:0] dout;
-
- assign dout = CONST_VAL;
-endmodule
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_19_vio_include.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_19_vio_include.v
deleted file mode 100755
index 9b2ac76..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_19_vio_include.v
+++ /dev/null
@@ -1,292 +0,0 @@
-`pragma protect begin_protected
-`pragma protect version = 1
-`pragma protect encrypt_agent = "XILINX"
-`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2019.1"
-`pragma protect key_keyowner = "Cadence Design Systems.", key_keyname = "cds_rsa_key", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
-`pragma protect key_block
-SO4fMC/C1Qg/oTcwIVxt35RzVTsCGyUbsJ6dfm9gJCMThGHs8aS1qMkWYkxDLH9g/L8W04YP/UF5
-hUEBDwnMWQ==
-
-`pragma protect key_keyowner = "Synopsys", key_keyname = "SNPS-VCS-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-iRE1Y5V5A1N/MEEjSVagNwSenRLEVkLhehQ2R2W2KlsJPZj16HyOVMgF1k1QOCEY7s2N8rfetuXO
-7DIRY02mNVjbYZAdovnVpqqe4meFgY5Ik4gNPI7fm+RIfyerFTRXcxn4KCI0BYgyNxkEcsOvpyA0
-vrI4r+MC+eI2DfesoN4=
-
-`pragma protect key_keyowner = "Aldec", key_keyname = "ALDEC15_001", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-HlPcnstrtSQYSweq+xatNw8CQuYcpRpRwgI7lD+EmEFhZlxALRP5/hAOJ28DPtypH2swd5gMYVAC
-0Aj3jYS1lMjAFXdhIA9zJIofpYHHeezGOttXKZyTHnbkEbdaOYoY+8ReGfqUBxRWG8sUoN/mlzY4
-I6exTwqHLDVslBMQexFijEGvCwUzVvGyOY77CXzMXzFcoBRf8f1Edo5eu+eVutjCbriwGEiBJEMu
-q15G3lAzcEoL1HQ+hvbQ6CUBE/ltBd3GzV80vyTYCDvb/Ioa8aNXIJPqhA00qZbg7VD8F/L7BIUb
-Jb7xsK2pBcMGfN+4lbHzXFyBVm2z1kh+QpvIgQ==
-
-`pragma protect key_keyowner = "ATRENTA", key_keyname = "ATR-SG-2015-RSA-3", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-ooo3GbXTn9waWUM3FjpigSLjrQfV0e8sdd+OASZPwnPMH6CAix7MwX4ZrVAMyoiatgbYTZA6LRH4
-Pv6etF8EXRrls75Js2bpxCwNXLwrJ0hmQAdQZeKTelOVh5W4Ag8hW6fKCgfsx/nLnul6nafmwPNw
-aQjbNdQhguCZdKh2AxRs76GgzcdY4HXtp/eqQSISl2Dzm0c58L6arFZ1WdRlvHiUeQw2x3SbYfar
-LVUoZ4GBfCUiDlzepraOxOGxC5O58KRADUnrUPu3WO4HGsKeRU80eJZjYdGITmfZ7HLXiGSzzM5H
-QTGeP/ngKA4jm4e6Za/uxsAjqatuNGAk7HIn1w==
-
-`pragma protect key_keyowner = "Xilinx", key_keyname = "xilinxt_2019_02", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-RipEUYdWynJlPi/oEMMTMRhnxmTh99Up6/ivNrpJHZQ21nNe6QNIwIYW5yQGVAg05YMRjayAjPSv
-UBC0EDqqgeIjAqOoCRDRSMrdxLfkEqk+RXCP2ZXZfL5rY5ycsWga9QWLQ9wouth/9ZCfXnd82+gf
-cy4xhcFEyaWsJrodk1m0vmlAn9qSvt2a22kK1xmW0IJrfyyt3bWU9hOVXV5d/9BRCWsEvUO2BNkw
-+24y70nmWkObXMQbSxStks6EFyo7phapxp75fq3/am7vzKpsy+I6rQ9vwQBMor3XL2/bb72lPXcF
-DmPZy9mldAwzgEsJkXP6x62Js5PedplvIVrEAA==
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VELOCE-RSA", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-oH7zg68zx6vvDV5c4NmsrgMCMsGKVoADfx90D5/FK0IPC0gN6ZUBW3gPZcLM1FrQ2qUgNwXRj4Kk
-GX+nYdf8S6kBb0v9CgNSYUCI2CaefrOSZr9z6W2Rq3Nscod5V1UkP0YWILI/0JCB/N1EB18ZdJjo
-y3cZlJHsNQwvqmj2t2A=
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VERIF-SIM-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-fRnx/Gfk5y9bbSoxjImVtU8g37Z3WR2DWSmGTY9Yli+nRhTC1pCWK6DVblFBajxUVCn06DalORag
-9ucIhnXbRgXeNAXfooq1Zf21OpXOC4DbVZ5pZPMoQN3VFLZA6SqPBZQDUheLYa7shOdUM8oiQgPS
-NpqRvvOp7iYEO+4wcqTMqcoFQiwmtSscPRKT1CTDejO9+qT1/PHtho0I4VcbEcaaBvF4clrDRTIN
-AyqIVZVhcghh/FemxXwkeC/Dh8BpTj3EyaRw9k0vxqoWqRbCc3WbJhWPgPBzb+4b+L0tbPckDVQl
-qMEvu2R2Crpk6LxDV4u2gAm/a9ZI3Vs4h58FWg==
-
-`pragma protect key_keyowner = "Real Intent", key_keyname = "RI-RSA-KEY-1", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-ViKdLpT6HaWgQerPZnDVMdmLAN7EUSRClCzZPu09vLeogWsDiLzGw0zLFDd9gbjlhZRed8eoXIs8
-tLVOPfg+RKq1dQcb9bmgIIxemRYXrAB7QC2OGxSvp0oySA3gpYDqOmuhtvaz8j1nnbY8qyVyVLmE
-95CiYi9yF/YPEIipA6ZOBqJOStOLnqyUMYlMpbqrNlVlL8tAIZfwv1KOwDqt26NBoC13In7lXGsx
-8JvY0yVVRPTBQw/i5Oxznsv1sjKvA3x3//0/K5IAO8jCM+ct9pJuc9h7aVtoi+yXOyPKHzgsVXZ4
-k8mBg4PpvQ9CbqJNwTU00ivPj/PxhSGBc4nG2A==
-
-`pragma protect data_method = "AES128-CBC"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 12464)
-`pragma protect data_block
-f2L71xJuPU0aSAojHhjdqqZArp7GFYwwcR7WDgkKJskFwk7qbHX3PH9HL8j6g+GaiC8FnZSjvPOf
-cyMftKVIBmiyfX0gpzvzO3Xl/7LagENaU4WVkQdXMiiOSdT4ypNkHP6fMHW9IIrzT2cfNOnoyti9
-mdv8heOFTfjrgqw6VUzFAR4oyt+5to6jZLqTaeowyJefBlFbKth9Q4fNMhoYAlEUdsqowiG2AZJu
-Gf5vtEr4Ya9CQEw5Bix5b3NEEwjlTtSAOvYn7v93f6rC7TvjqKLQPicfvTWu7A4p+NNjwsUD+ZOq
-XUNFOBKcYs4CP7dtuXswnXp8uyrx71lESieKTC8ptdfRC00PjTvy41cHiSTUzDHDtxrYupoDNIHG
-3gYz9YjT4nczuy2wFlkg65U43E/jdkGm5wLbfT/obKnlxylz4/9xeo9ihWBqq+oF04BH0NUDmIEa
-2cEbK76xezGZlhrQdWPLNlJdEGIJk8ZDProQfwqgq1xhtbswQe+Pa5cPGxcOod8DpMd11F+NED9j
-Hc6OUrzVsYBe+8bmUjxnW3UM9pqZEvtI6JfljyZntT9wa+2DyX4RbH3BTbYOmQdlNq2JriVdx7XD
-+EFkP3PWPPKkYYzcRmSbY0sGkdWQp8UYw49Gs3VWcPg4E+zIiuIJQRmQL02HJsBWZyI9+sxn9hFG
-M+bMQPaQ+e3bjZ+aWshFcYRJxwwC9mv4YCijgFky07MG58e4uiB3z2Dsfa7khBeyZq5Vm0oorBJZ
-cfC8GRu7bXzAqlgSA9MAlNXWF6upqu2BtEsgIscG1F3av7zTFuUIlHEPUGL8JQ80i62V8mg5F8/t
-jeBYKRwOFXarppwSD9luYc0AyPdUuliFBcYEMwjpSyrXbLXjidlbera/GT3P7Mxki3U+dyzGLUqv
-U+A/ZZ6U3onmJzga/zhzi20qC4ojchINTg+unNJChegaw6X9QfNnJXUMhnkPdswX0ljn8+Jt0EoL
-/7q5WhmR9h0IUe8fwMnb9XOAbglv4drtTYJAGBoFBF/KXLsYA5Ds3B7iDfrRtztdbM85UfEagUI6
-YvLBzkzC0Mi0bQ7YZFYVD1jW7RR7Z8Y6hx5csw86yR32RomayTVFhqfx3A5Ocs6AqlXzwKwh8R44
-5/E4yuCLbntf+gmp8dM7SmR7lEJnfBWZWHOBPccss8dy1hDGAUOfMPGQ5+t6hPsrGPC5nnrPzi8r
-1x0deJmzx8YgtqVYHKprF/EESLRwnMCEZ52aQBEZZqcxD6utgi7D/8l3Sb8R2d6XJj/Li/EdRncz
-9G+Y0nWCxc1J1DsnMBvtS7A9WcEDkkJN74E2thcaopwKcxAOOS+tvNWEDcYK6aPN1t5bam40E+9k
-7iNP9w3CDP9Lxc4Zv/+rlv4IsS/NG/EBWTVgAfTlKK0eEPD592EXFt8lLtnLzZ2rxFNr47/D9yp4
-CrKXUH812+jvFTUj2xf3n2J+s7RBWjYwoPP48jygu1n6pZVnxSXc0ahPefEXnAUlzWsPWcwbNvpz
-YtqIFQgTwhiPUhPirq0rdi63JpIH7yczTCdy45uv8y6CoPkzkx+cTtmkVHnW28JdaWxyzAcBz916
-j7fkQnzMnEG9x2p0oEFqM5ZwKd+EWe6n4WbnkTx85rYGujnm2wl3u/Z4Q+LLHAXVT7fBRY959N/a
-35Iz4zWvvXJnc9lDgLQxSTzH5oDddHokxiINAsPEIFsb8ZJAWQsdoqSoNEMx2cvUkUrMXDr++YHi
-HruI/g5XjsnpztzgsYyVyrd+EUdf1urktaIm5QPLN0BM4jMMI3VzKDIc0gVSvUe+NyraNXQ9SEnS
-qSF8qXb3YJt9Vrg+pWpf7Ec/tDsjMPn/4kPL9LIWUFzIm953KhTxNzvyq6KpB4k4NET4uaZ1aH0b
-gtaYgQNOEFYW2VFBBjQN755k636IZeK/C5O3cPsUDk3pNMySQlNdg59aPIg8P+4J3KFb0tc6+GXz
-aeo4jepXyFmMKzxl2iAEXwnt4V2bnMvGlEqmGGgoaioY8BnOQE2yhSc+UCyM849+ZY8P4nxO+RG/
-JcgoGOmYUNxuak7v+9xR8g6/iA1SUK0qNlxqkOC0IrT1RSKwsoElOWYDcY+PJJ0cUhN9SoEebO+a
-UGRycg9NL68ljZxTq3lgVCgjeJSckovnSJRdyTru3GGDmMCaxxi2nb2kF0sKV+5/8Pj0LySpnzAr
-+Jr8CMyJTJaHlSrOacHHFi13nNvcct46c6o/lmY0VFHpoMmkeJbXBTOihMiP0A8hKYhLGzB9Yvhk
-icYCdxSSiNdFE9xwZNO+Jg85U2ECA+/Z+zMa0WUwXHO0ivacEJQSzjpIBs8BRxa6twzfh1HRpZrG
-2h/8clkHlCiKbaRAOa/mvEavT1lM0kWrMNuoiY9vWGA571vIuV61SaUFRckVi0cA4dxLUeiasIoh
-30FTSYCj0D4cOWQmz0/A+H0qcnEqsJNk9Ba2UdYnAuoLqbpu3z63Az0fGQGD5OUjZTxdOTVMmJAt
-f+PKoKWGNxCqb5nV82WryuRtSP9206erWsNruUQNhAEeLWYNeREkCkHEc1eaJ45EuPkkRBNm/yZQ
-ZLyWnVA+x9gSjBthr1wzWcg76BSg4ZjxYju9JJ1AUpoyfMcMMKuzRcSmKp12wqi3x23GEkGv0j13
-V0Av5gIczcu/jQi51KUPfe5rH6G8BcK80d0wAxW+SpyDES/PSeWeNuL99GuVmvV1AkJN2f4FWjOQ
-HhcseyG3Sdo692q2iwUhSIrLtAfDvczb/o5if6kc0HtMsH2ORF5EzdpAAXcmgXsZpXqBDCCefsZg
-u9P+aWC+uGkHRfh+3obsuMCwsBQ2yQVeXcTXUJQbpDnWY2u2l8maPnwo9KPu7lxGlh9+tDad5cCu
-yDUqLNf3xbIj8kkJrgmsTSaD01srj+XZzyrQgbum+0Oc9X0d1wi8VFiAj7u6cLlqZpXkwTlOgW10
-TG+fjg1YqICUuvjr2O20nACP+XD3feymQXLsMjdLT5l+yKHf3sshPXxVWvzXY6Bf4nSSWXoty0I+
-vQY1oimaa8I4Nj3nTm4keP55AOAY5xo/5Cb807fxl2kwvNEKnOLiPBwnZZ+MFQgD3zjRT+PgX5HM
-goldjG3JSYgF1K1fzbNhpAoU4yLccnsqsYDCdQYbP2QHDHmOhe3VSPLsve29MYB/hB3G/3ZCJLnI
-a9PDrqraKZmdeSK/79oT/mq3SBtO0ut+XjSVOQ2IElakcTXLt6RPVnuTxlAudV69aQtmIUp32FYO
-0UIsRmilLQJ2Vh1dHjVMh08PF4rYhTTXFJ+ZytzFOajpFTQYoj6vrZoOLqV9YiYIMfdG+Jj6BPVI
-5joYcP4xmqMLckAdajdtkNYx/kgUjau2zPVhO9lDQGOfSKlN6hliRf1QFAOQdAdL/DP40nyuyLCs
-L1fxges7uI29sIfRxARnxx7NUJpwyJREdgBFMwHNU1SXvPC9mPSgXr0SdzjnhdXZBn7euJxBkSAL
-VNXd+ukKRsChgfYb4WkBs0d+Ck5ZKuJmcyjyMMYX3kfjllUW/bnCqvh6xrnHmrpn+KR4AagYLDLQ
-4a3nzzie9EXIFbk57PXLscg0rmB/hkkwe7bN2s2CNcK0VwCIjzP1bqNQ7sLqxRLjgPjUKnidg6Dl
-VrUdKh3t7l9Bcq5hjCjGT6rLpg4GpVm65Dk1llUQmzcixd4969a2nfJ1QNpusRGRLg23d1bQ4QCI
-QyDYXsLBry86ZYXPCu4nJyEMj+gsnHPeibT5KuUXckdBuOretJz/LC9584bjIrROmSEx8sV7eJhR
-y8eugb7FF3O9ao42qKl3lJDgGfnjZFyzdEcCjdAo4z4sSW+eYFgwg/wWo9IqKug8TV+vmN77G6Yc
-J4aQ3qrE3y5NfA8As2bFk06Ab8pczB+T2c1fdvd0uOdOku7vTFYKiuchiTkyRXimz66/IQSi/pHM
-HNM99z2B+iZhP4ygNdZv6GHWo2bLZbGqgVCZY6+8q4z3UimXAxKlBe/Da4l7H/8jF9C0jATGVzz7
-xcGkVKa8udVOetRb+qFqdYO9QAXr/ZNgFhd4bgyC4IBf6GcPd1JqrSlC+eKR9gzEfXUAn05q7Mu3
-fZ+mPSQ08igpQbChFCfKXkiKc3nTDxm/AclrkSgjnNTx4wBY9fSiJ1aGaQfPNv7fj6XEgLRTfHIQ
-a9GVHtZpTfpQrenS25FMVmaJTVyT+ppR1JOsYOTxAOiIkOU6dAR00rhJd9tBhULEnQC6yX0kDz3e
-fyaNgDOrhed9l8xyKxHSW1sxYR+HfwBdI87relcwVj2rRJLhBlTZrffZdfHDaf68iTw21ndET7Pe
-BmDgdRtOtHscOi3uKHVlz7T67tHSuLw+73JdgzYFwUZC8CuMa8Gzf6YIl0BKhjkxvOZcyUkFOq2I
-t+nYhbvjSymiZDO5ebi3EdVBuZBOH20ltISMoECz/xsUBi1TxmO89EMjbcgLlQTogLMaK6ZDHKkf
-u1XhQOZH791Ft7Sacv4usGE4eirKkLSn7jKYeOI48ClY4vn606VwGycDyMYVIpIAcnPnDtwuAlo7
-43IR/JuRUgyunzQ9aI8lYpMYBbr04E+sIXgv1A5BsVtPyidQ3Yx5dJidBN0jVw1ABbj3QSgfQZ49
-DYAYzByKCg6ocN7E+2+yCQR66xDezb6z2Gn9PID/HgBgZ0es4Sn2IcXi+OhaV2nHv3KMUzkJ3635
-YdQKl0f480De+iOO7bZx/UxlxEfT9juApq8/E/KTxe7SebcvZGM9cyAzKbqFunT+nQgMyKXd13h6
-Mwq/+c9y7mgh/eDDcOnexORB5B08dR6L2w00LxmN+20CveWEMwiDyHanekXcqA0gTuQV7qhOd6bZ
-05Qfmcyuqrdg6g+nadZl8v+nLJOnsLmtC0OtBQvJuhN3QMiAmFlKUsNZ3TcKZi6X67zBNe71hDMY
-vcNOu0BOyOzBkN64iWf6vFYi8x+A4P0tokjKvNcvj/2IKFCkjivAtVDROTdvNqHUICw4/TH/ySKG
-59rlWs5gs8C4YHGf+7tyWzzWtmaiFQttKvc4v8AQ3DsuY5kgvCCoXX5f+88pue5HLxhIk7XNyWY1
-4hKySC6Tjn8Ej3UdIx6r+8qylaX6cBAZcS+3Kv5jKmdDDchTluoHQvGnKHvaVWYWKSWlORMrhDl1
-bdpyYtfB7/zvJAlgULSgnLtJvrG1XFA6/iMd4DMSel1CljAcw+cquB6NPlqJFavROLr0x+guED6L
-Dl4U+IBC1cGqz+I9TaDgW/7JFIk4POuUSA4RQLONTUDnp4iAjBYzxGxfverOx9/bPEEwWvQfp9RS
-5sxlSL4ZJHFvMaOV3yYl1YkrhCSHcRlKCwxX4+eI9aZFhUlTRkBIUycRC0rUKkXc/T1xJ4/B7Pbi
-Vcm4Lo3/RvXeGRks1v+ZVgM59/mOMJT1090yC6y6IPnXXNcqbNSXCe3mPXjU/IBDsisB29v0Rj7V
-N/AKSpsLrdgL7+S6/LSL6RpV+y/ABDDNIU3vlr+WT3SeG4lY5zAFWLEd2E6OTtkvy6YzsbfnJzV6
-Eet6L/CGN+K6L43JW+MUe1YspHKhN+/G0m1G+B7NsdtYlVEceN3r/1i6HgV+QdyqXBwNIT6POCTp
-9GGFXjg+i4URFcmnvZd46qUO+9oE9Fs0NJB1B8KnxA4yQZArPPHvavOphntS0D/jej+yA/8LVWHs
-wbC9pXq9n+ipfg1CACi8JmUtDrWWZqKRu6LXN/BzmQ/OSQyqu7+TlcVctry9dWK0dQTLoELP38iR
-v0r+OZe+cybpYgaptB9pqLeHPQYWDslQRaJNPB2v0LPGlUpQEZuQ5TrxioJHurSf27ISKHzGRGK0
-6D1l8W4+jqQmkYPRheA4/ctRZfWse6jLOCL9ztWFc0frC1ErMKLaDBhCfygk92RQ75Yc2AZq5SXL
-2jPRr/wE1lw+lxyipCyMlfM21G4366pYt0cLhJbtFhjzZcleO1RnqhyzwLUkq17UyXWmboi0l9W3
-fdxI2wB6C6q0AaxU+ARq/eZH5InV2obg/+nAh9TZwSCpXENTOkAX9mMp+mGBi3hJeQ25hpRELB6k
-jc94ZqMRHR195QE1C4YHJtu+hLmzadqbf8LTdxU/u6XFZhEzprzrO9ERCjt51/0ZejlWTcxWMu0I
-H3VaQGT83cbu1dk5dMc6kg25EpHS6CKN6gGKmZPErtntWjH5Hn+ghX/Nqv4YGtAK745NtH/TT+mk
-bXZ7OT8JNT9VVePcVp2ZxVmz8ayuFGT9HXIJnQx3l30o9Z1U6qWBeSwFJSWLdjrCiB0E4sLqwO/E
-Gyz26mWDK2zcMyoqCMwCD6FTRYLxkRTTn26DPZskj1vGGnVt4sOH21Q3lJI5Hy9k2g/1wpYIAN1A
-JXm/dnqQyqE0XQoT8j3/PxyOTfwiyHGo+FxOk8d+7Q41Evbo5h/NAD2NpIBZ8Wtbye4NUu/xYQSx
-tCqatx9VazwAlF7kIgE+D9QJYN2SZSQvVRJriBcGP9hIRKezk2jl4zxTXce6V5c39OgT2zVjy2fr
-QpdpjiXV7jmptcPGyJXmP/700CXnd+MSzdlEq2dUtx6gVMTNQmIvxIMvRWjt9X9L+Vj1tlANDbzi
-D/GJAOxxsjI97ITRtM4CEbUM3j3uKOS2yoNM3KoKhXxgBuCaFAoJYQCk4wSu1LpS0N66ZqzLnV1r
-Dp2CijcJ2P4pK79cvjX7uKWhjuHJ+h4ODWyo22RMqvWq5wIknTlybZXWWhMaBC9jTAKtWUXk+xla
-NS2GQ8HEC3MgIGDoe7IB9elyC8Wsmf8Vavm5DzHh+xupvypRoDrHKq4Pb3Hw281tC2BUfOfyz48y
-oxEiDDeCMumRYV1A3SnkRVh4n9NgfdlMvntu8VQca4A5z1XDLwqbfRqpnWB27h+WrEPBzhVytLCY
-3Ngh+SbkWDx+Wk6PZaELnBkhslmsw6jx25VOjrzwP/0LGa4H3SH/kPJro9oW0edWZ4afwTwtdouq
-erR7eckb0NjGaxP1M88hayEZKcjWF6H47jGHTIJrD2p0WZZIlRMY+DQGDvVuznSGkbmM9ixITgxH
-2ljxIByP9xOwNn/xpj/VifBN0XV9n4anZyoECz63CNH+Hpqwizb1tO6c/sn51Q7Gm+9H10a3Nyot
-+3/5qh52D5gwkGvW9lYTsfHl5JtQ77Gx+7+nOhBdwETOdKb9oP64Fl4iM9wjig0lgC53AfMtyTsy
-TRMAVA4hAxPatCnTKIicuQbqpl1CKDj/zqLxGaNYyNsqbV0k6wJgN7gQRswe3oWfUXKETmh+UFbd
-KrIkG9+cgRy2CB8+wqw2zd8iqw2F4V//pS+koFQo4heeLEPq4bwyDMfFV1qg+8CItFJ6qZWRqVBj
-snyl5Z+7rWLvvIajbW86rbDqnkbWetPDXdwuZbASTTPhHS5shW0/G/pOwJzMXO9Qc1YeqEIKIHlh
-Lht4bHaV4i37XrTAgTbPjrUwPUp7TlvU8OBbIOtoh8/kxx4Yz2vMjKo9aLmwTtz3TGSr3HhsCQp+
-3ls0LoDaJVn3Q+Yd69BnCTWNl9+ivI3bOIwzdmiBBxAc/V1WXrvSrbrQ+TImbsZIICKT6IuNPdoB
-rhj5I/uS+i0p1rqWHISn4bFkiI7VvuLUHUGrBBA5RAOADoKFyv75G2Diz63kbSDE/rJjFTgV4WAE
-pVbGlkcIE0lX/a6vEgaNjh+0vAYjXx3bsBSvI2M3/9uNZodJa/fWYqrWe/Zv8cths5cdRATWlRiX
-O2P0Bncn//Cg1juxrvE6D/yAwXa9JWaKGrLhJLtVWusBudzSSDnwFLzX6bQcRMj6IqRisSyGG+l7
-kXipWaccWsnkJW/w/FCN9dDVzKWt4kvplsSy71+ZDSHasAW4BVNy43oKyJQSMaDcMjwpxqGWbJfa
-Cq9qpXVFJ2kr97M2EgJwyyQcWiXWGf4MBW/0/XSjH1mq4VeUawUEdnTQ24n4XjWupit1eZWOVab5
-tmm+65Z18cXFxb209/X/E5iR5YI87MaOG/lZHew+lF2a9se46KbStOKNs+IRElYD9q9AoTeVB8CO
-KaNxeIrm+y0/FDrqiX5Hjv4b8G9ILKdWxVJDeKSWTc2BnfXzOuzGoBEkNleQHUe2cXzRGxnZUIKS
-qEiYDWZHNr3Xewzzg3M1SP4ca+Cz5g9UQDA0Q0mT7pOlMICaQSWtXLynK/Fr6MpPQvlHLz6M0Gj2
-28TD5xlOro4xquAXOuOGH75V+mhBZVuM8XVS2D0jU0hTSkADS33Wf4wvg/2liaOedkoleNklEk7R
-2sMyApokr0yFSudqEKttWrfhzOMtSmJ0pISJMCGdBKa1YeQBCoxeaF5NbOZA7GnvttWArIksV7bm
-skOVRJlWOXNeoAEChn1r+5/2tkkAaJfgPk/9JbiaMp4PgNaDKxsqYK6KBuIPDONmZXqZO1DlZroi
-ziUKGkhr2BcQId7hNNREj4YGWdnVxe5jGzZHkQYKG0MPaPq8NiuwTijo8Az0hOd3lil1HqnTmTr3
-fQUvuPJ6P8DfinB306h4TtA1LmhUpz2p72CNJHXJWSrB115nHhkV53+WE5HM6Gzc7yv5T7JReR0C
-RmSYMkptLMDppPumHWxiAI5mR+ZyZUk3tLp9uJdzYvWz4Y/wrolL7WJcCvc6hhDzbzbeqvJNVh+O
-NMf3yj1TswX2MTO5upb5nR/jlS+18LqyCO1L/D41/wG6Go0rgt713s1AZiXEkgEUt1tzpcDdzgLU
-hMkg7/5eeuD/KFXY2zP0HKQEB08VnS6K5IluJHZEHdU5jcCOXqCjJkwVL83c1lg9Q77tulW1SbyR
-RZ8L+0KhMC19e3wuyiZ3z7V1q+q/Kq5w06jx3uZ7HBn4/TnnFkCKZoHhbr+yVOcb5TyrfF9Mvv/Q
-H7Q2o8ZUq7+H53i2ZRyueiT1cMdqUPvePRKl6DsGCd+t+Y0LFc+599PrvfrC8ItbP4AZxi+msV1B
-2CHbNEBJTFWPkFkhwPgk+1BjAP5c7KdE6ebRutz4g3luKgYqYw66sduNk0Aj38zEt825F24ZVS3q
-Wlr24/7shr1cWmmTuMk2ZueMJ/khbzDLeFljcEfPKFztIXgjgd69nirC18LkMS1F0G6MKI9lyoes
-yaNuxQOQ5+nEN/SQoV1ohM5K3+JMUCPLTwwgFRzYXjRDPqfW5KrvmLHsDs6Qnd7C5XYJTuid2kfc
-2kT9puxWYQ4S0dVCgfyovQERGhnQ4B8FoKfzemq0ZsCQUT3aa0b/M3wHuJ+ElbRJ/fH31nyajjmb
-zug7rqaR16o0B0ki629bJJbCd97CoXCEbk09OKVmBBB7vl2C86jldjVgVg3pBC4ivyp4tWlB7ZoC
-A+1qDHA/FQbErBGj+Sn/bfMLK0si7yRs/njkHCjw8FEqBVpW5lLix/gLym7vWcKNFw9qCbzwPlsj
-SnaQzTCRObStOhtsYTmri4Bw/Rc633GjokjJAEiBWZixIEJiE5MsOJVgpOqxg+GeWznTQrsH2hIq
-N5L8PlQfHKZJL2u1uyhjT8oy3+DIP5jQWZYBO3jaqybJXDPZU8JtgDgcy/d0s4jSF1C9HWPEq6xZ
-yRffnkFze9ck8ltY170ZsJ0mgBjHkFqVOD2t+0SV/Attb9tjo33y5+oVhLKYnK4rnRRDfOwzMsZ8
-2RKJiqWwIMk0WvX1TBtOMp9JXsCSHfUHOwVvBRITUdyMD4SY0itvtJ7QL0HHt5rg/LpGescVkdy4
-cwp5WoffhrK34ifXnBNK4a+33Z+GZCvwdYZfTFTo7yp3alKUOZNwws7yPFAaW73Yl8aEuxM4GHeD
-hyHkBuF724t6Bs5gs7V5DMguiI6Q/SCv68PWHQzRb98DPTaOyp2+DED/LnrYdl/JdQ101tudskuL
-eMBQ+ErUX+lWHCLYKtMPgVYW8Vtdxnoc7QNbAXR37muuPR3CkvaXIGvwcLRGtSDCjSXK6Eh7npej
-mcuxAuxr4Qdqp5gJv9mUqP9ZC+uwi94ixeoXysmoTNlIUF92VrcfvgM5pnaKGGUr38gGTW9KuA8v
-vPvXEvuvKpWIU7qi4xC9MgMAhLS5mfJO7Q/6ehbzqH7eec+uFemkTCWYeJZa+XXWXBwXfdZH97Sg
-EuKFX9kTpafjT4zBgxk+6x4n6BianV0newk+dGgd73uUYyDpJnwfNgCf4kiD1GG0p8oSnQ9yKiRS
-Nv5q8P9u2EXrpdyizAIxSmEo4eSFMRX8JiE3L5eVnWdqqXSHvb5UNyAEvIBkatndyzF37f9n7kRC
-AyptMQiBpGKEqO5HVNEu53odSNXrgXN9G5nBzNUEOmVVeHhaCbzDCzx+QyiThlFr+FEZJDoa1qF9
-eE792PJbTIA8djRCPNSzlzFrR1xPD1P9K8n9ZUseQEkU8ZJfYD6mWLtR4uP0o+M9Yg2Ni5rpjLUU
-/F3eZrl7CW5LDzBVnA30jxYS79k9H3mTeaFk+bTJF/5+qVGS3KZHxcyvYxQVd5oQxG56gGytreDw
-y9NclRUk8HI5tELKLlSA7aEqu2gT1rQCBYarVVLvac3KVP5DEIBRDJINT+4lw5f5WFTLDamGTXSm
-RiXB5CIjqO0xdaHrGFtkp98jZY8a1RqNQ9upQ0gC+uWgh9XiGYU70dD3snNuK7zDZLcU3doWyLlM
-JU7fMWT49CCtfcWcObQgGp74PRM5wRDYcz45LlBdHFi8mJwe5dsJAUGG7pxgO0JSLRrKjsVwKXoK
-oqqsC+Y6CzAVGa7tcIBJ57emcwNrew+lWssyVVaY59nWMPUV+AOrsGXf5wOG5bN258dqNem9sVRt
-xjaoR0p8X8MqP9e496IEMyN+llIVgeHKi6PyIVEthzjEXPreqkDilHWYpkIss/lg27FQj8UJvjog
-I9l+R/QPqOwM22ZOyWqtM24IMA885iGfRvBdJnc6+Tz1ud92y4DGwPPILGlK6oTCPZTmrPr0wN5g
-Ttpr0ppnjKzoGIGCx7cMxr2hFRz4r5ipYFNwCscqrZbxdKhVwU4L220FXWMvnXFmCl3GDaYEOk80
-TjU1q52D5O2y8m+UNjD5K2JX0PRZcVnFp9GG2yEGdk1tFB+3SkNGOzqj8fS6+nTW4txCImFTX6Fc
-DiVrOudwS4qaRRi1zXzHiy2BfW9u0gRc8orFP0j5S+3qYq5JK+YuR6rAAbt10WfJMKjl9mRsyMPi
-zmO0/7pQk+hRqpuMB50+S8PbrxjE4Tl5he0TaR7woyaXmo9MMOqCNNNYxQfQ2EK4ptAQ7q9sVsnq
-R1VLTchkbUcMjttyX7dAxontxPJQ+++5WXeW9OpVBK9hp1/+Cc4bOIlquLnbobs2jX3YIlTcfnE2
-p3PibsCMSWlfDE2AUEmRZz1ddPwpPnlwyxlRf8aVnyneG+MlCgd/GGMrqZcD+puI4gKjQXuhlc0C
-kYoXHPFTfwxOsqRHVei6nm1VpyrrWUFNEk4nJqJuGZqI5FDZojR0lsGiDkq2EqzRUdhZo4QWPxd6
-yjM+GzWji3OJqfw+KGKNNgueAPQDPihu8O1HijpZFjc1sea0v7NxDAIsDoehheOjGqO/Z9LJi9uq
-usYmGI2eM8sjX5SjJrYkD4nrpDxgOQDAoGIMvW0Mg/xLHjoSodKa/rTWBkFkV9d4JBNfWL7PqH+y
-4vPX3XjBhGxkmkbP+pa5fImlDsYd88WVW6GtJpw8yxyMOsfheYIT9vsxv0CX36aJI6uUk7CLBoTK
-W2sqVcnHMXSb/FYpq/PXK5I7MNj+0N6EcaR9ZCmpTZ+uIaxvdvDWw81N+4oSSIbThpsbmcJ1n5XY
-JNOkNa5ZUGKPS0NfVZvYYJB0zgOJLQXqnxfzUX0xvNkin4Dnala/Kv4REMMxryl6MU6tEsJuXZ/R
-KSHOVcXkWXvOSBr7pfc61FpEoVFYshalLAy6ohmVbZ+6ASLGbGxPp5lJcxwI+f6S1aAu7qUiyRba
-/YAxNB1YLAjSJFYroicuIfjGaGXcB7vVPFXcnUtRdVmUtf33L7SJZUvO4TRqs+orznEwXMP7LrGR
-pbdDVirBuT2c839C9TfrjaE9+QZ347rqa0A++Q2BRh0pvYPcBFgQHaeuSAotBikPghEHmOAKIvO7
-TEWpUgrySaj6nqkY4tpEX/Bjq5IriTvsz8W1AQ/7yVXGqH3W3kSqB044/HqPla1Fjbe1+dgwqE/4
-zuw7kHKVc9IV6pDXhDAAScdYU/a2x33TKEzRZbX5hNA31r09Fb9k73w183W481vBh3N0FLxc4p0G
-dSXxlSlh6+q1HTlPfR1N1CIgO5N8ClN5wPdQucMHVWDdm80ZrlzzXJ4Ju0z74dutbNJ/5vELxzP9
-ukx8ad5TSbmG5V0bDdmhimH2hE8ZuiKDZT/wxFC9mL30VB9LvtN8OSStUhCJY9f0qlooxgpbfiMs
-3r4tyEkzNpt3DLNlscnpolyPRnjlkhEA8HBpiGt0ed39H+PB9hDxHMnU8R4Igp1FkIIJDq3nkJG0
-Jq6L+RHJ66ALnrVZFrxfIxt0Ap7u5UvCetMjACtqpHMdsRmBNTzwGdQkcC5LZs0ojH9vTnRkZ5m3
-fGR5ZZS7Fxsq9oy41rMJVKqYYARYf9sEu0s/48KeD1/NDeOvOm8I2Fu7RwMzwCSi22ZdG53uCpOV
-az1xGtJUjvug4M6fyk4as34IyaApeZPPdzD8VoFMs9rvueu2gpMn/B5LHXGKNtOwzPRqXtQucbjd
-Qkz7RNhc01rD6oS7ZmXwHXgelH6HDqJItZCZA37Cl98duNIKq8NDPxYQeZ/8MXp8lPUx85CB0/O/
-sfjJLghJQrtqXlcFwBieKfCKJYAZiDtZ45TK8Wsmebg0tCivMMPRtWhnO806aYy1SHOUeHeup/QE
-wb8+d3Ij8XwY1r/fwn5xyklab9pLCWEOonsjIj9Sp4HN7EmDLcWAP/gAtpbsmjPo4SYSAeW0svKL
-jCMPgwrUy+ZK+dRQsXh2GfU86jN1IP8sXDp611IYTmz5e9YkbwGXXN4GXWl6wkeNk5zEeb8P6l1y
-flx5q3szCYoCCok5vt0Sxhmz9iZmQHWczBZ1naR58IroUvtIO4BQdjDGlYYTrlQuCS09RiWk5fUJ
-yQPqWu4JQmC2Dgx8lDb61bFNcscSR5MXcLFPVYSVuoE/q7wE3sMjO79tEZ/3h9iHtA9yjif+oRQ/
-3T97AS4FbliAgW0PLKqhhcK1v+PjhVChW8vfBL4Jq8sKzIX6LZXNHI+dAmd7npYs8gTj0zZnAbb4
-WfPGZsWkah9MwJW0Z4cilhYJMJFcr2rofg+28TuLG7AgxZ/j4JWqMbCoDeEpXl115q+etSBqVczB
-zHWBz28jU49i0oTT2EsIp30nKGBU/4/qZxXcQAilhGMbxfrW391nCZcZ/dJkEObZNzvjDI3LWJXr
-tqtvDAB7Dyd/pFLxCNQwXiUvoqwfBUXb9lplaPohw5Xmoq4f0rzR9WdECi4ChcBctHZbxo5naH30
-MO7ERd4DeC2WVpjlg2QLnKGEjplsoS3B/1oa1iYbAhWfOy1SNCgRHR2JEH3rnln1fXIw4h6lY25t
-jjYaekFGaQIOZT3HKc8USXiXU9WR1Y3aaLcCkrtKN9nYLP9Qurxzzds4jUoZ6Gzv9OUc88wKdEIt
-KjXut/00B0PADeg3uObIchAvGXxNSkiwCny7AVnbSsq0md4AEVO8Qw533A7Kqx2cl/7pz3b+PyBa
-Un/mM6QAQI5mEK1xhRYneNMCdOvWw4GSYptijedmVW7wWPXTmrmmr5wT3M7u2RHUWCKW2BAw2K25
-1KWP5D7JgPXO0btAq7374fObIzG7gTqjG6GuZ6CCDH1GnZCUvJhwt8pi5LC5ftQUQfrROustulrY
-k33h7zcPFKTbvb9VlcdPOxBy6ka+lZjYgbEe+d89QicCWZtjhNWw1FoT/21Ln5y4bzm0W+eMLKqg
-5rVKQOmGogQtOURUGmqu0RWeypNtirPM5mq4dhjOOvI4V30EBuCiY1zmvml2HmA/ZbsFtS1x+RxO
-mjhkoQjZd/IQre7jzoaHmZBUV51LBr+0sd9viCuJb+aQyvvLwcLsPMTN4YEmIgFPOZLyUdL0EC0v
-CG8pzKdy5fQhAhtUYMUtQ1nZQ5DebiT51I1/L3YQJHnKEK1g/fTrxHKr0yOJWR/VYFPb6Vt6FHBK
-ZfuiXbxQpmsDWroNVvAXHueacwDC3HJFBR45B1m82136kXWBOfRiCm1i1iI4WsqNr4JhFQziDuXT
-8s6+xXrdJQa0o7A+GuZpefO6HG/2bFUxLhN1oZ+Sb8oS4tRiYN9HHvYVGHsIhUmuB8Ak5mVQPRJe
-8uNdakIct9YR2cRyBPiKjMXc0TZ5PP5pQ419j81bfiRqzmTgjpfzMG5UFADO7sB3WS0/SzwEQ9aV
-b0osbUvjG7SJJDtg2nxXVe6zmf9a8C2Uh5CL7g2fI1iNNYWzlHUCZLrDEDvPEgfpYn3FKdQSBJBL
-OXeHhu63ATwfWTG689wbYkWE4l7We6QAotStOM180HWPBUiW2b5qvCBiDRpVC0waMjTrd0RYbGpG
-3LT6PG3jVY+vowVqL5H52ZJy716sGSoy7J/EaPO47Satgpc+TvpCTYPZ0k5ILcVD+1IcbmLRzMH/
-B/72H5yoKhQHeXWPSgSjpBdsvewsosXr5lfe+0VH5VSSXXuhWD4zLO0crxMhfZ7QdrDI4SjeGb/U
-o5IufMAlWrjKYYCEY88wFmGQQGwnREcmXH9lJyG8w69wjB9smZ0ymdhm8umrxTGKipkh19rmIEXp
-+2cxHYF4IdOd/Oq+K87WXI4Hm6v049Bzn9+78ftgJ1y7kHnscyWqJ/JEZTVLE9jXzmVmObYF9TLE
-3ThwcsxiLdwPUjDES8fC0gmwNi+mFNaLkBJ8Qg9x9awXI58LNZARZgDE+QUis6LO0WBdiAWZjRZi
-4ZEmtqaHMEt2EBHW5VTmgdBVZ4wtM0VQ7Ybm51VoPX9KWo0I7+qO67IXfFzUVg3gEmvBjhK4SA/Y
-YAnd9pnizjdPDlveO99biaEpdChHyX2QMf5Ae3eOEGhSu2xMnhuZ0vGv+soaLJFFdic7/09SXIdk
-IsH8G/uOodi7S/YZ6gvYAuW2qpHH73lYt56SdgsPyXYuHbUJnXcxheXZmDKQZr86zci9opyRrrPL
-5aOAW6oHV+G8QdOVBnItawylPdUsvPGCW4iDVNTFSbcsk4LihO/g7sa2rtx5P+hyEkD4LxEJRisf
-bz+vDAm9ReuqyrZqXXGdGwVFUFckZxTw/qN1np1f3WQQoT0S/h43IWE/jhEfM9CkwNbtda6d7UF+
-+N9C8Yw9WQMS2cd6FWDXPULs4omDolwfH3mPRQZE8eUtN834YKa3I1DH704LiEnANN4hnEGONN/o
-gdG4OzJQQcSiWiWQjOvATz3JyLt4BNwt7U90mPGau32Hu2bnQTTqvJBt3j/bOrt0GNlAbPsDo945
-GPMEWj7DN3Hm/OFsZNcVw2txTTsGGwIVVmH6HS9qbcNh169WZkLK8z2+K3t21oY34sgh/7T0hCS6
-aAQswM9bwcTBUtRSNcKjWeXpV34Cucb9DAy327hQSBzRj5eRigV2+L6pbaeanenc52AKXzSUdlqT
-u3hXiarxYGtdaHtzOs+nz9d/NCsLL2iKGaE/awXhNaI5/zZaZ/iHGfN6oPEHQscGGyQ42fQgjBMz
-gmGydNGvK1UNJA7t5qdsvZepoy/i6xugyZjVMufj87U7lSsGuKUDp2akxj7Fj3cUIIiFp/PYK5QG
-LEWURY5MR4VAqnDW4itSRHe+75zKMfWPNVHIfjJoONtaoxJMCm18f3DO3mErapTgEQos0BxOj3vq
-262o0Vk4wPROc/v9UV3zUPo/UY2Q9edsrMwEypBIQDnmWxqVJdHdJ1Zj+JNsGgDpZizAc5A5UCZK
-/iMyKelzf7ekDxauyH4brzUvnpIW8V7rndFfg01w3HIDaOHQIMUI0kVlZj0IXKO7M+LRsvL+hmJV
-70RO2uAj7bimNIJIOhvt/VaFWk4U7pkPRpDoEPVHabAPw/Zo7txuCmzlIIS8wQJKpS7DK6gp3jTE
-Io6iXo5UgnJbfeeh4zZ53yvuSjEdGRjwzJ9IQGGg0s8dKtRTe3uPK4ZAbDoMnizI+uhFkb8uXFJY
-p/IWQYHXlfOKXmgV6YRaQrmcwvUwQfUgKu/M//llg9wZacgUEyTx5G+TeTwvlWaodXhtW1thbk9M
-MBJ04bKgitigdUsNGvr4NmOb0O7F/q9ZR/J9b5RpT5Yyvp4XzDgmMvC5GCP2SMCm5s2oAWXAQBoX
-EkeyPI2/kpRkGUqiCT4gJpOr+JzVTTZsbhCEAi6KVKppJQZkavWuH4642yRR6DnfwBl1kdzJ0v0P
-zwtQln7fd1uz0vKzJLBWuKGUlW2q2/JmALYuFchQxF8w/ZMxgk7JU+7A1e0jLxQRbS6nFCd8GrBZ
-hk3W/gSBi1nmUzl5l7YsCO4fhCMW/7Wbo4UEHdZYA2oTi8x53u7+3F63EO8vrBGohE1KQn1AQwHA
-4jeXG0DinncaNDq6hO3TGDjx3ehKTzPvKR8jWoGBlu3AVacMUzKAiHL5LZYpy/av/yzAEnM0rwM2
-U0dDnoVmjDaIrtV8Un70v+z5TSSbKiPX9dmtSumtbfxON4Hq3Es=
-`pragma protect end_protected
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_syn_rfs.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_syn_rfs.v
deleted file mode 100755
index 968c65a..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/46fd/hdl/vio_v3_0_syn_rfs.v
+++ /dev/null
@@ -1,5008 +0,0 @@
-`pragma protect begin_protected
-`pragma protect version = 1
-`pragma protect encrypt_agent = "XILINX"
-`pragma protect encrypt_agent_info = "Xilinx Encryption Tool 2019.1"
-`pragma protect key_keyowner = "Cadence Design Systems.", key_keyname = "cds_rsa_key", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 64)
-`pragma protect key_block
-SO4fMC/C1Qg/oTcwIVxt35RzVTsCGyUbsJ6dfm9gJCMThGHs8aS1qMkWYkxDLH9g/L8W04YP/UF5
-hUEBDwnMWQ==
-
-`pragma protect key_keyowner = "Synopsys", key_keyname = "SNPS-VCS-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-iRE1Y5V5A1N/MEEjSVagNwSenRLEVkLhehQ2R2W2KlsJPZj16HyOVMgF1k1QOCEY7s2N8rfetuXO
-7DIRY02mNVjbYZAdovnVpqqe4meFgY5Ik4gNPI7fm+RIfyerFTRXcxn4KCI0BYgyNxkEcsOvpyA0
-vrI4r+MC+eI2DfesoN4=
-
-`pragma protect key_keyowner = "Aldec", key_keyname = "ALDEC15_001", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-HlPcnstrtSQYSweq+xatNw8CQuYcpRpRwgI7lD+EmEFhZlxALRP5/hAOJ28DPtypH2swd5gMYVAC
-0Aj3jYS1lMjAFXdhIA9zJIofpYHHeezGOttXKZyTHnbkEbdaOYoY+8ReGfqUBxRWG8sUoN/mlzY4
-I6exTwqHLDVslBMQexFijEGvCwUzVvGyOY77CXzMXzFcoBRf8f1Edo5eu+eVutjCbriwGEiBJEMu
-q15G3lAzcEoL1HQ+hvbQ6CUBE/ltBd3GzV80vyTYCDvb/Ioa8aNXIJPqhA00qZbg7VD8F/L7BIUb
-Jb7xsK2pBcMGfN+4lbHzXFyBVm2z1kh+QpvIgQ==
-
-`pragma protect key_keyowner = "ATRENTA", key_keyname = "ATR-SG-2015-RSA-3", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-ooo3GbXTn9waWUM3FjpigSLjrQfV0e8sdd+OASZPwnPMH6CAix7MwX4ZrVAMyoiatgbYTZA6LRH4
-Pv6etF8EXRrls75Js2bpxCwNXLwrJ0hmQAdQZeKTelOVh5W4Ag8hW6fKCgfsx/nLnul6nafmwPNw
-aQjbNdQhguCZdKh2AxRs76GgzcdY4HXtp/eqQSISl2Dzm0c58L6arFZ1WdRlvHiUeQw2x3SbYfar
-LVUoZ4GBfCUiDlzepraOxOGxC5O58KRADUnrUPu3WO4HGsKeRU80eJZjYdGITmfZ7HLXiGSzzM5H
-QTGeP/ngKA4jm4e6Za/uxsAjqatuNGAk7HIn1w==
-
-`pragma protect key_keyowner = "Xilinx", key_keyname = "xilinxt_2019_02", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-RipEUYdWynJlPi/oEMMTMRhnxmTh99Up6/ivNrpJHZQ21nNe6QNIwIYW5yQGVAg05YMRjayAjPSv
-UBC0EDqqgeIjAqOoCRDRSMrdxLfkEqk+RXCP2ZXZfL5rY5ycsWga9QWLQ9wouth/9ZCfXnd82+gf
-cy4xhcFEyaWsJrodk1m0vmlAn9qSvt2a22kK1xmW0IJrfyyt3bWU9hOVXV5d/9BRCWsEvUO2BNkw
-+24y70nmWkObXMQbSxStks6EFyo7phapxp75fq3/am7vzKpsy+I6rQ9vwQBMor3XL2/bb72lPXcF
-DmPZy9mldAwzgEsJkXP6x62Js5PedplvIVrEAA==
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VELOCE-RSA", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
-`pragma protect key_block
-oH7zg68zx6vvDV5c4NmsrgMCMsGKVoADfx90D5/FK0IPC0gN6ZUBW3gPZcLM1FrQ2qUgNwXRj4Kk
-GX+nYdf8S6kBb0v9CgNSYUCI2CaefrOSZr9z6W2Rq3Nscod5V1UkP0YWILI/0JCB/N1EB18ZdJjo
-y3cZlJHsNQwvqmj2t2A=
-
-`pragma protect key_keyowner = "Mentor Graphics Corporation", key_keyname = "MGC-VERIF-SIM-RSA-2", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-fRnx/Gfk5y9bbSoxjImVtU8g37Z3WR2DWSmGTY9Yli+nRhTC1pCWK6DVblFBajxUVCn06DalORag
-9ucIhnXbRgXeNAXfooq1Zf21OpXOC4DbVZ5pZPMoQN3VFLZA6SqPBZQDUheLYa7shOdUM8oiQgPS
-NpqRvvOp7iYEO+4wcqTMqcoFQiwmtSscPRKT1CTDejO9+qT1/PHtho0I4VcbEcaaBvF4clrDRTIN
-AyqIVZVhcghh/FemxXwkeC/Dh8BpTj3EyaRw9k0vxqoWqRbCc3WbJhWPgPBzb+4b+L0tbPckDVQl
-qMEvu2R2Crpk6LxDV4u2gAm/a9ZI3Vs4h58FWg==
-
-`pragma protect key_keyowner = "Real Intent", key_keyname = "RI-RSA-KEY-1", key_method = "rsa"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 256)
-`pragma protect key_block
-ViKdLpT6HaWgQerPZnDVMdmLAN7EUSRClCzZPu09vLeogWsDiLzGw0zLFDd9gbjlhZRed8eoXIs8
-tLVOPfg+RKq1dQcb9bmgIIxemRYXrAB7QC2OGxSvp0oySA3gpYDqOmuhtvaz8j1nnbY8qyVyVLmE
-95CiYi9yF/YPEIipA6ZOBqJOStOLnqyUMYlMpbqrNlVlL8tAIZfwv1KOwDqt26NBoC13In7lXGsx
-8JvY0yVVRPTBQw/i5Oxznsv1sjKvA3x3//0/K5IAO8jCM+ct9pJuc9h7aVtoi+yXOyPKHzgsVXZ4
-k8mBg4PpvQ9CbqJNwTU00ivPj/PxhSGBc4nG2A==
-
-`pragma protect data_method = "AES128-CBC"
-`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 281264)
-`pragma protect data_block
-f2L71xJuPU0aSAojHhjdqpyhLiHTF/WqQ+ZNfUFtjnnD/tS0ERu3zVSsVW+s55CkZ0nEDzrm09jK
-NbCxOdd447IvduxwJqyl51oEhR+TUVH6LFffIYa1033DDNGu9iwFhkgiplGNvELWQ3sWXHry0Svq
-VwJ12E0omz+xIDd8Bi/0K/a8xBvqpUH+AEOW0mCGtGsNLiygRg7ZoSJayR07gAL8MsIh1+IDwxOX
-krkMMguViNbq0Ffu8fyi9izSKbitrLiugPlNqr5lt/+ZFuGzfEc5TftIb6Q4ZqvGDP2GC7Y6ImW4
-JTYYjiB61J4D/+ZSzaz8VyCBL2U4v3cTrWkRvgMyt5+t79Eu+F9QBcw9pPs7lgew2+YlJ9KfRVMv
-wNb0I2Qe17EFZ09b4XGki9ZUtsQg19mrYDnTrQ020O8YqNCvIZtk0T2P8eQLe1rN2Jqy7F42Id0F
-pceYO49qL7R3/SSNlDdE+sX2+9r4HcUCg2SBRefmI5/aJgaLjdZbjAQWLDQAc3pSzs0cLJJJsiIK
-QL5PVD0JjSCdBt/MWiCePgpsfU/3BFzUTDhfkjulBWBTlyEmxRXWUK6ao2Hmy5U550YbQBOIvXxf
-SgIDIzr5wJff7p8JyFkk8f/B2I0bNuN+yu3Kj0cjEVeReh6e57ybFBD5VE0qvvcs+syduk1X5Cf9
-S1Z+Cxo5aajppRgrpr09g9PVDjWabmpEU8YuFZHy+DeGWuIfv13iUffk8oZMfsmg/39N/tl2DCvU
-5SZO6+pluR2wsLUyLg76scWYKWr7NhjDpSdr+JEd4phhrjEUH9hUxV37MIwuzv1c7nz23xZAZ+Ed
-Xwcw3Ai0m/r/J63FHGKADJVH0dHFJ1qyN/rZeo1ciEKrnCujEQDp5jZd66L6GAYBsYmsBe5ScNGV
-77xx1TSoxXrNGnSfX/w4LQuGNZKZQ0+vQnjgxHkJpb493NedUpa69c1biTTzdVWQAKecqPm40vpO
-tApN0uvMVCXdmjYTQDuX8wcVhO4m7csaSoXGyZ9qZzUtPBTnUe47Gg4hmv2dw/ndj8J24J7K9YIf
-AdoiBkH9XpZJ/GdGQ5v2jWq4DZEkIYsybWrEZQ77Ut9bq8ekTM+wG+HMmm4hiYUfdY8LnYRf9Ejd
-IetGBLVCZCqsWsB9h5GSvl7IXn1QIkxtGZwDdFgHPlcoFKTcZmiByNWlMQYjOw+IHEmLnjo1mETC
-7Y3bYCu3WfFhr/KDVddwQ3wl4DqeWClfPcR5vhS8gHeZ+g9xzZc8wEdHXRjBf9HE3qzHHMPPU+h0
-XlCiwx2y6jZHWuk+5Hup1NSQAXb+EyZX7/gI8VqSiLiPPxrK0KyyiPpk2G+xuLmDhAyJO9LNL4fu
-Dv9DdbpH2E+9EepjhjYqflKcHS8JMWNURZ/zyL+8LDpUaXERMqyK62NNllPWn79qOsZgeuaLUTH5
-q/HPxx+WIhHDZyP0cCDGnedxBSailTvdpQnGFYO0uR2ZppXwO48MGHl/kza+X70ZDpaCLt+OYmpV
-Xz2AdxPWllZ0as9+XNF4YQDX7KMPW6to28JZvDdULfA17Y7d8wYcwIJ/zqxjcugTR6HAbV2Y0dla
-uKT7ZIZx+cxKCcY0JZPmlIjOLdCXNvjPeBvVv88eZz1CF3TGI3vL1U7/Ygvo5+dsE5E26l9FOWj+
-fSTHYkI3FzlDnf3xSaa98dak2Ph2Y922NEzU/P6dlqex5YIjBJcch/4qdwNg4efOjqosWJeazu6S
-Xiygr0/sVAeJ9+flIhxP5vXzrYVUZvAPmO9Ud0+ryZzcQklALrvYGn/sun0YWBaN1ToRRb0JgpnT
-lDP3V7f2Uk/5s0V4+pWjSNQBAHSBt3Mv0rreIl+ftqtVjg1WkAA7EbA84KnQ626HoeJ/q45x6v0J
-Jk9Ki5BWnooLy9eYERMACT4hptUHEnNNPZDEbqwUVj+BY2+Ul6GchnDEGq06ZW079XDFI7aVQE14
-4VKIvFFDIv72xH9mgaQ1zuMqBxAnfOkliPTYj0YJqCuZuWaV2rG6/BkDUSJ+zIFC3QTgtnfT8zT3
-Ek70JdjkEfP+6VXVkScUoEc5lP7Q9Eu047+zLg3Z2a2NtcSCjle+oH8xGTVb8SCMMMTEbzv225YY
-WwxphoSFS8yZbgslx1prjFdAZx/ElH9LpiShWmfHrABSFm5xx8R6u4VgrB7hsse/ZKLkTpRd6tpE
-GPRwUWfuroUGty0YkRDWfCYDBkkHuoAFbPNC0bC3nWvtaQzyC/Odt4nBIJpFFAmIxl0NV8obPzoq
-/pZp2vifHteFBJvIX4zHCeKwYHQ6SejaQ9CQ9ZZnrxDSLtAQe7uYggs9OdGQqqR9bMpd1ArJELvJ
-+BvRlbAjJcFIIX26ZGQtPlDOIB+7NIpvQZhDM4JT8dSGsi6Qpl/Spr5k7gFA7941uZjOz4y4Ksol
-qZZz7BL4RcBaE3icg9wRI1qgWKjs97jJ8KZuk9gvCVEemoqh43RMdBsqOvXLLiIiPhxU5n8e1caG
-PKMjmUQZoo920TPQIUQ+f9/OcgL/ThUT4/6y6/52LWiGgRAy83l0w9DwZDlLp6uhx+CuQ66HTRBv
-mqhpMhTCYrF7wx0A5XX3ij/6BSUQwZxMP3riOWvtLQiizjATZrkNzwWioeaJBfk+PfQEx7gbb2yn
-96ve+nIVlWtlBBGe15ddFQ9q5cEjnO9YG+L2V/ErRf1guT1q4cjx7uyCUC5gzABygxfNqHrilWTy
-VXXJlofsEgjkoZX9CWjxn6OJofEt6YMN9U1DdxXvjXEsN6qXqC2NLarN/2SnSBRuvfZ/suvUliU5
-d63lzU0EY9bGpi85YdrGIp0W3rN8WprxxkGUVCK6FUu/DdmB8fpWfEJ44QvV0FxTLR069+KOzqVA
-hd30eY3Ugd5VTD8vrc1oL8Qk5IPbVeegFUc9Rh89M0Kr8QkHGVe5lxV2HMS6Pjyvi+Cp7BAZcZ2j
-ylB6VfkYtQPC/CTHnYilKen06OfrhCbx4n7g1f+ATmfjmIrbRc2D9FM0BeDXUnBC9nmP8/0XevxX
-r3BWfJ3CjD1fjoXOe85IisRmnQVhs3KvdK4SXm/p89zP2d2LNvcQkF4rsRvs8WJcB4qFonT1fe5M
-PjoFVTgf+QDveRPHXcgWzoCFkPt92L4HDlFz2Lh5ZMP3lsMc9iwT7iOB51LZ7wYplW/UnWprADCO
-DslpyRy3PxLFgx4iDFKMeyTtR/OXxmTqQMv8mxL+XVUAls/P5OiZhcx23JqwRWZsO0fYPjqCJi6W
-5nA1byRDnSkh+jI10/kA9fbGW14Lrox4Ap+Fw1TcuNIUhKr4FNB8NWsHkPOZBar7DlNXCAOaAnBt
-BZOCIYa03NqfuallxB/GJKwFgITlfrOlpczlsx/2qYuWuJg8UfZmebq5B08mlUuv3B0ECYipjx4u
-xwemUl3lUVv9HzkTXtcf+bOwwqSaLSVh/1i0o2HLH3xu34tKeeXAxmigVetrmSXKxpu80xejTncC
-4e0MJkp2AK4GajtT77YzQAuFLJ8WSWmVhP+KQQ1jpKoavIaB3JKwYryWoEKl0QHuHEgUjo+dHFer
-PFsshV+fVVThm7yW/bIfamRLpn5w+BtC5pQN4hzZigibVT+v3oU+UHWH2/7aQYEw0w8vRdmqpN2w
-ndn+DhDbxcRlJcavCONgjtLALBBCcPBuShZG6585SlsAy2+14CHclyEVubK9eBfiynX7HJt84vO+
-/SQYf4lDFEkU8mMcGnx4z57tUpDE/cLciPOnGqpIPy5MUBu9V+mqmxaElS7tGXJTlMuu4SPjzfBu
-sLGCbDZLsiZXbtr7OsNHW3ZBSQ1HW3mzy6tid80BT+pXwlGcBSkyFqg0qwUMMCyxhUByIu5gMA1P
-bd0dWWI7xTbyQMc5oP0/MOQjhTpXgsgcWYxQqU5esU9xxF0e3pnZ/QWGHcpKAjcHLvnJ8CELhYdo
-egbBT2WHxun/DRQHa3BKd/9wvotny3DfMt3fUm+d3qHk+YD8x/vBxXcuJZw+imOGMQcQkp4HB92M
-43dwUG2/w8tIizxB1OLvx9Dny9ukFu9CkzAKCJYGDuHgkO4ePgA/qtM3LK4bAPQteZvRUsd6B1k3
-0812pc2OGRJpZk0RvihzomKi05z3ISmYszpofcMwLmry3y+NSEEpdfZigiUdW5PtNkajgKYNy1BP
-SpErnR4uSYZQZryoeva4svD+g+v65y6jyAA8tWwpCVzC0n5y7WOHIZcj9l5UHFHupNOHM4NIC1Ro
-vPiIYzubn+sUqBxpBKPvr8R2YPkEIpTZq0csaxXzZgoITrtlGsmYRChvgQ0dutQgqy7ycsLcgKev
-gU0VLo8+3YVsfnfL+OmcTU62fT+lsxcyiBGkyz42TRmww/ynw7qpccsehiUQWlRYvcWNeFPIYPSf
-SkIFuGsygjeX+p9hrmXwfoUyw38HXc2cdmjSYj7s8Kd7LOPnKdyDIoj6NiXP+4jCr6L/YxmsePUf
-/9vtaT/AIx4IEza3DtkilnB0PHAqYhIzegDFtHnx9FuMuVpwNBjFgschb3XjwIIFQ97h/Gh6+QxL
-Gms2ZLGgJAYgqcpG7RPZGkjHr7pknXRRa7R/HjzUKGsxn8raOsohxdBpEzdzY/gyig9PwZMqinm6
-Dh3C+gip1LHldxI7lPKzc4WXRZEEMBTjIkYdS7sPgXeDs8ASOlrviFjWkTgQst706MkraWyJN7YM
-v+46wYb3Apoph37XjzTUWVbawdKn0BvD7GQeKXllsEoQ8+dhF2gTfAU4+qcKMEMdl6ERJUg7ZMfI
-tMttQ0nrWkdpF6wu6KtmAwtC5r0M7F9VEG+unm9q6oycBnXPonvoR9LpIeh4W546AnIXvzFn1XbS
-18T7Nv00SnBvqfiwMpdWYfk5QnBOb3y7afDs4t9emHRYfPgDyBN28CDaT1zXnvc+8X1Weg0hNQJf
-uX9sfx13Tp1INTAHCGjrCGr2skN2g8YROYfiaooqtR50rPTXgljIscKHU18xWJrPFzBOy35t+H5u
-OjzzDUZqgekQrM2Ts+1ocrzqX6QacVbbtzpzgunURoz6mCf7vLV+SOjDLoO6j1y/0MIzk2aEf3+E
-NJSyrdjTheKnVan9Sb1GBOu/09D/mAzMBp3BuiJqqlh4hVGGBx0xhhl/BGHploVqkwiS4+7OJI/g
-L5CpuxbKrcYUiTHaeMwJJJDUckd1clUAy0FRJUwi2TFszA9mfCQ1+5yADww4ONFGY2kW3nBMt5d8
-ymHEYso1y84GnICZM7pHRQiI7r+v4VbJHxOi9Z8b8cgSFXlyB8RzAeg0OzrfhodzZ1mDd+Ky6kB6
-nhLIqDTXa285ilbXqSX1SLSLa5Ja9u22rTy1BUmbr9mu6IvQorpd4OpliEti7vcPRc3aQnd2vOSS
-+COe8SlYlMvWsTcAT4dZiVDO5mL8cMXl8Pjibr22eQ3NyKYUVA0OZ5P6DlGyE2fno3fXcRdChwmh
-jV/6dBAiisVIlNGQWgfNA7jzNfd3lBNxw2gNuqWK60lizStuPXd5w4CmKAiD3kAamw5zoFYTftVV
-TOLO6ZtQJXGZZv6Wn+WseqoTdmCZsuSZIc5uAnt1xg9fFMxqKu5/kG8XrbEn5BvB+aTeX8/cB8Gv
-KyCmeYWnBknIiVlec4b00BYdZfh7tKK26fNMYaeg1E6DovQL+wUZL4FWo5gp8ZVylprtp5FQ/0UI
-XLvmPvJWCQQEWTNmMR62qBt0YNwqt5UoGzqSPqPLK56PnNWpLHefzzhNjxuXpOTo+IqjVwkwD17C
-UKalOAMwukchu7iD7i6GREt5sxhWDPOTETtp+OFtsDzaRKKINao2IE8XzGkOC59sgAZrv6rmwcoY
-MiRAcdTibSXtV2qGTIMKVzgUvrDBgcvHIT0ZlTlXCaniRW6GN3k+oYtPqs7q0946nuJ7g3xz6qlV
-12GuC2X9dTVVN9W6kaPosL6cnHZ6y8+QCNOWrf4bfBlAbKeea7+GMj3i/oyA1rCVDdWNbzgoqUUy
-hf25TFanVkCGtUWPhO7Ax2m8UB03g+KzVlsfpQh97pWYYiR/Rgs0a5MzNEVtFY4BRruL2o5M83la
-O+wqSXrjhSRKZXcKv6gACJLp8BkR6yOEjVu8apdX/JU+Sd+AXQTGcJrBfIvcpajK8O2H3jK4wud7
-raVaZjEKRUAK9wl4nOAvdWlYwDpBZG5JWlc14Y9pnm1xNfbz3XKljdhvq9JxHNjrzpbAZVUSIRRw
-7l9aQNDlFxLe2fCpDYdFU1MX8U8mTv4JrbaD1VlgpYUngU4NGHw0wqCu6C1JjFT1Y17zSGJikXO2
-CXKSB2p4A5oKvK6qvlYVZ+VdOr4OBXKvEu5LpX2Evk/pm9GXY7tgIYqr7sQIYA7APunX5TvDtmrJ
-ComD7sz2cCvGynMiAyHuq7uql2KYvM1dUJZQvUJ3npjyCvZ1UOLvhiKN5Lc7/MBQkR1Rn2kKV7m9
-Qiuc9zGisvbNC9clN7chSBevnn6k/nWBRXF2EGp/n/kLiEqCIUT5eoqGQHhWM6iUpoTngClxmyNj
-Jum23MgHremeLvmGGjCE6fzk6XzycNwl0e/wWm01VS9Y9pWh633J44gA7lr4cpjRNJGb2Ldhp2Bm
-rgXFWPkhupWMWjKa7pYDGl487OtMSgnfPLWlMrxs3ShyYJmGCAG1jHvOyr18EDPIPWJzxOI0xZDH
-cpBw90Qjq+Rvo5ybWQ6pMtznOmnhj61uBYL4XqMqm0zOLqmVII+r2Zj+6xla8rKAUr9EpKbJ9bF2
-HwoEGjjYtift/oYKcHVC0MorBzMOjhOlpruMcugfS5Q63cWZqJ0F/3Ll3eQkgrWcRx5KG7lUSHCb
-FaXdRNV+VDiVhHVonMXCosnkItg0mIcezofqyqU3/iNw5fe9yH7Q7OyLGIxMM50dc7LFJ+n0T8Ji
-X/gR3LXMlAtR+feewLZpWWhl/dci48t3FtYRD7SxZjzB/1+mUMkjecg7zM5w5uubm8e0+Tp5S8Dt
-9xfim0GrNezACjqq3H+QEawukx+6twVVUKZtlgakyPOS2CEbAg5OtOFfNzXv6qeWIHeTKiZ2v1f4
-ccUhxtzHEKOUmXxojmwSh4PFAsUeb5MRB3ZAorOSlfL37+Z6WyBidMiGirg9TWZuR+vHvKxLXtsb
-NmzmGbwmYZ/wj5YiWL2pd5LsfGVmZ7YFyFH8FfeBSaLZ+mEnEdIyi8cR+zmjrpx+93/HpxGTLK0F
-QXStSfWHne2FaaT1oDP+pc4lm+/Mwz3vKgtGYzjkVVq83JA5P2BNBGfmbknrqgrxok/lNavsOG1s
-lKSBIc91Idk7VKmzFk8m6CnUErsOjIHd08UZIDTEYt5IBqObGaeL7yta1ohxhq7n6nX9Qkcmldkr
-DxCJyhdWHkXghso+SA4T7CF9d6OMdyK/l37PlTXxDpC0Wsp3Jiz0eydUM6JIb58GS2Sc5z/9D8RT
-Jl3KrMGf/X5Rhc3vg56BO4bk3qWb2n9r9fVpbCKGGzxJCXWHc1ZJtDApycFgevp+ugQI6fY67Adi
-WrK771w3vV4eL6AnrYGEGDMnvVKFYga+53GFoo5c+V264AcY5sGCpApzRDB+GoV/yvFrE+KK7UOX
-93wkujWn49WrzEmM/sG6EuUztdlBc00JzreN9zU6G0aYx4r56O7OAQnMCLVcTR4xYV1FLgCvGgJ0
-wqmj5Y78dph8sRLHFQzPLBGXSGDwJFHvNExPAslOvl0JHVvd6eUE3vVnLS3QuVeT0/4xUHuCGngd
-Rs7jym030vt/fTL5yuqGgyNSsl+BIFrh3Gfup7eLGCguGVQ1y0eyXUWaU7wJU2OKuVAQY59eSIKk
-Rvd6NOxe3Nw7hP0aRUIc1zyn01HPaqHbTCpT4h8QXS8oWRNWCClhx2qJDSFivDpA3G67m1ko94sn
-Wx3IopCIvVnajiPWd9LbZbbfOY3JkVeL2H2YrJV2mkuWElpH7ajECHX3s/nHERfQJYrTG+127H4a
-kP0E7aDYbt5LVyMQ/l7eXREYtmi7AGYwSoPSM+UNLYjU92Bhe3fqRF64xj/33gqmI+YfZqCmmzkL
-R0+b2T3m6f57C+sLJnRrKCi4wYrR0Gi3gDURKGvvnXhHFRS2da/qyELPIHJQAi1z9UXKC95ClkDH
-la24l11XJYFR6lRjUU+j+8O/y6hUG6hlagyYTqHbdAVOHi9IBlIeT8O4J5Oyu4C9xdJoXbAYj13d
-uks7arGseRIAUiqhtLwiJzwOpiNvnYzakiZX8fExoLWnP/9yb9piwLAXv0JZhfvwc+JmO98OcoGW
-hJztf2BqMTutVZP9GZ7u5STPQ/k4UVpianJSjs9XWcf6HBQE1qUMJmP79uNsr9F05kD18/JVXaqS
-yQ5mRwFNprMA8b6C7Mo6unZWxToUEiWIwWfT2amTzYxmpdBsb/wwJOggayhmlggzWMRMUphOXX86
-gT85TX31+3kkn1LIvf8nCJIXSaaQeqXI0A4lCbb5vI/UPL9Dg+vsFwyRO/DbCTjQdqkD1faZ1cDR
-OydNZ2RsakSoeQiNoXNRB+SlfuOXnH4zSqFOqPTMdfvROI40vROXYVptTtLWFiKl+9s/guwaJAs8
-lVGUwKMr4Oe74Svx3aQ7SJfEhrKdZ3I+l8QY9ZaUh7NSILDA797PSLLXsYfZ54UM1uLlIgK5oZPj
-wJnczhHLexoAEq03FFEdTldcI6kbJDAH9OWOg1ZzOLL/c0wB+2HOsN8BsFpru+GukZ/iRIXEGRZZ
-5g8Ov25+zb1PngeLHu4pDhHPtB1/DTYPm68twual7kzqstdEAwA4mNj1sGeBerlt54EbTrNrp2aq
-cI4NNbKdYEWeEqR0IA7lwbfEbw60xg+Ynj8rt4Ow7g/mrhO0TEsyAQxlRSjB6k3I1bFbTAKiR45G
-P0Wld3c1VQ/xMWEHtfMqrb7kXpt+WoG1rHfKmYIxIqJKQNZYfm5Sz2fJ8qEs5KJta8PJxxn/+ZvV
-7J1aqZXfX144GX2QHasWiz50lNT8FBdX/aPlJ5SSAp7A/Q7vNbarAszrFn2durtHwJMezI5ShaWD
-G3S/f6A40sNkPvq+WAqVmc+f4U8UYDLS456U566knV9OmuJPyaFIKRC6D0VokMJPQz8g9hn8Sak7
-7L1X8GjgclCGfgR6Ff4q/7pp7z6B1VLFMFhIkXjH1fSyWsI8s+ciVdYAu4SGfRbwVzfix7akwVoY
-9VszcJJDYH7KX0dilzUCv36Xu3pGcFpcfzfVGKNZvOdcEMRo1MIKYioTYISXU4thb/0RH51uIEKd
-szoADCRKRDDyn+kxqwFCcaYbEg0Glip+u2fP12WiiM2sG87mvzcAlcS6aDqL9LK51LTwqeXuE8cf
-D9zHcxBP8i1bIV0Oglcg660uhFZduNJPCMz+Npsx76W1CvRk+P7QmThoOI8j03CiBuBsCZGwfpss
-4yJmfe68zEVBdaEPYD+QDOVDCsaJBVj6zI6P++IHhR2E2TUS+EIALTYJcS506n2yLrdbcoh8cYHO
-gQAdJi+TltxG+TV0LNMoB/UQTyEht3WZGUxuazT5CAkSG4UM3roG4q35TWvEgW1MtJOE5UV/vqbC
-ie9R2GwnX196an8JPI5FPtq6RkFHtcJSNJyDikpRSkfT5j4SdX4+CB6KWUw58DDKB5PKeYNxMgh3
-4KDoCbLwycmxD6T8UDBL0Xd0AX4c4TQB5enpiySWyCxOv5eb4d6ItwRBhFoIdbU3/NhZSkbeuxqC
-9y3PzYOVakfh3z+/5Belrf2hqfeE1r6Wowq8TvnO7SS1icduuPdSIV9Wnh3bCSs6TCaquvdhlM/a
-TbI1ZtEfjccMevLZUfFg/BOVmWSSmL+1cZ3TlM6VLOI749tYRiB/fVGpQbixn1Q66dysQMFaXLlU
-VARcLDSF2q4OgTPyy3povWqkEaLBWjmWRXKbFQzmL8iQcCMYgi3E36v/0KBCQ6hXQGoXXNoZ16tE
-Oh5uuYTH+GivsC/MaskIdjJcWvSdE1eg+54dKUiBq9P9gmotKNP1V6UOoCT8XzxuV/4LNeUSDu2E
-vLrM2jlmbcGAkTCKBaBHmAlRCX0fPhy44kWTBQtPbaEuy9G/X7hAgfgMzbogUAThVqbN1Iv17/8m
-BEsOAscfhN3Dp0WGn+eAuTMhcOvP1bmwzBnnanbHM1cxc5GiDlnl02RGtyVNiZUIRIwgYT+zJva8
-qNjclZQqgmiLrncOwL/box4qBxYGKFrkBWuUzXNVcZOtsBuo1a4zB4X87nMh//AWVQThC7inpG7E
-6k3ZLYKw9QejYGq/fHtLfyFutkvSqkDupBFxD0QlE7mpngpOjwmFbgKoVDrBN23USTj3dzOPR7X3
-od7if5+Ckt4uW1KeK4CPNQ/HVW11KFtBtBtEsV9sJWVt9vBcSfRkjkRcOchLuBHgaRVhg+A8xOGH
-flAyM/jlIK/fSy3IC1t2Uh2hp1ss9oFQ6TZ7D8jJZcDMY/kDcjNNPxSINlAzOHizefuB/ngGdrU0
-FkIBbrUmZOQAAyTUciQfvA/LChLsMI51wGb2Pv5frF4d6qItDOnIhAIB7tPBGkvtlAQmukj8fra/
-xq8PVe98xrW1RYdTZEbbltP3m7aw1aQd8p/8fqQB4WptDzNeweCtvywgQrOJOM8+nsd8nRjxmahx
-sGlNkXopVEQlqYJ7RcZL9v5U2FZ7tqHG433TqalOpMvP8tpbdk3+0aHK2ln7/l2nNU8ZZV4j3LbX
-JPvf/FJctTxNGaeAPC1AiJqExJAEtiQ2D932WK9tbhwSk7QX39ak4Y+JXdaIgnpLO6O5n/3RjyZ7
-Z14q5MndTP9gCltAyNHq9Q3ZWRliq4JC8e/oOSjzKRENuqGRg5keoMUmNzF4QnLburse8PWvtKFf
-R2/M/AbuSrxNoZlp/J+auivX3SQgPnhUlphKlmrDtdD1SqEtaqh9Jot6WqRFfkG4wcKSSeY9ahui
-SxKvv2j6LdwqEk75epflwRBslR1U1oA98A2ux+7V3BnA80fTv8ULI6OPbX/sCTFwEShxs9UhxdIC
-EC79DgU8Mcn/SBw0thaL5jMq8cM7pyiYpwNs1HUTjLmrZW9DapSwyg+Z73U7aZyUWolLxmCAaqUv
-wXT6g6tcUxuXmX5T5A52nFh1yfWP4fWc/+58guY+kDPNtbL7/Tng8tBehu5ciBXe6ZjjSitzBhqF
-yX1NLSjY1y0lHfXZqLrjCL/Wqx9dXnxy8sAbu8M9esKYNMCM2ZwlJZvO6iBBIBJThSdNWYT4tls+
-ryOlCpBKZU/CKshqlHrtJ6owzu1Nyt68meZIxNrA0cdYYIeKaneI1aDnqFTYCsuCxN4hL3UBnk+D
-NP2OHBLHkboBH/LGvQREoqObAlDU3lcSVflU7HyH3cMhPlz4qYZjm2Hr1xkqrPNnnTGJyah84RQo
-0c2NuWeyspXehKAE3bY79wThF6JfBcAcDxEuQcNhJiDPtHtZOLxj3o4uJ+52cRLY1cWma9iiYctU
-rGn6Lx0zYYCAr81nGCm5y6TPu0WaiKIqzFkbmBJ1LYQd+vIOoBaLYdorRtR1FVw5TuvAbMTcB8bE
-h1wYdm5xlVrB+ED/KYBQ1crfBGyYuec76rmlgXXMkJPTekc7KUcH9sDyCp0GSqt+JNBl5kRUvD2S
-/7CkPL38MFKLwXjORLlQJSQY2F4hayPkq331gtnBKTnjSsLRUPKdOGNN7F+mAwwVvI8I8hLbxET8
-/+puszRX0YBvWEfDWb/cJjrNn+I00Jdm7zQEBkz4vF7dDnZs+DbvUhscL+CmDOvYZiSrzuF7QP94
-6F3u+bFP+9X02OyJXpsCL33M0rMfdLaD143CigqziHEOSWf8vHW+B+6HYjtoZlFiuoUNVq4AYtTY
-rdWIlA/NphTVERrAKg9RypiS9nalgPodmmx8WltFELgg71qFyHj5TC4jr88Qsf1mXpFQOH/2GlIV
-3etXCbj8p+xZ01yPM4jcKD6el5lmBLHj78r+nwJWtGoytf1CPlZx/LuCSg41P1zjfS98+TFuFOJa
-p5AdpYPz0Lu3+TQfgBY4S7o5msGp5aB13bZtLWOxiSO3AbdvOHqI5SQ6JySl23QBFRaEabrDWN+O
-znIURfKEdoobtmUaFn5MoabDTXhLIu4V36xWuH4xExSWC0qwX0oa6MvFTXpPWdkVMw7poRZfKG6z
-rESAhap/M3U+DoWDMw9YyHg10vdeN9n3F5lp3KT3mByHIO+kerdgOo6R0WSBM99kbyRsTNp0qcNr
-efvBM5a5wMQT1+EQL1LRVH3DMyUWlA9V8kqdXnmZ8tW78/CNLzeCUZkC41j9Fy1O0bLiZw+0Y2bl
-ZDU3RTl7BoufxJB5aWehS9hzGA/9Lvc5hewkIScMR47ezHnZgJbcHbWoloemF2OIpCsqJ1Nam22L
-4oQM5etpLF5kDbK3ffqYravvrTtpnf3fPIrMhfltg3rFRYxJXnlGcz/N6CO9VzU5ys5Bh/vz9BZb
-0RqL26Q53CjyEFd5nf624574QswDRPOWjGjIsrv0odiuAeG8OIQ4nlh05T6jOJh4+WaP6A5EruB3
-8YH5ZrzB9f52RU9CGsievKO1XXfScOT8E+Uj8N2QaePATL1fNim/rqycz/+IEgF0u5hugmudHNnk
-YxOiqe80M70KGC/yE75S4NUh2GdDV6S23EyA98XW9Upe1WM7IQd9W+Jm94pmxBfCY8AQnf55rLsV
-N/E6Y9wgiG5TEFDZYDpt6EO2VED8da2EoymhNxhOwFRwqM/cBHJ8SqB13gOwTk5sBV3+1VFRRq4w
-k2Ldwg9JGKv5E4RKaHFpy0hRRv9ux9eWidns7K0/yj1q8zvD4h04xolX6dJ2qXdHunnmo5479qXt
-yY3n3nblWPLiJbSE6Qx64xcm0TcFhHtn+J1PwgCdgae+XpsfYvQcMagwKx/rUZMNtyMzih9JXZn8
-UqooWyLzeEKZ6uO9wh7BXiGYdglBablSSX9sS11NYoiHIo0bWspFpeVRsD7FvmjxkbSaYgQKgtDj
-wyMkCOjPHhWUsE81clIcKUs+EGjdGjos0wFe84sDA7AwW1lunPWDqB7cmHaM2n5nHYKZUC6IYxFo
-9Vn1hxeLSHeX8IWXzg1Fkd33j8ckrNLThB6yBx3t+d3Fom6DLjWZ+6H0A8Oe8NnvStCfmEJA+T9K
-mf8KRi5bTngKhCdd8qOmjqm/CEtAuDY2gFj2ZiMD/0PDUQOUICmgq4oe2xEd6Kg37CAf4vZkubur
-RmLp6fu7A5tOnFl7yI9wTPL5SkjL7xoh+kw3vYKhlKFkOISc+TpxEC0pjIbO2NL8q/r7RhnPlbn6
-rpx5YpVqEh/RhJG5Nv1MQ9MZvDzJY0rxYYxtcvKCYLiHxSskODMXboexUXP9RswPo8MiX7GKTVWP
-pCZa+PHOL1kuWiGjejsUJlg/xVe7CrsxM7dj/mTEjWlH0SYbl+wfgKxIrNF1mu9zWLYTTpdbPvzh
-djcScKaLn+3nNT5s6uKzCRN0k0u7gm+vUqwDxMRe1qtwaKqIfTieLp1JgakjuKFumhz1uTyAQKkY
-al/Nuh0e+Mx4b7gnmfwdD19USICTjAsJB9ubl7B9Shn8kK9JehupDfxcMzkqSdLRqorZcnQRP7El
-wJdMVpb6W9ytSd7gtd11D5gfc8pTpR4uIyHWFpBk+VOnSdhDOCFTqcEa15wazLciNBbHYPYYk1Q5
-ZWD2Cdgr4M6KTsNcW35CMAAfJt5bCsu4Wl5dt/zuIg1R7cuM/2UcBT0aJPInbp2dav07r1UIp8s4
-ZYEh9/dfLeZNJdM6nnVwF818oevKpMWyTxT5092h3tJgykIdkZ0X9fHweBkU+FlKlXwYAyab04vK
-RAE4jY07iLq3dVqPVSnMHH4WiWmbbvytpTz2sPjZJcRs/1mTdMAPzl0HgiDmPaO98J6ipb1P8fhz
-DJJ3axz+PWDvypkAcVEF7xBFNMxHYToA9LjkUkgjDAR+9I6WGJ+2UeS2skze7HTdzQ7HIhpyzaCs
-r1eRRpz9lFzO+jl5B9COA8FosW6QJdcVm3Vzq8vu3b64j5iRGhoX99+Yzc7zwe7guZ6oQe9Q2D3c
-ZvBVvFyDbTzRRi/0wzZKZ6t+xErfSLVeW+ZlHWPxHOmo3arbB4SnRX+B/jNr0jZFQumeBNwHnnY9
-xbhhjvERSLnt/BkLhCS4TzAAscQQ7h9DxDHOBJ5nZp2SQN+wLud+rw8Mt3xvqRZ0eAK+MBoiGN1n
-vqu7c1oqnO/tYoJfG/myrJW5hagAGP73MQ7Z9aVCgxXLnga83Ab8FEJo+man/FGndaQpyo/yUwZd
-Pr/Qu8rENvAc8MQQcXmbHWjKESMBtW1b57LBZyVS6Dw0Bqn3h2vRbEZtxrVKeiOBzEd6NMhfDIOF
-qdoJne30jKvQ8tNIlrZIwcOyonKUu6yAuToH5W5zkt7P4d54kBUyMfxzYlBZvfSzL4lBrgS9Ei3P
-NZ3FWHNNcodEdCWulPuGVH2kv/0PbmPigPtNYQZyxAX75B1b2lC7/nU5lyRP7uJl1WzyS/tIIqHg
-s38SpfbWNwwYgmwE7nJIut92CrNCsFQRKS7aVDyPpFrT8M/ea4GgYgEuxokOdp3AgHMcAbTqL3w7
-otvu490RggvyRcc6UHdjLGEXphkC77D9eobhxMseHQ5ID6orBPvIqn/B4JrrIrauRWXJOcnSu0mN
-EnvVcGV9OVqwi2e4oeidVTFYibOonBqwEgWPBkXccPX/JwC/L2ZhRHD7sS/2PhuGyo2UEt2fxnmy
-fjeZVARVK+xPCoFBuslzagXwIxfGXKHh7nnSuaqDawu+gGJGiQ5XRcuSi9Ej+14YSh53GZRSvAyY
-NzGjA5XtQ8ObzHMR3ciHN+ofvi5mIl9uZJUwBB+/VF+4xf1jg65wJUAtAKHPstJ/eWZD0bCpUes1
-b35l+OSgN7KI0S4ZH+4DrXB5do/FwyBLVgdkXv3YrQiomLmjDQhFCWpjO3YOfM/hdHqGwg8RVCTD
-jBtlklsXKZEEHbNxuikVJT52Rjrf0oAskQm4DXlpibZfH8mGOdwuCoKOCJP0bC29Ys7OwccrpVrf
-8gYjUKHI8+YkB5NcaWDQeRdrpqFDu26+SrbNPJEYwLHiTi4n5qfdApkqYRteYchbpNTmr6Po4fXK
-mfhCSO0LVSihnz2hsbJsOIwrJ6tvGph7u9O1dGzKG9pCCNuNzQbTg8xPF0/4Gu8TCyAUyYsrcNv+
-kB3pjyspQXcoo6MJxLz9iVZTfCWASieKtu3BILaOv8WL4JdIMBkNoyf5dbIlMnVdjXM7WDAk3Yv5
-yl6gJ48Au5WPk/u8R/3gk/a99SBgT/6ozOFHRokihbX0fjpWcqqY6q56QT5zzYe8Y4frceAUpSjB
-kPV6tIh09CldLJYki89PJofYwWPPQ9vw+K8Rkvj5GPT219cC78DxXa4P49Y46WldknYd/Yfbjjq4
-Mih3BthG2syqWL029ZI81neYA6/UO/VHsCmyjlb7sqNTGSz0trczh/eyO2fvIFOCEfYj1frVBnfD
-j5ZWEKPWooVvsWiENHbsJK6Qaduaitk9OZcy5RRcro2OtVqmahVISM7+6p5df1e8SRBZ/yeNskvR
-8dTwB3MLRJVDvsyfWF6uFtqf+tSmLF/hT9Piosa3JF2a+kgp2tmuUnt/EFiB0HKVJTqECi9e7Ird
-CqbOyxvvAaLgs34R45hhF7bTGDdVRENTaga7fZ88WGzoYXRanq+uci67rb286UM7AZtT5Jz+W05p
-ODvWS3a4hk4JcCDjCVWL35yKLj6xfwsX+pi/p/SdAXrN1QOw3o/gIToMLlbtsyjd7KFPfbTHPBJL
-A+V9GD+AIT1Wz2HPtpM+kZq8YnC1kRhTBBh6Xzkl8NY9ULmCPOitPBZRxYXBYdKI/VODUIhH2fdM
-aNuXXj+xg1ei6XkxYa1IJ2YaA0hOcyJgdUl7j1pDNqFwkWGOfByAm3eVPEG9nyVsa5kZEYq2OZ30
-tJbLWzqJCKHeB9PI7DzwVczTjxUBEL7+8cfosPnECLcehJ0ct6MIsqcAYbrQEypdy7Z4+Xn8qKgf
-NDhZfpz0VNZgPKmKKA+O9PayXhZlWJ+HgbtoMFQ5f+y7IG/S/eTWqSvzKuVxWKIIz9/xeZmd3R0y
-YHLyc5kqfloj1/vs568VnfWLfP/x8br5BiDxL1QhQz4vTPwFazdf5turvDAJhq2NCulvHLeemJPL
-Cfglx2iPAwan7fWPXUkHlP1HwopwPOXfV0oQi5yWzswBqhIcDC37fPJmZaGtWzJcsTim9J0JUyZw
-b5pR+W/I1ebCndPQgGOQt6hGd1E2X8sX2Es9XWfgZ4ldnQ4qulQoVKIduQ7d0wpFgQtkc530gjS9
-3UxPZUx4SCKjWVvXiqIF22IRU6/i6kJ2T5wgWH4PV8Qt76L/yfu9KkzY8Lo9bSrPDGXgmzblQf7s
-2rrS06CT0bAatPRb8JbTaVs2U0hqmujGno8YDm7Bj3RNvSkMUnu68Jgs2fviXzKdmmagyEpJ2oRA
-9SmY+6yiaVy8wmfsb9Hwz64kKx+V4OCbkh0EmaToiwkS/2VgEQs+tjX1xBub3sZQpMJ701uLjmz5
-N7jmrLFyUrS9ZQyogXa636KqN3qEixCbJB0wXqwvN8IVEkc7nwekLBfQQm0z1e1ACrlXfda7Y4lD
-z4hGQuCuQZetnI0Bn0VWfXra7y3Da91I1GD9B2z+saaygfAyfHhNkK12d8+abPQtu4w/SjdTleiY
-svc3YKjr5gnIdQwNR+adeq0FAWvK3CHhVbUbAZYswNXBUe6MdT3+J9anMybePtMq+LR9rDUCoamm
-1aQZfCIhlCsQx3fDI9d/1jW7OT6Juj+OqakVXfJN4hkJLK2z/rdRegD+P2xLkVEgUfgQcBK9rlk1
-DOoQHaVtkn1nbBPVhZ+wW3aUdZzOc2dRhGwuUVqmfQgg1rF8XyMZsIMEfKhFCaR1pQyyHztZuiUe
-jRZ9AAK5EDhmbi+ovYrYZCr/yXFaJxYD7Rd8e3jPs8QB+iZ+f+X+NRLHHzyiqIVKezhN9MYaualG
-9QC2rVgzRqMpMYiKNpv++Lm21nYeR0bahpOp9OtpvyECaUKiDJ0tVFAWBf46mpGn3Za3q2lYKEze
-+NKCHHPJfizhL8O1hs0tI+lWuSV7a+bvK2ZarDVHYr/hLFm/DEWsnPu4TbAeOfUTK4c2JF0nqsFK
-cZJBTMwgklHEEF66BKYbjxnLW7a9TV8mkdtMPoVl9ChIgibSiE5NY7PlTe7v7TCJ4Ni7dtGCtBaI
-DTU0pOYes+3AOu2WUtW5R3MugwLGn9uHHfwunfk+1EuEWg7RI3C9tx6eSxLFLPcnhu2ACWhBsP1C
-NdNP1MNOz7K4jI0vt+MHPWsSIjPWg+BPce04luKuOSuS1YsSuqmfuQ6bmpQag7/V9Pprtv1MIGYG
-H+c540gTfp5NhCIUuz7EhqF+9ThftUDiAg0aR6drFcG+Z6wBVENnL/LPoFrRzyxUfq1X5suzy4O/
-TYNQqaZu88LhvmsAMU6Vm1v5DdjSfoRmskROHpnxTk0lTGm00UGERYp6iHVfC4j8+K7aMf/QWQuQ
-Ke7QRwXLe6TiPkD4Ts7zVti6UuNQB5CK9XmNqreq3VUxyxci1v4rufggqDvBZulSe2ay0DgYivne
-sFhcwhXoWQzz1b8/ECnD8e1QpeCYdJScKPXYoQFU0TuyKpkKBVoDCiy6ze1JTDKctO8YZjCELHhV
-lSvGCquIq/X9uolNHy8NlRXFGeY8MukCCof0OYroXlX2G6TpOarNt+OpXhcAF6Htp0DCFQ3MCg0Y
-Wu2+sjIPwLn6Gd70bwWzobkRmSBNy48Esku+aINsiMBvMNIY4qdhULBlUMG8TXiwEtygr+mEqP9M
-AAVMbmusM6Jx+pm+zDRmRZ3/ztRGtxXLjLgE68DfqbeNhulDM+UH3/RxTWqMft5hGsFbU1A9wsYK
-3SKv5UbMLY+pnCGrKfSz21EBEnGYf4oPLMqOjS6i21OGVKtvWUxLLMWutvbBiEFFk/ayyjF5Ui8e
-XAUfQByL5NThWs9ulgHdos3G6EnR7WVWRLqt4T7YZ3BtnbJo1NcIMB5Cl7kpWvQK1zWI9fpvL4+0
-OzMfJP7YL2TnYNhuMf6OPjIByKpxdxSqrsrDgxoZmY8zsKaU2l8dRn5DmYD2RlQjWVmWi/VV7agQ
-XKeWJhejknSQCS0VP6QE2M6QTaBkg27T2v19mGK0LX0p8ZIOFjesi4tbznM1exZj0slTsJl/ss8v
-BDrqCDCv7wLZIPyc6tan9uTVqspyGpufH5I6sG64UK6472gvqMI++7/we0m/J5bTE2oMbfnTVrPG
-rD0ft8yRasQPCkiDVvXkRCPGt7VIqcHaE45enZ4G7Le/AxEaAwroN8be4C88hGKk5tlUVecRLllT
-Otu8DAkd0iSoW9+5x+AFawIaq4gsP3nMlUDJwjrhkeAeYy6NtqrG2UHbhTeF1Lu/nNiOKLCiYou+
-90Ocl86ocr4YwOCazbPimjjGEb+GDFsd2UWDPuX5rX4z8XdfsQpGJ67lA5Ls5xgrN5a/iCqk2Lyx
-PCpCihpBYlfPuzOTol+B8GLuZs8DxHvn64wED37Whyzc4AOIVkPLIdeDpAb7URHoKToIKB4BVM2s
-Q6uEf4GYnNY9pPAYaZ6myPHRDI1zPMmnHyOSH5SD38apRK3yvTLUOfyooiwVtg0Z2Wnc6njfhZcc
-N1cUR3USal6mINQLkJ7Yc1A/wz+BcUecgrydmo0LNucrQiOIQ552BQnIncTn5fyGkfm4phqd4HoW
-vbtO03LhG+9P6ldDuNbATAH0B9VC6yYdqPs9zoi/bCshF++7489ih+RFCRdGD/G0X21g80SxYS16
-Q9CqfBy5o58X7QWag47m/XSjoLBIk51fHmVxkFwEpeyjGpFppFACdW9kTGfO4/upU2QmgV4pR2O8
-HopYBvZ59mqLJwnKFliDT+4QI26pYT2uB9mMJlXM6hI3IcGWaWqy7CR+XsimqY6mD9avSxXALYsp
-jh5c65B5BMelpIXAMGzFBUmfIjZLI9CDsKTxl3s9mQL/1k2nw1UmAeQn68UoCdUVfnszaPzwLzPk
-22ovqF3cSitAGzDCJ8aI5tvof/gWGI/0meibIe8d72MUeaV8LqR+WfScvXJpIgzoCjH+1WTyt8tH
-ihr++11DHqwVZF0fJ8yHO+EXDv5ViqxEV5N0T/1zrcAtXgD8Kx8P2aHfOwNucK3zi+L3ou+iKKie
-l+5fhxsbsB/a9uEs1bF39oRMIOEawp06lKRRYp6LiFXly0BWtbNFDN9G5y+8nItV7kubMR05kv7W
-kXPvToKhQv7oaV4MKObiRhl+DXbQ+t7vbMWaLPk+P65AluF4g+3VlgaUgc/89eAQe9F3JN9n5YOh
-3WrXEIvocZIg4UEK10qtyv7/Yp+hhop9+/90DDzmxh9X7r8OESZ8wS2O0BVIJ7uUTPZLIQ5PDSn+
-jyUAlAbCJcbBF6DTy6y75nMjWEr6vfJ45kWE25N+b+dhoXdggwmMvR2dqd8lPoUvH2UcPXlMhrZ8
-Lyy8HxhI7KCV7djxRHbDADEUqI7BZxJXcW2Nz1j2L6s3L9+Qy8QAsfd7JU0jlpxsmw5ufGAlAmUo
-Ih2KdHAbPpN0ChWucT5+TpPsmvVdv+W3x1xFnoSVfJG4weQB/MhwATv3AT+jGI2C+d9lP8+Q+9XF
-VRzV3lmfTbQiKrEui9+lIXydxMavUVuEPLq42gGCNRrMYt6ot13kCxsletO8lU4Y6IAqviPEBvO0
-JrkRwchTzvu7u6mLWKb9lZsfYJztcyUs9VvpyTZXqUsZt9yYfA7VJIYw4OqKIYrV1R2qnHPo69yo
-Xk9wOHfWdL98CMvs04SPH3V7VftbXoyGP49FAf/Ck6wWG8eLPymh8ITZchdrtrs+uNOpV9lD5j98
-7I0T1W/CIFUkJ6WTjL1f2WpR9Z3OfTUiRblx7DkENkWydNO8draZXTBLq3ss/8YAaxotAg/ryXm2
-/FHJ8ZTQVib+7MnzM//H/L4Lob2PjKAFHfQl19CXgvfAZe5zSKVccpvPzVrdxOETQmKp5ifEkAAU
-RJ+95TInG0rQ2qyprdW8iC14h25lH2uLkSwhDlR7v+XFWefUkR5r8nxaTjbtk4aw035byrFLHzqH
-7xYBt9RRkRgC7VivKbXXK/95JLbPfZdNc3x/l2zUb/Akx8AVE0+cZpbqoJvKwN6Pmf0iImTt/h+I
-BPfm4ME7UpiNlvxkxY208uT/2eXccBoPaRK2JNZG6n0xUw6XmXDRVYdDsg71R6bYFDELBwVP3JDK
-hGftusZX5NbCl97LxcW55B81i1+SIRY9vSvKjVUjYEIWThqZxfsUE6LjY+jNLBPBeawU7uMchMvh
-QvlJqHPHbvdgexns1B8foqaBZ0krTaygHYbqWZ2uTIIoVVZhRtSuboWzhYCoDFviFSbWbJ3N0e+P
-WE79IFjBxuChAyaGmPzZ5creuQiZ6AC7LPzDcbaDUatVqXOHbmCZ9qBIStZtLnyo/W6S3dkbudyM
-CLoyRTO8SpqTrAlt3QiKExlFtGD/9ErF08zRNnMu4s8CNeh8o8RbOsQFOrECePgDmK2s2aj5vwp1
-1mAAr5rvsxQDUk7usNDS00zhBNGkU7UX4tbqh6PECuKysffVLVZSLkZX9o7QYijgRWZTDA0Z51H1
-xqm6P2sf1ykneztI0nG4q3DNrdTKKhXF2LU7b0Epv3b1GckYzPAuLjhsaTV74teQOJGo1JBggFlL
-rt6Ivp5b4stWpYTp6arOQabra7bPWVv0D4Kl6utZpTGRlF39Gj/D2kQyZvw2kznBdV6zi6ml3oMA
-y1ORn7PAsFW1E76S8Gg5AT7wDsm8g2aO0AnHz3KnyxFoYonfq8gLVLapRf5SfxNyH8hV4k3joeWV
-pm+IPN1GhCBwMtED0A/O3WvQYE2F8wMvafJtBioeWcPxyMQmuSoLMw/Ypy8KPG+WJwUQL0nwKPn1
-rRwyn0nOnhJ31+7nrJqLMizUVj219jjTVK8KlnWSxoGeec51OW52JyakL3ikYc0aUlFlDoXldth+
-TsQlHwvWwtl0cbEKunAqGR34DHylD7ce9XVLSgSduAn0XCzgfofK5pmpPb+lBRLWCJT5xFRRCv4E
-WN+zV9ISTQWzf1TbAggFqiDHBY/aHVNFUkT5JLmoUyQt2F/RgChTvwtzDC0edaMO/SC4RRMTjrNc
-tWoqc6kNNUTFUWVP5yq7PJQcdtODG/1lYQ4HintyVMAmz2m1YBDbdcqHG0/pCqNtMc/vGwaWZVKM
-ImK9DyzSOJTwvAap6sSJH2CiolBVEQEWFGQhC5I9i2idpryZOD6bgg/KwzxRj9oe0uR2UncQCb1J
-GX894ugaKM7K1sX/WFPpFoLaru2huMRlid19IXZ08MOti9Z89/Zwr0nv5NGdVcKc4O2ETBpVvn3K
-yJQ14/tXIOVxW8mRXQE+VBrcg3hBHSGbjulrBWBzKzdNSXdF6EkRvEB0xhK7YkMkwLc18bKeikgR
-Mxourcjd7wNMBeM8Ev+4WXoq70ikLHsB2rQLICwtLGpLs9xMmODtgUMNhnyR0r/YzpEgyBUzYJQX
-V2EkKzhjF1G+vbgSvPNAUnZlQFbDHCnN6uk3Z0PmGqZUX3Ox/3D5Z7DnXlAaO+TauG2ECAdGH/vg
-qLiiikiL0WhrcXh0SRlxvNGbhzL+hiY3+DJ6LpX1RTzrF+qF2H9cDa4Ttqxn3+ZOQrCKkN/SNEsP
-mkC1+D2l+fnEEJ51ShIV+2HeQnlMOpfOqM15wBt0YYFdvbZDcVMZ/pO54HoEEVgzvuQetKZBMFiK
-CHrbTHpPqL1W0aajqjWN/9otvGAFwFmMcTSS9NraA/uNcBLpMNx3X1tZmJOdoXIlVTx2QXS+V1Fy
-fikHllsWbQuyXBPdAvqHejwkY2DJZRWuhnv5VB3WqfFlnC8iWV4uLoerlu4v1mgMLOXjHJuCM0MZ
-x0/tT5sYyyZ/eINnecLaWnTzpJmHnqxrYpbo+4gduRgXGYbHGJU8Mo8O90Zh2JUznv0MJGhAgFzV
-qGlV8MROr/YXIPpj+GTOUVyMVtwLEa4EQEAA3DZENGLpBOp6bMDsDgOXhQ7caGEIW8IbkcDcKjD3
-V2OJXfpydlaoH8tppbAVxnZlNDpva+9HPn7QZFSHIaPDX6RTaIhapii4mCVIlFP6ytmvmWIiRxq5
-ExQQ977mOBFzLyqHEm5tgpYPEfcWqJZxmk78dTvh74Ve6+bfLndoOnjt8TdD4HNTC60fAG/y2Ktu
-zYeEXsSMvQvGFC5hwc/QXNShm3sDI8p3S45URDA4eEaDZ+mOvhsM6z9cMVj/DFzcvQF4EQ78RPeG
-eeAG0alwod6Z0LqOqSQ5cEo9c3fkyZQFh3A8M8+Tzi0X9WK492Tx1bP/V+bOzK8eL7og/77HVYG8
-KKAvRJBbFGx0AKkiRSeRv4U3SKsbBEEdCtTZw7JdaoSBs7FlZNWlacgA7vJrwm1ygqCWdJNHUBYo
-TbrCTIjgNPDRCnQk+1KitT3eySVf6Nw/YkaeYNt1YuFCST5sATNz3r8bW2OafaecqBEnB4OzcKdU
-X+dGMCChgntYccw0gb/O34hQX2Ek+Px17mhIipEtEdUfW2SakZY6BswJ2jtdHEvde5e7AHuXcLoc
-VaTW+J7IT0krUSKeo2gahhYH3bJUfZNiveO4lMui0GvdtFvhxo4aWDp/TWUIl7Tiop2nfIv6Gsni
-WdjAiccogCMYEe2U5rnDLSIMWxjcMyKnJ3R3OjFuZY8iCYAA3H1P9WMdr3i+BsM6ppNcGbP72Ydj
-nNIgBCZipZEunZ/0QLSJ0yhStqr/cUvJ7ME4p8vUJnUMCJtkDMePIHnNUJxfo9J6kFhGgfNwPKtt
-Tmf3dUv2HJPwDubuhRo70SAw8rc3UasBtIWNuQoojJmxovnf8m3zxdB3jYaYrwcVn8+X7XXMfZ1E
-kyj9/EMD+iKbHU/kV6fLrDm8Cs4enuH+rF5tnyRXxpiMIqbXa2CNr+OTOx4sfb/rReh5X8+yKRX/
-AJwp9uQ1dqBYZge1L1ibOlgzkHqeqw2wMd12NMqhB47QxnZvOpFW9dA/gW8JQYs7oq/yJqsq9uEL
-aPcm4C5M7ehj1CXaeF470Gl9owk63BpsMzdPqceEGUFPjU0idWlo/x3Hb0ZnTeTQUTR7ASRR2o9/
-kNx9mr+kA18JHZU2nVgnXNIm6Uq48uQWa2ak7Nfl2/jIjcWXarWuCl1l3QdAe1hm8ByRdZd8GmSO
-XuohM2hv/BJ2fCkK1hVKmC94VKcUILcAVGRquICwkh+v5Zkolcw+EyHW6jIdQZBrO6GbB1BfgUOc
-Q/7K1BJKS0qWW6jI41VRxXD537l4m5XtlMFPSrUmC7TiXfdu36hGh4ZoXynCi4WdGGVJTv2s3RHs
-B/poTDMNXAsbkFZ2vd9FOnUQVp9mYmcQIOCSQ1WQFin9234uvjvoblFWOYQWf9+UZjPSnjRDBSun
-7/mc/OBeQ4/JcsieqjEOI8DAQpaheNFYYUfuyhr6RqEJ7oUtpp42RLtNwK5lOZ7SEgi8HLFwn/9N
-MXiYMnM2+5CPhCysyIcCQJ+9cUT1ISzi56TyQDJDkUhFVobFqJiMqt9ae0WGwasy4BH+Uwgbfr92
-LUFP+JJyU+3IkEJpiZ+9pZvaSvRWKNCu7BN9KnyWjUA/3uWFMVZglzFtR0lM3TD2o/ca6UXdtsvp
-Vtr02xS4SZ4FEtXjaD5q5xEOdbIq6QqSQb1co4dZ+lNWjq9YNkoKTjaCnkocf1JsgIZDahtcBKih
-iOJtxzl/B7mvvuQ+VbRN1EbDGSj3XXAxkyoQbkG33914vCZaKACPyJFVNs8s7FyUD/VWfwztcmpN
-s6ELY/uUhegOPXJUhsS/bVrZVsZz5BJdFIp0Lg6AQuGsFTtCTwxJB+ffOTRJDt9BKOJjpwJyx8iT
-xdVHcjVkDLfQrwQhOcMOA4p+xkHP28NvzG4gde+/rSQhKaJKf5yqkqUiNr//I/iqbv4fXI4s/MZI
-2RrO1DVoYaqCOX0cC1WwL3HDDgL+CArqtJ1bxb2Div3ZSLVBx2yOREaDknMywmNNcI8CVxbHaOys
-7k/W9FKhF1EX/wGlXVUoMNvm2OITrALctiSD0O0w3z0icyaSZelfAXKBpt8rPxXo4ZrQuo+a0dky
-eR9yXTl6fQbp9jDCEsckCpKJOyafzYrdBY/zYBvAz1SVoZZZ0jfCAAF+4bI58spEVWxeln/frMvZ
-srUgTp0MPZxmfd6UvtVba/hKFBiQXyT0/i4Kx641xzV2M69FqEGB8Vhw8GtCAKWkKtHyI7oGVX7l
-a+lXu4xDWZ/mD7sNcXKehK6bSSfkZe7/CACx7vCUYIkjPYlgD6VPA22H6DXEhbnf+TTEiohjc+S8
-WKcfc5IbscVq0VM8lAKH4ghUEAyymT5JKDpmOVyaXi+XLjXSQOaTj0cBcJR8YayxkSA+FL9QQWnk
-fS1v71Lz17s6fZqUF6njBw4uIr1P+gbud91ka5LVo96fIxtkb1yhIIyR8+jxqrWUp0pzlp57/MHw
-H5ZhZmKFWjxUnRYAB8g1BJr0K3ZlifcQK9aqV8wb717MHS9QYbBcT27F9iMDjfg0ccbXNF09yhGL
-dqWTlsK7DE82w+vwCfBxkOWWqdlGyv8VOw2U0qxrOxw0YTHkR7AbUSu3zQgOikG/BF5a7f4iSoyz
-YSmWpNLISK06Cq6efFuiDF1p7OXZwYNBhpagHeJAFjJ4o31U67wZTOIOFr4jxura4LU1XkLvATOx
-ESX3TnBwYivN08s3rERQgclpJ9Jq3pTJJDfwrfuzqWWQ+jdm23hxrqHdEVtVMscD/eADdpwH+2m9
-UaHVOryWhMCXO1WWhD2Jud2uZo5fEToyiJFN07b4AJlzhoQPGA+AueET8fSl8CYJAXKLApK2mJBQ
-2mI1c/q9NnOWPq6AxplAXBbLGbt3PfgbnENrwFwhOKKj2dQzXjxUPbbYWXouOIBna8BNL7d2pryV
-XOW4XJQ7ebEoPhEnMN9MlVU5Vr5X+Ab1HrLgldYM+GSFExrjhTRqFSmHDv3vzlcdLolCDE2uxdOt
-zJYEPz58uJzPqgzhWWkNIOAsCuazWxIzNU7zsg/DZ/oZ9hSHuMMvv1Rf0JVUogEUrswPXIggcz6b
-JHM/0O91kb30wC/tS8pbPO9npSLLcWMJtzU6naIHmY8QYkQW+km6VoVU84xNkA11yPq//BCI9ayq
-KoJ4MzE82kewhQXhfPYRBR7QDvEkiVui2H2b3tYhyqtBpAM6ebNBEbFjM2UA6c2Hii+GEPiXsT5O
-/qV2pSi+sr9HtWOSLC89GzCD0/czb4przs9FZF9W8G8twbpdUbiL++42JA1MrPeoxHtwqzhvTtQD
-dGZoAdRUN2gQtxpBRXqIE9IAXJlrlpE7p7M1qQCjZ7h99/BG/cj1bOgOy8D5p3ovXRyHzGRUjcLk
-eaH3mx6JOsY7IKRLGm+MXqleiwcA+SXBl2055et+9+2ZgJ0lms5UWaib3EbOD5/xRSdUSr4+069v
-/i6ykxx8aq7bTOlzK81H35OE7oVbWLxBqB5ouTOdJD1DsFm0oQgOW6LDlts2jT9q5FxB5RBJ7kB1
-xjqxwRbpdkud6MpMc5+ZRalpclTD7InJosXPy5563s0+BQY1ZluipfIMOItTXP8WdDQUqa5WaGLy
-ApV8qDQE8LqMd5gBo+zqHMlyqQM4CXxs2/JF0mHkuzYB/7jasO0zTp9fA/ERb/hvnex56HMdCNk5
-2YCrWvR8NOiwsQIBFSMPakpHXcKUcQJQdvhDYihvzdp8VL1wIB/S2H3LzEi0DTRdbBUviUNKePa2
-x7+i4nTxcor+uuBkU0jui4Amg/tZ0oFD1Tah3f5Z8z8gL1zrNdRU/Zwh2Xm8AeFoQbVUHEYhj5nF
-ywnpKZItoawoA6f3Kxghud89OBqRNnNEd9Vj2dos6zrTYqyZuVJI/MWs2UKVHr++witAOh9Bb4dk
-nR/Qzs+yGU6sgLZs+HbRIJhs2STiSuFW/LiByUTl2roG1p9L7n8nJalFhLfOQ8cxQ6CDh7y66yJG
-5nvEWCxw1QWL2NQe3M7uGtFxiIsfDA1kOOJ3gxpmsJzeJWc7nzLeDe+lXUyMzb5HFHtu2LjUyKzF
-ugq/ZpF4mp6jTH0Q83J4bP116IpTIr4Rgk60BZcWnQ6g3TMHzDajJE6Sz3JAu/q6YhTPvPJ6iR8h
-4JLadyGc0278QLy+LLkjDinokDjtk3qM5eJ+a3moWzJHro0pwCfeMRoHEU9PvqJWDBQbKFeliT13
-qLLHQwE8OtG/+AyRA+ZnZ1hYFiO4EwKDGzX+yFPmyfy4MTqoMG6r5hciViEL8WEt8Q5UcaZXHe1/
-Bpw0hN2e6ieGTJFeNdME9knKwk/p8gzeHZ3Cxv4XncyDSHDRDeK8otgNwkyYEj3QrhWh19Ee7TSg
-99Rk4A/xb8E2DMi4jzTbb7PAVhMcGOqtnvinYUsMqkM0e2+DxiWJh2isFdMKAUERswB2AeDMk1l9
-Z/D/v0mopgCwqfCMdRg6xUD1CCNPJXeRWx8MlUY1bnK9IQ1bdjQR58jpaOUjpLOihfH1i2UULUGu
-Z11mlkdseg+qy3gA0wy5X2lDVS+x89Gv7GfK45f4Mn5jg696p2XCGP+rM8wRV2LUp6c5gN/SFzH6
-l7UMF5HQ3uUo7rjB2vJAvJzTsOzOtkoqB6M/eSDt5tod6OE2LFoYfWU9ueVIVMLKmQQmVVykk5LA
-cPeAgvyBzuIgGP04RyuMjTcrOVN+0gQhsUSdeVN5BMUKyWA0YYZSDYbEqUu+ZCAFKvJxW/p1POcH
-IuQkECCO8DD4OSCNCIusalLInkcw5r3vU+wPOkX5pZTxIXdX2yrs+MmSekIHSc/a+A1d7dctxhz/
-YWuX/pAq5RccH2JclITcxQwsYWMVIqCPxipF5kpOqnh1TfawIxXD9Z73j6Hd2xMiEHY9gVO4ayQZ
-iHr0eb5stlZ5LYQhzuCyE7BuBtm8eIKn1R7rKi06wPnkUSp/uQS+AkM1ar2hYzQLOzQpaf+nlT+1
-D/A/ymbxExHg3uyh3RiMUrEdu7mUWbYmfEvSQmXbea8x0q0Rs7K1fXu7TztxNCTeEQR00eN59gll
-EVNbKZNgjCONE/yL95bG3o79B09mGlrmb7vuElC84pXjFeRCP2gomVQmuLtQ+rqaspJlGF9JTqnK
-PUhdyJ3QMhjLSd9oufcazFU68BcSsK4DAMu/U5BKdloeunOs+gxL+4D3gTyUqrVwEqh+bb52CSZH
-/Dn67vse4v/QTMz9CGwvleHlAAvn/qjJQnA7AIVJ3abTvdQTRQOPGA9oX/cImYmAgUtb+sKsYSgH
-9wI27UWFU1viAPcAigiChPoL/XW0TFko7dOA3dMiSkvNmNziEvl9wEMUWSVecJ+ZcjvbW02Yl3K+
-xckddldbv9WE3IOIqRiSVuXgaDEf/DHhhI/iDrHqKL+MrLEEqAwQf+5shOf8EW+DUZIk7BgVxT6Q
-NrgjpcUnBF8ke74wetT0f1AND4fmBSyo+aWWJ4OReI/Ahk8jp0mcco1NX6OupRsa3XQbbTqCOa0S
-S9qRBuxBYPYj7kE9lV4ctu1KbKwnLBt6gwfUrZN1JHmVIdOMfyPMHxh1bKWZ1VHhLuH4Yndaek39
-11h/9UkjXwOgQwtn605F0h5DyVx96vTeCQQBVL9CeZxsCP6hQ4N4y3OfzFvPv+r6u6+toC8/g35I
-PO496xqmWP0jB1FocCn+naKpDa/wAJ9nlH2iTsqae5WKObkKFUDCGH+UqLT6yrEocBdmx/F/Agtq
-5FPSjFyzX5/rqCtFokhP20N3YUDCHoBrq8/GWSbThy2nm3jqLyNlzmvVVoz3jWmK9pJR/v3VElF3
-BCtC2xi7WPXBF1tIWcCWhUkXgPkuoOpUT06weXMxfDyZams+3jU1Z6ATWaJNRgzDY1dKZfn0j0j0
-X0gxi8zBt3qVPo5v9zUsjdLiPSWgr9MURXZFJqI9Lj5prESA8RzetiFmeuSxfpUVMTK0AeiednPb
-vc4eMyOBWS7HYHmiO155Yzf5to+5Lg8DmUumiPovVx3V4BtGpYwtyiDlubWhILu6+1lhilJIHYFc
-zHbUIwUV5pM9bwkloSV+uPaw4MS/dY81n+r9OBrGtRl/pDcZ6Euk4Wk1CiIaR8Xnnj/KXFb3hWKk
-XJGW6Ko62/wpDH/Wr3D43J8hVEnsdolgDDhu6nu6U/GXK/WmSp6Gb5OcfRG4t6lQfqnqQcsvOAdW
-BFEJHN4lI1RbzfJoZ6SJPEIxvWQTesojjgJBHHznTIFa1fJv4dp8bBLWqoFAjB0nsY07mhL2XX6n
-aDxn1XtQIjxqmPDkY6n/R7AHo//9NMd0AZdK0pilT4AuuWR3hLSb74MuI9x4Nyfe03N4+dF6lPVz
-j8pjELuUEzPQpLvYZc8kHUpg70xqLSXEujMGf6XLgMCwOEid5meWm86k+OxpJyS/+1mwdhoXvmkh
-yxRM6QWeVVWUwzxWOGHfU0iXyIw7hSvIcyFQXbPycWbfRcCQNxhfIFxRFW3TuZ9DWtfAy4OFAXUo
-8JbBnIIDpGzK6Xeq+oUANGhQk0tvvcEFc7SrxMlE94ZnqJj1pFyANM2sJOxr5ffeuxoGhdvdWAgf
-eB34obyI5zQXupe7xToCOntONb5W70rn9Fv9Bwk1OgTYclxhggCnpF874sgUMrEldhyeasl1aRwj
-Yf70Hi889bHoFGOZ3ZhHCNw7BIju/UmZ+h1Hq6W7rYpUl5GdnIuKsKGct/sblSe4Ks0lwfJls/uL
-Lcg0ZLw5Z6s5ntmbQkSd1J2Rb8SUv0lNf74g5R37vT7PKZcgjWY9maLynWmC479+s9EeWfrL3v0O
-QAyFNVXbEWxnajISaBv2UuOzN8G2lY8xWejGjHBtjWxAOI5mjlaljoZkWzWtjoJaddUAsIGXYlyp
-LSalqsJ56x+K11/ouIUZM4tWCs73gDt6Khj6FjbAQANoUozrHSMkJR1naAcgI8mVqihXx/1dKSk7
-h+NlHYAD7PUBqYgMfCaRmRhrBBH8gIn5C3aj8mJ4lKWyKVNGSLIScSbWUaiGzdHg79GC3NYvmm9G
-Xy6rcvw01tbn1jG1kblDDkX8jgaPmwsGitQ3k1WP6xRbmePH3NHEw66GVvnWTHxCcKgx9v+yqHLJ
-F7Sdo3nr/A0G2rQiN83ZTrlTg42lYvaaVnjVV6681l+W0T8xCchL2215/KYrCWkEeFq2E4vzZ5YE
-R1atWWWClLd8kcmupIQ3eo8ZDfQSnaQeTnFqyTVV530T/grEJMmbqVE863omvv40Zuya5S32Q8Qp
-XK/AZ3zPY7iZ/zBriArG5OfrDtOZnNoN4QR/pZX9zqvDr8bPsC1JWn/5pooza6Hve3i97EbE1Eq6
-memoO1BMy0LMJDNM+0MCsAnN0Uo76wglRYQnFrhs/MqOw/Er/5Z7POviC6Kb31b0XNEvQDUCfHOA
-oa0sdMogElNyG1XiSlX3dkma2aT+QwmqVBMiZHm1p0Sfk2AikUSd1bkRbT4rz42V/jTXhilofCFV
-tXqNHHVNeZS1CCNWmxn5zvgGIUFFY1ENNXoQSPlsIK8PzjvSn/sGhKfsMzCrEJULnSL/l4UGK2jl
-a2vVuq9nx5hskSQfwp8sH0xpAarNoY7hcJtBTRSFviFE47F0JdDd+s30rGcEM4hZqQN7Vb4YbSaz
-UZBnA+2COvWOFRoHaRr3k72Tav56WJXmOPGHyg3NLuplo1qCjYoSXnQpa+BquckbNP97//lSdNMb
-CADfQ/fe9XEu2UQ4hrSHZD3CKUVB4w5zdmw8nwxtI9XlZ0maUKGGxRRMz6sEG5OOKG9dGv90FIxV
-a8nm1Y/dWQRjCnTfqFBZcYfM3yioBffnAKWVzXv6CQHWDx+iDrkdt8Tu/+NGw8pRZm8B55gYsrIK
-PVeFc0koDA7uxvEiarVPHaxZhqlZiVsJxC+236awecAsSk9a0VMDSQdDNiPOoah+gk4+6r8Qb/Ii
-noCz1X5Z6BHHx0M8FROJAlDOM5RJRBv/n1/yY6FVqjY97aL2R/+3iWn/HfD5VQ/jInuBPNcZcBIA
-QUzTA8bOwGXJd0VilLzWOp92eDVaB3of425EAe+eTQTpZV00uZUmE+7d4S3kshN94II2LcVGVzIa
-dgkUf6IzggzOU7Xcm7doDlr81D409gVPJNEeXzOMiO/7G6odDNHRnkf77PWzh8ieS8ptfwYe757Z
-yg+Bgebv7BuGX1jDx1OmqcNDoYcLOdExjPYPhCnFdd96fwIyg6vBmnyh8wCWPkSBI6AyA0w9Hz89
-ZDofXPRgfgyL/Qn3hvFwY7m0FXI8pbyPwTrsU6jK2VqBtyqlzIGol9gLv850026DYt7lGiclBIWZ
-9yWo8QcY5DVTflZJk500J73ZZzp5VSwPN2G5vNxOeTkwMGTTppGxkORLiVHetMrzrdKLpyr2+50o
-Z6Yd0SuQeL/sY3FZLYFgkAej1mHFpRGUcCnMKo0GP2hlJivQtTibqmwaEq02RHo9nXn2jOo68KOL
-FjKyXlf+xF3Q/zD5iMB9RLXqKUw6+wqMPal/LImhpiVUtDSbJqF7picjPMZNBmzFKFQrFl3KAcHt
-K41GznSyMnrOjV5NtcCytcUjfaKYhQSGEjW2IZSRtserYbcCKuAbhdWqQc0IrvwsUH8ck1okeGti
-LnAGUnjhKtjNf2QxfmwIVe1dO4sntx3p2IxG3rVxtEUnxut0DUzQKjpExntGhQRogMt4VJSiea8J
-TSsnXkHc4tGKp3I8/YwqT8yqD45Q6b3+hebCCfoDs3Kk69NZPltE1yzUGpd9aBmk/+AXwKYdZ1NF
-VYnPPFQS/+Y6I8TTSVtutgXbcbxpQ0fYNITDmdQD5tR0EWoCtWs/PQg6TddLZbvg73kz2YE0HXxJ
-5D5sExLNQJ0v6YN2waBRQxX9/rpVtQljT7zNXqmvMx+rye5QLMsouGw9mW6x68iOQ1hFlUn1NkbW
-ltgRluVgqloI+n674u9a30/CASGrFYagqGyN69wD+u9hl0vjrmhKVHImLT0QvNjKlywpWHLu6X07
-5fntWshBz+8HMDXKTPoMDLnkvCABbsomODFnpJCgOHZLo/opCdHACnP8FaMJCE+7o/OKEs4xPHua
-AOqhQoxfMuM5H7CG6YJKYFtHjTlB73qP9aD+e2na83V0xiCnMzGbEkPksfEOR2ghMjFxfxzcfS3e
-v8N4BTy4nUxZpGRwz416zMUqUQIJFLgpc/7UOzu93NT25Fvd+bkHFhGR/d91cqlQRPwRXhkBf5UQ
-CTYP8kBerRl3/RzafCTcBYpCNlyEAMzPKsWBbMeI+aHvl15tNI11VRcM4TeqXoG3AId2plA8wDXw
-10F0ByG6wE+WsbLQLWsSLEKWpKU3s+UdJ+LI6/tpNvf7IIxBCx7gTitIVi6O6Pdi/Kv25YKIuZcD
-bsRSW7zUs20na/c+CdORA1v8yGzGnfaGGjIAlPbVZa7X6xgretioIA0hoIgRK3uvr/Bh7XdYTP+z
-RRXTHU2suu7HHdDBCHgulaeh7Vc1v3FEuQn9VcswjudHvQXHcGY9Zi8wDeArIIqrkdJdisyN4GVy
-THEBQpt4+5UgxHGn6DYnqlfG5IJQDeWCUwHTxwGSdfCvZMf+70hvR0SCU3Y9KLo97QxjKOlV272Y
-P4SX59hDzdcK2C2HMYrEM2XrdDoQqgxnStkfFDwemx2/pYRahZEF10UiU9urWF631lIsbL2kYdlB
-u+1DyvvQZw9L20SLOjQw2n382aPqWg8QDxMtb/PKShtEfa/Pkvb72iUZD13FjHJgS/qHoL9VYj0C
-nnvnfKVmgr1gQfYFegIF4VjvwYTFI3ctlwy4aA0xYMM+yRnIz4p1uux2CkvOWIPt85XiFOPKzhJ8
-lKpIR6OHuownjCz/bBHNOK1sIByRXkllMZJ/FwrMSHXgCEbO/SFnQ5FI6qxoU3Uxvfv864tyf87Y
-tEogzV6rINUQg81FHsPSW9uofaq8pYVc5mxydws5zYAM5dUzuJ7YLAT56xcRD2Baqy7lKDWLwr+H
-eTbEUYwx/l1h9/QoHQtgPuyNPZ/Fwf/1FTVMSS2FmAT56Afcs141+TH+9vSCJBoIpsZ+qGbk3hFX
-k5mhkZ8ee6vxPpG28vT6U7p6EcL0zJCV4gt3dWmO44kYxK0O4lztlvBKsOhD7TcwQ0cSH5KfFAiJ
-hVUD9yzobABWP5fSRK6qpnVFfy7v1jl44faco3ScyJ12u2KiXEbdfItUktUF0/Yo1MUEN0czcY+G
-QTY1ARnm79fcGuP59xGCmozb3+vrlRwKcgCCKFYBlpmAL5PwWZ/bYglZxqKEnzsdNsH+IXaebQgM
-YcVJ3HXpoUw7wJXatUwNTCGJd9oXSE9IdntDQuDnW8O9YiVrz1cO7906o3gmeI7ZXyQ+CdmJ575t
-vYDtnBihnUizDTJnX0OAVWGMi+f8EWYoqB510NTlgrDLSjZOPug1yJKBJJ+5nYSspy2C3qvAR6Jn
-v8gkVhEgJxo0VnOzIxJZxbLRFTkH0eOsBWdkl8G7gUjQQsNBPa2v0UCVJFfSQRZjFKWAHkrdrxCA
-nTjrx/CKqLv82ivT39zCThSMjHfw0/FWviOMrDqU/XpwBtJSJ2Kac/YAbFOvJonDa9Prew8XhMg+
-Dvefk1dBjD/K64Qnemse8SRbIoSoKC3SIasl8GBVewAUilcH9qAaaDmqgr7C6fdJTJQB3Nx1YZUy
-GosLQwszc5itf3cq3IO02AyD3Y8fYxqrApZggd8Z7iwebEwh2QccPstUtA9CtGMsF/J2ovo+AwmT
-3Wx+T6W0h19yBYuA+RcQ6mY7fEMfedsszcNapBL95u9tiGdJsF7pvBpll7HBBIz2PcNDclgbi0lC
-dhyGCH4c4wJfpLTkd7Nvwk9NxE4kFja8FYHiyRlkQlShwEGXUNTIkeQSimIAyFD2b9bATtHvj4Qe
-UWn78WTKxqh9TpNHKzv2tMNs46/UVdVkE1PNPstBpDDnkEbWXh16QooQgJle3cF/OBuztTltV2C4
-9dWP7cAld1kTfcLMS5mz5iErPKBGGmh4jfIsCfn1QIJSxIcMs2p5NqThI2JE1FS8DCAVB5jpnKYu
-lnrsiLe1xBgrAn7dZL09iYw193EWZnw8a2Hw9gVaozZXDQKWgyCTcaX0+Y+wxDDa3ft15jVT+mGH
-fkF7yb1ir14kiDmtPnLZGg3uD+4biRX9we9h4JMxH+9FrPu8/CMqFfqPhD9zdjeMDdI3l9cgjtnj
-hQ5fbFEZJADjUY+75VPUUIyqIae9a0DsTJfCz5+5dIXesQBAhnivcTnm/Yp7TgMKP0+zJByKTO44
-0mnj/piCkZJzw3Bd77q+LuxJooJq0E1x6KGHEOpGjpZ3oMrRi/AkaUKYawFg3T0WLUMZWpFYc+vf
-uFWpsn9DQa0tkR2lRu4FwblkR4JPWqAUPSNZUgMcA4j97OYiq0RMDLAT1cdNMsVhWe7rSnObiFD7
-RgNmXKobLmh3odEBd1jo/yewOxJu2GegaAV+K6Yz4Oclbq5vKIOu8884rHD5ZD0QY2tu4U0O2O+g
-b70Oge1hq7OdyRN8wkxUhnMlmnqqAltarp2rxOFqeJHGlDmo8aPtQHEvxmvfEylpKPbwGIf8U3+F
-jVG4gkQQErKUW+aolCqppu4Pbzp0zgMP9jJPfCQ6pmyqahiuAwznLna9DEKPBBgBuaLgaPaLHWr7
-3jy5r3r94FH0TWS4eQiKjdGR87V1gsjCGQhZU8M4pLxKru5h9IkASYnJCZ6hUqnrbbDLdUylBwHq
-HbS9McnZ6oT2dnUrdrCsL6b515EjNjp3gBOLfAI33Woj3ztUFJvANMAZZi9MB1Vpm7Fg7DXZ0zHX
-caWx5X/Gz/aQn1xRYuZxKtapnvB2T/Lb+tAorPQdel0A7EMRdftQBQbt7FfO2ps3QTeyZumb2AF8
-+wOcKkXMuoFp1fVszVMNDB4tuFcVMSVcwvPsfnAyl+eeHFilv8uAN8WWlvEn91OVZaNg4XNa9Oce
-blnbFXT4VUHNba46nw0mu22JJjk0s4ZmB9EPj3O/UE6Go+9SLz1K+mch+i5hABslPh+g0lA02Mal
-WCwIZ7c7horh1C1uK8kL+aUT5hHPFSUEAGhrQXa2KqulrTR9mKmo/qj3/tPRWOTVSHGTlHs4+4Ta
-pfF5C8PRJL44Y2UpNmBEP0/6U6NYFly8Z6TPP38fij0uGtScF84f0eEsyJThmKPJyh/6zFSqJui2
-ayT25NMtUC+xKcDkH19FgnPkQ5+oxT/eYSHknyTmw3UFlKl84IUPiUSyDjHMv4kdgxNNxP/G2pLp
-m7pz3QYzo0RbSn3/rTPJVxXnbiUeqbUh00aFOSSnax2AnqeMH16v6JljsA+O3B/DuU2od4WbYqe/
-wFIdZcztkiWMWpk3BbVBymNvRi233BozfNmyngteCYIiPakNaey9vPuQagbFU/uuNlXS3/jP+kaS
-Ekb+u/qYW0OilnfgJ8pm+/11fuVAdCrYfkf8nIBgVUeWmUYsXuI34mEovPIcKRIamBTnD+LuY0lB
-5gEPEGl/10xcNj20EyI6NZEpe5BOH5hb5AAEbvF06dbCXCmltwrkOCBfHviu0qBS3MhtzKcPEB0m
-OOG9imlvxCxFxOy4mco7F5S8yS+13ld3GRa39Y4qmxU8uByX+nBzDdiVEtaMF7XTWF5p+FnAyq+4
-wgLwOomje3mHubnme3lliqLHTI0H0LrdeQKhcZy0cZ3A0wDr375B6lt/JgXejM0MRdT5hRZx7cLS
-l91f+kVyHiw0dqup1wLZzQDQFDjhmNSIADbIqOxw8LAq4Sv0WXhcHr/xnQuSLYlRDUpO3wsTdrFZ
-JPcjpkh/bClLUPQqqGabNZqJJxes1lu/g2lrC93ug7iAxTXSKz3Ci4IzZnbmaNVTNqK3vnsQQgxT
-j64ECRyBxtK4UB7SQWL7MeBP/VaQScH20N4s1TfnWUApPr2/61rlJJxeE6rwaZDXsR/V8WKpf1+v
-r9rv7DX455n6yp/jGKArSXb+PwVxcb2A6Mhpd1xEI9WBtKY60sD+zXWEMGwZQHemW/D0tEeJSuVH
-u/EkheTzRvSJQx6Q50Pb/tg8fpEJe2pwi67cPyD1iB7rbtxNfOJqYwu2yJdgccFYyRse/cVBotpT
-rtjy7X3jqNOKAmPGwqRjcgtObFePULZIcq8hzBMmn41kNnvOa+0T9wt/+i33sb+I0uRPfB4PkMJE
-S9Vp4MIkXqgg2AKGDxErKH7122GpFTBlXoPztzzAM5mIQOV7dQoObEafKzou1XZuUdf/sSuSqemm
-Amme7OGONfX43nLTlg6ufyVc4WoYdOhMoZaCgXQNBzBJms1GZ5QBzHXWu3JFt2rJ6qcFr6l2Dbvs
-58/jRgD/lmdft14Ql9WzWnwUVUN8FO2CCjjJfuTFOe1vBNxXMJpyHKry1KU5lH4ua29IL7ibmdeG
-mZOA/VEIhcIeesSkfqwVIiRUnGic9GV3wLS4zeVUyRCDR96V6v3AhWzCHbt6PNz404bJnlXoLAGD
-KNm4Nzj6DuqOkpgLsoYb27DseIYpedeVC3JMeHu/rhOEHEsIRuth6wsQ/VBH8rgvVDoQSKzHV3dS
-BkmqLTiOcdJWpZU84nw8Vd7NIOIR3ka57deNJ9gMDTRls+VVD3fWS4IRC9fyhAoIqWGud+s/v8dC
-LdpXzFFc9B3iHauE6iAn8qdDGDnXj0nY2yOhkHwOJeMtUKdwSzMcRWBR38ev/EMyq6svMtaJ2ghg
-eLaqSKz6ECTtVWCbsA8dEtK25LJ4igWYmUeKH3RHHDDOmhdLWqmrgUrB0QxnBKkKt9u8m5Wre227
-1kvCMvqmp11+hVOO67pU9smlCRReSH/yAd7vdscFqCfBE0k+Fgto4aP10YeLLOuqRRTINAuHHbR3
-n0rX7LHBH+Fri7eUOckbqN4ktvUIQMzEggPsfEjfFMYf35IFfJcwJI0W7gjIxKYFjH1U900MJuEk
-Nva6vVh2WpszdzxYcG0JzXujHvcB8UHOgQbopkV6jF4FFymZxcAEUk+3Rji+YxmsRAoDERGK2vDR
-cIK7j/fpgDxvx5JKu4qDLUTv/qZQ9Lq8aUkmqGPDz3SHawmZ8DjeHJr3JFUJ8Ii8ZwyKjwHa+IEt
-LJBbMWUH1AEBdECfMXNVDAg7G7g1cUc5cGt0ES+sMUhokad74X1bLIbeM8WXioNhSd5Hy8XmfFhM
-6tVkN3GlzcyNdKMwWm/FvskMghiyd45WGNQsFv9H9GALra0KuH+LZcFv2gVoBlC8n0A+fYtIG5Mp
-NkO8m7zl6gUAGYvKO2w5MZGY6vZIPqm712SImBEE3E+B8zGaaUX6xkc+mUferFLLSOOuc9uFg3sz
-dog90PhGAe4wluJGK27Mm82bi9dL97go/eaeRJMZfWa5QrKRpyA03LaumLTFGG1jqgIrF+xCLFl1
-UqQSCHYyIEulLffynrjOHluAJR0BMR7ZnqTTmZMRDAL7zBso/9QqJPicPrQ6ltU+GTRyzofZ0wJD
-4C+80yWmkfWgzKwuqbW5Qo/mwEl53RE0eestIr+FyjcoIb5cgQLdgSc/9wnknKIyRbLK0y+r+5jU
-XnrY0qV64/sSFbu9GaJanJAbgmmP0Svum6jbqj66A/3h/xERnxl4KCLbu7+K1KJva0qn9Li3HXJ3
-n99vHGCRjfS8qIC2q9+N4RAd7lj26wBeeW33UTUJpgh2bLOkf12AUmWyc70tYLnA+i/3ubVhDfsB
-guS1O1ypziAMelHAhXXiufkwXWcKBHvV8VGePxdV1x25sKdK3axhvlwAMADqap4+hoj7Uao4IEjj
-SjsWr6lxeJi5enkJNrtCeue2Z9Yu6zCgVT68WycrV/bTe4SMgwfRKN9SMpy99AVhMOpNcMVKS7tK
-OG2hLreQwEo1VMtsw0OggAVPCads18S6dmvHi8JW28vl1y1cH/thTX2ztUy4lVkDVjt8Qixw716t
-nRQGFcrsUrBc01CD7/53/BMkJemSdHc3DLiNug8YZR/u3E9FoHlpTzd76yVTPztahQBPAMVec+ec
-socXjYyoceRHEF2Cy4ZgWbkaMvGnDOPSxD56IrO6hjS02UIGi0ArtsPT4JNuvioKmRm5Cqmv8SSE
-hPo9i7wf3G7yRgIFqtqb6ks/wMuXBgdn/uh7A3xhD6715GoaAlx2HBFQwr9Kq7M71v98WZCLe9Yy
-ZQpcrrzPLT1LH2mp4VFkVOxskPVYMm4ltPNVn0AFEhDppUO+F7WZoUmqUQMzGEOUbu4d3mRoJoCy
-O+gjNC3mTwrC3ME4XqNRder7i9wle1P0alOAkHAuQOYaqo6ll5Sk4UiW2fJhKQHBmjJ54yQhCkVo
-Pfz9PwiUt89bZLvLvIMEcUgjj5MposaG5qYoSyDHI3UffnskxhIn03RNSBHPcL2b6D7nBGI3Pjpt
-kNku5blkpgB2M7frDmXX+zm2DcybQ4lgiLb+3G7MCzQJWEoCn/VB0BQGNqwExpx5JBk2WyZayH3B
-RjPa+jc52vzvIQvYM32ux0nwE6cFBRTV2225mfn56unHqIc8FEFyH6mDJ213/ftJv61ozCqc8Coq
-abNtBvb++cjWcQYgDxBflZQPqWom+/PFeRyzM0mX2a4y8d9iJrUIY6exl+5KSKdVAtrByENQrjLR
-swgGRrETsw7+jN1ASuXQdlpsvciUYeBd+vtY/kr6tkGBhavZBVNWE3rrXWAi1Zfrxm3QuMsz7rZ4
-2g57tWNCl+1kabb1u9Ih2j5W9QNYrYIwTxWtCVcXXPXl+HO2DWjm2PY8/FlCQ4+5da8EuMhBZNtH
-kbi/RsUBuWLpAtyuueejRdfA+h6PkgQOsR3RVYvPpOG7bbtNgLssVVPmu7IrsynnzCvo0E6NVaPN
-LdNnS/DDGWvauKMg68aomnlLBMTuVJu1pzB5LjX4EAB45rn7pDMJ9K7YOETYTinGf60JjPsLzScr
-RFOaYGsbbPt9hjCuOB+wEXsetWmLa5GwpB4ov6wxSRORHFOW7hVoTQndnCfUgWU/9yeNbGnS7tmG
-bRLkm4xiYi5zfY2AUIwh1awH4ehkgBi6CvoV8RqAoyvfRsIscj09+FQfevgvrvhLrqGNEo4PK7DQ
-OtOlnsY1lBrfWtDy+pda76k9majcPkIvxjY2T880cD+Q7IDO/aESczAE6jiPYWxbrdb2mADvrfW/
-1I0I/BnNRAsM3ytSzxQwUuGqGQyXCMK3wRzWas5lluzi8U3nmbzCeiGUT+t9fDPfFp+P+IVC+ArJ
-O6Hs0IcCyV7JFqBXSzn/XTL2XdbZ+1gnDkopKslF07hogHeTaBEU9migyhWpuE329F3KjSwR+SJv
-oPIDGFgmjGLdyIGMO/7ck6u3a2/dB9qlQHCtF5HUrFKYWqGSDmts1LqnJpTHNGsFBFKaXRCUeRKk
-PpMEq/GzWEzsy1hWn+euzz2mqqi9woBy1BFgMVDa+9XKvSosG+SYOzNK5paNfk4c0Nprn56dqN7n
-U4fNEBu1k8IK9Fr59jLpo3pJTHrL8jmcqIAjrXI/pB5ts35RuhUUtrjKdbV7gszxXmsLrfzkaVxG
-ePBe1VYyjl6V6+iS08Cj5tLdwLAVOyRkxnBIsUtQ76Rx8rude95KC/lF011oxTlVZNRRLZhwXvHD
-AgCqRBigOenUDA1LcR/A7qZTed1z3tIQuwIgaZDhJoGy1cLYtJD5nLp9EdTmygfBH8AaVIMYGeKF
-SIEd5wRWyIe54A5PaaFav4/Nv/LsW8920oPkBuo6SUftYQUSzFEwYMnjbV22ZHxUghB9pG2qJRAF
-5n0Kgr1ndwIdACETsnfyDu1BOnRjAEERwZXhfjIlrVkp/sHs3drS7oh5Me/1dmeZJ0FLnjOMvw9J
-0SElN3BjoJYqpTse0HWuAkeJPDW2211TZaK3FRu6nx5SxUrWwzWhyRA1fw3pphlodJp29JqZ4QSc
-CDn3a0x/iXEUESsXFM//9Bme1bmxW3GfMk8vukDlTV54k9m5Y7NiZlasPiVQUx8HfLJjeRhF45fw
-tDWhFiWWa6XizhmX15msliPJerr+RUZgTYPYC378/kD1hPMaNoHGJIOBmKtPCfStUarxSRDWyDVG
-Lv0vtMWFQxbYl+4PEfFcGBOZohnMSWU6qS+KB97jdjR214r4Uq3gN/sPEv1QmpjRnGcgMMiBGM4e
-gF7/nVersqi0Au97J0yFUCd9YNBnDvhw4oZV4y5PNNtVPwUgN0o9jpootnl23PcFEG72eaxLr7B3
-ZQlBY99yLxiZnojwxP/TFkzXV9ZUTL5ivZhuIqoXWMHk5Xxfd9TN/kOiLpcgIwUKz2YAQmIkdtBX
-AYAlOmIYX4Os43A8aO5+vZlJyg5VBYQsVvsMR6JkLL3LpL063dLo7yyTAFJjt6nh8f48zdjlctUd
-J5m3EnmEoEMMm2LzwHU18gu0KODzQy41ircVmLCjlHTl731atQfXb8Jre94zhRI4QHSrmCkFlYz/
-jwHY0AUdTn1ufzn8UwDHWO4yNtm8GIMDpVrGR3qKjomHclR7oesaStXgCsg/wjSH8owO3iF2xiA4
-DhzjkCKbkmk4u2+LOcIiFBxZ0/R8tBQVsJ7RJhJcYXpimY1irYShNn/OQknn0kTNnmBRj8WUqo0A
-ww8/NMyLKRvSGUohGbqw1v8wUOz29aVBgKeZ2BPjkR7/yD7RwHSjDhuYeem2xr+5owe9yPrY7zTu
-68R0YOkhJZb2+eYSseMXsPqheE9zlUQmpD5T2tTKfaarDnScNVacEax/6pA70zpGRsDWYWIdORRo
-l+z7wW78ZCHGaKIWaf9PRzLbjS3Y6CZ19j8HI+jLy0UQKm9Em5gp4Kjw6t4QdJlrtN228knuVmtP
-tOmck7BbEFbjo5PPHQYNYUpGKVf4Hkd6QI4/Slx4om5tKgPGmnnw5bQM47DoUBulBnqcHcteNyle
-987pMoVcMBDb15GnklE94nf/PqLxwe3IqtpRd9tbYIV1j+GaEcpRmWgDnMm5lAkfAmFBjcis/qtv
-qlpH44/Or9vwXNwDtvvfYg4jwfzeicwUDb/fX7VEbXVUCnqTXyWHZLtyYtseIbGpoOtnOjEKf8Oh
-PBWUJAYsFQTwyRRgyKhw5DaG5I3XSSHoe5i18x3L+KbbdMa+lKvF7qdzRwyX9uSN3cdCkFdbkd8J
-osPuqLZPKP6fHHconVa3wCzLMa2uAklL0oMtGCgIprMp8j2whrC9QmYI02BmiJ3hK5os9gudwK2l
-/W+LM+MwIgx/vMeRx+QX8gUuOAIEwUpEeRarFAMZuFDfuOc5RaPn9UzHuUmcIBcpXyurEfpazpY9
-atgnk+ARiMyQYX/bYxBGV4JHvTCtq4Ma2bzYGz4+drDFAo9AtCpSlxMb4hb3UfS1e2ZSrGYBx4vq
-XSL/941grJlnOF6kldFrkt7/S0jxPXJuDXiKsEvSdnnuQxCTI0jiHIEEvBQVWdxunGSpYRqRMIdR
-VR9XH7NVqO4MQ7v7rMnkYTtIFykAFRPEIskaGmhG2Sz6r3zHQcnk3NEdpTrPemW5/9ASMkNWeblK
-XvHp6Ri30RdIeuGGDMaj2e/NpmU+C/r4fR7qFigwhkE1L7wp8i1h0Dqaf0/7IiGz/d+kMnsmb8ji
-Q4JHIGasZmrUAwm0r3NgiHTdl1wswYy+OwnF4KX+fmawnIm0CtpLbgD6E2P21pi/XE6Lar8Z4Ik1
-xVeQ/Wyk0j/GAeR5uyuSmn/duxMWEQykdirhrWsDTKpmLSiRNxxt53pNfYAMctGCp2+qJkw/KhoK
-gAtrkxoifECGNAiH1moM+Tk9NkV08rrssUxBqeMdkbXDeZTUzLDn3p5Fcrk9nYsTpz50Ye103OCe
-UucWiZCa9N/TupUCreEcQKik096+K6LwnRHh396WzOlsqnr3xDtUPLJscbzMMSCc9Ic5O7+nYaGJ
-JVFd8mVn16lEGIyn0y5YltHE5PiiaUKSrUV0SMVmcQfe2g/7lCdHXnFUUIHZFWiJhsjostHqTf7V
-K6BLqUtQ7+TiuMlaHGaCJJbmxYe47M8BMESXDWa+UrziDyU4Bhk2fA6vUJFdZG99MysZWKFMdGHD
-mgzY22UtXLJWjaQFqEDxJZOBjc+5JDOdhSHzs+QIdL0WmIFl9G5xgnjq19nLiXqsuN7opT9eckg2
-z2jAEabsocl6YvhH8d8qXejlMi/blf1/C4wUmOCUbdVp7IXXGkvDB0J50ffkZetm89CTWRHZzJhC
-RPtWKRNUYxU73DiUDfCT2v0fcA1DZwbYTuk1Jzgjv3oHwoliK1r6HlYN64ER78pXUPO6eeEbGd+0
-BECQXeCahc59zHdjKBAhOdjRrNGjz8eQ6hvZp8Gv1K371l3FGlR5/8XIq4/yl4ZCGPSyTZSAUfSX
-IpgjLe7fRP80I6YGrIV48r+lFVL1Y/Hd48R5IpplrkuzLEZ1nWlT47pxNW3QeNqUkTHLPo4YFExZ
-7zLTVvME4QI9t98og9guCX7zL4QcmHZ90JdMxMGGS/fEPARfl/btnoxOad7J6Aq+mkm+SHWFNjXH
-2bs1WByXvFSwveffWXemfnrgr5FOzER8Ne82K1774C2wvo8qtJnXECAew7AWnr5BoDybminqt+wI
-MZ5CLztLONirYJiiM58nt2zfG6YFtN+mgUo5kw3DMpoo8WLbBTRsDQ1M6LOiD2dR0nHAbRFSZqnW
-K7IpRJes8HpxU5EptIDWMivMFfyWF7pQjvEwIqWipS9rgmKj/nvPikWTP8vimX21a7yhUDtogNkX
-0uSLrzo+mmjj1E+QYHv3b5Q+w+AwCB6hSSiypHcubghEirCY7KDUbMEkEZjU9WvCxf92MLK7Sczf
-t0YbSmqyDNrLUkDMoIp2czwmbTTPYGDw5/Uz4FlU18RgIGk++XKbXIRnGnU48nIVLxLWgbiSqeAu
-Kkk653mQK2EyG9fC9kY5X58cU0f07FnGXwP5tjWMKmux0FKJwADjPA7461Iil4NzaHbs6/BRmcN0
-5QAVxS6Vq7nnbAjXi4pugQwx8T3BPf90ABdxSEo7f/oJ+IEECKNEO8btAYD3rwi7cJNmrmbpfTcI
-pwIFus+JCaG9bp/5gHan+aS0P8FxbwOWabrF78rdiil0a2UusZ23thrPWDqzGCrCL12XCFz3qKep
-r2POlLcscc54tXbn/CWniFGMS2yCRun0Ar2juEzMKSXZYXA/GKHol461J8e4CfJZ3IM4Os5t0fb0
-CkrylevY6uqx36f2JCszmGJaUU0REKmQsg0Ylau6ypAf7gIIfxIz56SGvZBtyagxLVagH1cnPihh
-ZT2vfV/Oh+7oLPQu2AbhcJZTpw+yfFXmynonMgtP6NDERo/OrjOIpMUsWBcs5p+0ysFQ19f/Rnop
-Ijn0jcdUUYS7798O8Chmh+4HnMmkW76r292pz6PeACyKKwSswqiJbgtOAMXERNC1ZnYOozbWj/nu
-uYN99Zjnz2tfiwnuz2jEOJ6RDTrFD0pubIPm6Fphuf+l70RMar2KJpUxciN2n1Dqr6Zr73/Gxm3V
-gAMeyif9XAblHiq8RrMkm1rOqQlswfqD/B/tIsS4MRwhAYZV+ngl1biFL2FbnhZLPmsDLkhD6lSt
-QGiWaR3g1kPJhyops1RWH1xAVYATMNUlbDiCGRud0V5wrcaWP1z0Ssa51z7uXDYMZnXl2tT3NerO
-9zLRxL6GNvHYUiiZKFLHS+L3t9MY6Q9zwzqhLvAVXvAY5FEqxK5Fvd9OjsnzfQPhHMSZCGEUnpL+
-wrPhocKmZaqK1vCPWbo+2m09GaOCG01N3NTc/waTZ9Asdfs42ydVW5acBT3WCjtTgTmRa19k+aPl
-jPBR32y00+zfRKohtxMgOCqugvR30XebY05vDXxI0J/BjhxohLe/MhAg4lFpmvsVOJA33vjsBSLj
-bjcSxgYcdAn9MjfAuBjjal0H7L/pcBIQvh/qNgiPCbneYICDzx/jfppmUH93IW4jk4xajdy5yAcg
-JwC94TXPWD7Cjz57Ry7BlZLYtPBPjy2ZfHzKhSvgxeIA6vIVTK8x3GrWb15qPZ14DEN5GoXnEgHi
-qtKu2A4Dq2jOigwm6HtFSlZ2ShN87o0/cqDdXsFD3miJoDbIn/MEMTyBNO6wld1UeMwzxyvr9jlm
-5lGhxSNh9SHy85tTLVPEFLsTaD+wPGZ6PpQ3xosAhW6BiXnFiWxpiaFpSVDX3+I9uk5UIlPvbNZ3
-OzVi40z3Q/Po+yURq9mqcNSiWA0jZw7YFvQWQ4hOMW1zn7ELftOS0Ilbizt01tcare5gS1nVDow1
-2rWZMftWLTZyhRnnhwcPqls0XzotsYRmoDCJI8XFGbCw9r4IWHtHeeiqk9lR+e6vj/VTOOejmew0
-L488jvBRfKCezibxxmdOs8hvT5ewRCtMq3/fWGWrj7BahaxEULs4DqRMPJJSYb4wg3iVPlm5Hypf
-9k+DoI6s9mpppUcwcfmYJEutmZ4uT5kUzLrB+eTLDS3UjzgUyW6Bvf965NT/Ti9ND+08TGVbtP2c
-F3DT/doQkt9emWs5p8c/prCexHrOAoIzn233GnRY5kiY1RgUn1/YfDJNPllQJzvL6nz2iIy25zVe
-VOe536o+uFOQVBnRoFFf1qdsd+Ni/2zI+KDcO0utVEKpNEyaLgR2DbFX2oPuHECVCtEcYhQ3MsiF
-XElglDH2/wXOBu37HCOf1hOn9xWRZgnSwNSJbLhGENuLmqugzz9q/TZvspXwHSstvxfH++UjxFQI
-RbaG152uiEb/G8c2oXGRj1nsxaPSrA0EMnVWNmDZhdIJbzjH5iRxVFdcaVMCu0mfILi015tRoXuB
-D4T3dmk1HAgyC91eD+0ItOlnTHEok6INaPqwoJrQ/I3p2k6h7gn3KNofFzJftQvV6s8PkAANOzG+
-MtqxXgel2HOTx1nAsgLMzx7SLymU0X4mfSlrn7eJOqVaZb4dtZvaJ6h6YFJw8trKBQLJXCHhKGeX
-rOmrTwAlY4mRdC0sYvgCfehBFg66W3DZVQ+JLGok0DPeyxyXzEnSqiTBUoyPsUhLMEkqbdB7kRwj
-K3SOkiJAz5YaM1X9whmWB+qBLm8FPqlMuyRzzmw05WvOTG1HETTRtiNJ56GpxqEI7gZs6VbskCdR
-kucG3f5rFjZGge2pkEE2hKMM80t3KSw4NWhR+rJ9bI4BPN9DDEoQnb8g3zuom2wRqALdVzSR7Ra0
-AuG63kVsMtGJvVaDryyWCAc+xPyhUfHwvmaeffSb18ZB/H9ZyMirpqBOtjcPG5QjLh2rm4HhkEpz
-/sUpJEOxaUtAZ0JxFimxql3MQc4rSPDbiEO6Vhqhjt7CjJPe6RHr87EBdEm5A1mns4kTw7Fvn78e
-hj2i5KOROIbL3bvgbnOFwLpnmTF2sEjsnLa9bCYjOAuvd9J3fIuh/Ywlzh5a6Q06Xk1RtTd+OEA/
-MCEA//KmAYp7hMUvwVTpkQUS0x4ubzPCjU7sTEPjmW8E2Z4g3MI6b/ppPbGaUJuCNIidqpFhWgSv
-WHSErcs+isJvlYURCbN2iivk3HMYcT4WVXzWDIInZ368sVmyGkZs8yTmQKqOA63E52Mv8kjQq1bH
-84wsz9IndCfi2+OhjYxrgEX0tkggL3fMSMEGRH7LKtygCsJF8JyZIwq23WI73EjC44HC7wXQNmav
-5W0lUMv322wmDncsLB6SNugAaqKrQ5MsK9U2qPOLiTscGpz5ZSu0LxlcEWXg+/GO7Xdqu5GJefEU
-RuN4O0riuXXLj3vyy+wAQ1RxxLRAqeNPFQngdvOOwZD3CaPTIpBIRse33UhzAFZBiIUMaGmNZXw2
-ooP+xAKl9uxGD2L3u3dGaTJlQJWs2dEpAxfl7SN4WecSjgInbJasUR9RWZfup6ob8CdaMhd78rqE
-JfVOCdSn/VGqWiCLf6zs3P8u7qDPBdNqIgARZKAUnALYAR1LI7XsAFA/MlLrhq9tVSlH3SLvSBGl
-v/GBdHkcMnFt/ISv+Qo0tZbQSBbBAyg+DY85Rp1mE5FM1ql2PlthGs8uRBLmw3ZS4kB7BDIi41lq
-gXzUkuva0wjrGx+jvdHezl9XYyGWMpN1D32SRyf/BV8FV/TD15FE/TpHm7h7msE4fnYQv8UwA4OL
-Jw+sGp+72dG8n10H9fcqge8f3gkdf6rNX1il0qdqXk2Zkpd5i6zWVrtxI0AeATvw90z5QcFerfjE
-72SB7E1gT1VbpufHi+ZsILn8pWOjFid+3WAOQ+zBPIvI5jPVxx6SqMVlIDsRD2jpyoBrb0BtwZdg
-MlnV/X2yCK0/srvTDDstwERvj7SgStLxpF+J+KPqz8+XUrpIW3veUmAu4vMiy8QcDRlJGw73fBUD
-9mLKiP7R9tpGqRqWN8aCD+aK9vqIJW/OeBJZURnMis4n40glBJM8qN2rWwrqmWZTcsW2vsNuKHyY
-H6wLRSkLx+P/wE2bnNfRs79JeYtCvT/mwmdzb8AY5z0vOYEot/dJH1MZajovetwfh+0AXM1wUqO1
-qmTC9fAFo94oS2doFxn5Alt/pRGD0fecEzWU+b3EhsyA6dtcJtq72Lw11KKg9RjaKGCHEjOLEl3L
-VjcnsZsjBm+Ul5R9A99nG2xjTBsZx7fG2B5/2+oao2v5V3q/3CqW4im0zHejb/huKcTA1SILio4r
-AmfkVH/bjjwj08SfI1BZ5fnEi622pPJi4Gcrs1MhM9g7+4i5mtKYeGTWB6aWU89vy1UdlfpWXs0E
-70AR6/8m13EQJE1aOapmJFgAERGgt0IHAxiJgYhL6MlJgcydaHNpI8qg1etSwu1fiAVvzcnJVcsB
-c9UX5JL/EZ8xjSAPEEtkR98clrm+rOueOi/WKqQRl/zicmuA9uB+4iHX9ccGohcyPW2jgzN9285K
-DAveSmEfTOJ4S2+1hCr141gYy+tsRpb5b/YTOKrVO+F00mUNvYjNlSImdFdBJq2+3f86qV1b8IKG
-81Qg8VkN+wHs1dwAb4T9kXPHu3LjombPLcK6PiCOteKXzQWqYdc4tU1WiPZPzbbSqQE6HJzTSktP
-D6DRlU7YoUZItmzUB6G66y6ZMvTOeUAIRW11zN/nNWvSbOVYjiYBENN2o9SGQpYTSQyAJWmAkbvL
-GGbVCsIo0U8ALV2TdNNw5TAI6fAd91jDoTPzOFhGgi2WLDbkepsfJz9Lgv+YEJfhlJG9SYBkSAgN
-DUKxHlmYb65oABvi+pwcMEdiA8e5AkbE13ckWiUuf9CUZefZTN3p2aA9NFk9QxJqbP3cE+X8ETfA
-Hw+aJeUTaMxbyJKTq88OT5XHsiUJLlmu1YD2yZHqsTOLn0CZ5VepC75G70mxUvfe3erxmGim+pU5
-uBnvraJZe2nBr9qVI08FUS8kZcGydLmXNsMmUCpbUQboYqDG9nQiEjyAVSfPvx3CHATWAJe+klKm
-rgLvFohp+sKEzLx9iuuIDO+Ssc21InMpFQK/EMPX65FZRLxeF0rGT1eBLhR753MOQIE+ovRU8JtH
-Wp7pEFbE2pLV6pb3e1ABteRoc06DiNV4eV9Gyk7OASxzxghQYR438VlhWmiVI3f7auJq5CSeRvbY
-iGisVqUzvK+b2lITxcHCX3kZkKr8ydK8FPDZNV4eLBg8BE9axdDwBb1tX+iLTXcoqfqX3pv53YKt
-MB+L9O8LfZYwxl2/Mm1aW0dPaiNUpQr8D0ZbgFVTMYjlAGgrhqVxQbQ3rj9ZynXeegWH7ZmYVUlM
-qXR7HPmLHeoVstM0o9fZaQqNQGHBkQCiUzB5bLYXR3cLavUv1MnTF4chy0jZeYsx4WDs4nq7KFJW
-OyB+5xScTyv3f7yCqi2oyerqIjyCcLdgzCRyY5iu6FFNuPoMZH9LEJ0Lmwvuf9UPvcHfcex8sS3O
-JCRJKNeDxG+jymzPIQ6+bu1st+HnhpQvwON9oyn4+Tskc9sLsOqIkhvUjsLffxapBgiaT0bn8Tfa
-Cqtq3KPl6Ed/gd7wJLTXOVt5ln6mXwghGH5/UjNt1ZCeBO0UMfDzfn5kwQ3zHUTscRxWVcLNGJeG
-g0ldl72WANiIBhZKVU4IdiHP/VZ6Hd1X/grEjQkrLKuargEA0G2yoHs1lE4EXtJXYtG5WGm5ZyWg
-kX6lHYFh8e6pLcvRTdBs1C7LEVlQKih//Rak+5zQNnuY7WruccQzsSOFUNdKB8DqIzyBYFDTYbmg
-rRh2pdQ2YWMvbYe5EhXlnY8GE4KA1BJZI4OnBQK9NlYgfLxsC7XdGJDkNm8nGIrMzU1nioGtr2rj
-OndyZeKayClD6RUFj8kvnWsRFwyGfdD2ApWFIuBI3cLSjCJZFZmtAEw5XqchpqvbNbzjqc1mNZ/y
-eowLw3xeXBvB4SbXTRcHl5DsfHfzS4jArV8vHxe+rLnrtVDpwqwFScatUyRO5z5ZRfFjMR/Yh0HG
-PxRAQBvwBPdZNWFExw1em8Mrl0jBSS/uz+EO1DXT6Bxcryx0X39fAW09O68inWJguAAleWM8MmYJ
-lzcWEfh0OPNK9uic6FdkmuxEXk0U9fEhVzRCaK7i2rrGGl2cgA8eI7x8cHiRdHYJYagdeMg2efxp
-T+av8RnbbxkugPPYmi193ULSlmgEC9Nld8DzJRh6K9VX3jYcA3kVNRdYWJLOTYyOUzfia5MHHGdZ
-DWsOAlMNJQdoBwENh0tjD1BJOpD9XqfLd5YZ2Ufvd3Io5goArJIknio5oKLyUHb67Uf33t78Sjal
-enXL9o7+pjoYngejCfMjhcn4GEbMoAKQkveU/c3JmUQJmEynve1i2/iNybUxx8rIBM6+t9Ha9ehb
-AwD/S7JV2sI63dgTefXXwh4zGKpXGKJEU0z8J8+xFCa1RepOqaLrhyBhoFiAcmNO3rmdtrxuiEex
-oRygfY+syJ+fhcpYb/ZJ2MgJngpvJVoIi0r0E+Bl/5clF/fJmsrVeOZQX93NPHLFKU88TDTW/MCu
-qVpev/JVcWo/NZDP15jzrx+ynl4KLWyQ1QTHWdgCAw6EqfjxjGLxKPCqcsQz7Rxbm390wfdHnmy3
-JTuNPFovAYrVtSxG9k3I4Owuj7VzlUgE3Ul3l7mjGOEDdW/aLJxWc///0rdXF8bKBw3ZbL1/S1yE
-qUCA/eAhGl4FN76S5iXDbLoMEXCE7OPPO2MtSbhOFjp3j5u/Ewp3nhsDfYYqlQ+y5fba9UCNdOea
-a1t2fPxPPXCBg5It0u3PiqFbzRyD0vblcnlmnfgnBgAVBkGFCydtew6nTR1vTxUBGPo3fMLCFDXg
-vvBfSiPgVP8YiEAIibpquA688GgI0BNLeTT61rvhwmciw5s5IROs2ZeNXP42Ltor9xmI118UEUgW
-BoIEsf6IOroLDig9Vvxs83fP76zPW7HaBmyZfqS8v4edxWsBPzCajZFWu7MkJhad6ugA0gVGUG6i
-1hgIJI1lEqRzCo4HmxlAAMWuuJuqe874IRywxD9zb3wJRiVbp9pJn08x6hfgJo/Z1rjQBGnTa+v2
-FrTaN/8in6udI1dqKufYy/N8XgRzjvQA0MOjo3b3tuU9vBzGFUPo9vP72TDkUY7/O9Qvk4DZ03E2
-6oXKpBgrKuJO+7xtIxbVAApk7txnV/EuqsC6YuLgbkuzsrvJ9UMHc63txbysIX4nfM3Pc6YtBPdR
-vGWahmV6dsMMBPdyTvgzZA/BLLiDVMSlXtayi4teSM/X16hvwfXM8FrxdfmeSuBKA0hbIT3V8+2d
-UVF5HMF5DEgL5MkMacT2BmfdvhlINwqA8oj8mISoQ7nfWDJACiLaBF042Er//Xj1h8CKuzPG9lHF
-uejuXqwIcRMaF+7ILsxS1xqbHk00gm82+Ry1xQ68MeX67ypwyudYlotuyQGYOHsu9Shn0yiZKjm1
-ySC4AVeAVmPE2psWg8mPl6ca7cw3NENsAxrcHx7JsgBMrc67DSyyvswynlNh3zASF0Oby9E75Ka8
-PZ5S3PB1Wn6phhVIxdBHYqEB7gXI44lNLq5AuIy1N2S714udQlNZ8wqA0LalaLyr0b/CJiZF+dEs
-pyF9VhPlQ+Oq2Fi/aJFdD4pNrSKu/K2BF+MbWItJiUkzytkiseFPeWMKLeelPHwu8AbE+ZT/GpiT
-p2YWBFkpX5VOlkYm71HTtP1KqOe7Fm6C2KBFgH2IqMyUfOoSSECNvc/t1GcRfcHcTWIY6ROBAbtT
-3anZy2q9jK2094QhoXIeXx9Wy2MCT3AR1ZjqaDe25pOEgZq2UjcXTDoGI5AXy4SKcKQgTXNAflwQ
-TFCMKNfrE0J1ljPWS/3bBW5y+KEUhpFsV03poEhBzj2gsu4vD3sV7+spaCj4vnUnVwFqM/qk+1Sa
-x5subf2QpppB6Cxh+v6yJadFIs8Wzk/N7+9wQ2a/Nw7D+xYctsndGlFIdXceeThc6tS4emYNBG+2
-1CPmdPx5Xm3vsAQtkbAz+M2Fi4mjPiE9pMbT69V3N58sLMoaPcWkYoqBv+iiCZHZMY0g3NbXBeBm
-6Q8oCqXMwXCRWsxBKAd/yEn8m95paZ9f8ezOLOciaPtIENshLOZA7MOfgQn/LhPlfvOtvE85eSa4
-DzlfwAh58tTRfbQmPJOQEasTy7a4G5CT6UkH+WSrZfV77GDVP/sw2PAqWo6Xhzasr9W9RdvckNOt
-UAhzV9XpWjEdkFVPdfR4P6Vib+84i7Zn3E2rxPGWqpV7AYDRWoDqC1u9wWJv7yn4tFV8Uf00A72e
-DX1fIXPrVSec/Pz4I8bxTH9R2LduMoBasfE9Njtq8TtztZCybRu1On5gU7PcNGJTeuks0W4hd1RE
-A8mEcT0lK2m18izm529cwmMFmmZ0wX1LNTkHBRQtAQwMLhshBD6q6OETH2O7AxhMyN0iTcTjCt7D
-bGXk5YnzyvpeAmUyGINS3U979LC3csI5WcwtMXIM6QDQbbcLKZJ6S8Aj4cYIxvPDPtaVAEKle2o9
-F1CCuVeqgCmNVruunGt/huc5xly9edwmDxtNDJoK+oz3KrcLNgpDb586pXDzHPUEJ7SfJ+kIoq+x
-tmzrZN7yHjg5A/KjEt00oBS0ySRMMWm8f023V0t0lui9H6LxO+Rv3MG1TwT06PPhIikxyd4PLLeO
-y8IwoEl/mG7GVBksFU3qxQkwfhkc0sDEyV9xav4CpZJ7H6zz8PQCLlSEiV1ZUQnUD8JIPd0KGXNC
-MBgd6v2RXaeuLRx0tVyyCrnXkTWNimPqFS+z9JVOwBe8tX4uOZeejZRSrbHvMrmGFon2jgcXdcsS
-mZG31WPygk/zlgOkE2MADQ/wSFaQvr0cEgFZpGlGjo98exn2xr3KwyK1N2B0xSl+3LpcVGi2bZH8
-T9+P1WMEMw3UI55vKUCoaGxvWRWe372ZhGAxQCjhfp5bcxzyAhIS+nMwSDh+wNStTkRjWnTKM2Ft
-ywGrhkchINTW43Dh0Tjka+QXGQHr0c0/A7n0NWxD9nVfHli5FiCO55mEDg7pkUwdNJPKSygFR8Uz
-NZW8BvtgFAy1qSSsV88JHBIlWMIwiKPgZzWM+ltvZGmdrbsPii1RypnF2vHxCexdgLJzRqlS8O6E
-k0g+P58/6hlimxh25YQjQse/Ud9yO8hQwwqKGeFdRqrcmzB2miDNiMXkKYj+mbpug6Nj45Yp/Df2
-CdWGUEeK3DJ+WsHp+8FW643+FVDY7gCZtu3MnpSfPQioctbV5cR3jLajLcGQfI32UdwYogm+Qc9c
-bD+tDVgVXR394xNf03XvJLg97dHIno38Rsf43qAlNWtCXCD2xJhmLdq0Ca/7l8zGEQRNc44XW7nO
-OaoTjo5ghRTqVQDeBXbq1S8MrqgFsmfEW4G7/EGPpbA11BH1/boIQTIslL2I6g7H1xzCoPU86OlO
-MMCABaoWzPwSWRpD2nrA+EFkMhvuuUhKGbmWLIxaix6Sqol54dCx0gKzhDxpKMuGh3nEADL4Vrwx
-lQyb54VTf9WBnkoFlK8+z/2rc/in+iUepVoL/EyT6/M1tTo5sbPsUj269IgKEbNTU7MZSdQnuka6
-qTTJ6kJFgGMcs23CjP64ENw1MkxVGjIXaUCo3SGGLHDOX9hIL+vkpzcAmF7OxfXgKq8D8+efZAQd
-+0sNHJlDMd5cEIhZcxVVggrkT7SJe+ggZ+5ctPT+m50EFyj4SmdJZ9l1i+Gnerb8xDAnbE2L7SHp
-hl224E6CfPauhA2LGDRYDUv1aTlWPCScWMgNUhAcCLBgDFugRPWNZzPHM5cIPXfBIjsvBrnfJ3GN
-9zQBNZXYyvyahOzvxouor8ZQBHQv+vZZZEKeSDpdmoLpVMCFgm5O866hQgUIieSQZ4RkQhJE/D+1
-rYaFXZ9JyKPXK2baIUdwBuXcX6kYnKxQFohjseN5bNkyAhU3lmEClqD+RXCVZ/PKc/0H8JN80YS5
-QWjPFMWnneIfEwXNCx4Bt+tMllThNBLHOtltzOtjSNVqVREAJL4P057x/U1I4TtqSqbDv50cvh5G
-PhCTbWXgiOkIV3WeRsRxrXTw1oT0zvD/TkWeZ3sGptTY3U/mREtaiN0anAj0xhUF4Xrk6E5fnBsS
-O43HDXDIRLWMQsrIzudo85avQw6emRCPhFHtOtS+J/j89ZY9NC8eKi0dDHYOLgRfYjfbsncNqEt2
-bqVXfWtuOs+gJcEMVzBzehHmldoz+DbucZEPZ9LFfdauI2Jp93gpxXQNIDBfQCKHdfTysy/2evZo
-JJoNAcWkRU0tGlmQpLf3xtoMMXxCzPT0+vEiLxG+uZAtS12zIw2hbkBd8XqPRHK6T+K6KiWzHqi0
-qqjHhA5e4v92nhpqUr4DP0Bg12aFbmG+OtP53FI+XixgogqjOYCBkcmBIxw8KNScu/yg94zu3nEv
-bqPAAp6NyphgjM7RkE10XW03YnygJNSWxs4Ny1Ss/W7Q9kYOlclXRl3lwwQ1mjNgt6iNmM5E0H31
-uCaGGzSl68AL90uPl6+1XrTtqDNZUHRv2zbC/hDeTYyld1ZuxVFzuVLGltbBLXwoZomJ6PZ3gS+T
-9BejRToettaQAv9eXamhvcjsEDR4wMtmKXt4NVuftzDk8m9kn84n46AC/V4z5Oy++k8zw+nr1/LA
-oCQk3CiBPoxbQSzHZQWSsa0FwIuLD5+nryDHoe8Kyvag7I5T8pfJBQvnP089OT5xlaIRV+e7p9RP
-QPWW/16zD02DwvBT8nzmqm+DlrZxeM6KVQD15fOgSIb9zxJUUQR5m3D8/qdrklT/QzWPEzW2Up+0
-MXXtevdXGtnNYIlbkdC/utRtnyCJvpRXLU8nAc32oLl0ad8q5ALBDkPFq2amCDEqWQEweQUatCbh
-bSbof8gbo+uowZuS5H8AbPH9WYSVcKhlV50/Qckt6p4UXsptSvs5caOWvoJ3r4o65jfaue6yQuai
-RfaIwc2duuDHAnLv44uRouu9e0+N2JCo9nKuu3su7FrMq9bMYhmFmFMANdV24vsyDoQVwmZnlhSq
-pFTNTNdScoN8XuSuwZIMVN0MU7ptlZQlz7bDCkGZ7pMBB1EdwYaB8PEvc5D8AfghSUwdgOspkwZs
-Je9BILkec9gkQmCArxLK+9M5I40VKMrKPZW6Ges3pRb+GNJ8AWeS+tbSKBTlUo1qBYYYWHJFe/Xi
-LCPZimne5LGJU16xEhlOLdOPGivl18VmIaKddmiDaFIQpo7N9b9T/jCc1LiEuT/LJITgs541eYQN
-iF5mwA9gAd+FZYKg+eE/vR9PpjBIYRbsvUdDkX07I23L/xy4WN4PH7cvRESnMYKVj/hLuu2hmT0N
-DlbceqZ1EbGu1pcx5LYZNlnvnSeeb0Vx4b+5TkfCv/Nc2PVGErUUDCIiRRMZpA73rmUnKmHs4lKy
-PnRvFuHBwZcfq6WfxcQ7UphmidrWVg/Axljyd7RnLhnccWLcyUyhaTTusBkgAvahmUVnOSq/UHyP
-Kc+/lLiL3q4gN7gEHnhS4pECMa147+7LuqPU12z4YVxMm3nDEWJV6sIfvAEs691SlXIFQKspEOTT
-+mA0SSlXxrUS5VvCg8O5l8GxmkmWwIDPh+7cWcQxyL/zwiwmj11KbDQnWxc2k6209tUgRe2yUZus
-QAqh3DS1qjwqZAedOelDtwZW/9EY69M1cYB798ZbM3+VBDDL8QWuSa4WDBHOenAE0RshuXwZQPB6
-ZsOCOKwickSEMuL1YUCYYUCpMeajKkGi9hUmsYxhO4IH86avucUBGvKi8+eaWnUhDiG+WJ26Eqd6
-p6tkXBTALKQ8j+kt54GvQZvhZYoniY/JatFGvgWzUzd0H3ZFxJ/QBBtoTndMDyC8SMYxE/Nz6Air
-3m7LvGJnpTHJFFT3rSFETfgbYlsHOZsImKjxh0psV20zkkYEgeD39MkYJNJZPMLue52FaxjswXFz
-bEoTh9QaK3AMV6u/Nlvueo6+1GEAuu0SKug/h39TSobr93AJvLWxb7vj5D6CnkE4xHsz1zknlzHr
-/OnYQAux3pe9Tdo5fHWprrqjPzIjh5kAcIo07v0i/bYMZi+/HNCS2hN3Rajz5ldXHbtW80kL9qo/
-Zd9pmQIN7O/u4JmG2mvqrXsl8wTEksV0k2/g4pKmCX+3g+DuLPicbz6PrwuZ5WyAEkh3eXn/ycue
-KP1kCxZHePoZVyHmMZFWgRfYBuEihMMgVaXCPvF2wIMi5c7WdFCYGdmWFvlQsXjstujxibsWfU+e
-ecKoKDMGwoHj3rGa7HhpgmPn8AiswqIwxNMCyWVxPoraF3a5w1cw4QfX7y+Im+vnPUQx97B4yLoE
-qpsjGp6UsxDcVo85XUaX6Bq2bTnNxp6c310IiodHh2bgUrR+zXQHcForE4mnscwQB/isxnJ/vhw5
-oCnEy3vQ3uDUD6CJE7Vy9i/HFwcNFleIBKXg9b6ziCRhuNE1TtshBvQ8VZmCfIOg6rKCeNLj70mO
-vRtkw2pNUGwVqEIKx1BLmGgo5UibZUr10q3/OmlP6FwVWf2h5YIlsDB9PdfQgNdzJK8GyZT7ie+S
-+3hp5X/7Pq+KzLklzs/yw9tg271ki3DOmWSbG/LqfRzyLqAer+67Hy76W2Ht/pN4BbXpQmsIHT1w
-KLRZnI3K5JGpAwAr7e6R77WMw5M62WlCSDd0cAuNkO4IOgkGSJDcBAYIRnZ5wQI85R7Y8herybJt
-X4OgE9tsP76B5uH8udOt6BGCX/X3kzZg1F9bHafxj65zF4asMDsdUriIFGpT4ftl/PucV0fE7xfj
-mPZX9q/hUZKoywmW/M4YtLeb8/bkCYZtnYqI/z1BhMTISTnYby0SetKpOtOU/kopiqASWI7InUCD
-HK8nXECmLbtFSGAiYyNQrLyRUuR+5RnxCVbqAjKR2YMqsOt37gm/DzhJd/Up1O5zjSz5prKZLgxW
-VM7qJYhaWFIz0BK/5PgNbdoZIMrsl3hjm9skynTdfr4Pdtrd/frK1Try64J9zd6I1Wyjcko9Z/Ji
-sIIboN6FK2zfCRBlS4jf5InJT/AMVbLADkpZ7qkik94X7q+cFky5bWkigIh1okoP9xJ5TlPjXEqA
-RxefKFtfhguNh5frDZWvNP/Aupob7t+DhsDHSW5o4M7buhlHelnxw4e7429/5G596wCj+Rirzi1k
-CnvFDx3eqIfvtoK6YBiAuzvLEcsK75c6PNi0NO0gaSXhrJK5PACEW15afMXtjmzFK50aq+d2KCPO
-SxXQagXBIhTWStycq7EsEeeQQM8Qt8k2N94gsGm02wxMVdhRTdSuP3FKY06N+xuPOaUTC3SJizde
-ZFwnMsazpoaoAeEWbm8O4Wa7YSj9/MovJshUW2qiv5nhQM4VZmJ7J6Hi/aDqi9owcOGCVCmty/x4
-LJ4RXHRVN32/UmKRUXTSxhYBavAuvdMaVSJ+HKVPtXUNGmWA1xpHXuyLDm2PUzvldWQpmOmnnYqw
-MsyiHPWolrhofwVvLnlTFOU8CTXJhbJqpIiKmW0zeE6HN0/oSCcP4sR3EUn+jG+CgnMd3SLQ6Ww8
-HEHtfH+x8Em18i1vGODiJE6Q+1Kow3mRfBpoO46k96VRsaT7AVdJ9pukWdlA5VupVCIyV6+5vjPS
-WT5iTwB1yfaf7T+rmbNHL1AeCmCiixDMxZuAcIVPRNupHgmYF4sHAkVeoaAXDqwqTZkJLDgqqaN3
-1Gad39e8ppZfRNW7bbcESN5SWm8jfZLI/OwHorOxhufh90XmQJM4CoLeiSt7XLygS1NjkqVNEmBM
-pavCNI8THGbBavC/sC57IUS99VuVQ1KBxRHEabbjYyzdA0C0LCrzOqm9PSzf7MEsKOZjQ6Uk7OAd
-e6HwjoKkxeHx46jjWbMM0ucm6W/szQzHeDmssixhzcuRy/D2R2PdzbJdBq5tLWSLrWgt1lL0UBYS
-LLoxraNuBYAV6ISKK/9sgr7vt3o4RNwNxuW6rfDDi2OSPNmQOMdOlcnk/fUMpRJmBf6g3h7+wxsv
-OgK6pNh053HaqjtLAZ+hE9TA6JoKmP+gjss4pYt1qyJuQHJYi2ddy0ySQAcO9B6pPFj+TzbyKEpu
-S5dkeJLSS/eFFVJM5r4+lzkwS8xWQH5VRu+m01L5hEO+E2mLvGnvZ65Rqv0eYMuCxliuVIyrOK0K
-LnlTDRJyzjWFWywx3oz+NiMrdyLcFl/RL1RjRWunY3CnY4hrC1zL1zZ0Vm9J97qm04hr7j9oxpKQ
-+a7QHSL7SefDzY9TgQ3VRc4jIUTEdcdt26qlA7ZDptFl4M3Eg62jO+tqG7fqINZOQJ4gN6dBfmBf
-ll6C96TvJrjqiGyusN2PJWzFzvOdxhtQpvYKSWA6t2soVUwuo6fU/8V5Id8JTlSpkdeT/XzRDMuZ
-PY8LNAaZqALpt78kjx83B6ZKfQCCKrori3I7hYNrfcQiRv+k9VqSXPEv77r/w8FFquLBwA5xAorK
-ubR/DkLC3hljSJtUtZ/N7fOCiGyomuiZMe4j451fyDhF/e8Mht08Q/yPJEEwjGAt9O8UIIqxvYwI
-V0ctYuQ7rhjBnitCoWwj01SQbERJYKO3iXXv19SyelkUD+v/YM3hESqu35AcEz21It6UywRmvQcA
-zN/sytbUX9jQpL9DTBdFErkZOlywy9Vl+XeN4atds8bChCcIBDRPOrOzbDGjxdZTNQ6YiG6bNET1
-Vta2nXy8Qfwg3p8wMgYXrvodzaZx0DKIKuk1mWGArItV/Xkk4CCS+JdO7wTHQIS+qjIxlkkUaM75
-YO2qN5RtGEaxBGsrg012KWRc0hQI16d88yGDuqMODuGMRoi25y0wsjKJDBglcuXjh9DWe/gdBotX
-aLm79JLnZWJ1CQqvyFolXiwCoCmEjgMz/pvjVmXLo9JEcoWqGzOsidRU7/EQ+9MO3dminGJK8C92
-V37WLzXMvWUuS2PlsjElsVuBEU2PnGUO+H+L9Y3JuUCgjwoTIqZTMSYgRq8aCevpfzsAHEOrsS78
-PVURQ3/V60o72ZkV5gUC3ozL3ozmY+SkUU/xOrXm82kpMRjuv0Cngv52afFPQ7YLiUdqcmCYFq/P
-zKSXPeYcz/wxNnLNaYYQCm7s6zGHilkcbcHXEUpZhjj8vMOQv/eRcUaCxbWUHhcuj8G/a6TCv5Mt
-KaqiG+ybppCgfVED5cHgE4feO4/ay8e6Rcs23YRsIYlDItVxNhumqRDJ9TrBVgevivlPKJbTAd/s
-hZGu76yITSOeQREJnQqJRZ08RcQP86S/bYEwrXyjuHh7GR3DdqPgUcuDVtqN+LMl6vLuWtxqZJY9
-a3fWHe/qvzz3I4j/gIK4c0Y/xPGS+OsYxGPJxSrlJLWn8ug74Zor3UYl9uKVGF7Jb9XlApPW9eZx
-H5DhLQg6lHt+lYM8V8rL88A7TBtis5gjxqDeXKcjR51tjk+E/viYueMCsD6sPfO+ik2+ydrsZiD4
-jwNKvtlCOgxGKEhwcZqg4/FuhEi45jXZvZwAPQh68SjTgwTaKkuFd9iUaOXigdQtfdqCyq0egZQp
-vYcDr4Vr4osA1T6Bng1n8RUVA07OdokX7LLsHdIIwf4ZgwQmX18/4XITtw4d1Kbd8HyndTHDIEbr
-ezGo7nQkWBoZz+uVHPBYCiD+kh/6f4Yt/JNrcpMtIAgblEaQPc324/ZzDT1UPMeMmXM/9x0QWb3B
-gu2gTMT8t1uNFM+iZZeBvX9KK9XWMiTBB61q/Q5MBD2kGUjWGSb0Eo3hJCsBekBETXHlGt4zqutI
-AOPnz7YTCL5KP0Cf6uJsNEpplmQf/4dp5fpXYd1Vl6EpIdC6ADXVTnHH4fzL5cB6xovGjUkVuslX
-9LHqUyxknWOI0hAnokHPaLp5jwgdwFYi3V8KXnHFYerrDxfnnzUOCM9IHWJ8bTKcF3m+AsdS/5FJ
-tQ3el8R5FwfZjQSnXyDv3hw3oNnaPDybFx6uj95rOODpc+NhX3OCFQ0xPyh5RV7Q+Mf4SKdVSFqD
-gSfQdfUiAv/lo9OZvmoKCegMBpJBQxyAnhr89rw7ukBsntfgGX3Id3K8/jwpKV8KP1CSS2Q59pva
-1iMYnkDiqgmN9UCCPPim50dYsoeVfmgg9i/V3fCXpCoYAI6nncFz6rbpQxe/bt8HrS63uTWq8mBK
-NRi142u1kKjtMZlVETFjIGzURWW908SdOVNt0KtO+wS238O3IOx1KmT8VPM5TzdFaoFSh+slqjIU
-c96+tEM9w+ltBJ9QMXnY5fuFTB2FmYKL4+W9cH1lCbMsImBiqz3RC9E3TCneoFTlfEwS9TRiuD44
-NUjvrbziU/ow9gf1nClN8i1ZiMOF0AxLDkgv9geAT5nbCquNHf/Lpx75maY1vt1Lt9nSLnh6gNxh
-votDnmaUv5vZ1WhCZT8rO244MZLn/3GqCaEFxl+ch4lScEBsMSPBbhFA3toygNSWU+B3qqfLKL58
-+rqERpnLcv11nrmnMvviCyjR0+xq4PpaE84nKlD02G29EEPyKMfdVs2eptLp44rvbgWHSObvDmzW
-SJhM3s6Q917S9QlbNCliqVS9DkzGhdZO2z618nz2Ihwd4aULN2PLxYfTpMT8+WopjQLmBdgC8lro
-MD5raKInOfRvSEScHcH6LPebDcxnGOYcsJnPXNZGZ/gKSYfALFdsHQaFJ9NCuhi+dOZYRknOtSh3
-dcDXN8beNh7GH1YOpQhjbWLemFSfBmDQouSUhEImJJRDWHUHIWs0JbhT5g/W90nKbR+kXLd+IidJ
-vu1U8s08RJUMG39sBnfhTONqGRvEfVLKrQSAiE3bmhcWodQE30B6UNxs9E5y1at6IyTElXMos+I2
-NhI/YXRhB28aiKU/wNiyqpWZgXYU4QfMyeD4WhLsTVTn9ZcSomFbyJm6p8t8tiaQF5CFlLUXpLeT
-S2vTbB9cwyFpXGd/cH6P9RKsKD4doGp4EwJnfRQnASchpd+jdP+RCX9u+vf/HB9XFhC+zPtHAlPu
-EgGunaEpu9mk4x1tj82n9RwPmw41VbK7qS/5i4Bn1HGLNFtSjuG80TxiUBvQwn5sbVm0PFt5cayM
-lzosPK1vrL6mx/3jJ/GmBcI4ArVx6KPYKB1uU6tvIXt+G7L3U4XlNPBfdJkQJk7ABZoyPOefe+Zr
-Lf7ZuY3Vyyp16XptzWt/RHe6rxJq46xvfj1Id+lfxay6FG9wPW/QVP5KX1SYpckke38IIqMRdfYi
-X/ZbuKJs+5gmaawOlhlJrfuGv0VG42jeV/Q++xMnaSviLdfR+/ZE33Bibw9sy2Zt9+QeQQGOi3j2
-TIuf65SScjCfGG07si1cc12oOvMIC2NfoDbCRzi1gb1lFbKNiNSasnmFYNyQ0WxS7TUjXlIqVk3s
-Ihc1mvP2Z6sF34877RfnQZRHl13/NlAx0EuK1c+yyU0dKiwCmLY6ob5gy1raJVKRyNXs8QVbLU5s
-oJY3yt2NNGer0BlMrEtnji3XYkcDKO1mYJVql6pST/LdW81i9CcyJ4gReBpTfYatgxH8dKW9yIZ8
-VK4clyIM9DR3x8BVJ8bDvM+WugWOZEz+hyECTudylODZZt7ncsb4lzB9VaG0ZirYNA87UlKsXioe
-L8C68uUcyRFmzCJO7FOY9c/j4vg4l5/i308uai6xAJDmc+5z/Z6c1vMn/7S58LnsHb/s4ryg3KN3
-Yba2Mik7s6OxquVCvwXcQF6yr+C2FgXDlzN4XBsy+tzzjRczXmMHMZXMxqF9TCd9FzARv62yiq8X
-PNMmlCh1ohofNPN0EJGLJRtIxhhR5KZEVa7AqrSTeIHA8xIa/9PAtFrQlRTpEjvwqO9fW9o1WFvu
-4NiiTEAmZr8T+tLkFwD2pzCQDjzG5IdoXUGtWnq53UFSe8xAxet2LxM/fZwpwaeBRFfsP6liDgst
-YeC2QPGZdC+UEJaMp149W7RbuwwznyYcBQrBp2bmysSAttNA3BxLPfFQKDwpku3VDRAuNXDkhDp6
-QikIpaHUuTR52vjuunSoAmqflfwHm+TX7Rq4MjgC/tvLO3ZgaDdC3WyLdV799gBtpNJSAEov/vjv
-19idjajIp4IaMDOWXwHko/ylPT6jWeGEAbfWWl6eoKkPJkHd74WFU3kOKrdSYWhblReVqS+wGDvT
-BW6lhuWpvpxCtrnQP5BcAf6k3/lzGvAjCqmpNbV+ueKriarg52f4DovR7oUAVTn1VrJxAkdvc6zj
-N25j2AiuXC54FUoxxJ1zEzf6ee7plRqy4IwXyjR8Z9WGBWjP2rnZ8jx1xOtf4sG0l18xYFXyQyY1
-/IMzCtyFSDL2jRX3epIMEJS4V9fiSLxuS1EenmPco0nbUA6cd+pJRV3EOZjbbIf+KHQpCJaMJhAS
-BbFdW1QSoO3Bcj+LVE6POCvB3tfUzfEl5TBXtfO2N5QmqeWAMcsSlYpJmaSqcomIxPxCkvuq/c/b
-Yoc7KfNYFNkfuDuQ/osXv6jgK3jMnUD/XHt7WjJi9LvpfXwSy7eESdihh81kbWWSGKlkLJw/zr8Y
-Qn7xJQ17qIOxwMxXomjQARBwQdp+UxAmhBSD9hq/lzldDEgCWhd9bAiKtamAJscgxObC87umkBkH
-Vegt7gIzPorBuOOHrYsVa7lM9JMmkSchqUwL+H7kaJ9aTLbhATOP1o3j2LOvSdQDiOJ0rxshumYG
-xgW6NK4LYEUoOmSoBmQR2to+/Aptjy355oLFu+A8uSpKIvmKRR7ASfxgeuMXONttTOEVzujuteWA
-iXNLQsNdLkXAaOhrf1EM6aFTyMr4+UUhd7hroKp4ginnQkQeCoJSwqzqAGWfpqj1Z4gYlJirIeyu
-WhAyP88V3YLhrDB453RfZNyaj6nXZnlftMIeaj5374AC8/pmjHu0PTccBmfblpGHo1muQR6ws2pD
-Wsa/fTv2mtIvESjPTIgDHQs3kmOKKrgVDLf7Kz6PUnddiHXtmJR80iS8crPXpGhdunuVGU29pKiX
-pr2qloN+dajLEo3rJtTnVwP9JEdB6grrSXaL0iMpegDX74SrkEcj+QVORQai4+bDDr0WaXRlJkW2
-FwyJHAHi4RA00P652gmIKHPdxm3kgyu/zdpEMLJTxPtLeelioUk/BtA3Pgua0rtPIlsElqDYP/l6
-ueDtLlIjN2Q8qcr42GAUGOFcqjWcZ/3+tLteX0RSQ/F5eJGNZiM5kta+rE38oD8PvuftxXNubbT5
-8+7K/2DnIfcXXE235yi0NLxYP4YWu0NYAXAmLmsN3bM7HJVExfwwpJAybuhl4CUxQ8JlOrukVHML
-Xr55cuAHf4RX7hSB3cZ5t5gu8dh4q0CKA8JNOkLdMTYa1s+nuUDUKUMnuvPPUxaUTFpZFred8xiT
-J5T278nKUSnyllRxecCzCE3lob1cP+1B8nJ3gITsnpxdLhTWSvp+i/uo9bmhr8Q25JWv1hA4Z8Z5
-OWq3pdcb0Kf2Rw/vNtJiwJCjcY6McML0i3ST2A2E4SblSN63vu0+ZH7zJtq1Rji8KwCUl7OeFW4J
-ijPbyJ+iBNeyVKVMVxWX6ywldUo4quyUiVUaOKZAHgLLEblho7R8joXRn9kvhTyLOvVVJQzGhdKQ
-gNA74BzQZV9ZaqXJPe8/lr6X8Tww9Q2gVHPLFKq5SGQpcitGoFgiaV1j/I1546w/bGrs9oMfnLOT
-zanqbu+yc5gywm7gvc7lcnqMx9bIxHW7W27mHwVxVEGB5rIZ48PTBPZBRvzsT2gcwnajIKwmBoBY
-9clZEXbrEVjehBON2nBC2+CZSg2r5E2SxlXjsxtliH2jNxoEB0OEdOSdxlRiKxDABgUhJ3GUUhHJ
-hwdi+JAGrGmho3cf5X2Ih7wjogJnPEMsnnyGz0vRjvnamKjnodCog2/5MoeYDjJvqncpzVYTSfAi
-Gy8uckPt3d07Y+2VYmA+5y87emBCvmD1ZiZbbz8quOpRMArTGlv+UrJ5Qk/WEeiF4KZ5mefS+fGF
-So5QnqxHb6dEBdcZFt+1owznQkUDtgr3nm57x53qYgOwa/HTniHw6FfTa5HqOIOrCT+/bS97ot/Y
-QA72miRoAsx4y9GsNXc3jnVDgCXrxyfMIiepSTIAQ6oLXF2QtC1wT1AI8wpJthRnml3LKh6Uhsuq
-oucP4Rtkkb3Dw9bkt3tVmBLXRWFa2exT+tMRp6Q8IDAxiPX4Q9A5xErBF+GDO5cLZ2WgHeUm4J2o
-KOxmvJosY3Yzk9BNamDuHj5Wa7AqzXKijlFUJaTV/C08F1iCkLmCkZeYsei/aUjBBDQQCAnJ7Bnw
-aQ5LEhWeeqNjiib5mPWtRvX0J5RyKHRo9yt3mFJH/tMJiuRNZs//scsJPkS3BhJBVfmOgSWtnx/M
-nzdvXhO7ZldjaPSC2NzSQ5/4itGibLbeA6oqKyhIsBGA4PwB1pB+HCImvGD5u4Df77C6k45AG3lW
-4lxNnvBYhfwYQgyjkFrDnPTDalQm+Xcm+ZSrqG/Vu/Uhj+8L3f/GcanMpAuV2Sk97MZR43qjf31S
-cZAsm1apKVPXK8aqWPdfg56iD7krZnTmJOiZ6E8bjXSViTvZhapD5XNp3HkHMHH7gn0bHO9MqkIF
-60K9AEGxX3bzn/WkDPRa/QSCRib7ulmgL2T90zvBnQWWKpj1FQzqXib/jb60s+XRVn+NrEqNR4+W
-XsIz0iXrYXuPMiPJoAJuhmkZlxpemjq30JyC/8+sLyP2T7u6gn5ST7t4bVtia+le3W2Xf1LuHzdL
-xHlyuaPfFhmYpdXNpxVc0Qmg86IR6ISWepqlDktJ13uZ6OCnpAakVcYcxEfZftLmWPQ+bQbN8IHr
-rjjwHzb9jcRbk9JtZs0oAnqEjcRXR1iYym8hm2Opems4A0SvKSgBZQ/EhJnHgXYz0v8kleLiWiDX
-Xe6mOWQkNg2FZya0pUKeL1w/zopZHkE7qoI99f4xzj8K596N3b9aSIyrm9yrPampWfnT1wuUF26d
-h2ghcfxx9IPerOZN1UsWZh9pQllniQen589vr9LaqsvEYIfH1QJdw52qH9Zjbi/dmpSWLir7Ua6D
-T6JL6iG/QcTI30M+0J+fijkzrjkQTYCNhPDOm+fayJzTWROKonxyl0kmdXsXkxxMn00mZv6NEjAB
-A4UUV360Dzs/QV4LCLEiuTXXtqHfXAsqZHV9ZNfhnZacq2gbUvHZmSfN/hhLHKSbqHkfAe1UTLwq
-VwlduNOtehLtG5rvZsl5GiP41EpdeoJ9poYhVKY4zJFYWRxU8R6UcIFaTrXzlwlnrwZPYtezRr42
-0clU9UoH4yIetCsBn3JfUmk4U2aTFaoxD7seJDlSMmOj9/9LlVVKqxZzCHMQzh8cs3iI9L6sJLXe
-s6KbHtJGkDpsalTh8FbUQxGa8Tp0KAjChBgZMxJKNrFxNFRWl8Lf0ealITT3Sk/pXavyzYm10ziF
-ut8EXjgg3U1REYVfbcLR3tHdXs0iR1kcXRMJxo4CftjZzpa17HkQVBvWOlGvDCM+uX+mvRqAOmLp
-Sy4Lz/NtMCHu0Qad1Hq/6+cUXr5tUmFCpZ/14Cf7gtCpohvOr/rsKR4hRxLKWD98nxIb8S+KutCW
-3s5QvkE9qp9go/TPCDmAt78LPOYGPGcqDz0a1WECFNMJVsbQKcE05irVhZg0eLQFmRxh2n1M+PFa
-RWe/pkvLR0gKPH9JkiwN/+VuHG1rFpsequhZQTD/Hiz5MgdsUlBjKLxx8auhagLZBTfu6gGwmX60
-T1Xan0YwXveNZTnykLbvaXd8Sebt22PXjPlpPjzphj0ssi2QcpCSO9JfB/8y+RLXtR2fJnhQZyh0
-pmYlf/lv7DC+koy0cPVpE4e6NfGxfwp2QHUdYiYAWFf+jFzDFIu8cCijlSHe3UvysmDw6HFfvsjg
-8nHm61Gi5oJcKC5/Ds0wB9tFKYwPII3eEWYsnmwSO434paGfTHud1A59ndtzkfGc5GX9ADLRp9r1
-O4Io8Ncl3zGaT9RkkYDauljY413quFYOCRlQ7McHrl09G0jzECxKhtNTV80D1GU03eHdSLX6yCdu
-L7zaWBXjTxgPOra95J/4aacUpNi14QT1quDRPu8KcNMnRneO9NTEmA4nylzw72+eAlM7kVAzx771
-gArcDpKGfb2V/DeE7TCfSxUrmWuVgLrM6FeyLZuJLFFqlX0Iz4/Nu83HDbSo0WWhyNdLra9MW37m
-iH9aI2CQQecRgNkZOr9rxKfocXTfVMnuyWXIcMxqGfnPS3R8hT5KUAOZqf4XfmJxAQjx7h/ErJ54
-nKxICL6c5wbv61tDjaEAbW/bBRcCBnpmj0X8cKXbwsP4wL0Kp2FMoWcRP6JBmfRtAk05O74ClGV3
-udoIbV4dsUk/oLxmaFi4dDoY8onMDywBx2mPE1ONLdtSvPgZMg+2R+t2HxWv8aLo/LzjvN+QcvEI
-yHKmVmu4VU/SoSTeZRWmzOkh2/ZGr3qlqzr68iNJfZjrapFAJT8RPsvLXv8It+js5ut1jMv1ICNT
-OVss/qeZABiPg4v2yIzl0p01GToOgoMcKOPCuOZ8gy970NmZfI7mB4EJz2S7l5Q24jpUCImkDo/T
-/k8bXiigJEdQqOdv+PwFZnpQ4CHqfK7YhJRCH3kZj71Y4ft1U/Xq6dNXsbdJW8xBHTH/W8X4piAu
-qHrgV/OvY2lBo6zMf5cAMhaGGR2pfWpVUZHCpPWcrFZhdCGtrgoPrsb6MC63aVP59b+nwvr934jj
-or9VOKdhF0/OrLQeN5bVgKHliiU4fhm6bzGLSGvMl9N770eYruqVs5l/B+sgzXR1+4Zf2F1/Q48T
-wd4XN6wQ17UBVNvlJkv+6XO1KIyfR498UXWj0B5k2yA2SGIi7OdOPzCs8m7ZHLfvMnAfPHreHUFp
-LjwKU6SQhqieBcJmLJONB9rC9sCso3OT+TxbQDZgPOsZxX1n+ZbsLsgGjyAhJlC/xRK6+1S18twX
-ov+qcyFbXWuJF3HGuCbk/0c8Ivk5BX8OaGl59x3Uqqiy6l7x+tCU8MFXuB62DKvwRuqKQDcu9vez
-pONs9djPMjWk8nd4ijHHkPITw0Zj0CZ/MdN2aZe6k+Kaf/GN8kCI667GjxZTj8FZ/qacFAZGd8rg
-kcsCoFATP3pgJFcBjOltOcvzYnsre1DvxAgGaw7kEWPNx0/Kt2e6dz20LA4V1SoBRiY4kjhgXqIE
-JjBe9+deAHZRRBL34UL9C/5mTxbm3m66MmCQl9I6r86oJwGeM5ed1TIvDj3qpboyM9iM8KEndv+E
-exC1upCaks85Tjc79ynWReHNOsdUkKcJM/yo1sORbZgt4RQZGnNor+agsBV9kDVMmjbb/xkvKJAB
-Lj0Wi/IRTfPhC5HvesQW60uViEpvpi1TTgjiIeSjYzBwOvEEINuPmJSDAEj246HkynJrO/ZYSW0M
-/K+kp4lIRrH9N4hgi7IGN93qKREJcQ7MdEGfGfd5K/G1SN04bwPiRTbly4e/wLxBbKQeK3/yJqae
-JrsYzONjFbuYZTEpOwqRwAlSGfJthbUeqEW4BUp2mBSF5aJpLaajo2cwlJLiv1ugn7g0oGdH3BKj
-ZqeY9aPz8zIqxfDuYIAqxahoT4XEjtF9W8puuGuJdbjjRld4+T406UqpAA8FaNhh2RQNxpDOQY/g
-DGsppxBObiRmNykPCOWBCvEdUwyfN21BcJvDbV3YxEAbZ2lijvznV8svbY1OdqNLaAXGUd5eGlZI
-nlMRBHJ24tout9Fip/L0ZuV0v+2u3ne0kpCShD2E7QlHqgCluE9ujZ0DWBVHKK5WZHyFXsxV/rJi
-NROck8PJ6Sg6jSQvwsYROF7fu4507SCEneJg7EjgNKdtr+kb5lqPSeHCZeQVCZw0JmfM022tGUl1
-wtifp0s2j2Hoy+EwsdCNiqom+QG5vLn5/3PMUYmPNAF5l6K38WGSt16DAksMXcNruYAhCQRk19pE
-ajWlE+918xzpz57Cn5v1Wd2+Loa5JoUZlvlKMA4vCGYXtIpFwKPA0Rs7uTkJMCttlBu2opWMEj5e
-xPAKiOclt3fsq2rupsy+gQcNtw7fCmSO96oBbMCdvMmeNMHP8yRfxDKsQxqD7jfc46ZoCl9tOz41
-O+MFQDJ+zWzGc0ZDOsD7pNORNGzNkrsf76rkYzHiE3PjVtcC89EYPofCi93d1+ytpwSvZ9JPuBqX
-RMNiUWufqCGoNZTCh128tdRhPIWLs7jSsAyE1EXyNdICFNiLmvZtak2e6/ibvRQA4ZkpGbLyuBdj
-QYtqRN9COZRhlnQw/aCSRs7qlK0fyFUKJNvmMT5QPij9IDtDF579GKX9/HpQ4zqb4o5jtJBFd6QN
-CKylISI3X+WsPGKws9V00J7JfBjki3q5Q8Yk6RyVLYv4tZDgG1WpAsOP25+bqUUOSLBaGfOcOIIQ
-3sOHqWc95uJvFox30kVr5mgHR3g5ulNYvBwEax0pNlZ6vTjPGCqlA4OrK4/qyzEpMlzNa/WefPru
-cfWIjA7BoCF1aOP66YzlPulCAWAo6nxzQy66rS5+tpeztzEDVJDUWhu8wLM7YDyyQZD63cAywVht
-TjI+XElh1OdgMcKcM2aKWJchmaxMoxt17YOyq8gMu+597uO5zPS5WGx1UJMbIokdRZCtU6rwV28H
-RALH00ThNYA7g4XoPgzN+F9aoFJtXL/UuDWd2/sJBptsaR9nKOsXtR/tOhlNQk9GKPYvnazudC+J
-MdVIQ74+/MqKfgc4aFuA6BkH+KTFUj6ijTcKn8fqo3n9S12cp+qmwDGDHwK0lkbX5ZrWeDm7+yO0
-BD+1Xy00p2lvl9J5SBT/j0NUMtSLh9QNyHgWLi3S0qfF2O+POoFCLI5mkHqJPP3HMVOXsOhtVTEp
-JcnDDz4Cxc0rM6UsDRymXjIPhylz2u3ASjw2noFmmcD0w6Vp0txwzU43ahbuFziGarNNMoYMAM75
-R0y2+jb9mkdKdYToEkuL3ir286lPCva2wKV5PVV+ZMhDCYsOqFntWV7fkTOvxWjJmv9nn98y3xDm
-aBbamuXyI/sk9o6ITz1YPOUnGnFA2Ls4W/O9JAXckmcRt12wrb2jf+yiVKrQOjlK/UayaHBA6Yl1
-ubA3sgyFnAh0rw/aR+8w2sgWdmJbQAG/tLLxOsso8LQw6twYb1/RhgRfXvh+5fZib/qhzSy/BOs8
-guLaYTLuity4VP2SaZcsOqe9mjKE2C/5qFksbFjzV6X5NLdunu+PffHlBHT8yFP26VZ6Bf5ogJ5p
-vawiqKxyLIKLZKi4oGp8d971C1u6+I5v42v2Vrat6r3+enJFiXMME7An7i/vC54696EbhjPYQUGa
-Zj5DFDpNtm63NKP8gQ5Cgv4heCdrsee+QnDisV4l3MLVkgSDdN4QgDwQQD2i5/7p5hsC/WWZqDa4
-Ir0a//F6RP8nkyXCB0LcH6mXLuXtHFNqr7cC1ulTGi1bu9HD966Qshn8kKzqrZ4t6LCpYQ+Oqt+X
-36SdHDJeVpzrN4sR8NitKXadA6weI+GC1IvQG1WLMv5JdbDH8Z6zaRDQMyiaBFowro95XFEIjDT+
-UBPDJ/YEByN0bbxyzL9CHGIcUFeTFx7OzC7G0bZ+Wa64jmPLozoI7V4r8OYBbyC9EEDcXy91i5PQ
-P/IiVXukMPVSBR3Nk4jqreI4uKVrs9wFeq5Wz2SPvFHl4quDsKsnMevwHLkRq3naBd1ndDscBa9U
-MPJO2bFqizsNAoSHF9MAWYSOd8pLDspbeAgQFpqhAhabEAILw4Rxr3kLgJ1AuoIips3Ww7FZZAKq
-cZZOwnDTqESOd+4Yzz9kpsVqWyCRrnxeSApV++Dt1LbHl33y6UzAaYQ2ElkEDMbprP834dONn0YW
-8HGkDeHQN5mA0iuS3GYIhfBE5p6CVS2YVOmzCu5z64PKx62so5U24wUrtwdjhR74FuumNtLymqot
-r404rqO/bS/7KqOMJ9RUJucYe+o4VaV9/UzTlhAmzYI0JDR9WCroXQdiKpYYodDDijR9aLEkQwf4
-qAtR/7f7nUiN4USWRoPmR8h+qp/YlYKm/MQSPmQvEcn9F8aycrPMO4tkythkQKnbyj9bnve3f/cc
-rgztBzge9HvfpgCgCYlbjTPeAtPkI3btF/yiN4qlGB9QKhxo0S1K7zw8mAR1N8XRnBRZgm3Db9de
-cxPVHZb06EMargermU/9cl69l1yVU3Ltdtst4xcXjQ6JQLHkwp4sqfknundCMD3vgemJvLcGnwsg
-ynRpWGL38DvC9Xh88IHx9bBaTMeh8aXP+R2xnT3t4lGeR4lnZDBYIXNzNqIQ61DzLSqknPdaWgv3
-SZBhPdNxuPJzMKexHThHePNaJ79j0MggITZhB8a2Lu+Ncab+BivFUahNQ0xihYYvDluXtmq3zVEm
-vSl0pNTcy7TURKi4QCnJYcOOxKExYL4IzG1w9X8xud07Z5BfVmZ844WkwFkUAC/ACyRduIFHKjCa
-jWTsz20iJTmDbi46fKcvOnIlRP6ZjCDh/e6jLbFkmCclCl5ULj1fY9CEsLBtnNz6sS2FcIt25eUD
-ILqRd25EROs6PM64jlw5lrzcnOKUkbSsNKEUXw33xDoPFtXGsiNl28PUN5/irMipuJp+LlFmJinl
-z8kupfTNoGMfv9RmfPwW44jWyaDmHS9HouA36cVPf/Rrj8W8NMJZ1vdbK67ANdnrqsl9HRuavDXm
-mgiCHt/k/55TLLIZ1QzE03kCnTpchbIYcYaqk0v+NpjxInt/biVmWllHyhzzTe1DkXNRZfePA12X
-emb6Ac5Ie/xa47I4aDmGz+1U5TEyZVUl/rTY6QbpQO1Gw8VElpH7zmc/yqJre9qpuaMF+5j96ZW9
-aISuwGJBYUTCJT4w4f/xQxRl1IW3d5fJpuRcwRG9oetBvk8Oqqj2Lp6irySFeLpnve7tJ+TRsXam
-eGbceWI+txIeuuiiUGdD2cISZAY2diBjYVXIS1UajCpFHkmhovCZ7ADWDoGHM5xb3Zt6yN/JjmnB
-14QqCf3QfHvQxha9D6mqoFBpW0AAmj1wLz4rikwx38c5gvNw2bXpCZpM8kzInEy1NFWCITzOOg8h
-KXnPovJuz7ImodedydHd3aQykN6OZhc/8+APt1jDzc531Jp3jT2gU0/7uLMzF/2aJx00wn+Aq+pF
-Ibqay0P+9dH0QpZUjKdMQZCMmKDtph/ZcNwTd9Lm/i4mHx6r9qRYec+dy4bg8up5B2/jut4y213f
-l+WbRZLJJY0bXG7gLK3t0ICENT/ul2mv71UdW2nEHESI7PCTL/eagFnUSBGcYYg7e3f7gisCFFvB
-tIGzyoA7nZtNNENsQynw1oPqr4ZhNaOMEIxs36EJ6t1oCIyFD92ASKDzlP3Afl9C6M/Ei62hwi//
-L0jhX3ATydjys9Je2WdmpMDXwF9vSEmELBXQdFsAZ54x0KAZhWupvH8q64lfkL1Te2iJvwgf9eCS
-Qsb7Lf/HDCxBYnDrgOT9rRwpB8tiJoG9uYuo4oArT7YSdXfcfodM+eY1fl02MNkjKR0ZbgyHwNi4
-Ujkz2X2s7TWnAjBm0qx/Unm7XwbTk8Q/kGtZ6Bflv2amE1BQGbogc1zt/5KQMdLeh/uj460XAbAl
-kKQJgasByfqirJD0fDcHpXdEpLyh00ksuVXJ0hqo5zBRYqHZZFa0h3lalwZsHqnnVd93jbdTRwwX
-S/nUXqJrYJhObYMPgVSM544eIK3ma0IQCnO8sdcbF0AfCP94mtuh5YyA3+RM83cnhz711zHGelP3
-2rUdtUb8H8zWBlVYR4EjdUWqni7TaV1NJC/9hedMSV/g5CndiTiIAvU9CGPt4PnbGUryL4675ZNK
-epwBW8Fo5mnGngO2s28rShUL111Gs1xcSaak2EDZd27q22fBKKd3G6B0K7ShQJwHU5OewzzRTdwU
-EaAiw71CE44TpOVijFT1q0qKuY5OcL7bdDCML3EDszpH7NjrTuHtc50DTahwdYvLsfxcyMXKFVJM
-BFnGe0dYWJoyQ/d7HbSbhGc6UWSiW7O1801CLCaSPd+qZpAXIoscy99bzaPbjz6euouWlBrRIgtW
-+voERtQTNn6S6FZO2RO2YzL3kWoeMODYsBbphT3/9kVKntQVFmbYdlviIBQSNCs0n/BjsZs2McIE
-XeiJvYLmOYVScDOuowImpzEUNA9M3k4w8huRJO9JyxUXT0icRIoSdDM19Y+/YJBsuIwcALj9RU36
-cdTtdHMxgUN1onYj2kE76lJ/igt2gmDg6uJW3T0KUvlpyKRWvRkgBV+MB/rBVGPhy/cmO4bcO6W+
-C0t9BOYq1QBwbWpYkIBghJGF7OBBJROYTY5LDqDgfOMPwco0RWr8tmvz9zHzXNkvvRQj6pQOsGe8
-fRxQyEiq2ZUn04sDLKHqRvtVKWfjKgVYEcBRXvtB5IaKv0bgemYPCGP+88QzGem6NhgR6rozBQai
-bIN8JNGidr0Xc6MUQSC1Sy75FTxghFg8L67utHnXcmSnwSI/+Xpc9ALRM49A7bQ1gtMQMQtCPLb9
-+BEIIWlGi3hmCU+0bEUazPi9uzZWOOWFswDNGQ0c6AhIvJCTpaLm9oaBQuBIkaDtuTgVuYH40kpT
-6MZeLlM+ZHND4Z/N77WsunnlCi/WA7Oq/GH+QTbrJ6Xl1FWyJru9SYzimg5R+axgc0M0oIpLaZWd
-yV1uUAyYGFGHFNC1VXsvd5xRSVB2jf7SusEV8V1BXPcC6LktwhfA/OsarZrz2M7xz3cXNEsV5/0L
-nNRcj7hcAEiVUfvtY6InOWzjJ2kMoqatucHqqn8IOpXDDAoancEHnROiUid1DSIqE03fMEWfkpav
-Zsigr9L38Gp2u9B5/xFbGWgtwsihFQIGYWXpVNq2hWTQ9U76Dcm78JhM23r9Add+ChP+oz2txYlq
-MrG55Km0iAMNQ+nPIYGRVK+XT5nMVMTNGg3lro4nMqJkmzbbGXxE8kHECtZpf5O8WxkkHQVIHWe2
-3JCBpMRtzMOOjgQ84pvS6hZ1glpNj6wIBUvaynEkgVHg10DXA21Y0yJhn25oFfhhk+z/SIL3G+oE
-X4sLzR/OkMyZzx0MeB9FXVW0jynmzv8+/JQx++nE0ref8pI3w8Gix4CWzB4drsgTRnr44GQXFffN
-MwHz5rS52bB2uDn61qpos6kALe4vULKaf39667fveIf8/1BODtRMJldLkI+GYMf0fMwv0ACv7M9b
-gc5fq52gDuWRFu0IVQlVeesLt98ZIy/vxXjz58HVYp1qqUFbA44acv/yTk25XZ/Pm+LgeoOkQxWY
-8/0+mVX9FtfoiAnT+4ZXup5ZQH6dAhsWQObbk3TiB+tShc+98c8q521Gtd/Dq2QUnpV3yKkGiWZR
-MxXV3FkQ2MD2KcXr4z+79z4UBMQjVT9FIKoTXIIdGsv1roqQC5jFFAnRIqmpsqRn9H8i/eg+zgsJ
-RYAwuauqBhUH0B7WL8HKqnCk+ovPEDp/2LniEJPObFWY9E3C4ka3iHcYnZk6ecuJSkW9KYIwUHJZ
-Ks82xUxZhTMAfTDeyvuuXX0Kn7heLvmdc3puHBDb04ELpapgJR0r8uQJJN2gB3KQCjdV4/dpKpHb
-trh8IqJHDLgQgIiSBQ4b864S0/0Kzr0iCABdZv330dbNzsILmPlnwtt9FhCEeyDYrxHYuWnZWD/u
-BJgjLDJqjEhFTL+VCIOOcqPYr9dAARLnLtLyyKUmVhS9P48ilNp6FK+rGPmtf2/M0IaXFQ1Q7pj2
-cEFHqNDES+eCMdk3TLXScayN7S/p2qOAwPJnXaLy21xsqRuDxMGza2gROqp0jaq1EM6MGxdeDyoI
-v8z+X1HoI2tgI+pU7olsUhKVSPhlq0VW4J9K2jU+/LnNo7eyEjctzqs5hqZp7DPDI7+F4VMUqyiK
-3aWOBXC4oas3ylE3kJxQ9+sXGsJszzkAjz8Qq9funTGgjzo7QFY/wpwx0vU5g92kaBNT3k5Yp3wO
-/B+PvxylFQh7wWr9eqJ9OiRVx9E8DaU4Q3ZmwnVna/zdqRgQC7ia68ap0ur901iCdboWG0qWBxSt
-jYtlAkj6jRprqTxm9jTXF0reVq8KwnGZLLqLgy+wE/PG1hYCOGm5IihLk1AKBRTCI/QmSIUIZErp
-ZcP++imWnG93UXSoJfvfakMEISCzSa3mtuafdlaKVgPWVHdC8MzyoTzQU2Mg9/U7lwt/UkTG/Va8
-OcWBV2bJpSkdE0zaBuE6SEEJk0+L/3Mj8wfiWrVpN8S9HWGrQhjQYwSreD5T6CUuyT8/RVtzta8U
-91VdOArK/yfp0USXi4CRtX12rFgSkLBOnbBDSSAPklcdd/ov6UlEOmj4Puh9bJsY8eLci8cS0LBv
-2rrF7KA80QC+jBNla3imWENTsbcZ6onmOVVkrp4UF2R+FWz148Bmm8nQiLqjRRJ6EoTkWrglkucT
-B7hsI9HZ+I49x54IIpLvDHPwAVjzgYgoFw3Q3XQ6qZO3RNZmPE+KF/+QeiEnPGRiN5/5HkguRMSI
-J7LghuorZIMdYOk42my9RSSV6d8SXqPWqT7BX4a+ABd1CLU2yU4iKlDcd1WHB8STvzCj+qLcWWLy
-MsyH3JOqu5y99kktTrRaVJvmJGROLzXKRMnvSpKUvsBfGs9Z4w/OF+iolKKG7F4F9fJGHa/jzJuH
-+GQoewFL0JeAh6LO9UURUdVO8BxUq5Ogz/BsFGTn+DTh7pyXY+Em4Nl4IY64wB725rowE1AHx9P4
-SluXTHlMROLYCvRdUQFIfG6CPOW2mfmVb0UqQQCwfOEvV6YAtkVZ3yxm8ldbg7KaMwrnkr7oNMfh
-HwdfrzCl4b0rNv73U7+wEqpRvVoqsC3hJDGv8186tk2mGh/M4Jck+ugtzB18LzzFp9BpRwYQk6xw
-NVqs49QOZEl5sKJWEjTiEjys0hnS7z2a9Unz92MVuYrwQqtQ0w8LhQmTgUgWoWb8haC4xArsSFnj
-6ki/Y5qfHe2Cs4ky/kNUSae2qlPkrBDdv+RqxvyXj/caNazqRAgEJyzpuqEFuh7/v98mC3p+nxtg
-ZhI0Yva2McbznyMAGEHdkIb44cSyWFsfO0ZAJzkZRzUujIODyR+acfZ/YKC+QcaGWUBxySQPLOQl
-xaMUW1mZHFvL0WBZxB/jlKIRHOe4arEHrnNitCKfXp44IJ42epaERXVh41PL9Ih/d9S2z2N1iuzB
-lq7o/FDY3O8PMGDak0GnoB5rmif3zcPpCP4hNS0ZoQCW4Go3lMacoMVG4tT77Jj+GnVcP59nTu6p
-UwLMpd4QpsJ8lP1V6qUHG9rhoh6+sdF4topRPrsVG3F4+F6TryupWWlSBvQMC+vgxYq/UuK0v3Mm
-ZNvi61gTfsdHDUGHOxZY1WF6OBZw1nkEWspYHkyo9jRd3RrYPGZdpq0Bo4zieVr8vRyR2mBoccJL
-ycxtPbmV3+VhNv4OR5KXDix7bWZqCGn32vDkgMpAeH7TRmWyobmE+jyn4T1fRJkXC+Pmx7KVoxbN
-dnLklMYpQqjH+rkA5TYMroRvEMwkx2ABfFdiHu+dlaTq99Kz0xXP/oQ5QddnGGRyCjKXdPV9SC4b
-t0PPRxqp0CtrOuDxMOdVxjdngBClXDAt0i4NylH5M/u3ZgaCwCeRnsH+uLmoUKDncwADApRpkGd4
-u3kxa+pjH5ddOnzu/1uvZSv7Grg4t34teAnc2+plK1B4Yge+wtnI5aVJufbP8iNLo+4uUeT0gYmT
-QKi5SOVlTCJUMcJFDmYoFG+BM22NDrqVPHDEIPZRaRIgXJ67RTVuChWckgoZGWMYwhXrzk1yi3rW
-lXmADcvFt1Un0uUGoxaoGvvN/5t6VMExsqluSUHtoi7ukFchjzXblP6m1VzSaXaLf97ShpJwff7z
-U/ErFezmbwnU1zbUP0TPsmJanwErhdrqLNdZVn+6A+T+uvLwwqF4AzXEjYkhA19uryLz8mIPoJ/j
-cy3MXIGe9sBVt+z0ouf/C6Gfi8pBekmmpsbjsy8skvNaRF4FcgIt8ycd26zI3T5NIXakpMUVvmjh
-IvyRaMKDuz9O1FAq4yTwijHf6jjA5g0UMyGP8WfIA8iBCCZBRxKiMu3foDiJOJIaS6ZQH/iL6QGW
-Ur6JRL667YEvMUvPwZTVKMr6+qR/30MBZ2x1yi/C8vAMy9RrPifjlR/w2UyTYZfW+Ni5O7ywFcNv
-SxAusin56G/y2PiOETAkbAHxy3XuTbQ1X9yEkciiB7sfzYGviD9LoHiJuqgg4QtAC3vV9XpdI+fg
-LvvLDhJwq9f3adpCu8DVGd8oLcDbEr/VgcPBvV+tEuk1OlBNF+//TvCpSsolAd/oebdPWYvSq2ZU
-9r6WTCuq96InXfVHDcnQkrAsWRc10fcfHTX7cyUNdV5VSZCucK/5J3e3s5JMn31yXNEhpu0i2+fe
-+CBMgUnok0J3MPOzSwCSl3YDEmEmZip1mtsfxh1QFnTJFNhIdP/TSfW77yXrCex8wmZQM7Gz6+S8
-jmAv+sKK5K5RPKL4ERjcyZHxPijhfxGhEz6cactrX1JPT3G0Ff+jvOfLjwyrxrivgSb5faQ0lNzd
-Hb/3sebwPvLg76tjRGmEraFBEVDYB/4Ps9msDrxhcmGE7GtbtsBdw897ICqUq6KUR7WOK5R6ObpL
-rXsNaZaHpqwNEXLXYqZSS4IWVQNxddW9E+H4NaQyU6H+BGz8F1rPxWcagnhGpTV6BAaUzNzyeEdZ
-oaJTKeqk6qBIRHcHXAA3i+3MlhX7/xcXsZk9MtvfFDwELhoRWjnuAzm+MAKmIF8Bu6y9mkIhFQ9r
-SlgGCQtc2CiiYOJqWu6EmV2m33oNLrkeX47tRDJ2YviyiaQ68dKajGq5s+N4l13aj0etzOHzCXG9
-OdxOdRIkNINa8yeNN8SDx32gfeJ8sbL/JRPfSoswPMP3aL8qbHZFUoGHOR4gaJS/WuD+OtjpLvY7
-gNNXXMirKwzM14WdhBqv5B+YyxIQSRY57LTbP5XhmpOfDIh1uPBsr9m1TP8UR2AFb2BIiPfNDq1A
-Y5CliKWNwahSFuj6M0NZ/OBQmHJdwqXZouFLej3au6m+h1MN/sSAAVUeQhU3c/7Eq9+UNgkgfF14
-4X/If7zf6BlhrfNsXk/siZdgpllZ/BFgK5bDfL2+dV9JwYrMgIw53+SK7/vGB5TbkygsmOIxLPvm
-LIzN5WtegKV+3lqj+LZLtuZUfOpTNsLZviOtLehXG1EGYK/rb8vDg6BsO+d7UK7oieYcNVVufZ8g
-Tk1qAU1hgVCEAo/SeEvsV01dxtBSkq2w11Zq8WsdvF62Ka2fpQQybH9tQjpSIjQM8zw7Lh2Vc1+7
-hJwx45FVCRRD3rVVtO7pBhWfTjghV7j9GSQDvJ0bsN79ta1Be5N0ob7/jrNC0Th+FGaxTE5zIeHK
-cOT61AVtmPc/wj/YbLHTMscrkqhZTWA/BDmk6KI7QoFpYRM6h3ax3E1MgxTi/r/1fRIfxs/GemfY
-SmHgskL8Z7hXcW//ly+xMDGLyO46kZ24tx+kW/effmlKjpb6zvMj429EKgiOnfzrWKf3DvLpJrrR
-MZfeIjQt+FYfhpE6E/TMz07oa1v1q3oBAjSWmQtp9SNKKbR704dOXpDA9eF32P2Uk4MrLtARGtrR
-bMiG/dcP1+5h3ETaL8LsUTVunuZPhuVe3YqDYIXoUn7YEWkK5ekHj4HnG585+TD6T8ok2WsX1TbO
-I/hmI+vdbVwVCu11VwjaSs/DUlJV9u5ExEA33X6+JyKHvZggHqxniAJTicOXVvN8Vrv+zWqi6IEz
-GwF3MT6s8zJxhhLDk3nRymhBTCbvfK9MmohveFhvGKXVTlWuedNnYzPnoWaSCSksuoWR47gwP+7V
-N0J2vLCEmPyEu697evN99ZKBIpREhYxsR02pP+EwGn63X+PSEs6FFKSNFSe4JvIOun2wW6PtivaJ
-UWGmnSmgxGGzMHT2zmNelcaZT3ffb3FEQLSVdSUt07/cP3yWKCK5UbiUtaGMBDLZ2KyyUiLCTGDi
-2nhEbtRX5Qfm8c3Qfxe64M0JSoFNcHIwOsid9FMkub21YPSepODmMHNUNhgQ7h6OF3s2bFtue4np
-WZNCKgt/znT+nS+3SzzGCNxSenbArKzUqc+uaGZ6jjsEM/jmE24Mm8jVypQR5SyxLUUlqbrV+Ikj
-FidzrD4Q8Lqbj8uu89+LUD76VdhblhmEQPwSpBx+GmOzZJVjVgMdUzNpdlswQT6eLZON+NX7qfkF
-iCYTj7/r45sLl4Q+n6e3dMhwVmNoV3jV/q8Tcz6nUyp33zJFiro81FZAct78fAQ5k4N21aug7TDp
-oNIanYN4rxyHMzgcnE9HSyHGPHeju5VUo46ti9ICAspvpP7Wfo4+fe59ejpigXNSK1LKSJSMKFmQ
-Br2UUEO1OYB68m1gQ+le0dQ5JpMxpz3Fiilwb0l+C5UxNZIYUQu5mlFJINSvPqmIEGH/jxLFx6zP
-FEtZf4kb5z/JPsV800RbR8MViJ5qEu/YRh+pLlycf6vRAfZyoynAjU0ysMmnKZThHNTXhFR90xdD
-Ta8Wz4oR8gYsazNWtMu751OMhkd0VSbGDsDfRwwe87jBZy1mo5WjlwDL8sGaNoXqmOC42T1uhwEy
-NXoGDVjgiFGSd1DEqgOBkrUZD3O/zhY1j4ILr7+rDb3FGmOGzD2pqpo5fBn2b849+aWVrbLYA0sv
-8Y9MIMIBvY8jaMn2fLE0Lq5yMCTvtMeR85O3rr8m6ZDCUGPeU5TvjMPrpt99op2mhKzAlIt6TxJb
-GW6LMGL0vepMH9jTSqW8L9HHQQQvR9FpZs0+IUAxUfA5MZ2JV62EC+IHd4fZItp9AqR+dRlaIS5D
-i/w0X4IP71csoFJO7wCDIg4f7UAbNxljmCvca7XW5X+107Fz8ioD3he2eQzim8ZJYOBOHAXm/O6g
-sbrKRzWUQlivZcMAu2AA5Q03CJ/E1xnLdjj45qX89aajpdajEQLKngmKiF2zoKMK27yF6lPFk07v
-rCJYgHVxRQpbVrG0hsyr5l4+qR2iyzuaT/4WX10WJby6v6pq+qsy7Nd3pOdG6QcC+tA+9jw7auTA
-b3SJZVRHwO8GdkllRf9ULuT7QItxsNSvo2LySUtnfpt4hps+vbsmVqWda5QFY1g3bkLUF8LVw0b2
-+iJMywBgwF24HkgF3oc2Htx8w1XTDUOwIwXQtajQFEmoXvt4u/XhxqcuNviKczFOfydoKnm5KoBc
-zbydf6C19U10pyBUKnphnSsi9Wx6UbGV+iQGFN/Cg5MgnUoRxCaF19ZROHSJzj60KQpOhYx40YP0
-OBIFM+3na72IFz5IVaQBtPGJsQGrSM6d29Q9iHTzaRgwCK7jMcDn5vdAS+Q5NFbW7tZ/pTv11+Iu
-q10tNGqEjZdsmB72Ms4eqIXVltSdLqd9eDSMx6BRGvr93FHeIhSZg2q8dps66kb3aTLx9Voeagys
-3+keyqwyf5NxBH+d/lGf0PAT5O3GedUI/6ZLpPmV/JIyK7BH/cyPfvEm/tlfnHbhmlTPfu3X85fz
-PX4SKNzjHRSqfoXkVMResLYhpjg20KfeZdFetS/+pdQM2ARystfIn+umab2LJnA39vTE2AlF0clW
-S/BWarp6fHbr30tP13Kxy1XSS9ySRkVmxzofdWvlTRjxyAZWgcRP/vF7sxX/fBWY6dAtaRpgN8+Q
-kYoh0DZXlWWZCk5PFhK6CuCs5woNBGa76LBjHddzkjVnPwzucJl/qd8CDxajjYYskn8gqrKa0eUL
-UDXTXJX8/ik0WZs9RjorTfE+bV1C89iDLjVJgHPUqG+3tWLMAzpZtllVKueSlwR6eTu/Gd2H9v4G
-TrP87CJC3Be0+WH/+c8wwOHmOI6M5rVF+H58X7ZIxB5oJ0tOw0D7cj6y9CIQqEMGsmte/gbJEbiS
-flBc6rQtVtyt1rtfHDxbQ0TxvoPaShLUyfNPj11rCb7eMB0NeSvgcfO8jlNxV69rZZPAhUEZgBRB
-aq4SKRuKK/F4tHFt6BbMVtPo7AvyIcxfvl5IRe7elIo9+tlRgA79OeNKkkopwR+qmXYrnKtXPOTn
-itgtP/Kdx4ahW7RcUGQgL/Ag14ch0pAaFZiEVRGFptb8ocB8q7guGAvDS1qxEMkAS+oi0HjxREav
-HEgMwsRsIvnHDvqos1fD/Ewby9KiB8yLvGCuFNNU4vDOwTAJPHC5/IqksgtK7/k6eacG9ZaT/dMy
-+WqgkYc8dcu/rnpiemZpp6SDXBTYGmVW8rojP9AeAYyQouTER/oCWUTR9yAtEPfGBathAC+Hukxy
-uF5dawhljzMZroKhxOAdYHS+2YL9z3DQOlV2UUj43TjRK2GtIbV7E0R+I4iOu6c5M3ZqjyHwWGqd
-mbhybiGhlrsYpMiRC2uWmTRFVrOsChTS+8JFgTwn3dMnhDkDAwsctkjxtl4y8CGBKXH8VnMWj7xf
-Zw1MYWRUWcD9HlMgpyGJVw8T17pcmlT1EExdjTdxVK2jt9ieMpvP8/quQpCTCsr7F9ChNiLs+MWF
-4TW+EOjvF2qRcZNZbRvFOuBXDQy83P9LFh8V7qkKzh1q8B0+sLIhXPa5XSQy990R89zMhID1R/oQ
-Q8dNkTO7qOpqKdHlfyUEvHbKbVkPmeUiZpHzKxFiHNv1w/R2WVYhwqGrqp3hVnq0m/OhiyJQGAED
-jf/3xNWiPHPkWdalIGZzIgYDegLb5WjyElBxNTjt9IUZwvfTVj9mfzE/ogW6uXfDEMuOeMpuUogm
-i6ChAFYjZJLsQ/g3/2HsYiGhxTFd8QfRJkuHuiJOn/c7vp8Qj0OiqjK8PjFGrWuzeRRyE+/QJJPz
-MmKxFxMAXgsLPPjU2RbLF0QwJRE+kBu0KCLZmI9ESb5Y/GdQpmnD9Hz8w4GbsCtrMqUo0UagsURG
-IJ3f/nwbiPX3epNpgf4MN+4hFrS7ubpbeYJkDguarGUY8ZidK07MEaTr+VcgPssvV7KJ6KLIAt4m
-f5q6PZZSuiN20ClhXZto5vVTFaDH117T9Y18Wp1ubE7e6Fk7meKIXeKHcsZNSatfKswQ2G129Xpl
-36m8he7+OwdFE2OSNbIDDkJ1MawQoBXOPBdt7lUTEWU0rWPFFiY14ZBb7u2AqV9+u1UVwV+dw2Vm
-GYcHPHu4b3HsXDtG+3/qcjVpa1PD4LpRR9SQkqQtLT2wQhsEmVPa4iYOkAavWR9Y5URyYS0C0JXQ
-1VmF/gLclQ0Hg5xYmMnTf020ZBk0zRmvKkL4KS9kAyQh8UBV7U0EXNztv64soA0l6MVzXaUDFmYz
-KhFtUDVOkvmapYTcnlQ3OQC3s8OjGH+2+XCzWsIG6Ae1gE9EMwAcyjEVuRA6spfs6CUTjoUM4Aci
-fVhaoWEWPxxmwxwK1kMUqo7BYfX34ohFxh2d7s1bzyfg5uYobfJpZJo/LcyhB3EqAzJtl4xQQaHv
-Sq3fHfeFRIL7I7RJftHYTN0/hFVuc8EcIk2kh5IsAjdIWdl9XVyhaSEoxHbB1layWTz5omxVYRdA
-75Tn1pNVLb84knM+OcZqpO0wD9xeDGhCvWEzbraIm0WQ1nULErY5Q5Sj5BEcbnaLGLW6qpCdT5fT
-VwPXmnz7PSyFRFA+A04oScY80qC35YlzCcnYSPHo6O+AC70QTuBy5OXTkNLSf8tcE7kJpuXB4LSA
-ag8EZctCIeMn4IRjB/QriGXFFwaMiLZGIm4m74zXHYhSx2FDF10RVpp+3uMWfH6EYsCVfCCco9vJ
-KmPyZ32YdaP0T0vEcUTDxvXtrgbid6vYSYSx2riWRALMzsnHM0MxHNjCrBjj5TjX0kl/fxjaHOZG
-UB8Uo2oRCP8gI6rSTe/eU/6ps4St+5wG5Kv9UpJTnZ0CJx5RXDuvH8CyD8b6ZspJ+tI+VnPZ/Q8T
-T97YO7nO9y2eKtbjgvvvGdrOCLAjmC2v9JRjM+XQcvfaNr03cApGjMX+4JozYHQSUeNBX1Ym/qGY
-nBvp/G9HOMdTfG9MdcEdydDOhl4nXJy/kI4sGx4FFSgzgaqv+0RWkxAkI/ZTqURXWPTnfGGiS4ky
-uIJtliqMmaF39PuYXI3LiVpyBVKEL7XFLqDxFqTrroITHNmdhxGMNyX3JuXuliP8EyzAVbAXzAVo
-OHBLkYk/1DhpRhbQ7obZKQ8p45BjMTZAPAr7Udf1tdduvHYqFwelEaHuLatIhAH0A4EQe95cvmfc
-kC5+hqu5JszAwNb/2giAF4uxr6UXlvzx7RufBHQd44RgobfUmRdcJ5aKdK73tcHqjEtSlHjBfU6Q
-UzH5OcOR0coksNzIHjkBw60jK5Ema3q4Jwhcl1QpPH8FL5KaAiKK/qYM4aYTeEDXybHHJMPnsg5+
-DBZIAA1TiHJ8uFQgqwoD33UmbIuOvKToB6DEekuXnDOsP5OJvmzUQfEi5iEMPqRohyhM/xjnAX/s
-p2miC1CFx9MIMfEM3s+1lRVchjByXaHOfpMHKIAaXD+2b9da567dsH5SxtiTdreCqcR54Uamqbn8
-goG5oeohQLyv0jItCc4OqJjvvYPV1G3uCMnP4Bd2dUYKenDbges76T6RIjg5Qm2ivbSQ1CxJITew
-TQCpkgc+/oZ2HLv2gzLWJ3rNhjym3bQxPYhzxg3z3z+V748T+Nx8mcoQGPiHh0/RGMEf6RGr8KMe
-zjUFIFq1Kpvg/jHcx5xpBMSPMlpex9IvAHsIu1BAMGJU+vqN1vZZNEYzwpsgR4Pgytt6Zgwd7qvy
-OtuqHTcf3OCIA5K3DqtBmCnclQDYqK6H4+pXRK/rzpvLBlbLLlwRGtFNPWNvrBCyn6Dzb9UO6HEK
-4eb7TiXFO4wGQH4QjZBwLGD4clbc7DC0kaFJTZEIcHcRg/pu0wrmXKlnFEAWifNdtAffUV396qWO
-6cpcWSQW7KgvEA9mVaEo8w/NPmQqmuuL13wAt8fjPl8aetBUCNo61WvZxZ8U3fjQQ6Tupg3W1bmk
-MzFMVlHmCANRB30XB8zLEBx6EYj/fgU1gdfFJyK53F1ozUgBzDeM+XHQsMib9yy0nVN7n1DmNLKq
-qa3Exgsaj+GJg3Pcm9wa6Ap3PxJz9Onz8LoKVRoYaJBrds++D8IiXs0ci9ei7OHeQll/CejsKhf6
-sOuL1MifRUMF683A8rlGrmeoG2YvDOAbJjxtRHIAWZOaLoW0KhlPUuuEYr9yBpYI9b6V2A9c/nM0
-/6Ua5UL2A3FWLuPC5LtWf3uCODdxTDCadhUUsB6cUcmlhJ9Opz6fIzfAuuWk8soIdQJnlrSixaRV
-C9MfJ09igAgYqbu/JHEQcQSrpEygw13kxxGWtdnGxL7qB+FdIxXQVVyNeuWeO5kY+DCXV1MltJiN
-fR029CDkeNUIguwVOU2HWD3BgjeO8DvRbHmFzea4djxgR1otJA9bqB8rDJvnnfc92I0qyTunT8CW
-oxS9a8EdwCSUHCJfRF4oIThMASk5JR+u+/lo24b6J5zZybCw5hCkKUuoRMh4TdUBeNXmLEh51z1z
-q/IwzqIM+7hsn9rw6OBx7oWR1laAmop7WCD3CYk3tH8ca3+CnloRBZ1+gKqpq+hL4p5lYD1K+xAc
-cBdi86WfByvfhMFhtbHVjGde60RJuCr8981cyB79hlxbhpIBAbw/1nEEkzm2EE/Im6XRsu4IMPAX
-fp7DIcKFAsmEPY9C4MTmwVg8vYmPK3c2G2Y5CXYlPzEut6QLkvhWZO+GgK1f/EgXXdvSuw8khTrc
-QsGO6ZQoZysdYPOTN3M5voAR1Ks/+lM1/6d+aGe2HdpCaBgA+0z0JbgdWoaM1FB193eOzq3mgrKN
-u9qW8gbZKwqyPBBdXs395McjnX5G9H1alfjgKtggGXAGeJdMdOlfWEjvrzEE00YArdxjwOZ1qs0N
-AyZ7TmBqQQeY66JF0Uz1GMR6cU9Lq/FmSwhk1FieALhpdj7Ttw6M0I6wR8xYKoJz4TjEu8P4F6CC
-3fqFAPvub9gxPsZ7jKlg89D/QhlOagXwYmH72/RmFVdplpsdzaH8pLT1Ir+IhYMMwnw2vC0bgBtW
-1H11BHB+vmAZFi0o4jOPupXwHkqOcGj6F4cGdwjOLyAYfDVa5hjSz+OWfejmgoU6y18O2UcyHqUw
-Sj3RzErOFu0qBcUSjrpWNUp04zT2vTjxqbiwuBCsO+Sh1Erq4vtBdVLTVH+0pZHCs6Fxftj+RKc3
-ujPFjxyjU+cvkLDg+nXxdvkccNyLgdOaaMbHssoC/hpz9K0TM9GaCTspUd9hxEvRbnIN9YK95Zta
-QbzCNzkTMjMNedZBktC2aMeGo0W8HgxRpwdj1NAiM+U+Fi4YTRYE9ahjwNuHe1mey31435or3sVs
-pMxrFiD9du4kTc0q0bWjcgF9lIOlvpFXwRwONms/3wDbOboZb1Y5LLxzIOF3dW7mbF9bHf8PJHSd
-H/JQe9cgczikLHdzBSLwJSJgF0Ydfu52tSnCjSEN5VWONOCpJJMny+daYQEUEqwWUvbJJWbRlSOx
-WvFBhylLHzmSr/vIQtaPnQk7CDh+Eo1tYo8Hb93X6aWtDpdTCE7h8cSu3aDxykjb9n0d/RweAhU0
-LVTwfGhFLfwE8nNPqrlpo4fWpxodA43lxBygUZ00rNIpeokmCIT55ubW9YOSJq2uTCa4Nq1yVHmU
-MEEwLO7UGZPZVmX8htqFMhrBPhT3nm5Pnz1E7PCLeHs4/kqJACB8mT21e0w7CGWgH9P+VPUEF4SZ
-iEJXUebFYZ1vj59O6ljN34n9sfQe5YUAEtDTR3vjHxSYLDmilieXKjslSAp8Q8/fOGh7QHRKgcxo
-abv7hRp9OxYJUUMKezRFKEybohIlztr7TLAymMBxYeMVFtNa850jWA45n5GMVM3OYS/InQWNpr2Y
-rjJ/spM/8I+YzvZvFjMbZ+viGqmtFTlSq44U2gXpsgnnd2X7ROvks1S0wFfmbqvVBfVvAKbyyQsK
-DdU6f9mSuK7l2c26R8tZCOsAfer1IfjqnUupFQ71mGRr7CwR/kgBI9FrBqZGKWiqV8/Odhg3Xn3g
-C8BRfqcgf1P97vVmaxWRGTkR2KA0sgeahigMS5Ia6is8o6UKJ0136DGbLiNEekgccfzn+iOCRcsT
-tIq7LHGryA0AKlUean6NJa9s376EPSte0Rh/z8R7Vioxy+EqA4eWtkK4St4tH0ffQaiu7ZNJhRdS
-FXwP+vN1rtOQiP6mgkDOgFvbRRGLurkrcYc9FGMzVAcMn6n2ZQJNvN9TXb2ssvMILAR3EfXQ9Ahp
-EqldAtthbIytnb4arriwsyXWtrfjk7jmaV72gcYC/etU3rguogDGFFCJxvTwEl+bRy2Gc2+Qr9yV
-wJA+rraoyXqiSL/mfiauD0fQ7dTodu12idkmr/HODivARBHYeSP0JwxPVvjH3ab8bTF/P1srmKHS
-OoV7hA8CSpCj5SLA5tr11e0qMcnJDmvU1+cqni0hBwGCPUscaYGC57Vp1z26zf2bGK0Nxbi/fBj3
-8vmkcG5nHHDcHCR5PGGq7HKAyHuM9/BsyRuj+Q/d1YaCNLp83kGmiT7upofQbeRGTymqTO2dm4iX
-dmT47Pu0htBLATyFdHIIYWy5VL+pXYVXH3kMx5/BNWmrGnbWVs+91LOUgZiDez3CGzGUEAKmd9uy
-W1d6BfmBl58v8sA7c6hoUBcvsRxXTZ8R2MQuZ/xPnvosy5fMFSiKPaDPmmnNwq4KRDxp5QrdE77M
-DKDanb9k2ynidAN/dHnir6T/jnIxrgHlbUuXNbLa5kB+wbwgJgbi0TVeS6MPL0suKv5jnIlKQrr+
-GYiUi/uqtJLbcJ+74YFEs4YrpuYgufQELsNCO8KUBVmX63ksvmEa3g2ugdvgR5AikYNJXQy6Ui8d
-Krc2Gv6KNTQZCFzVRX5KhrZLfdZ9O36H0+GhgYhweGJ8sCdyrFODAx1EeTv78Rgs6KuLPJgBZUHR
-hA5hnAWeeqD6X3HsjZG0gyY3H06AmIMFuXSFxkISr7dyDHqBiibVNIv1ajmCR8gca7ByFLK3F5F/
-dd4tFluck13VoGGFu7dP/gwU+W0rhSpOg6GswoS18FmdeEZRelKyki62FkJaK0e65ZY8q9FyWmyt
-GHMrvLHlarZmieZ95ZS/97YFgVCVkmk2pHSlBAfXR/Tl6VsySwzI/N/JcbG3LOBqXn/gSbzV9/Zm
-joejjlU+XXtSEAtWgaEjeoRwaNXGLLDlcWmynqu4SggVdBezKloxiv9jMPlYB4V3i9i1AgpilZ3u
-K79DGdTRHyQVsHbhz+Vrm1Ch1VcQVFvoYtc3NKaZmf0kcyg2gFCHh2uh4W+OtERuv4nsA3D6zXuJ
-qYgchAeK0jFqMaoUXaxJj19EyA9viM2nm27CHbfAk93ggqOBlqF434jEAx//UaTpyyrNpuiipcVP
-8boyasg++efrtJ1+8jbJ/uF0bqHorVZPfFdgkK8OjIaq8T5wwtj1NNwiWBxpUBjsUlvAs8tugjGy
-FPt151gWOocbh3EEuFRk2Ab8Axhl6m+hS9U9OTu0TKKmEVWNcunGQqrNOvs723jXDVLdAEsOUv71
-3L0sVjsOSqbE0QFK2jqxE01+naMqlHkrJW5DmsKJg5MYo80I9F6pLXWjHCsmZfDihGRfWMO4ej5L
-2tOrADEtpY1Oksg03G2jpQul1Mq1+yTPsWEM8qekHTRKs8RGt7FjPtSA/unZQNwAI5jKU3noKhQ2
-YuazssAbGfex7T7VQHBnITxkjdmVa5uM7eGMYPBbEtyDIAXNHZHKF0mixh/eiNcvPNc7yXtgMxAd
-ujWHz+miZ+ujkpi1jpJuWdPfr4RvMlxjQRv3DD7pR/Y84636FDlbP0vOruV6DiVmbRHPzV3bbzyk
-wR1ZSbn2jKD/oN6mQiscF9hH7ux7zbV2qrPsdsDqDfg/8QDWzQAYxTNXXo/B3uKcq2KLqWBxmLUX
-WUW3tkm1m6LPvJxkl8rLATuxnAxi6qzEnxdfHxtxOUufy/QzLGlr4vXvaXHci33MYGgDw92e2yXy
-MQ6g1GLFBSi8EeS6xjAFBSVJlXIqFPw8HySyXB0VUb2aAQPmepTJfM67kxft032+RTVDcFtfL9Cf
-Gm2j0c13MRDFo1laGVVAtAzwdT5rYJvKrxxwwIVePkuQUquPD0Ejvy4rjzu9YiQ8lwGSMPKotyHg
-UXHiFBxbcZogbrNg/z/GE3w/KKGcKhtESH3ehRnU563KD5aXECLNxK+BOOdJGHPNTgsso2qRZxYa
-Rf1CFuBVtA7mIOCnpCMAOIyTxodOvN6WcspkEfzmijzdnlXypY13rpvhuHrP39FKHvXA4ehi9kaS
-8T3wxVsQE3KK+CYR3vH7S5MbHX4n+DER9SiR2WZDSi47iW2wMfDB4PyOYYA9x5SXDgD3XSghMz1X
-2Uc66XouPirxGgYtfpM/UDumz5bhjbFzK++RukRrkYGOyrekcNZ1pvgeBTGE9XnDim3xZxQp9YpW
-GhDsdg3w5m6TaZIuL8cBFmSc2zgjwdZAvF+w6omlFK8fEGvyvYJPtmj9n6u5S+K2gGsJUN5JacVT
-ihr+tWW5Tyk007DePxVWevmN0i3HXuhILHstxcFUM0u9kXDQhhd7DUvOFaTDE2EUG5Bi6avyxP8A
-xc6995buD+Ntsu9Ux7sKz1pE0Yk01bMUvtuixN8yGWfHmU7Ndtk/5IiUEHLwLcFNZMHy19s8RMUi
-T7mhHYR8Tqys5QFF6A5vHTsppLxw1tp8nBPv5/yZijKHVwSbwVOxLofYZD2YAraojDGm0l1FUGx8
-DRU8PYrXrE70GQ1VvqTszudYlPuD96nu4zkxEk2osssvI6r7XstWOlULQyjNZiaijTtdfHX6Z0eP
-YiFanxn5xJlQSVYMwG0gw3tEWUs5g4oFq62+TxfWQGJ5G0C8d2mX1nMJg1QewvMITRatzSVRajtY
-Od7FrH/7YzREBj9JKyYpvXq9HRoZE7NNti0DEp98cqxucAiReEQPO8ys+GNCHEfewEi0v0v2mUxt
-pltVZrOAbrvUDOZbk6s0n6nMLchi1m+lSgwz2Vn0aYMNfx0LaaAHSKuHH5KsNKPfdlW5lIYOMQH4
-tC3RpmwUTMv/NvQHeV0GL8Jk/0MfSsf7rOTyjqamfuUJtTuLj7DEVixBFjjOsRO5EevZ+BtweUR9
-VJVktBsN5NRxgORsxR0LqB9DWtN41yG6rqfS6Qp8FmrciCOfsDXHoRItZ3QV1t4kbmPIKSS4rojr
-fZyC73AWxOpS1bpC7kVby3x22tdJr7OfxSUzUJ7szpUBuT6zhHmYv+mBY84zu+Od2yaiZXtlw56U
-OIX7WcWDv8lCEZ3KdFsOKC5OhVak0Kg9Lj07LrUxTJXlwQeycqjXWRDVMk6vKug/r/ZxzGauR2++
-ZMzXpLLD001ZBLX92mDQ8dzqXRJpbguf8O5CPXqLzwcgaXmgIlS3B6mdoVce99xDuZT5GJCLdGUh
-IaVc5jKoPxCVkO5xo3+76kyR8ynK67WDjTfIGdvjLvE04q7K34mR0PCdhivbEc8DjiLWlmcThLex
-elQFiH7hzyRS5fhyxo3LCTxC+utpH/ob/fQqZGtmIjn9unTI6CxWirOTLWK29eentHLPHwtFecxX
-409Qza/utuPSITSavdQSzua618Te0qGA9J0CzhnD2o7qZ2ChZxYsWvoy4MOfRr/x01IFF8GKqejJ
-0ETOv7O3PQSdNFsL6NjezbZbEDzrd4jBq6YvDO4/MiZ2O27FeiFTqVe5PBT1Xf2SOBc7BQdf5/oQ
-80cth6tIKIBdIbnhpeB7/mLuamk3kc+mZsfGFK2TGRkx5Vt+x7+q5wbRXSDHIPaApDOhqBLUexHo
-OKoODp7ATcIY4qNEv+yavXHQ/PkNIKTytcQ014JGjMboggR/hiqYoKNmZy+VEx0tqPtdP0lI/OS/
-oRqbuCJHHt8PPdICval5oUEQadTX6RFiIFxy5AmqotXMoiad2Ma+DJWUS3zhSxf5Ppv0FXTAkqiA
-ooaytYDqLwIit3/XOaQ2Yk6ZqUdHgAL7oSgfWR20p6J0wVRPcNKD56fanOt7i9pG2rWKJYPStZYE
-FexU1/Ab+pM2+akp2Ky8aOlhezTXMeAvI6mVnmmJElDUEiwKW80fQF3swuaoTDzGLK2K+mRoUhIO
-ic9luFbZQtqJdkkTMlh0nDfz52EEWGHii336cvHnZVcTzey7wQMQQlVzAd6lsh+8pF3M+4xlXXgO
-NEAPKlCMLMp7Lxhbjm7TiFObxgpaSxbk0FA51pWA8tOSoEfVAc7AmXkncxjfjt/dKTBehvblDUqk
-MrcgCwlOWYr/eBJSqf23+kDJfRu+AYs+fBwZjd2YDlbJNWA0OoXecmgBK7TF0K7ODA8E0+Kh3YhY
-NrClt5nAVhp97gsgHSHgfGk1tN7vpa4etZBuDbS4IX1cQtLBoyOyosY2Oiyar+i6BGUknSDLYDSJ
-3iRkcI3fCq8J1ovXp0bg+/h8AERDM7W89WxX5IdiGNrapqLr4KxKdh0bTOlx69fEINnxwBMKstC1
-ZrDt9esp7jpDn6pMxKsMo4PsxUv0QH6E41TkHRg1ajOfinq7w9bl5efm11FtgSEcHCwVrZs9wGBt
-jIf/NV7fwrIXgvRe6jQL+thhQgf0iLKWWYakn4kMtyLyKBp4uXavNtMx+6JpRh+Pn/HDgkAjJIMj
-UbSpNwdao1/amegHtHRDt6MJ9GR8zrSiBXTMcCCSLMflubYlrbL28KXPuN7rZZLxjadXF4eyOOtq
-gdf5+QVrcP7kORXbdzglW5ZB9nCnN24ymCr53y3i6+7ZL7V94UNaafDC/Xu+YiYg55MRW6nHBYDW
-tkn7q0TuKRDvLlIKCIoaSOtvkc9CCRxDRtKZhpO7rNC4CxLw71MYNysvDvmaXVWGj/vYNF9R7km4
-FzqbUCe4irC3vAjNko8R1FoQpHqwBTRIywLPhpMffM+CHXeoahJEpkkvPsrTB1z3MwVYpiUcq/+h
-BHt4ZhpNOy6Bqm1FUNLG/Dg3P0o4vNrrC3Euz8ATQZzR318emg6uasXSPT3rWmLySyvT79qsYAy5
-2dTC5+9h+L3M0rrjgdnaHmifoSdlDH/qxna7+tBWYo4xPpGt6ljiBEMaIZLJHeo1h95JxXqkO6hx
-jfvaYmHlyhgfdNbdJRIxqqPVuky2/Zky1/O3KO3fWWGoEKrfrdeXfUhCq7rzntFdyPHZjH4FxQ55
-stIqEz52ZaEUQ+s40yBd+t7O/tsHVh1pKWRrdOOTYkdPfHyj7L1PHZ8bw3vt2DGgVJlMJxf9+zSH
-NCzSaGyOxzruZnXNtkQbhd/6WW+GzqEMEM1Ky4yTMDd3JzzbXMThBMTiQKH7+q9lQCor5rdLGyl9
-pQtpyO+13Jm0SJey/m/fTVq6nnpbayVF7I2O8mNfM93IARFJCopZDzFxCicltwIcK3A1bUpW/ym4
-oQNv0DG3mZC9SwO4M19VwXKa+K4TyjqLTFTTiqjdpYG4chMwHKicn00bt6A66jKIxSlwUw+HJZQ9
-FQ6fwLMkMmAfGV0oYEaqnMogqIIO5kue1APXyCy8bUPEjIciZsZQXKfQd604PSWJAmLlGDQR1+9p
-L03OI9tKF/fMQwxUDTxVw9yO80AjxS9Ofu99IYR0vftqKQGSm4DhefzVDI4Ff4QLqIiZyKgPwWaA
-Mj4duOw46IQkXRSHVqXDEhTTpBaMv9Dr9JgBT10h27UzhiMf3QJHGNa8VU+KxIayk1F9JsX4YofV
-N6nVGj0skyFUr1VH8WdlzTC5zreoWjl4Ix0g3EowUqVNquxANkkdvFszoDjZXcVuOY767U1bTK9c
-suWpC0HnsttEaEjcBKAdDyszZmlz+ecW+LWvSTsXQ9OvUiGXLCgJcWT/JmW+TltuH6fc3+iq7Edk
-oH+OuHsVpAtnvCRiA81Gl9iI/Xyl6ijdOzZY8ujmqm3ArUBkuhoICvPLCef/C6kx2vnEMPznWddm
-iHoyzkNulGLzaSwAdHe/C8rowyAj/j7NZYYnrReh2wGovaLev4ljeWVWKJ3ndUJ5ZUby28VsS+8G
-dP1nGNDNJ5rEzZZRZtSf4g50DbFdJs3r8bDmb4O3Inn+z5EDPIVzBlNYadpcNW6iaQldJJHbnY/t
-RE0BaNWi02dw8GjPtD6RQ+ZtooP9HKanZXgdWKvQIFZYn59pcWl3u30bcGJsE7rFuLJW/HAFhqka
-gpd3GUS/2IhsJBpOgUDlp7Ts9cNK6SDxm8X1Jgj6R95/h3MBjlOnIfD//KeDkOFenUNMR5CByhFB
-713Y4PdhAdYsB5nn/5s9LLDY2aca5stLyk12yyAjLG0ouQE85cH3ZaAteUF0Su1ztUaa1SZhu6VL
-jqbHd/vxsRvQMA+EJJk7VaCw/AFfv0U3tesjhzwi6uc/FgYRRVHueoZjBnFX/B96VaezhC4ET00Y
-mLhAZoDp5bk5LLaUE5tnYo+HcrfMexgEzxPt18TqPtHMF2CIewus7DNQO32BI9xraU0ft4Tp+X4R
-sGGTICJ49UWrQONWHpQDLKx7BAyZ59Y6VdIfuB+lm1YJiD3hdhpF2rFZidwTS5TrsRirYNiJTk0y
-F98DjFVvH3IFUoDbVH54T6v/D/N3O/K6WZzPvbtNTd4qpP5KPv2rHIgnYpcVAHUHnpzV3dYeaMQG
-FLSkH+AuvXimipinsYTL3gvInQtVKtY9QadZmRQX+zGFpUOJYe97IRg0QRTjAje+nqT/XiLFX9NB
-DGNkVIzoxf0nQJivX+MTtt10YmgSfxFl66ThFu5K0MYTxnyaVfvNfmPpc139m+xSUxnBO5vUWEjd
-ZSIYWwnClCwCcPERGDCOme8cIQ9D6CxHC1rFru65i1ptsXW5oKHkD2GrpeDJxnuPYQO/a/CaE+q0
-rSBB7wlB1yojuB2Rul6LnyM5iqxuax2hKskFzCua8ptbY3gQHy7EOGN3pWwYBHIaQYg28lH3dt6k
-nbhV1Sh0ihW0bPJEDutTqAD5J0SRxBE1FN1VO/XxVJh68AvOtYh1vbC2VgRfwb2/QvY2ir1Agby7
-bolQ0TJU34aiAQcYjcU/kgwRAh3e8U5+hHusDiw1Zg4gLjmillyg8Z4qsTMd7oAFHFwOVK0HfkTu
-312jZCdHb1pqx/2ois80610C6PwA6TFerP2K7lYu0glwmSKzJjD9ZnfJDG+S59PikX105+oFYmWP
-48UXAOayD0PRulzo/96cLnzdF0C4NbBJPOg2lkg92bFEpo+0nFdqETzo0QSVfdXWVfZD3rczYluY
-KM7QX0sfslSO3TGOgIxAI9ZHSb7oqCCD8TkmGJoLyuCcxgfkW/2W6x3ZB6RwaEGULPxCYOvTS+B9
-jWCrlXxjMtuYbXUAQiSq4hc4DNyU0eU3P6umdIpEscIn775p5e1XZ+dYSKV0dcLoMCD9MxaVW6jY
-oF1iQsjDsBsy4M3ydzPDoEGfhzsbZ8gqrEeYBhAYxdeAEBxCVGkUZRlUqRKQVc8T8oWNA2g5y72j
-KL2lAhtXUWgfdKJKuYfoigKkKGgrHjK4gQq9wgqnPNVlz0HIv4+2cWqMlUv4SpuocAICrp56reXd
-eJWr9oR1d0wcLEwRkOf/g05wGFNuqVeDNaO6pERjubDqMeGgO/3vTiWUxG0scCrC5ffPAPflf2kQ
-vB0Ix1PaOea+X4rwpz1t32Yrhxec+4Ij5poWBN2mMchRDkAurBU74XyFoQJeshXh7eGjUnImJpnf
-qZ2QNydx4ZPmN3nr6PD6XNth6Dd/u8Zljss2uYXESJnilRDCIxGS31vghWQ3C8wcA1DS3Pxj7aIZ
-9CzBz+PGFuj7IoJahfAk2ni4qsR0aZMwVtzKhMG++3LD2qXwC+BKiCquB6up+QaQfmbpw1mdHs1O
-cgHYY9HWDgkcWA1ZfodmE2I6Rsj/6FC4J5hEnAT/bV7TEkOxhhaTi+z6B1QvRP1restDD57UWxqc
-/adAtNPDaKhK0d0N7600HzbZRsJw8lPqv+8d+Y2lDJJAMYj28170V6FBBWsmbexZcBIIIlheN0HO
-N351pTZPv9bTabglHMrTirG2YXqUsbcKbJc0hJIUT/nByrpU/RIz17WKW23/8kNTLf/NEht81b76
-LWGFI08v+C51TM5ooOIrFjcy90NYiE/IyCG0sU0DU9wo8cerbQm0k/S4FnfmVHDJWc0dPhPuI9ra
-uW00U9EeB43UnN3bgXytoSMLLLM5GIgOG2MZquJjyeJOBTvBiTMSmN/dAlWVvSlOEXXLaCuHdXc7
-M0Os/LLMxeBMPiaWTOj2fqB1R7qUlshHY1kHknUT19m/z0DRiYot/zCdztE2SXGq/N50gyJHZEIW
-NdBi8+wpW8nwpTuqcf4ksIvEturPcNzxlKYP7ZIbZmdKOQCvFIsjLtTMZ9vB9N9QwhhHZxmomtA3
-FxQnlYookIwnrjbZCJ3h5O4227vi4tWCSnCfcTPboKD3DY4K13IcedpCGbGnsJrQjc8C//0LsU4n
-r9187zyZVtJl3inTF99ovcwovQ3sqit1swdaaXQRJHsMMeDk+kYAiKPnhAD2GdxCrXqlV1PcuGY+
-LB1DiZB7kir+ayZdE2/R/MBPogQF3cfBJLeJGz9sT0KfNRVD7uMKZ//kw+eAaxlVQMxlzh9RaqUV
-ZGgJr0tDRDZ4Oy/hf0pnts0nlR7Kp5xfhjgm0GaI1BxtjYkdQIY8hZLJQfVefpZm9d/U5TNLDixQ
-4TF3JbbsCELttmdU6Q4dulLLAvrCbUEHTJ/WcNT6km4gJBVUg5ZtHKvruSYZdsLPhQj1sriBCxWk
-i6I22zfoDBQl88mNUnXRUM/7fmQDXFBG2ip0izeN6Z7b2IUmG+ddnkknKc6az+5+txwQ8ttUpKEq
-Vr/ObI3j9UUyaHeOWqg1/b1Tb3GYGhc+MYyvdNgMdI60o6VBnu5xEiTGok4qisG3dEeI5Cgs7WR4
-9Brf0kFNRgAMyRXqP/LRw97VU3HJ8hiJuxp5Vj9KNwgGr14JGliGPS5dBz2vM8PMQBGn57WF4jH/
-eby/x8ThwASWxmsrx7v8IuYnOWigk7VUQcj/g9Il2RinozkoIQ/r6iNiuN4dC7oZtkqOnRfVkfHJ
-oGoaVJjj4SDDao8AAf4q6pl+UL1CQIznE3b1A8SG5vdIGMYeZ52c36uTu3dlEUAQpxgqxM+9hQYT
-Bdc34EO8inDJb3yEsXAJ7abGUCBLiJQrBMMjpKR3lpGcuDpwViyo8L61f5YpBQp/KHPXAEKus6ua
-ixeoXeIE5AacuMyCELDaU13KtdVpiUfkQYOrrWoKNJdHmN8gtATpc4Ix8316IoBzUzwyve/0CIyo
-1q8tuo+GlV4n/TQyjqHUoS5m+y24UnR2Dm4qmN1Pra3Adv/UHkOWX4DRD1ASpDFQGRTTqQEDoEAD
-th4BwvWb2xps+qq/HkI2DKs+/kRjqxS6UDhlOvAH6DaKhuhBkJKt59k+I+g06ukJtvMQ5eHPIbot
-U72ndx5E7XZlP3HHPgXd6sZRDAAQClWJUpPnC+p9UgMQWSRKQ+EVH1vlYmc2nXA64bt7zu7SXTjh
-7hEmrRL/gp+OKZ1d5xPte6KqPJeKaEnSk0aas+FB/+To5+xejlv23bV/NfgvSiBGZitQhymuGrYp
-ppNDh0KyY3pwKm6ApMVA7Uezj6ecQgVR0xDUDfdl7h3ciA2LNFKJsvEZesozqi/qSQXsFC7Imbwe
-JPU3vVAZknF0xIwPheJ/+N8UKhgo4mvmQ8f4Wsi1zM9t2oaKGfz5gJK5E3SqemY7xo8rAgf+6m7T
-J/ftD5jhlux2vpt5pD5vN29ALn1BsnK8HA9QyXUy/JT8tLWJ+C4eXBPz9zfE4vjFJY0TyzU/KI+e
-RPTDZ20pNvzx0jvafPugLVts5gmWTY9ZHuD/Dbs5RwXJMNcTPGYSNr4v1pR7mHBRlduogWdXiT1H
-S8xSMo3bZeZIWbuCAne6kZ7Du/yNYFsDV0OBS+Hd3GGiqH7ca87ZTlxavd7btlAvY+8JtInq4cWP
-P573P6+oGS2Eacf4FP0dPxHufkraAsSVvMbnocXvFLGWvtwB0DhFrgY7axlVp9tOPY6qmbLYDtqu
-ogEmDAmfXSVQNk8BUA35MDe2lrtY25EJKX2XiWYgqUkA5R1ADzDt2383ve3TZOpx8/pfGkPKyBTq
-JsjNy7/FjvUGOmEsqpLiAB/4e7a3RFfibNCpkoxkkDhkF++pVaQ/j9hlnViluymINFcTS1OCvxTu
-WmCrkq0WgyERIxCw8hBDh4wGVSMURLpOxgWutTutGtdi8AMYGzbPHrF6og65AHitvPephQPFDyf9
-2sUi+I+xztUmK4PmwFd9SVODQse9TL304OhnUSyvT5nz8LkVk1J4KMJZ4/DHlFAW2Nk/dnznzmXF
-viwvME/sE2wN+gRTEr7gGylqeTC0xo+cRTyiKVptfa0iim6myCgHZqqbdnKWTNkAXpOmWnGENhL8
-5csaMAFJqCUPROfkibDV5VD9cSAH3IsysI5vgYhzTeLLzmqQkBblkawcvZ7EtA6R2UqJdLah8DBN
-Ksnrehvl3uGhs17tMLDLf+UhaX74Tgm/NwJm6TbRUz0L951OYO5fLnlxVovo71ET4MIXXl3IxcC0
-3dpo9xanXz1ifLdNKd4n+pyx+SXgI3BfL2tHhZ+UePCgqDsUG8EhRzefSPzZlebxx2kS3xAs++Fe
-n2WYItsC5kzPr6MG1Mi2B48/zSH2Q3Yhc5dRtXgTBPtD8hvmIa6bPthcLwtaCFyNrWQO5iBe/Www
-lT+WT3fg0sFjb14Mq2GvGDs7kqBWbofH8B6I1jkNEDTm4zNku0BwIu+nvYPVb5PHO48yelymZSkp
-0yMHNZpN8YAANPMclIMhkG2+oHKCKfXZ6+j+cJvnO1pzYXb/J4ZfJsSE4wgGz4W6x1WpX0L9XAU1
-4MlEIhf6QmKa6HgGuvLhepB+OBn8fWomzPiMe9ok3PIVc3AMAAHmf9DRArlFdJVtphKZY782IADx
-OKnJZz+c/vnppLBZ4MCISmBZXCb1poB+aXFHch3d5sFz++iS8cM3v4Vf7NJ9RARspZrxT8YgbnZt
-CROR6WTiO9M83F4nsJt77fMMhRAP1MIHC5FE8DM4AeGLHfyvaahb/cqQQINjuSs2EnMAyQLwdWgI
-Zx+v1vKl6+YKY8BL1sTf5GKS8uc3Aj9GaX/ld1246Gl+AihKBV0VHZXx/IyIhgGjUvrMmBFbWao6
-jPs9g4XqRBvE7kGHIhHzZ/lSDTMewSmVmRoMr5D3i2TwuBmV6zIr8jCZ53bCXqgWa2MdYb+lPONa
-n9btl+Bw6ivZZuJb8P5Jcx0xu8pTJ3EgLBBZno/4EOhpoFQb/h+NshZkInm91mX5vHNC+R3Rmcup
-V3M8NMAUr+/4fxL1s61vcGFqRGVqDCxP2AUmCNabjhu6RldmHQDEPTjnDB5Ba1aa+EVKpr6aCxXn
-7ggoTfc9W0UdPSAxDZDf01nx+P2AcRvK7Id0/Ua/fr/EDJTr9mW8MH2QIjUpGzYcU0hIkst14lRe
-4DI0ukR+RGUR8HdiGg3h4lyQStcSA0HsjsHeeRlvop+HvsOhyJ312rZlFSGVhgfIgsWAJMrP0SRn
-0LtHuyJ+kbO6K2QFnoxHHyYtbuCmCoTHCz4ViwUJitAi2qSQaoMLQSil4FWgswATeMGTbQcnPjFt
-/yYy8gYIeNwwrW7hGrbhOMjdbVnFN0bkocrwxQHOjTPlLR6vfncwRrFqZDrf1QOGFHgcJwXIHXe3
-6Z63mlkuhLIcdREk+Owz77uL03PClNmzDBhU8vPUd290wHfamn9IuhT0KZuavn2OLriZIuD156aE
-lQGsz79igmhLO+S1nwhIYa+0tuXYmuC6JMgubNJJkG+XOq4ShD/KIB7vGEKtZC+A0ApnFHTX1pAL
-2kE+aSMZtdbqk9xHxkubqJ+rS1R6MRMP8PHNzV6q7vo3KqhI7/XfNBfxcenVpwVqpxmDOLJliycP
-0EZkFHNLpzG56+ugdj2qbE++qwsSTFtsxr56vVFBKJnXMRS8JCm1zQTlR+gsDb3Sf19an9dZGJem
-2Ba0jSrKav4fchf+hcrMvxWvMa6P12AE02kJULhSHqbW/PglNVFipo5w0+SawYCYUTs2AY2er9vR
-ot98ucnbhlPXVR5zBv/rcCeG9LMxyecYEnHvNfFvGQHTq/UuVpPuIpxEUHQjAwG3sl5YKx+B/AVa
-O8ZKLOYoTkgKK6DtZT3i+VS2pTycm1TIZGIRYrJd/Yn434x7UTElPcNIhI7MSW6LLqVEsqL+JUsB
-iz/ZQ6eH0AtKqRTTKt6EHkQm5EP6bU2gyBDcxH9mj8kDrNvLD51BmgER/YT+HVaNtfogbJmAaX3c
-hpXQRg2IZoc7SoTkOUCfbXQIQu4AC0gnx8phX44sufcodoeGaeOoaahK8TiNl8qFPgvFVjtzREhn
-ut5tR/qD3leMK+SPnDi+142u7LVkANhplwWqG976v43bpqW6LK/ZV90c36sotds2Ts+K2IONZ44p
-G5kaBAVC0YNw+shOIx+2rYH67tiBQbzw+oi7g+NlKVegK9HZYXvkoLQH4/oNO6KHt+TIj7dIZJjP
-EAFvcpcRZjQwQNunN/UJWkYwIJV2j8x6OJKUFXGbjlmjK2wju2YJQqPtCuowEhzABk1iqUCAp5uT
-UYAK53UPFWxeVdu37yjdat5zviQy8i066s3uY6IBKSWYAVCBJfQ6EQUfsAa3AT2eRL7MwH8KDVvh
-gIAHvPHPmCt1B05IQcpbDnKmuhd+Aqn2k80ZKkf8XgUk69QRv+sNR5k3bO49snt+iHuJrtN0IMad
-CCyIw+KLoNjvbha+f281C+VxcZfN0eQFxF9zDKtlMOGcRw5x/E26ydQDzLqFdUciCWQrbbxuidJT
-cZ8jILa99PW2yiJwPfvEi6hkymE1oWeoIoP1/sHPuK9OV1WOyHWu63goFlDITPPoAtyGKVEeyGyQ
-6E8DtZzfZQmIwQfe6rK9pxHAuWq5UVb/uJ/PZa2B/yAM5Ph5dcSfYSLNb6t+YRBShFvUBokJEziB
-Lsq7RYycpS1pI5VPP0PKL9dqdhM29YhgsbAPRUkGTT0ah+eQzeIa29ZgbYF48zyiPzulGc4gv/9V
-JzhT0HapvzJtTiUg+YMMLPThPWaQvTAeb8HZWeJ/rTOOGoyFKeStD6lFhhtcrkxUadcCjLr3IKPC
-uH8MjbYbS26HWUGRJJdIXVWNhIQea+s8PXgEqAdOwqkcp8ZW9AnSW6gufYSpAtENeZcio4OLwdPZ
-21HaOAEU3U3poj4HqENvMxkuWCHIgddki3UgITw5m1pFF4vJR03XZ16K5+qUjkbwZ045x+IlTUpK
-oYQU/kEt+zyYlAQkjNQ9IelMCjKuugKp/fXca5DDz72PZzBb/w3mnD/dOovSRdugJKihPtj48UCd
-jR/IjXF7Auw/mUa1H7SI2xwjl9RF4IiypikzfKOP6mCopwWWrkF1Bg8uoX43D26ph2I+bKFIJRms
-tunL8TZ2TT6i2r6FJk8zBoO62BNTQ2yh2vGbCofZI00YIDCtJQ5jB11cMj5K0kxQRQRIc390c0Fv
-LzgLTJU/XJeXnO5omivJf2uTmxy/Z5j70FhaPx5gx4wtM2jwzdoyrVaxS7Ap4f+Rv3aXcb2hre0X
-V5c6ueKrUWzZ54jfMpbYy4ZWwRDS/87P5MYKsdNzGY4B89ZOAxlBh+gu13BkGECyyI9PHrNEYV84
-lTak6oqorsJLKc3YNZhoG9sl+4AUGoCcY91/lM0SSuFoZich6/qc4hDgf2ju75mnmVQXlyPZQ80t
-IKwI6l7PqU1YAs5DxDkbEeA08Whivlur5A/6z6QZA2r9XS1+xNAU96MKxM7J08VPB8H6+F08hs3G
-H+u2E3VOLLb8AqwA6DmpjE9ikzUbCFDhAmhz+hMTZKl5S0uR9HzTst9v86Mc8CODW7PzPf5VtdN+
-Pt+9ODJa+6mXyVjpRRNhfDvYNbapaHZ5G3/FPfqTj1LrO3LkWbNns9T1XBMulauR/nJgWSNl/Jnt
-jqN2oQf7eTuFR+GQ7+dA01ILC2DqvTRiV5PeAdL00M2T29HgA7WRElM1o+iisfkwQJYxjYyIenbD
-o7n7QdX8K/Y78+Ws8Gks3gxv8Qrz0i/fubDve7ELoc8/XFkeqLgBxW7P7LCCTjh4hWDwG+fSQN2T
-1JoyWkvh4YZSsLQcmErvCQ3vMndW6gbbG14Q5iqC4zU+r1vNsqZ3OBwue6ekTACt79vA6KDoHgFh
-fmCYMUwMcm5RRg/8Fw6NrjJnIDSvWR24d2vKCYcomJnWstp1FW98SJOZV4PNtH+v2AMFHJCXtUAT
-u/RZIKpo0hZp0tIawORq5XQxzrX+cpqMWGnkciZBVdx+9GyFcxShn8dg0qBqaJKOE37YTFGAXjGO
-xr3wa7HBkB0z5+S5d/VCSp/Fqqg3h6/EQgwYF2BzKdNAowyJ9tKuwWcLRf0ByQe3zerlUuvni9Zk
-09cLp5LSMvDWcjU/vxcZ5UHv2PTfjpnJasIhDp9jKplKvVi9JmooOtJDJFIp8c97Z/LmKaolNLEB
-qdpzqpeQ5DejPAhWG8VrBIFaZc3OfuXTMaJdXPxjLKI6WSok4y9wEZyuOZ53tsQCpShbvChUZ1rL
-hJv/2ihGQ/S7cQwmtqiOmxWS64SrdXuOJGY4Fp4YF2GjPvsxo6ZDNJPQXkN5pbLsHuhiFn5Tsmoz
-R/PYjm7UWKHYH8IWA1v22GXUmgZl8cptpmi+FFjcjKZRasD08tzty5EdAI18BRgEkr47sOVOt+08
-nScFXbVEK04t57M5+91ZTWezaZkXWUtBcAUG3PRWGsLu2QqGXwvym/CbzYKZdR11yAk0NE63Hy/E
-tS0TLX96XjmEzfT/CjPD4NWT/+J/VB819jTHIjiEWJkt3FX/Z4Jcmo0fK+vkSUpTo6FUdbepr6+C
-J7VejDHgtJUz9vfozfM6tQLrsxkNmxFf0EUEKBmY9lhyaSnqB+QE3j6u7JEYxK8BPQX9sfJQt8rR
-TnYKywjPIrx9V96GQDjOBNfcHL0w4DTrxzXBYy7tpFRCaSBc60argp1up1CLgNiXn3Mwt2oIutlx
-rGhXzwY/Qo0ToSXSRzW88Lv6mjQXNyLB63pVaUYUTBsCsNAnk+bJyrTvzUMH+RYWbdzTTkSDXE8i
-snkaEqIdaTTcqVfmXwTwS/CMznEIdIB54T3Rfr/JlqU7UVCc/Q8v8x6w5WWcGz+5ERHzxyf25+n2
-4pniTOP//gHRFoH6Rz9qG7rsNmCQZ0bNPKAtmX8UUMnY6N+cWiFgawauaNOaHhu5xcGFpr1ytdN5
-/pU4UfcHfNC1ABkZ0BPe1VGb9A0Uf25hQIW/gcu/Rdi/9mNZWQo1NCBv/E9mLbMCX+43uiLBNYr0
-y4sst/O05+GWNsa/UK6ud0r3yGo0DirCpvHaJLhHUBW27Rdj8Z8LCCSYw4BKjPVpOWqDAaIzYMYi
-n6VOpgtJD4psmtKK31ALl+o5dKv5NWn0c34dYWWNAnYVhg756qlFwZQsbxptkbDMynAvNQG3IbjH
-gnSAcw3FE/OYFIaaPPhaIsEVWH+PHXUusxBgfurigtO/XGdkPnISu0pN8V/15HEf849piihBG26x
-oDZaBe3tqcL8JvJxCwIkPvdT7h16tgvwYiw+pyBwgui1YbvW2c2diDEli9ZgWelbjGPLFh82/gRE
-IyOpXWk/h7uRyCq7FKjoaGiwpT3WptRcKk7QlFJfHvkUSB1YzYRmVNTMW3mratV0+g4cseTtQHjO
-zf+RRXNrp87JN+YPUpl558jv1a7wWqC3jn3ApKvyE3Yu5Xm2t1EPdpwssYvAj4fCzffBguZXF8os
-yDRw2gingbbW15a9d1cYGdRDe+cEXdLRFvikTofq1eCUIKzKS5uUnz2uNYrGzqJIxZTz8VA9OPEt
-753BedrUDpUg2QEYnjnUQ8nh7Z3X8aV2GlQK1wwyrDbLNyJRNkaKwcpoW4pt7ix6S7FpyTRv8LA1
-+0gC38V/gSUPZ4EHn7o0LwyZVBK3NCIxcy/ow1oZcz/He5DqhNrKkIg+BFS7p2rCEcIUI4NMRH+k
-NUn8AZX2xccHByczxo9FLZPfKHM8tkLIqRfdQt0cL/mByGSRh8YP2mkBDpZofrhdqFh0VFi83yUe
-01FUEfJI7qHmgPuoXR3UEADGBXstOsxY8n8E9unV1wbm07IR1fO8f/8+FBDFJ4zQ27qhuxOCxC7x
-1t72cTEEFmiaW9Ib0abTqBLM9F7mMbkmup+ZvnxF1sEO1Z+Ws4wEEmhUIIdMTkUbAt02aVmAyd3l
-cYZVNMdzrwDDu1cP0T5T7i7iSTLasryuf9nwFGdaxNvmJtSrXABAQacy+dZ6YuhE2GJCT27O1Qzb
-T7P+7lUjxzPQH9bSk+vcPHhg7TpRkskPRRqqG9rVlm1btYJ2l6vpoFvrIk+IG4O5ZQFi4zgpIU+s
-2FhOsmvBSDuWcGBC5LadiCrEWWACsSA7aTlS1dHfuDSlFVey7n25M16qei9A3hWuV7cekTfXCywS
-VYvdWXZhHo8LP1bY11O6PraBSUKCBBzTZsXZSOhaUmQvMWOIvXoHbpJzM2hr2u/CqU5eGdj0VEGh
-6LpJd7/q9vDrFxb2DHo9SWDxnBDM6sGE2aOIQqBaP10bDLZMPRkgVYzT0w2FGZmlfhpGz9IuU1By
-T+B+8FHfCu8oVsdmuyLexMtRfH0TNIvZJAreyP74aPfKZsJXNpmSJms7a0bSKzvacmbF68+vI3mH
-IvjO2ovb787Wh9TVsMxwk1g2o3g4F5KWxog9SDy6taf2nZzHvn5JX6HaMLo1uBBU4CyLKu+v36Ul
-8KFYv9pf8tR0SbmajkG0UrelntnKYGTGmlRYqUs6C8ho3BQl9wqxvc9Z6DGGLNjre3qpD7G2f6Nq
-+Ae4cItBeANBS/txRHUpOCwHyNNKdTp2RSm8Rta7z2SbxQpeFBpRgARi5XGXPfdmXyXTUxN7hqtr
-cdrhmIiAiUIMCNm1zXH8+IiL7gvBzY0aT6++aTJY6zxuCgScljCfr2TO0hhAEc1PH3xsAuF3AL7D
-eoueJgXqH3s4aY1pwKLECCE04UjjJlrHA4F/vDhpX5Te50edMjKqKRf47Mb+4pC8vr52EVUJyYsz
-GGp+ZXLgdfZoFjkT7KR7FnQ5ooGnZM6gDiUqfLeN/RyVfeQFDBNGS6h2xyRuDk6jKxoi+UiwSEuS
-LM6YmTC/3V1cF2FAKaWQMaH4XFN8iS+hhg9ff8bACKcdQOdpiDNNgiFDjIYZrIe8QzEQqQzBxMX+
-2li9MNgt3CCag51kcjzYzUuiH5LG/PZgUTdqD/xior0VFfdPYEOLKqmGWia9MGQO+HJmUKqGmjcU
-G4ZCLEOrBt76KP9IBu48RcvFL2z1OXCMpNKZPeZ1KbfNZouYx+WTt89ARL3Wk/j4VJ91nQwRdOJN
-zN+ohJsLz2qQNJ/p+Fku6Q62nf3bWx6PBxLDWQywRWn39eotmukXTQTONdSV4TxejoGqFfREns6Y
-cF0lM0VOQfHB0TPMYqCbWc2j4c4y6sZWUUfV86DhVrqy6+MgQ7IC09EKwHNmb1yHbwEHKVIB2yYW
-9qirsbnKJL5l7Zw0eu5fBMNJW0OTnhuPF2KOQ75UcOaHqQh3riI1ap3Hj8YamyE8szZyWeRxH2C2
-a4tXjvk+fz97CkfPq4gfQUbYfe8bK1vVOIfgnyG0+sjgSkeDoUK1/cuVNeXp+hqCG+Q1i1Wd9TUr
-6bL3SW8PBSnbKwn5HRho3Ua3CUT6nMDqyIyCGyFrVASSJNmXO2DFcKdP+yKROND/em0md1PNZ4WJ
-eBSBQukXidk6l2pQwcm3akJ60hby9IIFp7+NjLDjeh7PYLArePi5lHFMLKoeu6QXLdScWcm33Xmm
-NFOBegAzfoKtzQ4BYdKeQmX3tq9tNNH6gW1iBRb/NxfV5bwJnBWqUlvnCGADrUNunJT4ZLLJr3Tz
-fPGWsSN8+x1XxsSnCz2QMzNLAYZiwVzjPi3U5nV8qNtPKlckCkZCK8EKdEug0Lh0CdQyaaVkCCYZ
-wHdqsoXCsRNq52uWmMFnaljzkelH6G3MZ92ilQLOM2ExlujKfEyHnHXpNzfWCy5JhQRJdJKIWn18
-TuWGI6xixtU1IiKBSGp2O/PRxpGf1KixJ5Wz2JB5n3f//+96aLAL6ipsPxzNuYWeeh0eI332JTIs
-g3vDs7Lx4G0rt4vk8HC4dSneNQP3VReLe8YDqtTmdtSzysQydSdTiy1P4SgkQ70rKSL7KriQAL4H
-xgfJRjdnbaBCny6Zd7tcPzkXoC7RMir2AzN9atmkayxNUjehvVBOtPkCnV/rTaTKUxIv49c4EtsF
-ODHrupO2DAJtUjoeJRlXLrKdpA9SXucpRk9Ao0ct5zXRKn17N2dq8A72i5ckrfuWkw88ESelpBgq
-ojQBIt7R8sz/qfaqclc0I39MMCA5e6tExZ1pIAA+xD2wnMV16ufuom6FT7TibSzDCDVrLelCSTqg
-4b8PqUB3Nj/vafp+OFlhWFx1BT00NALVez0AHs88FpoS4/afoOhMQ9XEJv6NOHKeqOa1i6gErGCF
-3LTI/vCy29az1fykdkFui+kF2XN89QjmV9oc+bgNW44+T4LC3A/kX4BU4a0PaLNPj75VaYazHutK
-+LYL6q3xefGxpDa2In+SDWVAbTcUEVDUw2HkdhI5ognuK4UoqrUaCb0z23xs9bg9CY2AQ75gWcHV
-gzTA3WfovjEbxW6pvTaFRnMMcmoiviXkIz8VcWmbjS6aC0R6JZ6iYNpB0QYBxt5C0DZfGmoBmOgT
-KOVR3QoZKB3ThWjejA4ehzBioGXgkQ+UoWHaczEeIanL+zHUcqMTJQ1s65f44T2JKRDHnsW7o7uc
-ueUAys7tB3cYJX/+VT/chkw5bn3MNdUdI2vuG7HuiwnPPO31U3b7kUrjW1i/tOAHZxOLMVq0Zs0R
-tI4m7f/QFA45AR9bY+ECcwPwavwkoDL46k35QwnstwrrNZPtHRVOZpeiGf8mwdSIUeq4XJajVqc5
-+tp3ywKpozWP9zM5f0mhxhW2ipVDlvqj3WL8i1PbKH0fDgzT86ga9ZmbsWYXABLNc9glorJ19P4I
-8lxaQSGRV67eOoIh7T4R6D3jE8a63TIgfE9bR3jwPpDsYGIWC365Wt321Rc/I2IP8w3oz6SG74Xn
-R5jdvSaa2lhLSbTYE/64DbI0piVPuRhyVJju2GSxY86ZS76zbkQ/9Tc6bxsRBVa3TS3YNSpCo929
-gRCFsYVOVZeTS9uuAGd5g/3F94pbJbY8MapqbQ8dPMPQCZ6da+mkNHdWiyF0YpAVjSLwIV7AG/vd
-t8FLBVwcovq/PlOVE5lpgo95/2U+pHLsdP48WAU/ChOv2BzD5bcDYjfpJvAmhEzxyTTweVJsIDvL
-wZZ4DI9deNPjChOSQqQA6SKMhY3XqgLngTnG27QUZ13yDRx8cbfR/YCWZOyBWmi6RQtPwYLnHQHT
-Cbhy3sH1G3Wq+293lToHrMUtZLJsjZKEC3tHznnsjBoxLLlOQ7bUvSgD9sXCL0MBz71P1Qm1u+co
-35OXcZ73u9VdWFUBQ7T2Pk+Wx3pL2FmRVYG6dNrYDpFH7sck7Cw8Rcobb8ZjcfAW/S2fM2kOCE1p
-QVVJ72h2wpHJETgjB5hekEvIhFa9RYNmzjBZWkrN4WhbPR3mLsOHUbOPfuYBow4OUxY/AdV+iUOS
-DxhFNXAc9W1SkEHaG9Q9LluM0UvwbST/puhdEIH1PTYPPfQShGfiyIJ0bWVH/O+gW6DHNVD4lofX
-L/h1pS7D+D/lzURZcY2jDQ+Ld/+rXsBSCTrBoDe4P31PGDrfWHtxlOxpY3OsCnrkcP2fNQj3dUJW
-LZFFvnZoiVQfNxMSuKP0G8CooNVusR4G+gpOTJ4SRHqyYUPyrf3OI1dkZvKlTfZdKa/VOYvzyOrm
-yx18Fl3p/Dy05CWslVjSj0p/4DZHtpyIpjUUzgb3RdOilM+n2c8pcvfEyJDQ0lwQX0LhaTTQpNau
-bgTvANJbEx9KFRsk5Fkcu7+/JD42g02fDj48JMyJz29w76TVmgfKtr130sbUlg0DRFRL5m3RAQmd
-pjztVFxY/Ab7wGGLc3l0xSHBel5rHpM8QIS+D+ATEQEOW5gUIoNbmv2OlhttgLe1s94pQtaeCmxe
-vYnsy5Eu8e1hK7XnSB4JxpWetqWXCmnWTiEIlDEupKPJYHlVH8Dzus6mpjEp7MgbLkY+rp5sBwAp
-tXBufCPsm+y8sRt4zPHaMU6Z+sPmra7/5QTYreS0H6gxanIFuzA/BAwiHupeDjiUMwH8//J1LXy9
-azKWdGJAIryF9FqjoIwYuoze+X9s49W8ZiBe0mbDoxJo7tSRNlivbmthlktNsyvI4PQr5Jrw4k2P
-I/akRkPHk+TAUlhMzo7wF7VH0D261AKgLjgcP2cnPQSRx0/xcUce5sODyw6V+ygN0LK+t0oW/UZV
-iBFPiOvZyIDvkhDsyyEHGhhsTRpOJdFYp2hJn7Pmi8KfcNWiPrsIsiP7BuFkLuGnm7ACtSpzLxj0
-tQolxSp0tcmBtasFY6h1MBMwQifcY6rS2onyZYd2YymtHd/yH7LD/F73q7Fj+odoQFM5Kqa3v3gq
-12TDUDMztBctsJc6bcn2gCjD5i4UWK8VH9RUl/v0Y2ATSxXmhZkN6jhnWX++05Bfe2T1Dscj97Aj
-GHkxsYatQC4fqIs5DwIfghlpO1L2lpXZMfsmJmeJWp5+lbDiuIXQWZxFksPFvQ2TOvx3bZIKKLT3
-uwhhwQoO6XW2e56nA+Vd3zFOjlR2rEEHL3b+FvbYkN2Uhnq8668yUhvzL2fiY53H7IcWgafxzWol
-UP6+lm5lEhIOMSKuP2olQg7B7ZfuY1WaXWMEqvlUrO8yIYlF9gyhauWRbmrv4DvSW7x3PZHnihtb
-69SDmUxNNwEFLVK4qvfUG2ABbyy+2Tecotfs0S5og2PME+pDlKaZYWplcGoVu/M6SuzVcFWL2AWL
-mRlbkrHCaApy0YDy97jJDx+Roi3vVsEG6XTH7bcJf1/ZeAxyuK7buCQmgN6Wigs+x3G2DJ0j+ViF
-012+8pdoREMJbwTONcY3ibnFK+QTF4dd87a+Mgec/lIGTaPAop3hrgX5ZS5HcZnB4wK7xn/tE6Jl
-hniZ6+b4ml1Q1U6z1jypFT0ZQlFJqb4xsW1gaB3v264r8noq8d9XBvlupebJL5XXFuCs77mwTGzP
-GyCCr79I6YBnJmIKQ40FeSDO/7+OhdA83Aix2G/PjnPk9AWdwzJrh2i+sdGG9RxrNLdg8uV6J39e
-E5WzYHcq6EkCQwshjVLNiLvzYltMsFCiIve3/zVj992Vl4E/3wpexypJ/H4GcLgYNGIlEPJKJuTj
-oPvTf1O0sYNIjO+xS5BD2lolQmnqiQ8f5Hcoi1+St1L2VL19hL32rFXUG3LXMw/9Sdu6RmfPC2Ww
-YFQbI5xFFTGFluqYTCWgAWk5bhkbqmpHrKFo8l7k9E80j8Lglw5jNMYY4DA+fjjya0tae2xus//U
-te0dKcUQHXDCSD236LBf+iP0aI1l8e/Hu5xAza8uT0GGbmZKyTrsJol/X84pMNmGy5eM4EucePUb
-AYLyc8Ab0uuwBg7yZ9tSTD4AH+m21ttahsA2+XGkztRWqUquozu0iBZox2H9cIR5+RPzxyJ5nMJp
-fLw2RCxlTG7EhSjUB62LIjstP8ZQSmU2o+WvaYgn8/hu1lM0yJRBi5jMMLzyejjb+ZTwZYkB/50h
-tOeSM6CozZqdJ5b5QwC8W0/OyNV3MnveIDevlXt/qhmbFcpzVnpGUEcUj4PjNQKblk8W1tMMZXFI
-LAGwn+2du3mBTJULPwytkhbqDqkTCG2iD7MqOy+LeItiMr9blt8150R+/Uf6SB9AK9HOy0mNAcI1
-huG/ni6lMnBcERYkLDd7KGK6ktBToc2VJRK6GI5723J4vC8BcBBsj/PmvcOoVDNruinEtpyAmD3j
-KYvt/ORvZkhAzvD72nYA4LBI9O8N7eUPAbbaepns656lYw5SsirPsUP4Uvl2WbvtBOBEXlKJRwuU
-g/jMSLx0YhUUcn/EJX11LUTsOtF1xMNL/72ZqvJkNM179cRuISpOdX1pa6LDZHnduUbuR1K15VC/
-KKD8rKtLiorJL5qpiUMQsI8AsWxa8AaHy69JittOmDi1Irgz/0wHavVM83E9ilh3q+4VGw4LSY4i
-bzRo5AFBlCRJ9Ro2fU1vSiQXRLXmvGDB1sV3wXth7rC9WsokB0b+7KtAed72axJB6Sd2Aa6RpYQE
-4MnO1iXQ8fAA+nGDXtdtu1jngBPVAmaKt/k129Qvno5xUrFbTdevVBO7AOfu/c6Rr2a9SdttUBzA
-QBz61UbPUoaICbzScri4f+tOCBG1cjtS3c8Ji042NY7pQGM8xJ3KXJQCgC760JoJosRlcYAk9RXB
-4ychAkgaTfKF7rIqPr1NlZDTFohUBuWuacve7KVXbnVQxLBYGF+iiuxS/DaD6vohIMTYPTqfpv8i
-W164h6C1efITCTxHj/4NF2GYCbyk6UAtgKuVafxGtoS6SI8WLCylyZ1rQGWIaueQg2Vg76Sv/0wf
-XVghP6Fp3/bGHK28EXB/5KG65rzlzqCosU+enn8XOhX2+Y9kX8rELmOBjegqMOzFO7X8Ou0Ww6SY
-u2nZ6CuRi+LsFyPGikn0iwPHlCM9fxNA/5O3t5I4vuylhCWXPC2KAGzli3nRQ/Obmk/+YampSKet
-8oCHjOq1pboGt7e3OhWX3er12f2QTzZOtTL2MaRtPuntkYbkk7papVOXOgfNuN0uoab/EJ9L2y0y
-yFQSenD5pfBYhgUO1cLGXy//+nOVfBiqF/6mb6Q4vQ2+lSfyxs2kKbc570KgiiebnJuMDU1W4kNj
-IDf5mqbly12nS91bCtD8kDnxU3EqG38A0gn6x0osBeOEPbSzTTmjCh8jCzYLeX8ruaVjVLlgi3HG
-bBR3734JPLUtslinMnobdrhVxycORIeqU7mZLPm1DFv2qbsUbu4WassblQlxH++y3zQuGISxDALa
-rKWP6LYvm+gfCGNXUxeIRkEujhnF4/R+CCQVBfyFWr87U3+7UrO+9oXHoD7Y7LqKqC1YQFXaU5Ol
-U7iuIPT4pH6S6fm/6T088HALjuidXLEtEQzAbo2/mPFoAhh2HBwIGJ+bBt6oTkzaYy+WJ9UCrUrC
-Ino21zLh5npuRqT+ceN/JXBQ/ecU0XTowIAg/BnnXRS0VJxmKKwjkft8T9YhLXHbWyZ0ZhSrQh8S
-rsc8VJ/X1YbvHVT5E3dqLHBr4k7BsK7HQRiBSAs3JQkPT50zxTsHSTMIv5KL/gvitJCiVd6IZbA/
-Z52nJ/r49rrEzrFfmLp8Szwfp4CI3r7UIV90SDY6UnUnSIZ75rZOMsKAqsJG/byE8GNRmxD+2pKu
-y7o9dr9BSpfrCsCTfTSWtkflQ+UmuAEpdvbL/DIJVclUDtrsHjczkP7ONkEIHPzoylrb/gDPdTUT
-0Isy06ajtdf99nfIefuHyoMwogKE3125UEvCNkaSm7XQfF/VAMIJxc3Zh7FRAUBDCmAHsQBfHuOk
-5sDOQ2gaDa0ZXnfByRuy7YWO88eRnUdblbPgHtvQIoKAfbuRmj36RHRaHZJvzBwUe0DotTioPVE6
-3/ZqOIITCb+ZKZbM4U1epgbNVsYuyvoknCkClHnwrRjcZWg8hpRWoMtA0zzCBA90TUKZvI3FRiPj
-/JvSs21kCUemitCZiz+K8gLWeqFLS4KaQ5EEvtofMu01cp4Ae9lE8k1sp7HHqfAgOg8TA5UhoAbQ
-FNS+217XAEZrr5qzJZSBPsCGgg8xHpGIwOSpBvg4OCVqnuCRap3YJ1gWeiLH61DsHYTg/R/N3xx7
-EMstpD9VSgN68hrNI29oW06u1pNLKgli1yt5kCD7co/apzIn5OPNqeIdlbVwWkvvs+ZzNlfzwzuJ
-PYvPQmn0tQ/6rZmACZKYEuIN0dcFOxkXgAH7xVC9K3djaz3HN0yEZ5YAOUMCr/WmGAOoQekE/wmn
-d5o6GiTn048G+hsdvkHIY8cgdc9g5Zas+2KUmWT6/2KnHG14wqmIw+OFtj3MAUOFniaU3qQTiZHv
-p8AMShtDGVynq5GUOm1jnPmzWHXIi9kuEZu1XO/OS3m971DqElniam+nHvTUvSRKT42sQwAR4sV+
-MYvWmvLGkqeYLfZruqAIKP4uMFotzDGiKj1/oEws8NzThlMH6beiWyRDfI3pwMQFnOqnaRGXKykq
-nwYed0f1KLoDqjm34RZLAnPdvTKQclAXuwDxZbZvM7hlgQAz6DtSAikfQ8V2pK2aDdiG/mzzA59Q
-Omu0VvHf3cO8n1kJU8hZk7HdS06a03jxOspX/sjsSkeHLB+9pqYE98nJPyN81jvZVULx+o3qzQEW
-AXynmxVHG6o7izQU5YcwsIMynDMp+1TpmkNlLJ8dEMugLHVNnlLrOgoXlbRHwo2d28yLLRzbTt0U
-kIWVtTMgk4ytikqHfgD3J5bfYYMlRPWEFOByCvBDInED2QSOqnAEMSML88wp88PdKwGyRuskoWob
-8YZLuE75Dv7oErNsyDmXceGEHNvdiDY4P31oEvEZXXhoN/RNqNS8XyVSW4yQDJzCn2XQIeGuj2Ql
-bqDPu4yaav2Af+6eGgmNDs3Nh7MWrl3qN5oYFrGIUs3uZ3WIr9LftAHXhm3lKizyqs9cCKGVoRhU
-T3zs2+Cn/GO423uDrdCnXa5nHBQWBoQFmCahsyLsnu89ujR+o9DC/S/RV0h+8VYUpPR1tPRBofKb
-slEh4ie4RfaFg8p8clxEAzDgG5WvkFVd9XPu4BlsC/W72uTkQaNqrdTZhvBvQSowvyjb7OVMiqJE
-zv22h7tY45Cs2/kGQBhfsntSwblh7SKOr1YBHxbZZDywbqPR6RQOa7tkEuR1HTyslV8OqiFBMJbf
-m5U61DWXLi5pe/8f/82dmMoxvyRXon7p/s1LYsjjnQIQBUVx/UDq6hwRs7Yjdbla99E7zwyD1Kwy
-AusXvlJrbYCZhvFngZ76UXEDYdmrryOYDiq+N9D6lT0JifkarlZd6uQ5GUxLt/f/rG7nh4ZDAywY
-VhKpcEfODPf674eLhrxqSHkcuqYwq8UtG/KpzNxG7gdIIy6Qq/Rem5mYo5Ii3nQr7EZuOc499GgN
-9qilhqjd11Hpc9K5owmlM8igiweBheTQDF05na/6Uk1kHagsnaPFZkc1Wlri1lC3eiVcF3r+UNvi
-u6VVECiKI9xiBG0iPc5pcnp/8gng7+B7STDItfoVsC/+y+//feoRpXxAkRV+2jV3hNji4jIde/Jo
-rzdKl1zgZCxaU+K8OkdgUuBZy3aFs8moM2if0nMd1XtoSWLWtYv676HGKGgfjVFavN3eziSovUC5
-/avDa+xOiI8mP4g99YRDAlMtHRoxnEtMZb6NQiuij3R/hlxXGlibooNyhyWdaQ98SBywhJFhNxPW
-GITdNtELSNKzwxwMq6nU319WHsd9+skKfu3xS7zz4exZMfKKjzJzBe4nIusqx4+ykSkEMKl1bQ5n
-4yje3mrbQGearnAvxmSEj7YoNDFV7bH4pyFRvdnZ9M0kEQhNsUM2TMlRmrg4cxtv5Zk4kamN8KIy
-qdMv+zDzhbqGYs/q14vJ71gYf1agXPSGUgZ8/+DvwVeytJYMz2JP+E2LFgbKqpodwIML0EsPbwJO
-LuzVBFbM90ACD5umuGiQjnEeld6HT5DB+n6nb76JaneaINVgvEQnN+FJWQ4bWWU/kHFP/IZBpUQf
-bjI+Nffle36tgQJ/nets2HfDxtVUYBszKYrtDy69Dkv5yAVc2aGZJRBxlw4C9zejHamshG0Cq9mH
-3q7dBh4F85V0Sacz9CaFbAgdx2YARyk2FnYPuS37peE6ZiWt5hAkbY9sPRTANpkd6IW3sXY9V0u7
-NTsjubHC22zNfC2FKhGWzjIhq/NnD+kq+/lMFjI/am0FAXpYWPCe9V7G2SNGgTeQlA1JG52vsmHk
-PJOR45V74auXTwXZlIHarxZz3+cdZSNR7TMgYpksXC2YWgCYFuAvrwN4hdqe4bv33NJCyhaKpZTc
-WXiTsEjHPJO/WukN85iXDqT1z3AQLnKF5zJ9Cgfe9CWz8ic/sFlEoH13CunsXYbtSbXRlkiE203m
-sP8urv03oE9oVCBf8d41oPU+hUWQ1B/QBx+Oga0f9kqCnf4yhc6d2zTA2okD0RE7Yno5bYkSM6uD
-h4NLHCTTeyUyjtpRvBm5j0qO9AZ3nQq7nhstyu5FXqb1xa7wB2euoP+EJk5HwoF2YGLGaBvdDIhK
-74+yLPN4oos8HwhvjmdZ54OpzPNf9ran8wKGRUdgQIboWPk/WopX8ZwE32Jiz2pBEh9qRdk+fV+i
-Hqiz0wgEvcHA2hhw3HKiSJh1x6cWugmddyBg9eTx2gfh+X8XqX0oHwXPPwri5LLa4ywoDyWc+VFG
-gzsVLY8c5+s4Ic8eNgv5ArzDHI0V0oe91Gul+2iWKKEoISad8GWhc5NohcTa2j3p3rwGloa72Ei+
-6ejb14G9CHodInEXLMv9mjevCpu5/e5HbWNwV8Lqd/5Q1y9dM6Qq2sEm6+HvUXejtOL057O++dpO
-l4WjsMzvqnCr+Ajwzecvz9PlS5N1OeIXMvK2Hft9pEVeqVk7m9vEh69qmqTgHfXhThRc67CYhQkp
-Q8Ek/J3DfTxYvXHvjoy7NiwXiM4g0bpQpsudYiwBCRNeOQaTce5l8hX9AEXtkZTgNHh1t4fzPz1N
-d/K+lXVoe2eH36iEmROG3w9gHGrnLn6MYLGzEh88G5GB8Ikxo8zw6I/e1w6fH/CIQrb3g+LVHwrU
-gipndfbxx76vwPMAm6QHBSfsZVjUkYk0Cnj68Vsfq6unzwb96SDwYwqrj031/G+iPFJZMiziFVC8
-CiHCb7UV8pBLdMOAvIUdpwYNeYfnLWm7ogHGdIfQsDSr05u9fVaTUtgMHaksH4372+LaHVGSZSL0
-i9BWq57bfN6l47X6GhfGUQw01ZeAU5FZVBldHdguFikblP73jqVHjS+DgM3TnRJJfM3Iq7fgakru
-G8sDKGmhjzKrNIZHm5LGT5wdYjZzF2rqiMqWbAGsn5IL/fMZlS7pnTaLRvA9rBRDbg3bwIpwkH7l
-T4d4DF+GHLJUmNYWGMdzZP91pS5Oh7OYUvPyfJd0WKrzv+0iAwaNlWL4IYXSaDIqOO9mJx2XBVQ5
-gcj/Kw781HkhTaXrSXIwkS8rgju4ILd231tFJxqGNx2XmqpNln2mCEjQQhcWJM7D9N5CNia0LOi5
-idQPSb9Uc38uoYxirk6bfdNZe97sBwegXO2BiXt9j47sI6/0ctCacaozvyPb9yJ+rBInmjulad+r
-EZzZkxv9FlE3jDHZSLlZoNfmW2eXM0N3V01nbyd8CJGhpifb0IqrE6YYoTtasptw2xQ0EZ3agHy0
-sxnlLw2K9Zn+D4FmSVeWwqTz1Msr0eZQ6KW+o+ZYUpORKpH7zQJx0LXJ+CpUrz6CheDKjHd28CZ1
-jR51J/mO1bs9+fCl3JQ96UuhEuLyZXPSEsfEc7Kf5k/YB484VimKK5M0cJuoRWXqug1rpXJrO63p
-7O85sshnT/RVTZCmXWq0ZPhJSM2Mt9iWP9+qsgTE702iIhTrXSYuXqYT+q6XJGNBq5lEU6DdB5yg
-5Bl2PgDQUVjC6WDFyKE9I+EnIB6OQ2f1Mo3ugUM0lS5g+DzhZsH+KOC8iaqwfYq3vYMQsjx8vmKp
-ulMTsUTAqI7rcoL1POwa3czJJTP+hhV0DSedlrR8kJSXI3wpowDd0hWbIBEjtUQ6uUj9nmfaCUaR
-FnVxutvtZ5pBwIvZkRha5GRSDGNKEPBVH+ROrX07EeyPJlMovOUxh+U4twX2ZpXunBVHC/URKdsi
-APlKmQp/U8OoysC0wiWiu86AeYH1YTUyt4tcPbs03/93qU4pv/bkG5DfAja+FekiMPVGCyC6BSY+
-U9Q3cy1xBCmNeajqROuR+/1V2UTYLnB5uklyRHtWOc+FHR7oD6J8b6203oWf7IREJgX2E98msUEy
-j22YE26RW6cVGwOFjM20koL2ToNYe3Ngy0tmdSkJRb1ejKe8wAn3Hb6e/aV3N61OQLOGsBDWZZnh
-AejUImXwEI7ELg9YKXBedZdjLPBgejkAVBGIPukyNgbHn7r6jGHbd4nhkMcLEsPAmQg+GATho8yy
-PD0AUjBLGr5uVdtR3LqQvC2j93Gkle+KN7uowPHOhbZWsJ21Iay4K6p+nsgFlG9tH72gtbF1aida
-0mFXpcyPKW/uo42cKDKFjRZi1+f4X2/6l6qzckwYMiS7WguHgij1J8nDgstrPXmmsz33CmP3BKQ1
-n8EY+uk/4J1n05W5WtByBDPeVNT6E0xSyN+B4M2NPeKiFBcaW2oQg6ZxY+eHlqBBO6+yAC6mb7be
-qR9+52SK5j1tnycVBOdcJeL11DbY2WIJSGEGusJe5hXwRbtoGVCDDuSSSzuJpQIvpjHtdj10SR/z
-vvCSLHg0umpi91Xdh6Nzm2y6xOPIabZouOMV6a6uhRtwsGT8fEhMS42/vwIG/0k9+Cx2gFjF/biN
-Vrv6Gs+0k6z7RYCHe1k3N4rfPCwm+FcX78XK9BHghAZma1x5+K+F+oAYb8G8qGdjfhjhAqt7tcus
-0XefOl7Qoh8iZ8K72gvyoFNl2QD5gKnVenMQHMRoeEBLGahSdgsVKRvEfpSBJibs0n6Tex3ESdF4
-L8R4uAbkqhfLgW1qbqhQEvNAcGwoKkf93FOPjskN9LHeRKMAL2Q2vMagFwDT/+tJX1YmtuYjLamA
-BA8DVnQYMmboE4Mb3Dfr3Gp4Qxu20+0kIFrZUN3c9MyXiUYN058BKfmcuCMQwa/YOoHx7Uz6Louh
-QYxWNE4rzRYp5HhWLhAI6B2e1fejwntA3Rae70QIq/HbyrOCyCIX50KpWbfNMjk7X1hZbGv0kTnH
-xD4IovMcztV8nEXuySc2WRU9hrnNC3eGIrhbOCwu8/72RT5kCVIbXlvcshCQvcJ5spXbULKcdnv8
-2fGF9HFigR1P7mZYdrBu6kmES9YmbbpC9cbG4vwrIzqdaML9tBtpi5eE/XAwQg0ntUTkRAS6fqNG
-EQuIq2BoW2I0/QppMRiWdBKS0qnesOgknACPvu8ixnMPj+N6eVUsl/miiaIwSaQ5PoyGxJmqXJic
-0kJ/YjoAXGsIdho+Fk0rxfc9+xomJ10o4UolVC0Yw4ke4yHx+OLVP9OEOG20d8oKeqXnCP+CbSnA
-4mklqdjAQWJstBsYcfJw22Rku3hFhQt4vcAjb9735l0GWN1HuqY4szP9/c+A1hoZZ4fgZ39cfNGI
-+AxVtXDUYm37SU1NfEkIrvcPoFvQkvZOMB9jtUZtkYokSWAtYvmg5UhkdrOG4iPSB3OEaJcUYY8j
-ZJ7yx2NHMHrktQBKJNLxHRsiLStd/hOemDICxMU9OiXRU64Ul3npNBuJ+JQYmNiamrSBDDpVt22y
-m8sWgj89nUVQKbI9bgP0/L/iBHFVao09AwvOUVtU12ZC8pB7jsW5kspxFGDsZI+f184e3unM8gd+
-SC11OmqX5QCMZvOmVTwz8EyDbsEOY17z2uiGLGIqL8EY9Zv02EWpRR9wAIYc223Jw/hw+R0zYznd
-pJQLepcVVhm9dLgEoLhT1g1dzNpeif39T1z40XCugowQ0O/GGpAa9Clqd2TZmowDI0x7KGfQCcEn
-h/dQ2+GRy2YbhHd+4GpMWyPEOyulQCg6wb5wVau43fDzWCFspAsS9Af8FpeCe3ehRXhP5C7jsb0f
-NZ2tKy9dIXMOysvzZqu8quxJeeUx3vvX8Eye8Laq6yoLVbZ0igJINU11ipFuYReJrn4LPNnRUnFv
-KUX9LY/2/9TFUkN6gTrkx/bDTU2QiSo/4Dp7AEZ4uPYgZCWJl9mM9lr/RIiatYM+6e2sG6b6fwaO
-LSuTfhFY2l/i8A9SQQNDKBjM7L785nNySu/YPVBEfjF/3MMuJdXJdahPgDkqEMg1WTBtYTg0m0fr
-jfWq8oLLVddyGIAUVodL4v1b28ga3O9Yu1SpTeaYJGdeLCqZoT1Vyp9zGKeLBPyXCbk3npRg8qPU
-zGnwOYxdrN0fZ1zeGXg24YFYgT/bMVZLMtjo5j05D6nnNvraisDkLAM0wTFGs1G8tCwsvOygbuo/
-Ppn6KeLlBDv7qFNx/fpJEK3nloYUk3lvepk9mhGbWY0PTofurqdG6N8al6O+jT4pac220JS+7PKE
-U5jX4X7wItANsonw8bRGXlVwPumpOFNA1k3pa5hgdRXnU3ebXYXzhx1Qopej9E33/qDscRmc3qQ7
-Mdjb3jeM0NaUEGq6WhF56K4z3bgwLb2iQEooResmY1gzwmLh0KsJBKesLQR+6oyRNlh/B1MnroAi
-KRGiwGMSsMLzAdJ/m0BubCNcxA1L6GtuabbyTFD5/AI3DKBV56hGu4+K9WB8PatVbhoCwCmg+gVp
-3fMcQ+JWlYfDHFVB2ucrVHGIzSdWhWnl2xniSifJNrXpumXzf8J108wIdCOXln/x4VqskwoKGcD0
-OXTLDh+mbwCca3X7wMH29Iftj4Iv+Fq8dg4vPNCQIqazHHf+vINZ1AOPD4D0AH2K4ZvWM5CzWERI
-Gxp4coRcQ/UsglPvN0u4sxuey1nRIneCrzpAy7+4DuMbhtobJ664k0MWvlq9+WIF+zvc0NCdnagh
-QaJwM7hkl6Z5Lc07+pTZGcHQR1jjQc6RGbX3ZJkTFxQhawReT/uoOg/WOwhRPcOaQcAfsxXZ61Z9
-uL1JYIBWwDW4UN49uf3pOp4g84s075LXgQ4bJjB7V0tTT6P5aANq3CtzllGI47YOmCVRWA7JptPY
-4ZCTjfmyuU797sF+AkBjaMqK0kYT0p26xdJg9SXIP4ca5MgjyMIIjlyEsv+0ScYFaXUXG2KnJVD2
-VJ/xnmUCgxCRF2GAk/eU6TQzoMNFZ/oq9d7IR7q3wZ30IFDqbhYHvNxJN+3Br36ZLYiKS2yBUb29
-u/Xl1syZttsaa0ZQXBzi0uoqC2YU72mqQGCNI8/ZJskZ4vdW+/nmh8/OstALEduAl9fn7IlxBRt1
-2hsMkt+wf17A1bFyY5y9Wi4KbHRkVHcW6oMlA/qEEXYa65zX3/Fq/9qU81mUhH3afRTGR/6enNSS
-xZ3Uq9mP+9AzLjM/IExduS5Wmoop7oMCvaUKE1auR8U19HS4kJLfA/2U6Y3bYwdMYNC0Dg/jw+A9
-WNyWEVX2nbGBLftgQqb9yG3y9ccn/aow0GgDeqQDaJHOuYw22ZPrgQVqWNBijIo6uLq8DIKe3NGd
-oMxOAHZX7toak9U/a4Kz85JBjJEqUXhhhjeb+QMr1n4uhoqTm6Rs8Lbf/EYUNvLgcDsnNOlOxnkj
-7v8bTjwjn8MjWI1w2l93Ze3KskHsVzi6OmXXvEUPFh4MSs21/81Bh8JNBgjLH9cJg2oO0e3Zr6JV
-UlAU/NCFjrLbreNis4QVvLLp6YFYBrSWsiXfL5cwYEFZS/vXtbef488b7E3OpRXYYiL6ownipKd2
-a4KSxI8xtBnBUUnDaC6vAuUxrrOb0nctWYR2JrxwAiD//BoPism6hEyCH8Sc5k8+ykq8x4hjXmQL
-LjUAXU0IfUazn/JRMWiKhXrPqjYFQymy1bpYcRihhvp1ko9RWiiRfPwGdCk+KLWDmt8OUiKBswYc
-zfn7DHK1yWWJLB/nb1eSIAZQXHICr06CBO/oeHwbMTxbJdjeTgXc55Pb4jATHJTb1F3tXlIjfGPo
-RNnR0HdzPPjpFh2+j2VseZCnXFO/tXACaLjjrJsWJ73CRfN4fVt6Tka3fnBGfDGTkVP2GmbZaCXY
-sqtfrFgCAL0otkl3qvPoDjWpcx6maKkbIu+la8+MFhMlM+ps661TX72Ijb0MU8shhKKZm3GIe0VR
-s8MsdXBepbetCdtj/XZTmoWOTqoOJ8vK3hXHOMf3+YwRHGQv1iYqHIV4lZi6o89MRTkG3wDNJDjl
-TZjFGe1kga3S/H4YLpVy//Se5axkbi1hqwbyko+rm8N7VgvPD8YRvGqFKkXMqOlPprJb9weWnT/9
-sG+EhSt9tUKjPf1Yqs+MEu5Hm9Z2L2m9U3mpokXyqNe2hjOES61v0fGNaX7AQFE4PpxMyG4sseNU
-y1qYSNiuIcQZcCA/zRJGMBKONUbFIxVNZz1efdb91o2t6EB1fp588nxKcRH39IQaWW8b9Hn814d0
-+Yit+SHY7iVHdgvQ2PJnbuiLGvj/lzlrNF1v4xjG2qGwtyo7IOqym/vy9szsxhoJaDDAoUnA68TQ
-PTnoYhN57A4vrOXB1wJivQUrBEcfkOG4dWK219iB17RzuJPko9kHUar/mncOSlZajO0ic13+O8Wa
-XLc68QDFinf9KXz7ZKMzppYCgSP4cMaH38lSlvmOPSRz/3EcytSZI1o7VLFLR4z1htbADH0yXKDq
-8IcmJuZtlDi1ofgwLWBLGpO1P8KzL0QPLgpekM5vjIiIKwXIFXmIB0F81dqjxnY4YRM2Uvtm1gqG
-amVFyMbJPA5M+TYciU5K1KXEEC3mG2OdcaLnTcgMpCPSJp/wjoLuKONL9jOxxHaBMXFWiPsKF0I0
-wozk+r4hMrswRvt4vrgfx5aH5Yv+peL5A5ZXrb1+S75lHdmRHsOx2hUDpzTV25j2I0Uyuv0zEnyu
-ufbMOfLIUhDKTRfW7eyN/WQDhz2VRcNBZ9JtZRVg4r/aDvg3VZAvPWoeZxoqC2bv33pisUDiI4ir
-3iPwKMkelNCRj5EYg5A6j0757wb6Y5wzX8yFWcLLg82ARjXUUQUCcngU14bVuONeQvQpneIOLY96
-RLG3l1klhcyih03Kk9EBUrHySiL8HnL46Lh11BVtzYULFyWdqVZLxuhqiUsArFhelisVoh8LnEd8
-l2LDTTwmWfUDvptwUIZ6vcBisMCgKZClszEBpYof+VxAODoyakbJOGO1jrVfQFRWbPMlHfoo/Lrb
-Cfnkvk044mGHl0R2ydGIt5FJGTvPg/sLUVjaWaYthGWt06RJHwSSszOEvICZa0ujuu7yuBTIVaem
-Zs3uAsf0d79DNEmm9NaYy3/3BMVVPUKa9C9aq3Y3okD2E7ockxbCiTO6BAN8AvYNor6pBphDJkFi
-VRZe6wFcTJ7gNy480LD71LZTSf0hf60faLupoh7p19Av9H3oeayDAWqB8iz++sRfB0tY/b98cRdW
-WfBLy+bYM83zsf5YCNFhIblMhwYYWeEEUKve6UeWIzSmqjaPC/icoq4dOrgGoKOSzkauw61qIjpU
-IhaeNigN0t1WSc+VWXCR/UMbZ3fv6z08GzcnBpE4q3IllYM49DMzYmGrZkJ6IdKb3gG41pu6hvLh
-IO5XevKBJgeQ+OY5O8iZOIrzcLHgLxlRYy1ndiT4m80d1Kook3mdW6zxX5+GpjioclhZkbvJYZ11
-tYwMO8pQjk2KDiRLYvyTVPA2/WRayPXLqLjlEr7LdvD27jvNtuYaLeLfL8zUZxgQspT3hfYgrODd
-llNEv/Hhbx3AzhBay7WsJAmsPuF2L9hi1N/4yG0Ds5GBXDwNgjh/8WlD1S6xlyihGz69iZ+lrB52
-t+EbzVaIs419s2CtbnJtEwZI2dl9e80zW1taEZV7LlTZyqFq66D3bwLTGkzAFYXLMPbyjstNl9bZ
-0fDrtmTgHDVwmaCULcKCAhCQoNjF7NFomNkQqqxg+KBISFoUFFw/GD2obdbq0fo+eRGoapz0cXuV
-k0QSSVXsvcN0Y7y0FCxKTt1mlRaN5YbVCtPhpFvqi9tuLB3ojAs1uIeUX3TYK40QLX5FHuB4yD52
-Sa0M7biJMSFKpSjob7B7vp82dySlneH7LmuJN6bRu7jlDVb7IGLBBvVzSwViGXkM80WbeZmb+917
-8X9sTvAz/1T7la+PzTkDEOIik7bTTBVbcETRKvzjR/RJSVYnnxf1RqKjgSRETZhH+2OGNoXnqd8k
-ojL4iK7b/jhaHxkNEgVxhMkEkdfp7tl+Bt8IvxPk1HI9tQ8wCXNHxLvsANpga/+KUSCwmqor58If
-HWZV7A5M1IxTnx/oZLw7Xld4hcKmMOFoyhlJm0VFYQoxEcfVDJFg82wmqM8YefmfvPL/cQYpu8Gs
-xK9Hr2xTagqaBmP0xu4Zh+AsYJj5Mk2okK3VAbKkz+Z9cbXPBPMkT/wzNF+nYrGUnbEgOfKnDKXZ
-+T+PSaqz/Z9pmgxwhZdsu8Hh6zwMAG5SBZK67syCwE6pT/poQPdLf6+0wYg+hAKOUYbM9NsyByoE
-e5Xs8V8Sj6IYIHA/34m2zM0Uq1QESFVMovIG3aPow9qDrPzTnS9DH/xiCA6tgsgqdF7uxQBcO9FS
-+/mnz7QuV/4wpuxwinLE4lNsnUkFqwgW/0ZBawMt7TvraEsfgiqK3StTscYL+jJ9dYNtNBDf04JA
-tMLFibz+psCKNv0rljI6ThOdPBAZtbSs0A4o/7CVgjjuJ9HzdqnlnLy1sbx3Y1FmmEksADX3wAkD
-1bd/NJHfMtPAkjA8Wl63Ub9QUZTr25opgJmJo9POp0/Bie20N3wq+OKYdYzM0rwr6NvaPaF6g+O/
-LN0Tno/9588jY81KOWB821fNj2DL+Exw5okgFnHIPpoCZr39ES0zDF6gxw6dEqdIl9sqqFzlihcL
-j6hKtLYn5hyNdkGQqA6B9vx5GfR063kF+W8TT7IJUoXLr0ZXK7oYxmBaAUVfk5fSvwhKmLk0cHbY
-LsSkL04mI7rYdnJeKQ3LGNyqTl6o0zTVUXFSmadVQmsUKz3HmBc0CDRAUs7+QcEaQtC37nV/0KeA
-fsktxFLxbll1NBWM0vtE9cdhpD+PYi2muntSIxlRRnvxKpNBtGlcOQQylxhZVqVZ1jQv6HC9oQ3Z
-d3YOejhJbCKl1o8VzM96n3XhPLusA0PKnaeh9f7Keu6nOed6XA+tepPQRdoMm2U+BDO2nThzJj0O
-ZodD2lqABWAQB9O7PFEgx4l9teto/miFAqU5Ur/9yXySEFEmqi9ilsgEYp+hCUKXl1MHCHujDRls
-04jgbT+kWmpYIc2SN9NPvPf+rLpbIAXh3pzp1ZV62bt/8v+9J1UgLUbUo/W3OVdmSGYYtF1T/9Vx
-FIxe4jbsPXxs4pCWkKGXs/KvEhAlqJofWtG7b8OUvQFZGX6IW3wAIc3gGBwQ0AW0R8PrtNgs9sQk
-+4yh2cDXmBUp6umhEU8V2TmyWmz1qtkdh+ud9lmPGQVDdvhD8tt9HC80BVFrGSbOfuhgmhjiqTye
-TKkvj+Us30wIi0pwOKwf36eXFYxRIJe93KBpFnBuUDDxXWgZ5mESkhUyHaxP+x2DT3+QeMBAbhzo
-OLFquX7nvu0L4lRjSaxF7yBNXw9jI+d8pu8ajRi3i1OO44VSzvP/X7lBr3DCxrNz5lNjcl4/lgtI
-Z5OK91BOdp8YSLJ5+eKViEWe8eokparkKWYunxyWSEq5ZfHIEQR98+JwCKIsaVWGx7zFUVEYIEMM
-uKCSjIXIEGMG/ZMWXUjLywiGX4rnBZVIDwBv8OXZgu6901beZ1ue8gi+ugb3S7MyBMzg0eKdTTgc
-VASEDc6VvSRhlXgsCHGkSDaK8pNNS+40bozyWe9q6Co0BgnenPv1en4ydjt0fS+KvNZdtB2VHPp5
-V7yBGwSp4iomLaF9T5fu2wkxQAXStJVJa3k1tHDFZAZor4vpvv1rp/WN+UieJpjRs1LhnxWZ5INS
-6Qy7pbULTKOlwAgp5yX2K0gydzQoqZWrGQU3VVWGssgKIwcoU161Nm1XqtWKEvDM9/tGeN+B1gXO
-fYD2lGWPbFSEcSQou8epFk8RfBP3z1INbn+zKO/hywYpxQR//Flt+3slSqjFy93JTjifzHtTcENE
-owm9Kdh/AxbeZsGQkLQLI/+pmLz/6R1M79LuOOt4UsA3fGfKfddmEkwT96wGNNyaLfcAklyqyu1d
-N2OpSx20d9lGvOLkK29DsjnbV9mLEi3oCnj/Q5RO5sZDaTw9SfKYkbzzQh57OakGVquB9yJipSic
-7nX9KTh4XjYbC91AXFQY+q95CqrOOUJR647Zgu7h54ja5SBTX0C5IYcQN+zrUCg7Yr423tKeOCx4
-T9uxEB+5f+o8cDbqLyoBqwNz89JH8whpfIvgzqbcTNhkx0c1YhLt95QnsZBVSkC5SdnRPAyEXVlt
-+V13le+7wdS3PIFYniyna4KdbxtUsLcvl7OVOR51TmYbTbMY/ZksMQSlCfG7itzvLs4SUd8Gpp9Z
-EvajTC9HJTKI0mYL5pnsZq2MZgVNEgRv60+9qxNUR7T/PZRh3t7AWGQlxzUhqhH/Do0MEt3ZUoNq
-6IRUGXDNHO2dIRknzRLOFchHMmKpIrxlEAMOIFq9LcnC2sJNago0pzaeAOlH4OpxuKPy0IqJ//0E
-ZgCC2FcTsOcxBDs2Mo49Dph8IPTDup/H3ze9faQtg5heSkb8mnErJofaKhZ+Ag0Mpu6ypmTdDdjO
-gUxfNXNWDK9rPcP79MpbT8wU1SqGXqrqEpvbGo0msgREwzcDhYiSk38BhRsXwX9vVFtCVkLkimFH
-0rbrjRYTWzRVJC9c0htH3XoW69/k1Pu2+rrl/JgrAHo/9yHsZVOp/H2LLaDBbPi8x7lam7aZroXb
-rK6ZJDWY8jBnyZEYl8vY5RGDzFhOUQuLLTO3bMXPSxlQ9k/xRwP7UUeFLj86Z503m9taTt7106bq
-QprWCYUpRTDr2Gl0JeNHFPv5pG60ylUmAK2UgeOE7j3+5Sp4YDfrBFs2jixoJB8eAFjCl461Vjl/
-YXJhkYvQ2wqFDZBwmXZDLFDI8jWyTp4HGCvLgWf5DYNJVEbSTJUGSH61khO5F9uV2ZvRe8sF2fje
-wSsQRmMwkB5JChfki9qBWUuGQdalMc4ZWYvh5qhp/lM62V8BANeCqsOhdkR1PjRtOdq8/GoXZpxZ
-9P8UKR329eifSWjGDd1luDRx4SxYmY80LWhqM/MPElVLv2rBfvmX7R80mE7vnEDuK/fX4yhvJdAH
-MLTB7d5ES9KFcku5ZSlCMOfibsRkwEbwQdAcG15405TU+MZCUQtqTqj6l7XbaDq8BOGUMjVQjy44
-lZBkxRATWwma9p6gzPDO6/1T6A34gauRhgTi1/HCscjoLS2QoEC4xqhHC7FyRaoUsaGf+pAJEQ/h
-tYyBFeOwEKDkaPfiVJkQ1SgbEzhZVkiXFBVUsLKUEqqd5PaE+Uuobcu09ukRjYP7QuUlDPGICldY
-3nVfgRzBALG0P4EDOw/wgroJjagxYejAtP69iRPtwlH3dN85y1UHtMgWVdmrEAJMtr0lm9mrdEur
-sU4xEJwlc0NH843BBQbjAjGWM+cjfu27rC7yxECF7iKckFXFD04m5S2MA56gjQUN2IYgduZEWgoz
-VuMlvU20XS6RRWYhfpc0iV1VP9pP7QOkZtTAC6dVCBl3LgS9JhEZ9fC5Lno1nUzGh+/m4DXc+BwL
-vpsIncc3lWo34H0BGxkD2SNiTapCBK2utHDM6wMsp7u81m7BVsfCNWIREcN7/eMQD70rgW0IUkVJ
-0lRKva1eC2Ju3xAD+40Di42U2Iie+rzq3tn9NB2G3+oSYE9fQE4xz7olx4bbqJGzs5sZsL3JCB2Z
-64Y5BXY9IdTIax6+Twp5f58B04IXQNsEAX8fpkO9ZpR6ckWLnrfDOcoj5nf82NnRg6WvDJnSe6+E
-sqD42wwvcUOHKaqTkQCDPoQg5lFtAHc+k5zMvFmmiDt97r+TEpvZ1PDDwz56hHLNo5GBKqCokfcx
-hG0TIZq0jqXEARLdkOPb4FPEYMRxmgjmdLGbyLJLYLU9H5ZesP8DEAq4yYi3WrUGihr0SoRJsg7s
-4P0YV09fPP9UdUFvEYotHYyccIYBn0aEmXwThzv9PbGggDIMO618Olzq+1Zd+nJEjZkxfyV4tc23
-HKpmPiSTZHiTLzti2SCHzcWnc/26iUYtTFPbunDs6IfoI0pgo0WnomNIqyKi7HFIVlMIpwLHq/AF
-p3RIuXJybeY56U2Xuzf/VclXxdFqOjRuQ9EHfE6PpzyAsF9Emyjzqg5yklArHDJOHPaeDQSzFmF9
-R5ACKN6gcQE3PBB6IW94yEwQV3MRVuB9R/zevXR/FcKwNnQcEhAwlmuwaOkOcbG/Ib6qx69TZwjT
-k3Yu4VP3NFimfJQ1HH7BDVB8pVo2n2t5a/+0MlYqwCZfQK/tEmx86mwXMdD7XieYs+Z2mNwd8Hku
-kU/MXN8n/xgfufj3EKVB+Db8lpqx76Mryk18GcIrjIqA4PIVOPXb09HOb0amiL32eNFBl/lCkoXT
-PPMZ9L6UmrJ04T14ZtjYbHNkUbVK8tHrw4Kijpk2izQeJeHIMeDkG5d61HBOxUSdGKINpzEbsqXP
-x4MhLrWrrlPeO2itCj5VWO5ZUDJqE4iHk72ldBQGBGK/8WBeNqunu57/VIcp7EHlz217QPD4vQQ2
-yNTE8bkUuHfpVIPJdaIvNk1DrxnvVT/fJdS1QPqAlc8odeyBGLOS2CjqNzAhWKD/nUIB89A/vguC
-VcmVTTW48lNo1tuNQLk73RDSZMwYfxtxq/KuXSaZAtFGWSAfWpzbmbDlAec35/WjqiUb1eC1fid3
-611sbf905rUTBD5pJVdpkROw3kOvFIIs71vl+RDZ5i7Wr7lcRb61Bm5TUx/wE31oro32WAKSmcro
-naeDbC6//3+/O4T1NIy77Vsxj4uCVFsx7/BIh3hx8S1BhkuC+Na2kc/y4gt1wbPaxarNWJDQg5n2
-NgLH7Lk1TwNQumPdDTMSBO4J5lst0qrYkct/zyU6ElwlIpc7eZmFInDLGPN4pxDQ28ADsqwc5bMz
-9RihM8//15nJlks8+uI7qXzLpOjQteuEqbFTiAn6Z5ewjp5SVWfuPriMcjKLAS4/JDD1RR93n2mL
-NoDO9L83QHc+5/u2TfUJ7Eo6/WbxWuudcT0l0AYlEAJuWNBa2EvLKrK1Ru24Yus2kqQrO8aY4bz4
-mRErUnTSP54XfztNJvHvrNhoMuUbrqp8h6aYaiPRRUVUKI52ER3M7ITeLS29SALotE7F8U9f4T6n
-G9RUQKZdWHULkrZYCahCxwgluqcH+8co+26OwzH4a0BJOAK++5D4ge3tC3kqYhF3+PI3kzKsYGYJ
-M4y7mkoL38waM+sq6MgOBn/03RaxDmoS55HIqZ1GZJ+01wVzm+m6pPYGBF6sm52rJDwwDoZ0p92I
-QoTovHGDZE7GhOZ7EvnW/WoEa9BcJfQCELeMMdlBA1+E+wi3MryjN1gOResb0Ppdy+74JMZ108zb
-nvgX+vr4P+bTAnIL4+GNs8LwTOg17X7HI7MPTYturvt5WsWJgHSRlQEURfnNrnZZN2y0Sv6VGXzM
-p8tk3sRkB3YI6J5at/Pw03AZ8Xx/0McL2HcV3FPmqH6Z2AMgWALgc3L/avCL4GIPpczEsS0ym0zb
-o0Tf1qRqDt8nGiiBON21VDuXQxXJwUWAWJOP5FiF47B8DwL0ZZxS2fw/ogeBriEFhiN/mW+E0rHg
-CuZJZ8XvEEmmA89KswSFVxHOI+4y0wKCpsnaHMGj2tz3csm6bDOzpnxOtZ+J3h64wdHlFm12KXU9
-hfAp/GHKExHduYHq4Q1cPUKtu3ZLa/40Ls+nv+acYrpVvhHZK6Jp1F2q8ObDZSB7WmOvYPcvawnb
-JGD8LqyUajFyi4tMBCkIYrTTi979oAFYbP3m3mzT+D3p4wG6748ihjc8ecRIZGfBVix+rXs7NEK7
-Fzub7hmd4Tpkdj8hKOyJuHyIVVPMEmyy5wG3FepxZitYFti6Tvu2Kh17uPsf5PodHleT9VKU2oIH
-WcdQvGRJRgIBkMSXlX/xiuzlaSFvcCg4YfWRUkcRWv1kIVvwz5B9/l+u2psr3dqKqYijbIX/i1K5
-wUAywK12ypRwW3kbyjrGHWQbn95C7XlztnZ10qsZTxany+8hyWWrzuhk7sgLXSMb2xKveuCnV+zC
-J12rBR1HRq/niyPJeTDyzPjVqON/EDN1tKiZBlz40H3iXEl4v1JNEx1UCU9cvLzFVvAi3c2YTQcf
-81wct0+CaQbDf7AYdJo/pxYctbxDR8VxqAFVVMFeBTsLEtHvvJIFzz8344eZtDdxfRxakvl+91Ub
-YT+uZWUVkl8FqrYWfzRPCKFKZL18UctL7Ca9jFThUyzUpLTab5d+Twj/5QSb+Iu4TBwBKX6mR+0Q
-jgJAnxj9SdDkEVybfCPjUH0lzibPtzZuy02+y3TKRh9qjvwC97SrBGhL1nX+ZZHl9o94WmFXXPiI
-blEv1oNaJmjSpxMW1LQ2m5OOMTp12MFNXmxqSi5zd43oiF41Z6Z4BuTeoocbVFLYvF4Vq/GGdamY
-GK83fdnTw+cQxoSlgnP8mtyfyFjCzFod8o9kCQMYRrQXlI2xi2wU2eCA7t5Og0F4iK7gl+HICbd1
-MZd7bidk3Knq+lObI1VuPTm9hFC/pqU//rxxbNNTGgiNR4bR6aYNLzQzB6oTq9qOGFpKsC81Qlpx
-waxxr0PkyNrOJDp/2hYHp4Sqb+E802sk4rIRG5LdfIIuiWbHjCoV29WIgnYrS2yt6u9mnyzwZtJO
-7C3XUcQyEnS3wZ6NPGQ961kFGxLATWRSZxTFUo50ndYlFRQRqf/Y4Hhs23Uhyt4TZcNf3WQtJ/j1
-iLSMPYZoLcRoNu3CypGarClinBnblwBUe1HlUkgI74zHXSx1mxwpBId21oV4pr27P33KorGqvGqX
-BKTi2qUQO+TjRtTVjg5bg0gUsEjtP8t+MW0lZeqluXcL/rNbe1R1n+Z1gRe9F34+Xzy2kc9HllRG
-s4Dx5keIZQYTdvW9kclw7U0vzvr8VhXH9+IHLXUJ7EaKePtya4uhMpd9cCJwrbKaQJFONaUUydI8
-6TGi7m0hGyugb4nC26tGVFkKXUP2RwaVO7IjMZQo/4BpALkH5mjnSAc4QDDQE0TbWcCU3IHeroO+
-3P/Ajjg6UPftR6fcWRvCChT8oBQYG8siuJTkNekWeX7n9uA65QK9yqsOM0dw8qC+qCAs2PxYizII
-NJ7Y5OFElmsFvIK2m5UmCE7RY+Ki25GphRPj9Y9E0nb0qXz/CG8x6H2TUy46yIr9l1o54a++Qlzp
-oT6qKHu2BN6Gkpnm2ufkhjdQsSAS3NHo7YAW6CjTuC3N3mL6s+QS9kG+BdUyILOcA2x7b51xOckg
-C5BrF+dDiiQMCJXVtYEwKsJSJpBr1BbwxT+GqqVq59gVfsJn+qQmH7iOUf+iR4y8M902ffFYzNvp
-bmeMDYt3qA2pA11EuJ/0Bi7+LsvLLsEdewexsgV6GS4hg0siFlsOM4zNX62d0B0kGt6/3V93Xz0x
-yQUlAt7LFkbMC4YafbepqdQum0n7Gs7/B2yRxHXxgUVz9N+GA74SFrtnYpq69xWQF8qIHsvhD7JR
-Zu1bCdTJejlNrmunoIuTt2OlvT8Zy+CDa9jZtge+l9eUt2nZq4TUqskIvPwtw9wgy/hcGYQk3uMi
-ojZ0Y0yFNm89ckc0sCxBHeXR7+fPwNxxWKJ7PZ6+9tCZ7+lbHiGdjFDJsbYv9Czu/crFcI7DUVic
-oH/UIlHUgmgySXLx+Q5ZtOaRt7dGPVPgjDsbWUMuHPUb6SwHaUwbMKHkdkhvvuIK+P1aoYJab4vl
-rhaQzTOCZyjRd92Re9GUbLPxG282pUx83UUq8XUctL3xSJOR0XlWdspAlKjWF29nXp0BEXcpv4Ft
-TEIa1gWq/OmYpooY2gqiHRE17q+4gTdEFaibwNX3NtbDUPpf2JHqoFIS1TmR0chEjb1nmNOWSrNY
-GybrdGSJ733DHpt+ubq8tL87vh8uxqK1TfwzzcZVpjkMUcwE/zCQJw3N/XDcH9sVePvNbQoo/GWX
-H6fxR/KOzkHQuEWKMGAw2+3e+o4stDcBHbIc5tTns6t0vo9FKPvD38hCA1A+7hdTY0e4/faE/NlW
-GenrhA5u38cJU/PEjDmTYGvLf8mv5HFsuNNIJ3PYouSSZNlxnqbACe5uzBSVV5qcywvv5nt/gP/q
-fCi30jOg3RO3LQ9+1m+6UWSko5uDEEgJvpGAXWahPc5hmFIp6xJkR0ilq2FuZS5prdRmQb7bwn9q
-X4vfNhT0trXrQX5kUwm+SKGmIx0P1mY/yuzCzkHyGzc8ejkVEXQos2BcDeszUoicxKJD53uUk+Vc
-Qg/YXO7bV32qwG3QYgr2kSc49Zpr+OgC8kyr5eI70cmSSis2s8P/2A4mnc9T8ZJIOZzvPcaKVBR0
-3GXd7kwo9XDEvDEyL0PY0ZxmlHdl92AHfkxiK35/5P7Tbd06oyTjlMZLotXDFY/aVcMySdvCWZ4r
-tpabcOIlz6WZHSv3MmHQTXSnCXu8W6B9ahzESkq7XaTLeDHWJIrspDUz5EvOSW5elgaX8mKqBTTQ
-fbobH0nLzV215IkYfL9rx9HN+PG57PJX212+YdGpYybaPIF86yct32SEapaZp1dLnym8aImn2OXK
-+QswmSyZ3tWoFFCwX2cCGXawuZ60/LH/QbLkcP6IxZ7kPM/voP0cWosUKksQvFiN2QD2KDJ3aF2s
-ENl40lFEBvYMZQzno8hc1NgpBpf1OB4tb2P9/tjnUGJ6EWrI+XWCmw+O1wRDrgzsmQo2beqVP0PU
-14NeqqPLlvOKg/PuKR4ykRNkbB47EaKtQ+z5EqCrzEyZdN+jHhFluzSRcKficaF4wWNg2IDpGPQJ
-V8N5bj2Fz819S9PlzX1ww0lSMxt24CB15pmOxx0CPY97W57XW5CmlX8kX6fkm2jv2gzOtLKIiWtW
-WqfxSNmW7BpZy5qWqCCCHPW0kxgfls/nOUANo97zpEO6cBpLgpZvW6CVbT5/RcBfxEZdJUnojQZh
-K8vXJKx5jpWTCUR/D9GufVpl+XFRf6OTBm9y2/9QiitBjtdwJZHvHJosNELzvo8PNogJC/DMcX7l
-j0f1S/Sv2ZB/tswCwYOlNBxrHZf1OudFLLPDjPP/YBTs1s2cdGgjUoq9RFINvkfnpexFIkxGStGm
-nf7+SflBDFHLB+R/vZ/ATei0vb1tlQ0DvEZuDmii7UXCgk3dpmuSrkHv6C/flfx9J6EqsDh9TBFs
-CbLF0ZlYZMkP2UpLjlXvgoIhr7U6eyQ/mshfDuhgjkfZgzVkurPDJ6yvAc6n939sfXh55XjnqR7+
-BizK2iiqeeNlYiNbOyxZ/ENY6bju25Xq2rKBuqLaCqWWbXFfOR42DbzHQoyKaEYaFJk4x1xxPkyu
-rZ5dCMMo6gc3o5ZdkIugw/AzXg9PLxZFxWPZ1wq5RenoatSdABWPEZMokS2m37V58jfEKCfSmG1l
-yiyzduY7eHDMTTYLNJsf4aiH+2QRnRZa3huGirVLt1QCJBgKAKJ4SP3UN7DJUoldjD2humfG3MAE
-ZzBVjPmdPP1KE34msf3/8BVTC1mDMp/Glc40zN09r+JLUOVYyUcVJHX6XwHTd8E2p9XJJ0rTq/T+
-2jIqmB2C79dKOXwfw74nLDXd/tG4R8LEbgJWLn82qEvwYqXwCUzdEZcB7T9hq///8UuHAH0QXCp6
-XE3mk7wg1dOH33chqedaCryBO8JnA6dWwaOSKDwWxgagHfY8qtYUsQ4oMLL7N13LQH5fBq1SHI/O
-dlwRSoSlD4R8pZ6/Cg0Z6B4p5H0NpXjzUd7oZEpxZT473M1ZKGlJRMt2DlWYXtotWvTDjLvmaEfZ
-e9NhYBCzEJwmJax09qwZq5pnulTKGed3DsiNDFe6bwc5KmTVNcdtX/uxRu5kvEBeRbIamdCIbYyR
-4LERLXfMHoTVWuvIe4QBxmqUTR7LmM4o48PxNPHPIDCKGr3zklTFT6WkkxlpnfzwzzTr61aKPyqH
-81y+wdQiYHf+LLEGP0hKsCxceMd2KHcIL5aT/O+v9vBidOlxoQ2j9lHMQ12I3vXhDVzI9tC/35pK
-oCIfSlIeRod0taYq+MHIuidEANUkukdEWW+pZCL6THb4OZaShdEVro+xpoGT4vuUYfIsBCRuQhFv
-6AQL750aDosqyVEUGPHHYRe6aEwuoNZJjMv3X8xZCpmMEIZ6APngd5wi/Yl8EV/9QXqBXM7CkzXP
-3E2SfEurxw8x+6kLeA3vMAh1qFUAQoKxsm1h1l8S5dwxnjyx4eTButnJZFm6i/Mne7e1pVAOzpWK
-HVuvp8rqU6MRtStcl3c2V1nq14ho/ehzsW0AcrBmFMTVDatmVXOfQqWLtd4elJ2JQ2ry9VYPnpYk
-YLkKSyhUw6EvEKpkdRZ6Sv2SZ2AvwmuBMW++fTkWf4Fvd2MG5zHhVrGfULL3HZ3gCKWsEZDcXBKm
-c8k9TsQa/OrhbO37ysn3k7LoMWxzvu4vj48lbOnG9Ooo3RBVI6YbZKCzoiu56dcjgsuEiUbkHtfq
-u9wVFaVSabSOTbYO9zKAMRdPot7s2dy2P1FTAZjSbbIGq00OPfBLfMlzZB02CCcWefvWgY5sVwMm
-7mdOeVlILjNFFqDCk644d2V/dpv346fIhTktq58q/499kD6PMWtMwigWnXEgorxwcuDJX0ZBYF0E
-FaNXZA/5oSWvFR9lVI/9YMYkAzF/1NKAdXeIurBUiOhqHOcCp82SxWU73dEL9vO5N6sbQ1WuDje6
-GRubIIwgiZ/pftPigUNtq43lVsu83zaBXjdoDMwsPt4zaaOHszQc6d0Om4qGeGmHUpuVSstHC1T1
-BdKLFr2sGzAo79MqTEqRENRB3KfW3blCGder2Qlc9aEFSN72GJ0lKcYvcAYMtljaWp04f+r/BwfR
-IcCiTMlzPmWY7NNnS7FWMgI/SMaZHUucctYNAYcT6f+ov3QsIPxl+lco9rdFuHyaM12zposuHiNZ
-QPf+0EsEtbwQYq2l6mAbWv25gHmIAAOEJ/m3Ogb7FJnYXPgRu2GpcGZ6wOZsGMz2BUDjuTxh/xxc
-MZErZa9OFVHsUsj369Qh+2ZZnPpqnjHdQuDvjTwh1s+GocKfkUJ45s70ZhWUk3DT8+2NwkSQ7QT1
-SGjYBSO3CdGbnhvYzfbF+f1awdyh8PQjvBTQXtSRNYIB9nqCLe6yzG2FTHpgO9B68Z6Ly49siSgx
-C7132dKKOCq3tnR5fETX3PN+yhBNwXvE1wH6vX7T/xd8/iFl+CipPr6F3TBWlphYcdTdQo3JGkvT
-XYxF/lgorX7RGfz+h8kTj7IwMoJk086bspEjalznqcepKu2j6j3T5Au8By5zxFs5Xzc8rZMCTuwX
-o2rfaFE7SdLNa1IiNgtQYSmq1b12w5PhCjCEvK4DHnCFK5SyQ12HFlLUopDEjKSMwa0XbyLeZCr6
-UNo8fnzy5L8TvbGUa/Gg+mrep8XWxx11UZTTSNgSY22BjG3bXm3Wh2fkf+AHkNqBXspxa+HSgub3
-mY7lD5KKcj1prouDhd544PSGDW7EnEo7Yv6Mzo0PvgCIfbU0WbMUdBvZXAck1T04pk9xOJGghEbY
-f8QUFmMGSHLis1+n+4OIbxjbljSNgkz9ycTUQsDdN4HVocqct1dJMt963ROIRHy43/vbSnfgDKB1
-GRrll/MMYiJcUHJjalMQYh/JtN8QC2KwdUMUbXPTvRKo9xemPw1AsAXClgQL7YCcpCW+tiOqM2Td
-0zVBhxvp8080gWjgYs4oB24I6Glzxlj5jrpzK+dhXtH+hrwEpItXSEc9wHaJnZS9ngbp0zjPP/H8
-EHzmFn6DYC1rwVqeoNM88oO208Y4leyVYiJwkt36WD6HHf3CEDgw2kEMNZh65/MnIc/I7gwfhXl+
-Svdgf4SQrQFrNanP+enqc13rKArblzxW2oFkLsnNVGEthUHk8IOGcJCvQyedlIMiuoBhxTiqabxD
-MS1Mf6z9fVYj8NsoAQsiUGhRC2PchhTZaGDUlMSlLw8wx2CBRsX1QFLU/YguUQ92z7s3v8s3r7Z2
-xM5ETWf4rtSmsFQ/vYAEEA/tobaKrdDfZPUMV+GJeQctiO2OcET9n+L0A3DDvsLYlcsiEcgkqweT
-QAznY9jbjJJlKKrGWl2whI7vrygtosJ4UXkf0IoLARz6OptWjbmU02pQCZ8NNfRLRbKHVz8M8k/7
-vGO42ZTiBD7JzSksjSKd0U3TjIaRkafJpn2YktWmzEyWpP3b1R4S+GdOq7q80TnDXbcjMdAMLn7j
-GUpXZ9w/+PQKjA1fhIK1wBhQt59onxBMO7xhrsMFw1byX5uDRx6v8OEmehZKotIvNtUiq7+yD8rB
-4TowCVOuyM++S9I2i61cv4yewZ4SbjA+43n7DNfiO2KRPJ18GI0n1HzhvlMTO1vhjnMG1Yj3px7R
-xiMUKjAm5xJEhEXgk3zRGBq4cMb8WLBuDY5HGT6QGMTBFfL82SC3GxU0CfOwr+c1E8gGi2nDMUul
-WM51mYnkJA/bxbLbcmq388VdLgbv0mxZfD8gRI/uQrsoin0q1geiBpQ3aP0UTmTJjqBa+NWBNOZL
-XxmZhjhymEQosZc9CRDpCq8PSDAO9Ci5MQYps4NuxMKgXWjRVwAGDMsW43zn+T+w0iU9WPfz/m/j
-PoNMQWYLkFFtA+25QTlWez5RFSdjQ6dB2dw729ag68rqztY0T2+Gj/YuuEUGn0giece4HfeOrEXe
-WHavLHhSgnzAxTaS7Ch9M5XRSgSpA8iBA2Sh1+NyUPBa4VKkqQ5co3SjovUhT/2UM5eeP1/DUIWS
-0z1sM9uWECW10Wmc3dDcJQvF6eGNqHwoF3JlUSLlIQdH0+Vp30fV62iQW3sexJ6NcS3b/U0dpviv
-G3hhocFlxFeya48iRmrR1tUEJ+upRo6UCObMBodHYVQKvu1YwEqPggA8nmmDSzxBa0eobXTLBQev
-/pSip0OCoLRiOI0jLN9Yji5iKLJBeGaPO7LNIU1Wtjpo/QE2+B33ZMKaf4ikbK4fMkXgY/wMlf1J
-QbpbYzFVTIYl7IUvDf8DSMtlaxZ5NfN8H/YsJY+tyHUkummhyCkouxW2t157L/ME3fWGAE2gYAUq
-QVDDjzxaqhF/nJvdcCLYvQ3cbarvfLeJEgW+K6GPTlMpEMumrU0/y3r3lUOdUsiEGnmFzqjEt7IO
-k6ii+of5bWS1813ItfXwJW6R0dSmx/sIpWjWOEdUy8vW+dXgafHFyZAbQ0IEww3feZmOWFsM3K1X
-zlkjsxVYo0d3fxCUVfsQvnm8M2oKYRqSwFbbWl0veyw+m3coaLyuhqGChcL4EHoRKMLp5Y9MSMkr
-PmF5cmrFljG0mSIJOtcUuBqGFFCxDRmMNps3vXxcAYeKLY3nVp9xdaFopG0wX/pK9D7z1EDCl4LY
-xRhJ52Gym3vO28xzxUigunfCKHQN4VPe5s2zedhj2V4GZnEmWNnDxBhnWJ8Gz62vMEqB6nMR+exs
-SyxoFM6NuYHzOPkxGWarRKmqqhp19Xb4WsDjGVY/pQXK0mIY0s5OI+ezdL6KwAv681taIx6jEzmi
-j+g5P6sH1Lx1CllhJn5EK58KBqia8HwD8quEWp3JxNUViUPhwEQ6VkvBdq/dEKnMjKtE75GfCbMJ
-ZZEaCBsQJYNLr0LX1NSCbiQi89K9ecvQXk9ah5M0Zk+kIGyztU6ZVEIgOmCjOfSNuaiqNt2s400P
-//JOrX+uYP1RQQBNtDVlcM5jMY2gc9RZjArtX79u8ObRoCsDEO3wrRyeGY0VqsgfyNPJvY3u0z9r
-HZeAeHa3eIImwQ1Jz/GT22LwXECiZwYKLNlxjvA9WbdGGiV4YVB29nwtbdIUuR1sLXtfQIJaDZA7
-t8a8roqI6VbC/Wl5pkRBouuLqR8Y4LvXehvcqnvQYJi3hZS/LDDYMHwwgzpCjs5+sdYTPKudaYCA
-ObwE3x3zhD9uFkvprbVGoUV0m5baOTBfE+KcKM1ikhm+9REGOwd2RW0FAZneM4pHCgRUvI23kSRY
-0bv7dT/PnOScfNv7EeaOuNKDF0bEvWtRwgp11H/qUW0P7Lpsm1ojDSEyEIvzJZ0LVWoLwy9gU7pX
-CfoXJjt7ktkJKsMjHHt0QSMWCbbMwvSA3EdHkEx2UwUip7aom6qpTfjzeSS4yAEL1uWR2KbkjM1R
-q0+gRqtCgidfTl5j6tCdUK8lrfwVxCGDRW2HrRwbIhJyWea+0rw1K5WbnB/rb9mjiv3FFUlrZr+O
-Lr6qlkeF21DWEl+3uw0GoOpRGeC87sRoxiCY0pTEc8Qm1hLBvK5tCoUpNRa0fP040mWUDmnkyAgb
-eh6/x+graGs1LkQfOjDQEgekQgHqkzI0gazorAR9Obvx/vvaRr8QCgV8GO2kdje89EZ1WECTMfY6
-Aj0234ZDlRXLBkGRh5QaJO8GXy365DhP8wdknjMqwe3crtYAGgvPB8kC2QypTii/9c4sZIXb98qR
-vxOmgP4nuu9py9RpfNSi5P7fpKs5dwfs6AMcHG8BeXmrKI7WYWFi29k4vURFfG4SE9MiFZp3t2zM
-Y0txJexmI5eIiqwqWDmpPM/dM8D7xULKAVNPHsqjsJvvD3TkPH6ctsm085luEKBBOuoCB0rNPC1X
-vmmpphpeRug1y/E/G+gDbYY345fP4avlj+oh20f/7st041GGAWXOzv67TmDFbBUxY/VsPxcERX6b
-aX6EurVWPYIeeF7iF6rF1n5+K3nn0u/YokmoBp78FAL1zEmYXBiPK9tK5/WLssXxMpFPYjTHi4yY
-rADQGcy+wiThESXGZkfMgxk+bzuKJIfBO6BR24y+q6Rl2HKyXC2YIRsgpNwD8vYNp/di56a91Xhn
-I55idWgpFdutF2m60+Fd3+UmOUE1lTdmZ0RCXFpEnneXt1/zHtgdMGFGJaKMMhfYYqRMIc0QstIM
-mds6DvN+6b5A5cQZ9qkeFIREciPwzIks3AgKgjSMkIPjcH1M0Ai7M+pOHUk3FtJnTfm5EPdP/Cs6
-C461RmrLEnSOWJcDg0rgDTzgaWD5be6b7CDq/uF64Dl3ARCgpzrDfpHguvgkTWQy3y95kwzusnqk
-njULlmVi0x7cuwayMU2S4XfnR7p37wSudXj5C62hK+UnX/uGSL8gsOszTLoFrFiYXe+ppczQH9Dg
-h78K2ChAX8NZ2PYk1+FtA6V16h95T/Xj9rfR+QbuSaDQ4djxZClehcTY9W81BETdDFK+MkNhyx7i
-I5y59fKpXlqHApu07sY3oPoAlBS6ooLJJOv1MkhQ1JH732dv5BmfcXfPEsWohyh32XCFywtBe+HQ
-N3cNO8M1PD+7EVvQGHxAK+aW1qGRelK+Xsi7eCO2DZQ1JwiqRWXl5dqD0XpHLUnRm0ulDEVHnoWc
-yxeEXas3xGkOdirL2d+N3Lqd8qiJ475Tbweo8sBCKz5e/M79BG/XMtk8B6lAkWdUxxkw8l7lpZHS
-eNoBo+n5eUTt2ulg5439dU7Hh/vS4UNdPD62mr48CMe4T83P27yasLF6jL06Jvzu23TbhklFNE54
-Id5dqHPbszz/GpTVAmU2l2/FH7oK+h6a2/1cSm8a5Fos0JJQILRbrqhU0O2Vf4Fq3LeJOhtpvpgL
-ErPe6musSV3K8XJIucpeWf1OvZGTuG2yq6NVggl4uSyulkgHWydl8Y8plr9cYU9PZvxDkze4EWRv
-t2usvx0kRsNcVkyyUwSx8pbKbg22yHkXaVaRzUX7uCXLTgBac/zFtra5tkWZhKc4WDtlbHG4TgVf
-aW05PvsVaxFiVZ/cYi9M/OJAFYUoTmybCIbnVPh9/R1/hDBoMe6iu1Zx+A2s/SULfRF5KZcuvi4x
-oUiEP9SN1fE3nXprKkHSzkBZJTJ7BMsjFToZinp5tSgJw2F3MTTuabiw28uP5qWokGOLGEbsxMfi
-2CBcO/6Yeu5Dm25xESL0jKpEo2IK+IJNLQxQ6+CGzkq4PbE1z16P+iGmO25p0eYrxab9IU6GLneA
-wDJICSin9xb4YzYxiKTR16p4Tq5WRBfWy2VUcizIPHgN95fYu9qTwVKBCowsxPw7ynFu2Gvb6IxU
-+pZkKtrNlw4aoNbrSfFBxVQXHYd2sJFTUphA6K07E6bETN4PjcWqY3Fpxe4Q/bqDP5ZP9AAL8dVS
-v37zH10CFyhIF4QAQJgAbppeqNWmtxT2nlJRW0HTLWH7+GwpoMM4IuJl/hEBiOvlSbHw00HKHeUN
-MsD4sYwfxtf18DPXngc+RXji/I0fJTPyUfnjUAJ7N4mR6uJ6LoGJLWnLYV9i/qmMO5i2qjIwq9d9
-P/a2g2ixvxTYyWz9V4PQG8qmnTBhasE/ZonJegd5qhFL+mmkmaQ4e6N6irXpYu8jfcyXkXB2Zv80
-OE/KuFWTgMXN0IV7BYrc1cD1YzccQw1S3Ol9fSpA33CGE/COhlAn9tZCYRJic+olYcDcOlvsez7H
-z9ya+8QmeiN4X09TBb/EDqos61ROMylno5RS7wfXpqlPLJseTEiCVQMOvxXI6/lzU11NtCxudIrV
-TVxVM2RMsrjaPpRCdoMJdIlIM4k4UWMyKamwzvjI7hrwXww6WswRQNwxYh+j3IQvRBe1Sgbi9KnP
-7fxvE2lM5C5p9YBMGqgcq990NbQFKzuCzGYTEZMuI4M3CWJWv9/PUvTJg+ZquQ7q30kwXiz8AdM9
-w3Dkj5J9RUH++D2yNeki8BysXyl0lnpm3urzK7TmqvOYiW/FxjXpnK4MS38M1Lz18uXQZMMoOy9w
-1F7Mz5NjNocU/sA+EQzc7NBxbsp5MYzh/PuA6mLIwWU8DOQ/K9S3+1S40gs2Bcib9updnPG3/X+T
-o2A7QkpQ/7QEOeiutL5RpNAhVtK1LNnFkHkRjO/3KNvcbLxfBAacMeqj8Da2iz3hNw6n5HeTnSoN
-Zo5Xi31q4dxaQ+gqzGtGNss6ixiNivzidvCbU6TcjHg/VgCi+5hZozdwLETWqJYLhu6dwEQQja3E
-AtUAKlrFva5zvt2ZUFb6glWjwswJyAHFSJt7eT39buiMzPEEmNH5ShiMWwVt9jmK80Lyig2ZksNY
-rv0Bm2BFWbtJ5yUzbiMUFnWOvrpcD/fpt/w7fFlw6fE72RE/lZc95SjhiYyuq93XjAAPW9+q86tX
-RbOh9VrxpAq2nvL78mT3AIAlN8Jy5XgDipZWSTegkQuC9vJNmojOFejrnohnk+iRe73qQRN0diYb
-Pm+DvDUjHKJeAG44DSVe5IBc9ra34G9G09sPBL3pz/GvBIjDj7ImDLCbK83UK3FdVXISUe/0bdL3
-4btN1kfrEn3nWi3VfI74EEViCgFaw5p1mOVQjx1SWqglMOoVIHGJziVEIxGsaK4QjiBDmU6iIhNq
-UdbuG/sVAjeEzIIUQ7b2uNG6+jUNmdbzDkpKN+x82l0nrbiXrP55h8MP7iob7yQZPXPznj1jTIIK
-alSlYMQxZXGVmDyPAxhRxnevqKyzJ4YcLIHXZkLyFdUjgM0NAWc3gHsTtAznI8sAdh3xlHchos0M
-tonBJU1B45LaU2xbN2H9qK10jyK+GyQgVFn2Hc67fezD15Q+5JB4UfiJvA3SfG020rCBphaR36pS
-qyDvPhtQ2vjaMd2eqxReAXH9YOKyb966Pr8zolxpOfAqV6F7lvbd/Us5eVBQGa48IG9v2k036ZNR
-B90a8JIiLymydbeq2hLKBQA9Fuk6CGdc21FhOO+h/0FaYhfm729LiIz/SUa96E0oChAQyYI7/iUn
-I0LYPXMWBmpHQ5lNQud24u9HwP/oC5s/EfRmZZKllqk+Pr7Hf61KGIv+vIiPX1FQHcvt5yaJQKSo
-lBIwVaUjYv2MdMWXTnk4iSKNMvmd3He9/KqP5do3Q6d9a6yYxdqO1oH/f8fLO3Djii28uuMbuXog
-eNPpVcDSv231kabZ7BQ2svfbJRc8A5ZTZlXe0uScQZtOPjt9yVVZlaCMkrYx/zJn3VRbnEUEgmy3
-1amM6/iKWnc7MdZOWiVrH7/QJvM863gGYy2SKgeSafZqKaUxpvBLHX82EDUjLNW9w7SZQSPl+9Dt
-PwlKoi+h/cedzaGnM353IXJZJSJUHRoo5Q/DxFBXvvNOPm0yP/buls4PrnR/PbaJHece/QSFTpb2
-wKrAo0HwrQvOec24zuk74clOF+WU0cqsjug8vJlqMduFOR7Cm9wlzaqocYyMxlgf2YuX7zjhh2HT
-36ZjsaHQCsA1E080jMxlPnSUILGiS7K01SOxn6fVVZZxfxfGnvP/lzoidqTxraB4E0oWhAjtzr2S
-xM1pzGc8ZaYV8+qjgxJzjiG/z0S2rgHAP7ULmgCR/VJDlLNl7Sc5jguKSuahl80CxWtev/e20LaA
-fU73zv9qs3NN72I5MtCN5WrNNsLSSS1IDliASCtLmvUk53GUP/+Hm+xEbQiv2DbbSPAH1E9liRZs
-6ddGysVmPZ1Wm+7wz0KvCjL8AivOgKziKsfsBFKvsI4pB1ibHs7Gy6KKpSh1jD1TZU1Do85o40oH
-RzVz77sj/w3EiCtq4k6TeCjlsE0ARgF0HN/IqDLUl84+6ZcgxI8Qhro5F6oFYwvcUt6hZlQXTB22
-igM5K2UzbBwA+RFPuz3e3tEWh0+4XYKVezP7u8GnZnaAOTm5QuLpAv8jvpYs/45T6/hDKmeVbxNj
-rnG6gz/7hA3hNyZl/9tG180+orroSi/yLV6k4WlSYbJPs3RvlQml96CsykTrWiPneltDiOi61O1d
-pPss1Rb91kQLrKPYDd1Va/j7tatu0MbpEJyPC+xAXSyAsWGWoiMzaAK/AJDLpTVmQMEUZqYexYVD
-ba/SaRZ9j/mRpNslUMrxRMUmd8pveGJsYbjumU9Nv8shiUNiZZssSN9YCUc1WtEN1qVYE4dmaeJ/
-e0/uuVGmRkXrKct8UnD+LbpCQhfJllAFh3usciodeox7gJIrvixCoq7dVOWliefQznk0az2vOO0f
-gI7pSOZsNVKfNVP2lZHZatVZT5wjNekmodgTBampm/4fBtaVFE3fZlpwPsTr0PxZr3q0T73Iv+BY
-0Voz8ead8wbCz11ycGqS+ZvMS8fZqmisJfurMFysXBgwQnekaDI3YuYS33IPnsJtwF/O3B3WYRpv
-9Z3I8fxuzhiQ5u2uRhO6lWkeOTIMi1Okdw6KW/1HdRDEwX5p0gVdGITLPpdHD02hV3gyjXIc5fVO
-po9znLPDrs1umDL9oIAmIn3XXmlqH7VQoTULc6gwoxiJhBJTkhDEjY62mW9A9gjEWJHoROOJ1cuY
-UuGgEPphJ5Vg3S3t4yjoZ3x9Gyv+nxS2CtyaDRZQ7SDPnhFST0TIv3CkZrO/39A5785gqJ+qc2xx
-LmpYW3r8gWi6hZMUuSGpjWX689hqK58csWE5QSIZ/TTudFHT/GyuzjG5AYs6pX0PJT+pJ6jJbnW3
-dDxbfNXRaBnUy5fyMbpCytsLPU/0ddaRhBtT81BYqi/gUOth2U3UozYSQuSDJR82Ob6rd3vyRni4
-1s/zbw5WEupQBFm/IkREZPLrk6d0WKvuauQRnZtcDriU085jkuFw6ifjidQAtyFPh8GCWKTq2Y0w
-C+ENpCJfoh1MRNCZJ8uP62rcA/ogqCUIPjsL54WsZ4/f0MC1zjYH5EqcTwzt8U1hTjLj5vS43pfg
-VVtVOi7jF0r8Sn1EYh1iqXJBRuvYZWrseMMuURBq/qoyrRHJR4+3IQVIRDZaIzDoAkdTyh8ZxbOl
-9iI2E58Xmp7M1IlqiCKw1AZe+l12k/F1fI/XEXxhFBOK4mXRlELNaYtwJ1bxyfnaxjL7WR14rMh7
-pA+gcL6sJY5YD3CUf5ZsA919x8KbU9rWlu85EtnK48/W6KyvUxNuCx5u2RsHxNA9xu91Uwvix0Lv
-IbPLcK//SCeRDDk9KvPMgR18CVO1pAM4jYQ1ZNn05xHAtpCozfOqGWvHloB+lRGfD2rb9Dy4y+Vs
-eduzsVxleOCbRqWLRCk+7ZPYpmg6XWZwtwYbluuSk3c5i10SqXnsCgCzaLMmsQ9wwzEFoA5K7A+k
-UUxYH/of7xgcGiGjJUL+XE8Td1zTxTGYYJFx5LPQQdhi7aOlIQvvZyRpAK1C3ktepQQbp+fyv2aR
-Lf9r5qIUs9++yvgyHqQSuAIajk73JXovxHDgXXBGp1lrV/x9YFNjKsiouTx3C/L+cQjJ68a3+Ge1
-t/mlvpspZ3yjDoFBwVN6O6zHnicbeNg7GWRRBKcJqIkhIRj15fDs0saeUksyUcNFNKATUIdV0FkV
-fTJVVz+EyyoyeqiYX33ibfWgkwJPg66CjoZAnKBHRhR19S4yalQgqGKC5Q/mCB0SUqk0sznGxyZ/
-GFhVZyIdy71CDhCS3nDC2VqwUIPMNlk81TyANCXPax+DQNz3zGJX+n02rd/Ys2lRaf4VenqR49UG
-V4NzzRn5QH7hp3boYfPUIPkHdecWYszwfXZchLQ3Ijpd26QAwbazSYbLLM0toytgO15kKF0ILncl
-QBhvNDqwhmpVBziDtYCQrNdoezePO0HjfN/dC3Qp4kYZesc4tbqnFyI07cx7WiF+7ENanVhFL0Bx
-9VeSlvH1c5wFyFXTHQojApuqvlU1kjWWiOtMPwW+7d4XJexbEB+w8jMRv3LGtYsmusjwJ/OylpER
-+K3lOQeQQ+chcB4byYEw4Bla7csSCnjAJMHCrud9zrFvI52yKdvoUXB86Gq6uh0b3FDOyeIyvRFt
-Uf1XF/aOZuIq+Kmw3B35eDvWcmJ2J2eegOvzD2Npck8Rc1mftfr/Upqv5g+Naqei8Sw+h+6YEicP
-/0AWz1F8z/yykYJRw6v1mdTvn9BTbILowxArc0sn0KeC1Nd8PGHbu8Hr/rUr6UwFGQeUmQ/+qlQ7
-U2utctfIspQ2whZgtI61CNr85mpDgcI75bF5bUOyXQErjDWT3ZytDHVSqiBgqyTFMtLX5h3LaWX1
-S74K4xIleXL4wnuTEyvKmUSfc8pGOGTlEhszFW7FnjQMEorv6bulX41wrrP5rVaE9lxxcJGRhgc8
-dSMRBvnXu1LP9yKEI/kj7ZYPX1knYTB8mGUidZqg+5c7pq29oqg8YRwBnDSgGsx2gr7xsoO788XR
-+ihXZhvJGYH5s9BYg/ITQEhAB4Nzu2UGYs+U5qNra4ADv2Mu8Vsvbvh4Wsl+5K/xAziFL4NpsFoe
-Umc8toYcpiFww/aj+aWUW44M+OxoO72fAtaLNA10qmWpDRepi6b+fRjZKnVfOSzlr3KeZaqfnyHa
-1DbYz/kZqoSVyoRzExVRk/ZgQJKm1vXUEZxmDWnROiVNikI7Jnk4e7uuIAESn0XwdQOem0YMgyeR
-diY6t2Sofrw7mGVJ0Snv953iLwrWZGrOL1iuxPVKcSWzKlL6/LL9xV6XqMJQFYvC0EoSU8lNQ2WB
-Hq6TyZy1VBrnkFnYQ51107Ov2FdUx864tJ7qc8/kA4PZbIbE/W/hHxOex38w08dwYkP19SH/DwIp
-uovfx2gDBuAPGEnIU/Pg7BQoxfhp0F4xxBOd4KZbeyr5LggsY6HroBe+x8FJQlC2PqV0SwCD3DAH
-nDrw6kQc/GrswM0m0polaBgDq7sj/NW6GI256AS/50Nyqnjl3giwNjxbigBBrbMNZoEbQayM0z/T
-4BTKS2EDNw4c2NzuAoIttiZbRx90WyIxuVkP358fQtkvIVOBCOB/fHgLzsdvh/yU13Wf331feFBD
-Fo+QUsoqIHzT37IpEkZpe2d13HU8HeDyKg8pHvwowBiXc3+WnA/eA3bxgs9zeF0FJ+cGAkIEEqXi
-eod7MoQSNbYAdQ5KzR7ensps4XzqUW7gE0CjNPIg85k2exd3nEBucoYq2OYM8GlZexW8foigxtRt
-Fm3gPiOGG/7swVhXg87pF10FRxej8UOuf7B5uwb88eKfwtjP5broaomsrAq/OY/dM6RUrhda0Ons
-4/qnpvhetgCd6hhbOn5EsjxG9K6FATn8LkAevJ2asajg/k5yUQFHVWXupgoO88SApsLpEb5nxuxK
-RZ4aswBSWuG96LDxUuqJyWzeIvEdvr5PytIyLZMtDz6aWdS7LjI7/emYJ3J65ULcH6pzD90fLgMB
-sOTTEVAdosZoMcnQDWWEX57NF/9WctnWmZfoiypXx0AzV9ohXkiK1Y+WyyQZ9UjevhzKHbUoxCog
-loMwViWddsOy1OgHr8SUYCKggktFOHeKToKMiLpQDzp1XqMUPHIlRbiddoIzC6vu3GvIl0u/5U+z
-7VIu65G+oilva9+Xa4XhC2I7q6svjv+niQLrr7f0fiffQFZfYIgV6FeMScjaVEtidRH6tPcpgu23
-ao+9dV1e0g2Lb6Qivrwvxx1N4PrbV1HWS/goEkUDAI++iTibfRYdER70YD74mLWoZuGFcBpgc+z4
-ovb/tRvFTVF8mFqyDJ2ZhXEhT6df+S5IDr/Fn9rszgGMkzZuBB/Z9ZGLTecyylyvTEFT3yWp/xCE
-9RFtd3EzTM692Vky00A8xf9tZZPr3QAOHDLiMZQtS8YhkGq/OoIWMChbjuPZEVHbUYeG+FsiBmif
-H/caLt3xRvwmP3pgiW/JRMlf5IunMtW+ZvAWSz2jBGz5E2YZtLDylCdhyXY4IvORtFD9VpNkkMOA
-4GK32Y7G2HqStQ+SgUnEpT3Uo2PezPbA57/LjclQhMIqj+N+jdjAripCUX6EzFbfYVHnAE01YL3l
-ZRusQXWsRAM9frWUbl4tK35ge4LNA0l9NuEc3ZTW05znJFQ8L9ypEgqHhSqKSRtI41+6YrQUEHx0
-DHyeMjii12c0xOI9nbT7mVA4TDhUHsF2Gt8as+BDeoxs9yAsp5qlEpKwWMv2k2FM4TwvWsvU3QqH
-S1avdXYz6Tbq6FecCeY7J5ibIbD6ANkCAnl3OQcHkCKPApCcRO7cVkXbB7H51b/G46ZP7LgEaGDu
-kBLto/EHtERZ3RGYqNtAFNsOl7sbUNaYttNQmm1AEJ3FkLI6jaQVXDN6Arr+Y28IWJMT018Bxvac
-Mgo0jfMNto0mbuT0o/LCVFsltfZp0klcNFtjZsTlemQhhb5wJCPizjHkBv+YVi9py4osYOgI9tWk
-xhwXwHWAG67/keIHDoB9EjDnR/Krt+p8v1lhph+ypVVkfIBYsM76E6Cpl7KxtnsXCttNvyq50uS5
-s3w0Pf+wQ/myUau0SvkP+RevbE0EwGSDWUmtq1Af8olE4FqrukbQqAoOZ/RFWk56yjbUbm588JJh
-2iAxWHjMk3oihKuH5amqMeDBLBbM6rKv62g0LdzQ6TKFEM0hw8IxU6soNmOw7pVuzgDbgioGpu8E
-7jwPTUfAy4UqIH9OMxaghchshuI+xBwqK4UBQd/bK/7oSbW8FrmM5l4B1tLCQY6kH7C0116h5spr
-LXBjDyjpAKFbs3FwbSgOoMxL+kF1l2rTf0ZWpZ4NzS9MRHGwaMvg2GNsWnMzE/o7jqp3JsnH60Hw
-yOY5Idsyn+BxgK0T0UvXOdoPMGxSvhY1+jOF5EltIOnrW+U0OSVkpuyNR6pXVTS/Mqb5wstQMWaw
-unG1ust5cAZYkSfEOZiLFCcpJ0AfLVMMSTZfJ8TAh9KILAApYS3FurtbYJ3Tdtvo6vY+OomplqzS
-JS11Y9Nrj7NRXva3K1S6O9dAtrkViqztOZZFvffda6YbbjXPPOgnEEc3n5vT0tSpXkOHMdRkyd3J
-WKFpyWy0CNNpH04Nf1AZmlZsjJ1vCvHp8kdzSVF/2zmqGCWdc6YYbUPD8nWxxq3+BaxkYvHd3lTe
-qpQRf7BjpNqLaMOCgURt2R/cMm+dz0FTgE0LhJXkILxiu3LuTqoR9p869gCWUjvjh1x1p0r5eETz
-cdsvUNvEM3XtdPn1RMa9xLg8Ic2gmA3G9YbTv5mCRJvKNpi5tbcZTaudm5zXm0SrLYs3E72jZwTW
-6vI6F+53t1oeEvYLWt5YitneOXuJMihXyCvj8zanb+LJB2lJCWUi7VV5TT8q9pks0ll2gbZXA00N
-toHv71iU5cIUJTXlr7SobExTkMRRaX7Al9N+6vB0L1joT07bDbA47WcNpq/luLkKXQBX1kMbL6PG
-0I0NldPatjdt49AaC3XlsGp6qc+jVQ8uNLkqj8DRl/6v0ISCG/2K3qlfNzDzAzfcU2hOOn+5capt
-0J8gNtn9B2oitmVgaYOfX7YIzzDRgoziEFOI8sarBfgzvPC4/XDPpazouSNSIVFKgiZD7NbXZI6p
-AWBmLgjhDn4ykRmPsokjiVTz+CfRe5Y5IEBLkIxObYpiuWj7v9T37yo74hpKFSLulTQDl3HbDRJ8
-zE7QwEQsOkhnHJC6js2J6B68gnCWiYd+OKwbe214KUN93SIpCe2fK3JVUdUy76SzUm5SSfAxht3p
-G+sdcgqvOiAt5U61pJq7MbCq8XbGTBIj7uUjLxcvoWuBc4HgyK9iCgl6cOs1FZYI6/qkXuf7GlMN
-1Iy6QapC/kYw8iYaVAv5iSdgBvJuIc6m/31mEpAORiwiwbOzMCRWnXXAYIr3VqMKX9sLUqxd1TUQ
-1Sgm7jhW4LtTIjVak03kIuNOKvLFhok153IEczT9FAprmDOvb4XSpOih/PW6hi2zk5X9dwpPbwli
-2Z3Uozj7z5755Sd7RvCA6n7VKGPMB+VF9Dgn3UGFqDfuUA7k1x+mx2/FvgBQQG2lYz60ce3+x/W2
-mCvNMDlMyz2NrrpQECtMHXdPseV6zPZ0IGTKs/ZjtsnIzgmutJBZK2HtZUN5cCHgg2mHBMgbwDBD
-NDV/bbNcxC+0WCAMnP6IOD4q9ejGwmn2ndiA6ol++djYwQ9g8qcOMsY6u0GbLM/19YICN26jWhOl
-D/vuk6V3Nqg0hQiraYlVQhbUrZIJQvAxIp/eUTE/s3LPWp+rnv8CB3idziOCRAjSwNzj5/eNTp5N
-dycz6L8ysgwzxIw0PWRQJozvCMeo1Kv6Foio5tBIrQf+HtoUVtE/3bBeKcQgiqUr6VbSKgVnzZ1j
-TaWMxLzWSZhGTRFwCXE9VzAwodxQOlF7NUAEez9Oj+SEoUsrLJpwdZcllJnC80xq3/4snEgH9I/3
-agQICGBeKyEaJb5pumnWUZEH7WQExOgbnUNgIHTn5I/OY4+GxQsPfD+Fp0MFy8MoB2SzIQGESWOS
-Kcp+Fb9MSpb3fWyTlGdHf2BRG2ymNFlTt3hVjt7u10Px+m0DCdqR1PpUpslmOS0SWy8ND7Lt3cQk
-0IeKq5POAfy06p498NRQCSC2I0+3uMIU3WgcoZxFwLVJXssIZcAez9Dkr2i9HQrHpi0rwjkxpTBY
-9ScIrBPDb5J4vOZ13QG56d71U5XlH1gNrvt+P1x49bOpx1IlfYZHhlqJerBJC+tjW6K1y0wGP+vs
-3GNQpw96OFLi1O5C+jwk/ibAa+m8Q4dpHBMm0/8prNtcqc3yXH/bPPLyBuYmUAi0URO1j+xfQbZl
-7L0FrusFSTGHhy3MmSeDyyoQ8CkYgBimK4eNslEaMgIKG70R/1q20eOQ8EWBk+ulrZdskpLNBiIy
-IlA27V/5U9qdehtF/PtZtPmZs7SQM7lbAL+d538ONQT1MlhwzxjMj7VcLf4A8Is1vxshqGux4B0v
-7Uf1dskFlnDA95XyHLcLcU2dTGLy0y0rOP8GhfOyZm/YNtKCNBgppZsQZ29xKH6bjnHn+As+bLAq
-UQU+bRgAGtnJHsq17oXNKdlIijJaQEnvRXS4GsKxVtFkSgculAcLMDeeIx7Ilpz9VqwQXrEYwJV0
-1vAE8J7GCeCsQ+Cav32I4V02I+2G7MiA8eLRqV2Mx33tC5TGA9ue+R1IhBVe/8KKofc1sTtrFxo6
-kEoQcybo+jgh2uVYsqtfuOG9NA+mFidbTN3zIfmLarxhGyXEPr/7G4BB9ZqqRN+Zq6kuzjmLvpm/
-yuXXXSNQvRdpABjRtKsHCJ0kjn3ch4tmDFj+70rzPTvMIj+kTGxkwzdU+bMKJOpmGiAX3pHaXZu+
-EZbOPzhlNU8rVlvR0XMpSz73W4WhdS+o00dUt8k0fdkOGe31oDSdfqedr6Q8bBX4fHZKO9HYYBKS
-VNaEE8oJOH2o3qsQgmR/vZm04HOQ9Et4BBcL2TJr+HmpUIONg8s6VqjL/z7Tg93piFSWCcGO27gj
-v6ZX1KShjYBxHYB8Kc9074lnsOPONbrPbmg1DnUKHP3T9HtiKhq8hszoN6A00uGiY1pfCPkP66Ul
-zFjW4f2n+kapUQHaiBaGkVImoTQyhfK2qNyTPsTyKmO1NjsSvZxHjWxGKuopLOzgwLn8ZedmHfjp
-bBVxz/PIMCkbpsd3AWylXPCKv+1yMqI7YBVa8ObFE1d+JLALY64ZMddyevtySHgPvCHiJlliT/WE
-sS2IW5bPRfQPUFC1gp+82jeTkP1Lw9ZXthuxPW8kROo2UxGv2Qtnnj9sGgR0ZNCtoSbyQHMx1z5s
-ezQGHxW/NEujqEjRqu2Qm9Cs9NR88AMwikJy4ehM3Q4e8GrL7jjfEZGyqQ7bodkf8c7yf3NLXzxJ
-3FZq/EnuxJc8NaDF96lGqZH6ibNPqbk2KNjLAezCgOmExMdpp4SaaQ8nsk/yIWTkWY2euXAP4AFi
-1OjzcxifkCe13inVRh7U1aqTYRkDdEgbMeUokvog+I+eEn9LDfBtuv6x9LGczFyiWuWhcu8JcDOT
-Su0K3fBsF1WCzokG3/4+++0wuXLA4YG6c4MzpYhjvZCTpWV9mSrWuMBd5WowVl20yzLWhIH523ny
-g3XS/KGFdKruGNNLkt6cSJoHzI6a7BwfqmaZW7IfG/9LQ27qJlr/MZlv9ah6HwWaUq3s5zLApHYg
-g1exYDBwpNEYjO05bFY9+LVRj44n2HJYwNx6EWYhaS8CD4LXJRXrpJPX+alU58bQ9+5y76eLHh7j
-lA4BJQyoV4E8E9MW5fNVKInwXUFbENpVE3xDWK+25Srrk0xq752RNkmI7NFfP5yfIrzbFBQmPrEa
-ITlJ2e+NlAfMOyZ/5eBwTjmzEFFKzLfCgOgOxZkgziOgbTftbKxY4R0Rv9gB2BrqbkT94cpC0k78
-0WWAtIcIGF64Ik7W2KORnt0LeMpKhTJnm6CMnC1YzRLUGtyNnP1WifCGTUiGr4mmgn7Lh16/Kajc
-9uOZ2Uye7tN4RyKGvR8GRcsUNolNIGlf06OvUKM3pW8/2dbDz9/aVE24Ia2Rxe1WOslp9xk9+hX6
-WsgWb32OJCZEa7s1gCRTi0Yt1x7G4cjswhkOLLm17uqOuKGjznitM0fbd6Z64dzJnnkJ7xZlatYH
-di0tv6Lv4DlH+eJLbiODhc+5RCN2scxsTnagTd6rxhGY88JYNBeS2qHZOm4h7R6+nhPytK3ydJ+T
-x/GBDwLZ3kxeLYqtaOvoFmaisYVGvrCpPOXdtedOc6KXKzDhCik4RrU1KUnT3cWS46kmVxe6IR9V
-8OZt5Y3LnA7earHho8rOcZw0QjQyox57bodEKFDg7YWm4LybAyVqFHhzjbXuBdkg4B1w81MYpx0n
-PEYEqLy29oCvhp773hsXFzzcdayM7f7aKP5MDOWYqoBfvg/MXhP7+L8RTLhOrsxHW4EwVtLqPW+8
-OI5XSXAY6xvm92yiOWMBVuoPB4uzFEgZJbMQUm8Qdv1WN73P9iW64OXtU23PJn8EsIefFYJhY5BU
-d9T/n+iFZNWgyE8WZ1r5v5gXIo59hBBZ3svwVyzXGFRNrUX9AWiMK+Qb59YMZOTvQz1JZguFtZ/b
-USkcrA2mW8q2FKgrCkjvKcexIc/C7xNuT+MUntxl+uCeoFPUUO/wv675km/8i946aKnQpFO2tzzl
-lCe1xea7bSguDgxgyD9yHydTwxaq17NhT651CivW1wh0q2+LMuwQBKhPy8dF4m9GIqQ+XBzJr5Yi
-DWemK/DaFkmfXVk0iq0asgTUjHRIGK9JRNZIg0TACy5rm3b75xum4cqKcXVWn9hFovIImdf5n1KV
-IzYbtnsHZzQh5z/6DBSxO/5hroir7r77OewQVO+Xx/cuMixX4BUgT9RJ1IwnaR3EYV2VA8087+Vh
-jZm34PVvTwqTa9s2COhDWSU10RwtrBAkJ3Y2v1CoUYvi8i5yBpzTwqEU3TqfvO/kD4CuWaiyceu7
-Aj1tFH7xT64w0A9P6iBtNa3KNhO35pnags+h0tB54UQw6vivL0TLRQMad73nDqO6ytzAipr1y3vi
-TKCGezYqXZ9LX3Luf+ok+ek3vYFeccwALbLRjoQDQxxRQUroAHS/nhdQMKypo9cXgnDL8f/ANxv/
-UDL4+pp+MAmQ13clgp1eSQglS2I7qJwbZ8RmfIpq6XQBvlmJkOkIF2ZcDcLJ7fH9M/8OrJQVIuSD
-BKFK6qHPk7jneLNUqAduwdOkXqxlfIrMQoEhN4U4VoD1vlGOaoG8TaFgGt8BhS30EzfgUtMNLXYZ
-rcV/xZV2t7ftobn7tOxkwpsEnHmMJunjDNjSyaP+K0La2RpcF85w17ArSINOTYThsDD+2N+rKNO2
-WLl7NWQcTX12zumb6RLXm9siVZ84mye6L20pbjLCQDsvFrWL6Trg8iVmO1nA5Aa+MvEF5WL9sj7O
-izub+uddEsAVbbv+oT5DUx3s6VTTzmQocgdYZLpKFK6h6ly+/d8CbEplLRezqBhYfawFVhTM2v19
-mrp/Sqi4m6R8Zv264/MUJBWgb7ExuQdnp5nRKZ92TpX22b/1KmsCIILI/rK9xlQ/lQ9vk7xUhYaF
-IE3Qxg1Vt9xgO45rXdLlk7KY78TYen2PU/1mVBYzr4uSwAqfWOv7V002BAUoUGkenzmhCHr8+U/b
-Blf2rKU1qTIlMN/VokYnKA+cKV3R66xJksEHPYXRHO6ZuyKP/HVyhRSnJkW0ZxDGmjczMHjmiulP
-ejcsvUti3To8uRJa5HS4VO9bXjs6cvH60xH2ETIXoEkrOOvxe2fkODzUaao1ojTnpz9z7Fa+sUh0
-Umf75MKrcoWb2mkTmhwr95KDpra087cezewCUvg6CXrp9RIZeXhZ4T78yQTmTxBpujYQEaARX5yx
-+VZ5n7SusDbz2DohUJaUWCaSwIM+d9EsdqPmaJqK2Y1cisDqh18i8032yqpJxSZ6X18wu3KoJLA8
-9kKBVnzoA6Sbjt9uDe8mkl7y6ZmQmRClUiaqoVe2PPpaRTNuvm3sfKAdI9z3iG7Z/lGufbnSHjt4
-MXeWDYg0jk172WizKuSjPMXSIPrtqwtzXdfWver1kTIDY+QOEEPzS9Mrw2+6g9Qibdryb7im8kUg
-bHXdMkYkxcCtgMRlx89p/8bfoC0XegEPZQMhCUgdk7gkEO8EB2u8UKEURvxs0O/pc7blfK/h0Jj6
-Yq0S/kzRy34tY3YJ0HES2asndFz5etdztSaWIerkI2K95Rua77fCu8+LGZtThbtdBcPQ+FcqrGOn
-xQNSUmYLv918WEK17KH5abFB0j0WkVrDNv+8UmCByJhu6eKLs7Rti5sZoQjDWN3by1bbCkoIMb41
-Xd5W2D3HCZNgG5JT6gsh8DqNMsNA+mcFzgLOfLRo3y2qfP/H1IYbA/nzK3O30tqXWPdOZrlcYWB2
-HrILbe5qhbTfOuPBv84b6S7WivhYa/+4+KM9t8bIcKUyepBLlBiuXHYeAfeWUa19jCKgFjGkn77H
-E04Lznaj3sJAxH6DFE7ZfdQQvRoHkpebE0KkKQIXWjuE6ClEaHqsrryywsmmV3knJlpFX78TnFwV
-PKtsCwHdWWNqLgQxkd+QgMYOuJQn/SEkHD4T7YgYpNBpoQ34HMxYMNO5AedKn/FXTPCVQD/4Togp
-v+I5mi3phs67yCaBtFROaXPiTZhudLTPxZPi98Cd4Qmw0H5ciksbtnlymMZ1spH1vgg1GYKH8FeP
-Bkqsnb3/pPsERGbEJHVAqtpCmLZk/dl0aZJHy70gzi+sYkvMetOT821TF+f2BCfJiL56gCX0EQ7O
-8Dii7PVzT0HsqYIuYBXc3HQQhcPU+wUMuSNMrJ5aKQs6D8R5Q4crekZWSZJWPpMWnfjCd0H9MoZU
-2+2Ru1zQJIJrpleGFCFMtn8leH7/orSivK/q8h2dZnY47awyTQxeZ7qJofSCXP8c4cJwE7n8ZUCp
-pvcYVhSn0AGGPhz3nVwTk+Fp+BWcb/IeLUV9aZhQDDWvvWbbtL8Fgj1zYsx/l9Ut8VbMHex7RnMW
-VZS3BopzNmbKxKqEZd6pgJnpfpWulpe7/5XuZ7PfL7uGeX2hSCcnbRHPjwHhiB8A9dWCgfLuG8Va
-z1tY3+9b6ZP3715EhxFEa6YRi0owkAoMDwc/Ri++oFSumzDzBZ0B+zmMn9D7HjOHXIvWPACxsC68
-jM1g3mPFEjRkYo+sSD7IioOpIF8ylJsE1///gh4UBs4fVGBFRD5pj7YuXz3UFJmUUHteq2Gh1OXy
-jS+GFEhVeg1lkMvEQAt8eNsabEYSDCkpDPBscFFF/jIpWscfmFT85JGN6w0Za5+n353ABX0RoxeD
-woZpyxsO8y0WOYpgsre/AnsEIjpckov9f5Enc2ivoSVMBUdzpoviYF0szNQjwVVRaYZwcBY2esxz
-Y/vsY2keSyXWLjyY4GdXiTjtTE7+05TVtIIpJVDAVROuxwfGPzckv5alm+bgZBMbzR+ifjnPq2/E
-D70jAJNI8MFbKpbO8+OLWuP6MhrEcpksAl4fR/LzJ5bUJk7YoLCVF60xgs+9ZUwWiNzh96hL6GM1
-TNv7RaSQ0i3YS21xWhSkt+XDh2dyt4hyH9C78BxCS/XhG2SG5RfJCdrKUO1TGdcTc0ByRlph/+lB
-JXQ7XkGZz8F0mYdYq5JaqSrSw2D86vtbY1SW2/PM7h8f7wHnPExcjIsmoxNW4fsfZsjLlljxGqxy
-Pu6QlVkiiDOpl3CTtproi17PN6wiEx9kvF+Iki7EpRwqW7kXfzOtlJqGAYqadxh+4/EC+0CPpiG+
-5iqYR/RA7s1jAqNd/8/inPy/K1VsR9XJ3ExUYLmcSBCvLt6a6UD85gCPiZUGYIWDP11TbsM51A87
-SmNUCXZ0FPPVMEwelqKz9c5DASLY22qwDlClvzLs4omPVK3oh+MppasQFKqPFcRB3LYL9iok6wDG
-m3I6+WBzvOVGHaXzVbgyp2lh8dMzz0Rv1M28PLnLF3h3sNfCbJkwFILDuvXrMl4faNCLLuNXI2mY
-siUJCRWNWun3CTZ2oAm3nd/YegJhW/MN4q6RMNPMGOv9LYN/Nu2XtI6ELuGxhaUQO5/KPtf8Iaj1
-45LkVYeDA6zNn8Ph4uTgyLKIcJmqIrE5WJAcjnZTqMfwrMfBu9GSKDPjEggCKRzSUiSWSuBsTSJ/
-r7OlREB5EMBl4ypq8Jp6mbE1Atb8dAxu2SIUI15g204W++fZMkHCLDO9r3J/fj6ebQg3ICbxaDOx
-F7yjXXv6p00V89LpMaxFCZEUvSVSiiI8hZwc0C6HGimJYlNqN+IWbIEQqXmGK10prWQDr4ZX3P3G
-jFXWGcyFmhqH/9klL1dsgXto+W+tP+1Ra+FH0qqljf8zZ+mZ0QFsrdxuqIJ31i8QOpQ7r03TNqFd
-x9TaP3kLADamI8MhtfTXKLzu3e6Bjo7sOKs75/WRDsggXVBYqhaOZ5osD2HbJ6ls9rrsIu2Qhrci
-YKHwNXgEkY+WLYURoZwWz2yjZHLd/KwBrwd2zf6VGjeH/7fUaHaptxffToqNg7WNZtKoaWKBS6Qz
-8xzT4iuhqzwxxsQZjFMuanFc/J+USUUuwqm5/yWKMpaBLJaNtbeeyKcinWdqjrUeYuYH0aS/GCmf
-R4wcRkL5Pc4K71QVw//BSeNZJBhC3d/URPzGSadaV8c/pCRWviMXpFjjXDUdO+J6b5QMg99oAloQ
-jr1UmFgoMnk+BYbFqfmU2YlOm1DnBIMnJ5mIn5QhocVsgpiViNkDnq/XFZZmZILteyk1fUpWsaJJ
-bgwZU2F6QeLPBlPdquYJksBc/FD6oK0OFkfsC8CHbzgs1XYlKf1hHmRW9jzsZGS0a+f1EsPwY8p2
-CjO3U45lyCQ1OsYy+gqeWdmItdNdHGMx80+CaUGrlRlU44CFamv00ch1jEQz6jn7Ha5/uKsWgbOy
-Wo2HFFB1e2NthTMaNf1GeP+IkYZg8QkokOGyRaIrr7cUewia/niq/nb42ddNCdqwt0qZy8ujG7Se
-JYzl7nK0VpQZM6D7cdD3WOnYXiMke4nPKTwWge36lBHS9tQuSzgivjNX6jZ4vtDoTX89ngl5Z603
-UEml29k5yagsbtpWvqP+mOJQ2lUaOj/F3hFuVhgiB7fxiThsJXSkLDK8cAcLAczMRA5xJaigUwjG
-6qvcY/8G19llPsEuQxE21aWSRyGAlwQrCu9qQPwgKxX1qgm/zkS9fG4Gq/x1G7wpwHlwjiegfU63
-I/Upg8OVo+VHVF0ydRYzC9zqhWXJvN4RcdPM9vjWDhQcqmnR3bXMMXv79bqHUjEtl0JFwFz+v+mh
-mTVlggmSvVxE9DsL4YOJ4KNz1gduPdppFIbvir0ZkScokVmduGa5I8EMnl9qCdQWmLG3+B+eQIcn
-drQvcWKhTQdkT7I6iRSaHKGwmNDtKUda6QazuTWx+bKoTj+KTf9aUQBBB9Oq0Z2H6wo2cZewSgjj
-M5P4sNANdcCZ/IXxOn5wrQfv1wLl7Fbt9DyskqpQ+4T5aCA734Ms8OUnAwvJQp+cSGROpzCRA1P5
-1NkenM5+yPAVb+KL3cANL3WAmVhWA+wQ8mqBFllZVJpAgsKf5zDTje6G0Ceyb9lYxO948HxNWYla
-he4tqmr439Vggz9Db1JKdk2KvuEf/3uL7bU+k9RNyw+JH0BOlDl58AwFfoutB5knPAomakhPTg/4
-IQZjvFr/LzXByvkqWzp7LbLY1N1Ydx8arJCzf2KSHyriZYuiShbgeC6EBnOnXAwnPUFH0sP0oh1L
-gxVOE7jishd/P4Tbqq+UdedLeF+Yq6RManaLR5ILbbpVeqxvi1kk7EHE1Kqo1jmUYtfE/LOhaU58
-PtMh5lWbYqierdhiNyHumYkW6usti1JxzHFLXRZKzNWA5hEZayQIDCt0U/qsxwt8WigGf1LKbuVp
-wCN1WArud0LzEc6j7DFYKvgAXJ8NY2GvBsH1C56zEQyjN+yqBAM4DgJkRiMozixTeCOq5fbonWqh
-NAM5egGkeFrKME7UHBfCTpbRg8IuzTr0+Orzht0KOe05GcdwhwHSThot2LJWSymWocZjeLEDWVmb
-QpvQehRWMFqkKQZ1pEIXcEYLUhm3E3cqaEt65Ss7T6k8F3F2IK0PgzWn7RbX4D+h0UvUQJo7fEq+
-z4kAqeGy3ztHaPaQt/dbM5B7KQpRFen3LslADYjXfgSNyGAQziK9KMnnuLNNbXSm9P1DmRXFOY5+
-Y1DEpoXqz8KskYd4FyQGkCsYZopxexbWiNla8B9l150PAppshmYrQ2vWB8vu3hJj8sQ4KERmm+M1
-C1beSImdMVq0Vz4PLyJto+7ya0walrFQc2Lgb17c/QMYrnhDEbUUsuAyQZJqKEb+wf5/aXhpAw/s
-WI5tXzEqVJLpYcSSL55wtf2YO2QJrHn0PmpVNplbU0DD7xjTFKi43ITvDGLf2FOkGHpalFXuAExM
-bAUNQe6gY3wQ3Ou1KyKXA0+Nc3UP7xxZJy36Dko4zBIo3+PHpzomT/izHIpj2GzGcQpyi9ZLCcP9
-QsC4JyOR2rS/lcCMwlwWJjjkvmyhIwvYOQRwKI2qLorvCW+D8MRUpJnkr1v46eOgRMEegIyMfIYG
-eobsnNsgdsm9UiYE0Yqd+RJqmOpvBOwukKzwumDXl7W3g+6Rj8yTce8yvIZXR5etZ6MXDvXOVomg
-n0tiaIB9aqG+L0WI92+VM16GM1IHbtLHUYK8Vgyy+RuViPMFDFap1agc50TPRAt4NWJKGMLsUVk+
-hA1sTkBnQzGI2zPJsz5IEP5TvYegFs8+Nr3UFAdmjUR6cAKZHd2EeUUQa7j6ABFXUBe2E+pQq9lj
-vROdnxYTUCZiBMZh2EZsgP7GCfu8NiBQ7SfJeseCNBuAYr2IWi55Rr+9i5MwPzQwFAiBilE23Jpq
-HA+oncYF6ZYSx1MblN9HPHt8YUdAdClWLd4kFYRIoFS9j7TZJMU4d1Gxj10E3Ws1dgfvbZs5U8mu
-Ayxx9B60iKvIW1LhIHbGuw/n8CKAiHJnfy3COkDFd/p6KZC1ZgoHS2IDyk/hTzhu2iyiRcL9JTt2
-/nbz1J4PRzbOIb5BEfydmDH4X+6tHeYmdzYw14gbEBgezrWFHYMbpPK1D0a3IDG0RkM4UdhriuJV
-V6vjQ2zK0QnJ4oPvMzwFQU8zbptxTRj4pZyYbu7NxOcDvJD/praiTcDeutL11O5Y7cTmUe9pZt5o
-fUsHeO3H1ktAsh/s2pDA+eWJyyKlSkFDa+hivhAduJc93tqxLQAeSx573Pwp9YfzqyQrBsqZ7PjX
-M3nhFb376qT10zgV1FfUqmC1YRquhit6ydhTlzyPNsTGn8vxtVRXaKbHfdUGsXva4cGZ5yUwO1ts
-b0Pt49qXTBuVRz9s7nRJcFrDQb7YND1XrJBjY+ZjY6hyVLn31izWl3jTqqxI/t54Y77ne69Vaaxv
-9q3KdtBCXBJkiKMRJuun/OmWNZdoXGY8z8muv3GA74ssgVRKGrg0tZlUJLRfrgO2YsOZ9oPHfXJw
-RyP52x5J6vLH/dRaVhMzZQwQD7xTGzEfZxUT2TLINDh2NwhAxsEAmFsbcOt+MIe5XoNV3oruk176
-wedQyooEQWc9UMoIq84KJXgWNI6TZHjvKrHmullabFGbbtFCU9+m/3xoiS7RLVgQd2Lkq5I0uZlb
-VR3sYj/P03eJFclKxSwpENHcWKYr0aUJJvC+zyiUMPoQCaX2YYIu4HVV7CX7xGHm2kvz5nZ8lyjF
-zUNou3WMmQzvXFvsb0oiwsDti4/9YsZx2QopkqOJYtYFVVEqVxGTapwg1wvA4go5sMzo2yaqy59U
-OIjpaJlm6vSFznXy+Mi2/rzfbCNXGa0P5lhZ1lt4taP6jWU2uLNxypWVBp8aC5uQ0vZV9YgM4URc
-txPFdUOerD66nUI6xfG0lwYJOlY+GnT7X5cYINxoG44Lx8uUhvV+lJVjMVser/0suLT/qy1l3iDS
-Sy3mTOIqCJuzV13xGLTLgM0Pb5N7XS++eEcQ8Xz3KMvhXv/AIVoTqy1yWWHl1HOq5543z6bqsDcm
-GkL1NCkTN1L49kMsuFLCvQ4cyKZPbX4feVlFaarABBTy3IERpBOHqiSkxM3kGqZc5yCJorPWId09
-Kc48TP/oDGp1uAzzrOO9K5HDtdCBfcPMrq3y1jMQ/1waGoByHePfZfdkdxYkI2J7QMpPscFbVlHG
-LJGu73jkYjNa4mskc32fjvMIDULWWRRyB1R+LiXqqnuG1+ltj1bKHb33Y+JN/ilSQMrnIESEQUJa
-bBeMoTvTrGcWmlChb5ILEdK4ALHPvrx7brEKFeY5SBLXOHmescbnkpjeSPGuFakCqQ3pJZ1eSxOp
-0mbI70hB6J8OrvjT05L3nvsVVtS1Q6giSo8xwlcj4qfzGauMxjNPfAVDvT3Z2tG353Pwwoy/Urht
-xnztR645rLnaOyaS0+gPyLTNIH0apawHsojyIq5JloB/es4hw5TtJMzpI1lIfNMkhs6qh6wrL03h
-ucGT4Ch3+YvD5gVtEI34gWqiolpHA1Zy05NGh+5NNMBOopjw3/qM8hQUV2BpDXfmrRxSs6NQR/bD
-BsaPCUE1pVaXYdMsZHrbXtqaxsHxoRaK2TdbnAWYtQekHnyeM6hfikO9WuO4/HGsju7x4W6c/RuR
-MchvxioNGc5Z4cWWxcOrzolA1JiWVMTnW+2kqEwTJyi3XvC89g3AbMCxpqTItIw/VjjXd/q/Nku3
-BE5RDArkiy+0FBCPdSoqJAhi9RYu6wOmd0C9XSSaA0GjpHt5+p4QpEc0+TZr+Vn0ugPUr995lglb
-RRDoBOTA52+PbxM+sIWTXuspkYqxmd5MVNwy45GYb6nm9cvBCMZB2AFVSSC0uvMWjkh1Qyxb6x2K
-1J05EMna/hZBw+lSSztgH1zbL2SBCq0Wmq4ZlBStgI5AknL7Rg4oRNmxgUZlbilxN/rqAiOtjJHg
-gHXPOn0euWOFyKIeETlGaqY6OiVXUTsdyust4GIaRv676LGRA9TYZAmoOcm9yw/7QVfzNvbBe1xk
-IjLHDLWOM6qggueY0OlhWvSUEGd2vM1HZSLQpAX2UlWGWEbVlsfC02dl9NnMZYsxOsMXSh1Q9RLl
-dPbxQlI0Cbwze0L0vo4Nuh5YcgzecSUfsM4pdnSSrcW04jOXH7FOd4b03/1LhrlT5BaKes1SCt5E
-1jOGNNhHROPG3tkjyr7aA7e20rqsJZwUAw4DiNUN/KOqHmogaEm9HJH5+V7bhpP7RyYwvjVBwAKo
-JqNMRhbwGJvR6OoN6iL1BVfFMItvD5AT/uDMjn/Q1Og2W757+O9wAizERzV+2KscCx6ZjQhALcQG
-lnEk4vUSUkoN8n6BeLsJ8R4Py3iPOFGZ4Unbwiqm7+nWqSBJQv2b5Ic7r5iOLccTlp5zuJZ/KMPG
-VcfmsG9e6U+VbTeIeEhXkFQ8hScxBrPUDNu14pCd/hahSvgNnK/AX1HXx8QuYzeaZVgV/aLk7Btn
-GOjvxKswwO0CEE5NShqiMBVpUfLF+zAzmSFs9LemE5DWMAUuzGpMUYbviIc1I8E0y4JR26XtbGIi
-lF8O5o2CNTEd9nuacZ2L4tLE49YtVQTqN3AkmfzS2XTMTRua3k3TF+Nu4iWQ+UEmX4WOlSoq9E5X
-o0B8Y6DTLtAKd4LHZhQr0/5bgw7hn+OjO2Rjw8utzz37Egemk2f99aQkVDRDyk7L7HE4wuU3vSHO
-Ad8RePIqBJDy2BuKnFf/5tyXLAIzIz6jeTMpfoFbDJgkV0wf4Rd2OA9Ijq8WYKyZyhrAaDguvceQ
-+wmUyxggaYNAvodJhAVhrbFY15lVLuosWW+O5URJifYqGvytaoYVSVIn3DdiA89E89zW+jhVxrSY
-EoVz+RkigEcMwcbfV2ho9OSbD9XEtNaqdRUcsDLZIQ4qqBlsNr7yDTJYPBKdAR3WupOER8oN8GVH
-R7oYJ5ZDbSQHKddv8Ez1DWmdoj1QgjvyhSXM/9oNHrYUKdvJ9OfqqYqFfCdsTe+cMlJ08zKsa2IV
-NP3ji0bb2gUFmLkuhlQS6h2il2cZRfi+fYbS8vAjQ43YxRwGt4nlRRElmBrEYIdtuUmcrcV/UXKd
-XLcjgaO3Oafv1R7q2FBEZSB1XtEhFeg+ht4qgkvSPZXnNDThziz6WwwtKu7109Vv0lA0RdnYbk0+
-yM8abl1N8K50Fcf2PFd8vMYjBag4zh/zN3SU9GsCaKURiuRj4bxu7hyzQ321q8zG44zEOOxIQHqC
-wOcv70IAdtTn5lSZ+Vl3dXuCUGnffdiNnw89bje14YZmkRLefOnto2ORNMC+j1xBHEsOLHY00XOp
-fw+/qUKQWk6EystkEVeVVr2HqXW/lChc804wJxWPoqSQsV7F0+oMMPDA/+OrzGdu5ZMmw/eWdr95
-7aH47l4oxpGnEP0WXV0UX/62lYTlJRznpl2HA7SPI/YDHFWnAx54JVNhnzAeychHqleMifk+VQB4
-a7HLNFbUfQMnn8X6fO8L7yZ6NJjQU0bTfHWXEpzs8cz8N1hDLHc+J93zHFYPT9BcXLDTJ1jHTlM3
-86rRZGQVZPGqkUdAztwzz+fgObLb5XbM9qega9WuPX98gIXeaA3tgOnzLLsQjF7POEYOZ+QvoYit
-y7koSLmTVA4cBiaX1JehMCRMIO/ttVF2KC6qVGmiwmZfIAiU8BmS1GpsrwTPHzYLH40DlMTUI0ds
-zt61W1FtRqdv/xPvWyZZQyihLRxI+hFDgVF3xYzeqgrhuauyG/5gLYF8T4rjcc3TabC8GDto8Ulk
-cA2Ut4Hyd6ZUvzW9Pl5EMLoV0rnHIvsto7LX0VcypKmn3LQ2tnXC/EZVwW0SQatTgqlkDP96IuA5
-DCw7uvv65dd+xtBaignHBJrSF6VUWKpdFlp7lVWgcjW5tm/mTOo3WmrN3zLNpjcBkdDoijnTtm3+
-r9w5UA/FJ3huB1dmmLQ02ZQ2u2nryPmIzJYKWhJeRNiSBjpyizhKTosRVFZXR2Zq/V/o3bY2r3u/
-i9mgz6/CQIB4jJKahf0KRfWQJj0TcdzARNWYOTdmSwD1F1sLVD9edG+Fwp1aYUfs3YC1djlN2mrq
-xKIynWFCPvo/WSObV2bHwVGLChKWCGFROmA95l8z35vkRS116Qo7n0ALnvttVdetU+RuuSPOSyEc
-0vdIUb9w9hImNMkAWVprEaEt7VeUS+7t0dTcLQwaSCzxf+MR894f4QNvOjQ5KTb8unIkrIWhAIKf
-DGJzH5G9/Q04//o0BJrobsF8XpL+ojCc1HDsbM/Ch03nnA8SJKJAXGjCPu0QuqwFiypUKw1T3l8O
-O+JeBYEClqIFOW9M2cdmn09dswg5EMVeDLufnhBfrWq2YcL1yrz0CNklFxFO4jmMRX2ujKL9U9ha
-okTCYSAa/SuRpGYxkDA0qJVI9aRvU7foH1oRf3LM4FCoGx/hmN4/vufYS+bmB4H6w9SmfsOFvFjm
-MaV38Lq8glbp7hraX8jjL/Q2p2aqamiS+K0FNcnAvkM8BDfyJn57X1OxGMofe5rL72sbclJAMYu9
-sSOYVfM/Ky0zwtr/cyzTcGkwysyoKJYn8RiF3w/jJoQ/o+bOGypd2dH5POrYkykGqUO1ohu69670
-bYzQLAol4bHTJZ+SaYoa9v1F/etLJ4evhXnX46FbQOmKZWYqu00FKfAMJrPZWCIw57cB1/wRpgUd
-uRpMnpluPW/L46lCoVIjs7QNKRtR6tSZiBrSqpOK6fDzrN6ag9/sK3NSzoWjUpPFz4chDUXTwy/y
-Gt2jBmiOxVNBdYq5mwlDykUxeGvDSyT8KHX4FGHxgHUtxMo6xp96YqnJvtqY9ctk2dKZiBO4GLBc
-wp0UwCMxDFkP7Dg4RN2vaFe41ZZ+kxoHJT8K7UK2M1GhxqAb2MQh8oFIjFH95kfwzHwGqhRrnAaY
-L+cqXq/2+03/No7lOh4myCNYfyVfnK8/R8tKJ8f6Vspp50/M/B3LISdssmC7AX6RLE1+NkuD6257
-gorWMb0Qsg3ekFPBUHr5Md5sXPAJe0bwnkS1rteRYLe0v5Nl+j85W6WbFz+YghpNG5+P1HZywo93
-zpOGH3wj29Iowc7DvkD89Fdkj3AhsNwyt5dp+wVfIbDj7gaCzTlRiN1kthH4EFYTPLHj9bkpNmSu
-BUM1trD30gFu9RgmS2OiweO9B4Fq1gmtqnoJQli2ZYe4zR0+VCABya9TojDvIkuELML3FoFshKx1
-77oOCLfbztxYmCFD5DVy2upxnuwIFhHEE2HsMG4ENRve+VBOO6efojsvpl3vpBNl22ZL6CFaGSDg
-N6PquuSBpe0OBlv1lt/Of5IRoW/fcBB8dVSm6v/ACNnPKW+kJLFdq/vDEfwoUOA44GTsvX3OtFbb
-iciSvqEOypJZ5VKwlJCWpKieyweRm+h6Q94/Rx2kGQMhB9+JEA/VnKTqJAsEx3hAfeYIv5xN5NC8
-KUbTTyw1Zi36Nty4Gse6HvaKL6MvXB3trWE3XATzq/JqPH/WiyEbQEO4IXQUbZZjZH7wtUz9jrBl
-A7AzesdF439qvqdvwvYOPqYYQy62AkXOEFP+yYxJlIhje/QiGPthkmqpDnk8+g+r0B7A9ZGEspFB
-3vnupFiCdiceVdGKoppzEUpAqNiDfNYmCq+S5Drzd55BPzEBgNO1hWWIi6OedgziutDZxr6Ez5El
-hlbEBsIHnq5BAN3NhwjH1zEA+M26V05jkAF9Vkvm4eTZ9zuwv0FZExS/qpRhrqvzyW6qKOCE43zh
-/5hbs/wVFvPPdIqI7YKUgWik1t58QGgEpw8906/6kIMYoljUe8hp/hDH8g7gXj+h1xCuw0Nt7WFm
-jWS0RPWlTvryuEx9qy+tiiJGgI8Pg91Met7lRwaIWfVDNYscSkxL28yt1P+ltt0QIPi7F73W1ctr
-z9mm0pO0F5Fb1g7WcE0MITD5IgZqV4PnNETJnyTbR2riG+2JjpP+Vv4KOvwwHNTdeSYe+d6r447f
-M0YFfuA15KkJhx2zkmOmZgih/mkbJ/gsq6+Q9G1AHjlUEfm1uvyC2SWz5syGbQcS1Jg422AYMYUW
-ujHdjZF4p5+y6w372uZavIVtOUwkYlb9npbA8AbSeElaovYd1oNVSwOvcZaZNIZZn1FO+Ynu3Rdo
-j7y8BCQUeZGRwwnXu9KffNzFIiJ6Tl1a68BPEeRy9/zOrEIb9hgcqsg6fVusnwNzWjwAcx+LyrbB
-ExT43OIiUDybRzutOElLNzw+aZ0QRP4RumlvOLUL6tJEHqMGuBlrm0c0hHuHp6BjVGkMfM5bR72i
-1oxB50d1zcNMc/PT3r0QSO6CGk+ZyBdDRk6wBqNG33Y10v1TeKDNadwPgnH0j8j4mw/UzkkpD7Hr
-UCzuh2Gno2GuQxy1oqX5ARBZAnb7Zr+xv22j9Xu4+5k6IeJaP4VE3wIQslBAksk9la4cDCXM3VxW
-h4iVOYuUIL3u7yrDqhKckmfFAK6F9pmGoVcEpnSXyNwpQIgkCd/jOv7uP6u2f1Vp8Ei185KlfXc2
-+McmdgXgBHPqqJHOopthkLR5WhbMIbGmN9s3DwAVciw0OhoWhkR8H/huEdHtIdY6UqG1moUHlgU4
-1DSY8MIkrAIpKUIO+J1YT1rXhnQ8WOrVzc3Ng9wRnmWzWXhvGmrnAFWqNoXtAmWfdqWGx3zrKLbI
-cdp211mu1C11u87r5kEHAsy5HOHHrPvdqp/gmGQnf2272p3K/MT95AyP3S/U+AbQ9RWOwh/Ky1Gd
-lsK/sGyj2qK29OkhOsZFCNP37IuO3Xs/dwqVUcupR2m1GgPIQqwVv5uKDKRmQnmLRusT8p1A/eT6
-+3spEnmsMpTdYmSGEawOVZzj48Z3ThUSJ1koh928j6cqyhnnEQoPCS4BUtGUO0ynyz8gAHIkrQYa
-bfOkZaa+L3xDRVUgeCtsZLL2PWHML/OEJh3NwZOKhQ8wMDDLOeUe7WOMq8xZQYWRDw5VDvvSEt9C
-OyDx/ylGJveRee/UVFHpfD+UldwF5CNzerrfewixfCh7pfgm44KgxjZRJ90XL6+zx6pUt4AyhJq7
-nDB52lTcT3Rm6KIoYEZA1nuWM5LxvFVuPsy0akWiXX403PDDP/qXOlB6Kb5GSUNru/3SjOfwBa3o
-EhK1XZM1Lvsn+lKhJ7mKCi0dDQQbQ3RjtBowuaUrGTSCdjmKRh8AvdrPRPBBsWp7O7MwA/z/FSFv
-IlAqjhnMAovChuTKKD+vDhipSzKBaq1sx0EBew1iCJZatNXvtzizkFS1yhUcG9TYPkBvpRJrwGt8
-RkDIB2v47M+Rn0elKnsYZY8krAv23B4UAxqZeQq4fYcM9uyVOWjEFMpDA4ZpnqCgVun3SzgFT0OO
-CLAOwzafKtiz1FZU9YviwTDAEzkLnNCmiV3nhBvP9KimrDykC4OOFV7ZJB7Co7LlntRXQPYYxzec
-+Ot1LEgcCehWOUxZHqA94e8EfHqRDRsCpF8IJ5Sjryx89jue8SrnLLe7tqR2n5YhmfCC6wXlFOq5
-kJEqp6YpNxTbdvoNytHYapggxc1fIhbH2Id8E5SxJwfjH1X22pUFPbTiCnZxRgDy3hiazUDAnib+
-67QbOHeH3Ux00fZwhpn9NF+OaV1ipn3ZW5XH0w7FLaJfcBwMHAV5EPHHCQ8byxroIHQjJAWlqF1j
-VLXB5K9raaGJMzDLEPaWV0XrMV86dTpoNQ4G1udnsVCx7JFGP/T5Fr0iCoTSlYfrA2Z6F+7VqH4g
-BNISWQZpoqLZrQEvXiKVOzekSu/Ar01yBztl/crIZ0vM+Zf7zSFsY9N6wHcFKxZFmNU77flZ11AJ
-+NUfSm+/p2SpoG6I7ZvFhtk6TS/CtLrkAq5JvOiaJ2dFU3KrN0nt4/Ic7qE2jgYuI6UCuNteCnqm
-qBX7qqO40djQrfpe2tqrP5lAPXBzIRpIagrdqDI+Buk0NXqjUmnSNehT2k5j+cuacVD77fJ5/eqS
-sS25R8SCCC+1IfQJZ7Kt8cTIyarO5X3CHB7p6bitCPaFMd2fIxg5LUjq7e/e2V+V23KHHDkDTfEV
-qbYUD4TVOWtt8W9PbfuTfC3T2lzjgLk7Ad5UEVKTZ+eR7jXY74Pq+akmHEnWNrepovAMajic+mdU
-0+R2hWPq0VxM/J9GfYmV8UbUF1dm8OruNc8VBYIT9Rst9gwCDQ8214E2awJTFvqoLX8ZznhkOkTL
-/M++xw4G2zEsfzA6WneaSXQBjleTqFX9EBzaYV3kRBnEutpVRkzb6FpynaRaK8UI9gXtBHOrYKHx
-k6kgpcgghPLLDVirB0FViSoc+CvrCiKDMaw/yJx5Vi/TRNoeQgZt6dH9FqkzsmZdJ/Cegu5xlzTj
-GsaveFQqrol7qzlWjhAyoRrKBGGoz0FH1LKTmyOerXBSgzaitDq96M1eB4UIhZV7+vInTpZl7CS7
-+vUYJl5jNbSUoLwVl8kFXgLwbfvUtBvZP0H9zkVmCbuhqjdPgc0QtUQYto8Yn6M/WkCVj32X9DFM
-7ZWLYkM5CPTDBxZ/MgH6JXpDvDLifpKZmJI7xz0SNbsX7hR4/EZu4StXWs+i+g4EA1wHAEnyLvjV
-hln2IB7bQ4KHcucKiF6K+rdSw8nFT1xa8WP4wqrhQRobuFQG0pRssrBfCvFX1m2VTVUNQpmVlEBS
-JjHVNbcia9OVf/OJ2wYqOmKLluHq9z/GggPjQ4S1j+UwwYzKImhQFCC43pSGWjajAZcxFWwprufB
-Bedn6TMfZD8PP32USvbZqIqyJV5djuWpCKknXuKJefp+o4vhuMFD+F5Hp9ebeRD4KXka0CIBM9fI
-LQxXcJB2YlsDtXj+kn9W+nFStj1cvXlj1zof1h6jo5Lb4gfIJ7XJVyJsig+Qn9IQsvXBQ6L34iDb
-5IMYSZcj3WyUkp3NnFGh3KAp1u3YHq0a2QEUDauKF8UFx26jobZiGBcAkp/D2awi9BKq+6oi+8ZD
-sYd24z18olTV4DU3nyuRFETzl6BWGjSw7mjHCxg4NN29KnTscgQSeIN1o4j1OhyjIm9QuD3gOrau
-9tnrpXzkDvKqPZOaYzWUrk6Qm2oR0ovh594aSa9xWwLq1nW+SSJOrbBW4umf+5ElmDhBNTeVIewv
-Q/KZkW52EnujWbARgVTvG5q2Q9DH/VOxH+4DzchQLx+rNejSdTuVU7QjqApG7A7vhOPGOVoK51hs
-1mUp3k270QY0pgb4tsBXpQzQojo0iJaVyi06IQP+mqO0VBlzBHjZkSTjgFuOaI49wLLzgZ3ByTt2
-StcrOJVrImg99kOVGdWjQeyEY4M0mf62X0YuZJGshwiFZLSlZZFGW/s112CjCp3iqKeftN1/2OV7
-xizFmqcxuRU55JMjdCtuE0yW3HAp43NZq2EPETcFkmTMsiCxuSqens0eZnsLAE+IsCVkNMxYKQsH
-n+GUUHDNJFPb4o4mQnzmCBnSZhrO79aoM8rhpkao5c8dJcAwTJdFPI6cuz8k/JJb+4fxbWsJbIqh
-AbqJtoffLeAnp8Fhpz5E+JqUa0IORKtf+IXfYu5YPXYyAH/FS/wniyrEyPBdEzaqmRliUTyel8eY
-b0iIh5dqVIHN5lWaxAtvtZCYNFiLvVT/8wrwB4Pk1yE4154W+fUnPcMqrsboA5W6ao3Qie/X1EhJ
-UwRZcTD4y5ZLcCabhA8Z7CYrjliKAz0B6P8X1fuFaA4x4LrGvkLH+SVU/qn17gHwWFB9Px7Tj+5J
-4arXGzKwxUR7nPrb26cjT5GBHT0bbh6uTZsTlEQTG31bbIGys4xe6oJhC/PjDZ5nx1rR3RsBtlYh
-wOv3vtc2WzS6o5RZ5yJp2Q6zenYieZktuVlyM/txn3jv6qhEKucFrUUzE2mQQwHo4608JgifaLBm
-W0vnXSeV3kqfk53RcZDnNruzMMBc7O8Hej76Nw4kfxhpc6jzTeQs9GIebTrBloQBNG7C1eW9W8z+
-5zyZeZ4OpUFj+UOUdymz0nBhaNqrKBTKqXYZbcjO4rNfO7rgzdEWDmwwbFKcB64NufvU344l1mM5
-zWpxZHSXIDzouhOOWGiW7hGi9OGI2WFi1Pq7RQbGf+4OMWrdsJ+SUZAUNLkKZfDt4P3wgNtKKWa2
-HEELY0d0M7rodB4iu7US9tneEtbfGRge2Hz4UPVnQklfKlcL2dJpfsJuv5v3znyvyt/n3Uo4fGci
-7RpnOTfvJQdNdvsXzGMmhDBcczkXoP0kMD7dAfTKbxmrJ/VFUlCzGx2p3WmnyP7sw4n23KPOiE5O
-7PjpYN7dENqf6Ao6ZCLZof4Ld1tCNkyiIgO71af8B4xTGiSuDS3uW03Q3jARHTRJD2SHRj447AB/
-b1KEmaw1yYPf3wcEjkcBGiq3CHifqG994wEMrv3ezhZfTbczVrIZtajDmpR1j+0mbbLQ7LBKt+EN
-BNlwC5+NjJI9R9qR7UsRAkZB9udu/7OWEIU8qSxD8CLaeh+F02IOqHt20xZ12u+Eejx2ddMWip6M
-Oul6nejBdB/21xgPFyfiWEXMv4YBvD7XUD547B7CfYjFI4K20Pa/glCR/gy4+73Wtw2/4lz9QEZP
-z1ckvUbqqaHbtypJ633ivHG0j0VXmzkhV5YwUzMkfHB76pnz0JPJ0h0jaEDwnBx9Umu+xvvKnRmg
-EdQdrKWR4LzSiqLTR2GV0qT9N3mZezn3v7h8D2I5B1cDr53WSPErjm3ogl5cHYCcgeckHPaiqVhr
-xE6/76i2pIKkf9pnOIyczTBWg8tOhKWpxHxh9mRipkhVGs9JWaGl+07Tdo8l7DOAhkomf6Z6xiG+
-bCd8enyotkPd0UQsYHZm2IFrVh97kZndqRIRG+10REozKPKSKuAyiBlKyVnipBZ+lcmeGx3/79sN
-5vldp97GSle/36KzXMsQiCEaFCCf5YjQnxbY3j5Rr8BXIwvpO+Xph+2U/jyfcL/HRtguQ5UWcWFg
-z+5znhhImGFMBNFdlXaaVviKIYldXuXVoHqzaNU9VdDMlxv0QzPwMvuy54zGzNsvXBoQmYYmdIPw
-0l5Mq5MFQSC7CgK4gWuFB/e34U/9YdNCHyigaeGgghtePYSvQGtG/DeW2opKqurylUO9J/zfwmWl
-iyJOAaWahzKrizXIpGscYg9JFV/GE64OK4k7RQh2cxS3hp+k42JLBfbMn9OZterw4Bz0sjmUZDfT
-MQLCyilod+m24xELeKSdTzMdhSRy3l8j+iFHpu/eSyslPrsGJkV3BbArj8kH5qt9/jlKOQFefFy8
-yljTXKYzB9locoP8SnA+1Vjh7Dp8nSFFZS41Mi8035JS5KQ+nKJxXIKUoQyN2QCm1lKoV+OVF+o3
-DH+Ese4DLXD+w/fsMFF7UHi2D4xk65RT9CmDdYHe4cmUHrq11q5Mnv8mBs71Hlon/Cpp2W3h1XL+
-gSCFhho3ikP2AEx4ALpWC3Fq1PoCevHQ5WXsgQXhZdQO4ssLPH3HK0Mnc0mWraizI9qZotlbUslA
-II073LI4Wgz90mRlZUgYmAQWm6uUjrDh+NcixIWDIDkmMzloOuY3q2B4083wZf8XzE5l3L0y+Khg
-ebGVQR4Xj4CIMbS7llxPDJfG6D5S5e+E3aaW/LMfTkik/+TiXLSckdT5K0fxu3H/pXMdIE+KQyj1
-4R3I9H/N/3v09haYCOjwbyRLmtu3shiQRmI1tsy/fcbGgnaCRu3fgZ/idFa0xujww8Av9GjoX/ga
-jQEH8Za1qvFE0YbAlLc7+2J7WzhDPHCDf14XmMZzoXH26Vo4KO5CqPw2CbnbYCR+1k0ifKsboOlV
-tQuyfq8S7Af3pPOmPDk401J32QyWK9cQHqIaJzzuvKN2QGHsSk+ulYfLKt4gUpW80507dk+HAExa
-3eyBL396A/nWwl4PPUoEHevK+nFIi8NMcdd+A9G6BvOym7/IuSyizXEgMBswnXHirtFabc3kMEEa
-3TwSTun+/FZWFC4uBovKkJFEogV5i8DyPX15YHzet1mLKWVtdm7A7Ov4Ke7Y8rKPT0pUzh0ciMYn
-MdYuFrRNU1qeVxb/w4mjzH+unfZzuuZrNB3DrA0eucckQSvTFckPoyfBKTR2rqh8nweJO4mcLBW5
-IgT/6Sq/vAN4b/JFcIYOlsrjyZgWaCeXspmy2qLVle83pUKOxecgZKwOYwW+/xeOhW2I0XgfDYAk
-8BAuSaL6S+LytWcpC7EBMaGn/kwCSAgdLqWN/FHvvnXkBvkg5YoT0+BYnaAMARJcRYYaGTxaQaBW
-gj3Awq8Z+g4Z6qZ/HKs/+VZ51s7kzKCs2X6l/Zqir4K20H1vbD5klV/hn31AtRiOnTDv1pOQ7ZCC
-hbh3ZGoFfsgLeqiqfROYRIeP6aOL3Q7GhNJ/5J858SRlJpaPvk2MM8zn0Et8C/alPqDfD1CKF/qL
-dZ95Xswc07DULySTtXdufCcMLT12lhYMXl50zcELtpKZ3LJJfkkipJQ5MaMNI8szyagJjhxvcZnu
-srghJD+UtbEisd7GSv+LhmhlC7m6Tz155rtTSGnqrKTPtKuem9WnmTHNbAzej3c8l0aoCcQg6Oam
-sKYOWasN7URYC1RtHyS27ADz2BAS1YgOXRYDWrkKZrdZMKxsr6h6MwD0xASIeGE/QRvusANF6Kx6
-AWDc+orvbN6PPmgwl0HEvqaq1vShiJMpQtNRi65o5TWyPQbfT0EgfMFQ2bNE+I1ulysaNZZNTDqi
-0+AK5fLiQpl2PFtFd/3xwEtXAHRB0SbKy2uuCdIz5CdVy+H3tOlZaYNc+h8mCW+uIwYFaiL+vbrb
-hBbHdLewnMmSLIyz44PLX/uO8NulUa0FYnwGXQvfQF2+JWTI2isg2sxgdXhiKpVuyychDqj9Or5E
-UeUqDpNWjP3H2MChdK6OD/t4soAQ+D/6wtH5qX0xT+dLo3MNH8UOUy4fO07FCjctAMbBMxLW20NQ
-b3AOmI9PN7f7OfiPx472KjbZhpIrAvcbCCRQU+tI2R+hU8BT+53g/v/NciH5KE6wUlj4XsYs8TXC
-Y9Xv39DoYrZDQ3ngPGFfDFq32D6OGoWhZLaKr2Srv1M1ISUyhziP0fC3z86TT1SuqrSMaizJYrNG
-tzGq1nJ6aJy5Ye4za7TC2c6aXpIlAIA2LvH9G38RY8OFMVxWFc6Kql2g6Vhr8W7Rj3i3i6gRNy31
-Tl/nZ8URWCAZ6jyCQXSpHAgF0BCGwG4zeeS0iIc8A2cy470pgmf/KU7uLTaT7Fq4B1stVzUE9sRi
-mf3CZyAr/csqa16KEf8yjJcvckiWtDFp1eGjXCfcx46XmNVFdXeBC4JHYGf7KAIo2wYdyTWXA9+c
-pNhlMLwExGzt9/kTP3mZ8zoF9dG9GkANa6OS3fAmn7Z6wFp3NlhByGHWy5EE8YGdptK/iDB4f6Er
-bjlxeRTWE6K6joAXjsPKOxt3XCxev8z/z3rrqDxchE/r7oC0FNxc0F65ZbDahkxK8f7yXwWXHQ39
-rn99ZNUBsMjTWLsF5U9yqI4jPDA/PCuPAD4itDhmNWhKTdoLzeGm/RFOLymWj56gh17IAaZhVUYD
-ljUZ7RS5ohhoI55wogNo0V3oFPA68XyTUUI6cbyLrmv87yUtI5BGnU9cPFg9OYp/Q4QkJsGC98vn
-H45e6qTbiW7SG5XbZsbZuq1X4d4H92gRwSBHYYBOxMrDkrSgsiVKSVoUW9iee8j2+Onntg0FHa/C
-xuNjHEAyAc3DfxSE2//aKKOrdOYQHVyi1kkiZkBPg9oB1+4l8cNDKLv7J6FCSK3mBHne3ZcS5fnU
-msSHJA2ePi04NQmFiWeR1TV39MjnqwFfbW2N8Hd4l9eAN8NEAZ9Owc9x1h/TB1muXmhEoVWFrMGz
-ai+nbD3Nh9WB8nKx7FvZyic1vtPOjXJKXZ2M2t2ArDPy0FLC2Ffs/Zt5iBZ7sG+3tx6eZktQVbgS
-bkrtiMprNGoHbBFd/M7l0tXDrpkX9TlolFk++XDMCy1yXvNm+RNsRtXW5qjmG0dA0P7pOJUsIyQC
-pIO33s1FHNXrSJkzQiDCGtS/4uhj6JQ625Q4TjgJNosYTKmyZE6PafTsuxsF5bLTMMgQagLCIR/i
-VuCTveyjBUhdx4cbhDjzhiYltOU4lL/mlquLtjLRRS7PCRS/RAqbsY17SbF2s2YSXJMLQbKrHTzd
-dCCntQ5T8g7Q+Mq3yfI8BTYuCeN53luDKaAaVwt8Gch36cI4uulR+2XioKGENxL/LcZ9osrZSKkF
-1K/6stPtTOn8+XT9vG8PWw9sjZGfmtMGB2zgHNuMp1faM1bxS3CCpSVx4oE7pGKJUpl0cnwCEz/P
-215i1ytfpzbDOYUH1edfaltW2xubS3vEyZhTJ2LuX8sMMLGni8MEert1+e8O0xqxFloX8x0v/r8o
-3x14eO5B0+0ImUpuzoHKYHe9T2biRmgBjXFn8CpOt8njHCtZqPMh75ecuXEqMAze/4rwvTeqe4Fk
-LrUmxviAllwypWLlj3GDvMZ6bzOUoqStZ4AIl9WEIDy3Jxf55TSCDTtXU3q1gwh28VyjWOGhKTqT
-T9eLAyK8+TJ0Kakx5zfeEAmtgBkq3i4imPUCbCwzUx+5KiEk8yw17fGryMwA01izsWiSZJn74WVF
-sq4vqCcbLmWxrYYMxJjtlhaLanAvNsnWUDTAd+2d3zalz9rlJGzk80P8q4Qddw32Et642jo3UfwQ
-2A8D7OlbkdbiSO03f6zgaYwqye58I+m89+K6NPH9eQMoL3qGJN9sC9h57enifJ/pMEz31NITbsFt
-0BthBiu4gnlcew6J+13sWSJ7XMywBuXuSOgrXfF+sI9oMyzGF8gxhNtjA2zlbCz280Wvo3lSjKyi
-SAAHWs8nd6yJK6ZrNO+fksS/zYucaxkMZzs4X4IbsyhDIcF+7XMauBp5E1OajMsE8ao96UVaZmfa
-EHaPX3+5Bgx4VWua8l1ylbBUKQ1dWq1iGuBo4San9nL/SqZ8nFulrske9CIdFwO0LzOyZ2nVnBY1
-I/82c3mDtJGnOtlectl8wyDgDxRs/4cLbJEeGIGwFZGXY7aOLDPNsWGHX+4XkRS8cW+M5xm+kz/J
-ehJZ2gGtcIyBwpA6SUWj4Pq1z0weOdIuWEbBSC7XUCIziQgqAiH9AzIk2badlFO4HkZ0XW5zOuAw
-BPoj5h2b+7F2rSsDX/PPLJP1nDZ/Cma/T3FzsnluM+o940Z/eWzVdHG2VwjSIDe343TGXDiyggz8
-hsGmFosTs3ytqDiYdjqB330QzYuQwAqVHM++AM/TrrtwxrpwW5qLDa3QHZirVQZdBwNIr9Hcfevp
-teMtkqf8nu9FG+TAFGxnSBXBiKloDfkvjRrFo107vTRyx1ybBM7us2NoCRitPSYOtDboXWk1Vrgw
-KkyAHIaztuEEvikLP0CjZXEigRrFvqLWFEcCfpWZS0/EZMqenvsk3cUrQFvRAUynsQDVbVBYsTWo
-DRPT29BcJqWMjpGwSsY9/5ICDaMXeWTq0x9skzpqdaET1NrOTfF9Bqd8KJT9UivdaAq4mNH4Fyqh
-d/L49dxMtE+18+imoqQbIcrGTjL95iRKCVlvejK4uGm/glrUPmFQoV1QxsFvuKcP9u+eV4Se1u33
-zpmvZgn4pAMK386a3rud9XALvBOpOR4li0U+7UMjLZoXHEtL0J90u5ECA0zoJj3+DdqO6BrMIPZ8
-RXHuo5ij6QNjkrfnRWvVsFQcjoq+1ivhN8i/jGw3J3YdHu/ellTvPioch2WwuOA8YCGpodXjcSfR
-TZ5VU5FoqmKLbA9jVBJGfHGP/q/hhSW5gpiKKIalKJz+SB+k75Sz1539gVupzEZPMVfcnhN0yCf6
-H3IFEiTeDNH1L1q/VrOOrlvO9Zk9Z4coMrqPtL1xwoUlTD5phMFIjAZv3bHy3NijYNaUVNq5qKo+
-DYGXpCn2PfUrHRI7z12eleugdWvQVBJ+3pKKaxL9L02AejfUiIrvwyvPWSpIjk1IEeOeggPAbJzz
-ZUva7RAD6U8W0SgynNxBCCqgQctUXdK+S+lAtbofILhoxe9Nnfr+sBnizk33BLWKsRJrzCMD5rxA
-05H5mx0oWXxLpkzvqa77Tj8aQVFUmkZJzTgdfxfmzuCSGNoJJLU5r2IJKPFELFG/6xaxfywa2ho6
-f987rKF/QKemNS6vCCrjPX5RVmR2EhaIaj2GHQ7D0jyckxUeQxrMmx/GMmo5T3jhfhQUqILkPEGf
-i63fFMHTtmcqPCR2YFPWjlj6OiXpIWbqOgJBVDcMJCKGzviD/XQ+cUTOnjj40aT+2LrR6rl8h89Z
-wfG+VtM+/kOHGsmr6200KawM1cLLjG6oum6ZzUtp3Sf+3jf6fizDkLyt9+2Cd0Eev7P9xuYGldJB
-kSDeSSOlII3RnKtWyVLH3whmVbQpoFf3s4DVygHb3Fuv+Fef2UiS8i7UGJMKbvd24I39K2QbWot8
-2ufHAG9nhj9p2CBQx4ghMs9fNAKIqX7jMNHbqFSPbbJ3/v70ROuU9UAPhmD+URoxxDuR3dhzPtOp
-HCPgbh7CLSoSPj6XtRMhUCG6wvcx5FENhY8dOsPWz4C7ZaCrcOklPXC4NapVDlUjYnMLeeMmtU4k
-g1TSa9S+AgBpNpaqaMO++NEqyF8gDDy0YswVNggpJS8Wkz9CglI3de7ZPDPRVpl7N3Erp5EbJGxS
-f8v0aGHYCHIVeQWw0wCxP1OoKl4TohtW/dQdjE3dmGIbM9Fq811xxHsstlNZaA95cNPQPO/C/umD
-YNiNIkNh/g4eFnEVghwq5df2dVWJYTaBfyL1hvMtzB2Rn43AtQ5Ch5eHBr42ox4xrWyTGHUTGre4
-Qyi94dFYuz+Gbyrw0XyzCVA39LzwV0GB4+56cFaQtpzyRrPZ2EAp0b9PXpQlXWXPV1rN5Z2OL6E6
-sCnLLn2QwQbd1f+GLncabKoV6gXkgNaYaIkYwEdvR5K9WgyNiptIsI0qM5KM0exIOfVpK+2m0rto
-AqC6p5qDveIIjBHJ1lmPqXCc1rs0GGxqvVVsZi379SbZGS1uRfXh9BsMIRJpjFQ1wiCklHLYPQ4R
-hppg2rTletYIy+SONDr7jm5G7lysTuJaBlsIkA7Skfud1ZxLPcXTJTt+6Vbrc4y2qv5zX7dgeRR8
-9iHaRNUCuYSEwdJ+XA+F3leXvXYDHAgeuRuYDwIRM7HpOBt3PErZ71tPjupWo/sIxudliTkgOBPT
-PY1rnU5ntGkXi45/U53ZFrcrHV6VL43mwL7orcU0RyN2qOc7KSriMZeqEK9dRlGLzcPdkRjd7Rrp
-udbU77W4nyJ1S1rEZf4ZGhjYPGFYTwznLObNuKJSB8N0xgsFN/sMrcsP/SFdK3WId/xOhNqMND4/
-s1fiaGsOgPRJwL6uyzY4lhHW5qr6mCRMm68j9WIIQlwPnemRWDYkMXKI5mP33hj3MqSWqK+Y5mRl
-leiG3kz3n6UpBKDjvG4LLa9VB8IllxklOMNOLPbdllhTHgmvJsFAhb/l6JRHfIDiczJfAER4GZz0
-VG5tmL3C6XFWeDOwdrgHwfNlY8nVvTVlQv1yNUXtGqlQEI1lX4vtpxmAMhyo6e5REPP0gsdU3o0Y
-sHOlxWawi4Q72yWESnypZwkw/5t4I+OQeOmF2qQFNNDgeL0MtVDY5fbTTaBnpaPqThRlIS3WYfEi
-5niN9T6SWbBWtUEnQYJkm3B3fCgJUGlfxGhuQQ5QBuewh+6KEKgfmPmRhFIU0qAU0oEtVnEoeMZx
-h20miC3zcTdDLyupbZDNG/haPT8PxAAJ+in36AjZHzKtii4Ag67UtNKEVozSTZz5feDXXoPAdcGK
-gUy1cfJea/KwqVhpi4mlnvZWYz6OQHsiFr6A/NF4B+Kb8QavPZ3LNTA1L7FGBEYCogx7vmyBh9nY
-98y8EQVeJoaVVj512CWpPfqaMBXtOOu4m7POAyRe8aWP1Esj0fh4BuXHsitiVFrU5CuSID8qRadH
-723jEAtm8jzQpdLzRJ/QP1bgdbP+RViHNnJs/hpzPrDLCr3PCq45nqpiEq6vunR8H32F34jzA9zA
-LymGrpdzb/lOC+cuLgKOSOrhklP11leEZ1ydYH6uY74RkHStQ+trahRit2QZ88aTBPS9znd1w1xf
-nMAseNVDF/Bk6NtpOw0u9CWeNjV4llb2eCiZIr95vK+dfvSsu4F/6uQZdlili4GrsbcU5lWAMcIC
-Y94XyylvI5Cc/dwjsCOU/21zjUn7yP8un4uff3CJOfgNo0AqB/mBHZHIEHwVNbDhqL6ONV6376hV
-VA1SUKEL2sJRHJo+I427qCGXOfC3mghoRaiimE9Ii9Fq6/hHTbw1lcFmYhE8rSwiVmxqIn5qYsXL
-A81Sw5nqt/X0tlXAl+WY1sDQcxhYyXJqoScC5R4pKyED+ilfzaIgNiAhAtxA8Rlq/lpS3lDE/Nrb
-GH9euES/0xngar55kFKjwBSF6BwfEe1cSxXVPIRLF6x/OCcekQ4aNJ9+Z3f5xGQdT34sMbcVFAk7
-oHtcodM01lKJ3s+1k2v2vNlYxbAc7kUVTRYT/GodIeaK8xQ7eVVC3QCJ3bcOsXvB28QSIr8WYIJy
-mxRHTOTeml5bt/rK6GjD6ZBNIXyvWgGIU87vqdCFe5NjDQSkLlUpSXT0kTocBnQPyiTS5hzCamia
-xBVf0zFISkUgk+KNusCCtBk3W2crP+zzKw95LkdpBZAeKKX774qOtsN2Ws+Vtu0ztvD6n+KwprS1
-uglRvvwi0nWu2IqPQMnsrVIRwFnTLYHx+nU4/c2Ji5yzQNUj000LzkjcCvCBUDbkF84mf4DOJLgy
-FyvdEwqBW4hvk+fnfPHl7EqvLNiTD6G+II50btT8XYF35dnvY35/zhApyfFRAgECCjgg4K+QixvV
-gFHA+Nnp5AGGHLcdRz3/E4jxFdB4qhAz2G9raBR3drElLDbPJrUgqybhIHF3mHP/HspNosTrVges
-7bF6Lm8AT4ArnEJIcf/6/UgDh5AFY+7qm1LzFfIQpT+Emroab7MgE6XnCP7eO+YEiJWOUjZxT8rq
-8BOHpRVHVOxArZZ0gekgtmHwtcwsgmXTf/atMEDFAfdsmC3m2bJBwOFjWICrT10HViUeJqlCY0bb
-k0HCbN7AlJrVZLtfRidGBf888GWbj74Ah0w0oitb/jqAVIvFsjDNg/3pnc2D7YEcL8yh3vIXQ9FC
-+QlLxSe17GnX4c0QGg0y8KxAdDhMvFLf3wypFL35fZqAAIeTpo8fb6x/IO8p6EARDSVDNmb1U1Cf
-e5wgYuxAHIXaYON9HlOULsktxer3TAOwuZxJwa0baSxNxnFAATnJFLYP7Asb+WwntocuZyA9KDr0
-gyZvJbyuFFTlTG5UrdKD50+dj+azPghATJ22m116K1vArzcbeu3e7CrbgbZVyIQ3krgk7Qz0BbSI
-Rl/Wgd8dbw8KTiA2dTZHMUjkesEagBJLX742NZGSo6A2J6RYntNGMfvPQw7tMrII/8DCKx7/B+2t
-RCDSJ4GjqjQolKT31eMm20rwSEr27ige7AS40eRIlATIyCBFleHDd6nkpUug6g6gPwbbl/NvqXvC
-zKOe08qREDYWAPDtrWZIHHmR1F4vpboeaO6UXjX1xQxgWOjI2ssd5fXnA/b+0Oyg56m581AX/c7N
-3r+tXQKBTh1FdBN8rsRJexFjxv9eCPVmZf/EXI96rNFgmGuEWiB4eY940rv8rueNyRE2XsnNqcV/
-xF/fvg1WAnDbJMIyMLTlyNKRY3VQAudN3zv2ouqIFVsyBbCdlm8cOyDhB2iIMRlEwcgaiYHPhcHw
-N1kIIzvqUU0MZtXMA7RXAkycIJOsj0H22uysnDl6RmtIkZBdjoJozoOtPSdrJhhEdiML4MLWT/Yo
-O7Wmpsxyf51+EfIob0Fxk+5XfIFB9XVpEfuxV1b3qXFoZEuiLKmECUtoFWMOsMB+1s5fggbi5Qh2
-r/nXTpQNBWi4lPJbiufokROqf/e66XRB1XAEomghD98WrXEHnXgeCCWVzKUt8FJ+vFnIIB/94DbL
-t2ntTdCtkRHYGtL8YR5OCCQdm1P1v9XlcqZVrWbXbh9io+O1/VvF0uiDGYHUSCc0x2LACBku0QRQ
-dnHch64xG5jEmhdY/FG4SWcuTVkmbQgRuhj734XoBOkB0zmeyGgAlIz3YVzdsovRyDsdXlDqWyeL
-ubrxxEnWGVhjdxxt2PXfJazjM+a+d4LTJNCJLo8Njpfh/woDovG8UTnR4GFL4wJmNh5lLYrkUsuY
-SutG/kYBSzi72eheujwNno6YabBozoPlX98A3K0ZQ0kIaF+A7QKGyjMhxuK70QdkfFBVhEJiL1qA
-TeXhj+GM+KfoYcfavpSaTR3kDaaT9qOJ55iFBNZT4LAkmWXa5UihJ0LdAvh8RSR16tscFXCPPV5r
-hIC1WBbCi9Vd3dgVkuVQ4p33dl6jLSXqCKlGaASeTT5E6OrK7BZIuYLsFhV0H5EUS8DgXbhxOs/1
-6HG+cx8lnvn0GmD6e1kbo2mL4fJLtOAP29oYAn0bF1C2tlrSYCDbR//XQ07nhUWT3JcpyFZEEQtA
-dT3+3ZQ1FToD8UVMajWxLm9oCTqOy4yju7FgXagYzv5pl9kmekwQdj5FTo4DXVS0YB7ykNnUgjJ9
-qNPMpRThk05jMubRoovn5sF/fDxUtKR6SlhT3VcFXpjvmGL7nPviyS5AhJK1CehwSgEir/sZptLE
-z2lOmPyCaFSoNRRiPWmRvw3O+6TspS01NKEFK/ZN3FHu7YqZDqVX+5XevbeoA76V1Q510lzM5I2s
-2pGXdaRj+YtqBoNqy2bw9V161ruJpTNKPUxd0s+r0SpMIleyDrTUZICWr9mcAKZgw1X4DUlH3N2F
-Z8fITMUJH4SDGq44rcqXY+WiZ+90xDDoDTvz8OcJV8ibLeF4ZGOa8R2WQe84renVVcJS5Usl1s86
-e4FmoWB90BDzZwd5+JaYDOVASykRBoIFU99SF7YhgPVbhiIopICFugye2eE1NVQG33lUCPYyi918
-W0896+GoDnYs1NmmEgwtJ68FYINrRtTXqBVOGksCp1EQKKYUHCWMZVCSiqZ5vlIJo0RUA0SHa9a8
-i43UPevuEW/491fBMwO13tkPtOeGyPXa7F92Hwta41B56CIf0PCNlspdaHwQHREq+cOxhy5lhRK/
-6yljzJYraDz4n8s9kSp6zWfXtAhQdM+V/Cgs5ND44HWhf+PwhfK/tzVy/Sd2Y/gLzrnM4diZxMzH
-alV5nUuo7unm8QXmJn5mdOvAGXyUU/pOQMRdEFoRa7+XX16W02gG0/c2ak+PwOVoE2qKWj7EB6tn
-f78UnsYdkb4EB8kVHDREVBt2bZXZyGecUiQBvdAKqrFO/41e1Uo1h8BDdg2EFmwf7NvCGgWq34by
-HrmhWJEToDjCUnYRpDVH6CIkPAndh2vfm9AYTkMHT6doQogrDGys3v3RuBlzQScAHlLXgcfSnUhN
-IOtbCUV4JlTp3e2b+90Ju+JSqMnYXiYdhbgJs0lZbKYspFZt6O4ZBe00YCjdgo4PTWzmoa9U9fD1
-7d+Rc8qt2TMQ02dHQrCd/dTbLmppFiOsZ+zK9UP25x5Ewflou20T5+2MvLtr6OZXDU6IDCDhEcd6
-pWbFMQC5xWumkth8gHyamWo4tdNIfcaq1i23PN8uvDvmoRkY1QJ2poxYv+KBrOpR/jcplws/1r0b
-n0gHztBNt8NtUeQ4Wj7KaBP/2XoPQuNtoxoy/g3Qsa9TcS16wu9u/w7s+9why1+D4gSNojZTWIP5
-aRULprvjAMMQG7io7slxqGYbZ1yzl7EpksLQ930SDHDeW2Fp37fksOuI4QMAvBfKTI1z+La0Aa/S
-V3ikQNY+BRiWPySo1XtgiqUTPw5aFZrCMEWesE4DD7k6QrRrvvz68tLBVMWajn59epR6TE3SvHbB
-HnQKuSeRCirARajfb61BxZxkig4O2bVvbRER50qAY2Morwu67BNqUnkEKwmPm9u63v6eE8vbNl5a
-IoBMsOJlCwK+7ZNRNxA2Lx2aGGwkXTijVKqFkQndiUZ4aGxLU3FxvIg/82G46lcJ3Ewrgp7dxT6y
-GlY8kJkGtZ1nkdNc5lXuHkWv0kxx5spGLWAwaFdGAcLXUeheiBRPtKAuwO/BT/WHFoaMDbEeH8V7
-yMZngt98hqQoP4OaCS6uHCSbh3n3lHugr6nA/8z+TjZEY3TSnUWTtNEbCl57vcqw0gg1VqXwEtDb
-/bZejdipsskcK7aedJm8bQziUAAqIRqvkykAYPgoqSuFWcl39DZV0pzYanOcHt/O3MqqiKasIPDp
-UXBRw3kMgFvckssNSmPfi4jh3kGUGEzV0fwmU8RnOZMrl531MZiSTRLDO3MhF6Bru9mxmUH64wY7
-quPwHJFJAiHNWE4XLPHKfRPoJrdVnKTdgnpMzMbxLfMn7DYo3dARmtV1iQ/puM8sYMligEEgBkWM
-c668JKWjyyBbE9qnb2ZAu39aMP4q/UGsFgErH44GS8ldHkhsjwfSqDzArAEd8vzzrhH+aV5cMXiV
-MI+7SAI1Gd9Qg7iuE92jFtRx53CQZ9r1EGq4jeUeG9zq9W5A64mB/hTfF/ZAQxUHJvHyEU+KiqrR
-XOBqAfqyPH6jaXrjSR+AIReB0MT12ktYQwdGNmS5U2C5NiozLM/FEeeeHO9148XhtxW9+7xDH/mA
-S/UPvNIps4tNSj+UovQODRXVgRkJPlVVS3Igx9LOAoTBWGXdILSGARCMoLI/RVsN94rbH723VbRt
-fdbMrZphRStndfzXRgn2UXuxoNeAndGlIhqyyCpcr84ieTLy6IFGEQqqiYyuPDobubLQbDmTd96D
-2Rlrh0AZdqOwAVJSvDRlmuEx/1z0lho7kLNChXrJq4moPrHxMyH37Qt1OqPPQiolD8pA6xgq7Fnl
-lyqLHcc+v4TQ6cnSoXvHxROWwJXFkXjuzgs6R3t7LfM/jc4mo/Qhcp18hTC2tBijB1iJ6Mvou3Rj
-0hXJwtu2SrDNmmOGEhzaa94illIzrJ6OO1tGz+Bqv/5IETP0m6ClaBbFmZCdhRm0MS7CeeEIBRWl
-6UatoYf8mCu5x4JhURFqeBkCGlY4n3t1KxrQ3jZycylSya1E9yZrq10TJfPXJL5+UPPQ3PojJlrh
-H3RnQbEJpA6MFLd2YG1vAJtuCVdcQKSicbNXShh035gXDrjwAv1ukxQBGHJnqaUj3peDask+MFoL
-fG/jTwLciC0beoFyK+YjqmBeJ6Oj8BVUad6Lggl5JjaFlXfanoOtzgNDM8unU+5fClAB3u3xCkQT
-zIjlHfRfG7Mh5YyYcA5+B88rZRrX4DLrdSrcg3CfygUm5oq+eIfu3LQcrHd4WhOSLH7JhSM0b09E
-+l6KwFxFkt0QMAUhJXzQA2q0LUEHGn2MbmgarGCFud6lYwkTO7JwDkzxzu5b6slTWn4yg/u444Dy
-JgFhuExlPjPW7RIISupNc1w3ev6MuSp/ak/+KycDlJgVKIVCz2gttUSQ7uTMp+QPVFHesjGiPuvn
-FEBG3SZIjl8zOARAfjsRK7Zz1sJC8KsXTR/aweJbRY+m6xVjAUfi08cyjMYibWKqtzgs/Oa/AFzz
-2C2WUM1nPUMJugCtZwTeuuifxsRJqG8UY/JPDN6lzK4cJmI+9t1akZ+DO3BZIUJDHPqmc1g+GW6l
-tjcI9V/XbjnOrNNS2FIwDqygS0q7zLrUF6eJKGcJLPyLdfFZB3G7dTLgQDh/rYvUoksdL2R51ipN
-7/JomZymbYzk+SdqERTUo6FqTc1VyZhgnAC4RoyePqzuOlM3wWGcc9gWpis2T/dGk+mrSDIBbXJr
-r7F1rkac2acDq/eLr88nrNO2+c0mWMPKS9Bo0hy7EvXH7AJQOYaU2wiPJMbOb7FQetTC3Yn8cjBP
-/nLmLTGLaqwAsCR6QgS8toDuiwU6urb/qI5IxWvEfPKAI3tZRPc/KcoTNS8MkXy0jtpNHaSUUEy1
-5DlnG5sBLQ2O3Cpih3QfYrsajgimEDZztkmll8vhhT+iFwsxUXLPwyAvezM4UD0xW3sGefT2LsXy
-87SVPgbIwXg0RQmlBQfgb7vRtdtWcAMCeUhmAH8x/1jL3GXtPMXihbYYqPIaNqWcKIbhC1z+Kynz
-ANiLOEZx32pSm/10P1rpEqn5yORIKhgsmMpLvncPzA5eUR5svXyBmdSq/7y8Bn5BphLKSdt+knM9
-PK/c4hl9YcSRy8Jz55cEDN5HlMckHjQmH29A6JOnKnGGL0PuvOmnja+Ar0eGzR2UHgKHFLDwE5kL
-E2wsEPfEkw0nqSmoCGZfXA8xMb6USv6d4TiCBKi5+UId34B0RHUdr2rw2fxDRZSswERDnxbkGC/+
-TOpElNQbdaZC2X1guHb0O+gEHv9cFX3kFZcY6zmBuPHcBzWA/NFvwDWHcnqHLuz4yPhaMCblJ8IH
-HCTf7mjjzPAcW+AYU0l+xy/EyLzF+O15JNKyPLn4lzj2Hckdcp8Gx92qFHdfTA+u1BxmKg7odJqU
-QogYBA7vrT7hAZrCVWp++GamS5kLfqEizqaKOR6unLJKUUxSf6YepkanKnHnRbGhvbFx6LlZ8LHa
-WPyEQnB1Ah0PevBDXh/RkxbMNwvL1P8PdpwKIGt6vBqlCxO+Hv+avjRAckY6CggnvnN4CnErF24w
-/aCUergOC1IhAWOkKH13Z/gihIsZatxh3BsFLYazYDBecmBAf+dDkdkZpyTqJ1+KlWaRYt/BpFRz
-3mlo4SnWj57VpfVq6zXuRPVjshmEVHuM30ctTHxMQAGi5GqOi8Dgd44b/3OFLyu88rbeG4cPFegQ
-r+NpyZPOrCglG4Yjer35ilgEb2Fs00YLcFQNiVyE0ywCQsew/0pxndsixkveJBUB4/TiM2ETHsi5
-yV46FmvY69GcnylDKHaiNk7YnwdMAtdum8UTkNJhp9pl9iV0iI9SSYkpeZ93Mz7kRUE461q94yzS
-2Cd0qfqh3BHLM5DWpd3P0JvdtD1ZwhvKP5mBk8nnhAuV8fjb4qEoG2E7E8+D4Aaa7TRPa2x/UCxW
-ivCvKSr+P29NxPiPO6cGIHuBFZyJUk0G5oG11xEnBYc+TRYQwSXpI5JS6VkLmEWAWzFSQGeB/kzA
-S0Wm1WFepo+BsN2tvsqy4JXsHICbbo/IstWK433ZHz++izSiRXVUIL4j7AyxG9eRDeK8HAPpVIdM
-+aB4HaIxoi9BbxNsvJuFjw1UCyzeZwvEt3il7gsfXaLVvy2G6YYqgPqeIfi2O8BeoYa8F4FOn+N+
-6yrV1AzBVHnFuurGfo+2TxFFIy74LXU7QQj4WFeKQdWDfH7sc9w0BzY2pEAJVLLJ/2VpRfj3JyWW
-juaZF4HL09bPnB03E+fMSTKqYebsPtiGnD4hOf8LzZVsV8ro5+O3nJwCtm6PqvazHTh2ur4SfwN6
-g+sL6PdZwrHxKgi4A4BtROO9/8tEQ6zHdwyzF4d/gviOrYHkC+8dkDPm0/lCnb0J5yfoGJpseFPr
-Wm7s+0RhKwkVjzG0l+jliBuc9PnRxMiyKKBzy8RLdTeq5h/A5HxUsRj5j+0K163pweM1OA1xK9+E
-1xU/O0SaOq3JANuJSHhHT+1aAYIhaX6Mnmgklm3Xjq869k8kd9X8QWjmt43CNN8yqW6oJcWVA10o
-CT5zR5dfePqyjhxcOep0sDdge0xO4YaZsL/OdvZ62yuSQfbsBjMEqxP3TMXBVrXbeV8C1LZf3j3y
-pa59mgKf8Ycc4HL7nue7OarSOppkEeno3wz01+1/rKw8VQ+nxQ7bv7dhe+7NUsZQ9jjph788ohzy
-mOjwUCZ5D56EZ2/bLbRyQRrsSgDU3ScqLTQqiGvj3c7dYqBoQERN+nEYhMg6l+5gCMDgCJL+YQkL
-AjwqCklX4tjsl/hwDUSeHYKAvTRZBLRSNnjhfclJeXZFCdwaTspmUPWv0I+XtxEkRyMfGCuZJngx
-5kg2Butr87SAhrn5soj4FQgu4VYWJNa65/oETpEjBjB/1XcISNe4/y8qSkYkDvBxoZS2i64IXnqm
-QLC5xE4O0P236SqE6VrZ32q2J+InKq4DqSTRPTG2IYZLtSYYtWJ1o6mcs2Y7h+aweIKG525rwDgS
-15Rz3E1sEeBKQPMq+BTY4BS5ZEwFGU6BVXyaSggLh/J3pYKd5oBAVgkE+qNVthkmtPymm5QVmuGY
-5tuFM2xu6N3M09/Jb7QJUa4JqCw+V8wkJJBqFM1qM1GjL6Rvs8q9yPkf5L1CQZb7BJp1eD/SqZKI
-uA68qgKoK6CAze7iIc41OmEEuiLgfvIbo38IsutYa1mVhZxKhrh2eE71RV/luLMAa6+DwtHlrzln
-WKqenx92rZeBp6dvaUMp7tU1TN9Wq9yAke73r+2DzJHgK8EoshWO0u8RfMQRHjP0SUJvczEnDXGo
-cd2OK6I7T9f7yhwTJ1BFBLmmwsmcky6jRRQ5EoXo/JBw7diPk7HnYJa9pE21nioem8Jmb2jJMV+M
-wJTZUFrdx/Gg7m1uxZs5KwgoTI14BNh+5zOMDtMxh6p6fHM4xrK0IlLW2Iwd2M+1cx20Se0Xycre
-TBBrH8IV7ElVKH7wEaFLmma1ut6XScWO3wRW4ZkapqJcMsvRVMtGac4N7bz3YPiEehEyRDSKEOEI
-qgmMQ6njmdU77/Cr2kmFAfEKxzYyVDBDk5a32Tax4Z3Y8KgxWKHERRUUNgpw9hi1DpYiu2Ni//Js
-ygQ3g/WIKvuWCjuio4uDrkZhqYXw3Tv/TgLOwaei0Iymc/HavRZo+7DnxIRJ/zN/SjusC6XR1/2/
-U/ktMM82n1uc41wkmnbdfjINBgB6insJnd0NToo3SwNkp7lRsSlTxM1pYBrNZljKoDIL3dziVPIM
-UC3jWV7Wj3OVJCpX41ivPhcgPaEni5FbLoA5XpZoAvNTs0M4ExAL1N6dezVW6umVrl9GFftLXicd
-GpSTv2JkJf/o5k4Hj3Fqplb4YcXpJI36WM5eSUX1X4e/y9NMS6xKuVTUpx2PeE9zVu7sjFhXukvh
-xh8QBqRhOyOIUHofa+jITRJE0RrTWOr0FJuYI0cGO2Qrjezb3dhfd+SiSK5KeQCFIBlPdIIIboxn
-r2tmDMBD+zKl/7OJtl+llRbEiUxOHObPr7igdu41ib26/3SLY//u+KQ1JF6KUW46s7o64q9LgZRZ
-R8PCkO9qA76UunMaJfd8TBLdjjpD1hYlaxSFltRWYurydO9xWCNMcFK63H5FRv7+bJyMNVyVAY6C
-SNhNI5ktgkd8HuNoGBqm2NUnsKBMzauTA4/S2Th8cKen48paGjbedR52AZedkCrU1CJG3kxMyvZR
-g5fFcEarAijxkfRxdllqklOSC8xheagj7ktSdgtCslJy8Cxg1XmUexW0A/G4oknzkapOv/NtCOP1
-2eGQmgnwXshQvVdGdrrm0VBvvOApYhqc7aiNUb3JbriwrhMBVGaP5nOy3JoDtl9s49GigvAd4SuT
-ukXPaQiBxUfvmRYGghB2Lbk4+5KBz0Ey3/5+afvh9PpbtFuIgy8Rm5/dT6WmnPU3Tc2SwPN6Qh7h
-I12zE03XhBy1f8qilBOeeyB15Y8JQRUcgvb23oI4joKcixjKqvz8ThqH0tft1vOKRXtA+9oOFycS
-DhZnR3com7F3FHS0tRSFN0VuY8CgOnBjGdiGUIQTyIhAS8awHrgQ4RLhxHwsXMP2IeIdY6XoBJ6N
-XzETF0CDzNi+s4hvGNongulQGSOT/Y8fUp00aCdR9OItnpFwYhieuJn7sMzQGJSG2lb1qXXJgKgI
-DT5KidxAdE6dvUs1VjxBF/Y7fk+cschYtt4XC5WhvaTML4swgKtbm73qNUBHHaO2UL/6L1LzHeui
-0KJ7/NJpgT/aB42ElS793KQq6tfXUPveL5IKWhp+rXyNR8QqahbtxdOsFhBQ9/hVrKvCa+uEVOER
-ieR/Zczy+TXdqbpq2Qo8UI2pj7OVU5g3hM9Yiv9mMryWTt8lHyRVgsK/m7/ABQNy+A4dJ0z2Giz2
-jXn1tu4ObHflEkUUQwKGagg03Ap5pHv57VcaCmS8cgkhvIh93+Hp66OL6u9/gJa4NHGw9zoAsX7r
-Xyl/YctBXFrBLMIE5n547wn9mc9CiLVjosWuZeQXesW0e6sqR4EZuuKIWL8PKH0etsX2TeQmQaJx
-JxcdNYP6WmawvQcuRpAY1qW87VonYk4M2qcL+mPqIxJq0omTZdPuz6jpnmIrKRToDDwo7qudnldY
-1zfRdtOtig2jPpp9T8QqWHnNnA3TPmI02Md2CIFGLcsYwObrcbfthYddbQfU9u7asxYU4xkuNT9K
-rM+tUVIp+Xvog30+LYi4WTXNWnOWA+lLeDg/JBUmFgAKLvY6ijgriRlXf93n6UjKLon9sa155v00
-j3C0/6ua9T4Zb/xgCAwOorPlKTg4t4VuvNbECL+VN7B1dg/4E7z9rxcsN09cI8IaBsZuihnlCnKB
-cqWmoRH18XtBWaOjLPLpmmjqWtZ3yoXDI14eCZFbkVCih+NJ6y55vYLpObU9GsvhSuGFecEgk0MW
-YYNjv+sWaHfMpCARsdtAGlKnBjeWLTtqdo2xBqxmy2khaG4nkZDJF33E44satGNW7/4T5lT4qHPq
-B2qevc8gYfksap5VKWY/GpV5JSaGJH2lF6X6Cs9ln0//E951CCLvVhVRTUrsUEAFmsQ2HLcAdy3S
-rOBlVYgweI9dWVEW76WhjdEOtQRI9NgTuL+DDSy0/GamHUTAghCfP8+4BjpjXFEgj4cj+9rgZuh5
-VwyxROevtDf3DmkdK84KDg8CYN2zwd1e8cpvWHX0BXAxLzt9BSYzJun/pF3ofWXjKHFjrqCujluX
-5eZvwgZ7yfgtMiNXJItWMyr5supqQS6Oos/56rNY02WjrJ/1iTSTuOKZT9CM+/mJOlMr17FFTPJY
-aR4G0lDC2u5DiV/boUXEIWLb55m7BMndMgOQuNY/WsGIvIbp7GobUAm1c8EMwOTN1a+DP8PZvvpy
-nJCwi/1G20nIQUmh4k+wpIILPUdvOKZ0LDww7Dz5bqctbctX7i7gDZXMZMqAzGJVyd89J8n/TOXk
-9zXjrOoo4UgxCUMFc1znB4c+C/rG5mcprZbu7lhlVJyi8FUMJYBsLd6uF38s8BmigIDP2Xa/7fSI
-VTMVQbXiWOA1afx1z8LbDTzJE7hUKkqswcmuedJKqDe48gWFkzon5MfgItdzINn6ZGk9YSRjGkzb
-C/Jd3nqxQR9t0kPjU6x4C9FUAcJLdpIjY0KB87fu2o0CkcVyoaPHeHt3xHOtQec8mHoG7kNXhV2V
-PV6GWQffS9e8h179hvbPJXaOv9gDzLf9CTp7uRq0xD4905P/7BuTNbnDH7j0ofLzxbh9RmKDxuuu
-grT7lEU+k6M1LIhKnlT6f6+mvf3rvrNlXp+d6Atk8myoopTOycu4vUaurAmxbIrMkDxjuz7ZjLYG
-sLo3I/noClWJ8qpvHgsjOGnbLlUwbsx4I85qKB9O+TjEp8TbK0//Z6GvLphvM0n6sZq9G6yQwmg/
-28elQN4nOTCAYjJwF/r0WtZHNP7dKHr0XUf2jM6Cx8gyG+uGEBsGql5snppHWuPzQAmUBYar47WP
-fycSPMpcUmownb1HrqKKCFyP9xIHUjpkILk2CHQQRyTA+2JyZUqUCNFD6SyAk4OrLxCwrKdc++jo
-MQ1+oV0WFcb8bDqRzGprhXeVcErGzZ15VcwlqcvNoLAM0eQ4DXiL64Slh2sBipAQ9cuiNh5d8KKi
-H9yyBrWg2bNRJDa+lspIPQppcWe5F1YA0iPDNEMFmipeIX04Zu4A1QmPyXC2tc34alaBnktcVLRt
-Zktp5KYB3zgHxr3mBGFVs1guGZZGjtwEb6fIWYp3FL6ZZIXKRQte0S2MoYF3FT3xS5l7i+d9K6zT
-NGpK7XoIjplLCAZHrsyMtUx+MFcqejYpeqljcN7t929OB/t+P/PFFX1+PGu951FG2cAA0x2PPabK
-iUNLgXQbbdhX9Au9wlb/6UuR6r8TXXnhLQ0eUgQc4D3faF4RxbDf7RZyzFE9xc9XXyeFA/Rt5+OC
-77Tp72n2EUHdZbEMGsmnpaxobDIHdGYA6Rh93GgyC0h6AO7KEgYY4GM1icMD7xN3XzgvUKB0L5A8
-YkAb471hUZP0sIwOpI/aXNjuzfdgF+DPOMU4c9ONhFeQzyRDpKIlVfSGyjJMf+HlW1UYiGlIEoDf
-3IyRzdOfIT9e8XDLpi4mmr7bgknf9poxa1TDo8IJUWPN5l4e+yx6M0uK6g19lbWiyRQI820lw0Sz
-fCofOVf7kJG+zqf9d1vtkJveOk6LJx+pcRUvNMHm/wVVRStbTVRTeL18b1xfYAQIuXauI7RW5DyW
-JEYCjGmZPStcWghSk+ptqAGN3Z7HLdiImIt+DSDEQD1bEXWVj2HNJaGOEYZogiq9eq0l+HOthV+I
-UKSO5DjYhv5K3DH+y85wSnVngSzWd3X0NYc6PIOR/W9SluUdSvttJSXjitRYk2d1KAHcqFwAo7dZ
-Tibu56kjYhQZhs3ABS1D6RqWFqZFvABq9htgRoMC35FMFc+K6NmXoeUkg0RcU+FPryYLI8SVABcL
-4B/CQVbI13KU0RrU2lz/fyJ0Meg3j7H0eBXQQSm1rfsKBX8HgQz28cWu1x8/AlMePYFQUtu8hdEb
-0q4MSeZtWky1CxT+bvHXoUznSAdsz1TbLji7MFZy2YlYpuORU5uVbdyg39vG/YmgI7Ydu5dlM4by
-jy39I4JbenyF7RQJd/oxmxnsSu/C9U7yULvbDhVTyuNxLB+qxqTj/u5LmMyabK0VO6CdDYo7W0HE
-yxcoksI/MlRB6kdz1+/bP6PHLdYxmK/P45O3FwnqHk6BZnwCSqisbY5RUWjcjwDwwRa3cxtAeoAb
-ARAhY7TZklGrAb6KJGSmH5xdaje9+DBNqD5pwcYXpTs2mAaB1OfEn1mmWiCI3sxwH4Abp0Kdnsvl
-wsLIJcbt8Ch9sPpW+qHB8BrYz1GSac2/wKcoKSh7nj8cDvuBC897n48+GQ3oBkfR9jAQCApsnPq6
-ywdqz8ZWcwrUrkbdhRAHBDy2jAyY9hIb7ZOAP+FnUPqdW73ghzG8eMLkXBZQInvqxCy5JrODF9TE
-8LLkAHnQF4Oxv5P+qX8L7NpsRvRoEg6HQzJBYVJf6k8l2J2e2aI2z82vDzmzX93YEBXzEEedswmY
-b0uY7twOMydzQg/wMwKa34hx3EIxdww4aNMkWbTXfVUgAqqyL3eQX79pW1lIXMX550jAEGXpn1U+
-t0cnR8lZjI9M6FAvwe6nXeVOiDXf285iHRiYxuxRmHDRj6Y5lFdX7/JFZVQm7VhyWC0i7MLSVyyT
-jxPLjyRJQ/wjsOIR05d6VsAwU/vNE7XwqaugowkTIL8DhHz/B+gukAYXSUu5xKPtK20Hyzwfo7p2
-M5HdwhvbK/H/l/LqwYbeV3tsMaDd+g3V//mymifrvTrv0TTvOCxCO4WMBOqYFXNsJRWn3cMhAWng
-aEdYMwhxxGvFdNjMk5pVHv3PhHKAEfZGEBHyYz1qXYIA4/a/8zUEKBaaWC+YfgQ8dhuv1JMFPNi2
-JnAyWx87P7zBKIGjMeeEJXMqJ5cS00gwFwO+3e04zuCUFOBdegs7opL1xSDo+sl/2tzDEHtMewHh
-w+luadMY4Y627WkXneoV3OB75Q2lin7Tou+hY7cH4LRruELgh6eqLXTbCEMXNRZ5SNxSBowPlzbT
-yJ1UymkuwRbDFHI0mu9m5vkH0Ab4pZeUMoA+imQTuTg70iQWGobCFOujW3qEIpLSeMcYw5k9Xc43
-6s78WHKpbD5BzpytUclMwOZwzf+oX+vWCtnD/8EfQCgyha27lrdrzi/8ls5ZIjt4MR641eh6cpVa
-4uNcqZuppkj/a6knpBjzvfVZ9pfvWRxt26NxKlerGiJFSIUchwR6KL2vk2zI2icdg3zhdfbUzF7b
-+Yz3hbbiueAZIzyZkaq8vnlqMjRC/lQzoxHOFlQiv32GYcPGBkzjRBfn82OP2bYAi+/wCu8LHcc6
-9U3/9q6lDaRaG+i3dYQ0hfvnDR250qZuy0QP/P+72QW7MTdgG91gPRYHGab6BUZDl+hrURE/W5Ia
-NbxY1XGDYOKtJFAnJQCuDkqXyreNEoMeVUwmovvJBm++qTjPF5tn2grJzm9Z5T1dwlqMzq6sc0f6
-fZXdwknAdYz9N5FpTvCF22IdNQusiZU+YMLAkAojuu6ZSI2gipfpqsXXFbxaUhn0kaiPoHByCpPk
-VrzNvhzGCoU1A3dUJe6LpJf3Elt6B//4txEW6qaG85uTfXjaaVsBTjlCq44MQ3K7AT+UN+7sj2LI
-mOZdqI5a24KKBG704gxB6dq3sXYT4DtP+eB0YcjUfr7B2ld4Akp+/kJbQ4ZZHW2VuMkX3siBFmL2
-ut42BMjwUoq7/lM6jf1m/8CgB2vga6SkBTheMdguEkIzUOzBzmjtQbrzZIuLMRd0gnrpJR+s2EBQ
-TSSpAH/vIifB+ba+hOGm66TwyPg/ciSvFHiLHsTQyI0Ag3qqYlgGw75mD6rhAecQ1+40BlqqKnPu
-0kqohrzCMjpmSnaW3I2dOq63TYCSb/l2eI1j1sWo/tt/Ydt6lX8+dm/EKq2wiY21WSWBZNQ+GEZz
-97LWjAxA+ThnyLB4lu+cvi+wgO2hhVOvHxNTSLp4l1aUPTgbI1/gnHCI5cV5Vf4Y88ECUELGCBkO
-1EAZjYzqUT/OWwWyk60VDKbnDcLXWziUdqfik6LSYx4qcWJAnfC5daixQdwT0z1e/hoR2pZUJvZt
-7PMUkVHKXIUIMgkjzKQIqAgAxWtB4aZTEQZEf9x5b+ZSVJVMYSMg5st/+nuSObG0AiAqCKD/IxQx
-RTOXpDVhlAIrqakbMiUAyvcYj9/SI9z4QSwKhkrJ6EZYc5PStFDPlZl+/w9PE9SZlTZ9FGSp5Yb8
-sEB6vyPO3PTv0YUtdSpVws8joMQRWYLyEk5eNgmAcV3IgJ9ciC+XjyXU/u8sE6ayNQtCcQI1BQPi
-zgs4RQxwC8GeFur4ndOKchvPbeXQJYX0+oXTX0hGjTN7ou6XJGpE3azkEuPQT2lz4h+io0YG6V4N
-K+qdEr97OqmzyN4QSegOwy8/J/kZxz6roQkVhCwpC97i8kqNXhGqx+Xxv0sC4rswCvvuZtJglJhs
-njNmDCVAsUQjlqkTx6ORKapL45J0sdV2WL69ojSmKLoQ1tTpmYlkWvpbhZXY/34Leipv+KmOus0T
-HdP8WGxcLlDggX2MsASt0hzCTzpX1Dnp7m8Hqer54KrK37hKbO4D1AD9v5JK7V38mPuaxpXOy0pS
-1AVsFHABrZvvAz523WFeWzYa+aON1x/D3l8ZgT4JnKbBhQuF0pYWJtk09+n2QGFEFynFMEPc0KdA
-+oCHd09GKQTItqcMkKkYVxbOn4ecAJ/g6xAmn2r6FWuWMVWUgMOAkTSxCH/HQkex+ghlnVLQTOmi
-prEyM9ZsOIZf06cQIwJqOmcTc4t+o8fISq3p4cbQESa8E4fqDuwBq81EY2icTCC7FJmRLo6giigN
-sZjyxPvs6XuxSspMgKGY+Fp9FKxMGfkrV+frI4RNEcjcUz4eoPzODsrfK+YQAPijoC/duK8Vk6kb
-XigOSe0Bp/GcZsQ9e5IgDBqwsZf9ToPT9nQ3KLRJCw9Y8WuOHUG7Z8t7iPf8bVI0l6uN8Sc0maUq
-Y7XSYDkKNePwk93+Cg0150dMM629AXyBzYxfNqAz10HNqpd14seL71Y9D8uM0ceFuY0FAxvfQTKb
-RDNiu1P8UxWADs36czxdpG3uoNiFXDlXmsEC+2rQQjv9nHkUSRu56jaCyH29SEtJiFAvWHA+LPoP
-j3X9sUcDSX3Tl64bYJuo9ViEbKFR8X8b9HF8wW7GbyB7UFIpcHz3lm1ywFJzkq7imkpSbSlvDs8r
-RFaaGARr1poDpkejdIkRR9VOM8IRQtWzzuqajKRkQZaqWdNxH56ItBNgaiTvY83oPmcTW1uAlch5
-HnSjwdkNqchflII/NyiNYzMfyk8CH9LSnimcDc2o3jYZDc6emEmLUWwH8dQJuZZh8im97QgaIEaP
-lD/HRXhb3bfmyudTVwaXwLq/7gmr7wcANIa+1T8ka16p7ACRtltPbnLbXe06+sVzDsQCf+AS2eT7
-YSawar406hEeGSS9vZ2gGWTNOcME3LEitOKn8O+lAMwoUawOI1UGhjvfw/wIRHJukbSssmUoGQZI
-rVVUBN5JMTqJmq1BCpSbowFwPw9XRdFckpJk5gggxC3Nf77d3ZxsdauZP0O2yaPwFco139wMGs7I
-i2aiMvKaHCRe2P6HCx+T04nu2ELHKNvRp4ZJQP/KWcuNmTDtQj11DmuKmHWdgJcAw2ghpqPelxle
-Hsuq9VV0r7ExQF5Zx3hBzW7y4yfaeSihaMArajtMG1k5FsDxeGfk3kdWtYGkLxCNfCCD3Tg3M+nL
-t5lOBktBmn01BKmeC/7kyzZ0C78KEiHeNA1uUmYUtKwCi+V9PJj7LB92a2UrTcq4MeCDxOsPRoeP
-E+GAXYMYjjw3Gz1U3O2UPGlnEeZ2ig9zIdXv4kjmiD/n7v/oPULvSg5hfLA44cAfGtw/WLX9+7sZ
-sol+THk7J+s44rU3ncSzJi+A74MV92cFF+1+P0gurmDbPDySweh86XAjhqwoFWDedU485Src17uO
-i2EirjYqSqczu7KBPGry++o1aafm4/O+1L7ti2my5fAA4hJdXRhWgnHmkfWwq0FsBMkshvPohPe6
-9fqvZbXyvzYMiqVXpnDOlZgIXWxeCoDljDmAVEacBeuCYYYywDHHk8a6qhNCDlbmDXQ69rMEXvvX
-tdXCBFL0DaqWCdKplgiEpVqfzKaHTjIAlvBdEpFxHoTDjnQyOMrRhc3bH/5MY7n6KfBMZIPZXt7Z
-3PgWAAF53XM2OUaLN6v573SDR87khdlz08MaE1bRDriUO/37fXvXnuC8stVTZjDhUoMEfKIAZyCL
-zEZHhpQUX7kzA9Bn4pZtGZT2wSeOQV/roTMhbDOl2v17c75qDAzgf9JNTzdXSAJctj3gQuyqBqeP
-ZqckmOg6oTU/9gWRQIWDEV90eiae+K69OdVzLdecxkKHn/nfYJ3QuNgsXV5n1lqgqnjYSI47OCVb
-6th73NoGUyqbGr8RK8dBN2Rs6K8Ecu2XS1lcvLyVkdJWn6m2wzfZGjeB8tVNgqEW7TTi7VQFWVvX
-oVhGEbuVxbMozc1Q8WAizRRZW92eDK1BRdcBcb2xuMauhrSyr7T5wsZu4UYD5DIQd3FCmAA6WFQu
-NxJpSIpu29DDFctXPfmQxPNlmU9ursRZegq85m4Oauycy8+hj/PuJ52M3dFQ5y8+8ykrAgd6U9Yt
-QlJcazkjJbr43VM+OhfXcZGvErUUpNzhW37VPzEchMgOSCcsqVb+grDHhhQ8NKfVpjgaZhU70U3y
-yDR6Z2PHMxXHYpPKkN+7w8kFdyU1+doYD9Q/nVifMgyKwdKwvj//nfyMbwfmJXtbbkcFKwvfjFO4
-MQHTaAnjAOLlnSd/lcA+Nc+Nt/UO6MkI0H0/HExfbVrv5AYnPGelBv5HzQoT2mU42Ihw2z1Sx1Qi
-oFK9K7WBV7JFspzSAfA7HswjwsGIV8l5c6ZpX6BE2iZ0St+dDHTqgets/jzVJzsdlmPnhrvMBMPS
-nMtt7ID4n690jtFRYeaAzhnFqgMOmJ5LvQISCVXnRP8ckMKL9bEPyv7wJxoZ80ed+6tpN6W549ao
-oI668nfR5+kJq6mUyLrm2ChZyqCEOsu4pTVp1MvnPSySLx82Aobl2OjAfHiPq2idicWaqWr8eMhY
-DbO893eAV5Rtlv1dqHHZlvIzsKsHmDt19XerPqgz/lLu3SCpICIA5Nr6DsqA4h94/gjacn0mUkoC
-iCPdxixRig3KRt4imB2tax2BjSCVTTxOMSxoS2SnsPwfgBLd7ITzsoChJhU0Gk5e1Wexyi408gLZ
-7rhxHIrr9AOmK5GQX4s+Q/J17U7kA6Is2VjT/cScSkoORtfIU/+y5L3Kx8LnoiJQsfsEfDWBxixI
-PwwGeSXN+2oqwDqCM/zoH7Ex6X2YjRGpui2dX6JJ+iNEz9IzO2NJ1TMbuikOQaaxS6hGo0cOmgW/
-Dx8QklfFZWDrLRE/e7CCLsIrmQTX6LRBYCezc0P+0ykV45RwCIEDr2yuB9mYJV+3Bv8U92kanlDX
-F3nsNj/ZjQ4NaNm4X3AjGVj/6P+cIUGMp8gTVrwV+oZMlLPn45YvdRRFgN1+PjbJN+ev0YawDst4
-/XpmZcOqDK5VPUDaZTOiX6cGpUOeYhd1STcL1/fs8PIc4mpv5WGpu7TCsbZvj+GmaMnJPKL1zOZQ
-ZYLR3BwFocceyYEAxNklC/6d2NhWLETEk11btsR9MgSxATmAiBcnTvf6Tn/YSDEFlleIIKFtj9am
-BERSKBenCGzXvSuHqJr4ThbASUpve9knRsiGENY87tvYmGOF015Oni7g+nbLwClzj8wCenzP1l75
-a7JKsQi/A94ns0Hp2t2UiZtd+iXJ655GfJRIk9cH8cs5gSd1Gwsicclj1gPBpMdwg4MXC9vI/P14
-LvrGrzf9/BguVDOZCRmZS5X/9UaxzdBwH7tG9O0b5pnuxTU/9TXYFAr8pu487ai20LPuZSZAIMt7
-x0+y8PKZh4g18V6w/G61tR0cje4ND4LxKWilBp+5Rlg0YnVQUQKCDUxTch1soncuzaEzRmLa8uqd
-SE4W82dBytM9DxLA5aQj53qOdXpEVO0vQP/EJiijQ4kbNFAqtC67ty8oaR/1msUXHT8hDQGb3Oc+
-LPiCDDznMahV7YIsptZ9jCnvng/eP8nHNmMsHzOI7/KWH02cHyZRgldg98mMTTYFM6P/iI5emgAb
-1EBaIsEg6WTboXlynZ12iHb1VFEHaP4mrH6rOjczee9ofgvPFCYz79KxBTznSNDcSucOpOWlxxIq
-966c2cUpTiEXdXPft61q5YrMYXFuO6ga6MS9q6GZMnHzmNbP0oTq5ETwPsSKZ7NTDkjPNTI59SFN
-RzmCLbUdvnq0u3Ejxk8PoJHnjvo8yY5/1mvlaeYGZg6q3ncpd4IRSvVgJuALk4JR4fxXenMKsYX9
-hK5DAh8mpeXTuR8MLKUAbXoxVlkvaw8XxuQMVxS3JL3pfIvDSQuKmjjBpjC8DnLT501Vux6PZZVs
-jliS2BqutCHNMVDD6qmhYXl2m4/VkIAylCMlOG0swm3IyJ4pRDiQJ3T+Nya7ZUtOHsHkzN+sM0sI
-5jvZi42+ZGv4VGEjQ2+vSAHdHOAOWVjzIqedBHZ1ZQpfYEjorPqd+WrrtGsQxN2K0jEGFYNUFI0f
-PwxMtgJ5/QYtghrRScAINaMOu/P9d8Y1csU8QPAaPP9+76D9yb3vUkHhqtV36iZiWzbTFkKBRxDF
-YqAj/85bsGK7B9Qx+UxNDHvkLoCbH53TaAGrk8VKDubelZfg4e8+U7Y62Uo3KEWjn668K0LNUqow
-j3+fZyLMVNSo+FrqB+nJqESXkg/O9LsRQhWUp2fdQYOye+abs4d0RxIRSAV9zYlJ74uYuAT27VmK
-HCzICohWZ+xgNGMk7vAEBZhZ7FeHUaPty72ZcNH/3Wjj+AjeCijIYtF0vzzVRz9e7ym5AeeWvxat
-INQvExS6RTZu4rT3i7LPXV3VaF7cxyTFbMRZ8hG/jBnS0WTafU18ZY1u7VXPx1O5pKv8kZApC63B
-OLWw+SHw+cCGKbR8d1a8TGjE30mtwM02qC8xwG+CZR7mZYH3mo+r2B5K0s4c0GOQ480K835AvfLg
-ABxJPOOjiY4h+foviXoqkk6bd6cb8Hm5puZ5k3ZLPtkBHGMlS1KFnMZB72lA4m6pQhRC3LpaBfo1
-hr9Vw72HE6iQ4bPy9xunACUi9NLuF3YsttiaRf0zx31XlVLYmLHn05t+zjDKJu/jFnvrB500i6Nk
-+uEx0V0iKUB0R5YATj7CJ9uZ+qf52a5sfqd29qsbhUvKk/nM5myOhQHv0MWQfEkolc/qwii5KTmz
-C9/SGv5lND5YSXdRvSrsKnQ42fW2WEGB5EeAtU0aALW66i59jQB6JIp7ehfKCsch0TGGQELfGLhC
-gIrkNjhW9A4xUoPQ/mVIvAjiggjdM8KWdzcPxmPXxS70cgANvJH53H2znvXM5IkQ5ztfH86V3Bpv
-Fh3ydLc8VkIMOld/UtG7bOt/fAq0lhyM9UKJQQLan9neVUK9iMd+7JONzopk62EKwCKrl9YvTJdF
-MJuf94Ch8HErrI/yMEvA9WJ1er92SibpRQC1bWkp9qnFA1yThEOadLSzjfy/AS5kqjrbHTA4LCkM
-jLURvnPY5VIMEwJBm9j4Gyx4Z99n9rUaj/XxlJI7O7BUhAqcaOvJrRzKro03IEZXBM3DbL06Itx3
-1AvvCD+fpONnKhy/gGwFJvNyc/ME+8wQ7TRGiJFXKKjlUaCD5/86Q0jh1mfzR87uafoogL5pQZtz
-Lnghbolu49JA+2EIf0oXS70fEUT0KpP8Y+zVr4jVULSU+zi2dkxU13d2xHBmHC6yduDYW271DAhq
-I/7sZFORgZnQEpWPzzArkaytLsZT2+qBL5H6STdFbgWHFMDA85fcWsbJJN04RyG9mkdXjEwC9CPy
-8deFeoKSgvfxdPo83DYcQxikboo7G5dZXhO0xEmboUeY4RVNJec+XiqUn+E6ShmClSH401AKDFiI
-NRSJEDXJ3zjhuMqN91kSaMGF+7D8AatQ8EkOOv8Uu6o7wFM5+J4c+Qy1EEmpUZSLAdvTkAZr9xV/
-l3T64+LrcDGNv8WzFDAHMltwuJjO93sfjLdgtGuxuaHaMXirvZomuNOiclSyibwSz7p2JQ/GEmdc
-ZUSX7Rsla+YagsRf9HBZmPxO+6uRcUcDfnw8zD24Y6Xz54qRwk7tp3MiFr8L+nVlU1U0fiQrZPZg
-18BbchRCHOZZdBI1WW0AwXXAvc+XytziJgWLlhwZALZnlqFGa8cbOiWypYf2gscNR2tP2IMrOenU
-qQsXhlK8UY/b6tgVp1AK5obfgA27R67gHKF60S21ctgDnVnLzvB34iP3wZJ8PXYr0lZUO2VZAQIA
-qK5Z20lY3ZvcKbIaZlvwHuk8gLxwVrBOcH/Zs20Q7jV1HsntpjENtAuRfaK/h22zpShINFemF7HO
-RBbLkdP7kbxYAJ7/rG+YSkO3jRr/mzwdH+2hxJnTtKYSbKNqoGy0vVYR49RiXkKksCoXeef2n5xB
-bqkFlqpuMEdSx2ORQnreFIhyhVGkbv7ne6wPdTOEs2o2E5336A1p9hhEPJYpFwXRbjR5drXm3F+D
-y1V8sOJjClE1iXCaexxqW+gQSV95flTvLjlZjic+6Fw2tOWe3sYPyaFHOOaWm0ymGUEtVMZQJovK
-ACATQx3MloyUujCvoyJ09P12pbKxYhyymisZ1QlaLiGDAiXcMtak85iQQLRvOz+nLjF32UthRu3F
-64OeKZM0y9WI6vTs2CNgnIGn4h1Jbq6VV6BwxmJMnqkCwSTGwR58q1CqXcUfX66ZgRYVpdb/Uywh
-wtKeQiWhUvPxRVmb+cYNSCifJRoIHU5RIV9WQXGD2QKLeynMlaor6SxllJWzhcLgpc6PHDdzXnEo
-Xj4xgZ1zWeUZE089KN0/Y6tqJ652KJAXSAF7NY7Zh4W74Y/IEph502G60iHy83mISjpFoOJTYOMc
-hVZSDMbjXyo7mMxoHViz//HDnYE6LfSmh1v4Z0prG5DJ/vRUJbcV3DXP/uiAF7xwQRNUiXCEn/Nk
-xtZS6iN4xPDDbuxtMagA/eJrdvVegy2bT5MaeShnV6xH5tsh+c43IGzsA7/QoC5KSZFXgSX515Of
-K4tglwHS89dk6daelU7RwjemyE2y1uMJCGPzRtvzw37bS01o1Cacz/FGBnv38XCAiFJUnwu9+Od0
-Fiiw4eB+ov3D2fb/afuwFE2sUO+Ig2m8Q2qct9CjAQVz/6S0eGWi3kGxBoDitGyC7jtnuozdr1GN
-FBryXlZT2feKLh/PnMXiPr5Ur5UXHWGvzmSG+g47PMRBjWKww8UtrnAw4hVKJVso0TsXROCYs0WW
-QdqdMOpRBiug+IybUVLRq+/K0AoGr53HIBj0dhWbno8OJ/9n0Oxr7HqHotxJZuD0AeEjUdidljsZ
-pwOzymWKViXxHJWv9N14Jx3PT0qKqo6QSZ9pvRA8clGZKD5IQ5SKvDfmsn1oq8B5QYkjM/UACEqk
-faeknpHaR3eT9wj3YGTGhvwcfege3kSPUSTFloPGh1Kqh3/CmJ/TZ/4kPQsS2lZOg6yMuictmAKT
-JwGrn+C9fICESuJRfVSKqICFJKNLGM9ySqqErhwRLU5Tw2ldXP1MAY6uWe2O0cwzWKw48AhOX2bT
-Ih2LhQdtXF91v+/13kHqp66hJ8xHmMcAqhXl0u3vXRU32VmesjKN34OBcntmi/ZNxWqcCvknOjIF
-8ocftYmAjTXbpFNBTXV+oj9Jr3My9JKxVdPzG8h6eaqSkzdfdxBtcLQByDdNW+F84iI5nUPkGnyW
-GJFQVUltKOG+WxP2Loi9+DBMZ8mQR8EahVDSAzMwC40bucj49cDKAiofLNrVfSaP/JflbTVtSQ46
-8EflqG0SIHcaWcvUsuvDGiQOOwHhlvHK+pUNDRdNb1hLdCVT61pvuUTQsa2FXzcOOHU/J+WY2sQm
-3CIIaGNrCIxjfLUmd45eDJXQllBzISRA4jSWdJjDw2gx4GJG1Wvjtbd1Krncp/JsNkIgo/vi+03O
-4LLFuB8GTa9n/km2Kd5OYNoRAqSU0e63DQtnFbZndjDNa0646MS4XCoN5U/XoJGT0iAK8Hmrozic
-zaVmAv2yC5pX8HaAidhxTRmAf3tjxaMfpuh00FmTpiRoiW0eDTCtZ5j7sSZZSmZ92GdFK2KUiq7Y
-L7w+WhS0hHCuVHAyPwXwnxmJ1y2hISKkGs0GxXHSJamAupSZ3EPWiDEAYO3GMkTG1GPjRM0WuBHt
-r9nLyBEz1uf5LRDYHHTTKx+YDk2vbNAAxBsrL62dR7rWdfINmgoW1ykxyc0Y51sEZtiqYgOXopVr
-bYIjp9wexwKQcPmjCvH/C0rSmYnrBIpK0VhSP/oWXiMRa98QYN6jJQ9c5NQYY/2EsztFy3FAvcyk
-59xshxc59EDwtlhTbD8hGpPvyFOkTiSJjyTyUkebHca/rX/anx45waqXRkQa4tNpAskdRotrS3Wn
-Jqimt92ednE5SqXkCzralNhYGkUitDpFQUYLHOXPEkrtJ8xb7g6iCzXsYsqEbF/JAbTSZlBt+Ygv
-6ZjRExV8Pgkr9E7R6x6wo0ohIt9ymEeTN5/ZjGD3ZOh5R7QPXvOEK7s4pZ7rkufPs8m68AVzgInw
-x0BigC085w8yyORqIznldw+RJ7D2bbR7HS6EzAlc73kS8zYxOy/TVnAEMukRp+SD13RDRJUY90UP
-vZnVB50U07ZXscuR75goykTXmoADEME72ANyy4fH5Vz/JVzEM8VTVFzxvwmVI/kut1iuehmIHx9N
-1BmkZm+vn87/HcmxEh/h8moSWoBW9jv56GxqSR7XtwqcWD7Sl4c8hNNZA+wKas91aU/aLrSGRIG2
-OvlNRx8d6OkYzai/M7h+MUTSzHhUDcHSMTQA/uKWQ/BVrIYdrGZgCGisX4a0YO4VJVsABgqxICKD
-aTVchBC7NQxk9NQFcpx4BdwVWP+T7S7Rs5Jv0oXjHzNQ2zhMeY537IFnQHmPtF+jH+dfCUZLS6XQ
-7/IVF74zCwwoMjMehbMvndO4QXz9n3AUOdANVCKQo9eTOhN78AiPPT9oBQueCmFlfDSEDLYRFLQ4
-a+oq1c8VnuG5rX3ZPsoBeJeu1aW9g5nQsq6ubI7YEl2JUOpMaQJ8XGxnWCrVGFc5aVspw7W5EogE
-3OtqnT8idU66SaGbYcxVWkhk25m4Fk6tjhfiYZWQpKcbYl9mVD2FAQov7Ul+EPuczB1pK1O5qfDE
-Bqt7rYKwXztdLa3OPVE05iXVkKi7c5GlKLg9xfDv69FFEwE/j8MNBNTdXIzlgTA1eXRcNhsIRVK7
-rWTR4Q4B2uwM/ov7jQKk9NmNngweKT8lgei9V4qGncA38wRO8ca12jNskYF7rNQUscu3y4JqnY3F
-aV+qvyoXqyLCshqCBw69uuiATfAMRJv8mRAmQ7sxwxBMHKh7/HwoeV34i8A9TqGUr3bhACSKNE3J
-0XlX8SNiyZevw+uXjm05a+3GOy0IGb5OpYJMSRdTsdM8Fg6Nj+QnPRk+iud4x3ITroSVcNXKVRi3
-XaLhdWymdyYEFkLzM6DysyNxCeCtmP3dg6FP9KsgJxS9dPBqbFTYsyRkWaYr4jmXsnV/t09qBa2j
-AMYrkh7nVdehZNTwaXB9dzldar0iViilHiZUIOk/wRkGVOy8fpJN9NLicL4rc6dDIEt30tpbv5aD
-0nZRVvp7WJQg+GKs8zN90mGjjk89LAm7w/zlLgdq4P+GySB5MAqMv7uvW/KJpt68i763C1OzW0YR
-osXU8hGlS2AWANiOXDvQ18KNhVYcrgo3yd+u/Ib6qG3Rf6Q5/XXOVOdalo+k+Ja1BQ0W+KkncEni
-8XqOj6vKJuJSWOeZeC4xE3Kr6g52t/vtXyzLSmhwIzYKet5jg6NEd+3L71b65jdZVfJo17dBeniU
-+TvAvIJI8VM+14zyVtHhklLfLABgpo6Y7m7xOyeufKNU8ZcFk6gNoCnUShJGNtfhD/tHLhrQuHJH
-p5yFf+ZSWVuzwiNze//128SxowAO14U6sboEJRJ/xGI33nMb9L9syfXWHxq6eIzeetV2Bg4it+VZ
-9+lEiH4Ru4keF3RpAAqUv45UAS0tQlwWHm7JeasQkLAl4cScyz2yeSi38OTQTS4+WD0jOynp720b
-nnoU4FukG+tdy+QDI+d6nEy/c4CTTNFW8QmzOz0GWoZQHR7oeDFwYY+2VX5jsiyAK+vRPwtudQO5
-+wUWhZ9KoTl0qXSCGwxaw2s6VTmzs7qaBqpzgxLZ48tRE8oLxFjLCQ1UqPRPrkzIRrVGIfbkp0pP
-D1JUXsqrQTJGPc/JFWM8RdQ9r3r80to7MVA6UMLi6TWgF7DqGbhrKSekfa5c8DC9/7ro8GooE4Rl
-GeK5n+bY8NUjFzri6fPpRSVn4T4sXmFsNf16hfrA4x10fZhWVj7kr/y4G7X141kC8xjsREPMIvk0
-tSwhytTv35mKAdF+J6AFr6vRk43W9vsa5BJYC1u4U7MIYJ3CWDHxMZUiepHE6oV/ciZfO+lkalc+
-X7oj0s/u5MDFqx/lGE/qhaK5K0H60WuoOqAFcVeigwjOamB931bi15CwRdKZvppEiS+knGkT+taX
-34VXH3VG0LKTJJKnrNysLHXdMQf3eYoZmbcc80R+XsnbloEcK7TAqPMcPgTW141T+Cp/SVxW1pb9
-1lGC+9sE0k1CX08sGDudaHHUcDRXqnWm53TZpb9YdMmqT2+l48q2oNOaPR4w//FLp5l7tyIk3vOL
-8ZL6KZH9vj9LcGuqbSYJCtA6tEDZzylHueBZSupIlZrsQFSrW0LhIaWobBybVlvKV4c8zywPkyHf
-aIQT4tRAlOBeZfHaL1z2gINY5nXX/VuHuGA1kM/hUsvc/1ISOwc/foYsPezAVgWw28aP9mYmNruD
-6LpFxSgh2nI6E0Zs8o2s8Zw6/NmvxGfL4lHqYcBjp6YWL7tyVCwyZpNK6kXDEsDejHFtgZtnPhO+
-hYUm598+O/9O0eLJ+NU76VDQAo7y2JW7MBH0eeQ5TJ6jAtxpPBjxfGHMwXsY57wmsn1lV5E5bHgQ
-OWdEYi0iXIA00jDtKTxBSxGl88Jv7/1FQwrXT8BDQqPOtxFZqDGZ6farnI5yfMEkjDIqhULL7obA
-MV0rYUJ5Uu69xl6+dRYjMHdzBSsy5gcRBV3QWoq5BMIv8VIlu4g2d8x996Xg1BA1JzpbDeSTKPG1
-XK2+re6QopSeYwXF28VUqhn8b+l93+QjQIC7Qv9zXVMu6MvKKkODYgws0bJXR3MtPw6Ome/NIoY4
-vLu1XM0pvTGnOxjMPjtHODGS1aRlks5BmykVEjfTUynwLatBobhYz7tXScno+0qpSr8/6U46nl4t
-3x80DD3m4e3IiWKkosZTI3rovhDw2lNCNTX2lRquDAqTN1mv5sCvL1VPa2d4FxrSaZy4TVkMagCR
-fPQyEhS6vOOcaSPV8SSGaxtI/WvKhbHMxEz+t3OaroFKDLn/V/EbO6OCNz+mvF5ezt4dPrAQt/nw
-4ljdRJuEtBvtCzh/c5lGggMwcxH5m4tNs+xo6zOy9sgvpD4fWvwkzUiKcBzZ9oqZ5O+refO+ekS3
-UC4KKkkfl+qC0e3QgjTWxPiz73Tj11jNXSDOfdu6DcNM+rw2SvG8qrJItwrzc6So3nfYzo4r5MYP
-Fo1Wb3gH1T/uZjrK1wAPP2T9EkdpIwyx2EWOP33fbd4IitRXBs8EFMOkKAItJ5XAXJX7RWv6wPyP
-qu+4iHi/qeSHFkdePWa4p9YpY4Xxd9lUtaIxFU6Ia1JcM8OXjBfqFL7V14sYKuTcRpDJzwW6yo2a
-u/nScL7KrjhX+uIePXceqoILhS1az4wf+YIeG6SUXEWUGc3/+Au5zvpwovwW8yL/hZ9550MijjH2
-lSdmTmSrx9Ewox2Qm1Hl3g+THxy7miDVJ9VDTonjyXLC5VWdp0z0Es4EOR+2UzX6+KdquroStk0n
-SqzvwzGu2WD6GfzB0QahySb/SM/Bhz2C7dAe/5xGX88po0FPgmi4gNtwS/FlnJhxkVKxearb39Fg
-Vznxcv2R6vWsdBQ5tkLYwN0UUer5t0dyG9eRaxechxTYgE3d89gddNwZGD5lFGoCCTdimlWk6rNI
-NQIK6KynBHRmm4q5JiH6/QX+jrsNQWcYiAqolnOEJTkoPfuAmgqRMrzHWmPKONfXZ/QLcRCjQP1v
-NufxYS+MkFhxkPzROniuPZaKpso1VLLye2YA8O2jekSs5uFV+Apj5iWSg8KIfoD5ZzWIi5+urc6M
-Ga2aUqtxcbw8V9UnJQ3742G6uRvZUrNmxuWGkXPsNLQu2hdCoQDMSoZQkB3f72OiYx+tC2Krxw2q
-c9+fYOrPRwnddTgZ4jZfmSoaTslr0+Gbt2hw9/S7sRXt8fvUTA9XMYGjpVyT4wCbn6y9G2kiYe/+
-cOdDvr6Mq+MdTSteNP07VfTkQqMbJ878JjXoRc+Svt5FPXLNqadp24dlEox9lcCB8npFcXDlGKSo
-MSxOKXQSOrjpDZVa+WsZUi/BRzvpjFHRN/ePFPje0mqSejJLJoRh8BnSRoo75SGzOT/UPcZ1Jd7S
-pGh62lYTobx42ZCW7EG0mK5j0gA4pTADZNOoO1GdVGdrHQq+fHLpFMmK6Y0SiWKEplUHGaJ38ifm
-YWqA/XyesBDtWHSXPouopHsolZi+9Unc+oMI0jIi3qaPRCWjqSobzcXdrBI52CuQYiwUngjO4OTU
-gxnESWutw9fx5A2vZGeZ/e3m8zATz9Q8idWUtTdStHYYgnhxlapStVdTugXa2DY2uZjs9ObHRlid
-edbl3EyRDq0NM5VaiOztua1Y2hCxgLFICypfWP/NFMgfEbcUjiBNrxjPDQL9FsXtB+L0MbTYBVzH
-u554GwTGwg0VSq/kI9m5OF3+pozmYilf63lzb18gVLBShEMaaM/DbQfa5kfGX721fYSTw1gyQC3A
-+c7uVB3T3DfvOr0JGWk/lVaO9VXY/9OzXhAeZ4Rv7nMPvtFC1jRzzAXVVJxNbx+8N+HYEmuglvnI
-IPNC1Pzh858V7pblu/7I8QADher/+Psy7AuQqzLsIL/OtmCP1clHFduzPCQy4rmUE2M6p1Qe446I
-ZKdFDsHpaFLJIrl6wORCifpoMwNdbdry1E4yJjQW53DRoxRCrW1sGZDEI54Qh+q1KOCQlGfEa4S+
-2oHdeEO5S2eYDs9vYdf0SRsKC1/GTsPXMyr4WPqdAdoVB7vWpUXtU7IbY3YkcxDgqR2ATdwgXCYs
-iUBImwlvMisjqXd3CT9jySbfLcR4pLecQmph5rr7myrEXqOBT33DLIARE/qU8OEDkWlR4O0I7N6X
-FJH0R2sx2mISFmQx3pRdys007lFxdV7RtNwzj+Nf2lmdwacp3nlvA0JibcjMe/7CJjp7ZcCIKWXo
-HSsOSTUekeQZ8Lx5ERTD+WNng46h9KWRZqdgQYKFdolQHg9rxdfIt9KSwd3XCoeTxUmmqedVPYnr
-xZqjnJrMTiZfAw4880gte+ikVjid/LRWFQQhmZH6oAG61CdJ1o7BQ54Qw4OaJdZ0+06aKrmDHpjY
-F4X6Dt0ekdsZZE7Vus+Lsc+gSWD9C8jS82JIcDr0YIH72xpNEiXaKmE7lSqcIJpHGzPLzEtdrPve
-aehen6Rti+mHMihyd78B5Vy9NSC8ECuzcOD2bShgNvRNrhir0vyXOl+UmqbrBOhBV0jVEtzdex0+
-+FbVzkuWoc3TPgo2uGV1jzi7TuqIBeUIzdknUyGjldSChAe4S1OPxVKaMn0rFqBTjDeAknKExVth
-94dxgl5y1BzQOQ8phAMrM8xcYh9IExaCV1E9vChnZQcevlDhesd3cUpmBv2A8PdnlH7OtpUCSuF8
-6lhxiAM8Q8IwHCfSZboE7TxPjV9M1c8rRAChHgCRn4n3JEFxYf2u9SGz7lOZt+c7RXMzCYm0zDCX
-FrlxLhO/nGH6HaUbdatKqAMNzptEMC6L+GGgGFqZGujt06lRQUEYVMRNKcfzv09AEyv0+NUac1Nt
-dIPYUhWtHYyWVjATYKfYAHRhIZJ8stn9/KSO6FHofDffSx1jzrf49DKhDmNAhwh2ZKMqAeGIAzmc
-skObmMVMz5lnuF3xT/9y7YnoQxeX2MthOlk5g9T7dFt4CJ6uZ1d/NYrsXPlETEFqPy6amc3uqKmF
-QcITE8IprslzHKaVRuEpYN/gi8fiCvYLPv5bSIljHvBRsA2OPOhQ38naEhj8f7Jbhy8WqG3OhUUX
-CS3R6q64Go5jzw19s5egprdIUezu6t0GEp+psemjlXprsm/N/XBv6XRnFBH+m9a1xvRIRLGogQMa
-4yNP0Z4cQQH0rD8o99K5wkEpGnzYqsRh6e2eIR88VpkaJrJpjkEW6IdNmrS5f7/qIIHf6hFF3Dws
-PMCquQcVkcCAp5Jz8MR2SpSenXea9D5c04YiyY7U/zP1ECN18lmp2bW0Q5zlXfWAU2yw3AMR4Dqv
-TWcrHbyiYTrkRd02Sd5LBN++YocOWdi1eYkhcW3AiwK/S9mJ8X5es2nltrCXPoYF30XZeo0Zfr+b
-siD0d+2uNjUcDH4IVlNgF7xwktjnrwoTgv1xYZ92dHwYHcvlMv0dLoVy09EekBvcDGS2gp8vojNY
-KfmUrILzqmlt+wzhPRP+HvxsYOA9nCGb3uX42w2lx4p6WIWZukl2Cb86oSy3NjMOiPA6MlUMz/SV
-GpMjABxEpmkJwcNNlkB4X8rYKgZnMdaaAH33iPdUsvGjqUYvZDpwGn+/xSp2yXyTQozhnvfEwCJk
-0lR5jWH6THvCZo6aqlL2584P5izowdTczKujVDuZbzmQ843AXqI/z5LwG+giLO+Yi0dvY/H7jqm9
-i1paJCTnzolwssnac5IzFgZ4M8GJ2647LAHGlfcuHI8lgCopPe8GwyfaBiplKgns4VM2mKJENA/E
-PFMrCA+G9qfFeXX/Ef2w4eGebeHIfJ4zBX9HGKX/UH9u3qnMGZjUrZCWqEgHpkKUoIVulDrCBexD
-+GomRs0VkWMfSg1crEiyr9ENZELsESTUgN/8L8ikW6kYpDGlL3kinkHKO3IMHwz2QxBj1mx0s+Sy
-eKUWpqYO5qHYQpUvVknUQqPDHWQxcF5hGUwBZ2okoIqiWozIhieglnZiCFc7GjPQV0GQA1k0pK+6
-DEFGayv2dYNRvUxZqD6uI7LAUpi0pqiXsxE6AD0BGcicBD+z2iMLbmNibtogawKwkr0d+S5ozqS8
-noVErtwUYTySiCySFuQ4xbwCIjXL8f6DzYD21O7h3dfDZfz4XiKHgrALXKDzD0CauLeMxqmREtp/
-+OHVuZxlQ2Sg4FoAvEH0S7+9Ljl6QpfRQSGU7EoEaNdZLOdSXLreR3b0c3HIDxEM1WJEPMPgeT55
-pAToHdy5Bw3WPGFMAycwTAYUdElSshKKkxjDVXNE1flfv7r/2+EFi9OTZelQxUWQubEjXtUHLqeY
-obAwD1XEkp3Y6ls3acUK9O0njjyPc+OjGZnllTj3ZrQGMiOZtwMUSp0+gaDLAhvrsicGSn5PDttW
-FQhJdoT8JRQmNA/Ciq5cKcVUf1wEka8QCqEpmh4bObcwy5iHpWt3gacoFWUGICvkZHRa479NEXPT
-KxWuqygPE6J/7pZ7KT+Zy9cYMc4vMPKBxiLOK0O1K4IhfK0mtjmDLtWfmmzwVcxu9zh9xKDScNb0
-DvZP74hpoNmh5217Ffq+uEU6VyVNrgS5ECtMVUyaW2dTBWpe5nrYrUYT0Ws9dwDgyBNCsMIn/KEP
-bBRZoZ5g7GE+gyqlLX7UxOnOpgiDuVIXyldR6Vccw5W2BL9FizSk1WOewdCPPjF41BdTphXF7bV3
-59O7TNgaWBRIRs4eIr2/E1yKrc6HbOUYibp6ZNanw7/FnmyQE7q6NKMCoxdjJ30pph2tK/yi8V9p
-7G+8djE9tyWHLIv5dC7I74CWcgncx8dvxFS8l/jn/yx4T+D1CJVUJNaD67UQu0y0IjDvRtPLr72A
-ZBOC96PJa6jl9yQ+TzgR3BY0hWVKw/yhXuDvzL0w9xqmYww9jH41FgMXZiw7oACPa2ELRUef1n14
-PoKa7jhnk1l8MeXPdwG96b5v82M1WZu/PX/POQ/qaiQ0sfp3b0BDEQZcRxUpK3EakSaVJVRUqR15
-bxWC/wZyhrh/4NOeIDwA/BpRmKABhG1ghD3fcrYfwUkG7GHBgJc+yoc4ZokoMaObszW5+dFAfw4v
-8XbhDHh6fMgirCj2a7RkIQhLetcS/exZo//Jdyxy6Qkd/sO62hQuVoO13KIZ9Uy82QwreyQPUwFF
-esPY/HUiNsAauaJrKaXHB5lojJrSxmK9r0kxpngrEZRqHf0jlG9KH5ODFMezW/9Y8N+KcJE+OHTR
-68ZOi5WyjVgk8g9CVrsvqwtgGDUD5LfCz4isMJb0uU98kjLJCw5VvU6ldrY/w4sdgJlvCIPQ8wjW
-mRYAuvVApNLwrQ4LCs1PK0nZJiJXqMnNnOTL6BoRYrrBB0UmkgznuH9unIjk2HEMrvobypRE4ABh
-Hy2ddZ5wMrH1wRbiAyQ9ilZllsdZk1eZR/qN5PTFUw/vQ0vG165DAHDOIHAf02vKi28MVBodN9cn
-uUOBZ6pSVIOgJrVk+b3gZAql7dhn0+U0gAHA5+nkTH6sKy/n6B4IPJ1s26ORWEjQftNmqLgHBxIA
-5DVeZzh1BbKG21v/OHun8QjyLYRK+a4gor49/uhSJkcsLqwQ95l88mmbDVuRwydVKr80HXLgC4mw
-572XG6Q90c6gUEYLtaURUfE/ud5Ic7Ox1l6sbcUc2Uv/a47nQ13lDDM0nyGeAJR10Dpx7ge45dSe
-E2UXhm+gqd8OMnm7HaRQXQvDBGwcZ3WuT30Gro3RIWQJlRf55bNysMNdGT+niNqCtKom2gOdEX1d
-ucgjHbW0gCTTAYdjQpUCqEeWl7GlEOvWGfpuZtmhpgdKha9NK09ERYBjYriivEkpciHWfh9A5V/w
-ULU8plB+1Jm2F3bg/Zgu0tE5e+7PV8pjDGzAQlU8nhhJ9O7V06/2PGHWyviAT2D2+/SK7bXF9dfd
-B6xn5PsiuzZ5JZZJ1lFGG+aQW0uc2A5VYWj6d3nDzCyA7BRoSN4OGv+8A6BaGlRQcz0CLXaIZOSQ
-tKdKz8C8Ijftl608v8iqf7JA5QlTPBLFlHdSY8U3ariwbWBt1rhJ5F41zIhGRymJGC7FEQNkoNyP
-LFPmN3sDuPZnYSJYUkXMKDowv6cO6v6CsGbhQJb0xGcqGnWoZFh+iIzrhyxqz0L28J07hnKnCtmb
-+KsbeCtfSmOs/qQU6p2/IblMuBlLxRcatX5oXcyjhzgcVIzG9JXFVFFXRm4F2pyERC8qq5ff22u/
-vQAUJMO6fdsYDgCa6dZja+9cgwJwc/WVKhd6j8QWwCsbBhU5+kdrbHk7oH3g9YG+tavBTIWfEGSy
-UvcdW1XGpFrUSUTcdUFXgChvNNYJk/53oomWvuy0hAR3FuWjiWnyBCG5G+sK5GMog7OvWImHoYDB
-kXU1utDKyMEydNCWSYxcTwiKg7HM0YEgcbZqu7xKDeWf5LE6hhwLzhzDdrdoIFEyfQdqOAWKv3H4
-wE1IqYL5TpJNyYmF4OJPIEI6OvTR6fzg976EmJWP9F09cjdjctxKWcwcfSU3SZD9oMCCkoULc48U
-qEPyPNWBxIbBon9TDCtkmBAUBJXRSj3DitpyKnPA9Ivv2yy8y7NdizTlkkFwlpCyZNeEsyebJsZP
-7/t+T420ZTDho7X5BmvyL5AExvS7Ml2Ijk1Y0CvMAxIAg2tFsQ+w/RD4Es01EkihB63nXEDDSK0E
-YvSVwrwj1WnSHWwZu+MF5vLCJ+eCUS2PYivSp/gHm5sEIGnEVSLfaGWnKzqdWpLgswuMfzziwUYz
-vIcBpxJHmM5s3SaxmcqBPofT4FQugnM/WV4GmnfW8RlUHHm1GS8Njz8JK/vEe5H1BiFprPCuSWWW
-dwDfKxvpeQwmiL/yYjY+AdnxOaOxqOnW6GHADff6umJYnHjbdrO5psLkimyG5QzWFThisluvC3T9
-PJsUY1At+OTufFJAOPafKOIlFD3TglnWrliP5u2grNxR8ep7YwDBGn5ZLanSCjJg5hUIb69VWScB
-sr4gA8NlsEEQmt7kcdP2TqtHcDDa3sYQ90Kztm1iReNzksL4UYwwFynIVilYf+CSfteXAJ9/f/gq
-FJsuFK5AnA+i/8Eoh5NsdzDmD4rwLouADRCEEHA8P0PoblBN0w8C2RlrpYh6KQ5zxZLqR54qURGY
-ji1mOpM/81OBvzTajmK4sx+lUGYXhoPIoD/3lMWhPqU6GCmfDaxJ/cPaL7TlxN4eZuHPJhqlryEG
-tsRraPmOTnU4z1wI4Cht2mFe9Az6QldQP/jEt1cOtYzZNFCqSAaqxtfyJnMrrciu7L3M3gJcjWC1
-YjlXUIhWzg+7EDjEt4IEI4q3qJqSQ98hseI/5eKYCJVYNvIm2MCcOxPTn82Fs7qo7BYCZeyK0zrf
-ruqz4P87kVqB5f5rp4PMQtkQNCM0zZYDe0P81+C3LfnSYz8o9WjQH3ju5KVuSGDYhcJIMUPTn3R+
-h3CaDt94Rx6Sgmb3Wf2nammzRogI6ZKLAJ/YN6+VPP9L+GK+EowbVy5pSQV26tHmagxTHZKKVdRZ
-0AyEo+sVk0vKfcWBJTySt6g7x17RC8L2CmzmrIIPvZqTJlEurIqc2jaGTYHEOToQadtnC2mdDhQU
-MIOvj9jQmjCVQENRpG2Y6p6zl+PBfGjM8pBNBX2pJkq7gPeNjoGzWe0FLx3KUP+Ex0vRT0Gvk0Ll
-zA4ZQnzaeKKyOGCkkn98xez3Jmw8kEia336cVRwPZnSKD39zDRITkmflpvJ9mkCZ8RpJsATbn96L
-cb07P/bF17XEmWgXmdJxyAafmkoaHyAWKJBgPEx4l6+hPkUG4JWgfZkUgjuNq9lVvvO+atLDFyzW
-b65ERffDtyyMStZEbIq447JsoeM7ZTmaCPsC9WXChmQrbbEHIwZZc07zTZLfhshvs6bfiQhSDMr/
-9i1u9xC2qrRUmtF3D7EOaeV1od3wvUR3rero0JEt3fYxCcad3Iw3tybU6v8yUL/sDcbEjkUb0NYC
-ZrzNqlj1lgdQ57eU1kBQxXw88nbhonAtQsBaR1XC4KM+NzZh1mTu2u3LPG7lq7NEgu/WeD7ct8nv
-LY3UmUxvvGVN72mbNt09+S4R7Tzs7Fp2JQ15LsI9bWSRN1/dM4Xs1LkgjndeJsQvDuLYB6vQd30e
-rVDZaJpoEaPe9x0EVH67vuDG/LVtIbEdNW4QMhyvgt/SzPKLLuc9WcoEAcFD10wVBP1XUX2fwsVI
-aGNmEscCXNY+nnCf08vwFTtNW2nMTT3TOtrikhb33Al66CsZkwK49SooAAgH21HpXTeuxapLPYLq
-bU0Mmd+2rzCkJHKEyHdnMiVOs/x3RVA9zFj8Oay2w2Xt1rM3IWcAsBZCy927QxPRhgCz4KLJNv0b
-EZLPjNSmKeVoHB/d8F8PSBtItoZ4bve/8VGzLgD9h216NNPVFCndgWlhs5AahcMMd61Rn+f3g/jo
-lzm1QISADgpWuWjKIx/uWcPyaqi7aYm/p11SwvyfpjnqwIrxFyAP7BP6H43UBPGeSNXJ2l+erCQK
-5G8BpvavhGvXhv27TgqBCgwVZBVJo1zF3J5ODtMydGkrfJFEB0/t6G6435bjKFFhmuuFZRFNsuZd
-sMwImAAhKK4V4zQWQcp2HmD+2JBMRtH3oGuxPJeCQWTHZwd0P15itpibM0p5PUyh9YorWMQulnYT
-TiueNouKlpiyG6rNSnm6ErAxNCzbmtTfkKrCCwBIP67zGuCPCwxoUzUFeYR67Imt3IhGnW3yEanp
-/nNy7MICL+nviKLkAlZQuRINtwBCAdlG8j7m1/ji2sml/QpR53WqwTRG4xcMe1Bg9LA43coTNq6a
-g1OZ8bZwYeD/Co77CVBix3FHbJafBUSB7b0yYEX7Z/DCmGq55DsHaI2PHdZ4lICwM7iy30ZXQGXf
-i1LYvl1BiB1wdtfF6biRCNfNGr45+vCPtXAZsiK4IW0i0bsxsaosr+yUzpFF0Tpur2TMuNIOMQyl
-SwA/nMWzI1Gm8WTFYQs59ovTPnZj/F17pLwnjSCPMxaqOgI0x36/SAtD2vjvgF0jtpOfjvxE/UQr
-0xV1OkNNdenIoZ65ScMvDhPBF9uJQZBZzExRMjkH4/Tl6xFyqI7LWe2RXkyyBofppVxgCpH5XR1o
-gr/my4vs/QdzM6ef3brHPM+nd3mMMyD4cMhQS+jz054LKDgSRVvJU69pb5t0iVofg4zb3JkpDJt9
-DKFSh1mMRZ2vNtDI/afZ7hto3JKDk5XdMDlF35SvtQ9R1+nDLQMI0lWHvXXJ8P71v4MK8UDDqrOq
-zWXIhnImRlTSEtyZHEC9YEpgowRMG2OeWhDgBX+npmfszLPIJTJbMJQOkSAkYbXm++oJ0D65WEGE
-tQykOVnMN27Yx8dUsoXAEW7xD3MKq32+VpMtbm/aOSUi+Bkire7Fq5GxdMMshr4MvwcY1mwUWUrh
-V+JTb69ZUXugF1jIFnF4RGvRMZVvbK5QXXF4Rn0BzP2TGBTS2vhF2K7qTKYJnASid7b1rOtsGbuB
-+Yyb94ew1qS+m+C2+46EgEqbMuMt9T+L6lKg1qh3H+zAMS2fNwsQpj7R4eKf/ep7RwfBSIARGh7T
-nKEgiNJN0t6mKB+yn1QzZoajh/cAOr222MEURsR5aB60lf4osnaWaHaztRDsAXxa9/FkCpdCwz3o
-lKnxjniaMAhxib06Yc2SP+AXbibk2vdfoeHPZnGaArc/IZq9zKeiAlekKipHN+1II8vAAc+V/Bht
-wqQrsHcx3YrJs/sqGQrBFskX33Rwx223q67D1HZ0vXXyCuQ7RklLMyH3HFlHZYFdZOxqtOlx9GmW
-GiikSTI4yBaTUOfP9t4/j05cguDqjdjwdMdVav4KybfeJ4BfHn920WgCGAIEXSzjoVYFbIEQy6MX
-H93r7EjNDYMHwVGU/iWWP8J7Enh/rbsAa7Ng9f4iXst+jSOBBRDnSqn7I8fXZyX4lmye9zAomeMu
-3pMvb7xV0PD5aHaDcgw6TSsxEsib6nQdwFw72u7lyRADAZzpz8601K8xWlbPOm3apMhc6CCUzzV3
-lqorR06WspQ32eVXPQu0572L4DPmxEBdXf9pzIbmxN0bgA/vyCbzDVtFQiWLQg3+ABWGK5TfueI7
-tLpUFa3AUjnqvQL9aOpK/CJSH0Xyk7Jwetz2Vf1Ea4MQNtkjq5GGmTM6UB9eybzwxdmT1hMnAMNC
-nyHuQfO6AcUd005KAEB+MnbA6DN5GHca7E6SYIcTLqcal6doanAozQGOCeWJfiOiBiTYkVJ1rpk2
-V9J5yUDNesoGRGKRjaEVIfZGZvfCKz4ueDB4JFj9XmErXl4fyAH5aOVMTBOySe1xp+aA/aBnvsJB
-ItbHaQSKBfK5ukK5GDAV9q2QGTaTGwDNGlfrzX6zLAIAnQHTvNMn5tDhc2qzc6i+TDvPFgh5GKkQ
-4umvjAADEwerIan5w3JeNYmyOvY+Vyr6C+WDAu7oswO/VClW28rsBXHOpuenU2rehos87NhtQWAX
-Nvtzt+TXn+MiWuoT4HxKSlAmdORezcBkC+vLoC79vEB1iT0IKOK0rq7X20x03d0zLX1ERTsXim34
-LcctlC4IY2nGExAqFl+Gqx9NZsem+t8pSlY45qJgA6PxRiQY67g3TUOmonpRysugBajOTubMTn0/
-z3lJSbOXjpgbKeHoXei/VNNfls0VwiOdYjupq48yy85EoKMLXpJaPZC1LTv0K17IB8duTMlocGaL
-0jgeP5DZPIWU660a/ZQ8NBGK13EwUSsnYzPU4xzsDZWUbj47rziDAmuftHdtqNuIFZFZwtq6IrJk
-w6CD0fHwM7/M6DZwFxhQHW2cNubXw+4+04ABD0dwEuKaSPRZzilfx4Q7gIVZ4yO1pNj1nEavfwy8
-SeWoW8zevLP/ZPS1nIlMw6THSx4HkKRklAMwQUX6qzcgG0C3FaABqZOWuN6PURNij8/fJErG3lDP
-s7U1Iu+U1D5AfzC83ZRBm9en1uD9V9PotmJl8hQRka7a3Ga7ZN5IQ6HKKM3RgLKZrlkTpE4Lmkrt
-UfIcPlMBaMi/GY9ex7x9shmWwMCnM0KRce4RoEEKTaeW3r5Ya1iYsio5Yh1IywH5qOOCR/gro2Lh
-nKtxZxqBamNFCKHfutUoArwcrcEI5l6Bw4pXETbR4tuXMMBTRdc7ZoqfqzfyS1encRrFgfE+0DmU
-sobM9jxvAEzTxiqpHLWag9nQot5JY+OMNDbF+xNkUl/+lb2fhNj7K9Y4keWjZUWQillE2Nk+3pce
-eEC3PGFEyNZWW6qJbjvWuAqRPVnJXfP1K8A7NOvjsza04pxR2QcYEGMxJ+OWUDMWa15rET0G462M
-ZbPl6ICeyY2+NAj2eyD2odkKJ26Z3m4O4ebLSLdvQVdnsMi1l4HXgXo06tb2WiL6GpvHVIN+ZAJb
-xOuONFgPOMVp8tVpdYuDOtZI9axbynnhaUtlUZtDJBKQZMrfEJJFl+JxJ/x45nvs/4hMsS1LX19X
-pbX+UJ6woc80B3rMR68310/00SWh3V3vWOy7Iebl7ZXv72tbU6NU/eGDSTtaTr0ZyMjrexgGM7uv
-Bj2B1+/fd2kdG6fDmM9qojTcGEFxPuKU3e2zdjyY9lx6JQS39lNR8Hl0SdcXu4FJnXRUyKLxNsFw
-CnyjqBgZ+3radXhWGZA0VsdIXKmyA8GEnTAcA6FVkgbnq0NQ0WVyUWBiX+411Xc7JT4QNzM9GSlG
-14UWbgBhsThCmw6XCGKJtHRRTFHxwVk12DIQTousPisCUP/g0LUXd+ykzGNdQbyWDvTkJcxoAvNH
-VdakNhryEwSCmviYDN/ZeE7dYSXZ9mGG4M4gHCsKRJFM9Ba+wp38ocz6eimjEVjEJ5kmjk8fOIkS
-dGgVfOZ8Jqe5KPeavGmpwqjr7EwaPl0Y3m+kFFY4EWn+a9kG3QPNlNDCl8OhVBNW1c7Pgz+PPf5K
-amQ0RpgDR5A7ZjHc39opJnNgM492mY3QP7xqFiBAFyYb2qsGk1gg44YaKdfYCdkThgNjsS2Q5UwI
-iaLOBE8+n3xBzqd9bKFocuAvbDWvLRnbI4Q2klBUFQY1dTnip4LJYugtVO5Tv+Khj0RyV2H6DpOD
-dZPzS3CA1iFcEwKNcATCZtYiRgt6s3ma1SeeiX+zVMINbn7yiRVaf34axMXi+tivg/KXp6xS2nUh
-Qt0vGMEtGSeQxtwEqv6/8NpYNc4XBvmQMpf70EPiz8GlXW3IB0byVwZ1DocPLDs3khf3AnjTAMsh
-LQkTCRuhKJuHMuzLbrY429Sx+fQKo0T4NX50FTLeJ8FYXumSE26y4PxRyXMXVmo7jhIR1+v8xwE6
-HjesIV/BQ+6XlP9NhkMjHuYEHxgMIqgm/WgC8DtCZUE2T/TL3VJOW8IyrzlTe8AhXMjJIGOwjF1S
-fA8TpGTv3naGgKo2g2T7K9kRJZMmE1OeqXMY/uI3aGqj3471IND7xeNoRHtSjN8uSMx/JWaj1fvw
-lxWZOvGjDsOcWVVOd+07TPYqVzH+ZnYawD3kVx8+kqbWno/M0zYngy1SwhRcKSzW7PiRlEoceTv7
-3Ox48BeOyz4u8sJAgBb80mIuJDQsSNaj/Ov89+Y0gVkvsKqpjx+PZxoqMlLku1vN+MGQxTeMm66l
-JiWXjycKGLe5eAtbWksLoAFllm8OQY41W1kumqkHCaAr+Op33DxSmArz71PtDgxyM83vHpsZpZaV
-KcKJq/9RxUt5Xdq1n/gWky3+5toyTrLGV3PpboB276kpNOj1/4En1uWMGJefU/CqK3swFU4Wfnf/
-+xUTnJmlIZnSBEUCBIF6lP/V762Ca31fQhN33sYdAbDJUHckIos+sS+eZjuesIpy7nsjLaUQm6jm
-74wd0fVUt/rWKXVAhuwISt3FAN4Xj8u4zl4+vWfzLGaK+/P2imsrdX5VaH6U44I0hfCfgxQBwPm6
-92Ros/VmOMl9CHX2+URpzlnj5jRY1MYJjhB43zsb8QoE6v0cNSzGGTXBeBeB94KluyhsFhlH1oMj
-ZO7rMSMVRkF0sUL7Vj0EANypV49U2QkZqphjII0cKzIZHEb4fitzbDZQP1qvsEVUWKCyM1kNmBZx
-CHNIx/rlID/broQnujFEsQz3iUKoDI2d2U+Nv7uRY/5BcLG/7mFWAPvyrF7eqlVM5ZTUOXS3uIin
-xEPmlQcvcyvdSeEx1ESR3/7uLGOp/Uc0ylxNDPMWNrJRUXTH6A6Uf01ET1jL+FQEz+q3O5BKKPxZ
-6JFUJxWyRI8SVDq3arNraAGZARXkiIXNzMpsWqkjANtYg7AikwAyCmXUSrWWUR+KAtMk35HWa9AA
-kvZslmCGZnJJ9Pnw3F2XOCGdJP/aTcsECEYPpNAX80XQKq0pEXij+X9+lCELb2/HfMrK1cpARLcY
-/p1nHvijTbjIWVxaLaYB9zSLIGTGZCJxwjYBrrgS4BVTi5EgGKy412aSPKgXZYb6FrwJyfU9kajo
-z7529OC2LN9KUtRIzqfGlVXbIRAPUxq8IcEcSeix0O/oNuyaOxBLXIlqX1OVKGY4EFaPDoh0X3K1
-EDdAJwnkERD2X5LEnNROHA+5i15QJRtZfQTlCApXnZMcsUAYcAyQDVDMtagXD1fHueWAArblBVAV
-CRT05RRalMG6DGoGLWf+HjZoVStS69fqeUK6nBPbeeBXGK4JyiG6CixElRHgt1y5eARj08bVRTiL
-yTwO5KhK77iDafeGK5wgw2rsHb+V0q7MQQAB1Tmtzj7HV2AHaZvpv+MVkmJlTJozhENW82NwWx0h
-KYKBTQp6jIzSp33T+GbAWqrdOlj8kBneV7lONOL2ilUBYQ/zBcRZNvwa5wx/xXw7GKdJYHUPzUrs
-jmYPfB1UmVJC3IF/WGgENnG5hpvo3+CFguEvWNmPwBcoDjV3gZavx3KKH2S6sVz28c0BtYI8U/1a
-z4m6Dyu/bIHxrbZjzUHoCi30FROF4zMABbnO8IG1UUwFnIUyRTymA7cVnxjZ9KvZt3tGN22fteXd
-r6+jvfGgINIpISpl9cak9KQk1m88XlboEW/zd2w8S4xO33+XIDZ9YpFPIguLpOk9XKKoddIAa9Lo
-E3GEbNjd2piKoJY4PvJ9GLpkVOchLX7fP6ps9syHrnP4ZytA/LhVUzkVZ/jKxQgbDTnKMqHDhu6Y
-em9nNXaUqhkIa7ydx23onOv1fnmW3fOnTGaXK7O+Yau/hZPtRJaDsBueJ69fTbxnt0E8ttq0Rp7d
-6uhs+sDRq9Th5v8OHI5T0+GElA/xFGot+RfzI7sONUdreBE0ykK0comBqiR/O6IV8d6ixG41Hfh1
-KZrvEx3//3gXvWtKBOv2t8IG10x0jd5wVI4HVCRYCfstp5gRKIn5QOcNRhGgj6qFaa5hdMWzL1Tx
-+Cq1lGUQWrY7LYsQwyp1U9s+UGHOndNXKrbRJqlj/LhXjht3nk03v4PFHVeCMDaxpoECfX3iguv0
-JIMOTlmvmsK52S19v/8BJiq+C22ePWm0HQh/5hWlUvhdgcncuBYamS+N+0CzaU7uUQ0J1sOJ69mB
-rurCJtZUJvplZm8BzSEad0/GJRf1W5CDF62aL4x6qz6IeYsbyzL2NdKMweSDK3XVYDyuVw2KdMkX
-R6ATc/LwlVRQg5jlu5cRNpOb0AqBeBj2u9g9fZy1ZPd5I8sI9rzXuuOkr0nqLd/yW13Nyv1Nlh/h
-kOpar7zu9pdkez71xFbuYKvTflGfg+EZxT3X4+8woZedwjeFgCzh3L9yLd3Bzz33kjPk/TkSRFqA
-1nNRdhCxYlk/U4BbuIwEMd5vg59i6gKPhIsg/KNWSo8glftouPeocoPFY24VCnn2LTSaPQAtypK9
-tznVn8pU6bIj1kbzYrUIldSDsVkAlSAJIRXeBAOokQKso4KBvCi+JxN2qQdNjbZ08p/zIlQkvJLN
-tUTuG4S4HTkb67h8VOgHDO4bOB58SbBYugn23gzUruH5Rs0cN6Ci+XuF+AwHRDgcTJWGAMy5KSX5
-qmMC7RVAS/Sps8ia3DgNJBDLActoGMU99D+6/dunnAscZMXzqjV4JQduRMVl8E1m+3Pb/fVNRLEj
-ZseJBFwwNfyJAfBiD70gg0dC+VQD1d5dzFNBQVjr/M9JnQxa2JIXZVTMPxWxQlxpnK7mZR4flRbQ
-uCRcCH2P73wcLNIBAgid2bC5Bv9XhJmdXqV0syBVURw4lwIvOVmphB2n4yye8nFn1tMeMkhYeQYA
-7dnJSyrgyHZ96C6QnnUWlFVu/gQ0ywjrM16OoCwnBFicexgcAYwY0gkOpCX8VVw06hAFkCGBFNAV
-575yXawDYzkpjqxOJ95lO+g4d44s44nEE8J4MZ/TPDozMUNcaZnjWl3O3SSdPdwv1xDzyfA/EHn1
-3AvL3alpa/uer/ObWezu31/TdQEClZmZBr8q7qD5To7L+/YiMawkAKZcnQWZPlZVt0WFaTvIrzR5
-vpdOp9lNvk3qRjmekXr4Tl6PJ2JxwBxeCFyqZp2pVGRV+HAVr0kcMeNb6FVgBZuK0avEZafQB+rz
-ll91lsvVlDBJfzUbZmqECpEJ6/lKJbepVD1bfz4U/DdvJ+hYsCew4AdiDHHYWYmsX09QzcH+7Ikm
-z+7s4FbAKRHmM55tA4d7vcl72cHx1S3qI620hEa48l72NgoUWXcqxwedH3vuyq2wJ1ITSEkOK2mG
-LBRuBspFMiWhxF8UMQbDEgMTIj5aEI4WYWZ1ZEJKMHBgn2RZaFGLYygE+KHWhvhpPdmJXgZxSZFL
-vIWhDOZe/wWjC89/H6q7T02Or5lnafeanVGMv4v32yA/i+EfnFBR6Ck0TgkwlfJMHWLPHUrbNaRY
-P75Cw8wdm2dNhgQkGPol2ZghS9yK+EbKRGe9gUQrl06Yp9G6hO29BipK24oZy7V5TZNOA6tbt9Eq
-qmPuZnldA06P2C4sBe+xwLn+sTVOWXly3K81qTRlgJNI1bUS7s/J4qbdVFqzIovrIwoRdSiMK+os
-AlFiPbE2+YbL5wTp2aguLd7np80tkf6uWQH+4cgkJyP/MIVPatUOWh+dvfNxxL4bj2KJyLGKYk3G
-tJAmez3mITbIHReUgYg9z7cVuKhfF4ksVGVcK3SGev3IcaQQJEVnTuFgz1wiM4OZHab0lz1Ih8Ir
-Uvx9CB3Ch0v8+3sDkd9WZHULcUaodNENFYyyrTlu5A8nwSrvxVsaha/w880cjB9xNmivg8AO9HoZ
-TnHY9n1Hzijye6X+sr9QwxZLI2AEImxli9bAcSmr3iwRSvYaEoJ7++7ZeLOKlJtCUrS2SqbYPyK2
-AVqzWgNHH6B2t33Imy70yIGKSVZacv+6JH/zwXdLnBZQuw40kILZ8vEv+7bvrd1fP8p5EgjqDBy1
-fmpVbKl0sE7oRyD+G1P+L2NY714PPB6hWAUpQyYT63tTY9ZcFTQF1iaqE7Cq5wToBX7hiJdtngWr
-TQ6xWdCr2tiataay8vK3cdR/Fz2gCyAOr2WzGwaqsauHh8y8O5mq1tfRpipOPkzpmsj+YHE9cXE1
-WUq3627tmOjKTfcHr/svjgd6xhFWLqU/rBKKyjBdIKl8MdhT/bpqWsYa3eNF5G9knjIl+52MDk9q
-zyeMlWEse4y7wMNiGWec4XTwMKB9qugvDy/DT9HJe8L5RG0hgCNjqReWs9WqJGTDyX7bVQVHyAN9
-4xCt5GYockmm79ddnbNuiHd18K+etd8VjPv6FULbbMpAJm5ljMCVL4OzHew7sWDlYMRBhp2f52M0
-/BHBij5zCZVCFaWIMOUs4OlS7CWaDEE7IYiZUjI04mK+32WBYj7uRqp+C/avJW08AUyDUs3lOThm
-35+y/uyPxE224JTRxrwABLiDb9MZ4VMYI06x0Zk61DeU9DRUwZaTC0lUFSiAhtP67tQmiSwjXvri
-nOeHU2kU1Ep4/AioztUfndrHiz30Nye2On3dZ/3gMzN3Vwl1ISZn2fOL/s0KkMFktBiFPphKGnfZ
-t0zaAJjfKv9Aftfo4CyuX8J+Y4Fh2K0hTL1iK5ZiaGY9KDxrHpDydN0oGYHvXYXmvszXum/BCMHs
-vQflDDEAHUSA7PWtrcjIWh+dsZ9aBfVG5zcHocOWaSB4DTutNOOX4t9W2+xA609QuYvrugpMx5OH
-rUcA755NsF5YrvxoKUBDARPoi36nDPZzWhalvn6vorgR5mzptjbtDTsPN56zEHa1mFJFLO/z4bIy
-ruSutSwrq+hVsRR95co/5tob4YGbBh6qxNNtKnaXsEP9E4P3GZmbGBWpRIRDBCBa5/ZAREk/Vtf2
-DTH0FuD+fsyI5G9aQZfE6LFvrDQCnOs+qBY7Zi4iBUKxYXZnKvXVzLLSJxhK11ybBpaOuK62/kFj
-RZ6/+7maua8MXjQILh5BHTB/yUOigS+U7pxdjjSDMvooqVYnR5bJOM8VdQMEEWIwdmAP2Qz3a4s1
-Arj+bUTnbedZWZWIF9com8p3N/c3rZcFGWiQz7wQ4XF8O0BrZ3oS2oW5z2VXmEK25+3j8CIP6XMk
-sFZso2l/mr8wRXXRnY8hX24gj94Jqz+Gd/JreScpz36MRJu+sBb1KwG9ErinQSehAs5m6fX85qOu
-9WDIoS1SJ/QuES4jBxu5SYcL12fN+dnNtACdk4aCA1gegzz62VeF5IePHBtbu2MntMBcOPAqCtM9
-1PO8VocUt9NsQq07ielDFJ1Q9X3L6PtHW9zfS9E7vFBT4LbANR/2OnIUnQQ3chXW0eurp2x725aA
-qJGqq5tDwzqooC30Gtby3xehxPRThKq9keoxAFF/ROwZ/KbFBZxYDkTV1CrGxnjbaH7FpJHMhBSh
-uS0wODcBfdPh9HHPo9M5+sjNbYQxUYpaWJUXJpwjoL/TcNzF0u7yDIrMnt12LymLxwhLDFJU2eq7
-x9pDuYq1eFBlvUShejziJr0z9W8ndNIV5Tms7P/IrLEK3Mk4nVBcG8uvnZ0/j19XgAcT6VI+v5tB
-1cL6xd+ckAfuAyrFuLswHoJtkoKyfXDA7mwRFppLDkn24JEiB6MgsyGicoF9lV5Eb/E/vIMyr9EI
-H2ar1PzLBwKqHFYJpC9H3gzR1Y2anlAb7UVR8V2ydW0/BtaRvbsKU8NkcHauH1qWbRbBBSAtThfJ
-Vzj8kDiyQKS6BK9Pbq9Aj4G068az6Cbq6n2EKTEfeZAtcFv1vNazfckJCJdSa98EuPnbGOTlzk6m
-9nRFMgClRt6Aajpdqihak4AzmM54PPss+wwz/Xmkf7id/3btd4h3QwChjZcQoB//MAPttdAXHE3p
-flqkJ/xme2luNZSnccWYH8D+Zvp0AExRo21+91vBDzf9nHl5wMxcEf/Rb/14plFvfDsGcTRmSXki
-i2l+X7q8kK/wewFNibkSZC5DATe+QHtKsrskZhoJyy0yELRiPTzSI5v0bndcCi/vnL1ZB5iWadJb
-o4nTEzE1nRzaQpT1mCmENgj6PAxCqaR2+4k3SDnpRHTR3DXz9iANEOfBGJHyAYOVGMzVFPY56Qpn
-0EJwqcpVPmwYx7lhrz1Zogd/Qf1cFDkMexTVllCE/CWyZJNXIwPbkfE90sSTAFFYjYKkaVvPa6yr
-KiRT1g3tEb6ufQhRF21NrijffTF8JwHYV+A5JEi+wjiXXr2ZSzJ9+uB3kb9lkOLptg9oi6RgYAME
-CJ+NnDBWtXxvFYFq87tVKn1Rrprk1+19RlWmvy1r6APmNjiakaUdwmfoTUPm0cXIcz0XtKjiYu2N
-9A2Z/rgLcqT83kfeuYQeoTy+GY8l/9Sb9aEUPUQLGM/afzwvbL4oo8Ftnco5rWjNUbRcc7YncfZ2
-mMoen97U3wATCZ8BAj/q0uMpFE0EWwvJ5r3r3gSKcBQY8sNeq+38ToUCoY++NeHjvLbORpbebpph
-PeZsxXsG5+TW7au2V8ZsWU7fc7SYRreuV5Wh2O2/0AIQtn1xyzQltndeqcnfhvoDGzbSyH6JR8iQ
-pRQcXZSTepXBNn5xbHuhWSYC2wLxDiGUKuqR2rd2OQRW2lDQILjvHUvhzYjdpJjjbBR9Mespqwy3
-561hp5TPi2f3wF1jxn86QCESBux3H2jwOmizn2ElqGHGwEXBk5dc7FqkGK6FUCc3HJhttR5NwA4Y
-LLligN/BhZofFRHZ4O6fwXXyckR1X80on26qSu/DMUt+aJY78z84mGl+/s+E73UsFQX0ked42pj/
-1bxplLUyzb4R3dZ7u4RagTNLzLBgBCM+pfLXUK/N9QjOdlSUKFhS9+fo+lYKKPQ6aJmyp4EmUMiu
-R0RPlsKl5a/gNk0ZCWC+FtHTcYautfoQBkAtGTrD6LMqaihS25vKH5Ow2qUOUhfSajb/M1c2leoy
-uecwDLtwjfPm9nT9QddxXPaB2aOVxXTF7XnZH9pFV92jgTi++ImrUw7LkQ5jPhvupK+nqQYIIKEw
-69LxBvKLg6qhxibe6txhOHktjPM6zTlcK66D0zy3JhBtoncCMTb1EcJRteQbDZKwahINyharGXnw
-RNRBHQPM6Q2tFVINm4TfwZftT3dn+0fK1R0yDPvO1p4SW9QdwlZSsakYcqsFBeYcVdeXq7iUFaF6
-3bzpwH6ZfP+5BkEdCAfAyhMfWxPu20TnHB4oXLyq5pCC2v3ODV4aqWfVIx32cu0cbRdAA0vJlKF+
-1OpvJdGfKooiHxWoyAf6vEpWxNj6+XeSI2tnWv1jMP3FGTsGmaF0goY+MRFFewdgNY5h/+uh15Ab
-Ti4HX9qvLUEbZjsZDwsLANjIDE8wJV//haxQF9R6s4hlaBggYT+uOSoeAiav6Wswi8fcaIr6YPZT
-BkyQRhkeBuHRe5qv1kKvbaJaheT8V++wwEfYY57I1Rgvu+8df2VBFwfAmIjHpdh3Eg9unElPMWpN
-MuMB3QiMUHSjj/Q4ncPc3FHyUCgEI4m/HggAdpWIObgFTnBOPKtGFyjrjHDCv3jifVl6AVR2fyS8
-gWzLzN8FHyo96Uqv6Luo2yBOpjzM1JrUkjOd4rkg3bBmNPvl7RlgHAj6z53fo855RTKchEWtqyqs
-Pmj3SWC+u5rrc7mTVUNYu8agK5l32JjxxiQpDKcrqwYpGQaXzENq6q71GTWfmBx3DGd13+4Y9bxZ
-B2LFX4+ezqLPK9EQzDY+HzxWiHnEOROeu9W/EntmswExnYQpXgRQfcMQbLIiyifCS0dmYspE2qQb
-hm0evhPsky+ldlmwsqKu2gSITtm4KW154wzEjTA+WzCyISoMZM+i6Mcd45Y6u5ckNDCqMy97Gjjl
-EfkqMGnlr6LqhSSgOzttqLCnTPX+kVNlAtLiwSgPVXsvwjshF+ZFS7UFX1k43SE3B/KlEoCkGiEI
-6qR2THaA5sjxy1cH3KKuZa+7/+mWXKMU1RwGkP733D0fgONz2TlRjVtZjMIph+jETGy+3ajr8xrV
-AHWImzJa4VYio5LfTqUAcxVnGr+EYedqyd3ZkuUCFVNTQ4B4eIGAllb0Uie8t8ngxHinNg0f6cc+
-uFqFPTVKMvtAxKk1Xuyxel4YqRVu9E2Na9cc0YSZMSa7R/btJ9BtyRYmleePjIr/OvkEt+MEb6Dl
-6N517fYZVguYBsW+DyFSSbqPFTKrnTw8LgcmKlhqEh+Ic03yu0xzXzArf+YxiAZXv+aboZPErcBF
-LRr39M1GbePsAohvttjNSHR854PGxI46sQdCFnagGvmVNe6fmImqEI5r9qZ5iqYpWSvD/ZD5P9Zk
-Cu2wU/kP/iZj/y0CyFC4qQPP3t6uUduW9nLj25P5O79ghEfiMj9GaZxvpEQ8s1Tr14Wcindu7wSw
-gQCzR9Kif21U9XZ2baS0owoRqQ7/dys2RRbiPgh8+gjhNbyJ2/n/t+ysDUxUh8PbYq0S+J/p8UPO
-pTGFdRjEQCErOVPHQcEHhtR5AHSwy45TID+/kFUg4jcSMmm4O4zwl9/AjQlsDapMeLcvmJODsF+L
-0ad31PFcTumZQ2v0S65zQektEBe6oChudPPKN9aLQ9mUdhXXoEziDQa9fMiPmZKF7gavVwT0Oku8
-vTbWeFDBgkkNQgdttn3PS2sVzyMfnLUOccBOBXUBqegtCs2rSzv75PCZ+1OjJzXQRJG0ceJyjaWV
-AAmL5HtJ1HOlgt/6lOeMedlEfG7Kn+hosL15zBqFwaiGJAadq+w2fMYWxl86/cBxZEtgjzqux7oD
-j6xw8BScqd/pIUixK61S4IJ9Aamv3qgxbym3g/oKWxxAupGnPzVbPCjgiCEPgJ2cdC1L/eU179q+
-5++P+y9D32BCOVkjbyMjl5aVwgiiRH4005mJy6TVmsmN0GF0/DMuI5R4IW7U3/TqgnXngfvlGXgm
-RwDsSG+3T17UFoUGu2cWE3uOYmQZgtZqCqh2CU+1A0RTblD7pWEE0hEDfG9ZEN0MO3Ar/7PsuXgb
-HOaFxRLf5Xi+IkGiZeuuCkRXfnP8DynhMOj5xlucLJeSdvWarneC0XyBIC46eZxvClU7eJlLtgml
-qcEGRSrNG26/orAJseGdFIu4sJY2wx/Gq1ZBZz2yLaXsjI7oHmrgHAt1zfQxD83Qo/A0VZJrNVga
-oRQIFVoDCx+gum5LIqmOhUDWxM8OVElLYQ7D8WKVSbOC+RpNtdxG2B4DHgCLmobAqeOgEEIDbVkA
-Ft01WGoKOYm3qClpz3tSggIankKkcg4jbgpQft5msoLGzohdgd506iHsKmQY2yDjof5KZ7nk0OEI
-vFFS/wNWjBLGsXBH3XvqK+hYfmYj9z/vQDjEp7n6zoKvEtRkjmFAQNAR8yNIF+ZWllErQ1ZpTvP9
-SoZ3L3EIMMDWpV1RdWcokAml0iN0nmn7W+BMu/W/NhTH6NN4Nasj/2C4wHhGfrEpDY/Z+phDkoFf
-6l07txJu+jzt0XCjvaO4nfPo7AAxt6PoU7v/0+Lt6/DILXPYiZGl4dekSYzpGQb55jaIfp0Jwl4N
-QjLnipO4FjLa4q9l0lm6fCxEPAqMBYirNBvxhdsHaFQWxqO6UjTuDF4X48bZ+8eHtvnoA/PIq3S8
-E0CXE2D4wpCO5gTaIpoX/lqdnTCKAOYozsExuan+rUCswxHWoDLPcqZMNHf3jmizDMf8bynV/Nol
-Jqnqjxhzpw9vlVJ/mloxL+9lZjzB8FqXheuy1ovH6KvdHxwg4P9A4+Ubs0oMtskpFXxXklRisHgu
-UVa3ZajOlktlFdAO61vIxcHidUGsJSgzI1Q7kz4eBV8SW7eG8vPgmHYz6SfJvoR7I85o3Jv44KwW
-bNCl54zdNzb7SQFqMtUfKUMK78GyXc/OYtcjrtSkOVHoRUvN/EXJtUmdTfHAU6A2agO9mcaC0+ta
-cB5dj/beV/JNa7h73wEBWgNgHJS0UJZJpCKQSQa77hiOvQkATY6breuABIy4amMHG/9Ikw5VbEUb
-pPo/Z5hexnoDZCs9aPQV08rb5BY6KBN6H1DW/s667cV6LJ4ZIEHaTEsaFYDTyfTXwy7lqX1KGqNp
-m5WMbZAJZ2JmlArddn+FLNqJaSmRgrMrq+stgD/AUoMVE1dF8AIs1aa7s/AV+Q/biChil0TvtJXK
-bemxLdDjSNr758JspkX6dF6iF7tLtuTFMNABJoiXePUSjjw4CcIrb5mCclscysbB10ksTEyZr2du
-q30EuxYkvL+gWd5/Agr3knF5Rh1/2ByV8yP5w8kRf+HlE+xSdegD3XZqWO6ohMV1zIlkR/A/C1zz
-w1nvB9OW+hPCRpiduqzq6bDx1egVZSKJUnL/+Jv6oWrUWLZEM2kEX/KW1vPgxD+876SfH889+ge4
-FcI+84Bc2k1MkHz8XJstGxusSwpoqkMrJbbqS4AHDE1Mh7PWLxALv08AwAATheAX76byFIxA9ntQ
-n90cdmq+KHGMV3FHEp1fr/NNnrTlpppqVmJUbm/MPsp2HG/VWBlpm4La57lVVIzc6oZxU499+JM6
-9zrFr8HE66CiJ7NdBlPQhCU+JexuA9vgnKC+DxSdKpNSOrXo/9lW8FyqSbWHYM06kJBFXe12IWdA
-c+PF52rmQX6rBaR4rYPX8CUDt+Za8rmIVHSoPqmk/s/+ZXWU3dHolqRqgB4DNXdKE4GjLtCxq2uz
-0yXUyytm5iwmPRhznQHasxPKzYYYRc8ePjx1UWKGkokTqtekNQ/NfJxdaGZfH8NcHK7nwkW32Ujx
-sR+Y04OXbX5czZxVkpt+HWd46tWS5U68pkvuWI88pQUyMT6uOpmZk6k412mLpq1MBmnVeAKtMiJg
-8/iKqMl0Gd5rJBmNMY2DapNwiDKLaPWmO0SBGUskYuUnnPRbZLx/0eFg/rCaofADHNfFAvTxztKe
-9SI7fTFnppKd7LMh6FpfjNbhsOBvYO6u60fDjtwORGWsS0YVTLVUXT1qyoT4JEAj4xzMDE/YG71o
-jNWJZ+qGDLP0kBlPFtRiDfth/ily+o/scuB9hgbFIdmBWJzip9Z2r2iuzDRG/APyMBe4Tym5ZngS
-N/75ZzTD7yk61XLqBBajBDryF5mk0kEAo4DHJ4cGQTxoGf0D1m249RlWBNTO8smR2rEYSgW4gPFZ
-l+3sgWpE2MvXGrzBK8NxKkaFLZWV8jc29XmpIJJKK4Y7RyBRx7pLhCH+oP9XRqWHij0Gzmv2kjoV
-74pB0aJo0mEOII6tIso6rXWCuIdUSoVLaIZ1zQy/SMnD/Xl9JyK9BKJjoN2N4/QtZbnLXZSz5uzW
-0DdaDPBhhKzMcCva9Hf4jzfAIMQ9aHs1/bBzq8l2B0CtjLs+dM/5NQUfMujBsrN28Eyr2vCJTWMR
-E00/jnjyDOMUm1NMPf+10N25Fs/pNbcj9lRR3ohRAY2Z0BIlfmpPOCr9u0FUAl53pAvTzvbS55b5
-tXETwScpr8lITqkfMzla6OcPNrr+tJgpsEgh4HaevxtQdHkKyUsn7SvTvAkTbZQvFRB8jgqcEI3S
-cL66xHek6dCcAZqhj8FQKOCYhsRpoxWfO55VZJ39D0RNPm/EOfHvErKJ/Kq947j6dccphjlE/N5J
-jV387DJ174bmSOMM5cAmTiKzUkgDQYFVdh6ZuEnt48vVgwRU1aHT3c03hTnTlbV7P2ldBZVeTSil
-N+x+YnUhAgMQJY85OuRVBvglnBm7v9pbiBDTL3RzDP/sszMPglREVxis2hfUVh7kBHdFhYx4gfNf
-FvlnfxsAWXww8lbeA89A0ktMrb1hipkGfyWkiFr9yNXPJ01eCmCFTvR8STTIP6Nw604wRyTF9KX0
-w2LGaS6iCCu2TkbbKRWPprGymiWpXHMdbdr6PyVwdqZQfKCxOg4FuYxzmuTd56MmRXYYTbN219r9
-iSQXyx7y1ZG2/pd2EDZaHrySb2q3e2/5VtpTn2crB3Rw2Lo8vciK+k7QJz8DjMF4n2pYR5Nn2wos
-Jqg1YMGiHwvwOjxRoDqeG7qet4xNACT781s8KYUJoiESH7gXMxmhnYX3/AHyAS5o9ystakkzDmwx
-bHIpUnoSWOJIuh4dkvrqG1BZLcXCuOFxzXIY8opP8DSnOp+KrfXQ2oW73vVF7vGagGt+/y4PF0HR
-cY6TnQkFzyhSySZroKjpPy59nrK8LcQqxDu5do13q434DWCLf/p8WWKEZDXvOKf2gw/XPWUCTFnm
-I+PW0fRiksgWGdo7Xqlh5TPMbTkaGC5kTVSD0KGs/dOcOT6L+zGlnXwvey+0FebhTBscZvUrYfJ4
-2p6HFAj2EntPHuthwZA0kwupEWun/qTT9BXCA4Oj8HdKhB31Bls75hB65uTeeqKfzGRkYqvPCAKE
-YM5/iEXe6+sGzRiBOD7DELsfo2Tg1a3AeRkdhF41P6/8Mw/KLY/612npa1Fujug8lBD1vW1aZG2L
-NrHBwTjpEBlqZdTXIr1LmTAHGcGIPvSkb36h3YAlfcn9Jsu6EFpnpFmtmtV75A1nm6+Mx/e3Sf9O
-RjVGq7TfpedWCjkHgGKl91uy4DfpqxTa0V+9miv7A97gs38Y3lFSNDJ+PZcoJWHUmVk8QsvLWZGW
-ystVVORcvWuvidfMHu5lBG29f4eicwoeFYI1Lcs4jNTzLUZwFcZbkc12PdBxPF4t6Z2/tyBLmUvP
-PWrvc+vE6ykGt1tBRoDgSinNHur6rK/117qCsD9yyBPNy0MEX9PCAwC+1FNyT82qGb5OcG3Nsj4e
-hvE/gmWM2ShNKVsBONFtkvRMBM80pHGqa4PAR8iah1wh28SfmI7hxpBc088AHuMKDOhZUpa/jgbs
-qNhNagd3HLnirhtyUXxG5/nfzGhBMvsvQVirV5VgZ1PIroUjQ+IHsObE1cgcFGfj17WbavGhfXs1
-Q6PBReDdTcU2DsDUq8ow2yk3eKvHFNEDZvIcG2A4Hs2Rn6pHr1kcpo47vgYT1PLcONH2lZs3/6oY
-cJL5lQ5fpuddbzkMTs9c5a6qdEyqqsC5IhLPUn17jvEa8UM1IPVYC/7a1eTE0ywrYqbPa2cP0Gg2
-GzpyV5xc5YI/R+7prT+doMjAUOklZa3N1iVRbVdTAiXSa0zO3bZ1edxhRjT9S8GxF5sD/A0UD8xD
-PbW5I5yFFBJJ8B/8r9dNHKuAAdQ89Pxsxm4ULUxjoLuhhcerUAJ+MDnZMAcoS1f/fJzIMiqaY13/
-e9a2kFAQeEvLDLGIui5w4WwyNlN2byjAL+vK4zc6mrOiLInhoG6fHAhGYJDaD4WghgM5aNJsJCnp
-kCoI2ymWS35acTH+E6Cfmyi2RYcUPIRUBTmZsXcJespbhXjyQo7iXqj/RJaDxV7m+tW+jHHTI1UM
-fzhDGgR2QoJjj945+qNkLrcpEZWgdVFhLI/sXvIr4vc6Cqsy2Xd8zeWVSgd01cM/cCigh2f7YmGv
-Wd7avlYWKcz0lQte30t8n/sBG3wtjFtSlWxTVI/wVORyGzP6rnAka7oktknYEYkYAEXMNk1s8KiU
-Wj9vbR76MJfM3lBCCyGiNb4GcGyRHqcyVfv0c/nfebvVNeUr0fje0f3FlFJmUX8anerakvB4Yfoe
-UzTFRpvUCVKGFFMXxT+PGHofi/fp7343/3RuV2nOGOo66D33aVdVTidN0LkXLn1ORvek2F3ufUci
-rO/kitE6Q5Xg73fE/0eZTSo4XLPbuhd3t/3TP6+5/RSJkXHQajSc4PWK1D0QmnB7ZbNBIx/BoGhJ
-wMg6ylWHlI9rrnrdK6RhZ6kcjuGYAh12c+e+m/DxUEC1JMjDhuK7qufzMWexZZ0xshjpGl84gxcy
-dyAiQLpq47KpYLZ105dmi6TGzdqzogY+286G4U5u7QO3WIhnQS4uvnEsb3jnzg6I2RPjGqU5mlcI
-xDng4x1ezaoqyObi1KJNMeA3ZmPvfGnxAGj+W15q7qb36PpgVecGRQsB/dJyxOuihA7mYUcFUYOh
-Gahmw79/1feEv8JtLM21YPUpypXBDz4Wb/PpWk2lYYMjqWiKDGo+wDrSjkeGVAhdTVYknOZZWyVi
-ILkHTZdc1T4TofjRBuvR1f//me66tvvP3Ax99icA67/sGLt9capw62Y+2X9jJAag8+dGBkDdmhTq
-918itJt3HcJha8EdVwxHtl/NQ9S88sOaFh/VaL7BBmqS51NZMSEoaqGOmFEb+GuQaPcbq7G1FGOB
-bmj778CeO96yJeIYw+vw0PenrS8DTTIyf+TOaqSdKy+RjkW4aGFVkp0ueDa1XV0RnKXpgcqGPZ9X
-cPFEEqTA5oKJHfVWIRae0M4vlkwOymPNaL7DqGLP1qPVU62C2hNqVEs8vtiQL6TmItnlVLDoSZLR
-biqk+DMYfdxcyu4U7kETALLeMqBHJj2J55UlLut6KcUatTYqDEcEiwdZzk5NAst3BDe9deh0eFTD
-u0Tki/KrVKbotVGeI+i1sLpIXT85n+oZRfMBZC3tO1x7o+ObYu3ownqy/RmithshKGir3DMv/zpa
-AT8s5YwzTTDZPpwYrDimZGeA7zJ9QnCgIjBvQ0yKHM2z0azlTw6F7Jh//qIizyT7eI98KtuyEAib
-11qjFKq6dXlTqB0AoVxM5FacndV4LEFKdZ5r5TtmoaA+5znLCq6EiGlZqmhsBDTa82Zk++9aDwS1
-QswHCXFXH5Jq9HdIyNW8jVnffXVIIe/CcXSnewT1Ctv7PdU4aSWLdqz/B/gifTMUaRqyJOJMenSK
-4+N5Bz/Jtc++0ZgW6QmNRufKOHIdmW/IPjJyNWG2GKIRwFHe2CBaWtWqEHl821XC4MqBYlEKLRl7
-iOa6ZTDmIKIkfuaMbm41zgEDPOk6+gAonP0/3bavH7bthjX8cMUZnSVwlkvJZlns1BfZ+2mkdpbi
-VeSKZc/q8ULzJgibVq1xiU7sOBw9W9X6JAFw9fkrIFO9/LUlYRLjM1AT1zng6ZQeLFpFrhR53RsO
-74fYDLg9h/7YYzfosyCys/VVZ09Ks96exkU9s21O7BV93BtXO9qOVXKgT3CRHTxtBhPtAXw9tCTL
-XlX2SrYNnm7yKEJjGSHZhNxLn2F1xhGAyiyyRuUISUN0X7INoGwObl7bIG7mB4SPrKBc2T+DMieA
-d7/8Sjzk8dVzL2gmdlrFawCe01FZW7AuwAsJ80LeDngb5e4/yCCpp/Usix/cjz7N+62dFqbDDEBj
-ixsg0NQVYgiOV4heWnVVPlm7b9xMph7/xnwSvGghT9MVmMMhVpKrae3dsLWwpztJJrt1oWUYmKf5
-cdx873eOKf2M1HgZxua3Lk6toBJAGHOfz0H62Gqx5fy333Q4WeKLpTgdQzFlHYL+LgunsZgQdlme
-h/6fRFbUjCoRsHKfBdg9D7JPVUx2UoycAx+1FuRvXXJLHQTNMb5I8/RFknVY8c15GKPAfodwyBGg
-ucYsM01GRlR9ivbBdLiUipgCrOJc76f7zXzR0XqDpbQd3Mkxl2l+hDiWmUQvT2XFB37gXGTdhNM3
-WYroRhKNntLOaFYBhJEJr7xWzG+brzIF2++sLbKVB5UmVZ5nZ0ch5Bnqy20WeB4BkszY4xkDXQ6N
-S2H6gUrDRdBCkxCMMbqRv2sjGRha6LAaYLB+0v0IbQZtrHrf2GHBzWAa+K3FxJaI7mDCYaPDyW0S
-fNMafpr0wszFo8uxiTzzudwflDlP6KPq+XDjREEK8dN+eAna3a9bYpFRl8lrga9w4xF3lP9x5ZGC
-kfxI8mRrBRn/0aNnJ9RpdF6wZmdTGasPZpDJwoUChrVeVcylQ+iucLlq03r3E57S2ugWUTKjmkxJ
-la0+Sh+DuRBh2GutMuImWVN9UjeY6J61sCOZFrcNiJ5Wuh0GMTN0bHscIF6Q3jX71RT2l8do8VFc
-yNeT6TZUFtOFXSvo7vwe63YI2o5Qu1dRh6uDwcq1whFvuEXqJYsPIwq7QnaHAOrWriveSa/oArDl
-0Ms50Po+cZOrn1FzQtZW+shrvay9aGOebbW4LOW0HXIx1JDKrOmsN32QiCWD19z2O2Q3geiAE98b
-6rljwdaWbBI5IKb5GvWgcXRJcv32TlAPeAWj0FE9XoGeh08V20CFSgrD8XI4k/D/rRiXYLU8vYMn
-JRcOaUuqv4RYORiM2OJyZmurlEJZhFLSpoWW0rrOYFbwneKQVjmHgmuaIT93nCjAgl1jLIAwuMUg
-y64dITd+9d9hOCI7h153sAGfizDHEftrkLZRJdCDtGxsw9S461s9GNRzp4JBpKqIpGADiERtpRHS
-6KFarn6AWVzHMTh3Mk2b6WWOt7Pce8nOvGmZUUmWIw6voiXMc3Vyh2L2jhwuegakk97TGjt5WsEG
-BJbtMj5KjBp0UUEh1RqwoVQhnHy9++NKDmlLrlsRl/W7mDx+h/6TWmY8oDTjgl8muLN8xRnM3OnD
-pvhdXtqHvM/Y0OOI59TxFwct1AVJRL2kqR2iKySPhEFTpARC5xNnpnAciCLhHKB0pGwRC6ySqTYu
-/rwEZ3Aes+pFPgPwD9qH/TtKGZM7blb9DG003xtzipqmGAuGoPodSTiVKtrjGvb6WFsddZC3oZSW
-DMsT1/+pLqZx0iUSA8Gcb5TIXSJja25f7AM/c+0I3q+8XDbzCQZO6KDnbxPEWHNgFbKIuYdW1dzG
-4u3hj6b8Ef0HfUJqDGSTbildT0DahGBTfqM3rIcHNQPnR3fjQlG0i4ge0X3588D7DfA79fg/4ng+
-Gl9EJN/WF1xz5Z/PzUN/AFdSIqpdgtQxV/dK3LPOlS3CpDiYXGQQAHoCGZM38cc0qYtvZOTGqFmV
-uF4EyIk7d/d7jKStWMOUn0pQA24uDslipB15+Tl6xQTgEzfQD+rPRBERMxqP363cNUCWp9V1yWd8
-BhdfP2cD5FJ+8jHkQzA1kAY0Krh210jhBGYArAWfoUaSlmPEhv/CCbL62WgIb3PvX3zR0hJG2PN2
-kyUD9bh8locmWdRBOws1e7LS5B/B9npID7VlT0kssQYGATe6UsX8AIJ5y49SvKhVY0Uj32hFRKLU
-DHeCSpHJRPIe9GXWrZft1q1arYGBG2YXIUgGP54qmKX2tjMv/pPjDWA4eH7UW9Tz40+xtShVl39S
-yd7RdVuv9V8gVTvPaqGspMtLKNShedXBpsUGu/Fhs4AucZjh2uo3tTrQQE7u79UsaAwFPSbXzmjd
-Yih2ljzYx+99+FqMM2naEQi/6pbqijkrICBwnKgt+aSwn0FMfqhRCdz7JFU5+gaiAP1tBQgVxx4e
-+CQWPwUaauvxJPOklYj0NXC9H8FKYSGc6TsIifSdOStibUsJYAt0UCvtcnnUZsSsmv0cOjsZuRS9
-0ZSij97ZdthpQeXvxdzMz8PNOGb0ZjVUUdN1nOZmZd3pRpP6+zh3BYMbKDk8krVc0cseoYWemY6J
-CScw4mHtQxRZlqlVsFu1ru2UrwHppnbx4RRWdgVBhgu7DCS/exb/u7idPnCQfODVxsCMlVMEO197
-c9jaEeoP08ooVX92upCtvNMrFF/GVXEc0bSgCgCpPPFsVrkB1teVbSELxR6a+JqWlCewajgsYZMd
-2ok1gzAbuKhYEEjRRkpsT1vNvTvS3bCzTGxC/gnQs8vx4JkU8j4bWM8331nzZK4bRY5UVU5y1nFk
-p8NOnQ+LzGB8r5P5QLFSw9nU0aycczxITDb2lvfHcftDIXLvpcBqRpJTDQCDZzbC3IAwJu1wlGZa
-1oKECsY/SrFt4vsTI11j+0ubfJ4TuL5FrRgzF1RcJQ8ySe5ElmUcO5FcfzmcFAaunX89PhpTu1Es
-5byCXMS8aDUhBufQAKi4uVezlMU+JvFXZDG0WCTIvPwJoG+5gsKB8PQh2OlLpfM4Fq6m8RaoRH1K
-bygPz7IDke4iLT49r/fgZH669LDjgV3nvt68OE5s6K4qkI+FqkrnTg+byiLdTitcgSVvB3cly0co
-X7ZoF8RimiCp6Oy3kXPg0GQnPVqNWlmUWtYJsC9eALiHcptyfhKsGePy8dWvOTxBWUIMcEBiB1UQ
-DHdcpX/TsyDbpqLqUOIIa4K3sSJf/DKtAssDTVyebKPeo1JOeRFkVoqFrr2/z4pIL6x6MI/3Bucq
-fymqYeOnG5kVeL/QB0WVO+EJM0bFauy77cFPXaG4KalM8sRL7b8i8MKrQIdmAQyifiaM84MHEXVv
-DTvaOACVLkOz3iYi653cdJtsE0sKZ+MCT90cqz3vE5ofSNFSbEbrGXIO3ijA2wqbjZ1vr7JBzG9b
-WBqjqX2x4t2GtIPu78FNQv1r6kGldJwrjdppu2n7aFtC73rYlEChUXDvk+KCpW+A+dZkVBVjAmsk
-BWqt/VDBKZ0MBOUnud5YB4/glkOU6yweBX3lAZYDAXp9y8Nwly88IZIGY2D24mZ+I07MxJN2yFXX
-XKB56NnOfZQ79EuGR70ixMwkZ8GLfNO2INeOWWN7Q7mMgWOpyhc4Xgu/Z/IJ+rMfJ1SCPAWHVi8X
-6zzdhaIPdk7ajmC7Mhyfv1DJs3JGpLKtsBgcFX4I1yhYbE/++ZPDDHusShWVss1DOc/PCURpm+pe
-Sb2b80nR8cSFPMB86xcKDnWT/LqJLkLge0U5EO+qo51Y7sjPYz6FwdIl6sObgw3OPEHUpDioNQiv
-AemoudawrZhIfuwNml5mph0fiPrGDDO5pbI8vNeAqF3pi9eCLTBNfkXYJ4xl8a42ye7dvhw/Aw3o
-iI9+EzL6vVFCCsygaBYfyt9PwX9zZVe4nDLMxdoaBht2WmAZYGN8Rj2e4CpiqA+3/2doFtD5KJSh
-5hxYE1MD8gGfsIlcUGXkFSqjg3mqa/TFsSqIFbekspjIKuBXWhy+9+6zEVLPMfUbMvVyG1yNp3kB
-THVb5EU2vxCGe/lm0ywPIhOxlEswWQip0AcukufXoClCU3zHBsdP/hVq9CS572na2gkvDesROlI4
-OnjzqLZ93rpY44t3amJoBIK3iSYVn/j8h5psnvU5UQP35bn58tUGdvYgIXTD4MoWaWGASUlVKSTm
-Q46g2j1hF66Vwn0wpZQ45Ec184bAG8ozs9OM1Z9FvKLnLazEckRDyjjeaP7OIOrV/hvbfmaojGNV
-RK469Q4qAgPeFtK+u1DcRVBzp8U0L1poav+om1JjSYpyUE2tNb/PLUd0VvVH8lCZtyMxPfPBkKBP
-SDRG/Z3qnT6llomT7B/LliN2Au4DpP+YeLdxys5cIZuyvEhM70kVqVW7rnT3xollp5XW9q84/qvL
-6o3mV3D3QN/4BX/OmEQ0DtU/EWPwlSO7oe8zIe9vU6wN0OAOeSfW7TsjWkQLmXwzmDm+t/ihiSS+
-C/n0j4sb0ywPrWmla/p/Sit+8Dd7+7CYO20jKK9uxE37c0tE8oyi3qcnXu0Degqy58C4Es5ibykj
-7uGeDYs2BTEVSxh7QPMRH7HcJP6eE99jD/O+kBN6x5HsSVBtR5FDooVXgvDVQfl8Gqp5AME/dv1t
-x/2Nf0MLG6b1jqmJKo4yGI3thARAFDMR9TcjIyw1RKnKiIk0XN6osGcVsCgoUfEQTY0tQUtdKluP
-kRozU7YQNCxKm4RxvlLTt0nuH1XsBzBpg7pyskYNQGQoCu1ZIgcHv0JkTW4VNKbAZLD2pC15hmmm
-7aINECYgFrK+IC4c067cOd7h8gwK8W4A0TPPIg1oTvj6z64o3vhZ0YUJfwW4aAkLMZT/7auIfReM
-K9HHA+GPMnUqZBHN8sVVr5mFrIGpSg79x/XHORBrlzT1ANfDC3P8nzdjPWIqyrsZCe1d/Sjehzqx
-lYsA2pWnsTkXxUxi6KfqRRaEPznNwOKG0Qd4vYbtngGK5DyBK9X45rM5cCGCnn7oDpmbWRccMIX6
-dcSw6I0LqG2z8RchKsCO8HrC+JXHHJwsGeKDJDSoLkqDR7s3vtrgzqM52a4MyAupb44BkMFQVbVI
-U4t07/ZfxZAwhx+cO5ldm+llaZeWx2IyQ6f2uvgiFH9w2bWvk22Jd/UWQJN+mL+V7AyRAf32XCvX
-EdBtFsfjGXnqn2xkdQZVDwe5Y1USIFs06DkS5vuYG6CLSnopz37+mFb59Lyn/Hv7IW6E9DJh6sxK
-oYIu6/Bo7SWr+QQ+05t982KQVVieutfA8HpTGDDVLmWSdEEhw74DoomyDzzmEUryS8jWvN7obYh3
-3FyCGpqVoPJmKy7Dbobo0cM1yOjPhXH5HtRxOCHldKsHYTa7B94RRtQNUcQkX72co74dgkdzR6R+
-JlLlgI/MQPqiWV6ZYqLeaLWNfPGLZJZGLFf0Sf1Z734lSZ67LhjElBEWv2GyR9BRs/P2F8SST5G0
-Xefh8CjQkMgBCZNxHQc3wwEGK/q8/CUalDuQYOkJA51VCZ9QW7SJY5NdS0haXy9H5M+16JK2KDHN
-mdkI5knhTxTSZjV7y9ZIN58W1D+0F8NUSGpfZP9JhukWYNxWOWbJT+GZVmPmlN4G48l2pN0qcXEP
-MMR+D5iR1dIEl66DjHqLA4zMcitut2aqRuwDes2eP4F+t2a7KVGwRi6l1DXl7vlcn7hw4n3lReEV
-vkp6+pdSCawP0SF+57RS+7Bh6pY218ovEkk7SdhV7dtjm6FMJAWuMkVw2x8zmS++wYvUBWoc8UB5
-ZuGN5Kk9Of4FoSR2hqh2l6Jb9iIrmkkGr3OPwq8W4GlfSQZkqnVXzkAt3r1Eaqo3jBjKjy0zAPlw
-AQW5gt6FKY7T8zz2dkzyWKcsQJqc4iuX0K0J7tUecIyZXYtRSyFUHFDjlxGlUeXBqshx9b40ub73
-pL12pPivi295cFzY5F1sbjErI6dEVUqGen+NMMj5kVovLU/loB+VRAgeIV8Beyy/HdWp4l9soK5S
-I+GS0UUj1ZLAkhPtfT+vI03D9GQI3QVrZ83W0yulQg0o4PteRL94zxwrS4IOV6h+GfjgNzUKFLLy
-HBybi2jnRmMyGMUDRww2iKD5ng/Nxd5p5icG1aC2Dzy2+1BF4Gzfgb91+MigY0RPdsk6sbqZs2Ev
-34ZCk3wOopDuXtP5T0AozgYwimR7Km1hwpQj1REbGRX0QXnaRzddzTH0/InvzhORP4Wud19RmW+4
-SAHcheNDpyNLll2Yap9so1cqk35KpNxEcMTsLynq3sKvT31/TDIWI30FahEg5+qntcBdpTSfpcOv
-4+eQK/skJZFFHW1NiMzFTXeGOjWievGHwCW97EfhqPqbBLNhAiC+dSedA3BBpk3huxBXNyDibspo
-XWSZ/8xOi005O3MIoiQ9yx+QDb+IvEmnoxscLD+k3EDUlz3FVhgveakswwqxmJX3fGFgGMPOdAzp
-mlBa+NUhgyLLcgZNMv07id/uyWq+MQ+YhSyOLCKMHQBkM301gWKBtqntbscXVIfqVReDgH/Le4+7
-sWNz2T2NNhSYB+zmpOGBKk+1x3OJG5KGjD4ufai2ac4O06h/nbq5BrcJzfwKgEPobV2bwDtzPM7m
-IoAeVyR5ThqQPg3xQD6UcTIAz/07cOsBjEHDOJXxdC3iF9gyucW3xWX3wpkUzLY2eVh+OfVTQtpT
-v8DzBzGNq3ELYWyFHfJoSunE6lX7XGiuNxNN+hFJJyutv3d8qFIQE3NFg36l8wVgs1BxExiib8BP
-90CnP0bSOgfRfDt9hQiX4JSz4fEYXS9HqdTnWF/vgUA68yB5IFkvQ5a5alR8chZOFXzJODvdrRMN
-cOG+ByFvXz93jT4R0CCWtH+S/+Ehe0V1WByM9OHeClp2YMHTET2qX+nNpO00j9Cvb0qr/3Gfu/5l
-YFA+IfpMvBsLilDCMcJu7D0RrM96ghtGxO0C7EATa4cKXSPrVwKroxdMKwk7LpKqJXVy9Q4pbxP7
-1A4zwufC5366SRVKxSA6s7gS1u1KC5u6NM00ocdqTDbbKUwrjzQw5yII90P9vm2VUaqOWCNZvh5U
-2nElV2oBV3CiaAFeUsIhEg10RyF05hchFrl2qVSCwHzdM4TffrEBvK4m4dAW+H4u+AID6mvJCfMp
-eoY9Y9pJ9ayd4ziaaFLPqrDAnVrScDQLi8khG1UgIuu2m1lBvTGwoL6V+/tN966lkrzRJOilXJzg
-a078rdxfiEOYZc0sw1Ysk+ZQF76F9qutzLgDnq72//VWXxjkGipRY0PkZ0Dc+8A4QibjinyHqMT/
-0ONqG3mkAjhAX03iAXBknkgNYjO56n3X8lJRu99i26g9fZQZY/6wwuweaz9YqNKwntwoCsZdXPxC
-nXcY+Dlm73r9ZeuAKemyECjTJHiw16RA1MlYVMtNuYHs3JHKO4ceBEOGNhZlJVSX/PQwb2E+WjxK
-CVOBIKFsKjXgaWWC8cncJEiw6ye0iBtkTyPp6udZ8frE7rNH5YEzcpXpYR+uPZmBcq/Wg5OS3QJb
-AykfDrUgMUQWZpx7ewin1UxC06POPLFRBeni3ZCReGHinYdXVkY4+02k9bBEH6H1tppw7U62GV5k
-olFSJo966hvegN5pYonKFbjZoMhKnkd9uJ33ElJkphAzl/5HU66de32DYleMIJxk0hiRVCR6uRD8
-eNL95Fxzbk8VqKBFV0L74tkOLHKReqbd/c1zwhuHcGwynWddH3S9BdGE5J4mWY5p91HjlOJEWFax
-/LKJxAhb53YHb0qIDO5vgXz8+wVfYTnn/mkB/kBMj7BrsuceWXIhB+D04NFdInHOgQZvYDYIURBD
-l9jS1U+YcJWEHLtvCL/zlo6VlkbG7lNcCRpIYHIebQvB9uUa34Sj30M97zVG2gp4GCA3XrEk4URW
-yP270eFfCuNLstlhnGrpczCm5Ru6qEReEeN5jZb7Cs3dfRQl4jDUPt6qxhM0cHW3ZcBs1b1G0Hbn
-fhLKeXg2XVaUgpB8Y0KfqPS3iwY2+7O+p7Laj6UxMGK9ahVaYhVu7DrROoM4tSd2r2ks6btAlt5X
-ARyAG/f5pJRhvN8Ozql2tym3eMplfDgpEkMWKuTfYlBBSlhAqWdYIpcb5OEucMw5myT41tHj/XFP
-bByx0v4XtJKWI64MWGmaOnQO4l1hRLCU7L6cQZACx85kfKUhqcqFXkaFmpM65/A5BANaQWCyM65V
-zKMqMvIzdCHWC1YowiPdyYyGzhwAKzjKsP+/uDXNcBZWKMEkM7QalsJG5QsBztrJeXfVjNfO+nVx
-U0p/M9XUj/N0f24FAao1CeS5+E8DmhpR6Qm9qUcxoeqwNtGekM4MKpBtIS7t+pd41vpuKpsb0r6W
-TvsF4S9wYS6KPj10VeEcz92y9VVe9ZPH/mffXN5XJtsL4p5TcspgvikVsQIwM1w56XK1y7EZMGWt
-ObN0Adfg9zkT4E9Gm0eagDKu4a/Nl1vb2XhDscx0OS6GoHmUECLYE7ICriMZtLWfS5A6SwmyxnI6
-qxILsCmRBXpe7oddHwGgg2TXggo5MG9coD1uIoppE5GxYhjbal4pXdo3K63yDQ1GqAhqJrsC2/bd
-ekbzDZFzULlCzvfBwB3Xqe9m6euMQecxkI3UUlp0smTP2Uccub1Jqu1qRnbjypm6mbb6/kBnAbd0
-FSF5eN98uIR1CtnEKHb5PdDMnKc9z0R3/BQqp2OqXskUGpMaZ1azdfVf5Np/e0o0FFc48SQH8KoA
-MayF7E0tFFFu5BnOXOOBuV+60UG0mVeTGqh/ob49BSCRg3k3PCb1vxaZJBXECCtGFeEF8DnbrG9f
-BOXMxp4AxAtdN2aLboEMHLERyJN7gTBap+WlfZVwa0P6qyfnTCPuOqpZ7BykJ1TpUN1JJo9sGgku
-p3/NoTFVlT1RIbiSa8In/LRWgI0ijjCvZAyDizL9X6r85drbAFLGhKpd0Dv8zng2393bIH2kiZcL
-EUrwMaplzTQbSG9frcTqto1F7I1R7ZT+Mp+uLhmslzWVfRYOz954/vNKBiad9Zc31dSTjWjsKHmF
-pmivAFiUVukgdQmcEsfTORxa9bsGDH+bHY7UthLQZkZMdsznKxydSuz77+vMwX7HHOb5BhFNLp+n
-fQoIXvTbVoGekn6TRsv01BbW+gEyt2cPIadHsd9Ph1XAin2FBLlR2VwWySy27oqbIKOSXE5jVs/d
-5IR/3K0sIkwXzQk6rsMnKVK92cRKb3S8Wzq68po1AI70Y+IOS/W+Pk03P4/R/qXP79xUUiLEefx0
-5mU8xw2b9hzas9DWRe3xglF46VLmrOYhT3rmb3RCR1XYtCVKSIbN9rOWWVohnvwjurPKImx02dSc
-PEgrKvg9O2q4e10jFa3vfhmBnyjaY1t7rlJXPQaZF5SPQUEg6e8P7Gg2EXnPh+viioN5Vk0j250t
-6opdQwbzW41EnShmbRTxi9lDz+2qIN0dvsAe8Q5fhfUMmc5CUAIU1Id7ZswFGMEdiQfoEumAX2nO
-ByOsIe/emEuNQPwS09zYAyqakdsM017v8d3rkxTMyeTmwXg++ZFD0vAKwjbtZEUI5b4gIX4jfhzm
-ZW4MdwvE8V/4UptzhXGKy0qZmqNhDhQ6fdXumts0slCEnIPcnlEiyjLklDawyEt7N3Qatc866yzJ
-PncCAaNfvAbgtkSyFd3EaGrTC1ZFDiPgFTrNvBZUF3LF8OBB85D9xvu9TXD0x+6MEhRg1F4c5CTt
-Fa5Tug2DjJWT59tiy5o9ybUa+tWi8ib1bdcH9sX3txsqF8GxLO6q4DWiK3Wojbylqkzk5Tq8rq+W
-82VY3sTSfKvrLIPDU81hgt2290mquaN/rOBHYOfi1FE86CgGcPsn/xv5Bkh0QDq+uDf/XhzgrTpF
-kChngeSFJYYl65vM/Bc8wbyaq93VJNeDB2d9OHmEh8LYVOmGxqdu8o/QfPhCiqh/9wr+1NMcwAYa
-XOHg5bxLIbcQ4xcyQNcdGYrhoLGTDxr5XMtnYZK3nGk6tYUV3uRtQTfKc+f9wGHx9P1S6ARSatAo
-xNXB/5A14MJjlz0e43YQrkDZ1FdKRtbLqLlCG0vmH0azb5rNVdSqBATsIv9JC+dxfLyzGn928qao
-wqTjc2uAQG4NPqHpOZmn3arfeng5IOXmDv7ftkDKPasjNiS5Huv+FmSMLdKXghR/q+lg0yNd5n8o
-K3OZCaBivym0HessnukOcudisonDJjI9/hqj9bKz3jEdHuXBzBw/katI5jWvfXcDrqYMgNlhg1So
-mz8UOQGD39eeLkZqKYOREwYPy4fg1+l7jqLqPRHJPbYie8qSsbce4ViLPn0sg418vqdnXZjcw9QK
-PB6T4yweKkU3tFrPv5OvAqNINRlfuS2f5iyYZNlPMZjqVNORuqgwnQ6f/2g/YPmGA2gXSVG+DZhg
-Iv1awtNzlLMbsrCmvqRmFGMekttOAw4PcpeyuDdZUxmsyvGVbJUK2v/fFMn+0fta6IBhLIVIwzgb
-XiFRrPPeinWFmubZyroz3AphewqOLZq82B9XUat4TOxPvcC2arJPHnuBBQEELYQZVkdFar/kzKSg
-us9D5G2xrbaYCEchpMMa65zorhLgPOo+f+BRz00Ny+C1kKQ6/DXEsSaGn8yrCiYSSdPDx69IXEWW
-CoND2fTXbGkHva6MPlwd9VKHr2ZdNiPquZShIpX2gz6+iux6KZ0MXB/PeEnp0Zi872l1EtBCSnFn
-c5lataFNL6e6b0zhRzLNg8c0CxgY4PIH5OhvKvEg3UW/qp0Dn9pYzK3xQtGe0MpvkuPAMR98GU3M
-7Oo8c4q4jOiikEIt1jMYq2J1TFnE3HgaAvDOAfYnT4som0LW7ujdYMJFFzrDiXa/307zastaWLUv
-WdXlAl5qFwFMbBL7Z7kHC2VH4nH/DqVwQzv7284JvYEEHLAXeMlIN822mJCqHYvxr0p4ukUmyqDL
-czsVz+d1EldyckCVnqBatIisqN2fKFkR8aPLVerz/IGe8v53BIBtP52mnojA1DFYk1F1ihQsZ7E5
-UyFpMBnn0L8uXAGJg3Xd2KfqEPoSeFpYD/7hKDuGxIbG+4vSVZMKIEVyUsfuYgnJFCr9y9ZUSdPZ
-9oN6G+S4v5+SztHd/71KsoDQgP05EamO/6G9yZjtjEFrkZ/Quuw7txb3sfRvrR1yLU73gDcoQE4p
-twWKKbTdtUbL+cDdRK4exznmhxKfzqYgT2b/MhatTtGkJYhg9IB07U5ZQpX8kopsE/+kciuLKFl9
-sx3D1qxgS7oVXWScKpczEfcHbnw2vdKkF+3ygX80pZfmC0Guy7rd+U2jvCoQOS9u6pvMMLfT+pbh
-C7sBoEyI+0TENhaRZBiJ4ZS4ok3kqV7DL8x9bCJpL/1u3Qct9rbQP/76PyEYoVYeXr5n4dxW8fcl
-x0C1gOmEu26zKFZG48qNwlwfb3VsL+78nIefBVuZB9oqyo0a0J/w3+j97saRDcvul7IQKjuPYY9w
-QuUeakQ9e6jchHVkthknSvIxqY3vnPo73xKdE0INTn7cJ+fy5TAsz1ixguF5OrlcHj0agtvSTdj9
-qiRQI98tJWBaQv8lzK+oWhqH3U+BvoEaJuXKbuN1alTJNPH0Tj+p1GbcG5Jie+ZZpszCwLep8aCa
-aUs2R45CRFTRP8ECSsjdux0dBJGELm5hd1rdxVsJXFB2qDqjbqGk3luuw00NmGQUpgUuVHBPJCPR
-7L3qRrDbUEfYp0+vfvTnWlmtwk6EV5gAQr+5dUcTvhcXkjv7WlKQPcrpvexLKgQD4mvRYJfDCM5z
-yM5WxdL02cZeKBuFnSe7eCci6P5FZTV6bO23heiJg/AO+R6VyRxO0mpDG970s3Vf8nkDayctxJPN
-OzJR3v1h1++QHtMMbLjHUCM0K5i3YPkIW7lH5v6FkMxvm/giIH7e/Pk2vl/QMJXc07aAwxLxBUzL
-qQjiIZPQa4CCcg2tfEfafEZC1U/LQfsSvtMYdkvMBNuGOGS0TI8W64OE2vV/lVbiy9Wr5pOXafCR
-F1k2ra+xj152t9W9/Oy7Eqe8qvMvvVgCqSkIXxCrIyJaecXqoh56w9q8sSmBnBzvo3jjyGNDrhcm
-dfWxzLGB+ouAYNpmR5oSVipTNUjErPCjp1ajBOrb4/X9IjhtFKSB9CN43WOn0xMSJftwp+0goSj1
-P5BZBCP6ukPD/trIuOyjJA6Pipr2eo97iLsooXxmFC2rAo0ujOZneerDGTluuGztBd6K+aESgmda
-CqsN6OBknmsrc0zTE3zAlcmHgBrdzzPFi61m1a9BYXM65yUlJ51ONrbEUd8J4Ux3smP91GTq8Lin
-08HLb2QE6lYyPccgb1Ldnw0vt3xobpvQqFW/gybne+yDfksc2XyDv1xHLhR01UPvFj6neUqbr6DU
-+w7b0XlIIDmL40XXOGYRzvtcA29WzvQdngL9D61S4d2cNNhTZxHbJTNbAd6+MzvbwuE6KVPY/X/S
-CiACkztD9cC9Jt265c0aqQzPgpm9pzQnV01WFIV+GVmrhBUHpvbS/Hpas6XoOKS0AwmN8m0QfuMN
-ybVAzNPHX4o4hU5sjCNrBLU0aPfwQ2nP/d+0pql5i+eOtn4fjUQvL8n8Zf/FtNZPJOwEDIJ5iv7B
-pSqZ2CMVGER2WYfVmLzg1TMqMylpd5R7ZEVViIeOPgb4QQTydwIs5BAPl4A6Uu/9xO5BIdCfQ7PU
-Dra2G4KLeCjA8RvSHA+Vr59UHY7uKIIuSy6W9MoCKyD6Kni/B2UUoJzrZ1t4xWLm6PmxeX6sUxHr
-pjaBrKJK3rjVta4C8O+7YNRjgeS3guZxxY0mm93NhhSgKqgThtpfzv/B8MRpQr4Rta4MRmOrqzUF
-5UONK5mAlKFgXI//h+pp5Odvd89vm+8lmwrtyZBq6hbMANQQFAQsBZ7TOrC/X1o5VQ5HTeyxI7jb
-i4IpOE7kgzE9zMGHx6jUl/CzUKEhgjKZ8DbtRG0Oo3FG2W5lilDQ3PfmdOckzZRct4hLBGf8l256
-rik7BE/3GOv9H4PBDcD4IpN63vl2zQtDlOqMJCwLRPviIs+8fO+WapOIDL01j6lurtj3T0Z7BiiT
-wsLnhuFC1Lj2+uYNOk3H/UEmdj3H/hcoVLX47MV0yp18/TDqY3sEc0LxYhvfl0+cZQ85Snw4wPRR
-0jNlJYdZEPzVwCjYn8xzEbRrNaVhVe6TIKyaOmDXjojU3DxdQC61jEaE5v5u3kwzwi6PYBHvvcUV
-yXmA9Bo8Lb8mWXr4lFEzgbGn+Uo+swBGwzPhSeSSLDd0W7lRNhoz1nOx6HDVP4qfCaJhnhAYTADT
-KY82eIxXxrRshz7Bb7t5Xd01sgPaJXGKqTqTx/fmT0+YgpWvrag9pXMLWcv6l3HN8loNBVtXE407
-sRX1YbDxGLZ2IA2OCd4lsAE0Bs1SjuIO8IR/Z4/eHKpn7eCssMUeFghTxBWSDB3mamt4VzJq7o0T
-1yH8T0Zt7Fkabm9JP149JjO1SCMLmk1swDCKlhJw8LqPlyTT9dbBGr1sY+sBZXWH3UQOOeO5rLaG
-Xm5iPNp2U7Rc71Z8p3NSEKkIExb6c0/ocaqYxOIJs7z+YfMeUnbtyE8d+8KsQzv8Sfe1KpTIrvZ+
-SNyU5oG5v82F6QhgNH78HZxf2ryLzFtI/1+R7KgxF/yWR9FY1JPW4c7bAPDHJO44qaFvBM9VyL8a
-OTRsSiCHWTvlEP1X06THkYats/oAl0II6nW2Ki0eFvxGlj8Dznhg0Kx8wK2I56X/n2O984eMyIaN
-WOcPlhbsbyq8fdF7v9PiaE6+uj8om8fZnJYd+Xjl5F1+TsghW4p2Q4ZS6A/w0HO2k4LdW7bnFY1n
-mAivbhHRhNKkXN2Pl/oedu/cJa3RkdneMv7OrlzU7v6cjBh7LEum7B3WKMmBnXXhhzCMC5dglQUp
-EZn1dAEX2jCfJtAIzG16tsO+NBU14oceMxfHFsh2Thv8ctkJEqqXtZwaz//V7BTkGf1VAiCWm1m+
-lIJwG9fB0edU9HYd8fp+CvD9hNbZEHrP86ffjoFfWcLvh/u+Gt4dZdBwQaLU4nQOn2l0s1UBjrBg
-04J+s8lXciLFxamOpuZ6Mkc9mKFQ3wwbRyPuaROtV5azsJ5bEeLlJwI+zcqlPxaJA/X58woiP4Du
-EJKgOjKXAxxb0aaa1ecVqE9BiO07mF2E0u2agh/vaRrXRHNp6BH6DKAEghGGF6gnvmfno7gm69V1
-wIez7gJxWiUntA7ct7+FqzhaRPE3NQOZV6wBUm8AaS0MVFCHk6YpPFNRISTXv+mQ4lbnAYrgneO1
-HHdklUG43wjBGKJetPTtdTlE8TuKe6kR7v0klIQ8tvQEs3Zwl40Jec5eZbv+Oxcm0s4Z2GYLqaVd
-Z7FWuj/RqpSut39+WsSEUPffBMUvvqs+ntGttd2nSLQqCbANtUJRliC/l3p/E/JeFdFbOXjSM1TC
-o7DxjOY61vCD+LcwGimyla8WbUxrq32yHiADo949mA15/29NH6YcTVLiLeVF+67rfJHHH0qGP8+J
-1KDUJZMhiEpZ/IQDAqyIobHqrzz8KIRpU19BcY9UxK4jWeXNOBQpkbAYLr+vudtnlnW7LVCMX9mP
-Q+8Sfh2MRGrRgE9JrlyVCdQ+TkCDGThF4BvS44ZAdBeWUzCryic3Tr43ruWBc3DtQywPvzuaBAm9
-RbK8NVy7+10Qs67YpNlMGW2YITfOZMVfoX6wR/z/OTWSxZBFa7o6obgn6nK8pr/GhyW87coIRmiM
-HJhHV9ZntpAr+keF3zYM1ot1Dk12OF/s9It3um+aQEVk5SjZ+LWybj/MZWNHi7Jr0NJloJejoxUB
-pAxK7QAt+Ao9phEPxHoagqODJj8L6s2Q4jtBSfssJFVK5VVqLFnXzs3MNZ9nGcXvxXrxK3CODBbA
-PnVFmxxr3h6Hh11NgJdPEaYx/4BfKEiX3JjZC40pEV9VZAh3bxj/J6uaN0nxoBI77XBp/veu71jQ
-Ak9ldaB1L/r3GyNpo0yaIqJmB/GLNpM9f4dJLDv3ibHKxwqMIZrKK0tpnplczw2MHpwow+GkMjfj
-h8NEHplDwqDcaac3QaTpxbZ2urAdPfASUQKYesXK3619syNCwlgmyESMM++KxcmI7vWwwGrv1KPA
-so1KYfZUbYhJh+Plfxaj2a7poi4BxQkXg8X/+j+9mzQ0FPTPpGRgPwlbtoiFOukXszdaKV7ZKQvf
-1H+ubpEAkCAG04fNl4LRAuDwPHtcne7dkCQ2Ejne8h2N+zJc3DEh616cGZdG+cHbFWevUMm8NnlO
-bBZoHwzitoAlaZAUL3lxiVyWTPF8GraIBZOOKwYLqEIPMZzsAzz16CupS6JLBLqxdu+zF0Mqt/b0
-biuHnABFOA1yS+tGget37eCm4Lkb30j24dHDY10j/5Beirv+1jE+yzB5+kyuuTiPvWr2SrLddOnX
-0mMPTfwv7+WWBIgKhah7m4RhRoaB5cuiP97hm1Ca2PRLscG3IAm6/5fkeizZns4CnuHwCnHhPx3k
-qQXwozZuoKsdQ/CNFeqyB2Z/iEZTKTPkcmrhysC2BzYS6pwenWZqr/Pib4Iyf9V9qbZdbtdkxrQL
-l/YJTT+mKIf4RWNyc6gun2D0rmD6/9BVCfvj+OdZ7y9GApvvHbIaIN6ZmI0XKrrWJVJ93epCRFjp
-8PgNCIelXZSDpCgRR3jCjKgRnZcM6aLwLbuBnIKF0ITwMNdyFeK0hp0kGINLBkgC2KnaI6f3Vi2h
-kmVHUUvSZ1bP8GOpGom331jVRkD0pFx2OdgdFKkL+F6Y2IrGp7yjBnswvjA3hnjLC2prxs50X0hg
-dSHGBCrbwUDhPi/lMNlmduDZ9sBdm4czsv9LDCGxZHMxAdTlYtINAR0lFBudHqhcrRPCLjxUdm/F
-PLwch3dJHMZroEO8vvPlbmagcDBiX51cpuwM4y9mTVXmKXjCDoqnUiCTfOj5HJeDCdS60HZ778dM
-kmEz+kEDkXjDOlqahkn1f0jw4AGyHj0Por/0UXUekI2hVEHybKZxDl+LsU8d6KwL3CYBL6amvjA+
-eIulzsCIHnVLg7uqTKgDIxMLrZyDHTQXl4/DId3rKniOof33AAg4mhQIOSH5bY9qmicbMY7OVM56
-gC3fUFoh1iEMgCf8zabytIbunDxpiGpsFzZhGf6DlK3rnuxR6NAXI0kJtijjbQ6RWiIH/+rkDdXI
-6bR8s3rX0c2KP1eZVRt8a93QUXqLakkNa+soQJgeFGzl3QlGYpKYs/PIsAdG7fo0+rNT+KX5F4CI
-g6VbCylgTCiFTHfyok2b0QILfQxTkuvyIJFguZdH7/PeWGnnMM8H4j8vb621VaUk5u7quwbsK9oF
-RuL+TbR//E4AxZnA6VkKz5n3+WgYLoil4uH12IhfI0M2WU7dwEfK6c4lPR5QeiE3CRNjgnHqNQVH
-UupuGbKQY785cve+0wd/7cDFutJ98KByI5DIl+TDwSxFwosOOkTkLVtrO2rK2KAYso0jZZWnMUPY
-Fl90KI88C5803d26YPDfOubhS5kPTwlplVFxgVDSZjuEFW+J7Bmk8m+IlBWhuEYtrZ7deUBRSZ1y
-asHiWEv0ewhuof0fhlhvMeweeZiBa/9AoH+RpX120Za9nM5AlRztKe75AJU6wfQ8YQXKX/OMY6uC
-Anpg8eGXl4SvAhhZs3ihZvUGEh/gjAdelBNA2VzY3GOO2fvX9cb7jRa2CAfRs7kQ4g6xcNLGrtBU
-OId8npyDPyX5wHUV8c9enaaZKT1F9xG/IWpoYDYaKxGSNd27YTyeRIlyNfk0jzgsD6UoD/v29d0n
-e/AJgpu2J35oKIH5Kgzq80fEDNXt0YQCPstPwrrytS671QMOxL7RGP/FD3xJDx8ZISCkAbOfdPHU
-yZVWlSc86V7peDNYqsg/ZCa4Js9ZRHeamyknqyqM0Ovt1f/T2aKGCfwu1A2aD1s53Z0BrK7RptrU
-WdTKBSbzqbv6pC58mnGFoj1gPfofwZ/E94oDKjPKyjKypGSByxQIYZJ9ayLgJcSrwo9izH+UWeCS
-+9wokGC8a0/U5hRjNRkzpYaWjB7pBE2xuXgPEQzACKnnzjzCavjhPeeeb4FOCXyOul5ouBu86m4Z
-KaZsBcATaPxectiEh1smSlZKawjWwLHU7n50LxmbDwWkVYl/8eYJiFL3vNf9p+K5Bpld8N7jKDmV
-D+Irf5QfmFwnDkpPBm2T1ttTfiGbivgrr1ubHMuQgv1aRPSPqaH3bhaIuM5Cwqd/OuzQRkYbHmvX
-i5kQgQypziwHn6V/koZDi9ST8FmFQnAF+YaCvOHHJA6RiG6MJZSJ7fVcR5Xy7PIa6n7Vi/hEo5dL
-twetNc2k2qldV5KEGtmbQ6f+7ri1rHB1YF4Qz3uZAj7mE71dR8KHxoGMBpkjhhGVfoUuLPkf3htJ
-nvbdpcVyTJ8GWa/fGDRxk54FiLY33zemBxe1sfCHU8cbKaM+5wwofhzqJ/VqU+0a2YOas0ZRDRoz
-ImCVjYBPXWOKUcmvftKUryCEK0SO2UCmUg0AfnVSWYxmKt6wjHUtxwB2SrHglzLhk52I3lQGDbB9
-Th9h7n+Ke713mVQaG/hoMF81N1uHhZATGEO6C/wtqSztWq5tamcZqcKWuNTnL62zvdm06X5T7Wyx
-HTtUkZrnRNDlpa6H/RzBUDiwAylxhyw/jbD6srGZlPt4BdsyqAp6GlPFLWJcn4GOp4MbQuUXfisA
-sD2KzUTrwk5ksYkMRsoQimZgBmc8rhBrYhMviCwQg37+IRLaVCZZRaRw66xPJJCOf7Gmn0B7w1zX
-ddAAlUy7LWDHpiU9Yf562/BJkC9DAiYIreoEC7910/O6yoxdJWQcDsagGdyfHGTX6SI/dVZTHw7q
-u0opvIj4Lx30fbTgSlUSrFyUW6s4vkhXeDjfc5ScorYSv3R4vZP/0OxAuh17jXpVsHuf8a2X/Mdw
-A/BNYELft/MnpZi0l/zjVO8mYpf7mWGptyqTe0w8w/Pss6rV5pQ88eNValyYemW7cDg0RsHOL+2h
-3+HsPn+xTrJNs/eI1Vz+CDL+HZDg9iS8QT/F7IcoBCS4dqwTKfEf8+gKbSd6UGxEMM/eG76FKypI
-Zz3gA8K4pyDifK9a5tRZ411IuV3RfMTxMsNvhTlc5pQBeHvnKrKX2XAGJBCEK5SgQKS8mKAmGuju
-1MM+nYLufJMMGXoIu+jfMlLcNj9Mh7Q8lg24k32mQY+o9qrRt0iER+5tIrcxNIh5c/yvSk++6xkR
-smJmnNb+oLb65bTB7yrqRIJWjPXbX+Iy8OjSmcJuC0n6mD0LbT5GhvrDEk1ujrBrkFpH2UHYEaiN
-9h9Lv2k2Tyu8O8sErbVT5ioB7VJZypkVtAZg7TOtOCf7AmUK33/C7fICOApAYu39JzkbTPSLbR+G
-XHsB+eY+4bX3tmkBFq0NskI7D/RM/tVmNApW+Q/7R+4K4pwSsgEKM+r4DQAVFrBdqHgla0LC7GZQ
-1MfUn63cnDxg7FnT/e1PSuGhSRAy7nVgW/pKgRoGwhyLagtJ9mCiG7cDBNpzmVjBbNYXWQ+7enHN
-ex4xUVg2eAO/zO1yye1Mp5RYO/jVrIni8LqkP1GFZKoczK6v3od8OyftxHMjTNZshAF3m6JC37iS
-1KZP0IuDkTHqZrKO4QNSTQqMBtUSaC6tz6DSPF59B9yHzzsTumSy9Iu6/ZruFVweRha2i1N+Q4ok
-mrAw8wmhcDQhbryEg3WY/cFvz+BFRSOQxEMmAWBFlbd3TPdqtVBrCxTyN9Qt+IQqpcW/AGYSQsCg
-1r36BHQyiQZt7e7NWXQrCc/6792q/8MsTWm5JWDUBefRtNzcjsp5u1koLpDpUSAcZw4rUS2+JNud
-B8CsptmV9205Adbx29q9WSFw38wLdvcx89vhbQ+RklHfG+kVJ4OCVMYc5+pIVK2jRMm3MOPllr9v
-4GkmcKG2WrjgWR/1rjNmjG4IGerLG+WKgkW+NnaCR5GBPbbh5jc0wr0Tyy2hXxOFqUCDgojUMdWV
-UiuXA9UkbSfPrLRErihWLhwqXnIrEKeJfBmhMAXKw7tDQ/LTz5YtnwylZzGso5hGyV/1x9F0cC73
-nxtKpYuH1553JguS+hWwdqhkY/TOxjlVA1+li48rwqRwep4DFL4NnLMscQrvWjdKawff8GJ0gk9q
-WbrgOxEY5tVxJTjcFxEqfpqoAa1IhelDegOm3EtKYv79tKDNtWSoys+WfOHTV8FMVDffIUFco5M+
-o7EnfQlRuDtmIOojgPu2cnx80tkDJ1QlBthHj5LkMQH9fPUimppoVbRshrAKXZEwje2A1Fgt0w+x
-5NthFcOLO29bAYoGgz8QDI8+5p2rNlweWfeVGhgvrWs+QhFecT89ESfqME0MXQGic3Wo2xkShXpB
-0OEEr4Opi3KjRffzmnNQuxzCjajY8depiVwki6288BsG03E+ARYRqi3ll0pFof19YDPhNA9XwQg/
-tli+UBK9Q4a3dsmE6slqn1EmD6WVclKkJEaX6evIvk+kU8dP8QmDzuK81ATqrM3XTPa0bJlL2BqX
-Ss/LT36KtZfaYUQrJWutfo69l5J1SzZp6pWOKPwg/gU00PnmN0uU7Boqa//TOt5rVK9+x8k0cg6q
-NtU20rgx3vKg8+tYtAYTNRaU2GbOqs/oWL6ebwg/36ZyEveJPb0G9YEY6Ivu/e2PGrrUXq3UYXz5
-MgfQtMcjq4doj55BeQb3Yf7xSLtIMvsL94JQQyTY8NO0E3sAsG08kfh2ct6q+WtlRq1TDqmL/i2A
-mT/JYOVog19HXTPzURXBVaA79QFQzU3EiGJ3U+o9mjt+IG7fCq8tsHr07tawUweFrS0Glcv4vj4n
-IP7OY0grDLCAp+dxT/GXw7lmd4v+D7+iZjkiO2YXkOiDfsuQkBku6nV/h08HdiqUftAVlBbt06mQ
-yWmk+TTrNjDFsf4fYMa7+p3ZQzcZcOX4YEFCibd+vc/iPSsrwghxEH5y4S4KuSmE34g+QvdSmDzs
-Lq6ih2cWuDCsMApHZ8TK4URE8W6VHWvVgbHU+6qPjvkBc19ixH8m/Ic1E7NysCJ6zTYyFv5riYx9
-EgXjJLyg1hxWugaGqyXh/FdYK5r6dUYVMK4/aEnouwjJiugPVu8tiR5m57PnXV4AYJPS2cdhVkt6
-8SZZjSDA957ZuJJfEeovlnd/zK9C8c2Tp7QLWkU23jjGYC9ZzOCVza0V/oxC3odlt1D1l9v0z59Z
-fz5HuwbmFRARoVpSbbR7/FzezzKHU/BRS5CSVIuEZIc7Z98PuxmTOfaepXCecC3r7A1SVy6yKOlY
-aeMDUKxNQs85iTBlgFIZ22/rs2Unc25LKJ14dnEmGbAqhBS9674LD7OTu2pGSKFZoeXrZ2bq+s5r
-JVI2umA47E/Ilm40j3XBW80iMSc/9J9HxMYTUQFpt7dPdt4a7u5JU62OmG9+C6OPJOMqQdidUW9I
-sEWMNAGHM0QiaGvfV7+/F7Rs0Jpm/JbF7pgARdZNtGrq24lBttS+KvaD4g/LCqUHtz1J4elz8PmB
-lCMHA3hdf6JmDRvCM3QkKzQsy2Iuto32cBJjF+SQEjKhy6aph2v09NXz3xkHb7/yHG3fgHMTlH41
-cwaCPLSZBOGXgUq1yFSerk3RSWE1e1ez0WmjCJPrDZXZysqmY0LpcpIcj5K299ZsFaOFNYEXYSB9
-swBadVOwUAEXHYTULLDVRMnaq3WmhOV2BBLcEz3OXq/bg1dVFTHjXQu7RIKNCyUU5oUU7L1ySr8O
-8Ye5XhylvzQo96aJzs+xCuby00LFvURHXEvmqAqAbe1msjjspWUI0t86iF5Gu6ERgyy3+fI5GMWa
-djRIeGfRVx4aFxLhc4dpd2GNwZYYiJBfk8Zkka2dEC1exfDTclL8Qn9eQhXWTdHy8Klvi3Tt2dSE
-FndRXvE4Hz8SdMqidt9f1wS/s/JVE4UQHXDTm7+xpPpP9wyJmw0FuEuSguRJojv/r6OrsjQjlEYE
-j7PoFqbmNqQXOBP0CYjbsqxhOZ0DJ0XsA+5Vzc0r/gh9KRIsW07vDo9uQJMlpLwS4NHsR0m5UG5m
-zEzMG2XiAoGTMZ0ivpuWONI4d1fWb0siVDtEOZWQ6zA/+Q6lIB+kJTw83aqFrqA4Voo+yJFoprRC
-R9eweOVZoM9NlUXcilIwnJlVRSuJ3Y2Akt4jMpa9azDDFsrTQjeeZmv1/RjoNDn1lq1LkzXzqnwd
-bqXkdOUF11UA7umSISE1131VYBlJdHBAxYkDut8JMBVlL5hErTlypwRg4GL1bMK+qdJDTZv3gZsc
-I3kya2PWbzKCWahO1CnDT/XupLqzIwHEPSTNzWMmZzz1mDXOGbtSi94V+/GV5GEGBd+ECC4KNqP1
-cVXCVbrRS5vS3QOytHbucb/oUqyEOZTDxC0Sj0Z4+f451NAERfsF5JrEb98Bifx7CaLxsscE2gMB
-/jygAlExbkQjDV5YDl8DVLsSARw0OkEY8luNpeZMGLPzZv58o1JoRlah+NG2767O+nKVWCIcM46U
-KuG5F5TYr2xW6KaxuHd6r2Im0mSOxPD7zracJwGX4PKwv6GpHT1IgcysqRVeM1WnCWLYwlKUDXMa
-0aScqfEqcLKoHBFDo31oTMtuNlHP3FPw+GbKJ4f9ZJ1qN1wAlTr61wLDXElZAACQC/SptaJkGjkC
-OLlkMhCW0UhPQH0z/mTov8NJmPJc7/bY25bCsShlIShNzny9bHmLpmYWnsQCFqcBbjH7VBpwOu5o
-j4Pnj+9kYzIR0cfx0sffDq6Y55iQvNaEUEbC/zWRIuVF2fro4C+ZXXTYTengr2FRQsZAGIfpOUPb
-Yd/FCxpnTYDtJCTN8IzO4M/H2vEz3ghiXqwxc9LKa/Y5DaUylyJK1/gv8SQWuqU725RFT+5GPV1k
-94fB4ZaDe5oHqqbMgnVWs/7mkjhuIfE4fUpvhBEiHKBXMfaVOoRWbFaZVDvloC+/loxsAjNOCNRg
-GV9kmVMIDGRF8vWZ1d3QsRb3scU3bj9zV3lo0L9W25I6aL2cHaCYSAMxh4TaSORoAPkScBSoafVG
-XxCm/wg5rWW7AITut4LpInxjAES8XpDfHowrn8r0dt+c6kPpXUG5QKl6rZkXHSTdFzmv3UcwjQTs
-NBoY0E2LaB2wzAo0gpfpi1sNiRrdgBFPF7VfuM6LUVdL0KzVpNjyKQDXf90ikJemwlsLq4c3a68j
-g2g3t3mr542SktY33zUI27p6DEPAF7zoixKHqfBuOjoa7zbtfDv0YrtcYZQnz+V1DQbLXwHQs+E0
-wniWAypFRz63b3EAnqKVjVTSxuSm8dC5pGK6YUe7TW+EXomMB0aam0OK75YyOQ7lzvAQO9d+DMOy
-2rC7MHrNKz1YCWtPXpmXVNGoeWeN+/gpeNeqqt1h2aL72+SM9eL3BxtDH038EWSee6mnbaQ0FnfC
-9Ebvk/4dsIkiltWWkX349Npus2OeFoJBty3w1lHJiUU3ijVILEmOFxqc1QFtGxxDijbdn9FvhcKe
-iKx+HTFexk0DAPxhTktgSN0w74DsEY8Pml2MmpvCujkXjmhn8Dx+JNuntCXABy10/WtcM/COv3L4
-5CmU8PBswJHCvomi4ck6JvMkrdrMuyiI6k3cOBuUQM699oZ77op4XUvU8lg+gq61zH0nf51oapuV
-WwdD1KBx+8GBwD96LMQ5Hl5dIhw6X543xaPnbzk6w3UbaC/2jiQ4iO3ghKx44D4tEx7gdDlpruty
-pFI0zw4gX/njcnC7qjh6cEwET9zicGdWpr0StBAe+8zPsXET7fmS7EqAfa9Gwe5kByWMRrCxgVB8
-pLJqPnrcwdJ4L3IYpleOdi3KBAKiCKVRSMXDhIeIAS/igtGkJYzybsQOzfs0FNJsTmP+3CqZR69a
-jUL5K/Vmfmi6uK7/ZBa2QlSXyiMkOkQz5EJrDhEWyzertrZ3w1dsX3vx4WXeMC/FrxuOznnLhTo+
-LjIimEkMSRA0ome5ct54Y5Qpoxmg6dDw7WIAeeEeGvZjF4+8+iDsOxKTA+Ld3f4vZ+2/OaO8IXga
-BB+v/YFYk/okSVyL6IA/5Fi8jS0aQIzgpEQAUt2+AOLOEubWaMWhu5dwKKtf7JcZstovYj48vAw3
-z1SpOyLAYd73SuxUhCsMv2xGCVLtdMTlXVumBpv58C2MMFOyRNI/nAjXF/umAnGpKPRmzubV6dLF
-F0qUXyQBEGivw7vCugV+RYejbouEs9PbkWbUMqA/tDGrrCOv1VNC/6di10/7OxQn31MMrmGHH9oa
-fQuw+ZuKq6BbtsZcrJChwZ7FezcdFVkE+Yz5bAMkyd9uNS9Dkp4ky6omJsrx3jPSGvIJd37q+PwA
-0zVXv/40kC7DuZ2uDU4S/3NifKDhLnn0kK2axA6SSKUzbFAPLkuzneNue1bMKgN4bvQ6OOVONnbO
-dG+vhL7Wu0LLW1UbusKwKXbqoRel2lPQ1EyvAvAhqLYzXTZkRH7fgaw2pGMUvNT5iu8YvQJx9NBm
-6OyhHwK9pmV1Rrxum4VLBwnXm6Dqion5VWxZFaq07krjCAikJi3KJ3YPm11bpckbpAhItTQM5fLp
-79PN/HVbAAIDwG4f/i2EOBK5FHsyaPkObXg2SqDhPFumzhpsa2lc5429kjRuhzGcOo0VniLyrGBi
-f9Qhp+ufTWaraouu8fb4lYbPBUYeSew0UB7/TIRKOI+HokvMD6po4oDHNfr4mNAZA+3n1cJRHcHe
-RkwJNpSWvOlXcCf7NGaV8EsNX4oN1h1/RUZJ/HUb5fpwtEmaz1uyrRBK9C/PudWJ6kI4sjnteaHu
-2HI9zHFJz3HmOEloVU7SFTnhJ+3LaoT4X92TiHBDrnvvFmP/eMfmFSd3iDQvonD6yfUeudBYIW2X
-Z9QGjwRuDggB930r/erbzz4PMnmzyAQOBetKadwXMaL6yCycUsv/EIA4Mt31jtnHq76+5TTF+kQF
-7MfYVgm3iaL754VnETuTN0GuNiQZt8rTYA50luXAlrNoVsU/A90fU/aAIaFhTyGljCSljL7TARVj
-E9WMFpxOP9dAa+r93cI6uG/cUd2kOFQeibLbyJ79oJ7vPrfvrroFFbwT68IU+TwL0DEJyeNcubgB
-wa/zAAeuWDRE0a0/JfP/6DtKx/Fz7JXDHW7idSw8WuuW4x5AqtIb9IpqaqES12Pqz43u6Ebs3Owg
-6I9obzyfW2oQGD2NpNLcUh02YLNIqsjREmRXLVU7c68RJHX27Kb6tO02/ew+bVPmqmcQuL/L95kr
-mEeqWT+Get31NYMxWCIs4nMRqh9Vpx9QUE69gklKn4TfG3L2xiPHyNJxLvFIc95ZWegdjy0kpH5V
-7pBIUmEggBWc5oWSsONeGeb2GqkzL3/qjfzGawggKXntKB9S5+TFWYuBQVgyp0OEI2YEf6+SDaiH
-5MkOBHanWsfpJnKG1qXEH0GhR9r7ttanJIMkv/RwSYrRmX5DuXAmqZWxKsQTTCoalgQ4wARfIncj
-i5PlQinP2Aty5wIOdxpTWrTP358XrfQbYfmjuYdYgZ8NVxL5nWOrx495kn1+QYkeixxSYqAxbB+f
-SusS9UQAg74ICbdDlyO02m/fRm/GrBoxfmB7qlUI5FGMTH4AobfBMnah62fWMTbHLNXK4k7AIdsO
-tSK/CtN4/+6rkzf7d3/1IIonijDjWLXuSQXwTnB66c77WTEdAZLqjBJSbegN7SpIlrCDJRXMHlv7
-S8v/hhAKk4n/kC15c+uCPvcn5yJz7b55Fy4Ng3oljw+cxeEL2uYzOZCIkbANHNVEngInzAqz5rgx
-DpOWxt96I/cP4qSHGkhKqeGaC+yRjffa2s9b83yHzLEjJU8pOuGSw2q0SMCbYi2c+v8uYnUH8xto
-GXAuxJrl2OOQj0HWAeyra7sAbE7r2astDOzNYCv2sjDqypjFgjEFjFQoBLBhev/5i/6fSPQr7Ufs
-k6gowwa4JuXKQhvRa8jZIrX2g7qn8mpcViAVZChiQv4fSE0Mrsov8BIQgi/elg9ists5XuTud3BJ
-FRU1wwsBn6AkQdXBCPQHfpbhcgNGEmvdcBtNUYfmaKbxYGenrrJcx97P2wRr8pt9PpvN+NzpI41+
-9dvGCh4XNH9r2c4pPtFnICpxcDA3ogZGICvV1rOUFvA5v0hPyQIJQMdgpg220IyNGYIElDYmcrW4
-1BOb7uEPefXF6LAc7B9OTH2RTdWdSknD/0ljgbAStQfI2eMv7C5D5dqOnPdmCovz6ReLOQqz8FeF
-qXieu5JRpAcyAg5mwTJ5FcElwv5dQlUTOHlmfZ8kLnYL3r80Qp7+c9qIbpB6lAlOMoAlDQ95r5uG
-7J+dpy9JHlS7JC1fta7R2RXVpVaer/ecvUA3GstKo+fQcKmExythkHtbZB5OKWTGi8CBk1iIsYou
-KjUmiI57tYQhmD2qaJ2AmIUkj9m95NBk1ZP+6VjPkdU3otHftiyRFuEZTInv/5qXFpuBvQ1TB6yJ
-1/GxdR2A3AYJE3GibEo/LZbKs0YSCM5ZTtODgdoT5t9da8aVro7OWx17WgDMKtsmA2XppmcUTnCc
-scdhUr7gKpH/ubXg30qKiqKDGWUgDuSAAfJNja+c9OWct5EtHwCugTMw72qJaTtpqtzZtzW0vkR1
-tk5fKC/ZCwYrWQTK3CMlhF5vYojAA5JaCZWJsa/5aH26T+A27do+MxWAqIoXpwZfOdY0zgKvwNAZ
-Fr0xuzMf5u7umiQ9TBHYDUHs8aAwlAkho1bf9HqnVBBkSAFOAdG9ZrN8gknSrcQIq8hLlvwdZMiM
-diAIvccbcuGyDr3iR6v6Fz1ZLZ6HQlJ1votNQHfl9VT2crn1bUNnBnjI4SZhsFZAC8QR8vL89m6I
-647H7IAsKJDoXnYLPuqh40iE2qWu8AUQNS3lBnBR0X3/HQIbqwotu6wpSluf9JvUVwXddFyCcoK3
-d0Zjjb+J0IfPTz0ZmaTcUty/6e3iXaiGWvoy5SqOQe089S2n2y9X2sfUDGq7Uxp/kgcslfR2IsL/
-7HtWn9VJotaRANCE0t4vmrR1PnmhWyX7R+9c1YhFnco5m81d7Quq/E91RBvQ1d9lj3mSR9MHhn7R
-+rLAOXvM2lq1VmyUbzTTpfrSs/kOY824KMLoa/B4N8SbpGjzqUI+bYbBot33Ik6uepAlrzKrl7Z8
-KQeMDWhPSjUY8+T19A4N84Y0Wi4vgEtCMJr7kTfCjSzqjMdayGRiiJm2O+47edpNnoENsw+DC8UG
-xjMHt9r/SbS2y7ax+VAYzi8c7glJ0ofF+gO1Zvj8x5I/Lgdwd46EkYh7hbeyxunHmQBmSgqLG9W+
-LH6XVdgnOqQriQjrpaPoI3AmhIVOe421Y9rKSXlo7nIiqTOKoDerpZ4Y/6/oOGIhbAPHA8HEZiKf
-mRpdQl0lEa8lr7eztqdSHKtYJL/FnKi8dngxSV8zoq1Jg6RB7hX6RU8F9FtAA8Vq8CaYCB4hFbtC
-YA/P6fmxXWqSOicdCy30ApXVw59YKnkQKGDEKtf7YECG0eVD1Qq3ZP6PurexjaDMg6LMWA/4XD2c
-DeI7BTmOOCrzl05/MM6Wz0qJHa8rIyafNAVasDrGLj3MncILdTDPEQiNgtzfat6z6SRP0r7rWHau
-pc5MkPnKpAJ+RGHWJyV5z0Iqz1s0gW3CerMjouI8hpREBs9vPAYhXu/ipPmc9LcwI+rcjZGlqvKC
-BBHndbm6cqB+bxTzaqg3DvdD2x2Hl9n7kLta/XDZBBjg+WCTTNr5QGJN+Qm5TV4xGsAxXB+OPOvS
-NizYMXGqeR+HhpTHemjkbYO5HPtzOQsSMHRfL29bYtYpADb+VV1RBTwSJfr+TEbdzImQqpK2Zulp
-gRxPqE6SSJMciFuomcWmLCMH/Il/FvU7J61leGY9N8WshYM1h+Oaju1ruKWiUmXSP8zdpr5FEjai
-hBv0Ru9XxI7GsJOHy1Uc8Ent87cWeplxWq/YSCstQQa72B47Z+oa07Va279vlUTDQx2+iRhMIh4M
-wiwUZoRlyLFqHNhV+V4ZwOf0x4r01nln9CjH87feHaMUeXr0EdmHgs3rTn5To0/QcuCfdAJZjaf2
-kvYSY7a3dVaEr6tx2c1xr2oN25BA0enrGRbdB4NV+yAHhAeJzb3EfwqQbxNLvi77myvlh9VYe1Hp
-1mXj/WXmk2p77LFgsY+hU7XGfSfPHhLogbw8q3J85R4h+sX5zFt+QFzHTccTMIJVEqt6Cp2OeNLr
-MWajmc9MIEcVcYp7IE0K+dyaFEcOKJVQ5JHgnqI5SlfCkP36iAqYILqT0c/yYRV4uXJ0LNgdb/ve
-p/GZLAhdKNz0AoR0uVdvvSJy9xuHY2JDIX1RAkdBqyC+bI9PLlfxhtgiyntoXMnfamPA1CA045xG
-tIT7CyrolmfypePYYcJC3sWxxDdy4NpxymLOgZ8rFuvubziy73cw47buD+9vRgTyRldnbv9dC34G
-lcILy4VsmRuuim5+dlGhP41z5rYsj5ZQBci3WF79H1tlQRHIaTX0muAbRtH7sd890edm35FuD4Vi
-DfNqay8qw1cSq4HI/4NE6txcA8BTfGHdZVZwJAwVNUsfe/Yfl711ccDEOGHa3xkP4WNW2k4EKvfj
-9BP+58N1BEGtWABeTil5pADBNf0lr6RHEmzPRk4EkEdFlhtPZLvyO/HxlM1s0ESPYsuCDPRsUAO/
-1gFy2PYQTvcBx/pkAhXjQ//fC4wUTchHJdBGk+oDqRwFj1J1IAAnGv/357//zqo7aCifTwEtTyH2
-gWYSUSo8O5UcBwmCoKELhRyzDoHFjPeRh69aPfde6dWPbEc3cNryo6jGnTAnOBaJVAhJwOlytgg3
-3vfSQoTyk2DyA0xUlNG5g6ye9Ktzf6XpD/NCSS4Ab+toqe7P2njZVeXKcbCUekiGh+uCH5NMOVKl
-wi7zXiiU10DYbO38dXTtJ69KFK21quihSYWzNsAPEEtZgPHaDzxju2OZ1r5MEbAXkjm0YcBIDs0L
-Ujhi0Mj7nO0N6i1lAySoYUIV2nU4yxXKsaqECf8ajTrsjUX4t542P65vTtT536GK9EJAD1dVVsYk
-xu67XxAh5gzAorKLfmXSuLxV1nqcR/dxuzoAnmFxj01QNahoX2V14+LYqZvRfwmxa0ZZYhuPrPmD
-JnDlyBpoP4y0xQT2KPPDw8tU01MDdOGTxnbHIAh6HYjedYg6BC+/mPrY4lKM1JIGDjeqMFrk8TDE
-GRTQVIvu2U90ik83g5A6G/DrDcbpWxzIpuiJFoOZio4AN3PGsxdlthfZwqjrZhIBqMYwjaWQ1rY8
-fr44APtO06x1GSJrP7gYZqzQIONX600H/Hkaz3cM9tFFjJYlN9UchKyYOZs81/0D8P3qOFSPTSWz
-IeyuQKR+ESU/Ea33ptnzpJetKjmAvwMoSt4UIuIJho61vD+DMAkD2szyOO46xC21XUiZ3OYLg11e
-hZFzRI6z/3SPh10z58OxYr4yA/qfVkMBeBzLMAJceOrAfN3Su342dsgHQyAy/CfquQDLnTHr/r3z
-pjALw97AEA20eW7m/Si/UAIVHNmv52/V3JvYJWWrFb1cpBGhoFJjYgxAWVcFpyeeLqnCFXoNX5zd
-kAopxvDnQiM1O0PTZt+6KkTIwCENwl8B5IiyeO8G4Ay1mlGLCtABGTwoan34DebsnPBgIK/zG/Me
-A4ggqcOHTBA6nbnZHo/wu/KUEkDsGUXorb/fwqqw8qQofuF7SJe4O1fTgmFUmbzlv4fO2Xes64yM
-uINjWLUOy+bcE6LwQIN+/9BJgBR5jaHvIqC9+BJzCCHMWCKBUaRvZ/G24iwbNwAwbocwEFOVsMPW
-K4rYyeIMe6oW7bWaLOid7G37bq6WGafAXej5FJ/VRyeynKTY/LyQdSPiSO4InaOPmlIxml5ybLwJ
-cw8Ya3Tvx6yZvkNL+n0LXesMDS8EL086XkVGG+XtIQPOI/+357Vx4+mNGD8+dj+Dpu6HvRaLdxJ4
-Ds7QbWdmMCan9ulrp0iqG1S1K5SLn5pfanuHWJt7gB49cY9vye6mRZpEKthqnOHCuDkNlxvU6B34
-gUIioblMpKRodEtWlyUVlkAoL8l5B1lnRNurpkvffDemcWa/d18jHwZpJHnnhxFcgRRPsC1Zsub7
-Vws/4XyDEaW93SaiVevL6sKhgwWwvHCXFbkMGMC2nIymwn6k7qXrNAUvKOKsEWQcUUzKc44qZ1s2
-d+01Li0dHVuj/8yVy41yDK/WZX6xhk7dDspVXgp0hrlyoZ0ZHL3n5hRgVO3nfOs9QEiLQAE0DO0Q
-baZMMUuqWbao2Nk1DWAn17XzHib0R/WqIxOUGMYz3rMA5Qs0Vu3bE3vC/r5RixXcbdvD31nQoHn+
-QX2OZ2mVxtxOzq4hhpCPzqhJP0qh8H8/2nVxdxjqokpUcK18Y6yiLj4M4BEXTIGcqlt10jP69m+G
-EjjJRzAWdy9A5W0zyaRqo6Sn76iO6mKJSMUAJ3u8Ekek+tXif3l2sYkTTMtpJXUq7Q2XEF2y6D1n
-FePWetnGJRApHyMUHbp3Zyy4ibEfaKqA4GPDIHvQnAaIUeVWQOFGYWM1bGFI63QrsKGWTzYnidA7
-BAdfAFuok8xbE329ajPuUw2rBqJTgJE1GoeYxESCqaHhwMReb0XzBoLr5hb1Sjsu6kGZH5y2TjYD
-dJHnB9ytP9xjW4ppOlknS7A6BxOSxivHUwuZ/QNcIdsF9qQNt6UTG9BuknTycNO0eCpaXfrJEhco
-ASFtuZDlQ6Nd5Yp9GK0Gh9uhHWMylvUOBuWzsTyqDPNIBwevwdyFddDak2Qqb5SJUKq4Vfs5xwUL
-1LKloIXzfNTfD+EBDBylqVwuPQKSIfRw9hSwjluvIyPq2+8csxK3T3CWYYtWfinda9cO9x1A1Y34
-GzXW6e7Y1ov1JbES7dHdZ4TFTNp63RvRazxUnV1TLmWwmjKp193MFQnXHH8XBIZjcZXwvq6uzIVA
-63/+2QnEWA0vbInzRJFt6TaxPh6PjB1QfO7vT2ZU/BY/GMDinwQuWEFxlzLd/f5oyHSK/EPP0wJQ
-YG7nvHH392ZYPnvzpf5I9VqfdqCBq8jUAzlIKgTsfTcn2Y0I2Oyd0+oJltzvx8POWFRuTt15yDkr
-0D/sB8reOsUQaeFmBbdvFMbl4YOCgbGduPDMw60j1dRkuSgYg+qPlhSycIK5VYG+oAeyThALZF8t
-YFhE5Ng3HAhX0r/BYLquyE2PC5Z9t0Y1Qb2+lRZSEanNnI2QkRItZ7tfee9fZocRL/qM1PCzw4PC
-W8CfcqjGSacajQyGhUbYnwGxOvXbktzANFWN0Q5MFAkky2Xmwwc5nzdrT6fa5N9drMBbmpPZwnTJ
-a6A7/5Q30PoYnvuQmR03g7joaxPruQd30JITjIwVeNYAtKG6dDw9KRpGELdCXYhw8Fs12tQSiRYP
-NYTcPd2ssmEdAmqcjxIg9CiZ3ZwqXyeQIPsU3cAzpSKjaiODj4aGx3YUxQ3X05EIL5i0KKIrKFcM
-+LR5c6XYP/g/z6XLWW21v7do0BBy+1w2oC60wFtQLzp+b+4twpjh5DuBMKO0KYGnQ9k3a2Ojb1Uz
-8ZU1GH40pJf1VojTHGf6jueLPkRDfMjG5X/2PVuEMJh7lYxMLa8WtcKKG0EoEVP70Vpc39ceuT3D
-hQXZG4s1FRfV8OmdRVtoN7ycZuZ3xUAspYYzh+CIp3kJlti3R8igTkiJELWAfrrqiPFjKdaXEM0W
-N5QDARlcEtxgkoPr9TiNWbfwizvTy7hAeZiM4qj/lUQaMomDwu7hYV0UmdPTsGrTAEOLAlyllOc2
-abXGg8/oW0WFzA+onSwhJWfsEiZA0ghsIiyRK/LP5yCmw48JmZa3wAVBGIIULUh1dEI8mg4bs7BX
-j2UYGuWsM89TilAjUsJz6i6jSBymWBClG1QFtelTQioKGTxlnCXSANxLuJ1O3D/AsOatdx5S9ha7
-aXeH1+QT5r9duQj5O8/IpPp1uNHXv6Alh/L5wlO9gAohLOSd2uZyvWwnpGO+SS3EpyXL+hTRu/Po
-BeekHFdoyJVAwexjlOPgWKi0YFWH8NurDpqIIZm2U67WnTwUP9xIl8bGEQxRKo3IPB5Uwf9hTem4
-6It8mxM1cbRBh2Cfibac6+Z4ax6jjgH9ncF4xnYAcQJzUN3SdUvvgW2W24OaxP1ijvouOZc0Hywx
-7rEE4HtSRs3zQ/iAf+qGx9tyoVrXtOlfyTc8jDno9sL8M9M4E1DtWaF3DGCpqN4RJhMYGDtXg9iT
-mnkM/5Fx4jfV+TxtixQqSZky7inrp09b1FBuVawpl9lG81dEXz/AsZr78XcCAmQ0/6oPUe+WJ57x
-is81redQic/tAXw2vXvk9t28BGsjMkUm3x4ni6DBf0aP0FrLrymqSE0JzgoFF1JOwHUZViTtpJne
-dzAH+E8qV8fyh9WU+PgRkv8LhKqRDOHZsq6a3ymySwsSjsFfl3j76oYpcTThDMGbXnGUDU99Gr0r
-tWrPmhPyZY6AJbSdus4y0SjxahS7m8N2IFhLgXpeYKaV4Yc///fA+gdG1aWiNkU892AKm3iJ3Udj
-0yaM8i5zLUSI74UuxdjGNheBdOYFPoQVQQmftsazAunvj86SV3r4HZhQB1IFyH31iQppATCv59T8
-SkwX6WtzpUg4oHs2Wxh3Rn/GnXEyuaRQwJihjvau+8p65Oq9kt+yAnz6OmU77GXyP4aRV2BhgeCp
-NlqXpTG7cQiDpcKQxU9+t+wFMHLM0PuJq0b1go5J3CmuGQcK/N4UqUjSFcCWQECGhvBM7A/qyRLL
-j5Y1Hu5Ea9RwO6oti697p2hzfR6jyNf5gNw/73Ysjb3RF0oEOXCcHRwC661C0Y6BPS0uRRYnQKHq
-Yx/u9+By4CtxsCyQ20yCEg51meJHC2EpXDHurwI65X0X5Dm7aQ/LJdryT4Ur/gNW9Gz7zRPT8djn
-2WF3L1jD64hkjS2RBkmYwB9Zp3eXDNJNmfgaF+ttw8ogPaIFO+CLhQT+Jvs3QN7g7KOCDkEe1ls9
-M0tnJ4+SFMwh6brvX3Cl1D1HKy1iW7Zw4XvVUms2PCn3OggeTR1Yx/EZyv9Le/xCPBccmiK5/GDb
-BmJt2r+YKT85u0Sj5qTqNf/6YDCoYLOaBULTcl8UtKTnso3puTL9CN7Ifktu7J33A1n0mkE2p8GU
-vodrVvsEiLuKG5VCH5p6QCtU0nPKjsP4QqYoSvp8shgu40B1s4F/CpfLuobyoRSQjXSl8GAxvmyB
-IK0mFAMsX57TnvRxVSMw0N0N54cWxk9qNoqesiCPmoC8MEpE3fdE1bx7V1HVrfslZNNBTDIW9lOA
-ZbaYRUE2aQ5FWIn9BG+euZ0fz4NKKf/5X0dantSSerooo9vHS2fLWOoVx8Ii0GDWAxHWH0VJ+0P1
-JhWi8LSrw1Omies9uxwjIJy1di1tzLA76Wd/ITrl8y9OEISYfryk76tcanJmjN/v7bPZHabh05zE
-kYoq9F8+1pHdWmvpea4lwyg07Nqu1twSjAQJKR2CO6CllnqmKVTA0hBFlpDwwzP3g4dKoto9+hh3
-/kw77LjfN1K+esoOev7I/t/uVgnJ9AqZkYGj4LUPF7VYIs4xsyCAMOX2cBkulKkFkb1YuN2ZhsrS
-MmT8i74nHRDuIb+PTcPd16WIqECmY4A5bV8rFJUujW9CTtfMOQcNjU/hedPEWDR6vx31b9I+NQkV
-5ZbzlJXrZnk2u8m1uBuZA0uitRvZaHHkomayPYIV+AHGBjRhsnDCokWrnRCLVrcjzzjnFTGpHVYL
-NXWYAkjR4LxRqL26+JO/MNNcIUCsd9G0ODh2juWTZr1AzVq+iibED5QJxgGfFQH9leYMUnfOZa0G
-z65SXz9TSMXH2H4puihUbzduN7FqmqW4pffy1FaoOQMLW2ShZyRGn6mT3Z8Z/JTBoAHh57VAZ8fz
-+FT8KfUOjT2m/ujROb0ABIoQY+FuyLWEQeJowazthzkgIeYBRF7luXwIxLkgQO1mNZ4wxCVJqgbx
-gVSBKSLY7yOnk+6M8sCDLxZ4AOjSrhei7KyujXwOlOrxVsl2V92s1hT9ErQJYRwVH+dxW45GSCdc
-mtXoib6FTBwZuYbNl3q77DT88ZwWnQBxyUuBXZh2kyYCUjNrLjeeCVAtpaguu3w4mQ26ib0to/aR
-oZobZqncG8SW6CSPPHV0bZIZAoktfSkh6I+7qsi7cyt6NNgEKUCnZr3c4B3YuzbQiPvUpQOle3zM
-qKeD5H40AzAJVAyiaV2ENe5dkRKQCU3APcfEJR4EwknCynKGk69dnXNOonUIxfwMra1UJfhM2d2s
-VzdqYa4zyfEeNOntf+qf3JPFmQhfWwXVNswqwlVZWIh6H6Vp1XCCaQ6fTy+C/4MCvVyj06u9t3HR
-fcue/aaHKYYyjt5VIF/BMOOYYObw9XnlcZEnXQ/abtq08jbOQTABXT0zFFFR67syZ1/853i/Ok42
-qRmWLRU8fKwqgi3CD5RKOC26NSKvQvld7Ui6CrXtWepFrgIY5UkQfRN/QT/TtARom9/xphnfOnfD
-G2rg9MoTBZdFL3dcfKotudHBoGHin47N6Rbun7adz9PJGGDNznsWlaT7UFMN0AxKw79gnplCSlh1
-8VXGKU7gPFHlHV9jlamSZZMjN7mJ1iTUQ1ITnK0+HqAU05YuSdRoQh7vlSIqwSReO32FBqjDxUoN
-I1ORjsQ9Vx9na62LAUvDccbvN/DYkkw7fxjbmv52XHv0kqBOUhhOQEO6MlrEY/GqHAA/d7YrKbBv
-iUyKB+ArNaiw2naCuLdaSvoWoCcFonm3S0T7RzdqblaMmy/4UAngcr8+rC6MbOumqb8pmFa5KtRQ
-z/JY0sJknyWEhAPktJmnGg/gDAc8bIhkE+/zRL0AcrRapfW1LoPWR6glp0M3DDcyE76qtelVjkvJ
-40yghgnV7WhE89NWF4vXmCFrb4A6JXUUaeANgPq+9NUhNcptg12O1UMxfy9rA3snvcFb7IN+Ukgq
-597mq8pLzmfX3mtO0BV4l1F6YnpkFNpwyJKuGRE4c8ctItiZLNLcDNrUqBbWU7ovuVLTMXyrhBfz
-qGc3QCqrBC4N9CPB2h6NT4id0Io1+j1p87fklNwdJ9Iv9ai18duW4h1VxJbfTN9rrbbBFPNweOGy
-fqLCFgjWGheyGw9uA/pdFGCkOmkpsPLW8HsZsojjV8pJy8+Zx+zGd7BE9cYL6IQ6lT8QQicWpn/h
-QzvuZS4pGBSfPDHNPcFK7fyctxp3ueeh4Vya4t86k8njeYI+/rw6eQxeaaPflpXajPQxzu4I7Z3S
-n2YWjgO7GSwo40CaAhZIaUYeTfMZSUo1AhJVynHwGzV9nYD9Lr0sugARgN67uw+l8uswGPm2dT2Y
-6k4qqXLXTeTNYhXTXKsDfLt2fmJWF/rC5CeSQ0Av/ud2/pX52aoGyzxh8Y2s0iTNALXz4DRFJxMK
-kMc7RcJQ1BOC8V+losSYYNPCso5SnOw/9DNFexojTmxqvzwmy5qWmPhj+ioMCTfV1DhSLaubpZ1K
-GwyMJ+rqrDg5/WNHgh4xJMqwFAc2E3lyxnJz5Cy0hIYUhraH6P5eoLotGksMjxNY3b5km1p5fd9G
-gGuASin4fs2KdrSPtSPXhEQt1UeFeszllw3OJmhnU1bK7oDI86GGDG0NTPs0gDnRT6JEU7B0vNus
-Kujw1hmbG9iJi2EFNWnhKxP12fls2posyCVkfXRUfmYV+heljZ5fXIiFSMDKBRtY/Hxcin2sgxXk
-Pia7hNEWUCHH89Bw3tdtiO8DSYFbAsTjwW1ae3IH34sUQQXFQZVilgOdN2KQ76P/0GlrUpJMUcOj
-nfW8ZwWL9ZuKyRHnuXRayExIMyhZmJEGkP7q/fRNChxZK1jnRVS6Sz2QP6rWrkbcLVmBqkdPMXRP
-6Rdf/YEisoXEwJH4dmXTPX9wjUeVfr1ANDv4XDbybZfq8FKlo3nnOiOnp4Wb75JF6LOxP+vGsoJe
-93uc0DZcfHlCcFlCA10O3fly6yNwfyG1Z9jFWvqp7SnHRsnpFaGtojpzAvPHmCE3hod6bv+hzNvQ
-2G/akMo4nCmiks5YFWcOzMWo3Av8js10Z7oxBrKdm7nX//Z7TqTbbMroTv3kvfSGdrLkc3pEuJIl
-DmSD1dS1C5qg7k0OXaBLpsYmjPQAGKUGk1XS/P8dBbGUSzB6pyAqZ4WGAjcadG+fdLpy0iRfsq+Z
-Ll7fSXnYkXgOlORA/p74ss9fLPD443tUxt6HurN4dqon/HP15WmW0qF5Ue8KA5y9VqGz3brWG/v/
-awWeo6gbqbt12hsJQBIGLYDWfY62lGBTi/ao/Fi7FTB+SuGDGcMGVeezxI5wyh2213Hm+4jl3ILV
-T4qVO24w0eVyym9fBF5QILx1sbAcfLzdmrdoC7F4molJpPmEx91m1t2FzpIziHjTO2kYxdB8dRPj
-c7KUUDlfer50UjjDoGAuR0kF5StlSqhhLJthKtae9MyO7vL2UxOtFgAmIyEsixRbQhrwEcwQpUrx
-m+58DkwV+zm62uWWg5qmlcyC3cBWlIf9UYdw16BSb2iivQNjjPzJq3nLSPRM3RG47OirxULuUW6E
-OgI0iEdn5jXLf+ktSgGlnv0oBErgqcqYEoeeSijXZeTioWRwTtIGVdVHO6GtdVVq/dJ9VRsLE6eG
-pWg44N1dEbNaje4tKcH/haxKnl+U6Xxrct2RuQ+mdKBn+VbdUzutWhb66hwlhYQzIVprUaVyGw0M
-COblB8GY/a31xh7xBUEUT1Iuj+WmOGruGdbbNKSuYyd5b5nWFMthjgMls8Kdy9Q6yLD9VrC9H6ic
-NvYuUZegniG2vxg8tGe3VQneG12LzHlNJ1sGjZVnaV7tkpifiHtWMlTGbRZkDlLiknfOuWufzDmu
-eCJpMDK2Z/94j9bZi/NQJlWfu09JL9nqWkuGeFcAXF4+Lwttd42a2RDelhLRro5vn5uNv9x5SfhI
-zP8TFE3jRkpvxlriaGHDdS8ykal6Rro7ooVm8gGFyW6nYAtmuSF5FaPYbglpWYRR6AMlXo5MW4TT
-kojGihPpe4vokAQvof6j66VP/nbY/QFryFh6vx6xjK2kU/TTcpk7qwbWXZi5Hcj+zIcAuKYEhSaL
-V4h35GTF338hBs+gkzWseZQoOmlbyBkArzhpSg94wYCyN1SCO+Guq7w+AYLfoOoQHnHp57Uqy0qa
-fVG3GwSFwHEVMBF1ok+fLxVe29b9hBNHYdokWfcRaIkv870unt2MSuFvg/SvmJNU232V5mKrq6/T
-oBsCnIGfy2/Xl/gTbps5KopTuVurF8SrCNDoodud/uv2o464X5/q/KzDeZsBpF0Kym0UKz/qkeN9
-CAjNb0jpM9V4qrwM6LQIeMjJW6tRfjHLFa8O8ZyRvjba2jEc//OhWS3VyfzQFDmX2ggSVBkUcYRq
-j5haFKBqBO/6qkHQGMV7v77eoIC8k8VlRoK+dj03cMReBnk8ONpPGvCLVCVJe8Ao5EjUdH1ONAGH
-U999uzniIybGCXahuJeiDag5tr9yeeGTM8d5jr0OOWJq+nKFEvxpV0xphF95w+mEjzSytlKeEFIi
-8UHIinioTSjhXfS7gjX5Om+s08rYlyDBDeoIvFPeOScCK1e0KiBSk2uwkYKKnPAYICVoPDQ4Mhwp
-fpWAHi4CMLlx1cOCRi74GkRi1rCOgIKv8/JinCaqvq03F4JYuJO+G85y/nE5n7hlJJkPbyFYlilf
-wBgPk9QHwgMGdtrDriDFKwMC6nz/ps2eofczUSeaFX8JPXKY6OXHI9kwhEJHjQ7+zWt65OyPxoDX
-ND+1+TEBecOg7ieeusw2lVN39voWvsA7UCY6d80HHC80hVgPB7FBLaLHrhc4UljaUKZfph65xxs4
-BrhticucUp9tEAYU6MdS7kthSR0I11wcsXTnNV9oW5CZip3cbR0ceXEHhSGcYWMWoDeWqRVIobRP
-80cuUOoqeHaL5NvH2F0a/q6wa+ZgV01LvIK2Y4g5DZIOnROQL2jeqNONSfO4TtJF0LAlepPAh9YT
-rRIERAcp5Z0yVrdqKHQGUhAV8LcJ7pr09MBznW4VH+x8P0fCfaPcUmNT6xIRyEi2OwJAP+twY94M
-H3dgaAP4RCXerUo00LK2vpW7u/AeAlg7W1QZXVsG7XSlCeVBaoONfEF/mUYZ3tTfhmHJVs1HpAxA
-vxiuGRyiR5EvN3SgRHBvivm/d9tM4dlchq2lkzob2ppHcJMwPSO5OrxpVw5WoGuHljovUjNzGwiN
-S3Ev8CZS5ZZE5lyE8sqC270APld4N6ItrpoQafHxIeQtcPCCi7QDOVFvFmhh+kXhXmp825bgf+Q4
-usDcPgeycjc+BRyD71En/+RGtbnczIXPBjnDx5ZBv9YGK852FIya307lg7MlgBsNufxE3aF1kCji
-nB+nJ4FiuXSBH0FSJWqUbv4HQHmjxEH5aJQXYCgsxfI+JWTT5Bsi5Fp5eV8yAp1O6pR5Mz5SDw54
-RxjGFilNnY5m7U+DImDFH9iznkGci9TQmP5OoCl7Kdy9LeSyQMnCs11CfBPjEeY5/87/sWAQmi+t
-pBiDe+4XzC1msveR5P/C3MjWAJJfNw4Se1WvfQ0rhlf0kqa9GYSSSUiEWMfNpvLxVUBRAIyuBBOT
-PTLxv+jQ4QrXsBnSdDX0Vz/F17XRL8TsaXecnh9NAiJdIrrNg1MkaCBXpUsVLNNbH6L3Lld9aVV/
-4lMD9Tks+2pWoWXXAClFGaGzSwWOfac1lavZ8diBXmpTtRwjIqrVUKZVgG/qc2eyc1jk3HZZHAhz
-DuxP6nvOkq9ZRgpU9iYGKrO0oNUyhM+Vsgg++g8kG3nCuKIvcrX/Y7F9WiZH10vrNtmf4DxdppbQ
-DYTOBffBA2erKEITFz8o8pBy3lnpRT9iKsCpm3WWWDwK2+07MSMz2CldlmXwPSWA+yZflYAwQ22B
-S8f/JVbz5AUDTRqw+m/g9StGHUiQ/L7l39lqO2viJ0VI9iwj3TroDowXMkqi/8/18uX527TvDpYt
-5JiAFDuR3GV2I1m40b3+5dkmSyDkqceD5o8MnCQtXlIWIELpT2769ZnZBCzNWFn9HohSh9N8hr9M
-f92LCyA8tkbrtxgzx+Iqf8nd1wUnbT3FV3la4zyxPijLE/9zsvuaqfIg0agY6cNgRiMatvQwLm9W
-y7X9sNM7SIXcAPOBIGhnznLHj46lQdm3iTS73OAvkccz2C1CmFQk/U25OUWYEwI1/Xl6cSFxhtLu
-DxqnFjqbqlMqD+GSI7o8JOZgVVMXDt0/g8RCCsm2IoxdYV1wfEVBQnPOH2sibigrQU7I7aRm+a7T
-Zck2Q0EisgNMP8MzQffBpTXRdIiZzzm73ccC5Nmm/MskLJza4/UbOGa54iJzUl+DUt9yROU0vFXv
-IW7+9d2nJq1GfQUDvclh9VXZKkg5SsC/Gn6GhQHojhCj1VZgzGxPyjksQaqSzeAvEqPHB4kpXY/a
-S/Tj8LiTbjLJIZnWN3KIVwRwiu+8SyKp/vh/Z+/0box8XHLnzg+ozAoD5R6oBZqweXF5EwrHyX2r
-qH0V4RspABWJN2BXF400jsZDkiUyEbbp+v9U9WBxL+MIpiUyba6/n/y3iA9PdJEPU3KqpZVPO6Za
-Q4sw6qZe1jhc4rY62DWM5VN51pWc4LP0wvsuFBH2kJ8Tgw/Nyi5tQ59c2Y2RLeKZ4EHnmaQoZ0yQ
-geYnZnXrlxkaJsB5YdWl30B8roqI6ajUcCJWZa0/2IT77yyzJpP9DVVIFsb2vTPMVLyTPXQB8mGy
-wBQkGmstE0nS1H/Jo9adkPa5ugRnxMN4F0HLmGpmVmytVLwA0LMhN0XPdXM0JPq/bQX68GIkfQ31
-+kIZCrmiySbx9Z/bCYxvrmoMeZ3xQepntL+Myww3L6quQ4hSanB172h9suMeYHL60lskCX6BFU2V
-0jqNzvKNByReHoEXRP2M87+Dt8osZfG7P37o7iQ37MlaXCe74EIqwob0XHP9LiiSwkPfIkO4l8N9
-3/aCkURjD9Qk5DpGGK3RkV+UbVhRmagz2TmTnkme1fuZuf4cVJgTZjCaEmmxXZWVzb8BbsYsZTSW
-oD8Kp3ElanqfQdx+JzELzw8XxID+s2a+4O22SUlGKUVt+3KTOhgKD10RywDXAMTJLUpcyU0gDWkV
-CYhKEM4ChAwXxzN/kcG9QEwL7IMUtkzArmNRMH2WKm65eh+JAe3GM6BKtUCcqCpfCVx2FFIfVNTg
-nWBf9A/792BQdtATGNKLI0dr/Do3Up60n2zPNMZzEHldwaP5NC+CjmP35mbchRBuXWds7q/204aZ
-ACsVVBJz1xFD4m57NHB2nfV5JGUFjbUAK8JNWadPF5zPdOpn7jRMg/mP2GNxMWloiJFd/lYJRnyO
-+pI7AGL4BzJvdnSVcq655U30dALhqcMlT7s9Ot6xhmkJncWwlqMUisUHgpQg0jYFTYNY276mbQLB
-66z9R3CzneXbFteE8iYl77MULrMXn+ADNnbgtRPtuQPqmSvvduGHg0OZbTNK+DtMum0lpezTqBEG
-aPVZgwNhNY5/c4KB7RQXK+utq5M8O9oAjnWEpsxGhH3bVdmh8u7Ih2pt/6TjxGW7eZIMTJoNa2GU
-l0URQjYeC/2spNyJYU39QKBydQEEqrCvKoJMwwcD2nwTwUsbnx/88s8q2/UcY55Og9zH9MYskklz
-VGGNrlfEnuAMtYF/6kRWDC5uuooC75tEpnf9IGX/Z8hp89qtJPboIoO69h05xU/Iy8WzJke7ehEz
-QDUWaCxI7V99Srvsefrv9azgI1wwLj2Mf0eTlkgIA5ZNNMVy3WYfw98pAS7wjf7F2vRKKTJWBgMt
-EqiU4mrYV3FpKrdE6xm6OWkELFstJ/0iMGWcrCqgmNNSqcOm6UW6FZuSbOYHk4ieEDFvkm84r69t
-Ab2ybmZ5PHY5R6hiNOvT1YzviBusvu5Tf6cU39BhIg84b1xeB/dHns12qKw2PA3TW4GObCa265mV
-ZhbGQGYSe+Zr6im23U84ebV4LxZivTWosYjmQVeS4wtS6/EoEE5IGTa9heWWx7PA1PErKyB2t/wZ
-E7jqnF1dBTF4q43nymQB0nUQxy+EtaB1yeizUtxOoSPbY7Fgng3sSbdHrv6IyC3fYXbrxKoyBltJ
-rElAAz4iJ/KVYMuQbU7RLshVApq2johzU8J2YSMvzuork0JTslN3XzxzSaEuH1fS7d3iprDlH9Pu
-ZGqkQ2/MKCe+/g+Aminx6sKo+1CvJJGe2+3sLbDBr/nQX4+BgpXIMRQRmAvN8d5NlMc18aMXfThb
-mX2w6ZSUFjzsRC13TYV+ukZknQkjtZHQlOsE8v+zAR9wph8KlEh3ywT0/0wFV+YlnkvQdpBFveP1
-0mkOPwbITAgp9E/DrlQTJflfhMnFmkvrqGmr/+2yaG+TCcGKI87X5TLQObgUj1MXCGRsNGsVzjOw
-yCPd15EosUAG2uurzojD61R57ZX7pqKmT6mqfGzCTKVrguVZAFlOFMm6UPPkTtcwbG8JPPQh8+mq
-Z4e5NZb3aQwQv1L0njsqqhYy1SqqV3Jp0rmJUQoI3MvWD+CCQoOPVGe3da16MyuTpow0YRZmWifn
-z1O6May4Ju25XkXLT+5WsTTlz7qq8SDvk8GlKXJNTuv8Bg4EQokId8R6EQqaGfI0ib2g77KmJiuf
-iwWmemuO/rCq5MW6KoQtL5BbOdIUQQB1y9lVDcOKjYOKpgwwpV7INbAViCcIURncFInlsiTi85YU
-HwxgZocXqVj0B31T7PCaX43PWqBGEe6psj2KmWJBPW3OthhJThNOOB4bkgxbg6DtMm5yGdZHoZkL
-UvLNOUm6UJmtOyAPCDiV3nkqsv6irPuGP6vWXEBV64NgpNstD2UCqbLFvB2IaMVF6yL0f7be+N0p
-RcaLYV24LdeUF908t0dpYScm+CmQ1oQd7T09q0ziQy49af3FvXn1gbNVEvAxvFfZpLS290ThDdYb
-V8VO74mlnanLDEFbPX7wV1M6Idlfk7yGxirvACBhsqJEQzb5Mo6K3fotAwkGp9PLGiWA3iPrD2s1
-01rmN1gpH8Syt08wk/k+MJaa3L5zhAxfF7Qb4nKQmx+CjeGmBeTV40Epk+wfR4EJ9qbJ7Exxz6k4
-y7/2gAwgRLssDG6ggTSTPupXNLf74jZUBjdqp9aQImceGsIDMg7wwTBVm7Ymh5FhTeu5A8BI4fLB
-+5/3uIIjyIznNg9FJkhE/lgSBYOGcXwtosh6rXLuNJUPf1k4oThq9ofxv0oHgtsfRvjFhw1wOcJU
-ASWOYkkIAKeeQTuOfX26P1dH3JAN+lWVBBErzFOuq11uX2yMnwoU+9Fs7Dwrf+MSws5kCvf9Oq57
-lc2RMf0FSOqHA7umvcNcUeO+EDUESmZSv1taEhixmq3z1MiUNre4AyaEG1l5pSWxaqVuX4Qxujph
-FICIEH4I2g0WL+sEgWUCieryfDJLE+auW/5H21xag2LbZYw+zzpKAmRWOmNDxLI22+6z9BeEmRts
-LMUVusA+oaLWA8ovHzyo4UgyU56/14nUM6eyvO+ceJvaZ+dqvddGfgUJ/uvcvZNWVFLIX0fgI+Ne
-+gCL/a4/2RYmf2NzBX5zS73nl5McyuatV9v860Jreh3V2AARJ4k6FEUN7tQTJbnr9vKexlbz42wW
-LCYlls+oplPxSXP1moiN6UUjGDPHkMxQ98ooUVtXFUVp7Gzh8dlYeTTkkeW+02GRrAac/YI/88ha
-JAvRYFpSukIyhOgAlIad1Xf9RIEH8RoOSYf0gD2B9dgTnxfUZwQuwSQ+OWzgHwCmUCK5aDAQ08MH
-WdvP1v9E4GrSvx3KmmfRxoSA4IigWsJesG487/PIIGLYjDF8GwAlOXHjBTUcL05mQZS0Emd4kSky
-EYoCdF+gOH9UbsgLNZBMoCqhXvNdBuqf/AzCOPk4F4f57kKEshTUpnkRvoMmN54TEpbvvX+Pn8VR
-EbWnRjmbQGtQGnwRpXxYhKstxZGtoa1hXkEEv7uPHDG++mGyRBIRLPiDCtTnt9MCALtkqvzF96+l
-yJ10IRsqHkaM0dCI30RUzxJ+KNlKyoYawW1oKA096GY3jcEyva6r9fSBqfNdxmy7Sew/kzs6LU+k
-sg9XSNJKKB9bq9aPubqj2fDtzMJCCHxuEhTXhuXYGvckguuJ4yWdkAjKJTrLKYmmDKFGhvuNuRDw
-3xJHcasChbuGVY4Wt5oC9phisQiR4NSvfQWnzbuKsuamqwGn5pTo0aoUXCZCnloRTSRVO1vIpdRe
-J5FYI2paLydZfRr/6QGgTNHlujllRPjLyX+9i5RkC6UJIvv+hb+U7JCMXGNsAZ7cZfQgcMH18tiK
-ZyOtdRw/6Ch2lsyZc5iYFDjwqHo2wsKa9F5P4a++wWflYNcJH364dqoMyXLhBOxqZzDuoMdmdvuQ
-U5RQzAdn7zQ7ZN727pzvm+U0fdXIBJ9BjsMZWrVaAXGvQnxZGI8a2150XPfccUtkjsGecZ8KtrAj
-cynZmogKhA9loIeouvFTOv9U4y0HVmyQMkMi+/HgtKtmjZN5OMWYgFy3JEYLPBhQ9ZB8X1s3vlY/
-tuaL1lLunmF93/R14QkDDTL7AMOnIQxotzTjMxIAkK82wpnD8l7KoynKl9exU8ypj1bvG/dhpKAx
-OKqMs/4+ZUVge+CoT5M530IYoCaUnI5pMN10EufeONWKXugFxdRfx+2XDH1/nJoURlezQkDeUgBY
-G/llTKrB8rVywjm6sAOry6nWadnHBieJzwj/mz3bXlJ0HxEG6mNSjEr7IR9ARthwEA8edP6o25Qh
-Vn9WAbWgadss13TN9GgPL+ctTJCXp5Ut+L9HtqPmoUUwqPAS/XiQB/P9YB6q6nbkue07VOEDRGli
-q5B97kcnFgZBIGSfDBf3CeVwUxVU08m+zMRJtiYLR7TofuU22Hf7dwPIQjlYesS7aSpdRbtWMmCC
-Zn2OWBNuVdp5KlvmCgwW7/+Tq6x4Y0TtB2/0cdE7m1dbL83BVs+766jN/yTGfn/dZeuj8A8070//
-mUET0MCL/fmafJeR+0LKtTUJJ5cixqGQ+XCN+fR3tORUlJwh8FIo3Jf09K3YL98aqukJx5xD+1/8
-sQlug28x/GGPQ//Kv1CNFP6iYC7n+D5kJCRw8YiGn4b2VPcEc7cnaO0VhxAmT5T5w1mdeSw3vj8s
-Je1jLEREqjrXn53++eroA2erBwSGIbnDD89y5b07Oz+ScdllOQ7O4ry7M6ceS6oFVC0256Emewfp
-Ya38k5mHftxdxwEB3MqBZ6l9VkM57sAWiKK5RmKIoWRYBEJNO8R6AJpI2T6a5sEoL1Ugzhn0azUi
-7ZC01j+xDefndQIlS+HAJhjIrrgHn5u/MpBzrJP8yM86ChozRRq+JRU/5sQQxy0xve28rPlk11+f
-IYou4QkU+sJRx04esj+sgZUfOkILZe7NwOuNjWR/GN3S8GZN1N3hiEi0mbLi8W34nALJd01iOjQz
-Pu4JeCp4MkeRXIOnaa0sbsYBURTSgmmwVtU+/TBj7FQChzuWYA56P7TUJadyi1ZpYY+Ije9/3100
-2TmSvvjnes+LXEnP/lInwq7exHc8VRhtXezdFN8HIik2CBwJ5toySOoxqWdxjUlqxwddZ41bl1Ar
-arAKjButK9uNJ/0BI99boasMDyszzAJn9YBMbX8gjXtDRQYxfCkwUID/G8/uOpGoIN74LsL9zB5z
-0OfbHKgTpSZuMPOu9zoyrOFqKNradGiItUz6DP3LguBegJpoWwgshJ6+aOW56Fm6O4/gxJyvO0fd
-Pro7YR5mZx04CKLUiXykl098iOx+DY1QnpF4YvlMOqhnOqzYIc+fmlu/G8aY8AYmxsQJ9tpxXitr
-xB4ENqlLv8I2v8fJRTdNBO0l4g+iZDWih0D2ZCsA1IgulkwdIZb+7jkAtIpPqtoNYK7z4rUe7RFJ
-0hQE9kiCC3I64MhSunkkOhOuRh943CqF6IAy3veMMpY2rYk12wDqdYJ6JyqN3KYDKB8+sKwgOXfP
-5QbKAtcNOWPgx0IWeV2+1VCpzmTXLCgP6UdsP1IeA0jIvVAkKcUvObMJpEGYsSwsXTXoVHD9RnoH
-N936bCwo7daFZTB8cLiItVMTAGej5i2KCjsaA462pDM5HIeTRmqbX4Tb95dW/HANoGtDtsFaIFYZ
-wF3kzzZ9p1FzwAl44ElvRZfxz5645m091ONMeEYGn5V1v9UGuogXcviJqpiOg/zBozjRUMX35L04
-l++8AduYVnf+sZzFn86lLbkNqXuLJKu620blc9rV2+aIJrD0HQ1L0PopKZPqn2oZ5AmHk/1xdpcz
-2WMV/t4alh2umtRR/kAn6DYDdp5+guSoxWiK9QA9E+DpHUh14a04HNec6GvJ6TrDc1+Gi1ohkiSA
-nv9uo0lVSTE8xO+5lzFalU3A+zsgmwx6GNnrR9DCQ4Aq4DhXyQ5etPo2j/uXGNHLdnF1nfX9fvLX
-ue/cA/TIsTowev6XLRG5OxKd5Rgh5yoYfkWiQZ2w7p6xrMiaIlmtfyV+EKVIWxDOUaHlPOGxjcGD
-bRXs3ltHGslkDy29brinCCLzTh9Ju4D6XSt85Pl4FBdA/sz/LLNaZbAu7Izmo2mGTUNhrlzrpFUr
-pZPBBww4uuLCL1ASCnpZGbmn3IgSRcizl8G7gj8l3vafUWasAVJgxdG/I8YqpRoXH0yFfXKQ61y5
-eaRTntyfbR4S1VatH+vrDf2ec6AFWBBXI01j6JlbjQU57I4MFiy3wvAMv981ZOcviRO4RqP8MceO
-cgfzPqtfjT7fPTQyFacRKhlQAc79toIOYHEsmDdKdxMxM1bxfIZDg0Czhqa6wONFS1MDgnw8PBC6
-c09CThu07SQs3Q3jcuQsdHDBKqgIbZrG4FhWg2jZ600y7iROYqVxn+dRS0D6h8biKiZDTfqj+3Hi
-jJXGN721IrHjyM78od1I2GIBbQ/aEho12pLRIlYvSJnboBRpTvsNaMfjK+T/Hq4BhYbgtBUqxUD2
-kvle4+/CtxzAJeG9/ZKz2evyfZ7k3clhAYmWz3KLan0xwjBCHFoxuz5uS0d3mZjhBXBzyvMhfNuc
-rFnOkDrN7oCcWnIAHOtrVZtlPXLjzLDZRJ7GtfvWtENJ20wBvs8VW6pO30yDIHKc3yIr3Auyc7/P
-o+LSlOIyO0py/lamkEmuL1nFE/dQgquguV7vEOa9CwZ9JAHE9QKNlxMGMdygS5M3/ShD9BCWvj6C
-cCuPDEgsnD1y799rZhlbVsH7JZwe267cAIfDypdtTi3l0B1N/SMfgGXdlKmbdyW2YLc8QRhZGOQ6
-5VKuc7f1xM1ST4F0kAyfZXfyLO0EkvvRb7TGucSMk2cPFDGR2Q3RQ57rXFrQj8Pq+9h+JE2LOdc/
-BOaS68uO/WSniL0SprVdmWHybeqv/OVI5ytTrIjFvAzap2l6vGh2uSCA5530wkP1F5JVd0FGJjiN
-JX8n4PeyYfCQLELVgzq3DN2IMRKuuis9O3rSgILXQjuyPMdswAZ6nrz3IzQqzB6dF9A40taru1xQ
-L6HWjl/9noioezsR3DUZd7RFYXjmY3ACAYfvvXirVuHBUcBdkRxe41vCLOxYQNo7wOZxBvztLlot
-GD8Kb5JmsJkAjWmsQ9gF5/Mjfeojzdwpz75NjDPgpLFaJHvGQgJhEum3mkpzmMMa+sqkJU2aDBbx
-qJ98oVl8ssnFMBY2huUEredwbQG3ws7BFwTeNZsoiBiBh1mzEWg1TnfOZ7TTnAVavwg+mGsDWJ0E
-0lqRu+AP3n66d4S4lUKoWVnuHLb5Nulh5jmtbKG93xR0MRyLU5VhDnn2OA/MVC2bVdnseFUWKQdX
-5w/EgxFSOZ/Kup5DqUxdJ5kwBM4xATxsRVbhwG2XKC5HSUxjGUTiXcSkFnkjT0GzfTPbIjcyg8cA
-CurCfKbuehmtGv1GxwEuyH+7LhIL7AdIzdUIeGuoC8dHlzFlQqalC6zvrra/TKj3SsiWPakadSrA
-isSYuQwg44REgOSeyMAMJjLbtFsYwVH9lIwanXdhXy16EZbfZuMLv0ZGb+XZn0dVnskQ+CKA9HFK
-5XJA7lqF2DbInU8oUzBxE1yKM6Ar2M1siC8Fvi2NIC0STgcqOQ4MbKqKroNHrNrvfRA4uwPR2cBa
-0KOglDHH/rPNY02CxxFlWON1+3h2PTSu08OTh19fpkqaVivmpaQ09Hkx8vAaot+s+qoRR4reaecZ
-qCPz7JxhekNb9dlyyHcJ39lhjLM4irCM7LrnH4aG+xEWF2kZXXCO6WRzvlCxVN2h3CNQdD013Ssp
-J1T4L7iDzqdhIxmSBAM+kQWUwguLxL1718pVUqD3fEWS+83C330bsHpvdl4Yq+lVMPyPzjF/ZUPn
-3FoKNvaRMg6vF9tAoyjCUcvJefdt8vAOm8uV9RSIaCI/gNmSaOD7aIbrS/gsmhENWfyVfF4NSz9C
-rvtygcRZbfZajNEhA1H74YAlZEJpHq+d2c3GoiClFBaxJ2nVRXOv05zxVq+VwHL2CkKdwOmqLhTc
-cbiXnhVWBaLlAARfMH6y8/XTeK9ObvP1P1D7zdGZr9P6tJj6VmwTzwCdPI7DyhmSdubu3rH3QbjU
-i2C6JR4DEIvCb9pbdcPPUNgVoj4YkZhgMEjrPDLe5KNRAcEeASUhptUDgWAoaLrPLAbZ3gLig+Gu
-zM5kxy+9P9xDcd1gayHuO4yOCvXRMa2KKjhwinse459uKrQpYknN4dSotaUdSasL+qZn5G20vZKP
-+KNTlXlV9f1/j8xktbbs+qJbOnnzHqVnUyI2jBRocRKW09wGa+NT0ZuBN1l4/+cQtIWuJXaZbcAs
-SrgkaklBt7aiX1uQDwDCTzuU3ebpL/84sbQi4Ti/ei5reK70cN6niyviQ2nL1FsX9TCmGU/7w5fc
-9VM5+rkn7pkdxIdo/gKnx7DIfplr8R2bE2gUIlyFgdCCn53duTrRVTaVXsBTun2imkaxyprTJap5
-R4XbMCOvUz9ylE15J7Yr8uqQst7uYychhU0u0MOdFcnSbMIC4uVRsTm73e+7EZ5R9MRnckT7cIP9
-G8Mnh7UR+NwiCpeYK0MWP8Az5PpGZB3dZO5IRSz4tQoUgJ8eCKXPovG+z6GxKrJeVnPXn7M8a3m4
-6jC/fv+lWCB+i1ylVzTSGwpT1Kb3ivvZlnIpmcvnsWJ1D8PScods8sdiIuegybQUBstf21c30HOu
-hos6vt9wko2U3KfA8orUBvcBzDDPXCB35Bib/XCWbtRR/pur5E1SBZAk4UEWh5Np02mgNsuS1/cc
-z4M0OR2D94EWl5dkevywKrogAO1E8ZCvKICCQNq/doFccrfumxqAgiSLJ+zxFDo/vRp23UUcbJHG
-gWMi6hCF5vYrbLDMcrj40CxBrtw4IOnBvKRLjNHTHba2EDTL+DS6NtQNnhSfCZ+qkdsxY0Qgnvei
-21LXGek9DTaz1HysHDFI5srctkmfLHBcG3YuyE+eV5gim8LHSfKk44gUpifymkg2Ei9GzY12O6oV
-eTUPC42DHqeII0y5wITBeGkVxlhPTkc5kfvfiFrJXecaZqf/hDs24bNJqajH+eXnUJStJx5TsRgA
-NsxYA/fp/WmrE4Q417+v5bQYy7t2nPV8Gk+6SZpnRiD2AwKb+rM9jNDMO1HLk4NPHuG8Dsxd2yq6
-RcoFo7QVXKYEEwD8GBfxwuLr9Qy79otNIVGsI++/spkIAvUL1T+Zhs+nh4isQ28WlqRckIu3Y1N3
-PIAtWYN1px3sQ8lF1HaNi2wQY4WxFIOqbW6WFWPtkEpFrFvlxsdDK1llueC97l13WbIIwRQMCJ6+
-BDepf/gWAtVaY9a1vVxg6jhXFYA3URGvQ81egFwT5wI+0RL+XbjMEqNYt9Q+ACC+tXHq3cpa7UGV
-jVlsaozO/hvi0aJeZdZTs5lKq4IGYisNiSiTwmNIsjVgb/gHgBjoPCP8+ZCaHNcRW34eFt5Rw00w
-Kj/dA8MDnA4OMtKVHZ3y353UcGr6fzPkBlh6gfiloFCbxQaevk81t2svsUVQHo8s3vZGZI1ie0Xl
-FV9G0pSjh5ng4H829vaqvl2i6eLwu0tdkzOQ3bWL0CjQbjCDAnWnsQslsWmUEfKaiiKsAVEKUzzb
-r+dzWsU7gnNj3OTlI0ELKo8zLPHGD43N0kGqiCbre6kYJQTjrggNbEsp99lEveQsk2vmxe14gM1c
-osjVodEalqiIljnseiixA8w1jPHWjufYgYQMRopb6U+KBKFHVoVduQD7rsMTDe41oSfRTTghDBjM
-1crdlscy3SJEo9uPKvjH12syvz54mCCH+NziHyxHVhjATBSSbdcGNXasl1Tqg12hysW824p5qPY0
-x1oy46RkrjKG2sUcH0HX14nxABu/GvxuBphRqQIXtMzx9f0PfWa+uATlndrU7QLUo6PIIXGoCT49
-GBJkIDx1C1Ht8pxt856AdjquIEz1Ewn+KHsKXdVEJEFjCYHjcpz6BFD3hQuDBuMNueG2t7k8Kfk3
-ywBZaeskwiA5CsEflbqJ5dGrm32gmYnCYPkpe7OcvJUZ5IV0IRP7LjtTZ5xgp5xmFAQaOyvT1YCl
-dz45ue1qcv7R97yZV9UMK9M8LkSEqqO40kxOwhACTHEGqHw300wM7w+OmdYVAIbm6TXDDFnRoweO
-YEs268m0+5ebEQa+tp0iGilCm+1PZGj2eMOZGpNsaL0L3KbmBtbN81GtnDb3uIOrXNfSopAHIecR
-M4+ud6j/nGwKGmrn4SIdoxROtFf13/cXQFyPS+iXc7OsOIuSpH5p8yHfu7ZNcpfTlpOAl9CW0Muk
-Nuz8myczX3SGa/55ao3BHhx2vVUHxw72E0tl0jYAcXBqteDbTL+h965PpD5lTLDx+rpfUYedhTPC
-JUQMIV39XlFeiF+ZjC+d+R7QikrmBBoasYBR9ZufaQ3Qn/WF4kQNxsoBqptfyuFYu1TPGdGcYbpt
-ZDhVRHnTji1LqHUpKK4yhN4/1hIfsFyO1ZncIK6jdcHYKG3B1Di2IUaTXRmx5n1eK3MnM7rs6WWK
-7G+qqbCA+qTMJdUaW01994HbY5+/XXQwf0UK4FXbJJc+K5XYBnzrZ6jNvGl457+uxT1ew+NriOZQ
-n95UyFy523m5z3J3pgXlDKgSKMwbMS81ptpREKuAJiJ2ldtHchLEtRYyBGS10AkWA5B3o8QVgHs4
-2gPDJWkx6FItVT/EYRIZOnaAITHu4buHq3lhKWhj1LzTDoxLfJ7DkclbborVKtyeOnP5aPnTT1r1
-N6jwojYr/xSQ63eRbeS2vZxWlzE2+AWhne26c35/+y1x+fLIfyxiQdXKrZ1ld2eZjgu1rhCFFoMU
-++tFKzi+x572ZR8m19rrDf+kJ5Grl8JBZQhZ5lpqYxuX30DiAoUEnts7GJ1INsRIHLCNC0GoY2pS
-s1C0rI1pIN3fIkUIO6Y0iKjRWk8uVIQCGK39Wn4zoGCg9hUjlDzzFbBi2MphpBpnDoEDS1s80xzp
-3nukgSZc7a/CuwywvVQcpuwfWiSetoVond0/t5LIS933eiTLpLhbM5LS/82cUs2x/RdEvzwQoghX
-okJb2wY/LAGX2eY6AmEpXGg1aIx0rUAOQP2yGB2LIV6iPc4tlW9eSALzqn5T/yUneg0oloktLajR
-IEKef2O9HPRSRGFRmEw/j4DPDrv3QPfbdOvJVzvZ9fCNKcKfd76lHekeA/hD8CKeriEEL7qYowh2
-VMOzIdeWIwtAEpmNuXNk2zU1dr1IKJYoA+lpTJi8e8gr5K3d/m0KY+MNDZAggwilVfL5GyFryheH
-2VSOcPOCsWt4HMA7VGi2DRfVtC05Na4Er4F2aI/Glq3G3qzV+JsKqxW3xW5YELCyuMLeM8uFHJBA
-Yby/W6eQayn0LOE1KXMNiJ4IKtifRcMaBatKQM1BkoYVSzr07bLgVhvvtasWx3riUIJuZgxz73GH
-UwsmarfG3wJQftWYzYtNFYFc5R0Axc/YQ7dNePmaD7NroJhOTIDPczFN8ouauAOArUg6h2uISjw+
-W2ZkLpVB9aEiNvcRPYauD6Z15oihIEdOAFEQZ9WMfGuONvQP976eXG3j90qA+8+IDlDv7+lEoJev
-Ol9iYdND2GMiUXLz4OBf1g53210PkeTfI1yNmQK3vZyRZ6RudCS8U9qwQNRUu9836/NDiPjHaDB4
-hU4saYzgMADlXbZ7pSCrRRd6C1c92GNjK0uJaMicF7w6OYfNXI7kFmwrW2IFpWGOG2BpxV5J6XDX
-fRuJqHXUiavpxv6NkoLp8C3OT29tNthSAvNW1JHm5NVR/zSaJ7eebJd5wIQn8utwHEnFNOvDllIC
-jJ7BgcTu2XKDJyeP71i0Q1/WPmaaJjmmzOIx9QlJdKs9nKjEildeMZVJtO+7gmEcPIloRD541gBA
-mRLCmHTS9Tg0aL6q/U4WlyksH+JcH/JnCcI964beGkvOhPCWphFk0gjiWa9Ty+IEswZVKW8NdvQ3
-OlUqoZlsv62tzx24Gdu+2xKm1EmqZ3s4YqfajaI00T3muNFtOiuJLtcZlj090jw0c/kk49NiM6rR
-c8pzlEi69BjEL72Nc08ibRhZJPRmImFKv1X/6M8WtceSad+M1Sod6r30hlUVF4UEJiCCziuW/wN8
-+82/L8zeY+RA4yPEc/49nqq4Iwx2aGZhPQcuc5YwSkZltpelD2lPh17mxPWU8SzK/ob/nLgsHkCY
-cJ5+Ur3PCUY76WIMn4Pq1kgLXN3coishwxqquRscYvG6uSGxDKQ27E8OHxHEDu5no9FdsOpXO4a/
-Stu+v3zY7O73dIKGfuW+1jKeNMvnP6ijNxNox4/hFshShEPjc/edwzk0+Wwkeryyre3QivaLEpTy
-eOifLCwxL6MjQ8J24/GMWrug9ZAg7QTUCtmC1C1Fk8A7kGa86I5/27RDCgIg00clYri+ui92ClSf
-Z2J5pKF5Qhi8xgtvIAcOMdSqYaUbEOjypDBrMIS9sq/TlBqmNCgIN9qe1ElKUM49E4bq+mTYk4sd
-fPjN4okoihGRzvKlOlLddRix+2QbgpBj8g1Db+dnP1cZrtbKSkTo4SQnij/iV3M5l/3AebiUTWCj
-nKZ2qrlVMsRkMZtxl+8jWj8Yn1jyz3VLRrDY44YLHizCRsdRs3Am8xqkftKXufMljPkDMaFuB4yk
-vi+V6BqVAWeiRbDZPMs3EbB6kP0S+2IFaiIoEmsrNUaGoUjRCAtH7MrD+Z4hYqXbequtPpeYoP78
-iqZZd+7jR+d7xuYV2AyZK1Rl8DRNsMJQ8i2hRZL6kgUpTnnhFj/3quwgCIZ6+rIeFfRRsGk/cI5M
-9R2YmPsMjPZnGFweE76It8Lc950wc+YhUzDrW6kidojoLYlcA3djWHzX7LySsh2iNTWpJLvd5sP3
-d73yMRqjiG5W+qVSl3VXBD1njQN+ejE0I+ltwDaItibIy2kvnluDMlgflnfujnvwTbF1TNP1AG9O
-wejspCNilby36iY/5j63WuA+oPM9dN47k8DYh10rdKj1ZesCZnvskz0oWewU+qqTuq/jM8uKMSRF
-/gw4ZzJyNTw3aTY4l1AyAavixXf5TLXRXYiYR/NZW36pk289I9HpjSjTDeE0NvpB8LFQO5PdGy9l
-MEE4wFTuxoxeAhq9fF7Rm0q8fECgQ91ei97yVALE4RCO81n8C9nvZqfYDgO5QAJDq/jP5EOZ5lN7
-L8P+9qE25n203UpG0m0osbJhlQyDC2eEoTFF2lFvaZpoehAZvhMp5aGanIqKX2aW/CwOyeArOeUW
-RNEGQIijRUjvsqVRb2P3Oz1ZNIpULPawCLBDXVpw3XELX/937OSewnebmNeaTxFMC0HDIelsGHLC
-I4WJdfseRGPvVzGa9FvbSJO4G3w3MuGNqozmGSCvZOMlXFuop4F59UzfWVkwt1hZvrKSpCDIYhZV
-Mw8JFM5UtpbbSrRnIdXpzJeaL4M4x3rn4peWzCL9ZAvMQoao0ZsOX8YrgQWaVrQjdUAkD+N8ubJe
-QTh6VniILhA7MHCJaAQBNOZi5GgvGZVOPO315Z+1VSrYu9TiuIdE6epmK/8n5aFgflg0aw/S2acI
-A9tPH7RWzLQM/+YRcT2w0xgrINMlKh8O0AYvXJIedepwA6trPBpBa3+cYvps1yLNFfgMai04bCKs
-DbFkKB+iSLDyib+SSlCCCiyUzpciqjIIDbFiY0k5oI1eLzyv/23j9Pfr8ja5kGsP6FxIqjCRXiQw
-0t/M2/A+1tSDfCWCrCQpVnSKZlB6t7/mv2P3BGQMCIs9xU91R2f1lZCf/C5PEZNzPmlX1FLSyMaA
-GKY4LDJ3HHS3PnuHYhonl2+jc2pthHWAtrr11ya3eN34U1VbfNIc5TXQoD802Bp/bjT0Rb5EOMIN
-yx+VNkMSZpV4VDTBqnqMa47KG8VMqflJVXUPC5QtKJ6mL66DzkUKNd9JuZmFk0OjP7H3KinmgljS
-kly3ehbf5PFnyIKc+Es4P2jaGgetZkKH3HjeCpNvMmK+k6ZzZpiVVgtl1w8eBRRF4gDdasH9dXOv
-aSmdlmY7Dvwcilr2sHGK1iUBeK6wgZYZlw/GhHiZretfeQG2rTVF1TsGtHn35e5XK8DtEErSEvnW
-XKu1mgXV5jcuCpzteQ6knYC7A9lmoq3x6yVWLAVJXPlIyITOdS01lujyqsjCA4Bpp7JZWL5jaOn3
-F4j2eGVI/uSKzkaGCYhNu3iqwIs/e6zZHo8yER5CBmxz7ykJnM8rCsPLfDOemLu9/weKpbqEGyNa
-rNTrREmgKYJyjUfkizzVXuNZlrEQmAL57INGLISEdFZ3oTD2hyacp+M3BwL+Ogg+dTSWznewKsop
-ylCVHKzTvCndAMbE9WRc8hySl7CuWXrjCUlzvgkYatFY2fSCPkmCA6cke/bPGy+ttIts5x2nHNMm
-csgqcnV2lRj6cntFjRjt7KstdLdKaL5Ym6VSczBPmmiGva3U0MBJWfHvhGjge4Tp+tcb+XRLq1eP
-fxauQb3xTXc6kMvm+gbp8ttxtjjODP11bjzPb4YASKias5vQSTE41CqBvfDlMZHZbyF9mqBfq5BA
-MJbMH/W0/8KKyDKt+r4rOxdaFvLBb9XsE9S0hnz4oybRNvTLzfkISWWu1J0McNBqJZ+86KP9Jv1R
-Z90ixj9X13fgPOxw5jnvabphxfS1NtteOMz9xT7bjvSqFz0BpCKcwAlFpAbDrW8CuCOcffo3jcoo
-gc4cuW0VBR0HAIY3OEGn3ocQhQw0WlIwnT00aopupX+lKZXVN4fH1hD4dpS5dhbasggze0f2U+0G
-84ISRldFdFGT5R6rPdhr5EUOHtdHYt+ZI+Ch/yrMi5RFphoEy3Rohpk1u01gLv+FUN44oGJ6o1Cj
-0+W4z8ekrCxlh97ijY1J3f3hJJFbL6s0sWKXi2UDlHq84+b/iDGWm4DOb+I2cky7/FBehSnJGKzh
-n9/yWfvm4gDV7gmbtn24xADIrun63vCI+WuJY+UNocUoWHlI6JhZTAyrJEli6GtExAKn4fTw7txg
-rHcrJ1mpEQ5sJxN+U+aobES4Di5Ire5HWXj4G2QS5Q4UIGx2Hor6vZCHOAMAp9REjEE5i5Ihu86r
-cqaEopxg0XaUv6a2KbIYv/eG6RuqPNRuYnOIHr8FI91Qmd8CW6J/GRWbs0vkXCQ+SpzVFqxDZb9O
-9XAP19OTjrUiP++sv9//MFAm/xtjFVv+4M/w8sXCoKs/dN5Aj/egUCVnkcSSZBwsPkEOh8JBmY1B
-G5QQDROs+oSvviaBYj9+2JWISq7LpNu2MDojFv7WfB4yuKVzmhEP0sb+WRELL/fNFXfiMMZwPlrm
-B1nQ7sEZYy4D1q51ZB3StauJwiLCKsNHjg3yYo+qE6YP4AarsSL++ROQ0gA7JnmHHWGU3Q7DCAwe
-+5bW+SJGEs7bTffI/sMguQjwxBUPW9BYROvqSdoe0tn3Q02qDuDfDVh6zK278MPA7idNeXxoKRSE
-UForSbywtcgtXFc8PJxqTD86dghmnVWBJS5PrgQsrRgaVxYPQUYd+j7Cg0GcFf2JC53KaUhCGcwO
-fsrUd9e2QmnvF9V5lbuo5OIqd3q6lv1a+baRT4CYHhT5GLdSylQ7LBcX+2g36Iw/F495aW806q+N
-V5M0xRXL/3N/EvQ62htZSEtLrP+cKxeB43WtD4mQ5CkC1woCmpxmod0AbtxaMNN+pTi5GeYA9RyG
-LB0xl5egREeV0UeUavZQ0Kx5QeK10dEf5vm+zEdZhXD3aANlaJf4Kk48CsDA0646XEcyiY7AAv3a
-RTmr2xsF78cAeSKz0em4DNwA2HBNEnGUxhiBN8rcnnOvslJscOvYs1H41u53W0ays6M3cTZC/tlE
-HxeipPjheRygjQC/kkTWu5M90H5p61di8ab/ZxXFAM9gcp4/l/apgxmBq5o0BB0iVYQ8tO5e1aAi
-5FEdIX1RQqZ07Uz0wyu3YhUImImhasajlNTqTc89i+QTUxxUoY6uz3SFDNpR/dWbRZE8jNq1/VgJ
-V0rVjGm6eGX7nne9J8DvyQ0+i2MUk2PfMzHjlhS7HdO3K+YKcmmjwXaXbUMJ3S+P73i05GyyOq7T
-AHzCw/mVrnrrvJsyTyk9085+RCOoAJ08nnPtrI8mtiSn0oRrSjIDZdHoPKWcl77FmWxVI2O6UA2D
-fCaYAPoBt6LC7JlXkmfOJAHuVtOnwDZvMkA5g5OfAKSctx+o/Qg4oomUzcXj4POqDFQJKqtRe5JE
-MKzmxsauxfEChBuwgIUmM4emIN+BhRHh4ZBt+5mB+q+jmMIJfmIkMvc/pLPjKwTSWifmSzCSuHAb
-wt9OSos4zumhxojNyjrS8Gnr/Tapqcmw5Gir5aqQkltCvxWvbjGOylZGfSDbCuxROSAWWAr99HFg
-tCKyzyV7bB6W39VBSOyrQ3Oln2gM8zFM/BwP8goKhy6dGQIWXd37JIpyTTBkomr3GSTd8IXpge95
-7Z+xxEXPHhWsbP7qENL7LzxEfl/m529GTQ77+F1OY2ZxCyVVHhNLTun2BvqLClADMSmpPbsbgLG7
-TGbteAH9eRDXAoANDZ2jwMjZkYlOz7va47eq+cKyras7hi6VnE2vFJaqpkLAz2uFIeqYwtsL816i
-FfTHOuaPNtbqTJXtJjhAXNt1BCCuIKVpOGsGx0wlkccR94HjPxAkrPvKlinBrm4krae3dqv18uql
-qrfb5v5F413+0HLjgaOV7VQBoG2QAI0l09FYWr6jcgjm/HlcEKT+30skuXYboVSKcVf8O69wFcZn
-qHfxjH+f8XhpeSnBF+x3DOTT+M0qUeaYpaAfGO8bfIOwrIHLR8XzZK0L+xiT957UePpg7JdTnhNe
-I79EwK9Y86JGat/0ObRqVNazsn/lgfXRz2s6XkzOJ6lV+m8u0GNkhEGsJoxXS6pF+wzE9xOkRfQ5
-VXgbcJSH4GmNEE9IabOsUgX71pVl6X1GVTWsRhHBlgD32mDeU6BBj7bj19gZ7SuY45KeMhspXZRl
-/zdGte+/7B+A27DWgbCe0WbBAWZ0nS5ZtXcgHtV45o22+oaNPvnxfnjlEmh7h2KN+g1/fG7aj8BV
-dudMRyocXCECxBY2lKDCTQ5mei8uKlDSxdtkqF0lFdF6uSOVIBhcpjxwlcHM0roVubauvaA6RiH+
-WyawwWPBn4Itte7MBqTq9fB2y7wo5wXlrmtKLJrcNMxEpgXULYoCEQSQJz7OKI5HB0I3LJ02J0Nw
-IibFNpIii6fHbEfd9TU4cvrTFWJJiTQ+U/ZaO1Oi3EGeEg8DpOust+NJjQl5IUDEWT+pmgWaQLie
-GVNAeic9s4IkVtgMK/TwZ0uYOwilVbwzrWn6WN28HH5EPh5rdB1c/7AJLVgYGBCbc/LNcSvxaRJj
-P6mKofn1+YzWeRFl0Rt5eBaILic+LlWGTnpmy1DzfasrBFmujy8PljrO3UuCLr9sKLOC5npzRDFm
-IYD3LnLDbQfIw9sp/irKMQsx5w/6VLerzjZ6MI55D5nQN55vPYXhebQVfFHIisNL1gC2hQ5rBYbO
-Ke0OWwBSovF9ip2PdhhUi349hwgn90Hd8oKjbBaRi9D4neRTvu6WCLvuGcPqCEcUWnwDx22yOHwx
-mt2Lzhb7DG7ul9SSVhdAhPVRos22X6UUpoEYW/mQ2uJQ0G6PVk64Ujbgl0x+cNmmfj+n68yMssVM
-kLmy07Ypw/0CkPhg2du57ppTdxiAPcgb3tH9R3/G2BhduE0mt+SMNNAp6yC8OOLvwepboA+AIhjU
-HRt1zNHA7G9XwsjVhPZ8DJ9L7kceKc+ObQsHQf//mv5aXM5qi1Z5IQUKepo1HOA7sCa1HgWfH3cZ
-UcNbQdFJ6KrCgdH1R8GCKOqp68d9KUadDDZRmS+kAH3+JjaABe8HSdWaltC8kZuwQS6vKlKcmXK7
-K0WoaTSwun3lPPuJ5bub6N6aF4NGv6/Azr5NIZYaSAan8b546KXj+Qf0svbmt5vKEZHo8xBhNwaD
-kkfG5AnHH+r1C4z24FyMtWDeU7yx/5ZnzmckwS6qOjJrVEMPurrNy4IpjBDxsYIzSxJOGlYr6jcg
-od3TbmdTbfKMojB4496Nm51pR6HtdtW+N+ArmU22/TsC+n3D9EX6SmzczxZNyCDcsSHVrQDMac9J
-r4se5PMbTOpj5FM/hW2qnaVnysja89+CTkq3+BM5SUXR+TWg/HlGO0jml/RbySdidN6SGlWkG+Ni
-Na64vIYrASLBS9I8xhLQvShif3JxmuBtq53poTLmqhNmQOXGsj0Bk+npZHPs41v089LO0KfkrVHs
-2LOCNkboxpDetQnYFzCrg6ou7SJgPTvB3ErEedurOJPNLgYr8cqfwdaaheZX9pzD/+uJuutatpwf
-O36udcR/XVx3LfpFqsyv/sEx5GZF0qyz0lWdAwout8Do4CnjnMYvECceLUiNVMa0MEIH2aNq2Z0a
-wViHqcwc+aNjTMzvlt/YFKg4QnIBZT4T5ezxhizv5A29jky8Eo6Rn9CakYNQXuoixZAn71T0yNGP
-fvtHry3xRhMRV42fiB2ahai211WSSLtHije9bSJtaH3MY7WMiX8jNXU3uQWlCJN60H3P2u2xd4PG
-avhNzx+48DZWiCfIHlEtt9jvB7V4jQA8Os4Mjde0Bap5YahKNDz/H2SqV0e20B7iZQr9dPdnoeBs
-NRFaKYa2CUjnn1yrh+W5uUCZuWO2y2gDJEpcr2C95XFo8mDGz9/W18kJa8ou0s5uPRi6hDnCzHC6
-4dD9JLMU6/szf6S1K0HsknI5R3SP5BqwooOQCk1dHE6ARBuHmJDq4ghjbQ0750pehzjHgq14RAQ4
-vxpnB2fORvRL9x1bijfoAx6IsJGp8tcuVtrfmGLlG4dK7IwqPcytdQicTC+HxrYjlml/7SZex90h
-DGxdw/SD3ISs4Yak6HJ2GWvc75QyM/s1kZWB79zaAcJPq0zVdvbYoZsFZ6pi5d5HRYfgTy8Ufdvr
-fsJxVDs13KEfI40cRW7v4MQda6XQurWEBVKwolu80gLN1A47JJnlbI8l9yB5dvkuRukPmFV5R2Ax
-X1bEeM0C0iGKx0gi69cKornLzZ+6b7EeL+Sib21oXFopbDQhTHjtXCMzcRyqy8d+aTYPz7lz9rrD
-aL+K1NsO1yNZ13Rxeyvqso9Oox0i9a23PnUw3xzGhaWx2Pfon5o2h2M/kPB+LQpIpcsR/J8Iek+1
-sV+/vkFvwL09mrLF2Ep5E819EJnAnAhprCDJRQpPa91pZ8qMW7g+viDgYK2SVFIJB9E3/t9+mKx1
-S8kwolMtS3de2TyTJ39fgmeayqhvDkvh8zZV0A5A+KDhDlo3VdjglE7Y7uMUi2CN8xtpwKSRcByi
-qrod4HqEzHAzpIsJQFm5OYoUV1HBtYceWzmKv5X7HNOT1f8ItHk+6GblmLe7jT1fZUOk+ZBSlfy7
-hl43rW++V/rnJqwE1UH+y4JtumNII4Aj5w81jCZZ+7exAMJOWfJuMSsGvZzOhWGsfV6gALBZQgJQ
-VYLdN+awBU7OXjBYdcdf63lvNUQgFL3wEpVdKMU/PgiQbkVlBFkn4BO1g4jHLXkImGSiZ1CghIwK
-evCQiovZy9DnCxorAljEDMM/QCWwvBOlWY99m2hIxY92YsDGfPUsMhBvKn8xNPA8RhKZ6eWk6bbf
-8RPQTu4inako0d4E+CqvLrvdYpL99CR+dzRkqHf8DGJYxUx0MQNwVxVpgear7QUaNy+8gFZ0Eojw
-JlJIOxDgp1fngFhaJoFmigIzd0VKVJM81MjPEfaK7snAY2b+bES/dsjlwJdjp85IOAyc9vOkDTMW
-p86/ataF87Hq3Gihx5Cn8t5BlHtdL3x6I7jI7yDSjT92B2xh7IBeOUV3OCIh2kTUFf9M87o9LYBn
-scj8GaOGr4qGHwVskxUZcV656MBw0Nq8JSjZeADz52XqqbqTf+EFOdEuaD62yGYx/pzW0CRwJjo0
-bd5FhllOQlqP+FxFYumoz5HzJOp+GxWLS0MCnBF3+HpIP7c9F0vjFNLol3JXPwfYYnX8buWgS78k
-6h5RcJT7Qf8vEvfFdUoy9QYBTF9XydzOktxtunfWbVujN1f9bpcB61GH4Ul4errZnXvCpTmd1oSW
-OyOghmB2y9YWVFVlEezIDunBvaWWZQ61b3giodCZSolkXzqPOzVtnltv+DzSvfzSTMNCfkffEG2G
-Ui4RL5yz5DKF8f4Z9oLZP1gdcWBZyjP4lZInNV8tQQN0TelmqIW+x0K9vpq4wDfPAddjBPsqbasP
-3qswlh0VPHEu/7PDcCuM9DsDggjXX9SaPqicSJtp0l47GEKrOylxRbs4cl+2Lt4rjUaceU5KFtGR
-C7rMOYLW2nbTA0yXULkrSNztxmnk2gKJEhLG4fl3EfrZw1VFxXXUEnzi0++Z/aJ0phFAmb+JQA7K
-atpC5kAJ6qTFAvyyujsCR1YIk/HJLzrT0kiPCY5rRnwLcclzzx+dUP2qmfMRYj2ou+vrIiSDqCKF
-HV/Aoh5i8+9vngdQ04qWn8sORZ8lCRjOgQ81bnTnUA1EBnSOHHTLpi0CylHr4jkLKzPlfsoN6VIr
-gg+QQbhGNNfBKnS+mDvgyioH4KkPHuZuvANg4Wc8wQay0QzDc7bRBmKpaoeHybTPxVExTMiRsJLA
-33nZryKjfFb9nZajkJ/V2NoOrzN5efXyO81C56EcVt+soxe14xHjxu5VrA7PAlcwLrdOgRyYwsR9
-ksUYzS1pSED2/Y1htv7ul1m9LqMoMflDff/aCz8jupQnwnFpi3StUlSDtjjh15uYTIrxOetOAsfG
-e+SRDMphCOscdxOpdRfYlWkMey3YoL7NMPFcTB9k+n0YETM6kO+YI8OGT0putb1i/mJMGptn2xkB
-uJNM5zYsE1pl+M3t1GEXT/rQhVuz1VPcUJOMh4qet+G0WGS+2Zyn3zC3ligHMbzNdhdFa5+wODpv
-wFAxAF7hON0K7Hl0DwRZMimpYl5UQ6wmioX+sh+IWwCe39FfPo3V82Tispyh7DX2IU/0jylAfzpX
-P1fKIzjeLq/9arc+rJOLdeMeId9KCeKo35jsbqy1cLl2CQGSbmTGMr95da7utAJCFfkw4f8UVSZ8
-EuruNEow5oeJh6NW5zZjYwZlJQIyrjt/dwv8Lao6CwxY79OlbixvJCk0SnoJf3tYNsunGiVHakAC
-eZL6TQKRhfXgFSyJYbWcW217HNKuvH3GLP41RQ2bVgn4Bjh6HTyYp9f5GgR9/17WKfAyE4NIThjN
-LYl8nL/36VWK1y4t6uYF60QuE5PhbPU4jguXJuwZa6CHsVN7O9Ft6dpc5n3H1frP9x0RxdPc3GGd
-jUFCDlESEDM+7FlaMWCYOcZRqVqY/agc+NoNdZ4DoTA/yc+4uf+8QbQgUEK+EQO3eqHwh6fTs6nP
-2nK35+AOfFqGpmEkUr7pF//Frpa0NV3YNsPQ3erLPcHa8lsh7H+UBWPxAF6uv8kWAwsOziiYhgmx
-URt6t3pxR3lkrNN0ALgQulElo6IkT81ZW+U3lAU+Tr2pzeqEFkn5ZSBsXa/pbwQt34LT4HVqzro3
-iXf0gi1rZU5f7XINRZGKhB+WbVs7J2I8Cr695lUn5NMaWsSttC99+rQhxuuqfpjbqvWNvydFdHwB
-nhuNgZWzFkjW8CYAJ/UK2pM90ajA+RWpn0MNQDJRvweYIr+TgeZrqpfISHz4XkOyTsorbIGSE5QV
-JlklNYt4K2BvmqjJDmxUIdoju//aVnSOlx3kAxdqAB7T7mnOaZBULYG9MwgjbZGwlCAoTGh7m3Xx
-sjPLXBdDZfw1fgXkZ0OSyoH2Sc3ichEeIAHYiw1WNFWFq+e4wSPA24Nq+HxG/qqXefkgY+tptRlf
-Fzdw1n0Evb6rOfqpd29UB91e4hJHjSrVF5CwSVUsegDVXoCUUV5duB++BNVovXJ43Ug7BAG8WK6o
-kjmqfTDeMM9p7o1sQT0wPnMFsT0TfFhCh9dzr6qkMpBX3CNovqqrTXgZM8JaKlsUwDZuwiw/Wg0r
-HKkx2avtzsd9NhvpNJLiiQv1iVPn6fEYbXhciBzgjcENNlE+wRr5XO0KpyTlV3+HrjWOkYk6hLU5
-cWMPuKNHSGkjSdYeJE2pi3KrQ2Q7hLQajvp+/Lu1zaD7YOhcNOOWDJT2OoSf78+wzU8Lxu2RgQEP
-6VGq/6IWKdGPvpbkBjuqPEGymuiRv9mlmoDPsM2Gq30s+tiDWFEp1TLfkK4xdtCMXVUV2cU3Y6Oh
-JtSoQNkyL85ziob4vTEawoqJtMFAmZUH0Kyshs25qy1OnWJtLcuy4HCKLP++IMJ7LRomhW3vmO39
-JSt4+FfYiRiAnNcfvXDq8e3JW5yw77JSimTkZz+czYiekmNa6A/VjNUaA98TtX03RnqemgjBveVc
-2LnS0hl3Gb28eAyVuLwBTLE5sgjMc+iv+oHi6uBJakclJBy79fDCemTiSDRgRUe5BRX5CRvz1rMZ
-ybWYK7IjtX9FJIL3DvgZ6x7vooJDOPucRPf09Y9z2QbFg2ptwoTYryMViu/0K+w2r/Go1lpdhpbZ
-wJKUk7L3yx1UEaONcdddbR4v8JrwDAIIvyG2aoQzR1/0G0ysqKmCwnoW40RNWX+7UBALbfU//O6u
-4fXjZ/k/88k3OicwNzerRUBebCQWj48yVwwYxPnUL/7U4T/NB5KQSJvRZS+lGmGMZrqBgQuHCh9i
-19z3/V1cDQCVm3wcbC05QJC5di1CG4Q7DbakaXY4p073qpbU8idnmLj84JMdQVbTT4pJBtckYNgX
-KxabcYx4/2eM7TpU7cXUHPHcQTPF3FsnJtB988NWjunKdGj/UPSwfLFWojJ3BbNt3P+SgjoduKk5
-zzjnNBpF7INB67iG1MUhFNUCV+CkLadR6PXEVYPkEoSjTcR1OLZ86KE1OIkqvo7Zp6aZKn+YB5AO
-ysYGkbqGyR+yzJJcyvdJTxR+RfjtNpdlT0qQwcHQLbTYyj1fDQT7Tps4Mz1P+46QmJeN4woaOl4O
-aXspBivEdLkGTgo1cVJVu83AAcCBC+KzMhQCkbb9gVq4kAEAsnMmidJ5ILX4PBjV3NzH4RLScRjV
-eoPaCP5gHlCktOfA5Td3CGhBw4HGUxt3aALPnlg6nFLWuyqitKWYWbPCm4lLMnDxMU9B9fNzgoBc
-8ILsDg5avwdcLYCD3AKw5X5wa6oxtvVSbIUIUHTALYIfFscT/2bM6lRLY2+kveAtX0pd6up7yd20
-g/o5lRYSnDNhq6BnGZU1iy1+K221v+mWwjHlugJzHVDPQNsprQRx2QxaxrOYWQU2IjYWnbq70EGY
-jFW1HiUOOrFZS8PlM5gRBb7WdpKcicONw9TALplHK05E9Fh3RSVfbwQGK3ObIuE2JFyxC/m3/9DG
-ka96PfwUR1MkpH5Tx5+gzvdAjqkGQFSsJB3eceKFHjsr3qsOAWIKpL3Vwfd4nBBQdi94w4lVMWDw
-+AxrEPnVQDT2mgAv35tEYFYCMqhemsKdce0gvGNXpz7nkknxaQ76alEi4Ijg6NgqWz7Ok0301tNZ
-vcEJFH9WwAW2uEmhjwrbNXCjDGEiQITzOGV21/zz3MZUz/m/0r8z3cVqlo1kq6KSVJwf4S685IH+
-J82sHm/slrmAxbn7qRdC+VmvuQhsGe2U6OYvMiiouF/sPJfdB5f6uboLz6rN66g7rXNAidkJLzwu
-G3i2YWW/l2AkDOmxNkQ4W+1qhK1CBjyWgV+UOnbm9C0FYN3YgMpM52HnAdXau3lMo42zqoVIOpns
-p5dHa/ofrrU4cNuAfb5P5UaMNGKzE/fMC85BC7QVCvRFn/7LKALdHWOi1sj/dpb//TzzTR4bgX5W
-I40cIflyve2I1JwypdbDtTrEyFsK3w5FSF9q/K0ZpyXrXrW/vW+gB1DDJvK3uoVKdmYP91nuT8/b
-bhGCCrkKmCPsKju/ahUdnY1l6R3ZkrFPxSY/93iuI7nlcFDmBTYf5CftXrPg944D+Ydm86l9eOuK
-qz2p+IU786Q/8Ogaj/BXbd2tcZ3o9w5pqsL1wulrkXQAbVOuiZTo0ydaojiYB4iR2U+OrsnKThw4
-eB4spFZJfWBc6M75HOhMvJIMJVWDzjPVoYJ9R8xBvJx8rceczPuQyID9awoC1HI1luMe7eVfljNJ
-uRLFzowBZrRUNY6XXvWZGfIpMCaBKWuqUhscFuDeyN9AxkamERi8u83vuCJi9TkhIAP5TrPK989E
-cMHyknY2DWoMPiHQEuakmILTtldMo3cTyNxis2YRJW6wLeUvE4QUeLuoowH9G1bSJ+l/D8iHJpaj
-XakwP89w/ioce8AAB3W+IP0O9X2ZjP0qAXDkXFU1soKPM7ebsspGn3mIyFpUzxhdYhb//JQKyOeT
-IfmVRF2eT6AT1kTsXdQSNEGaOQ9dMjhESCjo+hUWe6Pv8CUfdaR9IgXGuMW/OEoCbV48nDkyF+ON
-NmZ1J8E35/i2kzXKNiNnb1TirW3xp8DX6zgJmhr4nHVM+g8RoniNml5141/6A/CeYMpx4I05PAKR
-vPSXYjgpHWklLAh1bneVmQ9bNMgJC16+AF6LDfFreojpEjGhMRIVOGX96jfStHt7X8KW3tX33AwD
-cThi6YhKsVxvuIUY7vafjgSG+/KiCJ0pn5XwysSdj2qwixDfwawDRdx9BaPIu6+noxQ/D0tMuMIp
-aKhf2x4IIMi2gXEfi/5CT72UWdeggABZ5wAGvQOyLvqWptIKyte9snPf8ET4w9ryeVhO+HrsHfNl
-Wpl0KOg2cbtO4R5ps+fEe0nwRgRhW406PanvZ4V0Tt9bkyWcAw5XE5mp6AgvrHozglRWXKOcJ02z
-Sp64OD3HZGrWYMAIMWHmf7aJv8HacoBl5lg04Wvy7TeGI+1vSQ2D2YmBJ818yJr43DFH4DVxJa/5
-kF4W3lmU9UWhEdX2LGssMKIjURKGjMnOoBl6Q6IKrh3v2h6Z3DVjMYDcjrH6i6Xuxv+8A4t50zZO
-QGxSw4O3DzSbEJNjwu6lDlQoLPxLyW207wKn2SKHBHMs6oVwbh0Ajh62gIPIUBpRenS6tJ9/L/bm
-PO4Pm1/v5FtsHP91gPuaySzcktW7I4roGlt+zN5/8EJ96VjPmMFLfs1ibbh7ZdmhWz5rMCJ1byK5
-ISjxdSSujZEaoOn0//RrslqUfMX2F6WuAURYdmhPT/c4gk2e49NQZFRs5OhpwRvZPsJnE4Js7kSg
-aEnQ7E9NQn6FouYAqnA/KGN7ftXtF+8FuDibwiLpNDtZ3R0pAXtATwnSJw9gZcl7MfkyQej20MXP
-yHehZGSLpQ6ahQS3s9JqmP4b0voqYrcVAl701j2LFZZoh+2nWBrWJAmRYky8rCU5u0CR+uEYkJqp
-skfD4Kw/ruv9uJFLpO077duK7cxLL5s2mOv9nwr3siZ8Mf4kb4FU/emTWufxy88FBwy5c7xpbwWX
-rfIW1VxcHBlO+ER/UpkKxMv66tzXe/+i/VYHUh5GaCUG8jH3l3zvaU0NuYRWG3dlHa6HRtE5vFWt
-KUo98+O/yCOPm6yR/4uJvbHuyNj19uHDMj4ehAPh74cOCeupuX+wsIUJMuCdaJRtd3d1BLzZXr3W
-md0X6jh/4p7vCvnEIM2CNzK32i1Cjkb+3wJpQfExgS2ql5e/5x8l3ejRuRq2fkq6KZYrWM2pUWmE
-hwSkh854aDQ34R+IkNWfBqPgFX0nC9KuUfTPDJ6PxqB0vi2ecyeVlR82e3vnNcvE8LwC36QXVelC
-PpRIivrILzhfG25zYXylrzEe7e0ickYmX9DCrgbOOwttyP7G9a15LUq6ZksSqcppBMs6NUY34uAE
-rCy2N6iHrVKGTatf+kAmVytbrjZ1hsJp1GAp5h8M86noecD5ACN9TM+/f9tb9aszwrCGEVFp9AaW
-Mj1KZhhfoXCGSw4H/MJJ3fAJ2qFet57pF8vEcgEY74RqC0Si73mxApjrtztMgV8tiYAiYoVc6Ffc
-KZxZoOHwSDWVdoWEpanPg5aeZRh/7arEvRohpiPoYv6qo81Dq7yq1SRnL1WpYmqnnUMB/ys8xNta
-r0zZSCn6Etng4ROdBz+gMlQRM/9tjSbHy7uV9zhkbtxfRLmiMWWDY/ARpSdcL0rqjhttWC4cIs+b
-GWX6j7HHuJPJeVGiDX6f6lx2sfpu2BHd04yOGbMhxZIezO4ny5MsYIj3XytCv4XWRo0h+w7qCh/k
-ausN2kj8Gk+4/s6CVp/BiQpMW9n+TuGJx9DT0om3PcmGS/CIUOLTNTbma3KGIBxX/PX7nNi5EqEX
-le4haqvWpRF2dLwqdn+a/fMJ43osc8unv/cdxdNboVo8xBWnCGxQipKCwdkzXxOLu1tsVesa3a4K
-WNTOyvSIHahRa6E0DwoCICFCVr1QlG9hJOj627vAfel0aquPj2qK3K3lefMpt+DFqKqKBLfDB88O
-PfnDvF1U2tmwhI3PDfWxM1DfOE32+vLSEDgF76P5qaTfVWhoUp/kfI5zjs9waJWiYgw9bylD9qUz
-cB2xcUCW2eVyOrFUC2+miHI+AW4+GIyY7OsHYM3MSBGiesbKjLGEJDNTkxank0boQ5mwXn6cgMcj
-dSDWKtCQUG2Xp4HKAMx6MZOVaIsRiK56duhKsKfHfTHvuEicBoSFqkYjWI7ZXdtrjIj+ms5/zp9W
-dt5VyUwKN8JMyyGhcjlC4707xgqM8Z6SEB9HqLHgH6eW9ouy3VydsIGZ+jt0zFJ4MmworwBFnLoj
-Gf9f5F40pxSMKbsYm2K6J7W1Wka31ZjfEw6IEDSrpYVP1/HWsFsK+02Av1fEuSm4YymQ4SAjGHLd
-WBC0JykSMaFFQJ1kPJS833sJOVFWI4NZriXMrVDLsdFYf/89uKjicgXSYUgBF10CXAbIWp8HyJH0
-zOXkdgI7kRRl7wqTXUqMGj1txy8F9h2LURekxWFU/NrRBQnAu6SQto0eimgcsFAFf2JrTnHttM5v
-e/Jo0RWS6ISSmqB5Dq8kj0o2w1SvVeFp9qR3JZLBcFVXDUrhtv5XtekXrscATwKV7270t33Zt8ph
-oegBnauZI+RmZB3CjjePMWrJ6oA24DmZnVnPPMyzB/0nqkQYwJkwbnBjnr8PwCRSwgzcFgbeySlf
-HjnpkBf9eksMuNczI5rcqTinfx6alJQfXa6VT9DQym3YUqG36B8HRtVcd+d4wZHUSkeIsLoEGagO
-rpcC+f0cqwt3twz4Z0mrffgh7fWu4Eb9Tsz6woeH0fWQsMk/Qp+sXLH7a9WQsetAQiHBA/xOOZY2
-7M1JKz1hl37jJVgWopRUxHI9v083zsvCxeKhzukdmCnVkQMvtclN8ZIPqhz7HQZ+vl/SAaE8jToQ
-6d7imtJqCyEv/x6qb3mpQ7hkz3Ygec6syQf4mKRF9WDRrsSj66TdmWzAzzGZpu+nqmogZVYHyYxN
-8GSu7xbL+pdvDcPdNqi15UgEBvu2MZivcx6dy/0TuL+MosqHKjzjkPPLYQgbZAIjL0HbQtf1xHKH
-rNdafvB/LLWoEPiMET+4XO4IWHexa//94N0DUL9wtRJdLxvwkhF6VtLPuWeD4UDKXtAYI/DV+jNy
-dg8qUn15mHmjh+U4s2mBbAZYcL4fDAl5Uml0pADI0u2BrHNYYyYFOAS8+4/7+4rsNH7HwgFoAaD8
-kWcYxhA058JIk0RM7dayf1ywHYuL/4YyvjyyDY6b6H2+oP4z853x/2FHDQyK5ApkbCUBbcAafjhI
-TDZBL+xEVEIURp9JED3VBawxk/8AQMPTMw/Uc5JMegPeUbTTgv0nioURvXvjl3TYkFVqYQPNh11q
-xNhVxw3JBnshV9bOlLBxXDDDLs48znDDlg2NdUJDR+FJc0cJTssXYoIVgLm67AwGL0fSqLmAmfXk
-EZwl9rlCtsMvMWL+esdiCPmI4lQM6WIl4vObfofEvt5BHNaW6wK1JEAMwbkt0hz1zFd9uKWqWl5s
-wVUYY4+/MdrXTYHjZsQTKcJuXV/if0AzK50j0nvsWQUVHL9Z9p1pnYv0oDof0W5ro9+lUJPK+PMm
-S3lrWXi+3rb3EZ7iwaLqoAB3Aj8y1nRt0+0aB1UxLmS+U0X4ABArnFR3lbLgziaeBkh982usjY6i
-OpIhRUVD0FiX6GHgXgRpLy9dAFtARIajKX8x2C54ePdUrLma9Za49H2Ewh0jXsqYuUh4fZ0rexWz
-k/8aqkhoJM3bsKrowwlBYU/hsDFyP7t5+A73eRYtyUuTydzUjHKOVnOc/gXAK+okw0zYn8mYSrSD
-LEhsgr4d+fTNU7iI1Tiq+LKW7cX9hmrSyroQMAJ1U+yKJj9pWeEN3U4yYcbuDDxaw2hcwWXoM9ya
-fmkVP7jqanGOLN9xNvDEpgdi2DXDHcIcrnsbTCciF56uFXvL009IWv2PbUcGJkR3g31CpW5sPb1c
-F7KoR2WlytAR8K9KjDBYYrlQjJhHeXs6AKLqarcFB8S9KgbheK9EkO0J31d4pZuP8QUhJrmlWBD7
-TDSqk2KbPKDfbkgWUFKMj4+MjFsF0T8B7E10QNMkNBsqAw/AM3uqY+6wecJKGBGGC8u1AHtXxkp/
-myl5Zs/Ccry8bbKjw/b1qjnxSu1IxfOsf4lehoYyOeAbDdaGY5Ba/9MoECYNBhZpDpWswtm5vqq4
-h3xe9ueyuycpYp7y/HUyi8qgAbHJ9ENZ6Kg6Q4TyNbk2bHiWZbjiJ1ZrcX88LXhL1yLEkOqehptv
-WKCjpspgx2mTv3vl/10Tv6QYsrXEpRinD7yDm1yrLF1UlQ7aH1+KD4pd3JnCaoYm8OXodzUw8cV9
-PFf2ccu6rMn4BUUdPlrwqMioO2VRn87EUAGrqTz1Xy6eqAMT7NPN868qUTKECxVeG/E6knYiBwci
-GOdvrgn7+IxFMbCt3MsVA0yWkg3cCOoCeO6HaVzlwjxonPboYNrGR+vLnjOaVuKJZReTpLb5iMbh
-eKmMiiQeVGP+22MaJdqnGRJByR+SO4S8WHmRxzSV1arYnzDYvjY0/18PIcq5RgHJ3dPnci1MXN6N
-74hDasDhiveojhdPP482z9uxc6mHRdZyL42u2zh40eJKkXMVRja3YxBVaukOgRSd5X21OdDmGArv
-6mdNXCgxvfHmke9zynHC9PWsI+Ijk+8iUaLRvpeW9ld72qlnCTh1CYeRjjdzjFW5RKxL9v46adjp
-F+RtDrenkqzVAACMpiavo2YqVtrGYmBWL3KwRxkHeyBKRL6YKj+uF8XvCDpOdSf5/cMwjXEsKwBs
-BAEIj5DoEERNvE2XphsNNBx8SFtPC0YUB8IfxgHyg4NsXaBedwgLBj/WQRcRl/u6EL88zcjpyxLE
-+1AkQFnkNj0rUvGmEeeWFNi0M1nC4W0m5wZj2jwbzjx7r3rRdBLhkMVsxhf8pbNZ7w+peXR0inXc
-IDtgpS7Rq0dXfs4yjY+UUNxRnEkG9UWaz0CwDKhFoPjUr32vD+LhEfMLszvcQB0U2EvBG5AXgA5U
-Nu7O3FO3hakhGv/1acYYTGugLwtgipBHMQROJMrrLXO5yqQz9kRa2x/VKN5U230LACLKcCp2NtXe
-r4I/xP1sFH9A0BSvgOAqzb6isuu9pB1B2okBybp6sQF01o1adDJVMRe7VzZ3W6E5t/cm/RumDni2
-Vvr0B5jYdsLMhOQCVCn/3SH13KpbtgEhFQFdoSBEIZK+9yARiYVkjgGRfdf7mEmAntQ392JNZ1FA
-CfNvMjRDSCTGBPP5akcaCZIuvtkBuoHONdo2ZpOd0gUAZGi7E5MMHcAuwwoQc9PAfM0bDFQLEdT4
-grCJfXQT0xqNl1cvv1xZ4ypfF6AZ1zRru7Rmt8mWoAWHkyQKuUYJyW74Emhy9DeLfRJ7+HkRYWYr
-P9+UYNVEqtiXLr4ns/hVwubY5CNvUL6bTIRrxIZLPT94Tv1GTZaTZoIkrukHPfWMwrgS2E+Iby2S
-+YSh3Ffbu63iKVXY1OLz9ryrdTO3Apg5LmaJGI0ULWrW71B9yn+bJ75dvzUG5CBgn9ICZ7ouRF72
-2V7HRaywTkHVWBvmXYxONDHfbva5JEFYuB+na7Bsx6RgVCYlYNkLyiutd0AyQVgLWBJg/GM/3fpb
-EXuPD+GjbLp3KiF9kcGfGxSsgpDPwNHPYX2MdjlxK/ePWeDXc8XNRuXVazoyAr7zqhpYuFL3A+Rt
-0IsQ+A+F/cwG9E+jZk97dKlg+CMyUKbBhJV5jdNu3ty4lRfi40RJ0VB5NWd5izly9ATt2G8a8Te5
-xKT0CbxZD1gB1tD6V/C16XNcYup4Kx08c1WeLXNONh074bqu6slpukCrqH9LubEI4GFjv7X8e8sl
-0MIVA2KWA8kirIEqG8xfxXiKc1WDX3BbxbmeJUXNYnLM5TKKIaAyp/I/E7qAd9iGE+OjlfbGO31d
-TBEA2fom+kH1XvW2jROgvGAOPqWEvZognEhOgBahpHeULXYYYUqIcsy6L2GSL4/uTCdZ3r58efig
-zkYDoA1GpLrQwmayq4b6ShpaJk01wAppEJWv4FFuudbGEMF38fF/RPE2T9BY5ygLJLry7RulUzck
-2HEv85l5nanX8uFeK4FqadjghtTyfXNy7WW1964A7gY4YXZHKheOfqp9FPfFltO1wSPQ0pcdbyVG
-uO8b2NKNedexHWS8RfUuazU3/N5jdB3Gg8qumQ+CCZyuPpNDkj30eqVSYInudX/pbnsu5mqE6hJf
-5uzD6Ih3lBVo81Iwk+afe246DoFDFGMK4uFT02kcOuRYH1gPE8ZfgCZAd+C/tnOaXfAyGMguXMdW
-9Rhxkm+ZJQ7cGSpqPxeS75UBY9GpcF4UXKTfclrLEIkwhJUntbnu+VtVkZ7/1ZpeBep7OCmgWJTl
-feGD7tLkd2/NeS0Jz+OF1Awc1Wf2OGAyedspe5gRJwvEUiQwBj+94A6Ujd14LfL6uVtGJoOhpBna
-reoEQ548GqT95YzgzG8OE+fnnXr3TrHSHAKLy++Lq8ICk9i2svnFy+0W21SvXP9tZT5StzT20pb/
-Ma2DBXiczXMnIa7uvVuzuCr63DC1ID3K6SV/sk5IGLREq25EvaF8Ku/2mm62uR01c92u5Yo1P5Uq
-VdAMcLH/R7HZ7SAD/iuh3lSoinpafO5j7jjg7huDL2M8gMTaPWJ92y6qXZlKVoNdfyciGztvzuzF
-VBqkg8H1H0vWplkponSaK7ebCtNW37VSzauILyzaK/bKG2LUoSvV6czENDfB3Se4HgTrVKeM0FLz
-IDwgCcLqTCQss/Io/JahqgwMaDi5HInaqi7RSxj09JYq23ypVGQhv/MkJxjyhh11xnCh+SMgjsw+
-7dlL5f8HPEzGJABx35SXooBTx7F9himHC5X8oRw7e+SBd5vLFsLiRT7GkeYK8ytw/8zBzkbkCNsX
-JetJrJb73MLFeGkfITMu9bTuEFxcyhdczXvq+27Qw8QWT46XYAe/HXD837oASsBorVsd+kC8ulh3
-DtTaTCnHl80vfhoIwKWnRi+QcCTgTr81+LR8TUJHHV4ARc0P3RQGdLqweA9YbT0NH7+VewzKIe1e
-lZIlXboXVJqdDX4GidGJT1BbzSWIQu0SlHvBy5eTk7NsGukT21S1uVYMLpRkdw/nCsbaUNjl9npj
-RI/ruCgkgGAcWGIcv9ToYK4C2grJCEg/1PWPjMSX4yaNH4jRbUP0mFN2KNYElee0Rfv0VxlChgk6
-0hE/1wDmO9kQn3NYx8Z/nN4FbmLUGnQQFXZXf2Ta+LBeeB3Nz/ZrR2bgtsgys6TDHtYOebtC5CYE
-4v/3/KSir7bawgrYCdTUCmGVosvdIJ1X0dhe4+FDC4kxKzEnjVkqs9HFsoZIdB/lg6shrdm36/i0
-jut/aVrUVG4hEmzdhGdQiVb5dTEP5B5hBfkxXNUH1UCvVVECrfIk/bk6qjl1An/wKZFWGcZ07f1h
-D8DMNip4weRiYhxGD2M48u1BC099omGY0II/CJ9toQ278566VvajpSmFKIk5XAZ10uNX+49/xeMo
-cgqGUf0RrRkJUyNw6NlAF2bLcIpvxT0VSpUhuT1BeCVxtsCj4kt3ATRMYu6JCi3bv/B2W8o+UelU
-zeIRpKyFFm4DwDdnG/nZv5Pmp6nCuM8mlZOXd4wKC9LuBPI8yGkbKzJa1qAB0gVuXTU7LLEPxjPB
-IXlO28WAtU1dmNkftoOiOFei9F0vGvF14dMglD2lNRC6tqKoyBFrfjHS89bxl4D7ub6jWBTRLFCq
-/ekjhWbU7v9riB0agUBTuCeLc+/EXmojbZf53aQknSZVSN2rTpAHMic/9JmLRlOsdhNMwIh4S62J
-NiL1HA6JQHbTFlFIbiZGopn7fiS/YVql9p7B4uQ19PI+/x5Asx/hykWI3eAqYENRAXYm1fzhzQNf
-u7uRuXoWWTcnQLWjGu3fnxfi/BINg3GirD/Iww0dmQJTuwgNwysJYu3G+vX+OdncidBmeEAeLcMZ
-T42wCu+GDXmv5lJuDt8JCKVx/JD1qWlRg043G6w4xRwDcmJ2ZbC+VxLBkvP/NPzTDiIhMSHicaLt
-1/CmbLDJ1JG8CkfG8ET7JqoCFUzzBI1U5tHLkC2fWWr9O5QD+Hp2aJXHyWJybIMDQqgp4wMOOICP
-tf2PfQBczo+BswHC7gu5FOGMyyBMkjUF89Dfx6oXXXU1W/93Xd9cS+ieM5L3Nd1w5oIWfIs7G+8L
-Pk0AxFk2gyp/NKuLRNtZR0WD4Md0P/NFP3K9sghE8muZuuK8FlSBhaKOqgzvdHShp+KQBg9rJqjb
-/BqUN+iaF/amy7Xpp+echhVJmddXAItKKkhcAu4sqdNONAtNPTM+MoDdBjZjd0dBdiGp9xZHcqiJ
-OYmHVMgh7q93IdMEQIeEMc7ogGHoNnE59b8SeWpKibvYEYQcTDdSmMgJ41DvkLgMBK2q+ApML+dg
-w6Pk4y5paV2bt7cx+wO08+/pb3ELMzYYG8DP2cqDwPtcF/PaAPh1XTJnGPeXOEET4KSjbdvmKIKK
-rAw1UWtdxZPC9aWLinA4BT4vQqB+r8ZGceHTnmDuW/afQ4dwCl/KevYcZurUvKxleBSCa3/899z/
-xkud64IAbdZ0ByyOi4XPQuQVdayqmDEfqZyCf1uGCGSD6xHi5xuxDHpQjyFX6gyTl8CE1PYUjl1/
-O5qpCf9p8Am/nX0PG6hgHE+SgkPkaFqoVTFA1c3nLo9ga/4TCVcHb7HJZvLSJkxuGz4PrAhYCKwp
-zFF9a+n5vVtdNmdewFBHAUDSBvilo0ZEjYsQ7JmYWwPRCvYNAeVQ0e3CMMb8d4w+IKr5PGdLuFfO
-in8kTh90mVc0lx8CMc5LJ30nhJmqGw2tYTwtTfMX570q7ukkrQbKT3wY6drgSntQdhXbP1vb//V2
-VXDT1DBK/iWb+THUUaikfDUKuYJ9mM7CN/Dyh7YulFIc2/0QnJRHQ9idg3pn2CjmqFw915bEtgGM
-q+tFhS8ENOiyXDqUlOvt8yDzgUVspzOxHfO1rCu2p7x3Lk06bQ7L/VOulv6famdyof/A7Pj/xPvl
-t5CRPcmmkKcVj15OCRK+xtZ3vp7cr9ajTIe9dBgNWValsOQs1vITLL0s9wMsbPZ66mCbK5PJcZN6
-ywpCNTdc6WHx697GbIXi/kP8X017CaKqWVZLQYwVphCAwXQ+JswCC4vIteAaWjkhK/fNZcaqoXkE
-3lqWYsKwK82yI2aUVKZzW7rBtAhbXEeV+CPrN8n7NKmk+HbieCNxNuDaUIhl6dnxS0WSDyglIWs1
-zWdMvxUPH81CoqNyRvzr7l3t0bFeIV7fCwMSj1uMmw5e9M57R2566jJn0+pTDu3pIdc0hTxzKaTP
-6PxZ5sCV5z/8yLHBg69/VJuOZkVa1abO/bc0SoSeTHhTtk9MZFOGrlcT1U2i96k0aqbhCBJx6mn2
-GIxMYrTThI5ixOwAsgqTlZ4umDjGkF6OmeCOcMJ52snRDu6GuAXXEjNLJ3iTgz/5ASUcXzhDXlMu
-bqLwxWSSfMRDR1YEggSSbue8sT/GKP0nKllj31Axnz/3Cy88A6dIuyMlWTrpsVhpP5ccK4fH3b2y
-tsBuVcd8z1lBLkLye+uoKwPTtfkv7WTllERf6uBa9ZveHTqVxZr0hfMUjt0ud7V7sAQxiKBrhWgQ
-z6LUQDUofI+nvVXQnTDFudgsVt0hx5XALHmtCohCS+VoKAOPTCwLmbYWefgSJxpqBPaiyY4wmoAm
-gkiayk4PnVOLo2jhmb6dqWDQqF5tiW4J9W3d5wksTWL9dB5a9ucsZMWYTJsxnFxQEmK5U424Okhp
-vAk7OnLO8/yLzZ5IQjYikbsuKFbumcVQkxCUKXR3dv+LrRzWxfIAMaUVblwtJy4iQ6ZKRaDJ0nuH
-L+hpknbfs0bK/dVnErvpCsLL8uqhgqzJXF0G+gLRLjGmVKgtoxZV5GHti6dUx+T8lrZMZ6/oj2Kv
-ZDRsFV44/nnSkzBKpjIJnQZ8R7cpKUWGQFo451yWpXWeu8j13R5bTf/kpcxXSAngui+NK1PxO+0/
-kmW2N6QR1QxmPia5Jzc5cgk9glmifA5F28SWP1s2Cw/7gGbK0DmCVI8WgpOs4NqN+HomQz4MbCKj
-J40jOz+bu85JK5SxOptyJqZ714ExfQN+dJvNR3wGjbsHWCXQA10urI3CBpQfLZ4SZem8Whr4plaH
-edr4xtgEUgNAe8A76ZZCLKwNXkUNeJmnZ450iyepXch0Yd9JVYVRcxYz+4ZHx28L5ue+Zd21rqkJ
-yheBqXrGyGcZmhWlR/kZ681w3rBNvCDdx6R/CHJY53uIYqtXCaFETaaW4eP825tGR3Nr+YguwrIZ
-5nO+YEx/PgwaDrFnu+H185QUOqh5wndXQWWc5azjLuOHaC2lI5wrQfVWo5lGKKpT0r2F8aYznjiN
-bl5dCLtSVwR6r/ZIhOKFKdp6TQ9pBSsLwP+GIcXJxMiLARwzGBIjp8pzv8w5ywLu9Hz6wvL7R3E4
-rCV2hFne+jZw2OvZsGQ5KUZHXtKa+9qTG5kTwaRWaz/q6CkVWhZ/qZatOAmc24PyvguokzIbV63R
-yLikt5DhmGY6tL3p38uhpo5t86aJINVF+GDYoBCzC6XeKHmVBOD0LuCQAoyRUAUfDCUEHlqWB48J
-oXzl2tUFXt+bc16yqL1X7D1XMN8cRMAGHXl8OdwWJPXeXBAWs+N4TMY/ytLUfHtTkUoEHL2+m+uU
-TZYToWiuaP6euc/Ok0U2qZJCgxsPTPq/GJSN3Xu0ibem+SIwZmp3J+Iew5IeWkhJZ0ChUkNKw0a1
-ENRmIF05nE6XK9Ck7Exe7xgLECYAsfTj9pyM82LChSTpYnRWQ1k1Lle7fVHSd8YHHIXWTBLYdzb5
-ws1SaPH3AnltHxOjEYGcxSkY/7/XrcKvCoRaButuZAFyrvqgkm1RpMWAqfd7IbzUD7dpu+e1gfzE
-fYrF8rCOs9Rjta8/xSmHD4661JDlSlwWz9qRWWgx59P7oY2gKf7SPbOg2PS1KICpk8q8bWEwI5GG
-tNzY57jW1hkXsMziqI//fUH8Es7hvbTvhMMUbsHOfQKWeIzD307YoEQ4FaFyhqYyNZ32MM3rvE/r
-Ek4RSj3xxlPut0f03hiV5gCqdz5ax/1X+QfobQWGexfEAQfZ9YHAweB+rVVdJcihs0r77EvKiwDA
-kVTFTLAgLZ/1Y46Fzb7eBvwK2kv1dO/2molUOA3Gs9Xxy9s9L7AA0hHRo+kVFhbhNRULWZgvxucS
-RGzZNixOL964hDllsFixHqmpfy9Ac+pxh4vBBS/AxH9fXQ6A9hZXpPhi2otq1fTLvBKTGZQi11MD
-oDmTObE7vnMQocdsmeZXxPs5JEXIifr4vLo2twj8iQ3BFCGrWz0IcI9OI90eozIFC9TQtbcKYKa0
-luuyr7yqgTJh2pm2h4Jgiapq50DlNmiBELW2mcJzero0Uf5rTSpnbcWwmaDX3jlo2xkhBGLMkWk1
-9IQViiilaHQLwdOQGu+burBmwxTT4SwPoHXtUBpuNUdcbJAD0bZ6zh3rSQ4l6Oi9SFTNhLhdqVPz
-Eyht189AQasOcfwGsFaleusoWbnFRAPN5HFIrhWsWrY4kEpkE/C8TzOgWy7wssoUr/IGAp5AuW96
-nE3+4fC090bjcFklhUhzomWJIW3vCXQvDeiBm1FJEvUiDZFIO0DLjObQtqMqNCu9KsowT4QjzBh8
-6o2iXKmibyDkevRs3gso5tVp1JMaRktweaEUfokkD/V8z8rTzG4mmGy60rK13JIhivPOXzRtBcpH
-mYcEeskxZbrhv0NLzJGGctDlnZLTe//WLeTGblBcXh4hultpFUnCiBb0tN7gzA4xxC0pk6xoHpTy
-sEo29JgsJy6u+scI2d2yZ5jonofN8Dj43vu6D0T9BB1m9u3B1F5RzHQJ0s+RWBX7GRPl/i/e1FPs
-mycU/YkLriIgiVNP2tDdNSFg7LKwvLQ/ZQoLUmmaHyjLE2McK5Wx94u2ET1Rlh7j6TogmtpPO2Op
-tF5wd4ZTPw5zIMGy/QGk4CxhdnBfXu++eGfDTLNHEvQ0b0MmwJvU/u2I1eu7iQWogHe9bNSE7LPQ
-oc6DOFZckixS2ifYE08sauWwW93WJUAFqwAt1K4UQVX7M0hau2upcxgQf5C367GHHmk+qq7jLiRg
-6/n87JWgN5CN8i/uKB6pRiVXS6lnLSQxMyPvAZ1Nn7wWTSaYrYReX7ICl3dhtViwJRdT66tBnkhg
-7FFWfQzEIvjoZ+xwSg5PRLJE6ziuCl1kP8iQI1C9zmR0gDbbjz4VZolUWBxbQNmlA6BnEzUYx3Uk
-mKi01JMmJ4cBKQ62Def1f656ZoBT/r/8HOdGkfQSSKD8Q27d7UN6qBIWexOLAfKxi2C7jsDG6Puv
-YeucTmRf0nAwhsbthkf8woDJFeg0Zgv4aE+go2rEJAIFkRHzhzGLIcQZcv+thLnk7fLm2q4CisUp
-RaQaO9n6uz3O2SH24ggyJUqyBtKFSKrKb8BEpqpUTOqFAPsq7lU19d8pWULwtteFpwmvlZHZ9VDY
-i4YT/l/bavKpVM2IiDpcrStkkQOjFVSiXAtChWlWQR1IjzoVjrb26ZLiaQq9zefEwRFpR+/UZKL2
-SoRYKxsoJaK9QljWe+YZ4jgxNFZyoH/bS+asxUb6aE4tarLdZvS6CyFB148mDadqgeOxSA8mFr5x
-oe67ryIzP8U4qx8KPKNQ/0uDXV7mJYCf1pDfz0BBpM2798aGfitRzhliWPW3cnIbz4FBCPvElALq
-o5FuqvsKpY/jCOfpw6/VRekKk3IRhkPcz8ZRFRXGF290NhJOLSVG7qzcWCU6GlAuyBP7YUwzBlDQ
-5YV3Zg9I73pEGMVn+RnHLj3MQz1iYa3uBu7urVxhX+dwwhevdtTmjlWRvci0J8Xeu+05b0tKtdJe
-9mlTqMkfB6XI5QXs/OTf4eninoWuFZo+WbkUBpD9cQvl0s93t7++0OIUbhhRuk6WU14N555W/2of
-e57+zWQKmxhWRkFOT1QwZX+7MPAef/6DYd3LbSVmXvhhLDOgyT1k9zFVEVi7VndQ/Vf2pIetiCQ3
-b4RvPiy9d/PRdtHTJRsj9a6edDXIS6iknuTBX4RClBauCV1d0rx+DjFxVkPc9w/0U7UHG0QQ4yiz
-ySWcr4jZTevpbR+q7lVzlotCJMvQzw0cUnMK0hkmie0lxv/pDpSZlgxZA6qN94wydPpM24c8GQ2I
-mr09vmo6aaVA6KJ7OU7QlsmGLpf++4FIB1gtpJW5YivQxiTzlbjzFegV06au2c+P/kY2VxbJSZYA
-oAlN+alTpa9yL4rv2YFa34YsU4uXe04hnUQPKaPCDty2rB4xWdwFamRiwUSv7WSHTfpJb7+M2H0C
-67wu5pYu2h68MmGCDea0QAnW3i5ZPji/NMhBhlEYdCgOflF46D9m5+doq0kNxR33ozqQTAMM4uj7
-9fgS4Evmqikkz/iMbsodHHvsPtfZuo1OlzGy4g6qC7R9ZwEm9cbOHI+y1i13vH/HvOk8qA+b8vw1
-1gSXQMIqPUZrQvr6UxHRql/5ZmZg8UuvGBaH0Yfb8apoWD/F8rxl406Ox6JuVwZ0bxJLzevcc34X
-P3NIpE4RcaNJCGyEewfWomMz/KrnTmwcSOmAe3HYmBUxqUZmgmxxtX6Dby7IEW5a0GTpmkqIC/1G
-lWjfNNfhQkTQiu+g5sFOYxnG8ffTtf+geFTNN93MiMDGLXYHEROu2rtOIDerLHxZaZ01tB6WMWZW
-b/CJOr1OBfX03EgiLC/uwYbti+l7ADF0tqyJE+N29CZVd8Uv+XvvF3mw+h1iYLbP7YVTZdKN+P4i
-+lOlxOiGQhmC8ESpImVdzt40R4hK9y+6+QyaANZgNfetf3TxSBlZn8VEMDrjMyf57fiAsA9sZxyh
-Tj71GaanvggBU7Q4hpZlErzjvj1MNs60kLE+6BnLl69tYstPTJdI2Zs80QEvwuoOSCM9atAd9qNf
-XH3nGtkZnQqyTS9/5wseiWIrIJQ2TMYHm4LgGrNq9kRh6oWcSlU7yYK35yzrHD5XWryHxBmzSgk5
-1sG16mk/0/daR3JkXkPmf9IyThZHsZXLKZ/SykQzxyAn9zj4mn2m5yO3g6Qy462Yye0dC2pF8wmO
-Dx32xOPRiAM9x3jd7UqW7W7XANqEX4dbTM0EnqloEOhl5IE/kkDAQzIvP9Ye+/lIGbF/nkTNz1EG
-AMw9/d0bFjCYcHEGt+KShJGiL2Sb0hQD4BtfGD2G99D9FzLMklNrpi3gThmwJNtPTe4ucJWmrJOt
-2/wB7SkIl56freR8qnZ8OocGefVH21Ro+9940zC9FAzfM78GUVsS3D5SVflX+v63SvzluaHr+jr5
-vHhCdnSEZK5tIODGLOir4K+6akX8479+YpZDS0Cr/EU7SJIsOtnpAH5yeBNFlX6qLDl5G0C7umYB
-sUxFP3WwJedbDWv3kPxHwet6OryY1P+uAUqs47K36VXIf71oUZpP+mI4xeGRJQ0iS+s3fdQrBmeB
-UNEppqQR46t64RYZokVw/tC0deXFTiF8iVmgXXXJ5V9G08u50xxDMXHeo6LfvZEsu+c5gSha1cjS
-Q/qPW8zphIqm/WSpmvzidKeCSWzyr9KCuNK4BjXTiBKcKNtHXoVJ3FszxLM8pGAGFIL8L5SSgASB
-YATJN2zpRbfVrRN2qoSPzIixL01pUoOUk3Tvw1ZIHm6yFXvCu8yMnDa+QR+/uPhhnVrvxbCH1Lrv
-66cxAcJycGx9Edw20oBunl3pjoa1+vMFFsU325EgpjT7DQGeE1CrXhkTEiediZsOKlcODSaH9hC0
-8kJvcswSVsy4Az+53aPbI38HcNnG1Gd14uKywMu5lQIULXCA346hKETTQsP0G/Bzv+W5/OdrCSF/
-jKnUGHXZl/utNG6bs0Wu6g44mR8yosEfjLDdq+XJczbYa17U0Smg+WkWYKs87a4Aq6AO6RIZ//YW
-+/e0SyRqVLNYWpUKnxUBjr23ukGwqnqbKVjmBUML0ydh8A9hrGimmM6PI1yK+/bNrmog5+cWs8NM
-Gr0IbPrM/2lS7d0Cak791U9bOXaox2cFfND6FD3HDEAgZCS8j9sqEOlsA6cZTX4Xogf72dJTwDD6
-TLzzZBXHGH8zcTZ0aKc684pxBcqgEnE9/FQ9GjnzdwOM64cMS39i0IoMOImJbpfvVX3vSBiI6kCq
-BYmY4rFtsy1zIBrxfFmmTg+nbmaUAOqsZh+3vHwvoBnyRJTKB3w4EjGZHmwo56mEerYjTGSSQhSB
-VJFurOcpKakAqXNFlxdZD9QBkMqpoceAWVsovFBk60NSciwHD1NrOghog40Z14AG8+uiyRHp3Tqw
-lI8M3fkHx+0LJvrahbEAEgrdDC4rQjOb/BrQzvlWlwLSCkSCdvf7qU62l1dRh9IzgEScJYUMHrFs
-2lpJFgUSdmGk/ipiVQRWXFdQWBHe7O/C2vS6BYY8QM2P+HHFztowkEqOrzpGFeNx0ohyRJpMzsKq
-SWrWUGcS2PYGKZnDmvQ/TdiGgaqQtD3ZdU8WyAWm+3XXDx5Ubva8kIGqq634EqwRHwGC1upb8k3J
-5kkRzIATCXlMDz/EoFAATJOv2lHKvP518r/MWXW4uTKV2RLVNXvInuUh7/mmmEWLYbUTVQgEL4GM
-ucS/9Yx+Yu0Xomr0MgIbKAOKQQqlHqegYfn7mYJ46sQMORlK0x17jM38wdzxdO1HTFYTwIxIiI3D
-wOb8L4xJfklWougkw2XxRU5GIuQIedzWp46UlQKgOG8QB0fNayg/80dmh7JW8Nyefo3VsqIfkWos
-84n0PTci5rCZ1P8TjrS75pdjtJkj6iL4s47R4wIl0Lwq7PsKeLoLVJUDNZVC8ts5AI+7k/9ihn3+
-PJ95AoWDCL7vj9a7qLiPezy1jnTLpFaPI69nsBexiGa8AQ8uQbF2asIxCx6jV+gnokLYUjP3kV1O
-kj77efheDN9kKm52N4qxSriFYvC7czIOExnBm5OxvX2O+IGtsDKxpAue6V3af0I7EY3cifTj8GGg
-3hmO6OLglB5e4bL2UJTZqd62zOAnc+bhzqkrKauskU5SkamSAi/hyV+65l9fxaTpmY2sL6PkkXMe
-5p+LvmGaKWZQtcR2lfQN9In8i3GDFl/q4kqG7sk+A+Cvn8xjLyhEAer7CgFEkOJUZduYyEE+olOc
-EElab/GSzow2dVVHLWRu0lpbe1hCGw6mO+hqWJtmbvn8wcKUv8SmpWN2RhbbDrqGjBJcpVFZLMW9
-/j8vGU/aHAip1zYUGyevlTXSP1mv/hg+/Xj3M1eMayQ5kuxZBja4oNIu+dyewsC7ylAi44JezYhh
-obGykFBwGI/eZWrfawWbrmuqSgVtNccdgyf2OdKPZZZkctyZLGscVqrj3W13cMeQ2u9MJlo/AuLK
-pRBLjAi0cNCgZJWKOZsPsyICoHHKQT6h4sCmTwAgXmVBlEF2mWocIRKRj/daMOPu0C78tbQbAMeR
-0BZCBMAKuO7LqkkrWFqNKc1vmCFld10EfBj4OOsVjOjw/PodlXSVvQ6YpkckggnCQy0usnwfuAjb
-bOvca+wMEz3fHjAptnrDOShyIKTChBhImGMut/2BktW2m6H1vn9dHVpfepyTo09VWXNJbGgITNRF
-EHHeqLO47p4VufgHs+UqPhPoQSfvLpMNQBYAiBgRM66s0l0bfcGNVv9F6JP/sV1eeLDNwGNQdRI2
-pYo3C7cluKHUoXfOB5rWM+5Iuk4Ua50ON+kODP0n009RcaV+GxHW4Y2EdBkqgYdA8vJ1lvrbdV1L
-1TMy1pSRA4iwhnZFfpR6D7OFcXHdzw3Yq6iTqKbxbF2y/rYb2CZ3ZPn6WJQiZjgFXVEFft5dhNEG
-gHCGDqfCmMCpyZodzoqX2BiLCSEitidPEpG56JG9X13YuzqjUJMqA32wAYkjamvJWX39A41r3KKf
-TlngX3jSw0xa/4ffnms4VCBxStQoNZ/VobuCw9YK8lJCVk9nTnSEGUrK5ry1aTkLGCL2rHRdGMEr
-E5An0DMkaRVh06eUSsDQ+0CzICvWfJNctfQ+89iGqrJ50iru0KL0+2Iwd0/SUyoervgBDyfhBNZn
-geZ+WBKqE0YMCzREI9v7j3CSBZwMqqu52Bv+aYfK6X2qsr6iCQcELSdcj+e8MDTur8yxrSG9Lkbl
-Y3lc0ILXMbpZjL8V2zXQJKhb6m9EKLWhPCbXtdBRWOC99+MO/jRRU8/JlyzfgFcye+Xz+itMujbl
-grHHWPDPlahpTEqQtdhPdke6DspBa1PM6qQDoowFfE1fyb+NjSJSmxA0Pt69AK6yt+CEaAEAqRDY
-5zbWTUeVlB8sXO5onDM60ba8os+v91Ff4jRU0oPdgoZkm+1UnM7Oa1JZDCG9VxLup4RdwxRyRnZY
-Ca9iZTSwAJQprnqfFd65d4VzjDCK7OP1e6jW9QzIwTcQncm+r8joOr4teIPedStLHSaEEqBNOQTV
-sTzyE5UkDJgbpoCRAmjYPaJc5nCjqmzloNzxaETBP9dEQCVvHqrHBL3QKGho5W1SaOpcl2YqR0so
-GvTvIetKyNudeBq4x15mqx0u2kjUcgUzQAJl68pZrg/c/LsNx7K+lkfXtVd7tn5KqO4fC7+FFRO2
-E4t2gLJq7PL8tY76Zkw37vVyc1GdJYYjYRffPXjGxpdzgbI+bux9hZoK4qwUmqmWhnIVnW3dAiLk
-TsBKI+swDGuFbighGbgoxNJ0O7hVUl2Fk5WGx2ee1gPjcI7AETXZekoKrmBLpj7GZl92tGbznt9T
-FfHSjJn7OFW8mRWnDCajg3bm8gk5MiT7ZochuM/BUb2lsmopinL8Zlvu1rB4wy3EVt/hHTnKO0qu
-3pEjCrMTWM34Nnach4M7+l+dXCuCSuuj22itB6Z0Vq8ZrqrwrHoQRQWnNDc3NjnulW9jJH+2T6me
-QpdCE1Zv6M3qnuoNCygRgMJMyXfaUdBqaee6CR2VpItRhS6InuEsja1Q0J/YWRHOkTgFfIoY/IhX
-vc13ONQYK0Z7uFfEbNDvopliseEu1VrIcoOnBXWJu2EZ0XQrrnc/iZD9i6Td3pyP9mBESan0ZRvt
-PoUOdIDBGCaETn70h2NVhKqDpjh3lMY6GP7fdIVAMoMr9SwG7jOLjtcAvANB20WEfUp+pUmCtkx/
-FMrk2dR55c3bzbNbVaw+1BAY78BlhexacgHO4Glk5LxwVS9q6acg9mjka1UGWjcm/4DaRBwB1wW5
-U0WSoHZVCGM1r3qhR1acpZlwU299JlyalqXdxkreZMbEjRCjGsDPDiQw5ORQeFHoZ/ua2zcuGaI0
-UrHJ2e8RdaFvu1Qu8gJHrFcMgEC8/j1bE6oEDgt+ehKNYgWaxfcAw/NxelfW2N/V+HlMFBcB1vU8
-AwLwX5O3MN2CCpPZmhwNVouMfYTG20sm6BZM/1gtjMl9xlOxEuqVrJqZc0O6zJJDJglQHdz53j3P
-w8xxRMLoQlIL9NrEc10E99D/n+RrTq8R2atZ+bQR7vI0dJGvndZHBLZsrsChzOPQVTMrE5YYBTIQ
-n5mjBT/JVrkuuNqYupUanpxrBchUVmA6uIKpXWAlCFB5j7u0L5GFqlhHqTDshB8P79mSXubIKKD9
-TEGENTvyhY60nVUxS1KVVViaDLP4FUozxoapu4IjhdtmM0ZhOeu0LmC72MmoM+AMQKiLGdhwuz3s
-UqlK7UryK/Sr6aw1gkUa5BMHPpYgfJewuc2meSuLRPmpt3bcoijljRkppzEQZlwDuf8uK5GxyMxl
-qFWDGpijyANLvekZPkfNZKmOx9jg+PypvU5ysyznMN19Vtmyg7tugXTRfwaddM52yYpGpfmnaOeK
-3t77cD15sR8FKiG87WFMWYiQpgmF5QkQ+uQ4s7UA3E8pSrAOuInnM+m2MJQy2GKA0cMzLq5DGi7w
-H1g+PAt/LI96x8RsBPDOPZ1EYL674mGzdrpusOGhq+Nej0jeJ0aXlUhs9fJKt13WtJa/ixYMGiwS
-jQDnx+wWDfI5/JvjODDzkwN7nJouV7O+R5Fqo0jc1iezY4qiLSzIDPdeI5LcTmew8zBGZs2qvgdr
-Z1oJPamcLL8aBklc1XSuk0MrypHvIkNVafxF87wBBBtkbCb202TppaOcbU3ssSHclI63pPczJIDQ
-Ip1K3KOoMsr6cb8OjKRNcyrC/E8yg0MPzUktSY6eUJLDdL+HUK7/Y0ZRsM0xnyreD2/K3paj5zfi
-Gdh99guOACWf621+XaKBP2Nhj8TwkDiwEbqVx6+AblvEVpJiIJDFQ90eqlxBBdRFZ9NTz5PEW/vk
-IfmHJY687QSJ/Hb+uNAtXm3UHqEKCJILOzjb7OvBJE+KRWawchmAaubUKmE6VlC1iYICPxABLDYb
-AEn7MMQgdTvVRqmgR+YsmmMFkC4IEwayPGVsCnIxk9izyCdmwuUuB/J7m0EVEgv8z3/9a4qpxL2X
-zZSZGApvjeaLcaRykQDqE9FtOctPvWe6UEy5YqfxP+Hj8R3TlVZpkUekLBz5FMJy+fLucAhn8o7U
-qpNpnwWzTQl9i9Kz8b4ydWNCAqK+jkEB2N9c0IoDBisGyf6STPsXoLew89s6q0XlOUMzo6sNAoB5
-hfPOGDE+oET8nojJrb4NoMv1BRmU7w80USYCV4WPOA072D56TbCIDtJocF+xYCzCA7LHgBsbteU6
-VKs9e6ghliJibtieBDOUdxB1TwTqqazj0k9uXde4Uq80Kb2NC5aw6/k+CjRWDIqx6ESVDvujgTcJ
-/TASU3Htt4UDdsSpTLXWEIT+KUtLOQmTVgT6Oxqc9R4vN2ZkjakD0h8gsSGQ420RMWXBPrvwKWnW
-oDmuf1UfWgPBw3wWwgI/9lBNuGot7BLbVlbrZA0uW3s/SonXIp13DBR+AkG3IFdnDoY1A7q47uEP
-fUq0j9QYIamN2pMpV5b6VcDSj4vvI6cGJl8C1Uor3s6uG9gXvJk0K8MDGGqyYxVKuvA8aDJ8iccA
-yz/k+p3q+URpY+vx2mk4dIrv6ygP4BK5Rw4JwsZpG/wIpTNnXIukYjo4gSdMAEfQOrb+xBiJh2YJ
-7Kxdp/MK7tmlWZBzrTwDUdOTuey4NpWfGr+GDp8wdxZJdhUqIWkemD5i5hzPuQ7cF/TUFwfXmzF4
-QmzNhzZKeH6QR6oKJ9aZDt2eZ1Jwbacny5ElO+5GiGG68kcOcLcDmHiFMSladP8ANSK/l7mq+A3N
-ou/TpbY2wM+MxYVvaim+Q1pW/Nfc4k9LKCsjUFQWE2YRpvpNRpFx2ERdeY/ux0GDYTK7jtZjuMiv
-xGKdLGi314mmYIJ0P79BXNOLlZoBJAMzUn+8oQoQjWF5NB2uiHZZ+VSuCCT28MG2QAleqoEC7zwz
-auV/p9kZ8Sg79dQaFBD5+sB1RY9cNIkpx/Q/hNaLEHnUgIRCAbIjQLqamiEUngg98NqDNBMruaXA
-dqRCQoQ/+JzDKYHbBCaIQcx3V214j0gTq+X8owzValzTZD9XWAtxBnb7wY/Of8X76RWsFjKN3TWA
-cZgM+sp5EmIML025+iosMgAaSdhbSbh9Gt3e1kZR61ZjpRC+2c2s/3XdBeBKFzL+0fRK2hq9dKI2
-0V04z+1d3gNQzBVM8UUQoJh5ZZMYvPo5Xz4kH/0iusDx5WlbNXnFPxZ0eW/ANivaUjmzut6LFEaP
-80GPLb1LY47bUR8YHQO4nwH64fD+b8KLNiYf2+2bSqFivd6xy4mgwnuI8VSGmxM+OAK/qpY7hkuc
-QZWZdRAks0WZSD9lLjyS+SzzkYHQXboJrhAYDK3SH/Bo+UCkop18IFkUyQytjlAIB+grZ1lKzQXk
-vvmrAlBt1OJK0DxZaf8eXtdoUSfIBYNGEKgOWihlcpscZ4R0xjU4PDhTpLR0FGtnxnpT/tVNCwwi
-2OvrhfbMCHdSSRa/661E1n5+38VERqMH02zUBiDX5vrhIlhqbSWywtWLRBJiqromgqJ18xeAK8a+
-VUc77vfj5eqf1jHWR+9mx64AhU2VrXowpcZ+RxtYe1tUAFoDqYuaxq/ZJPy5dx6J6o9wXPIqc1hz
-5BKOf801zLcQewdfaYFXQcuXN7ZdBHNmWnXWi3ONn26+itt0ftyRDKQCYMGk9Mm915wk9ORjvsy4
-+sBbUxr3qWMN7uBmUBEZx11l11ikAMw4ts4WLlhrhTRoeqZA0t07jsbHIk3tH5Tb8vs29lHr/Z9x
-2iCmn+qO3AlQEFXqzj3XpImf7dDV+NkNNL8ge0TeMRfmMJsIqYWSyzWL6jI3X+JWRmZSTXZob+ph
-r9c6o4tAs0BVEkM8zEY2dQQaddFRz4qTA3SifpDkBPSlh/VrEznR9sgYZjdOeE1XtmZuYmLraxeA
-OOVyt5R1e7ookzFpbnHcHGZoqk7aF+aErCyoLBjEv/TSJ6nUQEYUiVYaWz/JYKCHe6ZJPPq8Pfdl
-T+xWi9ghrSgOl2rYb0yuDGk781XWtr7/y/zKOf9FCeWHF3JJYFfzXbPktOd7flqSUXupmb5I2i0E
-CJrrYbE2kwQ8XiFB7PI7LU4R940XszVWbIxvwVl8mqTfzlEZrg9y2QFZWOoxwvro43j8vLG+S1Fo
-OXnZUSvLlNkrIxtBZEUhhzAXp1bSOju9NBjoGjj9f+95203i1gGq27V5ZG7TQPxso6xAkDNLCpR6
-/fYS71GSZFKhbIlvv09i1Zj+pbZ6+7T+QJa83iETv5YQdTeYWDfd1a6qPBbReGtYdV+t8VQcVczC
-QLZHz7qhZT5jCnsA4PrC+rMhcjA+qJPGwXkyWDZ4Fq5i+NeWxmUNaoM5YXuP9F2c4EBvIGPZRZ12
-cs1vfBgDpFh2IVhkGLC+6Lenaqx4qOM4kPkH3A7turXNV40Bc8g8zJHwgftbe9KFCI6HdBvDsUer
-y3p4LT7UttHdHWSbZWLHMdGTxbzMwEw1jtASrfvSXUn03EvwJGush6YcCBiF9hU/C2djpcJJkpJd
-kAnDc7jJrO6sqkmuZxv99fzSs1Qtnf5K0rXFRvFlrMFply+6PLRb4FzJLHY+V00G1P9E9ihFyFRP
-XBZYM/KEh0DqjQXyzDGIKYtTKVnhw0XpRFs9OXc3H99j0WkxuImOaVNtQwVRHg5E7b1xvhfA4Oug
-0nCLywGW1gKBFOqTiFO9YUDfAkw9NHfv7wCa8h1d1o9Tg3OJKVpTCv9GH9fKBIdOLzOs9J7VWSwX
-b/YGCpQjSVjGfmlaJ/EOWKRf0peeO/DI8XKO60hgKrSiSsfZo3ZeJufZ+P4h2z6zM9cB8/9ecm1v
-7KtHom+lF7kXn0HXMF7sYEC7Ix15nNrM733vmMeTeJkk1BXaaxJ/qDqZdYxaUlFz82lChP22AUXy
-An0ZmMzP6g0wuPiSnItQq6KVNLpep6QZ/SCCxnCzLtZ0EouvoEIuQgQlVdEwWg166pQ+R5nXxh/H
-Aw45SQMFpp2olm5Sn70mhEmM1BqbXwpDKeMF/2z6ItDWkf1mYOWhEfvYpknXvHfjlKgoXICSNMqz
-TxAsykVTM/C7I27P5T7III/HuFEkZdWVoOs8SU7xOZN0fxueZUtSXh1hwhB6BS54U9QdlFRbj9Gb
-8CrmIr4nezKaEWB9nZxm9c7bNqhBQkFRJIzhqebZQkmYUOeqECQIkK8P5tF1oa8zdPG3aTxv6/+1
-UBrpUCjiXCki7Q/kuoY9H4ry2pngdb0s3ir7wmlEH3chTKBoe5wEn02zHshHcVHRZict/eATQuEE
-IEt1QU9boAEOQ939FHR1Fe7Qtsx2R0xQkqXSAIpT18hU8aMQrAfga4XB+moyL5eLjIFhfUXQoaaH
-U8+Ax3gCAIhFNxrU8IdxqmKunPUwxqPgFNtiSXtGanVsvRQ6P1JzQ/w6dyRof0h5FkiNFAtZFxPG
-O9/ooczpIpXHIcDPBMdsfbZ3HooTmKaFrGn76Ws0sqwsVa5+Oxd3A4CHkJHyS/VxYJVuKWX+w/wU
-70sLp2WML1ADAHaJ9xQRtzydW2vY9aCnCufJNMM9afzgFcTfLdp0o2MquB2Cl5d0oQgEqaxkYNl3
-GFAM05FU63+f7IhtW/4Cgg5j0rkChTCZOAlVSmFMcojlkCx636lXFqdLP/OsWb4gu/6uQdLBAcR/
-wLqFMjWNS1/KUUin6RffzfZtM8m16QmMkIbcui9CR3cSW2/2Ecld3T5kKL23+OGXxTrB3VsgUkk0
-cHT9K52gEOF8yEeyc9GO39HEzDKf6sVei+QwRU+O3BbatOWlm3KFlDWT8bKywlZ5wyFT326mriMt
-JqBr+xKWGVxi4TUzC2uHIue5rIPrV/XdB/QxXSV412EbPYfhfPEmOtR2D/NPLXNixfFBFKKo/cbk
-J7UapfSHNKQiGSjZlvG3A1vIUQsCTPD7/RwwR+YTHtFa1NLZK8F2pAR8x9a37IGehcO3e33NsOi0
-2Kvmf4C07FEi4RVgaGy0oG4GcMN76AJsmNX811qEpNGcoAtuADIWFlD6kpwhzpkUe6gBSnyXkFrA
-jtrwKeJ0XJ8+jbkRrWRJpG+FB07aILWt1Qz42SxZK9KI8ZlHFJQXQoHXKqhG1PLJSWIRF/PN0B0+
-zBH1qt/xLpi+7zctMhgChppSk+2HO3U/Q6w8wiyQl1aV7EKo4I0E1erp5duAM2cAlgS3IW5nCR3X
-ybGbYkws+2wWrAWlY2snoWesAZqiaR4xIxF0VR780dzXpif/dkTGDJaix96iKKKU5uetXdj5Zqz3
-KvmBRKmGIZbAcvhvdyTZxVwsAgXV50Olv3mZ/YwUYFvTqglTmsnKBkwmv4Z5yzFjHUosRNGBxp8r
-qgzC51fYVbpIe2WUEAgRMw1FXRQVj+zDQfMEzcHlORzZ7zVw1sr3E+3fc2ViOAt3q9TqzgjbIduL
-9XkxxliAlOebJzGMkSOFhWXVzrVl4wTwpaO6AFBqXlRROXtkKaqX9g/46MK9QyGn/ayfkn5RHALN
-hwXYvxqvlt34uuqiTLzfUWnuxpMPEeqQ4LRQxdOivuwUzIoYhKYQRCkjXnyXnVhdH/wZJc7XLDV4
-HGa0hl6sMZ1IF0ZAJJ4GLehcmjzDJjYAtHHx4gjlSfgyTmDsme3wFwCTPYQPVk+oXD35d88nbP8k
-QadO7MDz+yHHpU6a1jn5JNSsYglUaY5NtXca2tqjHJZ8FJTZewzDOPgjCwCCEC2Diqm2kmjzj2TI
-vL8dxULZqKfWRGmwpkntj/lxpTDOcH4jvWwVHUjxvGc8oIR6iBgf6Un/CVWZ/f+NfYe9I4SGNch/
-PYuN3vKmkj/v8IFJqknmioFQ+6KfFYw6c8M4ufV8ls7YT7U9Uf6aL53BJaXojN8aCS8L1wswoFR3
-IsmLch57IUtBMyD3fQBsHZgTOVMRziCkdHBJgWOtDcwi/y1Wbl4lamzG2ESliS3YIWtNpkT93k1f
-RqK4bCiNEfeEviYkdaiUl1giAOAuHVSVLTmcvIHgqsdNylQOPv6LnJt2WryiJlwujF+2Tpr50jkf
-BPg7jfyv4bRk0F0lYqpHaoFbE1a1/4RqL+pmToc6oMS8DorBezI12eqJABpR8vg399bGJmRpl8pm
-1eoq5/ru8NXfw5l3KmWvkt9KKxtOjGSjy+8Gov3yDmRF/Nuli6wYreqYqDa2qSsF+yiubs9odIJG
-B+9zIUl2yLe8LloX4kRTt2ZwfyANWZ7AS/seWoNCacwEcDBuCjcGXMgQoOQAq7njg+sVThS1v1+p
-E3ZXbjIEjZYyLPcCiCUlkoMPbtIFXuXr0k0NIH1TwYzkcnnUb6Phyk459D1KskMY6p4MYWRInr3V
-gCUrN6MzUdoJU7asa0K8UUX5g+M4YG7EGOq9GKEqMLHvw9KDiHC82BrEJU43as9xG9oliwtVdUHw
-8F4pvctXEKQtAT4qWwy8THJxroCy6CkCj8rnG7zqZbvssSnaDPDS6euBHv3MZieiRiZcj0zB0cFt
-bxlnwAV/Dgrxqc8gfxTLj7vyMYLVLiCo+BJioA3xEtEMsZThoNto4ltPlXtYF1/NKoCD/IEMv1ef
-V7HwYHDDZyqLeH5Dn85Ch1hhCVIZAbns79IVepBXD6cAUrj6CIjgAhFVgyyci8t3gOj6zdbaulMs
-Y9q80BVa0cA21cvu6LMDEU3ycmZvPq3xD46bt8zzZeCD7sVSvlX0G8SY57q+TTVQShf71K/ZnPDe
-lyz2fTqpzjR2yhDZcm+z73ALGb/eD9gkqNvT7L8Ng3iOB+4S2+whTcV7A6XZguYK0lMTuwPkUGZn
-19ryntF+ceZ8v7GpQIqwjFxv6YVx97tVbHit3qYbyOEiGZfS1hAjQf/tNVNXw1xFP6IhodM/bYbW
-lDFnC5+RJRpU5CJ31swFSNCmNuBAOokGJbICBaOP+zpSKLU6BRcgx9h1i/LK/KnpTakI95AnocXN
-TL2YVceKt98mbUJxiGo6pI2QGpOk5NxB6KnoXJZjpp0tIJvfTkx/su8Lr4cL5kWCrvIXRnsylL75
-Q3qILB1uTHGH251r2bdaDmQ7Ztouum/J016vJ5dBfUgVk9pJI6+qjrWskj4cKr7MVFSqTrPvx30a
-+P/PLFkWPORKlGITh2QzPmjL7g+1SZDYiM9OYEUP+6I53ZHSFeQ1sSPbQDhFj8voe5soBGl5u6Rh
-GF0gDMMgx4wsXXm0x78bAPQudE3q3cZWLVt/K+kaYxPuLfwiFU/rC2ioUH1TG3njRDfwLxmep0r9
-2SZEtziOezOE7987DIt3eJQGQPtY4TazDg4BtW3pPGvr9oQMRJPopqUsM3fe3MtS+x7Uc/BjvJY5
-ImdZHAs8DAB1E3/kQ6BQqNrSYswU7zGUFJBhS1yEQJ0Hn9wrREA604CMO4S1cTxgZyTNAuZHiYH7
-RqJccz9xm1Ykjk85VRi2LCCmObD1pOc5leVSNVUCyjhDBVPRWeRCsqQ+Gpzf3WNW4C4S87w1PfY5
-cP15Aqd0fYYTtETnREIXn1wEDMuM8p/MAxqTfd/MshWJq7CTz5Z57bRj8mzVTgktmG5+BMyNb9Bs
-3SUOIAK9A0/2qtBAhc/w1BUPXG/F8AiXJo11o6Fh/fzxktqNcyQKv60tB5LBN6X/sgI+I4ngzIys
-EnXRs2zSVrnYMEsPekF7pLHUoVrXATT1uWxkLn52ZZXRgOFlHhhhy/wpBr71fwz8abNSFAcoxKkn
-O6hDjrM+gqYYFmUygyq4GjwrNadvled5V/UtSABKcrqqF7y8TuWa5zlwR2fJNyjmsvBefisp3OBM
-gvdWkjSdSA5rLjtN4x/9gIpVtKamZMUs6wp7qP7hj1I26e+Evud4Q0pmP3k9925S6XSRLnbneChJ
-j0QTk/eypQhVy6roX+MwB3rz0tJ2BSY3I46erkXSWP/ZMvMWX5X453CUPGczFf1ukX2nZtbhQs3o
-rGGoKFgCDfyO/h2QHe+mtJ7vXSm+qXKMe4MJnR3BQLNjYVosIHZ1/s8OgKW54qgV2VigBR2V0um/
-/543GxdfxEIPPzSwgZMkzdQogrP6eenzSNBt0k7SkjcBUOxop0d5cRGDTrx1U9LU4JbzFZ7b79K8
-dnbMaoQdmJ7BnLWdktTbOOJ/NiAkkVnIl7pbUWny7W4oSjgm/vuq0Je/eOokOqEYoxvMTxy9/A03
-2nUZFm0SX7TgsfyssvHEjEx5JuD0zJ/EDm0OkrelN2cYJXOI1eDlPrRa+pCTZdE1ezfxeMRcWYMI
-d6RWokjcL12v9hagJg3ZxvJCiXijHH/ys4sLZIBGB/TggzLGB58qTZbPrAAVG7knWaqQDOMuUn61
-uQWkqgua6qysCTRlhoWyoIGy0Xi04C/0vkPWxdQGoSU1LHGhq4pG13W42Nrlq1/825sFM6CEkMgs
-fQGArxFYRN+fhR/mMOtrlX1blYOG/pDb2+7xIxRA4tpi66/gPjbGbYF+BiMUs9CnYQM0S74J5yhP
-49eIQbLz4P8hJcUJ2gD7ofkbz7pcGthtW2XZiT9RWsRxNxqO2JOBoG6RQyiJbnikbAD/APA0/4+z
-UAW+659HpSRjPkUrP3E5/KqHSf23DL4/ySHwOqOf8T5iAlsyf1EqQTXTZuQhn/sMFy9G+wlqm2Ur
-05qw0gb3zKnAPjF/klRU5pOcp8qJwzKRygegFni4WITFD6ojbwAofUI/Ujl6uT2qwAEUYjdc4Ho5
-chHocjKbg5dtGiZswgQF2MvPFvZS4Wr1I+DhQpXY1PJKdymO5AREMC0JIn9XfpFUlYzkT+MBWRtb
-l/o+ViCiShXFKWDwvQH3XxrbKvObgBa7fCwqR/czk8QrsEd6cyTf8VEepl/VpbhQL8zKUmqNFAWi
-hXB5inMYmm+aGCgGmj8hM7PSyKOX8bAyiX5/72OF/SshiOEo6m7MeAooo3t670zbladhiTb0AXTS
-0m1mB/HH8E1eAYQShVPlkS8dnNXNb9TwvC1E270FdFgJoFtBieh6IGg7mZRhGiGi+8FHdgUkOp9+
-qIsEF2NuN3owHXEAXa0MOgNl6Vrab7e2yU3YM/ZpDFEgNjEw9pHsymr2XYh4FxTAwTY9ts3WBqFo
-268HI/MzJvHqiHMPwORa3LBXw1Su8j4scY4ZqycqBnetGa0YA/HprHFr7Vp+1kbTUbiPwwjmJYv4
-B96/eOCpVzFPeReP9i6e1aKrZdBnb91CN3/50nmneeTos4ixia1djWesB/JPnBKwdg7xIMOMEX7f
-8txpHxQba0KTBNZ9kjFdNdDu73n80kxSO44gi97qkQStatuOxl7A7iY2QKkIepGrasI/fngLNw3e
-R63JfLKSolE1MhRM/JK81ylGj63nXOgtHsLtDfOqD/opaTuloteoFUicv5alzV/AvKrzELBbgPhd
-UCQlFak33jxp5aGyfgLIAskPwDcLq5TtyikYq7XNEurjeViOfuZMU+utBHUZSBkm+vDOlmd+37VK
-n6kmWJnt8RtPlhtnUiiNkZJX/RFLhBs7o0z0J/cIzgEbIBUDz0GRcXV6g2AUKu3TJm3hrS6wiLvi
-tIdYXN8X+oVfk0KS3U8/ECkbuD77NkuBTlZJY5FioaiBeTROcSIQibqe1CJaZu7ihKptnZpcdxXj
-hoAeLQ9fTdx/VrWAbHkedednW9UDW0J7SryJ3k7QnQS02lEElxVyfGJAYJK/0e/SR98Bz4h2JIyu
-0z6gX9EPSqgqVzOOvnGqyhYduAxFa6By4eu7wiQZJu4wih/sqMQAv4nbANLTufeMNzPUVcJt4bN2
-PsxctYlmWMg5kTVSMubjGZ0yqSqLUYN4CWuRQQOxnpf/uu6NfxXxzXnOnZNIdvRR1BfZtw0v8LnI
-cyxy6IG4IwsHk4u2v3pQObWfuyyFy6Y1zZrwE/DLLHWuJD2JHvoDlHa9ExYJDruSQzSQxHqbNRyO
-RN9FheRrjIa33dVbxCwEjriQRdIAXSAqRxtlEY176YsDJv5mC6Wn6jZTABfbyvo7VAQ3JSqRHS/9
-44VDREoZCD+c3Vj6ZbB+bXuzaez5cfbnuDc7D77h4uVerXM8hhwTyheOfdyEZg0STGQdAXzy6gL+
-3aCZW1S9SErUJw2D72l2gzql4J9bkyeQhrZPDyzah8KxH7Ch82TG2Krw69CeXL9Z0Ed1NMbqB1qo
-hb6Fj3zrVGNsQqlHRq5vPdcsjj5ZfXu8lMH6inL3bBGdpPl3I51MUArob1RvAzM8hYRR/9PG5m1g
-y6DFdOEjcK2XGmHaU2Az+0/PrR+8wj3vDzTMcWJblL9Bo29elSRJZ0UsBAYWuhSnZvTMbm/jGBVL
-OH1P6ldj/uMeYhk65FHYtLDw8q3Tg2FssqAB5haCKHD7YI43vr67znTNLNF+sKrO15gMXmaJAIYL
-AcXj27VIt1MwXy+6rrdSXQEWMG+M5iT/iK/jzlrHLKhRAJqRritGJJgobJtdLQ+1qmN230VSNVOE
-zxFoHmUvhBCgqAOYK1SEeYSkAGYU0G8VJCTbMDPL8ukC1mhhi5ApUZNIz8N+K20e1ph4I+lyxzMM
-W0jNCTf9wjZSZaHw4foMje0Su0TraJsHp5aoKtsnJFzsqpUg1tzkx2aqbhrakDLBBznPHJC3CpFR
-2iDI3rMlx5kp79KQJM6Rd4yyJ4C8aVEQWieGq6O8GAnH1+VFso+6etiSOONt+vqAuNm4UVlgiA4K
-YZwAIxQqZO9LQfQiXNNriVFfg2NDChehgJNANlL2tPx6i5dtO9iAq/Zk/pHkSK8EItSMAmjPvriz
-0saqitGVjSoNBnzSkAwN9zUYwDjVTccSbeJGvcs1MMw0QWlgVpFhj2xnqr1oxYNYmuPjGpXSIt2U
-vXl6XeV+2NNfwUbAXyfaGZtvAaBQxoiBj9GElhvmgxjr+F5iEwOBxIsI7Icqc7nUp7iWdkLEK1nd
-RSoEvmS4izO/PeQBd+d2oH9S4P/R/yRnlspGFDmTxEjyivO4BgkAtnvaCi5rKPilGZwncFnZr9It
-z8d4oqzwp62eLp+WRBXWxTz9tc4Jk5D51k/dvPQYeJo7vhtpinfOGnos/4WTUqFGcJb0c/CNcuuJ
-kD2ECUKbitc08CSLao7a8LcVyqU2tpD6DBtYq0cv2x8UFsf3W7/sYRPm4J/B/hvUozqfBk5Tki44
-EKAS9HP7DgdQ6j3Zxh2G4YUYOn4n+BAMX8C64toGRdvEUgAaOS9x/VILSuz/AprcCmpMmX0Wx7Tu
-KY17X1K17dHO2Dygd/0al0WEFCWFEvuqiHqNKw2tZUnyDapMlg5Dv+116Q49proAeAE5r8JoFlIn
-iaPZSCb7f1Odn4DVVmeFwn8pKjzj/SW1gbW5RmDYalxsxH3PiPNgu0As4vrLQHS6RmWEdDpeN2JE
-w+K/2Qjz3xVKqumI4NTDN6v+mLmOgRaP4WmZO1BO62QCS+Aog4OOS4o4ZEEK0QBVZrSiv1b3aXhU
-0GVYnsREGIE565radBmnRA2ffwg1CTQhpIelVY6j95QuRc8196ZQuWH9HFuECD3oT08o3e6lpHTK
-vEF/XKC2yUaffPWFzJNM77hVmHbng54D9/LVpufQutijljE/76dmsiFuxxGPzCcTv5lnqrpAJglq
-qKVa5RcCfUv4n17a0SDx0O+dxLrhcSD8wCX96AE2DaQfSL1RGtjg7i5wxT9fzPeoOshl4NiAbZjE
-Ct1QCiEbPnROU6wdMGqkuFI+hJ1k6d9NRQLsm5WLkRZ/s6/Q6UYzBCsbcN6FrsI2DQXLlyWCnQa8
-FdQWkT0Mg3xHlK6pAd6EN+E7fgrB6oli2Pe3RzrPvmyh5dWrn/+dIH3KBaDedC7NHstjV5xStwPo
-xaTXs+kw1z01fB7oXXEhwlQDJimLd5lIZZWhyMRucm0CTmflgHT6+Y49OBOu7yIz2JyqspqcO/98
-tYq7kTirMq9uFLvdPR7Ch75slIArQ+moDkTZhhPklYg94D2bBeR33ekTRGgcewxayI15jFF/6585
-gZN2IKuJvI4u+nnMKuCUy2eEWLQ3Pr2RlxFFFpfrv2YPNdnAtujFf+ypzzNJPOeFu8I91J73FsOo
-IK326mDmLK6RBMvWs6/q7vJ05HEVZys/Xtv3zOkePEuSIWZoRol1SHbAy7Ih8Zkmrh2Yh45mTM6+
-CsddBqdY4sSAKDt0iHEKXLGLNA0win4zmgVAMry/kN+pZeb4Z34F6B4GvH4yCtYFECI1j2Ej9mHT
-GCjRX8/AHA9qJFGMx3FL6/7EgeC55GmXrEjg7x/tiCduiwjvArWGp/ecGsai8xQzBagh3cbmd+sj
-q57h00TisWcq+toMQBbEiALLUt4wVCCNvNw5sLA4LnIRhfqWdU9zVH1zl/aFIeLSt9CfHAzmmJNV
-V4EbYacFvSX0wotmPSzql9S2knbBgTM+9JaITWBIfyTot9cipz3fLYIclZZt7GVkW9vLp+qg3LM5
-jEQTFpcyP9srV1RLunsSjwLaJsIM+Cc1+dDhxdn01l3xzVRg8oQqBbLYmeBVR0gPYewSB2v05DCW
-luGMdvT2zQ1TuwTK1LU5/8ya+JhpDPtoJYxx8ACpRs7cJjWcjNGZl0sTTsOLNudLI1Vo3dAJaBhS
-Xsa5rPLosoBTiChc/v3KCcjP2BNPxPrpPRBFjb3UhS0F7kOvmTvesxAlZxo6t6NPcPwTN7Uhl+7C
-7uXqffIe0h9DV0voqEbVRmoa5jjuH1c8P0/AH4EUU2sG86YYV9xnSN1BakwOg+lHb6j2VcWq+rTV
-DO9NWl+ZxbQZXIy5/vVnX0th48SMhN/P/Ix8rR6Ifkbszin8EOxBbB5IIDpd2y/B1mH2p9x+cnbD
-HBkaRp2/ZM4oaBa7KRgupZCkxGOt7L9j9OJFtsv+XZ9Y1FcQ5+s79u2ej6b2Tk/8c3EFSM11jG+m
-baM5Ra1MvvOF/PKyu7KdHijp++kpeExo3kR1ttdTwHJtd8x/qUPvvqp8S8BkTWdbxHAVHu/RTZuO
-KpX//5TLCGKXbXGrXcYu0kwH8kL6CBRef7VhKPGusMZ3GSKZ59t32rbQch9jMdUnjfuvb2UZcRxX
-20Vl7vEh64/s4+NJKHuaddHLo2hrjJH6I9iy0FNMesGg1/urGs45shsVygYWT/Wnxn59Yq5SJaVY
-bR5DFlTP3m2UrNnwezokxp4VukQVbKYab0IPMYsitkaUHK+1LQJb1mElxx6Hg+zpJ6/RZ85ZRavI
-S6cZikP6m8L84tiOgV9f/yiVHPGwa3Ni5X7SSwsRf78VUTqBeLUr2kQQZLq/peuJl5fkkovuLCej
-SyBMrdIbZWb9fvfAFo3n+IwYNDUMyzKPI9/ylzx2EvIc1a1OiPUcXkdVRrLgfCIQdBPBVJ2VhW5F
-oAKi9eykSm6QzY4X3SQuOJP02T4Rj+Nz4AWk0zJHXilrLuWZO7JJICpUO3Vc48/sxlCWyX8788R1
-nMvtzg/EhT4F4dPKMs1YIyqk+v6z/DXk/lSo/xYFeKkV7OdLe3RKHM2pdBHi0w4TBN7fZGeNSJ6B
-wVY+nM063smw2oIo/89D5+RWTIDwyBiLQGw0dyM3b5wI0MeUjOBOxBHO4iRCoNQEZFQaR5S08xhv
-qOqr77k9/QmKvAYBfIVr/san4/qaCKw0zUmmyWhpSuLbEw0pw76GCZj6quI7quPRy7blr76yh30Q
-IVwQVRUU2eLZ6J+LcoqCr3NENCEueM1XkFqR+0gkOPKZb4495iEOtpZ+tkXl3QR43ULakKSK2jnz
-ko27uozIarLp4n6ey3lN2rLQR5HfrsLvyRwdOGOoVh/YUygUIQI9QX5kjipssFuweZp99TQP23eR
-EHXEJKw+yZI1kgbZf2L8PnsOkHE6eOVn5wnfFf0QvhfRaUGx+EPWfRg5fMvntHx1kn7GVQLGFKvR
-w182U2/cWtNWqvCXq1zAXi0lj5OS+lpX3YaANu0TRMwWrFx2XOtj3j1Aow+hhTOBVb7oqQEg79vR
-63ZjSqAdcUue1rk3RrEzqBTTqvRNRgKP8sPTz0vywJzz+RYVya0uDmQ+YcfCuPni1F3ACU3qZs2k
-2ptm28NkTmpYpjJf0PHUVanCwbGSlIGrpGirMMsyOMoMeRPVqDNE2+elETfKIZfkLLLOK+FbzXDs
-IVsDsyGDRljeOmdeZaS5LFegc4SGBWsfKvs7Hq7BGo4f+3/EWM25SbNf1+WCJj+whXrsl/ccgGYx
-T3/E5u3zMMzdrBtSh8D7AapuL/JI14QiQLmzzTKfN+xHyFDnDUnx6meJBcPOpTt8Ucf6bj+qhkmP
-7k4DwOCMIRt2IJs3ip/GqOnQqmotwY4ViAlPeKVacfe4BshowL5Ihpl0M6zPlLr1z4iVDWERFrF+
-VVgdHpxXKeXlE/ES3NjivqfGuuE25o902mRZxAtDNEyScNnrPSCUicsv/KC+ZI7tT7lfLlnQjTpk
-pbJBtibhj13ljwb+nYeJ0QKYrmaA9brDR60s07Ryd6sna+99ZXQgHAI686iZ+e6Wcf6cvqiwq7YC
-hVAS9SURjp5D1qbeaht53R1f4UHN8GonaNq8RygTXceaVP0ESpQ9eUGgStttUBG5py0tRSg7XMZO
-NGerWabfpAzvmmWjXbF8XKkSw4Xz0DzkQGAHA9BS5icz8c5wYV1CdNrOL1pfwll2LXvTZ5wkbMad
-HJ8Y2sc71WIybcp0wfkR1h9iaX3qIBt7Pbz7h4AQxSR3o/1KppPDdo5EjsIQxVVh5hS296hbarWw
-Ypxkj7jV/rcalvMrUeW8HPEPJai+nkILOFvkPgFBJGA0ljTaP3hMNKkgQ+841mwYAj91HbC2lvCP
-H6qmHNaSDDWz0Ng3/kpo4xlP16BpSxvjOeuuSmnGU7j/Cr9FJeWHDc978CpRDbWqWPeP761/7VCQ
-4nmJmQy9DQb4CG2KPd64TxjF46XgBziK/cL0CNx6lQiNNPub1YkHSy2gSrLJF7bCz1sk2ZULh33O
-RIyJLtx2/UF/p1Zxd9RPWpyswqaGpPNSF7Fr10C5ZRExF4fHalFPeKPPQqIstyu3iaNf+90lvdMB
-BcPRS6bYRcifiq4+5poie4ZK7ncXoURYYfz0QSYH7kVTIbp25SGyAeXIwIUWmRqd1RXqqGtj9DVw
-t0Vwt7MW7QeSQ7CSjzNfP054kRF5dM7yOMqvbAbO/BAx6E8iHhPGNozZlyORqHidB956ck9lN3pS
-T0umqUk/4FXzeZSFKk5krBwKnJpuFXwVdnEwpWwF+KtdCPEzNefBBkq+6k40mXi4iOZZj4Jc+5ir
-rs3yd2uK/8UKOirjIxAkSlTSKUYuKGp0TfW1hKlX3fqDGmM51v2CIb4lwzIS1t/0e+6l3qDwbHqF
-8OFRJEN24OTPTCwvn2iQz7zj8cfi+4idpsTUJCezQv9SLGDbQjv8SFlURSgwwbr57Ncqbk8ziwfd
-Mx/xt9PnqYzsxpgu+5h1wdAEEIfTDPvmZPbn/i76o+KTbyixT8VW9TC+7CJgNxQ7Yiq0lugAUik6
-woBHPXLLV6VMUCwVxk7JFgtxw7Y92z8XGVH908VGa4vCFBM/93AZIVwbFac5QnMiFIgEdZpMpTSW
-x6kKTRGydqiRxZpN6cPxl0aWcKWJ0qVElqvPS/Voau7ZFI9+kLfYF9WMth6N2+egLcrLpfUGDkLq
-VfPE2xn6aI170uFja6L672j7nc00nBxA7wul2XSyYYNLYzw3TJTg7kRARt1EFQDaCoqbMyVTh+Pt
-7rYLZk3Wwkmdb72/K1762DUIp1trNvNHPYrf7dCert3w8rRaXW7laDaeOL5lt/ZE9mH7mycSHsiB
-5G6qG8o4cQa5Xrg2AgUbK2OFLCGtW4CdIvUy85Y9ndH6+KvSCQPcG4LbmtG9cGSqXDMlTD+pTWih
-WfcDQ8h+EyXAfHjcZDA4NQX7dcpNWgPdfknitOMhBNznxnB05ASh4AbHcsjxLGqWl7BdrDb7RDyb
-h7UwVoXXWZTEUnXNY4oBAG8pAcnVv55bkRRAzoXeXunCkPdb93Ws60LqMx3fUk1D0WvAKqEXrdDO
-d2AK/J2qdUAXT/MLj+VuNLUuS8gL1SDQD2wLYvVOWm/aTHEdELY7HApyOC9cxH+m6WnoaT+Uotcj
-vBxCjjj38ZoWnu6JIcFCbyV8U+ypSf+NLh7jG1MT8SvYKIFhb+BKiLZZfRtRlR7p0Sb1rFBZsrRI
-D9+fA7ezE4xhWPdXGU9wDCsBWCaoJwhbTYonUWXA4j5HjpJ9wbdBhbSseQrZNpJ6/VlYs6wL3h8r
-G2JI4U6/F2ZKNNEdfLwkI+MakF2lVgsIviBGrZRC+efcTaODOLBzl8wtLsxSyaAwj5bFugo1ecEp
-sB/4knBXnhpU6srH7bMhwSHHW66StV9nA9GmDacocdEZLAAAtPffesFAiuWlbq0dGz/XA/+TQzEv
-ADhQnhR9wcFWl3HpixN4fMXhUrDsdsxmdCT4BCTHHK+XVUc+7xJTJ3sjgzXQlvsAJLRRCAkfLfKG
-7X4veCQ9IC5HMNZMAxBg3GwD6YpTvH6xjimcwtqQhoF9CwVCjitaI2on0gHrkr5+Q6K8B0hq/7VN
-Ecdp5gtwGwkPbjA514P92OOK7lwkw5N9Cy0MsWf3r3SRjOHfJX0uzm3WVC2sDTkQjGUapj7ah3oA
-gVS9eIyDcqhJIu6Quv3nXrcKsDczfoO4al0wYLgRYudC9QwytYceJwiK4mJaTdm9lW2AVthCvNG+
-Hs5bGaIaT+EHOAEE8ZIIDcD4JLOrnuGJu+wQlqzGA90hSpxqiAwGnG2xGK+6u1l11+YcnVm5Rd6Z
-zA+41UgqZmqQPJq6CNwlFRpTDfp248qu1tOGaC+caG6rmXSxEmyQ+Cjd+PJax5slPvqaoAghvYqi
-TaDDOvdBbxJzsI1ZJlHQ+FxTU8ZGvUoIoQSqW+ldilOTWa4JsdmmM6nz3MSfBj5SHYgn04Mp1BTK
-g2dJhVI52Mw8RZyVLyd/L8YB/C845hOx9qQSoeXSxJuzFxE6S42uveAt/ORHHL/fg8/ErcoCi9dq
-W4Yp6Oz69ntnUI37VA71q+5Beb2ODtoswxlenZ/8qm0+EakKcszvblKCNkL8JX9aHW+P4qfl4OTw
-DaYF9Z8Kl/+3CSX+Z9/NPW+O83VaBKcwCZc0N1A3h5t8eQdL88LbPxI9s5jl6ul1rvp1UkSwjYBB
-QGMOVC6ATsofa+1UDG52etU6+nzgmc5cskGF8f+XkQut8QUKWQZDwOE24iJzWG0n31Um5NaIXGvm
-X6zBHV3pxqK2W29kKBQjx+E5VmyPmNrx9Od0aMeOTjDXuZC3qvOQxJfzwQodwlXiQG8tIHCXVnHM
-Rug+2koEhjKOJ4SfTsp6HCTedDhvfCsEYpYYfKpiTxRjtJqza0OqSadvFolHQb9wiXOyEQ9eLmia
-IV3t+p6r8566hNEjBdnY5S7fWCIsEbWkOxiTwTlOqm5vWC5rHwLDP/bKhlcFx1enfnxwxUdQ7tFT
-3Pb2ArxMXs2jKAvZmuUd66MYfca5XlaQKm400qIFcWgtfTiYr0CVU7/5IRCDKtNbF7K0G6jxRO7m
-UCirZckzdqphoxvYYTNIC7Bvo9TDZWytG2CFz7YM5DQcvOqnO64AQv5UH4cMzEPwin1EShD2h+Be
-mFv3Qx9qjL3gT/s+lVlMMj1TqX2YGnxUWqpG+gkRt6abqdQtjS9YldBD+B0wYsxQlDvnpIctAooF
-Hxlhr3e3xOHHGOGH//Qw8EMRsjkznzxeaJ3ALTx9SG/RuJMW9H4DRQ6afXiwzpQLSOu/DQ/8svbN
-SZkzlqntcyTz+yPO72M/vHJK6+YEFEikp3mkSagPB/ll6yqJoH9BhM+EGScvypjtb3AY9O1O0byP
-oIfto3xHlF+uRBVUzf4QacTfDO0W3M3AsNmKa0EGW3PltE9mfRnReORBOG5BDk+ZvZeXQet1pMu7
-fG5JgUkuqMbO/jCsmz4xg9Xn4w1a9sfCYNA/N7vr9pv85yFxMK4UfZ69PhuAc9MUUDik+cXHDkja
-hEAHOKidU7JrAKQjLyc0KH3qREq+srrgdpyn7OZlPxq++vPsM3QdIcd3K9dWG72/V6p5mFsXwgXx
-FeZ0PlC38w2G8BdU7Yu9NYfovFck3BQciyikQk6vtfegl2O+SzZiq4th5mahwu9vFqDavKUQdf0l
-iu/LXHWB53+Ay/FYt+xf7dPpwLnrZBsLGBOgQsCJEC5UtcQ+xAEx+K70b2DP6ban+g9mPi+fQymC
-N71dlWYOtUHAY/TjPUmzvzyi9Ow6wQw7f/J/a+iXfLp/XuTEd+REQDjOuonP4ar79/bpPo5Ql0t8
-aRQAE/oGyFrc5wJ0lKGO5R8yIk+vIEx0N/PQNEFD1j178vdTtIogUdvECoWCitYZ0Y4A3JxOFKa8
-IlvhxU0oTe2PxYVXWOVZYEFRMlxzojI6pWEPtKXYxrqzinw/KDJFIrFJPreWE/gZ+mTbXwiYjeHj
-IfriqpeFy07DgEf7atbSmY1T/PKD21uQ1CEaBdw1w7iNmK9bZPnL8Nwp/0C/rWu/f+cG8YGBwDY8
-hbuABFIJf22zPJzipb8dMUGhiziUMu2Q1i+pr4V/nGZ0G+UCEPri9GGW35fh50A+8YIm36t3hi/1
-0j9Hx9uCoxLPrpwUYUQJzepuVSw+EyuHVFfBvP3/l/mHo2sIFF2x8gp/a1iPhvBSURHxdupn0gCk
-p5kRzi9rXBmfjIeq94LthjjoABabA866gcVu6L7yNUWqHHPciyRD4YG/HrI2E7iX5nwbRIdW4PxT
-K3hj+Wr5KAwh0TkExXcBTKN92UzE3dnrDiIxTvYVbKgI0PVs/eeO9E4kb/Advt6bllKQ9nTT8dNz
-m3Km7TpDzl3I5usNQOdGf2fV+37SyVjRPF6JYDaHRUGmn7AWVxiC8nrr0xBAES2e71zHot/2/J1u
-Q5x+yhIfrcXuXUi53pnEHXIjDORbD3CCxPzIpfx74CvqaEJImxpga2aMUr/K6dLUkzYfCptN8pEe
-93SWNCRVvIqTEg/pGB/pyNLHql/9pzxVHoBLnAaBCrjqSTItgg1zpgnFLDqY7ST29sa8ybf9Jm21
-4SZvpCYM2uzp/9v4HZzvYk5yKO4dkZLUgWr4rwVZIrUJ7qX276/awfu/yX+REQfZYOQPQ0tD74Ne
-giu6bf/rWW86AAcDQy9D1/IA+mzvIIj2lDp+zcycxTv9/4WXgTpVyUJ3BQQTA8FHZ1NA5AX7kXNw
-zQQwQ8fA+BEw+Smtq0LxC9/4J7lfOQqL9JI2H25BTlsmT9yjCSKtpTT7BZOiBkagsQSTfiDaJLq3
-5pOQ4aCL4dlA+LI8WX2S+jQNgOYEoaX/8b6uqDfbJQCb0dwaiLd6IsBoZmNPwoqr9rnpkrowaxxo
-tlSeBvPKDoJL3kS4Yqjk1wBuwys0xnTm8F9RA/ud6K2UYnY1D0ABQIBsB3qq5TtkoagJmw6hcZuK
-xtYEzlZBY73bsZnkP1v94XjQ+IGU+TfH0SeQngfpnZ0WWtAHTeo28rz3ypPIiErJ+A+WgiEXKvK+
-r5Uf11eBahPUalwgl1EHhX+jGLH6x3F8IjH/xE4c1ze/t5j+VKxO/LS4LG/7qUpuBVJ93Gd9+zDH
-nfq6SwyR5VCkKbHwCPKmVOgrcNS2Zgkb3+zx/QdJFUP4LIaZZEio8gn61ruqXXf11VE/fHzJlt61
-fFNJKtTfpOvMBa5sRnsso5VD7j55UKk4fc9khD/c2K1+nuqXmGMSYjXMXtVrnycAu7UYps07rxIS
-FOl1sCTY9yGj4Jdpm3f5dzIkELFJQ7Bl22wTj1y0EzXYb26Hp8zuq2R0Otwj2qQRuVj78igDGXTW
-ZHwDhx3ELi5mLgctjGg3cR+xic9kHXH063Emhm3phhzAVfOAvyMjhgVtDQe6MMjiNihhoSpMqUd8
-we4QBvSx1X4r5B8ifwksfFtuqg63NjPlApLbGD/aRICe1DrnJ0yPCrJ89pmC25etXXckVqT4Z7X4
-PqJ+hdK878D2wlkv3fFictrQNeoPlUmHzBa/JZ1E2JsB6ylJrc+zwUJCtgD3m3FAZYkPFmbD0X+C
-haONq+rV9d1KJmF72NPPYG5x0vRt5wWYgmucOvQwZGoR6ALldekUxoxlnxigH/dhZD76MHIdRtA9
-shn+YV+Hd+xtVtwg40qma+k+qDnKDAi66z8bQJDpjeVcrFKwvWchjC9kMhjrAvfL8uCQcc92NxWo
-jsNyUVv0euTs5hlxOdjYNVwRBKztVSR1zOivLtNEI7inuDZ8ccMaUDGY1GilshZudWTUi0nxn4hU
-w7tbmEBrTSuzwjrDO0aF17zr3H9yHuLo/NhPDEBhFrSnQ7DqV8QFBiAFOwNloFGvKeJr6V9gWC0J
-BbAfmDJnjwLENrfGizBpCEhz+2aDxi/KOKPl+VM3avGkExL/0GELibgbQ+yeEg5rS1EPLZ+uzkr1
-4yJiLwIVA7IKtjjtmPWtCv1J8JKPkAzr1cXbr/oADAXHh3boMfloC0vXm7fGJNh0aGsyMi/A4up6
-MqXZM3YtiLmco4MRSZJNffFQppJvsI0VjTxcTGxAXvWKPgQLl9ptKYhMr6n30PRBIi2NGhLTiDjJ
-v3T1epVmIC+0nUJk23Q60r1ZhBnaQy1IR8LiHubPVlrQEwygOie1m0sNo8zm/YCSUhuriwRuRCcA
-T+ZlJxSDtkzKglAVz19xFzFoY1l9SV1F8X7M0Wp1KxheThENR8bkgl52eUgvBr/dEfGVD31nDhC+
-DYNXnCe2VVncV3F7b168zzBMTIW9kRl7+G8ZkDeeNfPDQc3OiFmz8msuILZNq4gIkzsMKPvOnKX3
-CsyCmqJzJ/OBygaVhVKhjxHl1VRRhWMS95VU/KteDzioiKKgQmS+Ouy19fNW4b6h3iBn6M8UM8pB
-l6czGG0lT3TDuQmL0MHVgN/IhquSHqNOAWbtEn1XhRc1YBZ/wbjuBJDHajas5bqKh9hUafLPp4XV
-JPHD5I747dGt1+xSYmHWttvjDSme+XGJiJRStrspwf9x04lce1HMbaJ1XepS3WxBApsFIVGHBIoF
-e0jeGPogdwlF7v90SchxU3IB+En3hwCWiSyAIPYYMX76mJGOpZO4ihxrfhi/VV3j654LbMha8fyt
-miBgCtnEC5jvxe94BNy8zmyOvuEHP+zEAavSYtfsabM6BsefbPxCYbYGQc7ibUcQImMdkS3YdmCu
-MHTOjx6bnygDm86mTABaK1/SsL2lTQRVvMiabYFRUx2qcaJqMVi0tJSYHUY/+bOBMLvf/2I8vYML
-wsgVi6j3622SXJxONlf6pzvwV6G1ta05nHcNegb4yBmxEyYq+XtRlUbblxEFL/F1PMtNNlmx2lfV
-PO4z297FTmnXc5OJJkryWtQ87o3Om0VRd5UnnUkDHe7heecWGEWOJ5xiv8Rpbaf8cMFlOEyMLl/t
-aC7K8Ae/ovMkjeDw7Ld/z+kIUoj0Ly/4fct3loq9cjFlNkvz9TE3+oGfWBzG0q0p8vb9ZAd1s8X8
-oVb6aKR0nHanWstbngUpxEgqwQ/wXDTiNJwSM0bx/Mg3hXkczrSMQOAAgCTm1Gzkvnpnn7JJdl4z
-R+7UE0BktCfShIDuItRlgNtwsNLDT7MEf+nTRzjC0yAcPqT9uNGotVpwXMfDkmnXLMb1hetxuvQV
-WQYtsG1WziLFvyWx1mLofBTk7a8sUHq+kXanp8KnUlwO0G5QtPepRd0WN8UiSfQ+3cRS6JpbO+8X
-ohInuUhq04Nqv51wnZ2+KhBVGhBfxbzV+ObnTQm1RbyHczwBPlxAsttd4LuCzi6VnsT/R3zTDpwT
-9/q9VCapk74UaWHaJNrVz9XWL1+fEIwmJ6vBFAv6lfJHnKjJt+jLSWwIkXAeY+QShgNOntP3ExUD
-KhJi3uPE7PFzJQE3Nv2eeB2pXV1uWEyXWbUsIdTZNNAFAc9p2dwwVLpuoScY5u6o/occCP3wlz0T
-M3ImvZLvtHG8g+uoZ4XMoP2Vo7723F/rDhBD5fW53PcU3x2+uGpN5bxgONO8BGJYnSpPW1MpR3Tw
-5Mcp7UlF8qgewl+7PnRZoDfdamZnueF9YtNhCWJAGlXMYCwgeJgPmfQCg/RAYX1adHjeh+30Ai6/
-wNm8rPwuT+TlDxv3iFQiPKgF1LyRp+qW1fD03XUuB3asBtcpmn4K3SQDoU3YnNo65Nw9uB9ejmEm
-xTpbZvuRvp72oOoNocd9fd3dcbGQq1qdpKp22Fqz4aQDWU4UH4VbbpzD/KbvqVaz5LPEdj+nmWa9
-nYdRh3UuFURSnV2yD3Xn4CI+m0kEufGdwl9HSr28W/wLUheEBX1HYUcONgGe2ZbQfIlAo3XkOooo
-ARQVlC9YycYu2Mno2RbKaKDue9dfSy+ZzO8V+zifTPY1///lSCIF7UJ3n3U0h4ehCB/4PGwY/shL
-ioFeC2zJhhn1YDkw8BFQOei7eEhiGQ05c8ETkQ+U8XOXD/r99BSeYgqg40lNtvEBwcJxWop2uAwy
-iofKigJW39nTlTuzTo4aCUlLglgbI2TWM8juqKQ/OrdaHqjpIiVw/8tXqUsRtu2S+QjNbFnTDtKA
-dWVuRQhZ2TXoLuFxx766X29zYNi7hIYb5wtFmXtcC0Pu7XzoaMBrx60xLuSRmZ7yyaYVY1jFILNm
-jzZwGEudHjhjOPllQGmNFseeWPOT+55+A0gIGF55QDlYbdSfSoXmjHSQbGZWT1SPC9OTENbl1PvQ
-SO874frSItGItDd57Pv46CX1lYOqCJ/v4L6seCyLfIJerYMwr3SQsNrymbizEvUDNysDSaUThVBb
-snpVjh7iHjQhuOCQCKgfpSKNSPu6/M4NU1UYJ8NemSBhPPaBO1zeDYfiRT9YMEVxwASr73QRkKty
-ULx3DLuE8OAqiKxOi6uMVPyjj7BdqahGdXcTJzqb3e2kT23bHbQVIAzNviJevBkZnJh/LdvGQ9F1
-sE9S2krwEr3gVxPNrKOHCl7MCTFDBWYIniV3/kr8rLntv0vQq3f+rY40AFTJymN9FvR4wV51kQ4A
-+vXeidejo8XGoPPcb5R9CxZ9QvzhzFU3Axv/IkUkXJVe4Ut35ojgy5xL/qXln8Mc1q0lixoTSQ0/
-jNG8YfJTcKMrj2N5dnR+BKIKdTvGBa/uc7QHA4+dzlYXKNSDGMI/LK0fiBUZZDLMtq4KQt60QjoC
-YiSrwpxlpx2p6Fz9vFFcxbpud3NEixCj/TP0Scg6NmPMUTCQS8Ff3ZddLsw2I1WgOJWfGOgj4rpw
-Unxkt2AcUOJty+aO477y2aarAtZoM6U2RlpoPXBTIQiv7h44qQiTh3ItB4Tp557fYqUAMDDom/Ax
-T5pZl1ygTS+Z34R4nDrOk3LuTqLt1fKnYI6oSFJFhjfaiOOJrzAtuQ889AzkVEL4FfPxgml7LSSX
-mQh8XkNaGk1z84RVZ7EAJofbJulHLuUsWRQJ2bXH2DlcnGb83by0GZR28S9ujLfTIZaVVWxcV6Hi
-lSLHw2uN9dQUkZlkCQKOEkpI7IrQBhl000YAOEVPMAzK1pnXJNM2jNIx8dg+REbrrbUk7XFJCnFH
-1x4T8Y8mFgw/q5BgIIVK6SNQ36FrL8rba5yEycXRi/paztA3SJ3NJeE5KFAVe8a/ouu8+Z3rZg0p
-zPUA+sLR1EngVEmP6CwSqw39+wVOrGWoygRWyiMNGZzqKD4S+Rl8OpQTwCLLlWiqWxrXwz5Cj/Qw
-x3nst+aMEl55TeQWqj+mcmtimcwBX7223IeIvvqCcdzVeUmjlsGVpo+9lex6qbM/yM3xGWh6+mKF
-BREQODa0ztVDegF+1tkUX2HGgwBUrC5VKEuDgD9+QsAbWhe983UgUQnYUCQbt4SH9KEDEBP4aJCZ
-zr22tybdSbTXjqcy3suu5KdCyI1NOoJiToRL1kbK3jpkmb5mnBeyaeGgDmzsJr8ysZk7UkV+AaqD
-nfAU7ac6K6x2nKQh55CdiWENnwIVf5Jog7fPrjEYklgabdv+3+0mdMCVGJU3RUNl2p13bFYzdT4I
-AKoxrGyx53oAZvYXM/96H8/BAIAoE4crQmInFxtVdU+q3+Y8PLBTZBL7D35/9fPa8QLtAE8LEHXi
-tP1xL4+tFocNk0LE76a8AiY8RQMWA/bb40IOU9kmzM+xlWq7oJNZOSw2oPjT0QNZ9UdMzXu6YTGV
-25n0oleuAJlcE/tPLQhkHM592dYAdySz26R7mRnsPRt2iafUnRcEMUSnHNHxgJs90rE4xOn1l10s
-H6d6wde+fDpAFuWcWYSmFXVUhFXCNcIGiJloZ0mNX/6v32SorJKn0hkiTtd8xTZZFx+89Tj2FdHb
-kZ82eCEjflvMlezE8BKrTTuJl8ET4qEm9rTWHSUo7pFHsZZMEcGfsxHLLvc3JKeIQTr1AuhTPPWT
-S1fEYx/n67kV1eV96FWJ8RyUBQYQTf1M/dyMhnvkhEP83G00b9bPGoGpvLjm+d6z1RapH22hvHgi
-D5Z6Vk0TZTw3BdXObfsoU59qFAcmVmBAEO8ahReOv+ETfnwZa1fn2w1q95/dk3pIK/CP11shvvfS
-iJRv60QHikS79U7QiR3tVjsgA2yDUhuzx0yuV4tK5qwLcO+za3MML9fQQw86pHZsoQS82UtfUw0C
-X1epeUwNVcGO2IPjGpMtg7KknQbEEZyqO+kn7p54AhY+5x3c2YbvAL3zW4RvC0FtxpLnH3uPAEXl
-S709y55u0VtJ93lZ5VXCyDM+iXq01mxCpBU+THDQgnPkXHnGC5wMVz0mm4GbN7NaiQ2iRDCHNYgt
-Bi+VxfTHrL/1sNvHUwWv0HO2UmJqZfhL8MUx5gIrY7DoSR3+tWNr64ATds3uY/Kks1afHgpVEIfG
-beIs+RRoiv31Lb9uRGXFp4f/0LP5OHK3gWHYQTTvJhkLlQ8VbIxrkJVdLXuQnfmgQxMVyKczJL8K
-I4icCDE7dxNjLH1hDlnk0cQOLEARqW51Ug7n3T2GtN/6DFb3Lc51PVOAM/jB7Ta132MoqAGmuqIX
-4Rav+LRi3GTjXfObmO+Q7IFCZmP3En5cux4xcGbL6/gAAz16KohFJFkDc8ZvbBxlOWjSNO+RIMv/
-r+0ZWM26bW2rjMuZJJH0IBZkzRtCv/inTgF3MRAVu8gGJEc8ZBv3qE2n4w6MuJQCAjDn73HXYpx5
-T8stIz64Cnq+TnVHzeBMHyM8CXFK4Usqug8GPuzfAlUh1D8dsGa8R2M8Nkm36TVwoU+xcDlHwX1U
-53NyWUTlM5qknDBeNLx6ePZWIH5u75+ZzW5TKXj8rX8I0nl2Jo6GWkkQa5KJxEo0nbi0MLVcE7z5
-sBlczICijJutV8pqKuHPp4ElPrNZJt4eQ0ezBsgzuBNRoIdwW9G5x4GGNTTxDtfP3ygCFjV0sIQu
-EPz/P6TGbl4o6sQhnM8FiqLpOIiDTbLb31HvVTnZYkTR69ifHo0jHUgTr/fsq5lpSvnRDRLnNLiP
-u5P1RFCF5Hhn367/C2D+n5whe/Kge7U33Cg4v7D5plPF3/gwIlb/ISRxf6eh2Wf7BAWGEbS0G9qb
-JjzWD/0eoEqH4Sy4LdeMsJ3UMp6oa5jUqIrk9+nuVJx91aFUyqNoiku6r69AMNMSHVC2PB21I6kU
-DxU2V4EHOikSFWtm054k0R8yNsRn44L6ema4YU1xPyDF3Eu4OPQrQeLc4Y3hpq74ZWYTC+x9jFsS
-DS7aOD+l60VUWKIFVKFJ3w4MY2jFHK/ABX89UWAsSx9bnoSzJUzDvy62UY1nuahtZYiA6nCxiwmL
-IP3zzPlkasQSa9rc9AvAnEraFLccBWw6caDrDnVTOtvIIBXUMn87JsYOyCf7NvfGl6HPQvqlgdg4
-LvQQfwpk3Tfz2wcfA7XFoNC2qYghaRSwkA/UR+05e6OjAKR37mAD1dJLg4zg8nZBiLpyvWoIE8om
-CKGZeudiwi6d4/OBS+c8iJ3RlltIBopWRYOAosDLLf9OPzFNnbVc7T5GUyZAI//N9HZjxpW7xFsG
-Ku2dnN6WVU2qloapIO/P9s4yc8u1jnRPJN50NkFhwsjep83R0+j4l6Z6Nc+4C3ru5gbzwokZbovG
-kQdgoSGCvGyiJsdCbaeLzkmc3b5Vxv5OtCH9aslw6AvMnVUvHbhrQXP/ACv8WOtpj31YI75tWdz/
-qZgt+66gjiS+3m2g/bYNjOHduJxkmNNQ3Od8b6EO4XFwVNjprrWzkF3Uhu0g6Tb38V3hMS/wN4AI
-j5glwLzh7NI8QeGaDFvOkxsYs5n4kQpPtzxVDbNNdQrJqZhisyR0VVH+uLlWDmvHx70RXseklat3
-BOvhvE3Q3fjza9erHWZDkLC5+dK5B/rK+p1x+f4DVtN4VmaiRnkwaN6MThDvbDC9w30QDfaNNJrM
-2jcDBp8AnPLj2h0G8nwqbz9k3+CEg7ICTPLXPBsTyr2bGNK1m/2gQ7t7ajlfZTAgGFZ7xU8sDc7t
-DHtv9CTmy08n+2rX6YxqNO8+O7TBi5AKmQZjP4dWrFy+k9zCXjrh62WkdAsrchZD6cGpWNSaZKs0
-veK1uQL+vErLv/hfYky+0yTrkkFc6y5fnOckrNznzScQ8+XUgfc9XAoWoW2nkEPwh4zVw1zsXrld
-b7gW4drm7cx6xB4aj1MqmWJTxbnIXNFUWMEmcEhVvfWcnd0W6peQl59Qiyc/tsN1umz9n4uvkrmB
-y6/33sX/+aP6aCKQY04j8+fDuYNQm5wtnUnT6z/9DJKdTR5Sq0iyD+DZOUpYTqA+/zTFu4uYPYb7
-rJUazYZBmCiSEPna3G9JhZkH2SvO4T3J0laGnqiD7VwivhrpPFWiqhTtcCENuBRCU3fc3TP5c/I/
-jLch5kab/FUcOrGxKNkLrlNlx7u2KEYna4BovTOXP5ZQOJ77XwaWuGv2bhG8XCQ1eS+EwEJM8pMn
-zqsPl7hCzPSyKkFi1hTmlLo+MmSv532PrM7q+ejXx5VfbBPlc5HpTt5hCqqTWdW15KndGjIIuaR9
-o8d3iAz/5+tJl2K7JJXZqfifayiQ/cgkK4n3mg/DAZt/a2m3dWpRPQkHc+/BPPCLd6H193lM6x1H
-9M5N5qCslzBO4xAo5YMB+p+ZIDMFUaBnHBLueuqi8vnARUag4tyT4ayatZFGBAGP54nV98rHPCaQ
-vME+GsChtjbf13kenBNV2Jow3CU3zEp1sG8oMDlGQyOhragvQB6LjAiB5D1dMDxgKCan07vHc0bE
-pf5jLBSAvWnZoUhgIIxo0OYovxUBdFhot7IVSMzwFM0O2jUY+rjV0IgbEcXzgzZoiLqIB/ZHccVR
-MB0Xh1AEyLJItSP0Fc9LA83Qcld0jbCCc+kvZR41YvmB67SRQOrHpAoPyA7PaagiMwoZrERJG7nl
-MAoy0N52XhsaR+REqShnDIQ9zy3Yf4sZyIfOAWTMGTlrYRnCdMlQl82Fhp+UVeH+890rHXo9O7sD
-+liK5IYwvBquxvvR+mURPE3y3/6690io78wX0cIBBGBxLtLYxRhssckgILHKiKzM58DACiOb5rR9
-QItWDVsGkq+e7xzsdcKtukEwHLhfKFBJ2Im+R8NYBNOlYPdx6GmnZ6JFyTVb66LZgCvl7fuMf+tE
-BcbhWVE4sSGX52iPjmto2e7SeF8nVhAFNUmKI0z3Wk3YvFAXJBZKtZ94xDLum8HIiXtbytcaGgt8
-o3edUzSEIUUoo7mP/cKeG/DoKNI9/3wsJthgjWMVYayehLpgLOa8FS3WljhyXJ/Dk9IXDfOEe5DM
-fhLYzNU2iB/cKWEqC9TTAyDkhjFS9PaoOz9ZrMA90QCKmztcRrG5UjTuNwxO1mOj7MOt42InqvK3
-9ki3qCpi2Tes35ZY4fYdj4FLR00PbS5jMZiZkvEFV+7TC5Bt0B6EA1v+GcBKSkP0joq0ONXCwvvE
-awM+YsNIjFa/8ZTzODjpukNAAMK2t2oxvaLqdMqvuer/ueZRfbAv564/FY5Z9Iu4u9qlZ3xO9n0e
-ZHVm9sl02aSRmFIJeRKBbw7k2M+BzsS5c20hm6rD8S42JrCHVaAGeHkzw50BAbFkElVjpB1p0mLz
-kpWygN5+wLc/4WL0L6Ya3SWXlSca3R47FfP9UVRsF7t+4LQ8sVd2Xev3mrdI/QvkoCfy02+ff/qj
-RD4FxKBZkYzwqkY+TBDcFYTM0DqXL4IvKkEFtsWSy3I6LF5h5iCozri83d39dKgW+q1OSVWf1FIS
-h5RqMISZ70cfaqk/PqasHHQvTNi1eocvGLow/5HJwQ0ZB7NZZ2TfTP0BkVVaYgoLtT4TYdFxdrUc
-ivC3vmSgojD0GeArgePoeX0GCJfovPqDsCKbLesIUw1nA4Ky5aUba/GX9ijO32PhSHWShChAbnFZ
-ZLIpeddFnyN0iLcjyeGeE9grZtfi4YYz+/XqULyfcshsZLVf8BLO7Y9JBP6qJ0LJrN9wNQQAiJgE
-/Ze2ickETDOz85E6pWTOt4uHD1tqJPuuZp+ysDDCuugnrYaqqoV1QeHOs4tUCnoN/TTWo09WBlVO
-o2syCaSml2mLIAbQkwaD7s1oei8y6irXpItj0lgksgA8uls0kTvSaDgQu6KLhvzKabygqrG2E4n0
-MJBXxqwt7XEQk6+1hDhQH4cDKk96fBSBGR+qMZDx9s6nftzURthGX9vb+O+RZSML6UBv2u5x3ffp
-HsnhaT5F8ibIJgjO3Bb1MTtUMyoz/WYqU5xoB8Q3N+pJWMB0QuSTtAcjBxpDN5UYiNgQ4Y7FamKD
-wQ3S8LybcP8zevKRLylI3frYVCy1iPlOYFAS2rPNhWqrMCMGe+xrUm7NMFFY0fXjTRzsX3he+7Mj
-7g4SXubLqZdN8xnhXObVKBLmVQON/8z8DyXosRZXbJ+4TNP7FozKmU3ffThgDMIyJ4lelmQL3wim
-E+fT2vSQD+q9D4QmUsqW/U+XmpR+KAl/mRuoYtN5AUm7NZSrC2rPLmNJYCiTAMKoQlaGVUUjqyn6
-NdeYYF9GkLRjHUF8Xya2BtTSWZicwbpFsq6YtdnSBecCQS7KNFW6TRWkAS8URnHU7fh1jGkoGNbA
-7dYBAJYn0S9N7ni7Do/+rnycW9vDAXjSOlK4nrfw6nxjGbNXxbLMx0adwv5FYs6CTFPzyAc/Oofg
-7S1p02JSKhtBxEIuTwgvMVsFbpZW9IvA9IMaFUyif+Wd1X0lVcBHO/NNLUJVptSsXSg3W5JnFlu0
-zEtJfzP1jXKyoQLjmT+3H5aqsI5ltOgOh2IXETt4d9LzpArv4ekBcjV2wLNzLwZcpGusFgwIXZ9D
-QIomLdSC67DLww2NCufWPP/fF5Sbvn4Gj3FnzrZUg0MR+5UDrH9KEaKXKFTfSfkJTLhxYIn9h0aM
-KK3difLWvPgJJrt/vRC5exK6lJ9Mq3lscp17OSj1K4BzWcrSMykz66q2pDOVK2yaxr2y0xBcjxnn
-BksyNeNlv2wSFJ/aftpL8Og725ub8979B4kDlNuZ+OPl8UY9hA/Gky4utak0Wt3D3t8KrHIsWUlb
-yuBBG/xnGFg2TeIMdHFopmx8OkZW6OyYxLdaoTv5miTAntXpIHdOvaFORv00UOaf9kKex2HsCx22
-MESmJJ8TiIL2goSUh9Q9lvnjOj1WbXBbY1eS/xilQUSEkb+ntfmz9XPjzkmKyk/ShZg1c12K0+Dj
-3zZ1rRsKqLBBDhqaeiie33pQZZD8lpYrCe1oORuyTKVvhSrm5sXZiMahN3QVnfKSvTvlvlZj1yO/
-US/F7q43zLB0j+UXnn4WNCXp5wqr0eB1XiOzNhzXZkPzLPel9n7LrucMWjwN/lpObOjy/VfOaaqh
-4UQtb7rz0t36ffzOyeLPKRoPc5rgCAdq2x+p5/0dwmulfd02/UjbXKArbSrJvJCrjggR+nGBk73Q
-PtGsygMvv5I/pCgqtUAfb+wR6WQ7Qce4csJNq0EPGgU3GC4Vrw+MrDMcuhisVZeNsq3U2IyhCoP/
-4McAKecdfvLGtt+yvk69pNacyXDtS1B1QZRjnU+SbPBUxYHLVF4FR4/x3AdmWm70Auq7rMWUpnr+
-IN3h9TtQ3DawGsVBy74AEf1gXKMkszc7ZBvVVB01aR25jzmmWwMEzhJ9s9FLrbYG8pZht+zjpVA/
-MeM2sQlYwVFZ+mhahVtWGla24vaGBIYIEDRpFsoMYqLtqzuDZl4Z3eRw3rsUqivbcPEkmCL0Qaim
-RV1tZLH2r40BJdN/CpIGjudGyjDANiipdub5cbq40YWCE7q8CeERWXgMeCuXQx7HAP0NkXNz130d
-laxKi3TQoTTaMjLL6ff8R/BCqat8Tw7MfaavZPTwrPjV3U3CT1BJHjvezTwqDelx8gikUAfd+e9z
-ygiZGd8EJiwRB2e0N1S/yGvLEqLb0F8PdxCr0mksOkn/HEE9QQ+DI1eT4vo3E+ifjMt6uy4a7PfC
-K/vgs1DzoIdwsmITRq2f7CBT2eJbBt9Zj4voWQLEbBaf97dy1FLHllp4SAsqCngqlkRSTNSTqdKr
-3XWQplXmsjSkIXec64monqC/T5hKJ6F5WivTggrSPn6SSr6b50MT+6rzWFhdJ3w6if5jwHAA60VY
-1e23id9g2NvWZoRVWb2EvWFm5R7bG9X9hamQ53HWOKe3X7drOYsf0vlLVQqsXzU/AjH/lBxuq9zS
-U0TZcF1tGoQkIGGDpQcAe8gli301KN8xMUXdg3UE0VKXyALxo2Nm34efi5gvENKnVKlGZGjeUBuZ
-c8oZEcENuPIrDg1Dx8XAAydEmr47HyLDGEeuoH9gWENUzOsLl7S31qExNsnBQi4A67a2+2rsEdLi
-7aIsGzyGiwKTR1DnFFArf/n5UY79yK9UAQGZpsvZMDyf+4QET3Dsv0v2ZSiaGY+mxGwqKHegmsD/
-TP8Q+nvWZdAV3Unq35kidQdqGlh0y6NhQMKlnHM8XjBaTIBO0zi6Gs48KErkoKXzMa1m83ynpA0u
-8zTqVHMavYN08SofjDRKaEjOnmUHrVOx1PRLtUIq5MfsNGul5kE6sfIdUoEL3jxq1jzbEnVZ8cxj
-vnMNNiR164PAuspeHAVHsvPJvatZLhD9HT2NEg4HgEuA0a0Zc/ej+WSO/Qr77lR3iY8iIMnbF1Lu
-+NK2vY/hoSCt4VwTbygiWfPgd+Yy1hXg5KZbwXKaIcQWJiG6E/4BjmY/jJFGFLTWYaiGgo/JMwng
-UddupQF6Qa4apVm8aopD4aicVq8Aa+1GeZRO+7dkXQhZbUU068+p8WLBP/hCf8fMu9DuRSyuwcHc
-gHc6FW3rhmMjRGM3n9PQwBRDK1D4X37oaRx9XoCHw5IVmjGzMA5pe50ACOmB9Dr60Id8s67KZoxu
-yy+czd03yZIrgNSfT5zmY2tfyWg5oO/m1qvSUdPdWoWya7fJduhT27SRerZlXXjU/Ay+YW6998ff
-S0zMt98EuNA2DPCN5ZASBhtl0ySgs6RbjnfQ508yk0gITks/u0Rj9t4cqDeAfL6Ga05uA2iR0rfs
-zBXM+G9OxGGRBKKgpCjvg8c8kCgKvc4/dw3Zpg9Y8NIu4YaDy7d6WvyDwBGn+fa+unwFXkwTnb0V
-CJCUZGW01ymferng6Bah/PIOk58GUuq8DwX9nBWUBq3EsJjiWEt3ydrBXp3sPPnmkj6tI+kq788W
-AqtON7xAs4zcuP+MNgV7EypOPkj3tIWqr5EcbgctvrUARQC2AThridWN2MBxUusd8akxWFJTUHhR
-z/pLLPV4f2kOR9Xdt2NV4pVk4UXjxrirrwHKOX8etEOIInQwoGuOULE+1oinr7Ye6qkuAGuoivtz
-7noRURUUCEXkTg1IZ0wuxvzcshLvY/wJjVpH3Q+Sh2KPwnTZHEtKqm36zbOv9/FS1Jr8AgbaRkaV
-rIApqF16o1cSqaHDK1OsmIsaKxZTxR6Ty7s2pU2OtTMVEp8IINmrdh0uMIQq0uEuutNv6131wKpW
-rzWS+41+Y1MPnOm4mDxOhC6NW6NXmVQO1ThiN21ror0d4JhPuyoO06F1aKjW4nXkTso/J3oCjPzc
-3DXLFs9xwe9688J4HqJyqIoh/VNES1TVE+t81okHLKtiiu0NsI1gWxzUn2TZrx81LUk3C8sCwamR
-FlazrZvL1yU5aOKYdF5XYKRVfhY1gdc47txKNgRz+GxQWaIjwPdmd2dU7CCASgsbVL8R8G2ILiP4
-ossrdFGiYFWi8IhL2Qd8Vn5XFdc0RKwbkxsKlMNuzbqONcRNJSEwsdGNkkb7buYAzA8yoN6mqE3V
-CjXOzn5NBS5liYWen2tUMdzQILP0/EAFk7UNE6JI0vb0qXAkIvFZ0pKnaFalEe/VJPVaK9A8ebun
-+9cFJP8Jv1ZIxQIV8F1ycSX3+Vzg1O2zRhCvxEkXR+mntkalAgsk6nHdkZYkey1fsNdk/L+5pyG9
-0HoKe16dijVbdPbPoKqVFWNF1oG4S+VsRrX7vIwR5JqqEmEvTnmivd1mE2OvebS/r//tMaYbGg58
-7Z9EynWsC2XVx56aW4a1nEwrl+uNnqDxH8wmGIIK0LrZOWkPnrBXuqDCO7s+8y49LuZCt98NlKq4
-HbbsRryeLjfSUun8YerhKnNoP03cRIyyYL9XRhawTE3F0BFJMas08MhFRJxjW32/SlFY4EGNzSmK
-GX3QZczWbA6HnQVMNx5VbixyCZU8S1jTUcREIFJVD2NrnoSQvtItiZhhRG0Fhl9OcQHlisj1beNo
-4QGmk20SqImJpDfuGkvXF71QmE/dzJoca27ZMNOC6T0QdgUzcn9xFsbihzmMgaOfRLrKnIq9vIzc
-oF+gTEkqVDx7S9Im5Z/Hq2xacj74GCf89A5d4bM2KcPi4o5FyhbXNmpFFFFxhbP34w7y/a/rtfy6
-ZRcRLuGjDQlFrxjenw0lFm7R4nsw1N/Ho/ICGZut69CrjazIFc7eKagxju0h6TAEBeDFA9kH4ldR
-zJJI62Vw8MADXgJVbE9aad9IutdtOd3SSs8AExP1q9DkRcrGYky9gb3Whi5NTvMq9tP4uC07zxf3
-mIhuvpA3xtgTSbm0pwMiVW0K6rGObbtLE9e1NxbacdSEUV5E/aINonZp5eCLPZ/s0ZDEhVJA/uh3
-WHJ+3yrAit5DsFHSE4ZUxQwsT8e6VH5HkEPGtBfrUciUHEWl5ThMtThLXKqhs8/I8B7odXF/ImqV
-Sf/+zhJUwOx6x1Htv4J1guWFtrBrgI13ElUHW/dhUPmbYitCKYewwtXvKtD7mmG+nnfnq+1NqeDi
-LrUH6n2B4cpI+PNQ0XfvsPpyOws3QUf0zLNfW6BDmygMtNAhKltzQH6qpj9XI6DYizG5igPZRhtx
-p2T4y9KYQrKYgkNjS5lQsgFfi2PK6xFIKTfp+nHuAd93g52b88mTQjI+KU1CtJWXu9kLyZlmE19q
-JRIjxI067jIJ8bgv23xDk0ZFT0WmqqZy8iF9b5G+rtgz6C0F5sYh/Of3PFiDc6GiPs8vKYjnA0OL
-L/HPWHj8e03obR/rjl7Z6/wXlu2+HJKMbkVkYDHlLyLqCARvOE1qGVRkWZqnzbFPfWuvlTchHVw2
-U2I+eOnNSXSuXKQG6SIX7ln0UW4lOolfED1a8g5W16mkCk/dbVqsNh6A6ckyUYHRrYTEkks+R5MV
-6hIcWANmAnRnrMJFuy9WPC0CxiJ67gQgl0e3SGVAd4PFTgISJ+8ut5wrw+vPp65q4nuXC0dAyXiA
-55FGpsmlXYrUdF5TQUhdTtvlV6g2dndzs4Zhbxnv1NRUIMSugQ+2PvJa9YNGrdxMVFSAEKNSdT2F
-YTBnPs/tXnFWJJawmjIMD9/nI8cAJsvJchK1wcFkO4ZBzh8A0pMvDL2k/tKxhG/CZTwoYWexouYN
-90eLkdPXKKwOiajblKKhvqbDh02tTjpPWvHUoGQLqpj3Bx60R5FUp9SsJ+ujo8c1US7beWTLP0Y4
-uMNUUQapt0/JLPvOV+KORA5zkMk9xtkOVVXWzpqxYG8u/FMc78YZtwflzuRd/w/zTsyF1ZBH9MGp
-JdcOVM1cCPB5wBqDmkX+JvYP6dVQBCZLu+9pAEs3SIDrWTA8EkKKdKLlLbOHPQJVP8UGrED0S4JF
-8SQ+i7xO2Zhu776exVBiga9n3ghxlkklknOmf7+wlNxLOvmemESVKBhTKEQujElIT+Huf+vFGiMk
-Y2Q+L34lRk9OIZnb/pSfSrpE47Le+2tULEe4UgngFr/Gd2LuQL4E4jWQshHdel3uhx2W/MQ+yChu
-XK1h6ZqMxC7dYaBJr+SGvcMYw1x+rA8vnjaTXXM6etiR4XUH76IOALZC78+0dwup3fOnu0nBiQaP
-FE5BQ61aFYelf/fujtnlXp6unUON9QNrrSv3tgz4nvYGvmUrNX5IyyOJj55zFNwfL/mbin4cNSZf
-f12GDTpf83wWInFAiJI/KJGhJjLGvdoVcymdGvGBhA7DvzLha1Nde9eehWZvPPc0gnZ1+7yXNg0b
-7NBgO3dBxY3Zgk9PcIlE+wT1XOgZi88hNDt6tJeTVlRmyQMgBoAVwqUBeihfXzxUgI6arKMTVUJX
-ZLaPb6avpcpVCmkyN26wavAF3prrTaPBwKM+Tdr7WAbwHWW1LkWRAXv62bLeMHfGhcf8Y9E4IQYd
-i6lmOKB4BUvyvJSMepDdt4xVMwfsZLKkDNWEH0ATocZ7Xbfbh0MaljdMB67GEoAfX2pvkw3QhliL
-GRFCLrzQ9O0ZDQ00uJBPN6lXbnNeztyAjoIo2C8PfaZ9lLCDcp0fncDpVp19U1gwWPp8YKKLBCvl
-CsmrmtfeOpbqdC7PngKjfT63nVOGHM/6hOJpTO4F9WjAiz3zyC5OFcX+PKrb1ZR/hUs6Wz1qdbxJ
-5rM4uv84nR1Zf6CkdPGMbqDxBUHzxtU6JuBgVqX95kPc6lhl2eOBzS/gqr0ilSyHGnUaI/hk3aXG
-4xPaqVlAUPXQQM4qwOPKqQ8EUzbMtmwCvHjNcC+6U2Lyu8IWm/5LiweM1QwV/zfPmlcSsA8QxaDO
-Mg0tUnSC5Y8TDv1Q97i4You/r2TjlB2GES1wHCGYh7kzkt3vNCsVNFUzS5PRs8b8Uuv/QD1eMADS
-vMC300I+7H0vyx7oIvvrPHvNPkoGhxvbfQCLT8RBh22WHWWvvN0GIXGErvQFxOCpY305BRJIt5jz
-DEzptZvCNkV/4hKoiZp/FwTpY8nK4PolM0jb4bXBSHN0Oc/zwriPiIHPtKvXDd50Phn2GuvTR4+3
-spML+t5t9+cn1uxPvI4dM/1embTVJsMKWThB+Zq9DOKahgZzAXgQz9zqlGM680Vm7fpjN46/XhEv
-aZaEz1IzgRW01UR9X/1f5L2E/wCFnsqkQf1jCnFl2rEuuCmzNjn8Xwi1FNgD2bRWVgEB0hK3UIoK
-l+oSuEA/GFANvjEVL2g6zm69Ahcef9oLGUE1gJXG4L+xg6pB+8nb+6BF21quVPzn0rvFqfYTZQe5
-e7EmDuMAr9dQJrQMtZbWl/aYv6GocJjFLtnlUJVwym8IXaW84k9Od7zF1DV7aPUkpeKKRa+p14mo
-wJmT5bdJmy3itzjEToHzQb6Qte6w2YdV9nI3sQTXML84b+qXwYnWjwOH7/qW7TSXx/DSal8AC7bG
-guLlAm7BF0pi9IMsoRgrBLc1J1TpfWWrEwmdyZCoR1nKUWOHuRcsTCAeEMLwQEKAora7zUUDUrRE
-2R1a6WyRx4ZeXa6b8NdUmdqasjvTHuJrnj0XQIxRH4J5jDicl5iaBy1jGOl2Quam6sUvGiQhuDC+
-gYKcCJOKtzWAjntmBXIGg/WwHDbLnPxX7KyD+nHfbJs5MyckPpOroB43uPpaPfptIA/Jjy+QfFmo
-mWNcAAdNFO10ozk1RRV1xv8bsAHPvdTaq8W49A3zpeHp1+sElNrmKbO0oyfJ+cCKreA69LBkFc4A
-DqL1nbBmSiKnwDjDAGNps2ojVmImbd8v0/Qg3gHnaVVbSC3Fot2JpwUCa068W0rBB0EfdILLQogD
-1KA1y5lU7dwCgKWrhT+zeeD0PXylxpqX0FoyM0vEBjWQyEgv9I5FRcT9ZkYYCGgQGTny5eFNfeqf
-bIfITPrslrzpE39kD/d2dQnuDRM4JZY93TmFRdc7+JK5okKILadIOrEkm23lnf2Naq5RHNvNWcHa
-eOyb+HQYcqbDVcl9EGy3CJhyk5sTpxtWGspFFako1aUbS4jRfOiHJZY2l6d06pSvLIlo7R9gpxY8
-tfH81Ffwon4BjFpxG3VtXsQ6pWA7U0T/HzaAxXK9HWq5NgaNrDFSxBAuP4ZqOT/EPnBE5KuXRSGq
-I3trvnxlHcLR0g/EulONIP4MhJXPrzy9kaWJcjHdgpzN5ujr/NRw5dPQFjqOS54mvWCRP/qIn8dO
-BCclderwgqFsUW2julgmQ6DVP2z9iAjrqQDpdlyXS0ZTqWtcFr/+WwUVBse2jfUat7wofz1098q6
-HhM0DpXnh0JaAb0SUkSMjzRrurdt7wXX9iniGjyl0UIHt49pHDPpof21h1Io/WtrjSqQddEwU0MW
-nMhA5cCOOds46r9tRv7N6E5OvvN/gace3JY8s/opyP9yZx1COhSSTrwhubnmCtA+CP7tQ+U+3wsA
-3yWV1exHZJjzsGrPOPuoDfsVyNSZcQE2NzjuTLUAe2NsL0rEekXT1n9fmRVZCaI1R1RriIfVIoRq
-eys++2lQpmI+4DNdyhjxAButsQl1yVTde3OCLuaJa3w+6xdBPmLQk85lHrve1Wcti4A8i/ESbyaZ
-iBf//T1Dvq89sSNI6mTV8QBeTSZArGHX0bsmexZRFXPNQwsVtx6JLeXJEOUY28ETriaLg/pXWfjO
-t6rQdDLqm1yZ+GOR5BvwP7ysdbf694V3CIY9vl7tsd6QHvrSHmpTJdzUjqUI5mVU+4WD730qBeRt
-taLLjTjGGjAZwj2WhdApZIIpZhXs8kiK8wGSeN/Mi6a74oLc313cPoqgeSChbT+lBXCcv1PkSrGb
-klY4nbd0lL0tWrLqTMzgn3oisJTDWpEIB6ZoqExHB11azXuPy7GaDD3yR/EwENnVUq0Xpu5HuWqB
-Ef/AgeW58so0PfW0wpn75XJBcqkxrtu22Oxfwzxocu9Wkv/CbSc8jINExc7Kt2SP1PKwHzXyiopw
-q2WxnrBDwbnvzq1MyWdwL2QddjADtIuZOUN7/DO0N/KG8mx31r0ZL6XRc7vXPRoSNwqmfF9ww2c/
-OckyAuMOaeYHH40f7jflzd4vizo8yJsI/5oztRpTb1L9dQS4aRSgSYTviZxsnbRk0ClgF1ZHw2kB
-T5R3LnNU4WUPs4bxJh+DBy0dTfy6myTDtdKXKRsWGzsTb3wl2jiKU5ce6GckM29xQLX5oDVMKVNB
-UEB+fE7HYdDuiXQgHhsW7DbIdC4qTjyU+z4E+19jWhKbpwC3Q13sHBoHo/P/A113O3cfg+Td2Nhi
-gF2hejzWuhmr/1R76tSQOBIioMX1NUae4/aQ5mMJJbZ3VXU2kC0LYDHpRxzYygwgeKM1Co/suTBZ
-5GzCOwPLGp8yyyUlfY0xdT1lov9+DTOVEewwplVw/7XjxbXYi1U6jUN6RftRqnncvAl7Y9L0zrE3
-gU1TLKwsbEn60F5Wn1R/7l7W4lTLgjGwZ7DM3ufg3uT+VJwg2m04VFt5JmAkprAEyqS2s8Osdt4u
-mMIoVfEPK25xPOKjIxZPfXgVHiLtXlNvUgaD7hMxSilHmJB2mheVrbBF46q6+k30yxgWxRW10gHR
-51i7If688mGUzvoVsnb10Y7DErINb9wTSc6RRBta5B+WuZrrpisgb4bSgKe7gAodY6F8Re5ep3zd
-r0AaUuMhN7wdVD5kSRwZp4mLbpFc/Lc2wkZqzvEVwU4mH2XMU12xrLyoutb2PjHTTHGsVn5TRIa1
-a8SVxhn0Rbdpz8cZ6UB365SixTwy7/d5Ef2EUvgMTCS7j8Tt8OyqoAqC6aZCNha5pdH63MyXi/xO
-WuObRNCqTyWsOo5VFTquqsZqpSfjpM+jM/nhu1fJU+2Y6JpHWO8P264velwK5Any5lSCG0j6lZyE
-q+42iGx3PTGHcgjAapqgQOWg+ixSM9bqWMqW/6hX5C+aeL1JWRIyDliW49Hyl8O4KH9cBT6Xa4lT
-nJhvZJl5bB0ZFiYKWJcGwSCjp7D4usWR+AbjTBVb3TD2P1nXjOpoS3I0oRysjw0bN7LsLsKA/C0y
-moPrA/wWUZiO5GDecJzUD0wKbBNHRD4Yn34vLlQwH3S7WECXwlXb6OMdNDtiH1UAtq6qBKPAMh01
-CPE2kYdgz6qc44hdPnxuiKFd+Pv7ktkhx/CPn5SNHeSOZG7o8riA92RuIpd2qy/XpEbJ4scnZARy
-G4fTniIFqSvgLuRquo31ZREzSPtKI8Ut8EFIwQCuR/+8Z7wzcHHdZXuj/jIzJ+66IuXJbqFHSC+U
-BzV5Dx5+6+HYrRiVkxAVx0KUJXfw9X+ArRAV0mJw5Msrrerq8TunXMlOcEOySCPErHPAoCJVHC5J
-L0jTDVOyucYLYOmtxHxik7AgmZw3l9bUwtTqm3Ur81va01VyyPQpDojU2Xa8XPZs/fg23Nu7MTDU
-Wpumxw72KjKOPioJPUD4OvodBbj+YLEDo+U9fCOOHkL4Ok/J4Nw6okLozw/AdGxNS0L8PKYUH94p
-DODvsyF/GAu5YHErxUdcvT7Um4U4PW6LJWNBMsuMUg9dq/Hpczfpets1QLQdUmoD9c6ycgew+fzX
-V+spWrdta/sCw86/ws1ab+fDYfhJXFVRH9Z6vl583uuCevzW5XQLhsmivsA3mlADyHV6/GvznHD2
-BddGZNbte762nNp9RBXQMv2D1PFfeBp3vhb67h4XRf9ndVRb87lwxhb6qfi2xBz0K0A5KI2PlQ/h
-bVrTnvw3kpjzJPVii63tVAO1PGebXVTte4+HAlpH7ZRc5Y3+9GEqunQJR66t0fdeAndlRCGghEUZ
-vWxbUikjIXUEK7lPJ5DF1VIVFM+jUo3L6TmcgYKNIsROJ4uAULei4iYUinFKsUWHfGo3EthG6dKI
-+L+yHlieGZ+JLUbVpbdZIpyS4j2exgwvAjYpuqLIa+inB5gR31nZjkpeQrghp/7gs/EewE9FAnGq
-urx2NNCWlXd8ol0ZvPRQhAARXzgOUYwDUWhztfjIMBPDLPL5Y48m2vlCu/esN0YEBZrLuEMoaz16
-N0KNC5ILhG11vlZ3XkjXZoLWHtJF7vnltRlcp6bky3f4D7LYSDemDTYmvq6aH9Atg0bowCHDkJpF
-h+N6ylKnAl1i+erWlco0vZqPFFCGRbo/heY6LpH73rLQvgt9t/FtTn5M9hMMVp13niwMKiHD3pQn
-v/Dyjd1jVW4uaAudq7thIGRNB5LDdPu0mzyYjDgyRkV/t5asF+TE8juoWnb++/SEcbQ4FdlP4XpI
-IYwwH+BX2AgaY/bJJldiEX47H8Ii1CEXeXYICpAlDQ1Jbb+vVyDMFmvC70csIaalrZNRd63SWFbp
-OJ9bbYaLsuAspkRp0dg15HkkWALDcES+5+Rvls+u8d4cUlDOBNbiStIxzMheIUdGQtx/RpGBaxR+
-rS+yabmXJclQv2/PW/HXpmhrb9QUGwQ/jakFr06fHl9Nh/gC42qoCyD6krYf+n4PPZT9HnGczrH2
-VuNsJNfr9JQ437f9not/cFjNpH/CENAlL6V+UVikBG+3eFzTBCjQiVkeWifk3x07eZyDcM2bUW5Z
-VGzdMdAHEQWIrkf1q5QBh4vO8AAZrc4ZvRPwp3OvBBHgnZLfA6qA0n10y9FLCgEzZoQqN3IlWNB8
-fFobCNw0Z8/hdVzNX62W7njM8k3E+IZbTKd8qTcoW8UEEmjjm2IPpwvf+b5iYYO8fOrObrbu0mpx
-WJRnuj/rqBJSLmf939uQMdvm1qI/7mfZ3GLHyS4jv0zxYzbC+vU9+7itkwpIGBZ+h9QP78hjswic
-nmrl1KOWoxpoMZy0/f0u+hfX0cYhGTiyKqdFVDXOwIDxCbYjtd/16uQoqCrzU1cXw3ruMBmKAj9z
-NGrdWDGZEsbiwtkiSdCHsC8YvpYC8a5TOVORFdvLC5NCZACAl3Y35TUDKMApL6OQZ36c4Kby15iz
-Fh760SKKrFnqGVguoKw7rN4SfoRO//uznRjxe7njHEgnxj/p2IGtVjUdhLShG4h62dPJUvK+OFeT
-0v+2/OzZNSOrrRbBfqaZtBeE4Z1NPVDUtDJpHUgUtO2ZyNA+V1xShaX/xUMIGIGVcYVvMXA1642A
-Xzx4aChi+0sfAt11XKkWUEY/oQqOZb0QQ/TLe9a8vpAzvWMuMkozZ2kt8itvzoixo+e+ADbqLnc3
-4ZDlNAt8ANRTYAxSVUnp3cBbyd0Jz/qceC9aLjuoxmfygHhs+TiqXheRJE6iXQ38+7JFiY4EP/K2
-n7/SJvE9QKwlPUNoQqjwN6677H6I1Rw16u4Z4HpjyxS2LlBMPI2/RqTEE5f6vL8oIqSyT9wdQmKw
-4H82S+NeWKZhwZNezWYTVUNV85SpoObonjW1RMNade+uI4l3QacYDgrFbiIpEDzdJpbrNG7oVdOB
-3RtpCdionAMJkm06QmunmMR9Z8uZKwxS/VNLpP6Oa/7Ntikkm9988smKfFaPkn7CYIhjAbKrOxt4
-uvx+uiD24IdF5OwJuwqTyy2DcOgG4IRIGB332bD0BWEQGYH/hQT2++XYKIhuhT1bN6fcHs/TU2p6
-UaH5t+ec95DTtDp3djD9EhM+dd6Ib8Dk9fMFn2cW7tPqOIzccjm2IcOyQtcuWyCGV9loQgeD6QL3
-u62fAzR9wVzxQEIuuStV6z1Ysq83eXDqNvlz20GMNuPeF+FMTvK6Uyhlbvxo5U3HMvAHojTXiRhy
-OtVshLsZePlQadE0QFBCG8P0x2O8chaTWVnS6gh1gDZKW9hPkjPP9XzMbooisoM/IHau74Z92+gi
-1gMfaBCERJGV6nzPxdxPBHgYy+kgeSFKZem2mcWGlO/J6rR4YdnRuMBcSTk+K/HlR9BM/aM/dQa9
-ye+8XYAXrNYq5G6uUR4VV5AS/DWRWDL92yU8LIVf1TpePbIocmbFeAGysCvF65wTJyOoqwIdxQoP
-3ys711e6Or69Q3N/lAYoxfjoldNHkspXfcCszuAjIN+ZNOZU81ErErVkS691pQ1JPX7lr1bVQHn3
-+JfvWfsho2DwUNc8dib2Vv0oKlq0OXU5EOATIdnJ0K8UQBJbe6pFaHwYKRw03vY7cK9X+GypUbrb
-70xHymOKtOD4hHAlOH5xjEyjKLJXzAB5TzY+POY5t0YdM50MngQ09UWuw4hpRm3L3EQWad/uhehB
-zav79m+VHxDXUnJhyElswti3AeAtqFAlpNVgonJgpskMjxN/vW8Y1zQ72Vy3uMNej/H0zuzzQlD8
-6wo0wY6XL5W2WHTxC53m/WMOBciEbYZ8cPV9EkQljw9qH+fJhLw93dm9csFer8AHi3b2pqlkUJVp
-Dp3JzPWIhXjx6c4JnrftyyNQpdJLDEYBrcOdletPTAEOEy1sznO/9Y9B8Awuh5TefEiWOkpuGbPk
-nF+8iV38EjphEG02teCtZmofdMCh8cI+dDsTuGuLUmaHe6rAtlL5/b1UZRfhYVZn1BHgTqIxHtCA
-gIjB414zuchl66OzousgoIn0GerEf5WnJtPaLLDxRdN76XcTDVAIUzw5JrHjgqkA59MdqNxWvldr
-mFWW/Hu+R3FUaX7Bvxmpry/LGAxfDs/nAyKbt2DDfEXUuqQen76z7MGzKJZ9W25o/3ug/7q/EK3f
-s0A67gQUXPZcsqCHSckPnaT9uhfXg+1hPnwcf9q5i4Y+R48HqrunJ0GQECzglTEm3TrdrIAEpw8O
-0KkMrZts9iG4RQYCejVqVUtiC7CY9g5hbE8hsDElmHalIVqr5qtQopRMl8pIjPk6kOHm73AmWwLv
-lEe/mnzGGAYpaTljDO5C7DCbFlP13DjwiKEA0KRvYAqWNatY3iWxnXBXVr8Jcuo5+YZvOw9sYhVQ
-09+9d+mFmPNKzyT6HYEUMrncWQ34YaPQNJdqbVNYf+6Tkm6y+VWat5ny5np0VkMYg0vfooiPfsPY
-7qBe5XznCMGP4H5HgSD6oPFFeygwQwyyarFwXh7FYsc1AMgJQ6LNG3PsS7JVaz1kPSIyTECsGgRp
-OmiGGwrhbV1JDDFpZ7ZPrY9vYff0o5l/YWosd0tb3tolQn4X+7oEPJvYN3S0aQ6iJnAdiez42GOJ
-8LrBzZYZ3djP+aQcyuISKft9wUEKliY1REdi3guJjz2nV/EIVkdMIuvg7I5AIM5GEoriwa5MiTVx
-l3Rfr9B7RoRzNeykEl8hnOhpBfqsQIWkb7MjF280zn33c7z+yDoTJy4KlTdPi/FqIglIBZdsBPDq
-I93ftH+uxA0VfCOlvc983Cb2F8H5HhVz3L8Z53kIe5DjRv8/8Hk7ROC37LkF8LQHupHzNzjs2XsU
-m30drWQXlL6XOYZI/adjAMdwfNjp6E3y+gvjbGZdr70EanPOVNj2yjQtWeAsZT7hL/szasENzHgd
-I3zMXG+lTniAtg39hx1anAZNWHzvTUJIlEm58OzEY8ZbYTEc6mtimQ7L+vu7D/x+5IMoVkNnFSR6
-kqR7uWP8lKQEhnlrmoVE4KvJgwzUOYfwfbIItdE0F9pbDcLRonb7jyaFFGPwOnFZDKe6hYhTyjav
-AbOmzl7RdF+9GhoaxcYoWteZPBr/W+UN4hapgJA03UIXourndW2wzqvivvVS3BoIsvIkEpGrKak4
-X8u/ms6YGoXLciL4IQn/78o2o089TPRlP4R5m27V3r8F8Vq6mRH8oB6A+2zilPzdUuIzBvC8CeeN
-TQzXdnl8V/0I/s/9p+WtGBQXci/fsuCbQt6xTrb5F6lhTPMy1HPPtBR3IorEzmxNCA9XPBNBe9oR
-Aabbz3gRJilBhD9px9hpTATscsY6iihXkcUL/b5nA2K9eWoXlnAY+ls0op40OJOCFureZDz6L8C7
-q82HRQ2tLs8mSFg53Zk8/LmgNt7bEXZlgyZvV041ovJBp9nYEBdhQwjRfKiQI78BIbo09Sy/gRLS
-RmMhK2JUC6uNU9jAkBB0wJkRzen5zsgupiMGEmsaJRrcVzVHBKK62KklkNHZ0V/XmPvs/vZU9Omp
-MAC79I/yFGJ5WD7gSJYFgwP8S/AxqXF3IzgrjUXVHW4er9yJekCJRVw/mHdj0qRqCWbkjn7PTmh9
-X5/QDaOL2UlxmHzLYqtt1TOy0y45F2JmGywd4Ql4C0L+N1E0jLv2SKLuQD5kdXShglYT+tQG4Qka
-r5/owFimFN1fDwhlz+0SUaUsY2ahjNjdAelJVUYNPT7MiwVSh5+vqrKCx1B2PI8msSZAYaWg6COn
-MK1EgEOgAHyLydlB+U7A0g31sTVqwpM4uHtoR6pxsnphPo41ZrxHD249N88HnbxFsgGVvg/+UQXF
-uQY7MXC9KKo61P+LNlUfJjt284XbmwyZwHenzfgosBmhnNmQ1/P6ZHzgPBxDKrb+NZ5oJcEbmUFN
-XYDYd9UxFpLE1W0X9dhXRJGqkk2Ql/GTnqQnazyctbMv7FE8zO7BQhfOc/qpbTmhFNnn5P76Scsx
-MZzgLdALQcVEXYV6URJ2Jh+yC8ucsj9HUJLH1L8ojB5Gxy7lZWJfaEGEiD7/6CsL3o/7iJuLg3XD
-JtiMhYJRRCdoxVgnp0+f8F9tVn3xBu8XLjbAelUzje8nCuD/fyYKaWqyt6xcad6le1lTbUg5ts2Z
-NrBAaeDBvIDuEpgK1JX1mXfTZfSgWxCxrrrZOwzg8wbbFfRPgPOz8awPadejegN1EWDtvnn+Z+2E
-2ys3sEtUEnMG8G0uVbNP6C8PivJdhFMtL76/5JWRWahGssqj4MLIIg0MQBYJjiJqjtF3IVBpy5O6
-pGT5BrwNmSv9P6GTIAZvKCCD2R7nTxqFg/O4LMLrHj15GdqJxj3UtJNSvHw7uE5xWd6Gk8k+wzaf
-S4AVX1rgMBGW4EqwZzM9vLdZ9uLtrYciZ7sD1NHs45KGobt2ohJagZnPSF6IMhrzglic7XBDwgFZ
-Te2FvvIUsStjhrltK6hSIQebiJgCvnboYz72U1N3tMLxUwnCUfJNYHoOuxe0XvuoaZU+XDeXHNCr
-v+joXN020ZxcSMcS7+42Pcr0TE+jxzRAf7So6Awc8CAVQqGwMJVkZdB/JOCoQ9RzQGto3JTTUTTQ
-4ktWYV19nCBcYrKb9lJ1eItENR/nHR9es3XGITxBMYsbwVT6k5vmoKw9V4jDvbL1zwiyB4HJfc1d
-+2+OQAUKw7crkhpONSQLdNKupe+IGoColV2pZ35eaLHzZNHqXvEQoWKK7abV3+7aroXHKkTg7l8b
-CMJnH0rEmo3d9boUZD3CvOQsRP5YxNpK2uUD0AboSuPnAYERwQVAhMb+0y8QzbVoIDoLhA1AWaO1
-Un3M6vitET7dX33ZzDD2EhyE1Pulps+4prhwMrBEZUZpNe1otsWgXn1lCS/Iq+bWjMUijiKhkc51
-XZoY+CHL2DnvesO4Q2CbyVOaTqfTXdTDcALCFzEKK7GgVsxUS2695cmdTr0Obr2JXheEtVXlRGBQ
-05kb+7SHV91s/XnUr3bOq69HfhiUbIDf61sDG8ZnphkVshaN5fcDXUo8TSShLor4k5hlgA8NUKF9
-BVExi9lOQ4HE4GDtOTwJITUOZf+LuFkWdvri79zx+Jw6jfjHZwRsh1ozv285cT5QZfLtmXi/x1/p
-E8tZxCkCivEEXsYM294EHNrtJpwIdCXsVGdV7uXmGX+TRF99AJN7fPZtrObuM1uyshKDniGcdqax
-8n401U6BNqj1hbUZpqVBKGiEnurq6lsJaaigJ9Rf6mKMlaQGBOxDmvOoPSFlU2u23nlVHE8V8woc
-QadGuH4O3mISnuya5WixEAaOgFLBpzAOFgAtFsZOvcsWqpZyLHTANbHWY7UCY06jDmBEjeQFL8ct
-zEkBEmvd+nCoq0+8xyRCZc9wV+VPpVIXrbWTT2bSpDfK/Ay/DwQ+qPDFlxwnui7D+qRw/JsB1gl6
-eO6ENFxza4w/Ewtf1d/zzS+EQURJvIZpMGV/GbYOCc5j8fqeXOT6dtrb52viD3pbwIsHc50mB3JR
-J+4AJFoZb9BpZLdIrofV3Q5rzwhK1dxcK8anVImGGruUJ9sC0Cz3iUgFO0G7GIH6lthYe8XE6Awj
-CHq8fj2t/VsFdXXGisYRCN8f/nIgGAME3tpOyf3e6MX2jO0E2sioJVdqljZOG28t75U2R8eHhtUu
-dmLT+IWkxUaDdwspC5riIAUksvAdmnysaaU5tqqOovH8HrmW8Jx84sktKMeW+S3+xhWf+t6vNxWy
-qm0QJptgyoLxqbbZYPh1Gt/n1yjXaSg7HEewACE1LbwoQj6fCS8uGWtCUCLbNt9Z7Sgyn5mj0Y94
-tmcTSxuuxlfPwylDXvVLa8XVHHbSo6aCr7KdVqqbt566QR8FMKtl/QasLwie6I5Y601yIWnGvs15
-AuAW6ai1GrIePs2bX9uTBayFZDuHkgo+1K9hILWffhupva+nCKo8zLCYiy/n8b//Y8ohhuoOjkdG
-oIuKP8TUg66/7G0cvHg0Ciy1OA58VGAoEZOEu3tDUQb6h7ujTDpcg+Q+mNRsU+ZXOEbVPDCLqDV0
-dl2uSihmx+I+0uR/VPwUwdr5C6JYnwsglz1fjaBBI057Yedup1lhotQGoAiI3WuLGZTgF/LihA/y
-HyIDJxvg2+PBkdk/0nLrvagUqOQovFgbGrDGdk5D0b1AfuDELaRvwMGhzcbOqzfSnPfWT5+IEKNJ
-n2XrCo3BvS6JiIM2XtaG4/eDzNJfk2brB7qcOv7VbWEXNA0gmPpkjupp8AsMdDfPjo33d8/qgaAo
-DGjIlPU7/YF8mf8dgJ0EteEPgF6N+xh0FNUy5wtRj/9Wvl55Mm/N2CZ7lYz0cUsLGoiKE/MF7ILc
-eKl/0cEAEyq7abS2iimGav+PS83GfmxNVrepR24oCCsE1NtHB78rUX2cR3fIU7y1wmpCSovJdDPv
-2d5yUmketUbUR41u+NGUfTTWc6H19Gx7g/2KIIExqOk0bMeH8Str+sKeRyfb0mNxRtS1ChZP5BlX
-t500WIHIx21KRo118G3gLiut2uCTeDt281HS7e5zUL3USjIBxQ6e6Xpp4Utr4V2Am/hnOAl4qqde
-9VPsORY7NDqe+3GG46ywBofq2KvDR2qt0Wn3Ifz7EIhSwTYMFsni1wRwaSgVLbJw4ZkILF2/Cmm+
-0hpK6xy3Un2vsgSp+UZUJ4XQ9e71GRaz7+2wZpwOzvABWjxWv7zJcD6uypTFXrITxMnrZwUh7NDK
-+gROCCzM+7D6+zAUW/dQxE0vwHxAp+fXpmbfdUJfmAjhe67UVbPtoc0Wqz0vzma+jnTs+3KF9+/6
-DOzF/qTzlg8VkWVb0/3ZrpsVOcLIPZqacQ4GXhbZS3h08KygM6c7OAVdoic8VMofGWJ1rMB3M4vj
-Dgask9hnCDTY4fwiTM7CNWWRTbDhKl9itUsMOvREAFxlvwp11XXTzf3btYn2f9cJFNkTq1gJlZTq
-tdxevWELwfy/tQRL2QX0/0K8TzlSmBHbdXv2HtVawwlh6D9kvx2H8eKdd1/tL5WUUlcUeOW2Q2yP
-BDeKJF1VsW4lfRoPBfMOsB2tzjeW/9C6gk9uuwOWG8rm7XyNrx8NtoQgXMjogzdh7HnSQIXC3kGQ
-tqdLXZ0PNqESl4dBAV/21WndKC/k+jzZRtbM8Hm0A1pfkgezEIDD0DbicKteSylcmj9bPPcHLQ/Y
-eO5ckFeVYT/FRZhob0jMhPyQPJogOoGpHNE8u2QIg8lvV6RS8qKGPCKl9xRE9kbQ9SoFusyV5wUC
-nX/gmZsi0OmP1J9BK70FpONX5vTuusM+sdJS+nkkI/RsWoGyp1COur4E1UGzLS+pQQWlm2iGpSjv
-JTN1H/ffP9YpycpXwcrH3PUagS1ZUnJvJ3O6vLIPoloQYMLWmvg9ztLh1bwioi4oeWkyDrf//jUS
-YtSI89ZoaBguKWrDJdS6GfBanV5OmRpZYbA0XKEpWwIWpp8mRVRPKvnB+qWXWMKXuQxvVBEuhmQx
-RjpUJr3QVvw9RZjrnij1zR8B9ZPcuIahP/PfscjS8nMM5rP1co9+L3c/Y83Er2LLis+SsiCSyvQv
-J80c8o2jkq3QdsVeeOpBqyQxJ8EC4Syfcwjphtqb5l+Y4Q942vj6Pzf4RFK28HxpxWk2ZjQaKLbm
-zgImu8Re2eL5V5KFPSr+vZ3/Ppl7iAXn83GnxuTqWKPGHpoXTLvB1DU6TNrUmG0g772Ee+VwuW1x
-ky11ICbz17w1Ew7RBIMYeG7tophHpgik5nA7a9//WRR1xeLgO7r9evAlRvMSLJrj3KEnXoACLnLf
-hUbuR3FgzfI/3pVCNdLXlb/Q5pg60eP5tzwDy7N38qzsFfMZVvPpsIEiy4yurTSeHaOucKik2PEX
-7oICiMm9nG4NYEoWFjqskNIrO4dij2eD6SaAqxLx2mj7VXY21RtWjn20eA/ydUyR7nsY0t/ZyLao
-FJ7oS+xg3MT+bZ/+/gb2FqZY1+pXEoMeILgbpFcW0/rg1t3mY4vrXw4BD+wTRmPVU8ucxyKS61pC
-SDWF1wrSc8hAmse8kD+7QDEs+v78KiZg4IOiPq79DemffXxUDRkE3k04u+Ov3FXaQAiAgzs1ofJV
-RphYJ8HklZ/OsNZiv1yoQdf3IKFcQ95yuRD8iH6Mhrh/P1GPgjE8xRu52XvDzRGcCAwnz5yf29oJ
-sYTsqpMXLPWVgIwYyAIN0m87hfrnrUnsMba2g2j8wR+aDrJe7K0ypSJQmw+t1I2DcEuNXHmkSgyd
-IYyUNTSrQW2SLBJzLUTByECdUNghy2Q1a3/PG+TvFd40rGWvo62qKimO9LPKfGN/1vhjOdunl1w/
-03s0x3iI0EmZtCzXrwUdTQvd+YRY7QaP6Pakki5xnF5mD2BIiLrWI06iwnYmhntoNHpZq+ojZLQ4
-h0w2xH7oNbCsOcWyJtGb0/NLxLyXOhZsvdGRhOr8PRWZQ69A6xa/xN1dJtbrZErM+IEsSgZPHnzD
-XqBw5JjBSL1VoAuxU7F7k4eTSQlQQZCuao1fhdmAAa0YpEzEXhdzWEMjkWU7FTu8KCsrfy0tiq1g
-Xs7koZOPs8dWNbRra682ggQrdBu9J3psDheXBME3wG7WQmkAIFtHpXTDG89bakzcPg12HKw7GcMg
-wEDX4NcvkRdcCt/Te/zCQtY8DZ3tl2FY2jbgsWf5/UY9fy/ye9Ml7Mqw7E1VuQhxerbRgNht+XU4
-Hhw22bwZ0vg24rKS1uCmhUQzt7F8lhhB1Ieo+zzFXbaXf177179V8er1YqlVhY06sEZqRAcPU8DY
-4xUwps7oR+i/9QgWrxiEHgzfNWxCXIHNrpi790ydkA4XhnPifSAIOUW+lGMNAZdutJmeeOlEwjmj
-q4h50yP0YXHmGDa/6t/yaM45i8+yg6mtMHHpTr4mzHiIp68gdcjQ5MB5po4n8zpgM4wv2JOHZAra
-C+Xf0mxDBHeHp0Y2p8TWy5X1PK0gsIee1/THJkjdjXE0JB8YzkAmu3ZE7wsuquR90w1QXRkUuFJ+
-j+3Dlm0fzZpz5iySgyAgAUcN+aNkK6mIZtG2IomrFNqcJoCCXNRyNGansswEifnNBr7yk4nb4jLk
-ZVxHcocbp3YvOLw36vUtw7A39T6aVQwP03gjBqHeGr7CvYHjwv32RF7GOVlAitCqHg18jqPXazgR
-hXTuEUD+AWAJlI6O2cUyQPt7GUSvjdHYQiMP/Te4Ps0733Dc9yUypS4J2GtonEc2bDQ58uBCnXsp
-rzBOZFyw8ePLVDnO8bXl6Isse0bu2STkPLJgkxLZLvhIIQO8/kOE19ljFPTRg/kZTyw9FQSegwXw
-fERNrGfSGkwxSMVfhPkKIzKebRJVQ+PbTqT8mz7216FHDFjxHEhP9HUJKcP+zrHpL/26UUUlWVJc
-XyURmTLoaKoAeBW18XqYh3tklL7te4GH4Uk4IkVnOfO7pxSOq6WZfzug+mftiWA516VujBsDl7CG
-nldwVp4vOtyg44Z8IrNvlLcdt+59uuPRfkpZeNbLGXFv5KzgWzNk5lPLZSt15yAWWh4879dQGLl6
-/rKx9mQnKzpzW6JW2dxg5tAQS7/LLKvLPYuiUkPHcq071Gxe+Kd5wjRwgfW0Kn/W8CxfhyZGqPzj
-O9BCdXC5qjJaSveoC93SzkYvt1XI86S+Nuycfo8IzLor1CIosyEZlQMCdOjdHJa3KXDAn9FHmVD8
-8mhE0PSwDoEEGkGzkF3RCvBqolHnptv6BuAucrz49vEsJRA9ad7rPHliHLb0sGzWQ2YxbcVOw5Mk
-3wzXoCJlcdUH3+2qp5JlAqjR56LgXbk/648vn/Ds+rp0ZL5Z/1YHonT9buFUUL/r8KIBu3m6WII9
-BRcEcbISF/IVaSrGUSaXTo7IzF8IjJm5JBZkvUTb6RFx2yblH5vDDMLgCtBWKoRpRhD8XysvegBX
-f/U2odwglkDif0p/ROiyeKolZHM9qZg8p1fzrM2GyQ7kZKSU9d72dKJ2nV30oXKlMvFx3eXDFj7t
-2hBRslP0mBVwC0HKXhmOAhL2Tr51vf5mm+yvD/trpFiIA5caiCr4FH/spk2YWk7uMAj54LJZPLXG
-FmzJI9sIpw4daOMq4jzc51XIKiJvi1lJdam1v2CyW/0ttILyrVGk9PgzdUbYc7gDB+5eFWTUfQwH
-HWWvV3NB3rQVHxCpnf+AArE/4d8adzjdFCN9AhzaJ+zB2LjmL/jhKuebjJ/COkWIreeIFiEacP0E
-pEQMz0kBztQr3mKN7U46ujWbwcwwasM4ndjKDx5l0cHLv5oO+lgNTXHh4aCw6+mAAEBkPTTSLaRa
-O5nBnAV7GkXLpkw7WxkgqE/gh28JL2I2bS/PCRyccnNlgTg1dLYXWABYGeHvldVTxaNYhvwLQaK2
-Np8zQfOXRgN4yF3ac7K2KXVu1l8xlG6L3fBcg4yqNyS8MivYIwXp+ORnEWrb24bpoT8F8K1x85L+
-n7LHTcV3XFGeaVyDwfBCcWYvV1prypEnGY8nPpYJ634N+rmr00IeciI+/gMGwrOK9rsW8RxOA8rG
-yy65IVxp+7lih2qJZuVgwzDEpXlVZd3D8S1iMGq4uOnfrBiMUI8H+SdoubUJ6seBjMCP4fJLiqhJ
-7o354Nvnth6pImq0MkvB2hukHa6utZmJ4ur02+su8W9d8Ux3JmG9FnP+Ip1aN7cKFFpjPlxgDi41
-Bxo638f+Ene+/U7a2stV5cHmBRrFVJ6YsHa1go+5SrlaAmksusf6ehPSmtFuA4NqbOSQCIlCiKxI
-umxfB+KTfzkYpglcssUixapMjo9SFyvUD0Q56cRaFN7fm+I+N0Ce4CW0YB3tlDT5fRkGnhyT0k+0
-lmItv6s48npGAENVuvPimzuZ9Lmd0icNVJMZe91bht+mOIGE6vk3K7RviIq5kyrZZAoDprB+wUcb
-FWXTAXL7SS+YPla7Fn1E30w2nnBYQ6wTr1qhadFU7SnrYilzl/grVdCyz64reyAaTtGOBAHyX8XZ
-7jThJdj4cTTlKr6eCsbJJ3ibh9Ch/+IgRwENEQhHpPcXbc4xK5zJayVEiJ8PrmSMUvj/keqaL8q9
-QS66x4VgXPWcSYNoj8dasSf1Y8R0EDFcAo8V+pzu2G4BVp06QU5onyaNbyccs84GRKWHqBNY/ezG
-G1F4FP1wE0zE0ps+8kvg+An35VnWh1L0fJhdbaSU2fpnnhQWre//BzKEf0WEhktjzqs07VZ88fFP
-LhCNZYpbnEEKkNIn1/gMunM268Z3b8Kpc9cCIEaUpn+yGjcZQUu+C6pDux5Suirrdmn69eKFJTZk
-huWfQENEo1bk8APkae6vCxzyX98arWQ2wAdITUG+BgO0aH3yG7rC2lUfe82S6c2I3Lvh4s9VzVse
-+YyZTH2AISwiM8MxZO7gIMvVbEpTAFw88QWlkx7DB1ncwUzAX7T02MhJQKecRhc9oaJfEqFI6Sm+
-cbxKLUeOBG3hz0kuPYi3qiFCX64YSmzG4rOmsxnSPp7MLxCVYUZAebTB4BYf1xMciVe2pdlixHsg
-toom5Qsw92qWUhr9Phvr337nMsUKfpmy8OVAewln5MlCQc2Pt+Lp3Aa0lqS1a+f7oNWk5kFPoFGM
-yky3ELZytq1Dn3zkWtu7QjGwG8zx/ObGediA4w1O0zEzNIaT5jmDNYHh9B1Q3uZgsouOXenrLxTy
-OcKsQSGczJwSHDrBaXKp9pLCDnsbt11rlY9gcco6nf5JVp/e2oQSCVjxJ9LIvyjF+OlpGvPcypq+
-dhzOlWezZG0XcD3WpsE7iPNxZX1hWEv33b/bEjd1F9pIaXTJ0wEKf7IVuKuKfNEusiYmBXH3ObXc
-FnGCZq2Ntzai3LPZDmSrVdDRyfcJ2yGV3EHlBVcHr+qcMwPHRvuGYeZ7Gm+PzHJEwk3vyNnBpIx3
-Mvc+nMVWqX2wn1v/FRTQwJ2vbMasA2h4HOudcgPomkEv4KWQQwVIL4tc+XTuyHB+DXBLjQhnqHnU
-ZlVe+P7zII7eIcsUPE8N/p4F8r62QMg6H634KSX21X9ukVBBqyxQru0PLjWtiQGUmMM5m/QzG1lc
-3RR97XwjI+5wCe7AMTJINbl5ykTb3Dr+A9AcipXKOYhc7eZmyffB0j63/hKNs4cdgAFe7FGvRiQM
-FhUItMKzsgIokg6oRz7SGtYAEk9AsBs4oeJY+U6csgxfJ4EI4RkXcKXMxqNGBoAo9th3LGrgOrnj
-5B5rkbJuZ9MzWiyEvYvXsYkGhUDk5P+Ra/d3n4Q7Mn8HCYvIE40zTvmOiIxUn6aiv6srVn35zuSb
-F7hiAUSAd+J89djVzkH/cJylcfKodAqDBhth7uy51LnK5JZuR78vBsuJTErxpicSEW/1aiIyiZKG
-HQRWH/9VDW+yAvOws6MPf6vtZk4ZGZaVzIzEOnMmYZ/ITHVlQweGKyw9vKt6eMsRx1uIRfH3YraN
-zDR29HPubiJNsvcm+OkAR1/oTXU24ziXQIWe9KhmRgAP28zHCN4UA/QjyfucBxnqwA1Vvr3SnyZI
-89OsBRYx5yLLyKZuVKO0HPnHQBOLqfqqCi/jKYMFgczKLMPBrmsgXyG5zKxTzfR1I6PO+whZ0ZdT
-HR0diK96rZjjWOwk8Kc9eVjSB/PPoUgPWknEIiaGk4cECyZ++k34p+7W2MweQOHrnwI354Y/stao
-zqfUT1yLT4yuu//WVbzpjgKVP+Rk+hd8sppS4zAm0KeLIUk2N7oni9ieMnWxwuhyia9BEZHlDy+/
-ofbZImwrkUWqgaioSS96gpydUQ4k39wBFD3FwIyIL8PtbOOU/NoqERVwBhTzuNvPguxmsej9J7pD
-LsCEAyKeEndXmdskxdhg4zXKsacrxSxeoUdecs4DEyCaki++ZgG6G1E06ML96QGt5McUOF0MIoUp
-MOsrISqhDDsvMGRyJB+u2PbiNi48Y1T22DIysg0DkfSw4QA4FpfKxVgJPwwLh17Ce2U2ZTHg6/wV
-ZDN3Gn6GG7qj1heQpJu6LN5NXK9oKbO4WC9666kGObhFhC8E5Jv63HJ4cVxo6O6loJR2e8NZRTNK
-R7aywPG/ivd24MCS365X4eFYt0Z8Ez7AA/UzKw9cb8PTzWIf2/HWVP9QujA0vE0YPGgOaLqHPrY+
-lU6YD/6HIEwrijyxg+kz6zzNpTcQ9WL55/NZjTeoNgkrdJVRJuPy+Ste61cY10ugW94nO9WpaJyV
-ZG+mRVf6Y6pgPBBEBAYMX6WQJRDjNI0C6T5WEVNovtyOTpNu+VH6v/Q5UlCGYBvriUxjQSBwh+jv
-HIZ4hWMVwxwlSUFyIXlq00lhYBlZNEvr9onp3XqUTZnxCdhHd+YOae7run9JLDxiA9UdpWQUwmhY
-RJqhnQ8HfeWK2cRk5jXC9mbQw4t444ufs3ID+Z7mc8s5vpUrIpWRU4ZGM7QmrR2UWAu+8vDkUWeq
-C3RmjNzpZKujTjuuPuFut+TXNeIy2QraVEofEy72Zp1KNbA9GipJ4tW1UyDnnO4Z5lDnfU9LbtG8
-Wcp7bQ2pImUCBlL15u2EN1/WB9FJ1H3RyXAjl2Mrz1/854ZKQGP8Q3o0qyLEimhBMMNKcEFwcvJM
-jxmdYHxM0xu2h9swEGoA6saIX77jvlE1xoygOcPfFd4bscXlaglaTpQXCSUSan2Hbxe5G85PbehP
-xW7crSs+H6p3/wOzMLiSyzIsHA6mgVkh+rLveCEd13Y95L+2V6zvDEkmtiAm6iBdnWJFKWuR3iGU
-ImSz+7lVy6ImC5bwVrdWsXvxIYoW4k63YoT7OcU6C/BRkJ6wS8k3o4wjoGnuOM0hJ/8v52Y44UNc
-8Jb0FEID63mhFtbCvD9x3PkwAAipv3QtaSEesGXiBiW6a1sXVVWPzo9BcI45d+tMwlx+xy4krdqa
-nQRNXtD8GklzkXcamPBYHcTHTevVpMTMuGIHnYHJsrlvHO7aKGj8DZHTbA0uzTweYZeJbF/oRL/k
-pCnCT3J9DZ4occQC4Osl7uvfhYbIKgFcnYOfEOifQUOIQmS5avKQx385C84XO2dnrjTQuTi9cbDi
-c7/ZoBGmQgxPTcORB588OBxH9+EyMYqPXQ6bfCdHBR0BLe+0KLW7OXXOeDZtCbYlxoZ6zNkGQ4Su
-/5pRbu5acAYb1iUX1PFlZ7ltPJojH4WTzKGDHNGN4J28wEO8OiNpfjmOHv1EixCRb4A3KYPOm7dQ
-jxqRn+3uTvr2ftj8BqzJneIHWcAnhGfzXgHseLq9AbNhKzJOGNtAXt7TXMG8wUz3SLw2bJb5ngKT
-AZTky4u8/TVPhCK+1sEZU+bodBHN/vezaa5Ezq7kLYqwSqgHaS6iULxmgompzAmkiSofkQ6Eb5n9
-W9SJ532kMX7FoKFP6XfqhEOGNoDsluSFhVwGKsIOpOmYZ2i3UtJA+nH8t1106QKULB0L3ITKTDuq
-XSx0FUxayTBhAKZ8u/1rR7UXjAWW2PpQj7wQyAJcd/IxNjHzLgxNuRz2XaT3Qy3rMZmaHD024Fq2
-4zVhzRgi9jB3vB9bakl1DmjWG5zBMmmtMkooAGWcobzzf6Rj9zHf75LyJFpQauaxIGgHLy86mdFW
-6eV4eDXuMOMzGNEnXVRKv415kxcv6kYPk91qjZMXUEVBn5/FITEEro32NrGLB+wqSCJUxb/sCq/c
-Uh7cp8OCezvTUAG1rhAqrkAyu00D/XiYdY52yS5boEAemSh2VykvdLu5Cwe2mF3EZx+4aJPppq6H
-otuJi/9S6SckYANJcPc00e2N1Z2O7+dgJ9KGmdKt+8OkMQ6FbZfTBXxSKc8y7eP/yb3GjlS8Ki/6
-ao2nB3inwP2Te0+DN/X5itfXagwVypv7oZhf6w4V4Hp4UwiV2lRQOnK7s4b4VGiPx48/llp9LUVU
-QOxrCISqOEqRYPQyS9f5tDQtX0q0FTRshYPjE9+9bZbvsmH7VlipaBRpH5aFaC/cjDqk80zAiqbA
-7nYSY7n5xZeyBFOBFnzRjmC5XTvDNP1mjvOxb6mHoFI2foxAtD80103p6d9SNYtJpraa3lTTH3HW
-/8KMNjTwVLQnfhmx6CmFuOhZE+KXa2d5J6p2kszImiurvzgONO4xGHCZlq0vKxUfjiCUnodSM+n1
-NnGbM+fctXWY+Jz+ofjYV3Z1eBDcPBRmI0QwKDtMIUtyH5Uegf/KZYL3ac2FCnGEonRWL5bjEvYN
-3s3Y3stboGSxx7eycNY5CRODlPge4eM5oFQE0zWBhwRlHRF0Y4CHUoHMcLyESZhrkTDJGhFRWKNd
-mCqh9BvMBFZA5VTQO9FQqnYBCILOl2oN/riVjtxanVeOXcC7GDknwY/y3nSGs32tbZTD3bGx4viS
-wFQBSpzZMmBv10RfLg8xqSGWPQxv7iQhaZKPbKc0ZEoD+1w9NILgPX835M3I4H3h0cqontCWqypD
-a1cmINYO4JXweMxCgFvteAN9cgNmc4ssS+5m2AESi7PhsausrBWunPE0Ebafx+0OJr31pNqkUTYb
-KcVuVrrywLd47/bCPrEpL4Tzl/zxiLhk3AihlwFRwzcRrdOlCOCpQJMzTLMbzLoZKk49LFWJlUYd
-+uMUiffvqbrSwZCdwP+Yt8RsuobpNrfGU+032zAm1OaygJpIel9UY0odHwjAJ4uQ0rmTK9estck6
-lWve/plRfWHlx/drZLY+aaR5aMEsnZWAS+QgQ7paQW1iFOysQMVeH6ymhcWwmFzGnqJW+fo6x/Fy
-GXZNFhr0nP3WksPIIuYEZgu8MJDVIBVkARRvztBpxSA+gk6aK9qgCkqlxWUmGxed+5KwcXsuYlYN
-zVoJMdUqU5uTN8Td+bef80+GtNAubTD0e9Kx0Nl59CtdYJkui1C+YH89Q5BtT1yd2+3LINVr52I7
-wB+CefQUbOSjqK4RES3L//825qMKCFsl/nvWReccBBdp0NTxhFUdCiTDXNT+w5oARnEzgW06bnX8
-wTU/B4Aj76FepqoL+ZMhSB9m5UUAwmxv5B+FPn7iDfeBqU0VXUII70f5hyDSFprPQVhagXjR+OiA
-96rm8sAPDsbg/7uhS10l+StGaLJZmz7LdPhoPcRKqZBIVVxNCUZ0eEHEZQRiAXI90GPGDIRfX4yX
-5rtbsqyIXtTuID3wMIn9EnEU8lrPI70LqZ06K0Ay+gieHrh2nTNc3RqouCgJgl8ywlqSqCs6VvHq
-Z30nSXUTBKhN3QKSh01dNLiLmNA9pNGhbTAvyu6QcED1oNVfWCsz6PLZfvV0C1vim/Yu8lgBZtRi
-iDS3pX7+IB6yfSSvggVMEeXPyeLCYZRXfwhki5wHAX45OFWgiPjIX4tzXUfEh08xrSGaUskmdrjX
-i7SnGJatQur/HbJq3FSRcOGvEYJyF1rCZrMGrHmauXdfIKpJo5b+UaMUdSB8tLukG6WjOjfqzUpP
-T/cvrCgVMxPKbraWQzubrIN9XQIHhhQE38MBqh1G1OtWMcWTO45aX6eGHYZTt7vBrqTe2BbV3ZtX
-lDtZu3QVfFJPmjCxNlI1syALa1sFFOr4o+x4F6bEUkFCASOCx4rnXaYhHYTNeCd6wgiymERxmpL/
-GpJRIlWVqirWT2JuZTl83KsZoLJnAYHInRSF9Wr7lbpXShgRtXZXvXIG201G1WFGAiaqeM+F0ziU
-LmcseadvSyM5b5VfYwxhJSah6cMWqIJTfXYrrbi8bu008Oli6Kil3TG9b9ecV9SIgqh/+KqV2tWi
-uth5AU7Ma69yrzOJ4nXrlJerCYZ0duzNGsT2DgnNY6ynMfn1wf07ePkfD3u8cCEzaXoUGLlTIyEo
-X84iph2dRTMoK71X9KIRYmczmfOPMHEA+B1PzKOSr7jsUDd4XwM4L6umKHJUFMmvfEpNUBnepEGZ
-UsX6NOqS7MKWIsYhJBrRXxwuhgAl9Jb8Zg1GSS6TzzgmFMywpE1TqD7JYLmd9H6G52AiqcZCJbdr
-ZoGPXt06KlkQrQqNcJMZekXscJZpvmN/pDNxVMX3aP+Cj6PoMIWJXGz9ZrKXai1n1i9Kn9X0YsNP
-oC68XkSaw1q9pzXdwjRjhAlFKajmvjM5+BgNQs1vR7Z1Yy9gfEMHPSUdX+3+mB9DWuQH2t2CjCG3
-A/veUs1q4Rw7hYb6yZvO0i05ac4Y7UA1d6KSo1Q9fdSAdBEaIZJv4p6AeqEZJTgHsyuV+ve3GWSB
-JTAGfqL/kl3xJM9cc1vz+nvXGMMfukaYyzqP32G4f8ZlfXD4tbaJ6E/llpn63A99bLZ9sbdxjEu9
-GfE11P2DNqlGF2fDi9PUEA9eEiPnUkzLt4Jgbd6cxhKyMDOh0J2mq34OwqX+mZ6MwTlVnv0finY1
-uJyOx946SbP5xbH0/uarFNhMtn1xHKh/+owJrYy+UFdja5L0BOj/vvF6S0V9W9DgkFH4kVKlYswu
-kFe915KBcyvgiND/kCcXsPX/lqPBwFR/hrsMoDYypg2au0ErgG0a8P1jIxvEooEgQhvuYic3x0sK
-nSRVxu3ia+C4ffRGEENMnDvz2GEHgNYDNst8BtpZpGEE7IVbxaSaMJAMdnu5nvPUZZH6m9wUqvBN
-G5bILauLjJW+2bz44PKY+l7UKGe6ynDVUGw+caW2QVEgKYWMf5TEGZPhC/tAyfcZ0KJ8eEvf0rQI
-iehiZh3Y5XSGo76mLfVh3gdTnuz/pGgMc9SzINFkgzP4Qh9dM10p3Bl72haQ/NZ4MxAdl8Ti1nR0
-LTbsWbuRV3l5mh6/0jNHhyDyYqtkUnqooHpewN/DZ3e+hSPsi19Dcw5CkHnyqVTl7+bQDNoHM9oj
-e5d/SiuEx9ECLNPhac//TKmHdQEUzo6qJiIlsum5WJ9a0Z7jkn3is4GFaIHZdUzse+luvJEedksz
-hoMIW9vv9yQQhb8OeSB2xFtUUapoI37fIukFRR6zS6a+JljkwGsu7KPZ/xHtatzK5KY2hAhtqwum
-pxEW6FSVS+6oPAk4tHvWeXiMf6SxDdNS4a0mPJJ5jPWTTSlP/ji5NMOqG5QGPAIkxLrQvFXs8eOL
-93W3WfBL067RZGPrFQ3NhwpupJX2c2bmVWzsOa/RxaAXb3OEPepoPhb+O4NAAvWHRDQSqEYVVb5v
-PfaP+X890j2RC13kFSt1wJ1+mKaRN1mTK5bFd1TDzAz6/qtNc4Yke8E0p7G1dYvYASr/oqy88EWL
-dCLpYzhIhkJ3DoLzwbSReGWUryU4X2OJ2HtXDo62gT6HpvL2acdJeaA1KZjOpnCsEQbgnpcdRyXo
-8Rrsbe8HqeRnRayagBdiwG1HOUxA4Yymsk1DIvpA06jyRkMTctg9uJMxGirgUdvUkMRq3Qy8Fbx+
-mSnXLuJ3D7hqAb7aga9pFUaoNW3b26bX2PHqzrfBsrCXZ8AmAltzqV2Wogy8pdxul14zTkLYgXYW
-+iZ3Qhm5OeMy00IL4UTVggnCfYboInKuKv0p7h9eARGAUyICXfLr0oAd4v9sqlJnrEyOiBGPhIyO
-b6+4jk0lML+QeMd80xUqY6f0QIaiJn2oOMIP9oUhkeRV8949TIaJBYqoEG30FhpIeZHkse/B4qEV
-7VWRxSLlgzwTNZcS2Yy6P+jJnZpOXFGXYx6XC12VEpTdqtLClao7C/4w3WNK5hf7xsCEzQISvNk1
-V0/7cMGazYxu5ptoXGV9oTOy730QaeyYVniX6JdCR9DkGFmkI+4HcSg/d5wbXGUfv2UcF4WQIJ77
-Hd+uiKnFH14RtOToreq/8dm9zUVKoYRGdUVhqZJJRhs0v3dLqBJkqtDOqwDD9XWaaYmpFm+IFJZd
-ADLZJIdlp5PKX7MV/IIRncIYzIBt4BOJ05y+9h4OkEwsTi74MmyG0oku3Zc19psCXjw3PjQk4ZYu
-/F8t2dc9v6F+XgnDySjR39JDj2BOu4qUvMhIvx9FgMLPH5YUNhvKPXHtBR0wa1qbh3aAYuk5wzSo
-sW4EcCye1IwY3+a0GX8boDqu75pXjlQKf+PwrWkZ6GDFwQ8y+z0MLJnwn39Ksmmtpt1s/XLWqAPu
-Z84S5TMkuc3xBPbzmP9uLvtPtxK0kDDGk/vE5HRNvYui2gXcZayRRQRDI+NzguURqMpWS4iUqojb
-YftJ8q5xqPBuuyysOuk44xSA8ThiiKWrmYOY5fAkxy3t5G25fzX+isgiZIXQeu1GwSB/IJqOPgVf
-ZCcCM1rsV9NrQpfGB8eN/BuRAdzij2AGLCaBGOfu8llo6ZmWN1dRxjpQFGObypLWAj525naS4bp9
-PevcojxEQt1PLP8oAAh2XXUbGiJZcefl9DE6JG11RxrEtn5JvkDqNK5OH957+NHU2dU9pRiKO3kM
-CuqULVe2oqNgLIP/7QKVERDAExtz1i8nk3B4djUv1M4+QWB+9RFAMVKVeawMVnSvlSPru4e5iBrl
-ohT7/JbOeOwcuiyQiVPa+EB8NZovzBARWatoAFLJdZ9PGlZXudJYIFGEZ3CsZTRhiZwlNdBoBTQM
-clIkWuu1o+d/MyZLG505xBZ6Bn41nZ4Qojufn+xLHdm4fkoaLhyKprrl/lZhGBEHBG4/6AWzbp8l
-tday61+KR5x0j6v71lgjX5+SImXTsn7qdiO3RpdsUn0K2jbRJPvSq4aRjpcdhUE9NEwhUIkdywpt
-VCCETwt4iCS/B5BZzPkZljLVNhVzc7OKMynQ3HP9Ka2+lqjIckDyQxvlgI5Wfel8j5npxp4TT6PH
-nUI5GCAEloU8VEhH6NfpRp77WupfUOVb2s8DAAoH9MVleyW1A8kEaenLR7+U2VIE24mTjOWfTg+N
-J9rPFwYxn5irY4mLoTaaFuNsuu7eJyNL7UiBAHhKByMaEKonU78SU4mJEBD1ecwsLHxJXRHkbj0T
-u30Wx2EexDKPZM7EDPwRTJ8O2/nme+Y5sQnQKk2pqdaJ9yRnoUAfPRjYxHt3v1T4mh5uc46BJfnV
-ysNbvm5Ht+iEgUM14YNmjcsUpQHsr+Fc+Fnm7+42FW/dwvlh+3uWsbiGqSTn3jSnzDFThAR6gW2T
-lKnBD+TyrC+aIHJ79qiIMujOLueCI7h8OwNzF24MxYKboR5/+2FlwtTFwA15LgH2mRnx38UqzG80
-UkGmk7+GEDpktQURdQ6KeCllcqPHF1QD69zONxv/Z+73lbSU8dVP17vpltAoqmTg/iSlGjr57A7S
-cvL1CRxwG+/d+Edm6lzgWnamp61RmLw9cqXEDqNcVtKXC5ymDWpeyWMWOoy08flK4jiFVIied+co
-eAQ6CEm2HWIZi+tJf7Q3rRlTBAffk1GFD4599MdU+pKBxCr4ZIfm+YZTFLXvKa58DEvFABnqECVs
-kbtqrAqwLP4jZlXMJfPvOq1y2AlXaUyj40Cn/CLH47yZfW2cVzmv/jlE7fLZDXnZkG0or5skT0QT
-s472hzUd+6eez1LvQOOcMCxGbVlKrNDJ0SxyibdtF63q45mg929Pw0TwCkfgGUhbw9o0bbU5jcVl
-ba4kkVPitk4T/uorU2awjTRN4/fhETIkQYpT3JOlo6gLTVzLJOkQMI0sEcpcyvxlaIP3ZRYvDimN
-C7HnD1bsYfkSQGRVVIUR5QmohgqYb7h+Ngflc62RyXW8NfTBLAKLEqGq5vps36By228NVAyAx9ei
-HvAN6p/YgOeqpeV6qYm+5E+59Jdxi8fpp9wkaZEgbb0STlKB/WSjyK+woVu0VCv/gyyUY0YJOD+E
-QsFAU4rizyyqQ/koosIbrcYkR3yTN/gOO59r+WMHeWa59vD+snmRWY8uQdyBdKbL1jbJkRKLusLX
-76liknFxoCrfzI8QJ4+wC4RKFDq8YSKlJ5IjaYLyjwg8/2nsUiJ7hkT4X8zhlHCuFWKc/D33In5/
-zJOcISoWn/u74X6rQmPWPLmkcEWfAQSQ/pPEgaqh7J9V+Yc8UGH9skOMsk/3pvXqOE0EAvy0NnzD
-GLsBKkmXT8RrnP8+h1GJQr/c8VTawmWZph7c6yDFy7zlUXE/bFRDePNFZgPPaLxCbUEcHRjXXBtV
-scKVz59sJxswKG154K1aA+i8thGW+DAvdSpy+eLeJ101HwTZQIOOSmUFAR82ZuLhN0TROqTUN1QQ
-Kb+CIPcj8DLl5Z1WWj2+I+CDHoINUc6kDQ1P9q1xh5k6iQ2tLTeyRVAsggcoD+Fo9BU3XeCzGvmB
-xADUwzr2FgvUzFeGx8imCZaLn82O8uvp87BR1NRi+2D+xHoAhbXaoWP7m18verlqr4FGrSnMhGYZ
-zbELLQjpaCybJ9s2Y4UWMMWn0YOB9YlsKVcuGIgvULQEpn/S2pYGEf07x/7KY5YfsAVt5jTRrM9v
-ymtunUMA1+iFy6xmMzAEm+mFLA5zCboxTEoMKx/wZVObrHuaxPehqFqQcdtf72gAFVIXTft4O2AF
-RXr9jaBlQyLHX5P4zkrACOcI7l/DSHWTnCh3SANTC4V7NlNidsF3yNu/8sDBXcQ3fr+CSwDx9Bo5
-oE2D9UV4UfyceIWO/0ECH/c593Rrroq0Vu0YD6rthmH6kRxCYQXnAEaJs1dNm4SreqadGoqhU3+S
-AYMWiJpGC/82JUmt+AG1deSQRXAmlIjUKQsgDeqn827vtJA0uLLHvDhQwKg8pctCvGYV7If28Tso
-F/2R72Jb+WPy3MdvOX6eLIRNl1XlygTPRO4A8hvRC1+AfgmZXX6NWNuRR3fRyEnyJnLXVQZlk01x
-F0ZcZwwvaZV3N9MVs/09dJcLfgxJ8IeCm7F7zPN+0SwB2TTCcKgFpRwqqP8OD4Ui0DoOANJHDeL9
-bmAcmQV7mYr6NPU4jGc1H/MEDo63kectkE1xrhGRAV9oAG4l3cKz16ZruxJTQiu8kfDdJmX04cNN
-aqqDSVubi2u59wzo7vyI10K/wpWhW7rM92BcpJ+Uk4yVPYAIXbnSpVVMUxiLz2PlA/wyGsd+jYdP
-2nPwCeZoqtZ46RKSLpK/c2L0mLTOtytVizlt5B2NaEPVFpa6sUq83WhB5qiPPEdWEfDuPzfLSJnE
-070WaGPp3jWq0XXWOt8wx4/r4c7Fc9koFm9XgYf8CDcPdXmmbAtt5am5/lLJyX6ss3QH/KJQBqsq
-b12uyEmdxs/Jd5lbK3u0X2yt7WQ6jGwr+tw9uEgJuw2DDIt98vcmabkkwC06juEpWxRnPKMm3LC5
-s/pTTQ2yuPyqLAdDqKDD5+P6V1dtlGlzXIt1DeXRj1Fw0G1mhQTgJGnnybxtUYLmJHDxSN78b+j8
-omW0ojAcSgvISuH/NZjQvqGJRkdMkS95hwL7DbVnnouUzfXJow7cRylpaD7P1bYM++ntBoHsNwcW
-xM17tFOtOrjl6kBc3g9urCbKh9rzdaaOERMnMZWcPMtxE2OzvWZxXa75nv9OCMksFfxuMffaacBB
-z3QS56h8FnLrHoQWKRyBTfhz3tUUqJIU6bwGCt4JJk5qVOpIMMk3qv62rhSjM8P7LyNIWLXb2NuB
-sVfnC9u1S0EIap+LOydfRvhE+RI41PFHcRkP98cXxOXGWo2Yb/ZQsoE7gF7FhIEeV+QtrSBzM1wv
-X2OYfI9EhiSWzhFvGhjJf+J1LgPHOZkrpnd6VyfiyRnQeGxXq/1F8kBP3HR11EZyvOibyonPPWV+
-ISE+9rAR5hHRDx67lyAbKM/rkG+NiEt2kNkrKo5HpJyWgHoP1v8XQYyIO7mZb+RCCth2/KBxLqfq
-Py6TOffqq6n8+HGkRuvL9engOHPgI4Z539RtvA2uC6NzzHNyrnsSObRDr5eKwsorITWqHVb2HKow
-oYTRSSSDL61hRo5G4rLXxa83uKH8lgQ8avDi9vKr1mF0+cTTqSQGsIecw29o65gkkTd5ERMEm+Vd
-nP/8t5tXPfoL+HyGlrUVsm6EyaOZSC/5KoGMgw542gql6tdsyn37afgVSYHuPgu8J55lO8r12nDH
-ChLAi3t48MOIOi2A45QOqi0r3taPInCS0PVYeBGfkhifvGlG2NejBWuyz03bhn2vL+UWpPxHrM28
-rrqOj+Zc7DjwhzFrDq+P29SKIZvsExP9wJksiG70WhoUIu5ajJFWDe6xKKd4OHqLI0Czqyzk4TSg
-sobd/q9ndbLvnB/t8YGJzrB+ITUqigfWFyGHCOqKpeAVXaTsaxY92VmTYdFympcR4BZwGLFlj4ut
-te4I4UzSO7EeweceMKqHtjBTgCqqHtvbOi98IQjqIij/Bh6AeXlfET1qTvmXAR65z6hKZyQERt05
-igOZ7c1mOzWbwnHTqUvBxchWZ5pRyiD66Whet5QTCEZWtqZKx8gvynULKaLOEvjGj+GkIer9+kW7
-fL8AbnZ9cbgBXtqTwVgJgp5vv8dSNbD5f1Pm97cf1db5VVu99IR5pnEtnMdptqdOR1PuCrWt2VSY
-T7ERan/BFpgDpxiFdWosc4QFgnl0lx9R15LmtS1t2aC3Cwqj1Q6i/mkJkHHOSrOxTsNMKN0C6rCf
-2cS86tSrHz5BvfDWrHrW0yA+w1DS/bYuaROnmaIoAXwRjR6UJ/e6/hacOL7/3MMaKR2GIJvyHRUz
-WlIsQc4jTSdguzHRJQOPLSJ1Zh9BeEnFpOFJYnf3uuS6wjNHtkVwzKOJ0oYXpX8eKwtAWtyfHyRX
-W0GHONAGWIwpAmJlYMG/KhIIZpnbw0kZSsE4IpFRTT6kaUu5NUvegP7c88TGwPvMZG9kb3ERxHi+
-IdodPvLpoWjGyNW5dH4o0JZsC0lIsBe6xCcjLhn5PTcBgSgvDhERdqEf/4TiSXUeAauOxEtonLDj
-ADZYzeNPjlPwxiGSKKVhE8tizRcD5r6oowlkL9nEERE1XUax9k7gky0yLa/uo6O0fquvXyoK0JKR
-sTVG2pUrRWOmmijv8ymboHhMtax6zf7eL1oVI4GWaTzsO0rxEeRAFPdMljmBNrao+I35UTeDQYVc
-Bde8fq2osUKUeclpF25/O65fISp22bBQPvxRgcw+SB39gT9d4gJ9pMsB14Cm7tYAd6mSruQFLS9f
-yCkAay8r4+Lb3PnuBnTJqfVglGQbeL+0B/tmi6C5D9tm/cJppVGsEVe3KmvKDJwTewOOxGnT7E+q
-lwgxxCZsO8GvaqeUqJ9fwLEDRaZCJOnwNOhVWWAJghpWQcJ6ZDjHyJlReOiGg+7319wNSq/uWLlF
-o3rfZq8fr0oA9ljqJ8wFdJ1WfMDTRQ7KiE1AFKwnyohuWNTFxwTeDtiGuVYW7bFq+Zvql+AKWR58
-cfQA8v/oNyJ67HsXmFGANfWhIrKH4fa8hWliLIO/y+HlXmRxMYjnD98h4dAjY5Mwr6T3Tr09Ok+o
-B2OeU3yJviu2sfuZQVx2lWPRxUGid4S/lpK1MBtWfJ+trP0i8V7H808CwVRTRBsNW/9wsA5rFb7p
-qRmhjkJEg3o9jBt5Ix5bzB6wbsw6xQROa41cJ65j6dExHGzIBS5RX5KWYz/Kpb/kcyQZNdUAAbxs
-B+5BUiAor68ozm9SSRpc1IIuF+mpFWp5seZr9gbuzE++a5wH/SSaBgztilzJhiNVlSGDgDBrAHLV
-OCO0YQJnm5Y5IAZaPs5Cp9468tHin8Bw4EPCLlXezaMWdJr/4TMRyhiMyVosL7tj9QLEkle/x9cp
-1kEag0v6ZUtfao6KoKf/yqRRlGzjvd4xD7wTvf0ET/j6mifRCvZy/ZXKcnkyPapgOQU8pzhAIP6t
-xhvR4msyeXpuKM5VQKsUa+qFrNqq/tUw89W/Yc7tnhU3slM6i/TyDSqubciTAZJbLmL2+YLLf625
-s9SRbfJpX9w2vnL3MTBiV+KFbu4QPU9VDBu4TEhnvEpXOqT7wZ1uK6K2/HS1ByDYEICm+ni4+dzS
-GSeaQ5MmYk173Am7q2q07e3oTkEh0rKiGTTJg5dMQ7M1iZZWN9k5sWKHZt9QJ7VEAA98/2ff6yQu
-eDxZLbqBvK3na+/el3GBcxusfzU0RY+zzmw1BwJnqnchqt24fgU/jKsk6Gzpl5gUw5CW89jc7Xd0
-wLWlTtIuhmcRIr/9QqH/6T8jC5o8lxR2VAYNuASY5+mNYWmGagLI4HfSKMeozJuGzfqYKvTqKRbP
-/Gf4le9HRy6PygkmTvwdHpYEFcnkAaOAgF9IV6vHbK9Yk/36ZYSKDfU/0k5TdCU8O6TCcBCko9dX
-OYqWMBWr4Qvi7d4Zwx6Zuvu56BAitZrEy4UMD0TTkri+Ue2t31e/FFSDk4+NW5EOtBCSGfBEFX0q
-ol5YT3p/RkSo5mDjHrXCVlXbjf3DgomsVfgnMULfSH8G39IexavIvNz+3laC3CV02mNQojuA/2Fz
-dXBYGFk/7TQcI63iixqINFllJDOTKYnuuQkpn89F8eqWH4+KWrC7+09lDqDMpZS+JoJ7Kmvp8DY6
-obTjs+0znTauQ9jZiq9aoA/ivZ9p/LSY2fwlSxkcO/Wu8Gi7oMb/D68yix1JZ75p7PWNB1JhdtB3
-2wFlxJjTrB5N3fjHjcIJoAbd2EyhFhLt6D4P55mc5a7GOQNLuTQ8Z09ak3D2KoqRTcRR2UPwlvXW
-9uxv9Qm0CQ0rI1O+9DGI6410Lj1Gf6grVglITah3Cf8eDerKNjHJplk/nZkVSeROeqmGyZ/qa6jp
-G5VxoJ+34R4WjP10p/QcmPMW27PPW/iBKfaD2XjcFnD7pDjd19rkj5wwnNivpm2rqfEsbz/TV4AM
-9dZRgsiynDSJhrd9XcgzkoXc5tXZiuJSYoPEUwu3+Ahpqu4UoaLEZ8z2tpbajI8GfUttDdOq07ME
-le+luK4T52+XKtXKOg44QKfBZc4zzt7V/m6cAhkghbpV9zsbdWJ+7IK1GXKWqQ8U80crQcIACkiM
-T9jKDg1dFayNC6iUkTjusigLkjpDnNMTGpg0Hy14L7Y0F2p1QxjI4rSh2+mHi2LYtG/GQOvQrC2b
-eBtWTyKmfVbVD217aOPwuXd0OFhtBfSXQ9o1mlmXsKeJgfOKtTevnmGWX3mRMedPvyhmteNMYsFw
-pXXGlpBvdTYO4FIpdstGgMcPRl8uJuVTI1G4LQdHMquxQsEASPBA7S8FC/AWwCfkscA/4Ry3o1zb
-z+001nwL40ADmIhJhT4alabhEqZ3RhCuzz86WsVJgtp/qCFqnnP4WgYBtBiB1VVYJVn9yuR0BYAT
-ydWVYaqUihIDyiHhnRRKaU3LZZ8wzrjw/UFrVND7wpuN6P2NVFwB2UEEnX3ktoBfGXsATvPAR4zf
-XiNAIfMGJ+GZkGHU+6CwK1gU85RqeVfvnXUiOEyHo3y1cXy4wC8I6k84UPAwT4I6JKleQpZH0QwD
-YUpC8INqERF1YA7ksSHzeCq/6cyE1CmCyHcO0KXCNnyTnGlkSCOGDNQbU0aCg+jk7O0O7Y5D3s2Z
-Tml1l8ZpKCPpqZsbVrGf+XArSrZ92ljJIb756Z2eElrV+ll+Nnl8CjWBhhYi1YLToDlONexFwVc5
-1IlcdPmqUKgDyD8rxkh32RADHKTJ8SkqiXbgHFgfW0LEZxUukKy+TwVaOlciJNR14OhwYHLX730F
-o4ALrwnXrO+2j4F31N2BxcLEb5K3I5UcbTLNDuq7VBvVXBE4xDOpsI7cEDfDvonUxDcKIvv4DaM4
-MzUTFrN4oj7a8yehi5CuAYeRXjlWvndqURWNcnXO39GahPrwL8Yjx5UZ7CGlAJW0RU9mW5l+/be0
-cqdA1PJtQd4il0djCWl1IXPvTWaf5wLKE9fkCbrlGLmIEXMdAqak2F0J3KeKwdpuhntxtcaMsmot
-i5ZVqgbaEp5B2zYwU91Xso0cX6ADoHBnWgmkMUOLPvCWqi3pvDI0wwPgTUWOQzyav22loR6EcyKS
-CG1+4JpUp52qpoJFDr2PgLL4qLmK8hTJLwxmNzQWnseA/H0gkE0tfNGzeCpSNADLS2DZK9hioyYU
-FRs0wAAjgIDkTgiRkaufIuIsGtepg8cG6ZvJ8HORs41Nrajxf5CjboFpPtvdwIj42dYb0nubB4T1
-x+FhzuOKxnF7saDirBGrTc3S7pYEUXT8gIZTCNoetHqkn7zwYXAIim6YZGyfo8rC2SzqBURGO2j2
-mZNwkVhjoo8Xz0VBKZREIfAAXFJSZnYm8+28RxSawcvmjl8m3itj2YJ8ZE1y5eqq52FXV7H676zj
-uw+Uqa//MXs1UgNdqOl1L72rGiyu/JkInx/FSzmwgxLaeZwbR/GW56unptrPD9Er6T7KwVJZygRs
-fRCidc20yhAm5FGdIbMuLd8sgBg/ylqN5eHF4rsVI7ThJOopdSaDBJfRVPTdiqEPoGTmmSEwecQA
-cCT8nVV9t7bCXhBD65Eztj49+Ly1RphJHWXJrA/yCAdBvtEeEgVYYHaiyzDhIHagfbdTHIlLJ59o
-f13N2g4j8RfxUrsFlKPssP+sOw4oojHJY3SAFIjRXpC5Qv4jhkBaOP5Nh1/sN1SMpeoew/wTs9JA
-GPh+yNYrmHqz+/jt1ZGBQ3MJGUGsrGFZ1V2LgWLw5rgj+iHdCMWbGbNC4yLwjfX9tcGZ8whbRyYb
-nNa7YEVrPGWgsAawI75a7pGqQqjM3DDTjikq8MAmx7jr9vWtHAk8Jb+bIGqZyo7jP1vzSrDHTZXy
-14wMbHih/D3e1cntAH1SN4soK3voLbrikeJiMijAxIPUzPlkIVR0kf54VRlBH/h8q6xHR0Janc7y
-lJeZWzksaHnf+Uc5GN72Iy/9yf68bEWVdAaRtNQfmGyxe+H54aWJrEJp5vz7hifK8IpbeoxLOmqx
-L3JL1rXq1jQ6SSLJ6rosVHvmfOAx9pSUhNnyDeJZESodsRDrtr8a21j7EbNRGBMXUKWMRiNTY3n/
-nAblchfIuPBd5wQlXguTVFr2p5WdIkE+VFajwD8HHQdfYMpC40lVisW5kgdJkS8N5mMYhOrIhANc
-8swZybs9Ft/ayBVZgJw2JiCFk0kqVqpvj3BbCG5vMgpxmwxwzEVabTXvkV1v+mM86YWizqepT6eR
-nkz3tFVV0tb6aInZcHXDfCUF8wlUjEH0vRYVjwLKsbSFRCeO3HHtQ953g/lh188w7cS8bmkElG9l
-2YzcL+/LCug8O5BeKlDdbTfvmlAN7WpS6CaX38PDAVYQ8J/qZrnwygwnSR3daRJpwjL2nC5kzaSx
-1COY0w8i00s0cxxBW78lPpX5PGpKc1Jj+Wnmjo7CXH+dKJh3tHn89+0bpqiHtxCsRgGfJJNL5NXV
-PepzUNZE6A9uyTy5XQTBvxWhnN+FN+S3lXOsCGOgEMan5k4GPJ/qZD3N4iDvXU5Zn8Lle1GEKtJW
-YGzO4IdoHvZ35ZZw8+mVp3PaxABl4UKt/expHVjKTDJnJRXCLCZuG67bA7YRq7bT4WedM8juE8y2
-YbcgHnFsEZLExbTgl7g0ye/ZDVE/40mkO3t3jqVGvQWnE0lw6lot6V/2S4ltKZ9sCY7xdr1QOEVm
-XwPTIjsk2lVAgKnbTNiRUX1Z5rGyGT8eOOKjVAwMmtd1jnpIsm/jrlOVYbB/ORq0Q28eMABIRT1f
-+BmKgwT9U+HwCfuQ3X7lgqf6JyGlycldHwCXc71I4YjSaHu98thcmAiWyaWDTnTH78A1j9SIcSbk
-uhliuPWkmT4xd/NmgA24E+r169Nmj9Kq4Gt35ji07RFqt43nsfS6lFAYX9H2Sk+uVWPtVXNylhOs
-8CKZ1jJ4t+99sK8CzTZYUSDoPLHO6S7Jr2wzwJjxN0T2xhxCpC+cMofxddsB/w3Y8Qkgrv8onv5m
-ZuFAu/DWVa7W9kMMLC0J8qSZKFIDESgPeMD2kxWuldpPUr1SlLka7I7IePoxGkzEf5K6e2bzgbNs
-NMa0f7RpQSYhxctYvs6NMVFh7b73TnJdG0VDZO6ZhGig9ajbXUn/XFs9yOJWWqs7R21flN4mxLl7
-LrvvMjSzz/vpmlKEe3+I/2jEfwgAo4BB38ejMZzw/CLIkFgvuCMfiZhZwANFUtISZ5gtbAeYP/SC
-muJR8p52l/8G2NuZqK8zWpKstHjkYbzcYqXCLJ0ayNXZ+hzkRrcHvlcAm6SzX1R1Pclibq3v87lp
-GQQZ7qS0oxN7zckQQIHK6mhDcJaiH7KL0SZwTbK/g+oz21oaDlLVXv4Y7DeXqzT7DfGG+gZT1rl6
-GkDrycqU9iUiHs4jC1TM5H9sOrGM4T8Y5ZCMhnGqovkCbXkQOHfnytFVoyVYvCqjyPA1FWO1TkB2
-EnZ08ppUCxbIsrmONoIxCgwJky7dOdRPjx95gxVxlKf1Uk3GYj+/2f3oQkXuws5FQpP/VpSAtk5k
-Y8dS31yrYlH/kwzBf+H2aepVVvQX2569nRIQ2buw0LEXquPfR10AGNMLPXLVxiVxOSmHhH84d4KY
-+tHgDQtiNofRzGVShn4hPS/HIgqwZei+UMb9OLQ1xUBPwYpCGmhk8NbOTxP01/19DFcdFi1IQtWJ
-Q+FX/STWMyczKYQgTEaawus+eVKKtGDmGxNSUZOTLT6gCnw1kpcWxAH7vICoX2EeXyud4D6/quLe
-f5KhH9eKSG9D7iOyVHsGZjeM3nwe1DAhy9aXVYeDGxv22IAIselXJoim1UD10CNd7UYdyRqfh05n
-5+r2LQLrBTZ130hg+i0y5RcveAPfDAz4hMbbGEXvlOwuVfry+6WZRkDs4Zdj82Q0GvJAkOz7Dl11
-FETByJG0ilOdBL4VVDFub/iAFUoOuxk5CRlpYHrXovtcdA6//ZikZmXmm+v4TiDaBapHCingsmwx
-f0wEBUnQsY3QdmcbSEeLFvwWod+TXgoa0qa48XYjQ0xNa+wpZAVUr4NiHsdlVpm3rbTuwf3BfOAl
-s+VyMnpCR+43NlKTDHbbb8p5aH5pqjk+lh+abs+IhGqq7pZOOnjrGVn5Ynt1U5JIjhjgD8LqzjdU
-rk3MFN97GgxFd3LFjs2V2d8NojC6YoR/EkF/RF6pAANzQcaoHHzbyXlbJXzoH29fQSHxwYodTT3/
-PiMejlxdmqi6NAK9j9ggfd3S6LYGJrAEFV3USnWr4bUkMTnQaIf9dRGeZWz887ZdAepwBJ/C73G6
-rbAVogIWwDFeDSr4uWc0Pxg8ETeiT520QOvlUrgjiEehetYnjoETtZidJlVfXILLwgxTcREm2bGg
-uqyasl5IHmYUk1aYZHvJIyZMWEp5ox5SOOcsMNe8D5KvVdUm8lZKRUD6oF6MpbONRQJ0f97h9Xcv
-hbMfkM2tJKw1f5tn/VJZk5Riv7Z5YESE/jiFfaoN2cYGrgtv0hLoQ7voKVArpafmp3a+6ZoU49Fe
-C2YlzDkavR9M73fQBPt8XDq57RZgmZZWMFLQcTekvYRH1TMijFpPhX/prb/WydKrun4cYnNwZtRb
-0ERzPqFRzUWPovND0AyokIRUcUn9aS2pSGYJLqTEHpnF3NTH0V6DWyxSnjIMj0Wt7jWGmP7AsUKs
-/HVwAQUg2j8JXzT3If2Mog5kVclz9IHLa8cLPF5FlayXn9kgPtYIaeitvzluyBLEKwy1c9o6S8IW
-kYFDvskZgVW71LJFCoRFHIsgVucBZ6WahqYunk60ElAVLI/1nmZISENRRv4PFiZ849OeFGypybUR
-I1+oyF7dAN1xj0eUeMxErF6wYWjLk6PuKg4yc2quCrYv3Ru8EqtmfyVrz635pViBHNrWyr+2sw/Y
-1YtBoFOLH+jpdqo0zX/wS4dXdaW8p2wGFm4rq1JIoGSgb4tT4U826Yn4ddVhYZfVBeBlaSlGn1s/
-YTNBkk9qQ3PIAb1hkJV9/uvnrSD+8rvkeNpg6ycAW58jtcleS/YxfjOlbO/cywpIOyLEES3uwyv8
-OEoCFG+8VOP85ulrUXa7mbCdKIFPdyloskA2iF9cU57T1GjxIk+rZSWMjvkYJGbb72Ww0R21tcw+
-XVub7pBLLx6RSGIFA5oYfgar8c2FD9tvLpecrzdni2/sqsw7bOtp0msPzVDpB5xS9lB1KW+JW+oG
-dhlCjTE9ZlGTwSqE2OIZEig4TUoxMmXN4R5VHKG6cTKLhQ+WjdCCKyJma4ZvX9VpokTUw5I4r59B
-4oARXYbsiGEpCz+cOOnKfp4RgNwSGJVLBnttjz5gA5C8wu6qnWpsgoRnT06ai7ji3cGxgVC/4E54
-bnxgAWQMsxca8E1JAioAyF7eheTYmWcMxowKlt3b5jvsbFYD7pLoKKnipHqU3FHuV0D4iiUxaQaC
-dA91QnKPit/92KwnsrgdSw0zKr0I28aNAktv2ahhyWoRrHVWRCw0D6sOOhbPgFKugITKZ7F5hl7E
-sfsupCt4rjwd4eCXtNmm8dG4aOWmvdyXPYzN3lywCv+mKBi9olhd/YTggPOAvkUCj4TPpCbp/pIJ
-qB4/oYbJb0gn9ECcyHNvSitiU07LA28EblrvI4oOrHujRWMFJqVLAflXelVg5Xk0TxFjktLeavSe
-SUNQoeesRbIzca4SAbD/89jzhkNVBXgN0oIiKj9K+8jossjWjJOgOg0b2uBhzN1vgruMqbyqY79X
-SrRLAhI5h+w+mQdVv9jvM1zn1lulg509zHNWJnk89RGKIkjKUW7l2cZD78EXQ3D3s4y13B+iWPnK
-QvlWlBo7OuO+vrA0dCQBPPzNr9eV/1W1kDgESdX6ywICdQILA4ef4Yw4763GIYypBOT07ctSIVYw
-WGCluyiQp1vuQ11mSPY+wgsSx/nnEtHvoqVvv5Wz8PXQZ0k+gbq/Xa9kUkJmeEZeLHU4cGkwh47d
-P33u/0jXXEF15AzZvasgIow1ugyzfeYJw5OYh35B0dMQyJ6FiOqVDsjtb35SpLzv5fIg0yc0jkzi
-suhSNDTjZr5OS3Vyr9NWxsNndG+c015U1Lhj2Rlk4nAoekWsdVSqzcBv2uSlBToq+N4EPGloUf1q
-AwzoACD3rmFL/DQcdlQWbP8kDNKzY8yxCQErfC6keHjuqegVlSpZtnprqvyXB5Y7aVqWKI1onxob
-LYrJwT2EpiNgjec2JZn0g6Ibyk8+sh2O1QmKBlUCD+5WlA0WScQ45J7DQX7l34fmA+46BhhAcJC7
-oTR8RJQO2ZMREARr/9wxJhvxXp07EbHkEdpvmFKQwng8r3ZDtJOvXWY1botM3VgvJIUQZNIB85yL
-mKdFtqGpyKjY+b4mpx06hmh8WallQtKTnlyhg0VnNtrHDpG6VKdlASv5aUIXzwk0A1od50q9JZvB
-VsHMO7zFylyZD7owlMIKJZ0zU2UXAWq+ATi7vnjDpi0cGovy39T2aCUgQnGcm6vkr8jc8kX5KnXK
-FTP0LHJhfYjlYiqj5onaut7TdegFWtJODbnbcfn1ohqpZOJuIUqjLFA0W0RFmZnbYTnsbPV/0nAk
-O8wL877GVOx1TDw72YPoA+x8nihLhISGqbV8M3W06UZNOBB04aANeTj6kMsWAkdJQlL+kmBobt9W
-8PjTsomzWKwHOEuQqG0dtHcICy5WMjK3ggRGr2cVqKotUi1YVSXMMogWpBDuoPX3pJy0ZIeze7XQ
-OLEVkcz1Ntisv9TkH30IGg+3CO+xDDifnu/4+UUkJLzNQ3JJMzTgKsOusCINTT3lQkTytvEbnxBD
-keknSqEA2qu4asARwqi/0OB6fF3WaI6e4KX6kPBXW+RHTQkHDXtXFinBKcmJmTg/PoptXtwb9GNr
-Ex1f/iK9SzlS7WV1A52mN5klFVDxOXg0psZIp/cYZJjHYt3JJuBG3sx9WOnVGgYRahebVCTwr+DN
-QEZRSD1YU3Y64Jn4m7VEZpq2P9S/kCq+1muntAd+9GwQNtGwO9SX1A1cZNmLQSQNcClqABG/tQUp
-RZm+i6yxx2exjv424feFOterKwpL0lvYHsq1sWJMNLVJMfueO+TclODfP6OCREHswfMiAGBQJjKs
-6ucybXi3gdCgi0LhYjwjBk2wh0Eg7GCvZAawPuHAFi7/AEAkfLPvQYVA9YtlG8aBR3d8xxSeaqmK
-I21ddLsnsUR7IRhgSIrzK0NiLIyMXdpH2r2WSSUjXHEsSeHR5F6U6mKtb8V0lei5h+VMCWNTzpsP
-0HgMrsfptF039sKn5L22PTsQeyCT21dpMMY=
-`pragma protect end_protected
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_atc.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_atc.v
deleted file mode 100755
index 98caca1..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_atc.v
+++ /dev/null
@@ -1,409 +0,0 @@
-//-----------------------------------------------------------------------------
-//-- (c) Copyright 2010 Xilinx, Inc. All rights reserved.
-//--
-//-- This file contains confidential and proprietary information
-//-- of Xilinx, Inc. and is protected under U.S. and
-//-- international copyright and other intellectual property
-//-- laws.
-//--
-//-- DISCLAIMER
-//-- This disclaimer is not a license and does not grant any
-//-- rights to the materials distributed herewith. Except as
-//-- otherwise provided in a valid license issued to you by
-//-- Xilinx, and to the maximum extent permitted by applicable
-//-- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-//-- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-//-- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-//-- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-//-- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-//-- (2) Xilinx shall not be liable (whether in contract or tort,
-//-- including negligence, or under any other theory of
-//-- liability) for any loss or damage of any kind or nature
-//-- related to, arising under or in connection with these
-//-- materials, including for any direct, or any indirect,
-//-- special, incidental, or consequential loss or damage
-//-- (including loss of data, profits, goodwill, or any type of
-//-- loss or damage suffered as a result of any action brought
-//-- by a third party) even if such damage or loss was
-//-- reasonably foreseeable or Xilinx had been advised of the
-//-- possibility of the same.
-//--
-//-- CRITICAL APPLICATIONS
-//-- Xilinx products are not designed or intended to be fail-
-//-- safe, or for use in any application requiring fail-safe
-//-- performance, such as life-support or safety devices or
-//-- systems, Class III medical devices, nuclear facilities,
-//-- applications related to the deployment of airbags, or any
-//-- other applications that could lead to death, personal
-//-- injury, or severe property or environmental damage
-//-- (individually and collectively, "Critical
-//-- Applications"). Customer assumes the sole risk and
-//-- liability of any use of Xilinx products in Critical
-//-- Applications, subject only to applicable laws and
-//-- regulations governing limitations on product liability.
-//--
-//-- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-//-- PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-//
-// Description: ACP Transaction Checker
-//
-// Check for optimized ACP transactions and flag if they are broken.
-//
-//
-//
-// Verilog-standard: Verilog 2001
-//--------------------------------------------------------------------------
-//
-// Structure:
-// atc
-// aw_atc
-// w_atc
-// b_atc
-//
-//--------------------------------------------------------------------------
-`timescale 1ps/1ps
-`default_nettype none
-
-module processing_system7_v5_5_atc #
- (
- parameter C_FAMILY = "rtl",
- // FPGA Family. Current version: virtex6, spartan6 or later.
- parameter integer C_AXI_ID_WIDTH = 4,
- // Width of all ID signals on SI and MI side of checker.
- // Range: >= 1.
- parameter integer C_AXI_ADDR_WIDTH = 32,
- // Width of all ADDR signals on SI and MI side of checker.
- // Range: 32.
- parameter integer C_AXI_DATA_WIDTH = 64,
- // Width of all DATA signals on SI and MI side of checker.
- // Range: 64.
- parameter integer C_AXI_AWUSER_WIDTH = 1,
- // Width of AWUSER signals.
- // Range: >= 1.
- parameter integer C_AXI_ARUSER_WIDTH = 1,
- // Width of ARUSER signals.
- // Range: >= 1.
- parameter integer C_AXI_WUSER_WIDTH = 1,
- // Width of WUSER signals.
- // Range: >= 1.
- parameter integer C_AXI_RUSER_WIDTH = 1,
- // Width of RUSER signals.
- // Range: >= 1.
- parameter integer C_AXI_BUSER_WIDTH = 1
- // Width of BUSER signals.
- // Range: >= 1.
- )
- (
- // Global Signals
- input wire ACLK,
- input wire ARESETN,
-
- // Slave Interface Write Address Ports
- input wire [C_AXI_ID_WIDTH-1:0] S_AXI_AWID,
- input wire [C_AXI_ADDR_WIDTH-1:0] S_AXI_AWADDR,
- input wire [4-1:0] S_AXI_AWLEN,
- input wire [3-1:0] S_AXI_AWSIZE,
- input wire [2-1:0] S_AXI_AWBURST,
- input wire [2-1:0] S_AXI_AWLOCK,
- input wire [4-1:0] S_AXI_AWCACHE,
- input wire [3-1:0] S_AXI_AWPROT,
- input wire [C_AXI_AWUSER_WIDTH-1:0] S_AXI_AWUSER,
- input wire S_AXI_AWVALID,
- output wire S_AXI_AWREADY,
- // Slave Interface Write Data Ports
- input wire [C_AXI_ID_WIDTH-1:0] S_AXI_WID,
- input wire [C_AXI_DATA_WIDTH-1:0] S_AXI_WDATA,
- input wire [C_AXI_DATA_WIDTH/8-1:0] S_AXI_WSTRB,
- input wire S_AXI_WLAST,
- input wire [C_AXI_WUSER_WIDTH-1:0] S_AXI_WUSER,
- input wire S_AXI_WVALID,
- output wire S_AXI_WREADY,
- // Slave Interface Write Response Ports
- output wire [C_AXI_ID_WIDTH-1:0] S_AXI_BID,
- output wire [2-1:0] S_AXI_BRESP,
- output wire [C_AXI_BUSER_WIDTH-1:0] S_AXI_BUSER,
- output wire S_AXI_BVALID,
- input wire S_AXI_BREADY,
- // Slave Interface Read Address Ports
- input wire [C_AXI_ID_WIDTH-1:0] S_AXI_ARID,
- input wire [C_AXI_ADDR_WIDTH-1:0] S_AXI_ARADDR,
- input wire [4-1:0] S_AXI_ARLEN,
- input wire [3-1:0] S_AXI_ARSIZE,
- input wire [2-1:0] S_AXI_ARBURST,
- input wire [2-1:0] S_AXI_ARLOCK,
- input wire [4-1:0] S_AXI_ARCACHE,
- input wire [3-1:0] S_AXI_ARPROT,
- input wire [C_AXI_ARUSER_WIDTH-1:0] S_AXI_ARUSER,
- input wire S_AXI_ARVALID,
- output wire S_AXI_ARREADY,
- // Slave Interface Read Data Ports
- output wire [C_AXI_ID_WIDTH-1:0] S_AXI_RID,
- output wire [C_AXI_DATA_WIDTH-1:0] S_AXI_RDATA,
- output wire [2-1:0] S_AXI_RRESP,
- output wire S_AXI_RLAST,
- output wire [C_AXI_RUSER_WIDTH-1:0] S_AXI_RUSER,
- output wire S_AXI_RVALID,
- input wire S_AXI_RREADY,
-
- // Master Interface Write Address Port
- output wire [C_AXI_ID_WIDTH-1:0] M_AXI_AWID,
- output wire [C_AXI_ADDR_WIDTH-1:0] M_AXI_AWADDR,
- output wire [4-1:0] M_AXI_AWLEN,
- output wire [3-1:0] M_AXI_AWSIZE,
- output wire [2-1:0] M_AXI_AWBURST,
- output wire [2-1:0] M_AXI_AWLOCK,
- output wire [4-1:0] M_AXI_AWCACHE,
- output wire [3-1:0] M_AXI_AWPROT,
- output wire [C_AXI_AWUSER_WIDTH-1:0] M_AXI_AWUSER,
- output wire M_AXI_AWVALID,
- input wire M_AXI_AWREADY,
- // Master Interface Write Data Ports
- output wire [C_AXI_ID_WIDTH-1:0] M_AXI_WID,
- output wire [C_AXI_DATA_WIDTH-1:0] M_AXI_WDATA,
- output wire [C_AXI_DATA_WIDTH/8-1:0] M_AXI_WSTRB,
- output wire M_AXI_WLAST,
- output wire [C_AXI_WUSER_WIDTH-1:0] M_AXI_WUSER,
- output wire M_AXI_WVALID,
- input wire M_AXI_WREADY,
- // Master Interface Write Response Ports
- input wire [C_AXI_ID_WIDTH-1:0] M_AXI_BID,
- input wire [2-1:0] M_AXI_BRESP,
- input wire [C_AXI_BUSER_WIDTH-1:0] M_AXI_BUSER,
- input wire M_AXI_BVALID,
- output wire M_AXI_BREADY,
- // Master Interface Read Address Port
- output wire [C_AXI_ID_WIDTH-1:0] M_AXI_ARID,
- output wire [C_AXI_ADDR_WIDTH-1:0] M_AXI_ARADDR,
- output wire [4-1:0] M_AXI_ARLEN,
- output wire [3-1:0] M_AXI_ARSIZE,
- output wire [2-1:0] M_AXI_ARBURST,
- output wire [2-1:0] M_AXI_ARLOCK,
- output wire [4-1:0] M_AXI_ARCACHE,
- output wire [3-1:0] M_AXI_ARPROT,
- output wire [C_AXI_ARUSER_WIDTH-1:0] M_AXI_ARUSER,
- output wire M_AXI_ARVALID,
- input wire M_AXI_ARREADY,
- // Master Interface Read Data Ports
- input wire [C_AXI_ID_WIDTH-1:0] M_AXI_RID,
- input wire [C_AXI_DATA_WIDTH-1:0] M_AXI_RDATA,
- input wire [2-1:0] M_AXI_RRESP,
- input wire M_AXI_RLAST,
- input wire [C_AXI_RUSER_WIDTH-1:0] M_AXI_RUSER,
- input wire M_AXI_RVALID,
- output wire M_AXI_RREADY,
-
- output wire ERROR_TRIGGER,
- output wire [C_AXI_ID_WIDTH-1:0] ERROR_TRANSACTION_ID
- );
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Functions
- /////////////////////////////////////////////////////////////////////////////
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Local params
- /////////////////////////////////////////////////////////////////////////////
-
- localparam C_FIFO_DEPTH_LOG = 4;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Internal signals
- /////////////////////////////////////////////////////////////////////////////
-
- // Internal reset.
- reg ARESET;
-
- // AW->W command queue signals.
- wire cmd_w_valid;
- wire cmd_w_check;
- wire [C_AXI_ID_WIDTH-1:0] cmd_w_id;
- wire cmd_w_ready;
-
- // W->B command queue signals.
- wire cmd_b_push;
- wire cmd_b_error;
- wire [C_AXI_ID_WIDTH-1:0] cmd_b_id;
- wire cmd_b_full;
- wire [C_FIFO_DEPTH_LOG-1:0] cmd_b_addr;
- wire cmd_b_ready;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Handle Internal Reset
- /////////////////////////////////////////////////////////////////////////////
- always @ (posedge ACLK) begin
- ARESET <= !ARESETN;
- end
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Handle Write Channels (AW/W/B)
- /////////////////////////////////////////////////////////////////////////////
-
- // Write Address Channel.
- processing_system7_v5_5_aw_atc #
- (
- .C_FAMILY (C_FAMILY),
- .C_AXI_ID_WIDTH (C_AXI_ID_WIDTH),
- .C_AXI_ADDR_WIDTH (C_AXI_ADDR_WIDTH),
- .C_AXI_AWUSER_WIDTH (C_AXI_AWUSER_WIDTH),
- .C_FIFO_DEPTH_LOG (C_FIFO_DEPTH_LOG)
- ) write_addr_inst
- (
- // Global Signals
- .ARESET (ARESET),
- .ACLK (ACLK),
-
- // Command Interface (Out)
- .cmd_w_valid (cmd_w_valid),
- .cmd_w_check (cmd_w_check),
- .cmd_w_id (cmd_w_id),
- .cmd_w_ready (cmd_w_ready),
- .cmd_b_addr (cmd_b_addr),
- .cmd_b_ready (cmd_b_ready),
-
- // Slave Interface Write Address Ports
- .S_AXI_AWID (S_AXI_AWID),
- .S_AXI_AWADDR (S_AXI_AWADDR),
- .S_AXI_AWLEN (S_AXI_AWLEN),
- .S_AXI_AWSIZE (S_AXI_AWSIZE),
- .S_AXI_AWBURST (S_AXI_AWBURST),
- .S_AXI_AWLOCK (S_AXI_AWLOCK),
- .S_AXI_AWCACHE (S_AXI_AWCACHE),
- .S_AXI_AWPROT (S_AXI_AWPROT),
- .S_AXI_AWUSER (S_AXI_AWUSER),
- .S_AXI_AWVALID (S_AXI_AWVALID),
- .S_AXI_AWREADY (S_AXI_AWREADY),
-
- // Master Interface Write Address Port
- .M_AXI_AWID (M_AXI_AWID),
- .M_AXI_AWADDR (M_AXI_AWADDR),
- .M_AXI_AWLEN (M_AXI_AWLEN),
- .M_AXI_AWSIZE (M_AXI_AWSIZE),
- .M_AXI_AWBURST (M_AXI_AWBURST),
- .M_AXI_AWLOCK (M_AXI_AWLOCK),
- .M_AXI_AWCACHE (M_AXI_AWCACHE),
- .M_AXI_AWPROT (M_AXI_AWPROT),
- .M_AXI_AWUSER (M_AXI_AWUSER),
- .M_AXI_AWVALID (M_AXI_AWVALID),
- .M_AXI_AWREADY (M_AXI_AWREADY)
- );
-
- // Write Data channel.
- processing_system7_v5_5_w_atc #
- (
- .C_FAMILY (C_FAMILY),
- .C_AXI_ID_WIDTH (C_AXI_ID_WIDTH),
- .C_AXI_DATA_WIDTH (C_AXI_DATA_WIDTH),
- .C_AXI_WUSER_WIDTH (C_AXI_WUSER_WIDTH)
- ) write_data_inst
- (
- // Global Signals
- .ARESET (ARESET),
- .ACLK (ACLK),
-
- // Command Interface (In)
- .cmd_w_valid (cmd_w_valid),
- .cmd_w_check (cmd_w_check),
- .cmd_w_id (cmd_w_id),
- .cmd_w_ready (cmd_w_ready),
-
- // Command Interface (Out)
- .cmd_b_push (cmd_b_push),
- .cmd_b_error (cmd_b_error),
- .cmd_b_id (cmd_b_id),
- .cmd_b_full (cmd_b_full),
-
- // Slave Interface Write Data Ports
- .S_AXI_WID (S_AXI_WID),
- .S_AXI_WDATA (S_AXI_WDATA),
- .S_AXI_WSTRB (S_AXI_WSTRB),
- .S_AXI_WLAST (S_AXI_WLAST),
- .S_AXI_WUSER (S_AXI_WUSER),
- .S_AXI_WVALID (S_AXI_WVALID),
- .S_AXI_WREADY (S_AXI_WREADY),
-
- // Master Interface Write Data Ports
- .M_AXI_WID (M_AXI_WID),
- .M_AXI_WDATA (M_AXI_WDATA),
- .M_AXI_WSTRB (M_AXI_WSTRB),
- .M_AXI_WLAST (M_AXI_WLAST),
- .M_AXI_WUSER (M_AXI_WUSER),
- .M_AXI_WVALID (M_AXI_WVALID),
- .M_AXI_WREADY (M_AXI_WREADY)
- );
-
- // Write Response channel.
- processing_system7_v5_5_b_atc #
- (
- .C_FAMILY (C_FAMILY),
- .C_AXI_ID_WIDTH (C_AXI_ID_WIDTH),
- .C_AXI_BUSER_WIDTH (C_AXI_BUSER_WIDTH),
- .C_FIFO_DEPTH_LOG (C_FIFO_DEPTH_LOG)
- ) write_response_inst
- (
- // Global Signals
- .ARESET (ARESET),
- .ACLK (ACLK),
-
- // Command Interface (In)
- .cmd_b_push (cmd_b_push),
- .cmd_b_error (cmd_b_error),
- .cmd_b_id (cmd_b_id),
- .cmd_b_full (cmd_b_full),
- .cmd_b_addr (cmd_b_addr),
- .cmd_b_ready (cmd_b_ready),
-
- // Slave Interface Write Response Ports
- .S_AXI_BID (S_AXI_BID),
- .S_AXI_BRESP (S_AXI_BRESP),
- .S_AXI_BUSER (S_AXI_BUSER),
- .S_AXI_BVALID (S_AXI_BVALID),
- .S_AXI_BREADY (S_AXI_BREADY),
-
- // Master Interface Write Response Ports
- .M_AXI_BID (M_AXI_BID),
- .M_AXI_BRESP (M_AXI_BRESP),
- .M_AXI_BUSER (M_AXI_BUSER),
- .M_AXI_BVALID (M_AXI_BVALID),
- .M_AXI_BREADY (M_AXI_BREADY),
-
- // Trigger detection
- .ERROR_TRIGGER (ERROR_TRIGGER),
- .ERROR_TRANSACTION_ID (ERROR_TRANSACTION_ID)
- );
-
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Handle Read Channels (AR/R)
- /////////////////////////////////////////////////////////////////////////////
- // Read Address Port
- assign M_AXI_ARID = S_AXI_ARID;
- assign M_AXI_ARADDR = S_AXI_ARADDR;
- assign M_AXI_ARLEN = S_AXI_ARLEN;
- assign M_AXI_ARSIZE = S_AXI_ARSIZE;
- assign M_AXI_ARBURST = S_AXI_ARBURST;
- assign M_AXI_ARLOCK = S_AXI_ARLOCK;
- assign M_AXI_ARCACHE = S_AXI_ARCACHE;
- assign M_AXI_ARPROT = S_AXI_ARPROT;
- assign M_AXI_ARUSER = S_AXI_ARUSER;
- assign M_AXI_ARVALID = S_AXI_ARVALID;
- assign S_AXI_ARREADY = M_AXI_ARREADY;
-
- // Read Data Port
- assign S_AXI_RID = M_AXI_RID;
- assign S_AXI_RDATA = M_AXI_RDATA;
- assign S_AXI_RRESP = M_AXI_RRESP;
- assign S_AXI_RLAST = M_AXI_RLAST;
- assign S_AXI_RUSER = M_AXI_RUSER;
- assign S_AXI_RVALID = M_AXI_RVALID;
- assign M_AXI_RREADY = S_AXI_RREADY;
-
-
-endmodule
-`default_nettype wire
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_aw_atc.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_aw_atc.v
deleted file mode 100755
index 25bbc9d..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_aw_atc.v
+++ /dev/null
@@ -1,298 +0,0 @@
-// -- (c) Copyright 2010 - 2011 Xilinx, Inc. All rights reserved.
-// --
-// -- This file contains confidential and proprietary information
-// -- of Xilinx, Inc. and is protected under U.S. and
-// -- international copyright and other intellectual property
-// -- laws.
-// --
-// -- DISCLAIMER
-// -- This disclaimer is not a license and does not grant any
-// -- rights to the materials distributed herewith. Except as
-// -- otherwise provided in a valid license issued to you by
-// -- Xilinx, and to the maximum extent permitted by applicable
-// -- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// -- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// -- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// -- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// -- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// -- (2) Xilinx shall not be liable (whether in contract or tort,
-// -- including negligence, or under any other theory of
-// -- liability) for any loss or damage of any kind or nature
-// -- related to, arising under or in connection with these
-// -- materials, including for any direct, or any indirect,
-// -- special, incidental, or consequential loss or damage
-// -- (including loss of data, profits, goodwill, or any type of
-// -- loss or damage suffered as a result of any action brought
-// -- by a third party) even if such damage or loss was
-// -- reasonably foreseeable or Xilinx had been advised of the
-// -- possibility of the same.
-// --
-// -- CRITICAL APPLICATIONS
-// -- Xilinx products are not designed or intended to be fail-
-// -- safe, or for use in any application requiring fail-safe
-// -- performance, such as life-support or safety devices or
-// -- systems, Class III medical devices, nuclear facilities,
-// -- applications related to the deployment of airbags, or any
-// -- other applications that could lead to death, personal
-// -- injury, or severe property or environmental damage
-// -- (individually and collectively, "Critical
-// -- Applications"). Customer assumes the sole risk and
-// -- liability of any use of Xilinx products in Critical
-// -- Applications, subject only to applicable laws and
-// -- regulations governing limitations on product liability.
-// --
-// -- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// -- PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-//
-// Description: Address Write Channel for ATC
-//
-//
-// Verilog-standard: Verilog 2001
-//--------------------------------------------------------------------------
-//
-// Structure:
-// aw_atc
-//
-//--------------------------------------------------------------------------
-`timescale 1ps/1ps
-
-
-module processing_system7_v5_5_aw_atc #
- (
- parameter C_FAMILY = "rtl",
- // FPGA Family. Current version: virtex6, spartan6 or later.
- parameter integer C_AXI_ID_WIDTH = 4,
- // Width of all ID signals on SI and MI side of checker.
- // Range: >= 1.
- parameter integer C_AXI_ADDR_WIDTH = 32,
- // Width of all ADDR signals on SI and MI side of checker.
- // Range: 32.
- parameter integer C_AXI_AWUSER_WIDTH = 1,
- // Width of AWUSER signals.
- // Range: >= 1.
- parameter integer C_FIFO_DEPTH_LOG = 4
- )
- (
- // Global Signals
- input wire ARESET,
- input wire ACLK,
-
- // Command Interface
- output reg cmd_w_valid,
- output wire cmd_w_check,
- output wire [C_AXI_ID_WIDTH-1:0] cmd_w_id,
- input wire cmd_w_ready,
- input wire [C_FIFO_DEPTH_LOG-1:0] cmd_b_addr,
- input wire cmd_b_ready,
-
- // Slave Interface Write Address Port
- input wire [C_AXI_ID_WIDTH-1:0] S_AXI_AWID,
- input wire [C_AXI_ADDR_WIDTH-1:0] S_AXI_AWADDR,
- input wire [4-1:0] S_AXI_AWLEN,
- input wire [3-1:0] S_AXI_AWSIZE,
- input wire [2-1:0] S_AXI_AWBURST,
- input wire [2-1:0] S_AXI_AWLOCK,
- input wire [4-1:0] S_AXI_AWCACHE,
- input wire [3-1:0] S_AXI_AWPROT,
- input wire [C_AXI_AWUSER_WIDTH-1:0] S_AXI_AWUSER,
- input wire S_AXI_AWVALID,
- output wire S_AXI_AWREADY,
-
- // Master Interface Write Address Port
- output wire [C_AXI_ID_WIDTH-1:0] M_AXI_AWID,
- output wire [C_AXI_ADDR_WIDTH-1:0] M_AXI_AWADDR,
- output wire [4-1:0] M_AXI_AWLEN,
- output wire [3-1:0] M_AXI_AWSIZE,
- output wire [2-1:0] M_AXI_AWBURST,
- output wire [2-1:0] M_AXI_AWLOCK,
- output wire [4-1:0] M_AXI_AWCACHE,
- output wire [3-1:0] M_AXI_AWPROT,
- output wire [C_AXI_AWUSER_WIDTH-1:0] M_AXI_AWUSER,
- output wire M_AXI_AWVALID,
- input wire M_AXI_AWREADY
- );
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Local params
- /////////////////////////////////////////////////////////////////////////////
-
- // Constants for burst types.
- localparam [2-1:0] C_FIX_BURST = 2'b00;
- localparam [2-1:0] C_INCR_BURST = 2'b01;
- localparam [2-1:0] C_WRAP_BURST = 2'b10;
-
- // Constants for size.
- localparam [3-1:0] C_OPTIMIZED_SIZE = 3'b011;
-
- // Constants for length.
- localparam [4-1:0] C_OPTIMIZED_LEN = 4'b0011;
-
- // Constants for cacheline address.
- localparam [4-1:0] C_NO_ADDR_OFFSET = 5'b0;
-
- // Command FIFO settings
- localparam C_FIFO_WIDTH = C_AXI_ID_WIDTH + 1;
- localparam C_FIFO_DEPTH = 2 ** C_FIFO_DEPTH_LOG;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Variables for generating parameter controlled instances.
- /////////////////////////////////////////////////////////////////////////////
-
- integer index;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Functions
- /////////////////////////////////////////////////////////////////////////////
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Internal signals
- /////////////////////////////////////////////////////////////////////////////
-
- // Transaction properties.
- wire access_is_incr;
- wire access_is_wrap;
- wire access_is_coherent;
- wire access_optimized_size;
- wire incr_addr_boundary;
- wire incr_is_optimized;
- wire wrap_is_optimized;
- wire access_is_optimized;
-
- // Command FIFO.
- wire cmd_w_push;
- reg cmd_full;
- reg [C_FIFO_DEPTH_LOG-1:0] addr_ptr;
- wire [C_FIFO_DEPTH_LOG-1:0] all_addr_ptr;
- reg [C_FIFO_WIDTH-1:0] data_srl[C_FIFO_DEPTH-1:0];
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Transaction Decode:
- //
- // Detect if transaction is of correct typ, size and length to qualify as
- // an optimized transaction that has to be checked for errors.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Transaction burst type.
- assign access_is_incr = ( S_AXI_AWBURST == C_INCR_BURST );
- assign access_is_wrap = ( S_AXI_AWBURST == C_WRAP_BURST );
-
- // Transaction has to be Coherent.
- assign access_is_coherent = ( S_AXI_AWUSER[0] == 1'b1 ) &
- ( S_AXI_AWCACHE[1] == 1'b1 );
-
- // Transaction cacheline boundary address.
- assign incr_addr_boundary = ( S_AXI_AWADDR[4:0] == C_NO_ADDR_OFFSET );
-
- // Transaction length & size.
- assign access_optimized_size = ( S_AXI_AWSIZE == C_OPTIMIZED_SIZE ) &
- ( S_AXI_AWLEN == C_OPTIMIZED_LEN );
-
- // Transaction is optimized.
- assign incr_is_optimized = access_is_incr & access_is_coherent & access_optimized_size & incr_addr_boundary;
- assign wrap_is_optimized = access_is_wrap & access_is_coherent & access_optimized_size;
- assign access_is_optimized = ( incr_is_optimized | wrap_is_optimized );
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Command FIFO:
- //
- // Since supported write interleaving is only 1, it is safe to use only a
- // simple SRL based FIFO as a command queue.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Determine when transaction infromation is pushed to the FIFO.
- assign cmd_w_push = S_AXI_AWVALID & M_AXI_AWREADY & ~cmd_full;
-
- // SRL FIFO Pointer.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- addr_ptr <= {C_FIFO_DEPTH_LOG{1'b1}};
- end else begin
- if ( cmd_w_push & ~cmd_w_ready ) begin
- addr_ptr <= addr_ptr + 1;
- end else if ( ~cmd_w_push & cmd_w_ready ) begin
- addr_ptr <= addr_ptr - 1;
- end
- end
- end
-
- // Total number of buffered commands.
- assign all_addr_ptr = addr_ptr + cmd_b_addr + 2;
-
- // FIFO Flags.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- cmd_full <= 1'b0;
- cmd_w_valid <= 1'b0;
- end else begin
- if ( cmd_w_push & ~cmd_w_ready ) begin
- cmd_w_valid <= 1'b1;
- end else if ( ~cmd_w_push & cmd_w_ready ) begin
- cmd_w_valid <= ( addr_ptr != 0 );
- end
- if ( cmd_w_push & ~cmd_b_ready ) begin
- // Going to full.
- cmd_full <= ( all_addr_ptr == C_FIFO_DEPTH-3 );
- end else if ( ~cmd_w_push & cmd_b_ready ) begin
- // Pop in middle of queue doesn't affect full status.
- cmd_full <= ( all_addr_ptr == C_FIFO_DEPTH-2 );
- end
- end
- end
-
- // Infere SRL for storage.
- always @ (posedge ACLK) begin
- if ( cmd_w_push ) begin
- for (index = 0; index < C_FIFO_DEPTH-1 ; index = index + 1) begin
- data_srl[index+1] <= data_srl[index];
- end
- data_srl[0] <= {access_is_optimized, S_AXI_AWID};
- end
- end
-
- // Get current transaction info.
- assign {cmd_w_check, cmd_w_id} = data_srl[addr_ptr];
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Transaction Throttling:
- //
- // Stall commands if FIFO is full.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Propagate masked valid.
- assign M_AXI_AWVALID = S_AXI_AWVALID & ~cmd_full;
-
- // Return ready with push back.
- assign S_AXI_AWREADY = M_AXI_AWREADY & ~cmd_full;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Address Write propagation:
- //
- // All information is simply forwarded on from the SI- to MI-Side untouched.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // 1:1 mapping.
- assign M_AXI_AWID = S_AXI_AWID;
- assign M_AXI_AWADDR = S_AXI_AWADDR;
- assign M_AXI_AWLEN = S_AXI_AWLEN;
- assign M_AXI_AWSIZE = S_AXI_AWSIZE;
- assign M_AXI_AWBURST = S_AXI_AWBURST;
- assign M_AXI_AWLOCK = S_AXI_AWLOCK;
- assign M_AXI_AWCACHE = S_AXI_AWCACHE;
- assign M_AXI_AWPROT = S_AXI_AWPROT;
- assign M_AXI_AWUSER = S_AXI_AWUSER;
-
-
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_b_atc.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_b_atc.v
deleted file mode 100755
index 36f280f..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_b_atc.v
+++ /dev/null
@@ -1,413 +0,0 @@
-// -- (c) Copyright 2010 - 2011 Xilinx, Inc. All rights reserved.
-// --
-// -- This file contains confidential and proprietary information
-// -- of Xilinx, Inc. and is protected under U.S. and
-// -- international copyright and other intellectual property
-// -- laws.
-// --
-// -- DISCLAIMER
-// -- This disclaimer is not a license and does not grant any
-// -- rights to the materials distributed herewith. Except as
-// -- otherwise provided in a valid license issued to you by
-// -- Xilinx, and to the maximum extent permitted by applicable
-// -- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// -- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// -- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// -- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// -- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// -- (2) Xilinx shall not be liable (whether in contract or tort,
-// -- including negligence, or under any other theory of
-// -- liability) for any loss or damage of any kind or nature
-// -- related to, arising under or in connection with these
-// -- materials, including for any direct, or any indirect,
-// -- special, incidental, or consequential loss or damage
-// -- (including loss of data, profits, goodwill, or any type of
-// -- loss or damage suffered as a result of any action brought
-// -- by a third party) even if such damage or loss was
-// -- reasonably foreseeable or Xilinx had been advised of the
-// -- possibility of the same.
-// --
-// -- CRITICAL APPLICATIONS
-// -- Xilinx products are not designed or intended to be fail-
-// -- safe, or for use in any application requiring fail-safe
-// -- performance, such as life-support or safety devices or
-// -- systems, Class III medical devices, nuclear facilities,
-// -- applications related to the deployment of airbags, or any
-// -- other applications that could lead to death, personal
-// -- injury, or severe property or environmental damage
-// -- (individually and collectively, "Critical
-// -- Applications"). Customer assumes the sole risk and
-// -- liability of any use of Xilinx products in Critical
-// -- Applications, subject only to applicable laws and
-// -- regulations governing limitations on product liability.
-// --
-// -- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// -- PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-//
-// Description: Write Response Channel for ATC
-//
-//
-// Verilog-standard: Verilog 2001
-//--------------------------------------------------------------------------
-//
-// Structure:
-// b_atc
-//
-//--------------------------------------------------------------------------
-`timescale 1ps/1ps
-
-
-module processing_system7_v5_5_b_atc #
- (
- parameter C_FAMILY = "rtl",
- // FPGA Family. Current version: virtex6, spartan6 or later.
- parameter integer C_AXI_ID_WIDTH = 4,
- // Width of all ID signals on SI and MI side of checker.
- // Range: >= 1.
- parameter integer C_AXI_BUSER_WIDTH = 1,
- // Width of AWUSER signals.
- // Range: >= 1.
- parameter integer C_FIFO_DEPTH_LOG = 4
- )
- (
- // Global Signals
- input wire ARESET,
- input wire ACLK,
-
- // Command Interface
- input wire cmd_b_push,
- input wire cmd_b_error,
- input wire [C_AXI_ID_WIDTH-1:0] cmd_b_id,
- output wire cmd_b_ready,
- output wire [C_FIFO_DEPTH_LOG-1:0] cmd_b_addr,
- output reg cmd_b_full,
-
- // Slave Interface Write Response Ports
- output wire [C_AXI_ID_WIDTH-1:0] S_AXI_BID,
- output reg [2-1:0] S_AXI_BRESP,
- output wire [C_AXI_BUSER_WIDTH-1:0] S_AXI_BUSER,
- output wire S_AXI_BVALID,
- input wire S_AXI_BREADY,
-
- // Master Interface Write Response Ports
- input wire [C_AXI_ID_WIDTH-1:0] M_AXI_BID,
- input wire [2-1:0] M_AXI_BRESP,
- input wire [C_AXI_BUSER_WIDTH-1:0] M_AXI_BUSER,
- input wire M_AXI_BVALID,
- output wire M_AXI_BREADY,
-
- // Trigger detection
- output reg ERROR_TRIGGER,
- output reg [C_AXI_ID_WIDTH-1:0] ERROR_TRANSACTION_ID
- );
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Local params
- /////////////////////////////////////////////////////////////////////////////
-
- // Constants for packing levels.
- localparam [2-1:0] C_RESP_OKAY = 2'b00;
- localparam [2-1:0] C_RESP_EXOKAY = 2'b01;
- localparam [2-1:0] C_RESP_SLVERROR = 2'b10;
- localparam [2-1:0] C_RESP_DECERR = 2'b11;
-
- // Command FIFO settings
- localparam C_FIFO_WIDTH = C_AXI_ID_WIDTH + 1;
- localparam C_FIFO_DEPTH = 2 ** C_FIFO_DEPTH_LOG;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Variables for generating parameter controlled instances.
- /////////////////////////////////////////////////////////////////////////////
-
- integer index;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Functions
- /////////////////////////////////////////////////////////////////////////////
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Internal signals
- /////////////////////////////////////////////////////////////////////////////
-
- // Command Queue.
- reg [C_FIFO_DEPTH_LOG-1:0] addr_ptr;
- reg [C_FIFO_WIDTH-1:0] data_srl[C_FIFO_DEPTH-1:0];
- reg cmd_b_valid;
- wire cmd_b_ready_i;
- wire inject_error;
- wire [C_AXI_ID_WIDTH-1:0] current_id;
-
- // Search command.
- wire found_match;
- wire use_match;
- wire matching_id;
-
- // Manage valid command.
- wire write_valid_cmd;
- reg [C_FIFO_DEPTH-2:0] valid_cmd;
- reg [C_FIFO_DEPTH-2:0] updated_valid_cmd;
- reg [C_FIFO_DEPTH-2:0] next_valid_cmd;
- reg [C_FIFO_DEPTH_LOG-1:0] search_addr_ptr;
- reg [C_FIFO_DEPTH_LOG-1:0] collapsed_addr_ptr;
-
- // Pipelined data
- reg [C_AXI_ID_WIDTH-1:0] M_AXI_BID_I;
- reg [2-1:0] M_AXI_BRESP_I;
- reg [C_AXI_BUSER_WIDTH-1:0] M_AXI_BUSER_I;
- reg M_AXI_BVALID_I;
- wire M_AXI_BREADY_I;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Command Queue:
- //
- // Keep track of depth of Queue to generate full flag.
- //
- // Also generate valid to mark pressence of commands in Queue.
- //
- // Maintain Queue and extract data from currently searched entry.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // SRL FIFO Pointer.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- addr_ptr <= {C_FIFO_DEPTH_LOG{1'b1}};
- end else begin
- if ( cmd_b_push & ~cmd_b_ready_i ) begin
- // Pushing data increase length/addr.
- addr_ptr <= addr_ptr + 1;
- end else if ( cmd_b_ready_i ) begin
- // Collapse addr when data is popped.
- addr_ptr <= collapsed_addr_ptr;
- end
- end
- end
-
- // FIFO Flags.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- cmd_b_full <= 1'b0;
- cmd_b_valid <= 1'b0;
- end else begin
- if ( cmd_b_push & ~cmd_b_ready_i ) begin
- cmd_b_full <= ( addr_ptr == C_FIFO_DEPTH-3 );
- cmd_b_valid <= 1'b1;
- end else if ( ~cmd_b_push & cmd_b_ready_i ) begin
- cmd_b_full <= 1'b0;
- cmd_b_valid <= ( collapsed_addr_ptr != C_FIFO_DEPTH-1 );
- end
- end
- end
-
- // Infere SRL for storage.
- always @ (posedge ACLK) begin
- if ( cmd_b_push ) begin
- for (index = 0; index < C_FIFO_DEPTH-1 ; index = index + 1) begin
- data_srl[index+1] <= data_srl[index];
- end
- data_srl[0] <= {cmd_b_error, cmd_b_id};
- end
- end
-
- // Get current transaction info.
- assign {inject_error, current_id} = data_srl[search_addr_ptr];
-
- // Assign outputs.
- assign cmd_b_addr = collapsed_addr_ptr;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Search Command Queue:
- //
- // Search for matching valid command in queue.
- //
- // A command is found when an valid entry with correct ID is found. The queue
- // is search from the oldest entry, i.e. from a high value.
- // When new commands are pushed the search address has to be updated to always
- // start the search from the oldest available.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Handle search addr.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- search_addr_ptr <= {C_FIFO_DEPTH_LOG{1'b1}};
- end else begin
- if ( cmd_b_ready_i ) begin
- // Collapse addr when data is popped.
- search_addr_ptr <= collapsed_addr_ptr;
-
- end else if ( M_AXI_BVALID_I & cmd_b_valid & ~found_match & ~cmd_b_push ) begin
- // Skip non valid command.
- search_addr_ptr <= search_addr_ptr - 1;
-
- end else if ( cmd_b_push ) begin
- search_addr_ptr <= search_addr_ptr + 1;
-
- end
- end
- end
-
- // Check if searched command is valid and match ID (for existing response on MI side).
- assign matching_id = ( M_AXI_BID_I == current_id );
- assign found_match = valid_cmd[search_addr_ptr] & matching_id & M_AXI_BVALID_I;
- assign use_match = found_match & S_AXI_BREADY;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Track Used Commands:
- //
- // Actions that affect Valid Command:
- // * When a new command is pushed
- // => Shift valid vector one step
- // * When a command is used
- // => Clear corresponding valid bit
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Valid command status is updated when a command is used or a new one is pushed.
- assign write_valid_cmd = cmd_b_push | cmd_b_ready_i;
-
- // Update the used command valid bit.
- always @ *
- begin
- updated_valid_cmd = valid_cmd;
- updated_valid_cmd[search_addr_ptr] = ~use_match;
- end
-
- // Shift valid vector when command is pushed.
- always @ *
- begin
- if ( cmd_b_push ) begin
- next_valid_cmd = {updated_valid_cmd[C_FIFO_DEPTH-3:0], 1'b1};
- end else begin
- next_valid_cmd = updated_valid_cmd;
- end
- end
-
- // Valid signals for next cycle.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- valid_cmd <= {C_FIFO_WIDTH{1'b0}};
- end else if ( write_valid_cmd ) begin
- valid_cmd <= next_valid_cmd;
- end
- end
-
- // Detect oldest available command in Queue.
- always @ *
- begin
- // Default to empty.
- collapsed_addr_ptr = {C_FIFO_DEPTH_LOG{1'b1}};
-
- for (index = 0; index < C_FIFO_DEPTH-2 ; index = index + 1) begin
- if ( next_valid_cmd[index] ) begin
- collapsed_addr_ptr = index;
- end
- end
- end
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Pipe incoming data:
- //
- // The B channel is piped to improve timing and avoid impact in search
- // mechanism due to late arriving signals.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Clock data.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- M_AXI_BID_I <= {C_AXI_ID_WIDTH{1'b0}};
- M_AXI_BRESP_I <= 2'b00;
- M_AXI_BUSER_I <= {C_AXI_BUSER_WIDTH{1'b0}};
- M_AXI_BVALID_I <= 1'b0;
- end else begin
- if ( M_AXI_BREADY_I | ~M_AXI_BVALID_I ) begin
- M_AXI_BVALID_I <= 1'b0;
- end
- if (M_AXI_BVALID & ( M_AXI_BREADY_I | ~M_AXI_BVALID_I) ) begin
- M_AXI_BID_I <= M_AXI_BID;
- M_AXI_BRESP_I <= M_AXI_BRESP;
- M_AXI_BUSER_I <= M_AXI_BUSER;
- M_AXI_BVALID_I <= 1'b1;
- end
- end
- end
-
- // Generate ready to get new transaction.
- assign M_AXI_BREADY = M_AXI_BREADY_I | ~M_AXI_BVALID_I;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Inject Error:
- //
- // BRESP is modified according to command information.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Inject error in response.
- always @ *
- begin
- if ( inject_error ) begin
- S_AXI_BRESP = C_RESP_SLVERROR;
- end else begin
- S_AXI_BRESP = M_AXI_BRESP_I;
- end
- end
-
- // Handle interrupt generation.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- ERROR_TRIGGER <= 1'b0;
- ERROR_TRANSACTION_ID <= {C_AXI_ID_WIDTH{1'b0}};
- end else begin
- if ( inject_error & cmd_b_ready_i ) begin
- ERROR_TRIGGER <= 1'b1;
- ERROR_TRANSACTION_ID <= M_AXI_BID_I;
- end else begin
- ERROR_TRIGGER <= 1'b0;
- end
- end
- end
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Transaction Throttling:
- //
- // Response is passed forward when a matching entry has been found in queue.
- // Both ready and valid are set when the command is completed.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Propagate masked valid.
- assign S_AXI_BVALID = M_AXI_BVALID_I & cmd_b_valid & found_match;
-
- // Return ready with push back.
- assign M_AXI_BREADY_I = cmd_b_valid & use_match;
-
- // Command has been handled.
- assign cmd_b_ready_i = M_AXI_BVALID_I & cmd_b_valid & use_match;
- assign cmd_b_ready = cmd_b_ready_i;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Write Response Propagation:
- //
- // All information is simply forwarded on from MI- to SI-Side untouched.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // 1:1 mapping.
- assign S_AXI_BID = M_AXI_BID_I;
- assign S_AXI_BUSER = M_AXI_BUSER_I;
-
-
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_trace_buffer.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_trace_buffer.v
deleted file mode 100755
index 0c776b3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_trace_buffer.v
+++ /dev/null
@@ -1,310 +0,0 @@
-// -- (c) Copyright 2009 - 2011 Xilinx, Inc. All rights reserved.
-// --
-// -- This file contains confidential and proprietary information
-// -- of Xilinx, Inc. and is protected under U.S. and
-// -- international copyright and other intellectual property
-// -- laws.
-// --
-// -- DISCLAIMER
-// -- This disclaimer is not a license and does not grant any
-// -- rights to the materials distributed herewith. Except as
-// -- otherwise provided in a valid license issued to you by
-// -- Xilinx, and to the maximum extent permitted by applicable
-// -- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// -- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// -- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// -- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// -- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// -- (2) Xilinx shall not be liable (whether in contract or tort,
-// -- including negligence, or under any other theory of
-// -- liability) for any loss or damage of any kind or nature
-// -- related to, arising under or in connection with these
-// -- materials, including for any direct, or any indirect,
-// -- special, incidental, or consequential loss or damage
-// -- (including loss of data, profits, goodwill, or any type of
-// -- loss or damage suffered as a result of any action brought
-// -- by a third party) even if such damage or loss was
-// -- reasonably foreseeable or Xilinx had been advised of the
-// -- possibility of the same.
-// --
-// -- CRITICAL APPLICATIONS
-// -- Xilinx products are not designed or intended to be fail-
-// -- safe, or for use in any application requiring fail-safe
-// -- performance, such as life-support or safety devices or
-// -- systems, Class III medical devices, nuclear facilities,
-// -- applications related to the deployment of airbags, or any
-// -- other applications that could lead to death, personal
-// -- injury, or severe property or environmental damage
-// -- (individually and collectively, "Critical
-// -- Applications"). Customer assumes the sole risk and
-// -- liability of any use of Xilinx products in Critical
-// -- Applications, subject only to applicable laws and
-// -- regulations governing limitations on product liability.
-// --
-// -- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// -- PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-// Filename: trace_buffer.v
-// Description: Trace port buffer
-//-----------------------------------------------------------------------------
-// Structure: This section shows the hierarchical structure of
-// pss_wrapper.
-//
-// --processing_system7
-// |
-// --trace_buffer
-//-----------------------------------------------------------------------------
-
-
-module processing_system7_v5_5_trace_buffer #
- (
- parameter integer FIFO_SIZE = 128,
- parameter integer USE_TRACE_DATA_EDGE_DETECTOR = 0,
- parameter integer C_DELAY_CLKS = 12
- )
- (
- input wire TRACE_CLK,
- input wire RST,
- input wire TRACE_VALID_IN,
- input wire [3:0] TRACE_ATID_IN,
- input wire [31:0] TRACE_DATA_IN,
- output wire TRACE_VALID_OUT,
- output wire [3:0] TRACE_ATID_OUT,
- output wire [31:0] TRACE_DATA_OUT
- );
-
-//------------------------------------------------------------
-// Architecture section
-//------------------------------------------------------------
-
-// function called clogb2 that returns an integer which has the
-// value of the ceiling of the log base 2.
-
-function integer clogb2 (input integer bit_depth);
- integer i;
- integer temp_log;
- begin
- temp_log = 0;
- for(i=bit_depth; i > 0; i = i>>1)
- clogb2 = temp_log;
- temp_log=temp_log+1;
- end
-endfunction
-
-localparam DEPTH = clogb2(FIFO_SIZE-1);
-
-wire [31:0] reset_zeros;
-reg [31:0] trace_pedge; // write enable for FIFO
-reg [31:0] ti;
-reg [31:0] tom;
-
-reg [3:0] atid;
-
-reg [31:0] trace_fifo [FIFO_SIZE-1:0];//Memory
-
-reg [4:0] dly_ctr;
-reg [DEPTH-1:0] fifo_wp;
-reg [DEPTH-1:0] fifo_rp;
-
-reg fifo_re;
-wire fifo_empty;
-wire fifo_full;
-reg fifo_full_reg;
-
-assign reset_zeros = 32'h0;
-
-
-// Pipeline Stage for Traceport ATID ports
- always @(posedge TRACE_CLK) begin
- // process pedge_ti
- // rising clock edge
- if((RST == 1'b1)) begin
- atid <= reset_zeros;
- end
- else begin
- atid <= TRACE_ATID_IN;
- end
- end
-
- assign TRACE_ATID_OUT = atid;
-
- /////////////////////////////////////////////
- // Generate FIFO data based on TRACE_VALID_IN
- /////////////////////////////////////////////
- generate
- if (USE_TRACE_DATA_EDGE_DETECTOR == 0) begin : gen_no_data_edge_detector
- /////////////////////////////////////////////
-
- // memory update process
- // Update memory when positive edge detected and FIFO not full
- always @(posedge TRACE_CLK) begin
- if (TRACE_VALID_IN == 1'b1 && fifo_full_reg != 1'b1) begin
- trace_fifo[fifo_wp] <= TRACE_DATA_IN;
- end
- end
-
- // fifo write pointer
- always @(posedge TRACE_CLK) begin
- // process
- if(RST == 1'b1) begin
- fifo_wp <= {DEPTH{1'b0}};
- end
- else if(TRACE_VALID_IN ) begin
- if(fifo_wp == (FIFO_SIZE - 1)) begin
- if (fifo_empty) begin
- fifo_wp <= {DEPTH{1'b0}};
- end
- end
- else begin
- fifo_wp <= fifo_wp + 1;
- end
- end
- end
-
-
- /////////////////////////////////////////////
- // Generate FIFO data based on data edge
- /////////////////////////////////////////////
- end else begin : gen_data_edge_detector
- /////////////////////////////////////////////
-
-
- // purpose: check for pos edge on any trace input
- always @(posedge TRACE_CLK) begin
- // process pedge_ti
- // rising clock edge
- if((RST == 1'b1)) begin
- ti <= reset_zeros;
- trace_pedge <= reset_zeros;
- end
- else begin
- ti <= TRACE_DATA_IN;
- trace_pedge <= (~ti & TRACE_DATA_IN);
- //trace_pedge <= ((~ti ^ TRACE_DATA_IN)) & ~ti;
- // posedge only
- end
- end
-
- // memory update process
- // Update memory when positive edge detected and FIFO not full
- always @(posedge TRACE_CLK) begin
- if(|(trace_pedge) == 1'b1 && fifo_full_reg != 1'b1) begin
- trace_fifo[fifo_wp] <= trace_pedge;
- end
- end
-
- // fifo write pointer
- always @(posedge TRACE_CLK) begin
- // process
- if(RST == 1'b1) begin
- fifo_wp <= {DEPTH{1'b0}};
- end
- else if(|(trace_pedge) == 1'b1) begin
- if(fifo_wp == (FIFO_SIZE - 1)) begin
- if (fifo_empty) begin
- fifo_wp <= {DEPTH{1'b0}};
- end
- end
- else begin
- fifo_wp <= fifo_wp + 1;
- end
- end
- end
-
-
- end
- endgenerate
-
-
- always @(posedge TRACE_CLK) begin
- tom <= trace_fifo[fifo_rp] ;
- end
-
-
-// // fifo write pointer
-// always @(posedge TRACE_CLK) begin
-// // process
-// if(RST == 1'b1) begin
-// fifo_wp <= {DEPTH{1'b0}};
-// end
-// else if(|(trace_pedge) == 1'b1) begin
-// if(fifo_wp == (FIFO_SIZE - 1)) begin
-// fifo_wp <= {DEPTH{1'b0}};
-// end
-// else begin
-// fifo_wp <= fifo_wp + 1;
-// end
-// end
-// end
-
-
- // fifo read pointer update
- always @(posedge TRACE_CLK) begin
- if(RST == 1'b1) begin
- fifo_rp <= {DEPTH{1'b0}};
- fifo_re <= 1'b0;
- end
- else if(fifo_empty != 1'b1 && dly_ctr == 5'b00000 && fifo_re == 1'b0) begin
- fifo_re <= 1'b1;
- if(fifo_rp == (FIFO_SIZE - 1)) begin
- fifo_rp <= {DEPTH{1'b0}};
- end
- else begin
- fifo_rp <= fifo_rp + 1;
- end
- end
- else begin
- fifo_re <= 1'b0;
- end
- end
-
- // delay counter update
- always @(posedge TRACE_CLK) begin
- if(RST == 1'b1) begin
- dly_ctr <= 5'h0;
- end
- else if (fifo_re == 1'b1) begin
- dly_ctr <= C_DELAY_CLKS-1;
- end
- else if(dly_ctr != 5'h0) begin
- dly_ctr <= dly_ctr - 1;
- end
- end
-
- // fifo empty update
- assign fifo_empty = (fifo_wp == fifo_rp) ? 1'b1 : 1'b0;
-
- // fifo full update
- assign fifo_full = (fifo_wp == FIFO_SIZE-1)? 1'b1 : 1'b0;
-
- always @(posedge TRACE_CLK) begin
- if(RST == 1'b1) begin
- fifo_full_reg <= 1'b0;
- end
- else if (fifo_empty) begin
- fifo_full_reg <= 1'b0;
- end else begin
- fifo_full_reg <= fifo_full;
- end
- end
-
-// always @(posedge TRACE_CLK) begin
-// if(RST == 1'b1) begin
-// fifo_full_reg <= 1'b0;
-// end
-// else if ((fifo_wp == FIFO_SIZE-1) && (|(trace_pedge) == 1'b1)) begin
-// fifo_full_reg <= 1'b1;
-// end
-// else begin
-// fifo_full_reg <= 1'b0;
-// end
-// end
-//
- assign TRACE_DATA_OUT = tom;
-
- assign TRACE_VALID_OUT = fifo_re;
-
-
-
-
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_w_atc.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_w_atc.v
deleted file mode 100755
index 8b19a70..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/8fd3/hdl/verilog/processing_system7_v5_5_w_atc.v
+++ /dev/null
@@ -1,244 +0,0 @@
-// -- (c) Copyright 2010 - 2011 Xilinx, Inc. All rights reserved.
-// --
-// -- This file contains confidential and proprietary information
-// -- of Xilinx, Inc. and is protected under U.S. and
-// -- international copyright and other intellectual property
-// -- laws.
-// --
-// -- DISCLAIMER
-// -- This disclaimer is not a license and does not grant any
-// -- rights to the materials distributed herewith. Except as
-// -- otherwise provided in a valid license issued to you by
-// -- Xilinx, and to the maximum extent permitted by applicable
-// -- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// -- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// -- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// -- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// -- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// -- (2) Xilinx shall not be liable (whether in contract or tort,
-// -- including negligence, or under any other theory of
-// -- liability) for any loss or damage of any kind or nature
-// -- related to, arising under or in connection with these
-// -- materials, including for any direct, or any indirect,
-// -- special, incidental, or consequential loss or damage
-// -- (including loss of data, profits, goodwill, or any type of
-// -- loss or damage suffered as a result of any action brought
-// -- by a third party) even if such damage or loss was
-// -- reasonably foreseeable or Xilinx had been advised of the
-// -- possibility of the same.
-// --
-// -- CRITICAL APPLICATIONS
-// -- Xilinx products are not designed or intended to be fail-
-// -- safe, or for use in any application requiring fail-safe
-// -- performance, such as life-support or safety devices or
-// -- systems, Class III medical devices, nuclear facilities,
-// -- applications related to the deployment of airbags, or any
-// -- other applications that could lead to death, personal
-// -- injury, or severe property or environmental damage
-// -- (individually and collectively, "Critical
-// -- Applications"). Customer assumes the sole risk and
-// -- liability of any use of Xilinx products in Critical
-// -- Applications, subject only to applicable laws and
-// -- regulations governing limitations on product liability.
-// --
-// -- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// -- PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-//
-// Description: Write Channel for ATC
-//
-//
-// Verilog-standard: Verilog 2001
-//--------------------------------------------------------------------------
-//
-// Structure:
-// w_atc
-//
-//--------------------------------------------------------------------------
-`timescale 1ps/1ps
-
-
-module processing_system7_v5_5_w_atc #
- (
- parameter C_FAMILY = "rtl",
- // FPGA Family. Current version: virtex6, spartan6 or later.
- parameter integer C_AXI_ID_WIDTH = 4,
- // Width of all ID signals on SI and MI side of checker.
- // Range: >= 1.
- parameter integer C_AXI_DATA_WIDTH = 64,
- // Width of all DATA signals on SI and MI side of checker.
- // Range: 64.
- parameter integer C_AXI_WUSER_WIDTH = 1
- // Width of AWUSER signals.
- // Range: >= 1.
- )
- (
- // Global Signals
- input wire ARESET,
- input wire ACLK,
-
- // Command Interface (In)
- input wire cmd_w_valid,
- input wire cmd_w_check,
- input wire [C_AXI_ID_WIDTH-1:0] cmd_w_id,
- output wire cmd_w_ready,
-
- // Command Interface (Out)
- output wire cmd_b_push,
- output wire cmd_b_error,
- output reg [C_AXI_ID_WIDTH-1:0] cmd_b_id,
- input wire cmd_b_full,
-
- // Slave Interface Write Port
- input wire [C_AXI_ID_WIDTH-1:0] S_AXI_WID,
- input wire [C_AXI_DATA_WIDTH-1:0] S_AXI_WDATA,
- input wire [C_AXI_DATA_WIDTH/8-1:0] S_AXI_WSTRB,
- input wire S_AXI_WLAST,
- input wire [C_AXI_WUSER_WIDTH-1:0] S_AXI_WUSER,
- input wire S_AXI_WVALID,
- output wire S_AXI_WREADY,
-
- // Master Interface Write Address Port
- output wire [C_AXI_ID_WIDTH-1:0] M_AXI_WID,
- output wire [C_AXI_DATA_WIDTH-1:0] M_AXI_WDATA,
- output wire [C_AXI_DATA_WIDTH/8-1:0] M_AXI_WSTRB,
- output wire M_AXI_WLAST,
- output wire [C_AXI_WUSER_WIDTH-1:0] M_AXI_WUSER,
- output wire M_AXI_WVALID,
- input wire M_AXI_WREADY
- );
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Local params
- /////////////////////////////////////////////////////////////////////////////
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Variables for generating parameter controlled instances.
- /////////////////////////////////////////////////////////////////////////////
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Functions
- /////////////////////////////////////////////////////////////////////////////
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Internal signals
- /////////////////////////////////////////////////////////////////////////////
-
- // Detecttion.
- wire any_strb_deasserted;
- wire incoming_strb_issue;
- reg first_word;
- reg strb_issue;
-
- // Data flow.
- wire data_pop;
- wire cmd_b_push_blocked;
- reg cmd_b_push_i;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Detect error:
- //
- // Detect and accumulate error when a transaction shall be scanned for
- // potential issues.
- // Accumulation of error is restarted for each ne transaction.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Check stobe information
- assign any_strb_deasserted = ( S_AXI_WSTRB != {C_AXI_DATA_WIDTH/8{1'b1}} );
- assign incoming_strb_issue = cmd_w_valid & S_AXI_WVALID & cmd_w_check & any_strb_deasserted;
-
- // Keep track of first word in a transaction.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- first_word <= 1'b1;
- end else if ( data_pop ) begin
- first_word <= S_AXI_WLAST;
- end
- end
-
- // Keep track of error status.
- always @ (posedge ACLK) begin
- if (ARESET) begin
- strb_issue <= 1'b0;
- cmd_b_id <= {C_AXI_ID_WIDTH{1'b0}};
- end else if ( data_pop ) begin
- if ( first_word ) begin
- strb_issue <= incoming_strb_issue;
- end else begin
- strb_issue <= incoming_strb_issue | strb_issue;
- end
- cmd_b_id <= cmd_w_id;
- end
- end
-
- assign cmd_b_error = strb_issue;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Control command queue to B:
- //
- // Push command to B queue when all data for the transaction has flowed
- // through.
- // Delay pipelined command until there is room in the Queue.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Detect when data is popped.
- assign data_pop = S_AXI_WVALID & M_AXI_WREADY & cmd_w_valid & ~cmd_b_full & ~cmd_b_push_blocked;
-
- // Push command when last word in transfered (pipelined).
- always @ (posedge ACLK) begin
- if (ARESET) begin
- cmd_b_push_i <= 1'b0;
- end else begin
- cmd_b_push_i <= ( S_AXI_WLAST & data_pop ) | cmd_b_push_blocked;
- end
- end
-
- // Detect if pipelined push is blocked.
- assign cmd_b_push_blocked = cmd_b_push_i & cmd_b_full;
-
- // Assign output.
- assign cmd_b_push = cmd_b_push_i & ~cmd_b_full;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Transaction Throttling:
- //
- // Stall commands if FIFO is full or there is no valid command information
- // from AW.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // Propagate masked valid.
- assign M_AXI_WVALID = S_AXI_WVALID & cmd_w_valid & ~cmd_b_full & ~cmd_b_push_blocked;
-
- // Return ready with push back.
- assign S_AXI_WREADY = M_AXI_WREADY & cmd_w_valid & ~cmd_b_full & ~cmd_b_push_blocked;
-
- // End of burst.
- assign cmd_w_ready = S_AXI_WVALID & M_AXI_WREADY & cmd_w_valid & ~cmd_b_full & ~cmd_b_push_blocked & S_AXI_WLAST;
-
-
- /////////////////////////////////////////////////////////////////////////////
- // Write propagation:
- //
- // All information is simply forwarded on from the SI- to MI-Side untouched.
- //
- /////////////////////////////////////////////////////////////////////////////
-
- // 1:1 mapping.
- assign M_AXI_WID = S_AXI_WID;
- assign M_AXI_WDATA = S_AXI_WDATA;
- assign M_AXI_WSTRB = S_AXI_WSTRB;
- assign M_AXI_WLAST = S_AXI_WLAST;
- assign M_AXI_WUSER = S_AXI_WUSER;
-
-
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v
deleted file mode 100755
index d6ec7f8..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v
+++ /dev/null
@@ -1,670 +0,0 @@
-// (c) Copyright 2012 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-//
-// axis to vector
-// A generic module to merge all axi signals into one signal called payload.
-// This is strictly wires, so no clk, reset, aclken, valid/ready are required.
-//
-// Verilog-standard: Verilog 2001
-//--------------------------------------------------------------------------
-//
-
-`timescale 1ps/1ps
-`default_nettype none
-
-(* DowngradeIPIdentifiedWarnings="yes" *)
-module axi_infrastructure_v1_1_0_axi2vector #
-(
-///////////////////////////////////////////////////////////////////////////////
-// Parameter Definitions
-///////////////////////////////////////////////////////////////////////////////
- parameter integer C_AXI_PROTOCOL = 0,
- parameter integer C_AXI_ID_WIDTH = 4,
- parameter integer C_AXI_ADDR_WIDTH = 32,
- parameter integer C_AXI_DATA_WIDTH = 32,
- parameter integer C_AXI_SUPPORTS_USER_SIGNALS = 0,
- parameter integer C_AXI_SUPPORTS_REGION_SIGNALS = 0,
- parameter integer C_AXI_AWUSER_WIDTH = 1,
- parameter integer C_AXI_WUSER_WIDTH = 1,
- parameter integer C_AXI_BUSER_WIDTH = 1,
- parameter integer C_AXI_ARUSER_WIDTH = 1,
- parameter integer C_AXI_RUSER_WIDTH = 1,
- parameter integer C_AWPAYLOAD_WIDTH = 61,
- parameter integer C_WPAYLOAD_WIDTH = 73,
- parameter integer C_BPAYLOAD_WIDTH = 6,
- parameter integer C_ARPAYLOAD_WIDTH = 61,
- parameter integer C_RPAYLOAD_WIDTH = 69
-)
-(
-///////////////////////////////////////////////////////////////////////////////
-// Port Declarations
-///////////////////////////////////////////////////////////////////////////////
- // Slave Interface Write Address Ports
- input wire [C_AXI_ID_WIDTH-1:0] s_axi_awid,
- input wire [C_AXI_ADDR_WIDTH-1:0] s_axi_awaddr,
- input wire [((C_AXI_PROTOCOL == 1) ? 4 : 8)-1:0] s_axi_awlen,
- input wire [3-1:0] s_axi_awsize,
- input wire [2-1:0] s_axi_awburst,
- input wire [((C_AXI_PROTOCOL == 1) ? 2 : 1)-1:0] s_axi_awlock,
- input wire [4-1:0] s_axi_awcache,
- input wire [3-1:0] s_axi_awprot,
- input wire [4-1:0] s_axi_awregion,
- input wire [4-1:0] s_axi_awqos,
- input wire [C_AXI_AWUSER_WIDTH-1:0] s_axi_awuser,
-
- // Slave Interface Write Data Ports
- input wire [C_AXI_ID_WIDTH-1:0] s_axi_wid,
- input wire [C_AXI_DATA_WIDTH-1:0] s_axi_wdata,
- input wire [C_AXI_DATA_WIDTH/8-1:0] s_axi_wstrb,
- input wire s_axi_wlast,
- input wire [C_AXI_WUSER_WIDTH-1:0] s_axi_wuser,
-
- // Slave Interface Write Response Ports
- output wire [C_AXI_ID_WIDTH-1:0] s_axi_bid,
- output wire [2-1:0] s_axi_bresp,
- output wire [C_AXI_BUSER_WIDTH-1:0] s_axi_buser,
-
- // Slave Interface Read Address Ports
- input wire [C_AXI_ID_WIDTH-1:0] s_axi_arid,
- input wire [C_AXI_ADDR_WIDTH-1:0] s_axi_araddr,
- input wire [((C_AXI_PROTOCOL == 1) ? 4 : 8)-1:0] s_axi_arlen,
- input wire [3-1:0] s_axi_arsize,
- input wire [2-1:0] s_axi_arburst,
- input wire [((C_AXI_PROTOCOL == 1) ? 2 : 1)-1:0] s_axi_arlock,
- input wire [4-1:0] s_axi_arcache,
- input wire [3-1:0] s_axi_arprot,
- input wire [4-1:0] s_axi_arregion,
- input wire [4-1:0] s_axi_arqos,
- input wire [C_AXI_ARUSER_WIDTH-1:0] s_axi_aruser,
-
- // Slave Interface Read Data Ports
- output wire [C_AXI_ID_WIDTH-1:0] s_axi_rid,
- output wire [C_AXI_DATA_WIDTH-1:0] s_axi_rdata,
- output wire [2-1:0] s_axi_rresp,
- output wire s_axi_rlast,
- output wire [C_AXI_RUSER_WIDTH-1:0] s_axi_ruser,
-
- // payloads
- output wire [C_AWPAYLOAD_WIDTH-1:0] s_awpayload,
- output wire [C_WPAYLOAD_WIDTH-1:0] s_wpayload,
- input wire [C_BPAYLOAD_WIDTH-1:0] s_bpayload,
- output wire [C_ARPAYLOAD_WIDTH-1:0] s_arpayload,
- input wire [C_RPAYLOAD_WIDTH-1:0] s_rpayload
-);
-
-////////////////////////////////////////////////////////////////////////////////
-// Functions
-////////////////////////////////////////////////////////////////////////////////
-`include "axi_infrastructure_v1_1_0.vh"
-
-////////////////////////////////////////////////////////////////////////////////
-// Local parameters
-////////////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////////////
-// Wires/Reg declarations
-////////////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////////////
-// BEGIN RTL
-////////////////////////////////////////////////////////////////////////////////
-
-// AXI4, AXI4LITE, AXI3 packing
-assign s_awpayload[G_AXI_AWADDR_INDEX+:G_AXI_AWADDR_WIDTH] = s_axi_awaddr;
-assign s_awpayload[G_AXI_AWPROT_INDEX+:G_AXI_AWPROT_WIDTH] = s_axi_awprot;
-
-assign s_wpayload[G_AXI_WDATA_INDEX+:G_AXI_WDATA_WIDTH] = s_axi_wdata;
-assign s_wpayload[G_AXI_WSTRB_INDEX+:G_AXI_WSTRB_WIDTH] = s_axi_wstrb;
-
-assign s_axi_bresp = s_bpayload[G_AXI_BRESP_INDEX+:G_AXI_BRESP_WIDTH];
-
-assign s_arpayload[G_AXI_ARADDR_INDEX+:G_AXI_ARADDR_WIDTH] = s_axi_araddr;
-assign s_arpayload[G_AXI_ARPROT_INDEX+:G_AXI_ARPROT_WIDTH] = s_axi_arprot;
-
-assign s_axi_rdata = s_rpayload[G_AXI_RDATA_INDEX+:G_AXI_RDATA_WIDTH];
-assign s_axi_rresp = s_rpayload[G_AXI_RRESP_INDEX+:G_AXI_RRESP_WIDTH];
-
-generate
- if (C_AXI_PROTOCOL == 0 || C_AXI_PROTOCOL == 1) begin : gen_axi4_or_axi3_packing
- assign s_awpayload[G_AXI_AWSIZE_INDEX+:G_AXI_AWSIZE_WIDTH] = s_axi_awsize;
- assign s_awpayload[G_AXI_AWBURST_INDEX+:G_AXI_AWBURST_WIDTH] = s_axi_awburst;
- assign s_awpayload[G_AXI_AWCACHE_INDEX+:G_AXI_AWCACHE_WIDTH] = s_axi_awcache;
- assign s_awpayload[G_AXI_AWLEN_INDEX+:G_AXI_AWLEN_WIDTH] = s_axi_awlen;
- assign s_awpayload[G_AXI_AWLOCK_INDEX+:G_AXI_AWLOCK_WIDTH] = s_axi_awlock;
- assign s_awpayload[G_AXI_AWID_INDEX+:G_AXI_AWID_WIDTH] = s_axi_awid;
- assign s_awpayload[G_AXI_AWQOS_INDEX+:G_AXI_AWQOS_WIDTH] = s_axi_awqos;
-
- assign s_wpayload[G_AXI_WLAST_INDEX+:G_AXI_WLAST_WIDTH] = s_axi_wlast;
- if (C_AXI_PROTOCOL == 1) begin : gen_axi3_wid_packing
- assign s_wpayload[G_AXI_WID_INDEX+:G_AXI_WID_WIDTH] = s_axi_wid;
- end
- else begin : gen_no_axi3_wid_packing
- end
-
- assign s_axi_bid = s_bpayload[G_AXI_BID_INDEX+:G_AXI_BID_WIDTH];
-
- assign s_arpayload[G_AXI_ARSIZE_INDEX+:G_AXI_ARSIZE_WIDTH] = s_axi_arsize;
- assign s_arpayload[G_AXI_ARBURST_INDEX+:G_AXI_ARBURST_WIDTH] = s_axi_arburst;
- assign s_arpayload[G_AXI_ARCACHE_INDEX+:G_AXI_ARCACHE_WIDTH] = s_axi_arcache;
- assign s_arpayload[G_AXI_ARLEN_INDEX+:G_AXI_ARLEN_WIDTH] = s_axi_arlen;
- assign s_arpayload[G_AXI_ARLOCK_INDEX+:G_AXI_ARLOCK_WIDTH] = s_axi_arlock;
- assign s_arpayload[G_AXI_ARID_INDEX+:G_AXI_ARID_WIDTH] = s_axi_arid;
- assign s_arpayload[G_AXI_ARQOS_INDEX+:G_AXI_ARQOS_WIDTH] = s_axi_arqos;
-
- assign s_axi_rlast = s_rpayload[G_AXI_RLAST_INDEX+:G_AXI_RLAST_WIDTH];
- assign s_axi_rid = s_rpayload[G_AXI_RID_INDEX+:G_AXI_RID_WIDTH];
-
- if (C_AXI_SUPPORTS_REGION_SIGNALS == 1 && G_AXI_AWREGION_WIDTH > 0) begin : gen_region_signals
- assign s_awpayload[G_AXI_AWREGION_INDEX+:G_AXI_AWREGION_WIDTH] = s_axi_awregion;
- assign s_arpayload[G_AXI_ARREGION_INDEX+:G_AXI_ARREGION_WIDTH] = s_axi_arregion;
- end
- else begin : gen_no_region_signals
- end
- if (C_AXI_SUPPORTS_USER_SIGNALS == 1 && C_AXI_PROTOCOL != 2) begin : gen_user_signals
- assign s_awpayload[G_AXI_AWUSER_INDEX+:G_AXI_AWUSER_WIDTH] = s_axi_awuser;
- assign s_wpayload[G_AXI_WUSER_INDEX+:G_AXI_WUSER_WIDTH] = s_axi_wuser;
- assign s_axi_buser = s_bpayload[G_AXI_BUSER_INDEX+:G_AXI_BUSER_WIDTH];
- assign s_arpayload[G_AXI_ARUSER_INDEX+:G_AXI_ARUSER_WIDTH] = s_axi_aruser;
- assign s_axi_ruser = s_rpayload[G_AXI_RUSER_INDEX+:G_AXI_RUSER_WIDTH];
- end
- else begin : gen_no_user_signals
- assign s_axi_buser = 'b0;
- assign s_axi_ruser = 'b0;
- end
- end
- else begin : gen_axi4lite_packing
- assign s_axi_bid = 'b0;
- assign s_axi_buser = 'b0;
-
- assign s_axi_rlast = 1'b1;
- assign s_axi_rid = 'b0;
- assign s_axi_ruser = 'b0;
- end
-endgenerate
-endmodule
-
-`default_nettype wire
-
-
-// (c) Copyright 2012-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-// Description: SRL based FIFO for AXIS/AXI Channels.
-//--------------------------------------------------------------------------
-
-
-`timescale 1ps/1ps
-`default_nettype none
-
-(* DowngradeIPIdentifiedWarnings="yes" *)
-module axi_infrastructure_v1_1_0_axic_srl_fifo #(
-///////////////////////////////////////////////////////////////////////////////
-// Parameter Definitions
-///////////////////////////////////////////////////////////////////////////////
- parameter C_FAMILY = "virtex7",
- parameter integer C_PAYLOAD_WIDTH = 1,
- parameter integer C_FIFO_DEPTH = 16 // Range: 4-16.
-)
-(
-///////////////////////////////////////////////////////////////////////////////
-// Port Declarations
-///////////////////////////////////////////////////////////////////////////////
- input wire aclk, // Clock
- input wire aresetn, // Reset
- input wire [C_PAYLOAD_WIDTH-1:0] s_payload, // Input data
- input wire s_valid, // Input data valid
- output reg s_ready, // Input data ready
- output wire [C_PAYLOAD_WIDTH-1:0] m_payload, // Output data
- output reg m_valid, // Output data valid
- input wire m_ready // Output data ready
-);
-////////////////////////////////////////////////////////////////////////////////
-// Functions
-////////////////////////////////////////////////////////////////////////////////
-// ceiling logb2
-function integer f_clogb2 (input integer size);
- integer s;
- begin
- s = size;
- s = s - 1;
- for (f_clogb2=1; s>1; f_clogb2=f_clogb2+1)
- s = s >> 1;
- end
-endfunction // clogb2
-
-////////////////////////////////////////////////////////////////////////////////
-// Local parameters
-////////////////////////////////////////////////////////////////////////////////
-localparam integer LP_LOG_FIFO_DEPTH = f_clogb2(C_FIFO_DEPTH);
-
-////////////////////////////////////////////////////////////////////////////////
-// Wires/Reg declarations
-////////////////////////////////////////////////////////////////////////////////
-reg [LP_LOG_FIFO_DEPTH-1:0] fifo_index;
-wire [4-1:0] fifo_addr;
-wire push;
-wire pop ;
-reg areset_r1;
-
-////////////////////////////////////////////////////////////////////////////////
-// BEGIN RTL
-////////////////////////////////////////////////////////////////////////////////
-
-always @(posedge aclk) begin
- areset_r1 <= ~aresetn;
-end
-
-always @(posedge aclk) begin
- if (~aresetn) begin
- fifo_index <= {LP_LOG_FIFO_DEPTH{1'b1}};
- end
- else begin
- fifo_index <= push & ~pop ? fifo_index + 1'b1 :
- ~push & pop ? fifo_index - 1'b1 :
- fifo_index;
- end
-end
-
-assign push = s_valid & s_ready;
-
-always @(posedge aclk) begin
- if (~aresetn) begin
- s_ready <= 1'b0;
- end
- else begin
- s_ready <= areset_r1 ? 1'b1 :
- push & ~pop && (fifo_index == (C_FIFO_DEPTH - 2'd2)) ? 1'b0 :
- ~push & pop ? 1'b1 :
- s_ready;
- end
-end
-
-assign pop = m_valid & m_ready;
-
-always @(posedge aclk) begin
- if (~aresetn) begin
- m_valid <= 1'b0;
- end
- else begin
- m_valid <= ~push & pop && (fifo_index == {LP_LOG_FIFO_DEPTH{1'b0}}) ? 1'b0 :
- push & ~pop ? 1'b1 :
- m_valid;
- end
-end
-
-generate
- if (LP_LOG_FIFO_DEPTH < 4) begin : gen_pad_fifo_addr
- assign fifo_addr[0+:LP_LOG_FIFO_DEPTH] = fifo_index[LP_LOG_FIFO_DEPTH-1:0];
- assign fifo_addr[LP_LOG_FIFO_DEPTH+:(4-LP_LOG_FIFO_DEPTH)] = {4-LP_LOG_FIFO_DEPTH{1'b0}};
- end
- else begin : gen_fifo_addr
- assign fifo_addr[LP_LOG_FIFO_DEPTH-1:0] = fifo_index[LP_LOG_FIFO_DEPTH-1:0];
- end
-endgenerate
-
-
-generate
- genvar i;
- for (i = 0; i < C_PAYLOAD_WIDTH; i = i + 1) begin : gen_data_bit
- SRL16E
- u_srl_fifo(
- .Q ( m_payload[i] ) ,
- .A0 ( fifo_addr[0] ) ,
- .A1 ( fifo_addr[1] ) ,
- .A2 ( fifo_addr[2] ) ,
- .A3 ( fifo_addr[3] ) ,
- .CE ( push ) ,
- .CLK ( aclk ) ,
- .D ( s_payload[i] )
- );
- end
-endgenerate
-
-endmodule
-
-`default_nettype wire
-
-
-// (c) Copyright 2012 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//-----------------------------------------------------------------------------
-//
-// axi to vector
-// A generic module to merge all axi signals into one signal called payload.
-// This is strictly wires, so no clk, reset, aclken, valid/ready are required.
-//
-// Verilog-standard: Verilog 2001
-//--------------------------------------------------------------------------
-//
-
-`timescale 1ps/1ps
-`default_nettype none
-
-(* DowngradeIPIdentifiedWarnings="yes" *)
-module axi_infrastructure_v1_1_0_vector2axi #
-(
-///////////////////////////////////////////////////////////////////////////////
-// Parameter Definitions
-///////////////////////////////////////////////////////////////////////////////
- parameter integer C_AXI_PROTOCOL = 0,
- parameter integer C_AXI_ID_WIDTH = 4,
- parameter integer C_AXI_ADDR_WIDTH = 32,
- parameter integer C_AXI_DATA_WIDTH = 32,
- parameter integer C_AXI_SUPPORTS_USER_SIGNALS = 0,
- parameter integer C_AXI_SUPPORTS_REGION_SIGNALS = 0,
- parameter integer C_AXI_AWUSER_WIDTH = 1,
- parameter integer C_AXI_WUSER_WIDTH = 1,
- parameter integer C_AXI_BUSER_WIDTH = 1,
- parameter integer C_AXI_ARUSER_WIDTH = 1,
- parameter integer C_AXI_RUSER_WIDTH = 1,
- parameter integer C_AWPAYLOAD_WIDTH = 61,
- parameter integer C_WPAYLOAD_WIDTH = 73,
- parameter integer C_BPAYLOAD_WIDTH = 6,
- parameter integer C_ARPAYLOAD_WIDTH = 61,
- parameter integer C_RPAYLOAD_WIDTH = 69
-)
-(
-///////////////////////////////////////////////////////////////////////////////
-// Port Declarations
-///////////////////////////////////////////////////////////////////////////////
- // Slave Interface Write Address Ports
- output wire [C_AXI_ID_WIDTH-1:0] m_axi_awid,
- output wire [C_AXI_ADDR_WIDTH-1:0] m_axi_awaddr,
- output wire [((C_AXI_PROTOCOL == 1) ? 4 : 8)-1:0] m_axi_awlen,
- output wire [3-1:0] m_axi_awsize,
- output wire [2-1:0] m_axi_awburst,
- output wire [((C_AXI_PROTOCOL == 1) ? 2 : 1)-1:0] m_axi_awlock,
- output wire [4-1:0] m_axi_awcache,
- output wire [3-1:0] m_axi_awprot,
- output wire [4-1:0] m_axi_awregion,
- output wire [4-1:0] m_axi_awqos,
- output wire [C_AXI_AWUSER_WIDTH-1:0] m_axi_awuser,
-
- // Slave Interface Write Data Ports
- output wire [C_AXI_ID_WIDTH-1:0] m_axi_wid,
- output wire [C_AXI_DATA_WIDTH-1:0] m_axi_wdata,
- output wire [C_AXI_DATA_WIDTH/8-1:0] m_axi_wstrb,
- output wire m_axi_wlast,
- output wire [C_AXI_WUSER_WIDTH-1:0] m_axi_wuser,
-
- // Slave Interface Write Response Ports
- input wire [C_AXI_ID_WIDTH-1:0] m_axi_bid,
- input wire [2-1:0] m_axi_bresp,
- input wire [C_AXI_BUSER_WIDTH-1:0] m_axi_buser,
-
- // Slave Interface Read Address Ports
- output wire [C_AXI_ID_WIDTH-1:0] m_axi_arid,
- output wire [C_AXI_ADDR_WIDTH-1:0] m_axi_araddr,
- output wire [((C_AXI_PROTOCOL == 1) ? 4 : 8)-1:0] m_axi_arlen,
- output wire [3-1:0] m_axi_arsize,
- output wire [2-1:0] m_axi_arburst,
- output wire [((C_AXI_PROTOCOL == 1) ? 2 : 1)-1:0] m_axi_arlock,
- output wire [4-1:0] m_axi_arcache,
- output wire [3-1:0] m_axi_arprot,
- output wire [4-1:0] m_axi_arregion,
- output wire [4-1:0] m_axi_arqos,
- output wire [C_AXI_ARUSER_WIDTH-1:0] m_axi_aruser,
-
- // Slave Interface Read Data Ports
- input wire [C_AXI_ID_WIDTH-1:0] m_axi_rid,
- input wire [C_AXI_DATA_WIDTH-1:0] m_axi_rdata,
- input wire [2-1:0] m_axi_rresp,
- input wire m_axi_rlast,
- input wire [C_AXI_RUSER_WIDTH-1:0] m_axi_ruser,
-
- // payloads
- input wire [C_AWPAYLOAD_WIDTH-1:0] m_awpayload,
- input wire [C_WPAYLOAD_WIDTH-1:0] m_wpayload,
- output wire [C_BPAYLOAD_WIDTH-1:0] m_bpayload,
- input wire [C_ARPAYLOAD_WIDTH-1:0] m_arpayload,
- output wire [C_RPAYLOAD_WIDTH-1:0] m_rpayload
-);
-
-////////////////////////////////////////////////////////////////////////////////
-// Functions
-////////////////////////////////////////////////////////////////////////////////
-`include "axi_infrastructure_v1_1_0.vh"
-
-////////////////////////////////////////////////////////////////////////////////
-// Local parameters
-////////////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////////////
-// Wires/Reg declarations
-////////////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////////////
-// BEGIN RTL
-////////////////////////////////////////////////////////////////////////////////
-
-// AXI4, AXI4LITE, AXI3 packing
-assign m_axi_awaddr = m_awpayload[G_AXI_AWADDR_INDEX+:G_AXI_AWADDR_WIDTH];
-assign m_axi_awprot = m_awpayload[G_AXI_AWPROT_INDEX+:G_AXI_AWPROT_WIDTH];
-
-assign m_axi_wdata = m_wpayload[G_AXI_WDATA_INDEX+:G_AXI_WDATA_WIDTH];
-assign m_axi_wstrb = m_wpayload[G_AXI_WSTRB_INDEX+:G_AXI_WSTRB_WIDTH];
-
-assign m_bpayload[G_AXI_BRESP_INDEX+:G_AXI_BRESP_WIDTH] = m_axi_bresp;
-
-assign m_axi_araddr = m_arpayload[G_AXI_ARADDR_INDEX+:G_AXI_ARADDR_WIDTH];
-assign m_axi_arprot = m_arpayload[G_AXI_ARPROT_INDEX+:G_AXI_ARPROT_WIDTH];
-
-assign m_rpayload[G_AXI_RDATA_INDEX+:G_AXI_RDATA_WIDTH] = m_axi_rdata;
-assign m_rpayload[G_AXI_RRESP_INDEX+:G_AXI_RRESP_WIDTH] = m_axi_rresp;
-
-generate
- if (C_AXI_PROTOCOL == 0 || C_AXI_PROTOCOL == 1) begin : gen_axi4_or_axi3_packing
- assign m_axi_awsize = m_awpayload[G_AXI_AWSIZE_INDEX+:G_AXI_AWSIZE_WIDTH] ;
- assign m_axi_awburst = m_awpayload[G_AXI_AWBURST_INDEX+:G_AXI_AWBURST_WIDTH];
- assign m_axi_awcache = m_awpayload[G_AXI_AWCACHE_INDEX+:G_AXI_AWCACHE_WIDTH];
- assign m_axi_awlen = m_awpayload[G_AXI_AWLEN_INDEX+:G_AXI_AWLEN_WIDTH] ;
- assign m_axi_awlock = m_awpayload[G_AXI_AWLOCK_INDEX+:G_AXI_AWLOCK_WIDTH] ;
- assign m_axi_awid = m_awpayload[G_AXI_AWID_INDEX+:G_AXI_AWID_WIDTH] ;
- assign m_axi_awqos = m_awpayload[G_AXI_AWQOS_INDEX+:G_AXI_AWQOS_WIDTH] ;
-
- assign m_axi_wlast = m_wpayload[G_AXI_WLAST_INDEX+:G_AXI_WLAST_WIDTH] ;
- if (C_AXI_PROTOCOL == 1) begin : gen_axi3_wid_packing
- assign m_axi_wid = m_wpayload[G_AXI_WID_INDEX+:G_AXI_WID_WIDTH] ;
- end
- else begin : gen_no_axi3_wid_packing
- assign m_axi_wid = 1'b0;
- end
-
- assign m_bpayload[G_AXI_BID_INDEX+:G_AXI_BID_WIDTH] = m_axi_bid;
-
- assign m_axi_arsize = m_arpayload[G_AXI_ARSIZE_INDEX+:G_AXI_ARSIZE_WIDTH] ;
- assign m_axi_arburst = m_arpayload[G_AXI_ARBURST_INDEX+:G_AXI_ARBURST_WIDTH];
- assign m_axi_arcache = m_arpayload[G_AXI_ARCACHE_INDEX+:G_AXI_ARCACHE_WIDTH];
- assign m_axi_arlen = m_arpayload[G_AXI_ARLEN_INDEX+:G_AXI_ARLEN_WIDTH] ;
- assign m_axi_arlock = m_arpayload[G_AXI_ARLOCK_INDEX+:G_AXI_ARLOCK_WIDTH] ;
- assign m_axi_arid = m_arpayload[G_AXI_ARID_INDEX+:G_AXI_ARID_WIDTH] ;
- assign m_axi_arqos = m_arpayload[G_AXI_ARQOS_INDEX+:G_AXI_ARQOS_WIDTH] ;
-
- assign m_rpayload[G_AXI_RLAST_INDEX+:G_AXI_RLAST_WIDTH] = m_axi_rlast;
- assign m_rpayload[G_AXI_RID_INDEX+:G_AXI_RID_WIDTH] = m_axi_rid ;
-
- if (C_AXI_SUPPORTS_REGION_SIGNALS == 1 && G_AXI_AWREGION_WIDTH > 0) begin : gen_region_signals
- assign m_axi_awregion = m_awpayload[G_AXI_AWREGION_INDEX+:G_AXI_AWREGION_WIDTH];
- assign m_axi_arregion = m_arpayload[G_AXI_ARREGION_INDEX+:G_AXI_ARREGION_WIDTH];
- end
- else begin : gen_no_region_signals
- assign m_axi_awregion = 'b0;
- assign m_axi_arregion = 'b0;
- end
- if (C_AXI_SUPPORTS_USER_SIGNALS == 1 && C_AXI_PROTOCOL != 2) begin : gen_user_signals
- assign m_axi_awuser = m_awpayload[G_AXI_AWUSER_INDEX+:G_AXI_AWUSER_WIDTH];
- assign m_axi_wuser = m_wpayload[G_AXI_WUSER_INDEX+:G_AXI_WUSER_WIDTH] ;
- assign m_bpayload[G_AXI_BUSER_INDEX+:G_AXI_BUSER_WIDTH] = m_axi_buser ;
- assign m_axi_aruser = m_arpayload[G_AXI_ARUSER_INDEX+:G_AXI_ARUSER_WIDTH];
- assign m_rpayload[G_AXI_RUSER_INDEX+:G_AXI_RUSER_WIDTH] = m_axi_ruser ;
- end
- else begin : gen_no_user_signals
- assign m_axi_awuser = 'b0;
- assign m_axi_wuser = 'b0;
- assign m_axi_aruser = 'b0;
- end
- end
- else begin : gen_axi4lite_packing
- assign m_axi_awsize = (C_AXI_DATA_WIDTH == 32) ? 3'd2 : 3'd3;
- assign m_axi_awburst = 'b0;
- assign m_axi_awcache = 'b0;
- assign m_axi_awlen = 'b0;
- assign m_axi_awlock = 'b0;
- assign m_axi_awid = 'b0;
- assign m_axi_awqos = 'b0;
-
- assign m_axi_wlast = 1'b1;
- assign m_axi_wid = 'b0;
-
-
- assign m_axi_arsize = (C_AXI_DATA_WIDTH == 32) ? 3'd2 : 3'd3;
- assign m_axi_arburst = 'b0;
- assign m_axi_arcache = 'b0;
- assign m_axi_arlen = 'b0;
- assign m_axi_arlock = 'b0;
- assign m_axi_arid = 'b0;
- assign m_axi_arqos = 'b0;
-
- assign m_axi_awregion = 'b0;
- assign m_axi_arregion = 'b0;
-
- assign m_axi_awuser = 'b0;
- assign m_axi_wuser = 'b0;
- assign m_axi_aruser = 'b0;
- end
-endgenerate
-endmodule
-
-`default_nettype wire
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bd b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bd
deleted file mode 100644
index bfaf20b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bd
+++ /dev/null
@@ -1,1097 +0,0 @@
-{
- "design": {
- "design_info": {
- "boundary_crc": "0x9BACF2E346C3B3B5",
- "device": "xc7z015clg485-2",
- "name": "scalp_zynqps",
- "synth_flow_mode": "Hierarchical",
- "tool_version": "2019.2",
- "validated": "true"
- },
- "design_tree": {
- "gnd_constant": "",
- "processing_system7_0": "",
- "util_vector_logic_0": "",
- "util_vector_logic_1": "",
- "vio_0": ""
- },
- "interface_ports": {
- "DDR": {
- "mode": "Master",
- "vlnv": "xilinx.com:interface:ddrx_rtl:1.0",
- "parameters": {
- "CAN_DEBUG": {
- "value": "false",
- "value_src": "default"
- },
- "TIMEPERIOD_PS": {
- "value": "1250",
- "value_src": "default"
- },
- "MEMORY_TYPE": {
- "value": "COMPONENTS",
- "value_src": "default"
- },
- "DATA_WIDTH": {
- "value": "8",
- "value_src": "default"
- },
- "CS_ENABLED": {
- "value": "true",
- "value_src": "default"
- },
- "DATA_MASK_ENABLED": {
- "value": "true",
- "value_src": "default"
- },
- "SLOT": {
- "value": "Single",
- "value_src": "default"
- },
- "MEM_ADDR_MAP": {
- "value": "ROW_COLUMN_BANK",
- "value_src": "default"
- },
- "BURST_LENGTH": {
- "value": "8",
- "value_src": "default"
- },
- "AXI_ARBITRATION_SCHEME": {
- "value": "TDM",
- "value_src": "default"
- },
- "CAS_LATENCY": {
- "value": "11",
- "value_src": "default"
- },
- "CAS_WRITE_LATENCY": {
- "value": "11",
- "value_src": "default"
- }
- }
- },
- "FIXED_IO": {
- "mode": "Master",
- "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0",
- "parameters": {
- "CAN_DEBUG": {
- "value": "false",
- "value_src": "default"
- }
- }
- }
- },
- "ports": {
- "FclkClk0xCO": {
- "type": "clk",
- "direction": "O",
- "parameters": {
- "CLK_DOMAIN": {
- "value": "scalp_zynqps_processing_system7_0_0_FCLK_CLK0",
- "value_src": "default_prop"
- },
- "FREQ_HZ": {
- "value": "125000000"
- },
- "INSERT_VIP": {
- "value": "0",
- "value_src": "default"
- },
- "PHASE": {
- "value": "0.000",
- "value_src": "default"
- }
- }
- },
- "FclkReset0xRO": {
- "direction": "O",
- "left": "0",
- "right": "0"
- },
- "Spi1MOSIxSO": {
- "direction": "O"
- },
- "Spi1SSxSO": {
- "direction": "O"
- },
- "Spi1SclkxCO": {
- "direction": "O"
- },
- "Usb0VBusPwrFaultxSI": {
- "direction": "I"
- }
- },
- "components": {
- "gnd_constant": {
- "vlnv": "xilinx.com:ip:xlconstant:1.1",
- "xci_name": "scalp_zynqps_gnd_constant_0",
- "parameters": {
- "CONST_VAL": {
- "value": "0"
- }
- }
- },
- "processing_system7_0": {
- "vlnv": "xilinx.com:ip:processing_system7:5.5",
- "xci_name": "scalp_zynqps_processing_system7_0_0",
- "parameters": {
- "PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
- "value": "750.000000"
- },
- "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": {
- "value": "97.222221"
- },
- "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": {
- "value": "10.204082"
- },
- "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": {
- "value": "10.000000"
- },
- "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": {
- "value": "10.000000"
- },
- "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": {
- "value": "10.000000"
- },
- "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": {
- "value": "10.000000"
- },
- "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": {
- "value": "194.444443"
- },
- "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": {
- "value": "134.615387"
- },
- "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": {
- "value": "97.222221"
- },
- "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": {
- "value": "10.000000"
- },
- "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": {
- "value": "159.090912"
- },
- "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": {
- "value": "200.000000"
- },
- "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_ACT_UART_PERIPHERAL_FREQMHZ": {
- "value": "97.222221"
- },
- "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_APU_PERIPHERAL_FREQMHZ": {
- "value": "750"
- },
- "PCW_CAN1_CAN1_IO": {
- "value": "MIO 52 .. 53"
- },
- "PCW_CAN1_GRP_CLK_ENABLE": {
- "value": "0"
- },
- "PCW_CAN1_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_CAN_PERIPHERAL_FREQMHZ": {
- "value": "100"
- },
- "PCW_CAN_PERIPHERAL_VALID": {
- "value": "1"
- },
- "PCW_CLK0_FREQ": {
- "value": "125000000"
- },
- "PCW_CLK1_FREQ": {
- "value": "10000000"
- },
- "PCW_CLK2_FREQ": {
- "value": "10000000"
- },
- "PCW_CLK3_FREQ": {
- "value": "10000000"
- },
- "PCW_CRYSTAL_PERIPHERAL_FREQMHZ": {
- "value": "50"
- },
- "PCW_DDR_RAM_HIGHADDR": {
- "value": "0x0FFFFFFF"
- },
- "PCW_ENET0_ENET0_IO": {
- "value": "MIO 16 .. 27"
- },
- "PCW_ENET0_GRP_MDIO_ENABLE": {
- "value": "0"
- },
- "PCW_ENET0_PERIPHERAL_CLKSRC": {
- "value": "IO PLL"
- },
- "PCW_ENET0_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_ENET0_PERIPHERAL_FREQMHZ": {
- "value": "1000 Mbps"
- },
- "PCW_ENET0_RESET_ENABLE": {
- "value": "0"
- },
- "PCW_ENET_RESET_ENABLE": {
- "value": "1"
- },
- "PCW_ENET_RESET_SELECT": {
- "value": "Share reset pin"
- },
- "PCW_EN_CAN1": {
- "value": "1"
- },
- "PCW_EN_EMIO_CAN1": {
- "value": "0"
- },
- "PCW_EN_EMIO_CD_SDIO1": {
- "value": "0"
- },
- "PCW_EN_EMIO_ENET0": {
- "value": "0"
- },
- "PCW_EN_EMIO_I2C0": {
- "value": "0"
- },
- "PCW_EN_EMIO_SDIO1": {
- "value": "0"
- },
- "PCW_EN_EMIO_SPI0": {
- "value": "0"
- },
- "PCW_EN_EMIO_SPI1": {
- "value": "1"
- },
- "PCW_EN_EMIO_UART0": {
- "value": "0"
- },
- "PCW_EN_EMIO_WP_SDIO1": {
- "value": "0"
- },
- "PCW_EN_ENET0": {
- "value": "1"
- },
- "PCW_EN_GPIO": {
- "value": "1"
- },
- "PCW_EN_I2C0": {
- "value": "1"
- },
- "PCW_EN_QSPI": {
- "value": "1"
- },
- "PCW_EN_SDIO1": {
- "value": "1"
- },
- "PCW_EN_SPI0": {
- "value": "1"
- },
- "PCW_EN_SPI1": {
- "value": "1"
- },
- "PCW_EN_UART0": {
- "value": "1"
- },
- "PCW_EN_UART1": {
- "value": "1"
- },
- "PCW_EN_USB0": {
- "value": "1"
- },
- "PCW_FPGA0_PERIPHERAL_FREQMHZ": {
- "value": "125"
- },
- "PCW_FPGA_FCLK0_ENABLE": {
- "value": "1"
- },
- "PCW_GPIO_MIO_GPIO_ENABLE": {
- "value": "1"
- },
- "PCW_GPIO_MIO_GPIO_IO": {
- "value": "MIO"
- },
- "PCW_I2C0_GRP_INT_ENABLE": {
- "value": "0"
- },
- "PCW_I2C0_I2C0_IO": {
- "value": "MIO 50 .. 51"
- },
- "PCW_I2C0_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_I2C0_RESET_ENABLE": {
- "value": "0"
- },
- "PCW_I2C_PERIPHERAL_FREQMHZ": {
- "value": "125.000000"
- },
- "PCW_I2C_RESET_ENABLE": {
- "value": "1"
- },
- "PCW_I2C_RESET_SELECT": {
- "value": "Share reset pin"
- },
- "PCW_MIO_0_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_0_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_0_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_10_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_10_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_10_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_11_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_11_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_11_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_12_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_12_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_12_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_13_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_13_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_13_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_14_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_14_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_14_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_15_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_15_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_15_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_16_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_16_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_16_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_17_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_17_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_17_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_18_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_18_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_18_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_19_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_19_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_19_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_1_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_1_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_1_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_20_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_20_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_20_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_21_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_21_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_21_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_22_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_22_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_22_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_23_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_23_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_23_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_24_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_24_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_24_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_25_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_25_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_25_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_26_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_26_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_26_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_27_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_27_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_27_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_28_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_28_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_28_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_29_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_29_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_29_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_2_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_2_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_30_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_30_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_30_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_31_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_31_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_31_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_32_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_32_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_32_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_33_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_33_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_33_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_34_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_34_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_34_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_35_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_35_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_35_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_36_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_36_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_36_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_37_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_37_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_37_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_38_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_38_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_38_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_39_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_39_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_39_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_3_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_3_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_40_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_40_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_40_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_41_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_41_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_41_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_42_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_42_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_42_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_43_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_43_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_43_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_44_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_44_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_44_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_45_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_45_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_45_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_46_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_46_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_46_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_47_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_47_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_47_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_48_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_48_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_48_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_49_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_49_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_49_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_4_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_4_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_50_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_50_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_50_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_51_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_51_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_51_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_52_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_52_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_52_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_53_IOTYPE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_MIO_53_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_53_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_5_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_5_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_6_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_6_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_7_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_7_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_8_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_8_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_9_IOTYPE": {
- "value": "LVCMOS 3.3V"
- },
- "PCW_MIO_9_PULLUP": {
- "value": "enabled"
- },
- "PCW_MIO_9_SLEW": {
- "value": "slow"
- },
- "PCW_MIO_TREE_PERIPHERALS": {
- "value": "GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#GPIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SPI 0#SPI 0#SPI 0#GPIO#GPIO#SPI 0#UART 0#UART 0#UART 1#UART 1#I2C 0#I2C 0#CAN 1#CAN 1"
- },
- "PCW_MIO_TREE_SIGNALS": {
- "value": "gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#gpio[8]#cd#data[0]#cmd#clk#data[1]#data[2]#data[3]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#sclk#miso#ss[0]#gpio[43]#gpio[44]#mosi#rx#tx#tx#rx#scl#sda#tx#rx"
- },
- "PCW_PRESET_BANK1_VOLTAGE": {
- "value": "LVCMOS 2.5V"
- },
- "PCW_QSPI_GRP_FBCLK_ENABLE": {
- "value": "0"
- },
- "PCW_QSPI_GRP_IO1_ENABLE": {
- "value": "0"
- },
- "PCW_QSPI_GRP_SINGLE_SS_ENABLE": {
- "value": "1"
- },
- "PCW_QSPI_GRP_SINGLE_SS_IO": {
- "value": "MIO 1 .. 6"
- },
- "PCW_QSPI_GRP_SS1_ENABLE": {
- "value": "0"
- },
- "PCW_QSPI_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_QSPI_PERIPHERAL_FREQMHZ": {
- "value": "133"
- },
- "PCW_QSPI_QSPI_IO": {
- "value": "MIO 1 .. 6"
- },
- "PCW_SD1_GRP_CD_ENABLE": {
- "value": "1"
- },
- "PCW_SD1_GRP_CD_IO": {
- "value": "MIO 9"
- },
- "PCW_SD1_GRP_POW_ENABLE": {
- "value": "0"
- },
- "PCW_SD1_GRP_WP_ENABLE": {
- "value": "0"
- },
- "PCW_SD1_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_SD1_SD1_IO": {
- "value": "MIO 10 .. 15"
- },
- "PCW_SDIO_PERIPHERAL_FREQMHZ": {
- "value": "100"
- },
- "PCW_SDIO_PERIPHERAL_VALID": {
- "value": "1"
- },
- "PCW_SINGLE_QSPI_DATA_MODE": {
- "value": "x4"
- },
- "PCW_SPI0_GRP_SS1_ENABLE": {
- "value": "0"
- },
- "PCW_SPI0_GRP_SS2_ENABLE": {
- "value": "0"
- },
- "PCW_SPI0_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_SPI0_SPI0_IO": {
- "value": "MIO 40 .. 45"
- },
- "PCW_SPI1_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_SPI1_SPI1_IO": {
- "value": "EMIO"
- },
- "PCW_SPI_PERIPHERAL_FREQMHZ": {
- "value": "166.666666"
- },
- "PCW_SPI_PERIPHERAL_VALID": {
- "value": "1"
- },
- "PCW_UART0_GRP_FULL_ENABLE": {
- "value": "0"
- },
- "PCW_UART0_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_UART0_UART0_IO": {
- "value": "MIO 46 .. 47"
- },
- "PCW_UART1_GRP_FULL_ENABLE": {
- "value": "0"
- },
- "PCW_UART1_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_UART1_UART1_IO": {
- "value": "MIO 48 .. 49"
- },
- "PCW_UART_PERIPHERAL_FREQMHZ": {
- "value": "100"
- },
- "PCW_UART_PERIPHERAL_VALID": {
- "value": "1"
- },
- "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": {
- "value": "500.000000"
- },
- "PCW_UIPARAM_DDR_BL": {
- "value": "8"
- },
- "PCW_UIPARAM_DDR_BUS_WIDTH": {
- "value": "16 Bit"
- },
- "PCW_UIPARAM_DDR_ECC": {
- "value": "Disabled"
- },
- "PCW_UIPARAM_DDR_FREQ_MHZ": {
- "value": "500"
- },
- "PCW_UIPARAM_DDR_MEMORY_TYPE": {
- "value": "DDR 3 (Low Voltage)"
- },
- "PCW_UIPARAM_DDR_PARTNO": {
- "value": "MT41K128M16 JT-125"
- },
- "PCW_USB0_PERIPHERAL_ENABLE": {
- "value": "1"
- },
- "PCW_USB0_RESET_ENABLE": {
- "value": "0"
- },
- "PCW_USB0_USB0_IO": {
- "value": "MIO 28 .. 39"
- },
- "PCW_USB_RESET_ENABLE": {
- "value": "1"
- },
- "PCW_USB_RESET_SELECT": {
- "value": "Share reset pin"
- }
- }
- },
- "util_vector_logic_0": {
- "vlnv": "xilinx.com:ip:util_vector_logic:2.0",
- "xci_name": "scalp_zynqps_util_vector_logic_0_0",
- "parameters": {
- "C_OPERATION": {
- "value": "or"
- },
- "C_SIZE": {
- "value": "1"
- }
- }
- },
- "util_vector_logic_1": {
- "vlnv": "xilinx.com:ip:util_vector_logic:2.0",
- "xci_name": "scalp_zynqps_util_vector_logic_1_0",
- "parameters": {
- "C_OPERATION": {
- "value": "not"
- },
- "C_SIZE": {
- "value": "1"
- }
- }
- },
- "vio_0": {
- "vlnv": "xilinx.com:ip:vio:3.0",
- "xci_name": "scalp_zynqps_vio_0_0",
- "parameters": {
- "C_NUM_PROBE_IN": {
- "value": "0"
- }
- }
- }
- },
- "interface_nets": {
- "processing_system7_0_FIXED_IO": {
- "interface_ports": [
- "FIXED_IO",
- "processing_system7_0/FIXED_IO"
- ]
- },
- "processing_system7_0_DDR": {
- "interface_ports": [
- "DDR",
- "processing_system7_0/DDR"
- ]
- }
- },
- "nets": {
- "USB0_VBUS_PWRFAULT_0_1": {
- "ports": [
- "Usb0VBusPwrFaultxSI",
- "processing_system7_0/USB0_VBUS_PWRFAULT"
- ]
- },
- "gnd_constant_dout": {
- "ports": [
- "gnd_constant/dout",
- "processing_system7_0/SPI1_MISO_I",
- "processing_system7_0/SPI1_MOSI_I",
- "processing_system7_0/SPI1_SCLK_I",
- "processing_system7_0/SPI1_SS_I"
- ]
- },
- "processing_system7_0_FCLK_CLK0": {
- "ports": [
- "processing_system7_0/FCLK_CLK0",
- "FclkClk0xCO",
- "processing_system7_0/M_AXI_GP0_ACLK",
- "vio_0/clk"
- ]
- },
- "processing_system7_0_FCLK_RESET0_N": {
- "ports": [
- "processing_system7_0/FCLK_RESET0_N",
- "util_vector_logic_1/Op1"
- ]
- },
- "processing_system7_0_SPI1_MOSI_O": {
- "ports": [
- "processing_system7_0/SPI1_MOSI_O",
- "Spi1MOSIxSO"
- ]
- },
- "processing_system7_0_SPI1_SCLK_O": {
- "ports": [
- "processing_system7_0/SPI1_SCLK_O",
- "Spi1SclkxCO"
- ]
- },
- "processing_system7_0_SPI1_SS_O": {
- "ports": [
- "processing_system7_0/SPI1_SS_O",
- "Spi1SSxSO"
- ]
- },
- "util_vector_logic_0_Res": {
- "ports": [
- "util_vector_logic_0/Res",
- "FclkReset0xRO"
- ]
- },
- "util_vector_logic_1_Res": {
- "ports": [
- "util_vector_logic_1/Res",
- "util_vector_logic_0/Op1"
- ]
- },
- "vio_0_probe_out0": {
- "ports": [
- "vio_0/probe_out0",
- "util_vector_logic_0/Op2"
- ]
- }
- },
- "addressing": {
- "/processing_system7_0": {
- "address_spaces": {
- "Data": {
- "range": "4G",
- "width": "32"
- }
- }
- }
- }
- }
-}
\ No newline at end of file
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bxml b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bxml
deleted file mode 100644
index 3726baf..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps.bxml
+++ /dev/null
@@ -1,89 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<Root MajorVersion="0" MinorVersion="39">
- <CompositeFile CompositeFileTopName="scalp_zynqps" CanBeSetAsTop="false" CanDisplayChildGraph="true">
- <Description>Composite Fileset</Description>
- <Generation Name="SYNTHESIS" State="GENERATED" Timestamp="1599472369"/>
- <Generation Name="IMPLEMENTATION" State="GENERATED" Timestamp="1599472369"/>
- <Generation Name="SIMULATION" State="GENERATED" Timestamp="1599472369"/>
- <Generation Name="HW_HANDOFF" State="GENERATED" Timestamp="1599472369"/>
- <FileCollection Name="SOURCES" Type="SOURCES">
- <File Name="ip/scalp_zynqps_gnd_constant_0/scalp_zynqps_gnd_constant_0.xci" Type="IP">
- <Instance HierarchyPath="gnd_constant"/>
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="true" IsStatusTracked="true"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- <UsedIn Val="IMPLEMENTATION"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- <File Name="ip/scalp_zynqps_processing_system7_0_0/scalp_zynqps_processing_system7_0_0.xci" Type="IP">
- <Instance HierarchyPath="processing_system7_0"/>
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="true" IsStatusTracked="true"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- <UsedIn Val="IMPLEMENTATION"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- <File Name="ip/scalp_zynqps_util_vector_logic_0_0/scalp_zynqps_util_vector_logic_0_0.xci" Type="IP">
- <Instance HierarchyPath="util_vector_logic_0"/>
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="true" IsStatusTracked="true"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- <UsedIn Val="IMPLEMENTATION"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- <File Name="ip/scalp_zynqps_util_vector_logic_1_0/scalp_zynqps_util_vector_logic_1_0.xci" Type="IP">
- <Instance HierarchyPath="util_vector_logic_1"/>
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="true" IsStatusTracked="true"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- <UsedIn Val="IMPLEMENTATION"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- <File Name="ip/scalp_zynqps_vio_0_0/scalp_zynqps_vio_0_0.xci" Type="IP">
- <Instance HierarchyPath="vio_0"/>
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="true" IsStatusTracked="true"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- <UsedIn Val="IMPLEMENTATION"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- <File Name="synth/scalp_zynqps.vhd" Type="VHDL">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- </File>
- <File Name="sim/scalp_zynqps.vhd" Type="VHDL">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- <File Name="scalp_zynqps_ooc.xdc" Type="XDC">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SYNTHESIS"/>
- <UsedIn Val="IMPLEMENTATION"/>
- <UsedIn Val="OUT_OF_CONTEXT"/>
- </File>
- <File Name="hw_handoff/scalp_zynqps.hwh" Type="HwHandoff">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="HW_HANDOFF"/>
- </File>
- <File Name="hw_handoff/scalp_zynqps_bd.tcl">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="HW_HANDOFF"/>
- </File>
- <File Name="synth/scalp_zynqps.hwdef">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="HW_HANDOFF"/>
- </File>
- <File Name="sim/scalp_zynqps.protoinst">
- <Properties IsEditable="false" IsVisible="true" Timestamp="0" IsTrackable="false" IsStatusTracked="false"/>
- <Library Name="xil_defaultlib"/>
- <UsedIn Val="SIMULATION"/>
- </File>
- </FileCollection>
- </CompositeFile>
-</Root>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps_ooc.xdc b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps_ooc.xdc
deleted file mode 100644
index cd83b08..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/scalp_zynqps_ooc.xdc
+++ /dev/null
@@ -1,11 +0,0 @@
-################################################################################
-
-# This XDC is used only for OOC mode of synthesis, implementation
-# This constraints file contains default clock frequencies to be used during
-# out-of-context flows such as OOC Synthesis and Hierarchical Designs.
-# This constraints file is not used in normal top-down synthesis (default flow
-# of Vivado)
-################################################################################
-create_clock -name processing_system7_0_FCLK_CLK0 -period 8 [get_pins processing_system7_0/FCLK_CLK0]
-
-################################################################################
\ No newline at end of file
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd
deleted file mode 100644
index 2212d12..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd
+++ /dev/null
@@ -1,361 +0,0 @@
---Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-----------------------------------------------------------------------------------
---Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
---Date : Mon Sep 7 11:52:31 2020
---Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
---Command : generate_target scalp_zynqps.bd
---Design : scalp_zynqps
---Purpose : IP block netlist
-----------------------------------------------------------------------------------
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-library UNISIM;
-use UNISIM.VCOMPONENTS.ALL;
-entity scalp_zynqps is
- port (
- DDR_addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_ba : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_cas_n : inout STD_LOGIC;
- DDR_ck_n : inout STD_LOGIC;
- DDR_ck_p : inout STD_LOGIC;
- DDR_cke : inout STD_LOGIC;
- DDR_cs_n : inout STD_LOGIC;
- DDR_dm : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dq : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_dqs_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dqs_p : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_odt : inout STD_LOGIC;
- DDR_ras_n : inout STD_LOGIC;
- DDR_reset_n : inout STD_LOGIC;
- DDR_we_n : inout STD_LOGIC;
- FIXED_IO_ddr_vrn : inout STD_LOGIC;
- FIXED_IO_ddr_vrp : inout STD_LOGIC;
- FIXED_IO_mio : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- FIXED_IO_ps_clk : inout STD_LOGIC;
- FIXED_IO_ps_porb : inout STD_LOGIC;
- FIXED_IO_ps_srstb : inout STD_LOGIC;
- FclkClk0xCO : out STD_LOGIC;
- FclkReset0xRO : out STD_LOGIC_VECTOR ( 0 to 0 );
- Spi1MOSIxSO : out STD_LOGIC;
- Spi1SSxSO : out STD_LOGIC;
- Spi1SclkxCO : out STD_LOGIC;
- Usb0VBusPwrFaultxSI : in STD_LOGIC
- );
- attribute CORE_GENERATION_INFO : string;
- attribute CORE_GENERATION_INFO of scalp_zynqps : entity is "scalp_zynqps,IP_Integrator,{x_ipVendor=xilinx.com,x_ipLibrary=BlockDiagram,x_ipName=scalp_zynqps,x_ipVersion=1.00.a,x_ipLanguage=VHDL,numBlks=5,numReposBlks=5,numNonXlnxBlks=0,numHierBlks=0,maxHierDepth=0,numSysgenBlks=0,numHlsBlks=0,numHdlrefBlks=0,numPkgbdBlks=0,bdsource=USER,synth_mode=OOC_per_IP}";
- attribute HW_HANDOFF : string;
- attribute HW_HANDOFF of scalp_zynqps : entity is "scalp_zynqps.hwdef";
-end scalp_zynqps;
-
-architecture STRUCTURE of scalp_zynqps is
- component scalp_zynqps_gnd_constant_0 is
- port (
- dout : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_gnd_constant_0;
- component scalp_zynqps_processing_system7_0_0 is
- port (
- SPI1_SCLK_I : in STD_LOGIC;
- SPI1_SCLK_O : out STD_LOGIC;
- SPI1_SCLK_T : out STD_LOGIC;
- SPI1_MOSI_I : in STD_LOGIC;
- SPI1_MOSI_O : out STD_LOGIC;
- SPI1_MOSI_T : out STD_LOGIC;
- SPI1_MISO_I : in STD_LOGIC;
- SPI1_MISO_O : out STD_LOGIC;
- SPI1_MISO_T : out STD_LOGIC;
- SPI1_SS_I : in STD_LOGIC;
- SPI1_SS_O : out STD_LOGIC;
- SPI1_SS1_O : out STD_LOGIC;
- SPI1_SS2_O : out STD_LOGIC;
- SPI1_SS_T : out STD_LOGIC;
- USB0_PORT_INDCTL : out STD_LOGIC_VECTOR ( 1 downto 0 );
- USB0_VBUS_PWRSELECT : out STD_LOGIC;
- USB0_VBUS_PWRFAULT : in STD_LOGIC;
- M_AXI_GP0_ARVALID : out STD_LOGIC;
- M_AXI_GP0_AWVALID : out STD_LOGIC;
- M_AXI_GP0_BREADY : out STD_LOGIC;
- M_AXI_GP0_RREADY : out STD_LOGIC;
- M_AXI_GP0_WLAST : out STD_LOGIC;
- M_AXI_GP0_WVALID : out STD_LOGIC;
- M_AXI_GP0_ARID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_AWID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_WID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_ARBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_ARLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_ARSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_AWBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_AWLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_AWSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_ARPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_AWPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_ARADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_AWADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_WDATA : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_ARCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ARLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ARQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_WSTRB : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ACLK : in STD_LOGIC;
- M_AXI_GP0_ARREADY : in STD_LOGIC;
- M_AXI_GP0_AWREADY : in STD_LOGIC;
- M_AXI_GP0_BVALID : in STD_LOGIC;
- M_AXI_GP0_RLAST : in STD_LOGIC;
- M_AXI_GP0_RVALID : in STD_LOGIC;
- M_AXI_GP0_WREADY : in STD_LOGIC;
- M_AXI_GP0_BID : in STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_RID : in STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_BRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_RRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_RDATA : in STD_LOGIC_VECTOR ( 31 downto 0 );
- FCLK_CLK0 : out STD_LOGIC;
- FCLK_RESET0_N : out STD_LOGIC;
- MIO : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- DDR_CAS_n : inout STD_LOGIC;
- DDR_CKE : inout STD_LOGIC;
- DDR_Clk_n : inout STD_LOGIC;
- DDR_Clk : inout STD_LOGIC;
- DDR_CS_n : inout STD_LOGIC;
- DDR_DRSTB : inout STD_LOGIC;
- DDR_ODT : inout STD_LOGIC;
- DDR_RAS_n : inout STD_LOGIC;
- DDR_WEB : inout STD_LOGIC;
- DDR_BankAddr : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_Addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_VRN : inout STD_LOGIC;
- DDR_VRP : inout STD_LOGIC;
- DDR_DM : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_DQ : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_DQS_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_DQS : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- PS_SRSTB : inout STD_LOGIC;
- PS_CLK : inout STD_LOGIC;
- PS_PORB : inout STD_LOGIC
- );
- end component scalp_zynqps_processing_system7_0_0;
- component scalp_zynqps_util_vector_logic_0_0 is
- port (
- Op1 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Op2 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Res : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_util_vector_logic_0_0;
- component scalp_zynqps_util_vector_logic_1_0 is
- port (
- Op1 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Res : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_util_vector_logic_1_0;
- component scalp_zynqps_vio_0_0 is
- port (
- clk : in STD_LOGIC;
- probe_out0 : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_vio_0_0;
- signal USB0_VBUS_PWRFAULT_0_1 : STD_LOGIC;
- signal gnd_constant_dout : STD_LOGIC_VECTOR ( 0 to 0 );
- signal processing_system7_0_DDR_ADDR : STD_LOGIC_VECTOR ( 14 downto 0 );
- signal processing_system7_0_DDR_BA : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal processing_system7_0_DDR_CAS_N : STD_LOGIC;
- signal processing_system7_0_DDR_CKE : STD_LOGIC;
- signal processing_system7_0_DDR_CK_N : STD_LOGIC;
- signal processing_system7_0_DDR_CK_P : STD_LOGIC;
- signal processing_system7_0_DDR_CS_N : STD_LOGIC;
- signal processing_system7_0_DDR_DM : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_DQ : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal processing_system7_0_DDR_DQS_N : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_DQS_P : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_ODT : STD_LOGIC;
- signal processing_system7_0_DDR_RAS_N : STD_LOGIC;
- signal processing_system7_0_DDR_RESET_N : STD_LOGIC;
- signal processing_system7_0_DDR_WE_N : STD_LOGIC;
- signal processing_system7_0_FCLK_CLK0 : STD_LOGIC;
- signal processing_system7_0_FCLK_RESET0_N : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_DDR_VRN : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_DDR_VRP : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_MIO : STD_LOGIC_VECTOR ( 53 downto 0 );
- signal processing_system7_0_FIXED_IO_PS_CLK : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_PS_PORB : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_PS_SRSTB : STD_LOGIC;
- signal processing_system7_0_SPI1_MOSI_O : STD_LOGIC;
- signal processing_system7_0_SPI1_SCLK_O : STD_LOGIC;
- signal processing_system7_0_SPI1_SS_O : STD_LOGIC;
- signal util_vector_logic_0_Res : STD_LOGIC_VECTOR ( 0 to 0 );
- signal util_vector_logic_1_Res : STD_LOGIC_VECTOR ( 0 to 0 );
- signal vio_0_probe_out0 : STD_LOGIC_VECTOR ( 0 to 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_AWVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_BREADY_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_RREADY_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_WLAST_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_WVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MISO_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MISO_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MOSI_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SCLK_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS1_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS2_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_ARADDR_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARBURST_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARCACHE_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARLEN_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARLOCK_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARPROT_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARQOS_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARSIZE_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWADDR_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWBURST_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWCACHE_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWLEN_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWLOCK_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWPROT_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWQOS_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWSIZE_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WDATA_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WSTRB_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- attribute X_INTERFACE_INFO : string;
- attribute X_INTERFACE_INFO of DDR_cas_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CAS_N";
- attribute X_INTERFACE_INFO of DDR_ck_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CK_N";
- attribute X_INTERFACE_INFO of DDR_ck_p : signal is "xilinx.com:interface:ddrx:1.0 DDR CK_P";
- attribute X_INTERFACE_INFO of DDR_cke : signal is "xilinx.com:interface:ddrx:1.0 DDR CKE";
- attribute X_INTERFACE_INFO of DDR_cs_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CS_N";
- attribute X_INTERFACE_INFO of DDR_odt : signal is "xilinx.com:interface:ddrx:1.0 DDR ODT";
- attribute X_INTERFACE_INFO of DDR_ras_n : signal is "xilinx.com:interface:ddrx:1.0 DDR RAS_N";
- attribute X_INTERFACE_INFO of DDR_reset_n : signal is "xilinx.com:interface:ddrx:1.0 DDR RESET_N";
- attribute X_INTERFACE_INFO of DDR_we_n : signal is "xilinx.com:interface:ddrx:1.0 DDR WE_N";
- attribute X_INTERFACE_INFO of FIXED_IO_ddr_vrn : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRN";
- attribute X_INTERFACE_PARAMETER : string;
- attribute X_INTERFACE_PARAMETER of FIXED_IO_ddr_vrn : signal is "XIL_INTERFACENAME FIXED_IO, CAN_DEBUG false";
- attribute X_INTERFACE_INFO of FIXED_IO_ddr_vrp : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRP";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_clk : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_CLK";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_porb : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_PORB";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_srstb : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_SRSTB";
- attribute X_INTERFACE_INFO of FclkClk0xCO : signal is "xilinx.com:signal:clock:1.0 CLK.FCLKCLK0XCO CLK";
- attribute X_INTERFACE_PARAMETER of FclkClk0xCO : signal is "XIL_INTERFACENAME CLK.FCLKCLK0XCO, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, FREQ_HZ 125000000, INSERT_VIP 0, PHASE 0.000";
- attribute X_INTERFACE_INFO of DDR_addr : signal is "xilinx.com:interface:ddrx:1.0 DDR ADDR";
- attribute X_INTERFACE_PARAMETER of DDR_addr : signal is "XIL_INTERFACENAME DDR, AXI_ARBITRATION_SCHEME TDM, BURST_LENGTH 8, CAN_DEBUG false, CAS_LATENCY 11, CAS_WRITE_LATENCY 11, CS_ENABLED true, DATA_MASK_ENABLED true, DATA_WIDTH 8, MEMORY_TYPE COMPONENTS, MEM_ADDR_MAP ROW_COLUMN_BANK, SLOT Single, TIMEPERIOD_PS 1250";
- attribute X_INTERFACE_INFO of DDR_ba : signal is "xilinx.com:interface:ddrx:1.0 DDR BA";
- attribute X_INTERFACE_INFO of DDR_dm : signal is "xilinx.com:interface:ddrx:1.0 DDR DM";
- attribute X_INTERFACE_INFO of DDR_dq : signal is "xilinx.com:interface:ddrx:1.0 DDR DQ";
- attribute X_INTERFACE_INFO of DDR_dqs_n : signal is "xilinx.com:interface:ddrx:1.0 DDR DQS_N";
- attribute X_INTERFACE_INFO of DDR_dqs_p : signal is "xilinx.com:interface:ddrx:1.0 DDR DQS_P";
- attribute X_INTERFACE_INFO of FIXED_IO_mio : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO MIO";
-begin
- FclkClk0xCO <= processing_system7_0_FCLK_CLK0;
- FclkReset0xRO(0) <= util_vector_logic_0_Res(0);
- Spi1MOSIxSO <= processing_system7_0_SPI1_MOSI_O;
- Spi1SSxSO <= processing_system7_0_SPI1_SS_O;
- Spi1SclkxCO <= processing_system7_0_SPI1_SCLK_O;
- USB0_VBUS_PWRFAULT_0_1 <= Usb0VBusPwrFaultxSI;
-gnd_constant: component scalp_zynqps_gnd_constant_0
- port map (
- dout(0) => gnd_constant_dout(0)
- );
-processing_system7_0: component scalp_zynqps_processing_system7_0_0
- port map (
- DDR_Addr(14 downto 0) => DDR_addr(14 downto 0),
- DDR_BankAddr(2 downto 0) => DDR_ba(2 downto 0),
- DDR_CAS_n => DDR_cas_n,
- DDR_CKE => DDR_cke,
- DDR_CS_n => DDR_cs_n,
- DDR_Clk => DDR_ck_p,
- DDR_Clk_n => DDR_ck_n,
- DDR_DM(3 downto 0) => DDR_dm(3 downto 0),
- DDR_DQ(31 downto 0) => DDR_dq(31 downto 0),
- DDR_DQS(3 downto 0) => DDR_dqs_p(3 downto 0),
- DDR_DQS_n(3 downto 0) => DDR_dqs_n(3 downto 0),
- DDR_DRSTB => DDR_reset_n,
- DDR_ODT => DDR_odt,
- DDR_RAS_n => DDR_ras_n,
- DDR_VRN => FIXED_IO_ddr_vrn,
- DDR_VRP => FIXED_IO_ddr_vrp,
- DDR_WEB => DDR_we_n,
- FCLK_CLK0 => processing_system7_0_FCLK_CLK0,
- FCLK_RESET0_N => processing_system7_0_FCLK_RESET0_N,
- MIO(53 downto 0) => FIXED_IO_mio(53 downto 0),
- M_AXI_GP0_ACLK => processing_system7_0_FCLK_CLK0,
- M_AXI_GP0_ARADDR(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARADDR_UNCONNECTED(31 downto 0),
- M_AXI_GP0_ARBURST(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARBURST_UNCONNECTED(1 downto 0),
- M_AXI_GP0_ARCACHE(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARCACHE_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_ARLEN(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARLEN_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARLOCK(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARLOCK_UNCONNECTED(1 downto 0),
- M_AXI_GP0_ARPROT(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARPROT_UNCONNECTED(2 downto 0),
- M_AXI_GP0_ARQOS(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARQOS_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARREADY => '0',
- M_AXI_GP0_ARSIZE(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARSIZE_UNCONNECTED(2 downto 0),
- M_AXI_GP0_ARVALID => NLW_processing_system7_0_M_AXI_GP0_ARVALID_UNCONNECTED,
- M_AXI_GP0_AWADDR(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWADDR_UNCONNECTED(31 downto 0),
- M_AXI_GP0_AWBURST(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWBURST_UNCONNECTED(1 downto 0),
- M_AXI_GP0_AWCACHE(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWCACHE_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_AWLEN(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWLEN_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWLOCK(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWLOCK_UNCONNECTED(1 downto 0),
- M_AXI_GP0_AWPROT(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWPROT_UNCONNECTED(2 downto 0),
- M_AXI_GP0_AWQOS(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWQOS_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWREADY => '0',
- M_AXI_GP0_AWSIZE(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWSIZE_UNCONNECTED(2 downto 0),
- M_AXI_GP0_AWVALID => NLW_processing_system7_0_M_AXI_GP0_AWVALID_UNCONNECTED,
- M_AXI_GP0_BID(11 downto 0) => B"000000000000",
- M_AXI_GP0_BREADY => NLW_processing_system7_0_M_AXI_GP0_BREADY_UNCONNECTED,
- M_AXI_GP0_BRESP(1 downto 0) => B"00",
- M_AXI_GP0_BVALID => '0',
- M_AXI_GP0_RDATA(31 downto 0) => B"00000000000000000000000000000000",
- M_AXI_GP0_RID(11 downto 0) => B"000000000000",
- M_AXI_GP0_RLAST => '0',
- M_AXI_GP0_RREADY => NLW_processing_system7_0_M_AXI_GP0_RREADY_UNCONNECTED,
- M_AXI_GP0_RRESP(1 downto 0) => B"00",
- M_AXI_GP0_RVALID => '0',
- M_AXI_GP0_WDATA(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WDATA_UNCONNECTED(31 downto 0),
- M_AXI_GP0_WID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_WLAST => NLW_processing_system7_0_M_AXI_GP0_WLAST_UNCONNECTED,
- M_AXI_GP0_WREADY => '0',
- M_AXI_GP0_WSTRB(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WSTRB_UNCONNECTED(3 downto 0),
- M_AXI_GP0_WVALID => NLW_processing_system7_0_M_AXI_GP0_WVALID_UNCONNECTED,
- PS_CLK => FIXED_IO_ps_clk,
- PS_PORB => FIXED_IO_ps_porb,
- PS_SRSTB => FIXED_IO_ps_srstb,
- SPI1_MISO_I => gnd_constant_dout(0),
- SPI1_MISO_O => NLW_processing_system7_0_SPI1_MISO_O_UNCONNECTED,
- SPI1_MISO_T => NLW_processing_system7_0_SPI1_MISO_T_UNCONNECTED,
- SPI1_MOSI_I => gnd_constant_dout(0),
- SPI1_MOSI_O => processing_system7_0_SPI1_MOSI_O,
- SPI1_MOSI_T => NLW_processing_system7_0_SPI1_MOSI_T_UNCONNECTED,
- SPI1_SCLK_I => gnd_constant_dout(0),
- SPI1_SCLK_O => processing_system7_0_SPI1_SCLK_O,
- SPI1_SCLK_T => NLW_processing_system7_0_SPI1_SCLK_T_UNCONNECTED,
- SPI1_SS1_O => NLW_processing_system7_0_SPI1_SS1_O_UNCONNECTED,
- SPI1_SS2_O => NLW_processing_system7_0_SPI1_SS2_O_UNCONNECTED,
- SPI1_SS_I => gnd_constant_dout(0),
- SPI1_SS_O => processing_system7_0_SPI1_SS_O,
- SPI1_SS_T => NLW_processing_system7_0_SPI1_SS_T_UNCONNECTED,
- USB0_PORT_INDCTL(1 downto 0) => NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED(1 downto 0),
- USB0_VBUS_PWRFAULT => USB0_VBUS_PWRFAULT_0_1,
- USB0_VBUS_PWRSELECT => NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED
- );
-util_vector_logic_0: component scalp_zynqps_util_vector_logic_0_0
- port map (
- Op1(0) => util_vector_logic_1_Res(0),
- Op2(0) => vio_0_probe_out0(0),
- Res(0) => util_vector_logic_0_Res(0)
- );
-util_vector_logic_1: component scalp_zynqps_util_vector_logic_1_0
- port map (
- Op1(0) => processing_system7_0_FCLK_RESET0_N,
- Res(0) => util_vector_logic_1_Res(0)
- );
-vio_0: component scalp_zynqps_vio_0_0
- port map (
- clk => processing_system7_0_FCLK_CLK0,
- probe_out0(0) => vio_0_probe_out0(0)
- );
-end STRUCTURE;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/synth/scalp_zynqps.vhd b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/synth/scalp_zynqps.vhd
deleted file mode 100644
index 2212d12..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/synth/scalp_zynqps.vhd
+++ /dev/null
@@ -1,361 +0,0 @@
---Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-----------------------------------------------------------------------------------
---Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
---Date : Mon Sep 7 11:52:31 2020
---Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
---Command : generate_target scalp_zynqps.bd
---Design : scalp_zynqps
---Purpose : IP block netlist
-----------------------------------------------------------------------------------
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-library UNISIM;
-use UNISIM.VCOMPONENTS.ALL;
-entity scalp_zynqps is
- port (
- DDR_addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_ba : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_cas_n : inout STD_LOGIC;
- DDR_ck_n : inout STD_LOGIC;
- DDR_ck_p : inout STD_LOGIC;
- DDR_cke : inout STD_LOGIC;
- DDR_cs_n : inout STD_LOGIC;
- DDR_dm : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dq : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_dqs_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dqs_p : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_odt : inout STD_LOGIC;
- DDR_ras_n : inout STD_LOGIC;
- DDR_reset_n : inout STD_LOGIC;
- DDR_we_n : inout STD_LOGIC;
- FIXED_IO_ddr_vrn : inout STD_LOGIC;
- FIXED_IO_ddr_vrp : inout STD_LOGIC;
- FIXED_IO_mio : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- FIXED_IO_ps_clk : inout STD_LOGIC;
- FIXED_IO_ps_porb : inout STD_LOGIC;
- FIXED_IO_ps_srstb : inout STD_LOGIC;
- FclkClk0xCO : out STD_LOGIC;
- FclkReset0xRO : out STD_LOGIC_VECTOR ( 0 to 0 );
- Spi1MOSIxSO : out STD_LOGIC;
- Spi1SSxSO : out STD_LOGIC;
- Spi1SclkxCO : out STD_LOGIC;
- Usb0VBusPwrFaultxSI : in STD_LOGIC
- );
- attribute CORE_GENERATION_INFO : string;
- attribute CORE_GENERATION_INFO of scalp_zynqps : entity is "scalp_zynqps,IP_Integrator,{x_ipVendor=xilinx.com,x_ipLibrary=BlockDiagram,x_ipName=scalp_zynqps,x_ipVersion=1.00.a,x_ipLanguage=VHDL,numBlks=5,numReposBlks=5,numNonXlnxBlks=0,numHierBlks=0,maxHierDepth=0,numSysgenBlks=0,numHlsBlks=0,numHdlrefBlks=0,numPkgbdBlks=0,bdsource=USER,synth_mode=OOC_per_IP}";
- attribute HW_HANDOFF : string;
- attribute HW_HANDOFF of scalp_zynqps : entity is "scalp_zynqps.hwdef";
-end scalp_zynqps;
-
-architecture STRUCTURE of scalp_zynqps is
- component scalp_zynqps_gnd_constant_0 is
- port (
- dout : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_gnd_constant_0;
- component scalp_zynqps_processing_system7_0_0 is
- port (
- SPI1_SCLK_I : in STD_LOGIC;
- SPI1_SCLK_O : out STD_LOGIC;
- SPI1_SCLK_T : out STD_LOGIC;
- SPI1_MOSI_I : in STD_LOGIC;
- SPI1_MOSI_O : out STD_LOGIC;
- SPI1_MOSI_T : out STD_LOGIC;
- SPI1_MISO_I : in STD_LOGIC;
- SPI1_MISO_O : out STD_LOGIC;
- SPI1_MISO_T : out STD_LOGIC;
- SPI1_SS_I : in STD_LOGIC;
- SPI1_SS_O : out STD_LOGIC;
- SPI1_SS1_O : out STD_LOGIC;
- SPI1_SS2_O : out STD_LOGIC;
- SPI1_SS_T : out STD_LOGIC;
- USB0_PORT_INDCTL : out STD_LOGIC_VECTOR ( 1 downto 0 );
- USB0_VBUS_PWRSELECT : out STD_LOGIC;
- USB0_VBUS_PWRFAULT : in STD_LOGIC;
- M_AXI_GP0_ARVALID : out STD_LOGIC;
- M_AXI_GP0_AWVALID : out STD_LOGIC;
- M_AXI_GP0_BREADY : out STD_LOGIC;
- M_AXI_GP0_RREADY : out STD_LOGIC;
- M_AXI_GP0_WLAST : out STD_LOGIC;
- M_AXI_GP0_WVALID : out STD_LOGIC;
- M_AXI_GP0_ARID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_AWID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_WID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_ARBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_ARLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_ARSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_AWBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_AWLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_AWSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_ARPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_AWPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_ARADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_AWADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_WDATA : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_ARCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ARLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ARQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_WSTRB : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ACLK : in STD_LOGIC;
- M_AXI_GP0_ARREADY : in STD_LOGIC;
- M_AXI_GP0_AWREADY : in STD_LOGIC;
- M_AXI_GP0_BVALID : in STD_LOGIC;
- M_AXI_GP0_RLAST : in STD_LOGIC;
- M_AXI_GP0_RVALID : in STD_LOGIC;
- M_AXI_GP0_WREADY : in STD_LOGIC;
- M_AXI_GP0_BID : in STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_RID : in STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_BRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_RRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_RDATA : in STD_LOGIC_VECTOR ( 31 downto 0 );
- FCLK_CLK0 : out STD_LOGIC;
- FCLK_RESET0_N : out STD_LOGIC;
- MIO : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- DDR_CAS_n : inout STD_LOGIC;
- DDR_CKE : inout STD_LOGIC;
- DDR_Clk_n : inout STD_LOGIC;
- DDR_Clk : inout STD_LOGIC;
- DDR_CS_n : inout STD_LOGIC;
- DDR_DRSTB : inout STD_LOGIC;
- DDR_ODT : inout STD_LOGIC;
- DDR_RAS_n : inout STD_LOGIC;
- DDR_WEB : inout STD_LOGIC;
- DDR_BankAddr : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_Addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_VRN : inout STD_LOGIC;
- DDR_VRP : inout STD_LOGIC;
- DDR_DM : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_DQ : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_DQS_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_DQS : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- PS_SRSTB : inout STD_LOGIC;
- PS_CLK : inout STD_LOGIC;
- PS_PORB : inout STD_LOGIC
- );
- end component scalp_zynqps_processing_system7_0_0;
- component scalp_zynqps_util_vector_logic_0_0 is
- port (
- Op1 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Op2 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Res : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_util_vector_logic_0_0;
- component scalp_zynqps_util_vector_logic_1_0 is
- port (
- Op1 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Res : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_util_vector_logic_1_0;
- component scalp_zynqps_vio_0_0 is
- port (
- clk : in STD_LOGIC;
- probe_out0 : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_vio_0_0;
- signal USB0_VBUS_PWRFAULT_0_1 : STD_LOGIC;
- signal gnd_constant_dout : STD_LOGIC_VECTOR ( 0 to 0 );
- signal processing_system7_0_DDR_ADDR : STD_LOGIC_VECTOR ( 14 downto 0 );
- signal processing_system7_0_DDR_BA : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal processing_system7_0_DDR_CAS_N : STD_LOGIC;
- signal processing_system7_0_DDR_CKE : STD_LOGIC;
- signal processing_system7_0_DDR_CK_N : STD_LOGIC;
- signal processing_system7_0_DDR_CK_P : STD_LOGIC;
- signal processing_system7_0_DDR_CS_N : STD_LOGIC;
- signal processing_system7_0_DDR_DM : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_DQ : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal processing_system7_0_DDR_DQS_N : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_DQS_P : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_ODT : STD_LOGIC;
- signal processing_system7_0_DDR_RAS_N : STD_LOGIC;
- signal processing_system7_0_DDR_RESET_N : STD_LOGIC;
- signal processing_system7_0_DDR_WE_N : STD_LOGIC;
- signal processing_system7_0_FCLK_CLK0 : STD_LOGIC;
- signal processing_system7_0_FCLK_RESET0_N : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_DDR_VRN : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_DDR_VRP : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_MIO : STD_LOGIC_VECTOR ( 53 downto 0 );
- signal processing_system7_0_FIXED_IO_PS_CLK : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_PS_PORB : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_PS_SRSTB : STD_LOGIC;
- signal processing_system7_0_SPI1_MOSI_O : STD_LOGIC;
- signal processing_system7_0_SPI1_SCLK_O : STD_LOGIC;
- signal processing_system7_0_SPI1_SS_O : STD_LOGIC;
- signal util_vector_logic_0_Res : STD_LOGIC_VECTOR ( 0 to 0 );
- signal util_vector_logic_1_Res : STD_LOGIC_VECTOR ( 0 to 0 );
- signal vio_0_probe_out0 : STD_LOGIC_VECTOR ( 0 to 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_AWVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_BREADY_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_RREADY_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_WLAST_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_WVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MISO_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MISO_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MOSI_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SCLK_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS1_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS2_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_ARADDR_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARBURST_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARCACHE_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARLEN_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARLOCK_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARPROT_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARQOS_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARSIZE_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWADDR_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWBURST_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWCACHE_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWLEN_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWLOCK_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWPROT_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWQOS_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWSIZE_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WDATA_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WSTRB_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- attribute X_INTERFACE_INFO : string;
- attribute X_INTERFACE_INFO of DDR_cas_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CAS_N";
- attribute X_INTERFACE_INFO of DDR_ck_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CK_N";
- attribute X_INTERFACE_INFO of DDR_ck_p : signal is "xilinx.com:interface:ddrx:1.0 DDR CK_P";
- attribute X_INTERFACE_INFO of DDR_cke : signal is "xilinx.com:interface:ddrx:1.0 DDR CKE";
- attribute X_INTERFACE_INFO of DDR_cs_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CS_N";
- attribute X_INTERFACE_INFO of DDR_odt : signal is "xilinx.com:interface:ddrx:1.0 DDR ODT";
- attribute X_INTERFACE_INFO of DDR_ras_n : signal is "xilinx.com:interface:ddrx:1.0 DDR RAS_N";
- attribute X_INTERFACE_INFO of DDR_reset_n : signal is "xilinx.com:interface:ddrx:1.0 DDR RESET_N";
- attribute X_INTERFACE_INFO of DDR_we_n : signal is "xilinx.com:interface:ddrx:1.0 DDR WE_N";
- attribute X_INTERFACE_INFO of FIXED_IO_ddr_vrn : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRN";
- attribute X_INTERFACE_PARAMETER : string;
- attribute X_INTERFACE_PARAMETER of FIXED_IO_ddr_vrn : signal is "XIL_INTERFACENAME FIXED_IO, CAN_DEBUG false";
- attribute X_INTERFACE_INFO of FIXED_IO_ddr_vrp : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRP";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_clk : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_CLK";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_porb : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_PORB";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_srstb : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_SRSTB";
- attribute X_INTERFACE_INFO of FclkClk0xCO : signal is "xilinx.com:signal:clock:1.0 CLK.FCLKCLK0XCO CLK";
- attribute X_INTERFACE_PARAMETER of FclkClk0xCO : signal is "XIL_INTERFACENAME CLK.FCLKCLK0XCO, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, FREQ_HZ 125000000, INSERT_VIP 0, PHASE 0.000";
- attribute X_INTERFACE_INFO of DDR_addr : signal is "xilinx.com:interface:ddrx:1.0 DDR ADDR";
- attribute X_INTERFACE_PARAMETER of DDR_addr : signal is "XIL_INTERFACENAME DDR, AXI_ARBITRATION_SCHEME TDM, BURST_LENGTH 8, CAN_DEBUG false, CAS_LATENCY 11, CAS_WRITE_LATENCY 11, CS_ENABLED true, DATA_MASK_ENABLED true, DATA_WIDTH 8, MEMORY_TYPE COMPONENTS, MEM_ADDR_MAP ROW_COLUMN_BANK, SLOT Single, TIMEPERIOD_PS 1250";
- attribute X_INTERFACE_INFO of DDR_ba : signal is "xilinx.com:interface:ddrx:1.0 DDR BA";
- attribute X_INTERFACE_INFO of DDR_dm : signal is "xilinx.com:interface:ddrx:1.0 DDR DM";
- attribute X_INTERFACE_INFO of DDR_dq : signal is "xilinx.com:interface:ddrx:1.0 DDR DQ";
- attribute X_INTERFACE_INFO of DDR_dqs_n : signal is "xilinx.com:interface:ddrx:1.0 DDR DQS_N";
- attribute X_INTERFACE_INFO of DDR_dqs_p : signal is "xilinx.com:interface:ddrx:1.0 DDR DQS_P";
- attribute X_INTERFACE_INFO of FIXED_IO_mio : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO MIO";
-begin
- FclkClk0xCO <= processing_system7_0_FCLK_CLK0;
- FclkReset0xRO(0) <= util_vector_logic_0_Res(0);
- Spi1MOSIxSO <= processing_system7_0_SPI1_MOSI_O;
- Spi1SSxSO <= processing_system7_0_SPI1_SS_O;
- Spi1SclkxCO <= processing_system7_0_SPI1_SCLK_O;
- USB0_VBUS_PWRFAULT_0_1 <= Usb0VBusPwrFaultxSI;
-gnd_constant: component scalp_zynqps_gnd_constant_0
- port map (
- dout(0) => gnd_constant_dout(0)
- );
-processing_system7_0: component scalp_zynqps_processing_system7_0_0
- port map (
- DDR_Addr(14 downto 0) => DDR_addr(14 downto 0),
- DDR_BankAddr(2 downto 0) => DDR_ba(2 downto 0),
- DDR_CAS_n => DDR_cas_n,
- DDR_CKE => DDR_cke,
- DDR_CS_n => DDR_cs_n,
- DDR_Clk => DDR_ck_p,
- DDR_Clk_n => DDR_ck_n,
- DDR_DM(3 downto 0) => DDR_dm(3 downto 0),
- DDR_DQ(31 downto 0) => DDR_dq(31 downto 0),
- DDR_DQS(3 downto 0) => DDR_dqs_p(3 downto 0),
- DDR_DQS_n(3 downto 0) => DDR_dqs_n(3 downto 0),
- DDR_DRSTB => DDR_reset_n,
- DDR_ODT => DDR_odt,
- DDR_RAS_n => DDR_ras_n,
- DDR_VRN => FIXED_IO_ddr_vrn,
- DDR_VRP => FIXED_IO_ddr_vrp,
- DDR_WEB => DDR_we_n,
- FCLK_CLK0 => processing_system7_0_FCLK_CLK0,
- FCLK_RESET0_N => processing_system7_0_FCLK_RESET0_N,
- MIO(53 downto 0) => FIXED_IO_mio(53 downto 0),
- M_AXI_GP0_ACLK => processing_system7_0_FCLK_CLK0,
- M_AXI_GP0_ARADDR(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARADDR_UNCONNECTED(31 downto 0),
- M_AXI_GP0_ARBURST(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARBURST_UNCONNECTED(1 downto 0),
- M_AXI_GP0_ARCACHE(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARCACHE_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_ARLEN(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARLEN_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARLOCK(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARLOCK_UNCONNECTED(1 downto 0),
- M_AXI_GP0_ARPROT(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARPROT_UNCONNECTED(2 downto 0),
- M_AXI_GP0_ARQOS(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARQOS_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARREADY => '0',
- M_AXI_GP0_ARSIZE(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARSIZE_UNCONNECTED(2 downto 0),
- M_AXI_GP0_ARVALID => NLW_processing_system7_0_M_AXI_GP0_ARVALID_UNCONNECTED,
- M_AXI_GP0_AWADDR(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWADDR_UNCONNECTED(31 downto 0),
- M_AXI_GP0_AWBURST(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWBURST_UNCONNECTED(1 downto 0),
- M_AXI_GP0_AWCACHE(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWCACHE_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_AWLEN(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWLEN_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWLOCK(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWLOCK_UNCONNECTED(1 downto 0),
- M_AXI_GP0_AWPROT(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWPROT_UNCONNECTED(2 downto 0),
- M_AXI_GP0_AWQOS(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWQOS_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWREADY => '0',
- M_AXI_GP0_AWSIZE(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWSIZE_UNCONNECTED(2 downto 0),
- M_AXI_GP0_AWVALID => NLW_processing_system7_0_M_AXI_GP0_AWVALID_UNCONNECTED,
- M_AXI_GP0_BID(11 downto 0) => B"000000000000",
- M_AXI_GP0_BREADY => NLW_processing_system7_0_M_AXI_GP0_BREADY_UNCONNECTED,
- M_AXI_GP0_BRESP(1 downto 0) => B"00",
- M_AXI_GP0_BVALID => '0',
- M_AXI_GP0_RDATA(31 downto 0) => B"00000000000000000000000000000000",
- M_AXI_GP0_RID(11 downto 0) => B"000000000000",
- M_AXI_GP0_RLAST => '0',
- M_AXI_GP0_RREADY => NLW_processing_system7_0_M_AXI_GP0_RREADY_UNCONNECTED,
- M_AXI_GP0_RRESP(1 downto 0) => B"00",
- M_AXI_GP0_RVALID => '0',
- M_AXI_GP0_WDATA(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WDATA_UNCONNECTED(31 downto 0),
- M_AXI_GP0_WID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_WLAST => NLW_processing_system7_0_M_AXI_GP0_WLAST_UNCONNECTED,
- M_AXI_GP0_WREADY => '0',
- M_AXI_GP0_WSTRB(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WSTRB_UNCONNECTED(3 downto 0),
- M_AXI_GP0_WVALID => NLW_processing_system7_0_M_AXI_GP0_WVALID_UNCONNECTED,
- PS_CLK => FIXED_IO_ps_clk,
- PS_PORB => FIXED_IO_ps_porb,
- PS_SRSTB => FIXED_IO_ps_srstb,
- SPI1_MISO_I => gnd_constant_dout(0),
- SPI1_MISO_O => NLW_processing_system7_0_SPI1_MISO_O_UNCONNECTED,
- SPI1_MISO_T => NLW_processing_system7_0_SPI1_MISO_T_UNCONNECTED,
- SPI1_MOSI_I => gnd_constant_dout(0),
- SPI1_MOSI_O => processing_system7_0_SPI1_MOSI_O,
- SPI1_MOSI_T => NLW_processing_system7_0_SPI1_MOSI_T_UNCONNECTED,
- SPI1_SCLK_I => gnd_constant_dout(0),
- SPI1_SCLK_O => processing_system7_0_SPI1_SCLK_O,
- SPI1_SCLK_T => NLW_processing_system7_0_SPI1_SCLK_T_UNCONNECTED,
- SPI1_SS1_O => NLW_processing_system7_0_SPI1_SS1_O_UNCONNECTED,
- SPI1_SS2_O => NLW_processing_system7_0_SPI1_SS2_O_UNCONNECTED,
- SPI1_SS_I => gnd_constant_dout(0),
- SPI1_SS_O => processing_system7_0_SPI1_SS_O,
- SPI1_SS_T => NLW_processing_system7_0_SPI1_SS_T_UNCONNECTED,
- USB0_PORT_INDCTL(1 downto 0) => NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED(1 downto 0),
- USB0_VBUS_PWRFAULT => USB0_VBUS_PWRFAULT_0_1,
- USB0_VBUS_PWRSELECT => NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED
- );
-util_vector_logic_0: component scalp_zynqps_util_vector_logic_0_0
- port map (
- Op1(0) => util_vector_logic_1_Res(0),
- Op2(0) => vio_0_probe_out0(0),
- Res(0) => util_vector_logic_0_Res(0)
- );
-util_vector_logic_1: component scalp_zynqps_util_vector_logic_1_0
- port map (
- Op1(0) => processing_system7_0_FCLK_RESET0_N,
- Res(0) => util_vector_logic_1_Res(0)
- );
-vio_0: component scalp_zynqps_vio_0_0
- port map (
- clk => processing_system7_0_FCLK_CLK0,
- probe_out0(0) => vio_0_probe_out0(0)
- );
-end STRUCTURE;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ui/bd_bb8b562f.ui b/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ui/bd_bb8b562f.ui
deleted file mode 100644
index e0744ff..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ui/bd_bb8b562f.ui
+++ /dev/null
@@ -1,37 +0,0 @@
-{
- "ActiveEmotionalView":"Default View",
- "Default View_ScaleFactor":"0.748649",
- "Default View_TopLeft":"-383,-9",
- "ExpandedHierarchyInLayout":"",
- "guistr":"# # String gsaved with Nlview 7.0.21 2019-05-29 bk=1.5064 VDI=41 GEI=36 GUI=JA:9.0 TLS
-# -string -flagsOSRD
-preplace port DDR -pg 1 -lvl 3 -x 840 -y 50 -defaultsOSRD
-preplace port FIXED_IO -pg 1 -lvl 3 -x 840 -y 70 -defaultsOSRD
-preplace port FclkClk0xCO -pg 1 -lvl 3 -x 840 -y 310 -defaultsOSRD
-preplace port Spi1MOSIxSO -pg 1 -lvl 3 -x 840 -y 170 -defaultsOSRD
-preplace port Spi1SSxSO -pg 1 -lvl 3 -x 840 -y 230 -defaultsOSRD
-preplace port Spi1SclkxCO -pg 1 -lvl 3 -x 840 -y 130 -defaultsOSRD
-preplace port Usb0VBusPwrFaultxSI -pg 1 -lvl 0 -x -10 -y 500 -defaultsOSRD
-preplace portBus FclkReset0xRO -pg 1 -lvl 3 -x 840 -y 580 -defaultsOSRD
-preplace inst gnd_constant -pg 1 -lvl 2 -x 560 -y 430 -defaultsOSRD
-preplace inst processing_system7_0 -pg 1 -lvl 2 -x 560 -y 190 -defaultsOSRD
-preplace inst util_vector_logic_0 -pg 1 -lvl 2 -x 560 -y 580 -defaultsOSRD
-preplace inst util_vector_logic_1 -pg 1 -lvl 1 -x 180 -y 570 -defaultsOSRD
-preplace inst vio_0 -pg 1 -lvl 1 -x 180 -y 670 -defaultsOSRD
-preplace netloc USB0_VBUS_PWRFAULT_0_1 1 0 3 10J 490 NJ 490 800
-preplace netloc gnd_constant_dout 1 2 1 810 110n
-preplace netloc processing_system7_0_FCLK_CLK0 1 0 3 20 500 330 500 820
-preplace netloc processing_system7_0_FCLK_RESET0_N 1 0 3 30 510 NJ 510 790
-preplace netloc processing_system7_0_SPI1_MOSI_O 1 2 1 NJ 170
-preplace netloc processing_system7_0_SPI1_SCLK_O 1 2 1 NJ 130
-preplace netloc processing_system7_0_SPI1_SS_O 1 2 1 NJ 230
-preplace netloc util_vector_logic_0_Res 1 2 1 NJ 580
-preplace netloc util_vector_logic_1_Res 1 1 1 NJ 570
-preplace netloc vio_0_probe_out0 1 1 1 330J 590n
-preplace netloc processing_system7_0_FIXED_IO 1 2 1 NJ 70
-preplace netloc processing_system7_0_DDR 1 2 1 NJ 50
-levelinfo -pg 1 -10 180 560 840
-pagesize -pg 1 -db -bbox -sgen -220 -10 1040 730
-"
-}
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/0e76e0055f23d5f9.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/0e76e0055f23d5f9.xci
deleted file mode 100644
index d3d4451..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/0e76e0055f23d5f9.xci
+++ /dev/null
@@ -1,40 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>ipcache</spirit:library>
- <spirit:name>0e76e0055f23d5f9</spirit:name>
- <spirit:version>0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_util_vector_logic_1_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="util_vector_logic" spirit:version="2.0"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_OPERATION">not</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_SIZE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_util_vector_logic_1_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOGO_FILE">data/sym_notgate.png</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHEID">0e76e0055f23d5f9</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHCRC">3148db97</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHRUNTIME">234</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Unknown</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0.dcp
deleted file mode 100644
index 4b62257945b7aa01879d5ce36e88920bfc8d3a50..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 6354
zcmWIWW@Zs#U|`^2@QYUu{G#`wXb&R;gBmLX13Lo)LrQXiUPW%s+$pj7vkfF#*H4d6
zEZiD9g~``x#iWp@%DO_09sO$MVus7My5*$tEdKk|o9nHb@8pE-cF$|it^Vv4cW>)*
zCX*TAEf=RQIn`CNeV)!*@t%Ftdjc5e*=?2P%;8L}QPsRu^(i$|ZC$#v{mof^9DlyF
zgil(g-Q8+8eVzU<wU0JG@?Krd;6F1<MDj&$L*Rzvk{=?O56EP^dfQvL+V7xQSL3o3
zZtXW)8|Ow8p07~yon?3-rX-R%{`uwA%7XW+vQN3b&z|^i*$U$j8-MZ5+G{T-hkYw*
zy|kz$fBhHt$b(T6n9L+Nk0l<Q$JwM6va3_z^5**Eg?_gVF5WPEtLIcX?wWY+XKZP6
zpFdZtZo6gK6veXh=!yexkKfz-Xd0t)qOZKcQ5(_elm1PSe;YfoYtF~u|M%AKR%B)S
zm|dxPiZfQfq9Jh3j7uM`Y6r?ceO8k>?dTKR!ZeBC*xAy*?hE#B`(FQN`Wgwb!VS7F
zeqG@DbHnn8auG-C3hl5wV-uY-8}FX|z#*Cb)8O4fdB@zB1}k1iKjhF^*ul@-{_QV^
z-uX+3H}={tyFK4|H}6~xk3%Oq-40l;i#RK|?w{nwJ^%hPuT!5Kj~c;IZ<(5d85kJ)
z7#JAT85kIflM{0a;;Sn23JZ$kOG`3y;>%K#OY)22bMn(Olj9BJ4fHbel8d-co;iEQ
zyT9C1$FryWw0_t3Gv0b$XMN9Vd!8vgeNtcFTi57{vAI!@hM(>!pED=dc<G!xbAIzC
zFCDLQCv?0+4NO7}0t}dw6b`ZV23AO1%9y~-fa<OjD?TW`WoBS_!OXy*N}RhY@)%z*
zi~otpsR%Q)aCK4u0Sg0T5T#(8VsPjWzvRpJf3I4EY&au!WQ*<8;}PYb9E;Z+d*}DE
zz4gY_PP59tQaWD`J#Bcjr$_JSf#-UizJ~iP_7-vH@NKl3baIly%W#&mkmQpSE*LYv
zU6@wcaM(Gg*VWc;!tDL4Z(HVUF{+%s%d*T$bO+OcP_K!C+gsRIw3>$<+!FHpg>%)?
zc{_zeweCHu+WXb5)mD^!$J@1*F1lQCC4#DN<DPi!3EQcABr`+4i1l9m{*SJOo{ieE
zs?)xx2_6n*eCiw@_Nrm)teBR|+x50_&*VAc$r=%$@3>;`A<GLJf7&*G(@+Zj()`(=
z*kAAZQr4FoPxR%kKl!jJW8JUl2MYX)YSz5|d~E;ZL-zdp3uY@WST&!at97mJ5$~)=
zmtO4nz`W3gxi>jAi`}N({$_z>9qaLF=j|T4*x4QksWMWKj`|#Q&i{x}d$;kkA6?(o
zU!KmGb)4tmoPRaeH9CiET>~c{+jp2LH+^dBcJ=083-`DLPv743skWtl^2Ntz_JljX
zJ^S(|8)Mx8zRm*Ux%-!GiHb4`z0Ibl7Q2<FLWZmLQf%(b-y6#gN$W7iFXLx&<eE_Z
z##%T{jqkTTOF2jWM^}e09{)^P<EQAT*w51c*c8HbUi_hsh>n-fv2Tk{2}j*k{v@s#
zVV|PWo5H?tLZ;5~<16n4+OO0)dboA|$HQ~JzxyA@H}j&$R*uCiM`twV`kp?{<0y9I
z^scCkw?gUP-B;M#T3yk#Y3i{1Gc}#j?$3;0-c83mN`5~NztA{KNxdp`(h;`vI}%vd
zZOadw5#yt?K(haM%@L)>xC=|K-98+0`2Wt?6JEv}*tv+QPWnB2Nt^j^ciqKqWy~KO
z8krBDIq&R#k*6j9+rIdzi43P59}6(I??1{E_&sNCs;ElL?$~CQPO*p?mMOu}w-&4m
zbFF>!Pi6VrMaf1tGurGY6g4(PUt)iGW@%{3)igevm3M8$E;F%+CD%?mv*VG8$JRBQ
zFY723q}w}oor~e+)Y$n)`-{ikO-bt~vfG^4BIGX{|DfP((7BBtZ*~7-^FCT{ap293
zcZEB(%uFvV$*SgL=aflwnE0~&m*Td3(Zx$%-m}YaQ<OQS95R1b=d_o<A0FOb>DZh1
zH%Rd5uh1wB&0S~1XI)<NRe86Z*@M(`-~L^_o%CABkoo5Mpf&%*a+5Eta@ITkoju?0
z!lkWWoD7OqdLLv+dCXJ5@HgPkw|{Tn?ww>J#C~JR&1;5QaTBbL&7Q$0y1nDz&PPjP
z`x+G9-qF95*M0NoldPpj<Db_=x+WaHW#{Ak%1CERu;+Z^1henX$$qthTh|N3PrGQ8
zcWm~<<HZ7|jZfWB%Zt;W=2gWpFffQQGBBtSS6-B-q%HN0=4x@^`TgC*__o=`z2|N)
z){BIF_!Iq&rO8CT(&Wjx_gm+?e_>sq_?k!g-xbY*9J7^w7ASi&Z~oEdw>C#9cf-`=
zuU~fvOPH+sqOm2cVsqTQfcSUMEuCNJy<XKPkLp69!;>FJvM?}Q=Ox;OsVQk^!*Yvn
zxe5Gx7r$|_zL@d4uSwQs^By`gd#x4WW=lDqt9JFoCC29-R$o<ER3`tww|6qb$r-bJ
zE@#>|yh|<5pMUrHw=h-3xej7K0$<fes@5-?X?{NQiKxm6$?r;LOB>TGehD^cxo{sc
zJ|$$}$i8=L+}p`bE?55;N9s!OC)?lcS)8@IbV=II`R6w)2Z+ykX6f1D=9g@A?ym)F
zu=&Lt=`Y>}JUezUefGNLV>!FXp6%&8vAPo?0oUs^mgQ~n_g$*`lu7Kk%1Osc>*axb
zJL>;5wmjIt^niE9v9FQ8Z&|e8-pK9rKBCg|bs_8V)9x~DN%6g&@AMzey}P}{;k%{p
zvIQB&V#04bGi}Arv=%MnwX9b9u~$*^>sF&h!lxd$p6{Ht(LsC3`>TGE*=xVVb!U8f
z7Gr&u$uHRCqQJt;<bOp~TXLp8+04x1&n>u0O5?FT)6}yUTvp6Hc5|s2w{q_F+lRiC
ztnaX~JL$E4VX4aJtIPZEJlCGldd1taH`9;1X--qD8CTiFglPsQJDE&p9`A4YexgNf
zMa!27TO8RYXf*wsn?2=l%~YWuM~l`>ysNub;h{#PgVU#uv`Wj#L48lZz1<k?xlqQp
z=#YAyL&DycFR3=|j4KqMas<q=-cj6Mo>y7rd+ge4r)`%ftYrHXTztFiUHyXV((Tve
z{`NYvD^|bT`Xkq<<LJZ9cmAtaR?q#i{>XCyX7-kMm4`z8gzVJ}JT5k|bJf|unm^@Q
zp38Pd(Oq+vwmjGV5wqI7TeADaW1HX2ZSnHI&NW}(E_+(|`}f%fC&V}(F6fxMNoZff
zx(nX%%QZ6R&7B)R>$m9k#cERoPpXLgdFQZF=>MmO|JikJPhsUL-MA;Wcd=>BOd+2n
z;Z^C@$>N{m71u30<m<@cr*`|as)m}_DI=k&JmTDEjjrBmKUtPjF0JypBJEA<{hlaY
zk+<8{ZGRoLbz#@MYnGe~YObvR>Te-ZF;BwR<A#;XXUW;#XJ;*+WX!ZvBmMP(u1e))
zyam!zFV)n(W-!Sp?`3Ph-<&r6!taYb`=os|KS|BFc5$9g_1%Lf4l&>3-L~h3uK%Z*
zCS|X$dEV4M>6U(1VQ+!g_hYaAb)~$DI(OsKo%?OqzHPY9{rKd&S8?_G>TbVpVbJpa
ze14s6!MwzO2lI4nXC=i8pKIQ8x#MEzjh*VACo0lCH`YeZOUl*=U(LSSIoPsvg7w_k
z%S-p=_*g$%srNkg*vSr&5Iw1-hW0bh{ndPV=l+*pMX5fI&pulFH{q+_u6qd)u8Svc
zka?c`yL@%>oBl-p*Yaj36*sn*bzJTB)8MrKVRKL-?RLVtBdj-*lk#IVy>phT+CSp|
zeZu#(jgs&l(M1irc<x9xuB({EF1%ymWyyoTG~~-&i(+{_-IkwZe80}7AUHC9dj6Hz
zi!mW~`HJ_xvESQkD#bm`vV42~+Q7BXyu>Qrme$N;O|y{N^S!Ff_hEeIjMvt?=PlV+
z(RZCsr}?!0u0lbV%b!<w&tK)Ox9iD%wC2`b<s{=01_p-d3=9l9#1)@Ksm1xFMaikf
zp<TQA4jBlr{Qf=bvvz~^?IW5yf|b;#y$D*s5x79)XFaEUNXTyE-67)Z_q;Vx3Wz=A
z`1|wMAK`oU+E%6J3NMw9+Mn_A=aH}XJfu}i{!I)zr+7ptqK|LgXO(Tv5*a;>*Ibf!
zt=;(S&h(wWZp_7#wl{XZn2lDn&P^6m3t?bjh-YA6FeJ+L@tJw?$@zIDsTC!96)DNu
ze!89d8mII<bhTE7T+r1y>!Ta^fv4{~PsjJ~<$dL4Uq1$NaB`J~cKESt`S_hZsTp?R
ztbcO>_or^JhC6%y{Ft=p$fhfc9)--{{KwjMk!|C~jWI|8>=CaXn7a0ztr8;x!&XKH
z22J9eSX@$?q*s<Y!9SbHP~^z_-<oanLf-uQ7?8EJT}iiMrIKq)kkc8vyBB6G@hn^Y
z_ls``*HLeU&(F;J&0QN;Zgf{K_jNGcw|}?n)T<KNE0@^u7+zL7J~=2tt@-#Qo1J~H
zY)*GE<@bJBu$R~UjqhEpL)&?H*Az0EavqiCzm$=aD#LlN>eB~zS*cHgJjYgiaeAd|
zS&$<lKL5rH=55Ckx1G4$*Q)f6bJ}l*jwkyQRw|#{sH8si=E2$5IIY%qbM9H^f8^zP
z+Z}$Bd{n~4i|2i1i`e|K=I5ET_4>s&kCyQUZR~R~=sOyr8DXBJy86b|gdLM)*YgIY
z|9rvLTvw)fh<lyRZ_8Kuuh;LK5&G@fHmPM!zbEs26uQl}XFC5=_bZc=ZhcU9y{@7h
zJOA)zv<}TKK`qXUEDQ|%qC{7-MJb6_BktxYn~JEhW`<s7O<c?3!sN=Kw<AN{_~&{7
z?^!0f+kf8v^G46<#H@2WI;a1PzCF3@d*p+z;}6&r*9r*rHyl}AaP0Dm%f5>;n;lMF
zO*!`M`TO7JK5m@5Ow;$$Cre3_*Sg2|&j^gWb$W5`OLoilb1NqQeeL~a<^~^ih4pb&
z`b>^aCuNKlPiqP6vriPe=xO)+7x$NW6)#U_c3W=A-WBq|?AE2vJC^=zyfV+Qy>j|3
zVKd|0c;io1x#utB%!rxoo9ixo=aN(Z&Sghy-zEgSpYYK0`-)l*tFOlvY-g|iz`5Y%
zj*W7+R^0S=C}lWxz`eXJ>&vmb7aulkss5VA^iJdf*N=kS9f6N|H$0L`Xz%x2eEsEh
zcF*%w3}J`V%h|H$ZmC*gxo*4k+qlOjj1@iGdTi`Gn3v3POuKVrjrr`u9}miK+cRaQ
z-tlpc^2_~^YyMI)L9)u~no(Hcy4ZAfJC-=nKL)(njp9B2K}{mYc@vXXYu@#!U%KIg
zzKGhVc+EBI78l%+Qxz#|3=))Ieo$xemK@oYUt_)F@1OpluyxY6$6~j%o_sWa?V#%F
z#(G9$srZIei|%Y|C+!z6GdS<F7PlT-Y4Wqh%hh+i-R0G%{&hrK%H~RLKN{3%c<W``
zyV95Uw5BZ*(YvG6dif`x=tDb!br0M#3r=(B>%0F@JoTcY-gLnR3vLyINrq)-CfIZy
z(e|=WcSvIVKjY%EecoH2@4NP8?S-XsJg<uXTedzo<ejndsPqHN$M0HCu2ie>o_(}f
zb^EcOM-D8Fx$^DV=ld@XF&VOQL>qr`a_v47eaAnY?d0T{&OdfC%-o<XarKLA;?lyC
zNuB%MB$=;=C9nOoroL*4&TrjKYdY$G*6Z&6xbF|cqLqh_>slTAdT_<sNcl;n&$Op#
zJ~)*%Lo_XFpY(wj_6JTS$;tfnU$f`pq?((L7nXlMT{OSLXv&MM*2xF9)ETIUWK^vU
z3z+8d%qZXKTu78l6xY(;t4d3JOZLWuL@ih&@;)eRhPvi=pZ16=g^O5MGp){FBgt6)
z)Mvs2s|`;<Dqr4I+dg%g(5Wc}|GqWaN^E!gTp%T#eK6GGap|vgk#k&idlyF8EI74L
zd(HLLuRWH{sY{8mIC-vKrH@JLL~Advk%{nR<CR<f$g%G1s=phcJ1NfVnYOCCMzH7p
zT)iXTdw(CW*>kj)PhVl<>q#-UBXq-`w^dYUF7y$-ex0-6(f*bl0(Tz0+tKj(+1vW8
z^m2h9rnXB{lzxA|ouPg$IryNO+`j&8xyKxhW(WQeyXW{_it)ySpgAWW^ItfZacX5|
zcZ|l0-iI=bvTO^*%QYT|zmVM_&3UG5J>PVO>T@=;n%gC<it7JcpP%l+awX|`&#n8<
z%NE-|Dtfu@c^UKM(=qQZt=e<ywd(1aBCD6iDo_8L$!+VQrJy%8z=>63XZbO;1cp1`
z%1Y<B^6#2p=|6K$*$vgL(aWB<8|5*_o=uG3IyXqlCCJ`={w|*#%eE}LvhMab1Dn^Z
zQ)WB7(%k&iM2_RS*YW)?W=uDn_3N9VkI1g%{>z-g1x1U>?mssWY+zzPEwbhH>97|T
zvHK-=FKXM{zb(<~xMY#~v40$ijQf>?n6*~qxQDHn=6|8R;CN9&T7dZ0>#81h+^V5x
z1tw`O-gEiY!8td7zqotwu_7bK49`Ezh`tA?_L2CgVQ$69z)-|QZ1o-wseLk1a(XA7
z%{pu#(DJ^nOLaM$P;$G_tREsV+a;W0?+6q{r$m=d<2pGtMfm$m?dKP)zO=_2S@gH8
z%q_#NJ;HSFvR@gBF?V&JcPqpkY-BlknI|an*9JkRPmBf=iVv3_*S;?tlCiAXW3o!;
zo@*b9pYDJ2u5h;PGQ+lqpRV1{**@`kVdlwi30`Vae_lMTPTsIpWy9m8p;E1@Rvr;x
zR(Q;4qn-PZErxZ1sp6VOl^X8%lPjh_<>NS@RqnIc_~jbQpsnBRuS~qWdEqNAbH0>a
zHj_%fuYHz~6Wvg?H>v2v!8KPywp=^=RfzlGDRZ4GCo6TP2+cW}(NeQ@W1^^;-uqi?
zFRQ#ZEY&ozkd#^b@Q|wHhFwn|?_@p}IWOVYmkEDYS-<<g*6OF^*64%>pZ;Z>`F3Ta
z*TE0d{~T5M#1%JLW}fXQJH`NSMkWzv+=HnM3=9m63=9lQ8bK`R&?>qn^Z`1MQi!I9
zj6@IDp&N=mx&|^7gqJi{G7)8HMIO45=pAs7aS(T|WFyMR@{}}mGts-u2s6Fei83=4
z(@gZ1F2c+g+(elPZ}+0R7QGdUFnJjdF(#w6Ns)~Q<>6Gc79_%WPhO&ohvaBvV?iVQ
z=<Owtu^_ypaT6ag#_AQNBqEy$aw>Xp12PYi7LE%OV<w{T3GilR1L@{s;9_uQW?=9Z
zWnj=_a5XUx%{Dj4a|}z#4D>R~G|bM{H#I9R@XIfbFx3usb~O*vPV)}+F0ynf4z&dU
DFj)7U
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
deleted file mode 100755
index 11f0534..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
+++ /dev/null
@@ -1,101 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:28 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_util_vector_logic_1_0_sim_netlist.v
-// Design : scalp_zynqps_util_vector_logic_1_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_util_vector_logic_1_0,util_vector_logic_v2_0_1_util_vector_logic,{}" *) (* DowngradeIPIdentifiedWarnings = "yes" *) (* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix
- (Op1,
- Res);
- input [0:0]Op1;
- output [0:0]Res;
-
- wire [0:0]Op1;
- wire [0:0]Res;
-
- LUT1 #(
- .INIT(2'h1))
- \Res[0]_INST_0
- (.I0(Op1),
- .O(Res));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_stub.v
deleted file mode 100755
index 3e83b10..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/0e76e0055f23d5f9/scalp_zynqps_util_vector_logic_1_0_stub.v
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:28 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_util_vector_logic_1_0_stub.v
-// Design : scalp_zynqps_util_vector_logic_1_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(Op1, Res)
-/* synthesis syn_black_box black_box_pad_pin="Op1[0:0],Res[0:0]" */;
- input [0:0]Op1;
- output [0:0]Res;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/2e46931808b7c212.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/2e46931808b7c212.xci
deleted file mode 100644
index ff18a3b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/2e46931808b7c212.xci
+++ /dev/null
@@ -1,40 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>ipcache</spirit:library>
- <spirit:name>2e46931808b7c212</spirit:name>
- <spirit:version>0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_util_vector_logic_0_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="util_vector_logic" spirit:version="2.0"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_OPERATION">or</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_SIZE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_util_vector_logic_0_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOGO_FILE">data/sym_orgate.png</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHEID">2e46931808b7c212</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHCRC">3148db97</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHRUNTIME">234</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Unknown</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0.dcp
deleted file mode 100644
index 792b67d7a64fa0cf610e721421fb976043b93924..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 6431
zcmWIWW@Zs#U|`^2@QYUubbtTw)*eO%1~pa&26hGphLq$2y^7qNxl>~EXB$YguAd&C
zShzKI3X`wXib)|)m34(0JNnhi#SE8ib<0WPS^W2_H`iM=-^mHv?Vi`3Tm9K9?%vkr
zOeQnJTP{vra;mFj`#hbs;ywGO_XIG`v)d}onZub{qpEqS>Qic_+PZXS`<t`;IR1QT
z37@n~ySvqH`a1nzY9DQW<h{C@!GC6!h~$ghhQJNSB|k(mACSp-^|rTgwckOruEu36
z+}dxpHqMPGJYS*YJInAwOi3hj{PWAJl?CrtWuJ0=pFQ#4vK7W5HvZz9wbx!w4*OQr
zdTCKh{`xQOkq4tDFquhk9!oqpkF$v@WLKxa<<0fS3;k{#T)biSR?n$&+%@ss&)CxD
zK7X!O-FC~eDT-z1(G>^Y9>2Hu(KJTqL|=J>qc)<`C;giu|2B4F*PM^R|L?8et;ovu
zF}qUp6lbh{MML168J9j>)ee+@`m82%+R-Prg=rGOv9qOr-52cN_Pzek^feM<g&TBV
z{JOyP=Z57G<sy#O7208W#wI#vHr_q^fkQI=r@^~}@{YML4OYC4e#oJ-u!Enu{o7v-
zz4Mn6Z|t>Qc6+|_Zr-^X9*0hJx*f1w7jaf_-9O2Vd;a}pUZ*}e9udJF@#=wF7Vlf5
z$;iNPhLM3mlYxPuI5{z=Aik<HudtvvzO*DWC%!B-xg@_RJ|{mtGdbQM-XOlXq%=vd
zEOmmvH?yJ0k@vqf+5B@Ozu$LUbF^8cHSSK(5)l`tS-!gunsj=Wz5Vsl_m+}}e&d-v
z_igSyv3z!mC+tmhe^FI^d9>(L5oyI%t7Q=y(;j+yt$EaNxXU`P`d*6Xq~{gct<3fk
z_74`!_A9F4zJDm=^~D0Ul}qC?TIX_zEuQ<BFE3!<Q@w_`Y{__zt&hb-qCIb_Z~N6T
zcUy$c<{inJmZdUnR_6sz)E{(Wos)ES?Sv}+<<_TvRK|KN@GVyItAFJXI>kk0<sP2&
zlNn9CGq0~s-&9e%@?*#BbKIU)=k{z<Il|@kt4m~wO1RrDG22{|r1Z$r=93mXMIK5_
zZTrLX>hz9my(OZHZ%xt63SPSL>PH<%i{mA7?~giv6g;E7w5#jgpZOv?A`gWY-<$b|
z2@&3)3>Ed3sX3T|fuWCqfkB<9@Yc)BOD^I*dFJdH@BVU69nYTf)B0WC&v@&3o%KDd
z?Rlo~^htevZ(XA+#^y#r8h*N`e9oL)<E3-*%=yimymY+IozU?PH82S^2rytyQaHrc
z8(1N6DPsaR1FE~`CX1<sFfcI0GcYh166LP=%)I#I{JfIXiW0qwlw@r`-A;XtQ~Dmd
zS}Q{?=<1yH(GC2-)AyaH<NNpWzVfoK9|Ji!xk^Jj{Mfa8{LY@#47+gFzqx?>Q@2;c
zojrekOj>kg)0IV!LS}IOV{N<0wsGUe7$hfxlIkQcaYh?P28KCI3=BHNIT4anGg5MT
zCk1*RHV|pO|5;nFx@g1HZ6^v|UtST)b=XTbIbSh1x!h32)bsSK_2#mRWP@*d?|4%8
z{mC5fXT=?%m$TRKi#0vHn<V$^pwKss0J-!Dr!F;b6_~)^&^SkWopoHLOTxmL?-YF}
zsVJ>|xcpT0&3l)9zs)#i!XdW(Ue)GKj)#{Py*)U^$K=c6>F;|Nu61>^j*D8lGQf1&
zmF0E|6dBHYMekq?XH4;B(01UoKeSurUfNFPnhmF9FTd#KS+5ey;lAqHzjmvls!egR
z4{ta6OlRNnZr@dzo?PyL_2E8zoin#ebzj@HGwzbphEKg>uU^=Qd2yagF>%^=drP8d
zZp^)@)qacD9KW*j!h@88EltMLGY-6(*8lvQ$+=H0%l!FouHW_e-~CmSPp^o5afxlZ
z^^CV0lBYI3yk7ZGMTvENAYXR>33b$jqVb<~7cUC~0|yHOgDO$6pjVN{$iedccSKG_
zn4yKMlL81>n45wq1>-b>EXkYQpOsT|Dr65wU#<4MWYpODqhr#=zbZ$67qMDAUQmB5
zS&ebQ&N&%%n*z+tHP+5PdXulemvM&c9}&kL=6nB`9azj9_h;e#N~y)pGiRAL>1W?@
zC=g9vpX?#%rnpns`YW^DgI!6}zCZcYBDlfs-P-N#K2aHlagi6=oj;`X@4I*HPWt-g
zHDB^pi(lE}<lV?_5hS61%-3(yU5i_%gHmD|7d^VN$eQ2X!GSmDm}zIu;SXm|u5rC%
zxlHjWr&_w?k>(?dvvx*iGxi((b^luNHUD^+$mA_Q&u#VD93u3XyV1!;L(}ybJHzys
z6+CY*+H`a;J)om!nC~A`zgcX@dw<72+|M38HsGjD=uQbLa=LfafNgp1(deJ=A6p8_
z_WM;8@)cc-c|Ggo!~{9B(`&>ERBlMsZD^hIu(f_ij~-L?g5BE$1M>{t_05ibu<lC)
zLtuiD(}indCwA=(JpHo%@#Hv8#=yNt1zs$>bkn+i{j<F-Pis3H19xwk?-<H7=iwro
zsWzJ?bH3BpW6CMoBDA9Y4cFcsTg;A6Qnk}fym*z}#3k6<O@8fa#aG=f3{CT!rwJ6?
z`D^J|x#sKIPX^tKI>PpQ@5zqNR%+&zskJTG8!)TXnX~MI1M9UD2l89`1LnCag;?4@
zFMKL|=3%<}y(}5?lir-ZSC$y^JncMD)APV%5_eT&jqoNTYc2LK6`$?e7jub!<L-Z8
zaiH~7S3cAKR<%b;b5_>Zm+TFflS}gWF!{lci@)OvgPwmk<hiiwf2R8+o0U5=eJ2+F
z(tL1*yXQOW#-AN+Ki?Mm?`^VD*t~u2wn_Up8hjSj<Pt0t$?E;&xhKta#heb=8{M_O
z%M2$O-;R;Xt7h7`lxgCc{-?=rMf%KUTl4x{`!?Gs*P}&Sct&31%BUa0`!hV+`W+Zf
zIlSmh;k^7jHz$1ArRw~9ia$4ao~>T=;ahU9-d5KO8znzp+4{ru%O!n*$7xBYqka5S
z*Y!P%RhxT1wYNr_Z>o)UMZ+&)rWJOk_KI_P^GYwIR~)N5|C`rOCyMc)+D5x`x`)!v
zPrk=dvT?VmSIwn~IytYsFU751S+(naY@*Tu=fxSuv63gcKl029(EGK5(emml?Z)$0
z_v}?ooF23?^~;oI{^&BUGfVcn?o>W6`QZ33d%v#5E3_{QZxOiY)c??#san$W<?Iy?
zZk!eD7S22oVmWX1#Di7BXH!^z9Toq&Acf6kp3n8SXT3W!j8=VD;h2$j!*uR>huL~+
zZ%>^zO*zIR;h=PLR_2?_Qz9mEo;zWc@_s5a`_zjjGEq(w{2u(Nnw52W(i~CaEwi0B
zPEKp(z1{X>hh@-z`TZ+jyu1<gZ+(E#-WO}UPCw`9YW!LJXEJJe5_s0~;AIvD27XZn
z1~uZ!lcJQws}Xnelubp{STjQ}H*L^joai9f#I1Mhq|ZO?Ba_s8Z|D9qv)|n<uxXib
z-lNoi*UB!vv*V8WC~-$&iKx>f!3h<j=PIO1H+h=m3V7_Cb>_yuKehKQ?Y0G*FZGnN
zQ{P*)_2G~3;8Wb}ky~{CDm=cRS$e6yw$n~{+Dn!vSH0i6Dx7dJYWG>GnmFZg{|whn
zDzoeUvR3);`SN7PL77`-v04Sfxi2H{T=?UVb$-U-J=t$LXV2QUUNUlTQ9_29&pO}Z
z+ZJ=?WeWH2Tz0hf?TYZ+iT@&hFRAp2x*D~<n4$KA<bszww#nUEaIe>KE5oS+>fhT|
zmA1V-SlDl3eYJ|`oy>!x9~HSf9N+S8_#>5Yyx()}<yT?Vh3Bmp!VaW=XUm>rYPG~}
zjal|tzqdAQ6<ynUbnLvCmdtTXJChvt`s=?B8Evidj9Zn~sVnL(zxIEd?023GJhqbA
zlB+eY=WS+|XI?K<H=||i0q$eRH66Po%RM$;o$~Bbyyls|+^rk`gmayKts!H^ZrGZ;
zV9N33o(88ibfev~YQra8|88XCv3AGb9gW+HBLAGV3MibI$Y{)Uk~K&2+@o837mKQl
zqRx~bj9FNy<!iSnDDd*>^ItY?vVRih;}(4^cVkFGPuVTu@7qf9pK>R1J%2ah(8-$L
zT?OJC(?2X$*^$~ZeY)}=fu$uiJEQ_4=CBG$oaC@h@|f51NObA^U<JeWdY{bX`%7;X
z$FKf<?Z{F&o>xWxEnA;!^3GW4D*Zt9@w=%fSE|)`&vq+5y8YPABL|kwxXzdM`Fv?&
zqXcuyTFI()OIn}lzFQv5yzR<L=O0TMW^PcHc=|*(acSYlq|W_rn#|#0$!kBYsjge3
z^ILa|PJjK+dfnO8@pTLruRMIrC%gDpLddl>{2#48i+VjR$TU5}WvqLjH{pwXLaH5i
z-#_)Rb6bzZ^Zht7`~Rjp>Wg?(cSSu^F<2{qMo@HC+{!0YR445`BR!FOs@TG5F^S1r
zIWmP~^`A`@)6o9;dy42Y&r`OS6~#*D6dYW2;FWZ?+kse1QI#FMIfWpVRohPHE?wFX
z#5!khbwYnz??Ih8$Bso62%pQC`%kiMb4z^w3Nii_MK8Ese|=^(NlQ&$QrvITX8Dba
z8@P({lAC$X9(m%UrMth~QSWiQc}Vw?>yv(Zo#gbIIw^lP_s81Db_U$}b&C&kd%W4E
z5^ffD`s_}{TX9kvp~tS4GRgebSJYxD-(juyU{B?5`P(mLTc$MZGg<2K|F7At&M!AY
zHcV_UzqswJg-2R&*Zo7*FC29lq+_~*BmXeolI*cG&7C-tBP-d$-J$*7k#4IeAGp8p
z-RWgX`)%It-LN-B?(BiXb1Xi6_+Wj0x(mydr0G4k?x%k{Z2!pU<ht~4%#%<1JiDc}
z_tY!a(~?h5x7I38{+G%9_Nb`9bT5sCN-ELs%Z~=D9e+NBP4WNvi_7(d*J-Xb+`4+(
z-T5&kOs9Njywu$MRN`Ih@2ZOMl0U1bRo*qQtyj9bz5k-z9r<>-<;rRgEL`5MJHM2}
z@p8s_Bi7vCn+yx*Y>V$-vMTZY;@lbM3V+?{++gn%ap3)gkbW+$*$eHie&YNkpy$VT
zhR2Zm_G+P$7$23;vkyMc2)vh7a>%m$Vl%f{Q=gz#K*r%!9PV3hm~K^mv`Tkx_r15a
z?}TUYdUVz!HFiP$gmd3N&8lKyV3^F$Ky0y?nv!-k{C3e|H-Xyk;UyoFR-Q5xKmFQ!
zs@x_a>B%P+Oxke$<h8a#29u7lwefIx?%w);o}2^I-5krCA(PlUcb0sgbGhWZ3GbuJ
zf-3W*kDQzC`o(>Y#pNk%er|iF6sjjAzq0IFEW>EhlHpe26v-l`vA|^dYTHQ@7tFDr
ze6**~zU1*$3ytlw-FsC^FJ~69^hz$z^io<l@zMmIVDlcwU=x#S)>Eu2wC2P&mCd}}
zV<}y1&hm0z+Pd>989Id?vlhk8%?dJ}{y9Qok_PL`zf;&WAN>31{;2t+QA7EHmDkh5
zuV-=RwVQG5P0pNt?J-l|^L~pjN9&YTR$907yZMJRJS>*#b)2NGqw-03^6oRUxt_Yb
zEB@y4q0%|&)u~o@_bKhh(}gV)=goO~<MiA^*NYnC_%gn%Q=P9Sx7=`6gz&<Tw`#t>
zo;cZciXWeV&DoaKSxc_ecZL`_3h!I9GF|-B5&kE+TV}R3Y(DUC@e&8#vy1=Ketn@_
z{*y_~t~ANddDf+#1fPRtCS5O-?x`eY6fyQ@NZAS9Q&pB)DAeXIXC}d@!m*${J^QFZ
z>=Bl_OTM)UC0yDP1yjx_C}lcK-ZJB9(6YSmJqu&K7RvMn9dcjip0Km!;pqx4F_W58
z6Bk%q-?jO7d0AnV@3DYaPHj7b-D(||$vo+oGCjQKf8Uv~hG`vf3?%};eXl&)UUfRc
zVczGz`#<N!`}c(ZDeh=wj@d3L!t1AGu99$6>lOp&{P|PP2NmC5Jk_~XFWvCrOQw0*
zrkQ4mjFofL_6Pre?R>tbpsH=9wbJqZoXt66f_#&1Xs&w7S3EN)L3Z(yva)NtE_~At
zTkNZ)l+P;q_P<}M!=yP}cH37>G2HX}!+)mfTEA@Cc14`kew@Lp|A^yp;oMcpGn}QJ
zcc#SnvHA$!p3}3+N^z5`j!3An#-vc4HQ`U6+4;3)-k3T$>bP*N{@>E|S7Qq6R&H7M
zDr##Y^TcbHxgCBjiP4^4sPV(bP)cxrWydqOB(YhhODfNBJX=(yFRT45+b&jldywXt
z>)ZK~7Ki3+*}n1SnX}?IR@6848vJ)N%P2p|)}EiZdG5U5HzV@Zf;;xOEvpO>UU7WQ
z<&A7savu(^T2%A<-id0N(%(*&no@W7c*mA)xAuE^=f&K315>MAmRDqdU*8ue`|Ve6
z>88EA#Lr*P|Lw@J=;z#@i*qBMu|0p!ll<<2#O$E@S4-cT%FpeXTP^gnXZv%J>hnJ}
zzkU6gb<=Z8<{W?Dp1I$)y>znwzbYepxtHC013xyE#XlECNfa;sctv*dx4*vIr?2P9
z+!3|MRPM_=&*K|^Ej7Q@^SC7A&$8`T|LVO-GCa;NGhd?i@bMsD_bET*W91fdPd+uB
zd!l@`&l}xIM{5JKp7MWezt6Dx{5(d<#GsDb2htM!IZ9kkr}RE(>r-dxuDw^{S-HZz
zX3~Yi5(oP!@;i2^#Z8aj?c#DdJZYWAy>B|t<K%f<C(JD0{{E}u(^*O!b5<{{H<P(6
zA7O7DyLj1${+c&e%C}8CvhIcMG=^vQj*7e5es3y#{pnA;(eb0==jNj}>h3Bh8J93H
zFidA4wyUmJlv<o$T9lkx9NM*;?~s82%kST_K5I8v-#((bBUnj&+KZqC9Dxf&e%5o!
zhlK1l-W?*oe$QJIrGVH&j=w*D{Sm%ruWeOouJBU%sQno)e;)aI&qG?Z<ln@gbBafV
zBKr8&eOB4#ERoUEc+Dkw*V>KG?o8k5>&9F>X?tVmi`nw1uIK+*JrgtzBF0E`*;}5H
zw$wM8>#zaO@B5jLtfqCWpKNtuzG&EspXy~zjvMX1Y`73R|Fy;aO#Oz&ORQ=CUMxsX
z=s$Xnw`~&Jv>$xQ;oAZXZ$4?+_wSvGTJzoQC8w{osK5R+=kLS1x!Soao*Z6V%NXFz
z$Rxsydt{b@fq{XMfq`L3BZvhZr$yET8bU!I?E@)=XnM#<!q^|Ov7pKdeNYQwY#=i+
z#)5~q&<#Z&kwO^yk|;yb#;1^t2L%QCXcEHs9u{KU3>^l|NXbDq85A1mBP1Y`L3l}{
z5F0Tj>s92T8;RaY0vQLwOB$27h%&M$B@x|B^cDulJV;uo<R{9^)RZ)IGtu)s!c21!
zqRfPs0_Y~A=ShUgUx_oh9OPP7Hjq9p1}+9?W(I~Cq6`dr46Y_ALC${3Igwe}CWfAg
jj$uBL+WwZAMp>T4x%!#rPVU;J#lgvL5$T~JmKL@EV$%k#
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
deleted file mode 100755
index a4109c7..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
+++ /dev/null
@@ -1,105 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:28 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_util_vector_logic_0_0_sim_netlist.v
-// Design : scalp_zynqps_util_vector_logic_0_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_util_vector_logic_0_0,util_vector_logic_v2_0_1_util_vector_logic,{}" *) (* DowngradeIPIdentifiedWarnings = "yes" *) (* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix
- (Op1,
- Op2,
- Res);
- input [0:0]Op1;
- input [0:0]Op2;
- output [0:0]Res;
-
- wire [0:0]Op1;
- wire [0:0]Op2;
- wire [0:0]Res;
-
- LUT2 #(
- .INIT(4'hE))
- \Res[0]_INST_0
- (.I0(Op1),
- .I1(Op2),
- .O(Res));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_stub.v
deleted file mode 100755
index 37a7588..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/2e46931808b7c212/scalp_zynqps_util_vector_logic_0_0_stub.v
+++ /dev/null
@@ -1,22 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:28 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_util_vector_logic_0_0_stub.v
-// Design : scalp_zynqps_util_vector_logic_0_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "util_vector_logic_v2_0_1_util_vector_logic,Vivado 2019.2" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(Op1, Op2, Res)
-/* synthesis syn_black_box black_box_pad_pin="Op1[0:0],Op2[0:0],Res[0:0]" */;
- input [0:0]Op1;
- input [0:0]Op2;
- output [0:0]Res;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/afab8f8185921798.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/afab8f8185921798.xci
deleted file mode 100644
index 144121f..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/afab8f8185921798.xci
+++ /dev/null
@@ -1,810 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>ipcache</spirit:library>
- <spirit:name>afab8f8185921798</spirit:name>
- <spirit:version>0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_vio_0_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="vio" spirit:version="3.0"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SIGNAL_CLOCK.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_EN_PROBE_IN_ACTIVITY">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_EN_SYNCHRONIZATION">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_NUM_PROBE_IN">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_NUM_PROBE_OUT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN0_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN100_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN101_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN102_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN103_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN104_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN105_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN106_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN107_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN108_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN109_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN10_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN110_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN111_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN112_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN113_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN114_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN115_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN116_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN117_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN118_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN119_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN11_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN120_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN121_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN122_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN123_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN124_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN125_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN126_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN127_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN128_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN129_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN12_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN130_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN131_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN132_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN133_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN134_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN135_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN136_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN137_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN138_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN139_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN13_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN140_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN141_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN142_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN143_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN144_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN145_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN146_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN147_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN148_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN149_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN14_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN150_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN151_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN152_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN153_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN154_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN155_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN156_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN157_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN158_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN159_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN15_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN160_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN161_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN162_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN163_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN164_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN165_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN166_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN167_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN168_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN169_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN16_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN170_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN171_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN172_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN173_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN174_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN175_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN176_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN177_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN178_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN179_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN17_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN180_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN181_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN182_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN183_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN184_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN185_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN186_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN187_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN188_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN189_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN18_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN190_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN191_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN192_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN193_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN194_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN195_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN196_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN197_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN198_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN199_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN19_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN1_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN200_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN201_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN202_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN203_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN204_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN205_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN206_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN207_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN208_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN209_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN20_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN210_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN211_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN212_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN213_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN214_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN215_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN216_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN217_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN218_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN219_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN21_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN220_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN221_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN222_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN223_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN224_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN225_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN226_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN227_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN228_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN229_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN22_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN230_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN231_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN232_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN233_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN234_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN235_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN236_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN237_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN238_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN239_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN23_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN240_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN241_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN242_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN243_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN244_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN245_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN246_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN247_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN248_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN249_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN24_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN250_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN251_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN252_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN253_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN254_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN255_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN25_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN26_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN27_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN28_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN29_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN2_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN30_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN31_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN32_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN33_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN34_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN35_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN36_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN37_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN38_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN39_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN3_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN40_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN41_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN42_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN43_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN44_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN45_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN46_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN47_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN48_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN49_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN4_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN50_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN51_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN52_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN53_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN54_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN55_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN56_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN57_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN58_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN59_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN5_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN60_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN61_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN62_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN63_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN64_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN65_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN66_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN67_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN68_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN69_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN6_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN70_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN71_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN72_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN73_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN74_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN75_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN76_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN77_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN78_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN79_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN7_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN80_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN81_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN82_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN83_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN84_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN85_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN86_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN87_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN88_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN89_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN8_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN90_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN91_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN92_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN93_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN94_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN95_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN96_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN97_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN98_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN99_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_IN9_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT0_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT0_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT100_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT100_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT101_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT101_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT102_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT102_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT103_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT103_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT104_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT104_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT105_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT105_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT106_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT106_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT107_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT107_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT108_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT108_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT109_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT109_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT10_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT10_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT110_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT110_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT111_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT111_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT112_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT112_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT113_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT113_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT114_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT114_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT115_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT115_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT116_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT116_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT117_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT117_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT118_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT118_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT119_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT119_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT11_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT11_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT120_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT120_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT121_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT121_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT122_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT122_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT123_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT123_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT124_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT124_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT125_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT125_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT126_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT126_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT127_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT127_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT128_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT128_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT129_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT129_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT12_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT12_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT130_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT130_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT131_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT131_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT132_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT132_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT133_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT133_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT134_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT134_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT135_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT135_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT136_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT136_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT137_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT137_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT138_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT138_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT139_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT139_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT13_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT13_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT140_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT140_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT141_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT141_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT142_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT142_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT143_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT143_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT144_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT144_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT145_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT145_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT146_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT146_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT147_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT147_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT148_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT148_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT149_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT149_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT14_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT14_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT150_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT150_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT151_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT151_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT152_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT152_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT153_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT153_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT154_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT154_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT155_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT155_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT156_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT156_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT157_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT157_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT158_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT158_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT159_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT159_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT15_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT15_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT160_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT160_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT161_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT161_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT162_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT162_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT163_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT163_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT164_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT164_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT165_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT165_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT166_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT166_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT167_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT167_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT168_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT168_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT169_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT169_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT16_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT16_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT170_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT170_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT171_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT171_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT172_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT172_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT173_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT173_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT174_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT174_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT175_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT175_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT176_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT176_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT177_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT177_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT178_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT178_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT179_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT179_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT17_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT17_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT180_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT180_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT181_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT181_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT182_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT182_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT183_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT183_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT184_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT184_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT185_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT185_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT186_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT186_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT187_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT187_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT188_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT188_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT189_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT189_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT18_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT18_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT190_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT190_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT191_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT191_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT192_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT192_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT193_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT193_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT194_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT194_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT195_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT195_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT196_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT196_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT197_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT197_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT198_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT198_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT199_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT199_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT19_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT19_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT1_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT1_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT200_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT200_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT201_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT201_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT202_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT202_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT203_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT203_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT204_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT204_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT205_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT205_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT206_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT206_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT207_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT207_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT208_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT208_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT209_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT209_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT20_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT20_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT210_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT210_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT211_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT211_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT212_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT212_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT213_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT213_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT214_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT214_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT215_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT215_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT216_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT216_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT217_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT217_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT218_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT218_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT219_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT219_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT21_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT21_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT220_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT220_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT221_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT221_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT222_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT222_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT223_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT223_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT224_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT224_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT225_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT225_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT226_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT226_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT227_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT227_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT228_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT228_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT229_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT229_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT22_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT22_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT230_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT230_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT231_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT231_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT232_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT232_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT233_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT233_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT234_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT234_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT235_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT235_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT236_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT236_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT237_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT237_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT238_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT238_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT239_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT239_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT23_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT23_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT240_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT240_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT241_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT241_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT242_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT242_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT243_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT243_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT244_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT244_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT245_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT245_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT246_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT246_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT247_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT247_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT248_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT248_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT249_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT249_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT24_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT24_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT250_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT250_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT251_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT251_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT252_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT252_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT253_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT253_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT254_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT254_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT255_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT255_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT25_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT25_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT26_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT26_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT27_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT27_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT28_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT28_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT29_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT29_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT2_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT2_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT30_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT30_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT31_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT31_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT32_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT32_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT33_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT33_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT34_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT34_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT35_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT35_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT36_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT36_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT37_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT37_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT38_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT38_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT39_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT39_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT3_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT3_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT40_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT40_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT41_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT41_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT42_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT42_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT43_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT43_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT44_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT44_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT45_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT45_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT46_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT46_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT47_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT47_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT48_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT48_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT49_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT49_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT4_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT4_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT50_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT50_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT51_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT51_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT52_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT52_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT53_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT53_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT54_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT54_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT55_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT55_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT56_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT56_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT57_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT57_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT58_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT58_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT59_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT59_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT5_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT5_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT60_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT60_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT61_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT61_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT62_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT62_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT63_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT63_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT64_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT64_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT65_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT65_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT66_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT66_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT67_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT67_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT68_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT68_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT69_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT69_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT6_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT6_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT70_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT70_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT71_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT71_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT72_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT72_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT73_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT73_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT74_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT74_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT75_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT75_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT76_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT76_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT77_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT77_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT78_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT78_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT79_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT79_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT7_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT7_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT80_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT80_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT81_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT81_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT82_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT82_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT83_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT83_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT84_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT84_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT85_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT85_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT86_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT86_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT87_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT87_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT88_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT88_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT89_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT89_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT8_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT8_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT90_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT90_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT91_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT91_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT92_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT92_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT93_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT93_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT94_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT94_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT95_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT95_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT96_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT96_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT97_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT97_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT98_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT98_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT99_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT99_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT9_INIT_VAL">0x0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_PROBE_OUT9_WIDTH">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_vio_0_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHEID">afab8f8185921798</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHCRC">93940d4a</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHRUNTIME">241</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Unknown</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">19</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0.dcp
deleted file mode 100644
index f019df12663f2c0d4c0c0756e7168dabe3612c77..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 114411
zcmWIWW@Zs#U|`^22#i+`Jo$a~*`16G3^!RA7}yyY7*di8^eS?5dap$1&o*FSeenEg
zc!W(Z|5As^6GA*!6?itgC_K9K<g8MHSoV>$XGXW;_b=ITcS)w$`Z<T&OLaC@ywYRM
z5L|7b>g_pI^kt@L)Qt2g|1>n!Oe=n#kyF`lxMkDQB_69UPHz>oUdOt(BK-#Ahe_N~
zUbEJnN&6MDYyZ>PH%cE?cP@X(D8Z{|bRfGysK7z;Lk9N&k&IW55B~|2ZH|>-^bLG&
zyP3a6+e|rc&jYiQ8X5UJ*EFub{P8a5_4^g3iKg#MSN>bJV)B+BcJqASZL#amIQdx1
zw@YZ>-bwRQS)+XxGELnltWcEuM)Fjly2jysxev80MKkVRx$?1B?fm-ekK3>8duYCO
z{_H7NR{XY*_MdZUdFF))=`I4^uWk#}ACJzCS1I+o*=qls{muiX#ur=n^d_?Ry|zDW
z(8cRna${AVUs3g5`&q6({z^~&S+gd4m(@@4yHW1~KF$$6d|`2_)A8nI?_Iwc3Z0s9
zV9R{(cbiHi<nyjqM=v>b)l&1K!I^DydM`Ld+WA;jIW1Q{EOFeJS+T|QR9j%<RxvLf
z?>0wv?>!gSFO+62dvV+`qur@*VV9YX>(%;;NB_>Be=W=87cXk;p18Pr_JY$448Ll*
z7$g`N7>bh<a|+_CD)R~pisQ>N^WzQT4fIk|(%#hO7C$;M>D~9w+A@C=m#gO;>0713
zXtl9id6szMhKbUOoQpe)WgBL&DaWxrHaGjW|Nf+k(7;fwsXeo=Ei8X7kv!>C&6KHA
z{lhfBmOkkHx2x(^`QM+1U)BEl{^#YxRFmona!cxCVrzN-{V<BK=}o(=U7;H5xj+B@
zUfDf7f6l&teDL?{oQJ-<KHtr*|NQ*^|BqiYZ^qi$|9$-G_3NZ9F?`D!j})0mZkcxX
z<R30Cf!eiYs!!K5><Hox-y~J{yvFeN#ut9;_E{{RzRvu2(bv+|$Hg@m-`YQ%e*f_K
zuj!LdChXetE2u{9=V|RP-|ydIet&Al-k8{@>lA)0U-MU3BfNK7spyHn-&$3!R`37y
zc5QoH)xrDw{n$>wyFE2-_gar|kH1GVem#D5TK@3Oln=)rzv=(9=D!Sw{ojwZhSf3)
z=3j6Ax#IV6sl)r-x=&`88~%8ldF}sW)ho51r<?AoU$gc9VR_%;Q}X|RUWxB{_Ci}p
zUh=H+{(Sut^8W8HKb`Pn`TrWu2NnS`e^idnZ+oG=$9~G4_<Qos=l?5Tc<<__rF2(b
ztlm~uldFE+B8EebD_-25eBHT#Y00bZ`X!msT3*|$efQrN`_KQQF8ZfE>(&JJ^&9)6
ze)pHH>wZ6X+x9nGy4L^gRNI;ByejndKJLHIt9SmmH`#Z8^S|Q#XY0SLf9)*Zl=!yl
zcirc9^TK<-FVw&6-Iuww=xN)Z+H=M3>sJ5G{;dDSe7||_zaRI0nPr9laXTGmy;c6n
z`?A}wlIvgXuiDl2@0rcw`Je9{sa-jBsk~{u#rx2|&mC8;_^x*B_k(>JrMGVt`<lmB
zefaAB_~Y%{vEG%7Ys<y0UfIU{YTl;yeFE>p^1j}M(l5B)%BNk8EWIuF%g*_&^2~d+
zk9V3?*-i*<-@8rr*2TtWuj1CNx9Zzg@c#JX+d+bVzx;o-Rd!|c)ngCK{V(2+Hnp+~
zkS@Rd%H+oz-;U`kzpZ}#KEJQ@^cJfigSv#xuQU8PX0HtYEBGhY?85K4EA@AN?|o37
zG3D5l!U^~K%wC0VJ^t?Xos9VZ4Q-*-`L}MJ(6cVRY(C#=691fyDzjIgTKzNQ$KI}e
zIX&8|YTr*k)0zEE{n(+RKN~lHO4B_aBRT2wr6|+J?VnWgO+)T>*>8QbG`Dx@RAaOB
zr5`W6*ss6(ucz<6slRW1f7Y`!y5V*=d+2`oAHgg06z9bMy8c3H&-HnHcAxKLGS|Ol
zKQ?!*`LuI4HssCSbv4KH{qNT-HS4Wv3cVkeE84H^@tU0AQ+q2roN0f>$5rPRhim;h
z(H?h);r90jn-4!I=lpr4s;6*ohPT-v(+dxIe=hhO&L68BZkB%Ves3uI-uUo~<!hVn
zONaUH%-r;6-M=f%#}=7<`~U6BL*MI#Qgbs4GhQ5(uD;s%?#Ap}-)ip64!g1~RHtmA
z%Jy}C)3g6@&F%blZC(a<x{Xd`=+<YR$9AiV-+i`4xm+#oYU!SxrM73bs+*qNT(kJ;
z{~a&4ybj)-<#(p~@lI9qhYxmrd*nA|d)dy$b<Jkm<!oR2eNTP9Z&Q(+_N(5Uu<FpQ
znQOnasaH>B{59wDJjU!->uxPhJ>Bx_%7iJ?=dJahct5UOem3{>QoFn<CR=aEX)#yF
z?Pg6oyiz1CI(hw!53|IpLt8}OR`q{vi!40Fd-~_<z<=MqU0(lnG4IZGU$1O_voXAU
zfn{F!u?_m?6SmvxTV2k-P%N`k^StBvkLlNrT<~3Kw=etrS?kl4Mys-xYQIzskJ{#2
z%@*DNYi;G*yOsqqd*rs=@?Oj@yL|Jd{nb-X^~TEGvwC_f`gBp;o0EIq`2H<CeeHIy
zyX@KW<eaU4=Pb0&*Ofeaa^toww^*;vymGejZK&;i*_q!zM@zq$JTGLzo|UW38vZ9)
z{hF&-c|L9HdIkMm8|%)jKYQxWM&rWt+RVDQCrdBPo3YGTazD>4e|_Gaac_UlyS4Vm
zs;g|v60he+KV5X^`rY@>wq7>Wu38&v7F)b&%bo1=IR~E3z8ZB+XJy>`FsTKZtNm+V
zp4IGaygjcWXt!<1uhkD1rSfYpiwlto-h5ATb@Ka*Yj!{8d$D#;(d|#`c^eA8@b2gT
z9kl+}x4qWu*8kG*<GuB7^35{U({lSH`}<x-9{Zf|#wX_f49Ta*e4pRje8zL{&GudQ
zrp~o?*DsU05Vv*pg0^EZ7T*eT?!4~amj9&c>aSI%zB0$V`r@wZ-q*QwZNjqTZF#bf
ze_dO(*Q|-*mGsf*)gL!spHzPM)fvst8dp{uS606~uzdEr61DO*RqHN)yI;LpzPl}T
z&&+8XzvMixd{7;GSYFSU<6d6avG3A1*OumPzkB&_(&|U&rQbfRt+r`CccsNGbawfJ
z+edb-D-Zlro$2{&ZSbXOZkd@TanEH-?!LbzTHKLzdB^p#@M)>rs@|G6towPW_Dc8P
zZPSdGAN343JJ1^wT)pq3iNx-!Y9{~o?Y<@-y)X0Dru4EUKdnF6?^eDly_a*==gSN2
zSD1;G=iHg1)^>ku&+@RZZ^e#UCfr*8esA{r+Z*n#yne|?_*$d3<zmO1J978wCobQ*
z$FyOsSxWiSDYiGZO~{>gJJ+xD@40IZ@$31kCq3Ju=2rdS`rFx4e`fh{nfFe$&avZb
zKifGi+artn<<Ccb_vcw{i_e|fKI!+myNfMsoNip7`zm_->hrUGPs%FGUy<IlxkR`A
znbq0p?@sMEUu9PE@K4<Xp6Bnj{!Q|kwu!rD_t)e+^HUo0xu2i)$%+@>e_J#(KYY$2
z+iTv<+4=W!Y)`IRJN4bWyG7?eEzI?d()7Hy<@8Yv!|Gi>txx?wwC9ZG9y7Py=k@MZ
z7hh|BJ!gZxY1@`Lx+mDHFSr=)l&>ih`|~dL_xe2TImt_xCBHb9Y&^r*|HS{l)j!&j
zcB_{*n=ZW5{^IY&2lu}GcD$p1y}|I&smW<;r~bS)rR_9dLHoRSw$cI7CUdGJk6!ux
z?1`u0t#h%vW8JSO?9AD-_~(-I&zI#s<GEk?cFWvF+;bKhmc0=(h@N}#(>~ME{HSRY
zi&aXlUZ}~~F1z^2>#cFA|BAx@EwtL8_I=ei@9=Mq;pN_ZlMKH;d=zFRvwqc{Z_Bq{
zZ+yD*+!3AGVTCCtYma72^K~`LK3V*^F`i}Z%8&Qvgv80-)F@TYT4~Jo;;+1U`MK@a
zr(Ky|og0w*^WALQuUDjRL~IQ^mRr4M5C1yZ8ylrp*DYn+eJSA69K}<=r(Hjm((!Cg
z`nKb<F3RkWocEu3i`J@(7rHkw^B$Jl|8i~h|C3c~*4(*XdAW^2;=13tndcl9^Dgsa
z-IBks`u?Q3N$2C@%GETU%Va-3=+fH!N#N(a@GPG{*QE`Z-xfZ-TjBEg%f%g~@6Lvc
zgx}g09QaH5ZQ+BO;ES`KeS63=MXvp+<IR;@)Vq2<Em`^f#f}$NzCD{hXKgiE`TxbA
zx7%ia>RqCD!DhY5JK3MRRqt+i6#3x3?ak`4_t^{WqjHZ}uew#e_R-$*cio%wZbw|z
zI_6y;RpWSn<1?8lGxBc6{k&FKx_Z&nvtk)HgPx`z|GfR!WBzp&dA(mx9r(0+*_#_@
zPe$+k-IuiV@&w)c=eO4EP1(lXr7XVRI@H<y^{?vd->3c6I<!C6?021Ok;?J69^Sk2
zoBgU^h0i{>=SEhhS=T|~@3$(7Wk0`tR(dZZ<az$IROi*NuD@R;%30XDUwYH`BJMrq
zix=JBt^N3<Q}H76z-|ru9r-?A&fWdGJ@oyq^$XtrzAatdee6{97v1mIX6*5`?*A41
zdt>vp|6Oku*qr@Py4$3#`dyE0vVq~d>dQaZUS79%#-`=p{uXYsFlX!7Jxl*@;76&4
z-*2t`)&KW<(oXg3@fYiz*Gqj!@Zynae*MfkW47PkyuOCkIf<K(U9a2bU$Fk;vd5-u
z$^YMmUFy;}KV{aWwoeIXP5;UlrN8OXz3ccn=jXe|omo+}S8LW-=iQF~_O88jigFnH
zzRd=Xg;$vlU+RsSb6flTD_gUx^HL;u|IfZ7cm2xl{NkIszt?};TWG#R-n+cd`u)kH
z`+I*s%Dr5E?A%uCZEwt%etaQmp77_|gum{eFUCh+_q}l8?(=((KkT)<cBd@W!gy}t
zTQ({4*e$=dFS)rp_v(G=>xVmU*3DjE8kg5AnBVxT_`KAv+`Ub2iq_}fpWc6$D{9+u
z=LdIpFLf-vk#(x=q0g25v$gkMnIfgH5p)0Mq~BMz+@II`dePI^-IM>N>~OMtQxfoY
z&(`J7-mGh~xK&b?eCyJybxT6uU-)(Vb9P4Tx&ynb@4mUedxLSAeD&j{DYsAUemmp5
zhI#Gg26NXKfuD1qONn(YIJe<u^Q|KcN8iV;aG276j!iVb=i205iKY$Vv088CKQFV4
zv$MYR;oPKW=69#A+!A*5Q|!^7b=>>*DpgL=&eYz#=CtqXjSj^wrQx2}f9$%Sx&L3r
z*3c)-SudiO%t-G)p1ptD^s3#ef35!Htl7J8hnd`+-|KB3^aa#ydE@cScm11lzxPGH
ziY&dnL!K}2jC8rX_iDzwOJgtoD^vNqH`X-H>f48vTQ6zrt~fs{p#5(3^4C6dqw}NO
z=bR{=`|ZPBx$?YU-+y^~%Prb^c764vZ%MZjF6~>t@>%KAt@^t+PkYaEc2%~u<JT0U
zu-V(9-#Kkr=F59|C11YPw#xgfGfLB+mg-(;*_)YMn*RE$^oprcmv`Nq(jB|m(p<)~
zHt*%X?B9YP7oFPkc-@}R?VHx@485LfS+zUAa;lt*Oi5PX#V8)%`iz^}pEC>I{=d7P
zZ++lDz58qC99Ls854&CQI;>svG~4&)i<ehNNBPapJ+I+gD_giE%RB1d-Fa8C+idkq
z-~C->Jo9u~DO=!~b<us7GhVuFylEz|f78-wPwUN>KHVD~IZHP>TXNd(q`v2+x36XA
z?T&NY7@hm$UUK%O3ghF>*C+13dt+0b@rTk{gNxDg)`VLJPnmr8`ug1E>u;>i*I#C5
z-qU&W<E>Y@?nY^TQ;(ka5n28<V~y<VU3*vUxj)rmr)6Hvw0JL#$qSC&Eqs1Y=3UL_
z<NyEepUAcD;t$hRmlkk%gk~;XaMC?B^UF=|$XPN~|M#A{G;OPq`n0<hnd?e~10RS_
zNjjx_JakVH^Nq`uw|APITK2|z?#jaEWq(-$uVrTUOv@127ImGMb?M4{jkhrt2jY3O
z(iVq)TfY6$>PKt#dFDR9-JM+SkZDxnvpeqNf-H*#hd9KK6!~pCeMxwKYSgZ53)u@>
zzU+?Xe34e2XX#;|{VMW>)b=%9m*08icQo;zZHuoi5Bqxi-qyn8*Pr)GPm7km5p_GO
z`l{RSmuI&L{w+LKR3Ey3_wIH60(aTpdObWg;moeL{qfSm1?|&%0;L04wy!!k@BO|-
zsh7-G9WYnd;NA4MHSp`ZH>V=X)Gr;9`#st5cBOgk=GJL(OTTB_Gh6yG`||hY%+aB{
zCVjp!-Q>ppZ{5B5#W&>pm;TGhG`T;$?)0kgJDr<fd3H_tFe`ntj;);C&Cth^M<<p0
zoBK?;b?RMhs^N-PlT6=g`z~lMyIrw$`O#_Ydv`J3*D{~9*(A68+PpoQ8mxIYQ-8BA
zJ##<0-}LB}?#6RlkBQX!-<%oMcR%k|?`${M|GOEVuiJZR{+e%lIxh7VZhs{H{@ru)
zwcE^IzOGvvTKebUjo<HLXU`Q|B;c3&<IYT-ujh`)L>;Kl+&)jFx{2dJNcpVGiKi$2
z@{+gEzvdDBZQb*AA9Lf()%qUAROhcf6@7H3l>b>ngS)>Ix89!jTJ6#aW=GFMd)@xM
zlybcJ!|Ddx?C`)j+BYZnJ+gbXD_WP~`@OgwechK{SMD@kd*1fs<=thnOFuJASvJ-D
z@VoU@qPEv3Uigu^H*Nbg<NT(eBO4!@9RKG1{+7<p)W=m1%BLLLy4q@2yxID@7uP=7
zU$W-mg-`8Yr^VO24%1rSo4xn;%rB|wcS6ogyk@YZN;dGy>}yNZ_}BH`KDH&|l?Q{M
zJnPx!?SZeW?intxJ2}(ieY1P*MP1#q|F%Y#Pd>i!%=D##Un?^`?yXom`+WKLdlwk{
zE>4J<^5|D^bk*<O?_Uc)-}vHwtaS2}YjycnZrAsHoA;J$#lq~!H~0QeSX;e5`Nik*
z^fl5MvGW#R$+`8hcDL<12XFVx_uDHkSC`bTzZ59&H0P^&zIO7{I}0kzU&ZsEp0}iI
zP4@e}UnAyxmD&5^Rn>LZfL(95zd!ecy&x>@Vk~d^xl?nus3gDg<9#Z&s`uWNN+Y#b
z7v?hDT(_bqbJ6U(o`3mHo{zbyxn2EP?)DgczAsi%=l7O9{keE`|I%r8Q+}zQeQ&+%
zYEjSfV>ixxUGr#hBCqr@7x%*AZ_gYyU)^1n9ee!a+u#3wFX$2Y`q%UMzOrVg{g;`I
zPfmF?S*_q%+E?A@_ZDYoWp}AodKEvdalc=h-Cw$eYsLG%V3v-KI&-bVulH^Fl6yZ)
zD)jj>+nKxbj;^*2bt#nFJ8LQbb2Wpa=8Y^-_n$2b{#dhniS6!7n=(S4pI*>%cV0-`
zp5G5w-JG{yaZaP@x30TW!?U+eHP<&xJzEmF>*`+pSAH8r^?#pVdop_SZLXI~9)>uq
zjt-qVFZtX%o%=7RTkGGg{=Uv$_uiH-J8xE8nZLG^H#gc<<Vv~V)sWoV+2*(Zh9CaO
zTWuuIm-9D2+C1T8x!2jyK=buq&8NJ+wmbRn*`}zQa?0P-8q2>|-6#m`dAEJO*fx8e
z+fS>uuRX6GcC#`+y6@J+-fHo%klP=nwmm&<D|xg#$T7FS*K_x(zW1lLwsKpW%U0^}
zt~%^q+>;`cf7NNr&9!!W75BI9{T99P`-}ZIH))%yP5pi>rSkR;dA+%z8~g0c9jC-*
z9r(33`KK}W4%z1yCGW5MGs)KM-S0`vvb#UrlUdFEzI0oL&8$@$wd}sj<R>1iI$rc;
zqAtJg`du-S$;+)W#8X`A+cWO%TV!eTGP-xVU-YECFaMaG_@1}K@Xc@0tFx=rqN3w|
z^}8L{x*lhx5oUhD)ZwScRui-78vH@;Z#_7<_Qj`!M=xtL_hr1k|6swL%6#8Ix#-ek
ze_u(vRKDGv`TD4L<gE2NcPG~=*!=$Ru4>%^4^H2`%vRc;*Olk**)60I{ry-e_YQsE
z+jDqMJq{Oss`l*1%dJmEPV-K2mil)m^Vi?0++BD3zNDGtm}_wFv&?;ej`?ty_|r)l
zd9mBQPd_iaJ?G9#-WyY2Ek0K2p6fKFnd!dc&S%xaul8B5t>1p|&);`-Y=Qr7zluH<
zE5Ar)-J31aeVaF&cD+7PV0sSgafO~sYnSYqS@!m=-~9gQ$v?d_t>Q`#{8?!#w@xSC
z-ENuw?*7u1hU-+ii~m1M&Ah&TvBdh=-ILV~Hv9=ZZXU;WwQ}$C9g~uIm-kM+?)o~I
zdu{V~GnVUpc44>QZvV*}5*>S2$NXJ)s(Y2wz9)TEqT8=zo)<k{czW;g{0nOq)rc;5
z{lO}D@3uhq!mXD-zP?;`b!WEKVa`+f_oU9%G$p<IzR&K@y_lI(``(xJ{!S8qDxkk@
z?V33oZ*vr}MqiulTc0;;mvQl1^X<v3s+PHLZcMt=ysxw7l2-54>-&P+??qIbE_gqy
zEHN>ry1(|g$*<hUN56dC$=;Z9`q<*N*YoFYiYwDvc3)Qfige_5Y2CFqce%Y5>*{TL
zXIFOYT=Md@)Atm*zdEqJJb3+WUFnMls{ivIowv?d(r#CQ#qOyw`^)X$RGip8>wVPH
zXt`;>cKs}O=6X~ZyD!^*Z`I|8(fk$p-<HI^ThsIVT!me+Lt$3<tDWawc)seH)_ZKL
zrBh8(;|7!J`_J;Hy>&RhO8HIi_qwl~QP&T5ea>h)c0~JI)U6NaW?q**5G#3A{=vFO
z_u@}olCb}Lw~~8S@4kC2Ygg61XS)0T_tCuk9HqKky|rEiCdUhN0`$LYxvhJ<IA+Zo
z=hd(FD16&ww7QPDP-|zQZT^hp;+pH<-0q&dy{5OI`1A=jgEim7?eq4WioVTswDb4A
zoUKnzNuM&5x9<P9;`+B&YpcIlE`PUe{p+L8l%u|feSM#{A<b|9!XJ;KeNWF&`WN={
z_N`0V{Hpnjp1)hQdHX#V*{y3I-ag>?C;iVhli9{sH}qESwhd!1d%pCo$k(vj^|?`b
z*C)NoU%N4_Qk3`U-d$ZhMb)AoZq0o4{@RnZcUSMxigR7RU47jf+gIDCy$SvG{cL&i
znrT%*kJl>xJl`?9%;#o+SN~z@^YZ%_72e(!zh$<@wtI&RH#|vPXKtGC_}-7*s=JT2
z{YftU9aph;>bwg|E9&<<$DGg7mEXJR|E*b8{pD}vi`b7&kdx78JNM!D0nK|#?@Zq=
zmRbDw#-5k!+D<=PqJQ(cYe$jv5#g`W*{^Q)eSItXH2Um2kL*QrjyY9+SsWO;zIlh=
z^YrII)BZJHd(`Lh*?0RY@42yjR^3yU9z3t-eSFTVeZT(7KYaM>c3}R+*gf&QdoLcY
zF`U&iZSnMj!oN;`T+4iLEkpCa0;|vI_V?EB^P8`}_uwL%AK50ZPMcqbRvi2PD!cx{
z@9@yYd+N5<%;#UXN_273HLutDJAeH$lG+pJ%kEwOWlPL|vAR<$BDQaxw)LmTuR9sL
zWOV+$`o<o9d;7Y5=hC~MhJJmu+B}Nq*TW6v+rHl2cCDHHznT6ad3LG0x2DxNO??-k
zm1`F~na@7NxMMz}%>2fl^B2yB|Cc>;zs~L1kDfz6cx2t4GClq!&#JUHC(Mr{a5D2E
zA?Md`-L*c>*F0W-B&DXMiN8p(!l}mYXsgCD%cYk%b$_4R)U!yC$-3NWsvYZ_{#om9
zpWkrk-Zx{d$HpQnvfDm4db}68m31Vb<8{`9DE9wvH_g9(GfC#3t?#+b-dh^JJ>dOi
zoWG%iu|?w`Bj39=fBt)is_P{L-`r0Ysi`oW%`bNP`|97(kN-W~mKGw{bo<w}`+t~u
z`M7uPsbP5Y?`qY8izbiGs7pS6on-LVk1bqRn6dcl($s&Ne_x+|f9G%?e;#wK?72UV
z?|;7h-@E63=c>>951OBgTkbJm|6u$z^A$q--nkw!U4H6e8_RP?xj1ot{`u{ZUmxzS
z3}0ijz)_&$;DZ;dtDD<zem441`(=Sb>OPqouEgK-+vhv&UvEE^;p1fOxsQXazFT^g
zi+8{K?N@H{IW6N}ZRGzy!Ylss%oTm|!_-o~y|yaCMpr)V_{3>8lQddhbj_{mc)a?`
z*FCI8x;p}1Pp@yf^DOGA^7XEz=PYBj@(pbNE_FJ*htJQRr)=k}@c3C<RvwZ1SEG0S
z+NAfp9kxmQ;h4Vpgtfc&?U~Wrt3PhFcV2Y)>8^k+b=fAhQDw_DEN@E1*YK&`-n5(l
ziNcGA8|sT?w>vH<obW}5t^RHB5rurNdlA!f|CG)X+hf=xvZ`+R%y8qZYjW!k<sVLJ
z<YGOW%iT5S{B!=Ld~u&{aC?3`WKn(f%ePY>wl7?wbzjBv=d>GdYW%KVIs9_gfgFcD
z=NjHSX}{!Uw@lfga&dj>YrpMs>n<j=f4#Z<X8dXP|CN^S`@|I7r`mERG;l~*NFVS^
zGEtG@J%8*)g?`}5P3nw3YD{YXof<SlZcb)cCcqe6r+C25l5eHUfh+MG8$R%HEqde0
zp#114>-FQhA2<wMe}!!BoH$#*;Qy&K;m7aSi`3bd7YQtWzh0!qT=q4`rsWOY64muf
zFK7p+`ZI?2v4p=9Z+cz4SKGfy`#<-=uRHIBDjW>`(fZ)m9iM3BgG>K971ZiYzI~1H
zqq+G~2d$W@id9OcG5fzxdhW}r8s9M`Uw9UG$G0XPX`T+Y<~LG2oot8SNa+akPTQQl
z!O0}z<hp}e7ZXf(vkAXFyJqK+j;VJWTzkTA@`fMDn0hzCwI}o@Z>Z&@ojcFWnyo%_
z_W3nCStspmJu_?d#4}gxN{bKwu3z!1y*_oN|DSWZEgPS+Djv@~cq3S1!dgYitr`bT
z<vUj;HnD9`TDfY;F{U%TZHE}!gxK3A$@MG<TKu|7)lwngDwjNmM<4Tq7&ZpZ{9_Al
z3H+Oy%Jk9t_rC?ZD;&C7OznSdzyI$@aP&@_6WSj?yzzBpoSt~fzh~>7X=l_tW<H%6
zGwnxH_B<_bb|+m81wn!In!ueooH;Mp%WP7=FUp!FQ@`tzK!@?Z6*1d#uCMr+=Q``m
zo{RB|8^xD3InJH)XSwk`*?`a$PaplYJocrazv0jJ;(MAu6dpI<lKz?hd{6cV$7AeM
zEk4~pSIPdcxrhH%(UbjiKj$4{my{2Ad7|F>`P^21BfAwhC;l%xx0^>k#pdw0p4sO*
z$|Cv8dLpKO4LIIW63JiEV=?`!f%u!?3I9uu?G}|!uG*09`0ujh`<R-Zmk0l`{`61Z
z)BVwK8GE(l6Z^Rz``DJh<bI!MP&=dfN7k9+Z)7f<=Qu8&{GwGxilb}E(<LklI_I_t
zDLXQx#5q5(l%CW)Ni6$BncF@+rsi$s&s+8v-kUbrJ3qmX)Bhpc{|C>~i<(7!PZ!5n
zHXSrbDtL2l-lTgEZtR`?!%~Yu;Ql^;kp*w(T4Xo;$UFFRsjZSp#dE=h2h$%4hA6kL
zUnOH0WXG=T|LEH$CZUqV2xgHKWyY)b{+1nk6LsS3_BBQM4}J=rY+-Aw-F!&R_JiXs
z73qifI9~Fn?=e;q58?cDK4(&C;?kZk?Z)dS*S6d|ct!Q^!=Cg)tIda9raXD_Q2yM_
zlcthP|6cfP>U;7ed-M4lC+!d9G)-QA)-GB7xp8%V=)*N97sX64kvP9m>De5^)G6Fj
z4IfqPOw#Wfn5>)f(U9G{q{>#wE^*1}O9>|&rvx2eE?q5g?pu>mn!?59(w9oa6aGD3
zXz$#{%6($~|6l9BzW&d*=)~h36WI#(!)?5;n2c9d>l}*jEppj=_xYI@&p&KFrIAy3
zQuf(XPF4{+#-Kw7R?7y8Et&AtWRl2#*3x_HmOk3lS$fay`;(-H4T6Ss>im~l*G_Jh
zQ0Kq3hr2R=je@}RC9#VuJa371O`p=Lnz>m&E=Y8mh^WXhcL}+~l9q!fJGq{@vT`qK
zl3JedM8|Bo$Coww^8-FSY~H-2#;Ltpu2ZEiSteAeu5gL>hbo1_nU8prToUhPdWk$U
zow6f{bJf{6rJXI4SD%ejnOVeXqcP=n+UAsr?*loPhji7vd+_z(=@U#cGatP6ThD)a
zf#vUq@@BEM&Gs9vKPw8EzxajY?i1xaJGTaTzU|tZt`T^<X4lb!$~JxKAFD3+<!DDH
z?Oo|S?ZAaj^WHzEAB*^Bv!|^2U(0f;^Vc8afH034hJk8cH7chpKV3g^x^S_~PE+kU
zQ+YZztUSK)UlN<U+vB-;H+sE1r#^}NSZKOf`IDBE-LsZ;5g)e5m9aFXy!~+VOi;f1
zl_jSG5*^qIX7BRuoS~LHOFk_q<m|^x(Sx0)@`jTmGo|NeGQB${HRV~JPKZR;xhD3c
z3!>VF0V!)I7Z#PUNvnIDUGRuy<;~zZ3RCAF<qX>V*uqiEzFSyiig2r&h-6@bOX0#x
z*CZ^pvU?{ko&;i~_ns=$nYn|-|G}}89Zdpio6jpKr5jtSTf5FO54&*0GM&|TPI1wN
zBbLuOeCHIe0*UbW+Dt96dT{CCG`?*mD+=ADyG+v0Ec7ULlj|}`|MPH#mmq6|YU>IH
zci%3x1C>uZOBK&KI8S*xN82URPr1`o(Qt0^sz8}douz#%T@8=?_}jKvsCCZ24}Y7l
zv+EzeQt|rPnm-cWcOJ{iE*8JCQe?e&%FEW`Wwr(u<{cN`+z@F?^S`Zr*ieL9{_j?K
zwQXFEi#Ol+E^|-GapHj)#_TH6)j!tWx8a<cXUAsLzCUmO)cDS?!Jl7PJ-ATF(3q@V
zb9KY}&iz@^)jQVSw{e}6XS>b#%tY_ULN+^1)DBPePByx7K|r~{COMNS=AJmyDNg%O
z%?}>dbkCHpQGTuUpwD6b%ZsiRToF42R(m<kUUDU+rP1ZffiJu6ZMnCO<NnP%a+53O
zH?2D5$FQ0!@b&qVCGGCJ+TU*|<(K0)x0Jj6)5VHIYya%(sax^qm)?|$rz;O!{^Y&r
zU5inj(Ou;O>+>}_ugjMIs(5fxh~=&28Q<cSPn3%fmnWT3{WWvOr-_TJb)LraPv4{4
znUvX?KTFQL{hh1t^PfjvZWZ#Y)KYygW%*InxJs?J&!;T+^^dF6`uco|zxq6(y;B}6
zJ));ta%B_ee2cAlht&Oa=X~hAtfhV>gz4}vP>wLT<RWRJeIy}UOut>NP{=Cz`PC`D
z{u{rl1#$9ovZxkqE=iryp}Nn#wLI%akLVKL9}$kXLi$CQ_<o9Ty!E9|bcyeq2uDZD
zzzmm(f~;;L;!#VwCogW@VPP4S(>?ic)2)NAo2UPtxnEaN<<6UD2@50kx#>q7S-B%&
zS;mv3dxacJUb?PLJF>EM8mn1K#mP41#p+%v9$l{9Hr34*f;TQTyx+avy&^ug_Gj>~
z<zLpHm|ZRPp?Xt(HOD*O&OMuVuAV4g_)e5d-a?V<?17>MN|$GQp2=-fGfO^uC}z&2
zvlqggWkl8qow<H8;gYn@gj9v1ZY^;s{)4>YXV0FUk$HB}T6g!fqvDJCdb;G2o)~HE
z_`PZ8&Z|ai1GgL%GVfabsWd^%T=?E>QInh5dB0vRHSOLuO+I7BjtduRIChDdnBV2P
zl;v?+iqGUp9P2kJHr>~=X1^=RG+pvkon6Z7q$!WpX;X9GCm=N~-=y5$O?Vn?@Z$fq
zJ6o!}S1af~y`>%Du`c1l(zQD?PfQDQjLO>{ZcxOpKEKIPf9tblxlvK9nP)22Cw!?f
zn%<On`rWf_*5y&6E8pa=Uwq=!*2rCU8E+Tq##PI*iY?l}SXO-dwbj<XEn73zFFvqJ
z=-bM?yy&3i*9_|t1tY=_R3+Xl>GNBweEgEqg2z>vH%%)1)+YaXG^rvtbLQ<W`%~YQ
z_W0LDr_K1g?aYlY;`U+(C%!b~pTx{2c)%<4r1>n(6PKGr=bM;bE9|;_NMN~zu2VtR
zWi|cf7P)bSU6*6#1tS*-7mZx(GNXPSQ};c+_Q#UUPJfBDeE*9+{Cbe8a;TLt-Q;if
zHqApl%XS+b{5XG7%emy222<qr&$ZZ6B<{0e*X4~dkG}qh_`RX0;7{45U55f&r<g5|
zG!wkWV>r9%&f6bvm!!5T&(4_GmMXkZNHZ;X!fV<6bGIxjND<ckw=rju{i$UN<~DWK
znWB$Qs6~aO-E>*;zw4&RlS#+()z?PL+;oZ7jxbv(pBfx+!=lbQbLry~YPYzKZPNT6
zXvVsA!sG3e#oYUH7Oh>aGy4-rk)36ob*Amp6Kc1z&Tm@zA<&Ffbo%4%lcy#0<t%!t
zpfh_*|0YeHOEUZC@5m}n5uJK?!x^R)8J7!sQAQK3W(#<!+v&{b=yp8*UVR;(>}}Oa
zK@I$;H4iae`uMw3+v|8)=MvEehd*^~cv14F?vd7&jj>8AS$}M}qofleyMO+UqSBn{
z9#xD-K6P)sc2GRW^I_jc+5egOVK&Lu)A%HBf4u#%$2W0?Z$g~4<C;ySHYFWqVoO>L
zxGQgeyuEQxZ{@xo0R!P#ZAUW=FQ4#F?p~VjbD6`?cwy$r{6d8q!JnDg8+G{ZZ|a-j
z#xa}I_wb^vGcunnUwL$r<+99{6EiQE{JXq_=kf`E@9w81K9@NT8ZXR@I3s4<`^RKU
zMAmVW-UAnfX0;hQgUq(>POb2{%n_oyFjK-&1f*nh#3GQA8$z?%KDvOEXm>xY_PNY)
zM0a84A9g#*Wr1?bW&MB8I5zP`wA1T?TN)X1x~iRLJ!d?tbqM;T7|Ho`;*F0g6LRBz
z9br+Q*z_zgXmW(!2{ZlLqNZX`$IlusJ#|!5W>2?sJgB*JLFE(?)oGHO&U(*Z^5D#*
z!+RVW9~_$+d4jvRL;T&no41Ah*~^_2x$pcH^ZsYBZqNRSZHr~O_FXM6keYi);-pZE
zwO+Z<?PQhe84iz%ld5x?X6!w#rWf=%!CCvNVV>L4h^Sysp*0Pj2h=|P++u6yc;J4r
zu=ume4GX9K{t$WMp}9*=#KVpT-$%uT)j3U9llpz%NHqo)^Zo7+(#co6G5v?n-Fy2I
zcHX!xzS|>Vv&A<tL9geLO}w4oe|$G%$v$+i?Z#Aw+4JQyoUbSg-xT<8c`vVL=1cZl
z6MmezcdxCX<6UmY)A=)=*U#bY^zV7^%fa#dUW>&%Pu|ueztdK3evxo4c+ruKy`B7X
z-{<nocz*9##39f4b33N`)-cqr&pDy`{g&FY2}-Y)c^Yr9QP#V7K)tbJmuA?%39n^W
zNN@l4c%HO%y5`@z{k<L=UD|uz9q72>YW0%oK(0$ysl}6AcDEzzj(CPM<S7T~98t8k
zHc%?l^xMT!AU!cjmF?nE36<FH$Ho?S7$0vwlFaNn?d8qG8QWQR{wvLw6hH4G#6P>D
zC+?V$PmiU$hIx0aT!i!r9hY3DQ1guz0j7F<$5(nOSMOM*l&BL>D%{Q-`Z%dz&MK34
zt*f<!)-Z*dUo;Ca)w^_TrI)pB<7zFTNlc;UhNc0gdh<X+0wAFZrcm>V#sQ{!Ss<au
z4Xd>zoVJCi2AJxZfdnKwS87eVz&<OF!*fBVjCAMaDP{KrFNdh;@|)cK(C2X3;*#KU
z&9@@T%T{{$$z|+H<ZoP7ctz1K_|{DqpWullHWx~~Wtl>gE1l=8`*BUsH}c`uR|Olr
z_C^)zg)drtb(&ersb#V2Kjg~J+O+8P)oF4d?#2(kQnNNK(!Ms04aD92L05d%rbXG;
z%<l3}_1&HIP+G$zRd{_=MWdBRqvENCkKez)I{y67j+_~ykMoZ`JAUPppnGvSk6%sB
zq%{m-iCn$=C1?A5zTw&(U{j`g|C!ydSqcpg^N*$7vnjjSB-tN(^85BeQH_1P!9U7A
z*t<s@jJSU+vM^;|d(1qi(wR+bjD>t0ucb-FUFqtRc%`LsGGv;j<~rTi5=_yPwk|z3
zEhTrJv1;p7(QBa*q1OWKmnpnfkPV(t>eH(^<AH#L-D>-^s|`y+nUAfL@>x7XkXd`V
z>Wuw9p3nZIdKo>}51wSHI%Coq%Y#!={J54aS+T&t?$8I0#mYQ<#z`AkW(qc|p6HR#
zIk-hoxzvtLp5v!P&)MT2-Zrxc&(}QpC3~65<&85Z`J7MlGK!t8dGbr{v?Uuh9oogU
z`qZ2@9mi)TDV#>j6}=~z^3Lp5z8oLf<WrvN%5$ygjIg1_jC1e*Tl`@7_3dbmU4+j4
z_3!d~f4ASB6<B#8dwXK`x2F$|Cls=B@BFjQMdTmH|L5QlHvPpn4|n$*W50E9+M^t+
zi2t=e?c`%ZwcU=cnQC_b!`D=kiqw;=_54qJx=N$7Bdw1*_lnh*{%&49msQbX_lxbn
z)ij@k{f;+Zb4ps5?eEhJv%R}EuYLdR-|Fk}TV0cSIL==#GMx2q$FEOTbAC48`+WJo
zbmf0x*BAB8`E&OA3A)5L?XT%nsQ*x^uUH?|yi#KlkE+A;JNvt4iB+9gb~N;X>ZNyf
z=RT}`Ao=RyW*ZCNC9!YT)_vr9IQQT;=IcDac06Z!t5acTJpb0Cg0Fu+zGPo$$!SqG
zX@k`F$X_ne>Ysb7{N$Vti^@Hg3TyhIBXXeh`=jg+0visN{M_>Y)!juKg1`UPTd?k{
zs`(4PM>!k%7JRuV&)VO~&s6rIEzWFW*uNFqU+CRyHgCJf!TR!I$`+ZuJoD<7JI3xa
zUc>(SoL+2v?c1{#roQ%DzfVv6JoBm}zDqyV)^EMf?tkTUgmKojf0G|<pXc&dgEvm}
zN$LuhG8_K5cY!5ds%#by<0Eef?EidX;x)@J_j;McrPivem%fO;J?UohWX8^<@E^Gm
zIx1}bClAN$6S&#@*tq0%<Bgg`DXmux@()xD%jAOA{^yW8@qG)Amr?z{*ZZ%n|3CZe
z>JRGo5;R<=+~ut8Kc&FlQ`5IFbH_J>EuD3Sa;7J4EqMP#=I;s7Yj*qVcqE^F|LCuD
zcpJx#35Tov6S_Vusz`D7VLO(~EdRjbd_v?#;X^B!#G~B5Ej`jct>(hVgEB!L*%N}Y
zZ(Z`cF137KjQER;2*0g|=S*G4Etl{kCg<4SJI`X1w!c-YnWUciK-w>+gDrmEg|5ry
zu4b-!>}p3$c{%3#^VjXP^0<_hwlu|d#?-K*NlP<LZa=s7+j}(czn>7#_aMb-zvGh)
zk0wdWFPr#qN5Lbnv~vB-c;~ami+0xiQ2rwy7P++hpHfg5=ToEDu)xm?6dG+}i~eh6
zNxid8S@nfmy5qQ(U00Rgw4P-`>u+tjxlMMm-3j(7nUB~x#oq_>3r%Z{Z*FgyTeoKI
z<c)dyH`6AE$Me~>&iQEn(f_T`3*$>t1(|;tO-=dM?(TN|Uc0<zL%P6~f9Ve$4}Lvu
z&;6fAedn>Y=Pb__7ft)YeRE^=L7hue&G^f>{g=&M!0~DARYNb0{i`>9n&#YiUiVPu
zCb6}Jaz7XumllM-zAvEa+7|W1jY-KXbn%%3YJar3r5=?BEqeS;{N=*5Eo&C<==f_p
zBQyHw3D1{#{RYpJ+1d7-6H9)@x+rlbvldI#lb&j!-TnDfQ`U1HtU3^Q;_SxtJU5T5
zNPjxze%qyA@^}9DyvwxY%qsfQx3%QO37Hos3SVfvyvVroe%r2f;VuG<49DCx@?1jr
zT&~oMyKK|xZal&Gevy)r)HiztGxfQK_m#KxmzB!&WXg%ioWE8SIkD){^1KDIVLfKQ
zbs39p{}t0r+rM<zb*(>FHQaNSh2Bxpj8f_}h<!MzW4=mEyz>{um>ER}IUX##dFGKr
zuiBvoUU9*ry#M9&9+X{rR9#>l5)qIj?JTn)!8O3@+m=Hq-(S|=;<ww&&*k_}nv=^U
zTH&-<R~k=rnqy>3VeiH(pHiL$UenL{(XOe;tWwivTR9`TvG86;zFgvM)ttYTveTQ6
z71nLOc`<d(i`jE5KC0<wXNcL|*r)$G`<hsdg_@DN+Qa8JW<0pvy)ilX+wn<FLMIFC
zSVX1@Px(-6xF8`tBl-A0g#e-ZE$4n6yZa{9QK&|%L6uM7%@l_07%>H%oon~W^B*j9
zIBGBIARrv{F+Fd?F<(x{OU`VC@sc)@pAzTZIQBrGuH>-bi-3gef;%6!Sahv7&XK?U
zcT&z=&oYnBc`uH58VF4YV0Aprx4-4`qXOsdJVRB<l!%^v6N+C%p7|)K#&f6cuua4?
zlbwnB^)b`aj@9maTJX7tPq@ymwN+UA(i`{3A^j1-H|8Dg*t4^r|D(I%qU+CB7)>;}
zrLz0Zj|ZF+E#5jV`B1#Z`|Q)Y^h%@5zbCJ36Fet7G0ttu9pAqBWi1+7Go@NiTvugD
z-rwK7f#X|#dA>?xlDde}#`^+&%u0o~Bzzmn?|&}6@0FI^>#=`bFXu_CQ|il@?x=N`
ze7ZGb!kUlOkG{6tW|_zrFD-oOYx;i+VWHr4dpS9yHzf0ZO!i%{=GAevjuPhEGYTH@
zy$PIj-axU?G$H>`r}T#6*$S5|bCM5r{$5`^d%})@t>%i6|Gyr2&9t5KW9+dE)!19x
zM9NCE{s{g%|4SoxLW;fZ9+tUB9ytH-J|h`5so}uGo6FmeUKWz9DQJ4xS6VS8Ev~>m
zXkUTEiSO&TDOYyX)Ljc`ewp6;#p=hDi4}a;TKNT?g4Jx;kFC7Od45T5?;@{bw=Hf-
zSa99$%wNO3&ye}rPyWph{$4nA_cc%4;RV@`_xY-Pl=`>CdGgBM&+={$Q@MHW?EM#f
zFUHBTinCr+`Qp;3iuWhf{O+<Q-FnCRndg<}Io`SlEBo)3=iOD*;H_lb&b#T|YW>&o
z=DWKNPF>9RyHNe@zTAJT?Qfgrhwv|qHIZ}>T{ZDb`|UJ|t(JQfKN{!gwf*1zFZ@r+
z?58WvZcJyhKb7`(cE}~~svp9C?=Qc##w9n*DDU&K$v4hr957#e^-I`k0~_v@hnqrv
z#AJUDuFQR#el~UG23uvFiXe-rSAU<}v+dXBw9nUW<=-z6*>Cqd>izQ1w_erv|6G$4
zc6?s$zpHEG$~$jI^X^!5gFSNXiY^hCO%KvP+<zWbD{$6nwY~PNzjw0XOq12u-|~D9
zJAD4jhXWg#`R`lo__Q-jzM>+d^qH;AmR|=BJFhl=|M2y()zzz?p8xV;zSv>s)%-R#
zTdY3I$wk#Zc)0ND%<msc+aK(`dTM`b`+E5wU6FGu`Qz=Cg*RJ$mfM$?x_5ijUmyPI
zT|yi-Ha{f)e21F8roG-r+0%9Dted+ouWipZnRM|+x6RpqQFcGhpRO$5a$&_Hla{{I
z_c#TtX7DOH%{P?}@w}SqIqlH=7ypH#=bqB%(-K&Cb)#qp|C+Tg*Hrf=-+es!@G-}W
zN-SERUAr&5l1VFlH+fB5wY#McXH$LWS}|VM8(be}avv#U*8H(N+%Dgkb^YZ6U4HqL
z&)fd2dVODO(ih&kRcF}+{~I&^^Phb&V$XA~@B4S0jfm}9uk*FhJBF|Bo*P$K@2@LK
zSI*yZJD3&tUu@}$3(x-A@a3NSWpiv*e$CPC@g;J}rrZ5>cji9d*z>RUw_1G^UsLFv
zf4W?G3(x+pl)3dM^0P#tZzxyfa=A_C&To=jZTM-bME%9eo=`FSts8dCJwAVKcyj5{
z`tD6h8K3Lq+Rf^(+5C$%OP+egUw4Vvw*UKB|Nnn`xyW}-->Go7zY4SKuQ__JF*+44
z5qjyi&YdoU-nqXm&xCXRU6K9U`1yx@YkuYjUX8JzT#{bgr=9nA(NFh`*LHEO+v>vh
z+<GQIKbD^(_ulc<7oOdy`08l(KV<&B<LfRwTXTHfSLLR1v*(*_`kkY{f410S`uelQ
zmP-46=h>U>`kiNkge+fwuK0W8-Q2US=jR=-{QCJ>VaDq^x%O>owQ}ud@1GZD6kmH@
z2=PLCtz7oS$~A>&AM<arv{7jIrzsS0p?-e$=Q_J~v*YKU^LNMoypXnP?epRqwU$hI
zCZ`!m&IgXqvD3crT4m!875mz0Z1Zb(aD4o^rr_h|X{{HY)xK2RV)=S$`-NwJD_323
zcHYYG>*gH3I+nlBzU|MGIv1FGt^VF+?FqfJ)~MJSiTz=iF;QW57+dXkzO^ys_fF56
z>X^OHS^N6gpPSNBFYJAP;Z*7WeQP2mO@3H!DZ2YeKRb-gmVtk5OgZD3SyN|BjNBr~
zZ9B8aCgQ=#lsg9x`Kc}D6Du*2EN(itgxzdi^yIWN#}<^nZ0vn~Z>i*F!xy<#36FQ}
z%siHJWszCd{yn`54HK>Rupij)<Z(n%0H<Y6)08_#o?(qLnK|dS<rGeG7q35JI;p6L
zQRVUP(+4jbRrTk7IH!I;wcB)~(8f9MrQ{;z_S~4pxGjH9=~m~UPnC_@GJ9@ZwJvL$
zS9(;rcWLykjoZJ>ndvU&z5PjY{!7cx{U+1$G*8^SRGg-msdHCo;@+jt&$wQS*tJx-
z+WY*>iAy$qIdLK9R;5UvkyLMAQ=nV&#XyZy87fv>E|R^@w{M*|cdmF{-;xc*(egKM
zR-O}`BvO`_tzvC`ey7)@L+5hmrldc&4EOr+=8jEC>fe;Y&cxHlWgWQs<mXO_chCK`
zMe4%x>-^u&%X3=o$zS*2VX)_t`rLb|Rhmu=%iI|l9ri!f`gUT9gST;H(A1hIFVpuV
zu&!OgnZYW%^yh<LGnCU@f6ZJOv8O2HV(<gj6BUizaVdKgB=vv1elT@;*E}ZunLX2M
z4tDoUcRJ?%v-HEF?s-i5Q+uXY9qjH2@9PPFm-E4@^<v8G^T(b<hzn+1QS1||Z2jFT
zw!`1o;^gbw`djvJn*0=W@7}ZPuT%H!<>y>J-TKC@n>+ti^pmM?Ys9uiY+;!fpwt&O
zuOsYVlbGOICc(9b);EjoefW#>!ljOkOz|z>GHmVp_ppDtmm(K7zq#4?;Mw-ej4
zpYFZ*C1hnydIbNqxv{(U{kk>#>>tPSs;{LxE93(9|6CUIbKn1G-wz6Z-M#p_*BUlG
z&wytu8iPNu2{9IadB*xVI7x0!pv9p-F3&~uW~?{lKj$rzShvVnSp3ZO8SLrieFpXy
zfA(@e%RbXwtl~an{tKOxte;Jv9h^B$`HX+bx~EM)r9MBXIV<=~-72~GU`=mj!L{cc
zpM~ds-<h!Qn2kkwNz2d9b8@i;@yT*?8m&OqEC5-f?pWver=>$!aeqQx)EUn+|3k`s
zK#Kg5{w?2C{<`U>RI$)!`>U}jAZJXT@qgvJ^xX;jj?Fpp$G<fFF31Hc&-nGu{9iI-
z@(lYO2LC4~`6c~(aOjVJmu2VAX711Sn$J{D=y%K)DD+7B_W>+^^6bN-=fU!aA@a}o
z^`Qprff@i&*!dGpfx>=;I;SI^o~KpQEma>aneuef#yLWTL5GS?hWm9|XvXeL(O&K{
zXUdwGqN%}3ez%tFcoR5BsPK~5(bV=wQ#ynh_CKh#+T(d!c>3MW$x40&A5Y&q;wh+J
z@aOb7D7_C#uY=O_pmZOUt^?CG6%T(bcbRkG<HOd+^MwkT9*FPpZ{P0o;KwHj|M+x$
zng3Hdgqyl*I<>$GpK>3!SAE3Nryp<ePg796pyubHkN%w&jgL=@_tkqH;gpHrSMVoT
z$q&N_h?7N`j)&`kjkMTT1hsoA*vJ-xbuo{AfQ@_#HBuX9<W8uOr=YGvGlJm<>-)<O
z*9uwetAZMN6>KC+-}*SHE5Cw`Onexkul*cs2SlLp@oJbId!cr`g4qG_ImFq;EPeBL
zLlx|VnvF}qBeZCG%+o0y!WMP!z_vC%eh&3Ax&XxR&n$iO_d^Z;2{W94K+6+@`jdR%
zfPW5gs72jBm~9XNh~eBUeepY>hPOfuCtAScIQR6LKVYvsgc>dm@e0InQ>NqBA$*H{
zWzeAC3bkZ?EHvofLUm@tLK+s3w;&<Scu9}v1;`Gl5ez?A^9%O~##pcT51N_&z`o|+
z`TD=te|@cIzhQUI?Q&ze!Mp1}b2jp9So3au#E;d1eJ{5Eo+J4;ra*OXWQF6>_9a3N
z4lF9-jVE27JW=v05;WcEk<|I*nEH0xoi9)7o>!fALVcQs%CrkY9y)uzJG4b7SXM-}
zHLJ`}wVtUGoUK3Qz}|08oHjZ7Qx2T`=EV62#JKv+iOERGpksjoQxgXpr`jDqwS!Y`
zpH!JqVl8<tvprR2PB7DCrb#PgmW#`tEUdaTQD(V0h;e12%<^y$<Jv@-<>es8jfrz+
zO#kQ>7vmG*cj0Ws<8Kq^ESUY#?Y*+4qd9X^9vjPD9*$j-0wu-=PxG<f<>~5Ee~}h&
z;p~D1vmG7Ho1603Snv7>_&J)e9uzqeB;e(!!uovmgA&n6LUYzM6^9nA;yM>{uv5#z
zpLO}l2Rf}u`&f_Gc)!_nGHIV`_s?lME0)a2hq0eUZ-R3q{&mgB*G$^CwBzSArHt7K
z_Oob+geuz-t!L4zX5_C-+PAdp=QJ&jP6Qh)(Wy8|`19I1GxDDvsnJ${7Hw&G{}iW^
zCWO)XGtBSI_9H&0yMKnoo!R~=Y2Q@w&ujP0$bWjYMq9sv@kouf{<G*x!}~&)H!3`f
zW;ML8)$udT@yvFvq<x_RpVv0c$QNZ<KYK>L=#d)l90T7o+f5AbUpi9bE&N#*mGhyf
z`=^*%>4#qrRA2UZ704g?*2C3dxj2Z+|L~hq4z@nannMB$^LA`V$%s2UY2i*2@3v>>
zbtGpQZ%)aWcV?2Oo>D^t0|V1H?iv2GkMIcIVoB?`pr-HKVpiCxbmp+e4i>ZPmCt$A
z-0pkyi#{pcsq7ec+*;^K>3(I$ICUGLC#6S~9pl<TjMK`FanC`Fi^`6UmW7Ui{g3&+
zxi>A6J1+aJpT*U-Z<oKgw#KW%D|>fEI0p6$@BMd0c6Ws1LqU*KK2&NqNNVxB`$xIB
zPIV?}ajn!?w5Xx$k)~Cn>+|(9X1sVKI(N^a;_#AJUFTvhc4}MYyDrx)y>IL1ci}9H
zzI^FxFl)u^_k~4Gd2V;>`X>vQ7{6kxnKNg>?7;009zS8Z>+``Vp!^|-)w7FVUR^zF
zK1k{jL_ktrUHwJcmA5}EEDa4`wL$egfk<jXBy)dSSUQ?7&O3AbB<HS~3OZNzLImEO
z0|`i$*4z2{iTHz5T!aWrw)6Az>DlEA(cb$DqWvmFa<d)C?JI771-V#lg<9!xh(Pr>
zkbv9Wtq?EltDQ6F#aEDLuGP+&Gee^EGep_#?+|4NAj-t*z&<tq2zIgBH(RZzQ@kdg
zm)&DmA$jv1|GvAkZ9Vw;7qkB`sGYEG-<tcsf`48Aru*$(y>FLR;g8;iHQ!`onU)zk
z*qJHRXdh#k87?cw{KSM!<2YMO{!xhqm#%u|H7I2;DEtucc<J)`{gMj7r@Ib5Q7S4D
zRNd*Jx6{LJr$?ir)4o@;xu?I{<eq--*QU=twyg^%HV7`7oUbc8w>De3VwwEu^2Jhx
zk`wcoR<S4_`kvI25X;G^91^JP@S-PBnIT_<F{Ss=d!J{1*``5~jb}SAaLluGoOk_@
z8^`%hg9%CDOw0BNt$E;Mn6%bSOL>E~pwz@iUL8`3HL8cca_$x?I;DLu>a&L1nyVhE
zEM=-r%0V%lfyyoGU3R=l4tMgbRE=24a<pTs)XJU%>s&Hiy0jIuT0Tq-;0$+qx>sn5
zsP!MeE<sa|X^E|=vv{-{E~G@P^P4QVLnAvPI9BA$=0n|w9!E}jd2pA8j`F2Sv1#0G
zZc9$E&Wv-Km{`T>+V)aaL~`2n3pU-Qff^-KW_n#p>Dz1Q*D^uxNT<NHtrmh#41L0!
zFXN3SPWYz^W(ewjDc{7A-NgBMN`Ta3&4(<HA8Jnd+WvHcj&e(-m&ROW3Bi5h$t<lo
zhKpHT+ay&rjLv8{PE2&;?CN>pda^Ta%7vecudAebO}Nwam~+MjhMd1oV(lc^0v<6Q
zW_WniSm4+-zk5q3KXOT8>tIu7dinI(o)qQ?;VC%`iJaaU4p&-t{M5VI%JJ%hgu*MQ
zg#}kyotTfrdR$-#6j$0%nzzZ%tU+}BNj8C?SuJcXu^qElOpfhXz}L^XNKb^zJyye{
z;dtu_9T%|jDUv%@^Q4F;>E2Ia=FrS@VqT<oBsNiDw}7Lp9J5QThDhJ8fDDFyZo_pB
zMa(X-9Rc#5k#e5%&Mwtb6UgGcvy^2MV@vHi3&AE<8?){z*@a&Y#8xT@D?2g=RmM)a
zRcLH&WG!mqFy;E%$f_d^GVix2p0B>PP5&l?(^7?nj2AP7r4;OP!TzvfcY63jhJ*LP
zOy(Z#33nJST5ec(%Z2B}@?ynnh76k+TTTUn948{B@Xm>)w1P*VbYXzSE2o8wkMvYB
z8dh+xU0or_%=I!x<L5>JCso6RjDg}@yaMHlO;$E+9lHWFWJ(uaU?>z9GI6-ldT3SN
zl~$8Dai#di57L@?E(?9vOqn=o!vw8{YRRI$16F!2f}U|VqM2ts%W`?{Twz-Aj9D^j
z+1V+vv!5t2iBEW{#*^Zz{;KNxBZ<g)onB?Uj?6*6S29k?NFA7LWUQ98h<EN*zD%Bu
zcP%Y!9r-OBQVP3r1^&!n6VCdZVE5*({n8H~+j*2Xtp4!C{!G(;+ZN+>X<OE`pSaBU
zeUk4Y-GlsZ{xL8{Gu)Jza7-$(_(Pk$(zi9%mt=1;2i;(9eS7fTVS$b674K{h%FQ?=
z7kNYO%|8Lb>ZawVgx^HkN5q|xbG;$=W}m2FbyNB_kkGc+GjgFf<lfXt3060$F9HdP
z#GaWqXM^pHT05n06V3{5ce9aLvaMByE69cEp~D0_z6pmNx-=AISS}rBDB|!CWNcw}
z`1R9&-apN>{U4tA+kY>1i7tAy?TKsd!FSdo8&v(bsOsl=J6;ic6X(Gg&E*o!^=Mnh
zqHPJ^)46U4*|7h;G41Q(3#~bv=j^*A58ppxDH2ujzDes?Mn|}kki>DJ-b7KIi!)4T
zt4eKl+2oQOrZO$#4ATLj-p=hhfr*}lHAf$cx`)fe6y_v{@wKJ+%t`a$a&Zlce+gQI
zrCg|@(Zbr;FY144&f&K#9-?#3MtFYVo@aG7glGTqI&G0-A@|sL1Qqx69Mn8|dyAsh
z(c7Cq#0C(t4n(X`)KXPaX=xP@aq{3`Ja~JPlG2ge>p{dCB_)?^OUD^|7xKK^@Ex=?
z=pj#C)d#lA?ULF5l9Y2*W-QGAJTt{AXWvBiYY%q@C)gU68LF<R2wYl`lYXewL_~Vp
z1r;@cFIP3ygzwZ@FE_gQ<qy}>Ck}s?Z#jAT`_3Ql=fr;y2swIPKl$~qC9S!0CtRM!
zc<2sCyHAtdviyK&w_Zqx-(K|EyL)F!E$8i)Kfl<PuIb%Z_*Hw?zAXj**QOU7m=}M4
zLCn^R=Ih*CuTS50X~I|4InSP5H`nmY{nESI`Qq25x<x6qobK&Ezw(~)ldgT7<y%sl
z`C2<N-YMbfb#o0}kTP|UvbQO<oa`(hW$qwlZY8yuk*tyNhcZp-YMX^Fy4~NgOCUBr
z%E|fK^nx#)@%I<-Y`JK@?wj*<b4NW<zL`$<3vQP$E_f5CADgUoS#h;b){V&y&kwum
z9o3p%Fw=YMxz^j;qvswCx6(Sj_{E&8wcOh?wp(?tFAM4Oyl8o~ik(kv&yBs|ZRbu-
zvzd@}mV0{?NVY1Z&i7(u&0TH|PnE5F_in5{J3Xd-O`3FVQ+$$e&Z(KkPC7R`1+t>8
zk7<=1OYuF%ceStE!Q%VPNBS$a-S}3hv9H&0;jKc)jwUn3MFlH$w*|{|<sS}MQ5GY!
zXoW9_R!mlRE?4`b+a4mTWW~EQvV<RTO}~}&d;h{8W)iJg$6b|A&Gd81co-C&v)Wwb
zzS^UOw+dHUu;x0Yon5-^#=1O>eP@q5Z+&c3)OD+cWwv+jM&3ICHM6I+XB}64CbE^Y
z(ro&zr0T5;f0$YGU+p`6KC<1H^~$sRQ*DE)r!Q%*I=<}X6i-jDT{}&VPyX$)%6<B&
z8(SyU9GNwx`t!<pNn7tMeUp7P`MP)4t3}*u^IoY3*=|ZX_UxU>RabFeo5%i3s#0$D
z_&&^B)vY&2;pnNIrypNmb$s1ik*lua{x<)g2mIBPDA?lt^!omHTl@T<To+1|+Fv)*
zqVu_Z`G-=Y8DH4C*IrWi_?KNewYg(UpqZJ>#i_lPuNt&x|H$j_-Q>t~OG8?^;l-(A
zbJiW0>RXe4*6pUktDGslyp|=Y$$TXbPO0rXnzcAbAl>ZLF*eCvn+(%E3Q`weo)v#n
zVG~H1c1db--`WSK-0Y97&zaDbKgD-e$LIM|4o<nsQp)@3eeXKY&H4W}Th3U=>KNO+
zq<V4or75%jn+Pn+jtjW1aQWT~soCk5OM9)=Iy7hhXj|92DY0(vMKinIX)9*uunNZ=
z;0xa%;vI3P(8DM8qN>iB#oJ#ki#YPAFCpnwmtIohyFH=iM~%dmEa1E%8hh+eP37vm
zu2!9QD>V06bgZi0FzIOe37*o)Yg127H~OC_!Y7(`yh!gvUwQu9t<O$OC=YtAQ~5o+
zX4x8-wfsLBKYzGz`7l#q<B7s$$qwJzPM&=H^xg~uwzs{V+|H^^x^E5}mT>NoJE-h*
z`*m{1g>APal(x*(YvagW+^Ohv`*~uA$~2F>nxfm2XV1G+bn7D5E|#|i%&|>ndm8i{
zZ$D7?G&t`j%u@EXfn{?_yt9Ci*Mqn#pTy<|FsUz|R`R1oXveKM4+l3EHbD^=2Z4hM
z2U|d0xFYMBER*xp4_m(7(EhT}kJE?CV^PtZxDu7)FFoCh=G+4@0^N(|#FeTXe;El9
z0WlKYi<07wNmmvcCR#e0KkmKlUeuI#OnPts6BbwxPT@tG1E?WxEmC5vVKon_2gk#;
zOH!o7*wKRZq6kZ{fVZOt>qL<`>zgizdUzFV;yM?4aHW<-Fsu5i2R5Q}mNjh_>G~-q
z@>zG|X*EzM?pgGv1(Tp1I^<5A&a>#GAKK7P+_UJe1-S?|yhkT70jU%BEP9oK3baE9
z?!>K3+Nav);df?xQPRGtNZq-PCCL3cA!A)gZ|xLnckThJ0IXBz?Q<N|XFF1}8nZjM
zClB1I)7^LwS10bwc9Vmrb)Q9>tX$5%{(Zl&OsZ$yw7mK$sy6et*`E@scHy<2{`tto
zoc4-q^DC#ds|e<$7`^9LaGd<-&ONzVA9U`>&ARcpphemHqn9#6JUi#Q(od6XtD6s9
zE~;)$;y)vJ%dqmz>;z4vHPx9KN^7bkG?dm@OK2*s+0CB0U2pR{mBlAEy!&?e{LfsM
zi1J&3?+TN(+zQUE<#=oOnMd%{XEhC_>=Q02ize!ZwSE1Qyv)al<J$JEsxs{#=G>2v
zyf!&xrV;1yMBBW{nv)CW7zlKoQ2Ejv(Dp4trOW5jN##eDC)Jx8?hDL2A)~JJz_g|P
z+p$iLA3P6tt}9e}cvW1$^I1yEbF-pOmEfKa8TNV;Qx*%%`*%!rQjW->=E*x;GK6PN
zP|4F*O;wVY>3Lsu?@?kIt46$^*WO9@mu~Ridua0i-&eH1eXzHTO?)Q!<Vy3*wG&-u
z+?0xJfiYYZqLY^eJ~`7pQ`pcYV{)U;AwT6vBc;a|(qvuRX1Z@onRM{jxy2D6FFXs>
znc4E#;IqawpF@Q+Dn-227Rqz*OupmHs;6OmP_dgM#xJeOSxj)pj593lI){7;B$Q6B
zvok)J*r5{KGxLFg%cNe2pj)Dv1&^Q?pVPvhOg^nUuT5}`$P`iioODUg>6NQv*OV$(
zQOk<j50j=<wU$45AH4p??oTIIUayi}dbF&Ihg-nw&?dR|XRAacr)8xGK0D<tmZ+DP
zB6#ia6HTQx?d`!X5&YfDIyT77@|wBwb+@N<n~w5?@|IZ__3SHG8QD(OIkc(OAXw95
zVp>+$?B45tHNF{}Zc}H?z7`m=><9DjN1IY6oy~i8Rn?m1^Q%d&H#T;uPWCZPyQA1`
z@R%>MMY8;a(wWtsVu@{9n>dU^Cc4g8*rjubC-ezVqh#3$rH2|Kf=&(#esC%(9C&gz
z^BbdL&aX}U92<M%BN!W#WL(=U15XyuwtRU)NoiqMCeO{*8xy;94i|BB@ozlL=iSC;
z;;Q!3;LHYRvBWmnO&%P@M$t18+jS1{Sf>c4-B9c{ILv3cGND!0iKp}T6GtA;dnQ@(
z&WF-`eoF}5p3rIY`o=!rc}{O``c6ySB_LUL%}4cs-@_7>8<W59zjc^zL!17`wM$Pl
z&fw&TY+>bKb^f+=(S_J)-U1EF=kzHu&R=EDdvA`~I&0pek7pj3>^kGX<ikAD6{n7R
zvDKI`TK;>$_%4$#Xsvav>;t*#DP1f|zavB(mHxE|>K!dkc`b1?gTwCM1IDh4t7i(h
zzPS+kNG(N1LrBFU;K-6A0X=S49`nmBkeFM=8F<96>gabj<+FZfT`Zh@B8HlVBAPRG
zIFDvb@#s+6mMMLIQ}0g|Co8SvVxOkFCC<8}aUg54!ZwRjJ*u8MOIm6swPt#GF|5{X
zys=2Ac%J&k37g7<bXYPij1G7hb)=p=V>#o<p&hC}4jeL(v^fw|Au#)JGUx0at%dS7
z8w`9m@oY?yJf?O!B26VPG3J8p1_R$Pu8nI%j-@VbakqUN6?yU9I*Sc?Q*xR;7tH_F
znEONW*N!v&snT!71n!vq`=NQE?(YFJ9r@<MpAx6dZq;h-$mLW@pQXc@6e-kmdQ!x;
zi+Rfq=6VYlUw)z|a5^?2=G~!9y=BMw^P*!eSZ>huy~eb04ePN~U7gz*+f^TKQ|*|X
z`AM|nskVV$eBw>F-Q`@Hd*>@GKN+krZTW#6Hm#|WZ@=lCF{-;XOU=G9qK@hDC*f(S
zTdXe_oc__7GHZ{^u}?yldisfxZoBXDZtj_XXX#1z6dn1Am!Bv%7%M(J?|x~CveC4@
z6DuzXo~voGm-U?7d*X*~W#%TqtZ0ifCjW9&e2tWnPj<{vlU%rM-C>`{{%)6^C>c%b
zK9N}@cwlzVk(#Xhs97N{$ASbceYKb@iUt3LxTpx<v`JB@(Yv<n^Z#dS_ol|o{lDE`
z`^Fl@+40HN|C9OO^wtQ*&n?Jr7D&Boo2s~~{0@`j_1WJKYOq&zANl{bVD^XoSFQDa
zUH<y4*6CE^J*9)S)_2sl<$vwtep|A)QhsXDg6$qp?(uEsyc50m@guX?{CnxkWM1eB
zP1}ArchRS?_d6E&T#xo$x838+UB2y{JEQkLR?>^jzqfpa%!|273-bKU^S<^emw}Ap
z+jc#=WqYps?F-x1-YQ(vyUy%=@u6>7-4iyw&5-un7HZu$>EhLELaTKT?bx<Bx8FDC
zYoD!|W4O%?HUAZrtDXwQ>j&%1I2nG%g!@_9^Sb3be@r_0H)P}9XPMK^yv_URSNzd+
z@^8lE>a&-1W-&yYCYP^}oTVObepzSs?bwHNpFQGE-w--4;Ij$$^Rn&b%Xj{`bn-9D
zroGQPr=P3czGOo80UIUd-`~H@IzD+~^FD9Kio5@%yxk0TwV4(ynp*qe@9_tl<$fP~
zls2ic?*H+F`Y)`-Hvdf6ShIiATdANQnL8zX>tkve<CUD)=WE}Wyw+TrK7HN#ec#fI
z>o3fWtBuv0$G%_Qt6+g-%O7Tw$4Yk6zEMj%o77%E3o)B@!y&ynZ3B<&0?F-M8!s*q
z-L8?b>D`Ld#htt*W*KbWj~QnbYAZ|oM%nf@sl851hG~eAUm&?XYV*Y<Q$J{AY|2}e
z2GyW>gmG4(B#X3f)YS=1YOfFIO8e$4*z9QRk<E9Z=XBPMj7#5qG&456t4N1xNbO=a
zd3;JF$0YOj77>%k@^70j9$~YRHfer!l5tkyRbjJPTlOY$&0539mSeK9@f_RP1uKdh
z(qaPJd)0F7XEmv<4rYd0vBp&PfMj%b(qqrNtjifrz41BXCL;f;M&YPrpqJN_DZ(4`
zdV3nb#6$*0%(ZSYk=0-H?$>37)UE1WjbCC`21c0Kw3x_RE}Cby!12_sKoho0#ZTQ6
zZ9fZKD&gs@I@QRg`8w~Zgva@*Dy^;8oINgIRC)E1OKOQ?piuO@b5k{2MIShOTrO07
zby)plw2#?@E^&vC6VI^+_UIkG7cbJRG1XwApl=|HZTK;fd*@3!GOW(I)TU^%27YwX
zu)FkAq3hzZ8^4z)2`m*-H(K=QXh6-9&5kB};$JgdyzzVMjgBDsNN>lGJqlg@C3YQ2
zM>JplP24dz<dKV8$Q})_*rVH?FDrz<Ivy8sIm*5GhsX0~4Y%2o?s2!@_FU?l;&QYb
zB6e)nq<f9+w>?uqV%$q0>Sj&4_r3kLrz%LS8zOdW=A?VM9k*vrFkZT1(j(`&{7WP<
zy{aZF=cNZ-Qi)SN+HNK9VR&uImv>%w&b6%3be#$b=#1b?x2+1Tg)c1=2@R@QvANM?
z&-^b8mzI2=oK$v-vog3#OVjSkPlqnS<x9*rJt|XE@zY$j<VV1BX3b-BCf#%BzU`Un
z*TAu|VycMz%Nl{B{EwF=`x#BOoG2)|e$pf5x%`VHioL3K8|0~@i%mDe6e~7C6Dyo_
zSx|kZ*PIg_UE!XP$T2_pvSPB&Q;^SBLwxQw`$@?b&t;d?j21l#4FW|&$iaxolln|G
zL#}~>+Y21rNlQFE-DintWhyCa#i<^3w~}`;Jhx=YV;?W4b5j<1b@7+lO@OGGvSf+p
z9*DrB?S@N}eZ8En!BuSW^mLy+rDY2|04pX>>ND3w4k>k2*}@<pq2=HJ{oE*$?B`|m
zY)QaO;h&27U<ZD7M2JZSe$>*myL3}wRni$x-{W&aw2F}&_-x6tWIrv`pbNTes6O=+
za*$Z8eAzMCOVuyM<tQ{rj?KPOvd44jCs>etb`;5HoY-f!GUOIgh^+DSJw7W$D;vqe
zOG}n1`)W-!L5jchpv#47ri$rafzU(*R+9xwRni{C64|GgCj0J0NmY8Xxu;Z@_`(y*
z?4p+y!Fr1Ma8n*l@phk6#Muc?VTQ|Nte#C-Y@}W!++1)_{FE0YzAc|#GF&bL3Ig8i
z)rKzTr&>P!z*hBgMsOb}43<T_1Bn<so8o<ZPEp7+mX40L)q7|3&(khGm3T&TdY|Rf
z6=yo%EPj}z-}Yjs&~h2KIYlo!g8M*8YFWhV^Ha^A8s3}Ye|+|*kb5p}CTk{f9Sy8m
z^4U>jvG324Et>wIoOoDkrNpA=r)GVU$Ue0^*|!oDU{Yb8M+I!dFHJe_5o{-$c`Ddb
zSn}cqFD(&wh^vjCUM^f#<8*Gzx=CER-@y6BZPurk9>I2+nL_r_P2kkFMst3j=~LlN
z%Sxw)toYXg5_`1w_~nbsY^It8Du~+0LX_>%oZn~uRQMA}8PBC+Rlmv}i>H?bm)AHw
z+Olp^mt)nsGb<YmmpfTK3t0dPJ?4+B^5D!kBUn+kSSw(rFf@_<ROo^$gXR@*Qfw_b
zv(h2e@5x&=a9TuGwy7VU@hn6y2`*=vYJrqA^0k&c_GQ(|M@m4qLOk4Ob0H_QNBy~8
z$7gY&=Eap0`b<PuEa~i70WLXm1g;vKTe9@APZUaK^md=M1(6w()_8g!pS1-!nN6P7
zXO<aq%cU^{nqianczPe7y`^OjJb!jfp4MlPiJZ>Vb!Ce$tvJIepy<2t!F=uFO9s!D
zEKT;40;MrTsded+p?WVUiNONk&%*65XH0fOgwst0t|g1v?=O4ocTjwi;G!KXD;9pq
zSYhlWTK{eBls-Gwc#pP@rd1Uip@M(bPU&-m2_A$BGOe4^=K>SF2o>a5H>J-VCioC4
z$hU4vpBGH<BUDgi-IP9Gh+tM1)2oXS=`7m+Y+^KJmvZf!z$3^T_E8Bc7!ac=yB;R!
z1Qkq)(Ujc@6HIz_G2%J1_JN<G9w*m3IMq#Ew4lo5n&iPQVVwz+5*k}rv|R(gW~?!8
z5>1a#P(92P(&lQ{F-=MEK)aQ4NMRdmkdcl<YD7xN(eBmm&T|D<SsZ54loVTFq+_(|
z5$m<Z3(s+cΠX!owXPDOS1NYtM-)lPi)7yNq=vOiE<bI;`|Nt4mAU4kQG&kWuTP
z(&AZ*PId8@x~+Khhil1`@P<?CPpnwBV$&nA@q3vxUy3fcq;0fHbJdz30neMYj@%UW
zIk`?@YV5>7-@w$PV0RU<22axVPz_HB2@Z+;2zEsD!6|pR)SiT8u3Ga06kvYq61<97
zCr?@}5*k(m_FuSx>h31ao1wF`wCzA4a9MlCq&P>dy^9Wj9MoUxw&Bqqu4PZc4HWl#
z1*aZ8ZlxSi*u)wvq%&he!qSzS9wpZrt=aN$&&`sb8|K)4Z~yJsoWHOyx@w1h_?)Pf
zi|Vtl<XKm*y!!h~ep|@n=)dP`3bfKzm!-1==(5|hb!%%hYRn5<ILlFpsibpJ>~3BA
z86JmMbhwCX-kmv>ef8(PMGHdDEH6K%B5-rop{18=SI5+3+^s7vIGe&2<@WSm6n9~7
zU{<Kysb#`fI~mvZ+U18vi8*aQrTSs-x4oYNF7Kae@s%@SmE<p3ix2e?Kh~=MeNxY}
z{@zQTdeOP>k+$Eo>&-tc{;Bn@v+N=HhyQEd^4I)-m1<I5F;RXA`;mPYUw_?w`uooZ
ztD+3G($;R7_#1S{ja<D|h54T?fgAI(b+ebpSp0jmKCixD>t%DEmEpDZHD9m7cHFFz
zy#IFZjbF)yW=})5%+hR^+f~0+E@k(b1?yk&%DDx<R9x_3_x*n{pUdrZk6pUQ9@nm+
z^nKp^fA>%Pp1-2(zjV#RH>F)yehd9+ty&m&$W$YXBh=`ep1?-#lw*1l8@bbttxI_K
z=Itco<mo~iy-)VUW*yNpH7<LqRQA*;IovKO+|Ia6RH;nVD0#ZrM(@)-u?n*a8hBD=
zB2G=5JBQh2GT(%`YnWXw^G%q$huKA#f5O}|%r3$F6XxDwcA3mSVeT7dm&^PU=Kf)J
z5f+#*mxskASYX0j85Xx<ff)!YskQ&j69t1=%?C)LicHuiZl2tH;-ZYpIX^xn_hJD{
zYs-$F-2Ex)>=PGTcFdV8<I?v`p{T4#z;ageiJK=KpJebUrDI5{&T7`UdD3x82H&C-
zb@sqTmK~Gk%D8ksQ}8M)5@5AvLE_<6YC5ZV#m$qBS2Fk(rKz(AF1GBLHCM)^_nAUg
zS&;x#GUSa05)Z4=2{9(@CsWngPr4RQh$$-~z?CU;_Q9>ly?8=RS<!?V6ZVto>g*?p
z;@Xr&=V9t`GGW(DQD@h5DW2d|Ry2VmF4Hv`6>Ccm#aYcFn<h7BT$FJ+?Z>yswOByc
z+Ok9JtmBq9PZXj|*e?<*nW%ee)8u9r{%!Uqynp8@-riuA8dUaa!UM(kfwwnJ?qunY
z>c2H@Zj4IBgUT!0-lQlWOg_GNTdKM|=e)nNTXn4^JwGtKTakP7q-WFe1ozz2eqlm3
zT~=AqZJ&hpRAw#PwfxcBVB;y%AMl23zTzmFzi`%4xm6XyS9MAQkKSI9wz6OAo`<RT
z+>no9t0G@5?J^HO8)P23XKq&8ua#{5LA^JoE$mx$klA<fwp0!MgR@pO@sx)0%Dt7`
zs_R_Ic`ZUTWyR*K4--zW$dx?hz2Vs^1?Rh=&Btxsa!&`uHJL`RO1|2_wLxsPg0pQH
z<FypglohA74%}MP#Pc<hHDYn-goS>q8M3!>8C}U1O*k9o*tTme)0(?lCj$0|Hkih+
zO1|2`wP6}ab2#I*648_uueA=`TGzz$HI_Bvap;7F=T<Xh@8vSOQZ1TrHr%mo*LtQk
zf3;2o{10s~O<<LLb%1Mw*ct_A+X%*MEutwaxU~=5+R()FHIX$!Ic&m0zcmcmN4boy
zbc-gOjc{z+wUKF!toDfj`>+Pn6jsSsC%86D18I(Ayf#HNWreo(fm@rJc)q5xMkI$#
zSa@y?L-tuNqbsvT6V66Dw(Z)?w8mEZL_mF5gJ}k<<f{u@8^qQsINL@sURxrXvcg;Y
zz^yG!JYO?eBNl^fUdxbumCNYLYSDzVQI2i9wlb}W)jkohKdiwthgI^`4XzE-K$@c&
zuWb=cS&^-M;MTS#p0ByA5syJOuVu)-%Vl(Bw`juIXvel)+nLtXYM%)BAJ$-6z$*Fb
z0oMkxbqdb5F^t!ah^DOQ);@4+M-$K2Le>c7@Cgh3)-hy1<ubZ*S~THojAPrbolI-y
zg8UrbU|PZ|`RWDNhG`(pv5eQQh^DMqt$pCut|p$ZrK}Oj;S&~~TgQ<7mdohMZPA3Y
zv5sxKb~CNn3-WV#gJ}h;<f{){8^qQtINQcCUV8$HXYB*G_B8Q)tz?Z@46=DWL-toL
zqbsjP6VAptw(Z)>wB|0z&*2?kt6L>sedpR(x8A_{Z=B+__o8Vl?rR_Uwf7Lu*Xq`Y
z{oykf)~y$K{hiDB%6rkIzj29ezxFz<xvzaDVE?FQx&_#uslWG@fzC-gcSQYvqR1Zo
z*xH+W{{)}=`~Ta$ZI*q~p5lM)_BTD`Pk(ArT`u+Fd+%dm$L=Xdcbcs94%}3$_N?rL
z(DB1teX2BW$(`@~d_O;(=`L%Ea$u<cwjI;AYF*qEu%c!{=czNNycSIQf9_H5^M0oz
zJ)hjK8x;M0C;z|JCc60JyKm3xO6z~0zP-Qnxx&Gn`+q-OrG2+QuE(DBxPL)auf5n~
z{{tU|=fpksKk_5F;1A34>py}G_pw7Hg&$i(go+LSamd&od};bmN&de6L9hn>qd&MI
zvU(p|&K!_QQDA*_ys@BBuB>qdf5{=vsw<q!9R6Ae<Xu>tX8@LJkt=P{46x^G(f+bR
z+o$nYp~9Sn?sF5luJkiM<g<On7rdZOhNJyOK>G})ua6yexU}y&BC<l9J?@7~`>!J+
zE9BV^sasu92ODa4aiN_d$j}d+d|x}khWeMR@CO@Ov&gwN32dma>?>igq4Qq^%m*9#
z!{v(VGK;?w0(yd9J2d_D*^V7jUc_g3^yTq}f{qpTK83#w75*r`;tQTr$HP(HQFT~k
zxjgfyP{~w=(zawtg+)9I_7&*VDxP9^#dZ9U=%RTBM>7)_{G2{*!tPw5qKEVA%M2Bt
ze`>k&bM<NW855hG^{-rhqx*sB`2Fx3t-og0vc|5MeKY(-Yn9~7lmPu^tC_W}(RXWo
z+|-SWGB&gxi>l_@dcni{+2acy+4(OmZv0*N&p+*P!2j*rQ)FH-e4p0sZ2RC}P@x9%
z3jQfGEv~S?(-myDIw)7U<5~RD)VsIi-(8kfx^gG-%HRLF4Og|Ib~(1pViwZ9EAMoc
zv2$7;|H5YtF5czs0mTlBmd<uwVX1KOlI`j%G7~ahP7BTA^Vm{yT+5VQC2CjVRFF39
zj$>~XIn|jbDY~jedYa_%ds+xi5y@I)oAl5nB1og_TSu#Kqvt}cTgqa7Eo!ZsGWsJd
z1m}pn0xPHp(&zyxVDwsObnCIGo^~(TFr_I@xm(<I=J?Fw(R4bwYH?w;$DvM+r2%qp
z1-aFgra0AtBs&7QSTD(KEKqXN4DqNw0#={|RnWWTxOPmKO7CrFAwL(5R;^5sr3*z)
zEwN2{_~g*J2})De1W0XfSDDihz%><W$P_QAA=*$wHbQN=dP#15LF7(|*A|MrS_<-7
zOOVD4kjn+V7AAqbmS-m!)H3O+&*N_sT7(6?7G{71T{K!(!K_{e(Y0dsw~E%&T+3lz
zvV>ap5^CAj%MdS#_*Wk}bdq<Ib63DJC8wEunocvjI8v>aaHMJ}O?f#%Y0AoufMw2I
z0clE3GkG<gW_EI<nl0f-Ra2UBbAr;8nH>RXSS0NqNd~nT2@9Ue@en-a<D#)y(N)7(
zaN(IYk%ebmTa4s`T8zX6Pt|w`o{DkN_^jxvQ7pLdOgm1=p9?=uP@1x{BjA~HSHLqR
zr<wekPLUlPsfJ59QWce^9G##vrL`kK%(*K-Ovx#dhmhonBn>2`T^y;FOE^+Bm8LwM
zpfqJ^N5C}au7GJuPLX_?PLV`Oa&P0+bShjtcT%o%SKu8Fv0Q0hO|L@b$ZfeMODvA|
zraatsae|Vl`J|<{-JH8Z?|6viOY>?*6)H#W%Qab2akMvuar?yyN@C`dRPVSscSYXu
z5G$1C)ylf5X=1&>YqL?7WZ2r9bCWh7US+mBIIk??Yg#$iIlk48-uRuonRs>1T}><N
zHLEsTr>3`umX|I6@MeS7`FB(1$%ed*RPR2&%Q19*>83wxq(lBjs&il1<ruo4bQ8;3
z=@8y1^==S%Vd*BGwbCK7QR>_mcR7YGD%~WqRyssCO1&GzU0k|JX03FHZIn9qrCpAp
zOG-DXtd$P&jZ*IhahH~E(pf7V5*ww?eR-E-=(5sHCTpcba--C{LEPn~n{3ufhtx)?
zb6?rz7`mc#lgnD^klrZuZV-26=_a4G(jjxB)VZ(jatvKnx+!F>bjaE$^==S%b?K&<
zwbCJbqtv;t?Q#rVQ@SZ-t#ruQDD`d-cWvpWoVC&+ccav~ukUgUU01rPWUX|_+bH#J
z5O;m)rkb_VA%COPxo_-p4Bb$=sRiWUX!ULocVp?M9*}>d)wyr(atz&6x@ii?ztQU5
zAnxYUO>;p0jaKKrwaYPdOX;R1Apb_IcZ0ZFOE;|n`8Qgf`}Qu!&~2rgwt)N_t=<jd
zZZF-m2jt&qb?!U697A`MZaM<;Z?t+hh`Y0N(;1L|qt&_Z?s5#>Rl4a4$iLC*-5~Dn
z(oJ_j{*6}WzPHOUbWiD~Cm{but9OIAdrLRH0r@vto%{YS$IyMHo4$bj8?D|A;_ffq
z^ateMXm#!fyBtFglx|{KCmq5YquveT9xUC&vralhHb$NM;V#F}L#3NU)=7ux#;A9L
zxQ9zO$*hwOv5isZezeOm^hoI@m37h~zA@_EAnwu9O*-qOLt<mpxgYOx3_Vu5$z+{$
zNN$XN_TyiUSC4(&WVTLzlsouBqkhWP!tMVnK7A|mtttM$&@ujS?T-55&);4>c=6-q
z&x;?AzIyWJ>C=Og<JYgR+r9hO>x1jBZ(kkn*?za^>$_KP-|qhE;eRh~Z~gkRef$6Y
zdw2Hk`z!x%zrEW(KYP=Y;0q_7ifw+HVG_Bl<fOfH+kPwStRH)J?y9f<`*7dG-fH2v
zf8X9!ef@m*tN-=y*Z0TO{;)}2eXypm@ZZyqS+(Bb?aP->U3nwx$g8uzzdz*^oIYcD
zs%5O+apUV&y6eO4@3Z+;^!3x14_^xp|FO5*^ZVc7SK(FDeu$b&t@Eypy;-~K*Qcu|
zUtWCm=*QQSrzd~j-1cyy-={Bs9#z=xJbx}WS@xX%zo)-1)_+<k6?bTJeTq$e?T_W3
zyRW`}-2Lp@53@;=jXf`wnd|Sbo~V(X+c5q3>c!pHEvuGY{rNTeTk+dZ%I50?a#>Dv
zY8{><TVK6%<4iuI{T7uQueGJO`|pnZm!<pV>BrNjx6Z7&+BrAB|Jt`NUw+(tcwK$@
zeN(RQ=kMqLi`#j>_hI*M!?5SCUi^7eR9gA()yvP#>i6%jlMl$x<C}Nq{@<ddQF~r3
z_>*BZ^H<sazrS8y?z;c%-o3i&&oAQa<HFzHyR$!X?arvXv40Qr=T{op9SRkjCmSns
zy;9@+nUgn9raqFnw$5>H_$w8?w8uA-uDp91+87&{WS%iGHZa9JWnyh$ihat&<E|5r
zJBw8YiBuY;OkD0dak;bDPK}QZta`uJDehjk=(*IU$6CMED(+sp=(^OV%d@7k%;SxC
zQ0e*LX9H{86qY!ihzF^j51uX-tvLHS?ArfrRn@zv&5z^#|7ZGt!GC}4JvaQ{v3K9j
zs_8suW)=vwd=^POwWG3Zis6pEeVZ-LmKHHx*MA@}x0zGc>qX!pLoW+Q&gB}49_@a-
zR>m)mEck51{PLN?U8W_`S|#@RV$w3#mu2m43;LUT{lc!C+ooHtTrA^VE3hrr`E*Y1
z^$UEnw`FI{_PTAl<@(~cQnw5)mihixoxAR3f%c9s&bLiv^H{|dGj=aKy!OHQhqpn(
zKMudymTh&Xi!b;@yx{iO%dE=}uYJ((1d;oE1SH4xFJRr<S$x}@>~Ci6UiMe$pUEl+
z_fjUrB-dLIlUl*5?>XHs^KFm5=vZ>^{aq02pmqQ4buSP3w?`k8_5>ST;hhY2Oa8iS
zkb(D(Tm!4Sy%KCtMY2Cw_W!S^U<3cT9>~33vO`oh;@SPE+hCRZ?YDxRP(L~SwrT8>
zR|VQX#ErMbUVa$%VLe9<$jpDCHDFDDydQ!M{c(NrR<OMOsVuOo<8NL88FevH<KJH=
zh|<}45T)howt$u9|IgUH?DU_K9io3u%iLO*xxb}8(+TXf>F@KwhB$o!>x{Xy2ke~g
z?Cl_pB|DaU?F!J|^>&t?#anajDgSbJFZ-L;s<b8d`j-1^0{FJRo%L<DC|B{e*voaE
z?cYBJxNZVzU*!Blwu=eui;{{-ZBqGQvt@f09j-1}@#<=sulO9k?TZfou2@k5ar(nr
z8<BP3IC$~F?p|t@)t>(LD*4>&C6cQTuYK{sPA*FU?2(cRdH(rZAWjq5d-!+7kB*&S
z3qedZa7coT{c&UiOjJDi{Rca_eP_Ty1v1HQ3&frR&-U3@AI6pL2$g*o@>*1OPdNMY
zs|U+V3u0w$!r6~sJ(yow5G}hWjD7i4y<+z1R}Uta7DUMY31u(8dN8`QAWXI<ls)|F
z!QidjR}T7@76i-g31L^ideFVJAW+t*O;)H)_EW3urPjB1$~?r%PKcIyh?boYDf191
zJ0V==AzXGssLVsC?1bR9&6gCNZzww6P_)0HXnRA^`i7$A4Mp=Cil#Rdjc+I#-mvp)
z-;&V2CZT;vLi?PA_9+SNJqhhC3GFor?Ij8AISJMt?J)`MAqnk13GFTk?KTPRCJF62
z3GFHg?J^1NA`A8?{Ve}<{!*Crtt<O)W<8JEcB{3YLwk3f+o^T)!<<TmW388N3tlrf
z=(hGXzm;#rvX@`^*1a`2%lg<Y%|NG$x(6>C)7j_A<l4t-FWk0p-PC~Ff!DoO<gToq
zczJK#FO%JRKg&P)m$7E5wq8A(6}0*9`Y_*<jTf`N-oBglx@JY~-hJgUpBE;oxat?j
z9p-uGlJstxEko+uSt)Zp_kB}ZeS7+vC06<O|3?Ua%<SH@^52eDzw#%!Evsf{DTmw*
zkzV*}*)5Jx^Q&$vcC9pXn!q<#swC|~r{i<iulICIR(;M}7+hP<J@?tJ>&NB?Z~Hw_
zc9NL+M%9?jTfT9wzCFiE_t2z^wg1|e6ke!#dT}kE^QZGVFYe5oDP30cu)06#`7))3
zcc=c%pLQ}l_R{3}>*{{}dzHs)@ORJS+ykyWg=HIygBcGfEPAFOC8#bR@A4}qOw_Q(
zEL$M(b82tL<9>amT7}hJ5_VHeJ67zx>*n(Rqw5m?q)@@b%QvzKZdG?tRubj<eM0Gy
z`-W8=50fLBJ8m6bBUt$5qU)NOi>?aY=Dk>3<Gn_5(N(_NXD`&&Sg)D6@G6(J#KYs;
z56u#c%H436<?iwAj=w&|2piNi^l`6X-PhZ2x?fMeHe=mM@qOmUpI&DA;<oRo`}F>O
z+Si|O&!7JIQ>MO9Z_Q_r8aI#{wc}4O$5lxEOsk&I-@bR(O2bp)C#K7luCa=I8oTn#
z`L?6G%lB{puw!3RDX&4~g65rn-mYprd4JuLo{~p}(|J-q_Gw97iHM0;IR5HTQX@~|
z$G5*yf2=$9;B@!a+^?zY9j<&j6`#6smgtjra>`3vVl8+4eYyPg?^m^Z_Pv}Ndsi_t
zanGR#=U>0vx9-;zv**|U8NK`V(d^%6E1~U%x8_L{&NWs(yP!HGeAP$ql|^3LUneaK
z|N1y|@e#{=HbwDEPX2BF+FbVK{o?&8>a*G3JpX$kqt5>Hxg%B!fAPG%@O{p5tG%_`
zJdE$}sV;XHewy}r=B+s|j6J2L=FRtAT$*LJ%Ws+Ek?rj3iZg;3CqB$PEfYGS?1rP9
zuXXX3l~0csUzt{?V{rAp{+p%~0@n@PC(Ye^=HjwH^5+AiuPr$clCB=lIMMt*Ogu^9
zd|>pWr3XTu`vkJO+^ab(<5~92$bGg_vyFT1&e=@Cb0_=OI($>Qxonn#_qAzTG!3p=
zp1#7KqCYA36x*hh+?%tQg6CfLhA6QEDOr9qbyacPO7>%MPi{?NOxbzslksjF&-WeH
zf<Irlr+Fm3No_MLWv*<yWn{D4#`Av1`3W^2l#NvkzZp5-p7q7Xb*=XK-7zPRn<~vb
z5}>*|!6W~E(fX>hfpS*g`emO!mYS*D*?4ARP2QX0zD*Z4mcFf?ZvL`&g5@NMS2ABG
z>2Uvun!cxe=cG86i9Shh+&Ag?WXHa|_tfi_jMB^_H~Lc|XI$HLVDIUvTSQ!pIycIn
z++=X}YyahxmR1in!;q6z32%;z@7-;;pyiZ_TFAXv^UIfY=YD!uHQT4M{O&9-%TuWd
ztL$F7$-P(Jb7p<u_Wipa>@vN1QOz~FtX%o%zPs<GN`L?6SQmX+FgIvR?xPzX8}q|=
zyWRaasqyu-7RT8lxz?s;L2qua-M9GdyJ*c@a-tw*$3e=(ce&mDXVvif+V$^dnzz2i
z<Sd!6E{{JbC;LzQ_I<0idtThOQORrLd-EHnFSh0VFMS<dIa?rixB4Q1-*qQrn)9+h
z#&6%(w4L+fHdiICjqkr7FnzIY-@nq=(M7Wba(^o<5||tRa~Jo;KUG^_e-poHW*D_S
zz}?dB*ktS4lG*d`%F5r9e|YomAEhm?zlk3Tv$V3?XMgDO?w@bduD@MhzqY8PrlG#&
zdHHAU)9Y@>e~Wth;upt%jv|%*57)wXgH#{+{*PzB?TNUMJZVF#eJk#m>1%CYtFP5*
zvVHaIyW)Lu`HikDzgtY!>ug`UUT2c@%YDC2D+_*8IDhT`-EI5!c;qdSey!i{a--QM
z+P>oUFDd1n6W^`bZzGh*|0(D1!`#>0y-(bBZT<Jjqs8{b=C9q`*RD64B>nOp)R1qg
z&$oS5buUnk53A}{X8fjb_FL}rZC`WU4V3RkRe3{1wm#qXb*sC9a(p~Y<nQxsU;l#C
zBtt}eKP#2o{->mJV`Bf;d!IZSYEMjNW3yFe{u%LJx1Z%kyNzeUg<na?(kyIi^*x$o
zQ4}mfSKtFvu;Ik!wem(*9lyJ08~291eecgJy5HIK?6vPJ<`@aDNo8EkbFrAoZcluy
zFyCqWWx0oM8`nO$FSPN;?XcBfZbwUNo|s!wSGQ6_ndzjuQl`wC)dJ4SCboW33$5(~
zgce%cKM9#4*l4rl!k06dE${wZ@oahbM<pcCjpfq>r_0SN1$TX3tSPwb^Wz{_Nx>7&
zT)zJ6-CmqKzux7=x$_~SsV)lqnkKf7K!!a58CDSrHLU3l$K9W@mV&!JUyg+8e1Ea`
z!rb_!(hF;!Pp^h*-J56bR9^SkujSnw<^ZUr(Ur<2&&5Bxyg0X#394-W9`m5``g;E(
z_uPG+$y=xiJ4y;n{aNdh`Y&;@ksqr{5_93q`|dH%<jwRR_c$t<3C#Ri>yq{_QQ6o}
zM<t1Q<IMZ+InU(H%pU)7Rx%Tq`?J<1{a@l@<9n-Sckmubuao~cv;M}9Gfx?3F)NvD
z@8>vco73{_lfYR<!&$f8d!EUexfNGVc-EkC_N}s4F~9WEpEh2f9j09St6dIupH`XN
z(n<xd*ZT@xKwfR`(w&s<Fy&fpeP@@E(gb!<>;6kN0!vHpw=G)K!|}xN=()uv{4SYy
z%U7?^P-dzO*!WrFEOTJgcVAttQymU+A#Wh2*S_yY*8W!6qxy!#+2@9{*ps%@wq)>2
zFZ^la^x2_hTR+3w#K)Tp<>vP`{>YJkc=NDZ`ePd_Y37SJ?V2{X_ntjgnPbM5w7Iq=
zjbD0Z@6khQ0yEz#8&u!eku&FbYO;dfZTE<88v<`y^q)HB5weYap}d)z^mD_T5*;VM
z2~M&Na4C~^yDh?WXI^H?yDf{=1#-*2w1mx<we@j~e=|d_CU8dkDQ}mBkDK+m?mphR
zUG&zM2e&!?I{5F?D5?42y0F^j`!=W9ay8Nm<zJi>Z|&pXr%}@X{9ahb<>q|lFU+<-
z7hU*xP`vfs$2+&Va;rY%w$v?9j~B7B`?2VP?Y!#fg}(gzdN1&QdD884oIPG-*YV<f
z?JX}4ZWsLJIKO7LtZm>6xtSfk7nb?BO!?VpBpCQ)Mn{Lz_Y=-JE@n>^7oFgr(%zwT
z+{8s>r@L5^@+M7gLD#wkIxZrWo2RRvx|6Pd-t9##OESMqcV_}m$FXmMJ+?VI+io7;
zEGUKG9Yx_CM&TXYEGX4^?3==u!^e_l|FxE0*qD(cfAEHT=h2WEx9{iG?Wq3z?$wi{
zCwH%&{rmO)xcI%lpPjvX_Ul=GdA@lyJN8HafBazc{q=S=(>6|Z*t2`@&iK3c|9$$F
zfA;H<4zCX-U*EpGxqbEX`$z7J*A{(yvq#a^s;=zEt1p|}YD@n7dh+turuF`Q`?ERz
z|NMRSzIKTJdHufd>G$_OxbIk3|MhUyx#HQk_Rf+hKFa{>{a;j5{P;$m|9rgszn6cK
zzW)00=;_Iykwxilk9w`utt_<#pWahi`~xzQkhIp^(lal6_vW3c>vvzunfcm~YqHF|
zeHC>xg!MjuFx}p?Hd!!Acc0y<j&ptc_wu;h-BDe+$7)x_T;tH0&%$57*6)vxTbKT8
zwI7SVU)-9|Z#N%a&ihmI^VQQ=A6~pj`g-={#iyTBT29#rp1t_+=|etWIn{KN<LRrX
z-=Aw+TUS_D_Gv$#{_d=svvM9^3~Tq-_m7(&Q+M5S-RAK4e9da1Is13LIdYq=Zi_Mh
zTNAzo9~sU{ESSk)65No+cHs=;ELMljEEzIOI6BlUTtsCSaq|VTwP!RtUpc7w>w!RP
zL5Ev~i?YokLAi?@{TVIpCWn-z9t!q;fC(qNC?D%^>k;ggP?j=uGfC>nI3jVe!*G!x
zM8Zd)cZPzLp`%GsQ^paNiyfSc1chCc)jHgu60RmmT^UD2E_P@x5)5`xUe@8}BiK7b
zNy-o+!E>=ga*?31i*j0r+Zlo08H!Sd&L&B18Al)z#V*RvI^50(_Rdh2GITdd>dQDH
zbFss6ksw4uN1!)CL29FeNm66R5vGeBtcwJ>U6jQ-+@KOJCP|$cM}#hRs4f!pc2S<z
z;ie<l8=)k%5iHRnt*G_Tt;27J;3AQ{mW)<u#jJ;J9dSDZ7fIx`WVA^uu6pP;A+O=3
zw}<%#7PV;yj|9z#;1l*vN{aN+>E(QCC_CjuNr2jA$CW<pPmN@!oGA$~yX^SVhyAIs
z?34>70dAKaHGSEin#fMMQW6k$*)h|X{i&(!lp7@hX_p;W`m#SYlbv#>B%tiF<4a%m
zr{=O#9+U*MU3S#;V}EKPJLO49z_iPbnSSg~EoG;?C<$10*>R;G`%^2~DQ`*wwq167
z>Bs)mT6W5Zl7M5E9X0*gpW4Vy`BD;a?XqL0Kl@W#*(pCt0-jxVT<OpL)J}HFpOS!Y
zmmOdFvp=<$ox)HWz;?w^Gl2c6gX|QR(g3k5j+p`MPaS2aaFhn9U2$9)!2Z-pb_!2v
zfY}wtmjUcgon@y8lm@t6anuZCf9fJTMWi$!?22P%Ap28S+bQB-1LCeYR|fJA8O{^e
z^YO9Y<{vT*{4W_J{B`~T)4=~fqlLfD-)AalQvH`V+xN=-b=O?}p3U;Ta(~r}XGvO&
zFIfbR3X3igbrA6nnGnYiXcOo-i_zty3+qcZu!J;NA`dLFi^dYWr8~GT@g|fr2RiOz
ze3Pf3<ze1%mlx!e4Z9mxDBNWzGZzqDB7NW;+oGlt<{Nh%LMG%f&{ETh^mre(O!iL?
z#V0%dYOMKnG-X1Yf_%N9<Pzl*&*OdCGC5}{9o@p>GpQ*u$iSEDndd<l%^8}k!Am37
ziTo7lIccDK@Y2!~*AqZ0ry081aU>i0cyCyu`N>yeVq#|Slhp=lhqthto}(n+W+=H#
zHR6-VPcyKtPs>j{PXz07a@{8Y)}^EMX`;mB#Hc3Kpo#B~bntjDRf_Kd>oODl83EQM
zwCcq7B(SbvS360tt}R-hu7Y)?hE3!@K7;47kj~Do8f&+dh$_*aRbX94YfiAIfOVy~
z?o$NoveEt|DG9P`Y1BmhlVDx9yJ~!nrOcR?z#0Ce+DPee(7F@isbF2Du69~rT}QM(
z#e#J`jhpCydIrxWp(l@x)S9=j{M^%XQbE_z&LG*y!+V1N8L)xhyJ}Lw2JQ@h;%p2K
zhrLSoXMuh6PW0y;u-l5(pAb(6+fwanX9c$9j`pX!k`ohmhCewC(<MJ2rt2R}mwE<N
z*FGnhE=4JjkDkU&%)i*db9%2*{9>3ch2E12x{_=C&iUzuujluld|%~<{{8E96Yo#E
zCYiCfu`Fl7T#1b3Y`11MmgOyomB^UR7L^{P)17A7on_gbXW3n3*<EJYU1ix_XW89k
z+1*x&7xn5&nQhCsabr<pa(5dx&XGll!rg7YI#OmEGj3qx=t`Mw&A4%8QDSg+n=cm5
znMH}l-EC)eq|7#F+`z`sl``9&apTUS#NzI@vsgHX7A10bx9RFgZQGD>0~<$IYTK5K
z8<!R(dUv<!Vsa#EeKQwsdm&L9ow;yZhGcCfh$mTF4&q7Gwq`CgdpXN+Z~i6I=%)MA
z9&TUyBiFJndeZ%APq#1q>04R%Ytv<?+)JjxtLEE%-x4sp<m{BU%kv#{uc*ZutNwX;
zIDmPp=2QRqolz@%ccq>Bb$R<@v8>7KW(xiP;<&Q)){^XHckF9Zvp{xe{`H?f53DST
zal!jQunD?M7u;8|WnDI6sNDosl&RXVFL^7-nk^Cz^4lTG`4{NNL6mb|NZ$Z9KaBOo
z?FjCzp4WZ2nZF!d(|Bu(iNpN!5aqH9^0Oey1unF211rDA@#1wfSovv|FP`hb4x7sK
z%kMhKYnPK4YxiU?Fw+&kuzU|#c^J=&-*I5&-E3bjt_LeGW&R~}!zuTo=`TG9<prVA
zAXL*0uu;1hYr}FtzRkSbu+MZG*duuk@(R(Q;E6I{uznKQWoxA`EI$Rd>KgBh->G1$
zUbB4(+}wC;OP<4g3z+iv^I*!4Uw|p+&V(tyxdrC3X}4guC*&?LTPuCx`8Akw=^Sp;
z1=;cPb-S&qzm_^=?tA#{a^&2${XgUOTI_q_Soy1@w6d<ULMqbEa&mlMzt$AXv#*{$
zJ$mwHc<+qY*H;~ly5xU+`QytUU;Zemv9go>|CG=4g5bjAR#B5SwnuGEldjI`v}2W@
z--o2?Q6RV7y!ka>YrZ}``SjJ%pQqL4NT_Dcx|zptQT{?GV{E-cJaY*{`(rJI0}q!l
zy_jG*CybGiFWuB3h3|Q&L&M=#z8&+N8V;w53Ou+F>T}ew>xI^~M+&|rqRE95w03oE
zweS#+JsKmkq-R}{KHnv`<<dNv%7+%`8MbtMSTUPN)8f$LJmVIQ4=+k*D^6yt__FJ)
zfD%Y3rG=v(&b|g^Cm&5S`2RxNtof&V{6@($_P@H$Cj2Xm0WtePqQ^I88NZPelnb4m
z=+feTHSNYjC7V@dhdVg>SDoF!?OqX*+a?H-eb~-)XmOTt561_Kz}z-@V}^d=t7#H~
z4>u+m�dhlEe17e=^wUAdu01T4v2Zk9&gbwz!zvc2}}t#cdwz`TshC@21@dW$4&-
zc0(dFh?Hakkr%-tU0@L>u*ffv$cM9R0$?|0f(=@IgXfuiy6EhKe;%&^+Zqb8)%a}M
z4Qr>*D{lHYxKv!pX%k#nc_l|pLCGe|?C^P(3^~);oE;4P#b?tb1ZN)KnP$u=_%Lv@
zWSx-GXN&7#bzvY=K7-vJ2Xgy4u$7fyE7yap6yJ4rf)$gEUdiml)r<nAvlIV<$cHmo
zKx`j|!0nR%m=#``IlFaySaF+2QOV|&8S}Az?z?FReiTM-loXP2SaXBtFGB~|<(oh*
zj{)0x8f@pvTRgknK_M?8_%Lv*WZ4c-$Qvjfcsy$z6Q|~rU-QBg74<?lKYY$~WNDT;
z4`<;@DZZWZIeMX|6FoXkcfCx=yVR?-t@)>?`6>ziyNWEEl5D>)JFJRkk`S8ZUFz@9
z(6Zyo+V)y$rj^nByOmgiw#$8!=2((voAU%rP6U&7Aac!XFgb%^$u7%=FEuP@m+rDw
zaBzwVTf_ck`m28p44j3L8|5a+G_Hx@-`MF8wx-=c@I=?w3ylt1*AAa6YB{?!$yQM4
zVbE<g0fmJ-uYBWl@#yeAS|uTL**kZ+Lrcq!kTvQKNyRH8{K4$@`8$+z^h95GP7s(b
z`kL|Y(rxhyPD(LZ(rjQI$3Z&QMDV}R-)hS&DD)_3yWF)hkn__-8n3KvuNUyRTlIn+
zBy6(pN*SMvM~ipvYlnuGXF<2E1r!zaN?$uZ_Rjr|Fy$}Elub#t3-(_r6L0~A-PeYH
zLARX+6b1FR`m*FaP|ncX8p{H*YO7om$Q*Z&Iiar;k24mojN*58idl6{*hi=_WUYFJ
z8q>-s{~eATOR{Vm{TYI8`$4=cj4(G4q*?nK^DpmQf5#SZB<#f!2@FfNZB$qxU^4yI
zxh4+I!j;kd{}m?e`nn-W2}Fu1PT2MJgRZ-R_BH44?4W@E+wK64k6V1r9GwL#a}7Br
zT!_i4=222PvNX;1jqbvoSIQ(o0e`kiLTI-4*(xTm#Ge@lo&{~5$G};*GLqjpsd#0i
ze*?>oFSp{DzvU>W=<VHhUBL+))1Rlu-Oh$M-TA-b1ku-p6XL3J*E=>GdA2FZcE)~?
z7NJ@H`W;?fJN%8=A*-5~NyTLPt+-~0<C{Uw{vZ#Er%mo1-gm1wz%h5J48*?CAaJ7V
z>x4HPDMzbbus2-!CS@SE45~MBquhn~tZH76KeBA!=qc)jzE1S$@V;7ggV{M|)wRPD
z1g5Y0x*@oIN66ZCMM1r*d)at6&o13{9h5>>U30GEnB`r%-m#%&2RO}K-OI)(^k`F(
zZAm-G&I|lZksIZH@i(rC=s)}==x+9bU3@UjudW@gV+JLuUKtRnD+D6XvV+J{Sr92I
z3?jF3fXIAHhL!J3J0NlKLjUSsw!k7#mOG*bvfz*lD5BhXi@GN@pT2Z$^2JRII=5y&
zE30y`elO4Y>)EHZtGddr`PX-DdvX4y@Q({(kJS$!-L}BL&!Xnm{7u5QC2LQ`Wjuep
z{LQg#3+{hwE3-<->Haq-?!@`}?rkr`znpY@b3yUeBKxK16?e?-J#W7#{z87Wv$bna
z?#20+pMMJWzR>;gW&NVPwlj9t{FyTM#<>^4-<+)F?UN0*u>Rd<p49pAGNY6Aa`8|3
z|NU;wezwg0i#fZ0omE{%_rDgqEua6D{J9|Zx2f*7^sSdGZ;1W1tYwnFmGmcN#|^PB
zCl5aO`9rdO;oOVq9Cywge{NqH4YE7>gg?mc<qQkGFQ|*V1YNu@llWzd-R!;_elIt_
z<b0d+Cudg@Sf%y!`L`F@FZX}o9NjaYXM1MHzh@85)%@`}aN*nwV@9SO3(g-uf2`;2
z+k^kb9&`URK5*ln+{5`zaXs_rc^v0cKLqkN>zUn$pK$)_aoiX4McrND{IB307tXyj
zR%EKVr+;kue%IZWhdyN1*Lfzme=)ziF!;jr$HCrT)Y&)BzMRfn0QUAjuiLlN-U$6Y
zDR{*H*G}DE!M}QLUpRN{IVf;_^|u=zxd8GtmwZ%{-Cl(l-CvWNR~r9{Inbc@YxX;X
zSqsh|@3)WKZMj16nE0pX4GZte{K<FJKX%?PrTKH`pMULTmw7fT|C%kfy}0f3>E?n(
z_O>%@UY~!kWA5eWMg|Z!x>#FQ{MZs-aN<qJzhy_?*8G`s_kz&hmj~aZ|8=T!oV2*L
zZGrgX=jxv>zI1un_WZ3(z!`<o=YN|V4{lUYe_5t(lh56F<Ofp_&vD+1^W{|=KYv^2
z5V`w6!M%H_8rEFQ&)&u!_;W*5;P|=DD5ZyA{>;96rDc+N)5j@G0&P}x_9@MqWY|^k
z_h;}WSHbo6^<L{V4lsURuF|CxSO0H{O!fihXa1fW-1hwYqj@v5O`7rZ@+D!)arOVU
z@TxKj%y7uH_GDqPSTlpea>Bm`QEA2bH{~}ZsXS5s%^bF-Wlvqb!(E>nN58ROdE3Ik
z$XDw8@OePJ!`&c`4fgG~o(ZzKd<nR1CB(?cSL*#Ry%sDZ@E~BjNFVDj=2z348W`F|
zy&L~5+!m|C#3U1@!}_WHR@g+28}prW7ke<UJPWw32GShr%_*2(?{GCpLf}EbR*`S(
z8QNDZHBdOPFiZ2z21dS6??i_N=c_?KI2j67L~${HdmeCG<j|+S2FokkT3j3&4tFhe
z_!n@S4`h_~G^U@<x!N8eKSgjo;oq98AP9ERxA?z|rQV6<m!$)4GYBy>T3*>!@8Zzl
zd^hOEH;`KoExRNiuwCTZn|}?vmTpk`#(qV&_3JYG1$mk^vwt&#ogS6h33B?{4J^z`
zRV$`W?SOeNEJ%roNhWLBp?d-|ozDg_DI8dsrpeQBW?`BpqriiJ%_4OS3dJiTy%^q{
zUl``1#K2U%V(J8t?paGe81v6?UR&b=ckd-ZL4gMwk~AmSUpeIl_nfw*Ami`i6{0;4
zqHUO-1!#*4g2O!V=u7?;(Ol<~Kp`)&3FO*8%RyvHB}4nJr2+~E7UpS2)U24=-qG;a
z@=BL8i$en6)=L5iE1VEkaDvPX^-e730EaS@%&KXJ{)vJjgze4wg_pG)Sxz&nUCeA%
zP*OUyI7{b`fI~&d+E!32vRJX5`Rw8>{hp2w5rz^cbZ6DwZE1=yl-y;>kaRTd#d7;a
zyJF6FoUmE-`YWiJwq3F;jbTxq@tYb37sBnvZ|))D?>zUqpRie_{hbloG7Y)@j#=qY
z^3gPp9EOca#z#~dA~s4ku?T3JIkPvcxWQw6T+pPy>#U1QgL^Kgy@Jx`6>A^5yR^6;
zO_LD3<en>PucTz7WhN}Juree^4a`2=e+{ao<#^ZGgnxn2r~5k?`fnxKDLegIvG$p}
z3rzfce+Q@$zF`umU28BK<dZ+(hN3-4xZ&gCZL8!38RfR7{%z<uvv}J&c|k$B(%FoU
z-E&hx)`HuJw{F$BxKykGHAA;v{oB#;Ap+Dy&3gS?Q1C%u^n>)pa*Cf<to;CT^3^mB
z!I|#4y&%1-%nt8k0yQVyTq;6x)ov&@thnWK!Gj@i>&$|D2A8X8Ow<1gZe98hZ1FXa
z#h^y7d+t_{W{AaA^)4<ISKw`Tc~CpIOcdmaoEv`yx4QmcV12?SYxO@t!H1w0FsMnK
z*a~hEe+980&gNAJ%W2Ew1qJvoeozzmnf%tP|2sH7tkC_>?vf(6_3QtRjt?tt@>IL0
z$ZeHn02#Dd(yirL;O3bPU<rHS1&FqM#|4`#Ghu<>pEG{-3UDn-12yC~CK*qtH~DMD
z!MZWY_=`Nqs`eL)UzR&+bcoJw{ImF_xuXWCe{uDT`;~8uEFep3!S-yIJO*;=Lwk^a
zko!$bo`B+J!%a|YUGX5}k*>2B{OetE<rxk;{#x;txub)lAJmLryp3N$3EWY7CkPMb
zHd(zxpe|C!hZVPYb{9a}^bZ2>vL65?>E8@YpzL7$q;f)K$ah8-STecGE+8N%r)}nJ
z&JGGBa6e(;e}*GnXDvMBuhufGd33^N6-0BM@f$60PT0T*$`3qXG6N(MaTLUkPy~~;
zAdw$w-`zvLGaiX%RshH6E4u~_Gf)5}34yF}Wa<!|y>M~c4%d?#?Ej{*|C*nX-#^+4
z8Eu77wH1<A*)n<a<kMGQAHF<SrD?vJWy}9n?N;sg=gq6#ZDng|9cOE8X=_(eR9jsC
z_3+iZ2XkKi$$4a!^2h$)>yx)ve}B(!x2N{=zvox&>-YcseO^9nf870bZmR=d?E3%r
z`ReBNedqi1{pPtnQr{mJ|99Dh0P)FlWaH<}+q37+rjv8-{QY|N_UdNc=l*s3_U^W?
z`2FvAv-<mW@7LYC7k~er%$zxUE3QsxJ$-A*XJPZ%zLP97|A`)}C@L@g{A~H^X46aG
z!&l#qe|P=NIzGGXS@m*%pKd-MY<A6R#pjR7laBm(o4@`2`hEYO9{ykb_g($-KY!(&
z_WXUDcJ@K~mBshA#JgKBTG4X5-qiT_w=&=A;{OX7;}?S#g>Rnsdi}Y+L%usf%fQcG
z{rmeh|M!Q-E^)rAt^fP??(E(7SN`2zetq@)_v`9+?c4wF>#M`h=P&0mpYf%iZA#wX
z^^d=n>{4Cn$h`0JM4m68HR6(0R<i!#@%yYSZKGmk_S;of7S&zzIk&>?Q&DL}Ny)}v
z&z`*aRO$TaS?R3Bhfg1toi)?%GiU+#+d1>*E{{y#|KohQ=c+PQo8^^nk01Day}jOQ
zf5cw9eI9QX_da=&<6Bhm>(S3dza48doSbG}4EfUQskgs+V%5S^SM~eD-Nn}ze_3mO
zZ|}b!I(A(C=MWRBooh`Wo_>FBp51;6d+VR^?bBy|4LNq(uOu(O?#VIJMfu_B>-X`^
zQFFQ6^;3X1`u3}%A6@NFoqc;Uat%jm*`K#hUp;;K@O4VZsVljzk^WWwO<xZ$5_Sho
z_+FeZYxnlp#kScO`<k<sN4CcbOl@9a<6_#jLQUYR$f8+}A;le8jDfm}S}hz)nnX@H
zay?aOEt=qD>9J5|NdRAv2D|2zW)ZGkC*^`P`g>V5r?iWla^`xf*!pRLQ>Dj3n<W8q
zK^ia0dKFuxoViSoS+s~`@n~L=2wGvdBp}&i;jsx$y^5_(YIRJSS6G5pa4rcD_R;fL
zs5ZgLSD|&51D9!|NEVZ(h)HX($HHY3oO~5qXE|}19!+BoTA{fl04~_1mdvJkg(ql*
z<dOhmkA-OyoX&2rY!S(V3r>hA_E`9Ag40>W)>+P6rtKnGe41BeW>>-ln<Qc!xVAQk
zWHD-9VG3Hox+H+xW1-jtC*2LdSwSKi87owm1bBNaoHoHpSFtt9iEC?%NEWB&6``ON
zs%6s^Tbnu<r1(>>+fIr79#D4I`DQ5=PWz=<a;Mf+YkYjQ@Xf6DAPu=H|8EygPiR+)
z<8L*Ut17EJ;pixt-@j7PLTpI@c2hRqW+h<BaUDsJ9lPHxe6y>4(`&GWsGL5_N)1$z
zcMIQGeVfxVMc|U72dg44OU43ql`jn~^ZGA57Ob*z;&*>>lfzbOp}O*y1eY|KDjg?(
z*B1*pY=sxPD}8Zkk?XkdS)fYB$=^BU(}HxxFB&cLS}rsTRPj0WJ7)AsMkTd{%~;5q
zmLj*{X=+BPWK>MswP_2Nre>r{Mn$w;o4PPHH6v6~kTWW{ZQ7KDqNy2<l2QI`(<U#x
znv!8C8RgwJZIa--1+6I=vXW75ZDA7^x~63CN=7-gg-uw<nv(HXLXsoOwoR;m;nw7g
zml9EyZDM^3OOrEhN<^8qiS_=zJZJwdnYCu}E7a$Q{5$=9tG<+QRD#2=dED|sKc#w3
z&dI#+FYR#3J(G<3&B>cKf_SG>gfB1ndv@N*Wy>6Y@8(sTJ(KP2`?481c~V>U-%i@p
znt9=0UjNBy%N!NOU*zy{N?kHjvs!VIlPTI{#+fH9jk0n+X+=#3*aX##Egci;IVaDY
zqp-oY^`wuVz>T|yQq<Hra{3aDCJVECyJj#Gq^)?y851>=CFYin3Go7xXR@$v6Ey@$
z+>Qa8w^jgbUXdl(ppY{l6Ld_CK`Okjf~A7YAyVg3mKiQoJg%nBvE~X`Ui+_4+N{`w
z<qTl?%MD;RtULfR;Y~>b$PHy)U^iInf~}e>1vbx*U(L9elh@MF(lKE%#QlK~_rExl
zvMib_XA0Q;X1Bn4rAxtjd+oq_-4wyzUMvW<GO+WcPqLG<pRb?54fUg7dp9S6?ERJr
z_Tuk7GtMk=KVWAF)-+!dtjWI@?9S)M!0IO_gVo<OoSEs9aRTJ)+ke0o<~D&XG;;>)
zovj4cdv@YUpHtj9lT$#NwnZ9&)tk%&#Y^ryi26W?=Rm<dT??$~^i;5gs;9vgZb}8|
zEqe*pySrxQnH0kVdWm35rW=CQd(Q-`e|iQS-r}Gb-INB>WR?jI_St*D7WzH{Tc}nH
z);rk>toP*HlRjx&Ig`@C>Tg2Sf0+qN0Z%SHVQI`~0edc=2SSNJC>aQ)0-<yu6ePLj
z+srugM7km01tRDJNld9ODGpj)9sHeBLQ;&n=Xkifsco)^U9v!Va^xPpApS`wb>hS|
z)la5~t?v$5oMO~{-L)&yXy(z^N?Q$Po_SO{F=&=g+Q$YDRX=cGW&Uzu)nq=EqNd*Q
z)_J+nqG^tX>KV7vTCW&@!s^I3(*WL((+g$@n=E}hk!cOc*Aer2xOPOb9i6j4lgDM%
zaU)RVdCY#yYP;SyAS7tA@DaPfg{O9c%>kKx8x-^%wTqlm>vfxx{4RXy<O(XD0Se{c
zF0EN&(IA7)`YcrRoxeii=`>L2ZuAdX5wkfpprFdvPvEypYnLln(Mw^`B|)a3kp9-m
z6}oF1PnV_RWpyo&nYo}ycq1$teWO9L2c*iy0;+1N#CDjfT5wdo5f)w5pC>6&+_cO;
zWWu92AphJ@*9y6F*GS_T3&;smpMoQ73CNr^wlH&!!p-rmQ!{=k_^p%c>KCxs?HLy)
zsBQ1AjGcV>XwABlPm|=XKPfP*&z2OFyzu2#@7~hcal1B_=Uvt||8^|5>fy0_+kMyH
zzHxio%T(#=>t=hilJjpZ6VH8Pd;80*-o2@_<2G$9&zan-z&tB%!^ZE~mtUKHE6c6g
zdF<X=-}TpS%-;I)s8scOv%O)-`B#@s&w4ZW))%kdy@9jiR&4y9dHJ=;H?!QJh!ls*
zt4+SC<yK8Rc5kuo`inQBx4cx9s%|&i>y(^-VVQWwo4+?h9x`fwNLcm0VQRTSX!(II
z>ls<r2}@;tZZ-2{ta{xrwbUTA^gx%@j4Z1JRaqZV*$qv6%c}SyEZKui+1JcyUOA09
z?9{=KlZ@I=5>`EKm|AEMT6mz#Vn&{-(Snst%wY!(hU{n5zMrt_UV~`9!PUG2Ugk5j
z%oAFreM+S_Y~o$EiZ|jSTku)7H7U(2lbFLc91K~{sC_+QR(Og-@LIMtA<Zj;n8Q{a
z3|Y>oeK}#(r3TSVgR2<_yi8_jnIy1E`Fxe!@QG*HE1rl#w%}a0H73m~jhMq`98^&;
zTCh@!Ic&<okjaeNClgkkXb?>?xSD+6l;Mn3h6zU{e6~t#2;y1h#S@{(7A(uQhNpQY
z7jsz4!H{M~?SlzY8;>`vkCR)k2U<3#*SG(b%ZIlYKfa#4{P=mk{dSgr*FAhYfB*eI
zdk@{-zC8W@x_R}&l{S{uW%nk?tvwhwH}2Ysc)8l0Rh3mgs?NSH*YA_IJD%M80>0U<
zN^0N!y|wjUpFMkU^6y>!@cFAnw(r0Dr{MduyH`(kPc9EP|9-uG@4l+<XJ_x8Z8}+A
zDzAS3uLVU_ze>LTd9wQXYW?fw?~eXF{j9HN(rk<9`>usw*h@kk*crkiN?zM@EMj{p
zljt;I)*VKnNw=>n7#=(x>d|q!lW!+m>y9~~DY0}@j~u<{AVF7Fp)03TMTH&)T`pld
z`XtPE&dio~eWy}EGhc5fipV|++V0-evg69ziME1FD{m|B=4A=m?!K)MM4EYk$Zc{U
zGR%h|DA=2=b=jrY-%eC@I=uRJ!mGt0tI1fUq`c;+oa6mx+TS|v&Fiuin$3}NRE|@)
zam@{7S&k)1{cq~rZ^USQlTZ}YGnG}cc=N7Dw3^4qsXTqnjbzYV*PDrohQ9LJ#gdAO
zdZN`l6CjE~Y!#0S%>AO(J)k+TY8KlMJCgbru!rSYEKV}73EJp>VY$E7H;$@a&!cjI
z2erR({QA;aRPCYq@;}Fty#6y9Am4zdi)=6PA6c5$pAlkv@vUI*s;RpVub9E-TUzb%
z_{++?{){<xS3$zdciAoq{JJHne}Vset#TXCe9s%fF9$An**3{lL~V4x!0fO6jU%ex
zXey(~tWz_y`g=GWSA9D%VZxnNwn8c;<!P&IjZ}^-&FU{Xy>VyA+le60sB%rX5wq%>
zM2T!;$XmlZ3M@fej~`HHSb5^?0)?cbaxX#iF7EA_zxIG_4Syr}<>lut+a|l(IFRSg
zmsY#X{S|ZZG-&eZwsJLSdeXg2nqkQymF6TLy^`uB)qIYxzMaTw0Y!#A$kS_HfywD$
z(ghR`FaIe_5UpPFU%<ols-)1B(;)9eIHm;nyh}YQ=Qw}gnj6Y5E>E9jyUD%%-MOI6
z$3b&oH<dwiU^kONN#xB$`P3URS>GfS6!lE2Q#>GZk_^+k!rUSn+)KYsTrRlNJnr^~
z!|!TZ9JAQu6ef0FG5f>fk)x%})@Q4-XWPSe#e=tl4GY+3_FV@{=xMX{?JQZJ`$KUd
zIHn%tJYra~=w(ZrrP=!2ADli;<?gpX2rDY;l~%jRPTXc817@mlw}aBC0!UcpcO!`H
zD+EenC;J@2-b}1x@Nm`T6xs9emhyDVBPOw*r38g0MGM+EBsGD9^;Vnwyc2?E(_xYH
zXG+5kNF;?;KRM0<iZ`Clf|V}>8ijP4R@_pyKP|BHDz81G(4(NO?w_V!xEpBxhXph%
zYTINNd-sE|f})=GH;-}-kPH4oL-<6Ot(A}dROxdIlryxh^4jOvN-W9if1@YpaaZo<
zcEt(1Y&YF@P?&oA@Prx5R!i4`rXKV9b8JCz^`hA6?g!zm9F14rP6SP&-H~Nu6$GW|
zlG4Nedu%}w=?R)i>j%%IxgT;-m})JjD5xh|oD%S+P5YXJprD*+a*E5FGVN^=f{b#a
zUvDNbHFT*O$t<yrS|A0IwU#NI(sf5d*Qd9GqrXd(%_T!lRJjMVl0mSjqVdBDDMe)^
zn^kTnK5`veoYm69@nOZiR}GvDtK3cqiZ+2|ox*zrK0k=c0U3AI`mmw=q2!|+hWzVT
zmoW;?I^HFi#23!(eUr)kg3T+p6Zh8GFRDuB;A6VdJ7KP5!wPA|-Es_p=1$wP!K4$I
zlw=6pd%dUQ!wPA|*UBI@_d(;(Ei(>Z{Wj0trNO;aN>Vr>@OI@n9Vf1Jxi<YB9T!BE
zkJ#+k_SQy8$tKI~#6Rg-?q@lel@2XlX4}JYc5zw@Xk^^jsV>X$^9spC2bPK}EolKR
z8M(VF69jh}-pcz78dQ~3v|l|@dhuIR&=54lz{?;5!+HdYcigfAsfjRjI`c4V_ZelS
z1B;I(9bk#L@@>ZEX9*p<1UG>eWe9F^V(Qo>_-QSpK&f(y56Cm1RSs?*VZ9*FC@R@x
zNu85%`n*C~QNk#@p@)+(tY<=+ki!}YMbHo?*bl3rR(^hPYu+c2v!oP%N4L0N<&YG7
z7-;JB?Ey#stg|dfwECAnzyF3QOH8=`Ud61vEsO2zZ(R#@%bw}P8sMCw-`26_tuH8G
zR!x3zT<g%{S1O>D5~V^V@e3+L=CUX&*@VquSz#-xe({?_fPl7NQyyPKM4`}^%kqK2
z1&3N%!p_c$bjj;El?+-R(mO$(gJDr#%bR_SE_XR@erEvrcR2&dkGt7Gq&5qPoDKGM
z>zn=+E0vR#F0aUSPOp}91gZVT&@t;uPsbgJ(*FexE){De6f4rT+&p}kIz*LKJQy}6
zwUjV)bO~<SF6;Ptg+!tYOU0Eb?H3kEFMj)iQ%A|%?e;}sP+C<^aq&2~Rn`_X=xunY
zf#dArq!uvS$?1s9x^0Wqm6U8Ck<~X3G-Q4!i>)<p>$b)1ku4%IU^5nKyK#8M8akb6
z&bF@d5PkU{<gGJmpfvU$<f}{khZg6xB%E0D_C;q0L;tDX!~l=VEwZ+au1}6-SXY7O
zX5i8s{g5<*YHh~{NE!htKCsxRmr;18Tdq6*Zdsl{Qzti<mayIl0-!|pq7$6QE}d<A
z29~G@*`luC^m&C;Vn887py?s-i~|Sr^uL0l3nhh_K`De$K-=ww0_*j%FDy1N=RmR=
z$h92(y9Ar`Al{TKRZh9jtnkY1#JolJiw-FzJLzOuS2Y>If^uQ0@)LPb>bzC}Cf&iL
z95^Df8IE)bUaDtUwCG_^$4ij;?W-A#)Ks=?TdcmJ<BmkGyFX}-qi4cj^P=P}kjOB0
z0?j}e9|FxlNGjTIT~K+Y$3Ov`6+13~rh){2e_oN1?DF>f!d+e`f;sMp1y_2o1{%L=
z;P6?rjagm6>2ic&){D*rE#8$1VLi7L*^;$*KrE@E2g^21;98V-CFj~-K~Yw9gA<cy
zW;tnfaP@;C-rVWJ*NoTOA<Ru#E$(+YI0YXDnmcWh0<mxMF&^m>ob-Sp=_tp`<@Spf
z^|f@~&3b$D)E`H#b(UQn9UN;tWCavgYP)q*7UZ(?`9I>A1<z=8Dhi--4;)LMj2S_B
z&yA%bWJ<dMrzk^6?*#eih6}Iw=778`rTEkB$*~pI1x!lNvhUpiPSB)>@{-xi3Sm7H
z>Y!nobd*DON&l&}X=enDdSCI$Y?I^&G<PcN2c^O{XBa@4E103<)Z9cDkAqibEkK2q
zxzjdDQ0#nIxZvG^&R5__HQ#N&s3=(ioGPAy6n;F%0Ln=lLEaUb4Dv3gkVDA3QWutr
zkemsI3!~T0NMK>H2+^6qxKMhnL;}m3^9vW5OP}~x(e=|%YLQu#j1(gypXg)hLIJKj
z!n$0&4GisFFIgQ@_(V^4H!!rXdRi#JSg;~Wju|v>dEAlnz{0Fbo*VO>zpAmH_*b#&
zY2gJHhE>y!H#8g(J>C3gt5}trLxc0zWd#B31rZx<PQ+&yrZc!a+mKW_q5kS3KeOF}
zM(w+vZv6d<cf~znC+80(r<31bl@Hi%Q)c#;vGjCu^gI3)(Q>on>K*QWx)Jn?c~$vL
z(2VTqWZO3&iTls~HGu3{z3sX+)3@gVbDi4WoL{i*@@z?$FHyH&$TBi^YENVTnVmbk
zoQ1{WicbGtQ=|4-PgxxroPBd8K(ol7m_W10m46zXo&{{)!*FB1vv1Nd7L{w;%Guc(
zs~5d}*Vn+%KI`d6W62%rx9+{;;DCC=dbhH|fyASq6#lPz`x>MM;*8Z`XCxaqd`l0w
zefg{wGvlji$G2Sv`6%qjzlL2;KgNQllI5Jgv0u^c|NjL<>PS8a*lxqbVsS-e_D|<$
z0o!eK<gR^?5IVRzLhfu*{eiBh7yUt`<G-leM`alq`5<262YD$(xBsp-I1WIw$#TE5
z8$c7|2~!U<6cud)k6-_UF4yFpBkwD=^JT4-oh)KC=K8`d>;kVfRP@DlnLAHr%ydzc
zxmD;fd#m}`8_Nvrv!DN+-LWpSyUua{Ti)DX-dkMj{pKHN-zH%%ske=_w&=*i%m0wp
z$)uWZ1Fe(Ua+xtX`pfe#PIdpHx47<K;Ln%T&UaDluVyXZ!M8az{{$gxWHggNi*xLz
z&yQ+~>+%0D{Pyj^Gfy8ce{-bFZT=?lTR(qDHZRnDv3;+gch7u2fm@b)C)EEgzjV*U
z+;-7^%Zg8zKRQQ$QU9`V?)T-7+qb<C|8o1@1wa3zXe)#G*v=n6Z^84n$IkgdnVsGL
zlefX^bDZk3y8q3wW95i#vfHUJsq5b}j>XHr+$=d#<~85fKO_Bd`ejjw%AJ4ifY!7?
zSMvBee=%n-fA%<?sjbXyKBvF|)>^wdv$ULi{(svg;!n(HJofDy$A6J8Nq@e$Se01_
zg1wz^Pgc$ULORc<r;F?@nJTZ%Kh#?0H=k4R!RI<dyT7`(&I-2q|NiXFWW8wrOTM{H
zcJlM17TH_QxI4#Ay5Tm++n>X4-7`y`{=&acq3+W8+>7%srQc~QGqc<7x_?1_)y}z!
zZ6IF<|F|IZ<t6LGtc&wyeCA$!&cs%7@qS7BMV4B-x<4mxopt0j+&96Vo#*Yd2ld=l
zhIM61(sTTue7D~+J8g#S#rs=!%r%}9FV`ac_vOJSk@alH-_Eg{-uMvgM%7y<4<26r
zx5+up{foJ7-t))L-?UA8;m@CD|62SL_aqrz6PCRa_VyF|{nWk8ZStQtB(bfuelO0$
z)yHb-x!w9<Wi*G%G4TmW7I_{2{%CN{*<Q|i>K1F;=Wlw>Hv=UM^4~K(JFeGgQRY|T
ztuklM+?aK7^7G!Q2>uCK!~8GYX4l!oT>&b~KL+ci-Ily{bLS1QzmkxJUg^t(Z-L|U
zWy40@U&U35_WyNnEsDRO&c4yPJ)`^I6ub5ZWoCB&JHQF}t%%_^Py#;fuj{CPZ2AAr
zZ{HH0efk(&mSnxy|0eg_nm;`UFNl4)eXm3Hm_Iwm+c|M3_W!lc%%3$|?&5tJo1ZU#
zEY$ra{OiKG-{7>z{VO*=WBKwVP*Uft$>{z#`C(G@1$Fl3=a186K*>X~z*>I(|0lWN
z%%f<(6=XM4i=N~B7y(b$`r?+0!M}2>lB}1WU#7lg^T*9EyTB^n#?<A3(q<!nu3??g
zon?x@W;a`Z{%FkTY`yqA3&(>dJ9&F)<89m7|3~-eKRM5kTwUE#&sAkuSEVFtJ%<D2
zZ4ra_e3R8*7_<E>x;S5^(dM=PLnrIy=UX^FRPL9U|4;1gGmgW{|Nc~Mlm#UaKgap~
z{<;_E%bdyco6may?Cqc0x%sm<dVf)O7qEZ%eA^5Em&SR{*3$EDFN(ilzW2^K0cVh}
zHES|Be|>2x*!sesZ`rvQ#f;3mUgYmOoB?v;zm&Jn7PNu#1an(i@rV7adnN3xC-R<C
z|MXk_map-dz8CpXcg{(k)8{|b`R_}@r#1G?kIVe#pFRL_qtM$Y4<25wJE#a*5%&3G
zahbFCm*wo6=YQq?$?DlBCe;+zGk^XG_vOM%rRQxgb}($dGWR<-8|(3=IZJNO{jf)u
zMd&fNhoOwQOMTrGmUFjvGo`*|I$T*jec>Aoo*CQA89ygacaX7G-}O|`E|>c+c<nm0
zSez)gmE+N;Kc7B?)WjBjc=GGnzgO+6cQ*&RpUP#qG{LI(%i;Itt7qSy|GsYLPA|Lm
zz{)@0zP!18_2tQ%A79-(`LeLte%`N}Iab~$C)L~S+_}phJ}U}3o~Zis!@4b2Ki-_L
z|0)0Q{{PRL&-2gwbNubsvsZVg+)=l`fA8-7*uP&NXiL2~{CD>3?csN9tWW*89k)I0
z^Y7JHzn;z5>UQ4a#r@J*rAycYEjvy*ha`7oF$MZ6u99>yZC@cKa8+oLQ-^~V%8VWI
zMBakgZxmZU-H4cgn6cwWOyo7?U58HB^*F;O>_BsQZP1xKjf_X?@aejPPntjzcCfiT
z@Jya#utlp#7MJD~5y+%nj+p{@77r$<kzoXyuv2KA<;Z2)44Jf>?F^a40}HZt!Y1s3
zR#+|xfX?J?oC%%93)1K~h?uZbXpKV5<n4~1;H0b2+SG<RVTU}EmsBnpq|w2#;3M`4
zH^hXV#@d$)-|T7^S}%8MU8P3rqlMp7`1kTuYCQTH5b=0n`t)`gktrX)&5&wJcI3i7
zNhiBImXIZ9CV}k0I&BA?(3>$C%dB4Vc~1{cMcI}RflCezY*kK9{2niUa@fi(T(113
zpk-d~g~ftZMo#>0DaRHbSNamtBG+}nSg=aP$=~HgBZn>j!sCixOkC9XtHhl8onCly
z*m5j<uJA>o<=Tves%aUml2Hk6&lscP+QOzUJer!3D;X8l7B+2RYidTUWK>vN*i^xZ
z3rtfpJSC$7+r*|U{F;(sDH-M4CN_ED)|3oQ$%lMV9&OhqE=*0y5S5H_X}dOIp=wG7
zt7Mcz+qM3QjSH?OXMB{1vTmE!w{U85#zToH^R{Wd3qzALF7Dtz3q924-GjrwubR%4
zmhDNO|M<u~7n`jD{yImJxi@YXu;%`F!r{#{u}7_~6?qDB(Nm5@Ub#HeZQF|Fn~{*K
zweG3ROTMRlx2;&_YOHG${pHe<X>3v5L4CSR{klT^x=Q`JM%CS_Ro$Au!lHft&HXcZ
ze_H+Tf5&f$zrGWD)KCAd#j|JJzXUq&{@XO|;e*Zg{r_seOn>I{S@G|4+X9V6zt?2`
ztNb$k7yD1kRCh<?MP?K2|2r2QbPQ@p`1<8fQ<t)hb^a^SKUKBA*RNk+U;Fu8ne65r
zPxn`Dtvh)6`EmdM@2|c*dHM0?>Bm=}ejg`et|5PKU*-SLuRvqTf1mTOHhnVd^u_%`
zU;h8Iw~{mbeD&kak4GOqJ^6Fy18?^~$D=so@7&$@`{~=i;*!t*d)cmEpLg%>z1olc
zufJb6|NmqA_U-l`Z(e@={{6i>fBzl*dj5`0^!-En96AAaYIp40`!nfJ{^EkSvuDfK
zRenBvReb$?`MLjIUlzTdTk-Ggwk=0Cf7b8on=iZ1YVVSBiyvQqEm>Li<Lk+n<?#Z$
zUr*MN^t~WncUj5k`%#VDs=Rr7e^qts_|4hB>(8OJ=Vj)brt0#|kDIs0Zs(sq{lC9H
z_&*n4ef_w&{`Jq_k5&mCEBW+9$I|l)bhX7A$)~~5YTKUh&W?WcM9Z!ev{XW|T<5vU
zx6_OD!}b07<J~Qfn|!+Yar^X#DGTDVPhLElt)^raH}RUx{yj0ppG4<Z6n;w5y}bGG
z@`t~Adlm;YD8~q$-+9O~-ojjO&TNr$zTD5#T8lp)+Uff6&ZdHMqO6*pkGvM`n545#
zrAOQIvDc#=lWf+hOwjgx;w|)ZlFL4oiTaq#$CF&}pvjY5@Sw|+T=1aHlU(qi&y!s6
zpzcX7c+lxdE_hH#`Kpp_D#BNLwdU%2x|YuOO7|`byu0ku%}FUC<tt0JY0MU~6G_!(
z7kJ9CNXBVOaz~LsV4u>dL>I%p1z9#rH@n{KTF4T5T63=Msjwck6|;O_<^*m_a&Www
z#+BZ!$SPU~k<nUV;0=~ZaBL0sO7Gqzn#{c_Fvu!;%36uI0N#n0ZZ66>%F&!vGv%CE
zsy3TsNb}-?Z4zk#mOWq@kLFXM5E<zZzeOe6G@=dfEjYyswqB7vG)x0*z150Oj$lh3
zI8No{O7C9CF3Jg!v3sHX4{Q)ai`^!Duwus-)!)EE1}*!{Awn)Msy~2*5?c0M*PEl;
zru^k)3D`gvr}<{n!7fw%^0E*t6yp^CX4<)FDU0><ywklmT@>HEbhGNs7v0w{-JF#3
z<!BaEk$n3!kiKK8Up}V6gu-D$vdK`P`;u^>1enlE(Q{&tg?^>11AA9*q5my#xIGs7
z^<)iHX#H-O(63c6p~Wzvs+9%XB&J_zcL9e|A!qH2V5{BQw|}la9V>QCz1%Wl{+-l>
z+M@D5Ur*kBcwN1F@q52Fzn;9?v(EpW-|Jsb-mMY(oI0_~NOX_HTwSlw4@o84G{O&d
zU%a^}g;n1T6oVj%Q(<6<Xs|>MZ6zMQ?E(emp4f{w7v;2W*9Ik?4`r?(r`%ijA}4U$
zq1&RMsIAz&XtV20uKaLNkkC|<*Y8g+7nLkMqCa2nRJhmQPcIj>EPVpvM0oxG^m5ab
zsE(j%L7YKTG+a4@r&zdhhD`Br<qSQw(MwbG%<|Jg(+*D!GMnK)eW{MS&e9fx`Fh@w
zd{JJOiB_?E(O!{>cCpho$?TjWbhu`hPO4>v=F_&HC6T9!{sejPe}1`X%2R=5Qxu<F
zPSrde=%eWgHjjB`(7YLb)17AqErS?qyfnoSY;1<t&m^#Um!||B1Dm%-Gqo3NUP`c+
z4A{H}%cfW_yZrRSvMIJ;V+H**8^Ojl&k5q233BFf%cUkpVDn17W~PA6dpl*)Nw9ej
zG@nj>Sz`G_Gj$5s*ek(aT3}-jET0k%HgBW9=GHUIyMv}pI$g6%BUN)Rm?Lxs%sC3S
zDS3X-G>A=hOI?gXHucqd?MwsP^n1#svtXOPX{OErTk$5?%L;78jpb9ymtB5(WBHUy
zm`y)n=KX`2Ct?CMFERsap3p_8c~2L;EV2BinYtKetjFh<i>55Tdh+JUr?0*~d?~)T
z-eh<Cbz8lcCmW`GPJa5w#nL|X-1#Y=i=X~+vfLkXZg<F&HO`Z7WGY$vrY+}uYqD~#
z+P2G2%4R+An|vpGQnhc<de3*JC-<uDysq+n){{7h;HQmhKO-jBtnswFrXrs`so(VE
z@mWujeWAjOJnb&3%+HwQZ*o$7))QghPn~K%T_)E+gtI33o1R=g>q)Thr<H0yLnha(
z^0d3EG9N6QKI@6G@28n+KYb?GEc3LxtTI1y(s`4U5aFF_KVv4>tn;+Ht};J+(s|R9
z&u2X;_WcAAUg){+f=YbGBz=>U;<KJ``+jOw`{^{f1|pm_N#FG3^jS~5eLpQ#`x!L3
zW~Jx8D=P6|Va@vWUo$oZi^adbxMX?EzH5t5`b*ZXb)U_6>UFm5E18f(mZf}O8vOcS
ze3{_a|MJTMzy4QWHu&|v*7&~u>x$w9ZDm_H7JwLT<y)k{47Q3bIt#w6P?Xc<%dmYV
zvm#J#tq_>eD5on9W^9yOD-C8ml+#rJGX&+=s(=}e^17NDwplmaxw)hIt=O}kxNGx(
z86VuedBKc7?%8}`28TyCKbRrnv04DkQ1Cb{=+!U9b!kz{wZ-QerFbvBf-nRw8MT5%
zgfCS=7-E+WK^T&kxZ1!{GM9qdE-h|r-?CsK*gG9tHh~#zom-B88OJ)eTwC}xqu4=P
zE~?**eakyAXSF<-!?p;d=~(9$2^d2Q#;}1g{9ud(7^4WrXj$}SMWK@J5^xw4Dy>}s
zW$3PjGS+T{GIX~=8Ebbz8M^y5Y_sNgbQ^%fV2;OX!zh0%_Nq#Gz1hW8MP+-c%8IId
zTKnFuuiLT9I^zE7n>m{nKKg$#e*XW5CvV@LU$<-5PWvBk9=%#0ULJ0qzn)JopI`5P
zS?Px_um1jS{=8q#X8*s3`Qh^K`2E(`?XCJRdEK(=)4NxPzw(>2FRgO4IWl>BcG9Ya
zA-f(uIQct3vP193+i&lVp9ohzc76Ht*-2I*v!0)R+`Y^#P{VplRNgZOj{WmC*{|*M
z6Kb;m_x9WJ)%O36zm@OLyZ_H=Q{9ip-Mer9-x2ly|Ie%Eujl`hsQB~x>s|l-dw1^s
z^|<}^_WD0ly=9KhJMdTj@PYaof7WB0=f(Qf)fJcDH~7%M{d0ZaoiA^H%d2(2{4bhq
zTl=s5{QnRC83VkTSwt8Z7&sUL<JAM}Le!bd85kJmGB7a6F)%O`Cnx3<#8*}36&4i7
zmu2S18^jyv6{QyEmlh?b7RPp3^Bpn}VEt`-cAb4=PWo&M)@;?Hq)t6nrw%2rgMU?X
zUaXjx_RKSKX28amB1#^Sccc5Bzy7CxIXOMWXjzv{&l;1$^-@QJwYJ|{m09vnaN<@D
zyWJrRw--b{OS5hXRC}MoZPfbunRkzKT-GJ7Ag;G-6UBbMV@Gwe+qc=;;*1Ooos0|&
z(m0$PUtCg}q*oR?!7-c3P@whwPf>n<t=o66I<K56*R|!r(k>A}ugIjbl4e8C$!kh~
zzn;A!ph~jB_<i+cpTLB)oaayWaZ32gy?cM`X+~3TNYH%aGh0u5Tq6>8^1((W|938>
z=OO|h?42lAvSs1ni&xev)ttU?KuSDda=@LB3cbhtj!k^9R-OO;%L^0w6Aavza;+?X
za$sX<jLZhp^fx_+Yi2H&^>)1@tn<B5;AH*5Aon@RzJ6Mp+s)Ssm&A$-SH#A5bU%}e
zSw782CEUFD+%M;xRX3Bq2A#bhCtl(7Ud4CYH1#;?CCN`7%e66={az>@bMw{m%kkI3
zFGfxcy(#``!a=LeOHXZCDB~mf=yr~@fV$_Ayde3f$v=NSpKWyMtLgN=OsL`cTG*s`
z8v_G_1P23y1dj03D^E!~I>nKXS&_r_yKQe*jneg*7njWTyQF4YzwvJARUsocagG_^
zn-6WiFMs{<vY$*Gi*G08{4$#@AXO$8v{Yg7ZApo=_a}mM%`Q|<PLbQTX8!vXJJV)N
z<q}NwJ^5`X*O8#rLhBRq4+X8%xM*c{_SW^%KUP1z<Nh7qzJGf7HF>WEoc6Qz8zwr}
z?fdERD!#;}e4o2>%=_vW6Ysu%?*4UuyyF#?5855G80%OAgAXixP|f!xIYTh-&`QHN
zRKM0#MkW?9FfeRlU|>+j;n(=gy!hn&ypq(461|F)WNkm)PJNA2`X0JkD?={m>YVk_
z4J`QfvHV*fe*y2OFXf%zznAy%7xEO9^9F9XU~FIz(Ba3Pc~W0XGwj0I)BXCIUOL{o
zT7IpWe&<g1J=Hpvv?{$|PddX5i}Y}L`PK;w0>V2YPp-7IblCjqa)+VSG;Rh|CvSal
z-_@9vf#Huhp6Dq`NxT{noB!BFM3pu3>O$_M5Y7&kQ_T4*O5fCkcc}W#+IG7p_tHDP
zD8<tom!H)6my|Xq?YsX0VFg8pM~(6g69k+d%@tSqCs_W*t@Jiad9%~W;5j|d&+L4D
zuQ*+;)LEkHaB|i9xZE4}ZqC?ns7!1v_xbZTQheTgk>|SgWLe_xU!T+8rQ2OUe&zD!
zDzm@Of4?yOcSdwE+g8up1sunHw=7F5bpBYg&}Nxgsro5rD>EJci<`1iql0xK{3QEz
zq92|KVVZ8$cG4zwdwA~4zlXoo75nFhX74>`wx^k&(f8=qqZj&K-<1gAUSP84|Dk}b
z=RAK`tY2<!eYJ|`9mj*Biu}YKk8g=?_`{S?&Hp88`PH@G9?g<nV5-|)KKTI0;%(-8
zdcxOU|E<0|SmzF76l=|lmXhAE#~UtQe64;pZSBpKvPW0kWzW)Dr_Ok8k=WJau5PN+
zqI{0c@?H18(0ZNymA10xTQknT4!Zluc0t&o?~@*^3vB*b7$&rA562nL&p*0e>`Yns
zj7@xV;EUs4o8;3I9dnO9KAgK?>T&jNhqIfO<k&<h?)>;i_+G1eA@ka&n|>^Iz3}K$
za*x@q#^Q@|*SWGzY}p}k`E}d$3`<i<-7wWTRxyb#5;-0&9^tz7VW$%}-f`9xeSe1i
zvD)H&4KI}r^*;F0J}H#rLhA#sAOC7vejYrVCw*zoPU#uOmIvxQJ~&UgRFG<SYY)e6
z_urS})=r&V{q+vR<F)MdQ=1+X{pg-z^hsus&DSZr(%JY58y%)s`g7LE3Cx%B+VX#1
z(6c#`JsNk6rxtF>sY#z##1M6K&nDa6r<b&^JXdbmAW|Bj)HUU-n3?R0WYKS5Hm=<q
z%y-7lVWo`T+5VzFpJmT~Osw5<s_9#&dFT73c9nm=zI|o<RPr+C6eXTlj#6s>mD(1r
zQ#fOqb5~`XZtFkCwul4w|L{9c>0iFC=aaj_%=1oG|AHq?-{;Ri*Q?^e97~ogv4B+#
zo6Y@?zw>-t@#^rS+@ArL7peH{FnthS^J8{M+);b|_M1y5{+OOCwqttz%&s-<zg}nE
zC@j5iU~k&iqMfyL5_j*J)}^bn4D0K}d_^bsb6@u}xZHkYpHNxTrQFh{%(i7_ovB`z
zSDH<f<1}8nHe?ykb)y-guXgtbEq&sBc&ksW<yFQD<wk+21y_Pnew24|Ro{GX<Zt=s
zbP<Q1qQBmR<SSPWMlL+WJ4Ng9E2WiPvF{k3d(T|S^{>X#NhL)q-e&6}pGJ<yF-s0r
zp8p-1rqN#?#kWy4#bZL}f;f#;Z<t!&Xq7TfkbQP3bN{}BU*AP##_pXn|Mdj@H52%n
ztggtu`p5eF(W{N}F&p&P3RKUxOgi)U*7WfHTA$yixHeAzXD%T+skVxF;fJsL3|RdC
ze>J+*krv%@d13eaMWx+FNnBQHKUDWLzPs{=!K?p4h}ix{vp)A839<7mb0Q?(xqfic
zFIX&Ibi-x+f!;Zf)uW&9Ha;*fXnM+n!yGvqH-A3zwdGuG(xqUpHU37?pX^_pS+l|@
zdf!18HDg2X^P95{ZfXBnl<0kW$^Ka9*@fqJIkV)<li6`!@`9p?R^Rn)A#>bj=bkvK
ztmUR_r5JX&V6THqvViB_`@F~dI6kHpykA%@drH=MhH_G<?rM1+E4#$D4>y#vIs;7v
z7xUh>&X%0aq5J1;ZiGgGUyNJZl*4!XBVzjxIx%p`_%u)6rY_Z(yM1rf5@(CIrCaz;
z-z=MdQ}A0fM{&ipB~>lL7r(S!;c>s`n15(l*5OkEb7j_Zaa0O$2=O@!xlP#+wwO74
z+51J|)%?G#91eK>$ww_{U;BQv)@Ed25M#pK6oR%ZGE#C%121MBG7zbKA0AUPYr)c~
zikIy?ulF{sSuFhV?W8R;<9Ix$FG>3T)w{Mp^o#1wJH_uTpQ~NgT(avW&s%=JM@LWB
zSam;Qed967%3mQoltWu{;Tujduf$f%PAeXj!oxo7mD5r^FGLltJhc9-_PXxxHb*Vy
z*|)F$YQ@R4P-Z7z&e4?S{d0e1>df;<ZV{Zo%V4*)@B_;}rWH>Fr#Wz~3p%;<zQkG9
zSJzzSzFoKPyRCCqWT|+^fz0}zzXyIiioS39RlxXa<D3;S*(?#)i!R(R-&yPMY>whR
ztMhL}icYRlE~@=zx#L=p!BifNa0%(K<j3NXRm{#=_9=I{zTT^CQ@!&<iTm7^B#Z5b
zw`drjvA@@~dzbT{jjvAVo8P?Dc~$Dyf4=m^Di4zUSJiJ;`N51D%qKtjuRp=f!0<(u
zfk6sK6|7gBkyw!08&O>l6DoOsx2M_td$n_IXD?A-+OPX%;-{>#$;&jAHk^NRtG4B?
zujhd(&)FV}7ixM|goH4OXygk9T&SO8rL1h##}_2avh3)mAO}UJRxV|Ye~*1mYxvE*
zC~0%w^7*~9cc<MenRWN`-*e@4&#mwO+;@NPNmIt@uYYX*vgl#w$<A1F7w^Z{-B(+?
zm-oA0Uc7nnZTIwJ=X;keD|<h4-j1y2IVSgHU-zo1sV_b>r_-<he2;&;xn0@6PifOn
zZ*BX(<6QP5`Hi!06}&0R{TJ6Rqhc4S$8LF+S-sD;_|SG9JJbJ}CR6;b2)XT=bbpqn
z<jFG*3^7-tJw<wDt=-kj1TU<p_n5KR*xK#*G3E!$?v<1V__Z(S{PpSSl8O4uja!d+
z2+Ufkmy_7Gz|}Y0cxuTqDJK4}Q=iVz_jFq@wM{3w&YdB{qxbcU?eCWFQ(jPPzjN(N
z_k-@uMX#-%JfH9~OoRVPa3aTrhL@@nI9OiCbj^3_V0#<Da-yl=sZ6Uuxv_Jwz|#o|
zW_u3_EM#Q$OwrtOu`guNEUzWTnN#($SJfVzBDw2FmjgS0iNV2emG(_9UpeTSziC$$
zVKEDM%(nQz{$3+?j*_7LvrfiZwHyd~6`uT1u+6waE9A=@!+5>}Mz4-)3x`Qe`&=p7
z<iN4!!5p&$)vx+rIGm=uy7qChVnnOy0>3~%wue4;dk@%nhxSA`CYr{DU)o_4uD7IB
zyxDY%@4082Z?XytMnta{*;l%8(y5k&xoa#^gI{dYa&i=mSYKoju-ishe|c7?6U(_}
z3wLQ22{#lQ2*0q1xO;`|c~DTlv8=wjJKOXFl_p86RXWQL{G4)Y&gMwI@<VL5?!C}U
zo91BNd&NI(Muqi}j2nI2zbuw-7nHCu6{-3W>HTNMBCDXSUJIG4G<`o?TFW%`DtWs)
zpKD#<e<L(i_{I_an{)K}uX23hcCacqz&$&Yo4sw5_X8%WgN|o4)K+cvaV;!4@LXeR
z#nuToW(5{V=sgi#+O=Jp+n8tmdS%1T7#HS0w+}o$q|YOMdtwBO-a+Zpk}G2tg`5)M
zsq+`~xbi!g)k`tcbaCm7DHc5w&s<;CTBGHx;QM!3qw7sJNiQ7-U2dmo;(7bFgt7#3
zA8z=ou;*m)x8?$s{=|MAn-k)1IP6b|*_=3WsJX<cahv`ToqQ(OSLc_$ek<A{bal1z
z)uf#*+RXvWs@Bc&`0Sa;w`iu{jAu)ib(YFDa^=OEXwA%7wZV0V%Yv-KOZu(^m{pka
zsJhhDNj#d={PpbPPlv-Y6DBC`=n0?HHEp>9%i$}>-Jdbm7&t|LPED>bI4&<XJ$Ub=
zwa2SiXMK&>pE1kmTJAUZ&}CD;9h#ouow#D!*{XvAi-RT}n0iIu&24Mg$>kL+i?2-g
z3ei%U{d1D|w#(BV7O9#(YL(rx)WT%W+wX^F$mD)Hv_mF0uT}r@vaF>KnpbCJuQF&^
z>YK1!;rR2!O#yyaq7s|TJ}zG<zt5?0@y2}*Bd+qtZ{?Y{%JXu^=b5X07f+Yo?X!5k
zbnu}Uo!m`#ryb;6XUMBE!;DvDhGFl&ReYPTDEBOqUl(fe{M+HuLoZ&79=RUProQi>
z$)lQ|avS%o-~OU`{lzfLH~a^BAEhdYy?=h1`NP*;N56iQKGc<e#F_oU?9%S@cU9K(
z8rt|XJTuuB8mY%~;Or%#bu4)oSNNMn8BSdFf&Ic-scVzB+)B`|cb#}u`E);jZNY3e
z+f6St@2tDJTd)1oMv-?HcAQ%!xAMcavl3fn{>z;(ys^A+tI>SP)}kzKyV}zy`E~>^
zPTYBxse<*+(u;oY<~_HbzvmQpdG?l_hZ+s;9FCtd>CcI_Rid)*u4Z^ovOnrAxWj+(
zL6_1cQ&y$0J()dO{M~bJ_TZmB0{fPBrhM#vu|Dn^Cx6D4wKfsPpH%lH_r5=(t(TUv
znPuPEU{!saYtz?#*?zcLO0~1*n1qgmtFqyo^`CgQA9gO?lC_9M?pe3x<c0Ti{(O+_
z-NrX{+mut&r{3`?cAm{HcjNyT&iT@J3TIUR{w<%iWb&J<Cmu`H{R>y-&wS$c$-CEP
z*~F($GJ9iOn4UQH%3L_ndgf_kEx(Pn81s&f?wyPDEH5ltmv;B9)zfzA80my}v3IgM
zY!*#4+BxaYqKS*8B7M_NvM%BO`To)gev?n@+?rBuXMQW}tTlQ2q}HU)Lfn24`@Nb!
zk};?Jt;#=qYoBfN;f3%V@Al^Z6|YuECtpo`H!*x(k#Mj267R>^QKc)jWwMl&G<O6}
zzqa<PdHkbu9}AxG>88x8{u|#edikKT{{F{DmfV~%Z?mCn<rCJ)FD2T_tJJplzTCd;
z^53^tm-{S}ul=-0ICygJ%MH5A<R2ByT>g80S<lLw$G+_8eYs=m$7b{W|C@w^yL(@<
zN?)FQoNuPj{5SQtJ5MGjS6w{zC3a8M$uF0W^I02iy)`3lli}UJM;ML$<=>X4FiBrN
zZMLj`e)Y)|E4%j*GvlN$zkjp5`mojA)91b}xjmyUKl#_`h2=iWnve5a8ve}jS$|{3
zGegTyCHk_ZYnb-;z6_1-{m;HW&Pev)2fy<o8w~fRCI5PHVEx(4XaC>$_^!!pnf;9!
z|H|JmPky=HqpE7zgx;6^+id=RcGZ5oz3x||u<%C1y?M!1XI?#Mmbd>uO*r_*u`g|J
zOFn<qs`#>C@u~pn%X@lXe*HeraHidstHKwh<z`P3l9!lc6tw)w4)$;IV*cy(`mYq5
z7x=u`Geh*yy^e)Z-aMf(2~OLj4Hh01a_*g0r*W!RLTl}jfJW7}Nw*s~Wv5EKT74uS
zK-w_GvvXmUm)(@pY(5zajs!?AmG4SqRul0{T2XU}f9X0#;a{qTS4=w>PB2Yc;V0yL
zHOTP%?CL9qSL8Yus-3J2Y>_fps3YWjbYh)`A@7U}yqyc@dGN3<VH94aU>L&vvi;MA
zhR%7@C9)ciZ1^c{_$H$>ak)27^lnDszgmWGl3%v>-frm3n<7!R^2_0EIY%~JS821=
zFwEKI#$)Z7bR$vd@U%^dKjbUK|NRyHXm;fOp=+Q0_wOma*0bKcu2SdPA>Qrr&)O@O
zD0X#hEn0k1e|J}7RP)pGdoBr-pDW2T`JEbQFhA+A#?1NBx^<DebQYw2SQi-}DPh5_
zX}+h>ErcbaOJ|MQ(O;<{YY%!S3qEbTd-hg{#f?L2VkINA*Ep{|*p}oiBAqtX(6u4=
zl+{(9Z-&vUI6geOA$f{-cY|(lPDO3bPNNO%H@Q+13^z?pTkyv%GDI-Jb5rQ419A!J
zZmCrpC)|k4;?)w4UVG@^x5Vs4N_(B&--t48K6K>TN{2wli0MWFNjIvVwrxFgF6>Ig
zoHsHickb>9;d}ph>BGk3_iaABZ&)$){v3hD>r8)jb;cTRmcBGI#B%P+2l|>@d9V9R
zKi<8rBi~r9$09Rrf5H6a>qX<7j}@5Col?(m%fL9(=k2^%^GuhmdvRAyOzQ5E*0-he
z*RQu;TfXMqyTtE1{Ur~5k>EdgL-w)a5fAO(ouW-=wJYED7@ApGXZgfhYiC@PzER!%
z@t(%sy>Dv2TiI3>9k~2BTrxTM)cWZ!-k9dD-S^4(ui4^g{*N2Ow-$djJ(Rm4$S;lO
z-|tluHAGT4R<2yVe%_3^rb%q^Zhvy}gQxF%^~9rGV|!=pW~CDh)t5f<JqinIek1l>
zDXF7d!s*R6wd35cx9#BE{rZZyTDDt^BR}Wn`Mb}i+}x8lL-KZBk8l55!Q+eGq@O#w
z>EbQxL+|3x9PQfGJJGDH#PFW&rQLJ?-n5)DL)43X_ie9_>67y(-SNH=-M4-F%|&T%
z&bbDxj(VT+xw{}NJ?7NCf}X|ayB_nD{Z^7v_M5hmT{hA@a?R<RvhRYY*-ZPz_s`f?
z*}IPQ_tej=SF-C=cON(Gsyl6c>YL@{?-B1--`Lyt<g1wF<g=Dl*LR*z+OGGAt##Lt
z6Io?PUabzk+gZ>(+4RkXZ5@~1Pg|0G)4IE3LA=%a<b3@@k(t@zzb`Az`Mu<G)wgBI
zw_fp9nC-rKarZiz=NoR{sgqqLy!r7~+ug@Im%WzzXnsoRqSLPYqNM7qnxY_|tqu3)
z_=X!L9jJfXIa$r}g<_uN3)NXNIVxxWqYd9OIlU_0dX0f$!!-s5aa`^HiaZ7$htK;X
zaw@_MEnJ-x6ciNF5)BMMw248A!GROD?=~^K($q1VpCEHJ;e2dL5Rc%B6O+EbX}Qp|
zYByKewyuZGGtI1?y>Q^`%-C=Ei0|Fy5)M9|6=4bQXD^dT+?uH*CFCWjtIBWT*e|Hg
zabeeP_mj=vBu~0Nxqm-!{?^pqat^1AeNT>gr@c7Jn(x-MH-E`_UB1ksORxQRt0+i)
zeK+}#_sXrI7r&?&>H2rbs;YUNS!sW(E<5E76VqSi%F{eA-IBU47qdt$R<qEX&to7F
zvg4#gM6u>n-j6I?D=IH|OH62bTYNqxcjEp3OK-gTrj$Ivj_K8biQWFSSL_z5L|;sA
zo@Vk_#y?EwWTQFTqvpw_^830}Y$RT;P+i<3HT$J+uT=9k!>l*X`(L;Do_z9B+T(;)
z?E9J->3cQ`)OyaGbE1Fc{H4ow7YTiMzGuVqnmZ-8{7e40CTD$+7b$X`+a+Biymqe8
zD-Q7-nUce)?!kMmD!JZ~^cH;)=@8W{W$=25e@={|;bie8W?7nh7a3k|{&S{?FQNPN
zkJFPaW(4}pH5K?FlDkw<;%-^vLH{!0Yq#SXt!7C7mi7--nUeabCTZcLYiCuxBL6Zy
z`Z-%9!E2HF))!ZHusm5+6T`te{U~pYlh>i#>ASkm-ENqB$MpTyJ?;fZu4xC?@g+BW
zyv1dZ&$Om&$((r)v(_%2X?n3VDaY^2(XF4iE`N94thuf9ex&$X8Nto#cX$8ou8ExS
zV*eI>yB@BaL9*scrFICNZFl<q`P|jdhrWK;`hZJpO?7m@mG$v$pG-3RSoi5HHN1V|
z=JDX9fG<g=3`N&2hzhJq-Ns}0wpH_~TZ7y_$$!cGsmH7ruw^><w0%pSFwuH_x^`4h
zO^kGG!nTC7uCK)c1k?^i1kH_7s$*Ut8LZv%$)q)K;>s)BAMQ)by>gyX{@2>nC;wKj
z*VT*XBz>Qm2gu3^OPuw~{waFe)AjjN&eKe)Jdf{v-D$^HxRli}(t-QR%iipJt)(e(
zE(*6J>T?}7I6mX~UTVGP(rZ)uO+L$C`Z5bP9oc_s?xF85{;hao`uyX1!3kz795~#p
z4ci@e%n{rFvHD3$ZhD1u%_Q^fB3|WJl$@?EeDhV?z1)uf(UVf{M~_}<O;SB`KCLc!
z-`lt66SwpKoS|#FR#4>CON*xsmm5N^ZqWOd<r^<|;LD^P`x3d2SACM(xYA{Z@O1e}
z>Bny}?)b4Y^QS`No!P<@rewUY5^yaJo6594`$y}anw6irMAt66v8^cE$Es(>lmmC{
zXFs%9#d_`Xh5tv?+m#Od{U&O>{Xw98llKLY{EeStpKW1U^uDs~WKHJu?;re*9$qzT
z)|b!IH$JPH9nb1?Q7Y!!nP83UhnASkTrs2N{Jx)aWZV5Fd?<cVo^_*l(#9^KjUJ5O
zq&Mm0@2YyRs!v~7B_v9^<nR3(pDNbhUOJJ_MU>;Ms&eklxL^g3`lp{4cjniWdR*C-
z!~Nv-)w2hA1i$BS`RM0unkXdPbCvDz!+ZR@*bgtVZ#g+lTG6UWGjexw!AX&o$0tY1
zooA_CF`+Nk{I%iaD-vEU`X|^0=L;|_%e<z4u{D_GyU8!ZEeRnT68&;7hv#rs>S!g#
zNdNe;qV&(v-Dd*|nKkUQnY=>}&YTjlt>)UJ6{7ts*M2LX#xIqm8Q6F(;@;dN`SWZe
zG?w2mkTuErBO@G@6nm^-cm97%t;9*(K0b>kOq+gn&E*w4-_2Oi-Pt2j%e>W;sr={H
z7teN^_MetgTt0cf-mcb(4(of36}ulXMI_A4_;Ro%>wJqclg*y|Z>}yT8fvc|GC#bs
z@W*v`-inx|q8(FQ({1){XxaKl;qaaBKUwAXT6FO9B<`HG$mQx*zif4_<_FQ&7(||&
zzBuukQg>eeT!)!Si9uIi{oUjiw%T86*50K&#;O;(IrntGs_P4TY@gHhA<k@uuGJb5
z_q9dlVYAMC-=_OT*7|r~_5Mp6J=!yzkBMf#a9Dg_MKtPJ*Ye*Rekk@Wn{c6U;+)h>
z-Tb=U|JU76|LNmycwSuV?DxWR({_3PbJ=?7M$aA@uNBwSX8B5o?U;FY!R5uO5#Jqt
zEUBBt?E7jNuUiq<oWlm6B&XKhi(xMRrE^2$U67uhxUj&=uplAfW80LTT~=+gadP-N
zC3y9^Y^h1Qdnd=_aaKFnZnsz8J7?GH4Kr4+U$>Y&de6xThSGcDMbC>Ys%1(J;@!&D
z=s4vz(}%-T_dVg6J1gQv^^VTB0Y!E~EH5WEC3G}>ICnZ@Ws3BVTXCtaD@@u>P1F^d
zcVngb(Xt!tnfnqiYpfMLKj9${=icqf$5`@W*e7@0U&ge)%v3bKF)`Pd<7>$)HDj))
zu}?qjuZ!2HyQlcZ>Eo-+O;<R7viklpUw&ZwUeAiAX-61sAG!Je?ceF&EOGc6|Ep5}
z-sppt$6h|T!}D*|U)D?}9lfcR*ZS;}I&|mk5>L*k)~t~ewfSGgK3!b*+jJ@Ozr0!d
z%9U2F-hN`5+`Yod?YHLqPy4KYGDj+Pt%B{P=aVn#JJpu>ewo<1EA!k3y-!l+d<L6)
z{!R;JeXjZaZ-&Xd6!Y6lzNp6YY;@C<=8Wh+9U%URrLFFV%-xOo8GP)UuWq@0z4f)l
z_VCngU(04#UXYX9)MB|@n?;Ue&bfr>qglzPZ)hgo=@a+0JH{8ZeBDoh)jZS787oCw
z3&VcQ>UNnX@WtdK-@%LO!mEEWA3dLT?)s~y_F0xO7c@&b&VN(YtT$qO_W$L=lbXRw
z&b=?SS3lhLE<x$NU6-z0$r4t{mtqxCDiafT+jvFWZo2N+Hd}<n!g8`w_>$IKwTWgD
zxrYkG7jdl><5UfF$_cP&=`Y)IC`xTw`Nw(raRPR~Z+GXs5Ie*oY<zLS?aH7R>3g#8
zyx-eY-2FHEH=Fl%t!kNlHD<>$=B>2P$)4<dEa=XLNa0F@fGgtihxc78`?G996xX`B
ze2yO$-n<p>ZhI>9QY6Fv!ycOA-`1^*Z{G9PN<2v2;QaDwr4t`$pI2GP_<ni)yO}~(
z<}uy=Y&kg@S0cH7?`4!{>Yi}P_W7?e=aVWq{;j(=9Xh`Kx1$o9?t**oynT1Qohfj4
zSK+%WKa<17Hm}{Q@3=FmG)&1;DCefa{(sM-*=FS=1vPDYeY<7p%%@*3I~DwWU;n%4
zVUd7&@#32cZq+<H!&vWeMdw>>y4w=*gm=0OY<U6oKLgL)lFVY8YOuF_&X)8w&iZpE
zh2B=a>uZs}P;%LqeaWXZmYto#)XDCzkb9;h?#QN+n=DH#A6#HGKRsyyOKOPi^j{X;
zGf!UK?7no}W4`<!I;)n?X-#pt5zrm>=wN_&+t2HhIHOBk?5=2>PIX9F$m38ez1>Em
zs=I=De&Hqa4O^aP`@Fw!ZvVMcvhTeF`G5P%i%TU>I+@41XG!UU%eqow)`@~!?!K;^
z`{DWejIgY8Z`f?_$`|v5Ca+6cdh>zx-6J!#4fF08{?7mNX5nM@Ijk84A376Q=QS=^
zqiB=B@%!yPDTTjJzi*XdS2ZyDRyO;vob>JgF{VPbQx{JOO|d(=bc^}{>Bb4WF1?bt
z_GSJS-@hGBaR$EkpT#!JSmLgtvXDt;<GEwo-m&<J{|adCu)FlJ)Ba`IV%r})<s9)F
z8@%$DO>RjyKird;<oosg{P|xWmj*a2@;Y%*Soy5Vey(Z8lbt5^UwCtT&TN0{g?aOK
zt*I;!&JEhNq(=4Q34hbjo4bwYupg~!724WxssCg`{P7FRl5Skz?9v@_dey6!Y&D*~
zk<S{sId|WhVQ{VXOuE4`>!+)jJRE{=lwI+x<IO*)^ZvdftBm1hO|6pECo6UYtN%*c
z(!{~;a(mCSiBn@uQY5Du3EKbKF?r^)XVbq#Ftp@vxOMi(RtfH-H%+y^><x}sq$A8N
zI<vd&{1xWk#$7xT(Q-SUXEJKJaSA?Z7dI&IKCkV|l6wDHu!ZYug$;XxoP=jxO8Z&5
zME|SH)1CWwNQc;6`}KSew_)|AORuGF*Bx1&Q*HULd)nXdSs$l=o0(u(VCwg(La<YQ
z=5`~y+nJB9X|TTSy6-jVfxG_`*9wbeTEU0+Gv4))+V}a%&jrcTLq)^x<QN*<lHP5%
zI^mkx?7#PT=k7hs`0C1hw^@So&Zb1v9g24JZhkB^ZCRb4)wIwbVOtZ*%rs6hci*12
z?vTX?rZr2xb@vA@Ir49V(<R||q7LV0eRTYIdiP~p|E+#3;ir~W`1e_eD9&a4wEw$M
zpP5j@-J`<kf6EMR-CptTNQUB)|NoWee_L>kM|ef<#Vc&rR+!XuUO%Be*{^G%M33uT
z52e+&EPt%pB)|E-^sOUb@5G#zW?aqaf47HeM#0HXr(SMka@JV5U8{G6RPoj)#}_5c
zvJ_xxUH_`nJGfupxP{|aP4z8T%W@-z_TI&(9`mne`S96l#)_Z9p*dG$n)#yccU-e=
zy|{V*lcs|Fn{&@icYJ$dOJM8iquWbQ{!os)J#U4JSH+PvQd2bwm|hw$UVM7CYO(Iw
zLkx*cf_X2j0&jFodZyegyjkj?$V7!*uRAv`E<gN;-}6^e`yzE|A>P-84-;#}yM7+o
z(YsW^`Biq~sRqv~i{Cvl*FTqM=p1-9&)j*H+O_6eZ5r7Rj_147^y|2;=XbraL666M
zmy51u<$NC7tW)RG0^{B%%=0QcyXe-7cP+a!Rs49`?v^c+|Gg}?d#8mU*PQI8ukz-7
z+^=VIXl%^7JmuN7EU~+tX48MJH#@}sO*%5|N~nl`o%6(L>obzoR&UU`C?DqZW1;@?
zq(>*88yH?`ns}VMyqQ(8(PhT|->SP(EfhbCI9xD|Zalv}j&p~4)yfB(U#-%<-SF@E
zx65K1I<5Fb*PY_*nfH&&_)K)?&iyYRKHdI;m-9^_`|tfL6_d>p1*O@JeEgDEw~;ld
zO?2Jf)?Y_22AtNOV?O&(#h0wzQ#2DiU7p1Hc|I35wORh7==(YA-jKP?d8@zt^-W&L
zGVh}PVTa8R<J(Gvf(rY%UUDt#;jVf9LHovwbgejxOXa3lL+2W3Z+>jCj#t9}O@aN_
z{41Lm{0MGPlw}F<t&6XDz+R+s`8)I7En81s=jZ+qHsPszpX99r;+DJKSnjopek1en
zsPA8i2Q&J4j~<$4GHuVl9}L0M8JiEkl)kUN<hrTo6%WfbO)k?Hx$w7$R87o3!ECd~
zudMe*P0S3H7@KK{^X;!T)E-j#wd1XTM`N$8hVi{m!Bao^{rFkC==9GuWjFiOweJ5o
z<<9oE|Lao+4klv{;XQAED*fcWwSZga%lzDa#ouS7;!mh#=xMxk&bVxl7B6t3`Lpq*
z2|B4!``4{e+v+KIMbePRe|lU%8F%w`<68^nNguqjBHB7a+$>w*h2^I3I94^+8A?+s
z!^)dW|Jd;xO6uMfC|DwJzQwIv?1J0QPX|+sxeBhFp7W(}gGk0#z3qA;;UYz6-d*X^
z-57D|>TT_hQyPBWoN%Ew>&!&!_l8-2jaN)iPSO_L+Sngu*uT~D=tIl7Y+NNwLi^Y{
z&tGf{WDwQTv6^96KA-7ZhKXVc|BsK}F8mP>m^My0S?Ix_U$TQWO3^3QIHq1$vU=l^
zJG`^*`L#q8TwbN3!N<sb)L2I9TY!=4)|OYFXU8|{9m_bL{xK>`>wZdb#M2nQl80aC
zF5;IncKas$WwqkI<Qp%)to@_$d&#$(Gfp0e3)A{#uTxsl#_Vc*V@7OWo%FXmB74h?
z#F&~sPVT?(Qe8<X&847kX5hqgmgiE%k2U`l`?mOnvW{QnjlLJJIdr&ZoA4EWSB_n1
zZxtgoec|fOJFX^}^|M?Fo&Dh?&qvd%-Y3-=FY->_YVPwUS>i!i)q_o9DeN-0x>P1j
zX5?EKy8J|){=VKxE7r~m*)n6n>>n2{MKEt-eRnzO=B1bK7wt54)K@sjqg6bA%kw)Y
zADR`MZ#1h-i-?{r$UQ^lyVt2p?~fVAu88)P(wTnn?2mhg^mDWm_8RR!X85m-!O}Od
z>}$PtV&RTg8=k*hFV)#@bV$*eZ&5{g)xq1<4DBns3cDu@Ty*NlGngXsLDX1jMT>vy
z35x}r^@|<M{u&0=-F?P8p+PkJ?3SFL|1Bl2dnL2_a&YllS4qx{IFsVJ*f4nKcDD;9
z>n=(pALnS1sOY+Twz@IcZ0GMHxu$iY!dY84d`nRiV6eEK_|em2RcWwU_!Q2aEIWQV
zD{SMvm=o+<*Q?pxx8z&gl9+l{)u8{sino_%_iXf0Z2VYb+a>ivVgGm4FM*4mpSdON
zrzn4vq5c=^v(_RbMTY$5<=;+MGOJ{)s!s0sx$^s^!(U=<9=_!ANAHZN(X^6t3nn*t
z?*Em^!BgM%zgBR;ysvL(>qphNgiMmu+@ABl;Y&APiT3{`QbudryXr)n*Dn@Zk#maU
z)SPLtX&WW@4pnmqF#hLFZIf}bQdz*Us9!hd<0oE&+6{|1_FHoXOX%EU_*)SW`!|1@
zDUUHj2ZMXr+5N}Q{QJoD`sBLw3jegq8`_Vn4X#C4d^=?H|Hb9HT@i_;`q!2pD~Sr`
zw7ES0Sct2I$RW4xS5cNZ#x5NfyGs;$1!p}hKeMdV_eTFr)=oal{KXqX<YvuKb9wsZ
zmy95XqR@*I9@948eq5JSW#6<VDWcECg72=^-W!U_{2B*d3vu2o-~G#Jb)op}w2t-L
zxrMv0+=@$_lrr6Tvfak7%n!dsUV3VC{p-ElqaVMTDHp%F+>odGZtmQ&_Pon)zHRon
zz^!Xi)ngbCw^3u$u|tdB-M{Xf{?y{-XBG9R4%yxF9JviwNAhe^nf>6rf5AMfyV6{)
z_to@2N4R|mDQJ)P&QVC1(Uh3Bfw4yQuU-DWy1-ZNoi>+}xGd&JT=vs^``Xb`&b>=}
z#e?mh9cQguldgoG<nNjP@0e!h`o1mo4S6Q)kNVbc7yZb~TCBK<cR@$ge;zjHNr$}r
zF0s70!rUAjd;HzvETxuDA6M+Fx0hr7e)r08ul)xLul<`<E;b=+R|6+|&4u|^v$sTO
z8NABB{x|Zw(^R{jSi=PqH(Wlt?{&fP34Cu8BJ*!b3Gey+)WD0cR-3WB*W!cM(vKaA
z2km;CGwYVmJn?D%7A>m@S3;_4B4k}7>nfh7K3>(;W-G8-y2<Qc*T0=}ekGTv{_5Yo
zt>4&iCYwM?gWZosO$KVo-ins|C(m6ivQT*VZ%g2z1r`6U-&s@hETgAh_F`zj;bo3f
zPCpcy(KI)VP5kdpsdKuE_HTbV$>rG%9q}%)z=!_-U%ijkU9j?i?El#Z{ZCA|C)vGg
z&Vu$&7i@DZulTsUQ@fjX=6KxJmxmsopKD|z^zhcar-zSUlKz-cv3ceejrOI!``7u!
zR-duvy5)X)?ZTe>u{}#~2Y5UDU_G>?_uk6GZ|!fEeA-mB{12D-vB}%F3IASioXXJu
z!lG%#{@p^Cs@eXp^NCEHv8Pq`XyGT56E~%2`7CNuyYfEk(&G4wjQu8ISF_k(gj_u1
zZ}9k)&5`gNu5W+;dg`yZ@btRBjk#HjMgQ{y-<zd*`wl*HxGr;8m|4a#Y;(AUxlD29
z^4~kX`WniXS!$oi^)KyZ^RQ}p!_OXlEoa+KmLP#*4sH8;vAZ>;O6pfUNnEQazrap>
z$KRh)t0T-*iaK7L-*TtYJMBVOh4Z7Gmew}14j$F<%)*Z|Z#`tZwr*wU0*gOq6ZYKm
zcQ^c8amT$NYwB4I_K9t)4$o@yx!8B2AyugTuGjM|t3r>S5&3uiLhV)ePf;_?nQNoP
z_RP@d7C2dJv~oj6Rgs$Q&!D{4DG!&f%{%=tDOYLnjZ6EdmLE&4XR&!-KdtJ(xmVAH
z6YEY3^e(esU{Y$3BWL>}!uF+Ve(TGmSDtOxVvSn&8{Mkh)wJxvP5zCO-tTVr<M^Pk
z+OWiHYUnNA{qyHENIyN@tH%(c|IcAt{g3_DLKds<%+x&2edeD1=I`x~l6e|88h)?s
z;C0GBa@l%L|AMeZeY-=o-pX_Y&Ab0~{<HbB?S4%AoTl5pxb;+0NBH)}n+?&gc=wqX
z80jTH3Mo>k_f1;McuehR_VXL5@0jHE&P~!5N&Xd7<yyeF<3*$TmDq=$ml`zIwDlgF
z{OQ<c?wD4i9e@9=%Qi9YSGn96lg~IidF$OJ*Sluky<EPL?_sS_rcWjN<aLSi&5>um
zClzj+)h{T|$$V_OQNU~y!>xC|F{t*g+PIRXwQ5hyiFIdlYyTFVbd<g{L7?f3d2yt{
z+Q)0Mx*T$Y_A<V?ev<oa@YcHmPfQXkFFey&wZ=1+H$?hI{4$-T2eYjtGJjmGx-S%L
zo<ApicioxIM-;wS?wBj5r;x~5a{t9*$HW=ck3Q;7@sCk7d?5LL@5AfgGiIuNIDJ@M
zx9QfcNfUTj*O;HaIOqL=aHWc;BGwOMUc0t_UL3YOj)C`m%e$NGpWi-+dz<6K@XK3e
z-?l7;$j)m@x~A8B<_Ky%bT|KW<yDjK!!<=WF6eGEQ-8ifB>Uv;Wh>Kv1u1UqS+~O|
z`11kn=Q(Rb_tw1MDU$o}dfD?n@8!8}-cz@~TdvBpE5ks@n%8Q_2lcS;qDkB`O=2gG
zJ~A}dV#~?m-Lm1B-c0}BCG3JK>|3gOY}ZS?dbixnQQ@houI-9RLK63)_I6y`{ZsAV
zKBif^rAcnNJ93%?w95bFCp1c>mZkc5>KLzEbaid>IX4x<$C)bXt*dsbCo~+04C#(C
zTvyJ&ZdbU|k2aavJEVf*{yy91`&j#+!ShBoH-S)-`wY)-BuM0cbeZ(4_FHP`Atmms
z9{J&$W_;TBJ3)Q(gOw)V_*r%_2)uHVId=7{XXBcQD|W1`(=gn5?PIs^QSR4EOL|WE
z#N9lpd^qcU%3{l7Ti8;CtL?>{`kJSwT~sLUp8n|_o2(mqNMq)WL$e!X%U&t2o%ErZ
zahm7NM|&JzFn`J3Qux^QiCXWUz}jmkVuDi&mc3k5`03q7u{C)=-fj5JB^R+{N$<gl
zVeTh2*_+CI^EMiV@Xl<{S1B{(*vwHD;X1)+Va=LHYi2*2X~*fSUEN#8!t&+n!ncmK
z9#4d?CSJDRx$NtXbD|R_RB4^LWz8CW_Dfk{ev5d+gqc!IwXL7Ud)KU5ko&8^+18Ht
z{<Rsavp3J->A7C(wD?58J|>k6gU}LYt-bTVYH~be_~klrrFek6=ALD|X^VI-8_Gwj
z@3!_dbybmmt!kz`Gvwa7jMS!=Z<zz1?KyV(Y}|5gX>a*G*J}-9tfzh9X|8c$pLOD!
zVv5}kgKD{h|Dr9fExT0qB!1mO-k|Lpi)PP@TYBwYo$ZVEH5-nFmp601YM=Y#-hBS5
z9Um6!M$g)+p|18y^->&nh!%^{cftKWM><c)KI%!&_Kk?ph)j#*4nF$Uko$gd<6r-$
zdQYkjEAU?U|NC{{4gC(yi9h{r1ZjPCUD)%5WuG-ywC5eIHr0b~qWE?!jN}U|{F(mN
zRQ1WOd%I`#M$UB6{%&OLck;~Y>W6$c%&&cZIP=}xJ->Stbx&_Huu?5r&idYT{;Bfy
zkL6w5w*1#<`ZM`(=#kXynrI=}B?o!Kzi&zkJGjcWke9!!@r1s6_58Tz^M?cbZ*9Du
z8&z`uQpGcmj>b!6FTLE4t0b|$v5&u<Bzcr&*1Fx(`>&o|%<A)Pow}%t*;Kh17k91S
zWOG2a&-d4YsTF%we;pP3`D*T-{`YSu91wf8XdUa>wt(A{zpgn^_kim{$AJr%6*9IM
zc9{2<L^Uon+QoIf%h;u&>gH<q9q;A|$MKg%hf6<s-fs0T_Ics$>5)GTcYIG~x7xot
zB*yltuAD8$r!$6+XU@Fa?D;i#Qs1+;-bKPMLiew|@NAM({A2ybQ&Rj3=NpCxhRs{(
zcx-OWDed2zXPSA;e)exN?<wxNZ{Hp_wam?$^6LNQ7mV8+a`@Lv?mlIFBl>R70=>4%
zjccyy#C5aX@%yT1vs%6TnAf?4+HX<1^Mw9C?6}j=7A_E;#n;Vad^CK~!`pn`{K7N)
zI?7oB`{pbOwCEEHcV^=ky4;@dH{#)@esTMK0!7@?hSOdxG?=DvxXC{<{Gn3&o0AMn
zl-e)ulILE&Sib7kpSg2*Qy(30;_dmxw)ubU>)-pcwgx;EXzpU)|L*Ds13Az08!{Lc
z<wx1iIe6emYYJO|=JUk$=TcOr+*DF%-|c^{!C<Q7bl%N1o1@=6Kfr!@V$vM>5RW5?
z^A_*jw_^SxZoN3hCp&(yvz+QlNx#_jV#%Ceud1DlPjA`56?A9f&waPL?<qB{Ie57G
zxT8bu)efV3vNlhbUrOH=-(vXMWUH22`UKbZPTrGAjN7-`ZNJW~)bjc0{ylD7SDahS
zuAf`MYH4M1aoHc<Q~l>V3ZK54zsH!HY0pv-&xPT4ew;ZF7VuC;*r@ypU$Mko=c_mO
zbq6;d5q!UmAti3z&WIWH`S-2l-B&$n*3J>x8@fn0TC1YaC169Nwb;SRNy>Ht%UDd)
z7Zu3{b9-g8oeYyR3!b`n;-=0?FT;<y+*Mz(M#?thsDwf52Yw5lm99G1<nM3x4o^(D
ze5Xz#FstF|CFY-Z&ITxU)opuxY~isV|Nh<1Q2z9(<C5^E%jxqjoZNh3Qt3^eT<Ivr
zmlAnftvYtcE|%Px9`MjDUb!>%gzPyZKS`x;-1#2g{)wD)P1@}kn(Ft~-ZWnFb;YV9
zD^>-(b9G&p6g78BVD&!JjIBq!=CAy+^6$O_G8?7B19#o~_xOZP-l+%c4Y*E~EScN#
zo_|`#Rl)yy-<Aqb(a?B(cftR2<`WNJshA<oV!83Kkwnm>uWrE=(hKyW56WLYtL-lL
zl4*nZnQGo|tBy379BXQQ$vUa%a;4#!&cxm4=NN7b_`tPSv-YCWOySjsPq8idKX=2S
z2Yh+mlhqSnXik23b4SH`-Hj`MUP+C6`{n#BuE=HVheCG5Y3;n6cDcI#(Q58#Kdb*O
z6kEIb4qx0ocEh9keF3{FjCVIl8Z;&Cd>JPwYsaV<S)knV>Xd7|?ByKmjdFYM1}uKd
z+?wR@Pxs2iw%8);!+{5XMVd}O^d$R^+x(esW-Pz0-o0VytSNCUS@ZqRX0}xoe20oJ
zFf-=gS}^+#*ScKg<NN<Q-3q>&w48h9AO6cbjLlm@S1l4|D6O}#fBf`OgyFx&^@rAd
zm7LDfXdZ4@IREC}`1jL&`>az9`CNExuU&oq`^XoI-(RN-OLFfMdAj9;xu>3KMSS;#
zqh1RllRXYJ$X{62x^|93k|EPk{o*LiIMHQJb~<x^?h}5vJTFd8r!C<3%KfpWVGAX!
zDoZ-F(w3ipuxpyogFAH_b_+z7wE8=R&A#7p@2_b6?ZEqu-`6_sNPNk{tMctq*D<zJ
zyI#F(EsNyHowR<oha=yPxS1D@C0vw<QCqV(+vNRkZN~2>UAnX-zjT!8PI>mS*PVk&
zZu(w<(#`im<=yW+`gu9MBL3$JUb`#OFN>TPuWFW-%L!k<<V|O(*tPtCNuM6F?T|gV
ze~GA;NzeOxo-Hvm4&K+l%G*3^sfEv94cjb-2kog7W~KRcY`pjX?1k*2f9hRj>$qBT
zn^)z}p3S~FtYoSv&lJ6mON)12(ovnTi&eaL)qy#^HL3hs5-d6o`#<e<*HZki_nPz5
zJ_ggv_qV=K<o&}LeA?x6|J!Q^{U7Q3n{~+S{5@%9gE)(*P0Un>7thYx{#QN5>-Tzt
zqkyJC*UnQ5>$P@uoj$g?YPtHgC8nQ*n-;~&<OwG;c2_&sv)|D<`()9JTbtHyNt{0a
z^_?3+XVp6@G8CuH>|Z1I(T4R&bBtYJp;YP2jn7`+QQPk|C%CdyQ}WRRwlBp!YI9w3
zm+Pnmo;vl!xlSth4ObhRz0#prj+dhBjpbLD^6%*>H;Psby;xMN;(uiK?JHtOC$7#E
zx@D_hv0>Jagl&eaJ54^U^xE%PP|N*D=zS>HzJn<{_7rSja@-X4|BmeeKfV_Wy-v6~
zUpX-6Pt~%GZ>$2htcfi2VwYZgOeN%p=9+JNKB!G?^?ESn)RsvcFJCOS(W~@x^q+i}
z@4@!s{cE-;-Fh(V{c%~|-4dH3Y*)L*g{kj+*(KHA!1BcWw9sd1OTXDstj!y8KNhju
zeE-$QSv939KjBKm9>%nwc#{f_mr+|It$s}WmH6}QR_0A#olEys1x#4B$z6HRiuebU
znwht;`}{uZ_#q`lY7d{T`MVw5GE(&kF}=%ICImNUG##AtpH0-QVEZDOs=LJ^hx77&
z+0Fjl>CW}avTRMmPVOhmre{hOW<>A5$in(@t?!3~hD)mpW^J<FxjB0E<+i;2PPsY!
z$~_Mce>RF;*jy<oVwJ>alKqtRpKM>o;bUI==eC(X_4~!`!Sf~FDnX-fT_nHeG=mGX
zI|TOMi`TaN8}-d7oa^)z+cUMNx178AYwcd`GZh=^<y!+!S^DfWO8j@lL6EOGHa$Hk
zKd?=CW~JjJaftxt+gF6#HrnioDH4wibkw~3a`L3g6K8n+{(O+T>T0$&)8IqJr@L~j
zD$g~pp7s6mE>gJni0;X2yxNuq7Kx`EHT^7`e{9K_xcX3wk;zFVWy|&D`2jIu_U{+(
z5^=Y@@TGj&1ZHW0Lcyua<Q%yEi!T16DJG(x>Ek5H7&YmRe0G{@dfuvqtQm4ihh8k0
zVrcf~Wx=+MyS85B`SGq){QQo{(glLPNnCndi?{xED?QLQ?P6~EIjw}h3xkza1vVts
z&N{H~e^&JJ?ZxN**&WK*(c4j}bjbZdmE3ENB-?HqmZ(qp4)^2Key)0TJXTWB^ueQJ
z3)VL^7Toz9!Df_rGTyNwwvlIppT>?RVeez^i#=W%ESbVN@6XfAyKiUjSkXSwq%_#U
zrj0RYUWLudFwXP5*KPCI@13waHM#v~)}IIIcP7@Pt<s+<-hO97zJjq-XT^5T>l+r=
ztomm&>0FTSoHp|ln#+n3JtS<uEDZknu47k_!093bm-W?86gAps+v{I0@tAk^kZ=#n
z!r*CJFTUa|s*s#zDd7HS!S(P(N#Y+e&oy1$Q|eu`Tv2C#=WJ6Gg$eogtN42V6b4Gy
zsXgWYCU1ZL$q}(VXZ;T7O=hj^OPRGoz1s55?6YoX87HKt)S1uu<@bVRk<(<wr3}?q
zdM_qS3(lNj`g`pTCAo|9S9LZg+0M**_|Iq0{jF>Vr~Zv++*$qjM0fmlfg1mLI-$We
z$Bwbh{w&WOZ(`eeiR<s4Dc()zv^ry-ZvQj)_{m~7@$TO`lFrHr*L1U<{{Fd|^ZWh>
z%dX8aJMH>t+O%z}k5>0jU9$05fqsvnZf@b`o|9G;y<xRgS2*u4IOu55{%h&B#x;xP
zm(=doEe{i~xzS)^`GxV|rCV0cM^k^VW+=OvtNX_P>E7FC?uO~+HC+0Y6n0tjQ;UnE
z&SbsA(o$FYHobiHdy94T`SYiE)~(ZBBK`2j9kXn=ORwMESCD6C*l2p~>y|5VT<W%-
zJy$Fb?BJXt($#ga@?PogzZ+x4=jOUU=5|@dcKpX|hjmtop}X1M^wg%Yt$%(ZDY?p;
zQ}Aiff%91>YT_o%5^pc4lwPTm#lOp{^WV!~$NmXzQT_cSSV`vjE90MWy9{4XnQQs!
z>%%V@c3)CT{(j(1_~*j8V%k6UudZG-y)IwvSJiD36Xcu{x7uVEi=3;wPLB7^1BZkk
zEf9V)`_GA`jmLHJ8eBKX1uLu&etuiXzs2e*!}r5sJ6>{}+kR@>R693AGwUZ^oA*6r
z5jnQ$>#OIr<+_t*hp2x4l)#+rz9Z~VSO3%#^Z#A)I2FgO(JnjtY*v`g9J>u0_x*`3
zeNuMql=Z4@-L{t)b{*iDW)YBHB)Fp8#`aV)%kc*@`={>NyC-Jin?Pgb={xVp+Lg^Y
zyz!=LHDk=8U9X<#cRno$<dceb+Y<MAvyRKH@}PSYd0uxZO`gO4=tw}G>gof}6Z+iv
zm3$Xo*wP}TXz+54rcuuf=J<n}KdO#9<Y!E0Jh$}Z&pH#2uLhG=YF@wF9wgvaD){VS
z`GS{ge{-$m`ccaw^SC6r_H#~5pw=tSNfK6z3yyB@To`jDY14+J6oKhsjxirP6s0BZ
zZh60*yZ(hJ)5G`ACOEWltpD8cZCT^{)7R!-|Kp{oe6=<3=geI{tL~fJzP*@XMUzRB
z$a8aL`M{@bwp~loHlEs9?CPg<M}#B%|G_@?ms4wa&wR>u>Z@lA-H>)HVQTCW?#xnS
z>BXrVZmOB&uCV>xW&3hZ$mauwmXCTa-LG7F(3R`qAs$)p>l2-<TsGK0Xnu58ecQhB
z{bGDZ(gK#k1%iKG1U)=1`(e?t-`B%@=iWJVZQ%>M<AL!?HfARiw=|xq6O;e;yuu?;
zxzg@j`oCs7j`sgcdoS=tOMhkD_c<XfN_PFK1K%&-kNa$WK4)P;?q;UrKfV0Tk1afO
z@9f3ff4ocoHvin=dFjnQd-<QrK6{_vW8~!0JGt+*ie=~Nc`L8!&-|sEC---P>NUk1
z*X(aRUR%Zade`C;lN$G0xcV)LVt2H$obEo&i!-TpRl(_6&qaTp$>ty7uKN4sp7W!J
zskH&$ZmiJy`qGJQW&sN`*W}Qym8D1Zbgu_->K-_{HC9*d+78!;I!#j<6c=ZIJ7<)-
zVmece9{1FJa}7&v)-)uXSh@0(&RYd7S%v39%hxo8TDUqcRaJR;ZDo|(#IFIp8kbgU
zZGP0<t3F9|zR!0Jf5rLUY~k*C>qDe%_e8w!6}0WS`D=2&`xL2r3uBI7j^}<*)+TXa
zsi4O^#>g!U))x*f5o^;kcepOs*jyELZIii!!3pteUC$5wd-|S#zTIS&;)?=rqZKBm
z?Z{8blBtiIG-<vPdsMH}v=vvA>@1ol-)m~gd9C=E$zCQ~W6Hgh>}->NE%7dX8GF{4
zl{}UeP~V{Q-G!4;!86q0rtM_|muTJaP_Y>8>YMFFlkd8n<`20UR8rqmTmOHd#;x4>
zYsGd;RmrS)%Io}A#@5$yzRBuUR+qQ_VSDsWSXePz;r<PY$(Qr{8*eAuI`iJuR#}oz
z7X5X@o~Emk*}(z%=VdP0&6i_b8^YnQm+vFiQ+U2WajxL(<hL&bPPBRK*}(63`|s`t
z-ha(MZGL@6yKLeurfp?^?w##hU47)ew4|!<CgDBbS$#L=e~j+>5?EFn=4azyx?D5v
ze~OU&o>PnWTiRJHaQ^rI+S^&p%p0zB`Yn7Uz5Glr(^iE|nMJ2Nc38Z1UCZwvFgxY9
zpNX8Sp^<G^zWy(#rImUY96r2In&ZlyHD9IU_@!{Mj5&I}o1fLcGT^(?S3W7QCvtgN
zrc9~ChBeb>%)B?n?QGcU-?fLY9%RU_-?zWq^s(W|8IF7V{~84y{&ef))32L;@?;9<
z-@MCtL8I=#YU`Wtw9l@O```2GL(3J3qr4xj+`lPzCu;rapQ~u6m86%k@KegBo3~va
zlq#&XEM%;`b1^+pw4;5^_p{sPJoP@m_f>4tmhQ*AVQUY#r{!ko@3_bOPtq)1#PMVU
zdzNrTz?Q#RGM5FU>gM=$*wt@rtmprzo%lRPY@TwAXKv6V0gppoO=tW+DSh`2X}<XQ
zL#)1O<mRtjJLb&T@H&51*3*X~{iV%8wmiL)dqXp}ooQv9wBeC>&5htCAxw{Yvim-3
zR*Q4*=KdYLT%*ly$^I{A_ZbwbK1jJ8D3a<WG2>9*^0V*#XKJ;1d%eB?yg{ASq22#f
z<%8)-dv423wO2}iHh05|iVLfr{aRq@yhbhP!eyOhiZY_N7$cib2sK=A`j=X*A-K@g
zw&~PH?WgO$PPE8Y`dj|+!FQn@X`3fLI%MN%tKYeBqoZ7B(PXFHQ_ehIxU}U~_^LOr
zHgI%lM{E?i%OL)BFL%O*IC-h-d?B+R^odOhJGtIC=8U+=JhQ&H7qbdooL$y$ZmQ?-
zt5rPk>G6eG%S=wm%zUpovoDQnLf0u7&96yzjSQ#5RxL5UbLQ^V!|jfb)$3czj{2(W
zK6{;+nZdvJ=&fJd`ktDch)mO%@~y73q^hYYy=k({!m^UIy@{^`?ReT}U5?@~Nn7^+
zqh-LZgOAsQRdfpr-aAqhd-~6cSc^q^)BZFyEZ;c)Xx;?-r1Hs`-O>B%TPGKLYChhx
zY|70}jc^9z{mh2@`Y-M9s<WB7xVG=N;h7(P*DkK;?XY>hA=RkbweIdJFNUbfU6Y-S
z!Y#s+E<8=>cX+)laBau?&tEUySaR+3;kn`~JnI5hS@s@d&`S$&tTeqRSg_rVdu!$M
zBjGkeVmJOzkbSx;^80;>g{BOxf(Cm9Y(Kp0|MqUCOxCPzYmD|CRo-B|tTNpF;}tKC
zne}l7>UX9aO}=|~MQly@Qy$)#{=qA5OFnF9`(~+qHh}Y{$9cW?@8&H%Z!UiGq~xtO
z9mk@E#HLAo_n)Qc1U@o9oPIR2OuaJ8uKCv5Ca!f4_e}iW*%-54$@1;vgB$-kPkr`Z
z{!!5U=>MhZEKv*f!)r=BCtYHSTeRjT@9l3N_c%0cDtqOU>Laj&NkP+R?-JQ{lOw8H
zH4n)&JuIm)2&k~Gmpzf(w4!YCp|q`sx9NO3mRDZvm$%vbQ0)rMTSqrU$?3{-UV9W7
ztMz(+)a?HAjMfk4E@jV|ZgKOR&a?YT|Ia+$ckbrCV(DqUS?q}ukN;OrQk3}{^=*q+
zjG^X)eIDEGU)QqzSSQ<IA(DJlG^U}zQrbA|kY@EnpQ!)U_kZuMSazxZgzycITnn4O
z$9ryVnN%}jqpar5`7`!yek{rL<fkdm0sjqwys34JwnADDHLq(v;92`tUFYa~=__C3
zyAx0T6j*Zl=g-7rttYbA7OziS=*+cYqU_}LZKBh6o^Z`ke|p(!YDxLd4d;F4KRxBA
zZ=sUSwd?qdh`qs`b7QnO`gUG64$9Ivd|c+!?=>gC`TW*RD)tqS=x>_wTh!-4|BHCv
z;Nn}G6Rypkee#PX)6Y}iq79UvU1Iqpcj`#Q#s}5!Otk*}{;-aj+a-6~lUF9IdWDy8
zzmfhU{p9kmlP2vGDho8`9Q?@MBl|1qht@Ag=BeJ|Hk0=AXH^%wt*MlsbtCE0k1wmZ
zeg4hbGpFg_3s+Sh`QDJnS=)ErE}CTMvTqGbSb>k~fu%oB^0u9xP<cr0SHaqU58MCy
zJ~Z@OC0i!ZylwJ_>T?Txt(cemnQ*J;j%-xjt#96sleC+h-`$fje*B+J`EJA4KX+4a
zIDY*akq}|v#~`!Yy^r%`?4vIM->*HNP<Z*-TcybMwW`M#G6&7ATqbd+^Yis5Z!`mf
zR<HPQgTXnM&*x>9(-glpE3qkVE40_Eh;V8o{M~=$$Tb;Hlf?;(#TPP|#f2(eu4yuG
zbMiHMozXw5*!i4_`WnAiQY{B<R_4cKuD<wZKFb?X>(dz_N(n)~l^ToBx2E&HlYDpI
z%W$2wBS+wi6dT7^6`6;wKeJb>eX9NO=9LSV9S#-mJ@AP?j@fgI#pM3<lsOi)p}9i0
z+ceCC>y;KC5)wIZwVP)~8ONo$4xe_lIsTiZI4kYvLGC-Yng`mXvJSId$g2E&-L~$=
zC6;+BwJj^So@Z8msrjn6%ArVFyOdwX!|&b9#IwpvbR!!={yIHNf4Ss<rp?Y)b9tul
zzw&Asi61?_{ajMPpt0`EYBe_o;kF-nf;lyTt?~(Pq64MvHm}sZ;w<RttL$2LvEuT@
zgG)P3m|Z;iEoOPeyxmouyW7|7o3)zDC%#j)$2fVKUUf>w8n0!7x#!g^uhmX_Daq=*
zYZup($#F+@p0^h3_yo<bzrdV4A^G|;%Zpx9*{?0|JpJ-!^RqSbZ3{C*k3TQSNO;vT
zBkbL=MnR+81{D*<W16=+WDRB{tQD#4$PO_{@0MI)?OLDkKjK7(WklM8MOS_O*M2SF
zW-eAd(kS5?|FiZ-?bcP&zxMiWk(gTl>&v}0E%}KYB3qMBteU^QKFsY=P4i5}`+XVQ
z-aG1M-l}QhN_!vl?r_PMIX^n&SM-^uhW+NZV@xeD?%kex;<91mm9>Y$8ftTwmfLf-
zCR|dDi^=mbYdXJVrl@qmp4^3Zre|4ye|BX;Zq1kcs41_fPuLyNT)*bLq-x@udJDl*
z!uG%JGVyPDJ<mXOt?=_ldn;YuEctP^p8e6yr|g?&#l4*Et`WO>_Qc0df1`XEpNecV
z>uaiBVD_PQ%IzKcM@5_UH!`nbsNBRQ{&khF@?Va}>a(<6r)Ops9x!74E5v_HP_gib
z>A{uV8~8-^BG-xqXRfh+Z1*|fLwU!$9V|SXn3qhNuu|*W^QGIuKE295cT_&Qr9a8}
z_#3Mq@qP1jCqI&MoyW>8q9nX8hxhfosnh0U?iaXWQYo+bNusLYp;SR(*i`0p&fE!?
z+wR+bGtJ+`VfV*<+H#@oEhf8HL@m1GqyM5hOJh@dgx{3kc9!iYI)mrTT|6x>++rCA
zfBnzD)l3|RGS2Ovr*MhYr*7X1#V=aZn>TxN|GDsRZt$NAcFlQjgGy^peKZPH&ru85
zxiK#C@m5Ffdt8srJp4n}xEj`#UZ^^sY%*E*#HpzzexX|yYVBOy|2X)=LCsf&0otd0
z*wUCbUA?$*SBYa%4ri`dwBPsLR~4<jI?_*uz9?wbp8aj(jYZEmU(6|9+N#v{_4thk
z+O~(9+~Yhfwc|Z>J%4FCdrmO*UtK!?_n|2*Nog;xEU3(7;O}6~aqdbj=je6y`dL_f
z>g4rHtJy7stegytW3vCpXEas?`|UV<e)d9!i!1-!y67FY-^<;%;%LGHm)V6ouSQR5
ztMqV*X1dj7=IwB+_rm&M?xrd4CLKL0eS%X+s#tQJrHS!r296c)bv(TlCuu6>o{3$U
zAKfj~cO}iVqGD-U$F5(D6ZG8dCOK|z<~THs`&xS5%F~ldd!C)HI_@2{UuM?d)HhR(
zhlwzpe3)5qD{I+<<J}q)UB8(g&HH&@VITj2?S4hlulP?JZg^06x>4w@)^hpOYm%}T
z1=>7oL;|nbw{lE9m2kIsN;5~6y6vjxrD<Iv+*>;5{f%5Yd5h6jsqB#F|6;C4vTZGi
zS?j-2PGq}{`|nHrOFoqLWY{oID1DXt@w<)CL*@rYPnoaZ;*p)b{Ns6-9j%<3MAT-B
zXes>?G8R#hK63tsa-y&2&GR4M#GZXxFkSl^pR0yVJGbo7-@hKaHrQr7k5w>#`e{iJ
zKmT*lN1=0~_8o97b=I-anj*~az<h9RtE-pK%T+5wUAq2npZ%&Q=-s#EE`#^K%vK((
zYphP*5hv(fHY3oV<?6e6dD|=|$bWuX)-o~bWkQZz>k*mL-OntVRL?KnKfg=;)mzT0
zi+o*sW~8~v`^?*=^F^=m!sBa?S>EO!j+*iM^ON^Ad)bnLwu^sNlz!p-GraHm`%9c9
z>RKIMvwijVEYEHGXD7JYXNuz&OSROi+Fy4G9!lZ(qVlL?*M$?Oy`oEX)R=E1Y*1a+
z!+-8DUz^x%ZA$}t^E8RY7Z!gj6JiglDO#d6{{Z`>ofWHG8U>754BcB)jx016HCWZP
z=E7&8dzrB+TSD2}Sv2@JR;7OGGg!%7E1vUarMmugZ&pL&1N+t-t=-^S@?^oxCf=<F
zzE|CjSA3Te8hXc<+3+_DpWf4jqR)Mf?~1>q*dBSP{->AfYpJ}c#p_s`SFc;%b$d%B
z(~>{D{gG{RUM!o!V)m-Y_r}W-gUfRzC#AIUtEv=f9Fx$vtswK1Ptxvx-1J9Fa_{D@
zD9PXnnK<FM#id=_gC9!2XPe;m%3`gTYZaHkCH>>3u|K{&w>h%$y}@f`gL)6GH3lZ?
z-94Z6xH~GBE~z~ICS~58hVwpa>%yKa-hcY;qn7IP!u_{)n!jD*y4z#f24S~n>W0ZX
zFHYe-Q~NBm<TwjQT3OaQE8&P&QXA$h_WbrDwB(_EZcg=Q>CIh-??2@#U#GAjckb~k
zzqcPQ{Bz??nCkwW;WqoutuQ*P8?i<(vT*+?>F^7J$CDo(%)ig{(MWSbMe0*=>E;`%
zd&+r!opcsqwcK5*+r_DOs*GFWYssITf{SCFuh;}~eT(fnAwE?)K<U-vNf{PB-qJVk
z-C47?N&K$n#`!6=B5X-trYlJ-Ejjb$`M-ldL!>peCi-yQ%nV|hwS4D;S)$H<S02A{
z&NPj=H~Upf{vBK2)5n#nyA0>bl!?tcoa`3aF)NW{d3CjA))7&imdlmfulH|0x+T<X
z=AC0Rq))yvku6owSyr<4%Kq;YdbR$as63w>WV*#5>t2cb3ig@Y>bvE`j8wg{GL^eC
z-d|6fw0E!aMY+R%oI3t1e(t^=@ToMjvE-lhMy{uS%xykAd@j6rzG(3yw&#(~Ul$&8
z-lk))U+n7g>>Zwy=6?}C{Xyie2>;Hov|Ukacb&bzeX8n;O>GUU1Rh<@%C_<reRgqo
z$GbmfMO)hWKWe<^eE-$rOr-RIN0ZjxV0xYZF;??scna(JnKjaTCM3M#P<<zN|NLwI
zsi#6t>$M5(pXhRrXQSf#^)L5$pUd;o%49ZO$FZbU@KaXd4Nt-UQ|*;xpJ>G1xe&;g
zw^8QS?^jkw?oMS1oDg!fwC71NzeoNHO-_$BZmW;{(cG=dB4_mQdVHgftL%lH-oAFL
zO4wxPXua3^-PxWkpC)vve*KKD<qqpV-ro_^u|;9>=f8zJ4n4ej$vnYbNX;Z@qkm`W
z#=yl=Y?~rEw{XOU2maCCq*%43#w#z&UvW$Gi*~nz@4RQuY;{;5aaC$z-=<HeWB!%c
zYR|QieE&*UjX}9s*KASQx{adi*aR-EWY4x0{I#+(G~uTC=9$)Qr}c9*^>+rYV=B2{
za$!!=<k=N_@*}DoO1DXws51l{V}5)4jI_cQ(bt(5V(%$eq|f18JWJ<k@(IDU2GdSI
zla_n(+PLzhkDbQX)E%uBTikD4U-|p9!{3Pq|8AD_oSQ9hJ~|-W<6q)|mT=Y|oDctW
zS^nG*7uEHJz4ll|`S-(|{FlG6>pd+~ZhoR>_@UY(S2$^lv+b_(UKV?uZ%%vvdd^;(
z@YivVZ^_;`ot)LTRDOv4nVb1#{WAThW;#a8c8fimuEufxIQt{MiVgmE=7qW`*_L--
z*%sip-_!i!zV#Q)m)ZZ@`XeIlvbWjXIcn36)YTY%R_yN7>TJ-ywm0YC_P%AN`kkfA
zf2(b}&Rh2GQLkvz#T|-vwSv*z=?%e2E7UGLj=UhgX3uudYsWt-{1jbXUKO@=%BBl)
zOt0Q~^j&SAs5mEN!}*J|7IO=1P&zr;-_>@)$_^b)CoyHA$3BOAHup_mxOPry@u{<y
z|1xy<MdYke?NT@UROhf$N=<ft(SgP3wskBq53Wl+V>fJE=E|hgc2MpmpPH3JbN!>O
zW&&!{TG>T^E!*>_vMl%I#fc`DA5EUBlwz5a5nXdVuco)bb>&u(&(b>;i*rRLEL~JG
zU#CxW`kqyHC#2hU1}@#tcq#h4hHz#Mx6{!eo>NZGkBi^Dn3mUF`(U!koF|8(|7Hf~
z&zq!m{&h#g>h+rn?IRMnCyFo9V^27^KzIJkhW!hserK3$#yBzjXu$5@ohOYG#alyt
zGak*kyXIt1@1+RAo05MPms~T;-_7c`JtSFvWAnRbceb8SP|&#$@%lxLfeWv6Yh1n7
zZArD#1D_iuTlVCK1|3UMnW4PmbWibte&+JcQ+L=zi#DBm-)ElTd-VI-HP@c?>Pn^T
z4@z4lQ_b?4rQ9X_?6RV0;{!^4i=!q@-+d~XqsF3kW!?70%U3fT{{M`*S?Ev7`>FB1
zQLajIA7YhmcPF^KTUfu!f8$)wJ<(#p5he3hmK@W$6vMW*&|tc~l4;W?&(*CdS0*~E
z%q`Bl5ErXdBL6wOZIkOx$+D_x^9rx2ToCynQ1Qtu!2YQaQ@8BNS2k)q$}_JA8hte1
z7}>Opp^|;Y6uFHLJ9MnBChkm^dYXLMpt$Z#xYI%p#;;BtrZ#6D8NFpb^5(v6&~^W*
ztdht0%)hv>^M@V`HsgA7=55cvpE?cgbHXBz8i&`&v#pG=WX>s1>Fx4b!MID&RKM*0
z(;KHI6h*fCE-lq#T|F_<UcfzH<X1uS=^1alwHVhZW^6wCXG-Pk?S4OAM^rw|jGES*
zvg3r#F3WAFH4N4sKaw+P+PuYQe;nb8;C^6nZ>6VG(59bCJZanY@2iCuZ9g;j{-TMc
z+y^3C!%Tip`*<wr=DagM**xP6o*c{hylBhDJmJnwGc}ub-~Lznz(mpZvzdU5-EN;5
z3lx7IsJz|l`q6(*?Teq+Pp)bG^<0=)eiuLUBAzu|tC>C@vno2JcQu<uD@>>7j_d^n
zHPd}I5069#S6pPgRAA%#@_M!KTcg?O?k_!ck`8oLFyE4C+fcG(U2@Yij{9@iep+p4
ztq5H@{h4{@hN~emF87ze=4WFnp2^D`%b7G`j)2y*HYx5ii`}M9cHEsJ-Q!mNV!i8P
zm*Oe*b6I9Bu?@MSB2sZkLD%h&_MzVNo%4^`-H_8t4n3!MR#}>D&J*j4&wjJms)Q=M
zv7L3#O<#^x)Uww9d`oKUn>^oO^8^MZhr9cu_O8p@^O}j-&En1$f8mA;tFwY9eP@c|
z60~D84Bc1La;80Y&w+G1V--L1t4YP8(QAe3<!kttR_|25y5-FbuI~plT!Xo)CO1Fw
z@Ll4`di&(XZFfA68^p*NX-{CjsW{uOX;Z_+8<#6o-cGz0d~%<c=Qoax?|YAWu&<bN
zB5>i74UdzYYQJv&z5k%Z9m~0Kj?#Ba69P}qlnGsWtK-D;?{m(~3YtB4BG)>;JIW{i
zF7=J(bj`@zac`S<@8gdbB6{V8uFZN=Yq!Vn+T5iA9j_O(ZGU&|>C;^kIN2+DrXStU
z7?FeJu!E#jgBJ$8&(Cp*&3V+_ptoJ&pT&!#IhrS9(~4X#Ju6(ydC2r#TXUb$nzCy@
zlK9TlW@{xgdD+OlH;cWI=zlM^+$Qp{Pj_Bv-LCVK57$UNKE!MLh4b%pHkKy`u2ehs
z&zyGb<rJ^b*mDhOObc=<i$ABSJl=A);L?T%U5qD15?}u9-7n8Kf9cZPecp3f|1HvQ
z%6KY$w{O)BO$XUor?vPVHtkckU34zwc8Wpk3%1_vO!g7`7F=Jp>?xBL%ceLUjydO}
zeNV~mvEaUR+irurPl$qd%ElX&JJxNyB6C%`q9Z1@i+^6}W`!r0%1-f^oM5%RWU}v?
z{MU+}bsS%-&J?XUwRPRvwe#oNTi(7T==tdAt-}}RORZb$8T0>5rS1B{Qj_ns%D#2m
zGNv<fotfHG#;H-c+x$Ryxpb=i{B;ZeWX(#Bm3@5uylTFRME<d-4L|#DZFm)H;k&%D
z^-hp*`_z4LpN*cMYg*Ca!SPIXzqaY^4KuH9<g7P6bx2e5ow6+R?-}zRwfV<%ExEc^
zLBZtsyEkiu#giBB-0=2V7klpyi8r^!7r)Y5ykMg{qvi6yr5wwC->KN67`dbH!3nMO
zo#*u)-nyeVPbM^t<$=JL?pY!c^4HcnR+XNavN!+Q6VZzL|F3+M#4~?AH$KDsy!9Q|
z<&x{$`M5&bWvB0aJ16!@nPJu=xrj?bp9QV@I$3}J&Sre3w(*%sfKIOA`e~}Mi+azg
z7+Jo%y)Wq0ETPp!rF*xlN>;Ev+AYEGWp?<*w$CEgAJZ55Y->KdxP1rb^nx|-4$i7p
zzR;ce>C2NdlN}0faelDU<td9iQYQ4`3g?SO;jZ6}!j}0?yrE}%Tp;gN=exP~|F(v)
zY};Q@xlw$v&H5KMx@)?fZY{7A{&PPwG>!4kiIeTui@nWH1ez~ljG6!J`YiJ=yXS88
zZdH1wsdJEJ&F5{&8{@ty+Vv=YKb@?ke|n!>{659Q2QO`|;!nBcF=b=azdFIJPn-$O
zHm3fk+p5pM54K%Zc&*jemH#4_o~dDafJs@tx3&Dv=S*Qu{kkdpln>pPknR#u`&3>Z
zn#3J3W!=>^r;QAAIU4Uh{H1<==7+A7)7wqtY>yq7*TZYSYNga{7u7lQIk%-3eaLze
zb>6SS!}#VBZ__JlSSu$y5L~}g)j7^M*I@UBn4c$1KF(-tFbJwlJOBKVt((`8UuV}Y
zf7LJG*7`u#o<Y#`jzukR+e|@~o3l3O+WuK<vh~E|ru=!1uh;ER&UxF^&Ci<^9vXjS
za<<;%C-Grx3wY~-WE+}xHN0iu4tv#nH^+v<Sarj$OTklb-SCz1f3?3h-uk5P^v%tU
zws%&^Y%l#iIs5W~$ANkgKTa@~K9u-(L3?RPmd|bXWeO#_ld6Ar?3=tm_(-bZ<DzH3
z@94!}<60TFlS|NI*|z6TLquv$v^O7VW%i#^YJOsMyoPF&?1!AWR^r=vOTS+>*5K0(
z-Eww*Qp7Ed6THIB?LXJ`2}XJ?d$Kv=Nvn$I-1vEQX3E+^%-i-!{mq&#HC5hV`Cqa5
zW)%vX7ZkO2<(*XzPu%5|J#Trir>Mt`>r8QJ?9Uti9x<1H&ivW0!(`%#<e8z(+ZeSf
zFKSesIr${xirdy02gA0*GydGT@qb<7p--1KC}eN&;mQB-JL*#Y9domoJ&mpbM-ml|
z??{-?K4q8GpRCK_l?xN(e<yvpTc&WP)pBlZ1CxImyZQs|n;dPExq2tAQA*n!v9@SO
z?4@@mNsb-&GyZJ&bFaj!H9-7U-&;w~$DD>TTCeh!rp`OC<KC%@mY#7=oabI%lhHBh
zE<7ZyeoRsBMODm^)E2*J-n>_B#e28OIfp1odT#7fesx~vI^#*@U4L_OYQv2$Y`(Z&
z?w!CLt67;_xF&4S{?W?Oeb8h=XT;>@w$tT1{`^aQ#;hxMIG%Iewd==MJ>ZlPT=3@p
z#`FNuN!9-oHZ*qL<vH%baA@1!MR}Y%ThfYywbWV<^vo$268|N*&q?@H8bfhdcA$~+
z*34CEZR?BIUellO?ZN%5J-5DnesnT5?u6Cbkd-r{jXygJJ$PDvZ_)zOU)dajOGLNr
zKGC&?!Mf_F7$euu+7ivO857t=k_ArKXz$ymt9P)@^o|Z+yqoWj*Kdw@Ep0gKcBr^|
z0Vlhc@Kk0=UDechpDg{f?c%3c1N`=7Rb6!m`LXryw}hnds^+MU&!y#0JZ^GpxtTq8
zJR14e`$nP8`CVV0&D(NHB59)BlVFY<x10$jJpb1%<Yu}Now_3Fo5O*EyMmG39ba8D
z&S<2a;9VB$xK5Et$nUP9O21a#qR%0_cQ_xvdEl<ys=}ioi`DzncJzJ^pAvjyr>357
zi|dZ5*Mf2jrwW_(DIGuc{`4xB-2JBxhgDfkd>M3+oqu_NlZ%K|;qkxeT6Yu6>gIj%
zdbUgXjeks6i|6tU3rl<Ze0Kiym1tqMcR$j$xi;UHlX2%MlV^=`R-*fZ#XVN&JvjBI
z)vf=_!Wfpf5xM@+9L(HzHeWL2<XgC+AaIYclK6%CM)NtZ|Ax<>sP?*9dl%#LvI3XW
z{oT*1ZfeCpzP*l<#p2<vWjycyqzbAY;9c3Xf7j<D*6rUV9a=kVmsQ=m;q9c<&FZAJ
z>uR+**QG~?YPA}#d^sO{H0l01fxWNhR-HIIgLlcgj&AR*P2V@}*Qj1Pq1oNH_qZ#c
z?#lza=f}xNH|TPk|C7`CcvZBlYuSpKYwq7%QtGyJXNAb!ys!Psm#(;R;j&A}yea3h
zCOZf^=GnIRG4xfg@(Rw}BA)V1_u19d$zA{CYein&xtrT{FzDGCkv}K0CoKFfWfQEN
z^GdYnrtwun<1C3oDyMrGzucFb`(opnn>M=T(b=NO*LoESWdo&7x#gB+8|>l`uae4t
z8BzaJKAq9f@03>hb`hz+0#99&cuqQ9dUNuuc;by+x2El7tvhs)BkJPw%ZpYx{A}N#
zHNEt7=4o!lU&^N+vqo-Iop2;~!sEj#2hP6g72Wl3lcz~(^82`$gVpA#rss}4y!=#5
zeZkS4_qOI1y)+1nEYmuYE4!uUJ6nT_s&%Pol!4-Q^OODQ9Y0!GHTE(6>dM{J+bE*a
z(EnBP&B<Oj=Uvub)8(^@0=2f~xxZMfwbSCtgu9`R3RXs@x)t|du<mo3C><NQOih!C
zsa`0<P5Y>qWTZmlnjM-GXWn|&^}3>%eNF40!!51xp%yddTR-!b6pdc6YF^%|s|SC#
zoS*b`OQCwdh0u<<f6v_w>lN6+c*f*v&8^zICxjEGh<%>>j-`V8|Eoz$ntwR^zg#`j
z(C93isAT3cAEBtzR!^5?9Wq?QHfP%XO)v6QwthId_HyjM>3a|D(~4N6CmwUV`^4We
zKOGnUHwM#}Rar*uR=o1)^!aU90<%4C3kNM=ou+M*mYrpJd6{Guw@Gol;dPN0#vd$Z
zoZS{b?_vXUU2SKDptkU}$p@5eYftL$s#Y!An&KpzF3o&s>*P-X63oF-?JXDXKHb`;
zVzvJK;qq21yQXDPaWy>##&g@5U!FQ&a3%8U_w!xii#;#@S>GV|{jby0zq89*=H8FE
zyr|D>|D-d{4{vEYayPTCXZXbNuC_Mgipvs~xz|PKE5E)H<5~B^%VVB#dcoAAm&NwT
z)k)iCEjcY(dB?k8>L2OUM~<%Yk7u{rvn71cJ2Jhzu+me1h6%gT|7D+!Z#XBllc`nf
zOW^)1r<G@`eBnJj@6?;0A^bKQY>pm`>of2DadMK&gy;D^C-Xgc-d6llQg|5F8?IP5
z<qwmr;-Wpvq;oy4=E!uL+-qX~VC)m7(sgsnpF43`%8|cMbDjB~p>cAmw1v*c?#Zia
zRi9+_XqV^Cl$iUkqx#jBTPgptEhjFpIluMN>kA3X`M1pAvUs9q_Mqg}yzloIyR0k4
z!sfV?|IS-K>4kZb;p2iuaaQu1*QH2E#j)NOPq5lwR=z7&)1=#MUwTgF`@ZYu7v9^J
zpDW!sPbFzdjYKIAf6+>Zj`tOIE&R=5Qa*L<);C(JPsf%tT#8pa_o!&Socp<rTi!ML
z``=6WrnA!T)s>>M`qi1zaq&xUUb+3XW1`0I)7z$gc5XQGagxx5Q*qBkpE?$=ExyJ4
z&h7h-|0Yv+CjPEATKu!g;Mjyc8gf48Sq0mf`!s7yqO;^aZ?BoV@Hs#CnZh|f0u~Fk
z{>K$t2n1vr2JJlaTkY1o2`6*JWR^|)AnkI{Xmgl}o5-5OX%|XgUn;Td)Mvf<DJMC<
zVNZtIw{0;+%6Y-EzaFerdCt6WZPTTr>T|!nS*7w#_$}i*P6>0yEjEXLb_Z_oxVx?I
zo#oxN?b9~qzgJ)L_{&un2HlsA+go?!3arRj#BD0I=+5TcOD`HXANsd3x%bWEWtZlr
z?KrX0`|hOOi4!iJIaAT}>-Ez#%MgvkTTvydpR@nB8)S!{u2eFw)|-5pH_)P4&s!w>
z>GBY!O>O@Uy}r=kzl!(cW202Y7LN^5w`Uq&^Hw&FH`{hZ<jagq!$&={Kdydde)-4w
zuZqovGjHt>U*uR_q|~YxX4)kzd|uYWXq}bgg+G<I{wb~C^UkjS@r*rq-!<+R-xI8K
zBM&c~;vnYv>7`88a^4{8FI#p#3)#T-BLDqKWtpxO%!i+<a>ZZb|68ols{e7#M9nio
z%?HaIoFgu#`=qgRwR<lL^HV);-7od}Mq+g5mBTTiJCgPtRV`vqky^j_W|7EW&F>rD
zvokz-uv~t!sKoC|zQZZk&L-Y|>2deNU+cTJ;`i+1?V>gtT@aWV{$=aB=<CN1eV2Uj
zQ`ogRe@o42^EQJ&>Adax(z@&&kA_DjtX;oi^^t2++qgSVzhhJ6&v>`FLxLkRwf@bt
z2xjli`b(rf`mKB0HRGFy3TM)EhnPLq{Xx$B%MR;oGOMwBC3ybz%L_R=3SCK@p$7sF
zR%b02-#DT2%g&wZ_coq69OUemk{7!+^2!dK_H(QDrN~BpOvsJ6R(<o5PJqo*jpVEg
zA5P7is&I%Q=bpmq-CG+qHD*r#Qxo(0RQ}(ebJm)cEj$0lz46dC;rnL}OL3a!+?NQq
zs(sIswRuJPw!^O`sm|#>TH<?TPg(y}3l@uM+!7c2xRh(m4(;7=qv)3H%&Sc<C7DLg
zCIu-U>i*GgF<Y`#c!|Was%*WA`I@V(FYR14&FkCkyUo%Ib-z7bC!qG{_@&TC-WNBq
zJDlJC<l#BPBYWQ-R5#=LW~UP#l%`+u_0?`JJ9jCIm9sZJT=`W%X8WH0o3C5%UlMs^
z%g=Zxc#~(iX2Z;jX-?D6wutcsccj_AU9{_}&;Ol)Kk8P996B`Rxn+gwOzxgfT3svp
zeQk<eUp-!DHoHknlr``9yp08FTl7OGOET?_b~-Jr=c|!t{W0nf|Kt5}S~ZWhJ^k;S
ze^M#uX7v7<kHuHKIbyPVbECnL4ZE{#N;I9<J+KSa_gHx~Ymb>>!l}~CsE=z`F7YdE
z`@c}MM!{lhe1X!c&*4Yertr6}4b4@#w?0my;_uRVU0FhV#Xs*$wfcM5Cae1U`GbM+
znX~u%{Bru=Jm;L3?D?gKVx)iYM99_m?dJQ~k!m(kZgY`|c2}0i)%`^aWU4&Rlz-u<
zzJKi7QigxVGv7ORy}ReU_Eqc7ol`$;o%kV*d;S_>aqd~g3C8L%YFpji<*haCcz!N=
z@!YZ?L*>z-4@O)n1>r%@x8LXUJT=w)=ppN_jjK|ROnY+fokfOEs8hvFF3<1Q|J^bd
zbH_#=uzm5Z{!I0b;QQTcZwbxJQZEvT))Bti{;vJ)p$RSz1>MYoL|6XFN?zKRXZfB#
z&pXcfrL+HwwYT@32r>J*S|~7GY2S&3XAJGqeBXtag)-@tzdLBVx}=aj@c7p2nx}ib
zBFYlYi%kD=%w5>u@r<F)rvLkvjj56h^HSg5d(JaiqC7EWfs63{JcdOdPy1%OY&Acg
z+WF#|%DH(W_9lnt<V<E`b7Y$_vx9A(w?w~j&W<#3&xU#IS7c@sO;-Q>yS^slp2-3&
zzFGac)^1wC3W3@;?iyxnlQxK%!Bi%3_tf0#q`u$vnu0eLPx+dbB%c1~ip#=h++~;2
zSoS^U;ZHwimU=LA%eCo+tuJqDFgq$9)-jGgH@`q4Fy+uA?;Y2kam8gOH>q?8wmNR#
z>A+~aTcO;i{#4^bvuCHCso$CU-}&k_sfslU?d)DBH1-zsh3PK|EWK-Wm&fm*-h~o#
z&;5Mr+lyxHz02>}^N62ot;PFP>%^NHua1duYlQ#&CDPilCdcPX&5Jj;H{B>SE;-C<
z_&R!~$;wZjFCJP8tW}$5?PI-e@r_o|5al_umk8Q#$~k+w<WrpbRko&_oyiSTPd$pP
z{%m{fm{EK5cCTqX5hsqMFK#NddSh5?xU=iLL%#f$6J}SmSL}}bH}Pp>*0q)OA&W0=
zS?PQK^*ej<TGP1FhNbJWcdy#zQuS10$Mk0=9)X7!%{Q2F*mV18Ev^|!(@i(5emSAS
zeKq%1h9EYE0LD3mN5vUuKd<duCpw+2XWtE<S#LOh@AIGJaLG`1-=C)7B-u*l*!j1D
z*s8vB{?xuJWNys(Xz}}o^_#OZ80W0Wi+Ni+C9x<+al;vB@flvP_D|KfJs!|7C->!I
z{awo^GsUoacedEAKEwE<b$y@Z+UcC>6@U0It9J>zZ3~b-JJ-0O?px~*^$(AE&e@vq
zJ=F4%HA~vIGOcotd-}uJyE8e$%@)s+e_~zgY%;^j>*obtC6^__^F$X$39pH%DWAMz
zspeq`yZd1RR+I0BzW89uf2~Y+a_uFl8+%l5ZYglgJ~hcT?Bt}C|8#W!%r7-j(LPl=
zWB!YEaf`Bzml~9K^%=!Po(-J#_d-VYto}nw=Plu2pLwHWeUjCS>>X!cA6?9`Lq%<N
z_kw?mG}X?(+O2l`@y(OY2NkcMQh)YGIx*?yk^hAc9?t7{wffF)rC{lo?g2q>|H&IF
zO~1L|Q^_;sZMUl{xROIo-s<7L;w@vnyJnGhe%!pn2IaG=_}&MeUmBm8JZnyiq4IRT
zO~JR$C#?J@yK3Gs#g^#5%<{g!cL~3hNO;le{UrRGozv-OcYF7{DzogAKP=6rSCoF?
zN7S|33wPYub+CVmQoj70qmyzNY#U8JZF|NS#4ge3*uav^aLe>k@o~8vg^OV)URLb;
zn#6x0G%WMF<xHvV>T{-P%${eJ!Xx`*&7rFqXG*zp{L@70FHTlIQ~N~aW9O=btUXg3
z?yJvzD^@D@Lt@S6!0U!{9%Uw-yizx*saR8b@ie`MUf;8JKi*xn>cY)1IqswjrCcF<
zr?zk0bLU>8{fVi!W_^5BtibQP;i~C}f>Qnq&3p52|G(IjB<&^OI^ojh%}IrurzeFi
zn&&1tuk-e5R$sl8S&4S)$ChqZ_0WEr6CPV=v&8R^TtR-E*^^Hi##R#FZiY*H{+zt!
z#apcxJ1VM7G7g9?$+OAhu=ns6_;U5%=~)ROp-Jtoht^MYe{94%-RY|9tAFeEs<Cb^
zI=kHKL)lR^)@26&n7wwL6`cHhiS4Vn#o2e(UuWw-er&<d{rN8^=}eTEvTFSbjm0mn
zua9GG$&%K6H)*l$;$22O>-n4Ysuz83woh(!StI*v9$U9g>DKF)miA>Ia1Qs5-!w03
zvj1Dr-h0K1XU|`_JSK`eWzPLd3&n}&N`;w!c|4JGS>!0-#27Ylf=W%xOLaruADXct
zCwFftX0e}B$-Y?0acaVC)sCO7^Y#m^*!TLiS*57t)xt?L{eS({6WequsBQ7xwJy5t
z6L-!3&$XTLH!tJ!12?iItY$?E{kvXtsqDA2c3%1G?fZ<gW=~4<7N~#K9~pV~X<GY@
zm5LW1n=EP3TF?4MzhrOc>QcY79e3hb_x`zDwt-31{NXL%bxD4Ya($-XIxzc*7yp)Y
zpE;H5obCIU+<IL4%=&O3@43jJPZm$ys~ub8IGAm%XZ+DE)(gG(WGOqh`I(zj1+Iu`
zXWv)XNOjnvF~xmm=VM3P0}<~e_BE|u^~&bl9L2|*wI*h<Sp3j5@~vw78`N!)*u}lo
zw5valxy@t8dsFw;2Gu3WR}9u9CGK(Je|Bb5-c1b$8T+PQHO&vsoev}yZn(L3P3Y8V
zTG0VHs|1f<mS|^NzSTP9#}A(D1JN3jH*CnUpY?Z(uTkLk6AxA__O=(AV%8-pTF@=D
zT|t%aw81Co$y|-eDz_K?Jay7JwrA!6J{6DMbrH)y*=0`CohoAR$LxgGjO+fkt21Ap
z>d!iR=s<_mqFCXZryEzTxo0mpVfn2!&!_2E<Zqd={+HjXcm03Mp1=4Q=f$PDWbfK}
z?Gp;Mo-Mlii%U;^rRPtXUxH=N?L3@URrd6-m>GUi?6fd@zOjGl<(_V-`X%rF{0$UI
zmcC!y|KNnna{JRKn<Q=>m^|Ht>!4wI?9ZyU=>8@3zqiXzsM0JJdNXH-0^fBB)s07*
zI$v-rU7LBcXo{71SG{^>ov*Ra#BJu%H)hUJDogztGG|9t_1(PhiLDwp8^YJv*IZiT
zAhqU=j%R|~>-w#W@70%<InOXURy0ZFZb{GKh;@?^PVN1@saRjWc~;G<>PzogwQDOg
zdFOUdJhdR8$Aw}2rqHufQXX-3W`DRS)Ggam<|mnBvefE>LRMjY`S*M5S4tHR^V%{L
z)c1Ut->z@}W%0{j-w%CXeOm2nLZL@fbe(@|bAqt4<X6>0ug-F@uH&25xY=vV``J$x
zcD<|ox<KGgtjU+FbE-d{GbughcZXf(vsh-?#HE)uviJ+~Z~ozbvB2R~OrO43$S*Ih
z$*S)2>+h}8a{oQK;@2A2n+MB{(x>cOvS9fIf!j$Fg#4cCX3UhHF8MQm$&sI_|Jmd8
zp6uX#{qXMFe>bLI*E#&?@`@+z%hXO9uGgRVis3+;{fwVJv(KKtnXw^RBFruA?aKW;
zshgc2Z}`}=*i*_tkWn#;jn&-auHBavFK=w!nQm}p@6N4_>AkbJUEh81@AbGWcgFdX
zm!99Ttj1j9QfkyWsiOr=|AUX2sqX%rYrSKZpF@w4sWG>x#opbapGuCKe6xtU{Oduh
zn(3tpAH%Mi1ol^OO2#Uc_I{{S?pndEvs^pOS9#sq_0vsq4!c}4|4{mb|8nrn*)vvN
zn)>zYN3rJJEqC_&icgR`-yo}N&(OSYzL)oWEzVo)FUlCDo9x;GRxxF{3(j}C+$6;C
zk|%WkeGfH%L-jpRr!2}7l`AYVTXv>-L&5`Q_A7SAbEKZ;H5g8pFA@@Aw{@-Ko$#a8
z>DBisp<9k=X#OkSQ+ea|((j@nAzFb8A5Gk%7IXK<t(2lKV$0s{O_rRhka<LBt=nHE
zzXpcSLg|YAnoXt&CEwm@?43HfLe}*m>%A|tLKs%r&9e{KYw?Un|Il|f6_$Wo+N#$Q
zL*-+n`irK!&3f2qY;dB)#%d$q=iPU7=H&(R#L3mq(F|xd>HT}idFsCx;TI>qXLaS@
zH~+Yje#qL>Z|}6~<iD_5Z*A9qR6s|#sr0fz@qekzWA33ICpQbOiWa^fdxYOc@$0;x
z4}2G+dn7r3xcrz|FExcn>($GTH=Zn9<hJQc-L5sCoIn1nENIK#67rCT$M2wWyV+_9
zyVg55m{fyU{2mwUa>WQul4|?TrntU9;Fs$BYvpk)^L5nM#IqYK*w`_#%vIG9RquWN
zS*6l6dO>h^U`*@;lZh3(e$^^{)>$3Gnr8SWEw%Gc5$D-8uTL&Mc~ScN!>~^euU)K4
z{xRiZOp4R@?Lq%!e#9G3pPKh|ag$P8+xm4ObFQ{tXPjcLC$wkjD~D>i!pZ*>Sygq_
z9cuFy-L;9eaSBh0+M^T6zbUD!Ip$^Wi(>*h6;H&s+VIYryQktx#=I`e?8zBF|A{Vp
z@ielph}CII+_Bc@H~Abc*iMR`ey2sJEG1X#Tjcb+-Zz^5=}C(|4V#%7-(G*>G?V_#
z+e-^wM2Zu_wi(@<sI$q)m@jd`i^pEtVLy68UQJES+qS^((T4WCocU+B7gx)>wm$f=
zoA=QNVHfRyg(mj9)-?3Q-RR%CEJv_?_AA!haN&ASeUnS<=l3O=9u(cLaHb||OZc)`
zEW5OR#Vmi5R{Zd0o8k<WfcT836D&?M9M4+lwdK2K(60{hzZ0%Y8cbcQsv9fbP<?#j
zK`S+t-;?ghMk?v|eDwLcTFNp;!Q(-{;WV`dS6xNlOAjj~FJ%g?X*jo6vby@+!V?p@
z3V#%SYMK4Ledhk{-sbg3K6$?GsWn-$_Fu`|tm-wfpV#X2ZHt`N%C+FjX^ryb(=v<%
zBqaQOj=U*(`uvAg^LGEY<sNfRpUeLtVr#N^^(?9D9SoT(jjZ-gjCxyidX{iim5r)v
zr*wC`<L;;w*`50QX3u6=2fM^NNDIlR%y>RsWVNt-ZRfRvUp>4eCulcK=WDr<QZQLa
zG4ay7nq@4<|AkHcCTF;1le=BPjo;0i4sJNNq^S48sW?rpt(j|c3U?h7GxFT(+`2(<
zf<~^Sp<Mf1mXd~fHhQ=Fb5#4PAGda<`JLqQ>W%lidp38IYrfgOHGP}ryFL54@8RMX
zx)TzaX3TQ6zqRjsVAq;31&6~sJ%gSyJ?osl;9=Xfr5bGuCOx;Fd*f4;PVSfUdd@Ga
z7gmYzJZ~wQWBlonL1vM5#&aLfwVOl}b_7gVwklG$=hEDkRi-;G7k>V)?pgih-gJw<
zPOH_nc&V0I+{jUXR(+#mclT}6{38Zy#mYSP|JPxDe$FIm)0yYLZ##QFD0h`eUbQ&w
z>Onz|uv>{gk^{H=|GPAxbmA|)z%y~WHVQH34$?DwcyE<HRdjrIuk6&^KNlacriiZm
zAid3TeV^Lp*NYFnXye<u)cVP`=Zi%+zpxf}i(g}qUG@9%zv6)O=9sz0+0)l7ubJY_
z7`ffx)6MT19G~wfDnuP#RA#>D$glJA)wcI%2A2vQI6437vYEX{Ukh>=w{COM6KlMz
zpOU%HrEt0A-3tpFZ?s%qwIjOsqU5<(w;FV({a*g-det^DzciC2PHacH<m0Bl40?Pr
zHFWO{hMRp)Qe>G6X35`)o4xsL@WguaZ4$?943abCemcheS|9JEp01R9x4dje#q=30
zD{{*67c7W<&~Q{&wx&-{=~}RUamO$7o4>!k3H}iodOE4|L8rc7ykBF{w(Pmtocf0t
zZ_Vgon)+(#<%6b%e48!o_J2F5o0@&ra`Th(n-tAe#ktR?v<ba7Wj()FXyM%xX%D8|
zQ#oI}aW1z~g<9xG-|BVm19X2mzd07M$@y{kbnA6YwvBvNtS_e@aq{e**RCBi?fIYi
zzl;tn?hd`Az~WrM%;Wa5H||+LxYj=Xzx*2#xqpeT-?y`G1#e!3->qo>J0JE<vEeA(
z$T_dgSp9Nzw~X^~wX=CsZB6>WtrEC5srmoz&~>j>(zpHJTe7W-jfG#%_>riQwe+pK
z>r$((&QK8KO>tege$LYUoRhz@{?6jb)n<JcE;sFv(=+Af$#2q<yVAWg&a(f!skc+A
zd1AJ%(`oUA4?El1CYQ0SUl7&YVam9~CB~=th4}GK&JZ8N`3rUkJrQ{)&*=V5OS8V}
zfJ^4r-~ViU%4gRk_L(g`nRwe(xzvQ~?i1swf+tkX-CxX}_SW`o%CGx;1zwje_j)U@
zm4C6rdeV2BT|(u`y?laMhZZ%L=YOnz`R1CW?QA)V#r6MlnH)AQThzX0!Uf?+=OzDN
zPW`&(?c9fZI5)q$@SQ7vVo|+}?jlj0lctL_tk-W?^JlNv-r1$qoRL2cF`I>}{gO7B
z@iAw+Wt-`i3r}`^2q+TrY<pE?o}sz;^!!;V=KdQxcQnW6@H%v}uGq9CIcTDTY6R1|
zgH60#n%*z2iM;)|=eer-Z}u6U<<ln3JUTsDt-s}5>9Odb&qWJ8AO3D!xx(r5jUF$h
z;12=&9d&<HII=P1SO+!iv2@~pZQC!IWiQ=VHl5{B^{3Ac9J1e%rq-P13CRf&XWsHF
zJp3Pb#KGy?eV=^3;O$TlBBl04qi4P8(OaUi-oEBZGr}x(Jk850J+(EV!N)hPVTN5f
zPo-zR!n(;%XDHU@?9;l@Xl(XKPTg>p^!vmkGag(#*`Ob}v_eaZKhj{o(AwWIT(K*?
z3@>oMSC|rFlI~Ha!~AdkiTZg3p)2jun!^obc5PQ+R-Y8NY4L^i$+3cm=NixJWKGUo
zZP6)X=2vZ=nIZn+_rufnJpA_!Hy+T@EP9m8wd=t{xn1e$QuRIOyq<n*``7rb=NtEl
zEu5nHqW^VF{5<<sPgu!0kGJT4aiqsIrqwJi3fT;;nzDNrEAKgcFmz4)*HwWHYZIC_
z>F`F&3ZI$RaY@%UZoP@0&@7?*i4W^KxWE4YQ*brH&VEG$*Moe$BfEYdU2EQb#de3D
z;2X>M&bb?|{hU;J@N8|stB=l-HB1YGtgdN)RavI&^Z&!2hYpjH9&Mf>wLPRXUR=!k
z&ci#amnc}4Y}dOR#awsjZAQmN)2HetZ+7=ww2f@=3ZEb!_TIZLvOB}y`c{D8q1)?n
z&&y?hIK`Nt@pO4sT(?AKz1haVsY?%ccWs<Dp@|{%TXyv1mG2}E|EPUY$NOOFU(=`W
zj;L--l_>1;S{$4?QzR=ZD#)5cTXkUzKmS|yFZIRRCP@|Be~9vER7o7m)pnh@_xQyl
zqLV!@)v+<NTKk7Sxc1H7^;>r3bJe|z%ZzqEdOs^Xwa;5Fx%d6S!}5Q2PTjCs#{6(q
z;Qz7%C)Q-m`Xn|v@#VTddh4$mJXoK1WzixDL-}np-yK@XduQwBM|mHvPWi#EW>{Sl
z$9h`y^nu11ejiTNP2{zS`WfhONx^ros4?4>!*T!m9vqqwYH~E_`3kl7pKj!vSu&rl
zo-be`ZhrIsid%iM{FNm>^OA12n%Rf!Q}MgUvR+`T&?iRE!?!g*u0Hp7&*ZZ@;vahK
z!oG1dZY@hX6F&FvHt+wgS!cNa)a<+Ke8ThoYwdFxSqpuR28-Wbqbn9`$`@e0yF+u6
zzw4s2Y9A+DuY0}4E@9Vn+a&9&SqrE1Jmxzx`R%@2dv3FxDsr{BwCvj#@f)(mk5xmj
zUGruVo@0JM%q3jOtx`1aN!7-(6CX_vebK(G{mN&%tMsGUW})rt?-|Fb@Vkj?XWj_(
zdwyz>sAX7i_T$~_682e7tv<?P5^}@bbYk-NcPvwGMFcVkB){Fd`{l$x`m)jSee#_T
zxSUqbO>;SGdh*WyjkZ@Gy`Jj8=qi`UxPq@_x})|+sR&m0sV*ySiFE}C<vciQbusAY
z3(fNWexH?B;*Hg+v}-;!I2iqS_I6&a!kH;k-M6a9WKGiedDk;)pYDg?pg@aY?!Rmg
z%_HY!3Ruivqbu<6YOVG)UBRCh?M-)xew2O8BF?*HrQyVUz49g1UZ#sBGYrc(cA0(Y
zowVTmw*Li2dQHjJ-W=+ReJdlP|L!q=;pu-^o@0T^3dy85MF(!jA3daA?z)HRCNIN+
zCCuFdH|>o7&Oi92-22P^`G<1Yn4(<l9%PIEKRoqK;*|cRQfFSx*U3Abj-=k$<)oDI
z)n`SL&JxMl>oOW%&j`Ac@3cZB`1rBJB=0BBj)(+q(B#Yf7pLB@x8<NLgX;&Lhdt^u
za%0Mu2Og7B$axm|W0M@?TIn^DW*LipGG=i0D*T*Szd|u~!k;}W792aWHSo>hcc0xD
zPVCHlepkveyhr@&qulp<S8{xFw3ZT{lFR0E^~2}+OV`()X>JTJkv)1QJ4lXitH+U#
zOq=+4d|a1y{+`NX&~$L`)T3oNGYVf^y413I?Ok7&JzVc<{#fjHt*<$J#8%b*ym_zx
zxr*+4MHTAOg?lUokL^Er`SxVfx|4e6)UA$(O$cqexOUqS>u}Y!>j`Yu0rxh3pOV@a
zzWv}iy%Py6{y~=lt=C=Tl^1D|xHX|E`PCjz>%>!`OwM*ut;=5B$XIAO<^Rc<54)L8
zi@wP^RGs%MQ8gj7Bhv8Xvd%|Fo&Vj_1QU&a$Y?M#_36jjMz8GnwDy9r?7nxWxJ6wA
z>v&opJijNga;M*_v*$G*2a0O*EHz1IjQrRs@JCBNVykm?Zrazs@1>S!3VS8KwAiN4
z_h6>!U#=;2>Z#9enZM^uFz2{%>Xv1|?jo(I6W3=?JTQ6vhOl?vteRZ{S}sr7aB}H9
zYn#7k41~TeO<7Tt+j-^s!MN@EiT5trJMOcOeJY)~uAsm9Up}vw+J!xG!JD>R)9BA|
zKf^s`!{-l2gHG&QbLZ5CODw{LHQL&x+b$%2&nw-uab;HY6Q2!>XI$1O|6zFR(~1T0
z>~-e#$3jCJd4q$!_PS?T2WtL%5o`PXy}87co{2gp!rPzk+j#58_U3Hg#jF=I&08<b
zbn@PuZ+Iso_T%14+o^x%e8{NdsnxDvD$JMu&!o8Q?B;jDyX%&>EwF7gyrI0cw_NnI
zywrvc>Gb(W^t`7}Idm|kwo%<PigoE)d*>(eD`(2I_-?S}oNqLD>6w{-nv)re)A~5?
z*v^<guXA4J{8OG2Q+f3cOX+-exF4k_uw5&|)o!Xn!T(!d)FyV$eN)-{i~Bpj(wv$D
z?bWebA49ZXEU54Na_?I7{lu%w86t|?ggMJDZ&_CCvH$BN-u-XRIF`JOm7H6&(a9)m
zY2TJPRwi|8jXD?Xkqhcrkjd)R(8c)ni)iAH+Kd-BIBx7`@VgYVt^AVXr>G>)D5fv<
zX9J)5*KkHpGR%$ny|M0Y(b4?w{a06bFO{5a@#C3WLwS#v%Uxfo?6idEx66Dtdv$I&
z{lKX}>vWMt-Gf(mr?Z>I++;d^_?FVM{RieLcP#zroHp;E%HErmRsPB<%<&f%?mQ%<
z{O!v@UZ<e0^F`cq>uf$bGx4r2mU@zW@X+qg^sCX?)^i`}uH3W5FUzZm>A#p<&Tgx0
zdv7D9%Ztu`ynE6hqgUchMfYx%^UJR&x29V*l~fBll|-1FnCo&$c?FNF$Tq*kZuxY5
ziTC#xba+guo~FRWmMx@OS$T)=N>^#+g{MDT=ANACozn2~%XI}e1LMP<;{Fi=KTMZj
zaIB7W&pcu&GUHa#ozs_(Y*OW4<zaBPutuojv$l4i<li-VrH$Wxcg|nDZ1Wen-)Fx5
z5!`?1ZOif;-?zCEO>a$K2UZA~^hxBLUh~{>?=nB{HEDO=$@pY>OuH=}k>;9{y_#v&
zBe^AOZr-q*rOS6BjMcqq_s8O3(I3f%-Yt6^RD#Yg6tTPPRI68cCpKZyd|RtUPyg@c
zUv+#>&4b=51wP$lAuEFBKkIwQwB;MeioDh(Z!Y9rlihO6U$*@Gf=zk86SQ`D28Z8q
z{LIqq)?fSfs8E%6qor_;iRuK^{}(!TFFN9$e<H0VXRBWs>ypVEx(#-4q-9S3Y+IW8
z^h?a8jEaJdUQ-I1^OtiZ)f7iG%yaut=Gzb&@U8X8;zD(!O~Es`*8P7Mkbhbync2AN
zkRMyq#}gM`cS!~4sfsmymJ{mx^P~AwS?vB>B5Ph}Ip;rHziq-j%{yD33tiYV>E%-P
zt6j4cCj^-qXK^1+$YEmWs4V`(;P_Kx*_T-d|9D+_^s|y@xp0b`M#T-KB__3(bRKZE
z-I$rq8}1&xiuaSq)WYjNf{#*uNT=<N=jYq=o^kV|!pRpU-pdKJ^97XU1^Z>b&x-%~
zww+h={LhAO8_Nu>GnIC7nCdF7tbHxsz5HhK;x8H>%ogokdqVEvmSQ{4qSzmzH*<r$
zyBYVz9Xl-a^u*ix^3HX855AcE{&U59zP-P4U(}y+;oaxT;1PA|(xi$PGFwyEFnw+1
zEuDF0_wH#mGF%({X1HdoU-e@9A@MUwGV8T}_U>S6x^Mq$=gJ4FwaltN9hyE$DfE?|
z=``N5P+e$US*O}AnG@5jL(|KT{CO=rKW63I`W?qrPM2p{vP{jW6AOx37s_4tN=sXM
z`#bH`6IlKg?_0bkO1+g&z4pO^)p>`frP^nvhdg80pWHG1icyTer(N6U=kuRUWRPAO
zwq)0714ZlKd$*d+nbde<QN@kN6W+g$l0D02ezTLo$L#Bt_mfIgZ=OxIIQcx%GVmj3
z$bv?}=5O;qXil}cr|*$&WMr9eIVEM@Wu{e^>lKV6p1t7>&Q)HzYWt>Vm*f7Y#uVs?
znMus(IP&)D?}p6qC0T2|taawg>`R()Y5tNO_sVxyU6pzICD7}Dj-(0uhV$NLzTfWL
z*&i{%tMtUb(jVt4ZRUS7QT?XNx{BNH__5VNhxx39n+|L(KOp!2PRLRJYkTWot<s)0
z<3Yl~yr88_m2M`kVit2g2Oe<S{y_21cI#{E`<@i{>rN<J99-pgiTBac<y)_OpOEL6
zJZ04sN0rxmG=5g~@!NOsHi$Z_ax@&;Y0fJ2`DMP0OS4#U$HW}lAHqh_LabNyqkHzv
z7me#<Op=~++2FUW<Nms$M~dF5i&W1Rb+}D>?8(z6&h@wMk*(K0C!gD&Pw(HOtlwGv
zGh)I6m(DkrSEhNMwRy<fp7Q(Rt0OaVZfeclYp2-$({YMT%7o-!wVq78oUYT<O+T~A
z{hKVa!lma=oTIjN+$v6|m$U9NM}?bq8p!Ot*3()h(&C!i=%}JoA~?76O2--B8q2TV
zGMVcpDhbY+sajHbZssh`Aaf>7QNgm<qN`mW6E=UA(SMoxqKHR#bt!YrvsaT1&Rwgw
z=vyFvChtSQkpq_1zW(vMo;wJueSi3SvG4DqYc{*sjCzl*Ui()ze|Glyn`w%hc4U3{
zz_Z5UH`9V`^N)X?`<nIi843S@=JN&*Uu%9V5P7=nfX0rS>RSYu+z)cON!}G#GP&l=
zyM61Qe)COLC-PP;O`UI-(xctPwVL6pt?TC}{x19ez3bexM$_+G7kkjogsqB7c2n1!
zTXmw7hwGx~x)#@h_eEUg$@BL(aaa8}newkm>%!h^h0ji97BVcKyMDF@XOiy@A?>Uq
zvn&lK^!=Ome9z>0S06|3ExpeCB0DbmtHi$KiN|N&PqT3U@QP#4ubbhDsjnZOm@~WT
ze8aNmX1^YHIoaBrlDio1+CNFQZQac1%O<>?VOpZs_MWccyKC$_b;_PYnQuzF9={97
ze8;aBk~VKy_o1gZ9?vgq=Q-GRdv@W>z|-p{tLwCU*J0O~F-v8d^XghX*UgJuzBdS&
zpWXK>WnJD^*7F+AUnjICf0%KKwZvTiTIRRENe35vp7GwhN!6bvs3E;Z``tkslNy(}
zHCq!h*XqrWE1agAymkG-n5r8s8^g=vzwekO;K}mAYHvtanLS_Y)=7@f7Mo<BZWRbz
zSEG^NX5!E}m$7+)*5R(BO~-iET9O<mmacww>EAL7ZRhepHk0T>9mn=rzq#DyEF2kQ
zx9c}I&v{d;t5f_u`(7Eb*?6YEi<|v7k(1j&KHEjCK*T32lY7@MlZ3fvp7g!^pmEXW
zSZ2e@WQDIAWcM33t66YVm_*+Z^nLk)HLA*PdRDc?=c~epMZbpsdz7pFh0%d6yHfXe
zQ`X7f20m5{0XmF2ORgE+)zRVG-ltc;faAjYJw=8;nFUqT^4U9V>=kEDsD1x!ZrSwX
z;xi}5bu)Ele!QUJ;>o45|Lgy~j{_?nGeig6=9BfE%y@P4#=Cm|_DkDpCr7P}^FQqN
zdZlNBe%+K6dptks{+Y$NA*JQ$+#R9uhx{LI<mi~g;cT<qdr>=UM#<3vzAt9;r9HVj
z7F@Yp6F$Ltue(Kul0Lsv{l0jk-mv*AbZ7QG<>T;7VqD5_`Ic*IX%B~@f!V4>-=Az#
z{4CI%Q*)!x_}@x{#=D({ncqru?6w}6=3BAm#gn`}2Cg$aAADMG8Tor_A~&OlfY7CN
zhdowyJyOV*OWEOmHuOvDM6oNq*LAL~E>~n++`36+>)+H5dH1~@$yVGKW?j^pa;81F
zW^F`&jLgh~^G-55W=@#+LgSHK_Vji2-T{@&Z;He8|Lol=9r+-=nsrx3ozc{^3tr;k
zn$m0>>hpdvmZrZhH-1)f=7(aHcU;v})%|B8Y|^L8?e3bnYvV5QyASVGT7EmjwS4!I
zu3wwh#f$aN$kL3vEtqocxYlgO8LzowK3wDQSQlsLxbS2B%|m^Un|0g$#oNQ1^>=wc
z7v9j59Pc_KaL=Iv_FueRJ8We%_kK%Iux+)tf6bz%dG*X)`D+b!2wwXzLDlS1+<mdw
z$jqLI$h{9Q-^e|>;o-UBgh#zrLZ9dD_|39)iP&d0salQASw|lCw>^H57|XhWZ7Rod
zOSk(w1FWlCt*>mf{vdbDx8V3A?p`0RuFr|q-FHi;t2Z8CITbi}wRnu6QtU!s|Fu^g
z!)E^N@Qvc;zxsUhEUxz%vyT)%o4qfEZ^MF?eVR+=wZ&}MamDStdxLGy!VObyeG%W$
z(4UvQsxZC(tNew^sJ}IQp;vdfX1%+Rp07D~_j3=u4fdKmFAOWi`|gV9%*s||SY=SI
zZ~Z!V#e9!1oUhznRv1;W{%X&C6d?D0r6tQkWw*2Iu6_-X_G~SQzg^~U!@ubBzO$=-
zzxV#|N_!UD`jp#qQ*`!;&CI+M{#b8c!m3avLB-dpTNLB7|1wAYoc&96<@L#SSpxqS
z=Qm8y2&+7-6*R~9rLv&tlf%+qY<^mZxV#8Vh-^6Hu6>>1XX?DSb7Q|YhU8ju=-+!&
zs6Aa*p?7)mIx|ZScjLxz7GKjmX0bc#&jlWNqhrT%RwdOXdJ><Y;h%^+^&K;ktbLPp
zi>^tn5>N;;{`~LY+f*mUrq#1Nj{0`5v*T`Gt5IvR%x>e=3rtFRET$7y$#EUuFCk!f
zYL4SG!vfobPFo$S+p7yDcNum~-h8<K&J)Qk(<j-8dZjO3aQR^TL#J%JXfK1S<~u(x
z*Xx?<v{^#)K=hxEzMsx)`#m3t+iJ@>iFTRvN&KF4_T77RJ;#Z4{s%kW6dj0s!E)-<
zBa_RewV#UQwyc!czHZ+_=JGukyUq6s3Cm57y*ur)l+-nk->#d)a(^rBzEbq-wbe(?
zV-60=@1x?@?KETEc}Xj+Fn!jt-U&C{l++6uv!;0aPfB+@t#9(TY(}vQ&-1qK_g7u#
z{%?17>`M~Ua@eu^hs35G>ukfdbrmXve%*~#;wX}mC|)XTW|kcsarV0~e{YM@Ii9})
z_j<B^bDy4XBpVpN>}0aqnZR8~W?9H9M%V1EmXY}Ga(w6CDMy9kHicWBFDsc9;ZVMq
z`-RvCvp3Op6WO*u>2|u-H6tnBWQ9%FR+p_CuW9)#xZf<xWGDae^%MsE#^AXrW#w<%
zKS%Nl7vxy2)wQ2`T7TC5DU<R9()jI_HwqhF4g1ZtQuL^c?3S?iP20SWOQ?j+R-SgY
zD`ncc^@&TJZH~s&RP^=Cen0cx*FDdE=>%mJ#`&igr>sBGpkKzszde>a;`8-%rsUg|
z-p~3=r4nkkzW=#5VpGT2qbjrXH>k4ixp8e)vRa+?28SaucSOIwowoXUZkxjIC1Dq4
z-F&sN(mM2S)89K6zWwI)sOu`We9NPE{L-%_8f9t^Z{AF~qAa_&NPkJuULAcIu7q9e
z&Hppv%pP^ro2T#Gv041u-UAZpt3CSpZrkT-30(Zk&6l=8`u!E@g61H$-PhA|-V4hF
zUP}6SyUcCNk0nw06Rl$>$Xr@!TIA^ZzrkS9d#7JU|NgeWxYy&ly!2M-u5{+Yh6W+o
zpS(4)oOO?Q3asuK@6DPonAw#sP{{8hzjohSEB)Vn@2yOAUO4aCFT2HGSH;imQMN}^
z-?z5Vu4;>q^$g+lN8=?e+P_S8T0iaC4Y{ki5?q3dtG2y(v}E$q6(uXTieF;xeOuk8
zSe@3G$>zVX`*C$(%Yx(IZcVW}@ufobh}acP3B{@#6K-}-Ov>o_mwaGq`S+;mF3ShW
ztcJpss<|7^T)H{Y>)M{xC4Z!okDu!gwiQ1jy>c(B$g6@Ui)Wu^U9<k&EQUbInyRlC
zYD<-OPv|b(xO!t$Xa447IU)U>QU+`%_BY68Fteu%KeL~)Qb49J^ASJ$lf@h7iu%0E
zQi;86s+eo{zVfNkg>U&q=X)enN>@$GQ}BqK?Y1&!L(*-t$&>b;R}r7wA0KUaqC$K1
zp6x+F)xNtNW*>d^tzY!x!<mPVPYJ0KvTypD`toMsBt`oK@!$w&p$-|rliMDpsEamo
z+8$s3$>Qtf*?U$l6g}8&>Yk@QXUE05b?FLfb?H}go{Dc+Gq=d-LtDL#U)nB)&TX06
z%_}#qNy(X9q3Bkcp8EUi&qNEw^}0{~Jr!zrC#u1+<oSu->f*=G+BCP9iQNC1)OBv^
zlLco=j=azj-SBn~=TU9BV{<pIUz^}^`c$D||K^J0T;iJ9k-<(^j7u4tzD!OPbQG{#
zwnD_;-QsZS5}{P@*e~-L&$Z5!4XG@wFQ4`%A<kgUk~6&x?VI=}bUi*%t0#BK?ev)w
zL8tHkuuT{0d91a$YnS!9D$`qYwXZE{e!aR#e9N(%RbL82nKo4|V(^$%{fBXPy?jnj
zk@~{c)yrRP+o=9aH&A5Vs#|Q^T~|5m;eO#@Q=+(>Z?ofv34f9{94+imU$&{#;r`hb
zb+cAld*wBsnxEnqb=}>#sZKjTr|+iq*UgTSe4iYgCfQgO=_$Rmd80q2`rW-uZ(F%b
z&)$?b@@-qUTHh>gdxx6CNtU0?43o_!3Tegm6!rKS-9C9mPyGS!tuIkGu72+NWxaFZ
zN~ioh^N^@1cNb0I@r@L<xHtKCP@Kj~+53mTXBf`ivB#<S)16n!Gry|ja^A>QUS+S-
zXCJcdcx>Uh=o`tk+xI=J_;>CAgL3Pyg46r53;zb*TYq<1x?bgL2A|N@bGl!@Tz1;K
z@ZL<#4=%G-hh$5X@Q2uhcWlgv7g*cFso|HfWPeB_!{uZ1j`vC4KA-qtP2*NR7R`Vw
z%KO{CZAo0FANEJMO{8f>@zv?}B{i3hip4)&XnAbOU9sY(Z~CvYjI>rOSBCL_km%z0
zUA1+Yv@o~Y=bjB({oMOygnztz=#*FfPJjE$O&LehpYglS(V2KF^4KSFJu&tRzs+Mc
zHaCS%WOAK<saw&)>|PL;$GqtVc^r2FA7uq^(4Y7+Z5^woPIfx4&6111CNke&yxCU0
zXp_)(E%()ntIxUCU7vaFp74}w?<4LTEKT~k!`XS}RNWbE`yVd!zcTw5gWy$r!Ctm)
z#~UpAotC%t<gU=1`hVivqQ+y%X}J!QZZ9bhtMpyq=>1sG=IWIhF6Z~(E0S0J*dH-F
zs(aa18ztA7kIPs*9`Kw}d90RyyZwv6Zq+#1cPtuSiP2f7S^V`^omu+n@#eo9KeS}C
zFWt{3J9lsT{N-FuQ>CXxY~jwUtC=Bw+vjfbA^E*haYgs`Ke%lg>wW9_`sI6hzU=c7
zI>m8iyDIBvo^^dwA`^;@mN>{K3*Px1*XB5{==5yoos<8j>s>BitnQiVs#wIUvEiid
z)Gl7V&9jwnY>fHwE!^x&x{7K@$Lj|@UM#aDE;{SSCJ4s-(kOO#Z1OpZU#WU#@y|jJ
zwtT4#H{MS15xVu#@^J6fjyJs`_rHBHTAI-IZ7OS*;<aCq&lR-w%nW;1f1Dk4a;}l!
z{Z$45Ggddr>z6${Ea~>-ghb{VG57Ck|7KTzSK(}&#Ln(wrCd@_!Cf``qTA24r<~3B
z&lu;uToZO-+HE;WiJ7ZJHVXQm>gNBE#i+bywUr{DWct3lH`cJEzKEQ>K_Pj~#rttK
zObtOX7JSyvm#y;Fy2}3l+P;J5W^Ir^&^s?_$+1^{d^1?Z4lH}JCo!h_|INpuY%6Cn
z^G(|r6LDvoE!UA&&$s$Z7OUy`aT&3%HLdSD`(o1BoTYrTADN}kc;x?5b)gZjR_XIU
zmr7Yf@_yV~{zy!YA@084qjT(LR?j$-x)_cv77nv+SsiY3YhhT2&010ORhOO2E${46
zP&K%)Hb8N?{&ufB7Gm3?j+*VsVd<zlYP)z*=$yX`u5?`D`dlpW_7966i^c`b4}DGX
zC-odIeap43%;`DvVGsY0INsH{OM9yy%+9sqDdupUm-p{_si5i<-dPznt?&BU?>H@Z
z&m*+={*2|bjFvR^*vq<Yb>ZVw<9w6G&bCB5WX_W_X2mY${=pTK{{D)!KdktnuYjNT
zNtNVGYwI;>_tc$U<a%UGd{80kGu@DZAz*UVj}>1&H2xA6RZ})xdvo?B&Nd02^c#~(
z<Tj+O3eGy8vF@=!M{9}SmmBp<S}kvIHS#h}Q9ablRi1GF-{Vh9oMJb&RG$2mGl#iP
zql?M;__o~YXMMT1x53fR`%M3&ZmFr~2F;(wlDTZlHSLRE9C<!mJIeYvvFcP<QtjP0
zfeFEU+{G87e;DSv@><Mr>EqyMet&fHqQl-@V$YOqBHI2nF_$OIQ}bNZtLML_dt0pM
ztW|ov952Hs=q}-3ySk`wrkr%K`yzH%$>>>gSD7yIjGOV?M)B6xu$ixpdAz(c#iUG4
z?@dR{$+^FFM>&KscQ2m5>ZjV{m>Vv&><!NLGeusjFvl-xKK}Af`utzo;hR;@O$ux8
z-Y;mI&oN7L567X7wJx7`m)iE9b{5U`f1c5#dDZY`1$WAfr<rXV&g<J)>djVltDIDQ
zXYZW3s>fxj&WOwld!e)=KX>uh`XEld`P#SbRk(L8Rq`re7huf1*PyH3eLc21yZzal
z^A?}wkNQa5y}NaR{$dqP!&&ls+XJSa-0&i-RO?01%I8P3CcIt3%CliZ^{ccfQ=`OF
zs?&a#{Qom=O=-uiR3k@s39haBKf;eIn8ljDw>dh8{k+z4qnlh@A9hR2CTFal#$>eX
zzmTM$RqNrE{NnsRGyXb$VLGt7cB$URN!ydw?Ok-G>T~XM?$x2n8;nocH?b@hJK3A_
zdwb(LN!|5|QNpRKPcPixy-Yn&>q<twcd6{F&21gQKaK{;*?H}Dv9JEYxp~{+^*Xa2
z#2=RzXJtO~x~xt4?egOr9D_CI?hm`Y&E>Dc<d0vfXHV&zRK>=n{9|hS*{5!O&0M;{
zys00|7>W+~NAIcrTOD*zzoB<ip~y3pt2zhgU1v_;EBCB?^Uiq1?I(_jZ}oWk^<^F(
zv)9)xmaog#yn3-pWu9j81OYukmC4_N@?0*l91K|3vO`ee>A~hLyyeO>9m03U*KXTy
zFa4zGMSjPo(nG>J1;^es6x_TyJ145$`e>ECz09BA+gChX;nX4jSL*1IcN?F-{w1z`
zYi^>C*IxnFw6}-KlGLL#xmH_S9VrW+sBM*2mX;oLDRGX=Hf|^Bt*VDNJ1>4%a@^tD
zDxazD*K5~nm+~!<T57@g=4I8HTVhEc7aV>OG<RO9$ASI>3z@x~UM2KCU+rjV{gp3#
zb|UATciGA9vdU*G|E%65GogI?`a=Tuiusx(-8ad;*=@P_@}xi&huHyL*`}RJrYxbV
z)49F(ww^fmscDWtt@&Hg<zM)Bon6H2^M1=yX@j}H=gi#rqtL`<f=-;#R+n!Vw-uK!
zw31MYJ1mjI*sQAYzArc><)ARz_30<|H!7JuX_*#ZUc$4a>K2RY)@^Lt<9>a%5x)Dg
zYwEJ!?6W-1?&@4W>+_mQLG61w(kCzECwr9`d=X!DWzuTP<EJYZaycImidZjb+b(p-
zQT2GJx`5iT)>G4WO6tTW*8kCpKI^pTkll%_INf&cqfD~i^1?r&M5ioS=Ie9tlO?Bb
z^}CSdj*kmYEN|MoOqlK6g>@y@U%z+0CU|Oz#>?2HiS-G7ULS(JjZc5t6<4ufnv~qS
z*GD!l6H|O7u<3DK;pUDrD|q%^_`9deq~7EgzpDz<w*wnej_qZa;@3A>v&ij~+(yAy
z3r}nk=X@T2ulO&kYwJ0d#Gmiq3tw2bHhR9{-^_^A#rijA*Gf$PkZ~>b+!BX~nJ%s(
zt+v)LKPiTHba;NYvN?HULW1uXhuUrG$%_SL<T5WE(qK6AX7x1Z_Fd&7>IY7J^U$eR
z6)rI3_*Ci|BL98v@x?aGuT;aA@w|)ue)C%19Os+ArYh}T<Qc2*VkPs}JT-yk9s$B-
zv4MA+_Y}R)QeUdAnyDJ~_+0h#6}8GwC#<ahzRto~RCShUww+x0#&wdq>umGFZ4ahQ
z6ES+gWOdNhaYw?e@KsMHed0a#Zrg|SGl%7nw&e9MZAol~_=+uJ<P-`qJj`1rIn
zl8bdV^F8ijH{NEYX?k{EYa`=FCQaU&%{~vG@o>65nQwQ!=)&s+zqPNcx^2T=R&V{~
z?HRU9WyX2daEosn^BbopZ2ip~KKWP?!-ZIW$<tSL*z<RO_&ejo2Y<Kqjuz&k$Hfn{
zF8ukdHQk>{<4$Mur*H?+%~z@uzV7+s(E92bzt(5%M^$$>PAaUPKEbq*CwWWE#(P_h
zN^alb<}iu4@%{}v<Hl`iQ`WsJU*n?tQH|&MKZ7~<Vo&gAo1ZH`Flk2V;}&13Xu~bR
z9P*P&8(wJaogVHtvnA`j;LnpSLdnAKOfp*cCLdU3dOT*uK}LT&Tj`?{4^+Rtp?E&h
z%~!c+(@mpgKTN~qF1^X0ksE))jJa9%RqGG?BiAfet7Uwt(fBA)BOtc#xE|y6tLD8M
zw4&Q9XKgB5vSih|Pb+zu-fr4eW1jX`CFy%((#HSGwENV~JmQsQJYZJ1J6vgPaLcpA
z@`9Dzv))Ba%{;z=E9mp11^*u9o-JG#)&A(EtK=%9Ba!Bc--YWVuPx|o@;T@vv`M4-
z)MsAhO5NY@iv8ssHR8TUN3;kOJ98bdRY>ts6>@m|;G^||V5Xn%oGRIayRsiW&eW6%
zC@*#VV^R3O@54&o(@z@i?CEbeJh@3POv$i`r#3e??}-1lJN^034TB??Hu$L=Iwtw9
zd0AEF#Ptg%bF^(V+t>Q?{@UEb{P#F-K8|cse(f=N!_}hD=#CjGlN9&9Unh`bz_!x2
z|A%zb^2*H%HZ8VT%`RDH#AmSAz4%pdjR5x)$MYKfWu3pCR&4L;zaX^m=CP=fhyc&F
z2QN4u$b6S;aWp>dHQT>>;*85d+w1?UGO|5*`X;UZZU3veLP?7fHctQl;;owI)?3oQ
zL%Nsg_1@es^;q?2n?~zbmp9LRwi+u`7t3rg&uO^bH8J9ZSk{G0>z`~7OAjo*t<iAC
z-$O}6{Ze%34}*5WZr*=0zj=PM+11#1aqn+=!P?GOuWz^=cDvsy%$}EV^qA5N*_ORm
zojCSO%4zr=dMEJuK(kMu)Vg~T2?F!ZYuq`<d-KmKk)uzK&i!2+^Ym#=X7WD2dH+}$
z_MP8*ELgSm%NpByb6H+N3;F2SbCJ{jvlK4gZ_ao0P{ZfFZMSVJq)%V^H9c&?f$%W)
z3r8;0E;&2t$jjqBOl$r${oVA?e#h1a>Hil6@!ACoYx~XdxqWhfz;@fIrz$x2?yC^l
zC_h_1?V5?~%)KW2R?PI+6&K=v=e<eqn<ta&o}5``DbJD=e7*M9CIiJe62YGy?=li!
z@I_X7<=d${KD}r7=(|1b5yvfs`i7}4l_!6&rm{3$JYSh5ec~Udsl@E)H^+jn?Y+)4
z|3dhIM{WtGcUNEMUVi<~;)K~-MY|-O`)+6&om*?ol&!X_*Q1p+rSITVyF$J1@`khC
z>)v=ACRwzxZ1MgTmWz}v)?b}aJK@Bf$PMRgzNMOfXxD7wO$z}nah}H)H|NhL(?2;9
zN*c!5|JhP5FuA7}J=;^(t?=dS_q`Ke2}(?gIrJbWMC1K!?f0pcdlX(Uu3p(CqcWqD
zkLRqW&lUGYEE-G+8^wQ}|Ly&J?&Tx{ucf|Ejufi?>s^@tXF50c!_K7U(@lp3R{8F!
z|D76qZvFy~cF#p~w|9K`DSb)D@afua7XLYqxs%;g4joqQeVi;1s5U`QV8Pk;o0}F{
zE?QHoSTZlj_wXyZ&zvWOu4%fj77O8*FHCluQn;$BQ}I~X85zqpFFGH5oRsAdD|Oas
zo>cYs-DfrhM45f8U^~^W)+qgQ-fFKUn}Vup4P0ilx80kfzPjJ+$yP<TI{mKt!_}(m
zU2J?$HoZFJ;eWee>E@a@@wq+4Tdl4h-G1vp{DVp5%hC$DzeiokKVp91e(&O+%hTsv
zjN;kvsU*tUx4EEamt+{@9g(vaJ{&n4rM~l-jQ+AY+3KbWOV3XAu46r!JYQCC(O#X#
z=1-PQN#|$Yn;d@V@ea*})4Jzh{j~qU&E2lMSJ++*YJL#Wzm_$UeY0|q*~2$1J9%DC
zy|r8RL)9-o*1XpxXT;qT8M;-rURtAm?{*XS{NhOe*{sdoUU5f!eqD&o%vC?Za7y=>
z0jKQWT?T13`|B%KWSLm8>ir4Wx+XULD?^_83kHib*%u#py=Q+J!y+toq-^g7!H(ik
z@40GAn+290447PfK2zRori=Yg1v^304Zh{CMA`k;yx5v~W0MYx%;c}`I#X^uzB%X0
zWU(Wrx;ZgV)i&>m*<RIG<S6&U_Va%p``z=N$uC(nIiUEk*5S#|d{uO|tn>K8uE?vk
z!R6=16OVX5JeJ(NLZAP9fPhq^Q|z$|^X8bl_9$;ycDXZV)w3R-kXikg9^YY0<mD__
zC9<Ya?dj&JueWwrUO$v=YX7@T=GT?lw1TBSxfI)87&uJq%-;Q{KJ%f#$?z%ud#Cx%
zzof`EXF{gQo)dpPto#I<em=eG_j|tHUW;RQUF}-3BKA6XiS(#<-f?F8_mXjgf5(Ss
zfzudXzf?G8IB&l0j&E-#AM=a;cJ0>93nyyUsbn6UXsS7F5=+cPM;mc{iO=~9uc&SQ
z`TNH~QQ4>NcLn^Hp8X&5;;&Q;*Pnm;@9VpX@v$kHa@BlI6E+rqsHR~uF<rg!P5$M5
zR_djZpJVK|od5b@Rp!E(&C4DcH5SbI!gAvmOWq5<-^D7*Tg8r)c+GBBj#Fz^PRZ!~
zJ&)b-Q-SjI4Jn<LkM;YKDoR>Z)(5Kw^qsMudbu`a@(J68s%u_M_AB3hQ2pV1->G6x
zJ{_7dPu;ruX6^M|a+Wu4Z=bGv%Ti^-E6s	cG%a+&;8^U;T~i>@(OZBySlUo#Gs_
zV{h91uCGgd^Ta}}xUZbja1!1rbVc;PiEzUw;cNc0Jm(i)c~H)u=q!1^_FU?kbGN2_
zTjo4H`{M73(NPw;?&o*!{c`Zpj#q4(jvqD^7n~iDn<T$+<^D;&9}HxFz7707b?U^%
zzxmB4C46mm1RZkXPW(~eJ875l$G@?s5Aht7O|ert8|rlDF0&bD!NmL3Q?JH9*zNx9
zxybKE;m<COxs%sL|JRT%t6Xy{`iXb5(lqw98#&jVI6gyPs%-6vZ282hwev1-oDyWe
z)&7C}`9O#5TR$0QC>T|gSiiB$U2tks(67%XzJ=y~)9a^;Ej2rtrJy3~$&)@UWAQ16
zvmKhg2TvWao;LHVQAtR+*qPR7h9f)W_k}2KydHG#?9mBj&Z{ShZ&2_xf4n>*X8qj!
z$XT;5=y)t_{W1U3WZme;7Y^D<O<S+FK-7YBx>eviYweFl`nP=!zKHj+mRn+U)aT}J
z#-(9rd(BKw%WFH_x?|YOf6a5n<;7-PwYuMUoCCxQ|0n)TkvaJB-Xm7mx0X7+Q~TOB
z#2YZq&gFdNBQxdq{6o8(A6>q%nCa}Vd%qe~F9odejj_z$e(P#ru!2`F-y_QlkN(U%
z#BBATZ1tV@*KUNJ+<c8I#Y-pk&N7v>e|#bOb&njHf}D??Wo&I0j1@n-aPlb*ws#Fl
zk%hH6oe9dRAJ(0)n%%m0|G6prIa3y0S?geDcyem^mlKf>!W!r9U&nIsgMz{zYuRI$
zoQsz)jn!`a7k=CL&TJ(U=d>-gr|LF~RV+U%xBMV$ZPb3zc!LLAm&>DS{`}C%=(_nb
zxaBF+gE_00DO_zodRH;C;+fT>>31X4ulO++8l{{tzPtZ+Vf@$mhvn<9xoG_Qp>#g+
z-qsFT)632F=?_Fj61@x}%D=04q{yqtxd|-dbZPe4l)de~nHGOGzx^LpeVzl60(LJ;
zm|8`;rn!d9jOvl+^6HAcwc(1fpYN*u7uH`n>X^6pCGW(9UmF5;U6ap|_^}}~+AYdt
zQ?uRzM@gqpb)T^0Z~JQP7#J$qll^B^KR$BYCgO|zj@Pf=i!6Qnd-}FZFS@zb?RmU4
z=;n4NjSmZ7A7G1OxRSr0_oz|C?8&UpQ^eJ;M%LzO%*kJ^mBGRP^?FWF4qwBZtr=TB
z>MG87+2xR8T5{=2xSrdgKTYel6y(=`jf^;2Y9w-T*@p1;M8h_<c7E@g<U3Ozvdo*q
zCbIbd#mr|Fe}bQvJY7<{c=f9L*W}(^DP6Mu%9l@NZ3=PI+HOldST9%d;>;-?TeX)Z
zTQ;`Et>0F>eVJ+8ak;p7t=qv-j*YpW&wpCizG=;>WO>EIH;-DRWCrDx@6f5bWw}?%
z;~}g2F^Nvq+T9E1R(?HyLg1~-<@~ga(nH?5t9QjeJhbb*ckC0}%WNwz%a&Vs)J{4w
z;lrJ(_<u&zb#zyM4O43WAL+&%C4RT4z3I4=zwCjoD!Y`);l-Vo>tDaSxqFXQQ<g&E
z^{K&!I%Gxm@0s7hpt)Vga8=ryh;5m(&d1DhTyAnC{j%oPH~ZWUuQ(i;qv`Z_s_cC!
zi||P=6WkbXb~jARHuYdXQNsCPmg=$oB?&v~jA!M2Y}_fNID41ZzH4WGbX{}tx%2(q
zo39mCvqQ@6tqn95TkE(}@as-9iQ}`mW1}X9xI68BY;gJo%ij&}es#ZDCmwcqNAIJn
z>c=uK9BsOKK`70r$Ch<R<fHBUt^#YyokN~oY+8OYN%7j!isl>Zjwt=8e04YKgwH3}
zh~rWJmOU1_XC!=eceei%o;6isPp#G$CspXb6uPyv#`^LU<3}Q1>t{0Fei81nZQjZ$
z3Cor@Uv9GsP-9znqbl-a->qq_SF*0_@<0A^e}49@Wm)loHkQSIH(osa@_FOlymGgj
zSIkO3{P^49?)XF~LbkcJK1JeC{QYGro2Hb^y=z!-PRNLx^TVC$<2%*FIZGnXI2?*B
zieIrSuuJlx%G8(}uRi^J%;Wr^!@~B{p0yGBt#iB|)}6g9u`T%V#DHp<OxHh&FFYry
zKHl49WSgfUY52BtANSGO;ypRl8|P%HeeG-5@a5L5_{*P`oC>fy`0CEJn|qhW7-caY
zOFE-@urhKwtJJ3M-76XvU!E<$P%+}z;%vvXx{6mVpZNoq#+~cyl9btbhk1{@|6~rq
zHxW0i*l%&LL`hyrTPJE<@olDx>t_~E?S$Qdfvw6qQXM6&r}x>(7V+|(w^*mR;o|<2
zjBL|Ob=mDxBC`HJ&i3`nkUD($cgyxU6XQa*+O+;SyWu2nt-NdJ^}{D`1lg^Q|Gu_J
zYl_e*9#)G@za!o5EHVqbb>vEep^3Hi%V?7~Upk9cxqW%)d9+bnqRpysTS|;M)4cLm
z8J!HWQpe6pPrCigG*WB!u~Ii-*>awuP3vlA8n2rq+@UkOJ@=OR!Kh!qN{>C*u+1Sm
zT<6B;1J9PPerFfN<)m_K#{L$E42~JgR(fPG{4QVoQ2kTKDXV~uWjXJ~9!@`-5q!1Y
z>X^XGgNweUPW^mh!-3xgwZ&qEGR%e{j&WyWe;0odNo%_MkzeHEqs=Y(x2-q2c;BqC
zy|&_Q*c=h(>Z3u4*Q1vA{Qe;LtSSD+$GX*<PAm4mIq=Vq*E0OZtD9aCoq=8#y|?f!
zh`(Z#x8rBV_L9`ZrGMuxJO8aUYsV|Y1s)$KI44ZqUz4}L%J1YmvAtoe&(HTC`J%LX
z^RxMnGG0xqIQnD4^aV#5Wf&sfEDxCd@ui>5!j_9MAA+`-%NtGToG5kwUEI2<{6%43
za{SXXY%86g?&-b2{hW)jk=^i;O4ZgkU&0T!^Hje6%_r2<lN+{r|DxB-Lf5v<`|x9;
zZsP<m{h0=zvYgj!t`GQ`r1nmDQckhwzcpc|j~24A_-=n@pR?tAb?MrwE%_f3SNcY*
zV(<SPP<(IF`vy(vzsB1W?OIK^YIk3sZ`z$366*ixWF_~kuQ&MrA2k&)J9}aEFGEYm
z=Rs|<+`A9|@@3Y@I?fezHnjZx(y-jAWlR4(F>XwD^Zaq}eX~^LjCcRP>{Hx);?nLO
zC*ju1QVFl;ED37Vn=kor+6w(^V!<yi@<}pzKIB^G8tZg>hIxgRWrt$Ov&#Qj=~-uf
z+<vAqHPY{Y(Bsc7?B3UXyO-5?#mh@@{69WbBgm{drvK)pUdAntu1=5=JYlRqZ|?ek
zMa4m!Ujo>bEtbvHjeTRx)yTzByVc$G))kF)H^WX_7irz-*u=by!KLt9;v}ZS;_s4A
zo^G3U_KTUuo2w=NSRTGgxZCY+($M#J>q(PyJ|~hN+27hO8G5`XL#Nj?=jMw^+miPk
zI+nfWT~(~^x+N9=XKsJJ`>6-VEtd8kKGxi?%VcW)YaQZ0wXm_MO!cky-S3*&Vmk3s
z!Mq9A^Cz?~JFxM{o8C=jA<Ot8CN`Zfan0Krd^~2hYqM{~RmW#}5xN}5f0xKg+s~8Y
zoE4g4zdhh{pwl_AYs_D5*SwAD>u_Bya<y~1&6~^pLJ!XU5jv;k627YM&<}mZ1q~d_
z=RGr0d{{RxwomG&)rLz??iPAwEqL~!<H%`o$*4J1KQd>_pSZ`Z_oH#C#B!_ec|Rt5
zmu@(>Yue;$_rrf=ujZA`oM{l5boOF2^PE#g`4^Y9{p}R$KI_-Tzx~M1h$EMD_f!Pd
z32kt7`11CikVcW?dPhgEcVc(ikNsGZD13hH)*BkG@q046%zG}%zFZwQZMLAFjAW9q
zy7AWEd_f0aRavfQjlV9wz3xEGjX#fPTK)Dn%{9N(P;^fJo9=^`@j~LU2OD3{`?YH~
zzvI#?OHZ?lo?<hs(VQgPARE$k=q+CzuY%m^<PT*#p6DgNOWv{RRhr52hf#}icLYxt
zJUc6VwZ6g4DMDF%HuAgv`<l7_`fx%dtJ!do`IMbW;vU`1UKgUdK3{9nP`i5A`qb^s
zOq=so^UhhoDOn;_`|HNl!zS%p4$ttv&f6TP=jPZU@ng$R{rK{04tEzX<T~y4LjUh{
zr?R#Co|RnkNt!F4+twEnt8l<`US`h)?@RYv|CUH67PZftZP1?1?KC}KW2Ww$S&Y$7
z8?)cXO9lG&e7jepJX7p}xV@Kn98YET=T||hW^P}n^Iggl=TCeT7IN|W>Rsx+MNhsJ
z>&w(euJBTMQLNB(;$l&pr&d7NqUT#?{F_{z^wPzHgIoVwq)SPYy^Zw6cOS)ncvJ_@
z@;RPdt=Zi)Ei31)$Ap87>(9n5csKFYf)B5E-(Puan}S&IISJd@`m;q}Ojj)s`oIyt
zzmhwEd4Yb}+{@YD|MrVdJXtF_F?+{>DHTpnlut>@JW1YX`s{S|-2bc1KRjRe)ovB5
z?33d+E~G5^-f`oF{K2hpziNLzvFYd1yP;xTduaZN66MYJqqDZmebV_Y{`#D<C~p&|
zO}A#4AG5r=bkh4{wcFA^uJ4)Zv}Zs6LvL}(FD)M<0yeVk=kn<fsA7(MwW!RolVho#
zdDih3t5oTvn`>E@9r}1}Mb|AGT?>H)o1Ye&ofq@}Klv<YTlb%d>kJ~6IVwC|6yvfw
z`{T)<%|7dn$`=IItoJ@L<A)zJOHRNxfi+tmB!!ur_!(<h^q*<I{HARyR$Z9Au2<~i
z5$->A>JhcaoxjQm<(H~#I=Jp^%RdJ9+izpcr=<003GAADQGQAJV}AbLh%CLzCylFh
z6Q^#t?{MzG>T?Pl>l~h(+azzfd{%~(fO^A=57t}nsZHDQTThnrZP<rt-e-D3N`>8a
zoVfVHTVt+)?=>OmIagoCc^^GCw_-=MUTU?2dV$QO3bvDrf3NU4CjUXaG)gJZt#sb^
zOog|7avVW(4thP9@!I{DUZmQOW+%rV@m16RMX(r6dCe=nBP7{mNh7DlWVcuEu727T
zarXH^)4aXmCm9|)O6b_e`dcdQUwLTZrQ2P5OD21+$m3z&6&Mq)dXKsN#v}Kcwc8Ci
z=DeNzVOh3vQ`?jjdxr(5nD3hvm$v8JGMZvz7c4J2@4NUKrpEirRzB%zW6hL5x>e1z
z@#}UbpJfcDS>LJ`b3C^cy;*ccC0i@l(WN+H&StOXekIjU%O8Jz((CnSYi#J<ISxlE
zB_k{>=guxss1=xg>cRb`vLVekRr|Bo-)nL2JiEo$r|^KS@%8*0mXe7EheJ<C>@Ss1
zh;g@`YpDAD-Go<1&A1L6GSps_bno|5#c%5*_r-JDPt*0gQoN^c>WY77H|1p6+E1`+
zZQP-5`eHJp_@Aj!RedoU5(V8)A6n?CW^37m$|xy3>`HD9KP};-wS?!!TNciFoil14
zTV@<#E8P9y?Y$Q>cmki?eJ{RB!J2v2zNr0o+}oZopXgte`z)A!y>ar<Ft)OVQ-Z{p
z{&yy~zqOE?E^wP+-lP{fS`PF73r=s!`q*1_|M#olzApY-bFy`w>@Hfm&{v3!Z{E~3
z{VVe#K0jhQnmQ$Rqay#hR=bt!7a4mUe7#t6$K&sZuO04JtL@2eaw)&&VIujeO|c;O
zpW+<Rpy0M}d*-dSvZ?n~%8b_<9QYl@RK7^%?}1ku!66l*l5^!`N)uUBCVZJ!`n&S^
z>lH!<ja!2@ueF*c_~rg;*G@y-H3gp(3R==$s%$Y>CRTsvt6<iKJM$mpAAWwnr>?7c
zTe!n|xno?`VyYh#Cg0Ug*erL_S%mk8#;UI0zLzFSuS+|&YtH{QSNeFi-oJd<Z>@qH
zTitrqRi8{A6|^7ycD8QS^)FApMp&C{dj9>`w=Gk+ZuxKf^!$O~vweT11ANZhxVR`M
z`CHka>dCFOnL?A^Hk6zH6W;Nvx@D62oLNFWTO`ijTGJpTVD9<eKby^>Ietalp|hFY
zf^imcch$aqY&}tv`0S;cS?jA4l_Ie``||I+G%2$zegEgm(!cql9c<Igq&GxK{!aV4
zIx;Ip$N6URG)|8{Mz!yz&fN5Awx+Pn=@)mR=O@qD)nS`dKgV&ws{Zf~S_k%ot>sub
z?eJM~J<j#7?H7G8?rA#Q+3lglyDU%n<{W93y=z{@Fz(G`Okp-z=)dbcOW@_E`b&?E
zSj&CxmVEMbJnpeE-}-g$QPW#Wm3L;QAMO-Re6xMiiid^*2Rfsw^%rJk&-?DP#Lunq
z%Imh*>O9+fQ@0-ZlO~e1kkwYdvTxPeh7C{tzI<RaDWTxGmxMgq<kbC3o<}GO9>|<O
z<?Qn}Ru9_MeQoVMPD|8ZTsb?xaogJNx?}lIZ4Kl2yZ5;FZ-2Ln%SZK1WP{J44s$<q
zRzbO3B{ShIhDMIn*;}fz<Q0PF-MjBUS;E@)T#t~Im0|h0yB9xR{Bec(%CpJ#VYyl6
zAH6L0Oyj8DKI>wJ_P0pUe3mVfFHLx~K6b&8^ESVuYa6AGHY|GaY09I7BWa4$-dbF~
zvU*bWsnY1Q$^{n=?&AA6^Ji)9|9L6bSmm4Fw!}^~)IDk5=((TMbiGiT)7;dI5R*0A
z+bSn6EBH94;&=Wev7hfRE6yooF=R3Lwz_E3>Ma6yxMsbpKNG(8?diFF)9+oq%i;aZ
zK>Dr6bp;92vaW9@I<_AS&SU?0*<7(rD9bH-sf0>buRZ(hsvDEKCq7<y^utD`#(+n?
zwP`b-FG>{f4_9mwn7ZHjPfYV#>AeEN;x4nd#u+Yf<-42D6)Yrtb)q_pljohX>!C%t
z5!TOi7CZT~oVUFG!f>jEvXe>CWW^i8h7Y5>qUNWsE54mqA#gfOa`VHt1q@-0WevWJ
zmOhs*z1?`Ws^Z<suOIJLF}d~Mohs2MKd~jOr?!1tR8z&2<2N#{i5Skmo|e4$SMr4i
zt7EFOn5Ik2*|vU}J;$aii-OGqQg!W)ZLd<~a$CzCzBQvO<lKFQv-c9x8Q5QZo7c0|
z=FWxR${%k|Ra-9ogULQD<MNIq&xcdZ7iaisiEsorC~g*eDVOrbdTOpu(A24--=BS%
zxMsRY<*R92Q!c(uh>iDBTH@VU@S=40>YYyOId}tfr|SFn$j-R<>J5MLkx3QhK9=!E
z)o%Rt@?y8=u<!nOg5%2B>)iiOEbsXx$0Bx8;S+nf|6;e>0V}F4Qq=X%ek-2GIKggZ
zolHrcU4yYjtpK0jtuEF(XM`GDa(YhWa!HkcQWme-%p&ITG`QQ$^@L9RZi%HHB1$sJ
zUEb%8*G;K+cDL58U865rIqmxWB^I}3B<3Gi=rTPvzx=QF<bL6kp3|RHzT6wGBheFC
z{G&6fXJ)6n?RiV33O703w%FQ?=<T^yp$}~MSG_Zsl3nEIv0v`W<YwQd>C^et%*(_M
zao*y~5qib8tc}0$=Wd(n3ZK3{;OO7E#xUgG>4GDHRrA&?5?O5cZd1o+wnYw0r2G0q
zZyith==8QhHOcQvyXLflSEk$yUoVK4d3UtL|7H7^@1K3*SU^=`WER77=`FE|o@U?P
zYX+SU3dvoSW>tRk;pN-M=5e+<?{HqxuzsWGm1?zaxoOWPJ1}k4I%?v7dd5tnC8n)9
z;y&NYz6eSjvwfJZrqB91&LKthc=|=Vz*+nze^k!T_6>iwD`#^}+MQBfrWbE)|5n@x
z-)XG1b*05ru{FQ1OgsN<!mWl7rpKoL<kBwJt>>M0GviSIp{g?XV~I``-dQ2Pk6z}O
zx9rZWXY<eAx_52uLnrkK0ShDR+a{b7c>1~K-a`i)&INbH<<(nzI}HyunH*V~$NwZ@
zqxtf(zpb}e*i7GxCRWBR`DT^rFU?lW&Yr)U@zzCCp&!w=a&(V9(AVTjs>!OVzS|Z*
zBT|vU`nK<vTRIDFJQQwG$d9&s!g`OLbMH>c$@=^5c|3aDAwS{6#)CU9@A`j}dE4~0
zy*gGs)h4^2H*(IX`*VA~%=F8~EA`%=e0s3x&*f0tI|;&kN&8mMT+Qoy^H1yS;$Q=n
zLp&3kUKCt=dhY&~^mqNQo;}HLR@CdPn4Es_(DZ8Fc#X70*X<jgr$?I|SQqnd<8RN*
zCAV9Q>gMU|KI6D|Q^CRTnP{~9Hf#MO5r^l$*lKioL1k7|c5?NpOZ*zqTpxZ1Mokod
zyh!M>(APZc1)I0kJ-b>ew0g<)U6Q+fx>m(<y?gsIY|V7bxogsY%Wt%EWQ*DGp`yv=
z=SNE~(VNd7ir;lAmHIh*RvX8@_SQ8UW-c#|(y47-uv{eOR%qYU6Hn!s+59Re+*~EY
zw7n-Q`m$lhg!MCzE3wKNp80Vq=F~%**rH%{nS4Rfg?)>kJq};*q-o7D;mxK$U-{N@
z9D1HpUq7u`_{APQ!A_;bxh_UeI2P@>D7*UEgMTetItM3qRx0neKK1(B$<CCCuimJ<
zJoI3?<>|kcb{19+``)HCJ})%ey<RtE=k2W>Wm7psy!K~Y+TEicVISQhX#L`z$`?^a
zz6;9it>#BM&)h%39Hyg?&$GcbanbMm-MtS?EnDtX%Ab-k<@KI)=ydkXH8%BI&rA~8
z+u^~luAic~-|S9+^MhKQ|3NCZKDQ>s?^U|7=!eG7xm|bP->k@gxhWxjjU+R>>Mw_t
z0-_O9D<?FZU7f7_{DBfnXn{?TZ;O0z<YJ5SORp8YoYCCdqpxpzWZQ1$v*PFWxNO_l
z?((CAc~5G)s%*tI(>N((@%d^?)OX#8ezPre#o>Nu`JClKMgJ>ej1+#<&ON{KLRiC{
zEshqazdbB6dcgX=dD1+$S3+~Fj%|6Q5%zlW>@Bs`?^jRsOq{B(9-FGNaoHV7qf>KL
z-#D9hp6rO06Wgn)RMKVBA+xCA-HY58rP138)BM6Tz2iLH<F&H3HqN`YY4%38XsHn8
z&Ra9>9ycx2-m*LGf9Cfh?c;~u_{^NPGD_kZ!_0f>7c)NB@Z3$CwczL^y)#p1XfX?W
zP22D*YU8aN)f*)KOVoEQ`)1+1Vghfzd%#n#Yof8*AKyF;?rOi2^5I=Xv)00X4KurI
z>n#tYoSY=UHE+SjV~3<RXGHyD+9S|y+~;Bww(BeV<N50Xe(sz#&;Fr&sIgF6p}6{v
zNgS$Tq5V9^vuAIRdiW(`BS&iSAsr_XiRVde@2?nse4u!(De2hl{0O$+Ph=X-oqNi3
z^ysg5&(8(-zGkgg@?2#6#6d?qAo%FU)y$sqy+4jGe#7rrGuv$b4%S?UE21jv&TZcs
zkkI&}P@q!u_ywuo59{q_aPUuOn)GCKW=7+`cUce3)Z;z%=6;z~b+_&8pZmoNV;gT?
z>i+R`&EeGdk3+>R3^`uB-@U|S%CZG9%_mhp9`nwQyH+^q*p9z<HebIczg$uHoc1nn
z<=A5NB9%>hV_c5k+p^*E2iM3qe|}&4t?>HMdF3aiq4Toer7=rSTCumh#NOWUf)`)m
z!}({kiWbeAT=8E>OmD7F`!}|bEh`hQ3GR>&*Z8#g=P~8K_Ip?PwN@N^@W1W(&aGxM
zPrT|kj%PV_ZdaSZgQK5YN}m*Vn#!pk)1P#~`IpQ|q3=nIdvt>2oeDage`Kg`+R|wf
z8NnRYdggy;ma=EMev@PbTN~pn*99{||45tmyeZkWFC%#3#C3huiwYSg-`SF-6Zrqy
zmFgMYk*c@*eLuZ+`}^2$`7`Icx_|Ao{A>=soby3(=F9IY8Bwpp9cOr*<k^waxkhB$
zR_>W{p))PHH7&fa?DlVz`)SqHd;d<)tHLf<EfEi?$QtiG+8@uE<W4yH^rh0QirQBV
zoY4zeKJxrJxs&-=rof956QiV}jb}dYVma~ZykH0W_KVdU6^|aDBhJ3BWS6l<bX?bl
zm_0!mS4<RN-u}IUvo6O{AYmK7$$tx<>C0v_-T7#wqAem>^H_T7C(DMYmJ`t%yZ1MX
zYCKgF7wv2ccod&gy~X9{-h`QEKCWpjcMsU~&B<9)5v?5lujlBm9~S?%)_z_u(Houi
zLacOQ*{rKPpO+Vlh@5l&R1rNT=V#5vP4CXU{!}mhN04<TpUOh}RArAnD=%N(6n}*0
z)K$H#ho94Y!qhkF+_$?E`o(F|k>8vmS||2t#LQdYQLfGHBO*Ed(|jd0*GEb3GGjd^
z8Wnih=pOXh$9?@u%*=J)9yd>@W0-G|&3u~i)+>JAsT(hK9LTzK`R=xZGh$zLWo&FT
zUwnG;a`)=&@+;i8oc>$e1U2hMe0Qt6y``vo{kDl(P15qq|F|~4tz$g#J^t_>J?;3H
z8;_W6iMO-VKVfrbR(ITX)t3ed_mU5B|2_DR_3+D+%XUi`OR>#4ma?ii;`Y@Nw|%;|
zgu4sepVYT*k;|@>)LInx@?4;p{9V1}mzU^13agggU#XEAY301s@6)uf3NL4taK#hv
z&Ca^3PJe1KdD{-Qb73`R(LZK>XnQPwcAdP4)45}_ikAP~^G-E9_H5mU@;!-%qJFov
zDDtyA%>Vji>5fv_{P};*2qnH=5}cR0a?uTy6${o~6mJh~c;jL%Eqp-VQA9%NwQ+f@
z=vU$A8$yn6>c3f8WUj9pzWe)KD@92$4J{oz%Q;~agPR+7O<uxQRP(^8`f}+1l%jp#
zYRp3<CM~%wbN487e%jvmT`QEbGu)&qyefNHHJbf3md+0NB_}Jk>U7-qCl~wo&tGt5
zyVkjN7B{6$#2%cxU+`dSMDm7j7C+i%GMfAToN-g{9_yof9=~;;uIh@@E&sZ!`L*Le
zn*+8VnAvj_)=hsdlUQ2ub)`?!uNyBP{9EGf<aKFB?Ipe|c}kakZ^)fDER0b5|H<lr
z+(j=P8Q<$=JG8&oACK_zQi+?dz{#6&W!KuPH<z9M*1zeYQ1uJ}W?r*HCHgx;^K$ou
zwk%rBbdN>asp|B^XIj=iccd3p?Dv-uTwmGG$r@#{<!!*_rcbPovoj?R-_Vkuz1uq_
zJLd5^sYxtn>PzPB%6@mN{Gj*(^(miznN5w}B&Z~R^;WrJNL8XjXyxP%N$r%onYAtN
z1Gtthdw5x;LA;oslOw5CRoJbKJ8o5wfQv_eSPOU3vAKqd$9Q>q{AaqiaPodpR6exm
zQSYTlC!Uu~!k;Qa0+sjO;?BLWVv*bz*Omy6Q*X~562Gc-d!J=>n@vXk<h-_pW)T93
zt0ZRXO^jkYFZ()n!JmNV$s67&p2;iyJSXt*!8t-Y(ZS2tHf|S`5Wnzii~7dBKNl<d
zL??*qo}0>|bj4$_m}AAlm$TI6W=!y(oEx+#>E2PFYue=%p6`{5qwAM^Tqc<+xq5~s
z*K3LD>;lW9D;ro3R^AFQ-RHuw^}@v!r~P}T+^^O24qot<QC!IGkecYtNk0!u%r#yo
zvo`Va&FP1;)1o?;YF@B7c44PWzl6fiZ44{cRtmR1JKw$d!F=<Rvo82vpY3e5==7vS
zk=1=qVy%=7Gi4t7?zp<Dg=<UdrpOu1$1Lv%Gq;ylgiaF|&z>E6tG{W-k7pP4z7!~G
zyxlLiKvChY+sr-BR8}2(e1ggHewV2<NAkC)+m*FN7cZaV@@El~mj4;+Je!=z<-Csr
zeUh(#&Fbu_S@7TXeooIu?Q&(N9;^Cxy^INNCFc)!-=AFgxQzRwS4p#aR=<r5SKd<B
z)YOk6H}VW+f;UzsKM?t|+>z_4x%-U6*Z;b6vDo~0SX;=y=45nD&yLjHMvGmKJH1%;
z(@Nhy{a+v>?|Ca<x7foyXBAB{PP|GrePFfzbAPgx#0*ZSKwF1``)4Nnd2(1KJ7j&2
z!_^ND|Gw$oTz_F!5Z|Fc_j$G*-uhNir1hAo_}tqo%xm<#&%QUVu-?33_1lVogKfTY
zJo_J6W%Gtf%ndJfUBOipYG<fyaBlW>-$tj8i?g@3?^nIdIH~AxYUsw*1{1g3Ijr=>
z;bg452mhvDH<-T`v2^&wWnbLC{<`*o8I?P<JFoAm@Ab*Z7F7Ps<8PolvsI(rNTWP)
ze)x7H;~Q<Jw-YZoT|Mz%VYSWTW~FU@Vmn1HXQ_SHj#jdKzBQ=qxTT!v1wn@=9gnBU
zNKDOXS1>WY!I$SO`K%_$eWCG&{)9-0!_(brF5maNAAN*%a?@?ye21APdFr;Qmpf!F
zSIT|5mhLo#;nI;8O_PsJ`=cA;mlo6adt&WZpGyZ=ej75_$m>7l=sdFii6C3n?t;y)
z_o$^-=-zpj`o57f<is13Sw{?BO?lA2Zud^vDH5-)U3t>7&;5^sg_YCZ0{g)Dw*Rq3
zSC4#Yt831=a_gKCi?_Au>839S0?d?l35alfc7J$(0_&{~Kg-H@Qof!K&V($~^m`{i
z=gqA9yaFaM%br|`&N;HgASvO$bLX4M6{n|5=O22Rsrex3<J!ELpVm$GYk&II<(bO$
zldJQ-sJR=~9=+aYc~xG=LjIf8V+Oyan_uzqif<A%U0t+t&crUaWkHFjJs1isU#@$5
zM*Q~On<Z6;Uaf!f`|}nH*2gba%$U~s$E!u}_f6x*qF2wa=v>xm3go}{lXLBwHr?77
zb%_X{(kG>VL}msu%RZTMF(j%r@X%os2jO@*S+@e7CwJDzUJParxnr1jW8pIOGYi-M
z3uLVJ|1eEeY$dbQ#Ng}phvv>nRD0s4f5M}-J1u1@b5)RA>gAXI^=hvkhN>3x`hOBj
ziV5P@6`Rdi5q-%v?(CO<a4lok-=ZQcf)}HYor>F68{X{Dp4Prmtb4g<-`$r<zc$?T
z5#Uh2%*f~be8#VUgsK~>V<eY}-d!Hhvh42flKm;?ro4X7GB^B?Ro==Bm7|{S-Ip%g
zt-hM8SgX)}Pu@9n;;it`YzI{jwCsBN^>a-4orcmk?7;@1VXLpks`gu7%kU6e%j$L2
zWt!pihn)2dyG@G3U(ULC+J4#O|9==J{_C?p!u&g-{EOH%gNJwgf872QylTqL6=~5r
zx0EwIe3tqI))Win{afwsoYyI~>G4dzUo}^^*eR(-Yc+P}D7neAa52nV89aNn{q!w5
z4<(l6?9Se)d7-JXP~l8#v0tX*jfnM<&;QLdJ(m_-71cB~@Zr1{D;I|S@hrY17&1wl
zeR-bq{mmzyPo6kor~W17d%r%dS@Z2)WqFyW%l2oRV`4>ZQf21HX3yetUvQ@+{8P&B
zl<QBY=t_w%=zq21$3%g5Qa`J&9w}}8*)z%e@|%07-_EGze)nXCb(Nlxae1a|;yzPb
z;XK10;oUXtx<a2_JMOjQ&j0@VP{+^KZ5vDX$QS&QoR?!9Je99@#>HuK&QJQ0b=@iP
ziSEsX4$BYqHXjkWs4?reT~T~u^UJD5w`JEKP`YSkV{l{o;YNp&DFG!@to2>8Un@T{
zba6@h-ugFOKd>!whW~;$r#qJ@n{h9C(f4e@@5m>MCyM3xPpY`Hdfwfqf{w0@#ahSh
zz85=&885uu5+x9wseL#r!1&(J4Sbc$v~7*%+kJ|*JiPRp)ufYBQcmw=W~gN8`OOTL
zWXLF4d~cUG{~U>1OZ_qyvvex%Ke}Pj#NXPNdV+P<NNCjTKKkp$PBHfGtB!^%6W&+-
zN;|kMHYlLV|F~sg-JYpOU({6mZ_U@sExe#He_zR)z2(n~Zf1$|%`3j*+P>fFaltl*
zbILDneN|d$y)0YDeQn~Zy}GGNN6a1{S@Tf)o#E$WAAII;nqPSnY`T5*_f3VF$4))+
znW)1v^ViArfXRRJHwwLrp7Gb@XZVQ~lVxW-i+H|c;*Y1dHn=kU+&!UCEYBsoa;0}O
zpZ&FGN!L%jI{SOu>NO{OXFn2HxVJ>m`}I4q9wmtrTB`fZQ)KPqzn$IEqucG+VHtGb
zms#avvkT$7O22GL)}Q&I^Lp%w_3z%fX!Ff9TcmmYvJ`WOHP2zU+?zLQeEN8gAG+6k
zYo5IA-lra>)4LYF(%N&X?(&-@sk0UfO)Ki<eROBNQ}vNlan6%|hhB*XUagTn7<=xq
z@b88H9~Vy+*)Jn<+++9L72ldp$tk{zaygVNz02g2kEN=H<pJe3`|M>YJwIYU-V8q1
zd5bMH=;WWPZd;!v&DHbxY_>z+?wZ-b^{uxB`fe!BZaS`F{++M>&UO21F2d>6Jx`T4
z%AZmW6gRayVa>sNBw6~q^3Q}L#-epy=H@v%x_giDT|3<U^T+#*LW|!$5>nP&V%{5)
z@Y~#rK{V$?@cFvtRSN=b`e*P*i*yy%J@h%bAZlfPbDWadOlPAb{+&A?GIORZQxwR&
zvh;+S<;^eICn6tNSS%3u$s2m`{*eyd8sRndp7Hs5S2lh2ohSH8B#SRsX3y!>JwbK5
z%0C5f=nl<2xuLjbN!xql;5(O|smI)qoWI@dZ0lrZzkJUxDhmTI?D*_gF>6Va{NdDd
zM<dqQ8GQSB;_Xf0XB%Cg-1z%R?9%)#(Wj1WIvai1bkT3uONXYo7hXTathT-U-=V2G
zb3RX+BNu;g#?g<LJyQ1`dDAbi^-FTSjKbqrJ973M4tyr1$Xv0WxoA1tnJZP7jI(n-
zy<f`L^yJt?`N}}kO(N%ZMT7-AJS%3}G-IhlRJNIydARgj`ML+*4>t0j{37%tV-|bO
z!S&*@I@$5t*>_p|U~c$0(>cC)u9sM8)&J>6{%<(Ej_|nMSMfaVBUSqQ&7W&0CG_^}
zpQt!<)7i|kF){orjrEsI{<Z4LKeb1VyTr@mS32?AUp;>yi>247`=nQ@REy`d&0po-
z@XhS5_;%;$Or_>&C!T7Wse~16aPxm)S>S$T8BgNuclPHVi%)+b<^DAJ;;{<h+Z@NN
zbQg<Co_RcB>jRd0Irgptq92bZuZ;dY>*Yz#UFRfz#m7hg{WN7pma4q(<vSm^-88yB
zt^4&v=*=safBKR7y~(O8W4qlybWZ4h^XgosdY@~)qqz2ggaf9n3KQyP>?@yUedo}J
z$?p4SED350@VIB*{QMuwuh)Vb^Ug;nX-#;4HCcJ?Bo^tV&*omcxRLk$k`oy>^K>3g
ztx#<LDdRTz#(8U2@pbl_l%5B$h_4V~XZX!vG(Bxk(_5E%Zq|GEE}Fbv`#h#NN#bF}
zm!^v!7iF;a+wxcc-M`39MZ&!K4oh6dxyM&79RIkvh$T~u@6yCHj=R6Ny%#c?SyB|i
zD!M88VWU(7?=|=2P1;Jq%l~!cy?M7y=0fEctrrWAOKw}Ce|m%J!6_<MyN?GfGX3*2
zw5;amkMzgFMl*UZJ8WCm{W;>p)`<)14s6+7GE4UDRIf=|Vxl6RuQ@NSzOm)jku9ut
zYrHP1Zss=F`M1C9w~U5lO3J0YsbBN|UYqykl(JxL)B+EImmlo{<}F{cBv@$Q%m+7b
zeiVKG{M;6AH}0tUlYOsb8`r(`jC%KG+U{LO`sbJM6_+_2ve54p?QuK$_m!7K?!_HN
zjz;~ppA8;gvMf4#EV;ib_qg}_x4R3J-(<9JRB*Z}bVhlfp!)gi8=VyQ9&&f*owVZJ
zY^#9U8}|;rtZYzpnx^p3Y{j<pGcgCcl1~S%+c5j&EbCZq1r1N(Z6VvfYdy<)cRB8n
z*7w<qP9A$Y*;rHhU~9Q>NY;n<*@jY!CQaXTUGl}OIH#m-3A0{s8+JUJFkil6UBUYK
z+_O{KnYXts{kubYs{Gr9yO#fUvDkhmVgBp|cZIYQ?o?k4zbKKXE3;ka?ot-t-5Wa@
z3SL=1pB;8<o7=tE)qOtMDohLI_lh{AMoX1z8-6Qij$9g@r}Ow&TFi##z5nuN?KoXo
zA1?W*R`rp;wC9nC^|Q{olm)QNiLI<Wm6W3?Q52D*oH{k<phwZ-?f%<u@L3;H>8d^b
z^;gQKs*{g5?L1p$e{p*DJB~u3@RQ!wyUcrzEaN`>Vv5BqV@?H*-J4C?X3PIGH7Ljs
zc$4>2&v=>x=jQ$A3yL;aW$7%<dBB-^CT5>*z?|-BB?;RM0;4WW(9ZOI^E+E(>D9wi
zV;IglEnwficIU_E{+Wyp9(AvF+W!}xc12L`H-}c>S%Z^X<CFXMx83`#Q^U31cI`**
zD0jDcP2t=0GgjUxj5afFH&}D=^0Y#)_bWoq&+beNmb+nmv|+yE3=hTyAD(@?dCN`w
z@dNqyVXQF|Z5$rn<Y4Rba|zgNTev={VS&Giwbv5$2U|T_8xGE>oSn2UG1dEQ%FD34
zCnq+n`21YXur*rn$OeCwuirAC@mS}!`{?}&`}pwl#UiUCycULnFV?Z9UA&>&Yg_+)
zi<j|~rK$%%XU!KpzF3kcW9bZ;{B=h~(|v4ZlN;ppT$w)cu1k^C5<a#sQfF_BzWe3+
zlGv%e*XzzFO%O_4a<He;qVhspRpTPbZS2S5T?OsrXFJ|I{%P+-uKe=*%J<`H^zUAh
zyQ1q?*1=nPb@goS8H(9HYNsQOv=Y<86YTHta=hkVGeM;2(;xqfJdX8=Vzx8IdltAJ
zPIk2RiQ38J_PhVD|0kwB`_3|#JKS+F+4{wJi9Fj9u0IPqtb9*)*j(mXpS;BJvy+36
z+bT0lzwQZ|*&jC=Rrht-eveyY-8Cg$bdK8E$4j3utoYSzBhZ&C+8Y>R(EVm@Nsqug
z@o(~5+D(3LKiR6eYC=@TrgK`+uQ&GGJRG`?nQ@81%cZ?SpENJoEL+g2*3mkf<=`b1
z_KA;`PUVD1Hup}<a!4r?`Fc|CE91x4in~*yLp3XU(ix)v`M&B>IWEu2FyY{q_s9Ar
z+iE3PSEiP)F+403`|jrfr+tq1wx)_tzpd@8+P}y9Vqx)Fzdr(N_GLeDZ(+G{Xm1p=
z#k7};uk11YdE!v{bGPNw4B1!ym1&-*FDNs|<@Vo$-=&SBG>@6H#2GzG`hW58gNhD~
zg$!?uJ=cp#HwpaoPB_QT9%pu~(yy=F_N3BJJ;UpluUPF1m*2}0dCv6S!FxZ?mwmWa
zaW1i&-`8f#Pp{n`JiU{bE`0q=`VnV^%r>U&qP1)L|Gu~&m2&=wbj?c>#nx~hy;+CV
z6U~fVRT?&^Y<R`N<H^Bv-s8~4>BkD}!wzf<n!_`H;*D1ier+}j>pjB#u_EfblJxb`
z*Vi^|J-qPGF~{(fA8f(gk!dUT6@31r8~!A?{@zU0aDldahBXiGX;c*$&Al*pf{gv4
z98KTryRXa&xb(h+=TOZtR{hR`#b^0^Y?#*FJ5upc-GQBDifgB`Vosb(O5kp$Pua~Y
ztWM8bqMo^t@9T}EEB3F|eD5tSXKD9q_dCG(=%vW_N1uL1*{jcYUiZ%;;-&-7+?ctA
zZ?AA!2nNkc6pK7{*mTa8|GN(x&Nk@yJM&NEf#YX(>G(~Ub}(MkYq6PursifZ^>dFE
zllA4(n+rp4&p$Bx>BVgd^A^e!rETn3DX#m?$ope;zxv7r-k(;e9*Eh+Q^0H&sqr&c
zX!+%HFFcn|ky&!rW8%^K!9r0X+F^<JES3NNIww2rti`Fcmh)ePynfhw7Y4sySXFqF
zU+MkM-UP)9K@VqEUJVb~c42AJtEqDw7?%V^UdTDWM|y%p?(~YQm)Vp)Ip=MAzI}`D
z*@9K`k|H)Ko^w03=-Z(Ml3Qxm8z;%BY<+l_Wr^$AVitF!sH-JAZm(*-9DDZsOy1`k
zd~_yysI;zSaw)gBk}FHEY?Pnc_y6#}X|+dI%PMc*I4Az>`#Z)T`{#%jIjf&~eP%<H
z$PVdRmgimp)296i3wZteUPzg^ew<yb@S(r2RI*G@?ukymB09rKKZNh{grzf96>k!V
zTerCD=2O*`DXcFWm!xmmQZ0S-iDI0Ime-^cw_Bb+sM)nx<nf|YlQx(<T{)X;-G%J^
z!bj`_1GR!1H_0u2w{ger#_Ni)n?zH6*o0jxJAEaVUz&en@y92tZzkT`d2boRo710T
zBx0DC^d)_4E^rU1Ejd~o%olPz`rllanXh);I`eADe(S&84s4y3txvX1UBRt>!A9N2
zu;HBMiSnAxLv4z!+eK!d&3@c{rH?gMoHbAA<0%`zwx4!l(=K_<Jl!d|rkZ2p6X~iG
z4UwLYUn`|t%X_m~b^-_Y$8+f`-$h)yGtbG3>$Tg$_GxSDLar&VZtB=!Dj=EUm+T~c
zgEitR+vHkD_tK>i`J1@k{)%UC5ZnJ!a_!CTZubmL=c78uk6N7hrqImy(!{Jz{z&56
zdW8^A@l5}dZ~mpsX*?B_xp1@n%p0MP(kC@J-t~w+t9pGwV2ZUxtf-hkq2Eup6&&C6
z%2WQE)*fpSlFPolWR}_$x7lwOZ}olAQT%V$e6b7CGga)aJ&+9Fcg}IP#f}~B34erV
zzSN9}K4YxWZ#>yHu2)4ueeMH;&3byvi%f6FE@`>5EPDE`^?#x)<mX&$Z4ngu`8kN=
zfxrFNMJx@zHa1&(El)jMIQh`|y$#troMl+$x<0LSHn86If5MR@r^@E-*@bQAQuc2u
zSnyA}_`g=5(+q{WS6%!;y~@c`@}#ymTb%!6al>fN$?UVj5e*F9`g1N=mwnx^dR9OS
ztEjHmj(h+299kaMylQ3a9&?8$Zoyw%GaS{I>VDARPPfv%+Y_U-(3{8Ch<Rc8?HQlu
z9*A+%y8J@!(C+>PQKuhHOBTAPs-4D{b9((+{tfXr?*(7V?~PoXE}`|wkK>-8m%@>M
z6J4{Dj1#B1X<VFiP3xfL%08o(XYMcF-an&|dXe!(CvW|wd#jR8`TM_qBzi=8_snza
zC(jC;9(O!^ixpesVb+6-8o5F&)^?>FSt%R5<ISSf#<Tspn-iYR>h1Zcr9Y`aafeJ%
z+1s08Q@DJ#tbBWgbA{Hyjup-e+&*x;yy8}QY{HI-d5ImSOZH8Q-;kxUG$qRXF3VMO
z{*C)T)tz~;pI7`_U+KAvt0R71mpNyZ$Rl&F!{$bw({Ay90-yeGXmUTAwm2_jvEb4(
zqAP#3q{^PDT*~ZJv-jbeOUW@Fi{<xzDU`QWxj)gPoJCya@V(xk1-)G626xS$Nw{2C
zJ3}Q<`@b=Nm{rXD|2+wAU(L6xtX=eAfsTrDBCpm{hui~4Tc1w)+odLUhVj^(pOG31
zdYmqwvs)Ff`u@g;)O!~~U37Gn7B|T`tzLI2_lmK-e%znDnX@--{rvcn&JAwQ_a;~F
ze2NeK_~XQs<2tjaE;%x1|H*%g#81~XwoG?CmMDGk<4IdFQOgPChRyf)$Xf_K+P?e2
z_Y=RWzWurJN%y?)L7vC=F6Z<LUzsPDo3(7mY`xndyc3S~rfS?O$UYXm|Ho>EoMoPh
zZ@QIw+-DRv9y%6M^rzxZ_V3T^wpAK0a$*9$-Qqo$VX7#2Q-Jm8s`Fd^9d-J3HY)v7
zH%sV}y8i6_1yK=J{*^&fCe)=bvMHSYb={_#ev!F`9~X!@{hr9+ki+OuQy60H+EF3M
zB%Hy&_0N)fWl7QD+rO7jo|LrQKjpwxErGUo)x38*^bYOXxxY^Dc}Zc)#mo8=-}men
ze0k5;;{4q5AG0oYZ8Q6FBuz5i=Ju|~2miBHEaZM8{&6`=PmaX@jopkzuNGcksy=u5
z@$EjwZ5J$!_)~IroQhkh{Qq`YiCWo$BfXxh98bCbF>Tq^=lGtxaN~iQr~6KS_?6Kt
z-R#l3Cr7yRs6kxxsYdIXoku*cYWB69?maDh%jcH6X@bJlpSIgFw@6&R?#|2n=Jkd9
zbxo`pPiF6N+wwnWRn;o@Wzriiem=|Ia@)S($x9iT55>10t~fGRedi$wvt7se*ZHiS
z7`V!nYyNYSh^!kmhu52%MJbeQ<!ck)W$l=McWthre^1T5|C-OWR_@CUV{1CuW`AD$
z`kjXKE0Md78ZTB!ovWpPu}Z|6ccJ>xCE>vhwyqO-PUc_WJzbqv|AuM9rr$F4cOLzo
zZaGop=Q)|=Zw_1U)a9nfxYT_(m?w}MU{vp`{~>aJUYe>EYlMO7lnh?cDU)7hopS#u
zz~|mNdBeZA%kCde_iSRgBj6+`C6@Dxm+whi^hQ?>-z!(b=NHdjW)~e8Q&?_Owm@!y
z@&Ut;SZjv9)H}t|OBl9fmwz!>@pkHj)9P<~gWT@3b?%*T@{1&I=7NIEZ|-iLt!Emv
zzD$dFu;Qj%a_Cz|^P_(&>+iA~<;c#zef;f9t>xV7pGk&`Z2103f2m}w&|xojhP%)2
zo=|;wWR|_xnZn$4waZwa@aG?@Sh0V8@}nQhhjV5)$rY9T6`1pX=}o5h|0ASYj$h+;
z+5BsYtnV*FC(Dz!&e|Mti_0rfEuGiS_<&V{Wv8HX%`DY_X_J$mb6gHJ-!plByxQHX
zo9y4^ycR4CEI!q>KXXYl!z`g`-_F@NhhDQ>z$kU)+Pz}mmGfREH-E2?K2%nGxB8TO
z%)+aY%d(ZePGpuhzZMyj-?FVKRwOXzzR`RCl1sOvclCM&^jv$s`uNq)59@g68*QGY
z`s2W)-_yC=qBiyLl$_mP8n*Mv-}c>G-!H55cYN3S#r;vrx44(LBimHZ&kva@ma=^_
zpY=Yy*C%$k{^P51xF8wT+)#Dtl+au^r`wf+$0z>2m3DLL;*8+b>>ckV7W;kUZN0hG
zPvui|@A;3b9?qN?eUh2SYWs03GYLmi-n7dn3qv)gD)%JWH{@1`s<XYaI(e~s`6LCY
zEj$0uTzA&$aush;_5Ck9h2L2(-0HQZDdad?zDRaX(;oAS@uIJzy2X5cg&&H#EL^s#
zSZ&Q5JwdINj{hF;3Go)rDPJLc^!%p%u11^AzNq29|K0rSyAI7SGuUJ&7%k5}%EWm;
z_4+EKf1v_~=I8vUwanu<Z_8+O>57{dL!_I0(7t6Nsiq0vE$(@36<X|Re_YRC!N+ed
zwMSgOUs5?ZTg+-tsYCz7qw3iKR`xFayY43E+2mO5DZ0VpFBTpwyEF0pqB74rbtmQ=
zyZI<6twrAcVubb2%~M?FX{Ac{$9;44x$G6??;*Y|Rmw2wdG0FVU9<h9gX>!kC?;ER
zTf6_+{`=)x5w)B1e5P!2Px_HR<Ne9*rs?McRD{0R@7Q4>@y7o0>-r0J{davr1t%TM
zeWz*=cE`G{q}oJC_y5BGFCX>Zo1`!$*~ej1Rc58X!rA?EE(D*pkA1e?^I|;H)HTN+
zJ@Px4!uaD<m+ZCDL!Flr4p`JpSoZh!Z&%%--Zh0q7k=_>oIk^xY5%(RU*3lD)epmF
ze`FM2%`5Qn(Pp+cS9^9Y3E-BEi?RLLut#&nrjnI`DtDen*~RS*%0F86DWuHwY<eM6
z(H0v)Udxvi9!G4M9%Y|eS8H*~u)DIh^HF!vbhFbPizX--W;EQkSlD0kM~!jklFvcg
z%h;5sh`h@7X`DUf#2fP}y}dPOc70Dbynik=J;462m3n=<?BTeS)dx-3*Phi->M^<e
z&#vcpiII@Su1F1&ud=feHe^n<+n;jmb(!GPY5Jf4oVV+q*LI~L?cJeDu1V{~Hhb)y
zGGT`m^V;3l!j?_EG~eo%r08dn?@FTeUm2GqcD`5AFZ<~3?aRUPomWjh{l=ubn^nuL
zch6kEu{bv_H2GrOa>D@6${oTYlkb|=wXyfk-=|VgZ{j*V;l!o{P6Ml5vKQC$t};Ap
zbVK67wJBGRd^ss|KK%O4l`;h}hqZN29v6OCW8cxFziO+H^W!Z{8eE<M=~Mn~s&blA
zVUyN7bMfxT#Dyh~rdL%vnycjOob;o({oK66++jV9ks|j`e^rz{Hcipao?~l+8S{xF
zmp+~;UKQ#5dMmG=cFmUK#!{F3wEXy*IOm`8`1WH3=d<pgr(JGtHP6>DJe_NCpkLKB
zDKqT(2Pvx<Gfnq@vPLuCeR{F%NRC#@8J_8?@f$*&?DHmWpLF$m!cMR5g@1M5DC}%4
z4p<WZzF;yN+wRKgt5qFMy{Fb*%haBheeU$El#T2!cb;m|oO77RJM~ta)B7#Y?M(Ex
z&$WJ9SiNdy#;VEh)*e2S&^>jkahmL=Y0Mp5Rkx#c&UZ|>6Q<HT#hhm*U$gKU$L86A
z*J{~k{FcqI>sMi4ux-z`fQM<xUi!wt%U_=0aWL~;`s_~Mgr?<=ODk8e?lOreJeczI
zOIvr(2mZ@h*RD)VVx3ZZXxitJ+80}G-{;#Jp7?mFb9uA)pY@w=pF478qx8{|CjzT(
zm@_YH&&U<qcr7z~+H;la1DnE+ROX!P5$bz$@9fb>iN{(_Jv%n%kfT@GV!J8PtiL8*
zv=O-e+PnUyEq|+lnBl+q>Xue(g-+eQBmc2u;){t38MgZTs@06#Rnyj2$n57nZ;Qs(
z-xF;vi|l_X>KkNb&htfBrn+sT&&8dppJQ%b3+=jc_Mkx5)$ehNCfCzN*2qVTznWhV
zm2jyqOJo<rmYf$~s(nQ^bG=WKUC?N)cy%{_-93Twh0?A!Ys@bi&Zr5ivpJc3VYBO<
zSLKJDrH<Cg&DwQ#;S2AehWIcp1~ZxGhBr<bFTU^csy9dU(2DGn<u43Y99DiCxYHm{
z_nNx&CjA+z@jtqHy=HDdwY()wY`6TrcC*wcdrnRE+_$5p%Sb8Kcn^2%KPxHY@JQ35
z+J#r<XWmNTD)4>wapte{M*N0yZs(Nq7f2jto|3=u)a|49<gdE?yp#80fx}EzmRl2+
z2VUmne>r=Fqw$rtrSZ#Ww@Fqj&sy%sVf9^nf3+|78pYt5p1k{Iq@UHVXq<XJFT-0q
zUDb-~T=;gk-EO@c`ywTeU0Jy;%;}>cUwowSh4|<3Z@Ffr?lYLpb^31pYOVPk6^p!e
z%oi$s%Gk|c@v%e0#BuHZy{eaf-}QJI8THCLa{iTDQx)UqonWeVT%VP+yZ>!+cfDF3
zYs-;E&L0Z=&qQzk{U;{Fj{lKzj>VrvNBKGImU)PlbnrI)x%BYr9ot6>--T?kVX?Be
z+GQ_#Yn|zy)i-5wR-K&?{Bot_lXJQ`+ppOD(cscMe`e1FWz(5On*68seaKq*%wnp|
z|Ku0@vZN;l<vx63SyvJm7__DBbhgKF#R=c#j%F683YtkS-M+Kvl2Pu#Ssy;e=N-7n
zc8=j4SNI%pzJHIOIsNUETxV+QAGN(_)t4<?)i3xoSkH*LqzGlEZq_|$Z^<-yb@Tly
zC5BB3v42CgeKzu2%G}-2zWeWyf~Y+)g0gc{*Oyx63KmK&NIJ&qcVJ}(Yr!Ki1;vNG
zo8lWo;&aT6y5nt(|1#`mQBVDN$>NT~hwkrOn_TA?UOCTO>sNZ_(@fLg>fCs*3bkkT
zcWf`N&`@yr!=3-zT-{g2k=tXH&YL|G)fV2mD{QFnpxN~BwN(@LB(Kimn0Qybe5w4r
z(5cthmzK_WHQoAFvI|cn=Qe4kMV3>%IO>DD&q^<!YIk6l2JeqW=Wp^iPf?2Qp0(}%
z@2eH}UAC=!72~==?W95loA6#s=?gxkd{0fziGI2Nu+OCTPm=mEMhl;<H&(4aa_rX(
zMfNxEmU}Ji+mhdI-F5i#7iOc+1?t>)KZ(lCJ}b3!$<eRArd?-BbtdMYuVdDo*nV1k
z<Izlkv)^yUz6cV?KXd4M$y+|N-;3Xg+}@g*d!MN~>J;OgkVQ#XeRJ~PJ^EMdc%jon
za@WETxfOr@Oe&IJ+Apfz7cWqo*87vs|InH(XSG^x$1a<@(ChZ<gIes$_H6MiA2*d3
z#e0c)OyFrrJwNgJ+?7n*cv*}WUMYGfdwxFCQrFH1RjZeG9d`TfY^nM(=c~&JzhzTq
zuD3mXq-JYF(tGC#W^XnG1l=fQH~f?%x&8j6*thE4Y_(jLtM;Zfo}L+Z`OPaE+lGkJ
zr`1W4kFp;b-_QJ}w2#NAb$`yRfUm!1uKkv{g;T{NLbOM(@L$J$tNMG)d&E5N{|Jw0
zyA<3XwZHR^;lAxoacnPFI=$_`kUaV4eu?ZyQ<SadJ(ZoXJ4Ss)*~4qqwgq3lUsu|_
z@LprPS<$!2p=s6(GJ987Z_`nK+LxNF86h=A;MJyQA_<137ksBw^)P6y{r>Yk-(t4U
zfqL=_qB2WU*B)6G@6^S7|LeP%<+b@6);sSt>1CX<$JffUj6rhqr8f+J1B-7e^)l9%
zNxSaPsgU-(zN}eC?C6B$ms|AH<&SNBE~TRw5a-NQ`qxz~p82r2(yLFhNsY6@I3us+
za?YuECm(XBDCuj<Gn>F;ugpu--ImU{Z^-rS<Jx}??NbD-CTD$FAv^nu@9GKbQqOAK
zouJaOYmLa!7hi6b&5)>)(tVMf@Fi=exlGdG*#VMT?~To8eZ48U?Y()gNd|L3;s))N
z_7>8|+*V03{J5|sI`vzWy0lJn{hImx8_f&O3i75T3uSLSYu_2M{>ZiX3)*rn&01-D
zJ71~&WiF6th<9HouYdE**`zrs^{YL6*XV4W6~^i2b7a3;^TCxlrv-|hJH)07gzeu~
zb6nvQ`!0#e7r7LYSUw+kcc3OD|3}Mp`KZ%ohq$|zdGC>xU6QWpyxRF)x6WUWY*okk
zOn)59-X3K+bZy!0Z)(BG+yA^gu4?#kM|R*T%}90CeK%LQJ7^0?Ja~EV(x**-YyRff
z{bt$qa*gE8cRFX5#XWcE{i2;dd6&q#9}bU>cElWVUc9bebjq=1bYX({QrR&li8
z?e;6@gqGy-oiGT|+)>VQg!_G#smJ^?w;y^fo;i^-*kt9J)f(4|4>~>D$b58zkIuA$
zN2|}zRm<DI`i?I@k9Ay>-%F(fGfZyzUOc+Pd|&_UDbH4#?!0-7XOB?d^{m)9pDiW@
zX$%oL6=8-Ju1*RH3JS&+CPpAy!PwHEg?+1kny#h3(ax!&Ivc0VT34{LhKHAB@q4k2
zW@jxP=G<J&-pBCo|C@Vr_o!cRQg3{7syKA%UI)n#4;ByZ@{=~{zZ#<Sims`A+bvSP
z^;mzp`Qyk}|ALjKTvd@27v178D|_~nTjFi&{Z}366;%CbV#;U9XSsLzw7(D2**+d}
zyZ!bT&)vN5Md_~jc^khTU1yoyXLsdO-}3scHwAl_GAd_&sZCq>DASkC{I#Zq#3!j;
z^QEPy-4uWQu5=Bj_U*gUIg@N}g({xsf5B(G`%FQhSGI3l2g8fkli1y3{AYi0OWy0~
za$!ZK-sKPfU3J^DS<*C4pWNg0chZC~*1ka5#EpgGyJMb|PZwRf<e+P2&couFYRh6&
zH@uj%(tX+cy;9dt{Qvdz+^?RcOI2&md(Tc;A#!D@$m67|dcM=MjBm-5J?NY0v%{S;
zTqR{?%A{kR=?<kF=_zk{o^O9C8hS#tVRBe+w$;zF*k7JeeQEF3J+J4gv)GsOZL)G*
z61Rrs_sJ?VwH~i%3d;)myzX4g+rX34*iW*#<h(8Y+m^j0{j0#{Rbs6PX*Z)jGv3d<
zJ3~Xo_jl@&ih2$Mi`mPB{sqkXX&W=!+mAa@eBEJXx9k7;PoH(|=t$+?ysxa*Lf!bT
z#^(u=*EhYt{`%KtS@#!DZ|(?ZNMN~tolEwDMOLwtb5?hy)KzbNx#|mvYutYNRAzq>
zHrPLlwX@^5de5TQd?ytSt+CI(60l{_T!y@~>~(9!GJRH9m;Ok2##lA0i^D!4GuiyF
zHj_t@ff!G+#-er6@@3ENCTI0k_`YKi`TD%>g;IHF&S?Rm@1J^CeO%(&w)3S-;e!|J
zr~F$~*b(3K;N~yJ{Z+FUPv~FPamz&F0Bgq1XB^VIN}4VSbPAu&o1LF>cJ5W13fcQj
zc8f3W6Fw(@JDqnwZ`*`K_6xE%^UoBkWgFfwG_+aYadrOZJ@4b~Le}S>37WOIUd6}A
zwCiG3oYOK%Gu0#AlWyGpnzrTFsb(juz5h%79qPi*ANqb~n{|Bf9*g7gvz(6Kw*LM_
z+FSloMsn8mvY5Slr)Pw%YyW!f`~60aBSK#GXDv^uPWL(;r7E~xozJ`cw7-X;&4+}`
zOOA;rpWozse0zCzv&f;dHs>x@r%gUR>0gx_ljpAUr4lP<y|XkcJI~9*{n>Tl>otcC
z-}Tt>nZ3~OM%xX)caxXO?wiJxs4Ktfy^VA1GTrTVe`7wCyyL#7v`ovYb;-O~u>fyo
z77+#p1`dY6c=f=jw@l5!3=9l?3=9mC3=9m#$%#1y@l}<1g$2d&WtsW$2Jr@ZnR&@Y
z+$YbRJ>%V9?y2M1Q+`^%>-!mRJ+HIAXSF@g6rMh*ukWpEbj8@*C`iLk_mt0>lWV+m
zPM$fxd6Sop*SQlq-k}C2p#}j4%t;D|*m?siBrau4;ARN$W@Hj!M!4nV_tj^2GBPmS
zWMN=nXMg}k1_p*DjUaYPa)Dk&ZVtMp6Bk#{UT~U$;a4peg9Jz&0|Ns@(>+EU-bqbK
zLpP-^M4h>ufq`Kz0|SE`iYZ&p;xMHswK%`DC^@wl-7L3nv$e$;85lYl85pEd%t}9p
z-K_ZHlF}r-GIWDp3!4;gV_;yA;9x-W+V=C<4bm&e^jb}2WMUBm1H&c;1_os$=e%uP
zd;z;D@tJw?$@zIDsTC!96)DN+&f5CmzN;}S1H&J2gtI{AE@=$Ah}}TFqLf5*Q(pUi
zwAN;1U=U+M5Apriu$ux6rHmAeG;s2h|N0Z$3=Cgn85pEMPJ!YjjcPZro26Hrkywz5
z?j|OuSH)YeF)(bn#=syBH3LK~X;gcH!<>pdbVJZ{6vzNbf)v=zh&z7;c(byBlyWn0
zGw?DqFwEM`$e_pIYEog6?`y1|nv#>^l<npn5$PY49Z;N~sP7nNWUlR1V3BK{SYi}r
KS&&~<YzqK|##!tD
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_sim_netlist.v
deleted file mode 100755
index 7d50f39..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_sim_netlist.v
+++ /dev/null
@@ -1,7217 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:35 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_vio_0_0_sim_netlist.v
-// Design : scalp_zynqps_vio_0_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_vio_0_0,vio,{}" *) (* X_CORE_INFO = "vio,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix
- (clk,
- probe_out0);
- input clk;
- output [0:0]probe_out0;
-
- wire clk;
- wire [0:0]probe_out0;
- wire [0:0]NLW_inst_probe_out1_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out10_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out100_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out101_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out102_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out103_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out104_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out105_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out106_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out107_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out108_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out109_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out11_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out110_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out111_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out112_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out113_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out114_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out115_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out116_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out117_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out118_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out119_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out12_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out120_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out121_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out122_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out123_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out124_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out125_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out126_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out127_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out128_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out129_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out13_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out130_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out131_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out132_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out133_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out134_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out135_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out136_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out137_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out138_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out139_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out14_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out140_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out141_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out142_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out143_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out144_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out145_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out146_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out147_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out148_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out149_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out15_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out150_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out151_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out152_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out153_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out154_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out155_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out156_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out157_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out158_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out159_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out16_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out160_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out161_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out162_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out163_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out164_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out165_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out166_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out167_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out168_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out169_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out17_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out170_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out171_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out172_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out173_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out174_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out175_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out176_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out177_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out178_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out179_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out18_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out180_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out181_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out182_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out183_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out184_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out185_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out186_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out187_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out188_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out189_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out19_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out190_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out191_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out192_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out193_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out194_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out195_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out196_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out197_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out198_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out199_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out2_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out20_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out200_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out201_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out202_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out203_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out204_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out205_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out206_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out207_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out208_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out209_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out21_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out210_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out211_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out212_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out213_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out214_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out215_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out216_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out217_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out218_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out219_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out22_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out220_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out221_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out222_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out223_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out224_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out225_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out226_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out227_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out228_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out229_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out23_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out230_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out231_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out232_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out233_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out234_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out235_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out236_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out237_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out238_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out239_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out24_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out240_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out241_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out242_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out243_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out244_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out245_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out246_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out247_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out248_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out249_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out25_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out250_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out251_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out252_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out253_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out254_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out255_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out26_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out27_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out28_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out29_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out3_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out30_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out31_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out32_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out33_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out34_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out35_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out36_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out37_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out38_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out39_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out4_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out40_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out41_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out42_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out43_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out44_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out45_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out46_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out47_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out48_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out49_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out5_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out50_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out51_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out52_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out53_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out54_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out55_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out56_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out57_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out58_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out59_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out6_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out60_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out61_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out62_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out63_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out64_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out65_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out66_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out67_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out68_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out69_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out7_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out70_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out71_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out72_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out73_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out74_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out75_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out76_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out77_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out78_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out79_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out8_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out80_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out81_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out82_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out83_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out84_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out85_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out86_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out87_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out88_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out89_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out9_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out90_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out91_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out92_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out93_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out94_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out95_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out96_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out97_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out98_UNCONNECTED;
- wire [0:0]NLW_inst_probe_out99_UNCONNECTED;
- wire [16:0]NLW_inst_sl_oport0_UNCONNECTED;
-
- (* C_BUILD_REVISION = "0" *)
- (* C_BUS_ADDR_WIDTH = "17" *)
- (* C_BUS_DATA_WIDTH = "16" *)
- (* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_MAJOR_VER = "2" *)
- (* C_CORE_MINOR_ALPHA_VER = "97" *)
- (* C_CORE_MINOR_VER = "0" *)
- (* C_CORE_TYPE = "2" *)
- (* C_CSE_DRV_VER = "1" *)
- (* C_EN_PROBE_IN_ACTIVITY = "0" *)
- (* C_EN_SYNCHRONIZATION = "1" *)
- (* C_MAJOR_VERSION = "2013" *)
- (* C_MAX_NUM_PROBE = "256" *)
- (* C_MAX_WIDTH_PER_PROBE = "256" *)
- (* C_MINOR_VERSION = "1" *)
- (* C_NEXT_SLAVE = "0" *)
- (* C_NUM_PROBE_IN = "0" *)
- (* C_NUM_PROBE_OUT = "1" *)
- (* C_PIPE_IFACE = "0" *)
- (* C_PROBE_IN0_WIDTH = "1" *)
- (* C_PROBE_IN100_WIDTH = "1" *)
- (* C_PROBE_IN101_WIDTH = "1" *)
- (* C_PROBE_IN102_WIDTH = "1" *)
- (* C_PROBE_IN103_WIDTH = "1" *)
- (* C_PROBE_IN104_WIDTH = "1" *)
- (* C_PROBE_IN105_WIDTH = "1" *)
- (* C_PROBE_IN106_WIDTH = "1" *)
- (* C_PROBE_IN107_WIDTH = "1" *)
- (* C_PROBE_IN108_WIDTH = "1" *)
- (* C_PROBE_IN109_WIDTH = "1" *)
- (* C_PROBE_IN10_WIDTH = "1" *)
- (* C_PROBE_IN110_WIDTH = "1" *)
- (* C_PROBE_IN111_WIDTH = "1" *)
- (* C_PROBE_IN112_WIDTH = "1" *)
- (* C_PROBE_IN113_WIDTH = "1" *)
- (* C_PROBE_IN114_WIDTH = "1" *)
- (* C_PROBE_IN115_WIDTH = "1" *)
- (* C_PROBE_IN116_WIDTH = "1" *)
- (* C_PROBE_IN117_WIDTH = "1" *)
- (* C_PROBE_IN118_WIDTH = "1" *)
- (* C_PROBE_IN119_WIDTH = "1" *)
- (* C_PROBE_IN11_WIDTH = "1" *)
- (* C_PROBE_IN120_WIDTH = "1" *)
- (* C_PROBE_IN121_WIDTH = "1" *)
- (* C_PROBE_IN122_WIDTH = "1" *)
- (* C_PROBE_IN123_WIDTH = "1" *)
- (* C_PROBE_IN124_WIDTH = "1" *)
- (* C_PROBE_IN125_WIDTH = "1" *)
- (* C_PROBE_IN126_WIDTH = "1" *)
- (* C_PROBE_IN127_WIDTH = "1" *)
- (* C_PROBE_IN128_WIDTH = "1" *)
- (* C_PROBE_IN129_WIDTH = "1" *)
- (* C_PROBE_IN12_WIDTH = "1" *)
- (* C_PROBE_IN130_WIDTH = "1" *)
- (* C_PROBE_IN131_WIDTH = "1" *)
- (* C_PROBE_IN132_WIDTH = "1" *)
- (* C_PROBE_IN133_WIDTH = "1" *)
- (* C_PROBE_IN134_WIDTH = "1" *)
- (* C_PROBE_IN135_WIDTH = "1" *)
- (* C_PROBE_IN136_WIDTH = "1" *)
- (* C_PROBE_IN137_WIDTH = "1" *)
- (* C_PROBE_IN138_WIDTH = "1" *)
- (* C_PROBE_IN139_WIDTH = "1" *)
- (* C_PROBE_IN13_WIDTH = "1" *)
- (* C_PROBE_IN140_WIDTH = "1" *)
- (* C_PROBE_IN141_WIDTH = "1" *)
- (* C_PROBE_IN142_WIDTH = "1" *)
- (* C_PROBE_IN143_WIDTH = "1" *)
- (* C_PROBE_IN144_WIDTH = "1" *)
- (* C_PROBE_IN145_WIDTH = "1" *)
- (* C_PROBE_IN146_WIDTH = "1" *)
- (* C_PROBE_IN147_WIDTH = "1" *)
- (* C_PROBE_IN148_WIDTH = "1" *)
- (* C_PROBE_IN149_WIDTH = "1" *)
- (* C_PROBE_IN14_WIDTH = "1" *)
- (* C_PROBE_IN150_WIDTH = "1" *)
- (* C_PROBE_IN151_WIDTH = "1" *)
- (* C_PROBE_IN152_WIDTH = "1" *)
- (* C_PROBE_IN153_WIDTH = "1" *)
- (* C_PROBE_IN154_WIDTH = "1" *)
- (* C_PROBE_IN155_WIDTH = "1" *)
- (* C_PROBE_IN156_WIDTH = "1" *)
- (* C_PROBE_IN157_WIDTH = "1" *)
- (* C_PROBE_IN158_WIDTH = "1" *)
- (* C_PROBE_IN159_WIDTH = "1" *)
- (* C_PROBE_IN15_WIDTH = "1" *)
- (* C_PROBE_IN160_WIDTH = "1" *)
- (* C_PROBE_IN161_WIDTH = "1" *)
- (* C_PROBE_IN162_WIDTH = "1" *)
- (* C_PROBE_IN163_WIDTH = "1" *)
- (* C_PROBE_IN164_WIDTH = "1" *)
- (* C_PROBE_IN165_WIDTH = "1" *)
- (* C_PROBE_IN166_WIDTH = "1" *)
- (* C_PROBE_IN167_WIDTH = "1" *)
- (* C_PROBE_IN168_WIDTH = "1" *)
- (* C_PROBE_IN169_WIDTH = "1" *)
- (* C_PROBE_IN16_WIDTH = "1" *)
- (* C_PROBE_IN170_WIDTH = "1" *)
- (* C_PROBE_IN171_WIDTH = "1" *)
- (* C_PROBE_IN172_WIDTH = "1" *)
- (* C_PROBE_IN173_WIDTH = "1" *)
- (* C_PROBE_IN174_WIDTH = "1" *)
- (* C_PROBE_IN175_WIDTH = "1" *)
- (* C_PROBE_IN176_WIDTH = "1" *)
- (* C_PROBE_IN177_WIDTH = "1" *)
- (* C_PROBE_IN178_WIDTH = "1" *)
- (* C_PROBE_IN179_WIDTH = "1" *)
- (* C_PROBE_IN17_WIDTH = "1" *)
- (* C_PROBE_IN180_WIDTH = "1" *)
- (* C_PROBE_IN181_WIDTH = "1" *)
- (* C_PROBE_IN182_WIDTH = "1" *)
- (* C_PROBE_IN183_WIDTH = "1" *)
- (* C_PROBE_IN184_WIDTH = "1" *)
- (* C_PROBE_IN185_WIDTH = "1" *)
- (* C_PROBE_IN186_WIDTH = "1" *)
- (* C_PROBE_IN187_WIDTH = "1" *)
- (* C_PROBE_IN188_WIDTH = "1" *)
- (* C_PROBE_IN189_WIDTH = "1" *)
- (* C_PROBE_IN18_WIDTH = "1" *)
- (* C_PROBE_IN190_WIDTH = "1" *)
- (* C_PROBE_IN191_WIDTH = "1" *)
- (* C_PROBE_IN192_WIDTH = "1" *)
- (* C_PROBE_IN193_WIDTH = "1" *)
- (* C_PROBE_IN194_WIDTH = "1" *)
- (* C_PROBE_IN195_WIDTH = "1" *)
- (* C_PROBE_IN196_WIDTH = "1" *)
- (* C_PROBE_IN197_WIDTH = "1" *)
- (* C_PROBE_IN198_WIDTH = "1" *)
- (* C_PROBE_IN199_WIDTH = "1" *)
- (* C_PROBE_IN19_WIDTH = "1" *)
- (* C_PROBE_IN1_WIDTH = "1" *)
- (* C_PROBE_IN200_WIDTH = "1" *)
- (* C_PROBE_IN201_WIDTH = "1" *)
- (* C_PROBE_IN202_WIDTH = "1" *)
- (* C_PROBE_IN203_WIDTH = "1" *)
- (* C_PROBE_IN204_WIDTH = "1" *)
- (* C_PROBE_IN205_WIDTH = "1" *)
- (* C_PROBE_IN206_WIDTH = "1" *)
- (* C_PROBE_IN207_WIDTH = "1" *)
- (* C_PROBE_IN208_WIDTH = "1" *)
- (* C_PROBE_IN209_WIDTH = "1" *)
- (* C_PROBE_IN20_WIDTH = "1" *)
- (* C_PROBE_IN210_WIDTH = "1" *)
- (* C_PROBE_IN211_WIDTH = "1" *)
- (* C_PROBE_IN212_WIDTH = "1" *)
- (* C_PROBE_IN213_WIDTH = "1" *)
- (* C_PROBE_IN214_WIDTH = "1" *)
- (* C_PROBE_IN215_WIDTH = "1" *)
- (* C_PROBE_IN216_WIDTH = "1" *)
- (* C_PROBE_IN217_WIDTH = "1" *)
- (* C_PROBE_IN218_WIDTH = "1" *)
- (* C_PROBE_IN219_WIDTH = "1" *)
- (* C_PROBE_IN21_WIDTH = "1" *)
- (* C_PROBE_IN220_WIDTH = "1" *)
- (* C_PROBE_IN221_WIDTH = "1" *)
- (* C_PROBE_IN222_WIDTH = "1" *)
- (* C_PROBE_IN223_WIDTH = "1" *)
- (* C_PROBE_IN224_WIDTH = "1" *)
- (* C_PROBE_IN225_WIDTH = "1" *)
- (* C_PROBE_IN226_WIDTH = "1" *)
- (* C_PROBE_IN227_WIDTH = "1" *)
- (* C_PROBE_IN228_WIDTH = "1" *)
- (* C_PROBE_IN229_WIDTH = "1" *)
- (* C_PROBE_IN22_WIDTH = "1" *)
- (* C_PROBE_IN230_WIDTH = "1" *)
- (* C_PROBE_IN231_WIDTH = "1" *)
- (* C_PROBE_IN232_WIDTH = "1" *)
- (* C_PROBE_IN233_WIDTH = "1" *)
- (* C_PROBE_IN234_WIDTH = "1" *)
- (* C_PROBE_IN235_WIDTH = "1" *)
- (* C_PROBE_IN236_WIDTH = "1" *)
- (* C_PROBE_IN237_WIDTH = "1" *)
- (* C_PROBE_IN238_WIDTH = "1" *)
- (* C_PROBE_IN239_WIDTH = "1" *)
- (* C_PROBE_IN23_WIDTH = "1" *)
- (* C_PROBE_IN240_WIDTH = "1" *)
- (* C_PROBE_IN241_WIDTH = "1" *)
- (* C_PROBE_IN242_WIDTH = "1" *)
- (* C_PROBE_IN243_WIDTH = "1" *)
- (* C_PROBE_IN244_WIDTH = "1" *)
- (* C_PROBE_IN245_WIDTH = "1" *)
- (* C_PROBE_IN246_WIDTH = "1" *)
- (* C_PROBE_IN247_WIDTH = "1" *)
- (* C_PROBE_IN248_WIDTH = "1" *)
- (* C_PROBE_IN249_WIDTH = "1" *)
- (* C_PROBE_IN24_WIDTH = "1" *)
- (* C_PROBE_IN250_WIDTH = "1" *)
- (* C_PROBE_IN251_WIDTH = "1" *)
- (* C_PROBE_IN252_WIDTH = "1" *)
- (* C_PROBE_IN253_WIDTH = "1" *)
- (* C_PROBE_IN254_WIDTH = "1" *)
- (* C_PROBE_IN255_WIDTH = "1" *)
- (* C_PROBE_IN25_WIDTH = "1" *)
- (* C_PROBE_IN26_WIDTH = "1" *)
- (* C_PROBE_IN27_WIDTH = "1" *)
- (* C_PROBE_IN28_WIDTH = "1" *)
- (* C_PROBE_IN29_WIDTH = "1" *)
- (* C_PROBE_IN2_WIDTH = "1" *)
- (* C_PROBE_IN30_WIDTH = "1" *)
- (* C_PROBE_IN31_WIDTH = "1" *)
- (* C_PROBE_IN32_WIDTH = "1" *)
- (* C_PROBE_IN33_WIDTH = "1" *)
- (* C_PROBE_IN34_WIDTH = "1" *)
- (* C_PROBE_IN35_WIDTH = "1" *)
- (* C_PROBE_IN36_WIDTH = "1" *)
- (* C_PROBE_IN37_WIDTH = "1" *)
- (* C_PROBE_IN38_WIDTH = "1" *)
- (* C_PROBE_IN39_WIDTH = "1" *)
- (* C_PROBE_IN3_WIDTH = "1" *)
- (* C_PROBE_IN40_WIDTH = "1" *)
- (* C_PROBE_IN41_WIDTH = "1" *)
- (* C_PROBE_IN42_WIDTH = "1" *)
- (* C_PROBE_IN43_WIDTH = "1" *)
- (* C_PROBE_IN44_WIDTH = "1" *)
- (* C_PROBE_IN45_WIDTH = "1" *)
- (* C_PROBE_IN46_WIDTH = "1" *)
- (* C_PROBE_IN47_WIDTH = "1" *)
- (* C_PROBE_IN48_WIDTH = "1" *)
- (* C_PROBE_IN49_WIDTH = "1" *)
- (* C_PROBE_IN4_WIDTH = "1" *)
- (* C_PROBE_IN50_WIDTH = "1" *)
- (* C_PROBE_IN51_WIDTH = "1" *)
- (* C_PROBE_IN52_WIDTH = "1" *)
- (* C_PROBE_IN53_WIDTH = "1" *)
- (* C_PROBE_IN54_WIDTH = "1" *)
- (* C_PROBE_IN55_WIDTH = "1" *)
- (* C_PROBE_IN56_WIDTH = "1" *)
- (* C_PROBE_IN57_WIDTH = "1" *)
- (* C_PROBE_IN58_WIDTH = "1" *)
- (* C_PROBE_IN59_WIDTH = "1" *)
- (* C_PROBE_IN5_WIDTH = "1" *)
- (* C_PROBE_IN60_WIDTH = "1" *)
- (* C_PROBE_IN61_WIDTH = "1" *)
- (* C_PROBE_IN62_WIDTH = "1" *)
- (* C_PROBE_IN63_WIDTH = "1" *)
- (* C_PROBE_IN64_WIDTH = "1" *)
- (* C_PROBE_IN65_WIDTH = "1" *)
- (* C_PROBE_IN66_WIDTH = "1" *)
- (* C_PROBE_IN67_WIDTH = "1" *)
- (* C_PROBE_IN68_WIDTH = "1" *)
- (* C_PROBE_IN69_WIDTH = "1" *)
- (* C_PROBE_IN6_WIDTH = "1" *)
- (* C_PROBE_IN70_WIDTH = "1" *)
- (* C_PROBE_IN71_WIDTH = "1" *)
- (* C_PROBE_IN72_WIDTH = "1" *)
- (* C_PROBE_IN73_WIDTH = "1" *)
- (* C_PROBE_IN74_WIDTH = "1" *)
- (* C_PROBE_IN75_WIDTH = "1" *)
- (* C_PROBE_IN76_WIDTH = "1" *)
- (* C_PROBE_IN77_WIDTH = "1" *)
- (* C_PROBE_IN78_WIDTH = "1" *)
- (* C_PROBE_IN79_WIDTH = "1" *)
- (* C_PROBE_IN7_WIDTH = "1" *)
- (* C_PROBE_IN80_WIDTH = "1" *)
- (* C_PROBE_IN81_WIDTH = "1" *)
- (* C_PROBE_IN82_WIDTH = "1" *)
- (* C_PROBE_IN83_WIDTH = "1" *)
- (* C_PROBE_IN84_WIDTH = "1" *)
- (* C_PROBE_IN85_WIDTH = "1" *)
- (* C_PROBE_IN86_WIDTH = "1" *)
- (* C_PROBE_IN87_WIDTH = "1" *)
- (* C_PROBE_IN88_WIDTH = "1" *)
- (* C_PROBE_IN89_WIDTH = "1" *)
- (* C_PROBE_IN8_WIDTH = "1" *)
- (* C_PROBE_IN90_WIDTH = "1" *)
- (* C_PROBE_IN91_WIDTH = "1" *)
- (* C_PROBE_IN92_WIDTH = "1" *)
- (* C_PROBE_IN93_WIDTH = "1" *)
- (* C_PROBE_IN94_WIDTH = "1" *)
- (* C_PROBE_IN95_WIDTH = "1" *)
- (* C_PROBE_IN96_WIDTH = "1" *)
- (* C_PROBE_IN97_WIDTH = "1" *)
- (* C_PROBE_IN98_WIDTH = "1" *)
- (* C_PROBE_IN99_WIDTH = "1" *)
- (* C_PROBE_IN9_WIDTH = "1" *)
- (* C_PROBE_OUT0_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT0_WIDTH = "1" *)
- (* C_PROBE_OUT100_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT100_WIDTH = "1" *)
- (* C_PROBE_OUT101_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT101_WIDTH = "1" *)
- (* C_PROBE_OUT102_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT102_WIDTH = "1" *)
- (* C_PROBE_OUT103_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT103_WIDTH = "1" *)
- (* C_PROBE_OUT104_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT104_WIDTH = "1" *)
- (* C_PROBE_OUT105_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT105_WIDTH = "1" *)
- (* C_PROBE_OUT106_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT106_WIDTH = "1" *)
- (* C_PROBE_OUT107_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT107_WIDTH = "1" *)
- (* C_PROBE_OUT108_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT108_WIDTH = "1" *)
- (* C_PROBE_OUT109_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT109_WIDTH = "1" *)
- (* C_PROBE_OUT10_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT10_WIDTH = "1" *)
- (* C_PROBE_OUT110_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT110_WIDTH = "1" *)
- (* C_PROBE_OUT111_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT111_WIDTH = "1" *)
- (* C_PROBE_OUT112_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT112_WIDTH = "1" *)
- (* C_PROBE_OUT113_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT113_WIDTH = "1" *)
- (* C_PROBE_OUT114_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT114_WIDTH = "1" *)
- (* C_PROBE_OUT115_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT115_WIDTH = "1" *)
- (* C_PROBE_OUT116_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT116_WIDTH = "1" *)
- (* C_PROBE_OUT117_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT117_WIDTH = "1" *)
- (* C_PROBE_OUT118_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT118_WIDTH = "1" *)
- (* C_PROBE_OUT119_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT119_WIDTH = "1" *)
- (* C_PROBE_OUT11_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT11_WIDTH = "1" *)
- (* C_PROBE_OUT120_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT120_WIDTH = "1" *)
- (* C_PROBE_OUT121_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT121_WIDTH = "1" *)
- (* C_PROBE_OUT122_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT122_WIDTH = "1" *)
- (* C_PROBE_OUT123_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT123_WIDTH = "1" *)
- (* C_PROBE_OUT124_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT124_WIDTH = "1" *)
- (* C_PROBE_OUT125_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT125_WIDTH = "1" *)
- (* C_PROBE_OUT126_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT126_WIDTH = "1" *)
- (* C_PROBE_OUT127_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT127_WIDTH = "1" *)
- (* C_PROBE_OUT128_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT128_WIDTH = "1" *)
- (* C_PROBE_OUT129_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT129_WIDTH = "1" *)
- (* C_PROBE_OUT12_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT12_WIDTH = "1" *)
- (* C_PROBE_OUT130_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT130_WIDTH = "1" *)
- (* C_PROBE_OUT131_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT131_WIDTH = "1" *)
- (* C_PROBE_OUT132_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT132_WIDTH = "1" *)
- (* C_PROBE_OUT133_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT133_WIDTH = "1" *)
- (* C_PROBE_OUT134_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT134_WIDTH = "1" *)
- (* C_PROBE_OUT135_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT135_WIDTH = "1" *)
- (* C_PROBE_OUT136_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT136_WIDTH = "1" *)
- (* C_PROBE_OUT137_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT137_WIDTH = "1" *)
- (* C_PROBE_OUT138_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT138_WIDTH = "1" *)
- (* C_PROBE_OUT139_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT139_WIDTH = "1" *)
- (* C_PROBE_OUT13_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT13_WIDTH = "1" *)
- (* C_PROBE_OUT140_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT140_WIDTH = "1" *)
- (* C_PROBE_OUT141_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT141_WIDTH = "1" *)
- (* C_PROBE_OUT142_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT142_WIDTH = "1" *)
- (* C_PROBE_OUT143_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT143_WIDTH = "1" *)
- (* C_PROBE_OUT144_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT144_WIDTH = "1" *)
- (* C_PROBE_OUT145_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT145_WIDTH = "1" *)
- (* C_PROBE_OUT146_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT146_WIDTH = "1" *)
- (* C_PROBE_OUT147_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT147_WIDTH = "1" *)
- (* C_PROBE_OUT148_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT148_WIDTH = "1" *)
- (* C_PROBE_OUT149_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT149_WIDTH = "1" *)
- (* C_PROBE_OUT14_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT14_WIDTH = "1" *)
- (* C_PROBE_OUT150_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT150_WIDTH = "1" *)
- (* C_PROBE_OUT151_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT151_WIDTH = "1" *)
- (* C_PROBE_OUT152_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT152_WIDTH = "1" *)
- (* C_PROBE_OUT153_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT153_WIDTH = "1" *)
- (* C_PROBE_OUT154_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT154_WIDTH = "1" *)
- (* C_PROBE_OUT155_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT155_WIDTH = "1" *)
- (* C_PROBE_OUT156_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT156_WIDTH = "1" *)
- (* C_PROBE_OUT157_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT157_WIDTH = "1" *)
- (* C_PROBE_OUT158_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT158_WIDTH = "1" *)
- (* C_PROBE_OUT159_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT159_WIDTH = "1" *)
- (* C_PROBE_OUT15_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT15_WIDTH = "1" *)
- (* C_PROBE_OUT160_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT160_WIDTH = "1" *)
- (* C_PROBE_OUT161_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT161_WIDTH = "1" *)
- (* C_PROBE_OUT162_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT162_WIDTH = "1" *)
- (* C_PROBE_OUT163_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT163_WIDTH = "1" *)
- (* C_PROBE_OUT164_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT164_WIDTH = "1" *)
- (* C_PROBE_OUT165_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT165_WIDTH = "1" *)
- (* C_PROBE_OUT166_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT166_WIDTH = "1" *)
- (* C_PROBE_OUT167_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT167_WIDTH = "1" *)
- (* C_PROBE_OUT168_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT168_WIDTH = "1" *)
- (* C_PROBE_OUT169_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT169_WIDTH = "1" *)
- (* C_PROBE_OUT16_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT16_WIDTH = "1" *)
- (* C_PROBE_OUT170_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT170_WIDTH = "1" *)
- (* C_PROBE_OUT171_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT171_WIDTH = "1" *)
- (* C_PROBE_OUT172_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT172_WIDTH = "1" *)
- (* C_PROBE_OUT173_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT173_WIDTH = "1" *)
- (* C_PROBE_OUT174_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT174_WIDTH = "1" *)
- (* C_PROBE_OUT175_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT175_WIDTH = "1" *)
- (* C_PROBE_OUT176_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT176_WIDTH = "1" *)
- (* C_PROBE_OUT177_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT177_WIDTH = "1" *)
- (* C_PROBE_OUT178_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT178_WIDTH = "1" *)
- (* C_PROBE_OUT179_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT179_WIDTH = "1" *)
- (* C_PROBE_OUT17_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT17_WIDTH = "1" *)
- (* C_PROBE_OUT180_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT180_WIDTH = "1" *)
- (* C_PROBE_OUT181_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT181_WIDTH = "1" *)
- (* C_PROBE_OUT182_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT182_WIDTH = "1" *)
- (* C_PROBE_OUT183_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT183_WIDTH = "1" *)
- (* C_PROBE_OUT184_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT184_WIDTH = "1" *)
- (* C_PROBE_OUT185_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT185_WIDTH = "1" *)
- (* C_PROBE_OUT186_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT186_WIDTH = "1" *)
- (* C_PROBE_OUT187_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT187_WIDTH = "1" *)
- (* C_PROBE_OUT188_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT188_WIDTH = "1" *)
- (* C_PROBE_OUT189_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT189_WIDTH = "1" *)
- (* C_PROBE_OUT18_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT18_WIDTH = "1" *)
- (* C_PROBE_OUT190_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT190_WIDTH = "1" *)
- (* C_PROBE_OUT191_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT191_WIDTH = "1" *)
- (* C_PROBE_OUT192_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT192_WIDTH = "1" *)
- (* C_PROBE_OUT193_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT193_WIDTH = "1" *)
- (* C_PROBE_OUT194_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT194_WIDTH = "1" *)
- (* C_PROBE_OUT195_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT195_WIDTH = "1" *)
- (* C_PROBE_OUT196_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT196_WIDTH = "1" *)
- (* C_PROBE_OUT197_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT197_WIDTH = "1" *)
- (* C_PROBE_OUT198_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT198_WIDTH = "1" *)
- (* C_PROBE_OUT199_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT199_WIDTH = "1" *)
- (* C_PROBE_OUT19_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT19_WIDTH = "1" *)
- (* C_PROBE_OUT1_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT1_WIDTH = "1" *)
- (* C_PROBE_OUT200_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT200_WIDTH = "1" *)
- (* C_PROBE_OUT201_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT201_WIDTH = "1" *)
- (* C_PROBE_OUT202_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT202_WIDTH = "1" *)
- (* C_PROBE_OUT203_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT203_WIDTH = "1" *)
- (* C_PROBE_OUT204_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT204_WIDTH = "1" *)
- (* C_PROBE_OUT205_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT205_WIDTH = "1" *)
- (* C_PROBE_OUT206_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT206_WIDTH = "1" *)
- (* C_PROBE_OUT207_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT207_WIDTH = "1" *)
- (* C_PROBE_OUT208_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT208_WIDTH = "1" *)
- (* C_PROBE_OUT209_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT209_WIDTH = "1" *)
- (* C_PROBE_OUT20_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT20_WIDTH = "1" *)
- (* C_PROBE_OUT210_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT210_WIDTH = "1" *)
- (* C_PROBE_OUT211_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT211_WIDTH = "1" *)
- (* C_PROBE_OUT212_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT212_WIDTH = "1" *)
- (* C_PROBE_OUT213_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT213_WIDTH = "1" *)
- (* C_PROBE_OUT214_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT214_WIDTH = "1" *)
- (* C_PROBE_OUT215_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT215_WIDTH = "1" *)
- (* C_PROBE_OUT216_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT216_WIDTH = "1" *)
- (* C_PROBE_OUT217_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT217_WIDTH = "1" *)
- (* C_PROBE_OUT218_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT218_WIDTH = "1" *)
- (* C_PROBE_OUT219_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT219_WIDTH = "1" *)
- (* C_PROBE_OUT21_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT21_WIDTH = "1" *)
- (* C_PROBE_OUT220_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT220_WIDTH = "1" *)
- (* C_PROBE_OUT221_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT221_WIDTH = "1" *)
- (* C_PROBE_OUT222_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT222_WIDTH = "1" *)
- (* C_PROBE_OUT223_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT223_WIDTH = "1" *)
- (* C_PROBE_OUT224_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT224_WIDTH = "1" *)
- (* C_PROBE_OUT225_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT225_WIDTH = "1" *)
- (* C_PROBE_OUT226_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT226_WIDTH = "1" *)
- (* C_PROBE_OUT227_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT227_WIDTH = "1" *)
- (* C_PROBE_OUT228_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT228_WIDTH = "1" *)
- (* C_PROBE_OUT229_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT229_WIDTH = "1" *)
- (* C_PROBE_OUT22_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT22_WIDTH = "1" *)
- (* C_PROBE_OUT230_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT230_WIDTH = "1" *)
- (* C_PROBE_OUT231_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT231_WIDTH = "1" *)
- (* C_PROBE_OUT232_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT232_WIDTH = "1" *)
- (* C_PROBE_OUT233_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT233_WIDTH = "1" *)
- (* C_PROBE_OUT234_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT234_WIDTH = "1" *)
- (* C_PROBE_OUT235_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT235_WIDTH = "1" *)
- (* C_PROBE_OUT236_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT236_WIDTH = "1" *)
- (* C_PROBE_OUT237_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT237_WIDTH = "1" *)
- (* C_PROBE_OUT238_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT238_WIDTH = "1" *)
- (* C_PROBE_OUT239_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT239_WIDTH = "1" *)
- (* C_PROBE_OUT23_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT23_WIDTH = "1" *)
- (* C_PROBE_OUT240_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT240_WIDTH = "1" *)
- (* C_PROBE_OUT241_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT241_WIDTH = "1" *)
- (* C_PROBE_OUT242_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT242_WIDTH = "1" *)
- (* C_PROBE_OUT243_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT243_WIDTH = "1" *)
- (* C_PROBE_OUT244_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT244_WIDTH = "1" *)
- (* C_PROBE_OUT245_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT245_WIDTH = "1" *)
- (* C_PROBE_OUT246_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT246_WIDTH = "1" *)
- (* C_PROBE_OUT247_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT247_WIDTH = "1" *)
- (* C_PROBE_OUT248_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT248_WIDTH = "1" *)
- (* C_PROBE_OUT249_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT249_WIDTH = "1" *)
- (* C_PROBE_OUT24_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT24_WIDTH = "1" *)
- (* C_PROBE_OUT250_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT250_WIDTH = "1" *)
- (* C_PROBE_OUT251_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT251_WIDTH = "1" *)
- (* C_PROBE_OUT252_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT252_WIDTH = "1" *)
- (* C_PROBE_OUT253_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT253_WIDTH = "1" *)
- (* C_PROBE_OUT254_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT254_WIDTH = "1" *)
- (* C_PROBE_OUT255_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT255_WIDTH = "1" *)
- (* C_PROBE_OUT25_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT25_WIDTH = "1" *)
- (* C_PROBE_OUT26_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT26_WIDTH = "1" *)
- (* C_PROBE_OUT27_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT27_WIDTH = "1" *)
- (* C_PROBE_OUT28_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT28_WIDTH = "1" *)
- (* C_PROBE_OUT29_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT29_WIDTH = "1" *)
- (* C_PROBE_OUT2_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT2_WIDTH = "1" *)
- (* C_PROBE_OUT30_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT30_WIDTH = "1" *)
- (* C_PROBE_OUT31_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT31_WIDTH = "1" *)
- (* C_PROBE_OUT32_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT32_WIDTH = "1" *)
- (* C_PROBE_OUT33_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT33_WIDTH = "1" *)
- (* C_PROBE_OUT34_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT34_WIDTH = "1" *)
- (* C_PROBE_OUT35_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT35_WIDTH = "1" *)
- (* C_PROBE_OUT36_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT36_WIDTH = "1" *)
- (* C_PROBE_OUT37_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT37_WIDTH = "1" *)
- (* C_PROBE_OUT38_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT38_WIDTH = "1" *)
- (* C_PROBE_OUT39_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT39_WIDTH = "1" *)
- (* C_PROBE_OUT3_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT3_WIDTH = "1" *)
- (* C_PROBE_OUT40_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT40_WIDTH = "1" *)
- (* C_PROBE_OUT41_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT41_WIDTH = "1" *)
- (* C_PROBE_OUT42_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT42_WIDTH = "1" *)
- (* C_PROBE_OUT43_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT43_WIDTH = "1" *)
- (* C_PROBE_OUT44_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT44_WIDTH = "1" *)
- (* C_PROBE_OUT45_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT45_WIDTH = "1" *)
- (* C_PROBE_OUT46_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT46_WIDTH = "1" *)
- (* C_PROBE_OUT47_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT47_WIDTH = "1" *)
- (* C_PROBE_OUT48_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT48_WIDTH = "1" *)
- (* C_PROBE_OUT49_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT49_WIDTH = "1" *)
- (* C_PROBE_OUT4_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT4_WIDTH = "1" *)
- (* C_PROBE_OUT50_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT50_WIDTH = "1" *)
- (* C_PROBE_OUT51_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT51_WIDTH = "1" *)
- (* C_PROBE_OUT52_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT52_WIDTH = "1" *)
- (* C_PROBE_OUT53_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT53_WIDTH = "1" *)
- (* C_PROBE_OUT54_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT54_WIDTH = "1" *)
- (* C_PROBE_OUT55_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT55_WIDTH = "1" *)
- (* C_PROBE_OUT56_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT56_WIDTH = "1" *)
- (* C_PROBE_OUT57_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT57_WIDTH = "1" *)
- (* C_PROBE_OUT58_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT58_WIDTH = "1" *)
- (* C_PROBE_OUT59_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT59_WIDTH = "1" *)
- (* C_PROBE_OUT5_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT5_WIDTH = "1" *)
- (* C_PROBE_OUT60_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT60_WIDTH = "1" *)
- (* C_PROBE_OUT61_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT61_WIDTH = "1" *)
- (* C_PROBE_OUT62_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT62_WIDTH = "1" *)
- (* C_PROBE_OUT63_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT63_WIDTH = "1" *)
- (* C_PROBE_OUT64_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT64_WIDTH = "1" *)
- (* C_PROBE_OUT65_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT65_WIDTH = "1" *)
- (* C_PROBE_OUT66_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT66_WIDTH = "1" *)
- (* C_PROBE_OUT67_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT67_WIDTH = "1" *)
- (* C_PROBE_OUT68_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT68_WIDTH = "1" *)
- (* C_PROBE_OUT69_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT69_WIDTH = "1" *)
- (* C_PROBE_OUT6_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT6_WIDTH = "1" *)
- (* C_PROBE_OUT70_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT70_WIDTH = "1" *)
- (* C_PROBE_OUT71_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT71_WIDTH = "1" *)
- (* C_PROBE_OUT72_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT72_WIDTH = "1" *)
- (* C_PROBE_OUT73_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT73_WIDTH = "1" *)
- (* C_PROBE_OUT74_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT74_WIDTH = "1" *)
- (* C_PROBE_OUT75_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT75_WIDTH = "1" *)
- (* C_PROBE_OUT76_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT76_WIDTH = "1" *)
- (* C_PROBE_OUT77_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT77_WIDTH = "1" *)
- (* C_PROBE_OUT78_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT78_WIDTH = "1" *)
- (* C_PROBE_OUT79_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT79_WIDTH = "1" *)
- (* C_PROBE_OUT7_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT7_WIDTH = "1" *)
- (* C_PROBE_OUT80_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT80_WIDTH = "1" *)
- (* C_PROBE_OUT81_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT81_WIDTH = "1" *)
- (* C_PROBE_OUT82_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT82_WIDTH = "1" *)
- (* C_PROBE_OUT83_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT83_WIDTH = "1" *)
- (* C_PROBE_OUT84_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT84_WIDTH = "1" *)
- (* C_PROBE_OUT85_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT85_WIDTH = "1" *)
- (* C_PROBE_OUT86_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT86_WIDTH = "1" *)
- (* C_PROBE_OUT87_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT87_WIDTH = "1" *)
- (* C_PROBE_OUT88_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT88_WIDTH = "1" *)
- (* C_PROBE_OUT89_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT89_WIDTH = "1" *)
- (* C_PROBE_OUT8_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT8_WIDTH = "1" *)
- (* C_PROBE_OUT90_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT90_WIDTH = "1" *)
- (* C_PROBE_OUT91_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT91_WIDTH = "1" *)
- (* C_PROBE_OUT92_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT92_WIDTH = "1" *)
- (* C_PROBE_OUT93_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT93_WIDTH = "1" *)
- (* C_PROBE_OUT94_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT94_WIDTH = "1" *)
- (* C_PROBE_OUT95_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT95_WIDTH = "1" *)
- (* C_PROBE_OUT96_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT96_WIDTH = "1" *)
- (* C_PROBE_OUT97_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT97_WIDTH = "1" *)
- (* C_PROBE_OUT98_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT98_WIDTH = "1" *)
- (* C_PROBE_OUT99_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT99_WIDTH = "1" *)
- (* C_PROBE_OUT9_INIT_VAL = "1'b0" *)
- (* C_PROBE_OUT9_WIDTH = "1" *)
- (* C_USE_TEST_REG = "1" *)
- (* C_XDEVICEFAMILY = "zynq" *)
- (* C_XLNX_HW_PROBE_INFO = "DEFAULT" *)
- (* C_XSDB_SLAVE_TYPE = "33" *)
- (* DONT_TOUCH *)
- (* DowngradeIPIdentifiedWarnings = "yes" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *)
- (* LC_HIGH_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *)
- (* LC_LOW_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *)
- (* LC_LOW_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *)
- (* LC_LOW_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *)
- (* LC_LOW_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *)
- (* LC_LOW_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *)
- (* LC_LOW_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *)
- (* LC_LOW_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *)
- (* LC_LOW_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *)
- (* LC_PROBE_IN_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* LC_PROBE_OUT_HIGH_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *)
- (* LC_PROBE_OUT_INIT_VAL_STRING = "256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* LC_PROBE_OUT_LOW_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *)
- (* LC_PROBE_OUT_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* LC_TOTAL_PROBE_IN_WIDTH = "0" *)
- (* LC_TOTAL_PROBE_OUT_WIDTH = "1" *)
- (* syn_noprune = "1" *)
- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_vio inst
- (.clk(clk),
- .probe_in0(1'b0),
- .probe_in1(1'b0),
- .probe_in10(1'b0),
- .probe_in100(1'b0),
- .probe_in101(1'b0),
- .probe_in102(1'b0),
- .probe_in103(1'b0),
- .probe_in104(1'b0),
- .probe_in105(1'b0),
- .probe_in106(1'b0),
- .probe_in107(1'b0),
- .probe_in108(1'b0),
- .probe_in109(1'b0),
- .probe_in11(1'b0),
- .probe_in110(1'b0),
- .probe_in111(1'b0),
- .probe_in112(1'b0),
- .probe_in113(1'b0),
- .probe_in114(1'b0),
- .probe_in115(1'b0),
- .probe_in116(1'b0),
- .probe_in117(1'b0),
- .probe_in118(1'b0),
- .probe_in119(1'b0),
- .probe_in12(1'b0),
- .probe_in120(1'b0),
- .probe_in121(1'b0),
- .probe_in122(1'b0),
- .probe_in123(1'b0),
- .probe_in124(1'b0),
- .probe_in125(1'b0),
- .probe_in126(1'b0),
- .probe_in127(1'b0),
- .probe_in128(1'b0),
- .probe_in129(1'b0),
- .probe_in13(1'b0),
- .probe_in130(1'b0),
- .probe_in131(1'b0),
- .probe_in132(1'b0),
- .probe_in133(1'b0),
- .probe_in134(1'b0),
- .probe_in135(1'b0),
- .probe_in136(1'b0),
- .probe_in137(1'b0),
- .probe_in138(1'b0),
- .probe_in139(1'b0),
- .probe_in14(1'b0),
- .probe_in140(1'b0),
- .probe_in141(1'b0),
- .probe_in142(1'b0),
- .probe_in143(1'b0),
- .probe_in144(1'b0),
- .probe_in145(1'b0),
- .probe_in146(1'b0),
- .probe_in147(1'b0),
- .probe_in148(1'b0),
- .probe_in149(1'b0),
- .probe_in15(1'b0),
- .probe_in150(1'b0),
- .probe_in151(1'b0),
- .probe_in152(1'b0),
- .probe_in153(1'b0),
- .probe_in154(1'b0),
- .probe_in155(1'b0),
- .probe_in156(1'b0),
- .probe_in157(1'b0),
- .probe_in158(1'b0),
- .probe_in159(1'b0),
- .probe_in16(1'b0),
- .probe_in160(1'b0),
- .probe_in161(1'b0),
- .probe_in162(1'b0),
- .probe_in163(1'b0),
- .probe_in164(1'b0),
- .probe_in165(1'b0),
- .probe_in166(1'b0),
- .probe_in167(1'b0),
- .probe_in168(1'b0),
- .probe_in169(1'b0),
- .probe_in17(1'b0),
- .probe_in170(1'b0),
- .probe_in171(1'b0),
- .probe_in172(1'b0),
- .probe_in173(1'b0),
- .probe_in174(1'b0),
- .probe_in175(1'b0),
- .probe_in176(1'b0),
- .probe_in177(1'b0),
- .probe_in178(1'b0),
- .probe_in179(1'b0),
- .probe_in18(1'b0),
- .probe_in180(1'b0),
- .probe_in181(1'b0),
- .probe_in182(1'b0),
- .probe_in183(1'b0),
- .probe_in184(1'b0),
- .probe_in185(1'b0),
- .probe_in186(1'b0),
- .probe_in187(1'b0),
- .probe_in188(1'b0),
- .probe_in189(1'b0),
- .probe_in19(1'b0),
- .probe_in190(1'b0),
- .probe_in191(1'b0),
- .probe_in192(1'b0),
- .probe_in193(1'b0),
- .probe_in194(1'b0),
- .probe_in195(1'b0),
- .probe_in196(1'b0),
- .probe_in197(1'b0),
- .probe_in198(1'b0),
- .probe_in199(1'b0),
- .probe_in2(1'b0),
- .probe_in20(1'b0),
- .probe_in200(1'b0),
- .probe_in201(1'b0),
- .probe_in202(1'b0),
- .probe_in203(1'b0),
- .probe_in204(1'b0),
- .probe_in205(1'b0),
- .probe_in206(1'b0),
- .probe_in207(1'b0),
- .probe_in208(1'b0),
- .probe_in209(1'b0),
- .probe_in21(1'b0),
- .probe_in210(1'b0),
- .probe_in211(1'b0),
- .probe_in212(1'b0),
- .probe_in213(1'b0),
- .probe_in214(1'b0),
- .probe_in215(1'b0),
- .probe_in216(1'b0),
- .probe_in217(1'b0),
- .probe_in218(1'b0),
- .probe_in219(1'b0),
- .probe_in22(1'b0),
- .probe_in220(1'b0),
- .probe_in221(1'b0),
- .probe_in222(1'b0),
- .probe_in223(1'b0),
- .probe_in224(1'b0),
- .probe_in225(1'b0),
- .probe_in226(1'b0),
- .probe_in227(1'b0),
- .probe_in228(1'b0),
- .probe_in229(1'b0),
- .probe_in23(1'b0),
- .probe_in230(1'b0),
- .probe_in231(1'b0),
- .probe_in232(1'b0),
- .probe_in233(1'b0),
- .probe_in234(1'b0),
- .probe_in235(1'b0),
- .probe_in236(1'b0),
- .probe_in237(1'b0),
- .probe_in238(1'b0),
- .probe_in239(1'b0),
- .probe_in24(1'b0),
- .probe_in240(1'b0),
- .probe_in241(1'b0),
- .probe_in242(1'b0),
- .probe_in243(1'b0),
- .probe_in244(1'b0),
- .probe_in245(1'b0),
- .probe_in246(1'b0),
- .probe_in247(1'b0),
- .probe_in248(1'b0),
- .probe_in249(1'b0),
- .probe_in25(1'b0),
- .probe_in250(1'b0),
- .probe_in251(1'b0),
- .probe_in252(1'b0),
- .probe_in253(1'b0),
- .probe_in254(1'b0),
- .probe_in255(1'b0),
- .probe_in26(1'b0),
- .probe_in27(1'b0),
- .probe_in28(1'b0),
- .probe_in29(1'b0),
- .probe_in3(1'b0),
- .probe_in30(1'b0),
- .probe_in31(1'b0),
- .probe_in32(1'b0),
- .probe_in33(1'b0),
- .probe_in34(1'b0),
- .probe_in35(1'b0),
- .probe_in36(1'b0),
- .probe_in37(1'b0),
- .probe_in38(1'b0),
- .probe_in39(1'b0),
- .probe_in4(1'b0),
- .probe_in40(1'b0),
- .probe_in41(1'b0),
- .probe_in42(1'b0),
- .probe_in43(1'b0),
- .probe_in44(1'b0),
- .probe_in45(1'b0),
- .probe_in46(1'b0),
- .probe_in47(1'b0),
- .probe_in48(1'b0),
- .probe_in49(1'b0),
- .probe_in5(1'b0),
- .probe_in50(1'b0),
- .probe_in51(1'b0),
- .probe_in52(1'b0),
- .probe_in53(1'b0),
- .probe_in54(1'b0),
- .probe_in55(1'b0),
- .probe_in56(1'b0),
- .probe_in57(1'b0),
- .probe_in58(1'b0),
- .probe_in59(1'b0),
- .probe_in6(1'b0),
- .probe_in60(1'b0),
- .probe_in61(1'b0),
- .probe_in62(1'b0),
- .probe_in63(1'b0),
- .probe_in64(1'b0),
- .probe_in65(1'b0),
- .probe_in66(1'b0),
- .probe_in67(1'b0),
- .probe_in68(1'b0),
- .probe_in69(1'b0),
- .probe_in7(1'b0),
- .probe_in70(1'b0),
- .probe_in71(1'b0),
- .probe_in72(1'b0),
- .probe_in73(1'b0),
- .probe_in74(1'b0),
- .probe_in75(1'b0),
- .probe_in76(1'b0),
- .probe_in77(1'b0),
- .probe_in78(1'b0),
- .probe_in79(1'b0),
- .probe_in8(1'b0),
- .probe_in80(1'b0),
- .probe_in81(1'b0),
- .probe_in82(1'b0),
- .probe_in83(1'b0),
- .probe_in84(1'b0),
- .probe_in85(1'b0),
- .probe_in86(1'b0),
- .probe_in87(1'b0),
- .probe_in88(1'b0),
- .probe_in89(1'b0),
- .probe_in9(1'b0),
- .probe_in90(1'b0),
- .probe_in91(1'b0),
- .probe_in92(1'b0),
- .probe_in93(1'b0),
- .probe_in94(1'b0),
- .probe_in95(1'b0),
- .probe_in96(1'b0),
- .probe_in97(1'b0),
- .probe_in98(1'b0),
- .probe_in99(1'b0),
- .probe_out0(probe_out0),
- .probe_out1(NLW_inst_probe_out1_UNCONNECTED[0]),
- .probe_out10(NLW_inst_probe_out10_UNCONNECTED[0]),
- .probe_out100(NLW_inst_probe_out100_UNCONNECTED[0]),
- .probe_out101(NLW_inst_probe_out101_UNCONNECTED[0]),
- .probe_out102(NLW_inst_probe_out102_UNCONNECTED[0]),
- .probe_out103(NLW_inst_probe_out103_UNCONNECTED[0]),
- .probe_out104(NLW_inst_probe_out104_UNCONNECTED[0]),
- .probe_out105(NLW_inst_probe_out105_UNCONNECTED[0]),
- .probe_out106(NLW_inst_probe_out106_UNCONNECTED[0]),
- .probe_out107(NLW_inst_probe_out107_UNCONNECTED[0]),
- .probe_out108(NLW_inst_probe_out108_UNCONNECTED[0]),
- .probe_out109(NLW_inst_probe_out109_UNCONNECTED[0]),
- .probe_out11(NLW_inst_probe_out11_UNCONNECTED[0]),
- .probe_out110(NLW_inst_probe_out110_UNCONNECTED[0]),
- .probe_out111(NLW_inst_probe_out111_UNCONNECTED[0]),
- .probe_out112(NLW_inst_probe_out112_UNCONNECTED[0]),
- .probe_out113(NLW_inst_probe_out113_UNCONNECTED[0]),
- .probe_out114(NLW_inst_probe_out114_UNCONNECTED[0]),
- .probe_out115(NLW_inst_probe_out115_UNCONNECTED[0]),
- .probe_out116(NLW_inst_probe_out116_UNCONNECTED[0]),
- .probe_out117(NLW_inst_probe_out117_UNCONNECTED[0]),
- .probe_out118(NLW_inst_probe_out118_UNCONNECTED[0]),
- .probe_out119(NLW_inst_probe_out119_UNCONNECTED[0]),
- .probe_out12(NLW_inst_probe_out12_UNCONNECTED[0]),
- .probe_out120(NLW_inst_probe_out120_UNCONNECTED[0]),
- .probe_out121(NLW_inst_probe_out121_UNCONNECTED[0]),
- .probe_out122(NLW_inst_probe_out122_UNCONNECTED[0]),
- .probe_out123(NLW_inst_probe_out123_UNCONNECTED[0]),
- .probe_out124(NLW_inst_probe_out124_UNCONNECTED[0]),
- .probe_out125(NLW_inst_probe_out125_UNCONNECTED[0]),
- .probe_out126(NLW_inst_probe_out126_UNCONNECTED[0]),
- .probe_out127(NLW_inst_probe_out127_UNCONNECTED[0]),
- .probe_out128(NLW_inst_probe_out128_UNCONNECTED[0]),
- .probe_out129(NLW_inst_probe_out129_UNCONNECTED[0]),
- .probe_out13(NLW_inst_probe_out13_UNCONNECTED[0]),
- .probe_out130(NLW_inst_probe_out130_UNCONNECTED[0]),
- .probe_out131(NLW_inst_probe_out131_UNCONNECTED[0]),
- .probe_out132(NLW_inst_probe_out132_UNCONNECTED[0]),
- .probe_out133(NLW_inst_probe_out133_UNCONNECTED[0]),
- .probe_out134(NLW_inst_probe_out134_UNCONNECTED[0]),
- .probe_out135(NLW_inst_probe_out135_UNCONNECTED[0]),
- .probe_out136(NLW_inst_probe_out136_UNCONNECTED[0]),
- .probe_out137(NLW_inst_probe_out137_UNCONNECTED[0]),
- .probe_out138(NLW_inst_probe_out138_UNCONNECTED[0]),
- .probe_out139(NLW_inst_probe_out139_UNCONNECTED[0]),
- .probe_out14(NLW_inst_probe_out14_UNCONNECTED[0]),
- .probe_out140(NLW_inst_probe_out140_UNCONNECTED[0]),
- .probe_out141(NLW_inst_probe_out141_UNCONNECTED[0]),
- .probe_out142(NLW_inst_probe_out142_UNCONNECTED[0]),
- .probe_out143(NLW_inst_probe_out143_UNCONNECTED[0]),
- .probe_out144(NLW_inst_probe_out144_UNCONNECTED[0]),
- .probe_out145(NLW_inst_probe_out145_UNCONNECTED[0]),
- .probe_out146(NLW_inst_probe_out146_UNCONNECTED[0]),
- .probe_out147(NLW_inst_probe_out147_UNCONNECTED[0]),
- .probe_out148(NLW_inst_probe_out148_UNCONNECTED[0]),
- .probe_out149(NLW_inst_probe_out149_UNCONNECTED[0]),
- .probe_out15(NLW_inst_probe_out15_UNCONNECTED[0]),
- .probe_out150(NLW_inst_probe_out150_UNCONNECTED[0]),
- .probe_out151(NLW_inst_probe_out151_UNCONNECTED[0]),
- .probe_out152(NLW_inst_probe_out152_UNCONNECTED[0]),
- .probe_out153(NLW_inst_probe_out153_UNCONNECTED[0]),
- .probe_out154(NLW_inst_probe_out154_UNCONNECTED[0]),
- .probe_out155(NLW_inst_probe_out155_UNCONNECTED[0]),
- .probe_out156(NLW_inst_probe_out156_UNCONNECTED[0]),
- .probe_out157(NLW_inst_probe_out157_UNCONNECTED[0]),
- .probe_out158(NLW_inst_probe_out158_UNCONNECTED[0]),
- .probe_out159(NLW_inst_probe_out159_UNCONNECTED[0]),
- .probe_out16(NLW_inst_probe_out16_UNCONNECTED[0]),
- .probe_out160(NLW_inst_probe_out160_UNCONNECTED[0]),
- .probe_out161(NLW_inst_probe_out161_UNCONNECTED[0]),
- .probe_out162(NLW_inst_probe_out162_UNCONNECTED[0]),
- .probe_out163(NLW_inst_probe_out163_UNCONNECTED[0]),
- .probe_out164(NLW_inst_probe_out164_UNCONNECTED[0]),
- .probe_out165(NLW_inst_probe_out165_UNCONNECTED[0]),
- .probe_out166(NLW_inst_probe_out166_UNCONNECTED[0]),
- .probe_out167(NLW_inst_probe_out167_UNCONNECTED[0]),
- .probe_out168(NLW_inst_probe_out168_UNCONNECTED[0]),
- .probe_out169(NLW_inst_probe_out169_UNCONNECTED[0]),
- .probe_out17(NLW_inst_probe_out17_UNCONNECTED[0]),
- .probe_out170(NLW_inst_probe_out170_UNCONNECTED[0]),
- .probe_out171(NLW_inst_probe_out171_UNCONNECTED[0]),
- .probe_out172(NLW_inst_probe_out172_UNCONNECTED[0]),
- .probe_out173(NLW_inst_probe_out173_UNCONNECTED[0]),
- .probe_out174(NLW_inst_probe_out174_UNCONNECTED[0]),
- .probe_out175(NLW_inst_probe_out175_UNCONNECTED[0]),
- .probe_out176(NLW_inst_probe_out176_UNCONNECTED[0]),
- .probe_out177(NLW_inst_probe_out177_UNCONNECTED[0]),
- .probe_out178(NLW_inst_probe_out178_UNCONNECTED[0]),
- .probe_out179(NLW_inst_probe_out179_UNCONNECTED[0]),
- .probe_out18(NLW_inst_probe_out18_UNCONNECTED[0]),
- .probe_out180(NLW_inst_probe_out180_UNCONNECTED[0]),
- .probe_out181(NLW_inst_probe_out181_UNCONNECTED[0]),
- .probe_out182(NLW_inst_probe_out182_UNCONNECTED[0]),
- .probe_out183(NLW_inst_probe_out183_UNCONNECTED[0]),
- .probe_out184(NLW_inst_probe_out184_UNCONNECTED[0]),
- .probe_out185(NLW_inst_probe_out185_UNCONNECTED[0]),
- .probe_out186(NLW_inst_probe_out186_UNCONNECTED[0]),
- .probe_out187(NLW_inst_probe_out187_UNCONNECTED[0]),
- .probe_out188(NLW_inst_probe_out188_UNCONNECTED[0]),
- .probe_out189(NLW_inst_probe_out189_UNCONNECTED[0]),
- .probe_out19(NLW_inst_probe_out19_UNCONNECTED[0]),
- .probe_out190(NLW_inst_probe_out190_UNCONNECTED[0]),
- .probe_out191(NLW_inst_probe_out191_UNCONNECTED[0]),
- .probe_out192(NLW_inst_probe_out192_UNCONNECTED[0]),
- .probe_out193(NLW_inst_probe_out193_UNCONNECTED[0]),
- .probe_out194(NLW_inst_probe_out194_UNCONNECTED[0]),
- .probe_out195(NLW_inst_probe_out195_UNCONNECTED[0]),
- .probe_out196(NLW_inst_probe_out196_UNCONNECTED[0]),
- .probe_out197(NLW_inst_probe_out197_UNCONNECTED[0]),
- .probe_out198(NLW_inst_probe_out198_UNCONNECTED[0]),
- .probe_out199(NLW_inst_probe_out199_UNCONNECTED[0]),
- .probe_out2(NLW_inst_probe_out2_UNCONNECTED[0]),
- .probe_out20(NLW_inst_probe_out20_UNCONNECTED[0]),
- .probe_out200(NLW_inst_probe_out200_UNCONNECTED[0]),
- .probe_out201(NLW_inst_probe_out201_UNCONNECTED[0]),
- .probe_out202(NLW_inst_probe_out202_UNCONNECTED[0]),
- .probe_out203(NLW_inst_probe_out203_UNCONNECTED[0]),
- .probe_out204(NLW_inst_probe_out204_UNCONNECTED[0]),
- .probe_out205(NLW_inst_probe_out205_UNCONNECTED[0]),
- .probe_out206(NLW_inst_probe_out206_UNCONNECTED[0]),
- .probe_out207(NLW_inst_probe_out207_UNCONNECTED[0]),
- .probe_out208(NLW_inst_probe_out208_UNCONNECTED[0]),
- .probe_out209(NLW_inst_probe_out209_UNCONNECTED[0]),
- .probe_out21(NLW_inst_probe_out21_UNCONNECTED[0]),
- .probe_out210(NLW_inst_probe_out210_UNCONNECTED[0]),
- .probe_out211(NLW_inst_probe_out211_UNCONNECTED[0]),
- .probe_out212(NLW_inst_probe_out212_UNCONNECTED[0]),
- .probe_out213(NLW_inst_probe_out213_UNCONNECTED[0]),
- .probe_out214(NLW_inst_probe_out214_UNCONNECTED[0]),
- .probe_out215(NLW_inst_probe_out215_UNCONNECTED[0]),
- .probe_out216(NLW_inst_probe_out216_UNCONNECTED[0]),
- .probe_out217(NLW_inst_probe_out217_UNCONNECTED[0]),
- .probe_out218(NLW_inst_probe_out218_UNCONNECTED[0]),
- .probe_out219(NLW_inst_probe_out219_UNCONNECTED[0]),
- .probe_out22(NLW_inst_probe_out22_UNCONNECTED[0]),
- .probe_out220(NLW_inst_probe_out220_UNCONNECTED[0]),
- .probe_out221(NLW_inst_probe_out221_UNCONNECTED[0]),
- .probe_out222(NLW_inst_probe_out222_UNCONNECTED[0]),
- .probe_out223(NLW_inst_probe_out223_UNCONNECTED[0]),
- .probe_out224(NLW_inst_probe_out224_UNCONNECTED[0]),
- .probe_out225(NLW_inst_probe_out225_UNCONNECTED[0]),
- .probe_out226(NLW_inst_probe_out226_UNCONNECTED[0]),
- .probe_out227(NLW_inst_probe_out227_UNCONNECTED[0]),
- .probe_out228(NLW_inst_probe_out228_UNCONNECTED[0]),
- .probe_out229(NLW_inst_probe_out229_UNCONNECTED[0]),
- .probe_out23(NLW_inst_probe_out23_UNCONNECTED[0]),
- .probe_out230(NLW_inst_probe_out230_UNCONNECTED[0]),
- .probe_out231(NLW_inst_probe_out231_UNCONNECTED[0]),
- .probe_out232(NLW_inst_probe_out232_UNCONNECTED[0]),
- .probe_out233(NLW_inst_probe_out233_UNCONNECTED[0]),
- .probe_out234(NLW_inst_probe_out234_UNCONNECTED[0]),
- .probe_out235(NLW_inst_probe_out235_UNCONNECTED[0]),
- .probe_out236(NLW_inst_probe_out236_UNCONNECTED[0]),
- .probe_out237(NLW_inst_probe_out237_UNCONNECTED[0]),
- .probe_out238(NLW_inst_probe_out238_UNCONNECTED[0]),
- .probe_out239(NLW_inst_probe_out239_UNCONNECTED[0]),
- .probe_out24(NLW_inst_probe_out24_UNCONNECTED[0]),
- .probe_out240(NLW_inst_probe_out240_UNCONNECTED[0]),
- .probe_out241(NLW_inst_probe_out241_UNCONNECTED[0]),
- .probe_out242(NLW_inst_probe_out242_UNCONNECTED[0]),
- .probe_out243(NLW_inst_probe_out243_UNCONNECTED[0]),
- .probe_out244(NLW_inst_probe_out244_UNCONNECTED[0]),
- .probe_out245(NLW_inst_probe_out245_UNCONNECTED[0]),
- .probe_out246(NLW_inst_probe_out246_UNCONNECTED[0]),
- .probe_out247(NLW_inst_probe_out247_UNCONNECTED[0]),
- .probe_out248(NLW_inst_probe_out248_UNCONNECTED[0]),
- .probe_out249(NLW_inst_probe_out249_UNCONNECTED[0]),
- .probe_out25(NLW_inst_probe_out25_UNCONNECTED[0]),
- .probe_out250(NLW_inst_probe_out250_UNCONNECTED[0]),
- .probe_out251(NLW_inst_probe_out251_UNCONNECTED[0]),
- .probe_out252(NLW_inst_probe_out252_UNCONNECTED[0]),
- .probe_out253(NLW_inst_probe_out253_UNCONNECTED[0]),
- .probe_out254(NLW_inst_probe_out254_UNCONNECTED[0]),
- .probe_out255(NLW_inst_probe_out255_UNCONNECTED[0]),
- .probe_out26(NLW_inst_probe_out26_UNCONNECTED[0]),
- .probe_out27(NLW_inst_probe_out27_UNCONNECTED[0]),
- .probe_out28(NLW_inst_probe_out28_UNCONNECTED[0]),
- .probe_out29(NLW_inst_probe_out29_UNCONNECTED[0]),
- .probe_out3(NLW_inst_probe_out3_UNCONNECTED[0]),
- .probe_out30(NLW_inst_probe_out30_UNCONNECTED[0]),
- .probe_out31(NLW_inst_probe_out31_UNCONNECTED[0]),
- .probe_out32(NLW_inst_probe_out32_UNCONNECTED[0]),
- .probe_out33(NLW_inst_probe_out33_UNCONNECTED[0]),
- .probe_out34(NLW_inst_probe_out34_UNCONNECTED[0]),
- .probe_out35(NLW_inst_probe_out35_UNCONNECTED[0]),
- .probe_out36(NLW_inst_probe_out36_UNCONNECTED[0]),
- .probe_out37(NLW_inst_probe_out37_UNCONNECTED[0]),
- .probe_out38(NLW_inst_probe_out38_UNCONNECTED[0]),
- .probe_out39(NLW_inst_probe_out39_UNCONNECTED[0]),
- .probe_out4(NLW_inst_probe_out4_UNCONNECTED[0]),
- .probe_out40(NLW_inst_probe_out40_UNCONNECTED[0]),
- .probe_out41(NLW_inst_probe_out41_UNCONNECTED[0]),
- .probe_out42(NLW_inst_probe_out42_UNCONNECTED[0]),
- .probe_out43(NLW_inst_probe_out43_UNCONNECTED[0]),
- .probe_out44(NLW_inst_probe_out44_UNCONNECTED[0]),
- .probe_out45(NLW_inst_probe_out45_UNCONNECTED[0]),
- .probe_out46(NLW_inst_probe_out46_UNCONNECTED[0]),
- .probe_out47(NLW_inst_probe_out47_UNCONNECTED[0]),
- .probe_out48(NLW_inst_probe_out48_UNCONNECTED[0]),
- .probe_out49(NLW_inst_probe_out49_UNCONNECTED[0]),
- .probe_out5(NLW_inst_probe_out5_UNCONNECTED[0]),
- .probe_out50(NLW_inst_probe_out50_UNCONNECTED[0]),
- .probe_out51(NLW_inst_probe_out51_UNCONNECTED[0]),
- .probe_out52(NLW_inst_probe_out52_UNCONNECTED[0]),
- .probe_out53(NLW_inst_probe_out53_UNCONNECTED[0]),
- .probe_out54(NLW_inst_probe_out54_UNCONNECTED[0]),
- .probe_out55(NLW_inst_probe_out55_UNCONNECTED[0]),
- .probe_out56(NLW_inst_probe_out56_UNCONNECTED[0]),
- .probe_out57(NLW_inst_probe_out57_UNCONNECTED[0]),
- .probe_out58(NLW_inst_probe_out58_UNCONNECTED[0]),
- .probe_out59(NLW_inst_probe_out59_UNCONNECTED[0]),
- .probe_out6(NLW_inst_probe_out6_UNCONNECTED[0]),
- .probe_out60(NLW_inst_probe_out60_UNCONNECTED[0]),
- .probe_out61(NLW_inst_probe_out61_UNCONNECTED[0]),
- .probe_out62(NLW_inst_probe_out62_UNCONNECTED[0]),
- .probe_out63(NLW_inst_probe_out63_UNCONNECTED[0]),
- .probe_out64(NLW_inst_probe_out64_UNCONNECTED[0]),
- .probe_out65(NLW_inst_probe_out65_UNCONNECTED[0]),
- .probe_out66(NLW_inst_probe_out66_UNCONNECTED[0]),
- .probe_out67(NLW_inst_probe_out67_UNCONNECTED[0]),
- .probe_out68(NLW_inst_probe_out68_UNCONNECTED[0]),
- .probe_out69(NLW_inst_probe_out69_UNCONNECTED[0]),
- .probe_out7(NLW_inst_probe_out7_UNCONNECTED[0]),
- .probe_out70(NLW_inst_probe_out70_UNCONNECTED[0]),
- .probe_out71(NLW_inst_probe_out71_UNCONNECTED[0]),
- .probe_out72(NLW_inst_probe_out72_UNCONNECTED[0]),
- .probe_out73(NLW_inst_probe_out73_UNCONNECTED[0]),
- .probe_out74(NLW_inst_probe_out74_UNCONNECTED[0]),
- .probe_out75(NLW_inst_probe_out75_UNCONNECTED[0]),
- .probe_out76(NLW_inst_probe_out76_UNCONNECTED[0]),
- .probe_out77(NLW_inst_probe_out77_UNCONNECTED[0]),
- .probe_out78(NLW_inst_probe_out78_UNCONNECTED[0]),
- .probe_out79(NLW_inst_probe_out79_UNCONNECTED[0]),
- .probe_out8(NLW_inst_probe_out8_UNCONNECTED[0]),
- .probe_out80(NLW_inst_probe_out80_UNCONNECTED[0]),
- .probe_out81(NLW_inst_probe_out81_UNCONNECTED[0]),
- .probe_out82(NLW_inst_probe_out82_UNCONNECTED[0]),
- .probe_out83(NLW_inst_probe_out83_UNCONNECTED[0]),
- .probe_out84(NLW_inst_probe_out84_UNCONNECTED[0]),
- .probe_out85(NLW_inst_probe_out85_UNCONNECTED[0]),
- .probe_out86(NLW_inst_probe_out86_UNCONNECTED[0]),
- .probe_out87(NLW_inst_probe_out87_UNCONNECTED[0]),
- .probe_out88(NLW_inst_probe_out88_UNCONNECTED[0]),
- .probe_out89(NLW_inst_probe_out89_UNCONNECTED[0]),
- .probe_out9(NLW_inst_probe_out9_UNCONNECTED[0]),
- .probe_out90(NLW_inst_probe_out90_UNCONNECTED[0]),
- .probe_out91(NLW_inst_probe_out91_UNCONNECTED[0]),
- .probe_out92(NLW_inst_probe_out92_UNCONNECTED[0]),
- .probe_out93(NLW_inst_probe_out93_UNCONNECTED[0]),
- .probe_out94(NLW_inst_probe_out94_UNCONNECTED[0]),
- .probe_out95(NLW_inst_probe_out95_UNCONNECTED[0]),
- .probe_out96(NLW_inst_probe_out96_UNCONNECTED[0]),
- .probe_out97(NLW_inst_probe_out97_UNCONNECTED[0]),
- .probe_out98(NLW_inst_probe_out98_UNCONNECTED[0]),
- .probe_out99(NLW_inst_probe_out99_UNCONNECTED[0]),
- .sl_iport0({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .sl_oport0(NLW_inst_sl_oport0_UNCONNECTED[16:0]));
-endmodule
-
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_decoder
- (s_drdy_i,
- in0,
- SR,
- xsdb_wr__0,
- \G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ,
- \G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ,
- s_do_i,
- s_rst_o,
- out,
- s_daddr_o,
- s_den_o,
- s_dwe_o,
- Q,
- Probe_out_reg);
- output s_drdy_i;
- output in0;
- output [0:0]SR;
- output xsdb_wr__0;
- output \G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ;
- output \G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ;
- output [15:0]s_do_i;
- input s_rst_o;
- input out;
- input [16:0]s_daddr_o;
- input s_den_o;
- input s_dwe_o;
- input [15:0]Q;
- input [0:0]Probe_out_reg;
-
- wire \Bus_data_out[0]_i_1_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ;
- wire [0:0]Probe_out_reg;
- wire [15:0]Q;
- wire [0:0]SR;
- wire clear_int_i_1_n_0;
- wire committ_int_i_1_n_0;
- wire [15:0]data_info_probe_in;
- wire in0;
- wire int_cnt_rst;
- wire int_cnt_rst_i_1_n_0;
- wire out;
- wire [15:0]probe_out_modified;
- wire rd_en_p1;
- wire rd_en_p2;
- wire [16:0]s_daddr_o;
- wire s_den_o;
- wire [15:0]s_do_i;
- wire s_drdy_i;
- wire s_dwe_o;
- wire s_rst_o;
- wire wr_control_reg;
- wire \wr_en[2]_i_1_n_0 ;
- wire \wr_en[2]_i_2_n_0 ;
- wire \wr_en[4]_i_1_n_0 ;
- wire \wr_en[4]_i_2_n_0 ;
- wire \wr_en[4]_i_3_n_0 ;
- wire wr_probe_out_modified;
- wire [2:0]xsdb_addr_2_0_p1;
- wire [2:0]xsdb_addr_2_0_p2;
- wire xsdb_addr_8_p1;
- wire xsdb_addr_8_p2;
- wire xsdb_drdy_i_1_n_0;
- wire xsdb_rd;
- wire xsdb_wr__0;
-
- LUT3 #(
- .INIT(8'hB8))
- \Bus_data_out[0]_i_1
- (.I0(Probe_out_reg),
- .I1(xsdb_addr_8_p2),
- .I2(data_info_probe_in[0]),
- .O(\Bus_data_out[0]_i_1_n_0 ));
- LUT5 #(
- .INIT(32'h054A004A))
- \Bus_data_out[0]_i_2
- (.I0(xsdb_addr_2_0_p2[0]),
- .I1(in0),
- .I2(xsdb_addr_2_0_p2[1]),
- .I3(xsdb_addr_2_0_p2[2]),
- .I4(probe_out_modified[0]),
- .O(data_info_probe_in[0]));
- (* SOFT_HLUTNM = "soft_lutpair16" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[10]_i_1
- (.I0(probe_out_modified[10]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[10]));
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[11]_i_1
- (.I0(probe_out_modified[11]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[11]));
- (* SOFT_HLUTNM = "soft_lutpair15" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[12]_i_1
- (.I0(probe_out_modified[12]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[12]));
- (* SOFT_HLUTNM = "soft_lutpair14" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[13]_i_1
- (.I0(probe_out_modified[13]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[13]));
- (* SOFT_HLUTNM = "soft_lutpair16" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[14]_i_1
- (.I0(probe_out_modified[14]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[14]));
- (* SOFT_HLUTNM = "soft_lutpair11" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[15]_i_1
- (.I0(probe_out_modified[15]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[15]));
- LUT5 #(
- .INIT(32'h05400040))
- \Bus_data_out[1]_i_1
- (.I0(xsdb_addr_2_0_p2[0]),
- .I1(probe_out_modified[1]),
- .I2(xsdb_addr_2_0_p2[2]),
- .I3(xsdb_addr_2_0_p2[1]),
- .I4(SR),
- .O(data_info_probe_in[1]));
- LUT5 #(
- .INIT(32'h05400040))
- \Bus_data_out[2]_i_1
- (.I0(xsdb_addr_2_0_p2[0]),
- .I1(probe_out_modified[2]),
- .I2(xsdb_addr_2_0_p2[2]),
- .I3(xsdb_addr_2_0_p2[1]),
- .I4(int_cnt_rst),
- .O(data_info_probe_in[2]));
- (* SOFT_HLUTNM = "soft_lutpair11" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[3]_i_1
- (.I0(probe_out_modified[3]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[3]));
- (* SOFT_HLUTNM = "soft_lutpair12" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[4]_i_1
- (.I0(probe_out_modified[4]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[4]));
- (* SOFT_HLUTNM = "soft_lutpair13" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[5]_i_1
- (.I0(probe_out_modified[5]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[5]));
- (* SOFT_HLUTNM = "soft_lutpair12" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[6]_i_1
- (.I0(probe_out_modified[6]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[6]));
- (* SOFT_HLUTNM = "soft_lutpair13" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[7]_i_1
- (.I0(probe_out_modified[7]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[7]));
- (* SOFT_HLUTNM = "soft_lutpair14" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[8]_i_1
- (.I0(probe_out_modified[8]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[8]));
- (* SOFT_HLUTNM = "soft_lutpair15" *)
- LUT4 #(
- .INIT(16'h0008))
- \Bus_data_out[9]_i_1
- (.I0(probe_out_modified[9]),
- .I1(xsdb_addr_2_0_p2[2]),
- .I2(xsdb_addr_2_0_p2[0]),
- .I3(xsdb_addr_2_0_p2[1]),
- .O(data_info_probe_in[9]));
- FDRE \Bus_data_out_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(\Bus_data_out[0]_i_1_n_0 ),
- .Q(s_do_i[0]),
- .R(1'b0));
- FDRE \Bus_data_out_reg[10]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[10]),
- .Q(s_do_i[10]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[11]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[11]),
- .Q(s_do_i[11]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[12]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[12]),
- .Q(s_do_i[12]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[13]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[13]),
- .Q(s_do_i[13]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[14]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[14]),
- .Q(s_do_i[14]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[15]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[15]),
- .Q(s_do_i[15]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[1]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[1]),
- .Q(s_do_i[1]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[2]),
- .Q(s_do_i[2]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[3]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[3]),
- .Q(s_do_i[3]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[4]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[4]),
- .Q(s_do_i[4]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[5]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[5]),
- .Q(s_do_i[5]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[6]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[6]),
- .Q(s_do_i[6]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[7]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[7]),
- .Q(s_do_i[7]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[8]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[8]),
- .Q(s_do_i[8]),
- .R(xsdb_addr_8_p2));
- FDRE \Bus_data_out_reg[9]
- (.C(out),
- .CE(1'b1),
- .D(data_info_probe_in[9]),
- .Q(s_do_i[9]),
- .R(xsdb_addr_8_p2));
- LUT2 #(
- .INIT(4'h8))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_2
- (.I0(s_den_o),
- .I1(s_dwe_o),
- .O(xsdb_wr__0));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_4
- (.I0(s_daddr_o[14]),
- .I1(s_daddr_o[15]),
- .I2(s_daddr_o[12]),
- .I3(s_daddr_o[13]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_6
- (.I0(s_daddr_o[6]),
- .I1(s_daddr_o[7]),
- .I2(s_daddr_o[4]),
- .I3(s_daddr_o[5]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ));
- LUT3 #(
- .INIT(8'hB8))
- clear_int_i_1
- (.I0(Q[1]),
- .I1(wr_control_reg),
- .I2(SR),
- .O(clear_int_i_1_n_0));
- FDRE clear_int_reg
- (.C(out),
- .CE(1'b1),
- .D(clear_int_i_1_n_0),
- .Q(SR),
- .R(s_rst_o));
- (* SOFT_HLUTNM = "soft_lutpair17" *)
- LUT3 #(
- .INIT(8'hB8))
- committ_int_i_1
- (.I0(Q[0]),
- .I1(wr_control_reg),
- .I2(in0),
- .O(committ_int_i_1_n_0));
- FDRE committ_int_reg
- (.C(out),
- .CE(1'b1),
- .D(committ_int_i_1_n_0),
- .Q(in0),
- .R(s_rst_o));
- (* SOFT_HLUTNM = "soft_lutpair17" *)
- LUT3 #(
- .INIT(8'hB8))
- int_cnt_rst_i_1
- (.I0(Q[2]),
- .I1(wr_control_reg),
- .I2(int_cnt_rst),
- .O(int_cnt_rst_i_1_n_0));
- FDRE int_cnt_rst_reg
- (.C(out),
- .CE(1'b1),
- .D(int_cnt_rst_i_1_n_0),
- .Q(int_cnt_rst),
- .R(s_rst_o));
- FDRE \probe_out_modified_reg[0]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[0]),
- .Q(probe_out_modified[0]),
- .R(SR));
- FDRE \probe_out_modified_reg[10]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[10]),
- .Q(probe_out_modified[10]),
- .R(SR));
- FDRE \probe_out_modified_reg[11]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[11]),
- .Q(probe_out_modified[11]),
- .R(SR));
- FDRE \probe_out_modified_reg[12]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[12]),
- .Q(probe_out_modified[12]),
- .R(SR));
- FDRE \probe_out_modified_reg[13]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[13]),
- .Q(probe_out_modified[13]),
- .R(SR));
- FDRE \probe_out_modified_reg[14]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[14]),
- .Q(probe_out_modified[14]),
- .R(SR));
- FDRE \probe_out_modified_reg[15]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[15]),
- .Q(probe_out_modified[15]),
- .R(SR));
- FDRE \probe_out_modified_reg[1]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[1]),
- .Q(probe_out_modified[1]),
- .R(SR));
- FDRE \probe_out_modified_reg[2]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[2]),
- .Q(probe_out_modified[2]),
- .R(SR));
- FDRE \probe_out_modified_reg[3]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[3]),
- .Q(probe_out_modified[3]),
- .R(SR));
- FDRE \probe_out_modified_reg[4]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[4]),
- .Q(probe_out_modified[4]),
- .R(SR));
- FDRE \probe_out_modified_reg[5]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[5]),
- .Q(probe_out_modified[5]),
- .R(SR));
- FDRE \probe_out_modified_reg[6]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[6]),
- .Q(probe_out_modified[6]),
- .R(SR));
- FDRE \probe_out_modified_reg[7]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[7]),
- .Q(probe_out_modified[7]),
- .R(SR));
- FDRE \probe_out_modified_reg[8]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[8]),
- .Q(probe_out_modified[8]),
- .R(SR));
- FDRE \probe_out_modified_reg[9]
- (.C(out),
- .CE(wr_probe_out_modified),
- .D(Q[9]),
- .Q(probe_out_modified[9]),
- .R(SR));
- (* SOFT_HLUTNM = "soft_lutpair18" *)
- LUT2 #(
- .INIT(4'h2))
- rd_en_p1_i_1
- (.I0(s_den_o),
- .I1(s_dwe_o),
- .O(xsdb_rd));
- FDRE rd_en_p1_reg
- (.C(out),
- .CE(1'b1),
- .D(xsdb_rd),
- .Q(rd_en_p1),
- .R(s_rst_o));
- FDRE rd_en_p2_reg
- (.C(out),
- .CE(1'b1),
- .D(rd_en_p1),
- .Q(rd_en_p2),
- .R(s_rst_o));
- LUT6 #(
- .INIT(64'h0000000200000000))
- \wr_en[2]_i_1
- (.I0(xsdb_wr__0),
- .I1(\wr_en[4]_i_2_n_0 ),
- .I2(\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ),
- .I3(\wr_en[2]_i_2_n_0 ),
- .I4(\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ),
- .I5(s_daddr_o[1]),
- .O(\wr_en[2]_i_1_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair10" *)
- LUT4 #(
- .INIT(16'hFFFE))
- \wr_en[2]_i_2
- (.I0(s_daddr_o[2]),
- .I1(s_daddr_o[3]),
- .I2(s_daddr_o[0]),
- .I3(s_daddr_o[16]),
- .O(\wr_en[2]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'h0000000200000000))
- \wr_en[4]_i_1
- (.I0(xsdb_wr__0),
- .I1(\wr_en[4]_i_2_n_0 ),
- .I2(\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 ),
- .I3(\wr_en[4]_i_3_n_0 ),
- .I4(\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 ),
- .I5(s_daddr_o[2]),
- .O(\wr_en[4]_i_1_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \wr_en[4]_i_2
- (.I0(s_daddr_o[10]),
- .I1(s_daddr_o[11]),
- .I2(s_daddr_o[8]),
- .I3(s_daddr_o[9]),
- .O(\wr_en[4]_i_2_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair10" *)
- LUT4 #(
- .INIT(16'hFFFE))
- \wr_en[4]_i_3
- (.I0(s_daddr_o[16]),
- .I1(s_daddr_o[3]),
- .I2(s_daddr_o[0]),
- .I3(s_daddr_o[1]),
- .O(\wr_en[4]_i_3_n_0 ));
- FDRE \wr_en_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(\wr_en[2]_i_1_n_0 ),
- .Q(wr_control_reg),
- .R(1'b0));
- FDRE \wr_en_reg[4]
- (.C(out),
- .CE(1'b1),
- .D(\wr_en[4]_i_1_n_0 ),
- .Q(wr_probe_out_modified),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p1_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[0]),
- .Q(xsdb_addr_2_0_p1[0]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p1_reg[1]
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[1]),
- .Q(xsdb_addr_2_0_p1[1]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p1_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[2]),
- .Q(xsdb_addr_2_0_p1[2]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p2_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_2_0_p1[0]),
- .Q(xsdb_addr_2_0_p2[0]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p2_reg[1]
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_2_0_p1[1]),
- .Q(xsdb_addr_2_0_p2[1]),
- .R(1'b0));
- FDRE \xsdb_addr_2_0_p2_reg[2]
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_2_0_p1[2]),
- .Q(xsdb_addr_2_0_p2[2]),
- .R(1'b0));
- FDRE xsdb_addr_8_p1_reg
- (.C(out),
- .CE(1'b1),
- .D(s_daddr_o[8]),
- .Q(xsdb_addr_8_p1),
- .R(1'b0));
- FDRE xsdb_addr_8_p2_reg
- (.C(out),
- .CE(1'b1),
- .D(xsdb_addr_8_p1),
- .Q(xsdb_addr_8_p2),
- .R(1'b0));
- (* SOFT_HLUTNM = "soft_lutpair18" *)
- LUT3 #(
- .INIT(8'hF8))
- xsdb_drdy_i_1
- (.I0(s_dwe_o),
- .I1(s_den_o),
- .I2(rd_en_p2),
- .O(xsdb_drdy_i_1_n_0));
- FDRE xsdb_drdy_reg
- (.C(out),
- .CE(1'b1),
- .D(xsdb_drdy_i_1_n_0),
- .Q(s_drdy_i),
- .R(s_rst_o));
-endmodule
-
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_probe_out_all
- (probe_out0,
- Probe_out_reg,
- SR,
- in0,
- clk,
- out,
- xsdb_wr__0,
- \G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ,
- \G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ,
- s_daddr_o,
- Q);
- output [0:0]probe_out0;
- output [0:0]Probe_out_reg;
- input [0:0]SR;
- input in0;
- input clk;
- input out;
- input xsdb_wr__0;
- input \G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ;
- input \G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ;
- input [8:0]s_daddr_o;
- input [0:0]Q;
-
- (* async_reg = "true" *) wire Committ_1;
- (* async_reg = "true" *) wire Committ_2;
- wire \G_PROBE_OUT[0].PROBE_OUT0_INST_n_1 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_1_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_3_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out[0]_i_5_n_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ;
- wire \G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ;
- wire \G_PROBE_OUT[0].wr_probe_out_reg_n_0_[0] ;
- wire [0:0]Probe_out_reg;
- wire [0:0]Q;
- wire [0:0]SR;
- wire clk;
- wire in0;
- wire out;
- wire [0:0]probe_out0;
- wire [8:0]s_daddr_o;
- wire xsdb_wr__0;
-
- (* ASYNC_REG *)
- (* KEEP = "yes" *)
- FDRE Committ_1_reg
- (.C(clk),
- .CE(1'b1),
- .D(in0),
- .Q(Committ_1),
- .R(1'b0));
- (* ASYNC_REG *)
- (* KEEP = "yes" *)
- FDRE Committ_2_reg
- (.C(clk),
- .CE(1'b1),
- .D(Committ_1),
- .Q(Committ_2),
- .R(1'b0));
- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_probe_out_one \G_PROBE_OUT[0].PROBE_OUT0_INST
- (.Q(Q),
- .SR(SR),
- .clk(clk),
- .\data_int_reg[0]_0 (\G_PROBE_OUT[0].PROBE_OUT0_INST_n_1 ),
- .\data_int_reg[0]_1 (out),
- .\data_int_reg[0]_2 (\G_PROBE_OUT[0].wr_probe_out_reg_n_0_[0] ),
- .out(Committ_2),
- .probe_out0(probe_out0));
- LUT6 #(
- .INIT(64'h0000000200000000))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_1
- (.I0(xsdb_wr__0),
- .I1(\G_PROBE_OUT[0].wr_probe_out[0]_i_3_n_0 ),
- .I2(\G_PROBE_OUT[0].wr_probe_out_reg[0]_0 ),
- .I3(\G_PROBE_OUT[0].wr_probe_out[0]_i_5_n_0 ),
- .I4(\G_PROBE_OUT[0].wr_probe_out_reg[0]_1 ),
- .I5(s_daddr_o[4]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_1_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_3
- (.I0(s_daddr_o[6]),
- .I1(s_daddr_o[7]),
- .I2(s_daddr_o[8]),
- .I3(s_daddr_o[5]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_3_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \G_PROBE_OUT[0].wr_probe_out[0]_i_5
- (.I0(s_daddr_o[2]),
- .I1(s_daddr_o[3]),
- .I2(s_daddr_o[0]),
- .I3(s_daddr_o[1]),
- .O(\G_PROBE_OUT[0].wr_probe_out[0]_i_5_n_0 ));
- FDRE \G_PROBE_OUT[0].wr_probe_out_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(\G_PROBE_OUT[0].wr_probe_out[0]_i_1_n_0 ),
- .Q(\G_PROBE_OUT[0].wr_probe_out_reg_n_0_[0] ),
- .R(1'b0));
- FDRE \Probe_out_reg_int_reg[0]
- (.C(out),
- .CE(1'b1),
- .D(\G_PROBE_OUT[0].PROBE_OUT0_INST_n_1 ),
- .Q(Probe_out_reg),
- .R(1'b0));
-endmodule
-
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_probe_out_one
- (probe_out0,
- \data_int_reg[0]_0 ,
- SR,
- out,
- clk,
- \data_int_reg[0]_1 ,
- Q,
- \data_int_reg[0]_2 );
- output [0:0]probe_out0;
- output \data_int_reg[0]_0 ;
- input [0:0]SR;
- input out;
- input clk;
- input \data_int_reg[0]_1 ;
- input [0:0]Q;
- input \data_int_reg[0]_2 ;
-
- wire [0:0]Q;
- (* DIRECT_RESET *) wire [0:0]SR;
- wire clk;
- wire \data_int[0]_i_1_n_0 ;
- wire \data_int_reg[0]_0 ;
- wire \data_int_reg[0]_1 ;
- wire \data_int_reg[0]_2 ;
- wire out;
- (* DONT_TOUCH *) wire [0:0]probe_out0;
-
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- FDRE \Probe_out_reg[0]
- (.C(clk),
- .CE(out),
- .D(\data_int_reg[0]_0 ),
- .Q(probe_out0),
- .R(SR));
- LUT3 #(
- .INIT(8'hB8))
- \data_int[0]_i_1
- (.I0(Q),
- .I1(\data_int_reg[0]_2 ),
- .I2(\data_int_reg[0]_0 ),
- .O(\data_int[0]_i_1_n_0 ));
- FDRE \data_int_reg[0]
- (.C(\data_int_reg[0]_1 ),
- .CE(1'b1),
- .D(\data_int[0]_i_1_n_0 ),
- .Q(\data_int_reg[0]_0 ),
- .R(SR));
-endmodule
-
-(* C_BUILD_REVISION = "0" *) (* C_BUS_ADDR_WIDTH = "17" *) (* C_BUS_DATA_WIDTH = "16" *)
-(* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* C_CORE_MAJOR_VER = "2" *)
-(* C_CORE_MINOR_ALPHA_VER = "97" *) (* C_CORE_MINOR_VER = "0" *) (* C_CORE_TYPE = "2" *)
-(* C_CSE_DRV_VER = "1" *) (* C_EN_PROBE_IN_ACTIVITY = "0" *) (* C_EN_SYNCHRONIZATION = "1" *)
-(* C_MAJOR_VERSION = "2013" *) (* C_MAX_NUM_PROBE = "256" *) (* C_MAX_WIDTH_PER_PROBE = "256" *)
-(* C_MINOR_VERSION = "1" *) (* C_NEXT_SLAVE = "0" *) (* C_NUM_PROBE_IN = "0" *)
-(* C_NUM_PROBE_OUT = "1" *) (* C_PIPE_IFACE = "0" *) (* C_PROBE_IN0_WIDTH = "1" *)
-(* C_PROBE_IN100_WIDTH = "1" *) (* C_PROBE_IN101_WIDTH = "1" *) (* C_PROBE_IN102_WIDTH = "1" *)
-(* C_PROBE_IN103_WIDTH = "1" *) (* C_PROBE_IN104_WIDTH = "1" *) (* C_PROBE_IN105_WIDTH = "1" *)
-(* C_PROBE_IN106_WIDTH = "1" *) (* C_PROBE_IN107_WIDTH = "1" *) (* C_PROBE_IN108_WIDTH = "1" *)
-(* C_PROBE_IN109_WIDTH = "1" *) (* C_PROBE_IN10_WIDTH = "1" *) (* C_PROBE_IN110_WIDTH = "1" *)
-(* C_PROBE_IN111_WIDTH = "1" *) (* C_PROBE_IN112_WIDTH = "1" *) (* C_PROBE_IN113_WIDTH = "1" *)
-(* C_PROBE_IN114_WIDTH = "1" *) (* C_PROBE_IN115_WIDTH = "1" *) (* C_PROBE_IN116_WIDTH = "1" *)
-(* C_PROBE_IN117_WIDTH = "1" *) (* C_PROBE_IN118_WIDTH = "1" *) (* C_PROBE_IN119_WIDTH = "1" *)
-(* C_PROBE_IN11_WIDTH = "1" *) (* C_PROBE_IN120_WIDTH = "1" *) (* C_PROBE_IN121_WIDTH = "1" *)
-(* C_PROBE_IN122_WIDTH = "1" *) (* C_PROBE_IN123_WIDTH = "1" *) (* C_PROBE_IN124_WIDTH = "1" *)
-(* C_PROBE_IN125_WIDTH = "1" *) (* C_PROBE_IN126_WIDTH = "1" *) (* C_PROBE_IN127_WIDTH = "1" *)
-(* C_PROBE_IN128_WIDTH = "1" *) (* C_PROBE_IN129_WIDTH = "1" *) (* C_PROBE_IN12_WIDTH = "1" *)
-(* C_PROBE_IN130_WIDTH = "1" *) (* C_PROBE_IN131_WIDTH = "1" *) (* C_PROBE_IN132_WIDTH = "1" *)
-(* C_PROBE_IN133_WIDTH = "1" *) (* C_PROBE_IN134_WIDTH = "1" *) (* C_PROBE_IN135_WIDTH = "1" *)
-(* C_PROBE_IN136_WIDTH = "1" *) (* C_PROBE_IN137_WIDTH = "1" *) (* C_PROBE_IN138_WIDTH = "1" *)
-(* C_PROBE_IN139_WIDTH = "1" *) (* C_PROBE_IN13_WIDTH = "1" *) (* C_PROBE_IN140_WIDTH = "1" *)
-(* C_PROBE_IN141_WIDTH = "1" *) (* C_PROBE_IN142_WIDTH = "1" *) (* C_PROBE_IN143_WIDTH = "1" *)
-(* C_PROBE_IN144_WIDTH = "1" *) (* C_PROBE_IN145_WIDTH = "1" *) (* C_PROBE_IN146_WIDTH = "1" *)
-(* C_PROBE_IN147_WIDTH = "1" *) (* C_PROBE_IN148_WIDTH = "1" *) (* C_PROBE_IN149_WIDTH = "1" *)
-(* C_PROBE_IN14_WIDTH = "1" *) (* C_PROBE_IN150_WIDTH = "1" *) (* C_PROBE_IN151_WIDTH = "1" *)
-(* C_PROBE_IN152_WIDTH = "1" *) (* C_PROBE_IN153_WIDTH = "1" *) (* C_PROBE_IN154_WIDTH = "1" *)
-(* C_PROBE_IN155_WIDTH = "1" *) (* C_PROBE_IN156_WIDTH = "1" *) (* C_PROBE_IN157_WIDTH = "1" *)
-(* C_PROBE_IN158_WIDTH = "1" *) (* C_PROBE_IN159_WIDTH = "1" *) (* C_PROBE_IN15_WIDTH = "1" *)
-(* C_PROBE_IN160_WIDTH = "1" *) (* C_PROBE_IN161_WIDTH = "1" *) (* C_PROBE_IN162_WIDTH = "1" *)
-(* C_PROBE_IN163_WIDTH = "1" *) (* C_PROBE_IN164_WIDTH = "1" *) (* C_PROBE_IN165_WIDTH = "1" *)
-(* C_PROBE_IN166_WIDTH = "1" *) (* C_PROBE_IN167_WIDTH = "1" *) (* C_PROBE_IN168_WIDTH = "1" *)
-(* C_PROBE_IN169_WIDTH = "1" *) (* C_PROBE_IN16_WIDTH = "1" *) (* C_PROBE_IN170_WIDTH = "1" *)
-(* C_PROBE_IN171_WIDTH = "1" *) (* C_PROBE_IN172_WIDTH = "1" *) (* C_PROBE_IN173_WIDTH = "1" *)
-(* C_PROBE_IN174_WIDTH = "1" *) (* C_PROBE_IN175_WIDTH = "1" *) (* C_PROBE_IN176_WIDTH = "1" *)
-(* C_PROBE_IN177_WIDTH = "1" *) (* C_PROBE_IN178_WIDTH = "1" *) (* C_PROBE_IN179_WIDTH = "1" *)
-(* C_PROBE_IN17_WIDTH = "1" *) (* C_PROBE_IN180_WIDTH = "1" *) (* C_PROBE_IN181_WIDTH = "1" *)
-(* C_PROBE_IN182_WIDTH = "1" *) (* C_PROBE_IN183_WIDTH = "1" *) (* C_PROBE_IN184_WIDTH = "1" *)
-(* C_PROBE_IN185_WIDTH = "1" *) (* C_PROBE_IN186_WIDTH = "1" *) (* C_PROBE_IN187_WIDTH = "1" *)
-(* C_PROBE_IN188_WIDTH = "1" *) (* C_PROBE_IN189_WIDTH = "1" *) (* C_PROBE_IN18_WIDTH = "1" *)
-(* C_PROBE_IN190_WIDTH = "1" *) (* C_PROBE_IN191_WIDTH = "1" *) (* C_PROBE_IN192_WIDTH = "1" *)
-(* C_PROBE_IN193_WIDTH = "1" *) (* C_PROBE_IN194_WIDTH = "1" *) (* C_PROBE_IN195_WIDTH = "1" *)
-(* C_PROBE_IN196_WIDTH = "1" *) (* C_PROBE_IN197_WIDTH = "1" *) (* C_PROBE_IN198_WIDTH = "1" *)
-(* C_PROBE_IN199_WIDTH = "1" *) (* C_PROBE_IN19_WIDTH = "1" *) (* C_PROBE_IN1_WIDTH = "1" *)
-(* C_PROBE_IN200_WIDTH = "1" *) (* C_PROBE_IN201_WIDTH = "1" *) (* C_PROBE_IN202_WIDTH = "1" *)
-(* C_PROBE_IN203_WIDTH = "1" *) (* C_PROBE_IN204_WIDTH = "1" *) (* C_PROBE_IN205_WIDTH = "1" *)
-(* C_PROBE_IN206_WIDTH = "1" *) (* C_PROBE_IN207_WIDTH = "1" *) (* C_PROBE_IN208_WIDTH = "1" *)
-(* C_PROBE_IN209_WIDTH = "1" *) (* C_PROBE_IN20_WIDTH = "1" *) (* C_PROBE_IN210_WIDTH = "1" *)
-(* C_PROBE_IN211_WIDTH = "1" *) (* C_PROBE_IN212_WIDTH = "1" *) (* C_PROBE_IN213_WIDTH = "1" *)
-(* C_PROBE_IN214_WIDTH = "1" *) (* C_PROBE_IN215_WIDTH = "1" *) (* C_PROBE_IN216_WIDTH = "1" *)
-(* C_PROBE_IN217_WIDTH = "1" *) (* C_PROBE_IN218_WIDTH = "1" *) (* C_PROBE_IN219_WIDTH = "1" *)
-(* C_PROBE_IN21_WIDTH = "1" *) (* C_PROBE_IN220_WIDTH = "1" *) (* C_PROBE_IN221_WIDTH = "1" *)
-(* C_PROBE_IN222_WIDTH = "1" *) (* C_PROBE_IN223_WIDTH = "1" *) (* C_PROBE_IN224_WIDTH = "1" *)
-(* C_PROBE_IN225_WIDTH = "1" *) (* C_PROBE_IN226_WIDTH = "1" *) (* C_PROBE_IN227_WIDTH = "1" *)
-(* C_PROBE_IN228_WIDTH = "1" *) (* C_PROBE_IN229_WIDTH = "1" *) (* C_PROBE_IN22_WIDTH = "1" *)
-(* C_PROBE_IN230_WIDTH = "1" *) (* C_PROBE_IN231_WIDTH = "1" *) (* C_PROBE_IN232_WIDTH = "1" *)
-(* C_PROBE_IN233_WIDTH = "1" *) (* C_PROBE_IN234_WIDTH = "1" *) (* C_PROBE_IN235_WIDTH = "1" *)
-(* C_PROBE_IN236_WIDTH = "1" *) (* C_PROBE_IN237_WIDTH = "1" *) (* C_PROBE_IN238_WIDTH = "1" *)
-(* C_PROBE_IN239_WIDTH = "1" *) (* C_PROBE_IN23_WIDTH = "1" *) (* C_PROBE_IN240_WIDTH = "1" *)
-(* C_PROBE_IN241_WIDTH = "1" *) (* C_PROBE_IN242_WIDTH = "1" *) (* C_PROBE_IN243_WIDTH = "1" *)
-(* C_PROBE_IN244_WIDTH = "1" *) (* C_PROBE_IN245_WIDTH = "1" *) (* C_PROBE_IN246_WIDTH = "1" *)
-(* C_PROBE_IN247_WIDTH = "1" *) (* C_PROBE_IN248_WIDTH = "1" *) (* C_PROBE_IN249_WIDTH = "1" *)
-(* C_PROBE_IN24_WIDTH = "1" *) (* C_PROBE_IN250_WIDTH = "1" *) (* C_PROBE_IN251_WIDTH = "1" *)
-(* C_PROBE_IN252_WIDTH = "1" *) (* C_PROBE_IN253_WIDTH = "1" *) (* C_PROBE_IN254_WIDTH = "1" *)
-(* C_PROBE_IN255_WIDTH = "1" *) (* C_PROBE_IN25_WIDTH = "1" *) (* C_PROBE_IN26_WIDTH = "1" *)
-(* C_PROBE_IN27_WIDTH = "1" *) (* C_PROBE_IN28_WIDTH = "1" *) (* C_PROBE_IN29_WIDTH = "1" *)
-(* C_PROBE_IN2_WIDTH = "1" *) (* C_PROBE_IN30_WIDTH = "1" *) (* C_PROBE_IN31_WIDTH = "1" *)
-(* C_PROBE_IN32_WIDTH = "1" *) (* C_PROBE_IN33_WIDTH = "1" *) (* C_PROBE_IN34_WIDTH = "1" *)
-(* C_PROBE_IN35_WIDTH = "1" *) (* C_PROBE_IN36_WIDTH = "1" *) (* C_PROBE_IN37_WIDTH = "1" *)
-(* C_PROBE_IN38_WIDTH = "1" *) (* C_PROBE_IN39_WIDTH = "1" *) (* C_PROBE_IN3_WIDTH = "1" *)
-(* C_PROBE_IN40_WIDTH = "1" *) (* C_PROBE_IN41_WIDTH = "1" *) (* C_PROBE_IN42_WIDTH = "1" *)
-(* C_PROBE_IN43_WIDTH = "1" *) (* C_PROBE_IN44_WIDTH = "1" *) (* C_PROBE_IN45_WIDTH = "1" *)
-(* C_PROBE_IN46_WIDTH = "1" *) (* C_PROBE_IN47_WIDTH = "1" *) (* C_PROBE_IN48_WIDTH = "1" *)
-(* C_PROBE_IN49_WIDTH = "1" *) (* C_PROBE_IN4_WIDTH = "1" *) (* C_PROBE_IN50_WIDTH = "1" *)
-(* C_PROBE_IN51_WIDTH = "1" *) (* C_PROBE_IN52_WIDTH = "1" *) (* C_PROBE_IN53_WIDTH = "1" *)
-(* C_PROBE_IN54_WIDTH = "1" *) (* C_PROBE_IN55_WIDTH = "1" *) (* C_PROBE_IN56_WIDTH = "1" *)
-(* C_PROBE_IN57_WIDTH = "1" *) (* C_PROBE_IN58_WIDTH = "1" *) (* C_PROBE_IN59_WIDTH = "1" *)
-(* C_PROBE_IN5_WIDTH = "1" *) (* C_PROBE_IN60_WIDTH = "1" *) (* C_PROBE_IN61_WIDTH = "1" *)
-(* C_PROBE_IN62_WIDTH = "1" *) (* C_PROBE_IN63_WIDTH = "1" *) (* C_PROBE_IN64_WIDTH = "1" *)
-(* C_PROBE_IN65_WIDTH = "1" *) (* C_PROBE_IN66_WIDTH = "1" *) (* C_PROBE_IN67_WIDTH = "1" *)
-(* C_PROBE_IN68_WIDTH = "1" *) (* C_PROBE_IN69_WIDTH = "1" *) (* C_PROBE_IN6_WIDTH = "1" *)
-(* C_PROBE_IN70_WIDTH = "1" *) (* C_PROBE_IN71_WIDTH = "1" *) (* C_PROBE_IN72_WIDTH = "1" *)
-(* C_PROBE_IN73_WIDTH = "1" *) (* C_PROBE_IN74_WIDTH = "1" *) (* C_PROBE_IN75_WIDTH = "1" *)
-(* C_PROBE_IN76_WIDTH = "1" *) (* C_PROBE_IN77_WIDTH = "1" *) (* C_PROBE_IN78_WIDTH = "1" *)
-(* C_PROBE_IN79_WIDTH = "1" *) (* C_PROBE_IN7_WIDTH = "1" *) (* C_PROBE_IN80_WIDTH = "1" *)
-(* C_PROBE_IN81_WIDTH = "1" *) (* C_PROBE_IN82_WIDTH = "1" *) (* C_PROBE_IN83_WIDTH = "1" *)
-(* C_PROBE_IN84_WIDTH = "1" *) (* C_PROBE_IN85_WIDTH = "1" *) (* C_PROBE_IN86_WIDTH = "1" *)
-(* C_PROBE_IN87_WIDTH = "1" *) (* C_PROBE_IN88_WIDTH = "1" *) (* C_PROBE_IN89_WIDTH = "1" *)
-(* C_PROBE_IN8_WIDTH = "1" *) (* C_PROBE_IN90_WIDTH = "1" *) (* C_PROBE_IN91_WIDTH = "1" *)
-(* C_PROBE_IN92_WIDTH = "1" *) (* C_PROBE_IN93_WIDTH = "1" *) (* C_PROBE_IN94_WIDTH = "1" *)
-(* C_PROBE_IN95_WIDTH = "1" *) (* C_PROBE_IN96_WIDTH = "1" *) (* C_PROBE_IN97_WIDTH = "1" *)
-(* C_PROBE_IN98_WIDTH = "1" *) (* C_PROBE_IN99_WIDTH = "1" *) (* C_PROBE_IN9_WIDTH = "1" *)
-(* C_PROBE_OUT0_INIT_VAL = "1'b0" *) (* C_PROBE_OUT0_WIDTH = "1" *) (* C_PROBE_OUT100_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT100_WIDTH = "1" *) (* C_PROBE_OUT101_INIT_VAL = "1'b0" *) (* C_PROBE_OUT101_WIDTH = "1" *)
-(* C_PROBE_OUT102_INIT_VAL = "1'b0" *) (* C_PROBE_OUT102_WIDTH = "1" *) (* C_PROBE_OUT103_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT103_WIDTH = "1" *) (* C_PROBE_OUT104_INIT_VAL = "1'b0" *) (* C_PROBE_OUT104_WIDTH = "1" *)
-(* C_PROBE_OUT105_INIT_VAL = "1'b0" *) (* C_PROBE_OUT105_WIDTH = "1" *) (* C_PROBE_OUT106_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT106_WIDTH = "1" *) (* C_PROBE_OUT107_INIT_VAL = "1'b0" *) (* C_PROBE_OUT107_WIDTH = "1" *)
-(* C_PROBE_OUT108_INIT_VAL = "1'b0" *) (* C_PROBE_OUT108_WIDTH = "1" *) (* C_PROBE_OUT109_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT109_WIDTH = "1" *) (* C_PROBE_OUT10_INIT_VAL = "1'b0" *) (* C_PROBE_OUT10_WIDTH = "1" *)
-(* C_PROBE_OUT110_INIT_VAL = "1'b0" *) (* C_PROBE_OUT110_WIDTH = "1" *) (* C_PROBE_OUT111_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT111_WIDTH = "1" *) (* C_PROBE_OUT112_INIT_VAL = "1'b0" *) (* C_PROBE_OUT112_WIDTH = "1" *)
-(* C_PROBE_OUT113_INIT_VAL = "1'b0" *) (* C_PROBE_OUT113_WIDTH = "1" *) (* C_PROBE_OUT114_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT114_WIDTH = "1" *) (* C_PROBE_OUT115_INIT_VAL = "1'b0" *) (* C_PROBE_OUT115_WIDTH = "1" *)
-(* C_PROBE_OUT116_INIT_VAL = "1'b0" *) (* C_PROBE_OUT116_WIDTH = "1" *) (* C_PROBE_OUT117_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT117_WIDTH = "1" *) (* C_PROBE_OUT118_INIT_VAL = "1'b0" *) (* C_PROBE_OUT118_WIDTH = "1" *)
-(* C_PROBE_OUT119_INIT_VAL = "1'b0" *) (* C_PROBE_OUT119_WIDTH = "1" *) (* C_PROBE_OUT11_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT11_WIDTH = "1" *) (* C_PROBE_OUT120_INIT_VAL = "1'b0" *) (* C_PROBE_OUT120_WIDTH = "1" *)
-(* C_PROBE_OUT121_INIT_VAL = "1'b0" *) (* C_PROBE_OUT121_WIDTH = "1" *) (* C_PROBE_OUT122_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT122_WIDTH = "1" *) (* C_PROBE_OUT123_INIT_VAL = "1'b0" *) (* C_PROBE_OUT123_WIDTH = "1" *)
-(* C_PROBE_OUT124_INIT_VAL = "1'b0" *) (* C_PROBE_OUT124_WIDTH = "1" *) (* C_PROBE_OUT125_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT125_WIDTH = "1" *) (* C_PROBE_OUT126_INIT_VAL = "1'b0" *) (* C_PROBE_OUT126_WIDTH = "1" *)
-(* C_PROBE_OUT127_INIT_VAL = "1'b0" *) (* C_PROBE_OUT127_WIDTH = "1" *) (* C_PROBE_OUT128_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT128_WIDTH = "1" *) (* C_PROBE_OUT129_INIT_VAL = "1'b0" *) (* C_PROBE_OUT129_WIDTH = "1" *)
-(* C_PROBE_OUT12_INIT_VAL = "1'b0" *) (* C_PROBE_OUT12_WIDTH = "1" *) (* C_PROBE_OUT130_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT130_WIDTH = "1" *) (* C_PROBE_OUT131_INIT_VAL = "1'b0" *) (* C_PROBE_OUT131_WIDTH = "1" *)
-(* C_PROBE_OUT132_INIT_VAL = "1'b0" *) (* C_PROBE_OUT132_WIDTH = "1" *) (* C_PROBE_OUT133_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT133_WIDTH = "1" *) (* C_PROBE_OUT134_INIT_VAL = "1'b0" *) (* C_PROBE_OUT134_WIDTH = "1" *)
-(* C_PROBE_OUT135_INIT_VAL = "1'b0" *) (* C_PROBE_OUT135_WIDTH = "1" *) (* C_PROBE_OUT136_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT136_WIDTH = "1" *) (* C_PROBE_OUT137_INIT_VAL = "1'b0" *) (* C_PROBE_OUT137_WIDTH = "1" *)
-(* C_PROBE_OUT138_INIT_VAL = "1'b0" *) (* C_PROBE_OUT138_WIDTH = "1" *) (* C_PROBE_OUT139_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT139_WIDTH = "1" *) (* C_PROBE_OUT13_INIT_VAL = "1'b0" *) (* C_PROBE_OUT13_WIDTH = "1" *)
-(* C_PROBE_OUT140_INIT_VAL = "1'b0" *) (* C_PROBE_OUT140_WIDTH = "1" *) (* C_PROBE_OUT141_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT141_WIDTH = "1" *) (* C_PROBE_OUT142_INIT_VAL = "1'b0" *) (* C_PROBE_OUT142_WIDTH = "1" *)
-(* C_PROBE_OUT143_INIT_VAL = "1'b0" *) (* C_PROBE_OUT143_WIDTH = "1" *) (* C_PROBE_OUT144_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT144_WIDTH = "1" *) (* C_PROBE_OUT145_INIT_VAL = "1'b0" *) (* C_PROBE_OUT145_WIDTH = "1" *)
-(* C_PROBE_OUT146_INIT_VAL = "1'b0" *) (* C_PROBE_OUT146_WIDTH = "1" *) (* C_PROBE_OUT147_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT147_WIDTH = "1" *) (* C_PROBE_OUT148_INIT_VAL = "1'b0" *) (* C_PROBE_OUT148_WIDTH = "1" *)
-(* C_PROBE_OUT149_INIT_VAL = "1'b0" *) (* C_PROBE_OUT149_WIDTH = "1" *) (* C_PROBE_OUT14_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT14_WIDTH = "1" *) (* C_PROBE_OUT150_INIT_VAL = "1'b0" *) (* C_PROBE_OUT150_WIDTH = "1" *)
-(* C_PROBE_OUT151_INIT_VAL = "1'b0" *) (* C_PROBE_OUT151_WIDTH = "1" *) (* C_PROBE_OUT152_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT152_WIDTH = "1" *) (* C_PROBE_OUT153_INIT_VAL = "1'b0" *) (* C_PROBE_OUT153_WIDTH = "1" *)
-(* C_PROBE_OUT154_INIT_VAL = "1'b0" *) (* C_PROBE_OUT154_WIDTH = "1" *) (* C_PROBE_OUT155_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT155_WIDTH = "1" *) (* C_PROBE_OUT156_INIT_VAL = "1'b0" *) (* C_PROBE_OUT156_WIDTH = "1" *)
-(* C_PROBE_OUT157_INIT_VAL = "1'b0" *) (* C_PROBE_OUT157_WIDTH = "1" *) (* C_PROBE_OUT158_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT158_WIDTH = "1" *) (* C_PROBE_OUT159_INIT_VAL = "1'b0" *) (* C_PROBE_OUT159_WIDTH = "1" *)
-(* C_PROBE_OUT15_INIT_VAL = "1'b0" *) (* C_PROBE_OUT15_WIDTH = "1" *) (* C_PROBE_OUT160_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT160_WIDTH = "1" *) (* C_PROBE_OUT161_INIT_VAL = "1'b0" *) (* C_PROBE_OUT161_WIDTH = "1" *)
-(* C_PROBE_OUT162_INIT_VAL = "1'b0" *) (* C_PROBE_OUT162_WIDTH = "1" *) (* C_PROBE_OUT163_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT163_WIDTH = "1" *) (* C_PROBE_OUT164_INIT_VAL = "1'b0" *) (* C_PROBE_OUT164_WIDTH = "1" *)
-(* C_PROBE_OUT165_INIT_VAL = "1'b0" *) (* C_PROBE_OUT165_WIDTH = "1" *) (* C_PROBE_OUT166_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT166_WIDTH = "1" *) (* C_PROBE_OUT167_INIT_VAL = "1'b0" *) (* C_PROBE_OUT167_WIDTH = "1" *)
-(* C_PROBE_OUT168_INIT_VAL = "1'b0" *) (* C_PROBE_OUT168_WIDTH = "1" *) (* C_PROBE_OUT169_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT169_WIDTH = "1" *) (* C_PROBE_OUT16_INIT_VAL = "1'b0" *) (* C_PROBE_OUT16_WIDTH = "1" *)
-(* C_PROBE_OUT170_INIT_VAL = "1'b0" *) (* C_PROBE_OUT170_WIDTH = "1" *) (* C_PROBE_OUT171_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT171_WIDTH = "1" *) (* C_PROBE_OUT172_INIT_VAL = "1'b0" *) (* C_PROBE_OUT172_WIDTH = "1" *)
-(* C_PROBE_OUT173_INIT_VAL = "1'b0" *) (* C_PROBE_OUT173_WIDTH = "1" *) (* C_PROBE_OUT174_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT174_WIDTH = "1" *) (* C_PROBE_OUT175_INIT_VAL = "1'b0" *) (* C_PROBE_OUT175_WIDTH = "1" *)
-(* C_PROBE_OUT176_INIT_VAL = "1'b0" *) (* C_PROBE_OUT176_WIDTH = "1" *) (* C_PROBE_OUT177_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT177_WIDTH = "1" *) (* C_PROBE_OUT178_INIT_VAL = "1'b0" *) (* C_PROBE_OUT178_WIDTH = "1" *)
-(* C_PROBE_OUT179_INIT_VAL = "1'b0" *) (* C_PROBE_OUT179_WIDTH = "1" *) (* C_PROBE_OUT17_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT17_WIDTH = "1" *) (* C_PROBE_OUT180_INIT_VAL = "1'b0" *) (* C_PROBE_OUT180_WIDTH = "1" *)
-(* C_PROBE_OUT181_INIT_VAL = "1'b0" *) (* C_PROBE_OUT181_WIDTH = "1" *) (* C_PROBE_OUT182_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT182_WIDTH = "1" *) (* C_PROBE_OUT183_INIT_VAL = "1'b0" *) (* C_PROBE_OUT183_WIDTH = "1" *)
-(* C_PROBE_OUT184_INIT_VAL = "1'b0" *) (* C_PROBE_OUT184_WIDTH = "1" *) (* C_PROBE_OUT185_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT185_WIDTH = "1" *) (* C_PROBE_OUT186_INIT_VAL = "1'b0" *) (* C_PROBE_OUT186_WIDTH = "1" *)
-(* C_PROBE_OUT187_INIT_VAL = "1'b0" *) (* C_PROBE_OUT187_WIDTH = "1" *) (* C_PROBE_OUT188_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT188_WIDTH = "1" *) (* C_PROBE_OUT189_INIT_VAL = "1'b0" *) (* C_PROBE_OUT189_WIDTH = "1" *)
-(* C_PROBE_OUT18_INIT_VAL = "1'b0" *) (* C_PROBE_OUT18_WIDTH = "1" *) (* C_PROBE_OUT190_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT190_WIDTH = "1" *) (* C_PROBE_OUT191_INIT_VAL = "1'b0" *) (* C_PROBE_OUT191_WIDTH = "1" *)
-(* C_PROBE_OUT192_INIT_VAL = "1'b0" *) (* C_PROBE_OUT192_WIDTH = "1" *) (* C_PROBE_OUT193_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT193_WIDTH = "1" *) (* C_PROBE_OUT194_INIT_VAL = "1'b0" *) (* C_PROBE_OUT194_WIDTH = "1" *)
-(* C_PROBE_OUT195_INIT_VAL = "1'b0" *) (* C_PROBE_OUT195_WIDTH = "1" *) (* C_PROBE_OUT196_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT196_WIDTH = "1" *) (* C_PROBE_OUT197_INIT_VAL = "1'b0" *) (* C_PROBE_OUT197_WIDTH = "1" *)
-(* C_PROBE_OUT198_INIT_VAL = "1'b0" *) (* C_PROBE_OUT198_WIDTH = "1" *) (* C_PROBE_OUT199_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT199_WIDTH = "1" *) (* C_PROBE_OUT19_INIT_VAL = "1'b0" *) (* C_PROBE_OUT19_WIDTH = "1" *)
-(* C_PROBE_OUT1_INIT_VAL = "1'b0" *) (* C_PROBE_OUT1_WIDTH = "1" *) (* C_PROBE_OUT200_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT200_WIDTH = "1" *) (* C_PROBE_OUT201_INIT_VAL = "1'b0" *) (* C_PROBE_OUT201_WIDTH = "1" *)
-(* C_PROBE_OUT202_INIT_VAL = "1'b0" *) (* C_PROBE_OUT202_WIDTH = "1" *) (* C_PROBE_OUT203_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT203_WIDTH = "1" *) (* C_PROBE_OUT204_INIT_VAL = "1'b0" *) (* C_PROBE_OUT204_WIDTH = "1" *)
-(* C_PROBE_OUT205_INIT_VAL = "1'b0" *) (* C_PROBE_OUT205_WIDTH = "1" *) (* C_PROBE_OUT206_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT206_WIDTH = "1" *) (* C_PROBE_OUT207_INIT_VAL = "1'b0" *) (* C_PROBE_OUT207_WIDTH = "1" *)
-(* C_PROBE_OUT208_INIT_VAL = "1'b0" *) (* C_PROBE_OUT208_WIDTH = "1" *) (* C_PROBE_OUT209_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT209_WIDTH = "1" *) (* C_PROBE_OUT20_INIT_VAL = "1'b0" *) (* C_PROBE_OUT20_WIDTH = "1" *)
-(* C_PROBE_OUT210_INIT_VAL = "1'b0" *) (* C_PROBE_OUT210_WIDTH = "1" *) (* C_PROBE_OUT211_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT211_WIDTH = "1" *) (* C_PROBE_OUT212_INIT_VAL = "1'b0" *) (* C_PROBE_OUT212_WIDTH = "1" *)
-(* C_PROBE_OUT213_INIT_VAL = "1'b0" *) (* C_PROBE_OUT213_WIDTH = "1" *) (* C_PROBE_OUT214_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT214_WIDTH = "1" *) (* C_PROBE_OUT215_INIT_VAL = "1'b0" *) (* C_PROBE_OUT215_WIDTH = "1" *)
-(* C_PROBE_OUT216_INIT_VAL = "1'b0" *) (* C_PROBE_OUT216_WIDTH = "1" *) (* C_PROBE_OUT217_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT217_WIDTH = "1" *) (* C_PROBE_OUT218_INIT_VAL = "1'b0" *) (* C_PROBE_OUT218_WIDTH = "1" *)
-(* C_PROBE_OUT219_INIT_VAL = "1'b0" *) (* C_PROBE_OUT219_WIDTH = "1" *) (* C_PROBE_OUT21_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT21_WIDTH = "1" *) (* C_PROBE_OUT220_INIT_VAL = "1'b0" *) (* C_PROBE_OUT220_WIDTH = "1" *)
-(* C_PROBE_OUT221_INIT_VAL = "1'b0" *) (* C_PROBE_OUT221_WIDTH = "1" *) (* C_PROBE_OUT222_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT222_WIDTH = "1" *) (* C_PROBE_OUT223_INIT_VAL = "1'b0" *) (* C_PROBE_OUT223_WIDTH = "1" *)
-(* C_PROBE_OUT224_INIT_VAL = "1'b0" *) (* C_PROBE_OUT224_WIDTH = "1" *) (* C_PROBE_OUT225_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT225_WIDTH = "1" *) (* C_PROBE_OUT226_INIT_VAL = "1'b0" *) (* C_PROBE_OUT226_WIDTH = "1" *)
-(* C_PROBE_OUT227_INIT_VAL = "1'b0" *) (* C_PROBE_OUT227_WIDTH = "1" *) (* C_PROBE_OUT228_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT228_WIDTH = "1" *) (* C_PROBE_OUT229_INIT_VAL = "1'b0" *) (* C_PROBE_OUT229_WIDTH = "1" *)
-(* C_PROBE_OUT22_INIT_VAL = "1'b0" *) (* C_PROBE_OUT22_WIDTH = "1" *) (* C_PROBE_OUT230_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT230_WIDTH = "1" *) (* C_PROBE_OUT231_INIT_VAL = "1'b0" *) (* C_PROBE_OUT231_WIDTH = "1" *)
-(* C_PROBE_OUT232_INIT_VAL = "1'b0" *) (* C_PROBE_OUT232_WIDTH = "1" *) (* C_PROBE_OUT233_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT233_WIDTH = "1" *) (* C_PROBE_OUT234_INIT_VAL = "1'b0" *) (* C_PROBE_OUT234_WIDTH = "1" *)
-(* C_PROBE_OUT235_INIT_VAL = "1'b0" *) (* C_PROBE_OUT235_WIDTH = "1" *) (* C_PROBE_OUT236_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT236_WIDTH = "1" *) (* C_PROBE_OUT237_INIT_VAL = "1'b0" *) (* C_PROBE_OUT237_WIDTH = "1" *)
-(* C_PROBE_OUT238_INIT_VAL = "1'b0" *) (* C_PROBE_OUT238_WIDTH = "1" *) (* C_PROBE_OUT239_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT239_WIDTH = "1" *) (* C_PROBE_OUT23_INIT_VAL = "1'b0" *) (* C_PROBE_OUT23_WIDTH = "1" *)
-(* C_PROBE_OUT240_INIT_VAL = "1'b0" *) (* C_PROBE_OUT240_WIDTH = "1" *) (* C_PROBE_OUT241_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT241_WIDTH = "1" *) (* C_PROBE_OUT242_INIT_VAL = "1'b0" *) (* C_PROBE_OUT242_WIDTH = "1" *)
-(* C_PROBE_OUT243_INIT_VAL = "1'b0" *) (* C_PROBE_OUT243_WIDTH = "1" *) (* C_PROBE_OUT244_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT244_WIDTH = "1" *) (* C_PROBE_OUT245_INIT_VAL = "1'b0" *) (* C_PROBE_OUT245_WIDTH = "1" *)
-(* C_PROBE_OUT246_INIT_VAL = "1'b0" *) (* C_PROBE_OUT246_WIDTH = "1" *) (* C_PROBE_OUT247_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT247_WIDTH = "1" *) (* C_PROBE_OUT248_INIT_VAL = "1'b0" *) (* C_PROBE_OUT248_WIDTH = "1" *)
-(* C_PROBE_OUT249_INIT_VAL = "1'b0" *) (* C_PROBE_OUT249_WIDTH = "1" *) (* C_PROBE_OUT24_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT24_WIDTH = "1" *) (* C_PROBE_OUT250_INIT_VAL = "1'b0" *) (* C_PROBE_OUT250_WIDTH = "1" *)
-(* C_PROBE_OUT251_INIT_VAL = "1'b0" *) (* C_PROBE_OUT251_WIDTH = "1" *) (* C_PROBE_OUT252_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT252_WIDTH = "1" *) (* C_PROBE_OUT253_INIT_VAL = "1'b0" *) (* C_PROBE_OUT253_WIDTH = "1" *)
-(* C_PROBE_OUT254_INIT_VAL = "1'b0" *) (* C_PROBE_OUT254_WIDTH = "1" *) (* C_PROBE_OUT255_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT255_WIDTH = "1" *) (* C_PROBE_OUT25_INIT_VAL = "1'b0" *) (* C_PROBE_OUT25_WIDTH = "1" *)
-(* C_PROBE_OUT26_INIT_VAL = "1'b0" *) (* C_PROBE_OUT26_WIDTH = "1" *) (* C_PROBE_OUT27_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT27_WIDTH = "1" *) (* C_PROBE_OUT28_INIT_VAL = "1'b0" *) (* C_PROBE_OUT28_WIDTH = "1" *)
-(* C_PROBE_OUT29_INIT_VAL = "1'b0" *) (* C_PROBE_OUT29_WIDTH = "1" *) (* C_PROBE_OUT2_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT2_WIDTH = "1" *) (* C_PROBE_OUT30_INIT_VAL = "1'b0" *) (* C_PROBE_OUT30_WIDTH = "1" *)
-(* C_PROBE_OUT31_INIT_VAL = "1'b0" *) (* C_PROBE_OUT31_WIDTH = "1" *) (* C_PROBE_OUT32_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT32_WIDTH = "1" *) (* C_PROBE_OUT33_INIT_VAL = "1'b0" *) (* C_PROBE_OUT33_WIDTH = "1" *)
-(* C_PROBE_OUT34_INIT_VAL = "1'b0" *) (* C_PROBE_OUT34_WIDTH = "1" *) (* C_PROBE_OUT35_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT35_WIDTH = "1" *) (* C_PROBE_OUT36_INIT_VAL = "1'b0" *) (* C_PROBE_OUT36_WIDTH = "1" *)
-(* C_PROBE_OUT37_INIT_VAL = "1'b0" *) (* C_PROBE_OUT37_WIDTH = "1" *) (* C_PROBE_OUT38_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT38_WIDTH = "1" *) (* C_PROBE_OUT39_INIT_VAL = "1'b0" *) (* C_PROBE_OUT39_WIDTH = "1" *)
-(* C_PROBE_OUT3_INIT_VAL = "1'b0" *) (* C_PROBE_OUT3_WIDTH = "1" *) (* C_PROBE_OUT40_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT40_WIDTH = "1" *) (* C_PROBE_OUT41_INIT_VAL = "1'b0" *) (* C_PROBE_OUT41_WIDTH = "1" *)
-(* C_PROBE_OUT42_INIT_VAL = "1'b0" *) (* C_PROBE_OUT42_WIDTH = "1" *) (* C_PROBE_OUT43_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT43_WIDTH = "1" *) (* C_PROBE_OUT44_INIT_VAL = "1'b0" *) (* C_PROBE_OUT44_WIDTH = "1" *)
-(* C_PROBE_OUT45_INIT_VAL = "1'b0" *) (* C_PROBE_OUT45_WIDTH = "1" *) (* C_PROBE_OUT46_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT46_WIDTH = "1" *) (* C_PROBE_OUT47_INIT_VAL = "1'b0" *) (* C_PROBE_OUT47_WIDTH = "1" *)
-(* C_PROBE_OUT48_INIT_VAL = "1'b0" *) (* C_PROBE_OUT48_WIDTH = "1" *) (* C_PROBE_OUT49_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT49_WIDTH = "1" *) (* C_PROBE_OUT4_INIT_VAL = "1'b0" *) (* C_PROBE_OUT4_WIDTH = "1" *)
-(* C_PROBE_OUT50_INIT_VAL = "1'b0" *) (* C_PROBE_OUT50_WIDTH = "1" *) (* C_PROBE_OUT51_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT51_WIDTH = "1" *) (* C_PROBE_OUT52_INIT_VAL = "1'b0" *) (* C_PROBE_OUT52_WIDTH = "1" *)
-(* C_PROBE_OUT53_INIT_VAL = "1'b0" *) (* C_PROBE_OUT53_WIDTH = "1" *) (* C_PROBE_OUT54_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT54_WIDTH = "1" *) (* C_PROBE_OUT55_INIT_VAL = "1'b0" *) (* C_PROBE_OUT55_WIDTH = "1" *)
-(* C_PROBE_OUT56_INIT_VAL = "1'b0" *) (* C_PROBE_OUT56_WIDTH = "1" *) (* C_PROBE_OUT57_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT57_WIDTH = "1" *) (* C_PROBE_OUT58_INIT_VAL = "1'b0" *) (* C_PROBE_OUT58_WIDTH = "1" *)
-(* C_PROBE_OUT59_INIT_VAL = "1'b0" *) (* C_PROBE_OUT59_WIDTH = "1" *) (* C_PROBE_OUT5_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT5_WIDTH = "1" *) (* C_PROBE_OUT60_INIT_VAL = "1'b0" *) (* C_PROBE_OUT60_WIDTH = "1" *)
-(* C_PROBE_OUT61_INIT_VAL = "1'b0" *) (* C_PROBE_OUT61_WIDTH = "1" *) (* C_PROBE_OUT62_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT62_WIDTH = "1" *) (* C_PROBE_OUT63_INIT_VAL = "1'b0" *) (* C_PROBE_OUT63_WIDTH = "1" *)
-(* C_PROBE_OUT64_INIT_VAL = "1'b0" *) (* C_PROBE_OUT64_WIDTH = "1" *) (* C_PROBE_OUT65_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT65_WIDTH = "1" *) (* C_PROBE_OUT66_INIT_VAL = "1'b0" *) (* C_PROBE_OUT66_WIDTH = "1" *)
-(* C_PROBE_OUT67_INIT_VAL = "1'b0" *) (* C_PROBE_OUT67_WIDTH = "1" *) (* C_PROBE_OUT68_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT68_WIDTH = "1" *) (* C_PROBE_OUT69_INIT_VAL = "1'b0" *) (* C_PROBE_OUT69_WIDTH = "1" *)
-(* C_PROBE_OUT6_INIT_VAL = "1'b0" *) (* C_PROBE_OUT6_WIDTH = "1" *) (* C_PROBE_OUT70_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT70_WIDTH = "1" *) (* C_PROBE_OUT71_INIT_VAL = "1'b0" *) (* C_PROBE_OUT71_WIDTH = "1" *)
-(* C_PROBE_OUT72_INIT_VAL = "1'b0" *) (* C_PROBE_OUT72_WIDTH = "1" *) (* C_PROBE_OUT73_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT73_WIDTH = "1" *) (* C_PROBE_OUT74_INIT_VAL = "1'b0" *) (* C_PROBE_OUT74_WIDTH = "1" *)
-(* C_PROBE_OUT75_INIT_VAL = "1'b0" *) (* C_PROBE_OUT75_WIDTH = "1" *) (* C_PROBE_OUT76_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT76_WIDTH = "1" *) (* C_PROBE_OUT77_INIT_VAL = "1'b0" *) (* C_PROBE_OUT77_WIDTH = "1" *)
-(* C_PROBE_OUT78_INIT_VAL = "1'b0" *) (* C_PROBE_OUT78_WIDTH = "1" *) (* C_PROBE_OUT79_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT79_WIDTH = "1" *) (* C_PROBE_OUT7_INIT_VAL = "1'b0" *) (* C_PROBE_OUT7_WIDTH = "1" *)
-(* C_PROBE_OUT80_INIT_VAL = "1'b0" *) (* C_PROBE_OUT80_WIDTH = "1" *) (* C_PROBE_OUT81_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT81_WIDTH = "1" *) (* C_PROBE_OUT82_INIT_VAL = "1'b0" *) (* C_PROBE_OUT82_WIDTH = "1" *)
-(* C_PROBE_OUT83_INIT_VAL = "1'b0" *) (* C_PROBE_OUT83_WIDTH = "1" *) (* C_PROBE_OUT84_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT84_WIDTH = "1" *) (* C_PROBE_OUT85_INIT_VAL = "1'b0" *) (* C_PROBE_OUT85_WIDTH = "1" *)
-(* C_PROBE_OUT86_INIT_VAL = "1'b0" *) (* C_PROBE_OUT86_WIDTH = "1" *) (* C_PROBE_OUT87_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT87_WIDTH = "1" *) (* C_PROBE_OUT88_INIT_VAL = "1'b0" *) (* C_PROBE_OUT88_WIDTH = "1" *)
-(* C_PROBE_OUT89_INIT_VAL = "1'b0" *) (* C_PROBE_OUT89_WIDTH = "1" *) (* C_PROBE_OUT8_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT8_WIDTH = "1" *) (* C_PROBE_OUT90_INIT_VAL = "1'b0" *) (* C_PROBE_OUT90_WIDTH = "1" *)
-(* C_PROBE_OUT91_INIT_VAL = "1'b0" *) (* C_PROBE_OUT91_WIDTH = "1" *) (* C_PROBE_OUT92_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT92_WIDTH = "1" *) (* C_PROBE_OUT93_INIT_VAL = "1'b0" *) (* C_PROBE_OUT93_WIDTH = "1" *)
-(* C_PROBE_OUT94_INIT_VAL = "1'b0" *) (* C_PROBE_OUT94_WIDTH = "1" *) (* C_PROBE_OUT95_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT95_WIDTH = "1" *) (* C_PROBE_OUT96_INIT_VAL = "1'b0" *) (* C_PROBE_OUT96_WIDTH = "1" *)
-(* C_PROBE_OUT97_INIT_VAL = "1'b0" *) (* C_PROBE_OUT97_WIDTH = "1" *) (* C_PROBE_OUT98_INIT_VAL = "1'b0" *)
-(* C_PROBE_OUT98_WIDTH = "1" *) (* C_PROBE_OUT99_INIT_VAL = "1'b0" *) (* C_PROBE_OUT99_WIDTH = "1" *)
-(* C_PROBE_OUT9_INIT_VAL = "1'b0" *) (* C_PROBE_OUT9_WIDTH = "1" *) (* C_USE_TEST_REG = "1" *)
-(* C_XDEVICEFAMILY = "zynq" *) (* C_XLNX_HW_PROBE_INFO = "DEFAULT" *) (* C_XSDB_SLAVE_TYPE = "33" *)
-(* DowngradeIPIdentifiedWarnings = "yes" *) (* LC_HIGH_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *) (* LC_HIGH_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *) (* LC_HIGH_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *) (* LC_HIGH_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *) (* LC_HIGH_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *) (* LC_HIGH_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *) (* LC_HIGH_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *) (* LC_HIGH_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *) (* LC_HIGH_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *) (* LC_HIGH_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *) (* LC_HIGH_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *) (* LC_HIGH_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *) (* LC_HIGH_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *) (* LC_HIGH_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *) (* LC_HIGH_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *) (* LC_HIGH_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *) (* LC_HIGH_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *) (* LC_HIGH_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *) (* LC_HIGH_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *) (* LC_HIGH_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *) (* LC_HIGH_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *) (* LC_HIGH_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *) (* LC_HIGH_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *) (* LC_HIGH_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *) (* LC_HIGH_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *) (* LC_HIGH_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *) (* LC_HIGH_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *) (* LC_HIGH_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *) (* LC_HIGH_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *) (* LC_HIGH_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *) (* LC_HIGH_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *) (* LC_HIGH_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *) (* LC_HIGH_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *) (* LC_HIGH_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *) (* LC_HIGH_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *) (* LC_HIGH_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *) (* LC_HIGH_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *) (* LC_HIGH_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *) (* LC_HIGH_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *) (* LC_HIGH_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *) (* LC_HIGH_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *) (* LC_HIGH_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *) (* LC_HIGH_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *) (* LC_HIGH_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *) (* LC_HIGH_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *) (* LC_HIGH_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *) (* LC_HIGH_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *) (* LC_HIGH_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *) (* LC_HIGH_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *) (* LC_HIGH_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *) (* LC_HIGH_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *) (* LC_HIGH_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *) (* LC_HIGH_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *) (* LC_HIGH_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *) (* LC_HIGH_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *) (* LC_HIGH_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *) (* LC_HIGH_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *) (* LC_HIGH_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *) (* LC_HIGH_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *) (* LC_HIGH_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *) (* LC_HIGH_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *) (* LC_HIGH_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *) (* LC_HIGH_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *) (* LC_HIGH_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *) (* LC_HIGH_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *) (* LC_HIGH_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *) (* LC_HIGH_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *) (* LC_HIGH_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *) (* LC_HIGH_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *) (* LC_HIGH_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *) (* LC_HIGH_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *) (* LC_HIGH_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *) (* LC_HIGH_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *) (* LC_HIGH_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *) (* LC_HIGH_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *) (* LC_HIGH_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *) (* LC_HIGH_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *) (* LC_HIGH_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *) (* LC_HIGH_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *) (* LC_HIGH_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *) (* LC_HIGH_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *) (* LC_HIGH_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *) (* LC_HIGH_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *) (* LC_HIGH_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *) (* LC_HIGH_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *) (* LC_HIGH_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *) (* LC_HIGH_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *) (* LC_HIGH_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *) (* LC_HIGH_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *) (* LC_HIGH_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *) (* LC_HIGH_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *) (* LC_HIGH_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *) (* LC_HIGH_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *) (* LC_HIGH_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *) (* LC_HIGH_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *) (* LC_HIGH_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *) (* LC_HIGH_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *) (* LC_HIGH_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *) (* LC_HIGH_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *) (* LC_HIGH_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *) (* LC_HIGH_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *) (* LC_HIGH_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *) (* LC_HIGH_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *) (* LC_HIGH_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *) (* LC_HIGH_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *) (* LC_HIGH_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *) (* LC_HIGH_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *) (* LC_HIGH_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *) (* LC_HIGH_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *) (* LC_HIGH_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *) (* LC_HIGH_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *) (* LC_HIGH_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *) (* LC_HIGH_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *) (* LC_HIGH_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *) (* LC_HIGH_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *) (* LC_HIGH_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *) (* LC_HIGH_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *) (* LC_HIGH_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *) (* LC_HIGH_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *) (* LC_HIGH_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *) (* LC_HIGH_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *) (* LC_HIGH_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *) (* LC_HIGH_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *) (* LC_HIGH_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *) (* LC_HIGH_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *) (* LC_HIGH_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *) (* LC_HIGH_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *) (* LC_HIGH_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *) (* LC_HIGH_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *) (* LC_HIGH_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *) (* LC_HIGH_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *) (* LC_HIGH_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *) (* LC_HIGH_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *) (* LC_HIGH_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *) (* LC_HIGH_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *) (* LC_HIGH_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *) (* LC_HIGH_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *) (* LC_HIGH_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *) (* LC_HIGH_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *) (* LC_HIGH_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *)
-(* LC_HIGH_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *) (* LC_HIGH_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *) (* LC_LOW_BIT_POS_PROBE_OUT0 = "16'b0000000000000000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT1 = "16'b0000000000000001" *) (* LC_LOW_BIT_POS_PROBE_OUT10 = "16'b0000000000001010" *) (* LC_LOW_BIT_POS_PROBE_OUT100 = "16'b0000000001100100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT101 = "16'b0000000001100101" *) (* LC_LOW_BIT_POS_PROBE_OUT102 = "16'b0000000001100110" *) (* LC_LOW_BIT_POS_PROBE_OUT103 = "16'b0000000001100111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT104 = "16'b0000000001101000" *) (* LC_LOW_BIT_POS_PROBE_OUT105 = "16'b0000000001101001" *) (* LC_LOW_BIT_POS_PROBE_OUT106 = "16'b0000000001101010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT107 = "16'b0000000001101011" *) (* LC_LOW_BIT_POS_PROBE_OUT108 = "16'b0000000001101100" *) (* LC_LOW_BIT_POS_PROBE_OUT109 = "16'b0000000001101101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT11 = "16'b0000000000001011" *) (* LC_LOW_BIT_POS_PROBE_OUT110 = "16'b0000000001101110" *) (* LC_LOW_BIT_POS_PROBE_OUT111 = "16'b0000000001101111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT112 = "16'b0000000001110000" *) (* LC_LOW_BIT_POS_PROBE_OUT113 = "16'b0000000001110001" *) (* LC_LOW_BIT_POS_PROBE_OUT114 = "16'b0000000001110010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT115 = "16'b0000000001110011" *) (* LC_LOW_BIT_POS_PROBE_OUT116 = "16'b0000000001110100" *) (* LC_LOW_BIT_POS_PROBE_OUT117 = "16'b0000000001110101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT118 = "16'b0000000001110110" *) (* LC_LOW_BIT_POS_PROBE_OUT119 = "16'b0000000001110111" *) (* LC_LOW_BIT_POS_PROBE_OUT12 = "16'b0000000000001100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT120 = "16'b0000000001111000" *) (* LC_LOW_BIT_POS_PROBE_OUT121 = "16'b0000000001111001" *) (* LC_LOW_BIT_POS_PROBE_OUT122 = "16'b0000000001111010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT123 = "16'b0000000001111011" *) (* LC_LOW_BIT_POS_PROBE_OUT124 = "16'b0000000001111100" *) (* LC_LOW_BIT_POS_PROBE_OUT125 = "16'b0000000001111101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT126 = "16'b0000000001111110" *) (* LC_LOW_BIT_POS_PROBE_OUT127 = "16'b0000000001111111" *) (* LC_LOW_BIT_POS_PROBE_OUT128 = "16'b0000000010000000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT129 = "16'b0000000010000001" *) (* LC_LOW_BIT_POS_PROBE_OUT13 = "16'b0000000000001101" *) (* LC_LOW_BIT_POS_PROBE_OUT130 = "16'b0000000010000010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT131 = "16'b0000000010000011" *) (* LC_LOW_BIT_POS_PROBE_OUT132 = "16'b0000000010000100" *) (* LC_LOW_BIT_POS_PROBE_OUT133 = "16'b0000000010000101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT134 = "16'b0000000010000110" *) (* LC_LOW_BIT_POS_PROBE_OUT135 = "16'b0000000010000111" *) (* LC_LOW_BIT_POS_PROBE_OUT136 = "16'b0000000010001000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT137 = "16'b0000000010001001" *) (* LC_LOW_BIT_POS_PROBE_OUT138 = "16'b0000000010001010" *) (* LC_LOW_BIT_POS_PROBE_OUT139 = "16'b0000000010001011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT14 = "16'b0000000000001110" *) (* LC_LOW_BIT_POS_PROBE_OUT140 = "16'b0000000010001100" *) (* LC_LOW_BIT_POS_PROBE_OUT141 = "16'b0000000010001101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT142 = "16'b0000000010001110" *) (* LC_LOW_BIT_POS_PROBE_OUT143 = "16'b0000000010001111" *) (* LC_LOW_BIT_POS_PROBE_OUT144 = "16'b0000000010010000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT145 = "16'b0000000010010001" *) (* LC_LOW_BIT_POS_PROBE_OUT146 = "16'b0000000010010010" *) (* LC_LOW_BIT_POS_PROBE_OUT147 = "16'b0000000010010011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT148 = "16'b0000000010010100" *) (* LC_LOW_BIT_POS_PROBE_OUT149 = "16'b0000000010010101" *) (* LC_LOW_BIT_POS_PROBE_OUT15 = "16'b0000000000001111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT150 = "16'b0000000010010110" *) (* LC_LOW_BIT_POS_PROBE_OUT151 = "16'b0000000010010111" *) (* LC_LOW_BIT_POS_PROBE_OUT152 = "16'b0000000010011000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT153 = "16'b0000000010011001" *) (* LC_LOW_BIT_POS_PROBE_OUT154 = "16'b0000000010011010" *) (* LC_LOW_BIT_POS_PROBE_OUT155 = "16'b0000000010011011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT156 = "16'b0000000010011100" *) (* LC_LOW_BIT_POS_PROBE_OUT157 = "16'b0000000010011101" *) (* LC_LOW_BIT_POS_PROBE_OUT158 = "16'b0000000010011110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT159 = "16'b0000000010011111" *) (* LC_LOW_BIT_POS_PROBE_OUT16 = "16'b0000000000010000" *) (* LC_LOW_BIT_POS_PROBE_OUT160 = "16'b0000000010100000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT161 = "16'b0000000010100001" *) (* LC_LOW_BIT_POS_PROBE_OUT162 = "16'b0000000010100010" *) (* LC_LOW_BIT_POS_PROBE_OUT163 = "16'b0000000010100011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT164 = "16'b0000000010100100" *) (* LC_LOW_BIT_POS_PROBE_OUT165 = "16'b0000000010100101" *) (* LC_LOW_BIT_POS_PROBE_OUT166 = "16'b0000000010100110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT167 = "16'b0000000010100111" *) (* LC_LOW_BIT_POS_PROBE_OUT168 = "16'b0000000010101000" *) (* LC_LOW_BIT_POS_PROBE_OUT169 = "16'b0000000010101001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT17 = "16'b0000000000010001" *) (* LC_LOW_BIT_POS_PROBE_OUT170 = "16'b0000000010101010" *) (* LC_LOW_BIT_POS_PROBE_OUT171 = "16'b0000000010101011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT172 = "16'b0000000010101100" *) (* LC_LOW_BIT_POS_PROBE_OUT173 = "16'b0000000010101101" *) (* LC_LOW_BIT_POS_PROBE_OUT174 = "16'b0000000010101110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT175 = "16'b0000000010101111" *) (* LC_LOW_BIT_POS_PROBE_OUT176 = "16'b0000000010110000" *) (* LC_LOW_BIT_POS_PROBE_OUT177 = "16'b0000000010110001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT178 = "16'b0000000010110010" *) (* LC_LOW_BIT_POS_PROBE_OUT179 = "16'b0000000010110011" *) (* LC_LOW_BIT_POS_PROBE_OUT18 = "16'b0000000000010010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT180 = "16'b0000000010110100" *) (* LC_LOW_BIT_POS_PROBE_OUT181 = "16'b0000000010110101" *) (* LC_LOW_BIT_POS_PROBE_OUT182 = "16'b0000000010110110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT183 = "16'b0000000010110111" *) (* LC_LOW_BIT_POS_PROBE_OUT184 = "16'b0000000010111000" *) (* LC_LOW_BIT_POS_PROBE_OUT185 = "16'b0000000010111001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT186 = "16'b0000000010111010" *) (* LC_LOW_BIT_POS_PROBE_OUT187 = "16'b0000000010111011" *) (* LC_LOW_BIT_POS_PROBE_OUT188 = "16'b0000000010111100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT189 = "16'b0000000010111101" *) (* LC_LOW_BIT_POS_PROBE_OUT19 = "16'b0000000000010011" *) (* LC_LOW_BIT_POS_PROBE_OUT190 = "16'b0000000010111110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT191 = "16'b0000000010111111" *) (* LC_LOW_BIT_POS_PROBE_OUT192 = "16'b0000000011000000" *) (* LC_LOW_BIT_POS_PROBE_OUT193 = "16'b0000000011000001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT194 = "16'b0000000011000010" *) (* LC_LOW_BIT_POS_PROBE_OUT195 = "16'b0000000011000011" *) (* LC_LOW_BIT_POS_PROBE_OUT196 = "16'b0000000011000100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT197 = "16'b0000000011000101" *) (* LC_LOW_BIT_POS_PROBE_OUT198 = "16'b0000000011000110" *) (* LC_LOW_BIT_POS_PROBE_OUT199 = "16'b0000000011000111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT2 = "16'b0000000000000010" *) (* LC_LOW_BIT_POS_PROBE_OUT20 = "16'b0000000000010100" *) (* LC_LOW_BIT_POS_PROBE_OUT200 = "16'b0000000011001000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT201 = "16'b0000000011001001" *) (* LC_LOW_BIT_POS_PROBE_OUT202 = "16'b0000000011001010" *) (* LC_LOW_BIT_POS_PROBE_OUT203 = "16'b0000000011001011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT204 = "16'b0000000011001100" *) (* LC_LOW_BIT_POS_PROBE_OUT205 = "16'b0000000011001101" *) (* LC_LOW_BIT_POS_PROBE_OUT206 = "16'b0000000011001110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT207 = "16'b0000000011001111" *) (* LC_LOW_BIT_POS_PROBE_OUT208 = "16'b0000000011010000" *) (* LC_LOW_BIT_POS_PROBE_OUT209 = "16'b0000000011010001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT21 = "16'b0000000000010101" *) (* LC_LOW_BIT_POS_PROBE_OUT210 = "16'b0000000011010010" *) (* LC_LOW_BIT_POS_PROBE_OUT211 = "16'b0000000011010011" *)
-(* LC_LOW_BIT_POS_PROBE_OUT212 = "16'b0000000011010100" *) (* LC_LOW_BIT_POS_PROBE_OUT213 = "16'b0000000011010101" *) (* LC_LOW_BIT_POS_PROBE_OUT214 = "16'b0000000011010110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT215 = "16'b0000000011010111" *) (* LC_LOW_BIT_POS_PROBE_OUT216 = "16'b0000000011011000" *) (* LC_LOW_BIT_POS_PROBE_OUT217 = "16'b0000000011011001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT218 = "16'b0000000011011010" *) (* LC_LOW_BIT_POS_PROBE_OUT219 = "16'b0000000011011011" *) (* LC_LOW_BIT_POS_PROBE_OUT22 = "16'b0000000000010110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT220 = "16'b0000000011011100" *) (* LC_LOW_BIT_POS_PROBE_OUT221 = "16'b0000000011011101" *) (* LC_LOW_BIT_POS_PROBE_OUT222 = "16'b0000000011011110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT223 = "16'b0000000011011111" *) (* LC_LOW_BIT_POS_PROBE_OUT224 = "16'b0000000011100000" *) (* LC_LOW_BIT_POS_PROBE_OUT225 = "16'b0000000011100001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT226 = "16'b0000000011100010" *) (* LC_LOW_BIT_POS_PROBE_OUT227 = "16'b0000000011100011" *) (* LC_LOW_BIT_POS_PROBE_OUT228 = "16'b0000000011100100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT229 = "16'b0000000011100101" *) (* LC_LOW_BIT_POS_PROBE_OUT23 = "16'b0000000000010111" *) (* LC_LOW_BIT_POS_PROBE_OUT230 = "16'b0000000011100110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT231 = "16'b0000000011100111" *) (* LC_LOW_BIT_POS_PROBE_OUT232 = "16'b0000000011101000" *) (* LC_LOW_BIT_POS_PROBE_OUT233 = "16'b0000000011101001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT234 = "16'b0000000011101010" *) (* LC_LOW_BIT_POS_PROBE_OUT235 = "16'b0000000011101011" *) (* LC_LOW_BIT_POS_PROBE_OUT236 = "16'b0000000011101100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT237 = "16'b0000000011101101" *) (* LC_LOW_BIT_POS_PROBE_OUT238 = "16'b0000000011101110" *) (* LC_LOW_BIT_POS_PROBE_OUT239 = "16'b0000000011101111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT24 = "16'b0000000000011000" *) (* LC_LOW_BIT_POS_PROBE_OUT240 = "16'b0000000011110000" *) (* LC_LOW_BIT_POS_PROBE_OUT241 = "16'b0000000011110001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT242 = "16'b0000000011110010" *) (* LC_LOW_BIT_POS_PROBE_OUT243 = "16'b0000000011110011" *) (* LC_LOW_BIT_POS_PROBE_OUT244 = "16'b0000000011110100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT245 = "16'b0000000011110101" *) (* LC_LOW_BIT_POS_PROBE_OUT246 = "16'b0000000011110110" *) (* LC_LOW_BIT_POS_PROBE_OUT247 = "16'b0000000011110111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT248 = "16'b0000000011111000" *) (* LC_LOW_BIT_POS_PROBE_OUT249 = "16'b0000000011111001" *) (* LC_LOW_BIT_POS_PROBE_OUT25 = "16'b0000000000011001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT250 = "16'b0000000011111010" *) (* LC_LOW_BIT_POS_PROBE_OUT251 = "16'b0000000011111011" *) (* LC_LOW_BIT_POS_PROBE_OUT252 = "16'b0000000011111100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT253 = "16'b0000000011111101" *) (* LC_LOW_BIT_POS_PROBE_OUT254 = "16'b0000000011111110" *) (* LC_LOW_BIT_POS_PROBE_OUT255 = "16'b0000000011111111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT26 = "16'b0000000000011010" *) (* LC_LOW_BIT_POS_PROBE_OUT27 = "16'b0000000000011011" *) (* LC_LOW_BIT_POS_PROBE_OUT28 = "16'b0000000000011100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT29 = "16'b0000000000011101" *) (* LC_LOW_BIT_POS_PROBE_OUT3 = "16'b0000000000000011" *) (* LC_LOW_BIT_POS_PROBE_OUT30 = "16'b0000000000011110" *)
-(* LC_LOW_BIT_POS_PROBE_OUT31 = "16'b0000000000011111" *) (* LC_LOW_BIT_POS_PROBE_OUT32 = "16'b0000000000100000" *) (* LC_LOW_BIT_POS_PROBE_OUT33 = "16'b0000000000100001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT34 = "16'b0000000000100010" *) (* LC_LOW_BIT_POS_PROBE_OUT35 = "16'b0000000000100011" *) (* LC_LOW_BIT_POS_PROBE_OUT36 = "16'b0000000000100100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT37 = "16'b0000000000100101" *) (* LC_LOW_BIT_POS_PROBE_OUT38 = "16'b0000000000100110" *) (* LC_LOW_BIT_POS_PROBE_OUT39 = "16'b0000000000100111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT4 = "16'b0000000000000100" *) (* LC_LOW_BIT_POS_PROBE_OUT40 = "16'b0000000000101000" *) (* LC_LOW_BIT_POS_PROBE_OUT41 = "16'b0000000000101001" *)
-(* LC_LOW_BIT_POS_PROBE_OUT42 = "16'b0000000000101010" *) (* LC_LOW_BIT_POS_PROBE_OUT43 = "16'b0000000000101011" *) (* LC_LOW_BIT_POS_PROBE_OUT44 = "16'b0000000000101100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT45 = "16'b0000000000101101" *) (* LC_LOW_BIT_POS_PROBE_OUT46 = "16'b0000000000101110" *) (* LC_LOW_BIT_POS_PROBE_OUT47 = "16'b0000000000101111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT48 = "16'b0000000000110000" *) (* LC_LOW_BIT_POS_PROBE_OUT49 = "16'b0000000000110001" *) (* LC_LOW_BIT_POS_PROBE_OUT5 = "16'b0000000000000101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT50 = "16'b0000000000110010" *) (* LC_LOW_BIT_POS_PROBE_OUT51 = "16'b0000000000110011" *) (* LC_LOW_BIT_POS_PROBE_OUT52 = "16'b0000000000110100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT53 = "16'b0000000000110101" *) (* LC_LOW_BIT_POS_PROBE_OUT54 = "16'b0000000000110110" *) (* LC_LOW_BIT_POS_PROBE_OUT55 = "16'b0000000000110111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT56 = "16'b0000000000111000" *) (* LC_LOW_BIT_POS_PROBE_OUT57 = "16'b0000000000111001" *) (* LC_LOW_BIT_POS_PROBE_OUT58 = "16'b0000000000111010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT59 = "16'b0000000000111011" *) (* LC_LOW_BIT_POS_PROBE_OUT6 = "16'b0000000000000110" *) (* LC_LOW_BIT_POS_PROBE_OUT60 = "16'b0000000000111100" *)
-(* LC_LOW_BIT_POS_PROBE_OUT61 = "16'b0000000000111101" *) (* LC_LOW_BIT_POS_PROBE_OUT62 = "16'b0000000000111110" *) (* LC_LOW_BIT_POS_PROBE_OUT63 = "16'b0000000000111111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT64 = "16'b0000000001000000" *) (* LC_LOW_BIT_POS_PROBE_OUT65 = "16'b0000000001000001" *) (* LC_LOW_BIT_POS_PROBE_OUT66 = "16'b0000000001000010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT67 = "16'b0000000001000011" *) (* LC_LOW_BIT_POS_PROBE_OUT68 = "16'b0000000001000100" *) (* LC_LOW_BIT_POS_PROBE_OUT69 = "16'b0000000001000101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT7 = "16'b0000000000000111" *) (* LC_LOW_BIT_POS_PROBE_OUT70 = "16'b0000000001000110" *) (* LC_LOW_BIT_POS_PROBE_OUT71 = "16'b0000000001000111" *)
-(* LC_LOW_BIT_POS_PROBE_OUT72 = "16'b0000000001001000" *) (* LC_LOW_BIT_POS_PROBE_OUT73 = "16'b0000000001001001" *) (* LC_LOW_BIT_POS_PROBE_OUT74 = "16'b0000000001001010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT75 = "16'b0000000001001011" *) (* LC_LOW_BIT_POS_PROBE_OUT76 = "16'b0000000001001100" *) (* LC_LOW_BIT_POS_PROBE_OUT77 = "16'b0000000001001101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT78 = "16'b0000000001001110" *) (* LC_LOW_BIT_POS_PROBE_OUT79 = "16'b0000000001001111" *) (* LC_LOW_BIT_POS_PROBE_OUT8 = "16'b0000000000001000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT80 = "16'b0000000001010000" *) (* LC_LOW_BIT_POS_PROBE_OUT81 = "16'b0000000001010001" *) (* LC_LOW_BIT_POS_PROBE_OUT82 = "16'b0000000001010010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT83 = "16'b0000000001010011" *) (* LC_LOW_BIT_POS_PROBE_OUT84 = "16'b0000000001010100" *) (* LC_LOW_BIT_POS_PROBE_OUT85 = "16'b0000000001010101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT86 = "16'b0000000001010110" *) (* LC_LOW_BIT_POS_PROBE_OUT87 = "16'b0000000001010111" *) (* LC_LOW_BIT_POS_PROBE_OUT88 = "16'b0000000001011000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT89 = "16'b0000000001011001" *) (* LC_LOW_BIT_POS_PROBE_OUT9 = "16'b0000000000001001" *) (* LC_LOW_BIT_POS_PROBE_OUT90 = "16'b0000000001011010" *)
-(* LC_LOW_BIT_POS_PROBE_OUT91 = "16'b0000000001011011" *) (* LC_LOW_BIT_POS_PROBE_OUT92 = "16'b0000000001011100" *) (* LC_LOW_BIT_POS_PROBE_OUT93 = "16'b0000000001011101" *)
-(* LC_LOW_BIT_POS_PROBE_OUT94 = "16'b0000000001011110" *) (* LC_LOW_BIT_POS_PROBE_OUT95 = "16'b0000000001011111" *) (* LC_LOW_BIT_POS_PROBE_OUT96 = "16'b0000000001100000" *)
-(* LC_LOW_BIT_POS_PROBE_OUT97 = "16'b0000000001100001" *) (* LC_LOW_BIT_POS_PROBE_OUT98 = "16'b0000000001100010" *) (* LC_LOW_BIT_POS_PROBE_OUT99 = "16'b0000000001100011" *)
-(* LC_PROBE_IN_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* LC_PROBE_OUT_HIGH_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *) (* LC_PROBE_OUT_INIT_VAL_STRING = "256'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
-(* LC_PROBE_OUT_LOW_BIT_POS_STRING = "4096'b0000000011111111000000001111111000000000111111010000000011111100000000001111101100000000111110100000000011111001000000001111100000000000111101110000000011110110000000001111010100000000111101000000000011110011000000001111001000000000111100010000000011110000000000001110111100000000111011100000000011101101000000001110110000000000111010110000000011101010000000001110100100000000111010000000000011100111000000001110011000000000111001010000000011100100000000001110001100000000111000100000000011100001000000001110000000000000110111110000000011011110000000001101110100000000110111000000000011011011000000001101101000000000110110010000000011011000000000001101011100000000110101100000000011010101000000001101010000000000110100110000000011010010000000001101000100000000110100000000000011001111000000001100111000000000110011010000000011001100000000001100101100000000110010100000000011001001000000001100100000000000110001110000000011000110000000001100010100000000110001000000000011000011000000001100001000000000110000010000000011000000000000001011111100000000101111100000000010111101000000001011110000000000101110110000000010111010000000001011100100000000101110000000000010110111000000001011011000000000101101010000000010110100000000001011001100000000101100100000000010110001000000001011000000000000101011110000000010101110000000001010110100000000101011000000000010101011000000001010101000000000101010010000000010101000000000001010011100000000101001100000000010100101000000001010010000000000101000110000000010100010000000001010000100000000101000000000000010011111000000001001111000000000100111010000000010011100000000001001101100000000100110100000000010011001000000001001100000000000100101110000000010010110000000001001010100000000100101000000000010010011000000001001001000000000100100010000000010010000000000001000111100000000100011100000000010001101000000001000110000000000100010110000000010001010000000001000100100000000100010000000000010000111000000001000011000000000100001010000000010000100000000001000001100000000100000100000000010000001000000001000000000000000011111110000000001111110000000000111110100000000011111000000000001111011000000000111101000000000011110010000000001111000000000000111011100000000011101100000000001110101000000000111010000000000011100110000000001110010000000000111000100000000011100000000000001101111000000000110111000000000011011010000000001101100000000000110101100000000011010100000000001101001000000000110100000000000011001110000000001100110000000000110010100000000011001000000000001100011000000000110001000000000011000010000000001100000000000000101111100000000010111100000000001011101000000000101110000000000010110110000000001011010000000000101100100000000010110000000000001010111000000000101011000000000010101010000000001010100000000000101001100000000010100100000000001010001000000000101000000000000010011110000000001001110000000000100110100000000010011000000000001001011000000000100101000000000010010010000000001001000000000000100011100000000010001100000000001000101000000000100010000000000010000110000000001000010000000000100000100000000010000000000000000111111000000000011111000000000001111010000000000111100000000000011101100000000001110100000000000111001000000000011100000000000001101110000000000110110000000000011010100000000001101000000000000110011000000000011001000000000001100010000000000110000000000000010111100000000001011100000000000101101000000000010110000000000001010110000000000101010000000000010100100000000001010000000000000100111000000000010011000000000001001010000000000100100000000000010001100000000001000100000000000100001000000000010000000000000000111110000000000011110000000000001110100000000000111000000000000011011000000000001101000000000000110010000000000011000000000000001011100000000000101100000000000010101000000000001010000000000000100110000000000010010000000000001000100000000000100000000000000001111000000000000111000000000000011010000000000001100000000000000101100000000000010100000000000001001000000000000100000000000000001110000000000000110000000000000010100000000000001000000000000000011000000000000001000000000000000010000000000000000" *) (* LC_PROBE_OUT_WIDTH_STRING = "2048'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* LC_TOTAL_PROBE_IN_WIDTH = "0" *)
-(* LC_TOTAL_PROBE_OUT_WIDTH = "1" *) (* dont_touch = "true" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_vio
- (clk,
- probe_in0,
- probe_in1,
- probe_in2,
- probe_in3,
- probe_in4,
- probe_in5,
- probe_in6,
- probe_in7,
- probe_in8,
- probe_in9,
- probe_in10,
- probe_in11,
- probe_in12,
- probe_in13,
- probe_in14,
- probe_in15,
- probe_in16,
- probe_in17,
- probe_in18,
- probe_in19,
- probe_in20,
- probe_in21,
- probe_in22,
- probe_in23,
- probe_in24,
- probe_in25,
- probe_in26,
- probe_in27,
- probe_in28,
- probe_in29,
- probe_in30,
- probe_in31,
- probe_in32,
- probe_in33,
- probe_in34,
- probe_in35,
- probe_in36,
- probe_in37,
- probe_in38,
- probe_in39,
- probe_in40,
- probe_in41,
- probe_in42,
- probe_in43,
- probe_in44,
- probe_in45,
- probe_in46,
- probe_in47,
- probe_in48,
- probe_in49,
- probe_in50,
- probe_in51,
- probe_in52,
- probe_in53,
- probe_in54,
- probe_in55,
- probe_in56,
- probe_in57,
- probe_in58,
- probe_in59,
- probe_in60,
- probe_in61,
- probe_in62,
- probe_in63,
- probe_in64,
- probe_in65,
- probe_in66,
- probe_in67,
- probe_in68,
- probe_in69,
- probe_in70,
- probe_in71,
- probe_in72,
- probe_in73,
- probe_in74,
- probe_in75,
- probe_in76,
- probe_in77,
- probe_in78,
- probe_in79,
- probe_in80,
- probe_in81,
- probe_in82,
- probe_in83,
- probe_in84,
- probe_in85,
- probe_in86,
- probe_in87,
- probe_in88,
- probe_in89,
- probe_in90,
- probe_in91,
- probe_in92,
- probe_in93,
- probe_in94,
- probe_in95,
- probe_in96,
- probe_in97,
- probe_in98,
- probe_in99,
- probe_in100,
- probe_in101,
- probe_in102,
- probe_in103,
- probe_in104,
- probe_in105,
- probe_in106,
- probe_in107,
- probe_in108,
- probe_in109,
- probe_in110,
- probe_in111,
- probe_in112,
- probe_in113,
- probe_in114,
- probe_in115,
- probe_in116,
- probe_in117,
- probe_in118,
- probe_in119,
- probe_in120,
- probe_in121,
- probe_in122,
- probe_in123,
- probe_in124,
- probe_in125,
- probe_in126,
- probe_in127,
- probe_in128,
- probe_in129,
- probe_in130,
- probe_in131,
- probe_in132,
- probe_in133,
- probe_in134,
- probe_in135,
- probe_in136,
- probe_in137,
- probe_in138,
- probe_in139,
- probe_in140,
- probe_in141,
- probe_in142,
- probe_in143,
- probe_in144,
- probe_in145,
- probe_in146,
- probe_in147,
- probe_in148,
- probe_in149,
- probe_in150,
- probe_in151,
- probe_in152,
- probe_in153,
- probe_in154,
- probe_in155,
- probe_in156,
- probe_in157,
- probe_in158,
- probe_in159,
- probe_in160,
- probe_in161,
- probe_in162,
- probe_in163,
- probe_in164,
- probe_in165,
- probe_in166,
- probe_in167,
- probe_in168,
- probe_in169,
- probe_in170,
- probe_in171,
- probe_in172,
- probe_in173,
- probe_in174,
- probe_in175,
- probe_in176,
- probe_in177,
- probe_in178,
- probe_in179,
- probe_in180,
- probe_in181,
- probe_in182,
- probe_in183,
- probe_in184,
- probe_in185,
- probe_in186,
- probe_in187,
- probe_in188,
- probe_in189,
- probe_in190,
- probe_in191,
- probe_in192,
- probe_in193,
- probe_in194,
- probe_in195,
- probe_in196,
- probe_in197,
- probe_in198,
- probe_in199,
- probe_in200,
- probe_in201,
- probe_in202,
- probe_in203,
- probe_in204,
- probe_in205,
- probe_in206,
- probe_in207,
- probe_in208,
- probe_in209,
- probe_in210,
- probe_in211,
- probe_in212,
- probe_in213,
- probe_in214,
- probe_in215,
- probe_in216,
- probe_in217,
- probe_in218,
- probe_in219,
- probe_in220,
- probe_in221,
- probe_in222,
- probe_in223,
- probe_in224,
- probe_in225,
- probe_in226,
- probe_in227,
- probe_in228,
- probe_in229,
- probe_in230,
- probe_in231,
- probe_in232,
- probe_in233,
- probe_in234,
- probe_in235,
- probe_in236,
- probe_in237,
- probe_in238,
- probe_in239,
- probe_in240,
- probe_in241,
- probe_in242,
- probe_in243,
- probe_in244,
- probe_in245,
- probe_in246,
- probe_in247,
- probe_in248,
- probe_in249,
- probe_in250,
- probe_in251,
- probe_in252,
- probe_in253,
- probe_in254,
- probe_in255,
- sl_iport0,
- sl_oport0,
- probe_out0,
- probe_out1,
- probe_out2,
- probe_out3,
- probe_out4,
- probe_out5,
- probe_out6,
- probe_out7,
- probe_out8,
- probe_out9,
- probe_out10,
- probe_out11,
- probe_out12,
- probe_out13,
- probe_out14,
- probe_out15,
- probe_out16,
- probe_out17,
- probe_out18,
- probe_out19,
- probe_out20,
- probe_out21,
- probe_out22,
- probe_out23,
- probe_out24,
- probe_out25,
- probe_out26,
- probe_out27,
- probe_out28,
- probe_out29,
- probe_out30,
- probe_out31,
- probe_out32,
- probe_out33,
- probe_out34,
- probe_out35,
- probe_out36,
- probe_out37,
- probe_out38,
- probe_out39,
- probe_out40,
- probe_out41,
- probe_out42,
- probe_out43,
- probe_out44,
- probe_out45,
- probe_out46,
- probe_out47,
- probe_out48,
- probe_out49,
- probe_out50,
- probe_out51,
- probe_out52,
- probe_out53,
- probe_out54,
- probe_out55,
- probe_out56,
- probe_out57,
- probe_out58,
- probe_out59,
- probe_out60,
- probe_out61,
- probe_out62,
- probe_out63,
- probe_out64,
- probe_out65,
- probe_out66,
- probe_out67,
- probe_out68,
- probe_out69,
- probe_out70,
- probe_out71,
- probe_out72,
- probe_out73,
- probe_out74,
- probe_out75,
- probe_out76,
- probe_out77,
- probe_out78,
- probe_out79,
- probe_out80,
- probe_out81,
- probe_out82,
- probe_out83,
- probe_out84,
- probe_out85,
- probe_out86,
- probe_out87,
- probe_out88,
- probe_out89,
- probe_out90,
- probe_out91,
- probe_out92,
- probe_out93,
- probe_out94,
- probe_out95,
- probe_out96,
- probe_out97,
- probe_out98,
- probe_out99,
- probe_out100,
- probe_out101,
- probe_out102,
- probe_out103,
- probe_out104,
- probe_out105,
- probe_out106,
- probe_out107,
- probe_out108,
- probe_out109,
- probe_out110,
- probe_out111,
- probe_out112,
- probe_out113,
- probe_out114,
- probe_out115,
- probe_out116,
- probe_out117,
- probe_out118,
- probe_out119,
- probe_out120,
- probe_out121,
- probe_out122,
- probe_out123,
- probe_out124,
- probe_out125,
- probe_out126,
- probe_out127,
- probe_out128,
- probe_out129,
- probe_out130,
- probe_out131,
- probe_out132,
- probe_out133,
- probe_out134,
- probe_out135,
- probe_out136,
- probe_out137,
- probe_out138,
- probe_out139,
- probe_out140,
- probe_out141,
- probe_out142,
- probe_out143,
- probe_out144,
- probe_out145,
- probe_out146,
- probe_out147,
- probe_out148,
- probe_out149,
- probe_out150,
- probe_out151,
- probe_out152,
- probe_out153,
- probe_out154,
- probe_out155,
- probe_out156,
- probe_out157,
- probe_out158,
- probe_out159,
- probe_out160,
- probe_out161,
- probe_out162,
- probe_out163,
- probe_out164,
- probe_out165,
- probe_out166,
- probe_out167,
- probe_out168,
- probe_out169,
- probe_out170,
- probe_out171,
- probe_out172,
- probe_out173,
- probe_out174,
- probe_out175,
- probe_out176,
- probe_out177,
- probe_out178,
- probe_out179,
- probe_out180,
- probe_out181,
- probe_out182,
- probe_out183,
- probe_out184,
- probe_out185,
- probe_out186,
- probe_out187,
- probe_out188,
- probe_out189,
- probe_out190,
- probe_out191,
- probe_out192,
- probe_out193,
- probe_out194,
- probe_out195,
- probe_out196,
- probe_out197,
- probe_out198,
- probe_out199,
- probe_out200,
- probe_out201,
- probe_out202,
- probe_out203,
- probe_out204,
- probe_out205,
- probe_out206,
- probe_out207,
- probe_out208,
- probe_out209,
- probe_out210,
- probe_out211,
- probe_out212,
- probe_out213,
- probe_out214,
- probe_out215,
- probe_out216,
- probe_out217,
- probe_out218,
- probe_out219,
- probe_out220,
- probe_out221,
- probe_out222,
- probe_out223,
- probe_out224,
- probe_out225,
- probe_out226,
- probe_out227,
- probe_out228,
- probe_out229,
- probe_out230,
- probe_out231,
- probe_out232,
- probe_out233,
- probe_out234,
- probe_out235,
- probe_out236,
- probe_out237,
- probe_out238,
- probe_out239,
- probe_out240,
- probe_out241,
- probe_out242,
- probe_out243,
- probe_out244,
- probe_out245,
- probe_out246,
- probe_out247,
- probe_out248,
- probe_out249,
- probe_out250,
- probe_out251,
- probe_out252,
- probe_out253,
- probe_out254,
- probe_out255);
- input clk;
- input [0:0]probe_in0;
- input [0:0]probe_in1;
- input [0:0]probe_in2;
- input [0:0]probe_in3;
- input [0:0]probe_in4;
- input [0:0]probe_in5;
- input [0:0]probe_in6;
- input [0:0]probe_in7;
- input [0:0]probe_in8;
- input [0:0]probe_in9;
- input [0:0]probe_in10;
- input [0:0]probe_in11;
- input [0:0]probe_in12;
- input [0:0]probe_in13;
- input [0:0]probe_in14;
- input [0:0]probe_in15;
- input [0:0]probe_in16;
- input [0:0]probe_in17;
- input [0:0]probe_in18;
- input [0:0]probe_in19;
- input [0:0]probe_in20;
- input [0:0]probe_in21;
- input [0:0]probe_in22;
- input [0:0]probe_in23;
- input [0:0]probe_in24;
- input [0:0]probe_in25;
- input [0:0]probe_in26;
- input [0:0]probe_in27;
- input [0:0]probe_in28;
- input [0:0]probe_in29;
- input [0:0]probe_in30;
- input [0:0]probe_in31;
- input [0:0]probe_in32;
- input [0:0]probe_in33;
- input [0:0]probe_in34;
- input [0:0]probe_in35;
- input [0:0]probe_in36;
- input [0:0]probe_in37;
- input [0:0]probe_in38;
- input [0:0]probe_in39;
- input [0:0]probe_in40;
- input [0:0]probe_in41;
- input [0:0]probe_in42;
- input [0:0]probe_in43;
- input [0:0]probe_in44;
- input [0:0]probe_in45;
- input [0:0]probe_in46;
- input [0:0]probe_in47;
- input [0:0]probe_in48;
- input [0:0]probe_in49;
- input [0:0]probe_in50;
- input [0:0]probe_in51;
- input [0:0]probe_in52;
- input [0:0]probe_in53;
- input [0:0]probe_in54;
- input [0:0]probe_in55;
- input [0:0]probe_in56;
- input [0:0]probe_in57;
- input [0:0]probe_in58;
- input [0:0]probe_in59;
- input [0:0]probe_in60;
- input [0:0]probe_in61;
- input [0:0]probe_in62;
- input [0:0]probe_in63;
- input [0:0]probe_in64;
- input [0:0]probe_in65;
- input [0:0]probe_in66;
- input [0:0]probe_in67;
- input [0:0]probe_in68;
- input [0:0]probe_in69;
- input [0:0]probe_in70;
- input [0:0]probe_in71;
- input [0:0]probe_in72;
- input [0:0]probe_in73;
- input [0:0]probe_in74;
- input [0:0]probe_in75;
- input [0:0]probe_in76;
- input [0:0]probe_in77;
- input [0:0]probe_in78;
- input [0:0]probe_in79;
- input [0:0]probe_in80;
- input [0:0]probe_in81;
- input [0:0]probe_in82;
- input [0:0]probe_in83;
- input [0:0]probe_in84;
- input [0:0]probe_in85;
- input [0:0]probe_in86;
- input [0:0]probe_in87;
- input [0:0]probe_in88;
- input [0:0]probe_in89;
- input [0:0]probe_in90;
- input [0:0]probe_in91;
- input [0:0]probe_in92;
- input [0:0]probe_in93;
- input [0:0]probe_in94;
- input [0:0]probe_in95;
- input [0:0]probe_in96;
- input [0:0]probe_in97;
- input [0:0]probe_in98;
- input [0:0]probe_in99;
- input [0:0]probe_in100;
- input [0:0]probe_in101;
- input [0:0]probe_in102;
- input [0:0]probe_in103;
- input [0:0]probe_in104;
- input [0:0]probe_in105;
- input [0:0]probe_in106;
- input [0:0]probe_in107;
- input [0:0]probe_in108;
- input [0:0]probe_in109;
- input [0:0]probe_in110;
- input [0:0]probe_in111;
- input [0:0]probe_in112;
- input [0:0]probe_in113;
- input [0:0]probe_in114;
- input [0:0]probe_in115;
- input [0:0]probe_in116;
- input [0:0]probe_in117;
- input [0:0]probe_in118;
- input [0:0]probe_in119;
- input [0:0]probe_in120;
- input [0:0]probe_in121;
- input [0:0]probe_in122;
- input [0:0]probe_in123;
- input [0:0]probe_in124;
- input [0:0]probe_in125;
- input [0:0]probe_in126;
- input [0:0]probe_in127;
- input [0:0]probe_in128;
- input [0:0]probe_in129;
- input [0:0]probe_in130;
- input [0:0]probe_in131;
- input [0:0]probe_in132;
- input [0:0]probe_in133;
- input [0:0]probe_in134;
- input [0:0]probe_in135;
- input [0:0]probe_in136;
- input [0:0]probe_in137;
- input [0:0]probe_in138;
- input [0:0]probe_in139;
- input [0:0]probe_in140;
- input [0:0]probe_in141;
- input [0:0]probe_in142;
- input [0:0]probe_in143;
- input [0:0]probe_in144;
- input [0:0]probe_in145;
- input [0:0]probe_in146;
- input [0:0]probe_in147;
- input [0:0]probe_in148;
- input [0:0]probe_in149;
- input [0:0]probe_in150;
- input [0:0]probe_in151;
- input [0:0]probe_in152;
- input [0:0]probe_in153;
- input [0:0]probe_in154;
- input [0:0]probe_in155;
- input [0:0]probe_in156;
- input [0:0]probe_in157;
- input [0:0]probe_in158;
- input [0:0]probe_in159;
- input [0:0]probe_in160;
- input [0:0]probe_in161;
- input [0:0]probe_in162;
- input [0:0]probe_in163;
- input [0:0]probe_in164;
- input [0:0]probe_in165;
- input [0:0]probe_in166;
- input [0:0]probe_in167;
- input [0:0]probe_in168;
- input [0:0]probe_in169;
- input [0:0]probe_in170;
- input [0:0]probe_in171;
- input [0:0]probe_in172;
- input [0:0]probe_in173;
- input [0:0]probe_in174;
- input [0:0]probe_in175;
- input [0:0]probe_in176;
- input [0:0]probe_in177;
- input [0:0]probe_in178;
- input [0:0]probe_in179;
- input [0:0]probe_in180;
- input [0:0]probe_in181;
- input [0:0]probe_in182;
- input [0:0]probe_in183;
- input [0:0]probe_in184;
- input [0:0]probe_in185;
- input [0:0]probe_in186;
- input [0:0]probe_in187;
- input [0:0]probe_in188;
- input [0:0]probe_in189;
- input [0:0]probe_in190;
- input [0:0]probe_in191;
- input [0:0]probe_in192;
- input [0:0]probe_in193;
- input [0:0]probe_in194;
- input [0:0]probe_in195;
- input [0:0]probe_in196;
- input [0:0]probe_in197;
- input [0:0]probe_in198;
- input [0:0]probe_in199;
- input [0:0]probe_in200;
- input [0:0]probe_in201;
- input [0:0]probe_in202;
- input [0:0]probe_in203;
- input [0:0]probe_in204;
- input [0:0]probe_in205;
- input [0:0]probe_in206;
- input [0:0]probe_in207;
- input [0:0]probe_in208;
- input [0:0]probe_in209;
- input [0:0]probe_in210;
- input [0:0]probe_in211;
- input [0:0]probe_in212;
- input [0:0]probe_in213;
- input [0:0]probe_in214;
- input [0:0]probe_in215;
- input [0:0]probe_in216;
- input [0:0]probe_in217;
- input [0:0]probe_in218;
- input [0:0]probe_in219;
- input [0:0]probe_in220;
- input [0:0]probe_in221;
- input [0:0]probe_in222;
- input [0:0]probe_in223;
- input [0:0]probe_in224;
- input [0:0]probe_in225;
- input [0:0]probe_in226;
- input [0:0]probe_in227;
- input [0:0]probe_in228;
- input [0:0]probe_in229;
- input [0:0]probe_in230;
- input [0:0]probe_in231;
- input [0:0]probe_in232;
- input [0:0]probe_in233;
- input [0:0]probe_in234;
- input [0:0]probe_in235;
- input [0:0]probe_in236;
- input [0:0]probe_in237;
- input [0:0]probe_in238;
- input [0:0]probe_in239;
- input [0:0]probe_in240;
- input [0:0]probe_in241;
- input [0:0]probe_in242;
- input [0:0]probe_in243;
- input [0:0]probe_in244;
- input [0:0]probe_in245;
- input [0:0]probe_in246;
- input [0:0]probe_in247;
- input [0:0]probe_in248;
- input [0:0]probe_in249;
- input [0:0]probe_in250;
- input [0:0]probe_in251;
- input [0:0]probe_in252;
- input [0:0]probe_in253;
- input [0:0]probe_in254;
- input [0:0]probe_in255;
- (* dont_touch = "true" *) input [36:0]sl_iport0;
- (* dont_touch = "true" *) output [16:0]sl_oport0;
- output [0:0]probe_out0;
- output [0:0]probe_out1;
- output [0:0]probe_out2;
- output [0:0]probe_out3;
- output [0:0]probe_out4;
- output [0:0]probe_out5;
- output [0:0]probe_out6;
- output [0:0]probe_out7;
- output [0:0]probe_out8;
- output [0:0]probe_out9;
- output [0:0]probe_out10;
- output [0:0]probe_out11;
- output [0:0]probe_out12;
- output [0:0]probe_out13;
- output [0:0]probe_out14;
- output [0:0]probe_out15;
- output [0:0]probe_out16;
- output [0:0]probe_out17;
- output [0:0]probe_out18;
- output [0:0]probe_out19;
- output [0:0]probe_out20;
- output [0:0]probe_out21;
- output [0:0]probe_out22;
- output [0:0]probe_out23;
- output [0:0]probe_out24;
- output [0:0]probe_out25;
- output [0:0]probe_out26;
- output [0:0]probe_out27;
- output [0:0]probe_out28;
- output [0:0]probe_out29;
- output [0:0]probe_out30;
- output [0:0]probe_out31;
- output [0:0]probe_out32;
- output [0:0]probe_out33;
- output [0:0]probe_out34;
- output [0:0]probe_out35;
- output [0:0]probe_out36;
- output [0:0]probe_out37;
- output [0:0]probe_out38;
- output [0:0]probe_out39;
- output [0:0]probe_out40;
- output [0:0]probe_out41;
- output [0:0]probe_out42;
- output [0:0]probe_out43;
- output [0:0]probe_out44;
- output [0:0]probe_out45;
- output [0:0]probe_out46;
- output [0:0]probe_out47;
- output [0:0]probe_out48;
- output [0:0]probe_out49;
- output [0:0]probe_out50;
- output [0:0]probe_out51;
- output [0:0]probe_out52;
- output [0:0]probe_out53;
- output [0:0]probe_out54;
- output [0:0]probe_out55;
- output [0:0]probe_out56;
- output [0:0]probe_out57;
- output [0:0]probe_out58;
- output [0:0]probe_out59;
- output [0:0]probe_out60;
- output [0:0]probe_out61;
- output [0:0]probe_out62;
- output [0:0]probe_out63;
- output [0:0]probe_out64;
- output [0:0]probe_out65;
- output [0:0]probe_out66;
- output [0:0]probe_out67;
- output [0:0]probe_out68;
- output [0:0]probe_out69;
- output [0:0]probe_out70;
- output [0:0]probe_out71;
- output [0:0]probe_out72;
- output [0:0]probe_out73;
- output [0:0]probe_out74;
- output [0:0]probe_out75;
- output [0:0]probe_out76;
- output [0:0]probe_out77;
- output [0:0]probe_out78;
- output [0:0]probe_out79;
- output [0:0]probe_out80;
- output [0:0]probe_out81;
- output [0:0]probe_out82;
- output [0:0]probe_out83;
- output [0:0]probe_out84;
- output [0:0]probe_out85;
- output [0:0]probe_out86;
- output [0:0]probe_out87;
- output [0:0]probe_out88;
- output [0:0]probe_out89;
- output [0:0]probe_out90;
- output [0:0]probe_out91;
- output [0:0]probe_out92;
- output [0:0]probe_out93;
- output [0:0]probe_out94;
- output [0:0]probe_out95;
- output [0:0]probe_out96;
- output [0:0]probe_out97;
- output [0:0]probe_out98;
- output [0:0]probe_out99;
- output [0:0]probe_out100;
- output [0:0]probe_out101;
- output [0:0]probe_out102;
- output [0:0]probe_out103;
- output [0:0]probe_out104;
- output [0:0]probe_out105;
- output [0:0]probe_out106;
- output [0:0]probe_out107;
- output [0:0]probe_out108;
- output [0:0]probe_out109;
- output [0:0]probe_out110;
- output [0:0]probe_out111;
- output [0:0]probe_out112;
- output [0:0]probe_out113;
- output [0:0]probe_out114;
- output [0:0]probe_out115;
- output [0:0]probe_out116;
- output [0:0]probe_out117;
- output [0:0]probe_out118;
- output [0:0]probe_out119;
- output [0:0]probe_out120;
- output [0:0]probe_out121;
- output [0:0]probe_out122;
- output [0:0]probe_out123;
- output [0:0]probe_out124;
- output [0:0]probe_out125;
- output [0:0]probe_out126;
- output [0:0]probe_out127;
- output [0:0]probe_out128;
- output [0:0]probe_out129;
- output [0:0]probe_out130;
- output [0:0]probe_out131;
- output [0:0]probe_out132;
- output [0:0]probe_out133;
- output [0:0]probe_out134;
- output [0:0]probe_out135;
- output [0:0]probe_out136;
- output [0:0]probe_out137;
- output [0:0]probe_out138;
- output [0:0]probe_out139;
- output [0:0]probe_out140;
- output [0:0]probe_out141;
- output [0:0]probe_out142;
- output [0:0]probe_out143;
- output [0:0]probe_out144;
- output [0:0]probe_out145;
- output [0:0]probe_out146;
- output [0:0]probe_out147;
- output [0:0]probe_out148;
- output [0:0]probe_out149;
- output [0:0]probe_out150;
- output [0:0]probe_out151;
- output [0:0]probe_out152;
- output [0:0]probe_out153;
- output [0:0]probe_out154;
- output [0:0]probe_out155;
- output [0:0]probe_out156;
- output [0:0]probe_out157;
- output [0:0]probe_out158;
- output [0:0]probe_out159;
- output [0:0]probe_out160;
- output [0:0]probe_out161;
- output [0:0]probe_out162;
- output [0:0]probe_out163;
- output [0:0]probe_out164;
- output [0:0]probe_out165;
- output [0:0]probe_out166;
- output [0:0]probe_out167;
- output [0:0]probe_out168;
- output [0:0]probe_out169;
- output [0:0]probe_out170;
- output [0:0]probe_out171;
- output [0:0]probe_out172;
- output [0:0]probe_out173;
- output [0:0]probe_out174;
- output [0:0]probe_out175;
- output [0:0]probe_out176;
- output [0:0]probe_out177;
- output [0:0]probe_out178;
- output [0:0]probe_out179;
- output [0:0]probe_out180;
- output [0:0]probe_out181;
- output [0:0]probe_out182;
- output [0:0]probe_out183;
- output [0:0]probe_out184;
- output [0:0]probe_out185;
- output [0:0]probe_out186;
- output [0:0]probe_out187;
- output [0:0]probe_out188;
- output [0:0]probe_out189;
- output [0:0]probe_out190;
- output [0:0]probe_out191;
- output [0:0]probe_out192;
- output [0:0]probe_out193;
- output [0:0]probe_out194;
- output [0:0]probe_out195;
- output [0:0]probe_out196;
- output [0:0]probe_out197;
- output [0:0]probe_out198;
- output [0:0]probe_out199;
- output [0:0]probe_out200;
- output [0:0]probe_out201;
- output [0:0]probe_out202;
- output [0:0]probe_out203;
- output [0:0]probe_out204;
- output [0:0]probe_out205;
- output [0:0]probe_out206;
- output [0:0]probe_out207;
- output [0:0]probe_out208;
- output [0:0]probe_out209;
- output [0:0]probe_out210;
- output [0:0]probe_out211;
- output [0:0]probe_out212;
- output [0:0]probe_out213;
- output [0:0]probe_out214;
- output [0:0]probe_out215;
- output [0:0]probe_out216;
- output [0:0]probe_out217;
- output [0:0]probe_out218;
- output [0:0]probe_out219;
- output [0:0]probe_out220;
- output [0:0]probe_out221;
- output [0:0]probe_out222;
- output [0:0]probe_out223;
- output [0:0]probe_out224;
- output [0:0]probe_out225;
- output [0:0]probe_out226;
- output [0:0]probe_out227;
- output [0:0]probe_out228;
- output [0:0]probe_out229;
- output [0:0]probe_out230;
- output [0:0]probe_out231;
- output [0:0]probe_out232;
- output [0:0]probe_out233;
- output [0:0]probe_out234;
- output [0:0]probe_out235;
- output [0:0]probe_out236;
- output [0:0]probe_out237;
- output [0:0]probe_out238;
- output [0:0]probe_out239;
- output [0:0]probe_out240;
- output [0:0]probe_out241;
- output [0:0]probe_out242;
- output [0:0]probe_out243;
- output [0:0]probe_out244;
- output [0:0]probe_out245;
- output [0:0]probe_out246;
- output [0:0]probe_out247;
- output [0:0]probe_out248;
- output [0:0]probe_out249;
- output [0:0]probe_out250;
- output [0:0]probe_out251;
- output [0:0]probe_out252;
- output [0:0]probe_out253;
- output [0:0]probe_out254;
- output [0:0]probe_out255;
-
- wire \<const0> ;
- wire DECODER_INST_n_4;
- wire DECODER_INST_n_5;
- wire [0:0]Probe_out_reg;
- wire [16:0]bus_addr;
- (* DONT_TOUCH *) wire bus_clk;
- wire \bus_data_int_reg_n_0_[10] ;
- wire \bus_data_int_reg_n_0_[11] ;
- wire \bus_data_int_reg_n_0_[12] ;
- wire \bus_data_int_reg_n_0_[13] ;
- wire \bus_data_int_reg_n_0_[14] ;
- wire \bus_data_int_reg_n_0_[15] ;
- wire \bus_data_int_reg_n_0_[2] ;
- wire \bus_data_int_reg_n_0_[3] ;
- wire \bus_data_int_reg_n_0_[4] ;
- wire \bus_data_int_reg_n_0_[5] ;
- wire \bus_data_int_reg_n_0_[6] ;
- wire \bus_data_int_reg_n_0_[7] ;
- wire \bus_data_int_reg_n_0_[8] ;
- wire \bus_data_int_reg_n_0_[9] ;
- wire bus_den;
- wire [15:0]bus_di;
- wire [15:0]bus_do;
- wire bus_drdy;
- wire bus_dwe;
- wire bus_rst;
- wire clear;
- wire clk;
- wire committ;
- wire p_0_in;
- wire p_2_in;
- wire [0:0]probe_out0;
- (* DONT_TOUCH *) wire [36:0]sl_iport0;
- (* DONT_TOUCH *) wire [16:0]sl_oport0;
- wire xsdb_wr__0;
-
- assign probe_out1[0] = \<const0> ;
- assign probe_out10[0] = \<const0> ;
- assign probe_out100[0] = \<const0> ;
- assign probe_out101[0] = \<const0> ;
- assign probe_out102[0] = \<const0> ;
- assign probe_out103[0] = \<const0> ;
- assign probe_out104[0] = \<const0> ;
- assign probe_out105[0] = \<const0> ;
- assign probe_out106[0] = \<const0> ;
- assign probe_out107[0] = \<const0> ;
- assign probe_out108[0] = \<const0> ;
- assign probe_out109[0] = \<const0> ;
- assign probe_out11[0] = \<const0> ;
- assign probe_out110[0] = \<const0> ;
- assign probe_out111[0] = \<const0> ;
- assign probe_out112[0] = \<const0> ;
- assign probe_out113[0] = \<const0> ;
- assign probe_out114[0] = \<const0> ;
- assign probe_out115[0] = \<const0> ;
- assign probe_out116[0] = \<const0> ;
- assign probe_out117[0] = \<const0> ;
- assign probe_out118[0] = \<const0> ;
- assign probe_out119[0] = \<const0> ;
- assign probe_out12[0] = \<const0> ;
- assign probe_out120[0] = \<const0> ;
- assign probe_out121[0] = \<const0> ;
- assign probe_out122[0] = \<const0> ;
- assign probe_out123[0] = \<const0> ;
- assign probe_out124[0] = \<const0> ;
- assign probe_out125[0] = \<const0> ;
- assign probe_out126[0] = \<const0> ;
- assign probe_out127[0] = \<const0> ;
- assign probe_out128[0] = \<const0> ;
- assign probe_out129[0] = \<const0> ;
- assign probe_out13[0] = \<const0> ;
- assign probe_out130[0] = \<const0> ;
- assign probe_out131[0] = \<const0> ;
- assign probe_out132[0] = \<const0> ;
- assign probe_out133[0] = \<const0> ;
- assign probe_out134[0] = \<const0> ;
- assign probe_out135[0] = \<const0> ;
- assign probe_out136[0] = \<const0> ;
- assign probe_out137[0] = \<const0> ;
- assign probe_out138[0] = \<const0> ;
- assign probe_out139[0] = \<const0> ;
- assign probe_out14[0] = \<const0> ;
- assign probe_out140[0] = \<const0> ;
- assign probe_out141[0] = \<const0> ;
- assign probe_out142[0] = \<const0> ;
- assign probe_out143[0] = \<const0> ;
- assign probe_out144[0] = \<const0> ;
- assign probe_out145[0] = \<const0> ;
- assign probe_out146[0] = \<const0> ;
- assign probe_out147[0] = \<const0> ;
- assign probe_out148[0] = \<const0> ;
- assign probe_out149[0] = \<const0> ;
- assign probe_out15[0] = \<const0> ;
- assign probe_out150[0] = \<const0> ;
- assign probe_out151[0] = \<const0> ;
- assign probe_out152[0] = \<const0> ;
- assign probe_out153[0] = \<const0> ;
- assign probe_out154[0] = \<const0> ;
- assign probe_out155[0] = \<const0> ;
- assign probe_out156[0] = \<const0> ;
- assign probe_out157[0] = \<const0> ;
- assign probe_out158[0] = \<const0> ;
- assign probe_out159[0] = \<const0> ;
- assign probe_out16[0] = \<const0> ;
- assign probe_out160[0] = \<const0> ;
- assign probe_out161[0] = \<const0> ;
- assign probe_out162[0] = \<const0> ;
- assign probe_out163[0] = \<const0> ;
- assign probe_out164[0] = \<const0> ;
- assign probe_out165[0] = \<const0> ;
- assign probe_out166[0] = \<const0> ;
- assign probe_out167[0] = \<const0> ;
- assign probe_out168[0] = \<const0> ;
- assign probe_out169[0] = \<const0> ;
- assign probe_out17[0] = \<const0> ;
- assign probe_out170[0] = \<const0> ;
- assign probe_out171[0] = \<const0> ;
- assign probe_out172[0] = \<const0> ;
- assign probe_out173[0] = \<const0> ;
- assign probe_out174[0] = \<const0> ;
- assign probe_out175[0] = \<const0> ;
- assign probe_out176[0] = \<const0> ;
- assign probe_out177[0] = \<const0> ;
- assign probe_out178[0] = \<const0> ;
- assign probe_out179[0] = \<const0> ;
- assign probe_out18[0] = \<const0> ;
- assign probe_out180[0] = \<const0> ;
- assign probe_out181[0] = \<const0> ;
- assign probe_out182[0] = \<const0> ;
- assign probe_out183[0] = \<const0> ;
- assign probe_out184[0] = \<const0> ;
- assign probe_out185[0] = \<const0> ;
- assign probe_out186[0] = \<const0> ;
- assign probe_out187[0] = \<const0> ;
- assign probe_out188[0] = \<const0> ;
- assign probe_out189[0] = \<const0> ;
- assign probe_out19[0] = \<const0> ;
- assign probe_out190[0] = \<const0> ;
- assign probe_out191[0] = \<const0> ;
- assign probe_out192[0] = \<const0> ;
- assign probe_out193[0] = \<const0> ;
- assign probe_out194[0] = \<const0> ;
- assign probe_out195[0] = \<const0> ;
- assign probe_out196[0] = \<const0> ;
- assign probe_out197[0] = \<const0> ;
- assign probe_out198[0] = \<const0> ;
- assign probe_out199[0] = \<const0> ;
- assign probe_out2[0] = \<const0> ;
- assign probe_out20[0] = \<const0> ;
- assign probe_out200[0] = \<const0> ;
- assign probe_out201[0] = \<const0> ;
- assign probe_out202[0] = \<const0> ;
- assign probe_out203[0] = \<const0> ;
- assign probe_out204[0] = \<const0> ;
- assign probe_out205[0] = \<const0> ;
- assign probe_out206[0] = \<const0> ;
- assign probe_out207[0] = \<const0> ;
- assign probe_out208[0] = \<const0> ;
- assign probe_out209[0] = \<const0> ;
- assign probe_out21[0] = \<const0> ;
- assign probe_out210[0] = \<const0> ;
- assign probe_out211[0] = \<const0> ;
- assign probe_out212[0] = \<const0> ;
- assign probe_out213[0] = \<const0> ;
- assign probe_out214[0] = \<const0> ;
- assign probe_out215[0] = \<const0> ;
- assign probe_out216[0] = \<const0> ;
- assign probe_out217[0] = \<const0> ;
- assign probe_out218[0] = \<const0> ;
- assign probe_out219[0] = \<const0> ;
- assign probe_out22[0] = \<const0> ;
- assign probe_out220[0] = \<const0> ;
- assign probe_out221[0] = \<const0> ;
- assign probe_out222[0] = \<const0> ;
- assign probe_out223[0] = \<const0> ;
- assign probe_out224[0] = \<const0> ;
- assign probe_out225[0] = \<const0> ;
- assign probe_out226[0] = \<const0> ;
- assign probe_out227[0] = \<const0> ;
- assign probe_out228[0] = \<const0> ;
- assign probe_out229[0] = \<const0> ;
- assign probe_out23[0] = \<const0> ;
- assign probe_out230[0] = \<const0> ;
- assign probe_out231[0] = \<const0> ;
- assign probe_out232[0] = \<const0> ;
- assign probe_out233[0] = \<const0> ;
- assign probe_out234[0] = \<const0> ;
- assign probe_out235[0] = \<const0> ;
- assign probe_out236[0] = \<const0> ;
- assign probe_out237[0] = \<const0> ;
- assign probe_out238[0] = \<const0> ;
- assign probe_out239[0] = \<const0> ;
- assign probe_out24[0] = \<const0> ;
- assign probe_out240[0] = \<const0> ;
- assign probe_out241[0] = \<const0> ;
- assign probe_out242[0] = \<const0> ;
- assign probe_out243[0] = \<const0> ;
- assign probe_out244[0] = \<const0> ;
- assign probe_out245[0] = \<const0> ;
- assign probe_out246[0] = \<const0> ;
- assign probe_out247[0] = \<const0> ;
- assign probe_out248[0] = \<const0> ;
- assign probe_out249[0] = \<const0> ;
- assign probe_out25[0] = \<const0> ;
- assign probe_out250[0] = \<const0> ;
- assign probe_out251[0] = \<const0> ;
- assign probe_out252[0] = \<const0> ;
- assign probe_out253[0] = \<const0> ;
- assign probe_out254[0] = \<const0> ;
- assign probe_out255[0] = \<const0> ;
- assign probe_out26[0] = \<const0> ;
- assign probe_out27[0] = \<const0> ;
- assign probe_out28[0] = \<const0> ;
- assign probe_out29[0] = \<const0> ;
- assign probe_out3[0] = \<const0> ;
- assign probe_out30[0] = \<const0> ;
- assign probe_out31[0] = \<const0> ;
- assign probe_out32[0] = \<const0> ;
- assign probe_out33[0] = \<const0> ;
- assign probe_out34[0] = \<const0> ;
- assign probe_out35[0] = \<const0> ;
- assign probe_out36[0] = \<const0> ;
- assign probe_out37[0] = \<const0> ;
- assign probe_out38[0] = \<const0> ;
- assign probe_out39[0] = \<const0> ;
- assign probe_out4[0] = \<const0> ;
- assign probe_out40[0] = \<const0> ;
- assign probe_out41[0] = \<const0> ;
- assign probe_out42[0] = \<const0> ;
- assign probe_out43[0] = \<const0> ;
- assign probe_out44[0] = \<const0> ;
- assign probe_out45[0] = \<const0> ;
- assign probe_out46[0] = \<const0> ;
- assign probe_out47[0] = \<const0> ;
- assign probe_out48[0] = \<const0> ;
- assign probe_out49[0] = \<const0> ;
- assign probe_out5[0] = \<const0> ;
- assign probe_out50[0] = \<const0> ;
- assign probe_out51[0] = \<const0> ;
- assign probe_out52[0] = \<const0> ;
- assign probe_out53[0] = \<const0> ;
- assign probe_out54[0] = \<const0> ;
- assign probe_out55[0] = \<const0> ;
- assign probe_out56[0] = \<const0> ;
- assign probe_out57[0] = \<const0> ;
- assign probe_out58[0] = \<const0> ;
- assign probe_out59[0] = \<const0> ;
- assign probe_out6[0] = \<const0> ;
- assign probe_out60[0] = \<const0> ;
- assign probe_out61[0] = \<const0> ;
- assign probe_out62[0] = \<const0> ;
- assign probe_out63[0] = \<const0> ;
- assign probe_out64[0] = \<const0> ;
- assign probe_out65[0] = \<const0> ;
- assign probe_out66[0] = \<const0> ;
- assign probe_out67[0] = \<const0> ;
- assign probe_out68[0] = \<const0> ;
- assign probe_out69[0] = \<const0> ;
- assign probe_out7[0] = \<const0> ;
- assign probe_out70[0] = \<const0> ;
- assign probe_out71[0] = \<const0> ;
- assign probe_out72[0] = \<const0> ;
- assign probe_out73[0] = \<const0> ;
- assign probe_out74[0] = \<const0> ;
- assign probe_out75[0] = \<const0> ;
- assign probe_out76[0] = \<const0> ;
- assign probe_out77[0] = \<const0> ;
- assign probe_out78[0] = \<const0> ;
- assign probe_out79[0] = \<const0> ;
- assign probe_out8[0] = \<const0> ;
- assign probe_out80[0] = \<const0> ;
- assign probe_out81[0] = \<const0> ;
- assign probe_out82[0] = \<const0> ;
- assign probe_out83[0] = \<const0> ;
- assign probe_out84[0] = \<const0> ;
- assign probe_out85[0] = \<const0> ;
- assign probe_out86[0] = \<const0> ;
- assign probe_out87[0] = \<const0> ;
- assign probe_out88[0] = \<const0> ;
- assign probe_out89[0] = \<const0> ;
- assign probe_out9[0] = \<const0> ;
- assign probe_out90[0] = \<const0> ;
- assign probe_out91[0] = \<const0> ;
- assign probe_out92[0] = \<const0> ;
- assign probe_out93[0] = \<const0> ;
- assign probe_out94[0] = \<const0> ;
- assign probe_out95[0] = \<const0> ;
- assign probe_out96[0] = \<const0> ;
- assign probe_out97[0] = \<const0> ;
- assign probe_out98[0] = \<const0> ;
- assign probe_out99[0] = \<const0> ;
- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_decoder DECODER_INST
- (.\G_PROBE_OUT[0].wr_probe_out[0]_i_4_0 (DECODER_INST_n_4),
- .\G_PROBE_OUT[0].wr_probe_out[0]_i_6_0 (DECODER_INST_n_5),
- .Probe_out_reg(Probe_out_reg),
- .Q({\bus_data_int_reg_n_0_[15] ,\bus_data_int_reg_n_0_[14] ,\bus_data_int_reg_n_0_[13] ,\bus_data_int_reg_n_0_[12] ,\bus_data_int_reg_n_0_[11] ,\bus_data_int_reg_n_0_[10] ,\bus_data_int_reg_n_0_[9] ,\bus_data_int_reg_n_0_[8] ,\bus_data_int_reg_n_0_[7] ,\bus_data_int_reg_n_0_[6] ,\bus_data_int_reg_n_0_[5] ,\bus_data_int_reg_n_0_[4] ,\bus_data_int_reg_n_0_[3] ,\bus_data_int_reg_n_0_[2] ,p_0_in,p_2_in}),
- .SR(clear),
- .in0(committ),
- .out(bus_clk),
- .s_daddr_o(bus_addr),
- .s_den_o(bus_den),
- .s_do_i(bus_do),
- .s_drdy_i(bus_drdy),
- .s_dwe_o(bus_dwe),
- .s_rst_o(bus_rst),
- .xsdb_wr__0(xsdb_wr__0));
- GND GND
- (.G(\<const0> ));
- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_vio_v3_0_19_probe_out_all PROBE_OUT_ALL_INST
- (.\G_PROBE_OUT[0].wr_probe_out_reg[0]_0 (DECODER_INST_n_4),
- .\G_PROBE_OUT[0].wr_probe_out_reg[0]_1 (DECODER_INST_n_5),
- .Probe_out_reg(Probe_out_reg),
- .Q(p_2_in),
- .SR(clear),
- .clk(clk),
- .in0(committ),
- .out(bus_clk),
- .probe_out0(probe_out0),
- .s_daddr_o({bus_addr[16],bus_addr[11:8],bus_addr[3:0]}),
- .xsdb_wr__0(xsdb_wr__0));
- (* C_BUILD_REVISION = "0" *)
- (* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
- (* C_CORE_MAJOR_VER = "2" *)
- (* C_CORE_MINOR_VER = "0" *)
- (* C_CORE_TYPE = "2" *)
- (* C_CSE_DRV_VER = "1" *)
- (* C_MAJOR_VERSION = "2013" *)
- (* C_MINOR_VERSION = "1" *)
- (* C_NEXT_SLAVE = "0" *)
- (* C_PIPE_IFACE = "0" *)
- (* C_USE_TEST_REG = "1" *)
- (* C_XDEVICEFAMILY = "zynq" *)
- (* C_XSDB_SLAVE_TYPE = "33" *)
- (* DONT_TOUCH *)
- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xsdbs_v1_0_2_xsdbs U_XSDB_SLAVE
- (.s_daddr_o(bus_addr),
- .s_dclk_o(bus_clk),
- .s_den_o(bus_den),
- .s_di_o(bus_di),
- .s_do_i(bus_do),
- .s_drdy_i(bus_drdy),
- .s_dwe_o(bus_dwe),
- .s_rst_o(bus_rst),
- .sl_iport_i(sl_iport0),
- .sl_oport_o(sl_oport0));
- FDRE \bus_data_int_reg[0]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[0]),
- .Q(p_2_in),
- .R(1'b0));
- FDRE \bus_data_int_reg[10]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[10]),
- .Q(\bus_data_int_reg_n_0_[10] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[11]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[11]),
- .Q(\bus_data_int_reg_n_0_[11] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[12]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[12]),
- .Q(\bus_data_int_reg_n_0_[12] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[13]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[13]),
- .Q(\bus_data_int_reg_n_0_[13] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[14]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[14]),
- .Q(\bus_data_int_reg_n_0_[14] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[15]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[15]),
- .Q(\bus_data_int_reg_n_0_[15] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[1]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[1]),
- .Q(p_0_in),
- .R(1'b0));
- FDRE \bus_data_int_reg[2]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[2]),
- .Q(\bus_data_int_reg_n_0_[2] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[3]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[3]),
- .Q(\bus_data_int_reg_n_0_[3] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[4]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[4]),
- .Q(\bus_data_int_reg_n_0_[4] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[5]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[5]),
- .Q(\bus_data_int_reg_n_0_[5] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[6]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[6]),
- .Q(\bus_data_int_reg_n_0_[6] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[7]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[7]),
- .Q(\bus_data_int_reg_n_0_[7] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[8]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[8]),
- .Q(\bus_data_int_reg_n_0_[8] ),
- .R(1'b0));
- FDRE \bus_data_int_reg[9]
- (.C(bus_clk),
- .CE(1'b1),
- .D(bus_di[9]),
- .Q(\bus_data_int_reg_n_0_[9] ),
- .R(1'b0));
-endmodule
-
-(* C_BUILD_REVISION = "0" *) (* C_CORE_INFO1 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *) (* C_CORE_INFO2 = "128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" *)
-(* C_CORE_MAJOR_VER = "2" *) (* C_CORE_MINOR_VER = "0" *) (* C_CORE_TYPE = "2" *)
-(* C_CSE_DRV_VER = "1" *) (* C_MAJOR_VERSION = "2013" *) (* C_MINOR_VERSION = "1" *)
-(* C_NEXT_SLAVE = "0" *) (* C_PIPE_IFACE = "0" *) (* C_USE_TEST_REG = "1" *)
-(* C_XDEVICEFAMILY = "zynq" *) (* C_XSDB_SLAVE_TYPE = "33" *) (* dont_touch = "true" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_xsdbs_v1_0_2_xsdbs
- (s_rst_o,
- s_dclk_o,
- s_den_o,
- s_dwe_o,
- s_daddr_o,
- s_di_o,
- sl_oport_o,
- s_do_i,
- sl_iport_i,
- s_drdy_i);
- output s_rst_o;
- output s_dclk_o;
- output s_den_o;
- output s_dwe_o;
- output [16:0]s_daddr_o;
- output [15:0]s_di_o;
- output [16:0]sl_oport_o;
- input [15:0]s_do_i;
- input [36:0]sl_iport_i;
- input s_drdy_i;
-
- wire [15:0]reg_do;
- wire \reg_do[0]_i_2_n_0 ;
- wire \reg_do[0]_i_3_n_0 ;
- wire \reg_do[0]_i_4_n_0 ;
- wire \reg_do[10]_i_2_n_0 ;
- wire \reg_do[10]_i_3_n_0 ;
- wire \reg_do[10]_i_4_n_0 ;
- wire \reg_do[10]_i_5_n_0 ;
- wire \reg_do[11]_i_2_n_0 ;
- wire \reg_do[11]_i_3_n_0 ;
- wire \reg_do[12]_i_2_n_0 ;
- wire \reg_do[12]_i_3_n_0 ;
- wire \reg_do[13]_i_2_n_0 ;
- wire \reg_do[13]_i_3_n_0 ;
- wire \reg_do[14]_i_2_n_0 ;
- wire \reg_do[14]_i_3_n_0 ;
- wire \reg_do[15]_i_2_n_0 ;
- wire \reg_do[15]_i_3_n_0 ;
- wire \reg_do[15]_i_4_n_0 ;
- wire \reg_do[15]_i_5_n_0 ;
- wire \reg_do[15]_i_6_n_0 ;
- wire \reg_do[1]_i_2_n_0 ;
- wire \reg_do[1]_i_3_n_0 ;
- wire \reg_do[1]_i_4_n_0 ;
- wire \reg_do[2]_i_2_n_0 ;
- wire \reg_do[2]_i_3_n_0 ;
- wire \reg_do[2]_i_4_n_0 ;
- wire \reg_do[3]_i_2_n_0 ;
- wire \reg_do[3]_i_3_n_0 ;
- wire \reg_do[3]_i_4_n_0 ;
- wire \reg_do[4]_i_2_n_0 ;
- wire \reg_do[4]_i_3_n_0 ;
- wire \reg_do[4]_i_4_n_0 ;
- wire \reg_do[5]_i_2_n_0 ;
- wire \reg_do[5]_i_3_n_0 ;
- wire \reg_do[5]_i_4_n_0 ;
- wire \reg_do[5]_i_5_n_0 ;
- wire \reg_do[6]_i_2_n_0 ;
- wire \reg_do[6]_i_3_n_0 ;
- wire \reg_do[6]_i_4_n_0 ;
- wire \reg_do[7]_i_2_n_0 ;
- wire \reg_do[7]_i_3_n_0 ;
- wire \reg_do[7]_i_4_n_0 ;
- wire \reg_do[8]_i_2_n_0 ;
- wire \reg_do[8]_i_3_n_0 ;
- wire \reg_do[8]_i_4_n_0 ;
- wire \reg_do[9]_i_2_n_0 ;
- wire \reg_do[9]_i_3_n_0 ;
- wire \reg_do[9]_i_4_n_0 ;
- wire \reg_do[9]_i_5_n_0 ;
- wire \reg_do[9]_i_6_n_0 ;
- wire \reg_do_reg_n_0_[0] ;
- wire \reg_do_reg_n_0_[10] ;
- wire \reg_do_reg_n_0_[11] ;
- wire \reg_do_reg_n_0_[12] ;
- wire \reg_do_reg_n_0_[13] ;
- wire \reg_do_reg_n_0_[14] ;
- wire \reg_do_reg_n_0_[15] ;
- wire \reg_do_reg_n_0_[1] ;
- wire \reg_do_reg_n_0_[2] ;
- wire \reg_do_reg_n_0_[3] ;
- wire \reg_do_reg_n_0_[4] ;
- wire \reg_do_reg_n_0_[5] ;
- wire \reg_do_reg_n_0_[6] ;
- wire \reg_do_reg_n_0_[7] ;
- wire \reg_do_reg_n_0_[8] ;
- wire \reg_do_reg_n_0_[9] ;
- wire reg_drdy;
- wire reg_drdy_i_1_n_0;
- wire [15:0]reg_test;
- wire reg_test0;
- wire s_den_o;
- wire s_den_o_INST_0_i_1_n_0;
- wire [15:0]s_do_i;
- wire s_drdy_i;
- wire [36:0]sl_iport_i;
- wire [16:0]sl_oport_o;
- (* DONT_TOUCH *) (* UUID = "1" *) wire [127:0]uuid_stamp;
-
- assign s_daddr_o[16:0] = sl_iport_i[20:4];
- assign s_dclk_o = sl_iport_i[1];
- assign s_di_o[15:0] = sl_iport_i[36:21];
- assign s_dwe_o = sl_iport_i[3];
- assign s_rst_o = sl_iport_i[0];
- LUT6 #(
- .INIT(64'hAAAAAAAA0020AAAA))
- \reg_do[0]_i_1
- (.I0(\reg_do[0]_i_2_n_0 ),
- .I1(\reg_do[9]_i_3_n_0 ),
- .I2(reg_test[0]),
- .I3(sl_iport_i[4]),
- .I4(sl_iport_i[5]),
- .I5(\reg_do[9]_i_2_n_0 ),
- .O(reg_do[0]));
- LUT6 #(
- .INIT(64'hABABABAAAAAAABAA))
- \reg_do[0]_i_2
- (.I0(\reg_do[5]_i_3_n_0 ),
- .I1(sl_iport_i[8]),
- .I2(sl_iport_i[7]),
- .I3(\reg_do[0]_i_3_n_0 ),
- .I4(sl_iport_i[6]),
- .I5(\reg_do[0]_i_4_n_0 ),
- .O(\reg_do[0]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[0]_i_3
- (.I0(uuid_stamp[48]),
- .I1(uuid_stamp[32]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[16]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[0]),
- .O(\reg_do[0]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[0]_i_4
- (.I0(uuid_stamp[112]),
- .I1(uuid_stamp[96]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[80]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[64]),
- .O(\reg_do[0]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF2808))
- \reg_do[10]_i_1
- (.I0(\reg_do[10]_i_2_n_0 ),
- .I1(sl_iport_i[4]),
- .I2(sl_iport_i[5]),
- .I3(reg_test[10]),
- .I4(\reg_do[10]_i_3_n_0 ),
- .O(reg_do[10]));
- LUT6 #(
- .INIT(64'h0800000000000000))
- \reg_do[10]_i_2
- (.I0(sl_iport_i[6]),
- .I1(sl_iport_i[9]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(sl_iport_i[11]),
- .I5(sl_iport_i[10]),
- .O(\reg_do[10]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[10]_i_3
- (.I0(\reg_do[10]_i_4_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[10]_i_5_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[10]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[10]_i_4
- (.I0(uuid_stamp[122]),
- .I1(uuid_stamp[106]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[90]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[74]),
- .O(\reg_do[10]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[10]_i_5
- (.I0(uuid_stamp[58]),
- .I1(uuid_stamp[42]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[26]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[10]),
- .O(\reg_do[10]_i_5_n_0 ));
- LUT6 #(
- .INIT(64'h4540FFFF45404540))
- \reg_do[11]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[11]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[11]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[11]),
- .O(reg_do[11]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[11]_i_2
- (.I0(uuid_stamp[59]),
- .I1(uuid_stamp[43]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[27]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[11]),
- .O(\reg_do[11]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[11]_i_3
- (.I0(uuid_stamp[123]),
- .I1(uuid_stamp[107]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[91]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[75]),
- .O(\reg_do[11]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h5404FFFF54045404))
- \reg_do[12]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[12]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[12]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[12]),
- .O(reg_do[12]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[12]_i_2
- (.I0(uuid_stamp[124]),
- .I1(uuid_stamp[108]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[92]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[76]),
- .O(\reg_do[12]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[12]_i_3
- (.I0(uuid_stamp[60]),
- .I1(uuid_stamp[44]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[28]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[12]),
- .O(\reg_do[12]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h4540FFFF45404540))
- \reg_do[13]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[13]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[13]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[13]),
- .O(reg_do[13]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[13]_i_2
- (.I0(uuid_stamp[61]),
- .I1(uuid_stamp[45]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[29]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[13]),
- .O(\reg_do[13]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[13]_i_3
- (.I0(uuid_stamp[125]),
- .I1(uuid_stamp[109]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[93]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[77]),
- .O(\reg_do[13]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h4540FFFF45404540))
- \reg_do[14]_i_1
- (.I0(\reg_do[15]_i_4_n_0 ),
- .I1(\reg_do[14]_i_2_n_0 ),
- .I2(\reg_do[15]_i_2_n_0 ),
- .I3(\reg_do[14]_i_3_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[14]),
- .O(reg_do[14]));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[14]_i_2
- (.I0(uuid_stamp[62]),
- .I1(uuid_stamp[46]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[30]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[14]),
- .O(\reg_do[14]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[14]_i_3
- (.I0(uuid_stamp[126]),
- .I1(uuid_stamp[110]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[94]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[78]),
- .O(\reg_do[14]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h0B01FFFF0B010B01))
- \reg_do[15]_i_1
- (.I0(\reg_do[15]_i_2_n_0 ),
- .I1(\reg_do[15]_i_3_n_0 ),
- .I2(\reg_do[15]_i_4_n_0 ),
- .I3(\reg_do[15]_i_5_n_0 ),
- .I4(\reg_do[15]_i_6_n_0 ),
- .I5(reg_test[15]),
- .O(reg_do[15]));
- (* SOFT_HLUTNM = "soft_lutpair9" *)
- LUT3 #(
- .INIT(8'h45))
- \reg_do[15]_i_2
- (.I0(sl_iport_i[8]),
- .I1(sl_iport_i[7]),
- .I2(sl_iport_i[6]),
- .O(\reg_do[15]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'h505F3030505F3F3F))
- \reg_do[15]_i_3
- (.I0(uuid_stamp[127]),
- .I1(uuid_stamp[111]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[95]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[79]),
- .O(\reg_do[15]_i_3_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair0" *)
- LUT5 #(
- .INIT(32'hFFFFFFFE))
- \reg_do[15]_i_4
- (.I0(sl_iport_i[7]),
- .I1(sl_iport_i[8]),
- .I2(sl_iport_i[9]),
- .I3(sl_iport_i[11]),
- .I4(sl_iport_i[10]),
- .O(\reg_do[15]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[15]_i_5
- (.I0(uuid_stamp[63]),
- .I1(uuid_stamp[47]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[31]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[15]),
- .O(\reg_do[15]_i_5_n_0 ));
- LUT6 #(
- .INIT(64'hFFFFFFD0FFFFFFFF))
- \reg_do[15]_i_6
- (.I0(sl_iport_i[6]),
- .I1(sl_iport_i[7]),
- .I2(sl_iport_i[8]),
- .I3(\reg_do[9]_i_2_n_0 ),
- .I4(sl_iport_i[4]),
- .I5(sl_iport_i[5]),
- .O(\reg_do[15]_i_6_n_0 ));
- LUT6 #(
- .INIT(64'hAAAAAAAAAAAAFEAA))
- \reg_do[1]_i_1
- (.I0(\reg_do[1]_i_2_n_0 ),
- .I1(reg_test[1]),
- .I2(\reg_do[9]_i_3_n_0 ),
- .I3(sl_iport_i[5]),
- .I4(sl_iport_i[4]),
- .I5(\reg_do[9]_i_2_n_0 ),
- .O(reg_do[1]));
- LUT6 #(
- .INIT(64'h00000000FFAE00A2))
- \reg_do[1]_i_2
- (.I0(\reg_do[1]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[1]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[1]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[1]_i_3
- (.I0(uuid_stamp[49]),
- .I1(uuid_stamp[33]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[17]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[1]),
- .O(\reg_do[1]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[1]_i_4
- (.I0(uuid_stamp[113]),
- .I1(uuid_stamp[97]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[81]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[65]),
- .O(\reg_do[1]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[2]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[2]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[2]_i_2_n_0 ),
- .O(reg_do[2]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[2]_i_2
- (.I0(\reg_do[2]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[2]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[2]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[2]_i_3
- (.I0(uuid_stamp[114]),
- .I1(uuid_stamp[98]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[82]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[66]),
- .O(\reg_do[2]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[2]_i_4
- (.I0(uuid_stamp[50]),
- .I1(uuid_stamp[34]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[18]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[2]),
- .O(\reg_do[2]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[3]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[3]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[3]_i_2_n_0 ),
- .O(reg_do[3]));
- LUT6 #(
- .INIT(64'h000000003333AA3A))
- \reg_do[3]_i_2
- (.I0(\reg_do[3]_i_3_n_0 ),
- .I1(\reg_do[3]_i_4_n_0 ),
- .I2(sl_iport_i[6]),
- .I3(sl_iport_i[7]),
- .I4(sl_iport_i[8]),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[3]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[3]_i_3
- (.I0(uuid_stamp[51]),
- .I1(uuid_stamp[35]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[19]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[3]),
- .O(\reg_do[3]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h05F5030305F5F3F3))
- \reg_do[3]_i_4
- (.I0(uuid_stamp[83]),
- .I1(uuid_stamp[67]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[115]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[99]),
- .O(\reg_do[3]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[4]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[4]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[4]_i_2_n_0 ),
- .O(reg_do[4]));
- LUT6 #(
- .INIT(64'h00000000FFAE00A2))
- \reg_do[4]_i_2
- (.I0(\reg_do[4]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[4]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[4]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[4]_i_3
- (.I0(uuid_stamp[52]),
- .I1(uuid_stamp[36]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[20]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[4]),
- .O(\reg_do[4]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[4]_i_4
- (.I0(uuid_stamp[116]),
- .I1(uuid_stamp[100]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[84]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[68]),
- .O(\reg_do[4]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'h888888888A88A8A8))
- \reg_do[5]_i_1
- (.I0(\reg_do[5]_i_2_n_0 ),
- .I1(\reg_do[9]_i_2_n_0 ),
- .I2(\reg_do[9]_i_3_n_0 ),
- .I3(reg_test[5]),
- .I4(sl_iport_i[5]),
- .I5(sl_iport_i[4]),
- .O(reg_do[5]));
- LUT6 #(
- .INIT(64'hABABABAAAAAAABAA))
- \reg_do[5]_i_2
- (.I0(\reg_do[5]_i_3_n_0 ),
- .I1(sl_iport_i[8]),
- .I2(sl_iport_i[7]),
- .I3(\reg_do[5]_i_4_n_0 ),
- .I4(sl_iport_i[6]),
- .I5(\reg_do[5]_i_5_n_0 ),
- .O(\reg_do[5]_i_2_n_0 ));
- LUT4 #(
- .INIT(16'hFFFE))
- \reg_do[5]_i_3
- (.I0(sl_iport_i[10]),
- .I1(sl_iport_i[11]),
- .I2(sl_iport_i[9]),
- .I3(sl_iport_i[8]),
- .O(\reg_do[5]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[5]_i_4
- (.I0(uuid_stamp[53]),
- .I1(uuid_stamp[37]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[21]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[5]),
- .O(\reg_do[5]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[5]_i_5
- (.I0(uuid_stamp[117]),
- .I1(uuid_stamp[101]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[85]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[69]),
- .O(\reg_do[5]_i_5_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[6]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[6]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[6]_i_2_n_0 ),
- .O(reg_do[6]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[6]_i_2
- (.I0(\reg_do[6]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[6]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[6]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[6]_i_3
- (.I0(uuid_stamp[118]),
- .I1(uuid_stamp[102]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[86]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[70]),
- .O(\reg_do[6]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[6]_i_4
- (.I0(uuid_stamp[54]),
- .I1(uuid_stamp[38]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[22]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[6]),
- .O(\reg_do[6]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF6200))
- \reg_do[7]_i_1
- (.I0(sl_iport_i[4]),
- .I1(sl_iport_i[5]),
- .I2(reg_test[7]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[7]_i_2_n_0 ),
- .O(reg_do[7]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[7]_i_2
- (.I0(\reg_do[7]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[7]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[7]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[7]_i_3
- (.I0(uuid_stamp[119]),
- .I1(uuid_stamp[103]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[87]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[71]),
- .O(\reg_do[7]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[7]_i_4
- (.I0(uuid_stamp[55]),
- .I1(uuid_stamp[39]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[23]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[7]),
- .O(\reg_do[7]_i_4_n_0 ));
- LUT5 #(
- .INIT(32'hFFFF7500))
- \reg_do[8]_i_1
- (.I0(sl_iport_i[5]),
- .I1(sl_iport_i[4]),
- .I2(reg_test[8]),
- .I3(\reg_do[10]_i_2_n_0 ),
- .I4(\reg_do[8]_i_2_n_0 ),
- .O(reg_do[8]));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[8]_i_2
- (.I0(\reg_do[8]_i_3_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[8]_i_4_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[8]_i_2_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[8]_i_3
- (.I0(uuid_stamp[120]),
- .I1(uuid_stamp[104]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[88]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[72]),
- .O(\reg_do[8]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[8]_i_4
- (.I0(uuid_stamp[56]),
- .I1(uuid_stamp[40]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[24]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[8]),
- .O(\reg_do[8]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hFFFFFFFF40144010))
- \reg_do[9]_i_1
- (.I0(\reg_do[9]_i_2_n_0 ),
- .I1(sl_iport_i[5]),
- .I2(sl_iport_i[4]),
- .I3(\reg_do[9]_i_3_n_0 ),
- .I4(reg_test[9]),
- .I5(\reg_do[9]_i_4_n_0 ),
- .O(reg_do[9]));
- (* SOFT_HLUTNM = "soft_lutpair0" *)
- LUT5 #(
- .INIT(32'hFF7FFFFF))
- \reg_do[9]_i_2
- (.I0(sl_iport_i[10]),
- .I1(sl_iport_i[11]),
- .I2(sl_iport_i[8]),
- .I3(sl_iport_i[7]),
- .I4(sl_iport_i[9]),
- .O(\reg_do[9]_i_2_n_0 ));
- (* SOFT_HLUTNM = "soft_lutpair9" *)
- LUT3 #(
- .INIT(8'h8A))
- \reg_do[9]_i_3
- (.I0(sl_iport_i[8]),
- .I1(sl_iport_i[7]),
- .I2(sl_iport_i[6]),
- .O(\reg_do[9]_i_3_n_0 ));
- LUT6 #(
- .INIT(64'h00000000AAFBAA08))
- \reg_do[9]_i_4
- (.I0(\reg_do[9]_i_5_n_0 ),
- .I1(sl_iport_i[6]),
- .I2(sl_iport_i[7]),
- .I3(sl_iport_i[8]),
- .I4(\reg_do[9]_i_6_n_0 ),
- .I5(\reg_do[15]_i_4_n_0 ),
- .O(\reg_do[9]_i_4_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[9]_i_5
- (.I0(uuid_stamp[121]),
- .I1(uuid_stamp[105]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[89]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[73]),
- .O(\reg_do[9]_i_5_n_0 ));
- LUT6 #(
- .INIT(64'hAFA0CFCFAFA0C0C0))
- \reg_do[9]_i_6
- (.I0(uuid_stamp[57]),
- .I1(uuid_stamp[41]),
- .I2(sl_iport_i[5]),
- .I3(uuid_stamp[25]),
- .I4(sl_iport_i[4]),
- .I5(uuid_stamp[9]),
- .O(\reg_do[9]_i_6_n_0 ));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[0]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[0]),
- .Q(\reg_do_reg_n_0_[0] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[10]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[10]),
- .Q(\reg_do_reg_n_0_[10] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[11]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[11]),
- .Q(\reg_do_reg_n_0_[11] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[12]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[12]),
- .Q(\reg_do_reg_n_0_[12] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[13]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[13]),
- .Q(\reg_do_reg_n_0_[13] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[14]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[14]),
- .Q(\reg_do_reg_n_0_[14] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[15]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[15]),
- .Q(\reg_do_reg_n_0_[15] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[1]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[1]),
- .Q(\reg_do_reg_n_0_[1] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[2]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[2]),
- .Q(\reg_do_reg_n_0_[2] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[3]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[3]),
- .Q(\reg_do_reg_n_0_[3] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[4]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[4]),
- .Q(\reg_do_reg_n_0_[4] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[5]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[5]),
- .Q(\reg_do_reg_n_0_[5] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[6]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[6]),
- .Q(\reg_do_reg_n_0_[6] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[7]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[7]),
- .Q(\reg_do_reg_n_0_[7] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[8]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[8]),
- .Q(\reg_do_reg_n_0_[8] ),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_do_reg[9]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_do[9]),
- .Q(\reg_do_reg_n_0_[9] ),
- .R(1'b0));
- LUT6 #(
- .INIT(64'h0000800000000000))
- reg_drdy_i_1
- (.I0(s_den_o_INST_0_i_1_n_0),
- .I1(sl_iport_i[12]),
- .I2(sl_iport_i[13]),
- .I3(sl_iport_i[14]),
- .I4(sl_iport_i[0]),
- .I5(sl_iport_i[2]),
- .O(reg_drdy_i_1_n_0));
- FDRE #(
- .INIT(1'b0))
- reg_drdy_reg
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(reg_drdy_i_1_n_0),
- .Q(reg_drdy),
- .R(1'b0));
- LUT6 #(
- .INIT(64'h8000000000000000))
- \reg_test[15]_i_1
- (.I0(s_den_o_INST_0_i_1_n_0),
- .I1(sl_iport_i[12]),
- .I2(sl_iport_i[13]),
- .I3(sl_iport_i[14]),
- .I4(sl_iport_i[3]),
- .I5(sl_iport_i[2]),
- .O(reg_test0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[0]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[21]),
- .Q(reg_test[0]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[10]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[31]),
- .Q(reg_test[10]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[11]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[32]),
- .Q(reg_test[11]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[12]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[33]),
- .Q(reg_test[12]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[13]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[34]),
- .Q(reg_test[13]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[14]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[35]),
- .Q(reg_test[14]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[15]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[36]),
- .Q(reg_test[15]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[1]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[22]),
- .Q(reg_test[1]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[2]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[23]),
- .Q(reg_test[2]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[3]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[24]),
- .Q(reg_test[3]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[4]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[25]),
- .Q(reg_test[4]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[5]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[26]),
- .Q(reg_test[5]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[6]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[27]),
- .Q(reg_test[6]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[7]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[28]),
- .Q(reg_test[7]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[8]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[29]),
- .Q(reg_test[8]),
- .R(1'b0));
- FDRE #(
- .INIT(1'b0))
- \reg_test_reg[9]
- (.C(sl_iport_i[1]),
- .CE(reg_test0),
- .D(sl_iport_i[30]),
- .Q(reg_test[9]),
- .R(1'b0));
- LUT5 #(
- .INIT(32'h7FFF0000))
- s_den_o_INST_0
- (.I0(s_den_o_INST_0_i_1_n_0),
- .I1(sl_iport_i[12]),
- .I2(sl_iport_i[13]),
- .I3(sl_iport_i[14]),
- .I4(sl_iport_i[2]),
- .O(s_den_o));
- LUT6 #(
- .INIT(64'h8000000000000000))
- s_den_o_INST_0_i_1
- (.I0(sl_iport_i[15]),
- .I1(sl_iport_i[16]),
- .I2(sl_iport_i[17]),
- .I3(sl_iport_i[18]),
- .I4(sl_iport_i[20]),
- .I5(sl_iport_i[19]),
- .O(s_den_o_INST_0_i_1_n_0));
- (* SOFT_HLUTNM = "soft_lutpair1" *)
- LUT2 #(
- .INIT(4'hE))
- \sl_oport_o[0]_INST_0
- (.I0(reg_drdy),
- .I1(s_drdy_i),
- .O(sl_oport_o[0]));
- (* SOFT_HLUTNM = "soft_lutpair6" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[10]_INST_0
- (.I0(\reg_do_reg_n_0_[9] ),
- .I1(reg_drdy),
- .I2(s_do_i[9]),
- .O(sl_oport_o[10]));
- (* SOFT_HLUTNM = "soft_lutpair6" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[11]_INST_0
- (.I0(\reg_do_reg_n_0_[10] ),
- .I1(reg_drdy),
- .I2(s_do_i[10]),
- .O(sl_oport_o[11]));
- (* SOFT_HLUTNM = "soft_lutpair7" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[12]_INST_0
- (.I0(\reg_do_reg_n_0_[11] ),
- .I1(reg_drdy),
- .I2(s_do_i[11]),
- .O(sl_oport_o[12]));
- (* SOFT_HLUTNM = "soft_lutpair7" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[13]_INST_0
- (.I0(\reg_do_reg_n_0_[12] ),
- .I1(reg_drdy),
- .I2(s_do_i[12]),
- .O(sl_oport_o[13]));
- (* SOFT_HLUTNM = "soft_lutpair8" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[14]_INST_0
- (.I0(\reg_do_reg_n_0_[13] ),
- .I1(reg_drdy),
- .I2(s_do_i[13]),
- .O(sl_oport_o[14]));
- (* SOFT_HLUTNM = "soft_lutpair8" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[15]_INST_0
- (.I0(\reg_do_reg_n_0_[14] ),
- .I1(reg_drdy),
- .I2(s_do_i[14]),
- .O(sl_oport_o[15]));
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[16]_INST_0
- (.I0(\reg_do_reg_n_0_[15] ),
- .I1(reg_drdy),
- .I2(s_do_i[15]),
- .O(sl_oport_o[16]));
- (* SOFT_HLUTNM = "soft_lutpair2" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[1]_INST_0
- (.I0(\reg_do_reg_n_0_[0] ),
- .I1(reg_drdy),
- .I2(s_do_i[0]),
- .O(sl_oport_o[1]));
- (* SOFT_HLUTNM = "soft_lutpair1" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[2]_INST_0
- (.I0(\reg_do_reg_n_0_[1] ),
- .I1(reg_drdy),
- .I2(s_do_i[1]),
- .O(sl_oport_o[2]));
- (* SOFT_HLUTNM = "soft_lutpair3" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[3]_INST_0
- (.I0(\reg_do_reg_n_0_[2] ),
- .I1(reg_drdy),
- .I2(s_do_i[2]),
- .O(sl_oport_o[3]));
- (* SOFT_HLUTNM = "soft_lutpair2" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[4]_INST_0
- (.I0(\reg_do_reg_n_0_[3] ),
- .I1(reg_drdy),
- .I2(s_do_i[3]),
- .O(sl_oport_o[4]));
- (* SOFT_HLUTNM = "soft_lutpair3" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[5]_INST_0
- (.I0(\reg_do_reg_n_0_[4] ),
- .I1(reg_drdy),
- .I2(s_do_i[4]),
- .O(sl_oport_o[5]));
- (* SOFT_HLUTNM = "soft_lutpair4" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[6]_INST_0
- (.I0(\reg_do_reg_n_0_[5] ),
- .I1(reg_drdy),
- .I2(s_do_i[5]),
- .O(sl_oport_o[6]));
- (* SOFT_HLUTNM = "soft_lutpair4" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[7]_INST_0
- (.I0(\reg_do_reg_n_0_[6] ),
- .I1(reg_drdy),
- .I2(s_do_i[6]),
- .O(sl_oport_o[7]));
- (* SOFT_HLUTNM = "soft_lutpair5" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[8]_INST_0
- (.I0(\reg_do_reg_n_0_[7] ),
- .I1(reg_drdy),
- .I2(s_do_i[7]),
- .O(sl_oport_o[8]));
- (* SOFT_HLUTNM = "soft_lutpair5" *)
- LUT3 #(
- .INIT(8'hB8))
- \sl_oport_o[9]_INST_0
- (.I0(\reg_do_reg_n_0_[8] ),
- .I1(reg_drdy),
- .I2(s_do_i[8]),
- .O(sl_oport_o[9]));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[0]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[0]),
- .Q(uuid_stamp[0]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[100]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[100]),
- .Q(uuid_stamp[100]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[101]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[101]),
- .Q(uuid_stamp[101]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[102]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[102]),
- .Q(uuid_stamp[102]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[103]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[103]),
- .Q(uuid_stamp[103]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[104]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[104]),
- .Q(uuid_stamp[104]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[105]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[105]),
- .Q(uuid_stamp[105]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[106]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[106]),
- .Q(uuid_stamp[106]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[107]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[107]),
- .Q(uuid_stamp[107]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[108]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[108]),
- .Q(uuid_stamp[108]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[109]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[109]),
- .Q(uuid_stamp[109]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[10]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[10]),
- .Q(uuid_stamp[10]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[110]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[110]),
- .Q(uuid_stamp[110]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[111]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[111]),
- .Q(uuid_stamp[111]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[112]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[112]),
- .Q(uuid_stamp[112]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[113]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[113]),
- .Q(uuid_stamp[113]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[114]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[114]),
- .Q(uuid_stamp[114]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[115]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[115]),
- .Q(uuid_stamp[115]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[116]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[116]),
- .Q(uuid_stamp[116]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[117]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[117]),
- .Q(uuid_stamp[117]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[118]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[118]),
- .Q(uuid_stamp[118]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[119]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[119]),
- .Q(uuid_stamp[119]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[11]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[11]),
- .Q(uuid_stamp[11]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[120]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[120]),
- .Q(uuid_stamp[120]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[121]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[121]),
- .Q(uuid_stamp[121]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[122]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[122]),
- .Q(uuid_stamp[122]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[123]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[123]),
- .Q(uuid_stamp[123]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[124]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[124]),
- .Q(uuid_stamp[124]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[125]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[125]),
- .Q(uuid_stamp[125]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[126]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[126]),
- .Q(uuid_stamp[126]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[127]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[127]),
- .Q(uuid_stamp[127]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[12]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[12]),
- .Q(uuid_stamp[12]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[13]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[13]),
- .Q(uuid_stamp[13]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[14]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[14]),
- .Q(uuid_stamp[14]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[15]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[15]),
- .Q(uuid_stamp[15]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[16]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[16]),
- .Q(uuid_stamp[16]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[17]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[17]),
- .Q(uuid_stamp[17]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[18]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[18]),
- .Q(uuid_stamp[18]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[19]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[19]),
- .Q(uuid_stamp[19]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[1]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[1]),
- .Q(uuid_stamp[1]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[20]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[20]),
- .Q(uuid_stamp[20]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[21]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[21]),
- .Q(uuid_stamp[21]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[22]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[22]),
- .Q(uuid_stamp[22]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[23]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[23]),
- .Q(uuid_stamp[23]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[24]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[24]),
- .Q(uuid_stamp[24]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[25]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[25]),
- .Q(uuid_stamp[25]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[26]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[26]),
- .Q(uuid_stamp[26]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[27]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[27]),
- .Q(uuid_stamp[27]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[28]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[28]),
- .Q(uuid_stamp[28]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[29]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[29]),
- .Q(uuid_stamp[29]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[2]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[2]),
- .Q(uuid_stamp[2]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[30]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[30]),
- .Q(uuid_stamp[30]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[31]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[31]),
- .Q(uuid_stamp[31]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[32]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[32]),
- .Q(uuid_stamp[32]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[33]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[33]),
- .Q(uuid_stamp[33]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[34]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[34]),
- .Q(uuid_stamp[34]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[35]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[35]),
- .Q(uuid_stamp[35]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[36]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[36]),
- .Q(uuid_stamp[36]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[37]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[37]),
- .Q(uuid_stamp[37]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[38]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[38]),
- .Q(uuid_stamp[38]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[39]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[39]),
- .Q(uuid_stamp[39]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[3]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[3]),
- .Q(uuid_stamp[3]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[40]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[40]),
- .Q(uuid_stamp[40]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[41]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[41]),
- .Q(uuid_stamp[41]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[42]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[42]),
- .Q(uuid_stamp[42]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[43]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[43]),
- .Q(uuid_stamp[43]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[44]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[44]),
- .Q(uuid_stamp[44]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[45]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[45]),
- .Q(uuid_stamp[45]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[46]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[46]),
- .Q(uuid_stamp[46]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[47]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[47]),
- .Q(uuid_stamp[47]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[48]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[48]),
- .Q(uuid_stamp[48]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[49]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[49]),
- .Q(uuid_stamp[49]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[4]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[4]),
- .Q(uuid_stamp[4]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[50]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[50]),
- .Q(uuid_stamp[50]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[51]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[51]),
- .Q(uuid_stamp[51]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[52]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[52]),
- .Q(uuid_stamp[52]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[53]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[53]),
- .Q(uuid_stamp[53]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[54]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[54]),
- .Q(uuid_stamp[54]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[55]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[55]),
- .Q(uuid_stamp[55]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[56]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[56]),
- .Q(uuid_stamp[56]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[57]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[57]),
- .Q(uuid_stamp[57]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[58]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[58]),
- .Q(uuid_stamp[58]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[59]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[59]),
- .Q(uuid_stamp[59]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[5]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[5]),
- .Q(uuid_stamp[5]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[60]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[60]),
- .Q(uuid_stamp[60]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[61]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[61]),
- .Q(uuid_stamp[61]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[62]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[62]),
- .Q(uuid_stamp[62]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[63]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[63]),
- .Q(uuid_stamp[63]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[64]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[64]),
- .Q(uuid_stamp[64]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[65]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[65]),
- .Q(uuid_stamp[65]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[66]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[66]),
- .Q(uuid_stamp[66]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[67]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[67]),
- .Q(uuid_stamp[67]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[68]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[68]),
- .Q(uuid_stamp[68]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[69]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[69]),
- .Q(uuid_stamp[69]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[6]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[6]),
- .Q(uuid_stamp[6]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[70]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[70]),
- .Q(uuid_stamp[70]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[71]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[71]),
- .Q(uuid_stamp[71]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[72]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[72]),
- .Q(uuid_stamp[72]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[73]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[73]),
- .Q(uuid_stamp[73]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[74]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[74]),
- .Q(uuid_stamp[74]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[75]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[75]),
- .Q(uuid_stamp[75]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[76]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[76]),
- .Q(uuid_stamp[76]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[77]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[77]),
- .Q(uuid_stamp[77]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[78]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[78]),
- .Q(uuid_stamp[78]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[79]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[79]),
- .Q(uuid_stamp[79]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[7]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[7]),
- .Q(uuid_stamp[7]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[80]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[80]),
- .Q(uuid_stamp[80]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[81]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[81]),
- .Q(uuid_stamp[81]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[82]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[82]),
- .Q(uuid_stamp[82]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[83]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[83]),
- .Q(uuid_stamp[83]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[84]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[84]),
- .Q(uuid_stamp[84]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[85]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[85]),
- .Q(uuid_stamp[85]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[86]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[86]),
- .Q(uuid_stamp[86]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[87]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[87]),
- .Q(uuid_stamp[87]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[88]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[88]),
- .Q(uuid_stamp[88]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[89]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[89]),
- .Q(uuid_stamp[89]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[8]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[8]),
- .Q(uuid_stamp[8]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[90]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[90]),
- .Q(uuid_stamp[90]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[91]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[91]),
- .Q(uuid_stamp[91]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[92]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[92]),
- .Q(uuid_stamp[92]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[93]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[93]),
- .Q(uuid_stamp[93]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[94]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[94]),
- .Q(uuid_stamp[94]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[95]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[95]),
- .Q(uuid_stamp[95]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[96]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[96]),
- .Q(uuid_stamp[96]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[97]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[97]),
- .Q(uuid_stamp[97]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[98]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[98]),
- .Q(uuid_stamp[98]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[99]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[99]),
- .Q(uuid_stamp[99]),
- .R(1'b0));
- (* DONT_TOUCH *)
- (* KEEP = "yes" *)
- (* UUID = "1" *)
- FDRE \uuid_stamp_reg[9]
- (.C(sl_iport_i[1]),
- .CE(1'b1),
- .D(uuid_stamp[9]),
- .Q(uuid_stamp[9]),
- .R(1'b0));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_stub.v
deleted file mode 100755
index 7eae7b1..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/afab8f8185921798/scalp_zynqps_vio_0_0_stub.v
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:35 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_vio_0_0_stub.v
-// Design : scalp_zynqps_vio_0_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "vio,Vivado 2019.2" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(clk, probe_out0)
-/* synthesis syn_black_box black_box_pad_pin="clk,probe_out0[0:0]" */;
- input clk;
- output [0:0]probe_out0;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/b32362bd6ba3a9e9.xci b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/b32362bd6ba3a9e9.xci
deleted file mode 100644
index 56eb53a..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/b32362bd6ba3a9e9.xci
+++ /dev/null
@@ -1,916 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<spirit:design xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <spirit:vendor>xilinx.com</spirit:vendor>
- <spirit:library>ipcache</spirit:library>
- <spirit:name>b32362bd6ba3a9e9</spirit:name>
- <spirit:version>0</spirit:version>
- <spirit:componentInstances>
- <spirit:componentInstance>
- <spirit:instanceName>scalp_zynqps_processing_system7_0_0</spirit:instanceName>
- <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="processing_system7" spirit:version="5.5"/>
- <spirit:configurableElementValues>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.FCLK_CLK0.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.M_AXI_GP0_ACLK.FREQ_HZ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">scalp_zynqps_processing_system7_0_0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_APU_PERIPHERAL_FREQMHZ">750.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_CAN0_PERIPHERAL_FREQMHZ">23.8095</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_CAN1_PERIPHERAL_FREQMHZ">23.8095</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_CAN_PERIPHERAL_FREQMHZ">97.222221</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_DCI_PERIPHERAL_FREQMHZ">10.204082</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_ENET0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_ENET1_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_I2C_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_PCAP_PERIPHERAL_FREQMHZ">194.444443</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_QSPI_PERIPHERAL_FREQMHZ">134.615387</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_SDIO_PERIPHERAL_FREQMHZ">97.222221</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_SMC_PERIPHERAL_FREQMHZ">10.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_SPI_PERIPHERAL_FREQMHZ">159.090912</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TPIU_PERIPHERAL_FREQMHZ">200.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_TTC_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_UART_PERIPHERAL_FREQMHZ">97.222221</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_USB0_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_USB1_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ACT_WDT_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_APU_CLK_RATIO_ENABLE">6:2:1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_APU_PERIPHERAL_FREQMHZ">750</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ARMPLL_CTRL_FBDIV">30</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_BASEADDR">0xE0008000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_CAN0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_GRP_CLK_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_GRP_CLK_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_HIGHADDR">0xE0008FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_PERIPHERAL_CLKSRC">External</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN0_PERIPHERAL_FREQMHZ">-1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_BASEADDR">0xE0009000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_CAN1_IO">MIO 52 .. 53</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_GRP_CLK_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_GRP_CLK_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_HIGHADDR">0xE0009FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_CLKSRC">External</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN1_PERIPHERAL_FREQMHZ">-1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR0">18</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CAN_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK0_FREQ">125000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK1_FREQ">10000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK2_FREQ">10000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CLK3_FREQ">10000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE0_FIQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE0_IRQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE1_FIQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CORE1_IRQ_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_CPU_6X4X_MAX_RANGE">767</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_CPU_PLL_FREQMHZ">1500.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_PERIPHERAL_CLKSRC">ARM PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CPU_PERIPHERAL_DIVISOR0">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_CRYSTAL_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_CLKSRC">DDR PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR0">49</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_DIVISOR1">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DCI_PERIPHERAL_FREQMHZ">10.159</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDRPLL_CTRL_FBDIV">20</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_DDR_PLL_FREQMHZ">1000.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_HPRLPR_QUEUE_PARTITION">HPR(0)/LPR(32)</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL">15</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PERIPHERAL_CLKSRC">DDR PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PERIPHERAL_DIVISOR0">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT0_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT1_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT2_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PORT3_HPR_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_0"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_1"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_2"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_READPORT_3"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_0"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_1"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_2"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_PRIORITY_WRITEPORT_3"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_RAM_BASEADDR">0x00100000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_RAM_HIGHADDR">0x0FFFFFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DM_WIDTH">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DQS_WIDTH">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DQ_WIDTH">32</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DUAL_PARALLEL_QSPI_DATA_MODE"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_DUAL_STACK_QSPI_DATA_MODE"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_BASEADDR">0xE000B000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_ENET0_IO">MIO 16 .. 27</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_GRP_MDIO_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_GRP_MDIO_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_HIGHADDR">0xE000BFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR0">14</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_PERIPHERAL_FREQMHZ">1000 Mbps</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET0_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_BASEADDR">0xE000C000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_ENET1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_GRP_MDIO_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_GRP_MDIO_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_HIGHADDR">0xE000CFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_PERIPHERAL_FREQMHZ">1000 Mbps</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET1_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET_RESET_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET_RESET_POLARITY">Active Low</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_ENET_RESET_SELECT">Share reset pin</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_4K_TIMER">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CAN0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CAN1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK0_PORT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK1_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK2_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLK3_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG0_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG1_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG2_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_CLKTRIG3_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_DDR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CAN0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CAN1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_CD_SDIO1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_ENET0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_ENET1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_GPIO">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_I2C0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_I2C1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_MODEM_UART0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_MODEM_UART1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_PJTAG">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SDIO1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SPI1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_SRAM_INT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_TRACE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_TTC0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_TTC1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_UART0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_UART1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_WDT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_EMIO_WP_SDIO1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_ENET0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_ENET1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_GPIO">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_I2C0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_I2C1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_MODEM_UART0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_MODEM_UART1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_PJTAG">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_PTP_ENET0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_PTP_ENET1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_QSPI">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST0_PORT">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST1_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST2_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_RST3_PORT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SDIO0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SDIO1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SMC">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SPI0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_SPI1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_TRACE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_TTC0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_TTC1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_UART0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_UART1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_USB0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_USB1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_EN_WDT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR0">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK0_PERIPHERAL_DIVISOR1">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK1_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK2_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK3_PERIPHERAL_DIVISOR1">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK0_BUF">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK1_BUF">FALSE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK2_BUF">FALSE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FCLK_CLK3_BUF">FALSE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA0_PERIPHERAL_FREQMHZ">125</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA1_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA2_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA3_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK0_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK2_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FPGA_FCLK3_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN0">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN1">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN2">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_IN3">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT0">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT1">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT2">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_FTM_CTI_OUT3">DISABLED</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP0_EN_MODIFIABLE_TXN">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP0_NUM_READ_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP0_NUM_WRITE_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP1_EN_MODIFIABLE_TXN">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP1_NUM_READ_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GP1_NUM_WRITE_THREADS">4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_BASEADDR">0xE000A000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_EMIO_GPIO_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_HIGHADDR">0xE000AFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_MIO_GPIO_IO">MIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_GPIO_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_BASEADDR">0xE0004000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_GRP_INT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_GRP_INT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_HIGHADDR">0xE0004FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_I2C0_IO">MIO 50 .. 51</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C0_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_BASEADDR">0xE0005000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_GRP_INT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_GRP_INT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_HIGHADDR">0xE0005FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_I2C1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C1_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_PERIPHERAL_FREQMHZ">125.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_RESET_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_RESET_POLARITY">Active Low</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_I2C_RESET_SELECT">Share reset pin</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IMPORT_BOARD_PRESET">None</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_INCLUDE_ACP_TRANS_CHECK">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_INCLUDE_TRACE_BUFFER">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IOPLL_CTRL_FBDIV">35</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IO_IO_PLL_FREQMHZ">1750.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IRQ_F2P_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_IRQ_F2P_MODE">DIRECT</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_0_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_10_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_11_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_12_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_13_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_14_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_15_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_16_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_17_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_18_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_19_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_1_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_20_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_21_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_22_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_23_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_24_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_25_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_26_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_27_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_28_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_29_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_2_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_30_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_31_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_32_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_33_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_34_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_35_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_36_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_37_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_38_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_39_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_3_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_40_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_41_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_42_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_43_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_44_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_45_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_46_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_47_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_48_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_49_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_4_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_50_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_51_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_52_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_IOTYPE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_53_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_DIRECTION">inout</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_5_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_6_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_7_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_DIRECTION">out</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_PULLUP">disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_8_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_DIRECTION">in</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_IOTYPE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_PULLUP">enabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_9_SLEW">slow</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_PRIMITIVE">54</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_TREE_PERIPHERALS">GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#GPIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SPI 0#SPI 0#SPI 0#GPIO#GPIO#SPI 0#UART 0#UART 0#UART 1#UART 1#I2C 0#I2C 0#CAN 1#CAN 1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_MIO_TREE_SIGNALS">gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#gpio[8]#cd#data[0]#cmd#clk#data[1]#data[2]#data[3]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#sclk#miso#ss[0]#gpio[43]#gpio[44]#mosi#rx#tx#tx#rx#scl#sda#tx#rx</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_ENABLE_STATIC_REMAP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_FREQMHZ">125</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_SUPPORT_NARROW_BURST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP0_THREAD_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_ENABLE_STATIC_REMAP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_SUPPORT_NARROW_BURST">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_M_AXI_GP1_THREAD_ID_WIDTH">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_AR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_CLR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_REA">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_RR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_CYCLES_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_GRP_D8_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_GRP_D8_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_NAND_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NAND_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS0_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_CS1_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_A25_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_A25_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS0_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_CS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_CS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_GRP_SRAM_INT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_NOR_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS0_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_CEOE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_PC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_RC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_TR">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_WC">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_T_WP">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NOR_SRAM_CS1_WE_TIME">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_NUM_F2P_INTR_INPUTS">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_OVERRIDE_BASIC_CLOCK">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_CAN0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_CAN1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_CTI_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC2_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC3_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC4_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC5_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC6_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC7_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_DMAC_ABORT_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_ENET0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_ENET1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_GPIO_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_I2C0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_I2C1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_QSPI_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SDIO0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SDIO1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SMC_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SPI0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_SPI1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_UART0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_UART1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_USB0_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_P2F_USB1_INTR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY0">0.075</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY1">0.070</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY2">0.077</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_BOARD_DELAY3">0.094</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0">-0.000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1">-0.001</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2">0.004</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3">-0.035</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PACKAGE_NAME">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_DIVISOR0">9</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PCAP_PERIPHERAL_FREQMHZ">200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PERIPHERAL_BOARD_PRESET">None</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PJTAG_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PJTAG_PJTAG_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PLL_BYPASSMODE_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PRESET_BANK0_VOLTAGE">LVCMOS 3.3V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PRESET_BANK1_VOLTAGE">LVCMOS 2.5V</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_PS7_SI_REV">PRODUCTION</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_FBCLK_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_IO1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_IO1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SINGLE_SS_IO">MIO 1 .. 6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_GRP_SS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_INTERNAL_HIGHADDRESS">0xFCFFFFFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_DIVISOR0">13</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_PERIPHERAL_FREQMHZ">133</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_QSPI_QSPI_IO">MIO 1 .. 6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_CD_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_CD_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_POW_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_POW_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_WP_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_GRP_WP_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD0_SD0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_CD_IO">MIO 9</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_POW_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_POW_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_WP_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_GRP_WP_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SD1_SD1_IO">MIO 10 .. 15</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO0_BASEADDR">0xE0100000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO0_HIGHADDR">0xE0100FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO1_BASEADDR">0xE0101000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO1_HIGHADDR">0xE0101FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_DIVISOR0">18</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SDIO_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SINGLE_QSPI_DATA_MODE">x4</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T0">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T1">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T2">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T3">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T4">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T5">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_CYCLE_T6">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SMC_PERIPHERAL_VALID">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_BASEADDR">0xE0006000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS0_IO">MIO 42</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS1_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS2_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_GRP_SS2_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_HIGHADDR">0xE0006FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI0_SPI0_IO">MIO 40 .. 45</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_BASEADDR">0xE0007000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS0_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS1_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_GRP_SS2_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_HIGHADDR">0xE0007FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI1_SPI1_IO">EMIO</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_DIVISOR0">11</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_FREQMHZ">166.666666</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_SPI_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_ARUSER_VAL">31</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_AWUSER_VAL">31</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_ACP_ID_WIDTH">3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP0_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP0_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP1_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_GP1_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP0_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP1_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP2_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_DATA_WIDTH">64</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_FREQMHZ">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_S_AXI_HP3_ID_WIDTH">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_CLKSRC">External</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TPIU_PERIPHERAL_FREQMHZ">200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_BUFFER_CLOCK_DELAY">12</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_BUFFER_FIFO_SIZE">128</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_16BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_16BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_2BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_2BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_32BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_32BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_4BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_4BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_8BIT_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_GRP_8BIT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_INTERNAL_WIDTH">2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_PIPELINE_WIDTH">8</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TRACE_TRACE_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_BASEADDR">0xE0104000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_HIGHADDR">0xE0104fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC0_TTC0_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_BASEADDR">0xE0105000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_HIGHADDR">0xE0105fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC1_TTC1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_TTC_PERIPHERAL_FREQMHZ">50</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_BASEADDR">0xE0000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_BAUD_RATE">115200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_GRP_FULL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_GRP_FULL_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_HIGHADDR">0xE0000FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART0_UART0_IO">MIO 46 .. 47</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_BASEADDR">0xE0001000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_BAUD_RATE">115200</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_GRP_FULL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_GRP_FULL_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_HIGHADDR">0xE0001FFF</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART1_UART1_IO">MIO 48 .. 49</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_CLKSRC">IO PLL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_DIVISOR0">18</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_FREQMHZ">100</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UART_PERIPHERAL_VALID">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_ACT_DDR_FREQ_MHZ">500.000000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ADV_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_AL">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BANK_ADDR_COUNT">3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BL">8</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY0">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY1">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY2">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BOARD_DELAY3">0.25</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_BUS_WIDTH">16 Bit</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CL">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH">76.428</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CLOCK_STOP_EN">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_COL_ADDR_COUNT">10</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_CWL">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DEVICE_CAPACITY">2048 MBits</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH">76.687</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH">77.8025</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH">72.8405</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH">111.904</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3">0.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH">73.119</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH">63.8935</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH">77.045</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_LENGTH_MM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH">111.903</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY">160</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_DRAM_WIDTH">16 Bits</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ECC">Disabled</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_FREQ_MHZ">500</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_HIGH_TEMP">Normal (0-85)</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_MEMORY_TYPE">DDR 3 (Low Voltage)</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_PARTNO">MT41K128M16 JT-125</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_ROW_ADDR_COUNT">14</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_SPEED_BIN">DDR3_1066F</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_DATA_EYE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_READ_GATE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_FAW">40.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RAS_MIN">35.0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RC">48.75</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RCD">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_T_RP">7</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_DDR_USE_INTERNAL_VREF">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_UIPARAM_GENERATE_SUMMARY">NA</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_BASEADDR">0xE0102000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_HIGHADDR">0xE0102fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB0_USB0_IO">MIO 28 .. 39</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_BASEADDR">0xE0103000</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_HIGHADDR">0xE0103fff</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_PERIPHERAL_FREQMHZ">60</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_RESET_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_RESET_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB1_USB1_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB_RESET_ENABLE">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB_RESET_POLARITY">Active Low</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USB_RESET_SELECT">Share reset pin</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_AXI_FABRIC_IDLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_AXI_NONSECURE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_CORESIGHT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_CROSS_TRIGGER">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_CR_FABRIC">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DDR_BYPASS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DEBUG">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DEFAULT_ACP_USER_VAL">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA2">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_DMA3">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_EXPANDED_IOP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_EXPANDED_PS_SLCR_REGISTERS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_FABRIC_INTERRUPT">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_HIGH_OCM">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_M_AXI_GP0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_M_AXI_GP1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_PROC_EVENT_BUS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_PS_SLCR_REGISTERS">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_ACP">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_GP0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_GP1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP0">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP1">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP2">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_S_AXI_HP3">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_TRACE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_USE_TRACE_DATA_EDGE_DETECTOR">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_VALUE_SILVERSION">3</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_CLKSRC">CPU_1X</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_DIVISOR0">1</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_ENABLE">0</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_PERIPHERAL_FREQMHZ">133.333333</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCW_WDT_WDT_IO"><Select></spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.preset">None</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">zynq</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xc7z015</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">clg485</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VHDL</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.STATIC_POWER"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE"/>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_GENERATION">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHEID">b32362bd6ba3a9e9</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCACHESYNTHRUNTIME">244</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPCONTEXT">IP_Unknown</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.IPREVISION">6</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.MANAGED">TRUE</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.OUTPUTDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SELECTEDSIMMODEL"/>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SHAREDDIR">.</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SWVERSION">2019.2</spirit:configurableElementValue>
- <spirit:configurableElementValue spirit:referenceId="RUNTIME_PARAM.SYNTHESISFLOW">GLOBAL</spirit:configurableElementValue>
- </spirit:configurableElementValues>
- </spirit:componentInstance>
- </spirit:componentInstances>
-</spirit:design>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0.dcp b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0.dcp
deleted file mode 100644
index 2b52f400fefbf2083f28ba491bd2af5dcd5b2c53..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001
literal 218853
zcmWIWW@Zs#U|`^22#!||oO<{R*9k@jhF(?%26hGphLq$2y^7qNxl>~MXE{i;u7ACL
zM#0rM9qu(<c~^Rw)~Rr`^<Ul1d1!-QmvIT3#=G_F^)}yD^A&!f`+UyxJ(iOVs<X~n
zt`K}YW75tgr@FpukvP*M?6pr^WU|nnnk;^y8%a(#V}h0(eQ-KQ^kyID-HhFvY91U*
zH<@k{JJaXO#*+HW*C#$cP(C@J*)}57!oP6?qt^ksr3aRpG9)ip+0TF3y_92{BZrCW
z+-)=FzMnZ!kn0%ty2n$Rel0sK^}|Z;o^0Vy--zTeuK39>^1H0OK3#v9QnGw&l?S)t
zXO(l@KgtyCx%jx<gpXLNt)CEI(Rt1)WWgo38kcpAvd)ruyV4V-%?$hdEu+Fzx9$y{
zntENA)g@OpF0^W<qi5%={?n~V;&Q%!x@?r2B4X~P{R+M}W4Dc-@u_o<cJC<fEoM37
zT{!#Hr`+S!ZH^Lam&k4Zyvgd+*RLBhr5=4hb+N?iifQcJKX*48&i$`rv9xk~Uvs9z
z?bf#EZPygv1h;Vd+{%5b=DTYv>+GlJUIi+B4vtxnmvef{_1X&>XLmL7=gH?d?+VPl
z{^56lp=X5orhL8M4UtmikKdh*`~C0DuJ!q>aZlL8F0`K$ST4F->;Ib>cmMypsK?eE
zj~dxgZ<(5d85kJ)7#J8d7#J9elM{0a;;Sn23JZ$k3ySiSQ;Ul;^U~vsD~n4~bIs!o
z;tljN^OB3WPo6n@#=F1VQ^&KX{Iq`8_cPvlUT1yJYI~k3JbhAM-&@z{im|y-kcOY`
zDW5YZ*LdliJac~YCNCYYb0>7XLk&zq4FU|9lN1iI^#)c*T*{ch&4B8#u7@VMFFY6+
zR2H)^XcFnL;*7+C)VFil8^n)(JwDSpA@bJa@`i5FkRyF18|04%E|Do(kYpVgD3}wm
zaUScNy|a%<C3~ApQ>p(g8U4ogn_P8wZ1V5(-_PE@fA(D5q8EiRm7mYY->dufd$#U&
z>(BRQ-@Lnb_m<4hAK$k2ZkuCU{!Nbk+f19+4R)cs&)vxmn}5;x``n#}&(x-^y}G>S
z{N88hXYW0|?)NvzE$<E})}DHH?(O03-(O~$XU~uP{B8c$%T}lLuP*bQUH9$(?KO9=
z{Y!sfWy+9ytEc9DNcxnuMJtVu&HQ#TT>kF2(B)4T$zM+5y6ZOGS9`UbZRww9qLWv<
zhxWV`+NxPHC(3MP)$!Q$bN8B+f?wFo6;FS+`SF>#X{DWBT(a)rzJ;rIyXJDwJr>@#
zN-o}VS5nf=o^=<4T4zkJ+!%euFDyLNM>aO_s%}>Ni;$N&zb6MS4QzMX{%F(h?IvAZ
zcaN+~mVI6FDL+#rdhYF<RoX6dxnl1wdmWJ89dz@^sf~|M?{<&niVYH-d}&2?Y-~`y
z;;XP1vs{-7R_=a%O?1(_uxamREogF$DO~kRZmQTWj-r&AE8G``S4M_b-h9z@v1nJ<
z>Z+>MmtvpSdo7MDb6-B?W_-^qyR?$4H!>e@dn2P8+cBeeZkqTcr<DI|*KKK7bg%W?
zrnEb0ml>yNmWa(3y}LN|?aB#zx108@e<P$D{-VQPQopo++V<C};xhuaG_5se4$~?5
zCK|igu60MnkHx!OYYTZ#1cvmzl3JS*Ufr#ITJ-RK4VTpq&YP~PT3t9**nP8B=P%K!
z9a|qC@A()u#clPqSk1D_lb1~kFX{fZTib6M_r<KE+D-wPTXxMkyz%n3RT3eQc58Ez
zGPk%bjJ~Thf41JmSr)<qek-N!DMzh#DE)0&74US0Wbm}UYkE`C)~Ot?c6}|vCHZlN
zq1g96Hj%2fqPWc^Tk;led3Rz}@I7Oxh!^vo#{5-?u3grYRh`9kF`;_R<hO~Rt_IrW
zzB&?jae`Cgme}b>?=D(cGfgdYcj?_liF;yHPmAzwuYXcf`}9kuNN>Ue7O|2ZH?doh
z2DN7{U94&ilDND|eQK!h>KR(4U%Ia8i^!~>6|t?d^})M~Y~Q*jb(hD+%(%Ol_w@+}
zcQdV$jsL?QKVS1&E_aS9v-e`(58~3{v3BcnK0WE`y!!2Zh}6`pcjs?f+?o;cF-=F#
z$5P(s>xz$;SE=>suV0W+vaonpL-!{4kiZ2>6Xuup9=pL^{^!ZrO7&%>{m0VykKB9m
zcoTcl$%;4Mc>X(>ofWE95H3(K{=@uI)>r4tm&ichi%XoI7cPFCw|?ElCr&Y@i?f2B
zru^BI9TM4bJalUBHtotnE;0A%OS@+;?cTA@d-2K}UzWUDDVlsr-7mp2Gh}MwI@y_R
zX@}!@FQ2aXZ{>bDcXIRV+wa1kXB2O5nEOU7H*vkn&FE^bU9Qn$R*~Aa4SpAUoZ3H5
zy&CN&nQq;^mh0mc!_wcoOvPS*E1g|(@$KtvH`lF7`t+jjVp(gM@N$1?<7LSqXRkf+
z6v>T$aVD(v>Xwy{PrsErqf?@#Kig{R`DZ^)$}X1Wdb@4SoG81+$y<^a-d*xCx=-?=
z;jNRAhppW<&oSNPyrp<y?$s-ua~H*O$(~a8JHFKS;<^~iUxx#QwNEcA?MM^9b?e@S
z;w{mNn@S#R&}9!R?RzF7{$}N@*?K&ivdjF%+itYlUTPIAOZ1PEu<6jgv3f^>_6_S;
z2iDJ*SVK1W?=o1V)%Q(z%kx&xxr_g{+}>sF{`>Qx4T>=z8IQ6?e{6htNa6SApMO3l
zI;)j-@oAM5JnPWAc<>DmkBrHoe|x-3Jnl})mFIuD)X}-{LhPc$ucp1(b+|I~g@cU$
z^cBZ$_=fJ1FYD|p@YY%S!Xx;_le{gSsZWD**-NGz{Q6{Cm5Y0{_|aI~cb_(=EzfAw
z+)^%Hs~DB>>fNrw47+KaeTLiSPOVN^wYOAz)$-oW|NCU8yBwFg9ksOf*pXA8IA7Fi
zyMOKKGj4sCXDk<|XmwAdD*9)|?x%m&Te+#vI207D`$BGRhV0V7ZxdEOjp|%H*=ONh
zjoaP+dcA&Tt?N=ljn$_6ua$Uhv%K%3=C|d+r;dl0^!l0BY<eS~<Z@MP@8Zio3*Dbi
z$-Mel{kE>(=IBk~cMiNVOxCcvJ5TF7ySzotmn(v{i;aC6PaO*n@t+xCyK+~~>5rk`
zc)s_XTeCP+bLk76-^tOzTPwuoF5c|B@bH(D!fN4phC5XZbKlA@sx7&ty1niy=d)XZ
zXLoO}i*(A(;NNvSfb;B<^Spa=GW37fZ*5c3+WJA&`Sj&3&)MHDZd`u1Pkvwaq7}Sb
zJ#T%<yliXqrQqWEHPfdw*i5>d!jUa^Hq)rZwEwAz<e^!|i)Zm9o)xzAZQJnd<Qz5U
zh|eK@lNHxgS}i{*aP5yVh_smu(ligO={#7|bFe0Eu%@G6O+jEymLTPOz;?uem9GaY
zzYbO|4OSixCeMO3g@H9$gEfKexChqs9<1p*SQ9%~`C+i~K#=mE79iz+z?y2nHratS
z%?E2b57s0O)^r-IDHN;;?3<eTAb-@I$TV7_vZ=*-!IgwVkFF#HO%jsuxwVXiZSv9}
zre@FGQw}6tvQssfQR2bLqZa6uVDNH=kc7`8kgz65*pHJ(Ef%EmI!H)Y)nG;dNYOkY
z2_G)a#)C^tR1Ic)0qM03W@`3aKjlEerV_6N15c2a_aL5+SAs#LnX17Io#{dnKGXa;
zdDOI*u&_-Q1*xA8GSpnvV8)s$LJ~e<Aj?*RB<nOA52joNN!o)Xr-39vI<rBNrol|j
zC!;_r-hwRf^GYy~oFF9ObIq5NM~xXIxnRnH1S1PogBd)YoIGmIAfXK)AsbbL89gA!
zDuaZoKt}up8R6)aU~tnw)nG;r$QfoJXUqoKv<ak1OVwb;l;tdJlP`k&tE6h+WoPhl
zciZIMYZtz_xb4m&_uEC@o>$TwLVn9#;#5sJ%zxYSLQK`EUs79yV-uuvvu*NUNHmKa
zR{XN)qYzhqx-i!)oe!p%*u(V064OWpHep|}j)N|fS(6MdrZh_U%!=Ohz*cyFuG9TJ
ztzx#<rbT{<h)&b&yv5U%HP5|k0ds8PU8!BSwncr}x6nG*yR(u_U)qZOX5(?5x6aFN
zTimXQY<j;rvT1iwTzuPx^onv&^4O^kN>g`cgObO))1bWZ{{)Eq{v4D;*o#0pq#2y1
z7J|~$;>*@Gy=ghv@R5W?lG27VGLE_NsLk3a*zD<j=EjvNNAAxy2+0a{J>M{o(U!T2
z&1;d_Yqzcc_q{zW^vdIRaPPu=-q<{AE30!C!a^4CX7c_z_3Q1mxyM>2-S#!K4iVzj
zRcpVnY1L;9w#m=l+wk?bw}qcRuciC9Jn!1on>$jiE>CVNTT*yp`MxB5fm@8`U9k~u
zZkL4H{I<wR*<4Gq`|5wQX4SFR``jLv#xMT3OTs70eKNQ6<5I&J8GH2DCSQ|U|NrKZ
zdZR@9J4?FXeSD<9>v;G6i1hNgE1uoEy>|2M)^kQCQ~4G>T`}ulVusn-1>(HDOS^e|
zm-By|&)p*~t9SR%qQmz-UV3<Q;-!e}J1Kq34Q4LpzMJ?W#Mxi^SM$Lwy}~)+PLp3s
z-HyAw=}Wk?`t561{)O&&knHHG_G5?g^Mo`G>xEmvfqM=VxSzj+$i<VrYkK|kKAKwX
zJaYZT6QOvxz^pZ&OlPeTdMsYmU|<rd$|md^)_Krna%hr4=Gv31lD!|XswTd;rqw;K
zbIXgF9#D$Af5mm1R>7}%TNu9{-0YE_{Nj&@^HmdReS^w-7j(4TZ+&FVo6{Y6Y;APJ
zG{LrCGm;Df<%4<DcpoO`N$1PnYvPUA^6h_^SpHj^kl<?8sEcwTuCgn8zAgK0pi^LT
zELYCxi@)=8>08Y=v_8ABojc{{ed$c2gwK{x@#fBLuaXQhz1CXsoR#S~xMXK4-#OEd
zk!m^DX1iRpjsCKzdfSVmzYLfc->N^@{?apE>Q?Ww!__|zTv)e7Ud?<@_HJ9N!wHX0
z9%j2N(^k1Lq4ijk)0J$2=97;;N*y~U`ta%R?yhT}_jl(CU+c@#bDw?TG@E|xi~Mi?
zPM<Th_v~8Mb#40*GuG+1Ubp#ee%m5`ZO&xg?2-#1JZiT(Iu9<{YL;YR@<p(@v&}Ba
zAal)y=QYCflMhYX-zjo;dwf{Q{kq79>6^0c+755l>1|9eUc2yl4zs8F!-F}}Uv&KU
zt~~O~+RVgC>f%IkX5Q-(9v-g?<lT-PKK%N5`m}4GyuWjto?mFawqfBDZr-;(pFie&
zQ~7=Vo>_~84|guR`{55KzNMF%2j70tvWtO9J?6cd;fyUuc5}8_Jx($ROpoDF)4eEZ
zfAfg?j13oKnq0p>uNS{N|9|Y9-+y@KO^TWLZAsh~`Mb$40{sO07Vp2kPcT3C=amQh
zjWf!3U3&kqU*qHwp079E;uoJc`z2Mo?c((pn|t>?n+i@?$U<)IFOMWFn#pK5BO}d$
zM{Sm*Kyzmr+mVD#FJ>}I+)UiH*!z+4mzk=z+!|G40bg_$yohut^nXy(e&(`PiQ4%9
zS>N3kYF;_AKi-|a-}DOyTYmT=?=|-ByDKY~yKfG@YVz!>snq9RQoWV6y~p<Kb4!jh
zoRM)xn@za4@@T>$!}StACeK8hJ<Xog9y-!L>%!ISXRiG#D@AOVJqx^J>{b5I^ycay
zC*}`+Z<;e@tLCap$)soK>H1Ec(QYucY=QIMpSw=K=5h88>zU5)pSeuu<yXB;^->f6
zt}>Z%>+(7ip8kb(NiWW`UEW}Q;nWt}y;&~`U!Oi0uI2X4eQJtQb?xG9>n}#C?{iC^
z`$KAO>7#5D=I2OQ-L3npSYig7ACKCsM&ahpv<F8LF8whs;P!sBxTIvKue2@yx)+rN
zuIHPztK?z|{q6QX*%YEKS#{xp$R5qNhPUTmR@`Ee+o`F^{DI}m!XFiPijSQRuAMx$
zagn8b{9@eLa7M;CcOJD_p9PycpVb^mxMWpicYo#&X<;^twaZ>ye0_2Ixl6nH=NVgU
z<xh~inN`x%J9F)KXLqSxhki+vFzjne`@dbvmtnSh^#!KKzN*@}Zowz3jxBw-@%E-2
zE4+K|wuCdRYZHmEw(2=&TC&vE=XbsRhse9)@g7!JtGr6=%V!_GTvcIgwbtOuf3fDy
zU-y#?0{=(zsQKRhZ+GZOdpmEWviMzAk-MxS&u7(i99()eQ(UUk?sApl;tTWhTFjr9
zEsJWdKYv)@vRg^?-0VwcRm#>omM}~0b7MEDIjapS;y|okzKkDIvKKy>S}jmy6XsoU
zBw-QbR0$uG1wzf9-aIQ3bapcKZuj}q#yR(uSi~2L=&*~Ab0Uu({kY#%ucmaD#Kzx^
zTMk@Ud+p)EjX&(p$+qzw7GGYrT%0G@k6%i^Z@-T8@zv|!W?#7u^1!VmgTVM`9<^85
z-3MK2a}8&hw5+df?bJ6;JbqoJ`(5T?@w=DX^xv^slpoBFX|B3ZqP6gL&SJOU7Zi+s
zOnbzz>-q)XZS$AZOYOQ-@mc-bwV%RHS6Bs`J9jB08Dw_qov{0OFVT9_jqbeSk5g4Q
z`kI%%*DA5ezF2G4VD@F>!jE5i7iP`!ew@L!H}!AO?e{hbFH)T4ua?^8E;ioul8bli
z(S${R=ScW$nJ?Vj`K>s~;OELZKDTV%t>?`?N~+~-neA}#Z`77Wzqe)_Wj*44KtHmb
z?{Ipn^~IW9x9^?2BK`40-j_8CElYMSH2e^Gt19l~-^leY>gRq+&9!)*UGiwo`ilqm
zgfzbkSLQLCk<p^aCfsXqBw>+Y8>j)%@^M1vd-H|AujX{i`CitoGV$GhqaxcOB)GXE
zTj1}-GL<iKa(2@G%O!eT%9dxZ(RO++G0SbT;mllC{RdSB(giOs`|NXTHi}>DICK5Q
z1!t~j1gNnI^PW1Au*h+ygpY}aFeoNZ$r*lZR{L^sR^i3RnYUc~muHIeozKd5t}vT%
zZ_7E>uZwa|UdYek_uVf2XTAJ99V=$#<m=M29{UQ+T`%m?x`JJmP5A4ABMFP-rbzf~
zlDl&7<DU(VSz8v}&ik`TWqWS*uExN#-Y;IZUDR#UGybAGZ*Hw%{sF5KWi`>4W7$4C
z@-21evCVu@`uJ<<)LYj%FYfc>Q9HYK{cW9fJo!EGkz0<nX>O~P61uwY?XBhY(zE)%
zbKFn(u;M>+Mo)&e)#TZ0nm=@|n9Mu3?K*e0Z^%ruK&LI8Ld_=^nFl^CjI1ctE4pa4
z>FB+C&5LK%Klm0Wzu8;g<jbaoUb}8y*x0tu!0gqwyyHbCyv+;JC9O_fnEUUpt^4~t
z#j5h|gDDr^=Sg^<V{E(_)%^DEW6Q+N8zj2()-LpVoYy-)V1;Gv!|V#1qHL|h$9b(T
zs95pDPnGaf&g6RQ^IW=W>hI3%zkZ97o6CjfKI%Iv8y#}nmZ^$=*Pg%<gP@b%4^=N;
zm-1nJ<<G`0c$w?V%7t@ZFgd6HZr_yNEYHRB_WhBBMStf?_-xrP-0bQ6rQD!SYv-Qw
zJ?R?{X3SX>9V4^!<MtPAdh?IA^Pb9O|HSXS`+||lG`2@O_l9Pc@9JvT*MFY!?%Ef(
z*!P#rei>SC{_=jOWRm2e%_rWS0yP!OK}|)ezYg2iU*s?OE%kR^>-vlDBY#NEWqg-i
z!nR}mMac*I+|nDm54t$}7|zJ(&}5r@O)%+Dgw5ya2`1YmAGl9DVn54ZT2`v-`Nnz7
zBDU;Rd;wmI%$gV7`fLys*m&OSewJ+fzmD%rHS4Ms`$KY^>W?*_UN8A;^+M){zM`8w
z!_zi<N;&?J>Qw-x@)ijnlO}=YPB(!hgNqzaJZiq0O+OZQt~W^(zm?Mc?(HM(UE90Y
z?|2@n*Who}7IrM!bNWKxk8{5%^Zd=I7JJoy(nSBZ8Fzfq|L%p^J<lh_%_{Z0>ifm?
zm0H(9m%A>8Ggi#jU=uDCKANy7Z;^yg-6`Kc&7JzDiR-VibiYeKEOz&No9?^bulmXJ
zZd=&sZBbjB@&CWgyuW+RzaF+fe&bkc*)ql}w`a{0{}FnP`$}f&KDXsle@e{_dzM`i
zHFNz%m_YBh+FrNcNd^});(64h-gX~!SzK#4!{mR)e|xomr&<<zYim}$S-bhg#_i`G
z85zw_%*YE~Wm+P;FEhq*X-bBfubbJk80X-RF~8sQ$Trn&{1Nfnp>|EIM{zM9`*G&O
zuOFy;d;jj;`{8<DmYthc5m)R%ea%}k<_BzEwQEjlp4gq^Et?tJeLQ`c$G&N2U9!HN
zzMg@By?NALJ?J=?a#2=BV%A@w=FYVJM-mp@)Hj@wvN`_0(Z_7HFVmu9E-ucobnV~t
zRKz^=kNF9A->nlX<Y#$I&Sbi$UbB$*O3t3s`a<>Bt*%t8G?2@>bBg<{{`t0NuiAb~
zl^zC#@D2%|E4<>(ox2_;83dZg@Tm1ZZHrHRblUfZwb{i*zjsx1y?gyg^UtoUv(_7a
z+idx^@8H?=+||C;7fp}-n!Q|d*Zm6-RVTK66A6sob+SV5+2u&_V0X`&-o8mcq-0e;
znp$~1$~LhPZtiSLPcpdp!G}k!Hkb*C*DE^DHv7?X-xuNAIu^NK`_m;C`B~eHBUXD=
zC9~rTu`QBo{h}ZKmRp>2=I647GtKyHd(<wT`%(1D{7$#1@&*4*f-CIizRCXbG9`ZT
zO!oN6ifb;OX<m<nC45XiE3gTlwdpwMV$7dpaPdsDgpZWc=MOtO?F|zRE<Wm(D}Ak5
zb!F}H9nbsYoyAhTqo%uEy4luu^mpU$%iV3uE=K&h+-7$4@$uya`LSo3Yo?uTelhz_
zP46==Z1_mRqMbs9Gcwk>Kt1}*3o2w1w(g0yaDCdL35!KVY~NiA{jwuEyfAX|>km`j
zTr*)@zdmXv+ogpj6Ym{=KBX@I!-qrM+g>j{`!Y9AzdLgB<5!#1GSsdLi!^suH6<AY
z`Umi+z2fXTxJ0wENqyE23t_W~-fLdm`}2KK_2>KC-(Q-}U*vzk?NkP9jaa(f*JW!n
zG`=o;pL^eJyF^ugeB(#f?ca`?Z{)kC7whr){iXI}&4;xgr%##oOZ&Uk4B^7yob0_f
z_f5Gl{|B$Z@z3?`7hbZJAN{pO>u$yiOK0xh=dbTgl2yDS$Q-{|nQfn&J5Nn-pG3#O
zB|pox3{3n)nmdnmCK+VP7Ap13monUO_sI4c7q~OsT))?!6ubLhH9F^jfyF9YPR7IE
zN@l<P^^(t7UHVqzJ7bf^f0-|~+f4jm+rqVlE$+`}`Nyq1=BdtXyzDi-ZOr@J4l^3g
z*kEBgBf~<0O_-PcNW!9r4H7;kG6Kz>!CdTlrXPLPz8KE(y|_2N$n|^ONzw0h=kF_X
z+-T%mko!`|`SQyEpRUO6Fb9DTI~O*;;BDT%ddt$sJ>m?1)T9|!Ojc(T7F*6HT>9xq
z!Xm$U5<XW>3O9FJRVEo^dimXBRr}Y=`Fny|NXh@Y*o%LEmmb{}{MyYl-=h3gcC+QN
zYo)hl-7}n#S<}4muz_r{R<6U}4Bx7Gx6eJgvt*-{xo5{NktBmmo#{z6HfDR~)hAw@
zRTo!y_UPjby|N{O8B%>4=NkT%U0?je*iQTZ+=YK%{^!}Z;ji7ZywZ=ey0dciS~7|i
z*(M*$(o5KKgd-&_M)uxv-k1_@`{g?SbU$!Zoc)|pm;TV%>{_Vx`3F}IEtl9e+dg+Q
zV{F=cK_AWgvbi4xtZr547EIlCz-bGsShJ^hPUG_9p%33)W^m1pwb^=WT5dqd=kP5#
zy932dlA<4%CO&>q<-A_1X8Y?fXM3qN6~ei<&(`c0H~#JZa`Jl3i_?60)O0tdHeZa`
zr^<6S4^-oBzRm4hGlf%nk7_`P{U+D%%Fz}(gMatFZsuR~^ril`<^@|nx|ZF(duzfY
zkLLcZ@BJ@d5UxL6UT?T1BGx)VvG*$Dddc;2|5*QLXXZtjpMES^t|^!N+cxT`)a?td
zZ@B&)yO4ZLZ|m}PSNP-}?XH`!yEU%UN$Ry%%ffXFBz$H~(zZ~(r?h9U)QXI=b&)lu
zpC^CX8o$VNPIqQ5H}Bl+7jiaVj3)lNeDBMWy*8PVB^S+$nIm6sZ_m!I)>xvswVnCV
z*2DIn|LdHMeecHiKJv$`jn_Zi|2Y43MV({4*3zvnES%FNb{)8|a+~&ozbm+FpT{4P
zt$V6^$MBuP?vKT~-^I4AE<F9#HTi|M^X)*@HWUAi;Wn~O>1WcS=O4LOSp1>)XIz}#
zt1WMIg6D43WSjh~{_&vzcQ;TGd*Z-_InyM3rp5SiyG4Qq)TRna_?!ZblD(L6AR%a?
zkc4XbtRE)IYYQ%G?h3cx|03@1pF^E}x40jQ$tJ~i&f8-3=eupDl<%U|xvRTPW`F(q
z{%QK{{-@9Oybvw@H8oDKXZ|PtT}S5b+52~?_qo}-1n*r@{KC2a;cDaFP4n)hM4kO-
zJz<_fiALY{w)ywwKdTJpE=kc>eZ|^&&}FZJ;fxjHDr}QgpR>wlKVm(W{c~E(Mcb3&
zcPH0uto?i|@GSceultEtrrrvuo|P>-VdsmE?VDpu)-L4dF*1w4-NwV~w=uiUc=n46
z{8xWU{SBDA{vwD`dw$CLi{E{IO4YJ9O8A&e0o4daNd^}K{CL!)PIVq!qUdBP!8`Fn
z-SH#&vo5^Oo9NoV<*BIcrD@@J799TQaa_J_CGY7=|F%fZyJaW4SYYpq{E9iZ|2@}l
z<6B_&rSD_YzuTJ}_p^EKb8A+KU+g$({Y3>&9yKYI&Vw$^Duy#MCa8c~L@HNj{V)^$
zrFnMM3qhTqi`+Ln>8|ej5HI0xbIHu?N?+Kb+RRcLql*0tZ~v5@emaTmLhX;D;}uQo
zgM0Ms&bf*6Ke1WDlc@jdAgHVVIRG@aR|y_3hKzfcNL;!8!eGVvi-`g8iv{<szsPa_
zdPa*rn{e-kqX~-y_euDe91?Htbo&7+Rs{boSNnIP<)9O{e$|<^i(eRS?|W1v{r&E{
zBI);%w<Ps<?UVO6UhDk&;?ir1i`;Xwy@fy4Ub<iOKB^{Wb$NIFgv^^e$}5g_E!}v1
zr{TNn2FGf*yzPIfTO<04xp_OE%a@+F|1&JDT9#cFWmCTUHdFt-zUjWB|Cc7LXx3w!
zyzK1)|BmDB;y?8DqOLCzt^4hFRyM;^?9<}a`Vv*QFX(L%*_)!wf2)0-o0|1P`8RL-
z!)M(|+q3NnL#}sAMzj*!WYz1_4qQlx2Q~a|%$JuJFmvb)DLLI6IqlB0*!pkGzcwfT
z{B0Y4So&VWzvPU@+`bI4sSi_M`+wL~FL7%Q--lnDr*5?u-t^*c<o=4MANm9RGgoPS
z|2Xlt;2*iu=UM!hxAX4X{o8i`iCn(9XVyQjXML|!!@fTKuf6l{>TtjFX|+#vWWV$H
zb4)*a_U_#(?RVE6TZH_TDu4a($CuMncSP?$;vV<z@a-3MM}8~3y?OtX^>cRf*TsCv
zC-1H`xbhoRgU$zaFz>1N%$LftGO@GBSt7OZ#kJ`nk(;8+*9-jSxy<F?(jMrgx`jWt
z->*P2s()Q#erdc_i=WZ8`r4Ixte4HI6s=bVsPFzMHTTW4?2=8h*IzuDx6chCpvETL
z>i}vccS!h{FbOt$I=d(s%=(tHeY)?TCeGL!Vj*9C%qqY5IQ!mFx5LhhZbhZE=9>JO
zxX_ztZhmyh8OI$m#sV*#Zx<(Qx_r${qi)jvb)V*Z6gvDnGby5DS89?$;C3G#wY67u
ztrhO+=M+jUeNiU8TxaFmPrH|8zdt7M>Ew^D-!`|{?r)y$9W8LrW~;7kw!wy-I?t|`
zez|8FE2Mjy>-XxXk5dl|znH4Jb((tE^*apLAD1*|UX8xg^~K#e^a{JY_RR@-8+on1
z9@RPd@5i*0>*Cb@N&KDR?ses@Ky&9VS<p~u9(&KSxx7~QjvSw{!8OLo_50F)i+%^y
zZ<PJMV8t`;o(1z8{g){hf7q0J{zCBm{M$OOnx0FFeNx%CG?UAB^WB}-%k8Jjx?UG7
zieIe!WS^V+iQ3-23BRRe6~CKWIq9(p_jVphSY$X+!pB5SsM#~Pt20687st<TwYqaH
zdRg6?RV8P)zqn|6|Ixg_-wY>T8s{>1X?%Bft~V-aUl{w*X<GhI?OU-Q9p8TDo!b@I
zzVM#G;a{`ni!ItWLqb*h*z5M`H<hMb`;}c68gzDkf%?4D=iB!k_#E=<a!QuFbx^*I
zMU}06YK;QR;RkO;ihY--6#Gh<cOG<kA8I%w<BkfOaPRCR373Q(FT3np)5R%$TQ#O+
zeqG$f+FzANdqZlwCa(I-bML};lY3h#`WJSVOnKY(l8JfxLuTjoH`%(TEzey$|9vID
ze(GNKzYI<5FAD0%FIJA*=jOhrrnj%+r<CkRq2^Avyd;B*CwzI-q;_^5bWt`p^ole6
z=&e>#8Xa;`Ip?2i|AwF9-)A;uPpJMsw>0pB(y{3|E=||fwl2>9A^Su7Qri~RqEClE
z9$NBt&x@ZbwQkC)ujYcvbz{RBE6UYCgZy*nW<8qhb7O+u#YNR$F1vnzv79^oa`yXH
z^MZ|g6+4z6t4aK@@4fj0*&MI84@LH*e$ZX4&3kr{dat=^T6rmZ%L;1+HsMnCBMF!8
z+-bCZeD`o!(nhhnafhcJyEm`;)&KV|T=Wb>Ity=jZqfg`SZ+pgW_7Qh*_@j54}>eq
zZ>b4S&)>*?)4f_i@m6!kL6>R)!x<*q<yej_VxRK+=<gO^Z)K6YuO8`nr>)Lgbm97o
zsX50#>+ENHpW{5)@c914yrpdyx_<n6{;j0tpt*hS|B_kqx7MtbojgJHy5U;c^^*TW
z|GQ_d%PL=J*CihR_ujWolV-c^XARXh+0Opu6CDwr6<c%U`TRCJ?t9m6q;|%vxcf+N
zX7i7&r~ha!zID1_dtBOzY4<}i=N{k96Pr?Pa_h{z279UB{ypN}x!&Q0W*aT^3ggPc
z=AUa5d@TO2Ffl`0g-y7$|7gOZcN-;qq)ywmU9>tDU6=jnv(K{X3@_L3@1~32-5noy
zCwyIBTlW|C<`qlXdk;kTs@~1W$iLO1l_BwU5%0&P*WPl*IbXEjrT$ue@1)PBMlF8@
z=eoYnE)m<i{$k{peQuB0KuJ%5O}JP3NW!ARW(gmYJb`9U=OeuT4L;hcmCT-%dQmyE
z%C&#VOVN2%0o6Q7i%#>tb>I9#o9E+~<&|5k>_k2)?{|Hsbi4oYRKLwDPH}g=JHzHG
zb>@c@Z(2<+oAExkW=X>t83xL1!n|om5*8iok?=8@A=rG<pVhd0_76YdU)E>Wy$Cd!
zyU6`w3D^FfZQoK^^ui<3nKm!!H!qod@PTjd!ut|d9KzT3J#sI+b*X06g5y2ruhTCH
z&HT#jT&rX_V}-v8+vNG5I<+2qKJ5Lly6f8a*Im_u`MS&GZn3?{aQ=PaR>jYEr$YQ@
zKjN*@zTCC#>CTQ|jrk8v8RLYngwIw`w7<%-R^~hJ`I>bmroFpO?j5QYTYpGejQdL8
zvmkq^Zu6z{&+NUr(MJBO{fm8eh9<|n*VfMPU28jo`?Yb4^Z$169NS^g80oW#;L1A#
zTzTt&CgyDBfhOkWfv4ntiFw5@&R_V&bXL(fBrLW#uvS_^Dz5Wj%E{Jn1CysZY{I^l
z-3Om64?6eX>|?tc4@*?ZMdiGouKhcnihs}DUOdt7|6)h8M|#aRM>n?}yV%|K>_SA%
z(_9(3<+dGto9&h_T-`H$!w#$28!jXqxSnA!A?reLmI0_^!v+d|P{&3>pxLvSn{A!p
z$E#{@(q|W3{2RN+^?Uh8vAR9mpK<TlaQy>&hjxbduX7i8X1Q+u*tSUV+7`bz5>om9
z-&Z~EJ;HZkVuYgaZAVE7evbdI>;t1t>EFrt<UAvzVDDFf7X@d`XSn%C&Ts#hX02DV
z;eF0)vx_OWrpp<8*;8Lxp1)~&dFCBkn@eWAXWy)hwqCVY{%w<O>HQnscegRKRtd~k
zkLNZ%=BBjD_Kx1sEpmM8EAFM4-~7zxJew7iP?bQle%sG<rnhhZpQOEOZG5~`adh6X
z4~Jhk<r{39UelERWN-Ql(LLhtv*wxYv5z^PIb%)v_J!|%9@F{8c6XLX{sr52Vlt7=
zg5Q;nmR}71clCnYhlOkR?~#jJP_gA;HtYAr{cn7GIj?`alhb4JG37l=?j09D0iL&d
zM-wh>*?oFb#p4G~F;^Cu?l=_a^tOFRV{X8Owz4ICU)1X7<S@7uuQMo_zp#1bEvp0l
zlDFF4eO=r#vFbNh=GyJ=e|<dhq3hSprCa|_`+e$``_nM(gXs+63p!tz&o};Jde43j
z-`%7Sod-HgmMrY&o%`~Bj`7zt;Y(5ZW)j`^!Vg`z5X7TqFB<hu;ylm$yKMTqdgsSW
zB}@M?`Z7!Y!<)0dHl0g(&OeaxDt=*B9e;Uwo1KXX&%ra6Z1J}x-KwjKBjwJWOTE~x
zUejx5^Dz6%L(cfcpO@D3o|`Vz+-cRGWDxi~fJe>yoMp>JfyaCXCHtnJ_ZRwS{zw$A
zDmuICg`nx*MebL=bXR-6lsvKZ?xFSHex55!`*D8VkMlOG7FB=DyOg_voo%I6Rk6h_
zx9h3RmZh(1d#%3ibDLXbIAcYyKAUjqtD^~v{Ps%tTv;jJ?0IeF{)<Ph&)i_2|H<|H
zu8&>sN*{|p_t@W1IB_>mo4wn`$=fWK?fo$CKl4k0Js<y@Hft&~ubfh~P*Bh6()~2q
zm%EGo{Mt4sm-vJ7+)i^)p1U(0l;{3U1d;E~gGM;{pO{D<lB$)Rz5e3$jXxm_LD%@j
zC)r`xa7M-_M;^6VH3H3@YVt=C7M)}_oRKn_-+soAXyIcHYgfGZ`1<4PkK6A(npaW7
z|9Dw>WW98}`i_a4t@R_)+tV(cZu8q}Xm`Hpull|IKu_+T?-LHS{hH7u@Kx$)!lbWK
z=6&Wo`g>fp*8cr&6S?=B^_`{PrJf{PUx>WMxg_+Z;J*Nua;f&}FBx@;$@xYlyX*VE
zU9JxCaK5wn@8i0M^OxVdbfxr<-jZ9^AJ_b5-jU&V@N(wmmnE-@E=yF~_8!>!b;94x
z7ml{^EjYY~JIi(Nf|eBh75hGRJ&fe@3J%<1|L^{V1vVMU*{_^aD_AOYq9zJSwTa80
zId;Fkau@si1DUURKgk4|pJ-;jzJH&DkJw(z#*0F`Yb0iA2sL-Absb5#B+$8Nv2RTa
z=j?56`n$wSUB53{x8wWAy;`+v{@yRyb^k(*)v*f|Ri_^aUM|iRclmu;?#lFO3$<(J
z*EW@Ha@sOkwAnNGRf_si;X~Q~!bR4;oi6%4vhDK4Gd4Zu9S@!=rJ6PE?wic``ch}X
zYklJx+fAqDnN_Sl-&?Bdd;3M(n<ct)mpsTWnbfrYq9<39!Nt5l9<^J#T?bu~{Xz4t
zH-wL=ftGUUfL4Qeaq_4=)oeVN0$R1Q(u1>S(*9XL*o43RKD*#Woq68Hzj=2av7O(4
zWV2BJhvyg88CLk$ghz=w{`0Nie^*!W_5M}1zVC-^`u6R5US&VIbZ_arUF$DazS`&Z
zeC2N`UdGzqwuU5w#KJ6tivj^WYEn#H2VI;U3}<9;Xs}IQCc<Qw|0vz(Mg6u3i;iEj
z>6VNBtn;U%{%oOy;U>nHl5N`-EWC2@-*>0iN2OOSWBgHedR7TX?}3yL!oA{~?oH&4
zG-df@D#i3uinp<*x6L8R;G%#B$d1l~F3t)dJ5=0G-uJC(=d7KX7WPGAmfOYT45_2N
z3-&eyJke}6|9<QLz3hzqSMBM6%LC%2xU&{dc+K;-bAIXRnhANvbJet6Y!wY>nAH2P
z(7LCyC$g^eqLuWv9r+$}Td%#A{1^10qDG;D)yA`Y?ZU@v@}1Q`sQeFosp@l7mhbqg
z8D2ZhW_w)>X<QG*5<Xj+MVdXc-zp?#tOCtFYY8lVQY9Rpedyk<PVu|Xk7@2Y-y3}A
z@%sJ)mUVpklPXSMc(-NF*S_gX^S*3Z`2WN7XZdDZ^p*Z~_!-B=>|cEBtJ9TS(A1o6
zl0l?R-sv?J$3Miy@wjf^v|?%Dwxro_w=SC1nz1eZLAl5u!OUL4EzF^p>$c3z-Mii?
zd!OxE$K4A;HI^B_JGIQXWYXUC7bVs9xm|VxVbByPXq3CY^Wc)wAMpkzxhiavk9kSo
z&3?4o=Y@dj;YG(UZt0S9zpQ0;EYf(@U$*nP`!jYcNO^iI%U-?z@3Q#eZS5Crq`Y5W
zvak~Ib2mIvX(avVMe((LYR(ah6&I|(C~)C=2FHtR6Bd!?PEgW7O%^6D96$Vp?K7R~
zH?oS@u6q{xWyh@Wjfzhftauj6sd?J){&!*L-It=iG=DAqU~pJ_TmOOT3f+B&t;D~~
z{HSzVf78UJb!YEfe{uaxZSOwSbJsJz9YVrRJZd_AylS)d3N&}7>4OIDxeaGzd;?FH
zRDaysx!)i$<C0dFT;*%+swZpLfB5p`)@<>8X%mt(m;Zgi=3Jbi`^r6BVwS73uI5t5
z5{|z!_pW{<tol~$W#=TmLhE~X{QsWLoPW#PAo`c6bNOwF6K#1n`WN&5mG_@t$8wqT
z+k*byzvmq`@b1}i{{5y*`O?R=y}Ldp83dZg@u<Bz)_u_BZUrc{ng3G~{(r9E|D}-b
zcMsR=?`q$_?}Kzj*8H~rU$y=?ycW)Le}34o=8%=ij7yaYb5mDbGkbnzdf$QUBR2C3
zjw$_YF}Si@pt-Y39NeWodhKJ+hiTax7L`6f{b<eYz2E-oZkd|@U~0;A$ywgXFTc0(
zEv?+b-}7?Do)3ajr=Rnj{Ty|wC|9#J!&{SWa$AO`_M=Z9g8s6)X0P18<N5}f*4_Vn
ze=lEB{6lrs?m+pfnehjb5~Zv6_b-d|2$jvxNY}S7jW@Gj8mwK@>$moUsnym)*E9UW
zc+_5TcN}!7WdxNyD>&Ppr5sJT^rv_e|BN4Y!dBsDx4hVBa(2=2OD5gFy^h|l*zs6a
zTH#`Do80EJYP^oCepdA@Y`bXNwr}gX%?E8->?LlU=3ad7d|TkJB`xbOs;k!Y+G#$_
zHktF?RO;MsDc<L`y=|Y93@#SL@u*3i>ptjmxYBUOmTLw7l!f=_JK67N6}P=NE%r-A
zbeU%7tu?Y&=XE9CDd){~V^3IiOeShx+J$RhcD}V)F{^9|V@Rvbk?>>Qc7If7*IZ~g
zdOhR7qimA|!RAgjog{;c4X!+DQX4uBx-g3w&X}^4g>7;hN5sGLN9qk1hF{R>dRO^a
z{O;#t`tKqia6epB-{XH{e_n=u4gaqQXJLcKRh2$_wwzA>IPteP@7*JRgD(2-w|KpL
z_5T;ySL#KYJAd_q@?jv4+AI66gD!vF4ZZ5}A9efQNHyKLsQPAs>-S9$yQ<IqxIcsO
zo1wkxW+T~TYnj(KYR}|XcD`_K?w9I6borR~#i@6EL}Pb{Z(29^+~iNDR{p21zp&Aa
zUwoKvpIf_ZO>bLolEK9dfjnwbW?cte4!ar7$he`wHhDgmbiDaTZM83L(GeGub0l5+
zH>QfzrMkWqHk$B>Y0)d`kEgn#bG7|WU+Ob^^=y09RSB!J30E8M&Cc3()%+?)pt&!P
z+N))q2cImzv*lIA?GNj6E-d=`|NW*Nugm9a@0Rd=v!B;CbG`Q-{c7D`XC9o5cQy>#
zJ1e(PfBQbud4+%HF5KQT{lXrD*%z*~G_Akb(j?)tWw}su=eLj~gUpV3Ty1J1M-nb=
z5$2jc<A;-QnY-_r7j|Yo7i)879LmpIyI1nwt>tZH3y<@jU2OZZvf5kmkM82dInAAw
zZS#{|>vsqot@shp+upijx+0tKSEC~di{jcOe8ldawy?1?$=M>c^~Ja7@89l5_w9G(
z|G9LbZ>G-H!|FTC4xiq^GjGOPhgCQ9zAV-?w0<3b?6uPGY;nz$k0ldVAOCxJ|Mhy!
zv#u}WmezCWZC}r0o04IFi!r}GnlWDSXZK&@3tbi4zlCk#lJ!`9k+n2D`u2<bn|EgV
z&HH3(Re9=q#=2l0wOdEJ4!SHBFr4wlmy<_Ls<q?bl2R8%gIPiAKBo!)Kijg;*;sSe
zd+%j0_UX?|iv6V+_}01L<$lM$uZhk7Ws?oq?0DtN|1~eX{-Jfv=^uxi;vYCS&zIEi
znzJ-;i9l)Lk%UEheW3pE(VMFCMDIQ9UizY}E;4h?+Z{(9G-q7<e^~#Oz0~^Siw|eA
z{<?L6x2<f;+TUi|bnP!)kpHN9#4K*|zHYOZPFp<1n>)>3CK+U|QImBu%bF|uUg+NY
z?v*d5)%j-b(cL*y==`Fc|F0=X+RwhWfcs~ux9r1x>wTX}ux9y7-*o#g<rgRt{rlyu
zTih3~#qp@EUA*<a(mc6)KD<F&;=;wk_vUGQ`qaAq<MZYBj7tPUFBF}Kipj}nJovq?
ze4F39Rag3-CFj-KuRogo+dgVfSz&ba@A}{CtLq*_@8N&y&QpCaBZK?b!3WZh)TM1^
zo6enf{Mxsp8-Cw^tLveE^{Lk_xBm3w4qull>~o9fdX!xfbNl*>9oyDlEX*~WvEsZ2
zoA6i3qY0ZTYTP7zt(_U1k8eGiV1&8sb)M13$7+vTx3w&Czgp8J7y4P#EKJAK=l6@3
ztMi;MWUiehzV7#q+}|(uNaq+xxSRUdROfe=&g?O@|MPC6&};3fM*`oTo?jo6G<V6i
zY5TZuiG8`6ZNH^N^TMruhua&!m1f-D{Ehhn-<rR|TLiP~_k6!7^!jr|)y1Rzb#X~^
zWiw`$J(8;9zcq8~{pPZVQvVokO?_Fu;I2dVIu_Ms@l9pvZ?7(3T{k^b^LjOF2LH17
zhHoiVx*7WG9u{9%Ix~)cmcd`1E#{Y{9j8B(nxS|4_lNKcPiNF|?Xr=-{l9VD0n-|$
zT}tn7o?TEo<Dc{v{p$sGFT7%yFHhas#=8A}aME423;mA23wf6}uRCR0!*Xl>%g6<*
z4gU(1lrEe9|KmfU*E|c@mSq?1?QdRp^b7Nat&!FGFRWq?|6ag6V_(_BVAXBi?6v$Q
z3iI2qJF*w@`mlcvyi?h@)Op4}ZmTKT6-*@(*FW&RD7Y3^f2vk>+iJF2=@OM}ea6`S
z?1Wu*+5XIT8(u~)kT$A)oa1f&Na`NT-5J>xA|=Ah{xj)5R{qCVB69r$TgJ}C{Ci`P
zc86xfv#)(1wU1r)@E6ky8`u05ERne^?s)vOolN8Es^E3szgp|gJ&^v~<3gv;{=>2c
zov&@VN{lX_chKH>k99%tj<|jI&63|bU0AuMmVHatYg@6BS-0aayj)|;S5ka!AImP*
z>(xvzrmd-ED`Cs_XSv(8)xSCK?5)X;+Y{dgFSxzwo5+Q?5vRAz+Pb_k@BA%w$Mj9#
zN-oHPLRvZdJj>nA>;$Xs^EYoUu-^Pl_(JTD8|N7BPTlI0UcC2t)4OB0>YL9!tUAv=
z_jJ^<-Nk$Nv)*mq`o8hq$y@gu-yQvud|~g-d)yAs3weFMKdjxsQ4)V`AO9}-?DcGS
z=Wo4!?|TNP?1AWNwzYQ}eIl*rZ@unVEpYvV*o%Wc^1p9fa-LDtU7?Zxmh-~l9c_yP
z-#_&9T)yI);03A4Ti%LX)nTwZWKb{h$K%=7GyO?%p9Owg^sDFj!Srms9mBp0ACnLE
zC)Qp3`{4Mlsu}XnU+w4rQ*peX+5X_wdi@`r>*hT^=wI|}_d)-%U&06c3xDlC;9vSn
z_@ICBuiJ%be&toq(k<e+|IX~2&r&z-cKx;aZ(mtT{*gJJ&uV}D<N8A7dC!0NK6t*n
zY9G`8Uh8|&2kKvcabGa+{?51mc>gdhw-@^36n;MbfPT>*jSt<iw&qRok6u+u*B|ko
z`!DIkeQVp#r)Bnw{NeBWtXs45@$|;{hZf~a!>#Hpe}t~9d*`#h>~^i_^_%jt&rkpI
z_p4X^a(zct)`t1lcRj9>d;a;n-+$h7hfDkHx$E{muGwR5u)dP*k6SqZ>;I3w_&5K*
z`tg6m|Fdt;JKvc9zxZnncirUM^VtvNm(AJzJbKQ*x)0H^{~7<7h5xU8uzmM0@ud29
z1%Ko|L>>S6zHa&B^5*|{uNHIth|T-|o@xK>mox7_{!-p_|MicR558O0>i)2gv0dJL
z|NXcB>@x3}{m%b!T>f9~kK*z34D~lY<{y+V{5ps8--^fo8SBq{+<ZX3{P$<mAHwV8
zp7~q-4S(QoS!ed+vfqE!ANH}f&l~I?f0^HG|N6(y2j?ySE`M--ch!vj55CNA*#F{3
z<pX`ozsDcw@2)z>UVrqZJyZSFkM|q)Kl>uzu>akw#D8s<_w)bLKVHxMZ`tMj-2bMn
zeqR0{-}<lhgZCD7j6Zh2`?H_*-@MiBKYy>Acm05U!5^m&{IRzGnf{-+T5R~^c;9}$
zfBDPP|8aiqj${3Q<)ilj`{LWRl7EWB&o6xtzoROS>Hnpd_5A;)KK6h3>*uYHs}Jrk
z{A$DZPd@zo`~&+-Z`bntv0k43Z|`M$rhm<si~rhN{bQ=|<$S%K(SA|O&*BH}R&}C3
z0{iSa>$W^qT`l?gW_g!&-}*U0X1l7qt`@xB^L^2*<#~UFZk|;>lcoAvF4=9%%_BX=
zWxl^(Oxm4)^uzh4N#D-BUf<1DVOpNe`1qf0!kvq)R$nR>^2NrVxWL|a+cjO{)dlS~
zt1nFp`Szxqcy+OGy`<5Xc@GO0i1U`dFl9crH*3e;s**dW+j#co?%@5hOVRng^gpq^
z1t%^@x9@jdFJtuO(8K(TuiMtx$yU9cu<$$I`FPu}h52%?F05|1`toie-`<)Xv0uJ1
zK8~|r!@sxwM|1_FqVs!+Jn=Zk70u-WdE#+SJ7OzX6Kg+69s2d^^1*J7(hq7*vU|D$
z*xxH%Ie41mJO4em3Yia9PO^LYH`rAuJ}i6K+rks)86m%?H-KGV^~%-H-xJoW{>iQV
zda#>Qa?i{U6%Vhr+-@irmeb!eCxAU)eGPw{|BB}C!tc2EESPXmnoDxeq6t@v<u^_j
z$rFzYJn_J^b^luT<8dJ;9{9F?J-C`na?gqne-57JdcE5HcwG33=I^4f9<;Xd+>1Ez
zU}`H*T*MCEicCe2T=a_O?_x$3g%9%|o^9oci#_q+XzSO5r@13-t-k$olHId^!a;7H
zdhUFKln-3aZ2AUk_~VjJyt=sYy2PsowrxCdDL<ksCM!0FOBz*7WK7mKzT;+V_07te
z?Y;3Gwmlan9DL0qx#!Y`eN`oImbO_{tbSN{Ae(nP<9pMT4@rlAJ;-gds@S@a?_TbX
z*ovJG^B-PqJI=V?e9d|}+3JIdwO`-JS07ER{m|zuyXQ#&d%oqBgV}uByPx=-nDCVI
z_3HEbZhabmbcMVh=1)xIinO&l=ij=k>R0@^yw=;UUOFi!dRxC<UHte=)Q{*Tj}QHI
zj?)7foc{IDuL)c{l0{7q^Iu;qbTho7$Se6y{?o*VW)qI^ymmG-2B~`Pbokc<2j17t
zYNl)WUtZr}_ayP~uL*m2UptGLui;;Le}mnVhQq&JeH6BAmN8l~_wcU?^?a|LFInBO
zPg(CQ8+0$R_C#&FmCBjJwT{nhQarY|?{~dtdqpu){+;}$ZwvWW{ww%D;WPjC#>S=%
zc0Cd;UlV62F1P-@Z^B0f*B!AvVJ)|h3b>yzxF%@CGogh?S@mJr>x&;PyjL84;1eP5
zmg&^CaP9`Xo{ue7JUp#D$}V8(A3-M!G(_{n7Y9EyGgu<}%3z!5D+2{F135|V?a}>x
z$FDlcvORW^b$fc~ZIXuml|&!?D~SpQckFvO+HS9PKmNFLAz$-^hh>IRlK;e<XFM!3
zoF@6ofI-Trrv)OvLh<l}>=OoD(s|6z+ZXaB?^wvkyni8|@&QmfdVGB0x_K7;?(>~x
z+twWZWl$#jPmKBA!+gU}vYV<(Z1Uu;h5Og_y5Bwg>s9CX$}@Ir*6;hn==R4s*7h&^
zdGQklfAq61+f}_*oL7EfS?-n#T(?Tfr<W`|yyWB5X#U9Z+jh%#@0OI2w7DdB$IZzt
z;?hl3oykjoZHYX)?pfIRwQ?<2@5cUCI}&<OcV>v<Y{%Q$vl9K9!@^D!sNLz~mV8y$
zI?d%(VashE#dUIdvMmedom;ow`_|37x-Z{YZCSEcXTfzZs}oGSmZ=nR-}$d1o62i7
zQ)L?K7Zp$Si3@joSe<6N^=nD@iHe1*brzKR@9O07t#I1Z@Xh?Co>82}38tt!OF~jI
z!Y0dYYA`c=sc97VLX|s%b@Eczwq<&rDU5GJE=8y8+0di2Ak}M{sN}5qDVC8Aw<qf8
z8^uL9id~3O(eC2$b-Ls(R$#AQ>w1h^`y`W5>&a6}&Q*qyu3{6cy?%A}h=)yOP3fNW
zPs!O!Bhpvwf}G0g?jG@L6Iiz}oSdcPd`msjTdY7|JsTuAku~M)Bt|9YRYsBFViW#*
zv32!`vz=rzns72<qGIkmo{6ka_Do)=^td%~Q^T7eqnH$rN_FKF#-FcJmYk?aw2gFV
zvx<yQ@o-j`J|XpF)@0sPUZJBW-8Qv}n@wX~(l*)GrEO1WkXm*{;*>RxY+9PrP4^f?
ziA^Z>(sF5Q2{dxM_Tf-Oq(hg6q`J|Q#z`MHHK_P)T6v-(u}McEce0O&WRdYnl}Lvq
z)tNd*aVw^<E(w~XspPy*<))9=gf||`x_ZP{r7*tiO__CK!eNhPr<sHVPCiq5+^U<x
zsM((4Jy9`!!kG!Cdp1nfQE;A+qieK;aZ+vy<HnLrYfn@pT1PsB%n3Qo<n%YC`X}$B
zFDc8`JZzOsVH7OiwD^R8p1So(sUry|bt0P?v~EUT`*28a6Psf2rqyd4W2T&$X39}F
z>23<I(wvk&orDU_nc7BAPE5X=%B%lIF<aoRO7$tJxEtQr7RY;ln`XMl!2g=UBEN4F
zP4{eAzs9j={u}k|ip2WJ<~TD;hie}WHEv@2n_v`w?ZY9*O>DM#MH|*UY;{iIP5S>N
zAo4JG`$;L6=O-UVym;jFb;+?Es(dFVE2nfGe)r@=iEPueCo4*1^=0R-b7q*X<1t-e
znJRbX%H73hmY$Y+Vr97FixZm_Q+o6X0kt>FxFvODm+?+ma=1i_Z*5Blo8wG@?Yex=
zTXy6YDrmUu%5Is^$5Rq(#XjF@$!+%=T1QGB$b8_McusQRCV`g+1XH*t*1A>bxqOps
z+$&&d@4?AY`1{OB7R4LsMVTE=)dFvfcK&H)zL8wi$<Myw@Dn37zJ&UdOQU2Cyqk3T
zqD8}A)#-N%8LYkaw4X41n;K(vlJSk!PMayrH!cU6D}=tVsQPl{)u&CXUfKTOF#Hkn
z;y{iQ>uQ5DDyw!DyR<5*2A-XJ`MAiP1p$glheD_B`ZMGA!xt+<FS~u@e>i)Wd|2PS
zV_Fr{{Y<y+5SAz`TcxY@=6%&}!);FH69SFD&j{Xj+3)iYgX-OZyApW&wr`hy&VB8{
zf$E)tN1f8w6jsf-9GAy%@wmn2y>~2@_HTSRFYm^d3oAQ59)I_g&A!&~+tTUM)?W?F
zmMoWE^!3$&uNN=#ey9==_w+Znc@r3;X?yp<CilXfUrL-W%N_mrwS@V$+|h?$OAbGh
zo4WY$f?e)~61I0I>~Vjpcl5yi-^IChrAGG~B_8>o6!|l=GQdx-&2!JwAoB&`DL3*~
zO7rL#<!rset0E@3?dD<Co!o|-&&DKQJ)C;t^@8A{s=XYRMlT)~{Vf%EzNy{&#&yR(
zhE+Rq>Sd4IU(_xgw4&MKrR|*x7uh40?;o-mzf$1a(=N@qvf1L3T%N>IzFo?X3};xq
z=<8rF=$asXOfK)sa=u-2pD$c&^`dOv@wu-SSeMCdS=C(RBJmMS>a7N`vsX92>!?_;
zj_;IU;*|A#UfwN=PCvQxkCg|ll#bIelJQ?DJxj+(#&4zcH60@v-<8rrx<)cSE2aH(
zjbyx6N_XiRm4|*Z$eXxx^`!QO?lZAdZE9jtE^SE2IDGfnV)M<tlHoT`_xAjd*!r!A
zS=(;fYKg}pFC|wA>GEIu5w(-oAS`fsX+4jez{=(zZMWc83UzS>iq(p<f<j}TMr9Oj
zX5f0Ot2N)E@qOwNPA*xU89|m)r3?K`cG~54d};FVwJ^H!b?%%i0!p>&mlU0r>~~Lc
zdsSF#xjf88IhT8q(V{{*hUK*_9`*e#69ul{FJ9%@@%p``r|OZf-{;&Ddh~6kaI({e
z^Qy0BeY<$~_`PqT%fDR=_5c61TW`*p9Z$8hxAyiKi5%bj{YLtI#^6<L;pdkvowTp^
zajN7SqwId!XXhj>B)-44+P3Xg;A3}RdFQv2E><3Oh`(sJ@`N_q&n~``Gxj8HSl=;e
zW93nS_=|>;)5CebiWVB#t(SPFZKXQ<ndsqK*XJotafXM&OFY${i7MB+UQY?~Gqfo7
z+pRkJbJrQmrAv&~pO|y`-N`9?l#2bhPo`D6KASU5Ef^&Cc4Ej=(V4}!jAu>@PdS&l
zKBX#dqUCaL_1VuwXBN*=iGCvDZ1j9f`KDBm@M#s}PhDp$W6f@Afed^)X)VZzSi75Q
zAg<`7Trk)0rXGlE=UEEUQ#<)BSX6W7&a6Af!+Bhf@8FY){^6+<ZF$pPUwYEywUcBv
z6z$ogFP(O~Agp(u%B;GRf9ANEMO;}kOGYN6?RMJzOfzBM|4$~&QM((qDpJ?dWVxhB
zMwma}>A8y+&Rm_<o6^2VsW^1)%r`S``&Ie8EW75#cmDdMou97xm7UTy3cqJ{a?PEc
z-siom-m$5$uajH<CcACPER$&hPj{U>xAWGe&6BU08CYtB&z|#i!8XT}dX`JCh-t8^
z@BY>uekRUmQ~SIu4<qa4lXR<BEj*cLIW^~MFt7KsHA4StpS;rjSKFp;sumvl&rf3F
znX@ZDnIAfl@_kNLhTqn>P40fCI?JQ%ZyGO`nirfq;my?G-V-a$e7>Dq>Gmu{TJ`g%
z^6G#3TM9S%$4&b$oIB~w?CDScyQQA2+qr+@oK27JXM_~Boa}tkBkKC}<iyH}b2co>
zC@BhwQ+d8xW0gnWx$Y+=qOQr4SikLxRMhr59~Nk878%j6m9zes>hUX!xuVy6Jh}1f
zibLPhE<f2(74k6DUeR)&Txi8Tbv5-Xi@E&&EO~OID&*nJ`E%xk^lRCCoqF=**A<6~
z?Nu#R*EhYM6_`71PE@~^&G+ERmtO_8KHsNhxmPZ<;@xu9^ec<G&j0=L<V;n_!=3kS
zELVesw|ksh=Po+$x9;R(km@?OqCDGGAMWH&oijcB;L)=yw)ve~50cNFbiZZQ#8TP1
zsVlbm>KXmrtb39perx-SZQgaW*RTE2?vuURPw(XQusa)f-P-0~H~o6$)}^~<o@A|z
z{dj1_<+l@JX56>V-|e?Gxu`Ji>D6Z;)~eHI*?lzHmt`Qe!m2+p%*g0@@Pfis!EffQ
znI4|9XLjtQub;bmo^Q(D<QO;cV@#U5^fOV(`IXyK7VlAdY<%9+%<mDCc7c@He5=T?
zGrrei)ZPWg9F$Cq+*-Y9(*N0?I7K%l^`|`j^UR3v$GnqjGovOtP7AG8UHxOV#c%D^
z-~7VP=Un)AYVC~aUtY^jzqWS8?~`^XSM9V<diLerY@ScA?<`81vgU?<<l+1L=R!}f
z`aAjGzkDrs|H-24Dyvh^KN5*7OxP5*t2r~w_1YQ#Yv<;#_R%N`2-;S1$M$dT&m)|N
z`2DVVnyW=hL>77&DU_d?dHU0Zl)G~jibLh5@tol_nttcu$p`xuDij~RIwQryZ{p5J
zeFi5l%uy<yD3duU(bDzV6`9mY4=r8QysU4jD2JVzd%q{8(bMgz>P+j}g`TIZj|X0T
zQ=9HPd;fKvtlc4Z+HRHg-2V8vG~|+Ep7qi!i<x<a%Xe-r*O+fwu6NpN&7shMkU#dQ
z$0e0=UXZ%U%)s!Omw`cxxZ{%Ii%UwA^vYVpV~ZD?iPU~yf8ovLcYd#K<XtY?eVM({
z^Yjr;7bUf~e(r~*CK)I`VDh{E_v=-0xA=wpou%h@evi>vQhn_C^8@+cj&G}}d3Es9
z<@5G++oN>s8-H)odYzxHu%^72VKtY+v<r+OC9c1to_xOf=8ueue=2*|^xAqBec!qj
zTp#>z+Beo-{-&T`7J4nM_U4rb3zuBcvo3LE-<5pVUQ|~1&Fp1K{~aUkMRZRbxUO~E
zwt4+o^A8ucDD*sE;~pa#8QxHP?JMhosj~_qFMs06>E5<xmiq<M_OkGfvJl17#c>B8
zuVIcnyI@ji+Ekx;=kL|Cd_U43;BaX6X^uZ!_uk%43onU{w4e0O<MzHkE^+!NST}y$
zocnXuQ{IGXv-rKt^7dz*xRvZ)b8B*a|JVD!&josjrF@h-{%}%4eX;8yV*|E{QYz^Q
zY%Vpj4?j#f*{nF3{iHyPh1BJU0<YwQ6WR>DrM6_2WOYwJRkd_Y<XhQqVk&(BPUYEe
z)ulUg_FDTq5_y;){NvF~(?3G@ay4pvAJlr(b&Ins(!JA?&FiIm!kIDV|G}qj0-gmf
zmw1oN+O?Kt;?16;v-I4raJ}byxk(^b>A#nI!H@I>+^3CvrI&@JW`!=2aIM;Z#YrG$
z{X|tgho`I8Br<)qlK-_|`mNc)UcNhSHzsX+9kf~RX{lHF90mW=3)F9lY`d@IqkCfW
zJ!PTwQT761)0|IE*mzE|&o{JDv*E@S?=sz&_nq`IqbBHZ+@3Vyp6D;N4t~RxPd{l*
z=zcXbaZ78DO3kU5%fXL3Q@8jXVd{0tRPfYaJwI{Yb|tCs=#t_|_ZLNU#hpHX`(g2$
za_{)49!{~^mtFf+e|fIo{{5lxRIS&47lyY5o;dLA!t0DDF2c?ZKKjO?J%;L8oF8_k
zE&as!+{KsC?Bf|1v+p@MFPXyi0!${}nEq71d;b~6l^^;%E$tTB>P_|fdhf&Gch8R8
zC@xBxWTjasJXb`1P2RDbuc;^Z?ftdja*37a>@|vK-QR>T&EBT9->AZ@TK&~gp7~xs
z=Cjr8@c&SA#s5Riht+?+KQm8JuGea;KIFo*ouk)W>cc_%sSddbUCWjkIC96&^qMg(
zecorYv$7o*ALVJ5mY7(6{3sML#XwkG_07qn1+$BU@~6$nJ)`|_WvZH{{%wa>t!GZ$
zOWAo=b4{Voj+dI!wMF*A(m4ShrarHl_D`A6@5@+tJb7N4L--#R4F+RxZX*WoHtQ99
zf$CQo->tB6nHyS}Q6?y9bz_Z_ZvBKgea0=b)^ncleL6Kq`G;`aYK7aGefM?+%?#fC
zQBd|xw6mXk%&{})?9X>uiQD_8{bxiiAQtiT%E+-YFl?7#U{EKnfY2*SNxT|yI#1bE
z<S1k26eY&ME|v(U$R<_K-G9qkBxJ1pj6P<+Nl6oMTIyAPblnC0RjcNvT>HZ&&BD#1
z{Y^)JLs3QS4`X#*)9tqrFOL|$HB8Rjv*~VV>8m-_@Ak$%l?t75CDw7*R<FB7=i7ar
zY`>Hdx-;%nl5?8s{wo)&FD;nnJ}=HHzG70vA=4RC?z|MP)D+#^t>Sy>WWAlk`jg)7
zysz#g>1G*sN@uwGKi>7M%B%X2?z@<b{vQ)&t()fg`sv!9v_tQ16(mH>5@~y8eP>x)
z!PdEXOFgUD*X}*0ml?L|?l-YB2iY5zJ$_Y_;l9<6Wff<D<eu+m0<L~5e4Vk~Tk5Ts
zE>k&2LF685^E-iG#Uk?fHr#Drax1S)>u$!GZx_APddnXjnDJoR?fsqME3Z}^w@%i%
z!xmLpBhYT*xVkPNfAX!urGdFyR<{dg@i)xs%Pwpv50rj-eCuMyX>lFLcg>D@KRL|g
z-vsHIl10f@>!mBZ%NwHv@Ao&)UcmNx@fxNXmuw7<_b!fhJb#QmYt;@9$=0tCed~|!
z-k`93(XRsTjHe&|*#wkNO}S8E^z+BD&+!%4O*>y_sLnnnf4*6a*Zx?>+NZa#zb#aq
z&o@)-S+Z5+2gazde)sN_&L`Whump#EnaTC?)l&5;O`mDMH5NX8`!eB@z@6X?F}(%u
z1y2GGXtBI#*r8NsAe*>r$L`y10dsCjb{WSd=&Sq?^hznHw7O-|I`{D2!u98-JgWX0
z(s=P&bG=8y4xN8y3wdK^XQr<UE9SkQ#wYNC<9pA+=XRehuDY#%9IW@ISZjt_th03A
zw%&a!j>|NJDK5|L-Fj!nAzMoZj$rM%vm$jlZqIlloBuO$-V;t+^$<yi@6J<BJbF~}
zGB_!H$2Rj-D}5@@&FU)ad*8g^=?8QDvI~CelGsG2R!{4C)R%N<p_t)})RP<U{OQ&!
zpQBXIa63lo|0aoT=5CAZx3#>#Q)Be>jMt&hS{DzuIof2^`2F_Ds@ge+H`q^W@{1}(
z@oQCbs-G-ucb8iq|Ek<^u)Hyu_0QL&qz`*!x_>Oy-yDC%aHYZezI~lee_p0MI$-io
zsIvF3L_|c(t!R&kdDC0H0-7fZ|Nk<D^TVg}2Tt?+%Qajg{(dQQ468ZEm4u8#a$X{j
z^^Jtf?pb9rU5Ia-t$N~XD@)p}*_&HZ)Ml&CZ@#&oJuUs?`R<EbDmIJm4!FbncI9Fh
z&hTd+EsLUA=fpG5KK*0)(UvFmH)Yt8r_FpkZBF#PX=`@KuK93Gx3Z1<am)7Y>wh<h
zw5jg@l4!Y8EI1<0aNdTi0dbWwU7C7(XLJ}ZeJaX)xP@!ox}#I3NAoy*bnq$SU06`%
zAE-LHet*w3x7EICmG=)a?PU_L>pX9^{@!wff>W~7n)qKuXI1|WJ|5~)b>_kHIWy-k
zHEXWl6Ks6JC$}nOMaZi|8g{;~D-XYV?)CGm57+v|p_94OH0)A-sP1Wd7iufdHTR*5
z)c(e6eQZsE!OLn+`tW>rm~r9j+>0$SpH_=*5uECfv+Thi<>skd<J|3@Wfh#5A>OdJ
z|K8S}TOMApOGrCvQvJ{Kc5;(exXrU=QXYFYtz@q^k9=1-Iqu5J$G@~{zM0+1`1x(4
za>V>*C5wczn1v|}vs|RvrmlIqYFB=w?sl`TkR5MIw{YE#4D*jrezRR*+6P;OtErP#
zw%va2X7P!yO4x6m*c+Z$Yl-z57YZL~i}5wTU`$^Wna^ImZgI8x9)4l>6%GqoBPG^k
zed12*>u66tS^6dGdt(2AJO{6T+^9utmEZAwJTZ(639`aO7qO`+X;1dXPQGn1P4}1G
zex<|w>38&lJ-tqCQO~=>k?K|U(!yBPd&}l5nOf1W6R*w<URNS}JGA!IJ&XT;h32z3
zOgM6DwrBK}BPHcRYG&7%Hf$6>$@}8v-Sgk~&#C$Kvi<x1_y6zjm-~19{rqqH>;HVX
ze0RD3cmDr3>VLhy{CxNQbKjT$zFco@S*i8z@8@@qm;dJHSO0nP<;j=#eO_L@JHPz>
z*RSi#>;Jw!e0+ZW?}z2TzgPb~U;lgi^7(fEKm6?X|6lg$OT7Gh`}%#=0;YEN|Ceq5
z{pWE0{`pUqS7v_udGh5?&uMed%$w^o&vUlwvih1o54TTN&wu~_&%@{Z{(keMWc)u}
ze)F^biT^*f_rG5r&fkC6w#Kfq=;QIfzt5{b-T(jh+q>u0&E@~uSXx@2-28uz&HwW`
zRYiNX{ap6e*9)!w`Z!+w|G)k9I{*Jf{`r0R{yV$>ANKpltywp1xw`6~{?y}hY<@nQ
zFJHI&_p|->HJg8YxGcZu)AD>XdHX-#V}I_yfA4SI|HJ01yz6)V|8aYN-H(dzXP5Ka
z*M44pWZi$)(r@Nmf6d>&mp`}c{-5K^=iA-;A2;hm-p>DbcjrmW&$s*g^~2Bkn&tnF
z&tJ4zChF#OpV#y4_y1oe^ZNI9`F|gMpG>n){~ftx)uW0}+v_Jkt}gxm__(~?ztT_V
z=f6K){l0$p|C;~LV=dYJUu_OQb8Pqge?LDg%z3|l@^b$AKi?kTJ%04A{&)V=rA1aJ
zGsDi!*!}&zf80HtEAjLH|N8sx$<t41J7Z(Dl%M|Dv;X(?lZWp<|Necx-D>U1>t{FZ
zh<eLa8(w+;@8RdW`}cz)yi-#v{dar+eE+z4Hh+Kqdwkb_)6K85lRhsC=<WW0x&Fle
zLV>+|_tdz!NHZ<!zIt@Fcz;Lc)-uPndDryRnydF^>|DwC<LYdsYL`25Z#L-jZV#3(
z^QzA;d*0vi>m|Ru{l9=+N00Arm#^Dx9jUYJ^JMi$`|qb-{%`a5_vHO^Q#SA4`lWR7
zOzza@N&oc1%hWj2PH|2DeAo3>@A_$--|wp2dtT}MxmNSXtG^p}O#8cWN1b`#Uqjy)
z{T(x}@0Lzo@uxXAE7>P^$FeO8%P0Hvm(5G?2)X&LtL2~0`xyPMCBL_=6n^p6EH`P-
z-DSQ#w^N;VJKm3-zWVOuPy6qkE%|>wh%I6B?mbmgi*Bdw^*ylV=G#kdiZVZ5|9qJg
zSF=BI+T#5Gb<5Km>>00pWDN|hw%#9A$z65(?(Mfl`+nGcd^c&j`3c_b*E&=A4F8&Y
z=`?qw3T*80(JAkExj!(;(nY7e<7rBgaQlpZ(yC^S9li=llU<Td7n$yubAL|WzQ6l^
z=>7et^Y!0?$1Y!kf<%_<uMc1SX!p^RlQ%rMyYtnNbj`UEA#ux$%3kM8w7TAX^;cD4
zXPBp8c3kU|jgw8yj;3wgGpl}o?7n-;c)ZpmUCP)c`qKB)?K`<Adf%B9tls@TUoSrA
z`E~CdfziU*#oOx|O+&*xvKAhc-aN~Eme3^gSEnYJ&$8+;PupRBN~^>C6xRgvw2=G~
zZMEKI(G%~f?DxGO{dZNtYLomgSxLEz?rCVLY!&!;Y`V0e?NaGe_V?#zF06aTU3w<T
zvVQH!M{HX(wbp$)efg83!qvhrZ%^hazmGqo_<89QrZedhRfX1Ra!&er{$~4s&OiDm
zb)$#r`h0)0{o2>JU+y-4y7_jlQ|}2DW43$i)^nMjy))^@>ltjXw-tTZbF=byY0>u?
zzbF4%-kEDzRs448)zUvx*$!^{7`B{YQ|{|H-C#N0GjAo!g*cf1sTim(@tlx2S%F!-
zamRdP&LhFQtU0fkngrxdyX(1tTjBOLJp)d&)t6sC(VJqfUb<js>>gLAGu^*8vMIdY
zJzM4RM#o84ucx(q5w$z%dQ^qy*E=4`xjfRcf*&VbocKMN*Wp^^;>neZmDg)5p1ic*
zZ{yr}J^k+0Ew_~?q~<<+!nJvCPSsxC2t7Uj{O9@8s}^pW9#DSdZQ8!rQqG&AruWZm
zKl*afhx@(dclYa-UHI#nb?469#tb6?-)Svsm!9XBi7%i1bz8(;og+SzW#3PC)K~ER
zx?Snr{k-zitBaV_uXHP)Ryr}qh-(v%tJ<r((-v>no-}RN_S3VS{)L~qtC$^_AATlZ
zO#J@+eG${9{AKFMU;Q>Tqx$H^zl&nFwyvvM^uNKx^+?!Hmi;0@OMlHy-MB+9?#b+=
z-Bp(RMHKdCuY2nIFKOeRiqAneO~dz?hD8f;tc@%@cyQOPeR^x>*aZIntyjOS{kP@8
zYhVBDzIyuX%Npx=oo(v=d%Wd}vtK>(eOb_#S$THm;%k?l{`qu!X>w$ovu*b3RhhS9
z7jmA;diWqh_g?C(_+v^HTlW;6nHDav(`|M3L+g8~`iD2(Tz9unY<j?s{7t{B_7<O+
z7QXk(p}ep0@9qdr5756cYvueGQVn;0%~RL^{c+Fj1D~&$x@<aG^q}(9uKvWGrLr%#
z>AUaxD&raRwdrcPO65)O_rLm7^nVvDi9SE^NT~ka2iBAJv{W6u=2NN?`%vj?_V#`D
zKVMhOd9k+YU(x!i!r<~_kA?4r?3p!v-o4st=9buvdsjGgXlJC&=vv7v;X3iBluP`#
zi$^0DIG!;z@t&<yt-Wxk+LyRvR}^Nhc6`EWF?rS+EAQpInogKTl}_`ky?MG|hxhV*
zPxR-`T<&-UWWC<pUqY`~qbI+toX2)?`rnFq>mAQPeNdY@;mlQqPmAQ;i%dIqy<%Pc
z-orL?!kOy|zc%qhgqDiexG&0@z;jhWa)qPOJhqcIyo=Vs9sML@!kNnouefGOE=zjF
z@b1*_=hJ6@S&^;1gm2->g4t1uFC=3BJN5W}H9yYTD>^YO_@+qsgv~R$R>sP@ZwxKI
zxtB@UU+Rt3U)2zSOYzI3a@A(viu-;_+v~g9@sis5PbR|OyPxZ3JUh*m!F_UqlB}lO
zhch0l_TNAI<%!43BW&GQFU-)c$Z$D&Wnt&yg0y`*AFX|KY|`cUq-V;1Q&(L~-?!pz
zsebOW?yi-0SHJh4m-edef#>NkhiH#Bk+&z#%>4N%KSM=YXP5KhbsWx<Kc>|^J6ltF
z_4t|db7t!QYx{LN<nfuBg|FwlTYByf&zzr;AlKA)ulu=)>6Vkx5)b#f*K2;h0-F%#
zoV@PALP62scD24F>-{nNcWUbJ)$*>K%yzmlF;(32bpD3upR0C0dTpF|QZlh?eOFdV
zyy(`woQ|JE11Fj*<~4IJT)*&L#s(RQW9ls{XTCc1s?K2DDX^ax#ReY@{c65{^W7a;
z>o_KNiiV$lb?{Zvx}U4PpRL#XB{a*2x9sj!SM5f*u<2f$EA}rGG`niCx_dRt8PQay
z4`I`FB4W>&UXkUU#(elki-BoyY~<bfi&uO1t<$qCE<HK-s_UP#@88^sj=dt9X!LZ?
zRaO2l@#3@bu|@Tz7pGrH$=dLGo!+Ze{a01X!^A(Dn;cpum0o&s?^V~>KsA>9(v!_s
zkH$FPy_jHW(Bsb$Y<zX<)xW|er85_-KHai&m(LuC>7Cnmt<XM{GV4Rwbk7aDW@P_+
zW%Myzyq42<8Qbo6uNJNQ6%ng;?v>KNHn$rgkJso4=a&YCPvJZm9jgZNC?Z@uOP(H0
zvKEiudFB7H{rRlR3o@M_eV9@CcFNpk*5aR~4osV!Jz1?T|AcGUR`)qC_CNltnip_&
zmG87;vo}BCJ28Rp#0%L8ma+@}vso)RTPgUzYmj-_Fy|iQ&dZFy@;5LSEn!wWDQn<p
zmEiQgp%Wsec2ZVh+xi!aEB<_Di^>;Q|G4Cyo}ao!Y+d-8yi@<#S9NT*)VqG~*|sTC
zw`C)ef5%?>!Coqszk4-{vUF5H^t3yZDsFU0^S}C)K0_r$)8W=5k4d4w{z}?C`eY)O
zaU_&C<wz=T!I4tgV;$1mS3714o$7eK>qN)v<~)O2oyu|#b^87YM4vb_-`C45FCgS{
zd!>p={`<Hym*0y?cTU_rId^rlfu8X0Ncq`}H~0C?dHczr?X>Hn|0{Q|kK4=P=aIAj
zzZGj$O5F`-wJ$0w*9rd2%D%^z9=`4F9LHFtzGjDAE_2>Hyceo`(sWt%)vQaZkww!x
zghhn}W>+6&t9erP<X&vnh6(JvOQNSOXH(d&{C!#Ty>sgu8&-V#wtUU?i6>Rc?s%Uo
z`@eTb*Z#i_JzV80dQNE{S+PQW`>}Yo+1IV};#GdH*;OkpS9QDUw^^yjmAjp*!t-_=
zuSk<P&+~Yuqs``&c~{f^iGMZ^=R9w{Yue2W{wup;MLOr@l;2dpBjZ!L*FE;l@@vs&
z&Wdgl*neZsob_T#*84wS+wk{MmEzp`Qe*uir*|)4a0(3FJH_(vT+>+xSA3uB=oq{x
z^v;f8%a1R&@VV!lEjPO|Tbsw@PR`c(aq$YVvW6?mpWb$6U6tMT@anhHPQQ1T_5Xj5
z{T8!d+``vj>7|>(@jqwIem!61*8BDQkM-P_|8VK*Q})hR@0a;9Pw@Q8bZf8Ey=611
zwn(nde!czoJJIZ8QqF$)TXW8J&o=q$k-yR>b$xzx+`Hqwv#L64SLgfBO?>t3i1?mo
zX*s)&PilYk-Tk-!Q@+spWab+Qmt-exd$MpxV6c9n$0Lb7FYnEp#67dLs@vl3>rRW0
zyQLW_YQ5*Yn`koU+U?-<89#bdwy~-Des7q+a&@_P_4G9pH&6RA&G*05%ROp`tBx<L
zKg+S<+Jv74tMn(Z&sCdTw0&9iRd&Cvk(YPBSsZ^g&iDPMe!U6NrgvA{?Q(c~<%{0$
z7ft57m%iqC^l9$Dg9|=<Z%RtbJ?c`Q->~p|VD<F9KbG8ddmI1#LSdTt*801L9Zu^m
zJ?F|V9Q1ZU+4^4xUj9xw&6ag$&HKr^zn2?sp673tKmS<IFT0zYs-=uy|6a0Z$&Zv;
z@BG()#Upt9L?;$bs&d{|-CFCAY4F;D|AqB3F;DB6r?T|7RkzmsG5Xq2DD1yD#8Bmx
zRnm#LP2zExCnGCXXD=)Fa6We^I@Wk^q?A#yd;F2l%M2!$Jv0rkeXvF>uKK3?{xI(K
zdtLr4Ke;Bh;%umVY=G{bZ$dAbq75%zmP)W#bu{kVBb#+uE7u9O`L;1Xf9bl_!+G83
zj;Yh%+f2<e46l9gW$tqRt4eQwoV(nfHL=X*`Af&G9>)7VA6RuX%%?=I)?P_J?$q}j
z&+W%Otv(%!`TB6iI~{iQohx0Zi7zTr)juO@B=2LJaYra#*NriK-<}K8ZFyY8PH-3Z
z`aD)Ue2*)0-Nd{+qnNX@m5o00)Fz+fTDk7mftTwh{MyuCR~qh7dooVZ*gtN?YP($r
zVimutUSi#rv}n2Mfe%kw_q{n<SyPz^bGK()%DO!h#BDA5we_!r%3IVvf9W2V0=5t;
z6#KxMKQJz3!JZBojq6p`-f=S?Ke@BoPUiC5rw>%jw@Q3EG)LumoZ{z$SD25zz0Ldg
zZR?8HC%CIm%5h|#j8t5mog!r}Sr&HUmDI~;YKPO_z2HvyWHNJ$_L7~inA5j9-8yae
zYipF^Th-#$DP?cCGS~fj(UjG?Wx9v>jjqml*BA~@6#uqK{CVM1*V0~t93vSEfBjER
zQblvwV=8C+RGquryeA;d=J`wKI1lT6pT8*TFOfZ8Sv5iYQqOxEl}bfzHLL!8@)O1H
zcfDDDHSc>`rRDt;&6g9Gg(WF}TvzDQxihIgNU%-jK11x`D_+8?&)(@?Ddk<Dt(m;;
z0>9xRITQC6`Ccxu{-<7?mJ55VGr{PYRN+ju!}qds*4@;bw=>8sP9b>R$t9bmR<E`z
z*tL4&zBh~G?_Q0F-xU7%%w(fitNQf{!jo$|OB&bCc#+9#V57NMzq(K^{?v@@mc+>q
z4^&o7GMcHK`oxw0++#1v(yQ!#_bY!*G@7ZO`Xv=A<Szc>obwbTNsZJ6=BoF*&V*^m
z&5r8qJ+k}QWTRhyx#CZSybr%}zax7_RL7K)za|*Hi<T^I^_Kjw*5^^BWZ;3FV53$S
z%6Ui@_wMkSoS1KFc0EV@e5|Ij{shhIDVHL9uZGH7fZY7;;`(=4YxHlfE_~-HS$fr7
ze8=jI`&@P%2=n=}g-v4Kl#A2%TJ-Cuo-sYN;bg%B8(YtrccvPBTEzamaB0u3SIo=b
z+x+#Id1t!OuT4;)#oRT|6}@K4Ofh<ta9(BV!hCg4$-;<~AmxwiJ}&9m^~&+olXdwG
z>k_jRgVf$TpL#NHN?`boDJM5tPOA76D)Qk7$f)+K6+);^pT7fNsCTNTUI~?teX#D>
zFL++92y%=6_Q+=66vOKrht&=@e*U78s<v**L~xo1DF>(dQ$97I*eQ?;KLyS;<#LOr
z%xnm9o1-*miP4w0Dw@iE%Y3s`?wNv|Y3nhw^R@H>aH!AxqL``%65KImX306hzwLkI
zf5!XQ@2dX)@5!UH-P2#4KVSd1uKZI`<>ou<^uC_;|Bro?BK!AC#2|%dL*84ZEQ<x@
zt&8LC?s+S?<>+Jvjn0UUs6WqNUj5rIU;pFB^^^PUYW{@&`+a%${P*=ccm4kS?(fN!
zt3H1DeAoYf&5sZN4%?rK{Pf{?zWu%0m^*)q{uk&+2Yw4>|MTzTVgK^^c6aUnB>#W8
z-hcl4I_vxYEpMOy_VrU=-Ky{mvndy*KK#+WIq3WB{QdXE?=gDrI=sqH^n3lE55Mmo
zKVLt$ro8m?-G5o7oA2z8h}E6?vHni2jivSMGik!<8msm<9ZOnn`1O96nTp}n8w^LD
zyj)sc$dKll`(8i0|FB-hMeF6C4WmWa%clJ=walpASo-*5)Muxg$=kMRn*BcdDJ#zJ
z;?vg&v-qyR6WABAb@$Jpmbq>F1s>mh<{hXPEjR7+yWg`<|LuPJr^?bGb@{`G67R3+
zvn|n#l5UDt*t54G*v|0B^}>&Lx!zpAJbC$iyLz3YmrhQu|NHsy@7?nMe|-6W=l`Go
zKO6r0XMTCvUT-_4V}3_{<s*e}XZ}`3J-!xUxa3tq=R97y{E2rq=M`^kJ}SR{=iBn%
zFJ9kp&owMt@pG}6g!R@xAEk8K-UMp~DD_A6U%K&WchdcWIR)q6nyxo}<x>6LYTvaj
z4}YDSHY?|YI_vVIjq^k{HO?0)sb;p-d~uDfD(J+%3zMC0yc1ZpIO{vNjph}pe@;E@
zH9;%3+vq&k|F9$=yTam_vz_LOYi$q2I`5f1c<~}O_W0s*?G5XVYxut|Nth-5!qd^*
z{J~_WtB)M~xk8(nZ8bwaW$&<){otwidy_v`nZ@6&&o0atVOsXcech>#HH-dj|9d!J
z=1lmx+_gK`&fX#G)zdLi+hpgX3nx40JKlaT_L*^-*zGF}{H5F0GRnOSiJl(bT$*_E
zN<wVJHd7z*w8Lkeu3j;SU2#il4R`yj)>SJH?kboOsZp;}DF0XW*zruwZ@YW?F9*F5
zXOmyKlu@nq59{%OYWt$#-#7BD?EI3icPrYg&U*9lx!cui40$qX5~sGgmMxud`(0>s
zS+>mOaFsi=BG=hYdu?(0+B$oVSxStzc3S1k>N<J#l6PD#tA82)+wP6?duyglOS0Gg
zt-;%Qzb)pzT^+mI@|2rDZhxIRck(Zzc~kClz1E&R<z_)*n3-wFjI(V#n^$d2JhUe3
z_34(IXSg>%)7odWz4So%6Xvrzr87*!3#YA(trsx)Iw@@(-|S^cMiDd4vT<*|8IWl9
zds1SUSzK#mb>)M^vdxq9Z^iKnD&|Bxx7gjj!SK+-tZeVSwQa9lZ(a-7t067DMm&7C
zqMd12F7LJOMH?4Z6>gVa#eaHQ+pB|j^`tkftvRrbZI<|_)Nc;jd-Jkq*j?%6z1n?v
z?U!9^7giM>m})0ou=F}e>*2LuZYF5&&B<ILCzH2SJePOtrPF#c32}R7=67HIyXXer
z21SRhTXoBtx0<>Lt;%|7l<-w!-BR}Kj`Y&ISI*5B@4s=StU<=^?j&<fxwQ*(9M+#=
z`?4y>VEw7K&#Q7QAQXuAVb!7?Hh1rzyRYZ}{pphGKb9G{PqXFe%Wv5GDe^^${Q(`r
z-c)C^Y5Z3r%sy-hdCP0A8(MwX*ZXH{>55EEY3Zz}Q^(k5PTSt?RJUAi#mcwqBr>XU
zo=-phA^HE}3zu|7@0G1St|(gL9HhHC`TMH<kCzK>WBS##Pwr-+blNNy+h1wrg}d&r
z*`Boff)mfn$s3+*s1Dy$S^Y6>`~5qhv7e_;8EW5{{!04y>{RyWz?w~VYa(+a_D*V+
zzxKwPC;RFPgTuRSpIgs<>qPn9`Ssgx?Y}eU-SgW|^CEdZ+<0RaY5nu_#o24*&3@hR
zy>@;}?HjSz?04+Sy0>mlm*0D^vCS|d@$OD-zBgaj-%qWoJj+*Ho2#bnul{YlySLc`
ztF%?$*d?-D+jT{vI94yddw9~tOQFYiw5ztyt-S7Y{f~;%+Ke@iSJ$sp(2>-=d#fbO
z-pAn5%Qf}6sydR|v44L{B%X|T`6@n?%X?Ox^s^6~uj3DKdb@c?{15U7Fo@dq&3${8
zYx~~cOIkPl`M7XF!j_b$=XqFJlU1|pm{y0GL>+n<lJ`$@t>6US<wc+S(`0QT{|fs$
z9!#8E>Xz4`KmXmV@aoOKZs^|QyZgxX?b%n#<~w-r%i5P!I}6KXa7a&Y;QrtG%=I((
zS+kh<iT}-wc<-IuzGsqs$ujXr6EgBcTpj=HJ-@K{Zd*+1L64nn=X*9ScscW<!wo63
zn{^-h&n!B5tLpy?U%s!Uo3e^t^q;x;Kz`=th4x12@xPQe&)A*k5PaQNaINUA@GTN1
zlfT;SS@rtjB;Fl;Gqc_*Z`SQ<{~##vZU3p6lP+HR3Zeq*whNvPs<rC>p}aXEeD=A=
ze^2O~xVr3fg}o7X{MY@vW=-07iPz3(HjG-ve(JEgOihZJ>S9%ynv`p-i<d_KK9SSS
z_j|G%cjEigbMz#1Bf*sR%@4|(b)|G47HIW<Q{MbQ%<t*Nx|DN=`p@iou;HYYviTGD
zw2jZM-dkf=*3DeIa7~oV59MOB5AM%$K%Nr+cVf;@`I%2sFJlJNLHD#+f%^BwFJhYe
z&+JNA5_35Hm|;!Iy-YJD@9YKrXYwX*efs_4>^19u^xsXf&9X1+-n!xM3tm3I!WD@;
zVa(|vS5JwH90}hSmJxq3>4Ha?{%6O75hqub+G%7&J?EddZpwmtPj}Busxs4C6x3KX
zz1{Z;XO^=~mi5`I(|;e&+c+=y%L(0U#)sv09^55T^@J_EGO_>eJp<<(FaDV=ToxwM
zpPc(*-=fe3t?RuUIJ}RY3VSNwqWV$)3j6tMDVMKwxmoS9nyIEEseSuaOy0?*mKEEq
zrmE>kYDUlX6rR>IWv$;5PVZTA%lPK4Kew3E``D@Q<ri64lT))dXJom4%-`02K0Hm1
zg*Ex9mN0)))5IcEO_QyQHh$uLURca__F*xIW;(mD`07t%$AcC-SJ~$NEB*8J=|SVE
zv-kXYU1-GHA!p@(*yTwQ?;lOeS^vI*5)v;cA^D%2$g{yczo4MYnK${cRf2F^Q`3*#
zYoTFe_G8MOS%xJ)QvN=F+&5)m^YYiVUST(TE;f{XaIrO9Hc66y)(YV(ZGWcd94gD*
zS^q|i{TJWMwa=XEZcf#HwSkxKx29#;p%aTuZoK%n)&Jx+4Y}jDF4VfNcHoZx|9Q5i
zq;@ozdaN$BQSRFFPZjp6+(lb=+T8L#*%Y0t*Z(be(}&>yk5_3*YTkYjya`5SR?V=g
z*mrPwO0ZGbzJtr3^a)Gy&CPuqyh&H;@pEp+bH7=Zb00f(6-2q6GW|0pr~B9`^Et<p
z|4z|a(fYY!&HPDk19?E9^lSd4tB_Fox^KfOSSTG$soQyz|Bq&*X=HW%FIYg`@ISfe
zsH45=X*Txd7FP`1t}|M$dUriETA+UWRj#+%Q9M#7tL9J2J?L@L>VDYQ)IYZ84+@uF
z>D(uy9r(SsUALlqnd|eLiE<3jShha2Q$79c)#<;<+bu4Xd*qwSzdOAyF0ehf;DrCl
zO?wmDHWUgL$R9gXTC+F%@K@2F_1wYVi(NyFg0`I#p1D&_`|_<FeP4{H#OVJ?lzqRV
zYX0q2lML%71Qu^QR=#Ea?JF5o`tRm0`ndN?$dftZ-?t^KiJ1$cmc;z!5AeGf@w4r7
z#T@wsB3ldO`ad&IDGJo*J+Ild|GZVrzC5Y8P@}MIU@GYCi{(?ST$N>G^_OnZ0w-Fz
zOs|!nE}QRudhL5m;HSJ*H_jb9`fb~>uxUM$*G@0W;GPwCK;9<W{OD1!J=WnV^JSI7
zk3NmAlsU8@lWEn-Tf0BH=NGMbe>!yX;boj1V(h-c6CgRWXB}%%$X)&C+Z5J?M=h*%
z?RHd-)b~9g)-z?zWVHqQk2@3C{jdDYTc&^9>q@BRwgsL`W$f;r{yJOw_nU~RM_NxE
zyu5eq#ZXn{rMu@||M6<kkH?P>3h!Ghe9g6eZ%k+jo6qNoXRkiJmAu^|psz!CYxb`X
z6Q%Fyh3&pO`{~n~$#19M3%-(UZewy;@pE@d^=<tto0)xY9c$J9vEZS|(W&LqyVhsi
z&3^cLAImzgW2dgwa>h(OviQfr&0p;^EI@(tzS#{FWLtOIT;i8H<$t$i@2Zp~IeVWR
z0aHu%u1e|g%*oQpu5q8eWx3mB@3Nw<W79<zpRhdX2acH(^=N~jb#<5K1)GHJduSt<
zeret!v2%|L)!u4~f3<h&`K-cf+QE3)**<Z>#7u{hJvN8WdoA{@oA~6;6Y*$)|0jwR
zVtB<18%`fMslVvtt?t{PFkaKS>g2-7@ofKgvfg~~K%`yjSld>GA3Ir*lPcRu{l|ZI
zvRY2adn5PyJ^u;EFP&zm&K*{NwOZsevlOq^(+@A%PBJZ1(F@_5mp9{2l9!v;_Gy2T
zx*x4y%s;O{_vcYD*>6Rm7bQ)8x}JD9E2jF582c&Zf<<M%@^(ed@ftr<AKcHJcuw3d
z)~2jFUhU`8)BhZLK3!HwJRo)y5vb}sGbU}^^i`P6$J3@u-sZN!&!b|!B_+*I#Dk5(
zwt>olC*lv6*I9LdGQPskqf>gO<WBgL<aKN&kJ7PC$I6eK)K4;LUcwk{a;*P!)12uh
z3qaZ4Tj~O<@>40b{WrkH<Hv}}@hqUkZu--8$BO@gNo!8(CkZewQ}*ThSm)*v-!~=w
zM`Y%alllkyrEfO<aG%EfFl)z?-v=khyG-6HzP<n6lYmI!(8<o~`=5Ytv-<ug@m4=o
z`6tJhIR3dCroCl-hGB+^w95V$O%o@5ofQ8h)uv3|CeXk9)ai{vUqid}GJ-VQ{mnhZ
z3{(pj7JVo=4DwyjuB}hRqebdvYd^GPpVZ&>V#D;+UFQ~@)ORYo{sf#><r<-B^^em@
z{h%)1(<L{ah%0{GA8?+}BvV>^U(}~=-7f9-W+m|#cU?bp-Cx2$H97S)C`2nn>?^h<
ze(KhhdijFwr2ev$H96VEm0M2gAM*cOA`om8w9WBTH#|g*C0%+_d*63Vjz5yY=E=M*
zqep%^tEGOXgLu!>)u0e{J7wxqx6w8Esr0$W8`bu6WIeQz%l_0|5cpsDNW|p$BMNLj
z?z2QD{XVJxsb~o(c`EzWojm+RJQkWdr=P6*@I?G#%G;xF7n@s#Tywel<ibh)$qOgP
zt2L|d_t{tS>9mSZ-9^@q<<V;|>|1nn!Ni;ie-?4Od0q3an>hXBjoJ?`ws$o_nLk`}
z7bNp5L>`y|&iK5O<9$wgyu3CkJ}2-`>6e4T>s0sOSadjUot9Oz+Wsl9d@tvC_0fTo
z`btY`CW`QC9&Jmt%K6ki;aB{MboN<Wdb#64$$1bZ%b7or!*XWJN&Q_4|0X_l*s*Tg
z`tP&<9IY#~-GAr2{<YhOR4@LLJ?I|YJmK22mmAKe9yXiKfBR0#jc3aao0&^*+qpS$
zwzd4aop--JE$H2QFE{M)*0M;R8#hj$&9aTj&My;Z)|+;EcB)}P@$cI|S3hmYeJ8g1
zYs1;KpA?&8UzRd&`<Av(wrE?-xqP;qwIzEPQ=31uG|ryfXPz+o&_}kMbtQWkqqSx8
z4_s?`%zGo|Wd-w=G`T%4tMxyf{Z~@|$>slFKf6pz4!$RbuRk3=zWegu!`)Y3hkST)
z@3QYySu>B|n+0n&B}TCJ|6gihe^>w6(eJaLo)mtr^iOj4Rpot)I9GOFxl|qXaq{kv
ztzrI`tBzdTwp-Ec)0O95&(4V!7k(&q6_CtZm(qN0>YMJfQ}4{xe)j0W^DYIWJ25BO
z=W72HpRFxizHUZ$^L*{569vVoMlWJ!@|c9D?2uNekK49o#`Rqv1f^HMeOz;9TbA+1
zjZ&xCr1b@NuuJO;Zf}>;zj!U-@l<}ZIHd|cvpA(PKGV2GYY!gFHo8&K$zXP)qVtF8
zm5R=7ZIbJET@%dS_<N78{-dbnycfe&N?*ww{q@vNy>H^;50&44ruE3Q&fl@?&j-tW
z8q?3!{+!RaiPI;T`HAO@Wo#AoxwEWf*R4$2U1fRG{@*!=?R#q;eB0D`+gf&&ZRM)~
zgQ|Xu*p%Xf4{Xbd58eO~7i|5C9d#-KWAwirEvwrZbGPHV@#o3vTNg3k4|?=b(oLqy
zH;!+?%iC_HaUEOkMO}1UzI1vH*Uzb;I+fM>DO(K{zOTQ2@6V^H_n$njSatqlFvH;j
z8K;s88CyqFp5uxpbB<rUy!>#1jDyhi>+-CL;F)(lyK`S39-r*=Y^uxkCNrTY@4n8G
z$$497$+zWCM4$6oTfO6r)8tPVuGo6~sl|m)$(D5sx4Lh6zs~mCuFSWYt=~*_?PgE^
z{5Pv`tIPw#{GVl&!Ec_{^G`68<5`?l17903&xX_c(fZX<2WwrKZ~B#oF5YdGv+G<;
zl<lu0y!XrXw*B6DgK7DHix=wi8*YEis{OR&&-!v>-z>3BQSwaMhDOsr-~Fd3YF(Lk
zVp^PTd*<`M>zxg&{=YVO%VX-&{dV0Bi6u+FD*Z6}>G3v)efGWWr;oqic|xfA<Ke^W
zKhLlKx8ho4@zs)B0mjSLXGC^wSR>(8b~EJS>9qC}{ue5C^G-=IF8Y)c_%=sw@7xm=
zy6diH=&qZ6sLr@=ea4ccGjZ8z>u1Yl@y(nap<}xD)A^6Rch7CI&d8g6x6a&Sg`V`P
zT93*(X=bnADqq@IZ}a!1bLHp5&;6%9-Slhud3&2bOP+OHIsCgDv~o$^A3WB0e0RK`
z+&jDd`~QcWTRH#Tz5U{>zwY0^|NqCw_Wt_LN%j9~_W%F;_;3FA`S1Vl`Tb@4vcUZj
z_1mXwDwJvEZd?62bYs=-oH?4lCG*eEn|p4V@%CAt(;Z%4{gmM0dwyA@)JkTlRnODU
ze}101=G61)&Wcm*XYcrT&F@vhu~#=Ye?D0$r2F$giNcn1ew#1b<ZjiNe~z#1iq7fF
zVcb78Dh#&Fdmed9L}$JVUu#I2ovm*)^XcQ$oE4|0Z@z4@epjsAnV^ZjYLVX$>G9Xy
zjMoo)UAr;<?i;R;6Sqvfbyd3X55u{f(#=|0VL$i(H*V&%wXU8wS6%27U(<!3FTZ@*
zQhm3&a&v~F!vC$j^;ecvE)sH=ntHcnm$~g%m#KTK|L)ck?04$zt-pBh^tn&zceMi#
zn5+&y>vr07b@AC_r%cxupFMu6H0ZgNr1tg9xvxvs#H5$5+q|*Jc6G6>wD$GSR@Xmo
zEUFEA{wrrq%>3&+?c}wuTV0)KboMouq5Nv6Gp`TN>Mx6daiC(vQavr#CmPMYBKjz0
z4Od}Mc*o?8T1Px<x%}O%+h21P8ilo5tkgboGD7sxl63;=$)O#ScR9`J303rag-vqe
z1mmD(mv=eM=?hi#d(Bm771nC8R{O}y2+>Dd-mSZQ@mF@NqTlgV0?SKVEo4_a&ABG}
zsALUSVN`g><&9cLGEpRZbPg-0TCLVTax+5o(VBGv>B*rTn|C?Q=?zsp_lm2~EUeXH
zwZ8A>i|c$#TP>tlJI%Q&`Y2}&S7BIq$L5V%M<Qbt&mCJOkPeaT(eYJItqKe80GX0r
z+FD^2)>?tejSv?~zA9KMX&5FNC@z?MRiKp9P>OZqDSiL%yHBtF8@^BWhmLjqzctn3
zyB2MpQUA9@?ffM-b?c6cGv_>eKH0^J-N35S^6oDF<u~4(`~F>5<W&7~gBPC{H0#*c
z+f~misA;xhe;weLe`5Z8TYpLU$`{ubPMGC$Zhrai36_#?10tSo-rSNbQ`UX;S4q8Q
zo%gfVaZ>aAmq-3vGrM0<plkY%t&1nk_<ZKowEDltJ*TWmpWMP~c<NSV)z^snul*Zz
zuAM7hbNtup`WdMk%jRX+UW@;moU4_6P|LcbbXAB!`VA}9I$7&&eltHgM=U>=c0TRy
zVu@7QHNn%qGOh{cxpvShHB$b7)zJi)Q0AKQ*;ilwtJ*4@ufOkE>8qPJzr4|zdA@4<
zuU|i>G;OcGJGG|lQRnOI=f;&`emh<4cCVjz_RW_&*7iFm`j$!DD=wR-D)VI351FR#
zbA0`T``o70@Exj7J3mi-PW;**HGl6F&wI+bTyg*2Jvp!})A`8$-^bJX<?`S6|M~Lo
z`raSsU*7xUQTp@w(b?kq{`0Qn{p^1*?b;2!+%1o~%cIuo`z|~0znoJx*XpT!IlukB
z|E9A!9@g!RdTs9P?^C$)_W#3T+b93GijzFMOjCby_M4+GryBmcx$(n!sUPX?hwSqo
z%$Mi<@5%iC<irp2%|6VR<NP1V{Qu^}5BAv)>dRFAoR|IqQjpI3XTB`w|L44aKs>fz
z#}CHMIU~7vzI^8|(dDIXKjlyVFkf;1kH?ku7FUf={Rh!6q4ZxUEocG}SB27+P}&zv
z=Li3==lk~P%0-F4Cnv6mFBHn0@*hN7Wls6O@yvg=uhy1AU$y-Vdq3HOXfr5n4W%8R
zv@4YM0@Jre{`EEQwFoqItFKad6+UN^)YEzpy$4DklX_aO^Y8wGy5;VR>W;2l8~6`I
zd#;1fFQIhjdI(>01DKvY?f>HheZTJBi}PhWe~GG}aQg`kg;Nk({VbTy6{vS#^jB)h
z{fQd;*&ddw>{{>mO}6t@wm_}>!k^2M)?ZKBcsKsfhYzp+JfCmRcGp03_P$sD>p1=v
z{(EzC%kPveQS~XZe<#XD)<2Q`J5fHg{!Gt)mtRR~HBT4(dibZr=<M$8V%L8;zL}Ks
zhGS#sr-~{keaVmWF1$Wk_@yOI=aKEg@UF)%Iz6NPefn0aFUz$xv|TnY<8_DftM+ZK
zk7iu!*rxhuMp(x-)<-k0wMTl}pXpm6e=h3R!#5qj9`0Exf3AOp{JgDS4sTX|)&5-f
z?}tAbzaE~kY1CiW9A{yC{{FLgzJ>gs(wB1{kGlTLA^W6<e1>WzOYMTvlqLLIx@?;4
zE=U<&Vvlm{+sA+IZPf>>7tO`H<zCcVw%E;hy1C`?;_TXld&gX@4({o;Zi_QGowP*!
z%&rQSy$NE+JoINw{m4;uP^WidoI&<u!7oj9JNmvh)ortDi@VT&ZDZU8|7*uDaQ`}J
zb&dPi&R-H$j`m^4s~qh^<(>6kw7-hbf06zw`337=582nOe_d*M_FlNd>3*60(Ur|@
zegf?CWxe%H{8<bC+}!xZX>*-e`vQ=_>-0jATMz;EMNk19s6hK-sDKMpfPE=cAO<8*
ztS;j#-%)&7%F0n@Zkf*B3v1>dWz0H$iTmu_0+ZScI@0~_re@v89$)M^JLzMENb=?c
z8@atVbj17Jb<MhuCSUA2zbdBn?mxvBZRw%An*JVle$n~)v(Cfi2HCcWOM}*^uZgf~
zo44US|HgS6`UQ?(5Dv3ER&}WB_{Z-@ip%GI`2BF_ZZ8=xeH-hu=ZY)VKP@ir<)}Uw
zsd(%j_qksJ-<mdC_3Ra&vsLj8YkI0gr2ZZL&(ixWeIC5YG4hVM{_gwDg^%rjFk1W&
zJi$Nrz>^D{KKyeJyt%+RN7kzGv$Oh#Hy1c<><gIM<=8$shYS5&sNMPJ!SV|WwL6`U
z+uIiWX<ygO7t1EQi_5A+uw;VN3YV<-_P_mq{pG!^mj9lt{{G*;`jz|t=YQPydcXZ0
z`#XQ%nEd|oonPLbTk7=dt5ubob^PMv)`v}hy?T}Nk^OmP&wp3*=Q|&L+ZR^&`|hLM
zqO;5Q-~Ib7`KIE+*2$muf6SfpH6i(0b8jZUnVRj56V)3geoc66a@Q@Od}nKRT8Mst
zC}*64_NF}tA|6yUZaw&cDZBY0>ovB++-rE-#3Q76^f#DE#3kek>~Xlxy63=_e~&)B
z3jO*2XxZ0KZI`;^YMuD2zH;t;ewDrI+%^4m;zz+v@-y9{nM$o{8hZt1EGThFXu2-m
zU1?}P^FxA%bfvsm)q_d4?++f^ESDn?_HGvMp;NJ&9V2#Tn{jBDpJhA$a0>6d<12UG
zJ1+A&ab3FYgBOXbz8hSwp7Fx=%xAe}mHeCcw0qt=EOWkkhJ>xpN4d0$dx!s=sh+W*
zlHb_mePY)$+cOvU^m}rh30nT{_Rr9j5kcDfzPzug+}v@0yVckHJ@@A?yZ2(Q?X{}p
zT_;OsSALp%Z}y^V*2_<pS3Nh_cCT_;&GPB;cdMRneqz0M&dP1plXn~Y%bl^QH2D1G
z+GKX)pU0j!`pbQOqUbO8@d;zTME+)xwcFOmKauYGcF~km(e=6ti%{%j0lN}krwbQM
zITt!zUt;rr#;PxNi)`M`SoI}tk<INHt6ChgRxy1vUgH&zwoJ=$;>q&$)gNzV#-I2;
z@x)!;)gFiM@^%LwzRQ~(cla)^cP5BcdH61`;i8A{+HO3)yEXpak~>>^?>*Tz+fn)X
zow)`@=k9W1W!yC?`nGP{#Nxax`JJ!-{@H!?-_vI$_V?d~{ok6CWm)uJx2T@&)_JQp
z`Tx=l>v!sly?(L(RC>eTr&m}1{pI`c-orm{|NJ!hBxq7>*OVqJ?`Zxn==--%MtoK(
znpS^{>VCf6l&!aOFJGv@-M+AnZ5J*TPX9dn^518--+#aT{+5+zO}N1JY2{tg!pY6a
zGOfW&4hfnsD&S)9n|9Ay@{aW}3oiAQ<t#F5%6mSBSjgMmoBK{aZcW_wg@%)_WOSEg
z2Hrf*FjbeafuS($COboF20!DY)tmYm4^?qoSTOaki$hZRwWl@P>oX2-p2@D?oTIyS
zwRYdpdo2!?TaPsEi7Go(vDL+4!Y<{d<_FGI{MY7t{CE9ajeGyQ8W((NTQQY^<yHUD
zvhbJ#0V!+sG(M>@oT>^u;Bd++*5Fh$gFy78`=_E}9iI3yOxb>0TEZi8Ik#ISH%pQ;
z!^W3v8yOw$=zY|Ty7rPO@ZKb@M^$lJcZ2qAKPX_nvRa6_du!K%h%?(y|9tdYPvM&x
zOZU2#gBS0c?s||g-#+HHz?`>NYp(C=@i6(N$I-K<Inh&Evsk)~O@3wWEsvSE4J<x*
zOg*@;v{Kl7Wwn69A~&lpoukW*uPmP$%Hlf9Kb>X%wrz$Mn#QWiKelY;J?Q!ICC~TF
zWXZ#m%z}3KN8gs1vt{C;+FQ5W9;o~%Y5TQh)2u!v|Bo+azGkM1I!=6c+4A7>wYfZg
zr+iLw+U4dt7X;N<9k0C=acskqUXgc~ubHu_=PoIjzipeK1*hHI#dd4gEL%Kd$&W8A
zF#W<!U`wXVG*X1w&-w21F{3tBh(1G$Oy$<!TekKd@ci(S^VQ{3SxQ`Ab<2OoZj8Sx
zvN}vB?fdb}%I*6s1w$@yu=v)kxl^aU?}lol@b~=v&SDFqtS$C29S#rpxUx*4=6d(l
zs{LL~YI(7Z8>UpsT>SdTNOJNXare-$!-Z=n2d>qeu_ymhW=GWZj|?r*Yrkxby*Q=$
z)jf}fEB}(Ny;e(j%QgAKt{WvycSUCZO{z5gU$;MYpWlyDTG>;lrp(>M^<k&!Jq706
z@9sAQbU&Dy-BaiZGvzJQTVK9c&9dS0@9EbM#!W6cu$y;bce!+&{Asty86V^B<yPF)
zk#047zi<D}JNs{(TR+{wyxVIN-^%F_O*fd-N;h6tVX4?&H}Tfmr)vxHwLTjxI#Q>d
z-@4m-Cc8lD43_gALU%G*n%KMw_FBtK-4SPPv9E+v@8d(EJK5}qrt2Lvj%kwqY_Z6N
zQ_par(4H)&<5N`*s%rUw1eHRXW@i~*lxlAAD9E<<Y&xBn<n_VKY;J<<1BcM0ZHnF>
zs+xJWWHKId<!0-uYBq?9XyV?n=iXAU4^eNw{Ciqz5Zc7Pb+YP?Zi#6RHiG@rrdqKk
zP{LT}AZyAhmVT3yjC1ZC58;%{6k?hKbqUDzhgEkN&hL8h_S3Q(r~l_&&wRvJ9IYjD
z+>CE|EKj6GgHTb9`XRw~InImKx7t)4K0KD+|EK7C;s4YA@9Xb&|DW@&cj~9}-RAmn
z$1dJn=8zF7Z8EuF9e=))(Ydv?0{(pu7|nDeek;u5Y+}Eml<-!$;uMFX+@$FFC9yuA
z>R#+HST89N#pdjsJ|&Z_ZQ9`r7fz<mYFy}>knzIC`0Ns=+k57`5AR-`YHd(Bdx!R4
z#gm3}xR&mSd-L_Ba_oA|In7>r>#t3Jsjqp+?b1fk-{O@kZ*E&X{qyPYN7L(PUA&p7
zlRb56iR=mU?6-l9%XEL)1sn+mGhLbGH6Cr>`fY{7<wGs}A|D?`Rf{b6z@mEI@79%;
z=c<)Km(o;hWKR}PG!uLn=`pYA#-H0y^gozxT9YEfI=3~hI%L7g;){%3e(vjSwJtpI
ze97SYeCc&L(Tq=TN*WdkU&-!g5}CK)$xYAMvp(!m@%Osb)3RK-Qty(Qk`4FCV1vqk
zYd@X7{P*3bRlmKb@7TPja4OFVqu!*<`r4pG&-(hHnQj{u;wP^1+PGe?)L>=&1ex7)
z@AsEnH`ph)b@Pjsoio(WEj=nT*ZYu3mujw_?z0y$Ldybme#8h(O<Ekl-h5Uy(;OuH
zX6Kb7i)7QL?a@npv1^I%;)tMUlMXPQRn3(;%5+XOR@02D)ZjpjQCaY_NiU@C#bhO3
z<TNgfJ$0efbGF;YC1+I&VlRP>&HD7hN+L&3b-nkZ>>I@^J6)yEyv^3!bYy2>u0ih%
z?f3fm?R9ex<TANWRk_Hk^<a(Pc21Gd-_Lh4h!nXkz0A~+S!lc8g>Axx;7y!NIw>rT
z!ohphI5te0x7I}Gfl1hUPNp?W+_iYQEnZ&DZeqyhI>6*N@#`#w1G5-6G?a743A03`
zGw3{++H{?T@tP$=_lB&KY8)HBeeV9c%`}bu2FJnWS?nwtpDZS{ids6~%x-Srj*Ofb
zuleDY!h>7)&&BI5^iy7w66ze%67XFxtbdiFz{AsLSB3hu?{$}my2#S8>dK4@GlY_M
zW-z(4_9`bX>r`_HSzkU|w1LaA=T0t@%hu>M*DeSMmGtK{H*ib29Fo$$?NAuI{hcpI
z0OS5c4@?@IZgsftPw_diUVMk|gB1%tE<Uq*6Q{t{*+0d&@3sg|$rUJYyz3g_nJTTZ
z?k?+<*p>+zvknA0&UF=7x2V%4<ecMkS;>&=PkW!%UeGkzS1L2fFVov0_1%%im9toK
z=BjUq$ho1Yv(=2_hE;#^#v2=iBeQZJ+{l~!`|O?0<X}_I8<T#Yz2kYn?e+HVD|yD|
zhfajJ%0y(%pDA6Kutn~*%{tG=hxl^1-aK9rbbR8TECKP}C#KDNQUt<#ZXYSU^8Mh3
z6kD0lR~D1P4Ie2@+tW62y1^x`Yqer)n_6YvUq>HTT*}qcqh*jI&63k;th1Pl=QbN-
z^dptiE0_*%YfSe3dIl<a@~_($zuRm*x}gavE{%y%2O5`tlMGClA(oKP$)voPlP6c+
zeX3R8lhEcJ87k`~pQtwPNK)bI=}|M-Qj2DP2J2;eAN6e|rpiK*nxEV%<CPS$C7m~A
z)CR{X3Vu)Y5Yy&4`Bjg%a|ge3(Oz%YO|Ngw4F6p!9J=)Fao;PlFFDL!>waU_-sQ*6
zR_JZjA^XSMWmynAPo=*S-%r!z`j2VbBkylZ6fAbWm!0Q3M{Zp$$EBx>LR+J4KG|{j
zL^3;HvWwMLIgs47wMXgZ{*1XsdJ=`|T+2=R6?eszsAp<9TtD#XnMC`;Ep-uP50|KC
zSshEXSZk%!@Zd^Us-@e9C962D7o~4o_EO=&OEaJAZxSwbe#yGIN?pgRGG56oThgg$
zw<nWQUUR{nW&h-6?674Hd(pGON&2_Ik|Uy4&fyuElFpO1Ii<hg($!t;Arzj$$QHA(
zw~{CD71!K@+FQ){4tqu|WR=Njy>=|o;sw{*?4#GVa>%8$noXM=mT}SXjOeabPxVVM
zqntoSJ>b%Pv+U4~HGbc(uZ}(Ra`B^U*#}N*oi>=3r>~uVmr*Y)vTdV-Uf9(x-!mNZ
zQpAgO%6HFrA=_8K_413Bo%hyWT6URluHPl29@R{%*u|GUquMq;xa@hYtJj%@-)!!b
zr%PUzoV8Ti*6c2RZteuW%+D+L2+s*RWx=DK>D6g{Fmh?n;erQ|OS6u;DL1jt3cXcy
zX^qhLqUWK;ll_+LUQ;XM`)yY1?r7)bOGDQtY$#&VQSjWE#o9deMYHvTGnLtrE=}M0
zC$!~DGde!>+tKZRM@r}nW9wCu@3-%6*t@>b$@+v&Y*E^bCnnPpb=Df6N;s&pd?QaX
zqxz(kqSEagatTI}r!_BYCVQPTlbUM~teW2D>6a{dY?8@bgOiy$ha*0`yrOYcsba&+
zDSDR1>z?F1zSwFUS=5!RW^gjI=WxNKWg<G3y@e8dHmhf~MzQdltY$c=Y29JHe%8zq
zC05mRw+VB0iSmf4S&HiT6uk;Fi0HKA@bXIqJ6g>$R9Qje4yW{&C|=HI4J#)ZCwreu
z<H}Xo{`qz7CI9qJ>y7izuF6^7G;yWl=hMFFLLb-d*|>+_OX=I%#}jr<?%>rj=-hFQ
zjWIf1Z06Cnr4z5-Qb>61qq6zN2A@q)(iYp^y|HfQ_1V9AtK)%bck&b1;@0v?M3)O~
zY-3XsY}b8oAm}%bj}l*WLu09$V0KJ|P+<aQ{wqO~>e<nux<2uVYR`tI&a=LnOpjG}
z@ZQ?q=j<gc!6fRLV38}ZLG`RbXRp!GIc6L;CaKLl;x;qYPugOe$$60*9_wCi0lP)z
zeaWqcjY~OurhhPdv4Is-7ENSvyUN6)<C(C>WxFH$x5AK>k3Hf{JG$LI&2o%0>d<zZ
zbfBU$ubB^8NOcK{Z+v3fv!`WZ*oJqx7r4Z>L7X8f@xkmx6u2bfxyKfp-Q1vCIO*W+
z1=+a|ZUos1LxpzU@3_~Q*Szl4QZAkn>5>~vd^%gtcQ7&EVT%p*7Lj;h_TqqDpH`{N
z$<=Iy7d_&PPk6Hx9`!(xkSG-Njyrt9TOyJ5ciH4`Y>%TaN%JJjwog$rV9}a%px~B5
zg7>UMA?egEOHi2j8g=#>ot|S>kdrx2bHl`#%bCp$x;yWC+<Uo&G1*&K;=a)Rgb;9?
z^r#rD5=%(9eKc!(_2xZure`nu;rP(6!H@L;d&g|4BOjNs1Tjt)@K_5f689*tFFN9?
zSJ|tqUwA}R&r_h*yZUj`TSz(nN=W?fZQU2k{8%T={>A&KBKWzirON~*ms`?{@;&oA
zdP-%2Ry8Q^Q!D~G^$W)%X{F`7Oxuoly45&8+0vNo9qZYV-vN%r-@Py9ZZUUR6t}8j
z@m|GM(1QEG#CrmrSt}Y&S1{@22ppd+_QNxO%Ni`s3Oq3JUPk0^i&a+&Ro3r1;wmm$
zAnAXg70F5SG#(U9Y6!ko=&_PXZ#kC*r~+B!{v?Dk{kB4a_nZ{V&;vKk3UXFzd-{nM
zY~y9x_M}d^YI!d6v1wWliWW5(Ljq3Yfe*KVLCArpHjLtC9glsv|5*AS$oy@w>Pn@1
z+|!Qkm`_sfagRE*V-_`>&SdhteLQe!pK|3@RlQv+8ctV2JYn_zgkqD3qFN_Yo|90)
zDJwqB&;!0Jn9gl;JTUErpzx}O&7j!y+r$ZT(a9FA2cVh{QMn!P?O-~$rGeS|tue@H
z2Mz=<nm^>+vB6O$KkC8!3oLWC^)L3CTmB@pZ^sGM^@UGV`*s{s<=VmN3vnwvjD+Vk
za7!Qgxa^#DQAdN43uqT}a9{g0bEQXTqx@VxeR+KMF#rC$GpmkXt=oJ{=R0Ju=$-gJ
z>%YGz@88PEcW%j!e5<xYv%VTyi9g*dZ~v$6`^V4m>bEz24L|+#*^`&c&&$7;|5y0w
z$>-zt@8<28CTy8%=qGvV<<8?TKL$QGykgn)>*j$K>V{W@MZW$#uwuF4m0*#tHxH~x
zH@spj@--*nO1j~dbd6Up53D$!yyAS|mC47QVnwEZdLHEW{q6FHJKUu@t)@SkWBkBF
zdAsa<uQ&euQErWFGLxQeV|F^Nd7+_s)15MbjP0MdpT7L}m+xvj-h-W9*%dyy!5aH|
z+W2K7Zi{s3FMsIle%)+ppZ~uqwig>7xmyLaZ++Wv!J$3$!iGXPOL6O4g$o*dvjb(W
zWpW*Dw_0<ooloarVyNnsL{qzxlEC&_<NIPymEzt+sn0v0@;<~|jcHYmbAlMBeFcc;
zl;9%Db0%*#hugi5M$Od;30)xupWJwS7@KZxTOTUcy@$VPlW*MIFMn5V4!_%x=$QWg
z+inw$`wJcRH7AH<8XU<L=wWJ{sH(3cxo3mMZGjnAT2-6H#Zsl2C-2yh^5M{;oa6){
z@o7A95mRzGd>$Q|w2-@dOOK-G+`SOFNj6r@;$n&7O%u0mNO^Eb2~-is&Utq~ZqLoP
z=G$+B_W!M2<;A3x-NAMB@5&QdzJUhsriGvOW?8b*!ExoQWrxo^Sa)VctfYzS!5Md^
zvZ>sgnwZ>akT2f)=jw@fTUYN1w%fimX_XFhz_#6sUROFNYrglfZ@zChm*d%S`?{Y?
zxBU8CxADe1{pY*CP2PTb_NnSi^=peo9k%zn)a|sEe6l)K+@+A6{o!g=_IM}xqTLg2
zHovcb%k(4bF!PUp;d1-l>D5e?yD(dz=vTqTuZzDv_5CHs=9SslShP1IHtAIK6Iq^?
z)LOQExrdrIKh?9?B*=DR``cT)_qg6W=n!!&{o(DBM~`<FN6v42Uv~4U#wR|ueVgnA
z@26d#Dk`{bd6vtp&8B9L)MF2MDb9B(nEiFz*3U{WT&9*)oXXJuQ5JhTfn~v(%Y6Z}
zRh>=ZgO5I$F+Ih9-k#Zip1-{RHTCP)FZnCQQkuH{?Kajwx<^y*y?C$xrFcPWQ`L7L
z4(Gl(uMsn`I_W{#(m5;zjrvTAcjj<~tIU<y5xY~3G3EiYBZv9oL!vj;*z&?Bc`}Iq
zh!Z&E`>$1s|J`}}dXdZavuFK`7dyZgaBZc{f;}%v8qeCC$ozf$?&1FT^=H$TN=k|>
zIXTVrfU>?tO5!WmH|H&iUh^<jPB%AEKEL8bW}MEfjdh9>$}QcDKh5cy^X$SR$=6Cu
zmDBr8l;;Obyj&A)qC9Dn&Zl)LYto(sYZYypefo$__a1G<)sjDZI&98_^!$}%*DKnr
z^I_ebHE9phT^=NEN_unNqF~~@)W-6qsiw^K>P-BfMU(4~HQE<9+AA~HyRpbE(>eC9
zhq?Y8Q@tPCzd0N>XQDvH%&YupyqNt$kCdY%<CXpeJpx|63%>}=sx&lN%zm*)%JrqA
z$>&8GZv2ZSE&DEQtS&TJ%zmjy%G0y)%cJ)8_|&&S#?PaSW*dc=&8`Zwn$5JSW}ei~
z9AEXaj-{@%dbXKv=8I6evNR#<ipfll%(PqA&MZpk47lF9Qt*0;(vr+wJId~7>a4rC
za_5e1lZy&{=k=whSxtK;lsWx?XLjYyrkORW39q(T8(-#Q^7%A#6RYt_uLD<JmZmKe
zXPNOtI+a`P&Xk6g8=sxA+2q)eY4;)OmqXf|2c~aW)@!R*_?9&lzh+rKS#rPK%nQd}
zls;u$e=@EhZ!d$BkIa%&ym6E7KDe`svB^T+cH%VO2>S}(Z_UN8*#(j=EzY>vA{ecj
zwCa+T`Fb6LBTLdRY~uX9X_1RhZD?U$TxddvC;$9Z;b*$8oil#*J-V}J@d1I!^Q=y*
zoq63UWcc;zk)4&6jf!fv+0%Syd>2wpdKKMS{5g!t*(X?a{abF3lF}nPD`guMmz|t+
z{pxHEL8lji=l8T9aF~2}p7eK##(trnMOjZazn5dlsCr|ZFQ;%p()7p8>3mEkwtr@Z
z^GRf6{n?x^&5}{YV)9<f;KCJw8J30yi`ftM2(cPxiJX~ZFyrFm1UJqWNmGF|Kb12t
z78)!*;&iLsoADNBo20E&+LQv1-)Wi-)*lTPvmfaZ63m>heOj$ZUFq4Ejv2v9N^iZF
zGQ4#;GDl9Z*vn-}?Glj%ciSDST+V0;PLvWTR#$lTrC~-elai_2Ge4U%FFzVAKjNHa
zab|A8jLU};{W#mNWX!O>Xt3P<@EjrDl?M&Vn-cx_+bmTjf|3*89XT{dj=R`PXGz<k
zJDjbSwj$4_1bFne2&)VEy_i_w)YTGl#!q3+1?Gn>LL8li1<z~uR_<MGuzcUndzS0h
zl|L!JetvcN_1z`ctXFxznX~=6^{3abpI?2Q&0%s;z3d$K8`+<{-#)+MHDj6eLd5#H
z?6<x@Lcc4&3Q05he(n0}{6PFSdsn*6j(r>J6{?RLU$;)O_Lyb0;ECh63GCP1y*`BK
zS3axa<e2wHlYia%DGyfO`*h~3n1IdAWVx96ng@gTKAZX4RH5Qd@w(^Be;?iRqi*w*
z%zKB*S1FySUX^vKe${I~{!K2YtfY8U_3uAy>R-ehUp0Yw|LJz651N&~_-Y<m<h_2Z
z(fy%t%GEiAQ?B2z&@y;ZXma(X?8BbLP5ix!v*z3MEwkdYU;TTrCe!hYA;yn0)=ext
z6Y(!&XTY(Ghps=)c*y)X<H6-)7Z0iTCBNuj#v$*1UjD49S)WY(mY9ymFMcj=<?mHK
zF0Wg2%HmmRy@~4si&<G|GG|SV`Ycb&>x!SUi26|_qg#_8!&`I9BI?JHLY}`DMIM4Q
z?mTvE;^Y2l+=Vi>^;<qHEPV1~ajU=NanHN*zJeBg%VtTs7x(r&Zh6{2jXPCFx5l<l
z%+8>X%`R6)x8{*W+rNyi4~1X;T#QM6eBz_~=~j!rdG=91E?5-(xp=7kcp-RsQ~A+9
zX@wvEzU8)_k!WeOC^6P@O=9Aw8>hPX91bzG=RRI66E(qER!ptG+@sUrMdIx@6XQ*L
z{&X3BT7Bch`VM7&*-v*a_#R^0JUdBwzfzw~iA9OBYQ>ZI4rZSt_5Ugi(knX-+Uv60
zfAT-^!+q6hO#w~+d8~`pSp=|JxFtWmzjD@{|DP`Zj{pA1etC8G^OE|H&yITUVD5gM
z^k3=z8}ZZK=K62-SoTZ2GGD*!mC<^Qz1vS^rRuWgIDMGWAid9D@qyAE)d!Pa>DY-k
zt!{}a@c+28WBP5z>Fdnz1nT`PHWRPOcRt{{=QZDslD!}LiYt#jXG-76663PT`@mA|
z=c?zP&N<I|u8wm@hsulw?{GbzIj1G(bI%bKE)YCv$T)qS%uI{vAOT(B0zpq>#_8+s
z%(R%UIiGuuD@cV2<MefNW?6_UsF@cw+D~DNahc?MV5#<XwR5cn??O+o{>zgpIH}aQ
zzqs9P4zK;E$I+%vW*aZ~cm1`r|Ms}r!pUsngZn#|E1yz(>|S3}?0!N`=%2ND^^uz&
z9^3DGt(+n($S`-e!=s!ZTnzX5gf?}0G@N^@SZG$m+wfkP^QMc7!}EO;Eu{Bx9WbBJ
zlA~m_pxD`S4sSgB18Z+5GeN}*J1?u8Yg^CqL04UIc8AD|J556Ahp#jJh?~;TduOuH
zhL?9{Lj=^OPVjZ%F3F4P-25<`vF5wi3AIJ6R^^*rZhlzG5YG8TQ1!yj)2gRh^;vdU
zIlQal+&Q6yA)c)uwBZh~aFOClhJ73lvKV%Ht37eL#8AU|Ae5o#yU&T%B@9298l?X}
zT{mk2x8}dkhwaUOoxW?PC?53XIeUHHo9Vj?nDplEE?g8-#ql>rZ{msjJH6FUwaWj<
zEUcfr|H9Y3{I=V6ESmIV;qhy0?7rMkdg1IJ>CLEI|6=71LHjQuF>frwV<sf7+Yxa5
z=EFlWFJ3wOA7!0bK8^dQv;Wc79}Aa1O8OcL5)l<&wXb-`1(vv@M_=vk;#PXEr595B
zykH^cp04hz<)Y#)_d;V<{5tp0Nw`8(eD!-Ry^cMrcLaQ$d$?8YgO*;{{m>YJ%J9O4
zudLg-eIJCztl77Ehr*|IkDRWS^NG(ouzE*CZFr&Mlh~uJtKQ4#nKXtMo>Xd-|8*gF
z<3snlN9}U$zB*qfC)xjW?myfn{d+aPEuVDI7xnrVD{lzcf3e6>dI(W_ydJF9g~36-
zO3SQ<)#1;D#~V657+yI0A8lLD*dbpfV<srbQ2S!#jSry=AD#OTt0^%r;I|c(-p8j<
z_oDEIOAEu7h0Bu;hcg}Fx8<ANA<|&?B_!uZRKt&j%aejZ`XDCjLQKwJgqX|<F<F<P
z_Ql4WA3+VPSyu7e@`+Cpdce)Nj&FtC7mFAVs|J1M9a;;1U3gpojqHY3&i#j5moWYi
zYFNzx(ZKY8n<4Mdda#C%^X32Tytp5%!L`2b!}DYRz|r&TLh{Zp0>5^~C{2_Hu|F`|
z%Y2W|3wyoy4pX^W-~6EIqF>(eTd!*SvtaQ*pMMiJ?}=OMI`!&F$%8vhJ{aFvZIWP^
zAyx1y!m@!=E`{Ony2Xs#uFDvga~ZN59Q5T$xM6RSpt#%QLCDsp3~E1`7=22Zeok~{
z_L~|a`ash0Mb-i1h=*ARoE$O_tlV{y(I;Rtn}JTUX~M!uCJ#aipD?I-gfUB8TP3w&
zf|FFiDyAX^;gXe%JlsLN5iewUEkd7JG;lt;%+MCPoK452mu=3fRG9-Tt(gpmF9k7A
zn{Qz9=!w5LUrN=Q*%OoJO27G#VZPXXx1{N<ll_8hMsn}dzEqemK4$&%=s|~L%J+KY
zKBisiP`B5XI8kwC_NC-|Q=~pW+0M)?*<Tf0b!B$Y;(31@5)>X6=6m&52WQ=x9M8y;
zV)M!O<-~li-kMLL`x|?X@6)vX=DTvE|Gx9)6F$B$U+TVJ)AZNL>EEP^KAo;&H?sZZ
zyYiy{zM069*Wa@l$^BjS<%RiDH~XK{?m8S>e1D4E-(^=`sK+mpK2h;y_JzgwTcrLz
zu`Xto?5`89`Z7CU@%$RoJcY*>^PT$ZgtNX(&OgALV)M)Q#l?K5-nvh&+Z%h__jB6*
z@?CM!f8TjCkV_W2@8>lAb@KW(siIG>v%oF^NzO%*^qup<{NQ5wRR4xXpWZs*@2To?
ze>GPAXEQSW1(i}g9PfP0_&0Bg`Y+!PFWfz!m`_-FG5?Xveonc+8b5y_tJJ;ku*_|L
zr|@63iZ6>(?n|Gz^1{4u(S4Twx+yBv%rm9_F7x{``_aYzN#6Mi!He%->8uO3`4t%S
zj5j6g%WSKQ`CabzUU7Rs4hdHO<@@o4yJsEPvR8F)4lkBhJsj(N%=k9gAt1SAh@8uQ
zO}W1sJ70kvGWUh~(Z%wrig!T{St<N?8OR}X!44^1bYG;uZpxJ+kVDe^zRZ4jv44_%
z9>^hQI_r#Weg#fC0(OYy#r!sRdoQ&eAcq*M|2hlu^>;Inub;W>mz4Ya;$Xkj@3g#C
z+;YEPEbN#1ndbLo_QQ$&az9oS=07{KS5of#i^P7ZuW5c)W<Lz<m;189F#p++J(6;t
zUnurVeLOd(qrA=Crs}}rW4n#j@6CPqu}|*Zii_{gbe5&JWVo~W^p>Xkt+76wENgq^
zqSD=4{yA~s6~e-^uZJdmmh#JqyDU6AHB{)a*2YR+b+h#^JI`*?;@$AI(R9v@J<HV1
zPOmaKaE<+1LDJ`0^KR&@zQho{b$gre?CW2Sq(x3;yRm97lDe?BYabqYW@@`JGHfa1
zwyb<4^Fph$EjCvA`sYjw&1_hEEBbKf+3c#M&1<}vV^q!7e}w8%bt-F?m3w;v<Oab_
z!tWj+#F^w^?r}NcccK~Q0*;%URWP>+DOxA;!#t#vqW<9^%#xNjEp{;LJ15M2zz+9l
z(bOAzjv)-|tV0;Ko4>l^i!vw#Tu%6XL9!89k@ZDn8-F3$=wgp#;|sWrf}4c@!o0QA
zah=fY>lM(T6;i})*uFPM7Ry_1j0{tCDqAFv6cUuUD|5o?BhO6dL8F;iPkv99m-`Eg
zA-Gq_aF^5*t&Nqvu$Vv&7s7_kxuKIK#JGE<Ud5Zm?RHsDRzt%PB5qv>ij>L1vt50a
z64YOTBBdy4^9oOvH%Dwhk>ZylW}4Xm^}L$8S@$fL1AcozG5q96THs`k8=YmKWB@g6
zBcESR9M~|f2Z#J~^tASLcAj;edLyPp&1`*b(X|70rJJ??n>VIAo=w+VRr73-@qEiZ
z<HH4)mem9<H58wld8TlVW!q%4%iUVlJ71iM>w7#W!J<=mk5`nQ)#Pc9EtU)TC9Nw8
ze5xfrcju|XImSHdzB@!iyNWK(TqJY6vhCrLms=N|^3k(0p8VM2yx|;^nPDNECtcH>
zie#RH)Xo(Rl`Fb9vt8!+PnpA>!l|v3>tafl%O9VZ7U7|^Ojg|QR^i3DWp@}vyS<K-
zJU--UuD9!Quk?bX#?BdOF&3G}T+3$_GKc7x3105zR^Pkhg`a+2LszSMQdHr?C8FYY
zGmr8HY~*nDQP-PO@@SFu+#QTsVoN$QkF-v9iz!(yXzp<Ik%(dKj)F_=-S56UWLpuj
zLTMSVxZkaUi*wCDmWCZEd3eZETyNLq*2e+GI#Gg`Te#JIcf9Zu&THs$)lRA^c({aJ
z{O-$xya5|CTz$Cp=4^Se$XXX<&DxHa2U;id#gr^(Hg`C>NYs#bN5Q3r?sp~+*j7Yr
zQCjw2%<otJ#kv1(Gl+JF9ocgKkmqmRU6<>m7bIQmn(;2$;^jWq@?H7NAs|a@xYf^Y
zf8qBz7h-At!zJIv?!MexxI!2tTg9!ucKZvz*AQ8&{D(_Ei`{*>2jZm1x^qnKEwb+2
z&Zs4}w&UgQ*2(*#OP0Sk13M{qd%>l$?sr@6LY(wk%x_oT#kuPsPBOWB$n&!9uFEA5
zC(Vntc)8QHyebdkq#|y0-R&>@PD3rtd${DW*xi>q3ReV!oK(QA&b$4E-(iUCuiS@A
z?u*@hxgFx9-MVwO++Jk;b{oV=+gc~*MVBnU4RO-hZ3UNdy5E`HhB)cEm|s=y#kp}1
zCvCZP$aA&suFF{vC;3HNyxihiZj}phQU<qr@3t3yi=me0JX~^K?C#6Wg)59fPD<le
z&)xRIZ#G1BSI)yFr^W8R+yrsbWZgL?Hy2s^LY=g+b+TM^$@1f1Cz(csR&I1HkIP{W
z(uoL64xK6xU7~)(OyOvfsA)*(%nh#PY9OhQK;_V>OwlFF511(&RT4D~2;I5fwftQ+
zbC6Cz;Ny^~U!qFX_a2)#FR`#oYT2rs>x-;!Z)MaJTec!_l~=LuuFEmf6Pg0Mx~^~r
z&HcHS*JGms>+uy=zkU7Zx=(QC+U5T%f0frpD!x6Jb2T(2YxTd~#@nwh01Zqk|CV3<
z%wgGe?Mj1>K2P3Ht5+5|eOq<!r+Vv^xzD)gpSFJ|S6A~t+e~of?n4)jzIt@F+rs>^
zE|b<gb=4kjbuo?IGCL$w+ZMLWjgS!M(+McE%r`zI<IHKj!9Z_L_<}b@chaT^^QgYr
zb7+Uabf(nl8*<z%TLT_h1|HfWFpVj7`idMk%fkVO4h2bwFA7@lMrg`ejq?UmHmndi
z*1AAMWA~91<5R^vsyZ62g^Fsdr}PwW_I#3T6B3(zXotWgrqt;jIc`5?oH@BY6Jyd|
za?O~lx$CTj>nuH{DPnawe-c>~beJAy`U|b#be#Kgr>?_Bg%)*N&jo5+rE1T&F&up)
zFz=H}<1B|OGiTjq65)2OI5e3hD=9ENDUUlqN9y5AKcN+z?sGFi8XH>Ftvwg0DV3@{
z-NtY<Nod|HmBv{MuFRYS(&$~WXfjLIqo8yrkVd12nSO_MoH-%tV12o8c4OC+7#0mp
zqmwl;oKxgxx;W`EO%a)yVz!ROtKUaSR-DnR%g0DOoN1}M+Qgo2231$JnVs5=my{=a
z9A#~IbkbL7MW@eP&mFoB8&9+>H}hPeW>mWD!8V4YO2YGQs5H(xab;%1Z6=X!pNgo-
zELlpy>A!Nh19XfYdO|dw+z!!b!ui<fcNoK4pS`(kT9@(#7c4oUQk<_EP?aKdayv&r
zP|Bp4+l4f2jXJMHgB`mk8tm9dx?sm%TMKsVTQP<%btAA7)b2o>a17#vJctv7AWql>
zae}4~*zGH~ft{dk0MU30qH&)}&uO1%#x2HYw@I$>*y`FaNon$#%~Ks-PV`i{rR3l_
z(KGF)*Mcu6R4(N}9Ge4ntmihcV<oqN9V-&eprL7S@=H|bWVsnGb-E3cMW(0Ztv%w|
z@2#{`?0_eix6#J1M@!mOCq{BVP;phA8LC})Y4IeF)vN`RnkM<IoNDpX(eud_CJRqP
z&u5pp=FC00<*bFP6UdxNDMo9Lc=CHH%@#Z0+2vt0IqcCAca@1=+z(V(Rc5+r7hYnX
zbYd}U!K05E_W$#?*6*~udw%=pqe<GED%574c*OZ{q0)p2mxQl`{<L*WOyAW1H1wMG
z>dcxc^LsdFFWWPPSJN||Q?vA^FSF{Q$nM0;Q?74URDBtyxKvNPJ9yEbCq6e!p1S6H
zcvdBNtUN6(ts&^A#y5M}9w9zW&yNy8uY@M?PT@!wZ}$z3lWU){<Q$J?Y34aLua?Wb
zhnH!tpXuxsG^uUMt|ytys)v3aPrN)u{F0*T$~b4QSg&o3LJwP>Y{)#d`t^iKBD)lq
z>Rr6;&{@z{bi?GSYPpAJ)}skQ)9vyWxLBlG=FIwJWwT_7(H1Aaxi6!5m;AcG-xB`Z
zG^mi#F<4;A{HL6^m+eVgKe5ZJ<DAI`3r&^6y%R+qPOa$;32`Y|)?+&1m9wir-2Lkw
zuBk5RRgugq?Mhf4hSv9ngm{!JTLhB!6tLsI;^Df~CH+<u^GdrdEDwd9dP72dN|x;a
zN&5=enP2g6ed>~K6~nyJ?hDJq%PzekAps@J&Vi%@1?-YrmV~6mdaN=&yRI=rzN_iO
z$;ED3t2C^FKS_CfU8un^-#u%|qOL{8wfcUm_#F>k7uMRo-mP<)`mYJXHKq$UF=S84
z$Xdj2c<{QAR{RFH&Sk2<CJ5E2E;QoKo|56Uh+pyGbwMrmjc%RGlz&YStPx$fNi=&(
zhSnl}!GqTYwAO<p6n{++s9{}bq~Po|_vM5_ue}@`c1u^(z3`dS6a32AZo`$sM`yqF
z`?oCQhoSdBXIIYOvsAUO+ohij`cplv>4Z#8a?9<|t^844A~wIc_=|t^3bL&{{qyN|
z@1Lf|67@g%uY8<7HT$u?_s5Un0yDk07#@1N>eh98S1z$zT>QmB(#knO3$KJNNm#k|
zgMs>1!$S&NqfUtG##{>HepM5vn>D#|>w)y5&hFnLYkW5RTDGlaYRH4H-VYM^wiq2;
zEL4^3$y#<)i2ZYCc+>+yPTLJCOuOSbn}5#H*8R}Y(!WDh@W;<>EeC6MO%<zfImCW@
z633sA=tBv1m%X@clpa3L@nor+rkiLmKV>Pa+{6!x+f<nB4^A_faen<JrhbnfFQSAR
z=SO=>_;{*-jN@OUD)=LFYs<l!FpzOs_s_Zds2nXf6D=$0Z!Pz#dEQ<gR<b|p-jR9U
zr;=86X|KMP5);|>+Jdq7Wz8v;_0?HUeiItqqZAUY78o5=5%#ilWV=?x#Ce%@DyQ1a
zfODKi8|Ddn%<x;`Q*dI9e*Dom{?4LJ^3zIR_eF>a*#sVV%(r9H!8c2G8FM-9Fy}J3
z;}~ux(PDOcYmMd%_QiUqRxZ|ib<HhS<k4cihlba6a+_~@ZVjB?@*r?}!i>uiw;u>`
zO;7aXh-+7scxH0VOrj-jeYqiLpjfbaVdPe`_R~f+T-+HxoC|$E>{@PC&nj8*i%Z3)
zJVb3q%AuXwCk_OMD<tk(1a>xuBil3qCeF*eQ#sjY-hH+IiFjLpQ%BJ%`L122?jo%_
z)V(UsFitm%xEwCTH8)VGX>VXtBHyleB328de`XqO^7i}3TzDh(Zo!RIMVmKV^2O8V
zm>znwyx@VTYRLmrse31)m1DdPMy=6U*uBx|@Ez6k-U3Zl?M;hX^iE3gzIWYgdT6Q0
zp0(jqE`0wg#ru9Lgugv}$_4Z9QoQe<Lih*6r(7uiA;tUNbRSs#>F_BRw*QpkecuY<
zUj^y^CB^&x;sL3LL0tFVYkR$ruIp|4-jL8+pxK)LOH}<w?EYhy+v^hEPP)A05mVDL
zg&Dh_tPwO@xuT_^{G_JMnb@Lh9J510Tn_AhVlvMzge80W95vCYf*<rOdzbUe9=xTx
z+|#v{WskSt<Co5!8_G^*1_f#|zMpit;@1VCHL*prLPC5XTCYI03PZHoLbS57LbL{M
zC_AYc^ia>zmFu4B@{eB@YD7pj%?b$#glHCF)eaAs+@-};F@4UV%k2vuyzVTRK4+QB
zW#QTrocm^Rl%LG>GBLf_KI1_)R6?lMgLB^`h=l6J_6ZMOcR+Lq)}G+l*9DOfz1ZII
zAR8(nQ0u|5uZg4lq^8#gJxkW*;*1BEi(KUgv-y7>2;%qM{p5;$$dnE1BQM4ltrGb^
z@9J?q%WO!guqC!giof{B&)rY*W|y5@S-+sKzGV6wt)s{H_k%)k`|7Ot{~5cVn8-a_
z^6dSj%S)VA`rcMu{?S0)w0`=Xw_3Zr-%Z=&{chVn?|0KSc>6tgWXGy4yk_4@-NcsI
zA|dwT1yecYre2Wd-2H@w@0sxWEeDi^suU8Z&uKVVa}JbA54p!2(z9f2{#gPp5%{;Y
z#1=8JeV!QxDlX*HLHc-}O<n`iXLm%X>?Ehendjk|jqWNnC8}>G2^-9q<N;P00a3Ym
z)s_RwLBGrVZmOy`d=a>}GbHKZT%r3vAI=rMdz5YdiQ<!@mDA^}h?-oO^jpa09Fx@L
zpHn#FzF%pXqrlw1#o<tiLu!+!+LWRuo;6QdgqCq@3Hul=oFkl)V5>gCU~a(72NOEq
zPn!HR#lGjwq{*!;{!iXdGB%qrH>BL{l%6GPoArx3u|?Z?cRxw7EWMJv`$>wT-7DKS
z5GB&3mq1D^dvET3BC@bRQtj=e;Di~MXYBQU7nbv()1%}1lh~p~S-E`OZ@oW=h+UW=
z<TUd^sekT2E~5`$L_KD_Tj67HvZXkDLgVsv4u?uy!44H@;?YrL5n3j#CCp<4w)ZMO
z*xq-Ywr?f{n?+nU-{$Qn*tB<Jdu-9N;1ex+VH?9gh+i@PAih=ngZPi%<&B-+f5k>W
z_~K=7tclIyfDlV|#a31^-ujiICI?!>8WQ%Fg|kJd{80^?z#tyc*!cBStYpH(5Ai#=
zg&zDaYi#_w3&P*VE%abFh`$QL-@+~Qpc=%V1>tYv7J6U};&(y#8$kL?8yi*6Ph}M2
z{Qq>90^`1DafygcF_H-rIpWrEi@m5WZETX?Hq%5Yakjwrn~Af9w{AauciFnbsfK}5
zJ6A2#6HeV=H2FeB@*3X{yVOI{C-GRF6XMKYvX#?l=G&yWGs@{9CyH(*oL+S>;j~f7
z22rznKSi#wt#5C77*=xN;kAH>$GN!%FMlkGxyYEhv+0oa^h382E`5Bua}hIF32*Dt
zi)(q+WaC$8TP+B=9uSdr7bK~=dl7S28E@;-+hEB(+Exo{t_MVL-2+Lc?peglRmt1B
z^eI^Kg0|IyCD#KYR)Hm#?p?&(Rn6PF^!-|1wYd&YwCz@$xt>sUfpt!@y2-*71`3+Y
z_ht%TW1Ak}Bej6tPs3o(XSFrFdJAV*IPlNDkWdxCK4-C-$-)^n4*at&Bvf5spOXyY
zIymsp1j%yDQ3i2c9QbE|WI5(MRyA2T!^44pI!Kmt&SDVP$ANzuNS1R>GKd@Cz&{lv
z%QZ(?Rb=4<7fx3W+W@ELmyVhRcF!`M43{>@sVzMCWr2vr{I4bpX9PL$PYOt=65z_2
zD=<fC;mZjnPW(oVYlWJGRZL_jdA)E{*<k8aP}Q=``4We%2g^1m4!^z&B_3Q0*&7dB
zV?Vf3a2B7Z{1*lO8?O{B44p13u56Y&!Wb>hvfMSpN+tI~vq^$>^MfTEuI#oNPKhs_
zB{sY~Qo>l}(Q@cgv(AGRO`$rIv%Swg5!(M)w8v!LN!5Cv9`jSDn3jhh>UXbDo6d4j
zIySY@Rrx}7h1zt6gOjT+F?72u`1HX?udz}6!xBcZPKVnMXT~rw`(N{9))8u4bl7+&
z3){RIli4Cvm}J}2i#T~~IMsPKc(A<UJ^w^VqT-ORRKi3K6X|&;RSiBonPqZ7Nl?So
zX0ms}gHDso23Ms&C!9|_5z_dPINMWMXd7qYY}sv=f!6a*s&;p-(wTHp^>jk&vGY%i
z)GF=@uQK*ho9=W-Ix|o0`r0e+zxwD!`bp<Rno8tEw()H{bnNt#O=cCgB0Sp{G4pM2
zJ0z8#-RyZ>{Am}T#%WQJIJN0p4=#Cpy4aOn<b@QM_u^=2AFF)<;Ux|$*Dc&|Wfw@&
zyUdkc<gFB!_ja&kMR<wB&vgqoi0lDLp003Z7x^T`<$W3~xgfm6!E^n>4Iz6$lHS#>
z>>}T#xV-O!BpXkJ*96R5fAGr!Zi|^QvjRdSCQM<}pM3h(1EDTYW|PU@jSo|cBBf)T
z3=135iZTssS1|jjO;;0{%$}h(o$Ye7-Gh{(Oee!eh@=J!M3Ms{=?0OU2$5U?mE?p-
z`avWYLL@a<{nVx_iKG;1Izgm^9@Lz<+>+$Qc=pMqgsK3pIp?cp1^8$#m>I+6!|&9%
zR=CMW&$oSvaMc9PoT&mSMVVGAQ!g}oBxJWJO!mI4nAswy!W6B@GBaitpQqv%1%VsC
z6iz(3RO0b#0ej_vFm^|^>C2ph*ljzQx0!Jm?KF{{WcI>QYQt2=2`87n09oQKf2hG%
zeHr%!AHCM4?2!ioSyxA>UDq|8>^;X+7MvXU_dM&}wCTXhsUIE-&O52<_`xkaGT|b}
z7rA*SRUJMonFmTgD{R2&htmd>elC<%s7*g`U~(xqp}v45)Mwy?dK{8a4}lYE6(pe+
zfD`K3HgH1SsRl}@UXX;U1Wu^-p9G9{vT)ViNW0Y0lIwIQtv%Q8%01EB-M<8{Zkn;;
zl*`qC>77OqGd(kG>MuhQr6-$gdS}b?@>?vEeHL6)kqlYtsbcf~vf7LkrnPD(7i9S=
zJ^Z=A%u!|X+vm|gtyd*Zn){QzOL^9=dFr#AE{GcU_D{}8_q=5MR!8-^ysqjQMP1cn
z2g0Y^aDHF8bZN`Zr3;UE?$|u#g=G1(Nv~&56M8mhn$Y9IRf}BemTa1GXStR)XZ40n
zQzZDqMO8mBPh0xLE;-WcM)I_!M=GwY(wHc}T}SnM=jotBa=Ua?k2Qz8cK-R0s=4!g
z{4}9&9BG<{a)-6Np12!&pRASIJY@sBk$0z}khWLK%nZ$)=hLPMeXB^*G+dJ8+NmR^
ztNPyaY!Q?EHJz1qUzlx`*DHyN3z)DT^gOlN<D+QH^l9M}7iDtzCCyWHJ%47khpQ{g
zjM?d)Ul%I9xLGN>azzir=g&HzPNl8$dL>a&p@hD9s#n`5El7VEx@1uh)0xYgm;AaQ
z^u=dyS4fCY!_KN{A@W&G^VWt>>^jA15PyEsD`)=;#^1Dp0v#Ejy@?E})!?eSHc$2G
z(zlU83HLxoEm}~&XRU{;DC>;fAZs;V%rDXo3Up<B_FgimmV;~GybnP?w7g7gFSgHl
zu$oi9cl{!lVBy*h&VAE91pU<VGSR)*KIMTnr~X`!gitL9=f1uVLBF)TOk^*%_dHn5
zp}!U+Az0hNv9Ikz&~Gg-6W)vMEf2Ig^!J_*V*30$XT#e@p?LcW%{o!lS#>WEy~(O_
z(t4Ah*vs!OVfsyaZ*tXhz12ytYWOxy4;8eV>?$Q(d}1nR*!?Th3@lnBgA<|sNaZ=l
z)~qm?Ujga|USNJ0lIGe1??e_@ZB{x2>q16bER7UQgmoZw=3HCT0q;JF`Q?VWz&npz
z%gwcw;9bXpE|4Lxj^js@bXk#`AvZ4Cirv%vI9L8&<i)>PmBQ6}n%yh4)~$(}T$n1k
z?lFtWvd@~rd)}?&v~*;X%WQ0U*>H+wvX9177RiXyoGL!zpzfKIrTU2jRelPIRtt>|
zDsJ9aBU){%a_VGV#I?27Ns%5OTp0VUADm*_Jo(i*4UUKRG!7K7$KFg3xRrDL)6xXF
zo?RNt`*y8}mM#tK=-<_HJZAG2-Zb^AZm~j5?y*gYe#yDb-WoA&s)`k|)4=`61c9o(
z_l~N#MEcA<l6v))jNa)FnmP*%Ra=Y>zMgmMk7&w+m)a8y?gq|Gn8f*fodUCeY-7vI
zF0iu|StKKzI8=PhL)0Wv%2xlM6ffb#sd#E-oyMzcGJztG=4m`MWRJO(;2ZC$QR3#w
z@y(61&GN;r;1?}<PnVxOp=bG%|48EW(!+_<TR&{jt^xPJHqSrQ7(V4f<MoUR<$O?2
zF?-{p7QJI!yx?x-Qjs+$x`cMAWSi^}|9XvMdeDb$ae+?vuV<U=3I7J>-vjaQWSi`n
z{vFI`iw|_V|1jHR&-EW*z8;AG45a@Tm>&k>zs@$<<IbGj;;mV+f4#=S{2!)L_n4bN
z9nF0&!{<CG|10G$|EqDUx8LM0ZjM<^3GXItcDu1;kr2~8)#V=y%1=fr=L7``LOO#1
zf{@Oj8>By10_hBj3PC!9s*uj$QfNQY8`6(7glZLrX!V0={Q}i00@3OU((2K=`-zBV
z#q>GHF1IgANae@^<$Z7`G(cocjH9pCDvbxRMO^;!O-<|755*SE67u!`qNx5OOX-g4
za?OiZT;!9Q)~iA!yuT=_{_uiGOmUHSYFe)hk#PT_sQg0<A`#*uuhg_&5hCIIMN#nw
z7f3?m;O-|PbK+Q7<_Cq?9{{oKo-ljcn!KG9{68S@(7rU+@{=or{#1v_gF4xH;aBZ4
zE|#6lv^n$e`TI$`b8o3G|JP{s58S(y|8G}zGE(`@x>dD*7r&i!xnjoTS^K^HCUY${
z%bh;w*x@->{=^nNGI@1EZ)fx;J<Gx~Wfn6zcRzWOc>j!IxLQPQaP%RL-A`2bo;hd>
z+h{E`2X*>n&Zx&_HoB{Pae#CdVZ%p|&f-f*XE6uT1vFj@?kt`I>61949tqM{(*fx$
z!p4ofZm6m!7^qGJtK0xlnI4+i=)UCJ+c}%O{TN;<?kQe*<dC)MzR!oPwRd&%+D&{u
zN&AzYW#Cq|$49=YR?J}~J?{(OS5-fKvQFZrsya94yc73T({l{0SHA0+5?jQ@Q+{FR
z?k9QDWhYM-y;^a+?Bq$Onk&^eAWF<$EdePhmfBo?Qq$?7k<TsF<p&Iw8&*%hv-ZXV
z;fVt4Pwsx=a`l#s*zM^L$ja?fAbVHI9|PHYN4WZi>hhco%kp!k&rxEjPUheJ#Ao>g
z&e%0c>mTT^$bX=prT;+x!}s@0!tcNC-ge;S)Px>Z-hu{Ij%y#XxOJrd1!-qAaIa-J
zSoL-t&jybl-fI*X^)@guzn;3==z!A0{RQGG2fn{$Vt!o;;pd2}94H6zLm~VOko+4a
z=GUeWehNq)#21C|6F~B>nV7xjX*25x{X1Ri$W*gk&tOB!PNM@#f_oywbuN5=#l&i#
zW1Q)7$V@SB^I<dfto-S_ePi2CCoR$v4t0)IJC%^Cw(#Szh}jQH{a2h*kt~^`Ds;~y
zTR6q&_R&2v+|R9;@N~<;X`#&rr=`9~(9YTOS#u3<96#&fwJ#bDuU)v|*lkdc&voY_
z=2Jzit>t>HpvE-a+vvyrGMoYv9fH{Q7^{OjizW{Ia{>}7p8G~X8tHOopbi|Lg}ZNt
zlVN3poC%1_Z*klw1Jp{FGXil1EZjld&IUOH5LeLRxOaw=;lu_xJrGyO!X3n&*&wF_
z;tE?F_sVcGT-YF|1>%ZWxO-_h9qbh95~y0x!gjeC-cYyof%YU{Lwb@b3lDrz5V>Kc
zXyNK~S@C6yTnbaPDvP>D2E3*I;0uRu`x3#b2^=}C0&`>*zMLT9#Lv{YmcJ=j*+h1d
z-3v##4Obltl3EZ=b-(TlB_6jHuxB0!V>{?6*u_^B&~oTfyFtR`&X-JICU79N)u+um
zsakhjTO!kDviH9k68Tf6vihxWk?;TDqsQ4~zUvfIx7&j6AAIx}o7BI88{tnOjqnHH
zM))>JBYX|G5$+1<EgFJ*i&lK#-lC8nsJD0p(pzkq4QlOYn1NgSCrv@E{eUcRYhO4M
z)Y|_sv3<fx)qoF&%_h64<On}9v(71ARAw{TTTD1KQf0FDw1cO5=ATUU0gq}-@zHB-
zF~4-jXI=El`>$ulY?@<sV^fyFjZHkVIjz0ZPp0O6sM3(gb7hyw<83v)ca3dwpZ+OP
z*??)<8hd>7Kt0Ln&%5|EE|`i;bK7n<qoiixx)%*WvCfGrOTm(Fy7)A1nTkxy1518f
z_oCrbtaGAf1z7T97oWxxQ;})Yz><#ZUo=dLb52}Y1(y8Q#i#MkRAkydkR;Q@^*<IE
z#W%ln6fZE^2_4ah1NB{1MJBUls7+@&4C?0YXi0j+0O`cB&+*ao)llQV;G@U8jJ@{2
z$tRaul9-@9JPwGYAVjhkBB=zG<b+5HLnP-yB%Pp=TyuQ%Ts2NS32K2zFFo*c#&XW1
zQ<!F*T#7uHVZ2jhhFl9%v^u0$sQyJk_=c7uxL2sPkbUBTYaHNSA#5xI+$(f?;i$0T
zE2vlaa>5r!{!a~S`5+xnzA6FsoLor96FQWkFxmT}qw!9WX?87)v;BO;!QDvyO%02=
z!Z!M>i_TJ;Zjo&TPL6UFXQfk98!u}=Jg#gr*}LgM@48I~774zvwVCYQ@W9g+oPH`H
z>8Apeeipoi^cG)(6Y51sLOlacsC|%x+5%3fUm?B4hv44gEJ$y$2;5toA_X4SZ~+f%
z)ICv5DdH6Qv*GL#LC)JPJI?amp0i@F_BQda%B#?Z+Wsv=9%?)Peha7COozpuMk~A~
zdsN(8?rU(8CCYb_<JDO%hdw*zGO28iUUO~v?{4$m+h1${PG*l&eAF1{`m#RGbJKU-
z_2Jo(ml>3OqUKB5q}FO3`dy>7a$opjrx}~<L@N&c3Tb)&GbG4%y<4k6Vy)JZms<Bd
z*7zJLIQ`+|s#li9p`s6hL$5>!I<+3>>=Tyj&YG1a_CY69=ft~Zkpg>tH?K%rk;dpB
zaJ1=7<}B8W7frYY#cae@8Y(6@mKmLGdYt^aqknCu-8R139N*6yO)npJsdejbvD>!n
z=Z#q}lNZ^wyFN(Hp4Gp0rk&cW;s_Rm#N5`9*v5WAm+7m-e?@G667~BGbMo)2y+1gA
zKUt>{aqj6W9p3$?ciwuC&hkTMebLsbZTFvs=6)z<s_C;9U1%*j_uUn?dZ&i-pBDdh
zJ~R0ne@cASiptCX7G9peNZW_;Z_u+>Tb4#Yw&N@hJ$u<JD|X*C7v7GPwO1bf>k8)H
zyJ5+-r|rI18a`a}(tUT@V(SHG@2pt6TQ0mEm20m&s+;Gb+r77HL+gs?x4Nzs=5oH-
zF8TSY^U)rWAT6z9f!bOt=0|BA$mt7KY@OcKRd}Y0>(%sWTn5#TLpm;p`c=KZ+N^n4
zef6s6XF@|8{6ho#|GYX_q@-zndeN+9vsi7sMY%Wa&J=UWzpS%La#iF3;gF3A)w9wZ
zOH9rla^XD9)GIiP_2x+v?!NxY^>RLv7mu$B=U>+FEcr<||1{y_Al@|AlgCf2m($_y
z>kkD{llmvd+eV1V$ghsGjSy3jSKeQ>LC3=G+1@IHR2TVT)9G3-zHB^kd2zDNGOgRY
zntr@GxJ|+$eEXTKX8HOlneFF4YK2E<{)mmc%4Yv>$0fe`kNvK$X6N32dhV?U$K^e5
zJ>2}~ME%!*sgr6~R(%Z+E&UZ-()w_J)dr47kkI8=FUMo5FllR0_it@K-7ijuR<k?v
za^$bQ@@QXAFt_cL53ddeFek-nZ{0C}dBEgM;m@bf*6o|CFBV<BCEy4D1ZMWqsod<X
zC;j$lzn*&4#O~Bbr^L%GpIe=TPn9}*tvn|kz?9}_torSO_H<s&rB-YGJB!W)+%S1K
zXW@mGqN@{vR&8dR!r}QO@p8-NHYZ`D={7n(e(L-hf<dPaFXMd9+p3n5Rv9s4PK;cD
zlFE#BU*U5yT)ro4K5sCvylS(+#lxI`w%QzPky#TWpC=|3J*sr*oKPcY=4(-{VWL=k
z;qaj+CSMwa7U<5_e8``ts5)_?oS2&WQuZkfzBhe1>t}Flp8WG=gNd!Ht-{szx&!AG
zxqMgTeBEGTn+OtUI&fZz%Xh`$jzgEeT<)j|n)0~g&^FHJf~{&-8eI}Ie|5SruCxnb
zsZ$HgaFX>BnYL`cm&k-y&h8JM3$?0UIS5j65~O4bOPv`=i62ObA4rM!gXhAnYF8Lt
z6ElBtx-zb`yTVfE22v6PQW6AG;{V{eNUPcvN01UvkP;Erx-gKEFp!ckkdnX$(bt@X
zUmaMq!Q}6eMGYbHT}<~6$ju697i(Sma=F;gCBFnjYHStx^|-t*`|Ewu{0izVImyL=
z42XLY{L0zq!`2p?0~$KM_6JWazXBdTsq6@hm{r#`(SId)I{uTw;teK$Rg~uk$s0AT
zS9+4@mYDe~)6H(FoeN96^9knOLzlh?_ttoUr`;yBOMxtwVm-Kx-K*xW0>2r^Vl$A%
z@)55dJ~~^bzS-(ff8-~5Ew3Bbbs~3uv-F<!=>BFAmuC;8!M&slK}#N746m4RIKRih
zBlevB{@7bFEg$4pJl5B~ek^|4qsQwNjHYLRC-FaqFM04WykbW87Q;hoqIR|#K_4zR
zA3FRcB)P>`tEMhs$%E(Yt?e&Y9^+`f;w9&-zTKu`X^8yQ=NEpu?kK;+_l&b+<FXBQ
zoq7sP)hcf@<~49+-+HzA1(VVS@k@NqIXgBidv*1bnpn`Oq*p1rtFNVHN4EKgGxkb)
zf#=B5)+jLhM>e*+tO1P{SY)$GR@~xJ@nHuIava*Ac;bMgGtwYO@V7;C-n6IQ-K9LO
zmBnA=!w%+kkls#{z`I^1p7IM*dD#}8EsK5I%X4bw;(z}?f7^C;V$AWG-@ZQ&_xUkd
z=HXKI7g;<zH*OZJQ0}~XhT-x70qt7H3o2_<Bh<F4q(-m4P+xE5pEh^ZsZ;Zg%`Fe=
z+Zwj+-MN#iSDmvA51;RIB0W4jmhVyc-lgv6BE_0*JXf#2*YIHVy-AAs$=wH;erE1q
zJovf5yKPUeE*s;Qf8XqaI{rR<<Gbhoi&t{@<PYa3diI8J@E)8y@9JM|gAZ@DXHGaA
z=sdyT-#t-@AJ?Y(oLIO*(L-Xr028xzONtYpGq2-;JNN(Wvz7V8rFeYv;{dzeQXNGC
z@}0W2pPIHyTzPxD;ZH)2!-tHVlM}@6`f)LSdH8Ras0GivRi{6`37vj^-MU>eN7h$)
z_x}+*l{7&;v-GO8K+V-?qbFTSh7k((yyglOa(O2wtnNCR(D*0hPQ!zpJ5-(hOvIX5
zKSgs$3G8WJ0Ol(5f4Nb&k4tOiE$)*um(^Z7Z}L{b=5j_|ifSmo(>!(i>l#8<*CWjC
zOnvVdp<;epL&)lOh8almkkZbdZWAy3JhthfneJBwok_C`ML6dc>PY8Z4&pzgwA0tS
ztL0tfrkowV-nJawPt0^Rg?6Q%gektgWr@d&d8((|J|C59aV?rXO@#CA=9HTS$8I!l
z@W{J7NoisAG#%-4lGOrYC&Pm@g=0KZe}?>E4)sh8*y!+tr)kZSSB@Dg0uX`O9{
za+Dr;X`NnvNNI(aRx_6=)4C;_YP4*cRxL4F5ugH*QUObaLZo6KQfd$>HLz4EM5+cN
zr2&!BSmCAB`e|wi7i)M>q@AdnV`z|MNQOv(>eQ#fi6SAYQyp8~7{h}y?L?gp{%%>n
z#AwMJ|Bx3f`NI1qotjW&7N{t^$NPtumh-8dF0Ec4)E;WD<k3tQ5>+}_4N>eKlEIQM
z2v#f>s3^F{8LZgSrPb*J+e7V@BAn}%Tq^NmX>#ZK%Lrm>eQDg(?mRW**P)h{zq3Tc
zf?fvx`M##hYn5D!ZRl$GEk#p9rtw$){OPsIUH4<e`^d}Uo36)uNB;SGJxJ`wuk5ZT
zBDQRa{#Rf9(iW-tYbswfNv`=qz`xtgP6zMHnaCF{>2u7``2W{&;e+@5v-mB8jw`T)
zM0kFkv2MvE`&Dn*GZszK`l)_SR-%-9z4ppm@$CK$6Uy}>JyjLz6x6g<PO5))r!ipr
zDv?GO?^Cl&RHxRIly3Lx<gVH6mGvZOk>ZZan|CF%vh7P%6)yUa$su&?{#GXD``adQ
zS~8fja6X>S+t?`1d$L8QMXIT>Q+wsDk6$c!v{v3ac*Nt0_R3=tPduaekNK!hRXZG4
zvTf3<j}EG#*7Nqh3RDfX?uh@|<h9C>t#VRWxNWHC(vuUm8^(Grb*Pi_3k}LNdXnoC
z9%Sn!=&?ZH{pG14pDtdt)lt>^psTZTBG*E&v+7yd_SLEi7g=P1oVA;Y`Tnj+oR%UW
zXNfu`B(zTOIgz+Rkz)q))R4CoWioD4L*6Rb32|$!G+`_K?KU-pi>3cqlh>+`O9UL`
zm$)RwdS2~IU%#uStn}(rg}STJRZsc@P)e0>5#&-OCRB%w`^oZ0Y%J%G>Pi+Z+9;tj
z;l9&_h6l1N5N_sz?iZcUT)#CwJNl~f8S6ib;GjkCqInO@5i(!S!D6w{gYU}TRg4-P
zPi>S09;hf;27F)6cEb71y7%v|y}Hb&o*(dY#eUbP5;c>zUD=_XqqyVp<NT{^&G**m
z3cvG;?l3vy_wU@inAe-1UO!uAQ@-)G``x2?$1ilR-8na~>_T!u`ia=Qqm267mpYx@
zXv@~QdCp=H_Bl&+M6-0hNvNE=R3gGIBJ15M)eDmQB6F0{)IIoS(Cx@-9-;J|zCnct
zd?!ug+B$XXafQNZ(JG?scN8*L2HcJSOWOt&9ymL38rRlVh_tdO`yC08bU0XA7o>aQ
zG_J2#793Y7jG4Ra(}L7l(|j7mb1L;Yjw+<G-DWbraVhP=D`Q@br);;G%x_%Edyr+!
ztC7lno5}jdrLqUFjCeJkvO71*^K6mdG0TV9OY%@a0ta(0$2z&o4MBYdA{K`nteaLJ
zHCZr4m4|hj!G&oLUK#LeJmqw5ROi{EzC+4~*=y#ZfCMh)T&{Khf*LP;^7dYKK!oj<
zNX*-%j7xnIH4IuC%~-?BGaWR8CAfSN7x*3wjg<;GCDO(eERhjhU^<;`icza?qh?M<
zaDgZ?=j${inXAa0t;n3I$ehw?TrJZgql{RWZCL1gFf<Zmkr|kiC_M9!S}Ipe{&~4(
z)-IpK$wsW}HmCO=WO7}$!E+|l_3N9DCp0Pr-&o?)`1;k&<P8oJHFJWN9r*g?jbX%s
z6C!4s!4IsezDei=q;SoiqFM0QrkY1g!>HBwl*o>}dA4kvCN9eiKzg4-^zwkzS3=Y~
zpAy-jH_w)hTV&>;2}Z2znjzMLmES{BUXD<{ZZ1N3GLrIZNXkpUNvK>fGiuER84p!&
zmdX{=eh%Wp*+#7EtRZ?g_|9ayJ`?K0Wj+fXL^AwuxXs((Tj|uOc469vUY*3*n_8GW
z7sw_`TOKld%E8*@AbrTps3rH502fQ+x8~d@?6;@Li@adWWlx_dJ7?*e1rB@}<`&&|
z9_Tz}W6g4yeK0bGE#1=iL1BizMfaWuI!{?yqYgwkhJ4;}`kKwVFw=hPJ<kGz9_2-@
zdlsm0=fUA@IaT&|Zcnr1SP$`9?s*ni^dQfF-LpdR>o(gCpOiLPQJHi6!R#sPD`lJu
zmLI>rYUV8Wvn{(X<(z$-Jp1G|)Bd*=?~=Cn@9MtWw@^H~_;Hq8HP1Vqou}7YJb1b-
zWQFB6P+lsY@~C0+l%-C+N9CH2L}oQUY6weM8L)UGNRFRdguNzg!O8;Deo(HgiCAFq
zU^A0<YgNRB<Ovq1+gZDq?X)+9tY~K?U3%TKz{(4=+`X3_;GQwdotX=i4`a?IgOXZS
z!!?^IBi6hFS8SvLRM<1lE>;arVD~w@n9;SW;hIgB5ma3hL|q$L-4YJ4x(6I!b(0`c
z(;!lu5GhWu)FOz~vIAFav?i>s3{lwf?BXO%1J-5FE;c9yJ7ml0&SVNs$dcpLFk;0k
z6*&1JC`82wsUvK9U}MbL#Y_uL`=|LdY8sgKvx&@Piu#;!Qe*~G@aGJNiJA-WO3mU4
z|9k_S7xAkjY&zGIEICn*wUt{^xO^H{R+=n0Ap(gb5l|d;`7q*@x{|VE)^TvI!mp07
z=^+Z?pI115V=aLT9Ba!Eu_hIe!i8T-Em(nTi~5dP?uR`gS@%Jf9ItvRC+j3oDP3tY
zXNt0j22(D_x@Q*)g4zNUI6$Sk`(e+Yj*W5`${u9NiL$S)yb{Cpq@j#C{BwqdrnyD{
z^DUm3vx^@-In!`_;obvRZKV88adT~H*x0n<*+;|Z&p&pos;oJZEvKsbZW<)N+ClPb
z2skTGfMn%wPqO6X-^-VY7gg_zx;L-LqO$pv`(ItH;}2$US$fQKTI&P9{{5lSJXM>w
z`B)s?B%so>J5`#e>hd-pi-RCuw6YY>E|)Dn7JEUw-}i1LTv*?$E9|#UhlTU;K2tM^
zFW$+gTcVePxyEJ^U$jBo^<b`{nZy@v5O=$d3)i#m-P8S_@BX}c^<16U*(>Afs~F?=
zEIWTLZ2e1xEj4fL(|$fRe|JV<vvqlz$7LxqXD6|Zl0m-?ouBx^+dlean#YMCGsUOo
z@6Sxwv>T+N3Z!C-WYDk7+cKIz_vE&jtj#i3Nr{}TxHPq(Z_1T}l9#q@J3C>*(cHEv
zVTUY(g1FK>E_0bXJ5Adm85G6y+{4p!j-v1DJ3O3`FVZ|RZRaSfvKF?P*vigTRP=XG
z_sH~|qpWHQ5>W(+c%*w|hR#t|O)YFQ(f&5i(DCX$;}u->C*D1u>3o!FqH)KcY4a>a
z@&z_8dT$wWPVv+2s<eQcwYJ480+be<dM_E$>YDQX+nI$<y$!4Orw542O}u;GxSh+D
zX%)kK$IuxrW&P)6v_d#naMiGdJ`}oHYgfD?Ky8872g#6D-<0pa&Mb7A+py|jdVr|i
z#Jlf}+qqhqR&mUC43%&#JAa-hD@??$xoOp*^Z-$}iFdynw{!I}t>S@5zdtXdWx}<>
zs-|g`0M|YBw5Jb?VJ-d5Odl<S&Z%joG?jNocK(pjd@dxab#V5PH6As6Q;a*gCO)uD
z3RAOlKUL|{>h?j*P+Mfa@>88fPD&N+Gp2T(pIF2fxKLn^<C(6b=^g=Ff3$=s3D^X^
z;1AgQqa|b^{}kJpnj3fRb!PjYkDD=JL;U7j?cw(6TNnR$A2~~@^5b!ZH!Gw5E?64y
z;p+986Q}Lj6c^~7*WbS<Z-3gZ*Z1R2#Qp#F@aorm_m8jFYfcLOA_3|pyj~yh;p_F9
z6P{H(PR>8``MFr@t1r}?m}teeaN(ct?5$1v?KAA2c*r&j1niny{JJeO&Hnk1lUEs7
z%S*Oh-t6C9a!0Ju%5b$K=et)jjvkwH1uX>Z1rE-gtIS~;xs5}nL%yb3pyG+)?pA9K
zQ|ot*f5N}na{Q^Cd(-fa;|j?_{zv;)ymx$%|MJYbhkQ<FoATG)cipzhe$HI>@A9#}
zEx(h0_-L%0$n5W2usq#Vl8eVi+Dq-pgUbRcJ@W-v+2#qV3Kube8tMLBOw8xICUIJF
zn6fYzSO2{I!h5ldfB)gX>DQSH>kSNrRBgXCW%GPeS<Akd;o;)INs0Qqjwv*}E8G4y
z@L))giR}5f(w}c$tvc=aXVvyECoE5+bfj~0kUP@bHy%}JxOe}aJJ&}0IeR<5%g5e5
z{5$yv8U2Ufv+r+z-WR9%q@qmbRC+jbAm1b9jZ59*K8Q8%s+FD~-^0rx*Q+b}Y0+)Z
zlgzf;<aL^E&HU!{Y18)ezfRxdJ2XA^vvPKNmB1&PpWN#`UbJq{*`a+O)N9rYQz<dJ
zmUH6POi-8Fc$3n?;7zHAbAw+xMyPy0<2~`h^0;Zd+kKa^Cr-R`S>M%Zeto3b9kZz*
z#kWI5IPWe^x>?Zw0o3Ep4GvT(nckIp*!B#l+rQn{b>f9st!cd9uPy*-HWPJqDqk64
zc1OHLuEq7!R^wAF*Uv@RiT-oAdQKulN5HaK0pvg_tq_hKWp1ApA)F~3JIaoITDgH^
zRoSrxPQ4A;={obd`WIxS^Js~1f~5>N!BSHpQq#dwQy@|sAX0N7QuD!5B3uw%T&v35
z7S_D&aXPrwc$$A}V8B*mHc=_o80+MpArh>i*2w`20}pI9p5@;f@WJk3b~=ydb74`d
zgST7O&ox{!$2a5z%X^`HWydBI=>;wn+T;1-mZbBknJ%p!ALJm41x2L}Mne?4hIp{N
z7XT}U<k%m#Bwd@b(@o|IH9nZ=RNnw%a@8()^Dy9T&prdi#QkZlTaBwk{@bozRJM#A
z)azzn8}qj3sdHT2zOrY5=3m!upY($J=IixGx&Qsj{>W7G*VMJBORjmt@~qOoqFnp_
z&EmK8><4wo-#RXQkPq#Un@sutZ$ZF^@9byWWmYB&Flnus>-p75-hQXlg3eo#p4}xe
zo66E|3hZq@pgd{a+>4<6*a4Dgo}+W}mL%iHX8k~G<;)4fDv{R83jegL7nQkPQc!o@
zROaUJNBpbH+nyzkel00)&n(XQ&7bqscUPI4-L6?2OII+?<5V>*dXUNS?#miA=f=i#
z=aVfmHBwD2AB7hkIAFXe#fi^>*YVH~&%lHSk%2~v><ilx5+2=}S!QF)*L-VcnSr6u
z&s#G=UG!_shQZd0Pi_#OyLN7+O@Q^~zV!7~A=Z~c!*2`9(s~@{Ex8)%fAw4jsNa75
zoW_LtZNXcOXYo`@U*2lmzv-=gK*#r&w<LeQcqKP&5!(;3X;(a2F9_Uu8F_a<6Z8Fj
zlQ=D9K>hajv5k%Su_s$(x<HQPQZ(4$<e~P&;EDjtnMRPatoat-npq|w-^sewSgLtf
z?c!UKtWEC8j&ILY1YL3vzi7Os`;GFN?yJIUxc@LtTjFB7{}RI)%|h`Ag#)X#Ed$Q4
zGhtxeI46~rX-={#d)C{_3?fI0%0xK|@}|nHF!g5+5IC(K#>8m1VUo;>m0<4jP$ovZ
zHIrmky!2y!qF8qQd--eDb+Ufv%0C6#KR#(#aV~phVfYQFg5}50*YL8<{T-!tXX-YA
z%o(x2t+&6PbOE(zUifr@En9ipou^?kABv*2u6%uG=rQN%q~#V57A;>{kh%cWtdIF4
z!XEQaM>K1DYQN(no#~E88O5EvTW@9F1oZ(}0}BtRUJP1T776Ob7xgcF)L^ZnD|+f4
zxaYk;sPMqusnfWgegv6xCwisDgL7Wqtwz5<eT{dkLu3lVmo9bMS=;aUXor*kQ^(gf
zx-*&d6IR*qYKSyXkt|RJ_Xk%pM%`a|vf$}lP;c)fW7O@;lOi`5gKuU!Oq5$tI(M2+
zqr5@rTs9F-rl`xACq*Qff-hz|OjKI%b<Q-OMrDJmbJ#>YnW9c-o)n2-3O<?XFi~wm
zDM(7)Aao9!NGDU&;Y@H-``}84bq&Fd7k>GAFFPPI<CQOSmk;CGyO8GU9dKiKm#^<K
zP`9wab#~k2Pc2No3v>^P=1BRS65>*6EMo~@lWC#pt`Wd;OCV<9vWH7}7CH!I*cZ6Y
zYMcD2naOs++XJE*QhulSAT7%|nedin;<85zN@vdUZk4!TF;RSh>C9Q)jba920=W}!
zq;B^(asNz#xYT_mMa{y`%G+I?6z)7dy4}Nr@6MVNxf2CAmRJ1{<2>0on|r6O5Ys~z
z{`*RbmIcNNAcb?TJ&aaSVb8nwc$)`D%Vf)%?v^J9&X(N~>x|vwx(JkP4vKY_@yz@D
zLsux7<K34ZGxaySIvGD)XR_P%(MH{#*SbPzoyct-UnK5G7EO;XJa9U9Wx(~_ppK&V
zyhjb)^OhaTo%jNjfF3Qkc<?EGWq`kV6=?K^M~iQVK$O;%%e|mz*X!tF*6W<c^|fR%
zNUOiO2z$+r#FYWx?t#+Na_KH+yE_{~H2U9zOuEc_lu<q}LTk#!?-DBKKD}&v)WC19
zBYNs>HILBo+=&5lCEYEm!4Fu^h;c%?kaxs7K|PQw40n|lo-Bw~sp1jSn8XZLmB0>C
z)%Atpu2SMjkspkkT@N)VIXZ0jh%jPpJCHNcV1b9=1zjO<nu%87(U`;n(Z&hZX2J;8
zR>1_;76{R{>_E=M08l_TLNsa`fHWGhLNs!LHTp1uoFdY}^p-QPyXD~$n}rU-8Qula
zDm<_r$!(=XSgN@r#(CIN(y3A5LfwOH9uj`1__@9`Y-8T;dZ-|%EI@&Mi}Vg%p|;6I
z%}k~X&K}5}7$8&9-SR9*k<G;K3F`|n&a+D$xFxhZwt3j3ZTIlVb}3)@QCDb^khy(P
zv<l0i*f>c1cij==Y%EySo<DJd%#NKCZYwDY_<i`GD>RAOoEfYzQ+A)LQ_+KGwt3wx
z4i+;HgA-fM@!W|Od+Kk*uGu|x>*13>{p?<)+gP%luhccoTN4RRJnIiGD2_kfB3&%j
z)KX}i(Cqm9z%)+tZ=n81+99^)bFI3<c|1`aDrZh!{<-e&Lf-w=sWpnm0>{tmxjm{7
zkm*vNCcn9Psq?e#8%mb^ta#&bqv4Imk=FSWUU=`9m@3ODJxy6?^W>$<Pq%L>S@QG7
z8;=_g-gq2oUcssPS7Vj(*||%V6K`Fb*wG#+9Q3O&#C?{ukNY8&Wy*s5OVpNpQC`_+
zQm=A#;s*C1+0GxAOcj^zuP9yeGkIlSi|w>m9!J7AaBBWFU88(f-nUfc&BYLRC6z)a
zuk0lES@!c@dE9usvd?A3qn0Vtj`nT2@%+-v1HF2(s}9M3ijGxV5us4TcJNKv%mo$A
z5pT+8E-2zV_@?4zz)xL$;SdeM2g|1Og(eFA%+(hTSt0n~*mS<ohk`%Xg5-oAJOjxI
z{d^0O6MDclgD>=<&`(_h;Sdes2Wm6;LKB65<{AixtPp<S29gv0xfUcR@*oW)C-U>H
zfo#@B`DM<H(n(e!t$|OrAMpuT7}ziy$~y|?NhiCl;9B^gHff`In$xMDF0Fna%r@ST
zH&%R_v&c!UVtT}zi8Ens7oBe>eLO5DuMpt8rz}>Ts<vbfWOAYVuaR)jIVCNXrt*%X
z^Ja2tJ{J(>Iw*Z4>AsIUlli$XN4GI_es4c|4<y4c`pe;_^AGd;zqy5lzGYwgmA~&h
zsH^eie$9M~m8<vvoBdu`q~`0({Xgv-1Fy&bm)Lqc<U;(3xca|~Z~y!CTK;a^`u)p1
z{4OR7d<$8-ZokvP>+zoz)n6KN@IKvdt0D5|t>b4!_g4}vZJ+MTi*Wt>x8Ual<x(Ce
zhqdKauP(lkD6N+LDqv@|^KKuTo8-FN?=uuWbUZ1uk>Yr|HShf5#siBd-2R%OaK-24
zH(MzVn@>CD_Om&i?aO<=xbeXK>pSm)cpZ8FLA*;lWhbyXoo)K`d=+za<>cS9-+#M!
z)kUMeN1B{wOw<0Kc5?px&i~EtA8+oQ=<)CD_r4Rch5ya(TMO7po!tNPUgL_@a(~Z$
z|5)*D)%t(Wepd+WfA!{m&HIikOSb-+{a%)1ADHWKC3g>)JFopFSkvu@e=(&C1l||d
zf4*zCYghZz{=&oCH!N|}YH54mcmCBsQHdYlruv+C2%0^tf6v8J^V&=8Nx&5Wm7Z{p
z#zs*mBgOWGZ3+pCK<+!=clhf48hQRl$`k+2elI(5S8aIx=e^7a7lXMSJ6q*%^NTsY
z^{G~@ym>qQZ)!gK!_(`2PTXp2%TYP+Piwf!mqXF8xju1iAuGvjvy`_!py@ox$cYy;
zZ*F?HZRHmQok`WtmU_Gh)<4~Ld)cMt4Ib}aPFGrZe!q@%-fS<B;#{q+mUlrLb9T7@
z0L}evTd5(m%lqi2hjP!pE9gwRy=;-k3q8@(ZNIZFG;i?8o86_faCeA~^gC`R{zFPX
zZ%L*$f%^va;8wm^#~jBAAP4e_YO%yvFa8PTc(H&R_z^7N2EN+?aNFM<-1hH+NX>vq
zc|oMS!BVFnQa2z{eh?{tuoM@f$FMkHUzyv&2e%|oFF&NQ;+AAHS1;4Lxf^S=dYV?v
zHC%B)<H0S-v&)?{D&~LKYTP#Eb0^o_2f2r?pOb)&0dU4!Cwo{<UlG80Po?H<kK$9G
zMNTRe{Sd_+T)hu;A&S8nk^`)`eMJDrJ%yULJxT|+8qf0Ubok)0&>qxl@oTjU_*Sr@
z%q<?=^*?k=(zfgWywE`F%b-re*XFQwWyd}#>f6U#e_k>B*Y#-6FRgFBUVp?||95Kz
z<Gz2hlq_BQ9d870-Sv-)HNO6A`<x}m6-=i5|F$6D!**!@LF!a}eSpS~-_6gQ`>q&r
zFp6F~XR|CjeaYMn@`(O~o5P<4K3C3pNG-WJX{#~QBlaXnufZGKYk1%dl6u18dF>oW
z$Ny9FR?MAfa>8@snz@1k|6Oe%y$!`k>(3gu|AF%2y15hk*Qq&aW;LWcdG^XwNHtm8
zu09!%@Ze^Eks|y2Hig7LEgA+NdNgKEU=DDeU{Dt%B2f`G#pi_M3Pp(-JIa>H`u87R
zP_|6gr^jU<q`UAn;mnnD8Afkh)3ej%_^+JX^7!UzxvS^4H2(<IUolrQ89YUf=tFQl
zS^hBOZI7Dsy<;Vij*iHqT5v~aSNqZxjQd(uO@kCoSjwxyzOO%UVEg(MCq8#j*QPo=
z;X!n`kz)IzHig7JP8>XI1SWA>@|dzP7K7Y#zVGmgvSqSI+>;#N_8eP~cYj5hTjPU^
z5dqf5^QM?waQ(vbTIn~(>!hzNubJu_R5b(7uQy>R_PWC=#_{2m7vGi5+Pn^qI_Z&(
z49_D@Hb(sh_b*~undU^RvS*zI^)EhkPIYMDU!%gF^$N_*1aViZuxIVM%uv~J_v_!g
zRgKy0lRwX`xpKauh-cpCsH{7p+XU{s{Ae8C?D%}&G|uv+x-L>_*Z;A+*`=~Y_I&J{
zZ-M0-ZySC|%Fc_i%;-NjSFwDjDEpo})3{3ag8KnaH2HSC$kd9F%m8&E#O;qVPPg}N
zy_E~@LZk*19%#J~w6H7++=Xxqkty)p60#z88o1Apywc(UpSO4GrthG}<Gb}CG6m&J
zmpWC}fK2)xrp32o^QEALJ^Mgy$=_O{>~}&lR|e$WPo7}0?m}?o1uK7V&<ul?KcsmW
z)0qyPVJOcsim3#1iW;t!MH#V{9SA9t3RuFP5xZP9_yN05=yFEariN=JQJ~ggNQqRy
z5{?X8kQ9fH>2gNbNe$PEqKsIl9SA9s3RuFKAq$e?^buXo=(?!kS^;Qs?LbI@)&%Vb
zAqrdSE`w(nsxE_P7|g*l3|i*k8HT*z$(jPJw}fLZE`zrXS!cIRhD<aa6wQ|MJ0-{^
z(rCsKz9Q2?(^*4+<raU;#AOec{8`|@pJ83VI;(B+re-F~1$PgKrc3#q;^n&1V8$Fi
zW2Hq#>@rx>FvEA*v!Dg6J)$nrDrGlyg+7@Z-)TLz-NVD{&L40eqP!B+P-HgO2DkrK
z%0b$HPT=<6K}h?L2dr>;DWtRUeFvzsk-`V=Y;2a@?wTZ?KQW_y^5@tMu8U-wpWD=R
zACYLXwyk@1I%nbqpB>s~^Cnj0a6hi<cCntf`^MYF?~=ABzc_mB&JJB6Jbh453tlLF
z=MPQ39e*O>U5Mr`X1x}87lM1yqXzFqOPy@*f_oqEKEqzrKEq>BQv6xsTzH^edKy>i
z7f|x5*|pH(!C_wS)}r5X%|{BORi>~*n)%?~fs>)fOvdf5i$HUprViUZGK`?zizkpi
z#0{`2C0j^mpbpZ95P)<A6v17AAV?qL0SCA%paSVbL_qowz7TEmAlgJA+CV)BkrTNS
z0~FBv5Q(5ZD!B6z40a0ZB8TcGaM!_K;{wYqA#m3r(y3A9LLa2-07*6At^;(A1JreZ
z_Cs?g8qAp@D{_MIEn6O_S8`{818;_LL9~hp`(34lJ3~4cdxa|*cey$hYhGYF#<fUS
zsQ;#}&?Tvhu^BbpElZA^?FaWEri(-3UunCmlfs-=kj|#w6HsSU*ap(sXaFmWf^;@2
z`@x-!XOPau?ZRjkInZ>->%7#r1x5QN_y3ag?>kr==iMuvEe1|J*#<A}TsL}nY)-2}
z;vJqF2^TCkq#o+E<#s%@W9Ei~3yKp@w@5dODY1TjdiV75&#}LqrBC10zRdl@VUC@(
zbmwKq42^f7$&B(1XB0L^N2GaNu9%~!$XwJmW#5Nlm0y?6yFKOMl$<6URHuHLM|1bo
z)Hajevywta7U>=@*#nE0JXyR#^3oF>V-=U^G>@0<Ad$x_Brl~H7^}D>rFpz$4=P^r
zM0us;r7s>?Z7nvFW+^V+UvhThr1(8)9+#6>N(z07$ZDJNkIT&6tB!ZJqHq7QG>;RD
zS4sv&2|f4l^qr&V+rK=`<HTc-i0E?<&&WB7XTR+{Gh;!o9(YD0uXHAKMk8-Jct+!|
zUh#@K&QHqsoLR6bI__D(LKlbGacKdfViWIvGiv8DWxDmlsCm_gjyKn)TZU)|U3fNK
zGNjcrW&8d!3!SDmm>oE?Kr2RRH)|T7=qZ*hoM~*KiNZH?4T@I;s4wU>FkZnm|3qHv
zOy^c7#@x1<;3*C3Gdx+_<kQ$#b2}gc-e*9Q7#YE5cvc<K*mOJTS-`?T2kB%rNEc(9
zd0HQ|Ig_-_KCN%c=1#7e4`P$Hxu^9_DemN&`oK47n|~U7PGeg*NIkekle8@!q`rfz
z^MP#AwsesC4zAV*yh+>g)7n^a=ggb{UBYzB##k}*1#>F@!TUAy_kzbrfA0TjXWjLG
zp6kD}-!0Wkzy7^nGvE1O`20V!-xq7V`t@3Vaa@kpjJ*@~{`=*={qNW7_PcoF>wPEA
zSp=T?h^=pJTEG99v)`p;0jX2<)d3nmZbO?gyifPrYl!^$3+-|=e6p53zWAo$t{bl{
z<PN#3Z@#^;Ik0W_jrTVk9|)d&Q}IS&%5}YOHe~`8B1XIAtT{}B^}gAbfhIDn<v|k}
zdf)8I1b+Os+WdQCbAa)qr2on6jr*4xTPs*|m~x+*znU-SsqeG=ecwTCo1e*dKKPJ6
zi?R9F?Dv;HezA!8clP_sgd~-q`p>m(Ct^Q7y<an*@!{f$zh=KTR(Q2){r_jbOKhsI
z-o0NlpYKul+~2d`8@ps(Dysin%f=F4`YwOp`Gys@Z~Q&`T~fe?zZfL!a`zahC)8Ro
z|L5%Ye;2Q=j`$~GUc>F3wZtg{G@$z~zOgYs{$z_xA84%f`?>=Mwy#TZ;&bJ7JXFyt
zAQ7RcB3vYq#le*J*ZltS$2SXK{CoDhL_ogt&i$JCib31ggPfpHVFGr-kvoU_-?Dcv
zC|kC7!k#y8H~-tTz4=4x^*`Xb2^;@^hqQ&N9_mWJI|b?w%<dNDoZDk6y$LizKJiY^
z8jlxKa&8vf4yh6lJ8AnlNaf4Q>F{}sFWwU`JdcOZW0=9FB9#B2%wzC>Mw!Q`HGSb2
zp@NvlU|q<bII-q!j}c_bz#iNI;C4Bu0Cr#-mnhS^xfg4o992l$UkBXw4^W153zWg#
z0#}HX4@628BBctJN`*+}K%~?mQtDu-R)`d+GZCl}Z@oC6;B60hDdF25&{9J1T#B0`
zXf7o~q~LAOvtUJ$J^tWn2}tiBJS~wfENXOcH)LAEJ7fh*z7Tj?LM>2HXpcKsF=Vb0
zqF7K==%6)3v2%z9OTNIqGPj8jZb|wscTuQVazP%<bduMowg|CatncG-V|`@e+a9^2
z_2*ZunEMjcfB5C79d4ccbHeob>*rQp@%{UHt;#Q_Z@;oXHtqixwTFSc{K%D^E_ZpW
z@g=_-{1-se4z5;upec#E0JW@i72ZoZ;ModhLva6LvMN~WgDOa>s7WO|o#jY<sz12j
zvBU%1?^p!scXUozGq-X|?*GQMdpxh7JK-KKyimmSfbqg5ZhSW2^|>h;1|M=XW=?4K
z2lXwSL?kNQrudv-1og1(HMw|fw7t}xC|nWX@rkj%+_(IAVu1B!J~cO`cx&Th3jUX>
z4AQdFO(ef9+Pu}cpFJ!6*2g!Y{aNX^9RI8mzjCg}@WkXTyI!rlCF$F?r}yP8N!Cx7
z3s#l6O;*fL-c|N2aNA#Yu8(%H*2<s>#Goq-_YX~yS}6eT0R0Y6cyJrkw^$770PWQ_
z_^?)c<^*TZBH}nj7Pc^slPxlBQcVq(;Q5l{iQxGX<&6u<+>!&f=Z9D?cKDE?vtq8K
zzn9btrK+~liM1`I8>^a18|@EFnzG_~xKx9s>N_TGmWonU_E$HjvMo@Uwt0<1L-Cp?
z4r^<r8k!=`tz%+5w{{Zq)@PXvTuDEVcqtrU51Yhn`W4LG;-zq)J#-SY>D|l*n<MXj
z{ma{X0Bt1k9al8+NaF5GVoJQ5t@rQw`$6wVUXK2gb=zxi#1>k2#eFt(%_^GJv|;(F
z*q?%2d%h*xU0G|xx^UsN><1jI>zb48uISpbo^<|N{p;$dd1-ksKlGiudtsK`R_;y5
z75pddpIvOeS<U%v;~T>Wg>v=hc`3ean_kN`vqsID%h*_yellR$-Q*1p-lvTf0>0=-
zp4wH-BbJd_!^Yw@U-htVQ8JHM#?Iaw4F_V6Oyk*ppw}>B!Be#)W~T1~(MES3nH@X9
z96Q&3&gn~K+iJM(^r=rb`?(_i<`aoM8@Ap#x5Lr$*n@Ku;;&2b?OKzmb!UQ1@&t>#
z&}@qri<Ye{U@q!$e6+)K?ZXA$vz8s=J#NU>`8aG#TeDt<?o{2-16M$5ZL=+26fIjB
zaMartB)hq-SubrC*YY>XJVM9Urt-4Ko-z^jyK!7X<=iF-x55KK65g$szZ$Z2Zq{iD
zl-a;@Ea+iMEy$L0GN+o&o^43s+LLg)+EIf|)A)wijDyq6n6FPf+z^zvLARh;_buBx
z>2}7YZxW&t*rRXp#i;W!d;L5Z@PM89E&Dp|cE+VVi5dnijb<#@8xJE^LcZRY=%DE>
z!KIV9K=)wjJ%a^P)OlFv8C;n6U{{_5VpXH8xd=z@4p77Pki+bz*V_^is~<~m87!Eh
z$-}zL;KH&8zjBZ?#hUSGq;kz>3chh+*@G&uj2U?C;=$4zAU!!;K8en=n_jO6nRY{D
z#-TPd*6Xo{8-kW?&@^b}&E;CRy$!VFGB|-t`j$vcIxnk}ban)EE#%j$2qO-uK^HE*
z1I;@@)<x=n2hA=()<sUP?mq}y7kPXysE+_y7y0NOcr6xqU1Y&~L-@ML9p4e_B5zmo
z2xWBmBznwby1o~pR|2$-G7qA@ZHi_=?QO`~NySvInDgHt)`FC;M^c`Jr2G~_c|Vf!
z`AEvs-Wz%>$W7t84Kn^FL_KI-<h(Z!AA;6J+C%k%)<ud#eds&WsZry?ybZlJiL)V-
zUWw9?hs+=gst%bIwd6v&s4clE9Ji+^if}N!Wxsubf19Sg#s%hEeCL#`Exd0!Hp*Pc
zD-hdxFcQ*5ZQgu>=Uh?RfyWo(3dAZ8M#7d;JwK^;`*X_nSCyL%SI-0YPrup-a+v@4
zFi(9FsDEnf&jMNu`MmSVfwQeK=Y<;!n0en<DuHIau77q>m{aoD)*n3MRW*;JB{+8v
zSYcVr`N^?&J}&{ycsZV*44(0trw*O*y8PJ%G~;#q^OM3?m78L2ziGYmbsPU~?L7C3
z*>=l3)|Lhfd<)sBZST~0z3xnV)bC{qCRd7hWfmSNEjZI2#l0NF^#ySY&$LHLgSovR
zZqb?cS)O3-SrE7QO#7_B<qDM=y&JN2E<Qflc-1_0^M$W6ot_8#_E&wlnmj@Mr2jIm
zmUByI@qB%;`glU)9hX%OFKkwwEa1K;(ac&jc?HwL;uUI#b<2`@#7_7w;A%NHe-_X7
z3%!OB3g(qs0#@Z&Mt79Vk0mrt^Z(AvQL`)mWC8abiDuR)yZhz}AAasrJ*=CT++!0^
zJz-nk&dYu3)3<$Fa$#-GTSvuR8@ArrG0hs(5&yI6TET@>-{6OBPb8X;6t0ds>?m&P
z+bTT)T)brRvd3OB5zVvcGxU(zzQ|Oj#4&qifo^#fsO(ASWsf~)BKm6kD^O>8b>v}3
zabw@s;BTNp?AoTbX1&x|T<V}=D*b2l)<+HYq0w4%*7bwt`SP!JG5-t6U0JZn?wCSh
z%xT%Dj?wQTj9B9iY`J5&Ab=+*?ZDPMFAXCWc<^4BW<AZPQQAPaoJV64^OmQ5;KiY*
zWtqFaFy!uBd=l&!F%2OWh!lqpNJ@k;cW3fR5eufvMaLVIJRQJ>PXin7Aq+859c-cy
zD?}TY&uLlKBHeNk4zR`<5RJhQjmy9qPl!M?YJxQyA!%gp@?k`B3Z_&ts4ow83Xvv`
zIt8>c78K>kfk|<wfM;dbJ?(>!yy=$1XJxZ@Cc|cBV@}J$XJw<_!DnT!7r7T+m}Wi8
z8&tAA082my->w%OFMyP65K-tt(WmE<w>>@gc-7N$%J+)ggC0F|U-z`nVaLJt?RO^1
z?1-G0y;E5r@5DphauxPGy(dxcI9jALDo)FuY@E%wbDA~N!zI%BJC!X9KFeJ%a#xs>
z^%$&h+vBKrHuvn`=r#2*7Fk%{Kk5FrNB#H%%k@i-S?&g{C!POOipT2vRv(Mx?E)%2
zvl*p%tk}2t?D%@ZX@WtXT8_bsm>Wh9uc?AYR3tYZTu_{Jx+Qu(c*gb^Tl2YIUE#dB
zpv9)uEEf|ls0-){=j{b^87?MVc+RgYoOgGVfai?K%Rk@!dG)H_v~_3q#NPSgl=e}|
zes{#)W6cjfl_vc({C&VGrA|4*eb)L!S<dJqRzigj)m467(hu9z*P@%MEVNmCjq+3T
z=F%lUtFBGlz`9mhkUw92$(P5s`%L1mS_y4iQ>x;`roLngU)hqMx2{dxaCEJ*pqGW>
z(xn@e&xY^lYtb!~?G!l7skydIHgn&(Qk9&AuRU7i{5&!p-*|j(e=EybedFFl4$nCg
zF3q|z@frUeYoTuk_9_dmvQS)_x=~rTioHZ_L#0Fest@gdzHQ*t0?im1SRYZ-xThdy
z%c8boj<dn;BUT}Gvv077da>N_Sl}EQ;ZnEy28(DG%MG6e&Y=}9b-Qn{h<35u2w318
zI>V*z^bHo#RV+6`7C49QaH+d}gGKZd%Z-Qy&Y?G4>R#Vq5q-sSBW8hf=nt2=-#1u9
zxma%`EN~8$aINExY>)aP@gg8$awA`8qR7wO6ycBzk%Yw%-dYH6bEDuY(9}^xiS&#K
zMRtJ;h4=XC{NnZTu$;YO0_QzdF<ExCC37HMy6$<*!a?U$v|O6Lceq|}<kWmFC@OU@
z`pBa92U@0VhK#jbtW0n^1=%gO@rCV$i3grB*KX8xc=R{%Vr_!csh`f^38asS<@f)U
zH2*hTy%#*>vXy^*-MK9HkM}p5xPE#Bo+0|>=)Lg4>h(V-Ot0s0a)_N5Usrjz?rh2R
z{h)!Dw})51zTfxgdVH|T@)w32)vLm;$1i;Fdi~D{lfQuHa^*z0{(Xba<vRa-4_Z-L
z4_Q&FxZv9E=C2uLJ-hxMtm2TLdxtNPc`?uRw}NH@6)r`)TX<VOMQ!)L;qV~v#9I+F
zfvjaE)vdfNa+P=T5}6mKxo?lZ;qc)7>pOiQp3C<18x9ZhU*1^<;vF=<{$45iru?~c
z&A<ECsU7-jSfe)O%8AD1p#5C4cv#uy@xr#5`FAiepYMQeGgEhMY)p5BZZq4t_fPJZ
zrGb6Rk3amk`E}zC`xz3QljN!onzB_+y4D=n@ZqAy$qnMM$pQ}LyKjG6@!(2qspY)A
zuRh(p8aloCM`-@biN({7D)?V|waQ%K$ExiqCvM+J+Tc(pmFMum=FTM0=21t6z5Dm}
zizL-sR13ei-?gj#`|%Ia5kbnLPM{U8rT@8jYJPjEJt?>%pwhFyoRw`~sj6_1255z=
zcFTbST#7R%91d_6F!*l1KmWY!UZ)cu-&jmJzm9E@%n|n_@BTdxblFOOn<>~!NDJ6V
zMH@YF-9C8|dsU8o1j|<Ax2;c7^XGq^zE`$IfA=%@Yv;ZwJgNL79yjp<cmB<S@O|uw
z6Ys>V@pzH4<|cSzwfjk0imTJ|6!_Hc%;`!C{rAGBc9+L@wb=dNl(QpO3w3JuA!sP)
zHf(CQdIoq&Dtu~pwIj;Bus#P!b9VX^PVltqpGMHMYJ@@&n<L19CLt>XK;s_H5RQf*
zWPC(01T;P(#RwiBkpqv9Xb3^1guqf-5Gg%~lrTg}7%XK4k+OqGfksuHg7$8{?Q!~f
zOR^O*-@F(+-)w?dReEfJ(_+wy&iSC_7myiSb*+-7?U3nRNNxpB@5U^0QmvQ_p5BEl
z_J$}{)-q|@4w>HVUNM2=o+4PW%pxbnislbnjk{Q`pUbdPWjd(b`i}v`1TDNcyzrJ}
zZKBhmy0cu_>0dPdRfoBPCgA6-y2>B5^Oof4_C0@U-kw>U_bNVL^&)6vXSett&~)z)
zGB<Wwf1a^!?nJRWbq$~)7u`#RC&3Fujle@LY2Kh=75UM%qb(nY@Y>P4KcBvBFF#nG
zT&-BX_wC_#UAF_j%<9(+ntWNL#WwWass4ZmTjf75%zLWI!Minv*<GVRR_61<yqB6D
za;xrN{=7fmTF(F8rH8U}cP})x%@R-PcbunEZ~i<l&A06qGia~gJHK;xPt4*;y>83K
zy~V_und#}dNeg{;A5UnUHZ9#@!HY<vDW%^fbS_-_!NW1d&bux8$uS9?3q{f!85?(Z
z=t|}_N+)k{IPH6cjpd!<wv-)5b9*MT@3N}5n7;IF&QFmYvi^Fxp91%9I%!yun7wmu
zVRKQ>!MTe2*O|(cL|zWrp=fzbq43VCYXuiveS;sefxA7~QHLF;oA|a$_kp`T8NBSV
z7oxPHS2e6Wu26WV>RQ2tr#`_8yQYKtJ!!n`v1d#~{cawYQ0a?4EycHMN~YGF4WOP)
zs$tKghNTA6xR$?8<`GJd<XCKxAlb9@(8*t*&edGYDeSpt5>JX$9Gv#O3DnKmpli^q
zo6ELNxt($8orLHIY|*!PW6b%Oy>1@dc7Si&7TFzsGHg>mH7`8C&vuJHMw}06FDi38
z<5HPKje?fOGM4MLhZ};X8Hhw2a)@qvy(iH@(_eziCUJr7!P2{+Ar9!sidCM5z^#JA
zlQhBmPp{{KhDi)WW`Kudwtxmupqo*@-bB*03whAxE6SkD29O@upi4Z+G}xfaZsb9i
zd|uFg*kuPq%(iImI48x`Vs>pq3Uu6NHNuEiU&uDnyLTXC6`*aTaql2w6`)<J>PVw8
z{m`)r&@R=ZkTDPNF4c#K(U?-C(U@P`ze}iG5P)not%m3|0PRe@3sDc+nfhxRWW)xv
zGj-luh_#@dsqsk4uOcbmf>17pq}(1!`PqBP6C7@z5ZR^~{NUFnh<eayj4je=OdZl_
zj6Qrcrj;phfo-C6<sq}DoUF4Pq7RvEYRQExJ8sE+!f_kArS0|!fo;%50^26a=LFXU
zEMVUvJIA%GVA>||B7p}wMa`S1NQ<ms%w<cTC^_dTcthI*oli}hr-+MWFebAGo}V1M
z?fJ>PtDjTazuQclvg7B(*Of{Fc^@8v2UfzKfCg5iiz?0wgV!9-Q)ha}CUx(#OVNWg
zhjq_89V}iRtDfh<cW2LW(7?^|TM&hBcg$1Yz2mv3^_)5Ho93y%m9TmK(boSMWLe3w
z=bdSXVl%frKl%8|=aik>ZgTH@ohx4!ey4BI^%|dvQLmRNyjfWkUf063{_hO_t>1hd
zGgds6vT$mA{a^<FRxv*icNU2IXa@gQGcZ@m(y8(FlNtP`lfm3sAnvmn{HBZj96tp}
zC0;FZ?^jO`vGvb$x_Y_g-11p+UmvUnjSSEC5#^ZcZ7TWdVtD^Srk$N3jTb6ICO;J0
zW5~w+L@kij>3M)}TlAY_5;_xRJBV`3wKtW_TL>zC@;-$ql)Sr=vcom6=OB~r{CCm<
zKT7UTdMLKTkd1pw&Axnx2cK)b+oJCrlc-$qO(FMg(Q;6^^wx7>^vzq%P9=%iI}1VM
zDDQZFmacuc;52CX_atcKBy4M2vtHILE^`HN@p4&;Z`YDctvdzaabwqPix*ATf*wY_
z`vNL^&P(y_nv<z@CI2d+q2W*4vyL*>ui6%35i1W`czu7BDEpt4w_sz#)2vT5Z@aTG
zg=<ek=FVh?g%V57G-U6*3>w*#TA*95Gn2_YA?lq3XnXEyS?^^B_-0JAW)peIc&o^L
zGT1RX0V*6BU?~BxlqS=yqT`b^3s{yt?PGME)BrYIrx9fML^X(s{ty$nAlgJ`Ota>C
z67^0)0Ibn~6|8X?M57Nxqb5XSFj!*>l19)DS|q1nN*xC;$N@QpNE1h$0@@Z0igM(@
zq&QR{Yo9>lE6|;~;9(TVZVJ#aN>E?G0*)<;JEmE;O*U#_a$NBDz}7p4bD+EI*FEif
zv_QAqWIA~H6IcRLvVq2Qpj&mpqR^7<^xWe)r{^9IJw4Zb&(l88DwdejvW*4J{NRC=
z%}Upc+!gLjI2`@XgYQnviLG}8Im|D7m}U)L7q45+a>&#CUXeR!T|8*u#^UNRu)>_<
zTklkY*2S~PGCx6G#Zp|xeQ>Uv{by5&l6ToN3y$R}dPtZvn@N=L<;*O2JrT5~#pg!C
zg`FEx53ThEubEG3c6@$h8s~PqNDiT6XM1?r=1NDa-LXnl^pN<@vFP9ee}yQuJ5^vV
z!=i%=&dW!s-Px6@ILTl+Vmoi;?j0Xn&pa}%E8AGr%YN|b>nop<zcrSg_~W*r&m{h^
zmC&}1Qk6%C{5`%bjbD=@%Nc#jO(jh~!u?b}+iQ={U)Lxna!0u<$=&nwczJxgZ05dI
zr7Ag*uRU6L{5&#c-*|l9x>h-{JK9}oN`aG?ccS~O^#!t=(T}Wz6x)P@qIj(@)y#eE
zal`5QL=M|I6D~D@23&4i3w_(LS6Oh9h2m1vjml@`ca*EVX{>fv3Mq8*I-TSm^@Z<+
zPr~O0zR-vKKi?(_gSP-Cly&$9>~Yko;_wNuY)>fbEM4)(Y$K=E6pjrO9okoI==c-1
zkyGmm$A+1pk(-V`Wg9uQL^wArbZB2?(D`TDMoz5|&J8Oa+E*2H{@Di7$GKr6NMGll
zYao4`8+L;9b^iGV(#N&oAV^==AF)k*TVEJnSa?8<S$5SSjZe2vsI9o5alj42i#`eF
zr7<gqfc64zd|_sw__St`lX}JMh%cbg7|3BgI#zr>u;sgAwxH1%&yWt5_k!K)K%+6>
zUR{Ul{YFmBbnvwLkwu>mv`i_6taiCry+FC~Ec>sd=!PS|4=?(Cpk>PEcJPkCM~C0-
z`}>mZe{xtgxPO-=ANP08)xJmj(=)rC9F>Qx=AGtrFg*UVqW*u0mWEw6`~Q5}^>^0G
zb@kPX)qiidhhN_>dz9S8_3W=fi|c<kgBRD!9s)0}SIz-1uIH5Ic)B%j{s!>kdd(d0
z;(9J=(Bk^Lhro;L_iq3%u9rQ`=5)3r?>vZiX=f~mH!xdwSMGjQWK(_h>E_j|_1HhI
zzIRFaxlT8D%V564htT|!6Si*zoqA<*r{O{64prxS$HbZ$s_LudHIMu&_@;KRzND1@
zeg8u;7TLecue(3bx~g@;<C}#V^J95kEIay-Op~iT7|rwQTdqT$ftf;u$+nae-FfP&
zpo6tGaAc+5;y!u$p51HxYHN=8va|hb=Du`1@%f4V9;Joi_clFTR|6Ut*%>kM!pVru
z;GME!C(oYfYVkWc4YpU;Sl`uYeieMLuK#`!&f0&eHwz#OWDt9G525bWHP{at+kr2T
z32#POAQLYDT3vJfoQ5!X8T}7t&@y_+(OPp~LXOtDC3&_T<l2lC0ZNeND@x$yE2fa;
zD>jgoEh-Qx6|ht&L@EX%r3R5w151@cq-r2ipcVAc#r3V9wi<J>f(Lbw7QH}+XCUig
zGVCBnYk~IbLXXxeI|e^m3$$N%C*)`?(B@v)(OMwIkliofg)z{hwLpp?gQX9%(?vMf
z&AkXeT5Imb63Ee7TaBSdYh63{0(`U<Xh*dz_-L)I#^9s1Zq0PRdu9JUuSNPP>-UT4
z|9HLrDEEi2*F{chR`DE~x9aNGaE%|ovhALz*n;-cZ)b09+HVWlPk$lc-*3=KTk?>T
zwm4R7D0^lYYptxi<1d5nm2)0ZOCCd(*QbJ)*PopRT0(CxAiULh5}RctL@FLErS1V<
zc_01_v~b4JuPfzkPs0!WSCD<a94Bwhbiesc{>G`<C2xCbN=ya40-0@uy|SJhxD47R
z>)Xb}e7<cGr{xb57S6}&E{%=pE+<=L8bC|GCNDa0U^8ehuM_XV14p(Rzpbc}VcTl_
zHX%vn(^lhT9?*9B<Yi@UlN0r=qOCtyfY-gpeFd+3Uti_;_KXDh?7Vra=3Y!WaeKzP
zxq%AyyvspLW<HrM%TAX|y<HDFgKMktC(s#OuDl<}*h9|@a#op)+g4-n8C+TE;4`?k
z8gqfp;JP*Q<B}zfdW+H{#BaJsh_6<U5dXof<JnnNx0G>4@FTqq4h`YqMGNM|f|j*d
zp5|h)IPS%F<<@f0;aP9A1RmVcvJA+c2U;HEzlMdWCPCFQAb38QyPAcmCPLLR;PPD9
z(OTRwpf1sq#dXIfCx4i8J?Qbe4an0rJG65ZFB$CqeEK&3`=<BDzB#?Cy4`+Pbo=5L
zrt-l{)Rt><RIj=-Res@tZ2M=<cTWWiNM-G0>kD{bW%11U?xo-fHX-|$Kd--EW;1Wk
z(!<tP<<8kvSM*NEHQRXp%R6`X%q*U*?3+MS&2#7Mo@gq0Y8`l?OBox>sky4oGt2r9
zGU@7`Z*aJ{IYs03JHv<tOFv2qXw**Q*?t1N=*29FnW<bb+UO1wc-nb(2QSAR=bV!T
z-M1x_`AbUw73g{2zWGVBz<OTHttX4?QYR;WICQPZ`Z3#6iDql(y4Y-s7n_!?EN}*|
zdI??oa6vby+j9cc?YXw4tywQ~7MHmUxZ874if`9~ts&b&7=!yAAMN<M=HY_VGnYAu
z>VF0Gd(KMn?V6FPHD^;lXj*!jsZ5FH<q(TRaL*=5;wYncqK>HFb?}lH0k^^fMiSnw
zlR-;j9$OV_@ZXwoc#`IaCf)a}pl(h=bOKxSEuI*6K4!0-2e%#I-L^$~N1hDZlugaK
zjj}nJ)&+Adco3(7>B+E7F=|<OK!EL*Knyz{vzO(efCn7RZ#mZeZev`klc=$wrEwd}
z^~%EyLGuhmDh@eRH@)5k8sdPCtd!mfP}uUYO*I&DIM{9QFbU*1u<Mzi0TkG9%w}Xw
z;Nck9N|%iw8Q7ppB1jKx&}Bc^H0Vl~a^yjmds0ZphRrn<;mBPBUWWr(EEA4o#B9i+
zUb}We#wtLEdhJCTjqyVojgdzhjp>Grd29fU#vDc(jd=hWE&;EN$p@`QQ8a1=EpYh`
z9p?ZoaM=w}4_*(G`yRZ02DBc=7HK`qekA3qk(6g5DMwllQ;(#4_TJ+PjoT(_<^(T0
z@HG{p9yA(Lg)|!T_XcFV3A8pQ4lx=7T5*5K>{CnbDPb;?#%(RRDV(>bsET+nz2&%l
zLU0>&<M+0SiaEiM1@}41_BWP6wrN;&zj>gO%FbHku=`--6Sj2dkwWK`j4e*jWbAjY
zJ{b9gHC<C*1H9UPp8D>b^ONtcdVZ4ceWem;*EeWs%bf?H6)~V)-=KjN^CyrMG2%tG
zpcOGDkcBP{;1w~KdcWIDl-W_)4;r}f+xii_bmn%Ut$$hJ`N?G#miJk0{cjmooO@h7
zuLpFFU-~|u^TObx!_H4WzVi9WqTJ2mMb~fJy;-+I)^+{Q8A@BP`8wVRe!A`t2W#AK
zL;0+?vzsmioHi|JVY+_MP(Dj{4wzfm!gT$pp?p>@gj>|Ybp52Ee3sf=uxxP))Ah54
z@>y<ko1QE*Ikf6&pPc`>6;<=@w5(drIoIFR_SL~~(8#d;Of3Pc=~+fs7O$6UW-St4
z$+Yk@Xw^#vc-6}yu9kBPXYp*m0bcdes3l-kpJjB%2~_;td9u>s#hsNW3%VhTUhbMJ
ze0T|3^ilv?ulKX&e#3$1zo+qR-_dLM$>FWztzA$3K;_b{$xhohZDntLap+pnW6(It
z9m!9xqYgVx2d#RU1Rnm);$@G$Vj`O70ABU7%v7et^K!_JhZdl5<F0E37g*OWJp@{x
z;vutro~cZU<>inS_g8_osISE{H2f64=w+APF@?fu`$M()egtoYjScITPhkhIJ*i*>
ztrP+8MY&$I9JJ2N6tWB@54;S;gAcL{MHaja<q~K`jM`z4V<HxK2tcG1!BRnx6)_JW
zD`He2D`Fxb3tN04CeDMHh_tXp<iyrHfeKr|t874PVjxRfh+n?~a|)rwGDMg->J%eZ
z%#}wJhYIAZG|>18WNF_)@PG-VSOX2CERk90AeiA?0A3oy!P?~TyAixJ2C}v<=Ctfl
z$LMz%dZ3aGA^|-t?X>LSli-pKA_^_prdjvjoMzp>dYW~A#c5g3&e`(dr7djo;DMDi
zSJ1%94n@d{n4J^AD`FNvR>ZJ@SHw)t+w-*V$$_)g;DMV}z2K!YH~X@8ey;exVK;{r
z+lhxyYSiVw8qbqye!gd#)blqe`-pn(f>yn-<rut>0j+vb=0@5_6g?fh>g5Pq^SMr4
z;k;VVGMCws(mYn?+kAGEo^qOC@J`UB*>S$Z7M~qo!CXcV*M5u7j?&XkDv4&eM_{s(
zN7ulNu7TP6Z*&dJ=o%Q%XwB#vn9(&bqvxj$sq@oD*T9Ufff-!`13#TT9x}iKUNSSf
z24-{(%;*}J(KRp=N0;M}wMc1n4GdM*z&Olkzx(s)*Wlm#3d@Vjbzk><?Ji!g6E^$t
z>+4o|(TA=%_ODCYetPn!zn4F~i=I2_<@|`)TQ~o2{C~&a{@=^p^Xq<|?!J3?_VW92
z@%Q)sID3BopD%y;>nlF;@Bj1V`TKu~{~{ZLu5D}hbmP;uMKRC*8G6;9tuH+_x%vBv
zIYRs0{T@|6Q7P{K@$=jJf}lg*^^<mdS$$Vzf7Peu?CW3LN%^2%B^7`1@)^;;yZN78
z{?RorZQYCewLN)!aTj-<dl+6K9DmXGQP;Y%f<Ll;UKOt9o!Yx@t^K%K-CkzTqT=O8
z*S`>mzo=O3`q%vM{==S}>t9URx#-{Q2kYnk`Sw6`Zntfn>-LYLchlCb`0w_!+(Ppq
zgw6JIwR(Nohpuz`?>-3sqO)&N`b_O#<>rew|LB^Ry6(mOyFGETdlr3OU-3h<Ry6)%
zI7Bx5qiF5aos0JGlC0gazv5>}`R?k9U6tjfKR=}HnfK44$n<ae?X6$f`{Pc2+<oWk
z?b*>kH`H7!^0B%8;s2jkxAVWm+xw}C-;}qh>a=&7T5;gv|DRX4-+i&aYSm=s>-B{)
zd;WEw@4H@KD6sdR`j@ZqMQQ8)Pdc^k|0J$G|B6@L`5GT|@cRGwe}C5h-}V3czS>>8
zZrRSQ|NYkgEt|x*@&m6#pNK`&?zqdmdhz*voZsXRd^>P&$IdVO_y2y-um7`s@>-jg
zSC+ANVrqWOu}gmI79m^vZSI1M1I}NXGt|FkeENL$)r-yb2LeqVO#J1z<#LtDPs8-m
zFE{O<Ye*Rg%DUXXviPLG_3Fjv{}sAlY`FPC;Z{Jun*EnGeRjW>&ue3QGt1Uv+gkO>
z@wH*@^Z)MlS7tW5Ag5xzT7B~T29StyfHHI4bbF6)tLFJ^TfDB%Zuj~$W#+mi_8#9d
zZD+pmiIuG_>ptto_9v-+!kf)io33RSm;U&9*GxLPwR6rNDXpRdt_qTxg%jf)-J<x<
zU48hx{9#Uks9Dh`?H3-ekMFel^QUhP@47?oes!#hmYuy%Zr-(&j%l4Z=Ze<Jqu1^K
z%x;;a@4Nh;_2nN)zp5`wB>cUbS;PACUrAu$d;Z7Ym(Pp7>lstu|7ym8FQtKoTx}nB
zUs>O{bJkHSHG_$<AwBJhf8s(rD!+!YHUGKFQ*L3)v+mwH_5)X=pIp2D{K)#u^v7%W
zpI`pSWNrR;Takjr?-%~~SYvkYMQFh4+1324cdk`y)P0%PyS-HON>=7QXU5l`<htZn
zr$26Pl3MXScgm^BapgAlKKI!Vf3Y?3x$j(ihHuV_@Y*^1^eqDqTGaCQUj80nytz5#
zv4ifSDE=$oFF4flmzr36nD$*!TJ_bVmcRGP_kd`Sf&kq`Q8z!&;|fS$_(*=i9x3_f
zp@D1Vp1xh#z+UNe)ZV7j)b7;kMNziLZU-~+e{AWhFZh&I(-ZExwW?+NawfS4oTC3v
zJh}RVV|`cF*B^QQtTuauweD%h_x8VEwIZzl-M5ef&DIMa9sP9m$BT7cS$}W%O-nqZ
zH{o77`_5y>%Tf~-#wRp2esQqo3CodqeY}*Z&64dB_gjOAjVWv7uX0K(ll1W4aya4W
zyp44}>IpM474}}_YZhJY_B+^0+rY<cf?Q_%!LHoJe?8}lN<5SHSPxQrs8C4q_~!px
z`Wizuj(ct_-eSLTGt=QUixak=(Dqy+rt_&U{r^f?=G6lIlaoGY)E6CZw*Bq@P9mbU
za*o(+_urSTwGGbLaDD6CGsz|Epwj1xZ}T4nZs7W8p)1z^ZF)sm%#4bVisP9Z%eUB{
z*!<|wp2beqe%)Ia|Bam|D!xos^jcw5j_lj>pV#a#c)emm-{qv28TCukkG6Wcw-(P4
zvv&WTY^$wz#!_p_<1G=Ex9-1*EKEEVm?*RS=&_6cO8TEyeVhL-a2?mf8zS89zq#$S
z^?WR}YLbIrOMllt6u;;GegBvb`I+A@_Gf;-u|D&AIqTwYn_oWP@_W{1(Z37I`u{H4
zrvCW&+w{x+S)nP7<@b{JuX=m($Hd<^zif^YjZB#L{f2&awNc%hI<vo9!d$-{UU>2M
z7iQDCdJgvwm-!z^)P)<g+0X5ND8K4lv_;?dnj0Q<;RciJ=k`Cb+LvMS{^y2|f7T_~
z)LY4)FRi&a<KE}Q#lK<?uJ~7Cw<>bq_TTj>_KUW6EAF+QA$8{WdENGp{|;PatZ67x
zUL3%*?q}HZFokW$+3hOgrYVO7^z~kC)=-x?_0h0zkq+DP1v1jp*aQ6xr#wC^=^EMN
z>}YAm#J?!VV9H}<ao0$j6M|Ec`3w0L@d%tM_){p`wW*>^S>yP;+cGXUlQfRczpzlF
z`?zUS(VM`tj#G?zp8jyQ6iNNq;ug?nJJ+(~6PL5)KN&vPNSi4jV^a7Q)pRYCssGZp
zNN3(*j#C@c4cG(i4hQtv=Q;;Y`|Z>6^o82wW`j+kEDL{%iv9W8H9!8-M$`Hg@t>z#
zdrA3LU7hZ$$l?2U)BZbdmohGK?|;MMnDHw7-_v^&-6qHVPW{d9uz6+tpXt(WQodC`
zr`yVN`2PL1|BmXVj7w|^(zXJ#s#q-|Ee~9*Rcy~R;J$Gs`aqGr$70XwhMboU8LwOu
zc5*JcxFpo!TcLu<SG^5)ekz){Z?BbEGV!c5hwol)o$b{ov$k-b=;Li!c8_&hwT+bT
zE!LFzY)--NnU-sdTkKl<*nsyL(|HZQrpz$Cf)eB7iBe}+=LJq-xx6Ok!3(jz!zMGh
zZ5B&#E{oiG;9{?Id!~VSg`1#|&*q}W#kWoQE+^=H=y{|(Bkd`ZyLqO}vV$=XBwgJN
z&YoiJ%R6h~)4cP5aaV7^tf%vM7FzC7e5}y>X0=1ctJs8{!iz61iFGIo2D>_P=K;01
zOwu5WgFqH1OfG8#xoU+n$W<FWcOPIYZcG>9KWL&Yeq%{&0?1gcwuD(zxpOY*Z2;Ms
z>IAaWEK~dj$U(OhKn|L{g*yl2T1NqpYkhCAnt{B+#j#W}OwV9RY{G$<2a-$eLHgRZ
zaPxrV?y-ZsIiakP5oF!Z118$y5|{K0Kt`UD0~zUji<RvR>#NX&h?NH>gf%h-H&zKt
zgsB-U@l813vmlP8Z7K&(rl5p@;EL}JiBB1wZ!xo-VSZ(r5RrLc!nFp*%MDfBH`eJS
z%-+_Zo5uK6XhW>$0W)33Xdk9mvI)D38gg$jZd<^7<?tGjgxO&Yy2}_;**>(}*ZzNe
zxxfD3)0g6Rv+C8Pi=VTrPkSs~{Cs{kh~1ZWM)u~D{`{K4^5Wkg-W|R9aiPiFYtv6}
z_v%>Ae)DSe=XZ7g{~M<-%RL)=Kt{Sw@XW`BB|OiTu(%z&&-CoZhwg+v{-wzV%T*1G
z{)rhJZ;NLsuF;TfzB%PUN27j1A7=%_W?Q|>#}nFwBn&^Wo-t(XPv|@S#c)P0XOF}W
zre`x6+zpPW{*pKoiN;@zrrzH>;m84TgX1hVO_m_@?6ey*XP1hbxSPLrv)IFY!tXxU
zysfM%CJ!X9nz>hI*(}Jt5&KES=YgcExqD?+$b*!pOzzv?xY_LCnRDfa!|g4*pLqT_
zVBD48_vs3U<Lzy`pLl8<G}bEU`*g*^@%E10Pdp<I8lM7jGaPU4+Wo|{<DhX?Vc(}K
zGaPU4+5N<G$3bJRqP|a8PB`A)xBH3bi-X3iK-?dWw-4-oV7aT&{L#a|4rTwtKCJok
z;Dy+|j`r`&H~&W;-2AC|@$3p^xqJL6>;<gnPx1HVJ?^cju%BRiK-5Ot-eT88^9Pk~
zwdVroN!e#aS5CL#w6Ab$g>Yv>xxEnXZ76ptgezSIQ9KvIjfQfULb$W5#BJQozq;A%
zkw4M*fNS1Vd6~P{q(6SBQ>bpzt_Z6uC`ryga`<=S8?JQ^B7YvdxOT4~|9kdL`a7D^
zpR&7~e`m8fzv8Clso=-#xz+C{sXt^tzv32z+YII226JbF41NSMc*Dw%&D&0vpPc-m
zIsM8znWrG`SqL}eJ%oF){9tj(Vu-y$P<!`*?e&M+`y1?FzlRV9zXO@8P~8e~@ZtOe
zpL?w4Ew(YOyYTIgUZqgohaN8ociUeGHwwZn`v>7>LAYlBA>1km_ZyVk1>tUE(68vr
zW9$P(%HP9~Na3~s#pX7FaByt8Jpjk1YYaFxs~f?wsayz(&260a556WuFJ`|zRW3)k
z>cH)T+m7*V)3&~$_NHNab8fFpPI%D<-xG}Q*=|dj-&l7iVRiv?9Pc*MtPQa%51K7x
z+asBieda+<DqA|I@q?oe*0}MU3ri}PCcu1;`&`zZ2RTn!(<SvE6lQICkh7FEom2P0
z+6QlbhJEP&fBy~d?*sOKe=L7r_v@*?{<}Q+_2v3?pFiu{*Zw~&ANS|*{~fpQ#>L&g
zfB#(^$G6w}|NWUhzy9aD`~SZ^YPbLY`)B%e`+r~Vo?rjJ>eqJh`+q(j&;R%K^Zb3k
z_pkr|E9>{CeEokv9$&w|@89dw{@d!SKc4^pxqi>yy6WA(=equQc07Oo@7vwB{|?9h
z+w$Lj{kpQ*_xJq#Xutp0$Nv2_f7{>x`<So4@9(ea>*e?V|2F;q=U?m9)4MO+p8orS
zeeL(J+jp<8|9S4v|L6Yq|9`ss=KsC_#pc`f_x*o3{e9i9>+AR5l+S(s?9prae{Wwt
z$=Bca|6^VKrG0;YEw3%h-?yu#y1IVX|1<k*{=fZx>f_)3Pv@@J|9v$(zpm!j<&%%%
z@Bfdl|5rKx(dT~~r(d++cJoVp&g1_Zr+=_7tNf?;%YB~zmz%5o{hrp(``mx`{#~8_
z8(+vrD&^S!e)2S3-`?8tY)kyc9Q$)jf3wY(Pj~;fRXP3Llak*jPk*yN|KqydocD4&
z>iKpC)Zedv`%mlF_O$Omwg2bqzAt`q|5ri1;NN6pgPlL*m94AKJ^l6Qw|&gy|9mCY
zd+ZC|pZ9w-^Z)ZZDT?{L|K{#C&yTD5{dj-<-@p9p|5ts#+<(93`{(oa|GsP&|Nrr9
zzfoM=z9}-{`8B`q?*ISea{RIKy*3}#&A$Cn_V>?y`yc<QzklZBJ-fI3HnoM{iwsxh
zPkVi|bI$eBPyhee|4-c5arWAZ)3@(_y)1tH{krn!{N~%=fAhZgeEa1|U)5Rf{{OBX
zyC%-|@9}Sw-*(qqeK>S^e*M39%a`ZZ{dpL_|Nr6n^}l{ie_#LS;rxHU9=-eY@#W#O
zcYnV7ll%L$#r*f{?%VJE`|11o@5|rL4_hBMXaDcFmv{cz4qD_Y7ngr6|K?r0bN364
z*4!_u{GIl3+5`DrHJ^Wl7JT`5_Vwnk58IdDeH!}Z-(T)>_P+Ria&~{8Ts5nC`{&=w
zw`X@>pZ#~Q?B0Jre?ETwF!jr=pR=zY4E&kw%)h;Q$$h)n*!`CO?_NHA{o(TP_turq
ze*4Y;xzG2{zV6$f?@rz4YGlppcj}Gqq$?A*d)T?(Q(EbgKXFdH-QJyb-;W-i?w@~O
z&T6ju@%u$pe{^Rj=UdJ@_0gwKy-273wE6bw`)#Ln?R)8A_G_6k=gZlBPnKMN`R>oB
z?a$+5Zb!%OxBC6$&E<q0FGWA+*L^*?T%Z3g)AH5j^Xopn{P5|(Zu5V4)z#JK*L*XY
zQF%-C>q7JSbLP~D?JJ-9<>s@={`R+9GFdG5|9bLNVE=cAV+TvD;%el7znT2-%Vp>M
z_@{qAZeMTw|HbX_lk!!&@2c#+z5BL)32S!p|F0)+Hd?=8sr;<@>Dk%O_j{J~r1Yr#
z`BU@zZ{wc7HzU9QX0H70UcCR#-*^8W{yBU3?$>wE-ksiib5G`}g~t}=TkiiYu=h_^
z&EHp_)T;hId8+>Vz1uIbz_TB0rKOX;=j$K7zWd9a_&q)MF06d7?`QYz*WauEeiwfD
z^@ab<{=GF{c-uM7eVd%~Ti$y9^Y@3g_a=T@->&fg?UMa+O+D-F<Bn$Lna$6+_5a0f
zIk`ihE#o%*J+1HRaww!J;_cbQxb}NBzs{J?SIFFAZg1ZE?OFQL!t%;G@xAX$_GIvv
zn?DqIk^ke*yY9~tNil&>WfPx0R-I_xa`W8%4L@&4=k4Eh?`__?b>HuEz021t{m{Rz
zU|;p_|6*TDer~v3|L)PNXREJES3iArZGVE~dv$^Dr(Ra@zgK7Z8DF`x`PTJahAaN;
zKl=Jx>DuFY|94lk*FL>mUbAC=-K+S=aktOf+gDsN&8YvdZ@;mH#GcQ8KIPSZIQ`;r
zyqo<0Pwz~uc1ZGnJ97QIqksLewd+gTn%B$xIy3Lt0quCXo^MYNW>oKJUY`@Tp5y=1
zci-y%Urj6jd{q4U?vFAx|2~w}zrXWlzsmla+S20sx{uF(o!Vbi^kM4d=Jh#zdy0NP
ze0afrOa03W`$2^L*7}qGqc?f%xx>GnKm51;QvU1J-gmxfI>cF9ez;X)xbB?%x%qPW
z>yE^pZD0QS<3w?P`)`lbsy?QD|M&9q<=xA-Zx6p--E;Tr)8>5z+jsBVUzgF(7iU*n
z`uka8e&719C(n2P-Sgw>t624avCHS@yp1isxuZ@!eHH)Jo7&IA<9pZlsb_y%Ww)fh
z>c`!?cIQ{$?LNz0sq;UnMsNSW17Dv$eZBg9{l8!F|9;%v{yJRW?#}I*7M9h8AOGqf
zw7$28@5ztTv-S7YRPCs%{{HK3zy06e*XwIO&Yu4N?d9AL=imRoeR%in>-q9+lkd-)
zQ}?Uv|M@@b+y7r<|KTL_bpM&jKP@ZHe+@UE{@bu*-}E1|+wZ?szxnX8c>d$>_wL8W
z$J@r<*)v&KwLa~`n>U}o?v^WiZvK9rT)8>_r``vvUz=Yvy=eY+-TC$N_GN5;y>R=M
z=-0o>A6j40e=nc+{@Zo)UE7ST@9e4Gac}SK_2Kbv*V)V8zvA~~ZO=0O_rKOYj<f!G
zB73=fWp43<t$#0?{}#VjzvExQ-F1(8IX=Gr`|$prKga9u?f)|S?8?~u%H4ay<*vUu
z|M=`vyT7~do_+go|NnF6UcOZNaQt4Sk?xAJP`giQ+`r%bxqG!{ZTzJz;rnmgwT-QP
z6~FUt?UUr+;!lI0FTc&aKIYzjn-8b<##}nAAAfJYOvO>V9~Y;8-`-JuvpzAxPw(y3
zZ}R598#V5V$Jcy1$!+|hY)|XH%I`;K|9w>>Ut9IFt-meu>Am<}J8geldM^HHj(){P
ze)gFKPgcJE`uFea>Hoj}eER%t{g=7ZB7ZwbH{^=_*PnfB{ry;bot)y6%k^K^_a&q|
zm1Ui8`l5RB)7l!{D7BUPuioshOI^6(;%WKLDj~PM`?~_t^tau9{ptXBztLwG{X2J0
z+3%`R^}2U%<{pjz*7Md+FWPskQCnYU^NiY4aU1w=eZTv$Rl&A4aqhfbM-Q@mP5tZt
zdwW}1VEaeL`0AB+tK{$f_`IU%)5Qns-{vQO@Q?oR(K4p`rNf86zP~0OxxM<W{jn2o
z@AUCMx}|M(=GPsg|4)8g`jI$WK7IX9MT_c}C4VoupL43-`uF%h`N@9;Hy>s<o)c&F
zW#PR0znt6uFP-=Em-F(|{6E>bydQnb+U**?d1C#g4S(1{=Ds<T@BegD?py8RYSq5o
z*W31<U&E{)H?4nO+?^jM6RHY-+~}TP_vYy2&Ha0KasCVa?sK#@L@uM|&D9qww^o<`
z&t8AFJ^ma2)@k7j_TKt;c-?_a=}EH-Jx*y~Y<VT$%DUc7ezzsBrS8mctNyj$<;xYx
zf3AP}W$gMVZ<jLvf8hQpXT4mHgz^?&19s(Y;on!ju8(}A8y|e+rnb>7G5O6CKBa`P
zIsCS*sCoNl|NMX7k9ygh&iJ?H@zLA$KPOxM%SyHVu<zT2)T-<M=I^^7yU*_a-rB<N
z&wBSQ_5AQk_xIw<(RVh7RiFMh>sxunZ?1cf<X5oef9wxw-Y)aM{Lbeq4`k>6X76CX
zx7p$#`@PK-4CN1OyVDB}R)>lIJy6~E^s#zb_35wme?Q&zx3Bqo{NFN-bDw<weN6qc
z?8U?ldxPKYp8S7rP5hVhZtuJOR#xBtCHcYq-uIsR^1n~aE9TGs(p<jdzUdp;?uAe0
z%iOLOTm0bPA+^=JZ<{~=<oo{XPxJjX|K;!Rt@!-7-mm=d#_w;`_a^60WItjiHEnZr
z{lV2i^#{9y>JuNwO<14%clCqAb+NMldA}dJ`?OJ9?mge0g38+4!r$iKWbcl@DO>Th
z@W1TuXSq|po?N)*X{$kYrQ(^WIEx9TzkO!R-XoM=E0iib_t^^`cXe~S^$#_9&p&Gv
zmYjR|#TVCfJ-f_@Ke_xvOQt=EJn{6s-u;;Sr++WsB6j>dzs&xc;s>pf_fFS8_+?X<
zIPc#l;ZKLU_siZ1{r2?n<>|lq@6`SKxn=sB=lT2oJ)S@B-~ITyAN%Wn{nWf+|LxPu
zr|SQo+wcGTE}q|QZ_fF9>(<%Z|Nro8;a{f>|M!>s$IsnAQTERMn(yuJ>#8>1S-bbg
zhcAZ@{mlD&@a)OWc0W66i+){w^6>Pxgip`B<mdUx+gsZH`zZYG@#7~yOa5=zZZ)&y
z|Nn3Mwp!*rzV+?*Pto9i1>WmcpJ=WOn56A<wSY}T@T~WN2~!@Onwz9?E74~nm*)OQ
zpX&F&U~h0+Y}mXv{Jiq=W1X2o2jcdYC7XVGCvG5lM*3=`BZF&(@lJM^-ASibW|eQb
zcP8{sl(8ZAA*1AJ*B;I+wM=vR8oK$N)#gt}CIrUi?_Fw{?XuZq`IL-l&uW5=PiI)k
z%<p%Kbj*yenWfX7{_sQYVmCwE`6oKpY*Ch2ZvX6g_mP0|y>mU{Ly{_s@@%5SKUVH|
zv~p%7YwGID2Q4y_Kvra?xz<l9<i8T(5p{3nje^S$*k-VuzWkzOo6n;Ct<Qv?g*qpj
z#;b%Y%zRdQO{qz<+LY6@N?GZal8j!O$g|HGa(#<4Gs3TNT}$E)5nAg1uKUrlGmme+
zsL@!~6Lxpz%3YS5gl}{#&J>)Wv!uLN$L)R2{oPxq>aDwGyyECn?G)2X#&df0#I`&y
zH0cz(*y^}<{~?v=+ZM7uhaRQH-2Z!_`f7Zk@|l<K5BZ#JUT+ZGb@F+J&iSyAsIuTE
z6XF-oR=T1)Z~5h$CY<fh3pYncMy+$&mZ7%cl9Tu**X<i!=e-jV)1LQy8SB;lAW2@`
z6{$-$uASKGW!P%4__D{d&hGD*-Aoq*dGC7q`{S3tL3WJ(i#IB6Uc5MO|NM0IPxhaV
zZ+<;{_wKM}yN+F-PUp|hk1C4xF}V_PzHZ;%pGzg1b_6LcIlsSficXQdito;a%ct&E
zHD9#tic2rY+`!j2kKaB%J9}g0GS%YdU0MOTze2X=72iI$etY@$@B8=dsQd9HH}1i9
z|M~g*dE>UYdY)b|b%~?)s@jYzSM!!%udhsbwcy9uvgEW~hSu>p7y56i{f)>u-~X%K
z;@R<(X~+J)J)t#gtGSx?%VX10RR7$VvSx{V^rWdDl9M-eO}cq4MKs4R>`?F8lUg_C
ztZ9*to*cTtFtT&0ceLPCjf`Tu9M8Z-OL{E@bIy04-O9ajS4wtXiP?)|+oZN@oZK&b
zex02B`nuEie=fS#dFGMpseF@|p6K|S?)$j+P0g1S(!Z7Y;#>dQLl@)!{VXW|+z-lv
zZ;#(Uz2v_@{^ZIZPwi6wPPGVr{rbEcyZ7(wXFeQX@SyPb$Ls&4Iry&WW}Z95VEpdh
z@!QMKmxu4S{H1XJ-<L1_ul4)OKTTV<byisVEltC$ZJ8(S%TDEOQ8ee-(7QXa+du2I
zlg{G#@y9$Z_}b^)7P{JNH2s!W^7d_$4j1h^lkM?zm-fsb-?z<3mO3KdTxjyCy11MD
z>DBey=i7N+?<$mwed4xv*PVUgt4{b<l`5r~*ymi<41J_l+qM1OWUa!<cCmfzozIUy
z&6=LlDE&3#_1VnewI@%lI>Vm$>OuI^{rkB~yhQ)xpIB)&F=Xw&&P9B)#S)(T9aNj7
z-e0mib=P{uZEQEvZhSkH6YrSAyW#AHx6^O#Yq=qnFgvk2B(0idqv-*&!{1V8=E^5!
zH{`axU2Sw*?#MNU+dQ|gr*4bwSj)Iga$BR|3YNQkF4tXd3&dM5NUSlJyTG)5F{9cn
z{e4ICUr$=>t!=r>M#X*U?87_Fr)$6WUD;6U(Wg;TK3^vA#ydO9MH}wc7P%zu{{5um
zP}%pBf~{}gO;+Z*eOKLGWZUlvG82E?V&r|i`(wj4{*xE8_8ra7o}{d8ZnebiY4qV8
z#;fyvIP3Y1l(}xtRd*BFWPQF{Bc*(vSm23wHrk6O+^r09QQZA`PKQ(3b4|h4H*zU1
zD!a-g4!_8=>UryEw`Eq|$J?_?G6d$&Iev1H&2%+>Suu^&?d^r-C9-C^htG8z*cLw7
zGS9#<DCvAcWZ<I{jsX)ExQLqRCdq%<(x&g|SM)y1)9=xVa#>aNj}MRjFS2YrIJ2}G
zq~g#tVYT{sb3AI+_DQSN`yJ2Kz5ndf{xxhFr7u3%xJoswI=n3PhAu;}$ZFO#sy-7!
zR2@z$vpYIAMG1fKa(&Z0@7f2|6Dx%lJe}y=(Dr1DTEmpC4NqH6&R16#x__7bMQP3K
z)AsX@8?R>8?UQ-Ze<D6C@v_o4hkqvfc2ECrweRfH`pAj<ZHgw?E7eD~`gY%7{(1Sw
zySRU^f0#|L*RkUWtozlie805R=<eV63BKiqt{bBo)*M~tdP8?Xw`bQ?mW-CQY8P()
zyJIwQgX!KoH~;+sF^=B3`A^1p;s(>RcW(Z(0Wq%Lx%n>!#JGFs=D!*c<LRB7|K=D^
zEJ(d2d1fxpj^4m+n{5ql<SO2}dHKAo&Yg|V=C7Qxwn03B@qEi|iB#<;tPv-SADX${
z<f>v6`{Dyqe<-e@)mAt!dCJ-Y;t7oqWnWk$UO<%9F^c{1+2I@bF5;s8fkpE<w;P`N
zc7#*xFIa24^@bPehjM#1U7vbH?bb1g>R7*=MY%m2ubUo)a3dhxt59wdgj;${?bb4h
z^0$8SM{c;>mPodKmDsag;LEN!ah@3&|0Klsua!30FXHjkQn~PnK}Ot#giNn%Ntczr
zC0>~0R>9A9HnZh>0wHG7g*hIT@@!{2r+iN&mYF%_J4oA2IlBXk<ns}_5-!X+0kXHV
z2V^gH=CKNpWj$|Kv>V=Yx^TPQ@pEZU_x)=;v*Nq-wWi0#s`1IRo#B>}aXsmk6Lm<g
zXU63p@9GZBIadDt@l%t1yXEzkf4uuQ!?O4NJNDC=HRbkUevfzmURWe`zg9w1-RNF(
zW0BHhTM2a#GZD;G1u-4LOl1&L5zJHsF&T@b9@k39s~c@&=h`sixRe}7@M59T<GcKQ
z!kq8xa^`qce0P5Aa%i`_q`J_(zXvQPet38MXlF~gy^f#q9`?nLTn?43In0r7cjfKD
z89%HJ9nH^fJHr04z`$nnJzj18+Uuc<AMIWL|2O;5h0;d^r>q0zti_KaW<TZV^130X
z-@s8Eq^^~yU4H16j(Ta7|BMS6#~)s)vaYbOHHlbpaGB|iEiJVf>qK@{Ux?5w`MzM~
zx@F!OE8eGh?p(NxosU;EYegonnQo%Ilve9IIg=2syS5oCR=+gMUorivNrbGGN!XH&
ztE_UOj>(yXD?Pkx9swe5Zf)W0z2?_^w9&b_RqD;FGs{B`*_nic^sWI}6cT<})g;84
zR}5moYUBAqoWCywfUI8_^x~bPbFA<7Lg&3cVjn#-8@E^#WUO#-o(gj4UGosByK^DL
zmC};8ZCNg79{yN+^Vg!x+Q-JVv-lq!RPp(*bz@)uv7@Y)zpM#8^ZA;BXWHS64IJ*L
zCx2G4($%ZDXVrVS{PgDiTbum$>;A92H)}rcqzzZ=6#siLPFs94MZh=O|9W`&{OSLH
zzWsN9{`_g0yI;><zI@8TPcOGG*EgRZr+541f4`$&U+!O-YT|pSV&k5UXKTxHx8DAK
zx>9&vUj2^!yMBNB_3q)X<DX;$zRvg;9q;gxGqm!J$*%B189q08i|wngExo$yl4{<S
zm8aKQFZH^!Bv>6(@7-GDzv_VRE|GrrlS$ojCqJ3Jy0Gp2M6H6!dbxWwb62TeRhy*#
zQr7s=i7)5hGwnUCr}2JM^wXdF(k4F0^6`_Z-1I5>scMaNr%QNJ-i)=^Lubs9ndEfs
zl)^^Q8FP3hIbD1G%KO|SZ?4Go+WMB<`kE<w*X??uvunwOue%;i+WY{dAj|t)k~i1Q
zQ*l-uy4l*Yo$F+e8SI+Pm;6o7N~dR|*~PWXqW^4DlkPfwGoa=~+ZpM@JM=%E`W<xW
zesfO8p|a;U1zO*n+pNfSb8fmbs3vLy)kM6Ynn)T{6PdXv?q<I!05`RI0x#4+tIoqI
zaZ<8E?E5ZrUi{xw!?D}AM_O5XLnddLQwwM3;>D#U(%PEarmFDEOgR!hY0ZIUs&C>v
zU%xO5pLD}NJZO?d!1uHr|J`)oJ~&#iiEs9_gzijs{kFv)w^n6YR~X9luD=?2`(XFO
zjGFTQNfuJ~@9vlAJ68T3q~h*hknq}lxB23D+#g53-1m0Tf4AhE)*Z2XB>GO=;40c(
zVJI_k<K83u+{J6e4+~00H|B}!w<#OlYX<S&AMAeE(ewSm(E^ua)gO{9l#;cdynS@E
zz~tC(Ft56Up}P{SuX<j??V2;ULAp4r=XNCTmFV-h@j6B3_0a;CLviX)BJ|sog}zy7
z9<MT#nYiJ4r{%TohaD|@{myNS<8fEs!w!<(mMrU5@p)k$e;kjyN{;KUQwoLqYC9Zm
zABfp_^+lz&<^1#MAC)5g*b8lT$IJs&=u_v-nCCxjdf^t1>6<^hZj$hEzxc)X^;9dx
zuuZp*x1K+JI%A7PcB%FG=+70~X7Hvz4vPx8zB5@<>gDO?FGU|qB@b5>RL*O;+4$v_
zW6ZzXR=IO+H=g6#c53>`91*E{`~11QLT`%~{F6A}mcRLaEC0>+udb^6;@>zq>c3Qb
z{-T>9BFg`Qs?EP@njW7OJN>Vr<eqR<z2gtR^cMU-ar@ocKlgOb9jTubc7D&qV~(MT
z>VZ{{pFf(;-@ReQwNnp2E!&VL^k-xCQ|GBWS^C!So@rjgzv*7<nzx#QyOR%1+}c<<
z;j81d-4nLj7N?cRTW&Hl;NN6-qDp+zHuZ?Nj(o^EDl4irdX%%7KP$X$UQ@1^UA?o-
zHsKV^2<r)@=jA?cZNDnH$;=RDMtI%L$@(&p(lgj2<x}=@N8Uco{8rNn+0eB@a%qyj
za97EiqHwRiK;i0gqi}0=QMhOQQMj^22yWw=-`~u<_&4{cJ#)Oq9{Jws+P8noDBQLj
z6z=RSn=?kU;Lcue{K?>SMv`1g?S!v-DY<8js%E5^DDtneTTvyxYMYv*?HR*a6WBxL
zL-ulqMi=+UEtBv)(Y%U()xFkLYc<{YjeFFdI9_EBeeZPj8qeZ(PB-CC3tly^DqrwQ
zIlJlN;XjKwD+9hdUfmtA^>3#b|0+8leYudm$)UGrOW3aXWw5&<;A>xK?s>hcfUk)~
z9~ZomU43g-%ol_08BTH`wE<tlLSp|c+xK~fu<`y|GgdA8x4GBv>iVEf4|h8!&db{R
zrjGg5Bi_fX*^k#g^xtlOC;o12b?x_pzl&>9D*|0#_E){x`19(iQ_D53-)Rh~c(`cq
zoV*`;DMy!FwUg!#I#`>*+t&R;$!GSJr)*juKR$c;%sa4i=k(0etByYpTk`khrHpI8
zwEljK-M`w-_tyK`*ncK3*K8~M{`K;b+TD-6tNr)=-uq8Jf4<%Q*uT#*QtsE)|9*Y;
z_-*!5_Ql^HX3PxBidydLy~RHC*7n^NCjZ`D|C2vy|J2jp-lj}DcK>hfY~N4YH%;3&
zciV*@yY0(2d;Yt2Yx=ysKU$C7|N9jr7iRh8O)8(szjyr)b0+OKoqu<;`j*T;ckds&
zsZ#$t*z(&I)!zNTgDq!2$v+$T^^K>NRQ>nq#bzh({|m`FKd*m*Wx(f^S9+@wS|7+s
zG;Nn}e(S&T+XjW0&ze_3f)C}y+OqA|?h52z<8bFNQ{ma=Vdk$IMZ0!KXsrAB<&~T5
zhNePs?qjC&lkToy53_ie^l-<s%WI^+9^g6=tD|teW>x88xf}AE4?7i|T^?=zvhlCx
zbv?1k*>+EN1@gannV_R~z2;WwVz~&zo!v*D%<|uxccr;h{)lqbhQBj%>bbXldTYFh
z{dWJ!Z^sk0=kHX42<vY9<f;r2ex9r?zg`g{?7!{PTp@@sdz$wAB?=(nn4gbyK=xVg
z4&=YKH)Gz5gWr-j{q?<d%KB)hT#mikZTXdJ_t?#X2-{vdHM<ESJb&JrJtET}!cz~P
z`fU#pmY=eE&#Q?L;kO%3MgQ#p8#2Fh)t&>r5MkE^r*`kkkeg9(`%}W*?3oY+_kXU~
z)7TDC;MsoabQnZ9|NZ(s;mr`?MP)iFvomfNC7jKxT*Q34|HQY`(>FHcEXqCIXj+}n
z$(Lg<cUwQ?=%J0B+f>=#gr_H6yy0?t8uPamrq2$1Yu@<R%0@>Fr2jzQ(HYFQ`Hz0n
zUbn#`XHo8%#z*E`y@J;$%JWTnT6=lxjBWLP=aNdFKK>ql-TZ#tpC3O~KbbCeMTpfm
zTiYQZb*;%%yFI+yA0511;QZ%(-JMIe6}vY^7kqy_O=d>^iN;*h=H9JMfpc{Hwmoc$
zvD&AppSJj@S&c{cO`iW1(dUB$FSNZon7Tt$Hnwec!GT*<3V$qj?)qOiLG13YQ-5CX
z?z`1};qR`Mn}6>TW%T}c=VbO-TWd*^qg%gACveWQc0B4C6{#`p$j-?Dd?(o!>9Ob@
zmH9GdR`b95y>kv8jGZ*^sNJb$Cq!M7_qt75;%W1Co#?k3g_X08T$Vd?L{9LX+!X$K
z-%OOgO)21y{PiHS*C)w&^}9w-d6Tst-E$bO+WvXbyv+1e2k+!v?2@$?wj2}Mcrf65
zz#{%x-`)x5oY|cAxl?@6H#Om&7ta<=+&i76+s!oEbC1B*>4y?r%*FfP%vFrAS#?w5
zQR@oPi5nV1HveyS-|}Pa3;(zyOV55;T@-YiTiy88iWScSqL~k|hs6gop8tMeCvQ)e
z<u94Vov#Xe)b79R{qz6t?;i(`FZ(Qa&1CMyC7SE*UOgZ;bBVik<C44Q8$2e-y=Ivd
zw>;CM|I1XB*;}@i@7lWe_d4kp8&{pHudhCw;*?$Re%7N~ynJ^XHYrXkQ)?~#nBlw5
z(tGvEMrqHC+;x`T)ra}69aMfAz%uRIGMP2??ys&0N8FOm-*8WMrN4hdX8yW^yULd6
z*)}fS+sNh};9*<E<h|RT|J{WJr7tvX-tH7K_>-gc@5bKBg6*tpt^FTns@FzvEc*IP
z)8_3y8?ly*xs_c0)diB=&Rh1`v@YK(%*yRznxFIGz~y`SO|6S&eK)FjkojKgU{m1P
z+u}AKwtVkPc(~%3EVqUKZ(ptlOTy327P0xTMcsO1MabuUEc`ZaPx|S|UEL#kkl9~b
zF7e@tXII(fGNK-Gbi0|pH~-*pxyvoWU{z&jBm1l{gF{JyXJ>QST-cH%DAtt~=l-B^
z+21s~o@dLHCjL!h)DgJ4CxT&lWMwUb%jRcq8Rar=6>==zxzZqIKL<m%lj(cL2N!he
zq7Cb`r!~D&yz}My;W?d2j#s*3p55ZPC3p1bExAA)k$Gk6Qja{(L~7WSTU2gpOW*u$
z`u2U!x0AQ+tqgu4yM6C7oATS=W_`YsdprBw<yS^Gex=m(9(7n#XQQb4V~?qf&-BF~
zp8WBB{d@K9<+Go!bv5C9o+xwH?R2Hm{>+biOgYsz|2SOqF;Q+?+vbxsX1vS0mwb6T
zHT?Y1wmBj{Qe^s~;^pdhU0kl-{A6vZjpTW;wJNEl<;okUf0EXjd~lDd9gFdt-t+30
zpPo$k6;=~)^hca$RNIf5GYWQ{VjmL(&n`QiQX#f%osOIEL$6IT{9+GFek>Gad6ob5
z@5DzLmuIa$Blht7AqSf~+?V!lU|0HBov0x9j`d|+gl)|4$WuGS*&aQNTeDOAXuekX
zZ1vMeey6#<+O@OC<*lw*+y=38OHUmBcstg5`$T?~r8_=Hp4nA+c3;mD*%e#nRfU^{
z)E+wf%jx9T>Hj~y`K7q`$G_9TjdNz%*Y4c4e_!U_nSD{<;nAlbpZ&h}_w4lDx0i28
zFRm>vSLZvixqSQoiak|-eE<AC-@kpO`}X;H`|td#`TXVUb+y|}pOY+N8a2;PGCZo!
znz1!(y8ZX*weGp%Ps7e%y)E&juCn6K#v>>9XdjN0(YxPrIl%tlsiGB1%T@Qi*go(2
zoQQv4N<Q!Kd4KKucKbhHDpa@p`}6%;O~p=|{w33<Kf0*3f03Ex@7sm(bq;5(wC8Pk
zC1^8euD|&4yRTFq?aYZ0{IY8LlK!`sRQsCR9zUMmw|M&F<c}L|UVliE<ab~9`m*rn
zS&t7tzPDOj|M$7#OoJINmmlZ-Z*9JrRB5%t=H1rV=WLIYj|X1-9dYK!XYE>s9(MU@
zZ<CjoKHat8Vd>nq>!o+E&ppHT(IZxAMybryq!=ZSwL4utL>6~0c(lu<An&!pzBxXx
zRvAasd#3+Yy<0kc&GJq2PF5+suHZSUu6aE$P<(CTV!bG5kJv43lXv-lKKSA71K$<;
zwsn<X9=({lc;`y%wD>=tj;=17%VITkwY7fS*ITCH<!@IvD^z^k^|s>EiRdin@_3em
z+0VC%UUI)HzCNyeu8GW?_<b4Q?_9rTP-f$|d3JuX{N5L(aaUvG9`611N$c~}>ES1?
z$F6e~I{$35xmMH3ZS^uTS2eU2#N1gJb0@dXu+^y5u(hCg-%dM?>E>y3UpE*1^m=#r
zhw~<ho}<rG7ypc$b+ae+)IuY^(vt~w@2vhBS=&pwt^4fw+x5crw?ATy%HuCz_0^fl
zGxz!DCF+)$yY)`&_48{AeLgwRq<F4Am&B3osp3~E3#QnmJhk6tcR8>1^(G!Q+xI0;
z{2lA=z4R#iSM+4r&A0nroT|T)+TFU@Zgcdsd3oI~M?8-<s_K`0TD5z}<qwY<oSftC
zOljM*L$LQ}fkAof^^<wGlH@FBJJcO~`RD9`w=QCVM@9Xf-P9Enx41b=yd*r<U^mBO
z3#r!3^$MMBt3IahJftx1%<;!h3j~*!sV{!<XvgaFF2=uG(&pGXtTCSJbND5*;~#Cm
z=Y7lm3V)4FXVv-_Z#Caeuj})tm9zdu?^=|rG)MiR(SMy^8^!il8l1Si;7h`!_?H$h
zb`%-R3Fn`;^UV2}XX&5&UMHAa&k$b!N@02akG1EX*j<^oa<k{&m6pX}-DP3j)2za)
zmqlAD|B*koS>^4mBNu0zC(gNg@MY4ZEOjsIlW!jfPC4P|^4lk%dRcJwvgqQpvVAMG
zHEct}gQ`}oTk&N|>@*Icw_7Ub_FwXQspPZyNZmgUf#*%LijSVvXp8OdFR_cc(=V!S
zz1puVR(<i0yPvig$NQx%HYio*Yv(RaS{Juot&Q*2>F%2q6Vv*RKkj~*GHuJH=Z{>U
zt~#)9)#pX)*BeddH4T_!9{Tu9LdnFrXSGgSWcLKfFR$OeYi;`D_V_4q{_^;Bbvu6U
z$`asfKfd_(^40Zs?$)fCXKU$S;>+T`cJgigKJ8=2`=0#JsVd$U(=z$z$1e{*UcMUp
zI`X&w`d@vIF5efseDh<<MeciSbHgWZnXzB*-xTu?L60=*3{TovuH)2Slz6L+EmKHd
z*KP^_&3mh_9jVPV;y--xlgg~Fu2*`^-!5Lv{JP53reoR750w>yeX-wNVny1UFMjHs
zl6_Y-DC!~mb5X7RK4P0ItLkIFhuO$J`S8-DH(b21Vpgn*c9B}t<(oFs`%3j93fFCZ
z6tn$VOjXI8c@^by^G;uU<f<a{=<$~io4;MZzhwEmQtMxJ-KURkP1>Qh_ISpOOY@Ik
z)cO0jdEI3{&Wfv39R&lv#zq!yY@5rsOxgI_^t}_)?;rX6^u^TLG_myt-u_&x9hb)!
zr_I=seNN@kv}^O_)Ev)B=I;1Zq9yox%iTl``<N$@Kb5_tlT5N%*NW>$SusyPu3BPJ
zYwWkU*lc^~CcXF#Ldy=>+KZme@}E1eqtNd7$vu`G?0piYypx~o`1|_hhme1Z*IhZY
zq;Xc4u>Z&SuZwNxv~>q<i~Qz4H_YDncwbAptgYA*Kh9~w7j?BJhp1n@yuWJMlta7x
z);sXdS#k2j)2_mxQ`sTKkAiF}W7MA+2WI^2>E5%>xG?C??5p9?SHiCq9PKpXKI}FB
zLffwWv*#9E2v%S9B_uD<J78{@eQBg^WpMRPhWR$COUv!Hy$)1W*FMPn*O<9p_2A}0
zi^^4OHli=N9(`K#XQJZiU1!-IJ(0Y6=2Loi=FGXLdcJ<XXpwI2_&8*FRhFyniOrwf
zqarK>C%6237}a)krPbm&@mE*uTQaBe>WW~qP3$74<W6r6S~PX}MB7UNdI9sM+LxUD
zZvAN6*V5^c^9mm?%WR&}yOv?PANS>Ro+<V`U6c2Qs>iRjl9X9%b-Q#*R`1G)Wl0Xn
zS0lq!Uv2)pe_3Yn-^}WO)ivx-B7ZvHZ|uvNba#zsm+?CGRkk9}EM6ORTlv|WN>+yb
zy-+k^?T-9;VppSkpL`1OZPczfwRvktp7^~pr<-f~HfxrC^}f0HljYMzg>GB6O`6#z
zqP%z!<B6XS-rTvkeQv(@#2X1IeWhE}{{L80{KqS0?M^?wT_WL2UDZE+s1Wdv`us5>
zR%!BsQ>rg7J`&1a6B@4+rkWCd<L30oLe&me3p;I>yxNgcYk93=)#I+<YKD!^W(Bcc
zj|rA)SiN(Z3ET4>%Ze^%uZui>yl%s5??dtX@7Uanzxz~tXTd4)n}?^r>yB|g^vi4E
z?gzC$t-?31dmR&+6&o(g99J0IT(nwwf8Xmh?fV{cWyd+k2WEMFJF#)!vMXGZg#T`s
zb^aLh#mm-mG2KV?*M2;#-zs%2cCy`<Yq3gf9i`bC_IE!Cm#vyIe}nMSKQ7m;6nEuT
zh8Ijcc6ANU>mxN0#gB^OijySH6&>2<%k|7o`1+ikKEH2VJaW`(MY67+MP#?I-?c|B
zyxEzLpQxSN5y`H1ZCzH`)eWnQ?tXo>CMZ4kTF8>se6d%bud*y(YWezfWazpmp=8Cw
z{D%u?biC${TKc$o*5kv4XE~e8cQzC}uuHt8AKf9m);{a{FW%|OwjL2{KEGbO<HuaN
z`#BX`YYVpr*OyLw9^vM$-Nmu|l;5$vhmOQ7-El}sA@W4atQ1A#|88QB3YRloJoz(o
z<C=WI`Pb{GF5kd)Dr|Xk;iV&M4jaF|bmqvCpeV)3H#Mw!k36o~Sz)iMr5cf{nZ$P7
zXcph`=ZgdU{Fa(0!sh9tC*E9@7yath%80ACk6f7XMPrrw*}63=<Tck?%yQ{|aY(?s
zzV%hNrk$w5^pi?&Svn+i#SWW4j8bq>-o2MqTPibgyT#<k-)%nYh(8eKzoELh!~eYc
zr+dp}4_W**w2xQmZJD9lH|h2MVqfSq`ohl2Pen6bGPlNvxP7iLvy$(MY!+=hI_Hgo
zo&TYVN<#^8m)+Vkq^3=eIh{4P?E1`|suf%Aol$Mrn)Wm@;BbL!vbIhn>n!8dTbO3b
z&Dy+m3zPL8rn8a>QH`-tjn9NDS1$Yiq-j%{?~asOsk!GaiG4GF+$dcVx7PUFa(|t3
z+1_*AKL@;9v4JOiibk5gtFCYQWfhru$IpJ^NHpd0XMg^<HD}`0X?u=Y)E|%*y?ka-
zq)})ToAVZpjaeCvsikguk9z{$+H)@ECMd28uL}PBY_Yi$Pq)e68Kx%_&go50&wQR(
zmZegTGW0HUJAB&P)Za(#>wi{!uFdtCbzbjmY+$|L;Tr}%lcr3pn0oNzd#;!L*Z%s?
zXItOS-*4`Je1G}BjM)3OG5;%mReXN`_<sDi+x1)C$*r@K`+u+Q;{U~8&&K~-Gc7lx
z<#l_%dHoi<yERdNzFGb)HtE`(B<Q}a?Q#FL<E!<<r*D_v|L60M?+;e6+|6Hpq2D}Q
z{_$#kbE$vRkKfieKXyN}@ZuWPEdM+;`+u?D0*{nmn|4rs?d|p_r?37!zWVr-xls!*
zdFK8r{QWWPXW?&!bvFP0KKk`5@u#K6)Or8DUJmx!7@3$Go_IGeF5<f08ehE}iy6DP
zGT&W%Jzd}G(R{U5)z2$pW~`pDiTm$${afpAuW#mK-}lJ7eyjeHON-7G_-1Bj>Am=J
z^w;5S0#9yTI`Y6QOy;Ru?)EJyPqa>7`02fS&8BmjsdLrU*B#<He&lTY)0=^lZ-0IE
ztzAH;U4`GU`H|N76-ShJTf9zG)GM80EZ-k3FK-un_n!QJyYPz-9)9e<cK$m5qP;6r
zw@l?$H=i#jSATllCGK49aM#Umxb{Yb$4z9jzr5MTTGRH*?xz)k9aU>5{ePyv)o@kb
z@$3uLck{n{F<$=h_2%ER)BjAh`R|^ytmfCHxNZA>y?b9Dw*SBD8>#=-55N6;)_rlz
z&g&65-$ROZ(&eXptPWgqt5(ae<Gy!@@8pK8No`lYefnoo<-VmOX_Bjhp0dK!k2<^`
z{(HRdoRKVZME%p@Wj5X)r*h6qJ+MvWy>nKY<t(0CnRz<fZV2<ZF&nN>tadt^`{<)W
zq>1TC+n{Bi=JNIYGFa1DYSeYP&c{UQ2FsNyk=oKMTed${BFp|%omuPoRb$PHuQwK6
zTP)GE;97EfeE*>-@%=kZSIV`DZk5}8rAkCu`%2ZDPp<=Ke0puTUG3`P4N6xR$0hu#
zQ*=vKvXs4W=gnD_t|QXy7GWD@KISG(4ed&l-7mj2&TQRusRm^chZ<W+CINkk7KRsr
zx0x2O=W{o#%jI6MbB}jh(zBj)i(L<HuFTY4bhpVdL~m!Gh8g2}M)oyqb0R-VZP@nA
zJb}64dIK**9J3ii1@8@p2c}2@8N3$eOSW|%nsBXw+d7K*TG<yinE>ezt{T&hcFph2
z-L#cCX?|Mu%^eqKr!k%fm2*O8j#O>UFyWg$JLQy3tdCpP3A<T(?A;xg_pOrnq84^^
z!S+pBZlBx2HmRPt9=UDC9|7TO79PjBJw9ixVCRhc%~1K2xkZjuR^f}s3x<X6&g>kv
zN>&aB!d5#RNL!uq-ZjTAMgB*^Bj>MnF7KT`+o`;F{%FVY-ub=VlY1W(1?027D}L+a
zUs_h<vGuX@YFYWDw?6{1k9Wt+e!VrtN9vAISNw^uZLd@}?nyc3@*venm1WuyUzRw&
zV5fww6NH#nS56U#$X(oWAWK4(C2X~Z;)Yo+oC_<fS2#X+s-?=eVO3>hS0_Wa)HM^G
z%!rE{79`ppE^51a#@p2^%7rmO_p{LiAtoKSxOah04Np&;w({cGp)gz9XuAk=xcAPw
zsd;MR8!w%G;uW@QX3V);H*)S-PEBL}SQflZ^{n&dNzayK-n`+zbK{yFAI_FM*{2uW
zT@~)|x?`Pj?#<`XX5q_nJ?oF8PWzHRd)u3f^H0xI{hK)>^3wdKnW}$ZPLI4azX~KW
zeP#dJ7P;tJ+q#)KU%%dX^?K9Q>#3{PpAL(kzILBpbZzXuUpKyQ26OG)<n1=6tnQyU
zIc-|bS3{!%XC|$+b2~OY^3&Dh`?Yhv3Klutp0w8P*pB{fDLvm)Kx&Sa8+mX0CGpsD
zrfPI;ZQb2XSC314JgIZ@RdUby4DT}5ja!dTlZ&p*dHAvP_&V8bZ+@(LEVaq>db;<5
z^Vb=oS^hrLn(+RjciZDDT`7iA6Lgr0Bp)4JImPIUw$-iE%fyaWD{EwL=UqKxOT%r0
zJt~rE-?uSX2(GSpk$ZrN;q6P`lUnku3)&ku+5W8z-?rRd@YJ_2&z)}0`&XiI+q~Xw
z$J>|ve>d6weVKpbc%sp96&=A@*%vmXoc%5KZDUk=<AiX5o-_NIF79D^r65t;$i;F=
z#FXWdlqt(41yhzwYNjlgbWB+;8JV(Nve<gS)`MHzLL^m$WnF&Ey&by>3m@M)wzOAU
zTHGx8#o4w4rM;(T8S+Im9!NbYA-Trk!J(8M(J%!Y58+E{x6~&vEU;bTwZ&h7VZk!a
zZ=5Z*R}>D|HEw91#dJem;9G#Q!dFfn>vQum4$Hjr(r9^h$yCQPw)0S*S;GQ5@r?oc
zo~jZ(N{bFI`Do_zan}EDMHX3m)_O_z+}HE>?=YJj_&IRNn`c_VA4Af5^QWDeoqa3Q
zFFft!o}D^VZ!WDVjlcYw`IYUI_ZQUf9d4-S|Eg`Z^Sgoh^Sg)d%qizDF1}^UqwzhU
z=1PW;YSM)nDMsE(i#(O`Y%Z!OO1$9TXL`SE-u~5-O#aQjzu=IS*!<|nJTF2FB$TZ}
zd!A*jJett+GQ{x3&JfY&dH$h>FDyevo9Bgx8ot;WD%$)}Vs(PSyi_x`<ecSA2VblS
zF|_&cL7|l2>$^e;ztwkzVt%df3Pt=<={%o93~W5^G#`>wwhiUsXG-n)8e(YUF~#s!
z@X-&7K|V{>pBLVGe^h0efk7`X`{B(3Ia|1xSM#?vUTr^g;8n9pPatzc<w2=VW5#0-
zMfNOYVqDGI*bv(6!0<ZJtfqUCfPh4IrA>6hR82(#cNLarCw50No$^vhFjW-T&?UeT
zVS8eIa6+C3#~FUkM$4jkEg8qu6%7JCIM!IHvV_eQT2xs&YuS>(1oxZMwQ}2jX!GPS
zI3=5`Z;1jk95UA*Yq%8G%eZu}6th>gDch9*Q?@HXrfgS2wqC2vIMaM>BO^!aL&sNg
zQ{FkgkSlrT_)IS3o#PWZlRjRDjM_&6av~rG4?ojUHU*P5_Rb_`0jb079)?q^BpNPA
z%s6Jl<B-9##tuqdVB}zIsBGkOh&jY8AjG(uwSvJ(so^UFzk>!x533!+LInf&4~!k&
zAmId4Mt%nmmNjx87&%xQe>U<voH&28NpgP60T)HZ4X>sMM3j1UJiD4XYZ99R*J0sH
zMq3W`Z7W>&>h;nXz0(zreY^)Ng8f*TcD|Pa;YB}d*Ec8Z@m<c;_~fS)ljmnsmPt>u
zIaE$w7dR2@$t^Qo>~X4%C<nhzL8I}#%gN3LaW{e+53ruAX!U1h61RA~)J~LxpXqq%
z!HWA}0h2H56bl-incbwA#4St$7K1p4O{5MrAF#a>67%4KL4Vr;Rz6>DO^%E(59bF=
z?ax|FSo8`q+(4Z4J!?+1H7uI~7BK>e9M2Y>ZoV!r=FX07wjR>!y<%?4weTuG*p#-%
zW+l@@$B-SXINpaAIW#=}^kRceZpgh2kKe2}IWyU{rpY!`g-L~>li_ZCC&S&kP6k^c
z6($wMPKHhor41=ZBvNXO^Ywqu-n?Y%y`TeMZyrc^en8Fb^Q_fJ6VeZ=v6=6fDRIXv
zH>n_cYv;k->uPM<Q)f%u*#;8WzOqza>hprqGP|6FiV3^emsShxVxL<*VJG|4YJr{X
zy_?&2`GDj9oLr%?p$*3r+h=J>6%#b7ube#sPW3l#X$Ui4me^)?>d1jt%+b=RNeN#C
z3-3)#W=!Dfwa7oYkzqqM;}_*(hBtZ&r+0I)tPz{=G?tYqg8#%PJ!Yn4M&0*D3I^^A
zp2l)9McxZlNHA^Gd9Nj~p{ik8xun1h`6EwbmuY6MI1sok?il~a>)uOh6Tqo@&E@rm
z3qpdE9ab(o))3^|%jjCz%g9>P%V?W#f|RQL_8-EQnU7ojjhb)K!rq!Zx32f0<AR9g
z@yQhvG_Jk8E@9`=wepJda``&~OATyFejVfuRAUR1m$Ukt^hj7(^VUmoh8u4ktpA>P
zQpneEmvzTw{<kl+1U6(fSpU5-59Fc7@?RTmW7$}qaol;?{;fomBf|B-+`1h9>5Pp(
z55E6We4V|(Op((%MR?MN>)v}Nyt<UV$Hu{A{YNW~j0Q(%g~+vS4wIsI8=q{EVmc{i
z!ZJxegX77{Wr`D?H;V0G&wR+#-X@BrY&V&;Ae2-2!KSu0Arlro?+gV;=Ld&c+5}Bn
z*fX7OvHV_@5ia_6<s#Y8E%UuzFOw?!<9hCrOw^rd1&2^}-FLbI5m%3U-OG%>xAkY2
z{)bf;GxwdhWSh_;E^#({ofxynVQ!u}4-JDKh6@ioU~gq={%@dT@Pq#dQ}g|8+&p!!
z^|rioPL|ukr}D(IjeTWxz%KTM)faZM&#VsE$v(0Ag2jZH;=hh4+Gxmloa5%<XJWnd
zndxw|OC!tP1K<?&!Y014F_UNRb8UkSzZ{<b<l<Rlw_x97wgVzuU+0-Hl<6<{H<|6g
zJ0`R9(-jl8Hk|#O%8_83@VUm4<rveP=cg47+z(XRF*bt4BYYD+*GMvj@jtMM=WG0V
zaL#k#WlI(^x!<hvlsXcx|NUd*#XUk<h8z6$LlVu>SyIeirlxEnM@`v8PMETN*>h1M
zAoyz3_l1W1QOB+Ravg5IVykht`GW0>JI!ZoSKMhnVVfcI`b#!AOZ1igGHqjTOaiB&
zMW8hFLqKy`5dYk|io*2=K3sU&F8*CiBBHk9#g}B^Wl{{m8n<2^f97M#P^Nsr&wj@a
zbLRtDjPJfQcUP-2-FfLQ{+)|s&*gr-cV`t1+#f&{XfeI}vbejtnBxq8-SYXn?Hac4
zFlP||&UVwtbjhwSNecV|XS4V4F-av{5by|FtvF#xn6rZA+BSzxth|j+xTTmXS7mZM
zsa(MN&M|7ofrW{ztc|awVMS13=HpYxT6ufbGC~h=>{zpKAq#KgX(1_(3j#X~7ACUr
zK6IQl!R+8Zty`h4)vGexMc*#Jv}<LX?4}*&4dUO^I0CLVc2^s-gnc!f^nG)sbi^I)
zwO=QhtUJ%fX3c4CIO}?hE}J#4x#14QgGU}5V-aqa7V+VEclg4Q2X+F!JbAax40o)(
zePtJaZ{-CmYejPd8;`rqmuxxiHlMRSai{r|ZO5JFV>f5+T<I@!sQJ*%lRG;fIxcwg
z<<5~03V~%!c}d`)&Y5@q$N`hKv!7>5MARmHt^s9Lhx?lB2Sm8O%qwDe6UXp(xeUW@
z?h`igjSW|sjLwHEG<<D1^I1|rf;(g0`Gx~Bjn96Huz<u9OdHR97UhVrb@*Jv#`26k
zd!GNyNo`y*sjpQt1?u<SInM6(*=xno16F?_NoGn`7LUf&D-r=B*ChfJu1j3_?3V1{
z8=8H${g_RL?CUSuJp4i57nJZjeP2+_Z}fdZ5x>&+1%+!aum9TVToGUaDr)3dy1*%@
z6P$vam(1|8E%|lu=w7bF&dcRv?qnw=e0{j^a=*`vXACo(F8bLUrO#qcFlT!E#ksqh
zn`MpI13&vMJHnMg#Y^G(rUTZ0Z#;@)W-4ZR2UVc-z|Vf$j_VBv{yZrEwevNzMR#>;
ztWDRXCpI#C&kh>pUM{H)+Ie-?rS7i+FJE1)l2Z`4o5A5?F12W9-YbPF4{=9lg`GRw
z9D<5@8&jT1F`cY5VVU$bqw(>jR}Y!qS0*%a?`h}W(~XK=J3iQ<w`<3N-8&8}d|1TW
z$SouF<f6ci0}Bs|f;mwa1>{)XJzVyPsl6=?Trq07J31I!g6r3QaQ(X3LW)Ve;{IXT
zgRFdKnKC(I9$fg-+jIa&)%ou6tXI_nqU%=Ksc0AI$jW-TyI;E4SW+T0*Q_V+MxdFz
zWSU|6gwu}EdA}Q@8eAHr8eAHVs0%9mbez3|i^Zeqg4#N!Mpfr)3b_oqkG$4?y~YeG
z`!29+7=Tmo1#S(49|!jyc(DB?Q}g{*+&p!=^$dRK?mqBf`&*{w`@6W;{=P7SeJ%6f
zMj5PSg~TiEFW?9_codOPA)sOKEFz&|f`-AXhy-v7F0l;<6@IbjLlY9dHm-ZFWw7B_
z!><LP!r}_|RfZdT8-6X6V%W`nqiP)w<7(C%+weAqYs}l`X}2GUXn4J|h~tc4f$j8$
z1J{aEIU;-$UhgzwStEDgYm6n!GxlQJ=?1F2q86vFMe{5CtBTyt-}7v0KzC#5FH<&n
z@?EvkaDm1;!vzlO3>Q4_J=QR5)ip?-y!J9<<@B$Cq*~?;M}YrMz=|D(CXf@o~iR
z_}9Yi9~KmVs$d%qk=I|cdH98nTK$DK2w!|TJbMRATf3kAp3c<=4!i;-=Ghh3AW7Kl
z`x?d#(v4-m4*JGOGKFy$ESJA?L{;#CpZ%^*Z-)nS>q>;f`5G;m%ApDb3zo~@Ju=lf
zq3(nA-#cF!_xQ#z?&#$HeW-cE^=wwbm#<tSQIl<hZ;U0&q}kaVDyG*3Jkr)FPMG8F
ztPt5RW}&B>ARNy3u#r`-AVD~sjWOrZDaC?D=Gi-nIAR_gP+KQ+sQEx)ECYmpp<pMd
zVaNL^1C;z8bb&c*GdTE}z83@+Haa^SgA?r3#R>~%%77B~tmEKR9tq~$I5Ktf0b&v_
zn_1yg0Xdh})m%4@h&IgLF~v5@Ziz>Mf~>6ja^A(#WpjLE8khUVFz)Hpc5aYj*a4!R
zu;)EGC7{6BG<$~;%QT+I<}I=r!r@tKx66H~J!jZp=g@d@&$BGUhB$}DgZ%GU+4lR2
zOZ*9oP55xTwDDm6O;)!3x#ALkuEl0RN~#z9Pq0Swfq?jh;G(xt@Ho@qW`{;Y5arSs
zc$^8`@L%+LCl`-T@{6i<Ow6nK!O8e4`xW-93^SY-#;ssG@Q(Eg|5b(?v5=Ih3r?9E
z<Tij(<}s$2^HZG@`WjyEWMSDhPuuxG7E|>3sfr0-8P+{NrD$M3<MqxKNTcsw6~o8t
zr+3k-(Rc5Ns)0?(uZO-dtdK_EjU$`c4v2J>{o1%QowwmG$Ck_dpwQnC)nNViftp??
zL;0_ZzA;Qp@4qYtC7d&YJD>`>8m#}mP+KR%^tt)|%jfI(ALKrI)i8U9)dRJ4e%rzX
zCa#N{@|2P3VsD#6$zsJ>ub1&L-8eE8S9!|>P9_l#nApt<Qw2b2l}X%UL#KB80aiXx
zGPdE6xy}mZ^G?qOC0PY<$AotsIQ?GeYWtv2z;7-pZed~qE@Oi&xtM011Si=_aFU&M
z6vS!tjj`m8d2m5z0w}?sy|2Ns$E>jO@vCD;d$VshZ~3_D$kexvHw>8cvcY)?)M07x
zjgc)7p1#Tbbh`*A-;%|TUu;P%Io!9obM@m);c)hQN2V$|@G{&1QJ<L23sX5Juz>Tv
zciS4rTY6hMwYOf2=Ko>$T*5(q!GVmp;;j-6`U?&`VE@k4e191?Pu*%ggCB2q9eA+)
z4Xn9&&ah$Pl%{sPh3;uXa94da?NTf4HqG9#>w((3yy2F1W3i{**O|iM;&{^T631Jv
zHWF>#hyJZSnsh_#`u6F8$s5zm7!NOV-pna+X9@4b*;^JCSj!*jzOvBOX^RA}dq}s6
zTGSB}bEZwwj5m85-ncmwDO++*6IXwJvZzjSKHs_Hz4CXaFK*rO_4WHbA9sIzz4`ZS
z{k7@+=HJ8T=SBTbulze<7VGJ2;rIXkJ^$+a{+g-Ve%9OGxp%*&MATk?dX=HfuFO}`
zzw3BCce7oO-G6B1MU6N<_LHCLL~9=}n))<^S3~DsTef9~HwVwXwke-xhcIpB>j*9Q
z{y2*5kq}ekZu!io<|~*>1v{Bnin$eTvWPtH6n|w-tBJyf8NFh!ElzmPGWO6{pCWIb
zIpx=)XEI9|8;`bD%v%3UK|k}H!rnO{|7vP~Ub|cx`?J{T=k$kBs;9hXO`jikZ^NHp
z!3{2PTe=zx1C9B1GPb(Ps3l6x2+KOSYr+9F<E#@IN|T?Nf8JKt>}ad{`&8PTQ(+}R
zH-ELd?aAnt)oSA@+qL*&kL=3uAj2h_cQ3gTTV^<Ou2IT{#aCq4x`!L8Y(72hwTYs8
z^sVIE7gq|t(%n7Hr#C!%qtw65Lq73ds%mFn?BOV%{F^7y&Pl^x;2m?z&p#KMD}857
zJoZ<|*h>G<-6wWeXYiYzGVcBDp=^8cS*O&ERq9h>FZQ(U+Ew}RbL1YQ=cn~EWA^OW
zQ~C4cu6O>0zR7H#ezl2Asua;t4>XE)TOBb)FWc>ifnxDY)5k`Oi)T*Uxu)jO6ureo
znZHs3#Wt&C74?5f716uYa%Sm4+e^~}cV2imaYIHy|CiJdy(QICPB<Rl8nfv%N6Zw?
znWukMPl<JV>a@%KQqo`BQ+kVw7T#T~k`bi)N{dT4(NXzQri)9QtJ0-~LYa#qD+N2*
z0@r&kzNHY(wo^~)MM#`W^2LzF&rf>Zp7&+N^2fV&Nv>a|+MXcPcQ~=Q?dDUSu2WkS
zkLSE|>p8${S67p>b>A<&7qz$lRhKQ8vH#~T!xNkK=G0F8`!V+S`_<1IHr;$Q$H`&7
zzIpD<dHP59g!)-2OkU=HarU;DOR|$o+I?p2(>k!_>7;kFmh4Ws^re+!neOzG^D1|h
zC+F?^b};p{>Rofs?<<$Qe67VBtoKxT@+ZNmMzvoTCZ1aQ=hBitle}i`J9g6GX;58i
zP@U^ipZJi}8AY1=%{2Ef3tG1Rk&(~NDa}C&JSQd!aI`qc=&(B#sjx69+Vin3b&!~#
ztSG?ov(P|;^-zNx=g%cjrVMAJ!-=kD_3-cZUaw6yzkPAU%-YR2&v>`Z!Lxi5Cf%7M
z=wH%i86aD^YxZu3%ompI^H_L`kF>5i`&=(zR_(b)b&tby9v;e2dUE4xk&N#OCmG)&
z&OSAjk4sfQ%U!rM;c1rM)+t)9DVd#n#FTg|LySF_hG-^vc|Y08l6hkBEY|)hTB=1$
zR6mL6^IC@7_gu?9^Tz#&NB^x8_-#Gw#{I%?65`Wz^0{~JUwrbfY`S@I;z{M%-2Y^K
zKfJg2y^Pyi?q<xV_ZgGwkKbGv8}aExT4j*ev`H$RN|mursV9|Z^NK7<(LBtu$RjR2
zAoA0RG-npg$WsiB8k4T`hD@{Bbn}6O*EAy&g{~*1|EH+-=a}hCn6#9Kt3zpKWb2kE
z6VI}-1Z|q~kRedTc>RQFHk*D1G<0wskvLY->yUVINj95dl1TENO$#=pTrxc*vGVhL
zu~QYcP9PZ;qoD2aBB%ON7|ka=jjeN>E^%67eXWMh%#z*&F@eRBk41%BRVS|#Jjaw|
zlf38LB9IA8Q4T#BjMj@-?{tVsDC#O4GkG>=-lmjGrcF@}Jy~aN+N7RbeA{qQRJ+90
z8J{aoP4c|nktLfHl6>xgrng$`=3=*=tTzje^=8T{FDvaZ?3KN=LvU@f%N9PvMH`u=
z%;%N%R9sU$W?W|R*lly4;90998OQk2?nGQOOp0umIDKPbkMv0^H<i}{%97R-3Li%t
z??{$Sl1Xki%oBMn6}ZN`Hz{V*9f@nENfFZ}4&PAhkvur*lFsqnOB8OGJTW(Hs}p{7
zL;tz%-B#7}iOC<#75n}b#c{?(7`+sebaRsV|8!6No((CNbc=dgESSzz-mFYKxuiP(
zWqsxOOvdkN(h>K9qa9B*-Q`=Nd%beA?vgE?YZY~8-IZISJA2zjwV+!^!X}EH%@e;g
z&G&YOv}SJ7Yme@<?fjYEOKdyS7Uh0%ee6-c+@$+U(M^R*|IPBa7FisNe!W%luDNEd
z<A#+lQawxdW*f6PDi%3zSh*+Fvm_PFOLyF`azd(S2``9uu~md+cA31ZXU}@p3}ZIO
zi@6}aWUA+vbvw+G1w>+99XDi}2TpT&Uk6rh3zFtd_57l@9W3qSxFNGVV4BPOG_W);
zNSYC(d#hQpz?9ELO^J^^EhEMBr+ul|sKT!{CF9T!hE}u30cQ?*K0aw4DW*T~OT<T)
zb2~k|rgR+o(a;8xa`JlYX%;B<m|6B#kFz1SR<HWCl*m0RE~UDPTFzI~40^=%m{}Pt
zrPHf^AtiFpiA$-jVwU-8nn6k2kC`>WQhL4Wr&1#KyttI=DsE}7reQWuW^(GsMc&gz
zW1q~KvBaZOuV?-K3}e2ddp0|D>h(;W57O1G*SmZlNS9Om8%@o$i%UPYOxNh%cq({y
zp$3R&GF_)zJoW{*wdzrwT_*GHOiKN@h`ZKu`H~r~(~kv5ZPJM=S*ZVLipb^{mnxLJ
zrycFq`?7TQq$IIeDgXGBn<_50?n?*`nDRNSDe1ANcBGj8t_#yMy}BYxGHpUtPd{=M
z|Mken)394F)~h6O&B-fiGF?9tBvf}9TuaO{<~ypht3>l+>&9<E5XX3T>h*k`25~i5
z!$y#X$dZ>qi@1|xmx2Ovk@s|=Scz=St&;6YVzIlXyb$`Z$ooK--d>$uUo<YZZcKw3
z<=&~+Q#uJ^lr6~aUZ_!li@1|*mw=2?kJh-@DjpNDaq0A<)8tgQeQ@H|-t=YDiA#%J
z#NrYXk4}vf3$L28;}Ey@niZE$FY@Xa3axN#6%DS6^m!SW#HGJvgOZnhw??g(%R^R?
zFq@a@AD8%ds_!W{)TQ=UXVw?bi!H7bM7@7S>bwk2;?$pVLD}=)qo<BG61|UV;&;_9
zO1PI`*_FEb+Oi1t+4><HHH+K~WhD}PSANym7ThcC*(&h3&DtPfc}nu8xmkBM<T%Zl
z7{t!@YD!K6NIJPyK-sl0VS(StFXziv6>3E&9`VSQkysIIl)7bZ)*QPq4#OZtka8d6
z+~rcs=ZHG>d^y?JXr&q)e0$}w%&b-c<)=j;?IqXBRuyJND<1K<4A#!NZEn^azHko1
zAZw8JsKqJOS8EOiwN7fE(_}ayw(#`akPVx;&Q)w@W-dEDGt4AjA~pC?&qQm3gza-W
zT|XZU5%rQY;y$KOeN;C+>tYRKSnH(rJ57cL@r9>n#+bx!30?R^ad!gGv+z4b%f!!$
zSA}X+p3s*NW)R&zhtuuz(L|8;9)|M<SEM#|MZb}0Hs1c=K*QZ4HOaH$3qfj)Bqj@Q
zi_Tg*>uuQQ)@)HPxlKIBTHKE6rcb+AvoX4LQoByGA!ktG>6xh}@e1j|pC+U{uxyKR
z4KM7Pn_S^x_<_fH?e5hUN6#79s7O@QEev}VIw$G5xZEXfo81A~zqR}}Zsz7c$vQ83
z#nlGU<u`V=wqId7uXE+s!LHypXAU_hH9i;3I+}P?vn=kR;@Sh7xwg7pEL-)n$#wR`
z{v}N1r)CD5#6QX~{xl)TLGtLy$~ihumd{^v(x7rtL6@1dTCeuy#7`R8c0L=AuuMo?
zFg0|hKyY56$O4T-p%VrS+uNESM$Xu~eo;}=YR1f%iw!oXE;S@|+O9L^*|JGXDj=`W
zWPwH^{~I3WveWM(HMU#Wa=UV7Z<J(vGwts7fV{$AVqHSll8ku{tj$o7zxmDBTB=Yw
z+ho<2D;Y<!mT8)9_`P0W!L5~B&R>!Adn^*NVfI=9gY-9HGp!D1PSO-zvs$0gApFg=
z8M_W;wrL8lX$Eum)xP3do;=^^;I6Mi48=#^U0lAdVAp3&;Wfr!>AIR%T+4+)(jUOm
zdqL9gG=<kZ)&m)4SN)1>`Qdp+2S3?!HtbCLekC~E;_jCzoYOvgGMt%u>JgKm>P|!X
zQntPy>n5D<`B`wHUFo02oLyGQFB9|1rq2qywEK&M_I}|v8{Ae1Y~Wg@QgKN3++DGh
z4Q(p~9LnE_`0qG;@*|7n8ci*h3$oT{h2Ir?vT<a~?%`rAOgF1}EhR5}{N`K3t!vFr
zd{J2M%GLJ3H(VgWG*o(NLFZL1R{0Odv^fqet+bh}y!g@Oh2IL_%@yA^)moo#)4M$>
z9kzQ-SR#C<TI<I?x>I?QU3hbwL+mE`lb2M_8ApCPcw~(t!}NP+KbaRrx9<${^VRn9
z>)+U-b0g8S)#-rNibY8e`P`2*@m$jpWqQ%KHsK+k`++8&Ybqe#+z^g(3(r=CW>fc8
zh8>e#>L&~9m1PJX-}yH1MwrwRixXKBCn+vV<Yf#CUK;2%-C}Lfr-LPH6a%KeY152-
zw8iHn`{hk-4|bPmsxOrNt@)I5*{r2&*QQlYSe)i6c-wzwa)W8=>qyI^7dET0-2E%V
zTzV>KOHtRt3|9`2<O07)Mt94j9Tu|$Op+%iFYt@JEOtus*pXH>mb0->Bvu4pV`(eu
zGHhMQ>9|?KlI_(L)2R#RB>ALeI9;f5>ua=1_07^)E^%3EmVn7-h<52yn#Wk$)mXl^
z6!Bcq%wFVdd346B3oQ#`jE+0Z-L%|hO86X4e&3VMevEIIU&-4!nX4?U@$K?6h6&r}
zWU{8)FJ06E<#mF1%bqB1Zul0QwSCS?D0e%AdlJgs4dK3oa`!{HoNVd#OP4)SJk0Td
z=kPuMm3Nb#OWdeCB?Bs;QVPBWXMqZd4Ev=;r|<c%yz}VI@+(tpQY0@-@_IYX`1Au9
z_YsU6GQ~zkvZ62X{qie*8;g1PHQDAR-uSJ#HTVtBVdtjC=i=Y$yxxjf@Bc6%?!nF0
zz4L>tkDk-BQ4z1mgKFXCU&%Tz5~2lKW<a#8|1cr!K_p0v<<Xn|D<yt<Xca7<V+rz2
z(i6p{4MttN{!V%2@=zq#?99&jL9(f5+beJQ&rAlF6v^+GUzuXS`QW#v{#Ca1ud<{|
zn^rS!oqG0K!>v=tE|OPJoY*=4)1<xgKW*AI|I?)H^MeAIcmL;NTs7D0_mj8Fr@+gI
zlehgfS0u#Nf^zY8mwR<y2U%V}@Mbt8x;y{;ZGX)f33sbNQr}-x{?=rL7Y;W0_Dd6*
zN*}5+JnOn!{rv565uXixyIBszZ2bLZ&)+FcoYVe$g3MTc4s3?ye3k<-D|Pe|-Ypl2
z`7oj1>M_^PGc)+xYcw8p>n8M_yD?+${Gb_Om#jA)?JZu<YQ08Ki)Brd7U#Tz_TufV
zl4}&f#lTVFcLhbDVxWtQvE;bl=N9WZHvSV1N-cJBxKsFk`IO@~-(K7}KS=J$R*wq%
zR5r%2;H`m1--EU69`w3@501O`X8DxkJIn8FogXBZa<{SuqU7nhVvv#<Gamk(a!U30
z#4~sOSN=#yYWp4>*QJ}#x8#v*wf$0qwHlE*g^xKRHyobC)!Gmm;Cl3sY+nbf<eEs3
z%c2h+lI?3?m0aTq;#sd0cvmoq%aJX+kBhNjd7AxFn{&DS>;6vpq_Eoc(Qi#-jt#T4
zdME9kAN28H3D5iGA$m7?CxdxgdfqL!>5M5BRKK&bWAZ7VBb?bvP8XV<DVi_@=}#+Z
zRW7;fC3iyi8p8zT)Pr2^FS0~!Cj4Yi<=+|Dr*Me3>W_fQgq>jSyh?$*3+i$#yean_
zZ#w5qNtbPr{^H5*$UL(+;M)Z0r;_Xs*=i3tUT}COJ;nBkTje	gg#JK-$?rrp?O)
zX_sQ*U1GlIjiULf%{+&Af2lMtXiO<MC0BHKR-!<iftm!1pv9EtJ_{#H{b`FA%5**{
zoN;D#^2|>L#?ivd%J!-C6&jhH<lA*#igC4qb@t?U2Jg12FyGDXJy51D$1BEse74_{
z!h5{amtEtXeq6#l=3?``qDjsPr73rdo(lY(mTh*z_PnA)`zg-dMIG}tX`5ZR?OVig
zVPVm$bux?8-_PQmwEwxl0_UeHah5Lrk4>djCWBSK+*8ys??Sejhu?hX2EM7n)lUU%
zw_eYg@W!s4K~`(|k5h_Olh)r<sI22-v<mV2Hr4q{N&IF<qkl3?B`fB9({6v!xj(J>
z$v;b$7Za{B2FMxiVwlB0Pg_A>|DvAdWY)ZG410H~v^&HWE#>aHK25{!LbP`g#}(D^
zLkB8SJD)YD^PJ%J-r~J(O5?{}LTA~}OHP<RHDh{=C-dV_)mi-WOcnICF6!;P#C9y(
z%S7HL-ytq&QEZVaUr+dy47-YF0taR`f2|XGD`Z~YaL;d&^8&q{lh}`~_B4^Vsdk9-
zSroJBp7)}dq&?GIJ|Eo7p5hd+`^hOeiS;TMYd*YToGEohZ|5fVW3N3#<ZUV&irHVs
zs@zh{d)Kg>ui#n2-gX!3BWGnk9AP{sy{3FZM*EIR=6PlZBAdVd6MQRRo_%04n??GD
zd$x;YA3fu#IK`08bFJEai}RfxMt_M1H3zGnca(L^)_?GlX^w8hd+9(v!#MLrFDg95
z653;SGCdAe?&6!Lr7+X!NtCKsad>AZ|BJ}-*;~DQ>Q3<Qy3EC}QoQ<8=T<MDPYv%j
zFg3_*{N!*=%kUtx7voafCv8*zZVc<>lnQvH{#Ma^&7A(NUOpEZF4<=C?@UasS`(Vo
z#5U!LXY~nQ?fuDXg@jEOT=Bc*oEH%(n>}^L0!G!6OL9erPd$xTeT0Qqqj&PR3DRL~
z$D>r$G8|6M-qL<&gL-Gh>Lch0^<8KZD3unk5t@A5LQ;B<myYuRtrO>N%~*XzMDj)6
z;?+m=QuE?tRn_`G=j|}rnzzH|*p7!?a$CG~+7G-svFqt6#b3JDb0$>J11GVvrvkRA
z;W-OJlPp<Y1Xz}a^Ie==ewOXz{bEpZ6<RN|X!*xkypv9XlWPemxxO%!R#^^CuAO^}
zI_BNVHuES0C)ePbrvkPoujfp#u?Hnr_1~uyt9GrwsUTSoPOiVFI)6D5zuB?qzYJ5!
ziB}97{SvVZXW7q-P6$o9rJBC!z*#Y{D_%{~j!jr26kG%2B_^y9x?J<2hcQxhS!~f#
zo}SR8S^V>i6;>bF;=OK3<3=x^&j&ZNrA(bsc5<qjL0D&|UB$hIHA0v5b_%f{(=t5E
zeqM&jqIg4CXXf-BJDEY@;1FA+$`3KdR$=v#Dc;w#44(=mPo43sIi3GR%Yw3#Q*9vz
zeQWUH&6*x_lR0_nj7QDt`~~k4)(TzbD=cQWDQz%j&z?G?tYfz2gHGl-<`JupY;nG`
zhtXg9!J30ns>@^_rSVo=VtCGTP0R4DfO-0XU^a_nkSp4ENHWheIPkM+tCx@Uk+b3-
zN*K?HtqDy!rFcxs(Dk_UCI;&#r$i-I9}$tY33V`PJ+am6&7|F4K6}LO?7F=sH0jgV
zCl}_1F?j5~G1-4jXwoG1l6FysCmmDSH-&X_$^~#~fRf@HNKzEC2PMU)HIStE4xAJ(
zLz1G3KPV~wge1kKW#FXv3X&8Tf|H^iBq?Uj0VPEvi)&hjj?7;7me@XNv-La@t*X{>
zV4+OO5y4ZH8)bN(dZ_q|ef0d=`v{aakxJ04a+DHut9>uSuH>hAmt@_(shxCK8=&0q
zF2Zt7N&Cd3o<;%DS2$eC&rP2Et;nuh{B(wul-{wMi+q1uEVaG0ZIk0IcIoXNw<i={
zmK8`aJ?WMypL0hm*ZEj)xx<>`m#_aD>Ujvt%iG<zsr$M1Yn|nsqlsO`R@t`Izdlt|
z|95`9`pcWIXD<i;`VBt_ss7z^&7!YAK6l@qzuwMni`Cl)U%StRt4g_P9^PE=qs+3e
z?V$<h^ltvo8#La${PpVH=TG+g@BaV&dGg|x5c{{!`wo}3)cs#Pul2(hUkl#H2bE^|
z>MpPS{G+t;cjdnyA3iRBt$%!JRF&Sjm^*jsYbtF1ef{?C+rR7L*ZJo^x%ly|z1(`a
zdh30Eb^gy;_R6{}LA&Aj^4smdAOGv#_ow>DhYI2Qe`>V(<utdf{w-g(>(|3)KOW_n
zOmm-f+yCc5&o6c|w(@$1UmDGE+5Gg+`tF0XA8#vES-aA8cae&QY~+#VM2&uz%MX9l
zh^$gRJ^AzH%Ldcb&oH09{Gw!=$od|8KCAWf=5w2#xLl;7C9~JFo?HB3fuV8k^NThz
z?w13e$aHUh9B%d^pw1>kq>o)bDB_@BK((=dy+-%qd5#4JbGSceZkn=b%2N)d#UDxv
z?BY&*etG}nrzC@E>cT(gh_<sA)-95raz19-d6DzaOcH}tR5m}Vu#lb8b2xRA$5D%z
zV-HgdrY}tmXEB}TxOQn$u-4}j7C8)J?X2Jb6qwuBJYy4Ve>&G_m8tdP7V-AiJXU$l
zerp}C=U!MVAu@H3Mfc%@E4Hc4UB3MJ<fobHYp1<b@~b~{Ui{?79ZLiM_{q&b<M!~Q
zMpy9EW$y0pH=PpRwz$0WU+@PB-yZuE>F&jzTRQX(J>F-r#AVJj;bWH%M#O6;w8*d?
zf2mU&$9F#Y>Y*bS@0fa?v{`g(sl}w%3yO~Hd$y+N?99ir{GNJTx0<xdLvE(J{^etH
zy*@pvkUQ`8-1*}i-~Rc0$MY|T{o1A*_2#3J9e;0gqfLdCg!;3KeV;S7mz3B^?2}#6
z-}5p-NG|^V-wV}O{rguPQ_Tx5kvchTQ-%H1t4pQ)pZe4uk+A(!^#AbVtH)<&$kp!I
z`M>D*-?wLvpI&|Z_m|8+AuWCP^X6qK-s@lfe)^|}rBc1lf-m>q`7`0z2fy|IKWX&e
z{$&5?`1Svvb$Hq4U)mHEf7JZ`a!$utqFcoH*B-Uck2*Yi_wH+NeqX!!mjC~r%3qhH
z?*FMN{yvrG?RmR<Hh2FO+|Lp?n$mfGU9ir?U=xE3+ugy1o-zMVAAa0FtMuWM6r1R{
zmO`aPS+{EZ4((VWBl>09`pr_CR;gV*89zNUTZ?Dk&*z7i&(8n%^~2d04}Yl#3j5z*
zQurm_{AK<5JiGgGwTm_C>wo`vIeqo<+4=M2*6sfp$re%TX8E~S>&I-919D%z(pUM|
z#oN|ta{Q_K`^o<8g7qw4)#qNV`D-8l|NMXU0B>d%5e5bZ4u;@(^}w>vIrmtZ85pkc
zGcf2fFfbG+C*~ByS5@W}78J)96y+zU78hscrN<Xn7MG;vn#UW&8^jlvlqTtwWu)XR
zogSM%+d!o4{b%hpachI59e-`yy3<JhZGh)OGtRqtIvhG%4=FG&&;Is0T|L*GS;9?E
z$+hbK@#jAZERHQ-?r=VA_8h%=5&`S?#mwsy`O0N;sb!hI`T?)!&J2@T6cRNUy1Fgu
z`xZY`SePjHL^@&SGE2EN-4(y{J8YY8oLjq8ICQU#ywhztezw9>8n+vg<W#gjrBD7B
zC7Lod{qqiuj9m&xmnD2Wf8IrrYr#<l2J_RBKUjX)Gi=CS$@2P}?8XD83p6YG4eni*
zU6-DHE$4$uTW7OwWXoE;?hU3M$`Lmvx(VzuX)-vWl%NwmfAyxThGEfP0=w@`xh;~-
zRVe#J@b$e5w$=At)0Vxn?65Bob-DR|N~#0nan-VAzJ`UhExxm@zkif^%sc1Sq42dw
zS`N5(-`U00n8B8NdPV%&l+V^TO;Vg5N6+RiE&6G8gm<^jOsl1=fmegI%D3Ko+WXz@
z_hf<0;E=m});OQq@b*P{ZDdZZ`Rtn$d%p5}-m+K7{NJ!-Vz-Rvxu9$I4Xzgq0*tHG
z?tft1knh0%Ek*It!hfMbuZ%TwW`D1}$j<)V<*#$lx8KX(eD}L~T<+4Zg%jq#Uy%D?
zzi<4?)9)W$y0>ionU=WcJFZ+#U6`jCI!%*TFf#vrUx%E6{pSt0d%QfZ%&)2Ke0_3O
z`46|6A0Ov$x*x7OGd;PAYo*Db>;mtaZx^;K)Ye~>doo?*qM};nRBg$3M|R)TQ9mta
z7wPqM+6OlKjYoE0%P8oHeQ$PRMQ;5*&Dc2ZOR7DK_PqKTe(RN`(g`y!+x17&JZ$bC
zt4YhaK7n_W;mTE;PHst+TjH}dygVQ`_I7gT%-`}8x;dw9Ww?IdEo<*7`xn^>>*VtF
zYXYa=mMdrb`KNPJ#kp&hJY3uO9KS8**3#=@Ot$2`-qSpLN{gpK{3L_whmoz3(~dY=
z=|$d4-NdD|Y0;t+tm2nlZ+<OQoY>{@QmV#dvRK2@*E`PG3f*;7+yCHBM`B>?_BH0~
zt3ozkf6iSL7~DKrvX*ZVPsi<F1tlhOEgzefE&A~IU_5GmGCG=cdl>@*gD@KdgF12f
zNv}L5?dar<e1{cyT)x-&_I$Mb_+CY!G;>MVtMA`0Z4B<t5a2m>qpH2s=JemfyZMUZ
z2Y6dgZ#ZTh6SFa4^Q)V}EUoDajP5DSs|*j!`PwO&eD%6*;}M08j0+d73idf}7kT(#
zd+<SyU7JnXmkGYPde(UU*_)>YSaSkpO)A+%Zl!)Yv-0`;7xe{ole?T9)!%Rb@O$U}
z)_b@A^GaF$YY_W&TwbHP_vWN?O2t)-XkOj5e`yd41H%J%1_mSIyc(aG7oVJ;SCU#$
zqF0fUy!K9P_T>PE_K&}7yJ{M}zAyV+RNH)M-Ad2pCo~pr33T%|zO3=%ZEh(ud*!3b
zCh>b`+vCem-7m1(uJ<`~YWnNgjrZK<F5gq5V|MZE?7Z#Lwl!y0zgelV+WE>&@yO71
zbx)ou_PhOksbc-_rQUhI<?A)NAIGn*bDNugU;eX})bYsobtY13Hy?ejkvRM4=7-Q%
z=fio~Jj-_9oWg%MwRV|(@9)X~gC;E~epMm3Oy{MHm9EE>O-s06Y*7e2HA!#b<t7(R
z?_EuP+(JurIE{2&0wyU~)$%Wz#B%XwwZK%B4!?WND^wh>Pxz>y<#{3cM1{aql^3!p
zHXU9<CCri_b$i=;*aJ0Xu0+4xzCZZO`>jrYH(z6Ni@we0wpGmF)}1ngRjr4AZO`1c
zzF#BA**!t+@UND|0j>@oj#_Z0v7~Na>u<psD$)|yyEH&u#(2l!tpPLI`VL)iir^^~
zX$w1;v|_Qr7oT*)D}polHRZNlHffP*?~5+hcw$lVV3xDu@rBCQWw<o`wjFogzMyT2
z>cxZGLEd`tA$o#Fs^=HB497)N6d%6y<}VXr%fGvZ&AHF{z4O_H6CPiv4geYQ<=<r)
zE=#_<6EgT(W!m4lo3uOiId4}6o4i{Ptnh5dvw#zYFXCK4>IE)Jz0f$rs=NDY!imBc
zu9+ZR(_%p~Ti$>*rCtY_r@I@ZC*!6m$hgz%EJccBqRPOgZOZ0rm0?$kVwP>)xg>SF
z6ptkzM6tpm(+hzTw*tEt_8q#=6$SFW*%grQw=58ImTg`5cZ<X;4W6~jj|R9WOe(p!
zy5EAQ{E*?tguwX$B5PWlh5i`?1WH*woY8-Bjom_x2*U}LwN6e8g!q1%v}~W%l%UE}
zWZw7jm(h)jBAn?D_AV_-aCLYQdDwA<lEN2{7YZSQ0#y$R1y*rz*uJsg2xV!JE0Jl@
zVshfQ<Z}{bT*xlNzObv|!r|WL09S_>2akcY1r+dgv>1Q57HGLaN#RQrSo!5QAd_aL
zfmNGWgA7`B6QtPWEZCgPGLRL%n?c58%#v-<Vq#)_-r!-u{GMkjvo@0xME|d4Rz&E8
zDu!6*aL`gg=-iG)nPGfuI5?0ka9aMFcsDJ0AS1w;9&_15n>~!B1&h-~<}fQg<eBAs
zbb*IO^RWO!4WV-jG(&j0T8uL|M4Ocodn&7b>FR%NO>hfVnPJ#3{3GX@#SS4J&!5Mo
zdX^{}`)&Sc)BU*an!Mlgi%L7|^VWR6`|gIuzCB+5{#IAc<6eG#Q~bZ*KR>+@M=had
zF)3x1GB7aAW+1w8qgRw#oL^d$oLU^)WypU>LBQ?%Z__)Bq4~@@vNo66rX5+^oY~X-
z^1}c59J?%Q-|wvn5_3~AlhtGm5-UIPug3OY@~wMoBzjjWes_M#ZQ8dy<lR+|<jtSY
z3#<)&u-W@<#zQOrwPjpvl6xnco{-2}t#A0PGA+e-LQqCN@8lEZ_NeZEa%pYt<mrqI
z1=ATB)QBr#^(yihBpsgZkI1PAGqiAZQczG(NJ}&@0MSMkMh4XmAJ^&4iPk=HD{YJI
zd8Wi(u^TO?0#+ULQ+XkM`?uxq>tS;9weNg!N|cM7_TZBGRzJn?{N6aT`w9o1Bro0{
zQ}ii(o$ua94~tH7$Eoi6zJF_^nE?}fg9-ah@y2<jd#}6x`cd^$BO=7MUwoBjeA=0R
zaptab`aF17eGZy`Z?9SPj+LQ>C+tF+Yvd-HpDp_QH`wp9N1Cg<iv1@4=Bm3V(^A&R
z-&*6irrE&1aq_u52?wDY<(l(NzD@C;Y?%A@Z+)ZC>+>c-nG4NsU72L2@<>VIox&?^
zPNPI^b6JzOsUPRxn^XPdSmmC_)-QfMs5DP4Z{m12J1f5L=sWJ+1}#As7`HFmFzc7X
z>)<^-aT3>BV)Y#V{B4x@a;p4`vg><pfv-LV^6rwy{{Qk@v~xzbVY|+%%T{xR?&$tK
z<L?qyy@y@7z(RAn_%VIf)00nLdsvj=pOv(yW=d9IkZ97be_a1$YD4zFYw)*Zc-K|;
zn8#Faca2wbO~llMf1b>CT#W%AavyAoY1pVZYgc$zTgvC%j|BFv`*lj9+~dQ-<~w$K
z4?H>=BxoUZKPPYMwAW{UOK+>=5uKdz?Ukj(n^m9e1I`{zdZ`!ObHbwMZk%?>#y-{j
za0^j~#FnV#BJ#~&?03Ii+mb8tKx#(gp<T^F4GO=Pt^5-){U}fRm6x^CTn}&F?7A?%
zQBCvX>@_ZbRd+Y<y>L6>=F{-45u28TIMpt5UCqxbX0o?$#g<2}b^S#c%F;gEds-rG
z_`=JteS;jsogE(-lTtaatau`^^NP^%Ox24)E%tw{Wj$1;%=U|a#uj02XtnH_;_H6J
zyt=jz4F+0AAIjWYaKenoT<PrT&o4|Wf9+i4VtB)k>FaqLg=}}*B<Bh~8~ffh7hX7(
zerKB?xMTnB;I(F{-#0&-E7qLHu;cmy*$r1bie{bG>$!ba^PkCF?NfnElqW}qm~#qA
z-<7KhGdlI{+^rW{vIbW~j?LIo^1W^2+Ue}lYtHOQ`ZRIv=5M{#k<BMp1oZ~5J>F;U
z^0n2Xyh-hx!G=T0+mCXwpUD<H;d1gydcTVCy^n93y<=wZE6sM@r+B91W8|ULGkq08
z-_Kc`V$_y%`myhB{q(c-=Y)BV-&YnW){)NJHd$!xM6H<TN21q%n=U$Y@4uU0Q&t~8
zqjF{M(M^^ivoD59&d7g$`Mt;!Y2OFe0@k<dtgYa_+r|EP?b`@9*|6?}S&0hq*DAL}
zS86HCEXxhbKK=ZZvHISCx}2+JPOBBJo$SkTnaOKWv|KUbk(6)kC*33GWgo8Jac$y^
zPwZ>f`V<wPefGVgaPnm_w`9vbD?_-C%sU&q$NvE@`-cjJh_qg{{U4%bUDmSM%r|Da
zHS4!PMSgef(}z9VwoEv6OTD!H<GL@NuV>V4@A|%RX-c&Ge}VUHm78Ds+CO}otEBdp
z+ue>|ENbQgzD9+kORR28DEgbw_B5?RHZY}OLBpN*+V2?WWqy~7DY7n_)gZ?5`W|0`
z=0EYK=<m_~D|#zWrI-AA%pI+DBIm>Mn@hr;_|1A7sD5LrbmtV~*-KU^{fzW4Fmk*h
zwb(e=Ip}6^$)i@8(?>UJ?6|gx*ZtnJtsew0yZ`vRAwm8@u9XP4L)(<-*GhkHaaYS5
z=uG6D66KpaQL?jjS?dF)I|3)n1XebMHZOUcTedv$%@+&B_44W8uZic*Tsc##T<h}f
zZQTqJ>qR|p@}-OWUH`{>rukNDceMAC`e(QKubx=bx9g?h)?){zeD}O<!FcOSYy7_7
zq9u$snEtLhyl}(xP}SJCycsslHv67xDp)^lS<kN1x=STSPgsDDKjFl)*Ew~&4&~0;
z!*ckk>!qpXC+j>e$6vC!(AuN3p-DH)yEl8E%G)f(WERKsDvGm;t#S@|NDCN9aQ-;u
zYQVl*U+bNXm`=T7lK=e!+MEl8!yd^>nj8%>Zl3?`@8{VI+BL7Nx)`wLpwSacSHq0D
zj=e&k`((7$r&@2eF#hJVE9k-Fa*0ph1NaUxe+Vj)a;kdI&!QlHf2X<OG`(N%mwah`
zx`4mpX{EX0iiz3<@^(2)x1Vo4a@8W{Z~x(s(;sAY*xhtITHbS*;m-kq7l$A4-blZ{
z@cg6=xeab#inqzfd=qRaDK6G8Do{y&x-sl*w#tq@dqtNDCmx>P^l9nsKHs@T$9#@v
z-MysYB{2Wf3dZ?M^rN$%h92O`nRsfo<jMIlX7=5dxpjvhlwX~@{H{31)|AKV&MlkM
z=iM!^_Fvnj&s|gPv%-}){pBBc?0ulN`BdGBnITop|0gAG-kuV_R?qzX#Qh#AXN!*?
z61ltEKkuc?kvPdi=@Fvkjg4vhT0JX#I;wuSy#M~CL;cs~$2aa3#0Y=33DG{SXJByj
zzebkR;|9?UYXapa+AO_OUb?}}@5Ryutxr53O!)iWLU2{k*J&>E-h2Bd1^uWAi_h^-
zXLw<DE>A%2O4j@6+NNCzJlk}($gGZCuq>uMqIPZbLzc;sd`})u<*aSKv)^M@#nUIY
z;xnI25t6!Su=vckL`ARF-%hIcZ<g8F{7i3~uRzT7RXZkUSbsme-~PU0L*mwxYizw#
z48797=UsE$GXJAtis@}>2kq4t7Wmz}w{fOYj&xk*zTkvwU#yGxbj-KNY~r&_(Uz&6
zo4fAPrf<!R7eo8{T;mp<=Q*Vy<bEj3e2>z#N+x;B^fzl)9!}sBJX!cUXS4B&BMqF^
z8fRZ_I}&cCxo%?iH3w-Yg`E#&V|QQuU^i{zueZ)h!akGo4&>Zjb@J4=CllGS+uf?V
zR|zO4+=x4MaHrb~)yLVb+CS4-?lv4g^!(zI30g+)51jM=yz%dwV8H|V7vz}3XD)ua
zWKH|6<5M@5munqd_;A-;w&N<yMV24!k}40JSba3l<`+vE`_-u0!{ysA$X;(!HV7%d
z(_CsEbl&*#q^>QO49_N8T1);~=@4Dp5ZATH`}}tIcCErr$9EI&U)<!or|;sl$<e#p
zL=XA$KVHu2H+$MIX09(Q6lES3&9m4cRrK*(q5eT%U9GvBS?2d$d^0&Y<MJ+5)}vXk
z|N3jD9-SikE9$@+;XBGkJ%P+cNmu{&?-psel9s6P#pd(`IlrcD7qV79oy6BA@TI)&
ziB4ymb@-DGLFU)1>iWf0E>>;k?V3GxRfJH+kNJVpwrgWQ)ojS#bXDl|s)t)^oRThU
zxbMge>ig_*In4Iz;`|#rm#g1gpB2D<;QdbVeHV1}15bZC+5f$#Xm?2Kvu$DA9t=x*
z3)uL|_Luc-2wXd3i4%K}-GS>5tgc?tJNoV2tGx_=9(D#leIpS2Tu{4P?d=SGqaBx)
z$FAaRvR0q=Wxd|(gf?47ZZ~m{I@u+9$xhM&ZWR}@j`KWEX-zcVJb8_z5A*5D-`wRJ
zz12Ja&e!%^88e~o(Xt|GO?KXFPvuxm1=XguUCWoQDz9H(@3*Ar)6%j_$FH4VD*wFU
zMc~p2n!)c%;um&5XIXc;#Hi`h=Cc#xS8Doy)%@}=&vs5+;}biBx1y?H?TjDq>NqN2
zUb1QKrcxfCwGTqQtQT$abGo@{uE+ZKwJV>Co!chv!6s0jda(QKnUsImxA$+Fb-tY`
zGi<R!WDR@jBKCa(b9N^sh4|l9FkD}8-q^`_>Pyj(Im!R;-*QS8ytn<UNZ`sOZ)@u`
z$6a?HcyF0M!|x&!`$17l(FK7w=ULyL^e=%U(k`O)v?9Og&2uW7Ute8t<E^{xH5DiM
zo9ABErM%sBL*`YniX^W;_l=8_i?42++_&x7q+~&>D6W@x3fF5Kn45cTRlM0Fbv8}z
ztwq;%^O>u(tUYJUb)?tmneh1sbF7o^c2u*rTe;U49Lfv2%ELJ0lIXWTGhb(DZTJwV
zIlX(P@aZisjK&Mk|37fhgJEAtTE@vQYv-l+`b^8tsr**E;=;$5zq}I<b{j4($n32T
zIrLxU#)<{(T+xoYN&+X3z0<z;PI3KVzsiHnMYp-Me?7kH#C$wTDRyt$p#VRJbKNd?
zkEQGm-Sqm0r2oI4=R4=LFf}jovXwBu@#Xh-?^Umw4?5i_zPtDHmqeX~+!qf?pY8aN
z=U-$oVW)smqPN}Ev#l3eCI%Lz-&)IgE<X9P)&i#Otg=b=*SEPm<?%ndu)BVl_n~Cr
z%5UdWH?LhF{`c8EfwojV*HxL})e(g;E$u>&te&%Fx1AMV{&)wIlH|i)2MLvn+fPX@
z7fVSvaE0q}cwXlHe~C7ls>`>3Kg_Cpv*T%5Xw`)Bn=Yn({TIca@Wlkm?=zeH@anal
zxjVMqGG5%B%=f4GzUJnqUxLif2P*zKcJla~voAGQR5&SL4p?k9OWW1|!5)wO5w9+W
za()f{ZhbU)w$zGT-$%a}Ixmv?`9pl(*|llg_Z{mESYRJ+usT6%hSCYK8Q=OR-uk;t
zdB$67-R-Amg&LQYbX;yMd^*$I#Bck_t1s_;ys@|8dIvM}Qzw?Y;`a-~12R2#u6DIg
zy4Wt-ktex9@z=f!^1&~EhT2$Z`AzA&mvQ&Qfo0RyX5C+0&GO^g#;mZ{2OeAz`j~mA
znt#?W_RiJ>_1yJ(>n0tjy8PQv>4o4yzAds-f85V7e>`jXKFz>wl^y!AXE*JVE#rK_
zXULl_Gj+MX+?iR5jc28NPn})!&DvvqSU^v~&HJBy*WUPkar%ia$-fz~bA61q8CN)n
z{=Uf9)0YyZ-Y$M~g2ztdd6MoQ)4%R=@ScCF`r!KfN1CZgx3yTl?Vq|X;h&_x_okVg
z?-%%KO4y1Txh~U5K5_bTxp_X9`L%AT6O!{+?EEt!;6cgdH%));RA!%36pj0Eo_*#X
z7UpZQHQUpk7A)@Gn8<hY{h1pY<(+RAF?8D$eX;5~&?y)x%lvJV$4q83k@tUgSc{l$
z{acZy`zFHX@xs5Y#tju)!=;b1?J+aD)9zdPde=`ahimWL#QQDnu8Y4BST^1G-+jKY
zQYrm8p(pt~=fCn~fBH>fZN?+7if5bqU+<Z5%HHm*`7hyw#L4gTvpyQxF06i5n|J8#
zUay<%?}Z<>-kjqUwMi#zu~7fRrX&l_Z_cm!-M=$8b!lC;UROC|vDV&|WqZ42{++bd
zwVOXBpIstp;bF%u>6x(}58j-TEqgohZ$jz93cJI?v%VCmxox?Wx?1y4(z35TEN9Oh
z{GmR}b{mU1x9L~+>KS<&x(Rw2CpYr@<%u=Ryo^lO?|<VQrW<em;)v_Ypk1o2E7qs_
zyjs?O@rG-y`XL{W^{<q|=Kpr<-+gxT?YBnfe(Z4E?;HI2!m{ca*Y7SbV|q|KQ}^OQ
znYir-<QKnmW;|1Aby7HEPmq>IY3E^{X`A}0lV)AqwbVi6_-@<v{2lB&Ib{y=H*qg`
z>elgtbAio=$p*U~l{<)O#|tvfb?Xu2j5TWgI^Xu;D&2M!p)>tVQufc*#wAR@@Ws-@
z>vT}AWP1|3)+zS3qnj?5Ml77D{#VO-Z}E)(AG4hkHp^JQd0zXdH+^b!>(8A*x)IyW
z6T*I{ss3kl`z^M1!SaI_56slH{QJ1_vF5YCdyedz|EJ`%OWOrUoBdOEseWA%%paBg
zv2XX>X!rRnX<3Pe9sL}O*RekrzWRNwij>+Cx#X>iyLgh@k~Vm|TtEHYtG(4r*qot8
z?sm9p(asN-W&Y$W`O@ItI`8g<qn>`>H+0vm{O7nutso;@aM`KOI|ibE^vjcFC%oPH
zZ}wJ?hHFxv&M)K8`K{E(zjs|l*wZlGBgbMow9o1;cvb#?&%}D`t#;299!@aVnQt?D
z-QN4T#q1fp+ruOdGp~F!<*KlVhnNe$p`FdytcIB6<v;e$k-UCQ<7<J`Qt`FzTIZk5
zPxofiT6Q|Aw9S5B_4L<bpO#7%m25nck?~QmBy?(ka>wQ;p0BSwiJ9qeOxd{pTxHG4
zM^)e68}~34sQJCj`cZpW&sgTwx2v%gE=O`cx9B9=S*=?XHh1}llH1|sdHi?yj_#4D
z*|X|L;}=Csrs`Y%g<S8ReAUu0(pd6v-VXJ~z;oq`W`%I%8@KviTP$1<{P~P&qQuts
z+v25?3pSp0Iugyah@E#)a9}6bIj?o@tY?<(z8Scw)ccgDmcr{f(mx9qefbk7zUkuU
zL+)p7%aWfyiuiwKst2oi`<V$9sU^%uCj1Dl|GdP}e8!~AwYjHim>;cBc>D5>idMnp
zq8IO$^;g}g(?1w%dSsq&%l}zRbar}Axw&|~oN&+k4KF_%?p|hpqoC>YM&8h+CTTB^
zTq^thPOLn3>+H_~{qYfvx3~QJKIeDQ_9Ju7XIs|>)vKSL-ETbg`1<)(qVwbB+Rhw4
zyv0r_l`(W$Mec$pnulFyYBRnTiU^77em1SfG<G^;>!;*d{}wRKo-D&~E#dIrI*C?3
z`OEXx>7~q!{d)P|wOawxq9#wRHkjZvna?eE(c6X7v-k=p%xLQG`taU*#{2t=Zz+0T
z{h$#fe`s2I#-AjQXKqz`I@jl=-+LLpI%kr|?lWg5pQthsHoJHD!DRO9ih&<@X{^zD
zJ169dAzRN1v&sFsv0F{gDF!rO@SQEw<In0Idg$~_k$+{ACLaEASXX(aYGtD|U!3Ca
zUA_m49?j)r<(tyyEVG>d#wXv&6UzkG9ranYy=9Y6qhsIcuX|pw9kO0>f19?tY{ui>
zN}haYg_{Zw^Gf^e(>z_S-%@+%oONQQZn=(<^{LzE((()s^shZI{a^FB!kLb%cl^9)
zte_E~>L{^Wt76s))|hw6`fHxf{cut8p8e&_P5j*F)E2U()tVbJpI&hK;L|hDa=&Gl
z1$}6^vtIF(@63Pa;w1e9Hy1uLZ)A}QpSS1O?mzb~m_0Es7s<c4*FgXEYz76_oB!H(
zy<OFzW)uD7=#@~xZ3i~?Ckm{;AMJ78Q!d8j>jWbP&ci?Mclo>hyQw(C{{8=1_Ydvc
zyX{MaB<I0g)pw1lS>-n`b?$$wuvnjad#hU2*F|j__Teg1UmbURY;%$QmC%tC&pGc3
zx30K#h@tY#r8%01b;4%e*VNvxG;_*|V+RfXR5_Nv6Xu%a#-*zrv*${K^8^O9?}oNE
zTee)>Q`I$FW6sWZ39BXb>@O~w9M~r*{K9nI>$mFjy*MuX<lj?&U~2U>{fN&F%2pp|
zOxy3Z_KaT0>u)(?Ybp;$MPK@TQ9eXyb<;)8?E9O;{d3vQ&k_8_KRL~H#UCd&mT=ia
zmtQSbxGv!SW};2D)Cpncx`4lLH1<o^PR>~V{FTeYb+;WSp43@sSsl3Wj>^W1SGHvc
zpAxqEP};xU+wX`!-=-UzgwOa&8VdC}EEhfUIYfIy^s^r`f*;#gE_Hm;Fh%r8kLa$)
z#&i8&g}1D4T79bN@bsgNh9WW7jy_P~u-mKFZS7QY&o6pI+v%$n;+n-`VLPR5?oRt7
zl&$)C(bLsM%dgGa>rl8l;ET@<A?r=qWhHU}`SOoueb;^d=hm%dcQ0;se9h4D+I;cd
z<z7q+UWd26b9OQ^@CtUGez&c1=_Ypn_paAF<9B~}pn5s`km&D+>g9PUq5G!13{zIt
zY0r>hw7a)u_Uro&ySH^Sh+JE^A}8dnOh2>Bu7;0NF%KE{pA+R_ej5Is*<j&?1gT@5
zRr{j@s^8RSUVV|<d!V31J}qtanK^Pcb?p}v-fo;wT4UJ6pz-VL!Uu&P9p`xN*t6;A
z!UoBmhnwbk9h{Y%^FJy1Mr6v53lFjcj|#LO?6Y#t&*JvsudVZqU^sO!-{?sQC$|&F
zdbtVxhgCVV-=#-p&1-zx%-Y)fJY?(fC6A_P8{COJ#*@bG@NP}>kMJj}3!|My<#<vu
zwoY@|abx+?!lwI%##%)cL1l^Oe+8KL>g+Q6+q-93;3dhodDnTa+|mBm{@E@);omZk
zD{+|>>>Q^HDx7Cz{nXyC|7-c~(7jRHzm)QGM}Cs}u+GP8;m5cuPw)JE&LX4L9s7Pk
zp?CV*NyUxKZj};7J3h$%Jaw-^)hGT@>Y|$ae`6;XzSMss7Fe4Y)lv3JG;sSWks^*c
z(i3@w57dj8cven0`gX<c#$NAxmy;!%H+ibAn`fRZX}ons=;Q(>uKdZTUk1Hlk<+?S
zxH#EGKXyjMvPY*44>mr{a9gm)NS<fwn&drKQ`h~`6lGbZ!uBLWaYKoJr$0+Jlf>+=
zMOwa_s?9IWUS$z#z|v)<^YPTwj7?WWv^6q4G@Tcw`s+;FyJS|$m9QFv*(F!%3?mLL
z2zkcvtzvKO=Aylv+oSY9NR{vzhA<tUe@VV}K9?j{?e;5v4D-4!=_h@VmU(tKoqw5g
z#?os0B=@X`kE^aNFNil<W_g-#Gyf7X%ME^i!o}rsTQbVhrYj}ze0O2W;IMzs+G47Z
z7GKPnCv@bTKp~6y!X)=)vMR!67TdhE7V~{S$@GIi_)h=Flb2mS9-F`Y1@GZ=`!+-$
zOqP20f!Q)9^1!;hJ6T=nBC7BHpAu2MGNt@N6^D7DUQ+%H13mBgH@IY_RZFCfDD7T0
zN5O10bLhF0chjQOMJ}t?9a0xr_g3lc9<|%`pJ#-vG)?MYcTsusa!u}a+avyID^6U0
z@~%E1BWSVoA;wuZxW(0Lqe2(E$JTvatIemiy{x+MH18JEjX`nYi-ayqAD_v`y?4&h
z5=Cv!8z)r%&B~G8DV&gc=~f!Maq`Bu-*ely&MEc%a_??{jMnq+?(nWZ?m{^Z%N2xJ
zb_gxin7@waxN@4mF!QFZwSHF;Un%c>yKbGIq-oe`g}_O#zi}_}w5!@Pxlnxf4qL{=
z<G(s~87f<`1;3I1@Lzcy-v`CYyvXdMDkd*>K5JOfd9rU?PPnGr1~11S|M(}K-E4hP
zgL!l7-;2u^HCTVU5d3DJTF{Z**W1+(ELs!fk^Q6MbaGa~ynxrY)@S@r_7r*3qp+i6
zd-?-Ci7w-U`=PCUeZG%WK4sLbF4|#RCU<_RMR5JTf59so`E<TJL^E=VWlVZ<MCHcq
zC+jtL@xDJX<yup2Xl(nn38B|cI!QV0wvwzquJC55Wc}`(oM$_kp6XO8EOt5SwI;iD
zrn5Nz1L;F;7TT4Te*R%!FJ@@y)E-b=ufwM8#rHEpc)P{1bPeehx>II+%Kx8K`^ZS}
zYi0jijns7>QQHL4rc~}@-XxxPHDX6ZuJ`7^YwNeSJ>;Ldx@h(6)+PTwGWc8Ue;wiR
z-`~u1bKU*rhbHjF7yYypo%mZ}ndMsHdwPDC)&Ac*^D;;>#zlCRm|4!gqxE;Ds>_=B
zh`U-9eKQT8wOQe@q>kUbnEBC?6Rj%!_o~NCU#VMeDVcIlOSrtSV2Aood1-EOZ6o<5
zfg;DJeg8PYU~3KM>#a@y^~J=bPhAu?cg>G@*}PSRyLZh;_O@rSoVI)mrJ2`9v8RhY
z{$ZKgX8rejbyTXYt$g<;&dssAndTYmolx|elM%n~;#A8;%FgZ$e^#XRE1q5$@a)?%
zwoJ8|YBw^Lg@&5!dKf<U??OTT2hBSe6Jwkc%DEo&m@nPx!!3O1c{B^#48xi*u1v)@
z`ogoz-&Pv=_zUcbzgTBv9#*b*_e5mqwcJGymfd}!`>#hYa`_)`hv(}T+eMaEv#oYd
z-`8_hsCxZ;Z*@Km;m0>PrWF<CS!{E9U^XG}TIhR?y)U{R%-y)6+uzg2TJwL`%%$~<
z))z3AhCT0`Uh;fVqVGA29bY)V)(CES8NSax@_oTF<sM75-2Zv<Y?1fGlTvOq9o&~b
z>F4L8)4Z<)oYNP0`?4{v?ykfto&BYapVypjnAOiX>F~9*o%_pDzIom}%o6Ay7pS|>
zsDtn4_QSVX8Jt%5&dC39JH62@xQFGr$@=x2``2x-essu0|JI9-zkC-eo4>v5&ABJE
z{JO(Ny&d(x`wmJe-?@Ewf=j*1wdGxr+pcB2RhTWqaQ4%J$(L7szsD0D&cHKY(EVw0
z{{wBqg<+d`<Gsz6b)+wnU`US;dH?mtfwrqZb*ta-UhHb`NeqZzW@YVBc0YS_ZnjyN
zZ%`@gulRj(JFIgml^mpQt1>Ia1%yd&YPqHUD&%7PwdV%kOpNAuxm!BtJretR_F2EV
z(`l!)kiWMd?Ji8)*~FIa%ORn0XUnY1mDc{Q!hb3S?$0UE7HV1<u!}Fxxv*Z*<jk4M
z&u-omP2Og0|Ec%(i~agl%`avc%hlc4)bvVj)qjB>eYSCoRzI{H)^9S{6?kBy$6lTX
z0<71<f24TaJG=Dk;?3F1*+WX&R$niQnDHlcF5fdz=`6>C&o6S!staAi6nRG4I{WoP
zo7v(nn|li-wzuz2+i*$gb>hZ1Tgw&ItiNe~W!G7pm!WLD<JY3Fb1UPE($}BK;>+D}
z{r<!$s#6xkZacogT{|Qzjqmfv+b63FdUGFC9c!`5@>3|(vgvto@rv@}q|06g+jeUn
zyl=8*=kJ`y{5(>}u3t{mbAA-B&iMB;TV_`H?WzSlib7tM^}(~+HZzCxycXM&`FrPq
z+F8t!cM`ToB`Ck*$QNecu+`YJ$aIgFvH4!FS^v(kT%Ef*Cz$Pcw^?{*zk`powz%zC
zsoAro(ycW9zc}xHXL8*IQ?<f^b(e2VeVZZD*4Vy%;*mqG5?d>I-UXO5D+C`1xb@xc
z!G$O$0q46CCEFLR7xdRTa<Mcol=I!5zasoUo?lsa%xfQ8(k9t6U90{!SB7uW5C5b2
z(nDdI#kb$CLK$y84~4KeZ4p#cjb=Tly=%p{6URFn4eWpRH!g45eb_*L*MHy4^q;?`
zmphfHJ9=D-?P|+)n_+Q;kuB=_tUAGZz38{A52=TA87&sNx9HXNEo>%Bzpyq5T}}!*
zc%Xxgfjjj4%8D;N;X<AFS)yl%6udJo|9RlRpQAf!?#MrVbdu4;<$}Q3K<Di?MWuG1
z->7P(A3DG4j?<}4Gw(mE7uH>ww_`={rjiAl(|67(+>+_AZ;7~=(4`M`F)iCN9OpMD
znV<UIxaRf$M!`4j2hEuZS3eHpP)`4Kc6!+V-wL*k)>c0ZCZ06@*_Lm1=GmgIr=`_B
z(#c*I{L(k9Og_2b6VLl6ZrV)73&K^GD!%Sk7x<vZx+tUTsL~OUy(+x|cNVNyob9}K
zQm^uXc}Eq*ghCB%Rz1_&BrH0WBS9`PAnc;n`%BYgKNv{be4aY**fi-^y6+y<JWt&!
zIAz|Mb+P(5u#>+H8PU-PoHDOv9NF5KuDmy+}qF0nu7XP%C$+jG%!(dIR7?%iA(
zk*;q(s(pMY)^ItT=cwbIo7=y<NZb*ZykeiR<6D>G(+(<`T;tr&e0bGf$qgnC6C}8M
zuEegM6sFj2d~@bzzs}y1>Ba86L2hRLZyUEVxRid}`#QH>>9NtTa3SBVda1X1xFr@?
zD`X{{o^r(Jf6C+FEf(wVuWFrn%-`Wy^z%Py)0@jVR6Tj`Ezw(Xx%SA1iQCsKxA1&D
zVRf6%Q?Jn7kAJe8zgA;5oO0IXs!FG>!_o2scRjaR3mD(MzvyVtUEjv-Kb%W*B9~V$
z(>!g@eDBHk{6leG*F(%6JUCvpq@&(Jc0-eYh*j^E>AbQvwHq2f?YC)2KHM%Amf${l
zx$LD_m%9#nX95~;r@8&xvUkefx#}DD?EF2&>cZQ-8J|u@=GeYJ)WH*(*x4`e=3cPc
z&yD?OQnSVHGX=&c*$B?RuW;Asv1Uqk;H0CstLu+9h6wzA>VDCU?YD!`HQVbZ#|1k*
zC$S}*`@7xohh%uH)<&;<*-dJXE*!YDK<s5futJU5^F7-d#Uzu~)Mz^PN!s_Gay{6z
zZ+FX+vlEZ%ZR|TdNodm{!w(u;{{Hsg`*@edWuq7TA5Ql(o|>>ad+omEjl~Byp1Yy?
zS7EIH%i@smb+=#qu-}k!M6}o5hNt&@#I7plfWS#tZ|7cGXg9|}y<d58K;?z3?2Tu7
zt@_;(OHZ7h&0=2oR{h0|DeBz~kIp&tPYX2F(tG;+icR*>({s*ProP%bZC=#w%crLs
za4Vl!;*qQ@XK~`_mrWfeVIC?r-&j)9Eu}BdmI%J3a94Oq`(yif$*<8Bv;F<0u59mr
zF=<6##DCufS+Nmk&o8|B-pD>+XZF|UDrU8_CtnT8E$HXc=KYZ}E%5oC&c`o|LUZRU
znQznJImh2-{_jQYm&mB=+g<*eCEs~;sd#Fy=gAWpsUrW@YoCko3BK+dTmEMHO}R(5
zORg$2YMxx^p)AjRa;2c!3^vydft%Cp7IO&Pt2^^y&PE@$e0_1fT|(}wjX8T8HnMJC
zF3&yjT~uk>rVl<JOEcHM*}$-8OTpq5K@a#(o!euWB>CC6wtbC+!(WyVeUZ=g?Sa?4
zZm<8RYU^?M?S<tG*4AuyjWZiH_+<9SOt1SK%CS^u<<E<=InOO_RA0VJQ2l7u5~+MQ
zc?WrhZxh9@x%>%ew{BXoW_J1SR=KN@pQ=x+eVBhEV(qSVv$r*@ozpvgnW2U7htNqq
zhS?Jmr8*W??GK8p@3fpaTl43|hQKC^h?#01)+Jn@URss*v3l0Cy-m`m-pNfkdQNuv
zJ@=C;=d!2TX)`%~O)_C(;GTK;(di#Yi?<qoxs(&*clPI6r6V)?J-wOYX6YA9GS10d
zasSLB3Fj*IQ&!$-S*5lfMSmyHe)6Te`CIa=Ki>bh{5cyk|IHTt7iM;9LQ^GA{U{ZU
zYV<of|4in?$jdJo+drqgZ;Z0y@Ud?We7`KPsVg)uamvN_=e<j|zdf_?$-Z~ovuCNQ
zEW0lv`S{}7?;Phi{jWO)Y*5*~!Dwf_`J9O?+9!UkGM(kVUrzH>@Q0^@?J4SO>e@Vb
zwAj2J2z>N9ysdZ22Agp&;?i{Nle$d{RFwUgmNCy|dVr%JnPF_JplU{a~E(w<JdX
z`0nPbf!lTqbw9dv&c$QyY<qQ2p}f3pM_I4k;##X3qvUwSeQpL1>->6doltW&hA6u=
z>vAl9SVlL$C=Yf$z4m%RYD_9$Zq1{~)%U)gZx_~-d|Q(Kh5NJV{vF4BqI#|^Y4uxQ
z{5@?~_SYGAcYh7aHu=oI%WA@va8AAGU;EE(@x6N?___IwMSEp(W&h`Oh)G?q(z-7x
zvoHGJhl#1#=Z{El&8+MYdUNgUxy5OwS5NP8*}dYA$jN_t{7olaL-M61mQ9~_UQAYk
zM?Ys??NM2SH}-e0E8S(;VRe7$wr$BfBtq_<$Tx5aO3pc~QgmghT*(i=`iWg!iiv5b
zT&C<T-Vp3i@~HXK`4*k1uN{>S^%uT;<`ga-&3@G6(;J!joA1WQE|kbl+8>|2vWK<b
zMf_*wzszcTwvd#n*qdQh70-1ZwBENgh`(@dOR<b|)WW$EH=o#6t&Zfs?ke}zbIx_q
zL+-Oe7MU0Ft8|ICh)(ZTs%v_ECnUtB?SFHn$~gi4Jnki$mqdDP^tE<u-D2=A*dX?W
zCYRFxw!+5?zRBuZO>C(>`z&*RqwkmM%ky_malZc5-T&lGjyI|r;d|GqNX$Fm7T$1Y
z`-?X_PEXzS?cz5>Vct6St>qQ(Q;#H_3}1YxG;0E5_`%A8twxJ}@$9_dRm{ADfAK_J
zc24KTEo?UH1W&M*+~kPSY0G1F`1`wMKT~_&tF{}*+&3(CsXcu$X7!`1JNUQM`u{)t
zB|a>)_VhMY^Duo)8OH@oAw~z?-_F?a*Uu|<J;xXGn>`l;u3YGQ+)}7q)%jfV@xFM^
z2OqZar-!f`9-8?3OHkB@Q1J!V@4pgqGTsuyaMt>f^PK>Wz*Ei26MxiR`5$-oU3JU1
zuUBf!#FzW;4o|(1t1Fs6|Lm_#v;N9NMrEuDnlArN#NqAjL?7|=&?_BzQXdjk7jLfI
zA9yKmR_`<Bf6jYeuxyyP*CCwG>8hD{smRSEA2az>w;Y>RaUtPHg2-mAQWY<g7xp=C
z{T|FNs(7`r;?e8U<)>e<rRxb^zy9svfh9ln+=5h}NuK#`?0vh(Rl3*iZ+Liveompy
zz3BP_YNG!>{kiD0c*lZo={xpU38_ZTc@dVes$0H=kz>Z1vekbC4t*%GIV@OcsvaER
z|5N6=uTRqV+~R*HC6^>DS1D!O>MFb|_7b;E^Vav%LKx*Y?oU&1TO_IYVR7hht<P7_
z2Kg6cT&T=GaBQcZyy7LcJU&soer44yGiSf5e8}o9Y%;@JN{PFFk4#+cN5h+&Hd)o3
zycBb}4(qzXq*Mca+c2NkjjyI2RY_NBQ9fN1%Jaf%`2pz=mkD7qXQ!{Nn<?YEg8lwE
z)(y(VB7ui?8FJogFIC{nO`hz}S@<vP?uLoYag#;YP6$iQ{4v30H~ajEGUJm0l}nCG
z7ltG&z0CZ|>;CNVn+x9=B26R8{%Z-#d|?!I6noe1BK_m_%okHO=6tl2_TBQ~nz`ar
zhw#krcV0JNI&}B)L&Zxg_2-?u=y7A&OTmVH8KT!rUPr%sE3i;)7XQNUjOzQPHf?-(
zaL>d#uXyb!9u+pb&6N=s&bn%!NZV*4veRGe(b?w134flNJlr10y+Z!0`+46Gemf6i
zg*BTtioIC5;_6;ir8l1{&fMH{XG(7V)Z=Y$#osa5&JpV`cU^MX^X3D~OOt=go^obB
zWh44N)@awaf{aO@CHRH!zkRKz`ufNl^J}%%QH>wIZ{j}e;PhgV{5lS?2~vNYj1(G0
zMfDwo1kT&`HfmI7A8G!)WGR!q{zX}i)2&wQJGNWg4sdw#LACr)`Wk-E;`WR2rd#<r
zV(d;{**?!*Xl?nmyD<lC3>LPPZD(J*N=I9;{cD`%!y6+1LMF9sKbwAk=}YGMwo@;&
zUAPn2RjY0gWwyiRoHAq80zDD0Lubpot8A5gmDJvFeBI3w7bcN=O5t<la<ebxuh}hh
zF6piA$@At*X4!I*Z-Zoe3(M|}9dQM0&U5pk&&sMS@$|LeK44y3x5_HI_NH)2t__<8
z%f1tQae~*P&Mbb-=c8aAc2P>4vA1K*4F7AYhoX1P+pN@dMbkLvXS>OhFM3bv^6#cF
z`U^ND?0I=$fmI>XZmE<i(Q{|_*R&lFJNeg4^ZubFjn52qX1aD2A1b={;@I-fd6qlG
z|66W7;!zx;?p9uPM`2RL7O8c0^AeBgE?(7t&%B}MfbF-h<}dfTwK>cWi9aCS$ui+0
z%Q_!vv*rB`XIpt6oOnF<?CKV=Q_42^+H&>L0a}GOxt}ere>%f|lcIO&`z!oi@A4iC
zo=f@~&1Y;pd)fL9#&eMeDyC{ry71?gy3dC9(bdnMN8H%J^;>lPp6Blv+a9@m^j7%t
z`kk+{o2-1UU3YkcP5jz86~6$HYtdTK{+XGa8vod}BW7GF$SA!rGyfBJf>hn3L%H04
z4|BP3e5t*@Ep6Ef&owEx9v__ScD68*`OO}Eb%mP&YOR-V_d0W5{>Ydbc_yIlk>gtx
z^UK#_8yq-<CwgpueV^mewDhT5E3OwW;8gn@A+Tot!!0UC2C3hVXGDLy^ed4&&Q>#@
z)vT!hu}+rNgF>|jdbxk4a!bOjW+v+%l@%(x{KUvG%a(VpVodB*(>rlLrq|8hX*T(q
zD$5Hi_JF#5y>+UVflbz-<y~QEYvL<rGWTSCpY5^Ybik&B{`VSdw?!_0Ag8x~(~UEG
z&Pi~ti{H8Z_jUbMAHUn4=26-EVB0aHo_R`Xje8X`KbqSZ?TO?qZ)Y{O^1ZeEh~Po7
z^Ougws`0rm%75_xE35h9$-66lgjvp<%QK08_DQQuvzJ!?lUrY3?Cw}&zO~#y@8YrW
z6y0^|KhGs<PIoq7x*PIUO6bXpI7h$3H-x4(pIh<pQ@&if?y(2+cRUHJU{b1Ely>T?
z^0}uq)r+2&^p)@lK3Fp~=Jy@G7f+)3-fpV7#JA&3(Is`6kC!(uKNQ?{J;CIHI=jHV
zkQEg#5}tf)v48N$p?gYshIf`^pnTb?MK^X`@UA)i?P6h};O=<}PLn3Z@%=lTnXvw}
z_jV_rs9b^jH|wSA<66Z$uWfvFiRthE`Co5siQ@X7+qjyuzF_egof}UY|J^UY^1hhq
z(Ao`tfB9cu@sBuu;lG`H+1F_&ci--5zV|0GE9b)Gxv!LaIhEukvK~w-UM1(y`_lj1
zQ?bi!6(t|;CC|@Y!+mGQS&rR1m)AF(dUj)p&9<gGr`*Ms)AV$@_Ajq}b@j?wv-juf
zCoDfW@z~P2iOe5&^yzD728Vcy%;8|ux;(og;q4N`SJDh7Gc*P2TliZ(emVWcTi*Uz
z)c@lf*H;^<?UH^fdQ5%QQIW*MMRwC~`)|5_;Pwuml{t~$H`sqEN_y1BRW4P%yhJF#
zL(0K5;h3fWs^~MBzcq?kYdEtX1l(d0efUuAMtWmOSjGHiFSX^j?(Wv@d(>dC$9T<!
zebZ{Yvm#7nwg;Q$$!zOg9`fqM%QeC+aqNNdj)B%6IbQ8Ajz4Es_saU&a@~-3SMHba
z{+(tqdG>s1Wv7t3y=iruuQv7XQcv3I?(1vGz3b2SgKq*ZY*M(@5M`NM5c)OZJ=1rl
z@@-X5BQM2Tyu1>l{gGYs$0{G*4CTpXI``N6iK?hbS!CSjyx~%+S<3WBYWd_OfmAM*
zrDqn^Ti#Eds6JtWgVdwr%Y9FzmFwwsw3TUOZ=dUXbVk|6m5<tdcLr!()MWnhZEH+J
zwSl4cPAlU+!RG~^3nafqX|XSxWLT;DrZ;RwSj4ZmEw3EY*7q*idXXvPWBE&M234+A
z?=)H0n9n;W?N!xr?fs8x$@9Tk*A0X>9@|~*^s8VE>ym7@RUv9C%O@^QJ#gUe*23mV
zKWl$)$hl;0C%N{S#<oe~3Mx?xw6@=v^^DQ~veSZxj@#Lb)Hl7G*S%5bMwwim&zm5F
zx>;(s&-cCgzWl{Klat)jOix`3icY<5_f4#(Zj!dtLgwj<*bI;9`W~HG*dQyyx%f$c
zsN9~dnoctUgbvTVRC3X-r6gEr@f10YlMFqqS{8S!ivH}Kwkxyv^Z&zVJ@sm?hjax@
zh>_@A$J14?^S8|O0O7wqb1t$me@V7ED4!Ae?5xzPtyh;`**g7v$Ug<W+niHhzdc`_
z$uN0&T-L+GSCWOYCEtcQZ?QW0Fu}p{N`#*4F}4*C|0H%r8#A(neiC`S(V6dsP`Fra
zCAYukuHOMk^PfE0{l?S%b*EDIR;KjTdv=~*%FFy}p3x@BnZ6mBY?Gh-3_iZrX2Oj>
z6D)#1FF*5NN;QkeYZrH2$=S69ReihPGcd5c@({4Pm(v-mRJ%eX<PGByQ|rx-J?BU6
z6S+LI`^7zByH|Pgt!&rAZ+eG(oZk`lIQ(a&+Y2FakIVh7U-olFEbQ<3tmvVx%a^$8
z$iywHdQ)R^%aj5#9`YsDCTi44ZZl`xDq8R~K6*=a*K)@4;{tI{TjuJ$%-9sL==S@a
zGdiVT#U$*iXX>iCo3k;amp$yj-B#X-drvc+6pLJS{(JH_ukB&2_Ptgqf<M#L<{uTZ
zDB`!=aZPUWkqg4|v(44h4GfOFJQUXc)J<Ud%q5pa)+8RcP)f-Tn|DResrG;8pUZo8
zvnNf?%NEXzoc_D^__Oav1^bluKT|n(@tAGC$R@A&<9ylut0u%uy2MaWbf<W>CL>eW
z#bnvY@VskwyY+s2U1MXAt<J_=`t)JAle#j?j9bb=Y&(p;>0V@f!f|Dzuf~bY1&N0l
zTbr74m#;bdRI6%wqT$*4XY;jl8g}T(#ZBbjD{qyk_sKR`<FZQJS`HW8k{OGHw!N^m
zn~@&<`TtTc?ql;8s+7-py0J(41ix|23@5d1ORjHub$?sH#-H99O@)i*$wh1Nm9iz<
z$p>EX<xM$UQuS0(>inG=mPuC@v=-dBS?SX+(Nm})VpLyS&L);}Ihn6E;$6waqenMB
zDd@iSVDIJjXZ?#@n*Hi3epnek6paejaFqL7b;tda?_?I=buX@^*E)B+yxg#e^{`Om
z=8Trwdl&N@s_a!gmXyp&6O2%DJ)iN;QRi^BPi#-&8ZUjn7PcoD_p2W1c@(d{tN2^D
zeYGj8(7{(h_kOTNHHN$vdLhQx^4&fu_14x_Sy9Kc)BBza8;AWVE%p4)ly>A(&4mr?
zKi#h{|FHGIJ;`}|k3(6*7d1XU+afOT#pK%*vmUqp)FbbAujyRLX!Pgb^iu8G-9Hp0
zIV+5gEp%3yTypj^i|^^YX+et|mb-~AXP<KH^|C&ppTCc!-Tv+Q%{=-{_R9Hd?Cj3W
z@N+I**^*@N@qt6woW>r#ncQby9kM(bI$MEj%LLbMSF=xRn09M6neDOEllBWq6S#Q8
zPn_ZPeBP&XetMaB25y_4Zd2vr{-}BD9KQ2sm0mi>M+7XF^>r%mFl+LNUTAg7AfS56
z%M-i>OXD|QdXRQi<D=n}wxsRvXQ)drdSGSGrQ49X^4B--<wlm3k>dLDg|-^=%(SKR
zuDzY|^S|iti8cq%Y-nbg-?&+0#>0TzNacr;&Ob7eMGnq!FnPQzQ^9<{*=Aq$^=)jX
zTsL@4TxK0Q$t-St=95kQi3YJFQgXr#x07vR*?%@~7jg+;T5ppfe`v2_N#*5yeKp=g
zF9S}CZVPX@DwR9e`R>7z*?ucd?9y>K@A`V-$-m~4PlQIj@fWWt+1mK{(CyTvjn~7T
zef-1eJ+Z;_gXq@S$CKttN%kA{RUHwtvwtL~HSe9^I@PF!YdEFCwjJ@2oAr9?Cdq%F
zqr<-{F5NAmv1(<|>Z#W<6<8|IO&6V`y|DgQ@$n-cZn~b1uVP%dH}r|&u`M?4zV6Fk
z&APdKhid}IllG>|hdxO6$UaH={B7q{U9Q$+vu{iIe=|C7r+X@{^6&qu)oLmK6sC&y
z>0RcXVXU$F@|3A(jxr^R$*CVZaHQ$qA^{<PjwN?=)Gp?3{}qw7e2W{G<UHSVM<REu
znp->RpRAyCVan;EV<kaL4u`!z&dK3^c<<-7_eR2{-l|ICffGE^1y;x(F;9Q_%X|UP
zH>0z2)vSsVtW;uk**w^lH){P!RQ|ub|G^D8hV6SUd)nV}kzo*6T9A6r>p+%}<MB!6
z9p<f9{Ew_W(XJozNzC!enwNzS4+)<C?^=2KJ9}DZxA571_9M?H-0b{W81YO(VPpI>
ztJ%tL=WWyOEDTXuvHYvX*{;t?>+AJ-qR&j%`w$Rm=3V)>p)4{^cZJZ@|E81cKCa(+
zbZYr#$@u@D3~R(nTpDc)PZcw5Ia;6as<0$_=A8f1Tke{4ho|+nZ~S*UL?y85t^V3w
zLJQ;M^%b?0tv@ey2%0}bb{1RiAA$dM2{R&3ocNHpb+w|#F>C3s<x3heTRC^iwcNa+
zeY)DUVxo0>aQnl@|78T<$xVBz^i5=y+uMNqsmbd#GPi!)doerv%X-x<T3LISh~^yq
zUGlE`Kof^p?wzw%t5i+A=TBxlvm=QAa+=ba^<@Y1k0i|c+-dLKaP@k`S;l#JOLJyh
zm-=@77k-iT!6NK)8H?vx@%k#(r%`kB(mD^z$5r~r%s;#8BDY7g<FxE40q2X0-r3Fd
zl{edxDJ4<l6nAM)_>LpF^TYR^bTjvS{yOQ=d;WX-9hXdIDC(Zlu-@}7ckjiFsK@0o
zFRs1KT~M5*pDbH=>aA02U`TO`#IBD*Qc@uX`fvA_T>0pxE?!gnWa8)FypOht&1-$Y
za;8Gq?nkd=bil_?Rp(kHUuLym?0f(FJD+l~@yX<48-4uS8NLNEALM-Uw)?KH;LlAl
zHDWq?zRV)6E1qa|p4hQ{|5Z)1rXcz2*J2(^g}%8|eqQ2J*1hidFVoZJEdTTF=h2f4
z?te{Z<*w{+_<np_(6YL~_j7IRZGF}|)L+Xwe@VA^-7J~7`pJH4E{GNSR#*2ORa%}m
zO($KeCcy8(VU}6$d(xJOefhl6LH_OcnGx^)bQIgXaGM_4w=QqhE8*<(=hpXr<X$A^
z*`74rZ{6lfua*XjX}c<BO0^aI{rcrntjmFuzoZLW4y4+68m$VSJo()}o9g~{AM?A-
zN0+tz?pdN#lA9W&XX2ZfoF+2m;ZI$gc<z<54@94+*4~JlJ(>GQ?T#5era=*H9@{$$
zAEd@C+dW%xgZeTjjfcE$k7os_7H`SE(mDP8H^t1@&Cc=fLf#4aeZEns%w`%|*`%?4
zQM2OqqpXgX7j-Er?JLMRUQzrbtN8R;>5XUqNxXbjwpP38NU7$fTe}VOD#F~a%g+8L
zC%*Q6*!(n&&6=+{@;%S8FRgKy$iKh+)#sLT54%i)#3wX!xvtq-+vE4-<AkCY2ZXz>
z%)7m6#*G!ndtO@E_Gad8I59P*tLv7>QPq7nu1@3fJ!>t(adWx6s*c~PdFvj&DxUq&
z&hB9MFYShz`;%0E*Ub$5E!w#ue9GUbyPFJ@daY-kDt2kE>$`8gqiT}b(gW?R58hor
zwBdHPM7il9=fd0TSts+wN$H(+n<0>Tt>7d7=lh|Ln^<Kfa$eroeI|N$ZktJ{`(3fE
z38jk)8>32lN@g7n4W0Z;+npikJLk*_UgjFTw_Ab=?@T#UaOlP19j`Bb^xYD2<JX0X
z)V9X%`CSQt9EVjlYP>siZrPvh+}kHbha?8EA21Ft*tu2FI<rEeW8aiMt_AG;^ZPcJ
z8h+z)b9ph}wa?(SafSAoH#SdAPOvxHYo60Bxw9{F@u#Sd74y}OO|h)3Q#LvNUGL16
z9VHUsHLoLfir-MO>vzz7Uzy47K5Nm90|%b7NA-SfxOH~6;_7)tTP6Ob#b4QfaHim`
zXy20?PO!T^Q{moqVu{SBzd=uDy6jsMnAq*}??8rWBCGtQ^=tgAq<SXYx%BMb)?<%r
z)pUC=2Q_S4y+q(YYk^<NrIMA*W$T)E&bIr0%WsDESs(LRH^N?NZQc5bb*|aF|E<1J
z7puCo)*jvaFhV)UY<}!b_D^ks_1?dNjui$e%-_?eaLsAq54L;4Gh{29er(+E+%jy*
zfmbCHt|-2AEI5C?Yo5l+#`ioj4B09NuXla;cynTL+Lbtty&T2No6k;uquA{Gkh^79
zo2!{@|DW>=Z?&ED{|i-Z>le~WtH@Y0d83%drd`2Fi)Na#Hu>!8zQR;(?7*9EB%!`e
znLqi5Mdh^L;hC~mf4sbWHvNRq%&7T4I`cEjKdkj!dG<xX->n)~&(uw{daaa|a;{$c
z*_rRQ&A&Hk=6g&&XTR_^|32B3l|3(iZVxYseEj)U-UIy~b+yMrj~A^F5c=9$7B%yr
zuJ!IC%iK46eZA-B9G1A1;Z8+^-H}iR?LCdv0nBT)Z!YH7KIvW*q^^}eQ}>>w){)nu
zVfMCs59}M}DKy7TyQgoc8mU>lcKN67aJ?x{V);a7ul;LN&Z1#sb|7fiI=$VAZn3j(
ze^=f=?Uc7V<FC9bgGn<t?zNeq_f#a%UWa{#ke#~q*FFax@%vYq^~_VkbM=m$$hdzr
z@JP=?j?~qDH*Y_CEWq>B!Ta5muz&i!3tQ6OGcTyp)n|>oX1h#6pnt(f#rT>d)@}DC
z<gdr7t7Pcv9;tKKpdq$plB(r}J@=V)S`zM=xBlnQ*!iK{VHFdrq;1ifOEVq9njUE%
z@65`Z%(GTbc0uOrjbb~^r>&RR$fi{){`k`Mg9=^VCL5o!8m_tMnVzsV{nLTk0N0j<
za|AXlauZ#;#*I^;#&lv=#lh#k(mSU~mX|nR^*q^i@{RbfcZWRdcNVWx=Wjo9VQ0xw
z=HBlsG-ljQo>ew^^^fXyhU4rCyi<ZVaX5r4+TN_++Y!a1wfEkn%lfkpxpr)8lHmSh
zqw}G8>AdOkzmvZ2__!$W_=3y36aT5%HcVA$*}!44Aci%vF=a`S%aod!y-nBLl+PC(
zeX71}W8F{n+}$6h#IooW_s+Sp<$T||*DfJjIXy02;*a#4z4UYGF-7tFTQfLc+5YIO
zR}4xmDD>RCUUd^&^Xrg~R(FqbqqNiQt6%O`*j82(!94SZcHpWrKGiuZclkWaer++8
zM>F)WjYV>o@ZC96ILd?X#6P|h@TogZerjWT>mrdiIWmvMHZ2N`x?7$#!}<1xFG5`W
zg?(W>_h0!4ZLejOwu?1p$aFY1^}<_+D85CDPi55XFB4(SpR_zGzrOP6N#El2!l&BS
zhCTUqTbM_C;%cei>U*Bo94g)LgHyyi{(AlKh0lWOuc}zB{qS{fZAMsB$*s(*rbp&%
z=3`8&xTC6Omtwwi@6TCk+g1deiQ9F2_E8zFl^m^;FD&cgxh=tcuVH5)Z-tRVvmslv
zdBZ{ZmC4E<g!UZryYw->XY#)p&Ta3$E2`GFZ%>tMe4Co_>2FHzA^#^C^S=lQzNpGR
zXSn?7yi$ej`*$4TRAQ;k>0?apdgA?_?{;oT?I+!t&cYrS`}y{&q)xcZSugNNMwRn*
zVuDJq$IaL7Kh_(3zcBm54zHl@va;Ddp^C5bxYK4P$~)y>R;`dTHcMf-V;a*PAZ2n_
zZTjBX4*k4N|2#~)_nNK!Y;#Gb{Js6RI-vuR+DcPg-)mkx>1vr2(I&C+oBvePx;znO
zndtww&9ZXRqUV2eUvxcX=gs8@md#%jwRMS(irYSm?CfZkWzFj*M_Fas&0C@<b67KS
zror!ZEiIoX#iz?os7=2lR&`TIV8{Fg!m97=8N?i3?&mLe)ezd%8dbPBBL3|fDc^UC
z&PfJH%>1mp{7Ynx{c$Is>jyS(>g;>DL7by=S9jLpJu;VMiyyMS6nHcB|5u(<N^_cm
z7ail1cpGDKg7;gb*{<>%Ef=HT%xr$J@!pP>-1wJwK2(3c@$7Pug4CBuhH=@At-2=O
zT{5Q)FW*?UebHZIw}VB&_Ws-B|GqHDp0r46lku<D(>IlxF}7@3?^?b(;?BpLKc32G
zOuG3(h~>t0UZFMWGlaBm&aG9P_UT^P=DxFxNA~C{1RV@xeY(G3`NRv0H?LgsV&0?;
z*Cl*;;%}bOdMO#fDp6`&vr@(WdRP~?IFEpFiu%;K%<mJvapwO_v<Y87ZJylh-p=JK
z?9TgdvU)4oJN@3#ij6wCSL4o}GX0spe)g|r6-9Rh-q)!$1Qcvi*{-G8-*myZIVpBa
zmF3>0`P+SuPHKtT|K`E0-6z{kIL=g?>2M3Y=CD`gEMdBI*D>$gi!&xZy4<|y*jzPk
zn<XVYF#I}K<iS}+R@IBXp>MZ{_nkD%JQXEveW-EWkw2LX_l%RKB(5r1)Uv$)^0nn&
zwnx)8nUsc{T6AttdHO?-OCR!I$}=oJKTDSXyf{PohNLLQ|3S4oPlwALI5)Y5No$e?
z!)@tM!}!Dht$%4JXIM$z-?Uriai+(k)TGvZN18-j74)Z^`<QL|px(CdgjY$DrC+gh
z<<bvV#oF>`9nIe$dRouyx5;$_HHWm$&yU}p`RKmbW5cV;;%(bQ)1O&yua$l@HDZor
z+kVH#zJI>)oja(v;rxybtxB2hDM{VWt8AXUl6|peLfH#e`{$i=3zvRL->@)$?Z*1E
zmkW9XcbHUO|C8(5a#)UKhL;ReuU5nEV1ovJ=78OPw{)JiJ$R#df~81U)WvP0o#o^<
z!)vA%t4_qPpLWO0|9)HC_2*XAi_0_YH4YtrY^X4CoyVm3lD~!;=Ns=xHO=Ec@%yOa
z`(r`>ruV-UYnnan`da6Y52Ncs)~KXjl&HTm&v<iq@9cv=zV)_zTX<!0rM$myz*(EC
zZOcv<UJDFWEL|#6G-a|<;LR^<op$}$deOS>6F>hUkI!Yl&P{C9E%bUhQ|#G^FEe((
zs=0Y9Z`G8^RUVoe7Dwu4#m6qJU+0-|^6<e+(I>wqFmi5b_2Eq9m~`CXj@@pL(<%{S
zvqXw6Ps+62==G@N(7LR}W$ZzB%IzL~m^vdviYr+E>vNwY@8;-Kwm&_Rxq3yaHB02f
zGiM4U{~KFdU5>KjbhEo+USPa2NlG(Mi0^#%7lry$(O(|ciHh(?iF3W5z-C)%a?D}Q
z@|mx=_Rjvhb<@@Bv5jj&d={E}Z1g_-Uh(q1y-NxU?o2fgb~tkBFIUBGW|t+u(qc4j
zZ+2Z2Qn%xDd&gaFuHHjmmWs_5N?Lfp!H8FT#@G9Ob`PzOH$*NlQ>){>bN<cuJI0?S
zmbw*ZzY37`nk?m2c&n~=(%WF+(CyX-80GGEs9Kp!f6eeV``@pemGurhd8?{TU7C0O
zlWm<B)_I|GE^Bl7jZ~YaZ0F+5Q&heEn3mqYXu+qXXSS{Cf}@d~QFG)SV>#DgMxP09
zQ;w`qxpO4ScUroh&g$r`O-Iz<f9;Dd%iZuX#p6rtw>5(QX6+WK+@;Iv^R_j|%;NXE
z1I?><@Yd=55A%^Yy(2>A@gL@68r%6VZqBaDSSxn)7n`H%kqSlImrOlIQSa8rTy*}W
zBP1eXDaNVTGv$S9#s4)|qjwsl2%Sy1r8{-m4)N_avXYnmU%2jiZxAaRUv#8o?X;H%
z)dkZ!_k6vtd(VHtuP4E)zaQBApUvjWr|F-+9Xa^%)UB^27c6!atM}}V{(t=YS>skm
zv9;WKVzTe<UYjHRu}o@#T&zSF$G>@Vn{B!cEv~GqVrhT8!S!_I+ULB<Q!eBxIv7p3
zkn?TdN4{B>XPQn;P5pJRt*@xUN#>@H-bwp&N~O(LyzSV0m(MAWjc$3bmh^R&@R{a=
z7qm-Uy7$J{v**@YW^IiPc;mhK{@c^0J-?4~DXe1oYWVzxqMZ7&6xkD#m$@rSME!l;
zKHac1RC|9VpM~JD&%c*yT)gJi{qy|)qC?k&AIC2`^Xh=`v_-qmN|i@uI8EEv7@1=K
zuaWU=PDV$x)lI90r_*=V_D&UB@o(F`iQ+vT&b6ylma2J|wW!E(%@NtneroOK$&A4V
zJHn%y)_Xd1{GPW>>|f9c6OXcA{O79f-a2wp(lq**f$+E1gL^-RAN^zJo}8e!-e6Va
zA}hHfvnl*fuU75je(=(IarnIVD*iWka@a0kIBNL%kz(MM>fQT&r{_mLJS%(U;>$gz
zd|L6VcU{_C?O^lvb!fe0^o3PxIr%p~j>x~aL`0r_-OSbEugwHPE2=d0(qyNftbFG>
z@&5|#b1P)#{?XGvw$OUTeDSjQ>W?3UHx*Ye3M-wI-T3mzE3<;wa)!s^VxQ*A_}b6c
z2(Q%Ib$fk!;4?j~6S2lYlZqzJ&q=@kfA&;kljXZytIy4|=}7B2o%-^t@Ab!zve;iq
zJTq^7!Sl%U*QrI}uXHB*7bsL+oH%2aMCXsKn>#w*3p-6nZ`i8H&2=vSj&yHn*pA*8
zY!b)gj{Iv2NN!qW!!5D+hx3ZOz3T;EsGdH4`S4el-P~`_X7_b#{xUt7d-+1R$z8jY
zmgUvIU)oNdzd0%Hsq)54sTt8vxw3X$h`Z@?@_|vf(Eq!|AsxN0_kNa{xkvr+<eB=*
zv-El7aod2<EuTz2O8w3IzICB?onx>25+~RBHlGazxk?vrbZ*G4x;xjKsm$!;we1ai
zi`!M%PgQw*XcLju+mOHN%gnDE4>4M&oL207J(o>thspfwT;DeRy)>`**216vPrdiM
zZ#&DpIdATqpW0@R`Q>s~pZfKRHE@Dc&AGkjuUz>&zsq!O`!>aWk5X%%mHqu6E^g>-
zHS_6f{aI(OD(sD$w6}V?uJy^z`Z+fJE3Q28f0Z<Q(*w(QXBpNlQZw6FcIF0K`$uz;
zlIcp@7H%otwLHA<#{o8Dg+h+$vM=lH6MpG`y>!jQ`1QmKZznFEc3@|a{1cz~k=MC;
zyuUha=KWHYGU=<vqjeL@WOmC3KC(99tt|PyG4w}OCUd&h5e46XDe|8W`0T#6r|-z-
z)`#28cQ4wpHAzpNd*<7d=aM|MU&Xz>Vm$THluA*iMTai(+x<PTY@bksxwO~ghw0sc
zu}?Xcz6oM4Tp}Zxb@axfEp}YtHg|vNwH0%D9ekpYUZyykIh}cBrET*+mgj6WakKX3
z{j*KoUa*KSv;D0_xV7ZF<;;EBaeFIWHs>p>e|t*r{GtVKnWf(?U#DxiY9(L$W~cSL
zXNb=f+Hu!!aaIQ3{k0ayHO;;#E_j)G$9mrFch@q^gE#1J+BhZof_<FH-Z>H-+fQVd
z@&rm;iRpW3BGj1nQmu#W|J5@4)q<AwrH|zE+Si`ze#Wty_ps%oS#8(*3omXws#u<T
zJwn6z(7wvxR`pAs3eD#jn6>10*jkl}dHuP*KbCD$UXX-@zDDHsLjk|CYIVgH&riNz
z_8`FMlHYO%yRPrcXSUk!j9xHR`{JvkFZz?N+TV_8>ySTPsxI(gqR^aGx}k>c@-|vC
zw7Ht~qt@Dl@}!&frWCC?bLFdkrQyNP`BS*xsy*G$s-R-~ZsB3~I_FYhR!%9=Y#SNj
zrP1x>50}I@DIa1JmehYC&lM~GdZWFr5o?56NXt~!PNRcNzY5h)e0G(+cF@aQNMd@W
z@n2t2)2iADYCoBEGOFfT>@(3hE1PylWM6`g#(v@BDN8>+DXKWUj<4!{ag6i&ADbKR
zr>I#??$^ojlFKf0+O|8AZOYcV)6H8$>R$OyVYa`jaP-ICS$-ck99tpeCMLjMs(bR_
zBkqg5ezV!cEjI-&^t=$4uq(!N&Ebd6VU>}(!jh9B%y#Z|`1WJB;_0o4aR)oEy<R7A
zXzJSeVNGx5Ouo8}m(jhs>t^3?S*1&S4d1@bpS0Y^^^;R7_iWZD=kCQ`)l9N(+1Pxt
z|BUw3$7|Al-Z)aeY~ywto(Vr{pWo%Nmta4&t3gazZ*F^azfZ2;uVo!iiumsDn)~Mc
zoqDDc){Je9mCr5C*q+|}d!t10W2f>zi9Q@!g)^Uf-V^XwxnMtEjla4(<Ho{A|NaLY
zit&Be*m2P|xrCkVf4s~4ln3&@{Z2-m9&1=S=7#iL=!xE~5OJkaV3X5kDcdW5RjlUl
z7~gDMmBOcZer<C7SLZ*@y0S69`p-_1oyQaBF<<Y%t8!+ZiOTndA|~f&Ryz0?bQsJu
z_%wg+L<I-8EuUs>KICJiHuGnam)OBRzvj&g8?%e_uHEAnXL#LP*frDodtyggcBc5t
z&^7OriYCduZF9B0<F<H%e~)tEu^XwLfBbhTcKTjgHuFf@WrddYrhm#;{x-BwFR8Y0
zvzgUDbC>andZRt<#uL8qM6Z7#eCb)tG|A?D>|Z0<Kl5&U=%e$WU;B}w$@W}zKjpJ4
z{t9f-{<gs^d!x(rVu6Zg_f<8YVvn^eZ_YaRUCa2^o%M6#_AUOs&A(aXx!J$THdl<2
zxl}lAw@Cg?S@6`HWA>Vwdy>uNAH73ee4@{X8D9PPab^9>xc@<M<=tgrDSvNeZ|xI0
z=WX%-=E9GjQnRF_8*aD9b4aA`UX>%6w|9!vQhAmr=5E_Hg7M9-?##Pm{Fb*uv@U5?
zn!3^I+dNBn`6S~eTE;~1&vO@vI1t)ssUXy!{c+2Umgb(HcccQUM1|iwJ!Y)m;m$8_
zP<}_^-K`_<Z@)~rrh0H<kiUize@EHB#}8FEYRn8ZWMMCSdRXkM(3R@*T@BZg@@q<N
zPoKT~{UyauSByfJDn62V+{b!so7j@9SC!hKvmYkQq`YWKIh?xvRG`|gM*gUOHo0+;
z`?#X>mc4RY{ch#XReR2O%bwbDL}${${wrUn@7;4Hy6pMcXV>TUd{%m#eClDQk5+k1
z-P}bjpINv3+|1x>xI98A<JJk2uUmU>*UvlpVv|!YLxIDII>9sVoaJxLEj9j?nf2x8
zli;Hq7ZvAEirTbv!*#<u?k%2`E9Yy5MjL1!R<ci)azApp<J*3z>q2k#DM^$cJG3n|
zKl|FBy0fd*f2<Fl{QB~_y|XGFCto@B^1}<^^Nx~-9-er6##v7;GGnPr?k(dt>+Da~
z-Q50f`;_XHJ5xMT<13`CJ@;vHnDAL#JhwNxcUH`CE#KQd{np2N_Vs;eo4&^SPjuMb
zyJ}vKzt^+Rwy^b?leF`qb6)Um_QEsY^MBbto9)8%-D3TYMS-ibmo9i7Qxs`rl`Jb<
zTzBN%x1Aqs<xfboFm+il$$eV1<?7jcSA4j8de5%n`1S2=&?m#?`lhe1?^tNSyd&VZ
z*zZ%mn>H3!`uu$?cXpexrEuywWlJ;ZjOXc`juWaL9sW>Ur~6s+?>vEj=Vx!=+*5GX
zsQGnH%>Fq_F4Os!w@%_SYfEIg^k`X+{KrC}3VwUOHvSb$vYnUudroTc=_#M{dXuAi
z%eTI5%r0wsUOe$R{$?*@dTf9X+d=un<MxXy{eBeNT4<ClvQnJBFleVz{$bVYz3Wp_
zPDEZiQT61({%LdTj-<b;y`r&Xi{7SwmW)S@=l=@qk1x1-wcPCMtNYikNn1_hyQ@(p
zyC!>`)9y#N3LJR1zrAtaw!<|1#QQ}ib;c!gxKErF;_5d!r#_Xt#QC5J-=9X&BZ0H$
zm~lJo66Sw%#D#r**QN`HkEA^R_HomJzu&gY<*z&Ns&C$I7O`jAv8Py=uWhVY{O6kc
zqo_%;5093sFqiTMu3PRI@uY3va_;9b`{K8`UQhnpxX5J}_p*X%%acUEOsrPb{_rB@
zUcB4dlFaV4lW)D&=YEpk&D&es9er%~bj$L6;RnB{Zd~msIDO)UZp}vKCFc$bhp*s`
z=$RIAJ?j74^G*G_JobC!;@=$nzgzT*{O-mWn@H0&ffadex^@>nsl7dZZRxTIyByu>
zHS@1L|F>uQ40Wkl5iC>rJsKZ(Z=12Em20ccpNP+I%jL8dy*_he>ltfFjs?AEPFAfw
zzDG=ifwRdapE1cayqV$5osfUuyuUO4lzTnpM(*}jqk=~o+pG7V-OicvaohV7?cVC=
zHtUq^GU!V6T)ojbc{ji5@2UQC61UW^&3PnQ{8{ES-wVa|hdn%jny<D7*PnirQYzbf
zdFw}+?$VUXq?_5sa+A!T?&@GOxw7HZ$rXPkYFy2A6Qjg(o_<}v@3KzY4#scHH!ca~
znoZXdxRmzwq|U5)2YzJ8?K>v;&Xk4O`gQiir|H+k?$yVC4ZEr0;m>1tvnBm=z>(F}
zy?pOfRI{4@S)6;n^WapzK$mM;(*??Y?Vn%yZdGNrBj@JunQLQS#!q~;fa~YcvJGde
zFE)4E&pUQ~(ULh{FLO>9FZ;Ce(T&<kiM7)<-JkPT@NbRIp1t=DJv_Z{`n%d2kB?Mr
ze7@D)_f`+j>UrtbLNo2>t3TT(;`&Z7DoDL2(vW*k?zbcDcbpTM?TlmPxV4OT^1Zhz
zJ$x_jz37$V(4S^}A#PJP*+hrg`TTrvMOT8OX2(U*7jA1ie=c>Bco@8P(F-G<e392P
zO|~7K=k(t7s#nFF^G>J2muhS0{agKJ1M~5HN&=h(e~dqy>aTe<Ijm&=rwd*ZRiW{p
zvR6%>{(tY1#~n{i>i0L79PkxN5G=UB_qq7CNzLotDOUZL^LwA|_xj5|i)C`^=Jq9T
zJ)L%ImS=2})cakUd!703TUEOkn_Ke?R9V(@Y~RZsc3g$+#9P}~&FyDHCHC!F68g%T
zziS)kijwq#cGi@M8y9w-o1@;QEo0}&-L_}9-yi9n&x4XTv{g4eJ+R|j+?JLv2d_qX
zc;`G{clNmFdY6>I^9Pn?C{$JReam(0U^V;P@!FHUcTeAjIVFt_yI4MKDP=3Uwc`ed
z1;<_Ym)3_={+ZTn=D+^%!}c8~SNjIv3J*TYztS`|X?AbG*{u)0=Zj64UvKxmPyNT7
zRy%=05g7@&Th=ayHl}}BI+q9QZq+|G|M_~e=JK*NMSDziJ7aR+%J&~QD>p?a!O6*T
z)oW#Ji+@ec%naVoO?xp(Qt6pw#r!A+onW<p*GscH)YS@vZV5h8Py9Ib*n8ck?(cF>
zU;FRPG&0hzYQMSmMC`J*9n5MeUd><ZR`g5G`k>36@})~dc89U#^KJ7!&-&=@7|*kO
z@s!|{d++>;vaGtLmv6hcDYWp!xotdF$L18e|JpLanZYwlIZRlsjJLn|yvD6Xm13LE
zZT{V=lkWdw9>3jWnRVM`zuR0Y?TeUQCA(+djz3=?t>BJc!&yFSC$G?hV&N*~dNG}k
zIr|(BS}0h&aq{})8l-=Cnt9h%o9s{#CjPI*Ar4&k?L6PH%~xy-Uisqa=Lr{PE<GM7
zysKmOku%(yn?vXI-*$Cl-cak#Amicp(LE*W$4*Bk?s%1Mi9>H*zo_xIKEv{r<3wbU
zhUV^-Y_9q%)HYr}l(SGR*jSv~y=nUt6ZdzM)zbf$SgD^bd;0Am$NC<z6H_=AsXn{P
zn(%Y;$A=+nO&Hgu`<bu2FlX)6>!qnVTP19#gxrl5((yScqr9s&xYLM3!sU8f*<5G!
zReNqSF`r-Tpey}+Uz{1!9L^uHUbiyMPn}|Ot-oPnsw?Fx$u$3))`#amo+l>#O(|T@
zBO|0B`*rg9xVg_wZ;5Yf*d=<X=jFmD;Vq3EZ`%AL<@r8uc(zR?YyQ>OYxq0b*)
zC>3%{iL5#8HH&@Uc|#fQvezq5Y;x>UJT!07jdr0ufBwblSOqQEdF*98KUenQv*!*8
z$1Yv@A$40vCQH30yT;m3+w~`0_L=ZkvAjtPZIJ3IoPTit&I!VLc3i?fy3K-TWIy@x
z<{U_CV|ueNzVus>uHIbRRRPx?-pveQ2-;NqK{6@rWZJ`+dnZjfKkb-)V)t?L{-Tlx
z(~qar_1#;`bz=YdB)jfOhty;~1Xw-Yuyo6dt-R~j+F#228Ds4xE}<)Q=?Le=1WxgS
zIOXTA3tk)gFaJ4}``?ayw&3|6Rxygtb{A%6*{WIat6DZ{f7bn?wM%c8ISL!hdXWB0
zS6%bpf$4|1v=yKEI(g0ODxO-mqVYhuS;WiF&EgrMdbd5Q8y^4q%B{=D5ZoBUxOjH9
z=N;`ER`08`Jzj>Z#amThxVO;q&!u3EGS)hu`>W<0KlWYL`+%;rw-USdZKrcfZh0ze
zt*!h%z2xKekd+JUb~Z`ZotXNSw^ux_>CpC>Q}#)2D3ssy*z;3Nir%lBxQ)z*n(vh5
zY?rFySAI8DmPbNLO)GHajG6Mc_vr1IzxkbBY1NgD=6xZ_d<nh}xxJF7o@P+`7s}w`
zG9i?m?~FyyT@4Lw^ZX|E?31x`7`;wMOq_aow#$yiX5U<M-u=6m@$PQQanqB$lFJre
z5Zd&FZ@QY~35IG3v4^d59b^An)JBW>P4iurwRdfBDc`yH<A?m-shWE?i|pr4pKF#X
z$E|PwtmD#$^>Y>Gw41S=irD$MSh&p5A^uF*>&G80JA#}<T!bZ#?|ky^=ZUW+S`+oF
zFDCFWuWsS}b)oM6@sm5(sA!})x@dlV_}h=!IsURl$ivhlx-$!B&G__w&VBhi3y&P-
zezx(iD#!l1$umw|Z0uCv+qIERp?2d*lUk0rO?w;<A9I(JT~U6+sC4UvHQ)E_+_jr`
z$vur`gDXWJt~6{)H*EB3ST|=X-`Y_BH=D~!12nA<xqjAe-7CpuRo^8xdxFy~g~eRa
ztQH1>y^}YXZhvcWe75l0!1RU#jPLJe^%-rewT`RZ?7ilO+^WX+@yjO39y+w8?uTuV
zzSez*<NjxwKhHdNnk6^$tJ{oOe7WbA*PdPY^USMNlb1+V-P;g+a##EP_Xmz<&Um@p
zdA6LvXAL0@k&~K_Do!0(o91HjXV<$G8fw#Lh0b{XMeM%my)Vbli%cq7;-JL7`{?wA
z%t_9|p}Sl@F!LXKJF#!&r)st0m&xCmS|+__{1;j+DWP3&Kc}CgEg~aA)+yz_N&Y8K
zlWFPC<kf@=(;U`S?3~QZ9RG#?qrjrBm@I>LldEPO3t8qNdu7YohwH4>wp9l79$pjo
zHYil!Q_Vc<#jTd@k~j5~qn;dhTcy3QDIxS)RF%Wml!9rw1s9*ohNUl8`&jo-+MU;K
z`K9aAdoAr!*EgTu^#8f^y=4md?_aS7IqzS6G|uawvG;bpnc^WG0?YlY_vZXG;rQuf
zJBQi#VEKdg8}BAvQ*@KPk$UD#dxJu6o9sH(GmCbwXnu0fv3{OQou?3!p7K)dEd`fs
zc>cbd<+sLwE%<f73aPFfwWt4<Ely|8Fm9dw(R1FvuiET2^PZVSe&2R$<rPg$j)>`!
z$&3bDPs;pIo4S%`2jBkZ`cbcWb&oy0_bl#AVa$|S6K6bobV%>S{S&t~b8vFAmI+m7
z^T?ff<ve$Cu!P;E#hyp`&-0nu@-uO7e>ZbV|C5HV*ZTF-qg)ctuF~j?$z8m3v&qBe
zh&cO?`<yrWF5BDJu&X#v_1gbWuj3m|3Irv-wq`cpXO!?+VPf<|C-Wy8H~d~L=F1m(
zlQlN}fcmLLmwLHZyRK|pH@Tu=rNpiuk7jkh&C37#BjKf?U}lPm+Kb84-c6e2l`yZp
zv*Ggmtvos}maj->3%D5WSF|%S=OvHmg3B2mDO^5Wd_1XFLvB1c7^CEzB)BYT<%a*$
zZca#e@7DP8o^YqwCZWv0O#&V2mWK`4{)uI0Pvls1QCPQ<Q||kfqTf%#|J~+t^wxgK
z!PES(d#>pw!=veZLMC4CAMl&oFE?5Go+)7Q+z%bQIZZu{muY=y+Lw3WmCorPH;s@>
z(T>LVBInm9B<uZpz4XeR>n-y(6ir;T!1WhfzLP@jD!Ci1wypltUbbjyT-%uU&Ob=*
z{|Xx>eZIV{&g*~4UbNPA>3+r&^tS!RD+{la*EqLp@+v57S)#b0Bl%c`QrfOl_gr3Y
z|1tAO*b%)KV$R3@scF9Z_5S)t?xy?KXYKpXe)81&pj%FcJ!QRj^Hh)R+cu}F_<HRs
z+29<8j=514iu10|IN4TPu)Fv|k6wjyfXHOU8V6^Ex=+mcD<_K=9@$qS`;X_D$?T60
zinM3ce06@y{=2I0^vh*NOLk9sWEDTz<-yeaZ)+d-$^|W(!F|(prMPvaeazZ3s^y;y
zwemkqU&}As-q71P`C7t8w!lZFPrt-oTENzm5`WTex!I{NlBevKgnG$)HBYwcE@<3e
z)1`Ck*L};{jn&LKFOKWiShocC_N>hLx5D0mx0{jU0c(w0xAUQQ#($<3zHvQJ!K$;x
z`Yns6r?_FrQl0M)6Hb|MO^*9#J>zSh$XrqHzcDQ_|1O_@^QG+cv6-LxLi3Amb!7TI
z_7+NAe5>K{`o%N$W(&t@W>~ZyYkU~=YN7e-Rq>h@eT?-<4X4#7%*(0U@h)=m`eViw
ztnys@UR^w#KUL%cE0c%z(pdXl+ipFadT#n7Gq=>4CaVim_bVtzw~1b}cI98rzx&LO
z@@c1>_1nMysaV36Gs8{p!%wy_i62Tj{(DL%Og+u8m)Cl`g-FGWz_<5r&h>xN$;5Gg
zV#s{o$KoqiAHVCB|8$L@an&8c-^Ph5`ORN7bk=MMPMrKe{kdgk)LW5=rd}b(lS+JF
zW*h8(|Ja)M)0TUz^|C=KakGO`UM9qB`lD@kZ~t8Oonm(lw}r~PWlUH0`Ka{gTzR)f
z9>>}iyX7mFEsG7D^7Qwj&$Db40{)&esQeb)sd-ZQ)E?!Wqlfo}DBrx(lGG^gBcSG*
z5>YXgv*T&UhvnCnURC$IZMe_*Y)A1z|3m%Nq3+RwQ}+DkU$I*E%h`LWoTrwpjgVTh
zk8@`EysNQSC5?P1i7owX%_n=vX4ZoKo(G@r?`zSDU;9a9!3Fkci6b0(q8tgK`494b
zFTAPz@b<Tc<asQy`~Gt;dKBofTJ0%UM|SnU>(3XkG``&4Q0|pg{M+Yp;##deeaE!9
zZ&ho2TiNny)~SLp&0pIs19)xT)%>}4?&}>{KI<R5OPFm%e(s&IRK?}EQMyQ2*pZ6e
z_cwBM|JQHWAaeX>TGhNg&7mgS^j>UrU{acO{?ziepZ<Io`x^oeO=NM1lQ)~(^FC|-
z3|*O?4MEz!_w)bvk8Ylwe7TfyCx^htuGk3=BDL?{U(=^`@`8}=q6#*-&OVVXNlMOQ
z0z0MN*F4-V93N@bwv#J=$))Kf{=177TAlCaklGe#esAN!@=G^0C#}n2Zv1Aiv~c3S
zv<oSZx@RrXd))TzmAI?qgAGk=-P2D*Kf3*Y_S2xIkPePrrs*|nFI?JqL9k}M&c`hC
zSocRwx4-MUg*Qf~Wn3zBb1ytllfNNfOnAvR{$P3SAJg|0n0+qQ@n3sj>sytT>sLx1
z=`iV>YOK*K=DYLDk{sz1#S8v0ANjp?tLV#$KdeQyH+8n}jr!pnbGyop-?vg=S^fr&
zN%!3@ZZb7b?m8yt$Q$bu{%8q%mS&NAc4oMV-HW0LGE=m4SlcTOz1#B4rD>%Yhse8*
zuqP7?eOk>9dL5}s|1!N<_wxA_PYrgIt^V*am~G?UEmEpshi_lFS#wtTZ;_*Z+XQCO
z&iD=gZ(7T)_3WLT($xI3Q_n*&dYg}!QJ(LV8<AD|mp)zGtafTg$tyE0_ByBQCugrt
zki6IV*4g1rcGIri6?&$vGwn5v;zio^bhaHdG&uF_k3`eUbxYeWi39~XO$^p)k`nt9
z{EfL_+X9X&Qy<Sx@Q{2z>r|!tnO@V>laKeD{@*-TDRq;g=*RWRMRhl<7HSKv{83_B
zE@E<LR^wKqTsZ?JRqsm+S?h1i|5xJo;O*X7`oC^|?qG^p-Fvbtpw9A$Vrs$Z`LmXD
zBuQu<U&XsQ-XVS4`vp_tQ%@Z2{dnx_=0iNrQD;4tv-jEGU-eu^-?MI!bd}xhy@e%?
z_g<I!FI$(K>8!HJXusx%WwV%jR%O2Ac%>2>mH2Ls=sWqtx5fTUto^h8>`61`cuixT
z4@oiiAIUHEtdCLh|Hau+zM*rTax;f{!sky1Gx*jjZ+)fg?KE5b<&^sE=KR(xXC3_>
z79kfO%o4Nf<>LDyCtP*DZ12(H<~sK8*Ml6X=-VHf1e4cW)ksY;4r+0~E3JA#|LjYF
zvln_9t0pf!KmCyY`sb1vZ1XrzOntXMbH*xz{W}l;s_%W9II(s<zxM&7sDO@1P2~ZN
z>Kpbh`Ve^G|4lWe_ZQj=MdV!{p9++|dGo)d(XPX+x?j%3ZGGNSe>s_T?v=vz@vYpv
zPwEmpGVTU{e|v6T&PIFtTPn|MYbzZ?Mf9#(Et<#o=t_>=pLp4ZriT~$CuqrBYkX*(
zq--dDJC|?E)lHX=?kT=3^55Cyt{cbeH~oFb{J-zvOq$5q-G8?FjM<u`^V@5MQYPzO
z6x3G~E4;Ph`N@xJEK!V4W^Xib@^Xrnp44P}zF|RRuHy@**qXVifvcA*h{s(pwD)Q<
ztngh_WAvWqc<R#EQy=F3Eu80-Z~1by&z+w;!+oYIXk|^@CAg}!>wm$;l)PJO-zO~8
z4@}r^a$$y=@2Shud#bic@BS1h^uYG^1;t*ey{_R`7rtxUdbUnO>56RbhPXv<6aGC|
zz-a5e+TrQn#)-z~bEI9rP8QrJ<na8T@@GGV85{M|xJs2HZ*Tw37i*z3J!@X2)X^K8
z#MuOo+*n;X_v(`a2fwbHJa_+=qoFDbPx7z(6?M`@=#%g_1`WZtE3Yp<zwnf1?c_e|
zi*EI-6HDg^^2}7cEm9fvM3wEEUuwWZR~ea~0oL8@Ukat}2qi|{IsH;m(t_h|?&ZJ7
z_lw_Z|F+~p(pUXzX3GT&OPMzc1jz^9oBa8l`WMf0C0<q{RbrDYCRT4@@pL-m&E%iP
zDYU6E;F`{LtLICLPt4)qXJ~tQy2yEAq*&5!qiD;oP14i6ucUw8cOm_N#ocFb|Ni}}
zCts4B=J8_hGojFl^G;|^d>*BJ`FUXs+w+iE&h)RBzea9+)LoN5*<fA2;MF5%j=ypU
zzL4|c_R_^_DK#%*nA~5T`F4jdt>MKS`wiwQ2bVGIIwJG3JZGh?=?oRyGZhcEnoIuw
zpZ)WheVO>Kzd5H4oODXL+5N}&!TF`lTDBj<mdhtx5>cLfHgop>ALc7-D|oJThI-a@
zG^X$VsGxo$==6P!nmM!Mo?d2{`-S^DM<-K*t^G|c$=c`aqAzzQsvPY0s<OY^J!$TY
zji;?L6;eYkRxH<k5~Crzd-@l%M}7>4JOiG-KXKqdf?QYj|EE3b$x9Vej`V9b?wV9E
zBR1ul>Dt8wdw;#oc@@@>^>$Nzh(L$FVT{-A*v3Mc+=z|$PoMEhP&fQi_L{AW+vC$8
zO;L^>HR)%U+CCl9NQ+dPX!y`{rr}l_(}z>+Wo}$Dk?gheIH$ST_~$gvyeYq~1~t1K
z6q>;Gu<@L~y6^Kl@27h7PrIVbzG#cI%i2Re9T$$Ntz2Bc#iHuqiudmd-|<Gj^ZM53
zcJZXcnZNtEDksgj{zfu%&U%kkdc5n`%6V>+-n`)5sl=!w^AEUk?p143`(5A4bnvUg
zt9{!dlFsgOTqW+4W){})F>H6R^SU2x&Frb~AFw?(uF~_euT5hK$i1n{kyWEo`CFHx
zz-z0xtJ|{_wPv?Da&x!mI|;9x^kJLl%r}SISZ6bxxOaGhSAb-rlV!rBr=h1MlpnOl
z@87sN*DFT9;P9c_Gb&@lEM^HksSew6F2D2r^V3Tf*33~8TPTo!V!fKSb?`~2NFKwi
zZndsDQK8QBg?!<)%XZFTTrK#CQ}M|+H?zfdEr&dt&U{_=)k);zcE>ZSs(R*q3;I5>
zIp5i!>E1N+!{6RmrQ7L|ztn3U`aW%)8Y}4?9d}tSbU|cBT+foFCuZ00%W4)g4n1%0
zV0kK{W5&ejZ?CsL|H!yd&1je9$%OZRjA~}Lr1u<He%qxvd)`0EX?njsvQ-W-{;zXh
zb1C^#@A}vry=zv+(^C{?DDOKYeYi2TI;(h{ov^g-)%0b&!kVW%)q>O}K7Og8KV!<%
zd)hDW9{oOXCy%JxfvDAcjF!wRy0}Hb`ryKw>%%3s{7T=<$x?FtcQISl48?_iRZia3
znxB^NH!I_*jMSct16Ms)&0|Yk#j@Rfd-m^z50fH)>&}1qWZ{{=8B-7c;s2EP^qQaR
zgJ(<UzhOvCUHpq(^z@7wiEj4;Sznoo=tn>1YslC*vAu{fa-;B~-letNs|tQCnq50p
zPa&E=zVjsCb*n4Z%lF5du&8BrAIT2$*>E&{-|8PTB~_(`88`L^aM!zins-*}mCE(g
z4n==$f@d7sT4pDub7{uK@P+3x7N#cuUiXw+y;kDj&hGO07VQk1*>)Z7GP8<VdeS85
z32)LiYn#Wj8J_)S(_Wb>^-D&`DA>_W{OR+ErnKWPi<aet{dV#;vEH(CW_wJuR~_4{
z#$5~&N}SH!PD%GmR>a@?F~3%ah57xe-K*vcNZp-v&qMWA&f48ioHV3`j?b-`thlM7
z+j3V&zl`Kxmq|i>bGH2IG1;`rk3UIk<^SJHdB3Y~z5VkkPvk=8<*WVenJ;UxZTWb{
zvYmO8@R~p8LuJ}#Eow<`aESL<>Ty0VIjga#{Yct@u9trze699Y?9@qGm>MHfvm*17
z^<IV?FTtlgao1k0)GKK^zk$pCBWF;X!hetdpH#U2Zkn^Vy|RD9Ows!7iNUeP63Z&O
zedS(>z2IX_kQO|@=VE827*~+{t-BBE`?^HgR%xs89LZMSsWD$PvTvHbO#TxVpOQq|
zAg|_~tkrv2PI$9*e^{keT>a&i(gD%Lb2{5K^B+9sJfZUM@1KRXi&ov4wq7@Ead6}b
zw-+BB=O^=7Eqs%-ddt<1?e}<psQxL;@$0d)pLuoC`!%c07rkATwdw!dPyd&d2fs}C
zymtAcWj@tsH2anXrso_JX^ffV+I8&L$4Bwz@4tz8p8H=Z{&ZcQk8IKd&ZA#X?|mBT
z+f{Vx1y{517Y@ZRwQV;S_++n{{>{8)LdL~b^D?==yH2=#X@32EqL{T!Kui8|H9pPM
zPbZ?Up7FfedqO_<LUYJL{%qA)m(%;Sw(G5`xIOPg6oaL~^jYc>J9tj*zuX&f?CQP#
z^y&Y(3Qt-pEUPMLy1;ts_#yj^2A9p2ZBBXhyiw`6xo(r_M#o3}tTtEdU#w(t<*7_G
zyj!j?{bnBHxo~|IyX>~S{>>>JrzGCL31>bhaE9rr(2pLQMZXqg8%|fOnI`(oVa}Oy
zj$aG{-bt1gAATMWiL^CXuv_iWZ(~6-S<&-G9-De^K4vX`@p9)WzWJ+<ReF9}*MI5H
z?A5&DuXKZ#udx<8e}BXB+a^IOGCy9PVlMjC*&ulAiZFk?p6{*bG8Vz5vld8J|F5b%
z#;EmJ&3k#RlK`8+mC5HX+pE1-VSeB-F^fN>;yTxv+i~*`?Yk1S`0}gG)o0t5a%L^L
z=(^1-c)|^xz?!_=vP0)gd2AoCTUc$<b?w=9UH#^ZE7|3}Jnr$2rk(k-?G<Oi{=3t5
zeeSydI_~OQX7$?dUlQ*+z4-GiLvvO@jAg(UrVZ~kIt*F79&b4NCHvm`=5;qys!9^#
z%D7)&Y;bnBXiH?)+puUx#b=4YOQlD4y?A=F{YG;%i=sM9x$6?OrZbNwJ=3zyFP?tP
z*XdpK_1dG>YZ5&<1AEm@6!M;l65h1+t$_mLriklVCKoMb{bnfrP@eu?^W!Ju$OM<T
zl_wXg$a_3~WZ!m4dd;V<?GLa05mAo6%3UVm@%{evNi2sLW_}brvBl(^b<^pFZT|xV
zR+&#QIjxp!eBy{2x7sh>Ck}oNE;9GCtLNU=;FDrr`0Hd#i^<j<8|U9TV%XAPz4aK^
z`db^tgQqdAieBN-n!E7yyeAuud47<YCE_S7@O<mXBOc}UUpO{rey=J!$*@&D_vMbw
zD<@|4-Erj6>vZ19EU`mee5PjpKiTrmYuPL_yl+;o555=VK8x3{>%L36)4aZfrROvY
zzFoL_<>vC=tt<XFf8Nfc_x7^+5`hd)=@;+9zl3abniBd#^W~8fzE4(4AF{7vNnbnp
z<s#kR8}+vO)?El=`#mk~s?);-?|!PV%&hY9c<d%DkiF;D;z!%+!yf7W?H4oI(Z#a0
zorjCZ=4->jlaALW?{I3r{V`AB<Nt~JVP|_jPQA11%uLTiB0sACE(`o!#DArKtE2z^
z426hD&tDH7RtBXRti0m7)Yqu^ig!Z2{Y1Z+=XSmm&bi*7@oVwb%`vw=t}tCPd)5&<
zzO7xdr%p+1nO!n-lKKbNpNmSaUl8OobKAK~@wba<-1M#$mv?y|o9Q3mpC36d=L>sY
z!_|0Q*GS2{xrX!anpgOrs%g(zbfvwtXt&VDUG<x~76r}gRb2IPncV55yIp1aZ0}!L
z#aeXDPgz#yqJDi#>E5~(#$m_4-(6o5x^-gFti|(f+-whu+4?@4GDUeR%LSDwv(+x`
zlM|B&+NkdGeT`<a_4M1S%{lMK#>$7YKaQd+BMU4A|&fEKMa22n5clCbt)ucN|
zMNTF}8wovKP*by1Oy%N_k3m<|Ebr>ro;~4x@2}hILiMg?(Nle&ceCwSmRhpv`wPeR
zUq<`X9T&|%l;^{Fb=^Oco?jyK9TuI<{UIk=u;tgvn+01WR9uzK!g#GZ+Hd+4=<erV
zqjhgV%)fQ>Thn#&xPA6@s_)?v%zTlcz2SA8&Ht6WpS9P0<1u|?*l5=<L93bX(TrJU
z$KGVuUkT3JC*5WFOx@t1<!V<(b9ZUuIpOBNEi^9jiB7f_HkhR9sJ{D_&owc%f0_%6
zr$p(U`}J05vdtr@h12I<vtl{L<X8H>>eWu$wZ(H?KVFvhXy3Rel1V=;>R;!B^dp-0
zc23=}!|;&o1G@`4`QA1cj)hNt;PkTL<>HNdogPUYiqqAp_NhDTw05=6WY$fGA5ERH
zsOij(==D0sswb^F9+>oAGj-brsfKUq3YigSZhn_Z{a9qP`n*Mu?*2%BhuY1_F`Bvm
z&+b3^bzVy5@o%$SU1W==Sr;0-F%8^e`9n<N)O@vuW%sszS~W#1ru@b8cc1q4`Q7i=
zv;VX4)%DMZcKQV=wfjF^$6jOBaK~<aM!wCQ`%hOa2wPO7z5R$|hV@qcD4}ML)S8@H
zuJfPYmfoGm@qD&^)s7!GZFcXEd-H0Qb@<+pS1(y453KUfY<P3}dPD2KWeR;=m;FBd
z;8VJHAiYM!+I*wV;nZ6FXVZROw$`coAQ$?vWnRFlIaiC+Wiuo$3EpipYiH8=pzmCL
zLe_M{kFX0-KTckjFI7AiTT!s6cfaZq^}n{v6%QYE#6G(-+jWJ%&Gl<lo=pLkuk34-
zK6-a9cbxrV*==si?^@v|H@UYzlIuR+eRiUn?v%M<HL|_c%x`9VKbYQcBP?W`-r{Y3
zdWFA;(S}cgr{oHpm+xFOPeyj{uY@S3fQMV;xlUSXRBRHRv98HH#hG(g;n!PIRxga$
z=3cD)@Y#ORm6{v7>?LJ&!$MmFg>xBa*9VqMa1`@*|C*arxtT@sZuBg{C!6|0C(ixy
zW5HV2%X{BU%6j)JQ^9~;^w-m#Z?TKdZStCPJ9ufNj>?kv)8|ERZWf-YsxEy~bFOv0
zYvQXM#iWh86W_-7Ppq1%y)v%F`T5aZTbng?CjSXM8Jg%K_h?hLMuGZ~iwc(<Zn?e@
zdm6X8vwPp>h`bp`mhE_JmUzL?!Mk$nGl3^Q&K*;_i|()IO)ia6u~U!X_}P>bx99#e
zg*z+dCQb-vjCrT?^v+R<;;(E=*|}JpZ(V;<AbRnf>VbHZy^24A+3OkdR@9|*@@|y5
zxXWm#W$KT_?%cSe`*vCCs-Bt1;C4UN?!4!tQvNLN$u2*t+TQZWPN?4&cV)ZB?&<vQ
zv;F)`vX`{Y_nzNq{?&x_*?OlxY3y~A95r+o@?To|z{A}>@P^3B-K!UzS$9YE?)n+q
zR?ldjeZE5I=<&q9XLs&0TE4#Zt{_wE?6i*i)vU@jId(1u5B{H;x#)7_;>ABNT(&MR
zteP2e#WFNy^Z&lTf<0@m9lcg~&rgr>mU-ap;4>m$9|@P)%}R(<Td83<dAq2z_}rfF
z9d2GS^MC5*ocDd^bN@M;a@*ckd23zs+-|>|An%yVx}PEvOfEnC74e#TdDV>v${)W>
zm(3R94}Z69ChL~z3iH)>FJZD3oY0^uzxQgxzcOZ?<?p5yEoi+Y^q?YS?}-V^?Me<Z
zywlFRzQ)2e@z&FJ@r3hcmw*2Iaet@rGQE>O*l+QFEQtE<km7avpwqvG1=HEg%%>l`
zvcdJVpwpRp+n#A{pSD^AbB0H)n)3QW&g`^<HzFU~?Al^jXm`CzUhJ-k&{n<;x7I0d
z72cF<W^nHP`HS<@^}ko&KW`i@&0TVPxw>2Fi=H_a3V%Ml=yUq6&t_a^7I|mlhfN<g
zT~V>kFJVgRx!`i=&lKTjA+wK37gd_yES-1wSp4tm9@gcH7sh{Jt4mgUxv=Y{?|w#6
zy)BQN&z5Xgx)*PH!}rOoX;&l_r??ty<mQ@c9lhvR-L~~JC9P}~D(nLyR@j=g$^TW3
zzuUrSBmaHE*_X>MJyDePe$dk@ou4rIYU!1ror)Rqk0&Yqa5*5rSv}LQOUTN-?xR&f
zg^X2g;IY3Cl&8kOd2YXBx1wyGsm|wy?biER_e_|)m0L72?aqCBHm&*pj|C(@=!?1e
zg<WjNo=JCPdZvHay7nJip;J=#+$mS4dT)3yw@2pw)7S$do8#WDT`;Hm?v<xGp3*y0
zj$g1Z*5}H)aP`>TVlTeSO3T`omHyqFn{)d8ydPE^H9rk!25QX6j+0GVzcxL)w!Hqp
z!bOrF92YJ*?OVqtIDt8Ii|(b@A)>FRzx3zSX*_0l@X}|sRcBl>`WBuzns8U+=q3#Z
z)ip<>pNllz{(b5G`rBu^_wU@P=EOIv^#8*{|J!GHKl=B<a_f>m=M-n`<Jx9;>HL@H
zYHKWS@Mo&I@=aK@nxm+TU+c#X+3&mOiQl-lier&ZR%YJe<$rvI!<%a-&uDoX^+D^J
z&nAg7&utcA^J-H=ADx-uQ>gSZ?=A0vyyO(tzAo-Q#;0EmO_o&^S8kZJbGD?N?)#6L
zQ6UQZd$&K|`%CrIQkG>0`F|zM;IDFUV|b<NdbH@9mc8SK&aKSN`^uI+z5C(a?pU!M
z)oWK6EtZ+T|MTA$^MAz8Tjb|j6S1_?ylN$*T_(#`vlTL{z3ylqSyDN7|K?_=(_TRb
z^W`UfKk?wYKeKn#LZRqOzaBi0JasocKxV3!3-dD#t=wt*Ti<DvM$b8-Qm6c*Mf6ws
zgo|09<<ASe$&^U3oV)N(xuB%m&O=Y)-|T<--2MHH)9nZ68(*J)Lwr-XPhpYbzkgF^
zTRhQLzvz&@UT^lpVmFOI*LfFxcW(N8sLy`~^V|ui7O|b~>VEa8_P@{JhCQ3aTMZ3=
zzNrq7yxEc*mD%^;UH<Xz&5UJki{|dAGJg4Ni;712jF1Hn=1rTf7nb3CeA1nFAG12V
z4@_O~^Ys2$`)v20VM&~8Ol{&t-}!gVm|SyVGHV&5cXLeS-39VNsrNOQ3)>gGmJ^*O
zbs{uLN&G;{Qn~Z*&3>+#_S!p=KRSzV=a=vE>vtWnS7#EG&D(HO_!gsD#HAj$8K&a*
z{!Cw%uw<RAYn*3x;z#Li63SP<ZOu_Js7m0F4A!~A7Lvfs{*-rbc*L#~Z{ig%Jrl{`
zb(<bJWo^BilIHEB=L0Q{>#=`4_i_IAGl3`PuTPR+_DpPRxEJH(smmiurgJ@=CTwO`
z^)@2q;u(#sJ&t0R&6KVk_%-FnnFobEA7tO@zt;T|n|-xH=faYIs(cdr*6c7&=y_5m
zD#U!(^O^RS($mvDJv??7Uo%o&n7??j=|XR-m?b$uQVPs%mEG)>>yJ47yt!@JMz!z_
znSy8DFiha?U3hXu@zaN|vwyI@Vr90xly`>VjF8N-hNvZNpQ0ZW?G9Ho*0IhHs58Ix
z{pkvyC+!?r+ja;pEO;0m&QzegL19}O_mi|*_0HJD_uVGB2Ny*;F`GHdp9&C|{cy8Q
zm449v+1bX`Q;UCTdU{9tF7mMuIL&@HA>!PoJ%6@1P1aS^ktmeOTc#K@Rj*`wd-ERW
zm~YSZVvoI>V5j-R<#~>l&MlcAAKoV>nZ8<<GhOwdTf`D2@4J-~`&e@C6(-cq(}}kI
zqqs3$Ay!y3`SiI9#;>1PGjf?Z9aMbZVAGp-|H}0JztjIE>i9F?+GBS7#TKpy%^yC`
z-#umB%g0{k=?;1UUrQKx?jNX0{=IAcp0~y`(q*!;rDU0BM+aDMk8xfpdH3Q@8<okq
z@7ky5hge%nc8ci6cZ#L<Z1R4f;^TQPLugBKQHjNmgqf8adU$+{zi)e>`&mOFm~Zo}
zt!o>OW!Ekitb0|uiQD{|)lrtu24=HFV#TgiJoh+icm7q@6T4HLcY`)N`BW?QF}_$V
zs9eomAv{|;F`S|5*w&{TjBFWqd)Mo?o%htT{t>+YchBS;nTIA!HAlt5R&l)25I?--
zpmp%fRi&5GpIiOPNy(}E?Ot%{cpD#o@T`M53y*KtoAiInlGqI6b$d%C3|6<XFXeGA
z=Gyo~n1Q`IoX3%O+NN!mf1Y+tU%udE|Cyq@_Ma2G8$U7q2zcSw9W(vpvw*^#fBv<9
znfBiH`WvMm>(+KWof}_lvPS(v?_Lc~!{BFSj#o<smL4dw_<Km9GiGtmgB?<@6L%SH
znq8$h^?J=00of3#Bp0KnJ{te`aQ(`>;u?QdWsZ1EeMS9b=46(-h=LdYBCoIEJnL5b
zZra?v{*M#w@;nVDt(@vq^Y_&guIgi7FPVz2zxb`c`)1zTeyd=$plkDtxAz##IB(|~
zT9A6q&gJVtyAE+#<r5$Oyg87cS^Haz`3?)yO5xW(R4-jMh)SyqW}UjBx5xL%WAFZX
z`G=<Nmsi?ozO*WP3TM*x3EP(!?dH_5Y*+v0G^gnBYQu2GM+^F{ot|(fIrz)+u)})n
z6B%M7x87`Z>RZ_we(g;{MAMHq$qjPbXE|QF;wJY)<cadP6DMr8KlA2n+5Wk$@6q88
zXO8}Hs=qDhYrN;ExBF`a_p0vT#hlTF)~}xbVC!6)>0bYMk@IEY@{^ys@BUS^bSc}o
zGBn}6;1ebDn^ud@zP8Z(uXKOS|83^4qPVS#(+?`Co_^}_dEc9ZvFGYpE>EtX{=<9k
z@2e}C8V<8;nk|22KDVF$7ER_5E5RLM>#cS6+}dBl^>bJ8Nj@j7hV<;?8)6?;{kT>B
zXr)QzvtX^$mOCBRZk->dUcD`|O3<p0^LNhHQ}S(DJ3O+d?#SowJUQw4ytL*2#ar&b
zI9f2J|J@7OWfu}=@GR?G5?jeD>vqh&f312v>jMV9OL51#HZ<(rCwWk8{d?n&6SLMx
ze+^vm@6YBPZ`FfUSdS`1v|jo+d*{4|J3sQSf4Zm4<It77$r?X0z4nx?YHdz^^Jz{P
z`>e}_f2RHY?sO&b!m|*|n}LtE%a&N3&wX-`S7xe~W_HwH-}mvezTEbB-YYX<2Irs8
zfqSNI{Hu4wBq2M^(nmNYt~R-JbFY~4^Ht@qyxQtJpTEd9_IodWQ*@b^%l|`ZXWu4l
zI@Z=$?|O6FI`f?qY67&)3iIYkG}%1;`@*RrkFU|0$B}bQo$HB@&R2z|y|@#!wL)Ag
z*54q^nk_4=BB)xJhw05}QT8xaNey#8eu@7UmyVb`NvYS0GUd4|eOUhY?PXsY>>R#7
z<9anqAUWgxMcJR)rvfBqXnb}2>sI?MkY}%B|J@3;jA!fIrH(Yn^n7boJ>zLQ;keSI
zL+c(d|B!jGzcR$7WcDqm?SGZ5USEz%m}<47bzlDx>F8Fo4_abJ_IVi2;8gf~z4&`r
zqud;czq9gWoR%8h5ueM^z_?tc!9g-ANr1m5WO)X=llS~7$5K@LL{yI27BtCySg4@4
z%_P0N>974tf$P7|c5|p}Y@H-|X7;7+hC6pJ+S$>e|FY>b`}S3;#oP)K*QHOT3*MT2
zde^qc4vPD}<o{(j-D{QU{D717#*GOxSA4i~hRrm@s4h=PUi<a#Ke~VWE;eLyd_Gq3
zbI<zl|JH}2EUpP}zqIk_X}R4ht+%cgtv@{F<X_qT8B0<*wW?oNggV~Ht6#C(_Q&=k
zkJYmuq+7mQwV{wNS#j1o-kZx*Rxc@eyl92T=Z&G8zudW1zme~t@i+TR6SU9FkeM5K
zb;2SUjjF?Ue$EIrmfmM+tjM0RXVQy|tX^Yb&c@j{#IIG|sn$3ep<;f+m{Hu1ZSsoM
zT;H#G1{7U-{xdR<v(VEo;>RB8^%s9dPPU#M_2WzotKR8vXJW2em0aJ-TD*dF*WMG-
zpYBXziS|wZvE&@vGx>ls=2!9<G%9C3yY`^pAS1+;LvNSZ{sX6!57u11(s^jIxKaF!
zcZIBWvqf&SFrRYkU3c$__}4|<W{(s_zc)!&XHMSwv&HTqAK$SOkqKeJC)5?(#7o)=
za_VFnrzBf8veb4myY6L>aCp8y(e6sRx_R9hwKEf@uQWJ1{jH9+sX=GkjX6THf6Py;
zI<+BC|5BWk-0H5MdiqC1FD%&gqy1#b4qfZQWfQGbRyen{DVIzwG2?ESVAr0~`cFTq
zE~nyBk;{zvzt|_&YWoP(Z}STJV7FFEusY%ugSOn+GrLWC-}$d*SX_2WvPAgdaU+!~
z4jHDt4AaT7hF|X%^c8&#_;BNf^$p84qP=gY*KXL5^e=V?FXL;S$&tZ@-R>4rYfT^d
zY`iEQ_N`OJ@r2N&`2}3HZ&x0f{`boN#cyuO%?o*=Icc@ef`fZ6bp^;+zMt!vwX;U&
zzX#{@y&lV0CtYTjWZJ_UvP1V~Qr)c!94zHwHWDSl<?~L*CrfzFI<oV&s8#6O{b`zM
z-@jfixRs+K@}$C|XyaRf#PhjxH;7B*z7{PEz181iX_@-={^!y;*A?@Ug+)%t`xgA&
z;XYe0roSrVT#<>s@{yad%$9$vAHIH=!5aGaYrqcPApS0kKSw4U6sfz#a49l;k!8R0
zchTEUaSk(#A34^3P2lU|`Z1?3`1;F>Z#bN?R(sFfoK^kPqfmu!0dLdak8CGwf9&La
zYnJxWZ1tL~hdb7`zjE}u)Un!e`bt$X+Z$r#ZgxRN*-r&61l~lO$6xhq+4sJ{xjDY_
z(58-_?|Y{5^u7@bT_kkesz2uUqwA{wa*kX6uQOh=*TW(+M@z3dmM50+miq&R&zz^E
z>~1;k5XzC6!9OLspy*gZi45=8ia(nY_gc=KaMSk1#-qhwJk4!p`nM<kcR#5wk+)-U
zVOJT`J;~=+ix1p?=y?6wLE+CL_D%1?ZY@c#Rb1^eTiQ9>G0ZGQ+qiP;H@l0GS3Z>p
zIcd#rJ}uh#>-*AoY_)O4dY>O1m5{8hsBrSW_ou7$;R$x;ER%lG+S0zojq~!GY;Gk!
zSba0Jh+W9*R+7W(w;ykvGEfQJoo_x-ny<RX=;|Spj#WPlA1+$F_DbP>kMBZzJa+$C
zpK|ECtd5?{HnAw9Re2(dCx7!x|F=ctP|U(7IS+kIFHC*hu(2yt;gliw8yVw=dsf%<
z7bVrna^)L3O}XBB?9-iF5BB)kpZgFpok?TjwMpCd{N@jA`k!**if&|aGxMTl?)@x3
zeAmyMGR0)Qd-X$ip+{H0Zn(94T2QyUMb@@mbF!lB_4%wzBH#XUtvRIsB3i}REBgMU
z#Y+u+d#;?ZKc#5&?v#}8?uZM;OKn<?G4eBSwX`qSuw2NTbiJj6Q&qsJAmV$l$?Wd}
z?t8M<PjA?<b5`rd6S)t>#HE(02*$Vd%Q2MsOxSrwX;T7sKF{Mv`*|)bVz}V@^ZF;l
z*0)oW)yhi)I}N1M_sadST0U#V<F%@*q9oG8+a)%qEU0|QkgO28f@eigPTzY~wVg#*
zqP@eTgU*~vw0U{ynb+1wp`Bt0adAi3a(u2#di5i*D&(5X{RLfj#gEtBdhh=E{MN7h
z$M$Q8>pASHxcgZwZn2WE(B?y-CuGat-l?s5_N=kcRAQ!;qU7J07QG7rTkb^lNvEB6
zJ+|ps)V7?O-$jipIpkHp`G{LiGTQrp>FbXx_$*&e$qAhB$N4~5qJ?Vf1wFO1^?`~p
zd69qrcgr5^sn|Y~;j>4n%tFNg)1dotIdgtGJ9Pa%c)xy2?8g1C`~S!^^mu(=%c-2U
zYv<Rk$+uO`^~-O`^*YXxEn_SBSCXsEb;3o-2%k&s9aVe(PWrXaYH|7bX$Fl(wox^U
z_Wn2Q*IZ(3@oTx*tZ6MbQ+Gv7>CD|-zMxfOOHrNqMM18o#{@d0#Pg5jJ(BVD`A|}j
z!GHDD3qhx({gEEgZ|hFPP7d9nz{u0$C>*@=@2-PuPd%CYL&D2FYklbc*;C{D*7Z+h
z-qzpU!|~pLqxreK(D%}9Et}nrnt8h!%w%DG_jhWN!)hr@(YJzc*GxFqZEbk4dLh4q
z@~o^Q(@R7-S-X;U{QJ-%QBs?n))sin)<j(C^+cgE$ty*yRfe2$+kc2g%du>DBo<nB
zkg53N_eq||Pe@uNb89bG-0}C0*oP~p0v*~J<ZdpFPhGenYN^e}PI38X9lid6X18|p
z^_i!HKQ^6vddCzG&C^RS+;BZ}F!_yazhc6)SBtf{H`gq<+H80t)>zMPqEmUqS8-QW
z`KvD`P5m}aCAd|1d7Tb}K+b`$+g6&(2k0*Cnq1AyJwGssb#7q!^q!#0tmk~!JSu5<
zo+*6eoi~rP)&Ge9cPH#k3#?{p*cNuK+JT{R>eA~~FY^_A*Vk)K&Hj4w&o<p{%k*C9
z*>d0RzSSVcyiH5ug~Z_*rPCRbeU7U|9iN##-J(F`*g<o)2Yi<@%~-ZDHuFA_S>mJ2
zU+fke*|}!^Unj$arU%ER%!8g>;OFZ;E*Zkndz1U5Iool&Q_*)@C%#x?cKN(<v40PD
z$H|4hpB~MXUVrre5$`>kuUb~V&0<;9sn2zqU+=*SHjYWW%TDw@zr5_tO4bW!%<j8p
zY^ix2cCat%WJHRD5s$IcrJo17R?PYBsd{aZO;2RV4*4rLYPe@i{`omA$|8&7)?Ws8
zzE=hbHk_5aI$j4>)K@>z<I#~g(-QqB;yUvryI*dS>mm%38b77QC|UD$y+3Q&#Iis(
zD9Y}`kFHIhdE4a#;%>8_c=wIH@8P^Zx1ye{zuNv%MJ9|hvnbAnEB^k2-IDFy+mnw5
z*RDwVI5+N4@rUMHtGMn-{abZzy5~Dz@%6&$CuZ%4ofF=;fhjt6>jw3j+Z8M+A``wi
z-c!%WSmd|VeDnVt=0n~8eLk#JS7w#ia?a3p&9V5xg*Q80HJooUN!+hmUNy_tXWP@g
zyOT99$Uax$bI|@#D>e6o&}I(Hriq)BCsZqTy}!BZSk|@3bL$f3DrlVaj=pZz(Hk|t
z^Q}Vv<++(GTQe&gO_`70UB-OGZF0ZysmJF${;n*j+!w`T=zQysN#3#MrIy7$@l7|R
zay3t$x%<lFvtE-yBlq2@Ev5>(_c=-=w<lZ(E%Z2j{!?S|%zNU@aZBgBHd{L$p0;h?
zqYRG*u@i-PLU#+V1&SZJSafaf-6f2g%iUrg{}xa0f2&b-D+dRq^jx6|@}vEfR}
z0=}P}ou9tx-P?CxMcv>~OR3;0ze7_$MdTd~IG}reb22kWmEPX2>e%T*yJv`f)%{g*
zx_P=R<DCm{7oU%{u3Y}Kv8^!X<GY~xQ!%ZnUp+3T+jzwAT$r)_m|W)JkGBntFGb`e
zEB|})Zj014*~L*;xA#Qu&PZ8rY9G94^_t0I4d;`4C)ru`X#O%^^Z)d!8ApCKWQb%X
zxLLf9Hf^r5oTkUgl)od)_xfJTy0;J4``u!FzwvB$UutN}=~FA_Z29LJJv)2<fhRoa
zMtY0CPP%vO-v{+>?;fH5kG;>9FfG2RoVd6u^O@KEUYGix!e-wdo1c8Q@j_YTv)O9f
zQz}w9%r0ntDwz;ibopGaoxI|ztJ+-hqRZpBQ}oY#R=A*KaDIJ}*)x-OGZ}I#wlfv%
zWxTuUmwlp?vc@Df{Zs9mwD&*xaj4?qpFhE_Rh{99P7M1)yCxM(ac$7x+$|vd!?1mE
z`b(u%&m9$?RnM3+`?0o0tHK|qC%0~jI6U0%D4TtF%ZkX~1?F$RmEZfk$oFp6LIno9
zDJPq5@5}0az2Lz-&Glx9>l7@uFL?PqFhhJt_GiVsowKzUv?uMUxwG`Xl$~DnUdCU{
zar@c2ZO>(_*?ZHBamlK3-^r=!vU8-DtXXlaQGU%E-`DjH68qn1npSWw*)8?zv|X!Z
z@z489`USGP7%dJT$e6dJLc`E>BDe4Vx0-y`s}_9wRIFS)gYC6IkUiIiH5|^Lzuvt3
z=i<e3rqBO4FTbhg%KX1tZO;OsZBur8v1hb?T($pM!lyuw*KP;?-ZT2GvCmU(e{EAm
zd)oK=9&bwZC7jF+ShjCnA79Wbn5eQU>}=_?=ck0<$jq2}Hl<SXTe-*nyNO=S+)EcZ
zyRdLvGrv)DS0l)<bBa3WM%fG{FCpcRm4!3+2Ij^&b%cJC;xB)@tD|L~lG5b&x2C%$
z<jb<E#4Po>`bA1Rr{;$7w2Q~P{%n8pQ6iGvT4C0fwOenuExJ&)$Z_+6`&M_aH?K0_
zU30_cvgiEQ?!CLt{Cw#XWU#k9%{MgSZ)9>{ec%^6eJ95kIVY|gU0xh?mf=_K>i6PL
zWj3CC^Fxu@(Kw*=Q1klB_o{Yh9*%3Dd3AD1<<bq3H-$W>%BWRtimmft(Fn|nV_HzO
z?aAvDQAXbRiJ9f*iME$ZZm3^-_3pjNq2FHX-+rAu?_#0kllFr(Gq?Zy-*xZtC&r7+
z*M%k>y8WV+CGf{x?H%Wy+3fw)AkuMe&*S*;mZOXQuQ_z1Y00ERKJxj$r`2_Sbm3G^
zS?~Fv{uo2sl5<;A%d1w*KKZfsobrz9oLy7dUw_svJ-t#wRwUlqj(tj-f~!%;)uq~V
z9eF-#=<T2Npn3AbRu9eHd~N^NehQqC`(WOKXE%RX{i;+>5v*PzlCpjMisl)2<|mdZ
z=r5DIlPDbZ$Kb`Epe>gcEyykIZkM}u&FDbb?#1=bx;UO(y~5=e6Y%bpW@YfSI5WG4
z8<VG&<{IakUNie;f91o^4b>96e3IAAc$oKe`n-<?g3o5Z4qm@p@WbPcn@;|4S*+N*
z!s^9g9Zu==RHK%#@~cuyg8vDdntfgL>i*3$C+FlJx$Ju6*WzWucK=MzU6ZUn+`?*H
zBs2HN3$KtBSJ|ahHT+UK(mw{t=ucX<(`1h5zIslv%P(`QmUrxE{L7sXR26fqXZ4!)
zE%#48KYlgxs`$@&zl5B&>^(i_SmgYx6Mtthncoe&dvo%#ugZaEx_*>?|B<R^EbH;h
zP(E(9<67B?GAneZbWS{{{y6m3Y!#utHKuZDGsPy%kT@40zK-)usO+-CQ*WvtKY2<p
zRs9Wr)t<E*x2PrD=q=(EQ`qP5IlprGqHBNo%x2tEFPVF09rMRoQBAwF`FNgW{^qk&
znc{hxbpq?#)7%GiX0EeOUDjIm<jPhnQNvj#`#kSd|8nzJiJB<3plQ>C+YN1P870wb
zkt(^3RU5irTbx{JK0$X=KF^#J>_?s~owVcwcjdP&wX@6q%e%#U7@CSR@#N)}A75}G
zRzvT^`QP8!P90cMoAaVwt*kU${|;k&QRLrLorUU!Art>>E`PR{>xK!xK`Wa;gxnYR
zkTsD9E-i0uooE-DT%-P2pfcc=bj`(`zMa9>&lc*eKXl#BLhjZM|0@}fw#v7j`6|2Y
z+Hodvy@d<iML(-3H~;v)IWBk45$(I-q7yzodvYe@$Go}nm-MwuzZ+HuC1y<Sj@uG@
zyeaTP+XnvHye7ryKBlOnEe&VBa>(!9>+iHk+UvyDBqLu{?T-H5irWRHsVvi7yAv;W
zTU>YC>ije)Yug81txD5Z9LKz5zaQ->=-%UNbzX9{@~&^nW=9#eap>!BI@_K1x&Pp<
z;K{R($C%b=8{N!IFY-}-r}-~H^w?*!xN~9(7n4=bpKjE?dgZoLknD{9rxN%43#0<m
zb$(1znS5bGz#*k)%a3W@Fr53~n{!MSuipd}-nhr{5`}lXb0s39XDEsPzN(w^Pxegk
zDZ&1Q%d$^sdlt0r`ogjP=beR7Tyw1*^0J=4UtJ^g#J<~@yCzY{GBJGl+Q{p_-NM^e
zwf%fo+%jcJxDl7z<HNyw4=SeK)BnfN@-FvEqw2r8>+<z;dihjNX8LWCu=cNCYwPql
zX@+Hn@28IEhrIvZtape$*ggL>f3g8%t#j*&2|A7`nUnlgie5gKYh9YgsT!$Sl)w7*
zp7l#bz8ToWoxfiF+G~fsYT>u*-Px&sq&b@>+z&fFojdQNymY)&aLshtMCI9&44Y?$
zS}bHS*B3s|#_%<H@#<4=pNd`Fx7es>ssDzK`~K_SwWPf0J1HC6vF}C6T;ZRRJt`75
zGnTY`*()uZzvbOVr{<=&hqgbE3pjS`ZKC`H=7tHyvKDVbI3qu+EM>BD5D~Z1d>VG>
zsY9=wT<WPg1tIqy<lI}|=<I5&+tYU<>}ly@9`=cOB0X1GYkdo6{r2sBK7I3>>gKAl
z|L*>>D*a3oj@bJOF!mKpiLBkE;ifUkt7LJD-WGrVeXS1r?@oA|UzGmcI^VLovH#!Y
zB^&4Uzqqn8bkbz&?4K5{T@#K(F0k!A{xdDzD&uhTdR2d+ADb`gzuH?|Zqf6(@`9TC
zn#F!9&34;;ev3~uwZ9-Vry=0+js>^uzM0QFl;W~_L6l6cgV~MVSC81z4w%nXDE{PP
z_u^somgNtU&pMxrVLq20wW!;^i*sGp4i&e;=Tq-~J5u_%|L-fG*AnT5+;jH?_icD%
z%5?Q=T!8eifa@Asm%~(U8S-7Yqhq)4YU?l4E+2iaTW{xm)_GQAsxj?m)cNR3%$%3(
zbhcV=@SDC^#^Zwdl_${!{4*Zh<d+X+^|YQ}{IP+xam`bviagVR;MW@77PI6s@=ivC
zzK%P|v{yD`*18MDpSU7QE7Lfy+-_l3n=<FO6_3C1PRE$ZqQ|%ns>X@6KYTZB_q+FT
z^Os-kG+2F7twrGzWAMGksj64vSEu~CAN!~8Lh;hjlQmOWq$NXE&s~3H(}T|4U+d5J
z&3zr5xM7zm-`SmS4~cEv(Em5^_PH6$!kD^p1$^cCZ+%^56zZ@q*;udb_r(Vtx>Aw9
zS9)CM`FicaYUaqNZU22;H~orv%-v?=xTMBj?_4p<$9WrDPtG-p+!y$#asI~AJhu}E
zW?F}DN>skL%QztA*N=%Q+-fE|o{G^TuCbeP?C1OV^o!P=QJ8;Oh|M<3o_%*{P@GF`
zN#UF?e`cp-CBJwy&r`3d{$ru%+oBKUQ?fkXe7KbMvEt(QCVTE{A?gM%q~4cwybaaL
zpM1Mp`h(~avAvU=Zwn-a%j`1j__oGkMa)jMzrwt{)l7^3@G3q!u3Gc%xX+%$LcN{=
z-T(hF@VVWnnfv73ha*W}f={}x*{(Wonu@5h{r>BGd2ct{FW?l&d!pTSQ}WNz&u7A|
z7HK|aQ;MA>J9$rfLffsEyC16V<c<jbw5~K%-M%GNZMLJ(4WqMRuS6{5CBpRDCbyYy
zuwe{+@=ANoKEb)`WX`X<9<=VdcUkbXhid|tJ11+4UMPF6vb%oX;-s|1;@U^{$zmZ_
zH;Z~RC_Ur6C07-Be)E()yuX)guDazJ&D1u_xtC+gdEtN4tnR1vfB&nIv~#)6oH#|+
z@D+=GA5nJDe#0rtoho)ta-#IZ)?A$vDu1%(?01Y{Nz*CHnjH1twPxb^Y2VM-yq+yl
z*<=*_w^!wZr+m!iliRjLh24|X)8F&<pbnRntVmaTbEe<TE3MOJZfxwhY%erp>5?4I
zOH1XlTbrLRa|$(|)H-91C!6oHpO;_fdVP|bbHX#l{E<V`vqM}$&n)I`lU#K%WUHgv
z^{KwSo452ChRMq*y{YlipUU^DrEJIR^yvnEmoy*fI!@o|VRPT2)YF*Xy~Xd8h^dxt
zNt(FO>pz+&+{Fam9`xU|oJY)MPGtDab5BHNzOh&TkI;M}?%7_rYxji@Uq$S$N86?u
zIBhMTsKwdN8fkOx-M3|1Y?8W76jomO7tGCmBIIdvo5Q7DpB<N(yP2#v(p=Kw@`rur
zRFkze7q4ZrSE^pvdaW{T)+y<D?XvIHUsIOph4(J`EqHv>^IUb~bo*_WI(8Tp=XsZ3
zd>Mak@)1#%Z_hL)uQ=@EsKybJee>DVPrQ$mR~rc3D_STwXYPyc#}8Hey|4Y<?V2cU
zrfm36TV{E6_E&30ozutntbD{e_l{(`MBJgazRy#69=aL)>T0n%%`yE%_rXk_p4<$@
z$VhL4zuV46t`O4Och}7-s6+AEwq1|yzg>N@+-+KA&CLDgNxwEad^U}A?Y|;=<g^*<
z*_M8b{R=#|I_NY#nI2xx@4NkwP(<sxY1d*RXI{MWEm}wVuiDYXqQ?S<6c@7{VV!@a
ze^-x_Zsxu4_-R7EDGTFkw_SYU?mg?|GOZICUNdJk)uvwcmy=Mo<Sec&IK5%L=<W5l
zx?1*c`0DTYPhVLku4jSqd9I^#wwNg-dF)V#<872Z@Z&09`NqGi|8F|$wa2;XNRHjE
zo`Aatl9S^PEmhR35)Zke^ssB*)}Fb4MRZG&u0_nqNQw-Y^tjn?|E`+rVOeRnBN~q`
z)}G*bdvS0t$931|ANlI9Nl2c)wc_;Z7jA-46Yk_E&Yh%S&--en|4WwszE_7$PX8@!
z>@!^waPHaiyOm$E1+QP*`ZB}lq58$nL(iiE<{simKYQ*skDk2XkL`+!MJ<#9+_x&L
z)Kv0rKhK}u@>Q|y%O3-kZ#QidvzIwU@7w!U_;-@VfuHLp&sXaz$b5Pw`+y*qk@o4i
z531L#eJCa|PvTaI>h2wmQS~*ycm7*H_r;7?24XRxwyzJyG3UCn>D}4>XxFT)ozLS}
zEpw79t5_Gwm~;KVyv~i|3nYK8I&tY_T};D*=n01>Jr48j4zq5LPr5v<w7+fk{Eq((
z8&<8!6ph=qN+!`@uh4rv!C<2+x9)woS2Blj#+?T_@4mURo}X;~-tc$s=a1!knx-9(
z|5o^lSBd+#&EXWiIjQF_`>N=zTWeqZa;M^zy~ZErPuLd|aH5eTY;R=WWW}TZ|8>_Y
z^>6O_oyYsBQuhecf<4Qh2u#*|$oS`v`Qe)iPr8DW&J`u;ZQ69?+#m6cHG!OUa;J|f
zdpjv^V790Ty!B<pf0Y^2j){F~T7BnWUt`Pm9!I@7s{7lX>b_l>B>d^}ng43en@-)H
z5us=$t3G+#B3?nWvrb_Xe|T;+c%3Z!MrJkB>;jv=zmk~O#u&W6@0(QrCa|XR=BC3L
z`yI0dR1W{Voz6B(t?vAW=-C!_y%BFW@i|V=x?%V9NaIc;{aI7$g4cGb1V3h|KOe}g
zEP2p=*>S)01uU0t-_|G%lP}Z@300ZuteG;W{B6xFe@oNCH7gGCeYu?YGWI8@`ont_
z7mCDqT)I3`{;Yk|nsUGA)8xq?PxNfh6Yko$sN$NlEPwUkkhtz=0qkd9B?}j}bmez`
zeSb{o#KFp?#y{NF-+K7v7{8iqjmE^cJC8};NsZlO|MpmZYSv7P>n?B7-v*{wc0cHx
z%VJVkcIU`r-?IW-hin?J=2T{XTro-Z>}~zXN=Er*G2gDvJTon-<l&A92Mo-7{)qY?
zbNKzu>7MJR09EUgJvO?(XShGrd8F@I%j4O!O~O}H?yA%+iF42Xas*6Z;(B<~Uc#nh
zmBap&<7%JhZ1-+>^kcX1mLS{3lh(igEq^q5`E>rHGF2L1zHM9Rb$2RLSBT&4TbbX}
z)aM`0HM8H&v#Qo1vW&m!fAY<~<r??TUO$zWR-@@K=XY55w9dJ=c4v3C%yFzQeD?C<
zDJEBz$1kkwau<Kyll-d6udmT9WM5<HkCPMG<$t~i$X0o&t7Yw2IWJf_D>UPikVWHJ
z_Zia{PIrB)w)&Rlyg$A5ldfv4?F-%*!N8R8h(9|h{_B+ux1P&B3tIC#zoOskndm>)
zz~8yLPfo9%RH^)-phqux_6M`3nbtd>|NFRY&$+Ux5|T&#HI5{S30{t=Qn}22>f5}E
z?G^X3iZ1<m)W*Qja$de5T_-!^kiNskSHV~2J*lxQ|8n!`q+-69DPhx`t{dy+94TyA
zkY~PYQR$Se-*{_SG>_k28nQ^Wy#7G0z&Ew3Y3I*ubUZzCj_=8+4Mx2o>+b$K^4Ml+
zuYx|uV*MJI&;u$xf7oS}GU7sx)<>=Tcg7>vh-q0)nAxXamuz3eU1`&L+Z*<;Ky;0G
z_?x|X_s%xVnC5*bWsl%a9<ic1pXXJ-4%@x*_S@|<ugivgaQzxR`S<gEOMf}dOMBV9
z#XY3cv!hio>eB^_701pmE!Ew5x}*Bk1v}FX6#;=o`BAKnd2t^M1C4U7-)a8*ecGQl
zHYe9bFu$6uBK4*G#Ky!gaYcPhFT8RjCw`rIWoCH+gO1PVUBPd&R^6Pkd%^1mVPCX9
z-&O22SzhsTKa2IgnIf?<x6fQE`((F5$5ZIalSLdN4mYJkuV=V#GEk4!)sy`8hR?1=
z#UxMoXu^MW*`>LgSbl`gc3>CT#kg~}oRc$yrq_b*nOoDE7<trYx^3$DkX3J9b#sTd
z@Bc|P0joTjtKwWM_5@#3oH0#kN8rqMfe05r9>udk_L{6S7pdiLxv<jT<o#W#ABTB+
z9<NmsIH%h8b5qD~(Y^91sbz0&mS6L}8xk~me&YS4{jWD$u=V|9)N?o4v_+ehD}Ku1
zkPmsXtM}^()_*^*`24pSXXXDDAH~G1RHl89yxsR|<*cwUp_aEP=l^Z}rv6-g<~pV;
z(_Ss}w&`i9()f|NjYET}!*K81`MN@@^FQfLHrpQjMbpMKf@M?Nkxdtjbl%<-{l7nS
z(XrUp$Jg_kPby9M)~aYB^?5VPmK*o7W<1~GV83BvtmfUmv+o#E?`{%1dFfm1KcyF!
zCzll6x$l$w;oPGFyFIUVX$SR*Cnir;YP&zx=a}iy?7u%%uSv2i9n*W#D7$mk_6cvM
z>^OF?yxDrs_Eg6E>1}HwQ%-GRy7x+Z$12B-q8e5&S}!<lSyVr3y|R|huHx&ayiWTa
zqu+gct!Hv>T2+Rgg2(**M*|)#EU+!9s`I%1;qC!G+3%uk=jSbG5OsaIBhE}GA-!hS
zgx_6%kL`UiyGT5Ak}un;(pQrYiGOm+I_Grs_>^_e<Fs=w`3u}Wr}>}5)FH%*`Afy&
zC%+lj3oWWk-1q2E_p7B1)rsqltz%eXlYYEJ;A+vX@3owo5|ZaQ#dWvHZHimA?bCw%
zjZxyuJ|Frp^*;BlR}XVI8rB7+E#j0rvGo}1(PS6lZ^sW^yqfiG-rC-yv&52H9?QRY
zllpjV(<IrY7Smn56=v?*XFTm)OZzfSvxv%VlP~C=(Ug57?AydXb8}8z#JxjxJFdlQ
z^$0#Zw5-oQU##IOr?15{87FPk$sabgS+TzM3)vm!bS0g~Z_9yRy_r@U9?jfcICs_Q
zPcJnr4sLv-&@A}tK8Hr-i@j}c&K}L$e5k>Z?P#lp`T?uAwbFiJ3m*5}yB0NPeSiBZ
ztNeg|z8$+u#IK$a{B(J7_nbeK7j#oE1v|!S-1_!@-?j}kcF+2ilKraohumkix80_H
z`|}O`r*~3U>Mza}iq9;*T)L0b^OM$-tO_~4v+g?aVoR6Vo_=<qWt~lzb5zi_sJU;C
z&6#&R-{8~j8yYuFa?0<YxF_xKu=!T*HGYw_Y2yE02PSoU-&Nt}5WQL9&)uNqt$*~>
ztZDoc{|Kipf0~`46nK$Mt-e0a`zph47j|Xl6SkJ8Gg-oq^VL5tf6+Td$C-2cHWwko
z`(gaGdA{dbU+)z0d1V!);PoK)=Tx4hGVRxYF-EP)`<-4<J!uNpQgQYl-5tNys=CE4
z30fy*?OL#Wm#XYKy;S$0o;4pcc+ag(HF+dyyz_4lTj|rbD^L2@Jx_f0=2ZKuy)izs
zxFXA!U0S-c+(qSo^a7^O6|TYZ{D)a~pZPuG)gP^-Gjry2h_(N2V%{IHRYl;;;-G_P
zGT3X3YpTp+Ehg#RoG*Ix-s{sdrNd_5b~Uq={IMxn=ON$M8+lu|{e1Xu>Q=Mh8=Vec
zmDhije)!YVhw0_xu8<2y9Bw&(lAkkk&9dv3+ZFG9uPA@la<uj1(%-+bFO|H0%d~Yb
z+gFE6_g}9GIJ~X3WJ`45ksz%d-e<E?KR&SNKDkZ)n<>-RZM!!9h%f5+lp(Xyg=3Mi
zYgVgG@vQaf3py?)Ma^EE#Qi;mb=A!Rheb!CrcLtDpH-#c-jt9YdiZQ&%>k2a>+8?L
zpIN%`d2AFYl~u0Tb+1@&rpBoV_Xxu`@BVI{zM<oOuB*y{{razr54pIemQ?C}ce?ek
zMES)Y9qEk|S6Du`OFKHJBDMC?+n9olf9k*A-ygzwa&}B(d%5qubu$ERO<B9t-c^%h
z|Hmt{ZQpFqRhqlqePM--tVqAzsuj0V72@jlZtb7V9pk|fe*c579dD4(rb}kmjW>VU
z<Sg57Y<#-GH%I$sxA5f?@!d>z8Xfm)n(x)w&+<GzyFcsbGk#u)!&hA*rs+P}{jlh=
zU`e0Rjm_U|=PS3Z*b?*M=oWr;;bR-3ROVet@o0S7lIbkt(*E5%%luWVR_2ve_g4!`
zGF|)sJzse1=F@rWKGiBKOmjCgJUnUMgGt}xS4UpF_%Jno**CpCDXY00{u{h>(yPCv
z@k-LzNH=dy%RcQ7v%*>4_;@zSZC%W1sxW!uQjNU$FDrFdJWuTRRCwn+vonupNsqFc
z^PHC&Pb9Q9o(s2@-B)sdm5&C4)tSsA9y@h!ZSz`WAoZC;M6t&{b&kK3sNDPIAug46
zj0b)@=ucnhdEl(<#gf{lr28xfnvNaaH{r%P|1zt`><27cCR}I`-%_8hCi(aC<!fJS
zt4=+O{AXx6Tl2$<nm4DFvMcS*Pg~N^>t|te?`Ue;8V~=R>HE#wx31lG(OJQmO`Y?A
zN9*;~9CCe))*Hhd6t~RET)+5!QlI|bqYJopPiwfV{LSrQb+^VXZx)%Xcdx?SnxlfM
zZu_Lq|F2*fdi=$)-RV)%u9GFtoqN{SQTX!Y`d7?TQY+uvsg>`ab-Zwu@}WTW86tcw
zM;>N<Hu@YG7u0e{#j{;H_sQH;z7Nlw9)H`L5Rk2sop2%UzNvJs$I27l+anilQ0|%f
zAlWzP{_|b!C%x-`xwkQ0Hz?)UbxTLY*R%EAEZcKC`DGO++8rpZ`@P}Ol>KFIj8)hA
zL_K|d;O)U#mec%MQ}3-URqLE~msu%I_=*U()wh~dq4Ix!j(Yn|c7JT>tQGru({zS!
zY|3RXYCiBx`}NuHaG}wK9wFhgCIZokJ4zKkTx8!Q64dzF_Ir?F_OwH+&u1_ugxf!Q
zwO}^mjTvI+CgpTUw@zx_abauRc7<?*l&e2~uCb6m;U(bp?N@lD^h3XSD{nuo+WzZt
z-@nl3+b&)VTie%m@#V*Rj86mFP5J7sxcv3FD;!z1?_t+&mpq2t6;7rciW{37?0%H9
z*>3O<vvdABSEDGZ{K)ym8>-9~w^SY8ldyNGMzw#;ik8!5^=qW>)wr$JSufJHr8z=7
zS#*L>!_O<Rre6x2mRi{R`Mq5f(QE%%d8dDMwW+vo7<b&0uB!c7uQIYMxRgV7e6qcF
z|KC5(e%t*bt*thmevf{*zOy^ny1M<a!)7+!MY8fIZ_fMTR@BTeQ~iS5;i<Q8_I(Y0
zcBJM>@7b=-IlmUn{kL=ZhM(-bmOqy&I&iFh*l~90-FAT!b!+^Bl^Ip%Eb$2Pk98{L
z*6A$R6(e<G_3Y(~a?MjEXS*E}k$9Jz->$Ubk?4}yE2j(C20m=6jXwI;@<x(>(JAG%
zS9dd63NvM&+5T}od+W`Kmd{dFT)2PCwC%jRoz?NT_WRSb_w#g@NQivq-E?Om%iP<i
zzMb!h5I%G6`_~u2vkUJ;>^gYpmS@TgiCs3|42wSHJ$L5oc=uA2dC#l}@6<)%wyCDP
zIiJs2nrO01NHBQ_JNN$1e3W3zl<izM_if#_YvKD^@7$<Q7Bv-d`u(-8<%!UeJ=rFG
zJW1MDZC84TiEc8xzuV$K=Vjw*PbweZS@rHeYbEbDN9Nf}@)o#?IYkN`P_9ifk@gNr
z;w?)~)GrG0GYgl$wsZHEeY2z(r26H*Fz@Hq*n3B~vwr5?=Ne2;*@G4>eE0F{$G=O@
zcTRgQc>b;RKetfT`{FNbSM1sPpFN?Vq^ehUYKii~j@xE0`M+Ls+@F1Jc8eVUxyh`R
z|M!Qf+>X<j{Jq=#_X<`Q%SbgJ%h?(eaxBt1D!;#Z^|G#Gar4*3u~tt{ZWNs`uYOJL
zu|&%NY1_2!YX%GUt$BNB<#x5Oi)<bC-fs7vu(@ZiSR%1AJ)>^dl{rt;x<A@Te0|Hg
zLu+g0e7g?TE*q(;Bm23OB%UANzjChl>Q&zQ6AM;Wo!M^ia5dWl##gzIuiDl=?^?of
z*V=QjlAzHY!?mv~zpPDt*M02i?9js7-#iZQx8D7+{J#31sJ8`Q@44U7&sJLdU}yRV
z&l{@`*83YvF7yhV|99rxoLJWW#_d&mzZjiA(<^Mm^{|PtdEr9cZM&)u7=?-TnOCmc
z=u)`w@JXF@Ha%+pX6>>&6x)-zUshi#HD|?>XZysBetj;Rb4mSbPiPIB(Y=1V2VH%P
zq7zE~WIXh_z_WfYYkBymfDPYIZfrPYF6CU68Qyo$$=d8!UZJ^!U9+6y=l6-xAKvsg
zHW$s7^)g+=vZ=U)?c-~&WAoQr`TH0BF)@z5WBT*Ut_jC4yF3#&F5$oR<I^PT^V_@X
z{!YJb{>}Dy@a(`v=a06Wj6J#UEwkOWXse4iC;u_1-M!>8^NU|sc_!?w-LUq9^i?z7
zGPyv3$lM7&{o+k;YG<pevD5}l{rl<c%X~NPTg$wZdbWt=m|Zp4<8{_P&;7Mp*Tk2m
zM~oZKR@Ho#sJ=DLZLe_sssFPDpDG-fexu@UnBt`?@2;j8c`csycXqdKWyiYWuZ{(A
zseT*#mVZs?Q#*d?#=|$aBRXz|h}VbZUtxWDX64oT^9$!0?1?hz*q-rc*@^ack*%z|
zHtyN6fS;kTXRT)H!8;ZT%gTO>D5zeaZIg2ER^*B91NIBn?!E7!`}Q{X9n+;^YfjfR
zPTytmaR0p331^}zgD3nsu|)Mn{=c>QJ$ss0&5}L++=6?7U0`{whW3pGI@7Haxoy{$
zeCQ4nU+sC6EjT>FplZwixC3XH#QJ5N8UOo)F5R3Nv10wprGfV+d7OGNC7^!C`R3Hm
zlX7CdE)4HsJhO89PMyCqKAiZrM>^$YuF|iY3Y)&Zo-q4Hi_48#t~$xXnh9EQzh3Fz
zy!l#M>y(3O4zI+^HFamxYIr}N<^TWR%;7@q1^#c$uk~0~2D+TRtg>5lzjy@S)(hAU
zpEWW!Fv$P6mG{c7>~-hAzB(9_S~`c7`DKi$F!O<1ji2AkY%1K`aOJV5&4co-$IqV@
zdw*Q()Ze<f3)#4~xkfXdQTTi?#5wY3l-aUL_hP?Hd(8Gb{CV$6(T5kk9Y1kp1{Lyz
zieI@<r`@nt^Hs>P?mDKcd=;L_wVc1!thyz0#jf*ux8`ok8CD-fR*IJ0P5b5UzeIXk
zZrwt2lVs(r&(-Hllm4ZCGLXABS3_o!ztHT@I(n1&-kw(XVYm=8d6B5l!uR{Xys1C=
zOw9X1Sjcz&Ij#S-lI}jUSjryIH2KlA{g*H8Fc%BasyU{&?^bKwOUa$*j8$Vg%%qHV
z8c%-dtRCwpab-&9iyZY6&RwyL$J_+#mS35h-Ke@-XRhZY1*z_qS<{kh^u)Iq)LQ+@
zVLqZD-thO%Lf2v+sZ&dKNwkF2O#UL1s492=9qX2iIU3DVAH?o9I&SnYe$G;r>}S@0
zk}78=8ckoBxGgOvQp-I0)0zV1S!-&R?3Z<Tc+NfUHnWw0!x7OxmM&K_qShYUS@-wA
z9U18o59w*q<@H7}S^19*ZwhjzuTnA5FUaGzR{Zdef3Nj!8-ee?Zf@zyVD+kuP~Wru
zidMPzOn>XMtV`>>h0XI8d{W4F-?2$>^?~Np6W0SQmcP1`S3LQR&*e)l>NEK^y>#Sm
zPMx|y{E+TGkx3gCEqZrT|MaGfS3ZQ<<g_zssC>E<W9y&xVDECFNBo=L{?B?G9JFfr
zSEDp}(OpYl{+zUD9!mh*<%7?Ix6Ih{+|1zjQ;!Q7>3fnxr+t-Nb^eUu_ctrPxd=Wt
z=S{Et`K@jFv-S7>$+ESu&ojNi{q=E8#5!;P?);jkff74cUp{j+jyL9k7O&ExowvU7
z#;p-zRGBnOS+_iW%kl91*DR$?+Iw=!o-Ju=;fjo&cm7#p`sAgoJBqr!^o}>V9^m`k
z{rz*Vj?ENRYsslQ8n*k-ZWh1yT6C#s&2t_uu?ur;YuJxRZa1huZ^u2${r$b(`VFC$
z-x<5ASms;R^31-rQc!_E>&V)Uldba{Q+8B^e^bu2@cHw!>Du<k`J9~p!}y%bu6RXk
z5c<N)F7#34*bdXsjT@q3G{ZN#=WISMF?V`u#;K$QUY0&4RTUo394gBcm#at0O}obM
z>TK-0A5$zXt#VeyAAWK9&&r2KJ9m7ul}q|`?(QY|ovd?A*<W~ze`947&;0A)|H-PV
zi@)0>;}ApBlB6&53p8JxyIi5WIj|{sr~Ff&jYqBL);k}(Um$ApEQ_IhhsXZ}e}}e!
zb-#~aPbw}HU`!7Vx#<7-@7w><2WuBFGwYnW*gqrF;C2|(fwT*A|HxdibUL`SQMB>>
z={;MR1g{?GxD+v=u6x6-=;MaBGsBgaor~--UH4{++Iy90e0l7Zb{Az6f`2+4{?EF8
zhNKJEjFl6VciL_BWLhlme?|6)T-#EejSjbCbtE>_S+QTf)ovlRILdE@LVa=kkJ2-H
zT_he^I%H`oeF@3x%-VJ*W>d(ryU(@Ep1rc>6i>fnsx0=kS13v7T9i}Y&V#+opG<4^
zM;M;iuJravj%~t@d2YQT%@exp%s)&OzUY-W|GCwXos~)-;>vl$Dl;9f*}W5M*?(#C
z^}n^;ms0;fcYXEfi26Q_z#V6f{kvl`Va`jYFYnSXrpfHIcMf?gnvq%D&~oAC*0rpx
zc>-OFx?W}q97xWn-ZCk@e9vZ`)04!KQl78g*`~3Q$?BN*y|-C21nim52%ZviyDekq
zGx_>z_O<gTvl*?_I-u_8;J1hI)QM>aU+NlfxA-M?R^g1$Uk;&gFP+fBeOi0XOZU}J
z@q6F?cw314(nYIzSbXc7{#yOA-P-cL^<9>g==Xn;oGTO@)DEdmliVV2)^aIS^5o2D
z&a*a$Zkp`;Tz!yVX!~QAe{J0I8@L`7Fv#CN#JSLa%D*=Iu$;g1-}*<zO>%l?W|$>;
zV5V~^^Q;Ij`w%gu$2(-oO2VJ_m*w7<&=6VGzI*<kvr&7S+uMpa1cqJRF~wwW-<?|p
zFWMKkeltJGe8}^k`Li{1yDyh6Iym#HEVtnAT>TXbUle3Bf8Ml^<)Hn$$0wFDOnJ8B
zbFk14vrg5Tqr0+&u8QnQ{lCIh^U0(BCm;PU$h_hEd3)}%r!m`{nPUw18y7RH2YwF`
zSu$Nlce8EY-y@~Lp7jxqtFk_8E>GE+w*Lsb{>^r+hDc3MpIq6Z^PUZ>CLQg#u5r}q
z;OC!85*}NN#M$1Rahr1UmXwmv()TP2h59D&pX*mto$+{ksNLDsKb|j{vP{Ft;9u)A
z)wmg3yGpuk!Y5zzzg1V2$@}Q^<z*(tUs<|Ow`3|@dZ9S^=_FRy?O)leEAx)_R4TnN
zc-C4Y_%b}L@WbV`sT0oLxsn%m%i?$6m5mD|q@-kvxFinCyDv2CS*ey}7~B3w{n}Dt
ziJHZ)EG0#^+DKj(aCN*Q8RI4OBl7R2ZJF=$dD=E8Efb&jI(Yi7h~(U$6;@XkoN_+n
zf5*sf5yzbNn3)wbHwULL*#AG~3ipDjh3hQz>pAvVnbvl*<ZVm*SF5+C&r)=*ZE*3F
zj>PS?nre4ilUJTLp1`IWXr{Yi<#ZeU;>kKvJ&hL27wM^<6JRZ2h)H}FK3BxdT=b>r
z-kZu+QP+Nc;J(v2@txjN-%gEP{y&aaEwcC{xX`}zpoq%3xTTSNDl6<?eOypqyw|*q
z@9(+eVyYS4ji(MdeNbtN+uLk?yHhqyL*{e%veyaWUo-yBUgTs|*XsKIu71Bv!=&Q7
zSN`4Y)K$5@f%n(lGfJ!WeMnF!=iO0Ok(U(u<Z9holc)VxetLJB7`pSyhdl6omMwfo
z<<iMH|M%!i9gc50aX9?*(HEUJ>%@ICr+%&P3Ar!uX1h{ZxE52c{J(!oBWm)r8;+hj
zU}?VLnubs6dz<H+3l4f*SYNgF4ZHHCZT`x7E-Q7PK0k7<w%lY{$%0q2GB!no%=&*X
zI852-*FHAZ)JpeTpVCqiE;6>iJ{NKN$+DUtoiKqP-{XCxZtJ94y1Tf2ZJ2rf?SZP}
zj}p&Jj9T_$>f>)F+MK-VA?&(Lr>ok3Gc~HZs_!Wd%dIM8a``jo*zHfpr_|37^@>h&
zdUdAg@vOtLOAkk`eN(YX(0{hX)CqfvZazraCmy@HS0quFJ1pWtz_J4>miwaP+qF1D
zPU#BuTqx9=&t(|YGpFlE{@V$nIr%5`UKaUv?=>-X7f;DcXma`X#JBIf&YFW+4YMvB
zNLzmKJJ-~09L`IW;%qy+mwer_Stnr?OX2rd(-{AWUwXsm60^C_X_m~fiMMA~tz>5U
zoGkWBN_N&wQO)X&OP_h%)82MBF=$bU&hdHYwuwtFR%QF4wTR7OW2o1$()->ixhBk#
zSzB{wTy>nVD$CzPwpHT0eH?f8|8{3~#ax+G`vu$MFYwwF_O0>#$9t^&mii(~|3xu8
z=iiuGPbpxPKDRNTRy!^-Hg|n&ZM2B#->1iwOr@E&C*9y&<^I;HV_tOkFAhZ!qX&7B
zujc-iUEA=J)o9a8-)Sq(FSx|3Ea}S<$(5(L{@nLfh4-F5T5SI;kmc(14C~&*{Lg+i
zBqnv*xyGLFwU&6onc&wq`TmK(oLQ%J-(S_+^~XxuwvcC&sc*}lj17OBKYZ3bDE}n(
zf{oH__Jr>nmDAD>?%ok&wSwUi)0@N9t}c&-8E1IP7@SRa3fjCv%QLI!xLrliN>%P;
z^S+Y64V`Is=BPw0>8*SzeQW-U%W3PqZXDuVu#>|&Hi)Ayq)Fh9-__s}BU{yF%&!GE
z9NAhuX`z1KxdrM!!k5pwm}|~tk^Wwm-81>><i+>X_47`%i2OTZ<=pW6p!1XF3D<hp
z=~%qD{P)tSZz(f8wV5X6ws<$sUc<HJhJJg)v+HhUcRw%B41DMCE`hh#KkS6S?&g2X
ztJw257uOzE-q==^^C7jXc&l*ndWU$|d9&?2r|9<cy%9<;dn~(%w=XVrh0bo<w<@!&
z*f)PtnySq*+q%+AyJwZ~ncueqCf7=|&-gH_F|Xy&q!TMYJ-QIj?$P^dy0YSykMZgy
zg6l4RGpH0OaQf_&v*46*S&50s#5Fr(Yz;yst%_%Oo`106$kI)RHGKXrRDWlw?Y-||
zeVTE|e%%JmZys&3JQi=(wtU(qz>?o$`BwIt;s^O9-b>alUVbZ3iEYCYo2SmA3|#*o
z8guJ%OSG^4dX)QfO;uOGiS>URT>Vv3+$Ia2+}@U^eCX;DzaNY5O#ZR&sF2{I_UMdX
zu}tsQpJ(PcxIgC3gu8F%bIpIud*|!fscB8WCSTlikKu%><o?r3^;~Az2Cn<Y_lkRA
zbIIy}{ztw-KSb(9U!7lI(Vr21+dKAIe)|f$^-)i<Tym<;AG@A!H1p>EGYyYJgjd8g
z9uRjbT(v#HNIFD*nbX1k%_mfhHuIm7y8r)EenIM%^Vwzr|0Z9pV72c#pY&T@!8j~n
zPnO_Sv$Vy`M||E?GZjv=6qwLvB0c&4#GTG8YnvwjXni-a=dndxO^won;FM><FFyag
zsLbv?#nf`5(eXz!eotFGO-J><%;rP#c2Z_yYvd=VSZ3c+d^3@+uk*tnXNx(_JdD+!
z7iT6tEj#OSQvC34SDULd?Nt^(xN>T@@rx%*-+S(2=BaOy>=L>@wZGDJpXsFyicM}0
z*EF#oQQUD|sK}!3vP1D+7XyyoqcYLH2^w6*E29{uIlTyC2~fS+d-q`edl?>C?g!Cd
zZF%2U9qc%F<9^41B^9|BCRF`;m)$dsdDZOMnvW)&cgfRxcC#`nZl8Ncew#dpX0Ag=
zN0HtU>B7rvS?7A@ab@}EFq%%~-|`}OX_Dzr3;vWdoK;6|zCObHgDvmItLl@_>n`h5
zRi>~OsNZ~JU@G_MPM7OpX~Aacz#F%h@qRhCV0FOzjgPt7Tg0Y+KM<R^MYi)lkN5B5
z;|~(frao)$dw%~=TzpK$yA3mUH`mS4-+Lx9R{o=@MB>cT3f@bd?Y)n9q};N$4V%IC
z|L${(%IMtmz4<W<H-Gp&;mLt%xpu)BH#?t(N<Kd(B=Iz4$1h*TV&$wA^67~ulgs%#
zBjk1&O3c(dU0ZKvtFmC*&5OSikDNXAaNobM2z{m#vvW2@={HvWXv#Zb7R|^cccg>w
zzvVMoIscZwmPz@-%dOq3pYU!xX42E4EXBO&>D#|mqJj%}43<fx_iUb_QuOMM%t=AJ
zbvr^QS~^}}n*6OTSnOGY;*-akFIIbnUA#ZdQrD!<@nvcC&AT_mbcBU`7qz|av{c)Z
zA^F6a<ywa8gq9f(XS?wiY<XGca3d&MtN%B<diIVZlX5sVx4*NV{(8yMOY^&}4$gQ|
zcvUyIC~jx@U4d(_nYX+4IIJ%!z9?^(VBFVme)X+uXY*Dqn5m}9?;Gt@6~Dmg`PHO1
zFKlmh?e1`|TXQ~Xzisov$@?cbFR@`?A^Tw2&%C7}a}$hb|MX9li1@)F_Moaxb()B5
z+dCC$*_5_VdWX2nf4;tP<?rj5?yg1d>W}nmuk7Fdq+)UC(rE(Mm&&};+M;6Nw0ZH1
z48Q3QjyYVvA!Ny_oPFVBVNug*)(<Xz%T{znNj_HoG2xNsga>CPxSelgFG|Tzop9o&
zZH^bW%$IGGB@$1?B$V)T85{e*JQgi~j_In2_4#b(>m1kTarHCD>3yv@bkbmr>Vuh`
z|19Fy&#ix@^z6pXeFjPXGIp*l8Ai|QWxC`9(z^0@-<xZ<CroSlYok@Q=Ozc9X?W9i
zXU4Bajl_BlZ>ble{JZ>_r#5u5-&>s9*10I)lXc_U8sP;gytSIKzJd0Ok3ajdrs+cM
zv+6Q23*n`9|H8gq^{<IiTDHAhe16r}Z6#{C0;l&Cr1LMgG7h!wx@MeyEoYKb{|#jW
z!ABD(f3VVdbMH^c(aihr);3I>dhbGsgwKz6uLX3E)m?KcxbW2}a;uTz_S#phJB=0w
zt?hmHlDR5DruoL~tp}f0v&cMZtuuU6x%!lZp01wi-`MAy4PF)4h50Xf@czC*k3)Kc
z(uZ&J-dHaT*ScC=@>E6S+{ODJ-=y#0dywRPFJWfOt&0y2RV6Omp7`!j*Z!QIwE3$&
zzWi-m8d0v9^k}8M*Ks}3#q(FED0~pVZ^W3Va?T?sxPHRL0|y@msHVj%efLggTI>$S
z0F~Ii=PpEF=6~qSK3R(40f*Yn-(E_$)=hWbl9wkw;c26JdUK&AS7@$J;@%pMisO%N
z|9Jm4<L+ONGTvt?8mA(aH?O^y`NC-4$yrs}Vb>S!TAus<w(hIQ$SoF+7fm|vIOVMB
zgIkT!yK2t2JiBx|`L5FTlP7n+SlM&5ck=#I%y~k5kM+d2<vwpeaxYZX$>Q9%<uA<U
zM4Su$qncK*$n?8^*R~Re)`xTd9$D<!viI$&8B+ItEkF5ZrNqiROzxNR_ax3^&i_)*
z++MlDanHSjoGc&C?_4Cdo5S_I=Dw8;X=QzH*G(vT@-OnJ*C($>jwdq953lx%$UJKN
z{et4MI|@<1GH%Se{_n21n;<L0%b#t+PI`LPx2(n1e#)5<K7Z2kNU@d2_W5x4%zxf!
z`mMd3@%@&`|6_t5Ui&4NTd{7&tiz#f=jzym=Xt;QYQDqV|2eCbY{tLx!iBf0{k3}(
zA751UTm0xVU%z93-AV2@Hk<y>6Xjd=X8xpVyPLuOTdzH4+Aiv3z2gdJ&E^iTug!O-
z6#Zk{nz~YNYR|IoIWK$`7U&w^I4|6|Iw$Yr?bQnI%rkFqdDJR2aoMpQ%szVDxh>O_
zw|TO#RNwx*@^Rdbd$0Y}LxWHAoWBtC{u$@i76;$z+YgU+Mw(~rQdBNx-?yY+&hhg9
zC&%A1>iU#EeQSF9u|u8fuIBV5eqqP7OJ^Owb;dDZ*4z~itpVomuNr<8%bXPZ>+bn!
z2Tr`csQl-v)Yad4%vLtlR(i@k>D+%R4zH69kG8szo!<Uu$Es(S<)`!r^BeB;bB+?&
zx2bMd)1Jb0ofB5>54yMazr&tujOU{Ma>!?HwtKXwEok++Eb+Ob+FK8<4t14#B{SdD
z>&d6RtXayl?<#Uv@4j4+ba#JcQbtQgc3*b!k=n~Wi;LdWX{<b^^EhVdy>$m1R3<e|
zR&Ve9?0$O|Tkev-W`06DB&19o6fR6S$Z4A2Z5tC-9(reO<t7d7hmr4=nS`b47926<
zuDZD0%Y8zI!1*Y_P3`CSZwNHB3Fx#1uKevEcu@6paD>Xz%7oZm2U?heqAzSxu9>Rd
zoU(DfjIY4+s7^8e>b)feMmO0`tla6~{o+V$=F)a;W=3(bqLTD9nOW+*S$ES@j~(B-
zK2h(1{IXk2TC?xp-G20Ly7Sh?BI(simla>KaD_ClzLNdy(B|x!PwKZ+ZC3g!_OjRh
zxb`X!f1cAiS+7qOT5j-M&2{s--dTQr#}!d)--a)FvV6sr<w506-FXcaYG>V!`}%0@
ziAygQy>Afw`Ad|;)mR^v<CjbSv6!6F`s3)=c<unZr}9-phI}sdIa9eh*L~n#JKaEt
z%dsGpfvIJa`j(UH4|A_{VcumEBXRZYoxOXazg-G=9jBk4b>D_Hao-j2;Q&`Y`>Rg8
z*1PQJC67+)DP@x<MX=2~Jc&hf=99Br;?qhh-M@5jrg-t4Y-Vs==WuCh?@jUh0@IIl
z&HsPpPXn`ohr8iV*;@<?nYJB}*!R3c?y-&QwtHJE`qutCG~xf%Z!S*KHPg;TbP6y`
zaZuHl+&_c0s%hm;=Y%=@SGt_zEssrIy0tg9{j*ue?#%s((k7qJa5_DFd18Z*Uqjgx
zyI03^exDCq%n|uZ;`c=N**On1mT&Pn7GzelF!k|HahbMS*R3p@ws_|W_N)Fs+5as1
zhh^-}M(Kk$beiI$t;*M=vu7MxZ=z%%b$aV%_WFBk=X}aI9ItJZysU5a^TeJ#e4i8!
zmamxER`Zu>r}W;rE>qe#ex7MCd^PEom{`~CH;;ru93$?@F3?Jmek3SkdwS331I7Kp
zq0Ak}Y=0hXS)TLSbX9@&g5B2pO_}+OdQ4)4)(S?SUh!w8PiUI);+Z1bwDdJ2(q>#+
zA!~P+A>8Ls{Qey!3~l@Sqr$xlx&u^>n{9fjdM#$RYoV>2nb`VEUZ*lUl&Zczv?<+u
zwz_be&XaT54;L;fp7l!Rg~n33=LTn9R8MTWIHUZ8@ucvHPp_U&_2~PzV0rz8hWzTQ
zX~))Ge<10(Bp@KF<;!PJh59>xuQu;KK7;*V^~LEwPk!3!9^|ma*Rkh=&Sm}S)ecMt
zblGg%%e@LVnr7ZGymEWq@la_Wz6PF$`-K~}Wt<Q)UwuF@rn%Z+Zn?)DR_!*`_iA&d
zUP~^GsrvpUwAn}EVZ`x+3L<OESy_^1Br9LodtEZZEq<ec!^%?Ek26btU5LH4>2PiK
z{2%-I4VE9=&hxD(Gfua28Rv6R<<ML1oeM(lr!wzO&b#ZLuzJg)7H-zYn}?ZSD*wOi
zkk^#@{nF!a!rDvcJ-WAexy(OJP30TE_x!v&Lu$(*#;N_1zXi5U64VXKD}7R>^<1iS
z&cy(OTX!c$NuB%u|A40cf#86o_w`$fU#>Hfz4ZI}|GCe;+r995Z7KWhz_&C}uj-3h
z8HZ~3Sw^@2UN`OCx1W!NG8)&0Bs65bvF|ox*E_dpPwOd%#aEOzWh|ZXtfS!Gl$_Xn
z|5b5ORf<QSOzwJKci`OYG{3-kll}#%pV+qHVVS}M-KIuWui6bd{P*;xclMmURb5t5
z`JYd3-jrQ&GJR&R1UW5lRXuIsJ<<6mByG99(K8<Tq;-xLI=yW3-*x?XEo%K}^2Fs+
z7D*r3$nUjMob}DIxHXRP?yJ5`5$tR<WRNXbqQGN+WV+<p`8yw+iEN)6Br&^P#QL|3
zjl|Mlel7iqjIVlS)Gvr^m76Ld{xM8otL2<|;=v^*b@i^bpX&_dY+uQLoODv}+wF}R
zeA3$wPhyKz<&M7{a$l`@{?d|LD}8_NNxlBrP}Z1P=GE7<KOYvFo2O@TC?=a<*_*Pe
zV|L$yD+Th>GLox>Cgdpf%E)fGsC$iJ^{iVxngu7{EPle>`8Y*BsOszcKpV6FPcN)0
zem!+n*@PR576{td?EB1bwdxT|q<Mwp)&G~1diNc%zRK4qT(5C%P1STByPZGPR9|in
zbDe(nZ{>7;o%ua`=l#z~Sm*u0@5z;7zxk`8UN1H@V|I`~&YO7NKUQB=GdO(7TkE20
z4^mV5{+rLvzT4_{<-kKFmL&>lQ+SSEcVBj=<m+?QH>sE7ass*U`v|U(`kd_A?~(N-
zVUqXs-C`@+Px9>#n}4)_<vm6n3zNppN2UBlJfnNXdbkDmdrnCy+}XNT_T)M9kAeGn
zMQ?k#iQj)?RcZfm&&Pvt&C#oSe}`DftJXf#6G%2Oub<yLjq#qzSxvp;;;U+}ZuwdK
zC-NxQj){K*K8k6$PjFVtp8M}dmzboBf{EU(XCddWiMu=vYOKHM^ZeQiPmz~Pmc*t_
zdVNDCv~S16E0^LoiEV!UE$CnF>8hQQOIA(P{PJLTw5(_HWzFA(p2e}O^_p$RuRnMD
zuISAiRJP*ZnHx9H-R&w_EWCBfKSPJrUj7_0*SuUp*=zV8-&oAt|0neHBB#_>uNl^y
zRm<C>lc%m?F{$Os%bdE3g;9x#hvsCc+uwU4wOhj``WM&sQ(|$O&xq~Tl-=Ys;c<8+
z&zt|ne{3a>MOy#AU0oLZwfEjOCXYkfIa^uR?|SJt{rzp$Y3F~xx&ALS`+>gAs#Aw%
ztlLwyVc(j+!Q2kB`DK0BZk_Pnw!O4OAk!iEu*%WxH)b0rUVi2mDF5$>$E;45z27am
zn3_Uf7p!J&`sK2Tzx&dvDchE;*?9f&{`c7)LKf?*PxV|6KJa#v{j|di?z#9M_r1n3
zDcMo%oa>8uZLj}ob2m@UEWHpMDs=W7+o?9Ltq-rvPb@l>u;5GDYKP}fx7=dSlj2*o
z;f9XQ%@t}Jh0hl5<@|B+)UBI+yy3N4r8^#%uQ(7Uy{Ra|dw$_vKaPp-FNv|m&HJUW
z_WXiRmaJ#;S$vn2`p0z0hcX7o6!uN!O8U(1T~w%jhqb5m?(9gZH$iKTM+d0oZ_e_c
zA9uwf`QwjOZOi`rD>89QEnl}UR8pzY-eJ4fF>OJ=n~Q|@I!FBatL|0$U-q`<?`bde
zqFS#-&0OjbRISB$t?d7<&<|55gy%&TJ(+weGc3{F;Mb-5Q7db;?H1}Atq!od5PRIt
z@%-(pU$Wl4Fw97<x*dP;$t0h;;OYD00<SrzU!B)jeg2W;qB*7}Y}=I`Km3?ttgrB6
z+MkJ63dI-kWnN``{zEoh^Vy0mOLLpUKCf;3aDBy{+$(Xe_CJ}wlxqF&QqRgxc)4MY
z!z<zag<r$7H@EFL7QIe4%j|)oVr@Q0(<e{XBb)*ecFX>RtXz8G$A>qr!F-PoJ-F1d
zN8WR7izag^M}V1!$_f290j}#?r(FowJuzA8f|Mc4&OKhw@^sj&&)mti{oA*0A)6`N
ztz98S4=vx^XW72VE^Pno1?#iJe57ynXC2BeP7M-$tsE6Q=YjrinMF&JA1~Szu(+v}
zUCpz9QOJcgaSq{u7evl=<u`p&TBld6veW2M<cIj*X}WKULy|Ww{WUx4TH2OS&EJK(
z+dnzEEqlUU^-uabd#ltkvDN&3-gg(oUlulh^FX+&;9$kgJ+G=}B_7@y^|^X$e{AEr
zCcT3zSD)B4tEf=%g6$rMnVd4;EmxI2pZ{le({csroAQAg(WVA!T1(nX@7)!iUGRVV
zxtt!W<<Hl)GXDNlD!cFjbGY7d|9h6@CKj>Gy^@g!UxbzHH9u`U&*jGpvr8Ha+wBz1
zlHUAs@?F+i=$6wiQz=+{|NBgB1-1z1wE{&GQdu-5T90!-6LHJh=kb1OdYn{fbo|$I
zXTClUjXU(4=VMqz_pywd^8O5~H+82(#X4JDIcX`W_1Ut$_3qp=&xA83y!YC5mHA;3
zzqV%HlnYx@X2mjPC4O{Itn_;Kz*n1fVaW&1hTjcYje95N><v3`Wd`4U)oE>EtE{K*
z-J?>fUtRFGwY7Tn(-|!v9bYlr-YEQV+2!6zC#UREepJ0a_Y!AjSESRG9m-<b^L^uL
zd6guxV*mX55g_F*^uhJ6zxIoM<MiZpz8gPWl~Q=@Adzo!l*4Y4p?}!p+sA~Cod3gR
z<n(q{P}ld^DZk3MBpub3pIo~l>fgK1|9q|#7TeFdaHN#am3vRwI`69i9j7H!uTR$3
zc*i<np%rgQ$WhUIH9Ak(4~aZk{UtL~*nJ@f`^qj0-Zn0=L$eOfEoF#uw|1Mc*YV)_
zzqzjLeBD0Hh94b1CdXWzYdGcJ-V?^LKiVFdSR7l)ZE)h$C9Z|3Ma%xU-!y!_Gaxpq
zzy0;3h@3RLDYMRBoN#FIJa?Xo$IBK@xO#_m?()X37Yv?r{qU*TbCdbir>FDPoX?z`
z$NHbg?|^dGtaC*dyuUb4O4t2j@3Z9lku<iS6R&ZL6+f6}+Sa<xr1!|($F~yWqs%m}
zN~k{wZkV&8?a00Q(^ZRulUfZ6H(qa&dug@DLvH#EAswYh+}<Mk&riNwtfvuv|5%h|
zoCBxU(j(H%(UzaqS{LwGPd}Ufe^=1dOKhueE?INg@$MVu%?oDE<qp1EG3&Tpa<4<a
z|HfllmkN?YC#zIUJUAz}>rQLagOBkVG4Iy?*kb-6B`1vWT}Gq0_T`j!?|U4J|Mves
zaw&Az_e`DdntE!6&JGjn_uur~^vyng`qRy8=KOznXYXRY(<`<*mhN70M!>8u;z4<-
zp>n_;+fSA?XEw;HiJ$bI^n&M>ySQoZqtDiy0jJw@5~hB?U6}Qf{pj&6nHy&Omnij8
z_DI+q$m|gyd$3A$nt>E=QpP5?J;sIx?s6|5E-&pVy!JfAeVcDUQI7S!__aw>ZA7Q<
zZC`Lv;=*~CvVEsT76dQ5J6+*;cwas5-H6z8(s9*!TdW_pxAA;x>Q2jlbC^S8){?)O
zItO<abLGT8p1Mow{Ed44Zx8FYtx(_oY4gwOrK`F)&#XT3WBrab8u}l;mWQk>@={m7
zVZpU-+WFgOyNY^u#c$2$pX>PNd;5*BtmhLyO>edB-*w9MtV_a&qfX)3f{R@D%+o(z
zd+|i@il2E`?7kha(s-}d!NfRm`!uzQit8V^t12wG!<cHA!CR;^tGbXiC89q&$j&C?
z-i>FbLUaG|6tLM!pKfG-efHzR*RjVoDw&l%xVh$c=e(nbPE1*oU7V!Uq+w8V&Gd)%
zj@N#LD{bEL`dtqB<D-73q2hhA#SH5?NA`x=+Lb;^SD#q&d8w_TWY-bvR;R)@^YVP(
z@CR<`Qfgkd`HaJCr;DxAszv7>Z06GYa%-!}*<RI8%@@VJ%Wh|$-79>jE#6Z-@{LAJ
z>(m>o-v66$QLS`xqf$(xY2G`T9ULk3-qB1scNXulpULGKE26Daet5&Z@c#coa?hUr
zExV(h^S?(t;@*-P*F$1gH6C?}+dL0jqVjb|rqS|d_Vq0nPR>}$CiB;^EXq1`PPnD^
z^m9Vu%U5$wNLcmB#hCfd-N~Jq1t)f|IySX9e4ek9z_iORZhetGl+v%`VXCgRr|q=3
zqIaiu&R1ndxtxUDRpL^OJ%wfKclj>c=M!x9ca!gP%X6#m`taoNw#`o}+1l)o|EkuM
z;q5eTsmpoibu%qiU$gq~S8j9hR*#c+y%$X9+q=>&GV}8CY7?IclTI&Qo_|(<V}e<r
zK~u=413qzGv#kI6-f2?p-zl`=4gZCjHGfQ|_&-nT4ZY{T=7MwMy1#;{rLz{UaL?=f
z`;oExaO|6uxd9CaSIRHbewTg6l3$TYVPC@6cP;g|O5QKp{gFTRrAp7!HFs7hA6?)1
zdG67x%LAU*w@Zm}8&vNI4PLzD!n=jdbESVJ=m-D&^X0_hNk5<Fxotl2$GFzf^3~?M
z=gfJ8IP0$WyoqRTJ1z8c*4kqiKLjxeH{6bE$-e3)X4^Np=iw&hC&rc5lU_JY*<W8;
zthMFx&D&82iw-4y|7~&YPQSy+!rRJ$lFxoKI2%oRoMCG4lF#Wb+x*Y>=fzbyMI74s
z_?J+_^sT-<F9mczys|svI+^!!ruCYSpJlICrJRoFiutgcv)L#2+>$NMKTl+>pIbY>
zzb4akTdeQqjh1W6-ukP{%6Qo+t-d~U;kxB^GhZ)EcFnHkUc9HNSU#-Z{RDge2g4?w
zqY6^0A+@sv3(ieuvOIq@M<Gk*S$C)Cc^5ZZmw&Qf;;)Oze{b~H;D{<~&yDS?^L?td
zJA_H_TV3Lm?K-Q^8k8^nYxwrXbQya+n=^ke$9C>j-#pPMSE?a%MTOV;XWAD69otit
zCzLfwdquN+pP{n(<L_->{Vw{k|5xvptDDc*sT-x(w{+RMPscfACwOOX)={qTlHY9E
z^0d*TZ~LrZUF`zSS%xm(mD3iU_C6DK^L9Ylq?#vd-+E3k63yPWPHuzil)n!bY~%`9
zrX+FBedW)2hi>Ni&e&aX^-k00&k>R;zpfQ`M_;a(Y#ra2etd7kf$B$ouJ3MEWo?;y
zLHcv)fmXTMIT@mR=dyk(xl_$Cv*hoTpF$xgUy85tt0`4Zdek6vN}(;OG5-67_+k;J
zHP5!Dt=RH^rtO#OTOQ7@Opl$YFt_ULXMZJ^X|mnted^z)bf2y~6MJWc-^7?!*;j{l
zn)RPDn6_+z;Ql_=jVA9D7aFeqSl)7pRbIF^szS=0?@bW4#c?L7CI$|5uL|G&&{cAN
zayW%cQNY1IJU85>?74-P_8fi-QCH6Xw^2=3H55V)h2D<L?5_I4dpT&mCiB|%Lt0!l
zaVn)>x~^tETXHOL;f`D1dVKxzzFfXP)w%Xqu-8+T|3#J#Q3;QWSwA>zXI~ZX=Oz|5
zUygy5XCbqy!XJeknV6!5-8L?rq4RHu_#c!kov_ZtxcdT+&SRP4jtvJRE(>~`lX~PH
z;Ntg;-?K;S@r$jlu`7h*XM9b&nXRPu-+lGT$tRXpEB@Hj-P~{{P2o_syIY`w%{PZx
zQBfOmk6A18cGc9pvrL_4c|C$jLsBK|7GtmW(U=8!_Nq@Nve(GzT`ZcQ9-s8)`(Ba2
zZ5vi)a5D?uXg*jLP-w7y{fRe|OEq?;@jr?>*<iaO$FzLC=efq2FTPep|4u*7%28Er
z=X2!an<t99m^qIYE#H#io3wQKLG}GAyVf!>TPgh55w~1D(R$tetq#@gY#Y7rPh2^5
z`#mdH<!6gLCwG`>O<Q%i`2MfIrMuVt+*Y1py>sqt*~rzq>@<(cO|i1I$`QOf^?jxJ
znXN$@zYXsmpPQAny7FgT+0@Ig4>49YH2<~V_(p{{SKyb?^6OD)X&dzTit=r)tu1vl
zUsv?}(zf6K*E4Hr?>Ak3|0}0lyKPe0xsJmV=RR62^TO$#_>^lO^L{XHIuv3ZTlnXO
zRMv*19cG;}>N3lwUh9%8YMothGEHJ>irneKwkb-nKYsQcJ(Fs?A?4;78@H+Jl`fn*
zmG`^Y#(r(0!LpsjZu45QGfWT9=R4WAr9EQXgW~zSJvJsEI461T+Rq((l6byteUmNe
zV4`YxPV`5l>4lCfyLyG6PfXeTdCnxUlKa8(x1QTxiunCyZ`;oZ!KEwN*XQYN(K{uO
zRk2DbgXQu<Vb-awXXhxlPqaD}c69wW$D7$#a(I%tZ;CcucC?Is)?{<W`cCelSe3pN
zFCz{)9!ObwctM9*tz4?m-#c$_2lH~~F5$Kooc{AmQ(D#;hSJ1LRzdTt`BHml9{>5Z
z*I<5_&$<1!0-B4R*T4F`wzc@b>+;%~QZK=h%!QM~XKs%9bN$?(#AA(@pL~626gW3@
zm-`>HLQbUxE1hh)e52RRyVrCvSZlJQoxz({x!rN)ZD*St7`@-L^qy)ez5UeZp0U+z
z&6^wU6x=_jdBQ4kL-|pgHAPRG-U=EuU0xg;Y+09*Y`5*O+tRXqhk}w1JKtg})86*G
z?(DIvj*N@WuPcg9u6c4HVL7kx-tTrR7MIion7*0tUj0p8s;+q?qsE`_DHDqRN?uR#
zGr3SGGTTmRPf(HO<)r($)k{CG)4RT0_WC>PW$#u@w0(SPy|8-5RTVqC*0Sk;Rth$W
zPF?iKV9%c7L$kOyE^{q7dEmv$4u?5)Y!55g#I~+sU9Rl#N%v~diR^GeEw1(I8RhKr
z4s&1Qd%0=h59`7gjnlUu_L|bUPrq`?@fn=H-xU7I$uYl`3Qc!&yVLt@v)tCZCuZF_
zJFnvH>5B?ZB@H(m=E&~9_vG=iCvJ>+cP4gv@ccR=e(`X2(Z8J+nM4}JrtC|cUwK^e
z@O<~e<+iiuEvvgI`TnE-od5YzliyxH=5okzhsuJ@msZRc<h#kIY$ep~;<)F1VM^?N
zz4)jv;!gw0ANb1|*xOG%bZaK}cmMxyL+71YYi}Q@66(RV_U0eKRYD03>V?JnYW-C#
zZZD4<-@ovZfM1x9v3$u^&rCP3O#Y|#jQIt&?Q!45Pxj{Aj*8e2=;9Rmm0=!#<*yd`
zC0YNSYcvck3T}Sklj#WKbDjH&_s9PW3CSHVZ>+ubmZRmy(QkgnnJis0#nVF%tve)s
zcFR46`ih5Uhg6#;AKG2*amDm)nXWHGTE*4)MMvgquQ$6qZQ*_iW1;UC7n*hJ|1^I(
z{c2EI%)D*u^;Szxzdvz9>u34A$a7YcWBkgt%(slVdLjPcOrH5X?t2sLcV%YGF`nZU
zZF?{4kLty+Z`xW)(Pw6)mqiL1*>YW1tC02&*W5ipx_81|4~uP2`#o(YOLckiePsE<
zdYFr?;M?7RE1T_al`RvUzoX6S`{aagWe1w~ACYwY_r0fF=8}od`kaHmX8&SJ(6-gu
zU-F~qvf<kco3m<c?6y|wDrqEVe|epuqNJg)|Gi<ygI?QpmTFCoJ2*e-D;mUb+`O)J
z>ZJ0Gyz>mjU&9ZI&x~mfVX+A6yym*(>?)H*xyrI(J((Z2K3IKV!G#!hyTJ0fR^Ox4
z<L>W_^FLpEHOTmQo@dbnUem1>M+$RX_jXSEIW^+&%lj(24}M-Od7;OexNB2&cEL^k
z!UnbFzT1Cza;;xi^XZvI^_JiHW^V-l2UOK<^$6|_>f%k*_FAwsZ~pQb>z9OWaEtW#
z!@991o?(^Qk?@5jTYbMW#{Su6^2k%+L{h<%=*4MGTc-2$1qSRgIcnE?{Pgk7HIuUA
zGWs|IT_*ZYI=_7Bo}M$xzk-Elzu=Ji87Q92$=X>S{-1ftW$m59x7p<?UG(lYn+7zu
zJM{ZbkBoD2*(E(&^d)nN^V}!q%Y?7|by>9i<wmVE0aGu<J?~~^R#^DF`(A6`q4;b^
zk?Ga!?wr+olOGr<oDoS<P2K)zErZC;2g%WQR%YiU`nYw6o!+|kxb>}~-ktYe8W)sI
z+fm*k#v3P6p6YjG?E)@=xO$zbOmAue`(~cETl@cds#J*{(`u3ZVItSLoMO1MxpGg=
zFm}p)6D^f-cfDz|xcIjlp)WV~TNs`{9b-Ph<G^Pb=R5|LlKeGx0W<a0-X+S`D2AF}
z{&g?aYUZ=uy>k`#51l<*@|8ht>h#{TpFXEmzRPjBb+<BTX0OXi#YxkIY&Lu-X)D=h
zx%$4@Yw<6-oA&9qY`z#15kGmu4*7(R^R+#fxDK3}_h`yg<%3dPx^`zWzs<OO({G0D
z*^44K^(-@)cEA3Y%szcy%kLl+g|PdP*P1xCyz$h`=PFoyzVTqw-(RVGvl`mxtJ$To
ze)!#D?rJD5arT_x*XKu;-M(nnt25#AV{1W0i__vASDd+;WFB})FnaNtc_w6=8691-
zaq;tW%iqt{``fneS)kqV#>9UUe|(Wx*DLs=;hOZ}<9%zn3XFe>^aRCkx2a{j8YESF
zb@pumDSpetU!GrFZ1!^dLv?5O2W4UThnp^(Vr}L4zKQYME5>;oO2L{(CJOtNhyOjY
z>x(5%7xzkyo6o<gPYD0Bdfl>Ky_79x{@28kkIkE@nqHxJ=#M$$MbVO~NcPYL8kT8|
z(>`U)TYB%S>YvYtdo3g7pSZ_b_sq3ym~gLV-%M{at7W!R=Sa73KVTM^zr?Tjz`4lD
zEstOGW@O)0OP;gSNcxTy=T51Ft{IYy6aGHda4YGn3-7)3zjMhus{_|3=<L3}hqLsx
z`=`Lk{ZE&DE#VG2A;&5=*IA{a?@0bt*Y&4Z4~VT6<PNVdd&sS{?e(1aw$uE=LZ|i|
z5%M&=cwS!Q%I7Qf5jS`I_3LarCE3<uH?i@@ugQCp^@JEp!pfbeSza{vxELR@CB7<>
z>5@g$ed8qWxGgvL1SMxV-jI1x^@4Yw_3B?uI(`w{g_B)gDn+aF>$2<j{8{lK)Bn1B
zU3S7Jw{v&GdYzUYy1rm?pkzy?`8CZ)D_Pg9SCoo66j;S3!uh8u__bM$$+5kv2Y${g
zf0y{VCgn@*-_=KD`Tnn*S~BO+W!)cruCcr?Y{J+$ud*E|RDFJ5aYl#a{e=}1yOy=*
z#T<3%Uf3zLJ9616_gIgnM}lcf=2|Q`{VnCGbB@q94ZSq+2KKof9PGC@1{!|Ux?mHR
zI+5pDljVcEQ4y{E8g2GY@8_MgaLsNFd19$ENnJLe+<50o=lAc8t9=5tYKonIy_@}L
ztYuy1c}<1D8{hVws?1KBE_d|)@87CEvFcTG>zsC|I=%F<nsT)Jfw<DU{Tz*4Wsh8I
zLftH^nf50&1<#zY<@(d-VP;2veBZ_6wAlRRuHsN>5zp8qNvDm<lja7n?^lZPs<%u&
zYjlS5yG2d!wuf~w<!4wQs$E{YRLmvhQjN`Quc!BgIWNDIs9(2dB46xbAMeLyuiyWT
ze<i2IvRV03)Z`bz3(Pkwo#}fSef?E_{RJQXMvi-@ZZY?!tNr;p?{c_7#R1vdk81Z>
zDNJ}7Hzo3yj_~e>lQ+*|Z=AYlePQ|0J8e;y!ng0~OMm!pLHg}y@y?c<hdpkI%{^%_
zSLd*5zewYMJ?V{EGmmY4Rwvy)^TJpABN?%JuJ%=7XGDz(7yF1aJki>)vqv-9?Yn@^
zY+t9o)pI6%n)SxzJe$#5+lAG>tu-da=HKJ=LYRE+-H!Racme0Bu&>uT|FQ2llU|j?
zBNip&)c+*t%=CAzMUMNKUw568h|}tvD!^HmTdk;b{yyUqoA8-QHNBtzzON0~c`l<d
zqtX1yn@RFfCs}SJ#_fBrA}IGp)N{l9uIZLas=GRwF2&p|`Fzv+{^l(T?sxxHTAbaS
zonamP_xJQq$4s{tXSKfcRFf{6(5Ud4Y1Jj>JL1(kU0I164xhVdwwgg$)j*}$d85_D
zE#`A4%e}r>;V~!cn5GZQv+t&DJ*ie1p;N>XuUj_<r!KC(v^Y6nWm|3S`s92y_Vzuu
zn~r-0y!LD?ethTK!(MOBe?9viD@gRTg<D?@)@_~RQ=q2w+A%X>?q#VQ`LL4t359vT
zKl$BG*mmPt)VXKj0hgE8vN)<SC;nwJ*s}E7v@e#rBCpRfB)^ZGzV2W|Y2l39-=`@k
zsUQC=d25%TQmfva4?Jgjzi4mC(cA8`DCd2~*>^$u36_Sx+E@QCnq@MH|M<uA#}X_y
z2ieW|BrMy#ZC5X!(IoD}y{{5yvRq_6fAzb=RZjh5PdU9(-WT_zF5o&ePdh~O*&>%^
zzkczU)jF?bd9>PG<ms|h;ko=*6<4fq?-$iQ9?Kx9A*#20xo&Psa*k2*RE>q&lKj?r
zGG*7}H+k{}2+i8u@@e5t(c4B=+hW`nia&^1GdIS({nOfQH!DjjH94+jW;I>7{9}2r
zmZa#Cm;ZmvKAG)uRp^D7(#E8{H<Sg%y;r{4IVZ9A<wMuVrPAAvJe03<x+{9OZ<p5G
z-03O*Zzo+7_Lvacwru;0t){9WT&l@p%P*;2JkBBVzFb;U?N{Npx8L698b~vDoP2Y$
zwuO74zwj;jTQ1M0F8;fz_1)i%1wrZa&&{abwkA@OKPB$GL)JaEi|uvMwMXAQJ^a$3
zP({WxJX>?g(zi(u%*t%vCOr7s_twSOUZwit`x6~}H@93Y+bLivq2qHz$Mj6iZT4LS
zJVy%ROVqi_k1BP(w+?JwRo>HK^xFG`OE%-VS(-8R?UQGg9=!C?B;3(CZdKKlrp!LJ
z$2V8s>tIQIGIiP8ZXM63w-rLm=PI<#vpZnO@JU3VS~xK)<}0gB&AR+!-l9`$&Tb7l
z^G|VStHaW@SC$_B+`;um%JS^2TH)g#iY@14g!}ztNq1<{KGFVAG@xsdpwH^qPg?Gi
z7wPJ5x~6i)agP7I;&nScmK9xIX{Ay)`_&ekx}484Ss$h~HL|rY@Y!YBx60+@ceai{
zH(pHeKH;5Z(P1#tI;Z2$>w*=T4V6<u`scP;<flbv$1;Bo_<iY2_}?Y_PDDL@e|m>v
zM!<~i>ivs(ezS$Qf4%Q!G2=V$&(<cPgPqI^iq5a-4HQs35FT_a((}oVNtV14EjOCk
z-4(+OUqAWEz}zmL+P!w2%c;w2d**+a-CA~B*!hk9srh#!6U~0io$0kZ!Q)8YEJIo5
zS)#r|OcSQ{%%3$mf5ijw&MTiH)vnL$)!kvYTV;z#@MNba8x7pGjyPM{DENB4@Y(3{
z!Qv(3IUARs&Q{t1X1^Bp_eSe6XUq+?)0ltXBhbHJa|7?c`!}pUJ`8(#BS=Il^;9db
z3zM4B0dvWggylZh6~B5Vxl1wcdvcK1OxGy!!NFfq0T*kEck=WnyxJ)i{eB~l!?ih9
z5l4>39lzdY=5M}5p=tjo1^(14_YyYTtmb0yIF-l5{&JS*9-m9EH@_@YpD*geleUTF
zy^6J7<qZ9A*>#_sly8K!#Z5MmxNtD}$ilgw7Pz>1*vfksEHip>^?=YOJ%*QAp(_98
zZn$gi{`8*Ek^BdaowCa$-*@M{S;x=G?!q)v^Ni)1N&J4AU2BhSG|gMYlKSZ7o7EdF
zWN#Hbta`Ofdjj*lw1p?uEY8=j`;gclZ@1-ytb*}@?CF9B+(MW;jcp8`xC>o)>Ac=*
z+a2w&mz5_r{=Y1yu~BO3{jW-s*u3w_S1h=yq9Pq=VE<lqY57+E<npWUXJ~X8noMdw
zYTlmx)$~$d_30ySntz&pGg{qpx#M2h!m84<r+3ywkARnTr_WVO-1+gK|K%L!?IF5<
zUvM(y%{krmvG(WY3BJk-Il}H*eAh1?_<iow$M)j(-)*d&ooeA)>vwoX{AL!?_`%+y
znC2?VqPFPn+1l=D&RlX=lx)%!s+l;J&Aq)>uswP{ci)3JR?lOB$;Tacu;!Q_P?Om6
zSy*6lXy~CICF+Hu%aUdG9XRA+Gkg8t`+4c#w*Hx1X<)U&e~W=+Z2RnjJKrSd`M%k+
zgnxp<@<sD|g;wSDSuVa=TmF8N_6yHr(WebAJ?J*}4rWmlmn*&>u+{x?o7RKXAFoea
z$?oe_HY3z^UaHE^UynRXf|U;Lmr8Q^e0}j-PL?~*wC%U;FIQsSWock{etO>eoe7q^
zB>0LS3L5^5;{6&W{Y*5KrP7!w!z5x&+J{-wwBw_vIDO=u*7IV0U(lL#j;BYN?D-c3
zth{*O%EOm?9`4v^Aa`|M_+eLL6QR<%y{{5(%v_c(=sSIebhfaI?9}b2l<&=8_D`%1
z$$7r{<f<UnU2WPAOK+zr@y+ks=+3q&H}GM|>zC&bo2l%GQ}5i#bKBOH>$k*}&D_z;
z{#^RW5xHw=`R79>y3Oh>*UitVWXdR*IUc*LtuY~#{nvK8x1WnxT5X;8sESEkw=#an
z=M{0e?!fQnE%x4xrvG+%o;oR>Et)3v_cQm#FZX6<Z|P}c+s|0H>QtQ3N0G2B4;THQ
zk1<N?4jsN1P_*s8z{b-2Rlhk@G}eb)WBB%zy=Z=|t;OFzw{O{da85gTjz_Wj?%guA
zZgsm)x}w*0`?7z3V7qtrg?FGLFWa5Y37Z5KORxCy=f2>9+NQ13B#e{$d{^J+JRn>i
z$SAyTf!UfM);zVdO^WgBw;Yfyz8SUns<Hg!ZI6o_3lqLg*52S#7LggJn#OT-^1)o;
zr0i!;IO?aKoy4c`RFLN_&-(jbb0s`4|M6dP$Y@h~H%AcPjV->-4n@yq`g$cMNGdw)
zbckAcMf~dw<vCqHvM;$#+G)<%qUb4+FZX0#rqLJUq<xF_GECf<oxN*`1dr71X(B@E
z<~Kitw0|zY&hvGe#>R6`M7L`{fA7|*F>ybWhV6cawfe&S(j~8VpT6C^D@ayS>Wq-_
z?LMp46XvW2-8~s@N(Y2WRCi0yJT|*@ZuvZ}fQ-HgF7w|hJZNlkn9QPoWAP``dvn^{
zmkaiUm`fDs9c_5&BA&7O-m3tQwPLNBy}KU0KEi3@xpK*um+q{}d1p(d<N9NkJl8m-
z>ldLbaU<gE+<*JlF6?W6?HWGW*GZFmx41+9#ntxzo$n@hPv6!cZoA}L+NDj7CXq&q
zC3_RLhV(5_xM`Z4<lWTnxv2MPP2&vNo&U93^4X3?Fnn&l7T|JI^^3paRL`qE?`NFs
z+5cc)`wLeO(I>jM6{ECE6nl+cG;Q!}_G}efy=kAcUJBDKi)7D|HE9bMOtW1+>xXXb
zWI<`)8^2aHO+L11eXvu`%Bpucf_HW2SFw~Hxc({A?P9OZ=E^mPwwmV76`gUCwTrcq
zw|13R{guYB4SHI+vGvxoW6sP{?#$S>V@=b9&)<*EyCV0eOr!6^<I8!*-j@QxUI?k0
zGJLJJ`*Fkk`|Mu*yB3RO5_ft1yt&5P`Pm<_0~PXZu2YKU{5(F*H?7x$t@CM-#yml9
zhJS6_9X0vmdg_u)kMr*py_74HSoL_SxajXCc5mKDb<KY}(SPZY{a3d;`L1m`a49u%
zUunrk**w2Kv)>0kcK_4)^j!9H;Jc&0CVt*9bHm>SM-~^{VLR*Y-nL?PjhKIs%+2DC
z;QgNQn>g$E-f;HLc@ePUWx?Tw$(j;!S2z~UcC4wn{^jDozUD?5D>p&&8*baU?#}7C
zv#MI5#hR~>C-gAW?PaAr!VRf+uSI<6tj;_;=|xS$vFkiK5%bx&V*Wkod>vU<q4h=G
zx#rBg{#nga7$5y<4bt1Ia&><qQvicg=c4jCVb)XlrMT|Bc`lPaZ`0{#osG|`xFTl=
zR8{ufP{^<mlQn#{=0<PpO_lcPsoxjxyin#myYAwvSz8or7!uF3xj*MU$IBz~XUjU)
z^xpTKKaW0MJImDhPV>p=)<U-bZ(CMR^AhW7<=e|x_Fdt~!o+Bu0}Y!SeT0|JzURl2
z_fswUeNu*jMZ&Sk{oUugD?OiPhlVXa-|1vgU+~Of;&CmH3EiKc6?24VEwfZPVH2No
zR_o@&`P&)R6t;YeX!^5Tu=-y2%Tgz`Q#wlLdsH?2eQutaS$h8QdEu>^O{>J)GM9_k
zT{2q}B~gEAw`1up_d88&kuJ=S<nQ;r$jf-q_ECc~zVgrly{|pRyb0&K{=9#2UO=Bk
zaKftfYdsILZZ14&Sv+<7N)Ojfe==T9R{!|0YHjX8A9tQzD__lcVEl^z(cO6qa{}`1
zJC81J;7Unxf3P)3V&7E_-oz6OKjcrk%v9Gdd%@Ifw&=#JT7jzI>YFW-??nB1<;L-L
zg72hqvCS<<x+)g0l-gktd}&*fUf`r`@khckuR|`?-v4M{rTl8HQuoR;y>srTg{XAf
z{@$}*D(GgC>Y=xso3%QwmTV1KrWa#o@%gj1pq_yzr>#Ivc1aVjpiJJG(lt2>4Qw|)
z&pv(4Y{_bCjjgMr8J;Pe&O8`;dHr*qP+s$p*?~67c^ZbUS?re1%BH*}^9uI;zj)Vt
zfsp4-W;Q=3S$`I`*idHE*x2x0x95K;zpW_9H)&`7cbl(owOJ-AfBm4#*738W>uQ*_
ztl5>$BYM#}@fyE%MdbI0+_kcHkBDj5=@YkkuBb!uT;G5vXCh}QKe-v{vDyA|eAmB;
z*&+XCdM=)}ZNlQIiMHE!)l7I|8*=mU;rFZK#TGGhb*bGw{yE+BO1>t$l95CFt2q%z
zI_}6ar^lZ<o+#9>{B*Z;)2EWALvpc7zaF>O%un~;`}Pns%chg}+K+vD|MHLRqwNQ-
zMw)P}7Ry?sH|Mh!i|xaM)6$HYBaUp8+Tm9HR+&|2qlHr4jTv=~cWkO(WWF)BU|jCv
zo@0A%?P{%})}70L1eARLTYsaD{mJwv%AXER*<fsJcc$xZyw|hu$=e;ezB=}>NZnqw
z^ZhbYRTjmcw|6;Sa6Z^8-?j42%-AIV)tglP+rK^gu%+LjWbx5o#vl4*FVs5Eyv*7d
zylwN+xFe7CjE^0hA`syzP<7MWWA1uAJHEyV?u%~rU0GkVBr3*iWu8p`?scEFo(A6U
zVr5Z?xy8j&e&+f|v5QS9{F5eXe*c`he%r~br84@*HJ!qm^A|j3iJGxjwqny#mjubF
zr&65M1Dgv!#?O=~b&H<je!Se{?N7Z0f7b{cDGyOtoFA;j%c`N$mX)$wd2!BmvFXeI
ztoiw{+8~$LOuWCr<0RvezjHT9m|p(<VwUns&!C?@a#ve_Tku{xsI9cboA+wJohozJ
z0V4-5?)VQ2UT5_fl=&W77FLjWJjP_ZLL=XkCi8#0SLs){wUs1q<0_n)^Y%+rQlZ~1
z)92gf)^lw8?Dot3c7;OYwj&|kX}={}^Oi1cm~=+%Mf#0P`#IdNTt1Yy;qHR1hFj)X
zv>#seZQ&2G+3FiNo!!~Z`S0=Zn)xM%uDQ%N|Fi0v(55#bVuACEWj?cR=Wkz<<QjSM
z?a`-gjZ3+=E#5GrVh!t0#zNl6cljqD-r1eWy7P$AjncTjpko(9KOPL$JU=I<sQ*|q
zf6hk*+nv9}7w%j9!ouVDW7g}6ytB7om~0ooBpKejXpzPv_vcFr+PAF~<GXc4ZQqF_
zH&t&-$sWyk)fxFSiuuW<6;2!O#BsAeIdbMHUjPex#3puDqmMJXHvQcws-5WB@NQS?
znSUXNu6~Pp7SkA!rpsz%>$-twQ*&s{Js%FK>pv2|-v9kui}|SD(!JqYP8u_(TQrJH
z@)EwF#2a5$FU8rbw#)GL$<7%|o-F6FH+$J}yJ|y*y<^|R)f3HL@7b4A>N3r<e5>B2
z`4|4_^0vpGxcDiPJtKILo!gxK2bN^5z9yZ?xR~|W>%DVQ)fZ?pS_s(NT4hYn`P}2}
zHKlCTu8_ml&5J|#Dkcd=+<jzf?5W_tWZzDgw#%{a-Fk~XJT`cImzeAS?QeIJSftj5
z?VT&mt)G_h?SSr4rkVK%AEmC4uv%_VX%;4~yC!N%NPn8(<G1rq6`y)=-r45Usrf3)
zZ!4a?@!!ep!P~y~JI^oQ<(a^9gXPgXFZ+4+dCq?G*)N{aUvu*L!Iv8Z!V4-?Y}dR$
z9abpsC9pzG>gv>Xl`#H)tZzOv7ukwSKF+*7H}_j(#mjYnkNsReyYq?K#jjJXb<!+a
zr)b<wQQWdpi|xIP#WjYSzammK|6^wbJbQ4HQ``RX(&@({Go*eR)jmn@zw+|%4Nl&p
z7OPJFtlZ@$aA(`)qOTXdmW0eP2~}9q|6PA$%D4YEU;efRyc9q1?1G=|s>P;HJGJxH
zOPplC^z7;FH{A;Z*Z=%v|4lIX-<I662+dPTJZ3w#7aFS_n|kKj^4Dc=tYb?JYr2lw
z<kr7bv5k>?$9pkrOMTh)eythtdt{!hI9Zpo^T+CR2aDr5wpoidiKGd-#V3pKtv<Kz
zz@prx!u`(#+Y0-&FRW<)6}kJAq-<8T$`ysj%IiDh_Q=Sr+2594_9U;OmLWRn#+&EK
z=K`nuZxr)tmsxi2C69#VqNNwE2PpJdHY?Q^t>2yyp?gzYnB%U{0*j!_F3myfSJj%Z
z|J-&!-2GmR&m~)n4qnlMNI}I2F4gLTtL^eumOZ#~jng}JLtf;0J*F$)=bw&s{rJMb
zws!-UgH&$j`*&$Imc2^y0hV9*e@`uWwItV8if2pZO(Q9*BWtD4vX<;s+<(DP`o`@u
zb8=(*UKQsD8Xxfswvu0%DPy}w<pRgH&Gns|H)SxIxolmbm6y)(?XT|H!)p(lwjNaW
zIPN&BMcv8b$$F)}Uys)mTYR?p9CjrCc796yN+~1v&-?D0Y)Xme&lA2<wb;EQ@9X5}
zbu-vXeyrDhp*rWG!MEi{)h_F0Xs+wMJt<#3ZS5Q*=lv%P*DSF<y~RQ<qhSB)OD=9N
zRlYu&@>}WkSNq-17r#~Xnv+)}uvz5GS>sCvK`UO%hP?ZrD4WkXNm#V#fj^&s`DfmB
zi`FYV{`*@=DU#11|GAIlmB|+T=faQu5f<3FUgzmzpL<(%#B{e8nZMdt#6CYvVhhvd
zz@oahxmw>RX9zY<Uw9!X^TML*%AF2dQi7cw3)icwMr8|pTlVX^=B27TU*{ysZ2FmT
z?@FbFyU@I(i&;XhGm=a`zxi*Z9k_hP-1i3Re_gb{EM^Uja}`gu)|fR<_|PZ2ZO$LA
z`<)S}|EwmrzJAUTG4XJA?*8Xn%FS*Zx-<D3U-<1?TRsHNHhceVi_e3;YVp^Td%f<2
zH3+}g`fzczX}!ukzk^n67ky?G>ulQ|KRJY}#PSdC1Fd^|H05tNOL?xEBVRNlqu8fW
zI<ENTt-LoG)mC%AFMas++*W(fYt5aHk4>Jhuu4+3wR5FGbj1b6DclW<=l%cpEntRn
zu`fe%kiO8&TZb+bR=&Tx)a?=f&Z$gq-(OL<HRap+*tM@?{-hq@UA#W?$bY}rm#+SJ
z^2Z>*f~!vL)&UVq)xT!%yln4(UnO4jGxp-)Q&o2Rg<Le38pNg_O#QAA|9XS{{gNZz
z<(I+}|3~KYPdu=NQ6{bWtH5z(fjr}n+ovA8;reL$mPJ`FPieROm&#vfvR!b${@E(k
zMXASqG7rq>{JZ6zv#)je+y389;Q{vrzQ0)K%e=2jb?-BW38kIW<R?rM_S~~8o;%yM
zCOvG*{iQj~?K-@vuDzF)4ypuQo>l+A>fg5mEbni($H*!l|K+iBXZxOOqEi;{?&SR#
zW>8S;`u^|JJ$E-86ez3J%W7D0Hua;VnPPdS`s8o(J|2}dk+Nc9zx%RhhXfa2$EG{{
z+oF#!ZgkH(`;xWng3X4A17d5Qq<#MS_r#aODXTh<y?S$=Val8%yI%RM*m==yCPTv3
zkH+`yRd;jAoiS^<Zual?8kgqTIqFl_oNiBXSXSqn*(@h?=>69}Z!*IFFOGN~IC<Is
zyyAoWe}eZ%p4xmzMeyUZ`!`#+ZnIXCGw<M5@mAlf>@{cIoANg`YBxMZer#Cfb!g4G
zYisAUUEet|GXJF8Vq-h)X{^Eqo0Q7F{}*__KJIakpzNhT|1MunzHoTjb(P3;#;Mw}
z54O!H?Q;9to4BqmEQR5~#_+i;YYo}C9kT6A)3iHVx^@>l{8fG1w)$-9dy)3F%7#b&
z6cq_)<vsWmW9q7@ySCpx#q;zApR=j_ufO`2E!^tzFTb(fwV)&5Z?Nuj#=X02H)#|+
zwvFC$NN15E&;I-jsW92@m5OKLTSN~(EZDMpcl0asx&DUD_aEpcK2CeQY(w}ov#;@?
zr@uT{qY<0E`l-+we!Ird?8>zVlZqDp)x9WvF5mvP(<j|JW4V)`OH97M>sjhoVkI4@
zG$CtWPjAhIDh<u+Q4B&X>kc!&eo-K`ry$%%-aP;96O$<(3c>udCDfm*OK?=5d(3}x
zPN&pNz15d^bOU~i3C#9Bad7SuW({}2O2Gu_gs=1U*J`d^TX$dja8V(Pn$As~Ut3n@
z9<lzj-hTGfGwKsxTA8N4|7geFzS1~1%2S~y(fseT8|8;Yc5uwEHPG(e{rZnn!17gH
zm+W`tubQ#&>8Tel?p{+)`SnjxTHwKhq_?3a{_n5t&F2z|mHBF@Bl^pK#e>!-3rhKy
z$XwI^bLY$E-3w%vuUT+Mu5OnB*UOI$n|^0r=#SrK@E~-3*xQUvI-9D*9fcpd8`d|5
zpKm)9d26wh;;owBGdhkw;j8=5_nq%>OwKA<Q}LXFkfn8VW4b-81Z#A%A60&F)0lK*
zUzM`4X2^q3iw`qyeez-p-7vGsa7L<V%G|J9@6>v8Z`vA3uRM2Q@#54S?gx#NRM&s0
zaJ75TX0YW5bKX45b&mI{SLftxn6mAbjE(iV0}&h>_A!gT4gXdV^z6V23-J#}BP@O$
zvAf6K-uNqTt!DX(r1j1RMU?qd>+f`FC%@q8eJ)#d?XB<UuDe<fPI?Kh(6*Zyp}zgB
zB-4(Hm0Dc!FZt^7&dm{PwcXzS{}v1P1Ku4Ie?EGh`R(Azxq)s=q+f{Jnw(r6{b5e4
z#&pm9Ta>L&-Y?eQqkOedBGE+tVVrY#>)Q1Tw{O{eBkEeE=kw#frW(uSC+~cC-y~uG
zl9;b2o^XG&+$A-8h11Qu$}Y=~b=UE1>CA|&70WJ)TJlBdt42i0qj$BN^mg)>H@b;c
z&-)ji7p?I4r!V7s_M;oG-MCc7)Ar?M*|vJmimrwYd$yDxPWi`~=qGdZab@LKtNrs$
zcb}Y<vsO8Gmq9Q~g7<~Z&seMX%-hb(batz~R`SpMU)I%}#je{PhzoMho1^s3;LG~V
z%FrnNtvgo5H<>Lq<|;X><#uG{LDjTL()k)iZ2U$0+B;Zo$4C~+By1?*585g2sB^2$
zxN~XPmRFOuTj_FHJo?&rTci8rHJ^pSY~R<-++^z|aM<8|^VPOgx5#TAj@997blnaf
zSYa-qZ}aWb_r_9-&7#v6|B#zJZ)>Ve+tF@?)0t14o-i=fT|ak~$!@<?e}me0VXuVA
zzqY2!t}d=D`Vp5t<)m`m{!_EOHy?ibk1b{CoFe9pU-niV4gYN$G;!g(2RFk%{54Ko
zRmHGdXKw8@R`I^06D#7Q#rGdt?^-YG9<TKvL@Tf-Yx2L8WV3s>?yoMJqW=H>&YU+s
z?(-#noe20DJpIbm14n<%@n7D#eEXtpkDi%)l8BP$klD!Xa#)Qo<=W%f6ZKq!l&exT
zip)3n#HjAR6s~Una-HsqOE+eEoPJfg;ryK`VFrnhKb(x-DXiX|F+C#l)hGT3vj2Vv
zE@s(S9IqxX)3oBmg$F!A41QLpuT0(`?Hm@kYHja>`m@h+3ijT;l`gOOgzxqZp$VKj
zr!KxXMfu~&U=jVkulvLPm`dy{<2-l8Qtq9(%~8vr@7$Oq6599fS&{eEwqVz{jT~PT
z%D(O6U2`>&!&O&oLzYG2G4)y|?bN80`<uQm)m%SAF74)4xroY3%(pi=u=hW@`nL3V
z@>}aLMJ@3oVLyu`vz6XT_v#scm;3TH(Lf@=Pq|`w)T$co4_B@i7XK1XvU-^zaQv;9
zPrPoc$C(e$)zU@QUUU3%<xhyZ^QN=xud2HlR|ST>c+g__{<->u)Y2VuqfafWn^tF(
z&va=|IESuQf>_^jv8#Ve&V|&K{f&!r-gWEErF&5x{aR*%i2_$I2KZ$(+~{%kS?=t(
zYleV;g~ZQ{X@{3Qa&ZXMbKTzkzG>Ta<2#K3ixf^r9*oiIJ-R7|b8hrqIV;7&XTsAt
zxlV}-i~EZ2>|{8&i%a&GeCdOPA64S1XS#A<_qX3-P1<OXo%Pb-W=&pNz06{RIg1{3
zNL<ieruOK;+=EMM91eU|c-nO1^^MbY{JNjqv@&zgZ2MLvmU3A=v}kk1`r7In|F`tA
zeT+Y2c63eC>ElT&{BmY#ihr#*x#Q`_2b+z5ON#PVisx+anR?>v8R<8k&*rZ?qdjN4
z1ZT<defQ13BqzRYNs98Sm_75s)$-TP5r&4D-%A>p9S;0R^4&Z~;*j06vd#$&x1tt)
z&wX`e!~XQ*Zyy3?v8*fRtX{Z8rdKFH;Zp5kwTP?pFTGnQ@cpvIQ90E_`4jtfOH;IM
zV_X8xhvl59ej)DGa(ZW~{KDXsl6M~e<cs$2-OSwoF{8cf<uY|8`GQn6!Q&IH{MwD%
zTudeY^e)s9(YfakRM?)HxT9~{mWsEvHrc!D_kQt<JK$_@F2kA~A*+$3@Pqs9-TGx;
zSx&O1Pye|$`-amo^$DkUxTI~+nP71;W@7$_l@Z69z6J0u$(yc_b|gQ1?Z15*p%V^Q
z*A`9ubml92>-O+8t$@r}Q(ec@|7&HBe6m_;@<qmB)4>b<D~gT=WN+L&EB8O=j)WxR
z*J7{YKXxY<p1-N{<#=co_Z3F9bsx^job7nN(@09Gc>dkUEb;%l)93sw^Z8>JGD~I4
zgIq<|Nl&x_D$XnW+CQAIZqFN0rNi6@`=uWK;hV)U{mVMtr97$kf5qLNCFQPbSQTv%
z6|+BSRr1FgGvls}Gv@AmRuK~G)+bjvwf@QX^r!7}WNZKEvD&!bTd>Kn`Ih30cTpV6
zOulP7eS3fGdEQy>Z8o0i%WmC&axrFKrr_DF=YOmYYcc6pT(!T*JSjD6g7%{6my&eU
zia)>9^Lx(}f7fOG>7{HQ9uB)~)@k=n(OFn}?n>L9kHQ8@Ic_WFCLfw{wl_X!ho-}3
z>6xp)?@!z4qFdmqu=GvD!%0TAzuw5UM{W%|uq~Ruu3PTLJkR&`59X>%N$6bYzZ=jd
z_kOCxK1)}LKz`5XulZ+rWXR_`Tzqz+PQ&<FkDL0cN|W=KD&BpGk4l;Gi*eSjr_Yx;
z{QsTYugWmtmCCfj-51}bzP0uA%C?x;w<_y{56}J1YCnf1{S9Y$)whR9-Hv^K@h@l0
zx{!&||4xR<>C9ckm!FZ-{ENf5_JpnNso?wX7k||I>TuvP!-`u+O>-3&D$k8oQ`#ZC
zHz*|k?V_OTX>)icdCXjKOwM<AQuqC!I}`bWpD$e*ZkgaRcaGmX#XILY;|=!mJW04S
z!PbApb2j(zjmMg!YBi(nr5@h@9P*2Gy7?)k*{7oRY4V4#<R1IT@aF(y-@Wo{LiI|f
zB@C<`V#l`i{WJ+k;{A7Rv&!2kFTTf~$zLVpx@gnZaLdds>8llQ9C?yb(;WNg-?h?P
zCEL_rhlE|9lJ&9k)$L^=GZ$Gqg==^INftZv(EjdYTakq)^3J4O;}<$=G4Gal@x*Ac
z_TZiK*&4*BrfS)AcJRju-k10#Ec0}cUG&e3?0-yts+z0p(N3;j%cZbE*Es%cW44d}
zyTkme)P)606E9WAA6A=ud*;g7s;56%-ztxN_eCK0h2-p`g%5hRZ!czP+WsYI+hNuz
zYhJIvd|A?3r>#+lLC)df{u)QWX}=b}*m+RxKzG%4owhpN7iQYNMeAd3DR$m;opRl@
zWqHJAzl+R{)wa$Nd(_!yx41~QJE=K{=&#EWXVQCi?z2*N#_eRb)W)@)7LB_ODeBb}
zCmcFaB~ox|$)UzmcP%}vE=nzkX7>v-*|+V(^~sY2yUiXxT`j+;y?n>fYuq9n%+DTQ
z$viM+MP<%`zwyWC9-h@|tmL-hmwoT#nGPn$7a6VUbJ}v5|G|>4xh7$bzf5ngcRp#i
zX4CbBzbm<p8a)uZo3-U%)V$?qm#&}8|9;Byu&jFa+g3MSR?o1%cgNXV?Bdj=mg`?|
zZ`yP_>Z)MJ=7p6?he|~+bFj?2k?dS&xUJ^Xu|3No_wsnFO;~5SsAz_N*_o$5u6{Zh
zoqORx(BD|?Czs^*asPaOHq$g~dND`5|NN{H&Y4ObtK5p$JzlWrc+xj%iHf&}&v?&k
zWam;)Ef)Q6sv%Z#Z5~(EjT^V>#Mep9G1_D685kdx`z-s!mle5Re(wB!=i7awHH=y6
zz6R=FJ$7wc$!LBhu3YrZ%;y18V&Q)axxy+lqnl<&Zs9q#^ZS46=2NmupQ^ifXKbJP
z_dtlp8fS$)aWdzO=e_@%bf?H-*X}LK#uwW1!WNmHRb&X5c&o5s)vfBA+nS8iw5Kk#
zt@~p2Q&xX-?uI?RC!XBW%D=#u*|l$a>RG9qyPmMFH(kA^%ra@(v<c!e6H3o4KGb1r
z9L#vmH>BX9sLZ+vx|bIB&5Zr?i~E^_{~f7Ig3caJ($nAVe%QwT_>WJ<ea-!TT8!%!
zu4&KPxT#-4@^XD?;nziP?s(o}o0pKnw^d{5>myo*t8-!k7xV;cecAFkJm$N7)}iSO
zr*{8iw4IbS<ISAJtjiyM{I}*_k<gNLN2iNJwDD~T%ay;U@4d3MSjiWYoaQFnP*OQn
zWb(XkPtFy*)jk`x+tKI9@0HRYUqvU+Tl@XKirC7X>vMnUvAHum^1X8MVcx#;6XGM=
zXMNjyt*vU=KkMB^y@f%~@{b((>@L+K`+s+iE-!1tCj*7s3rbuM+&VC2hOpe>{C@3y
z3ePU?4UPz&u(O0MI6tVo{EfrP7>!@4e!;>C;p_e%dNbh-!~F-rPa2kfS)ra-a8^LX
z&cpe?j;wUvC;!uHJcVk+F8$uOrX;YWaIKx`pB;A(Y?fQdT(7iu`U$_*Am<7{4*QQb
znU^<&2%VgNHQ>bWE1`dlrf5z)`qKS@@|vH^mDlD)$DB=ida~-?+L<di2AuH9+RhVn
z=}_>KHilcOw__XS#U^D*xY#_c`B%lHrGIIXMe@hs>OCK?Jq)<&;Un{XIlt_I-gpbE
zFX`)_KaJYj!O{76&0SmmC+=Nh9bTP}#Ii#E&$;gru9kGDx_X9+PDGEb>|)#Cyxgw;
z7v|&&_6jB*QZIDkUr;N%+~!B_>&Fjco0~U0Y!#pK^F*;!NQt%Fmqq%`-^3ohsZW?A
z?9!WYA}&p__=4LJrY8+;huhCRtJyR0_ln)_25o;5<V5GsIC54!;5qLuXJ6@CC!S{B
z$kUT3d32A7VIT9YBXNe$H!M^O_{UyvuxF~+4z87V-@Ljk_Qgs0yV+-Pk=ExD#>rEs
z-92Zad-F!hp`7f^OLzAi{i0HOy^km6D2s65em$x68S;}WN<%fjnC;#fbpL1HRmb_<
zVumTXZ1WBK;%AA<r*Ap#q<$<zCVl41;!PWb9r#1-r(Nx`U%!)o%i`rsn=4M8+q_@!
zZt^XipnA^8QzxP#wsY28aX4Ohvh!Pd*I({8bK0U`on+52&rGqo!GBNdQK751R_(i%
z^Ez+ZX6M;m2%GLcsX%!B^$63+0k6AWMehx%QLJLptD4v>GxNLMtt%Wm!xA2~PB{DE
zs$5iW^si{mdyPK-Jms{lZ<noF*2Fa7)%#7=^_y8QX;&HX+3Dtd?SJv^@C9D2UY38k
zo0f>@Zm6r9p8vA2vGri_(plOjpA3`khdtJ~^2JDLjzcHUnr8;Bop)yVB~~tPi8MWQ
zyQyK};y{~DCzl-O)S3Mo<b@ZtUViz^qdCCue2V;<$6;Gqr_Q*lUiNllSLw=_;N7ns
zW*ubAzkh6Nb=6AWI#X3%HdDQY1wZQBFZf)DYnrOwu$oCzDk{<9cJGg8F$cD}wya^8
zs+&~!&_-<Cw?jt_+T3im7W0b;6wg^dSKUNTb^aQQ%UOmTh3$tH_g*Plm89{wBI(((
zdylvpxt=R1u+8m=xaod^eg6CG`?Ff!vcGFvSfg9-tIjr4S!#Y~%KGRSv8B`YMG7pI
zUlXUcVa~^od`$B4l8r~i+4n9Ft(`Gpw$Q3txj#DIeov<e9Y1mKhFjf9-@<ZB1!;L!
zf$LAtRL*OE`R7`FguV5$4*rW%J)GmZ7oMr|EIxDUupRfNhsl%XecXHC&4IS0zL3A%
z6ILsJz42JVOMkxqTknXQCm)HcNX*++GKYJEn}*4b5C*yWh5t{>RQq4*x)jBm`z)~U
zQM2L3z>hP3-PBmD`6^|RT+f@!rfOUnIqzx{3#DhB`J|8{rF`M#a`kE6d6}X6Zo~+?
z&s<w-bvVp$o|_EE>cy;FnJ&CjE{8Gw4>3_OzM++_)F^%;W4^he_q6u8{|<6`^nJ7b
zaaEb;&Xo*P`>3F4{naZH+X@>>3=f!v_ql5>`p5f0bggAK^OLgGBFCzYxh!S8&b)q6
zzwTk={kwPK9ek4Rcg!p`o^fj$XU@bBSJvedtI~W{%)4LtW@$-=`|j%pwaXR+etI4C
zct?(EBGW%Jjh}4i{>&6yli2wz;f3@ol{n!Sk6N`Qr`Yl~iyz@r7S5~bIw!RFDu>XA
z?oS`fR-TaX%AdblVfWuTb+@Xubo^ib+PAz#x$YC=^p{=#r_C*%n=H|yxa;D=+q=13
zyEV=pj{D5;BBYV=l8Dj!XLX-e`+uB}WG^1QSm0=Yg;KM?w_9s`b56Q%R}p-uq1(D(
zb%Ei>hqGt@?3u`0scBGPy--a<qq0$WYsIu<QH;gsKH0tvF!C_@^o*62d)vnMmkRl+
zCp`(-)Y-0bT<5*It=KP*ifl92p3aqrI?^}JVLRvHn-Z?*xh(x%JCA#{!92gV*L`2g
zm#;DKc_`c<%C*g(*I-xc$vw||V?}RXJ@TmM`B^2VnRk^L*1vhu6gIhR#%FVDFP1q+
z6epJiJYLIP;8OId*{7{Fc;gds2f=->@02iy2rs<TFzHQ{$T`)L8$42bpP!z=VplrB
zzV7?YH@8F2t!<CL{=xCr!I;&4YqTdF6VcyVotoejux<V<+bfsVf8KbneM&r8^HgWi
zyEBDp)8bNNa*f;K1U|V(_?q@#*c}%0D?<3O{69;_7x!4zcoyxuej#d7G*4wuyyy})
z^FzuV-`1;d5=<06Y4g1_b?NrHnxofZiuavaDOzQvV)`KWt?lxtg+Kd~l%8Y+$y;Ak
zjsKOC;qaK5V{NfO&8a;OM>fPwJ;~{{=g*%1D!gYmOiI~3|KoePgI7(rcL<&El0EtN
z@;mR@uYx9Q_TCn1bnnNvX;;EzCgt2q>5MRqZhC&@|D&qX@Q)(4e|fKEwVeO_d+o2I
zl78%c#>N2*)-k1?H(UE{7V{jP$<VE}`on}NCpyn4zPr@3@byWT6|3^<q>H^G_ykoa
zF+C{^<vZbDYVEne;3>-muGL%C9hM1;<Ziuuae4A)k%en=cgzod!=h0*ODZDydL5tJ
z>|1+J^(?rXbcVP3ne&1de13_|;%wjk2}s?w^$HK;{dPGh^|6p#)c^itd)D|mtell<
zeErRTvGre`G&FJS5qkFJvDdqw277g;KGP`w-Zk;6)&sYb3#N4%b{-DPeyh!W>}_P$
ze4|x?SF>JCS-N^_&W!D?8zX-g<-K7(v1#+NjT3S&w3o<P|J|@QhFf>C>)Uv>ti2&R
zK1KccJ-pi;Pw!pe^TTcKTKQjjyN@{bPb%2-esxjYJhK4pH=<u$uX>eDIGCm3eI|^7
z^JTr?kK?^96UsmZ*#^rqeoY_$wmx!Qy8l!CtINSk-hz$Sl;<Aq?zdJqclxLBR-@=~
zT<5GZvrYe&mUCI2U~=S|W)Qc{w`G&ky(f3x8QA@+zWK_p_Z7pmx~>yK4bff|HHk{q
z&%7#q4QJdH`fbB^X1CQrebIXlE$%zCII(akZJousxOcw3v%}L%2PE#@;k-N7;01ec
zVPx8&Z-(zCzMFG5Wy{aFb9cUfzdm)^<~ZYyO~3C(GMSxxY>=}1-hb`o5^J<JaV@V>
zlun7!{1Tv`#44U~_0n{M=n%<sLT@-t<9zl%%qVLu?f#j)COY)bVfMK^Mm!QH%BnkC
zzS#Mc{qMN)->l_Jn90UzFMN*M?K`Bl$!4*^d=uZ#ztmO>n4b97t)b(3WXcL@k?T_p
z85|z$6AwJU^#1le-K8x$f}c+>VX~U7$taWUbh@Q~>&+?W*rp}6FIl(qYLV>bOm}XE
zNv7%tDjB>kx~w|XRw8dTed+oBkez}j5B&c8Bqp(7rzG<n33121M`cG?bgM7#cva!N
z<Is_-KO0s2dFEEPU%ox>jK0wK6~41s&R*5u#{P?A(*8{)fyeokRm`HL)K*=Uli2g+
z#uf)ryRL1sCDInvPo7_@>pFejx~h=QjS8hgA#PJX&nOI#S-MZbZt3>iVom3iqpD@%
zkGg)`R9$W2y{GHLqJ7^OpT{Qp=f^L#b#dtV?o(>2YF#GRxPO7+TJz6YzvOlA6xy^;
zZgk1$+Q(Gr@k_*W(PiNSUs<$_UI#zey4n8FA9;zJ`&<iqqnMn|=NvaFk`xwwbxNl+
zr0LYbD?hrOwLgbiEo|7^HBVNt)a0i|`5Bg13s?S4KPxz2H}1`m!=_r9ua_R~S5#{9
zIe+R!$)iQQst*o$W}bZXW9dRyt%g~G7r8Cwe^7ASV#4)(`8I~D!JLMN=G^(aDAe|>
z*`$;;r&rHRI=(phc|zmC^}X>1zg?mp2L}F+y;mucbS;y2!Aj|!4>Oxs*1lNE5U=&d
zBd~DaCOP42fvS@P3~p(NOE~6sUYrniz5OlQl<EWT{-5kNWd3!&dzZKW;%V--6;nT3
zM}_ScE3;a4ZRVn^w`*073RU;Flo@z$@0nF+zvj9F7w4?lGZy?a)2H=+eV0G;Em!8O
zzDIx7o|yJkY8U%ek4xDXR%95MZGV4={dwSrLlRd@OJ@CH*81PcDOI!V)ZE1@oSVz@
zHg#>@`~U59nZJ_P&h0QuYv$kTRA0=!>fiZiq3JL8#`~Q*8&r2Z&sJ^!joP=|Kf>7M
zRD>touK6+7^PnwLfvnEb|GV_p7n{DDSrHq3(XUz0Z;A69xk?3Ful=`gS8b|UDsiCx
z--3C*kFFL5M=uwwtBw5QeEURL?t$CKKE?#TRd%oX_Sj$jOyHD&cix`Pms$I&&n<q?
zePwI7z<G`}|Ig^SyghC^^}@Y>JGJ;^?Lzg!k4o~da@v?1$JO>~m!00)OK)aH{CPjc
z|D3w6^qg<o|NE-_oRxaP^~Vg4C2JpX_B+fnp75_<M|^wC*@xG1=j@L8H|w$eYsSCN
zIYe#x<EuWNiki3Ro3TpC4_~v+C$4%jIW9GwO1C`>TjbtoTAIv_5q{$nweH??ne~01
zs~SEFq)9q6FJ}1krE&E`iRP{Qeh0s761dj!bJo9h|39MBIpp^pbYA)8;?Dxp8LFBy
z?>u8T-anJ?e9DiG_c5|B{dRYJ*~lvzof#D>d~9~ow#}|tX{%Y1<oG``&$*s-NorT;
zM*}}4VSUccr(;7tz2xRN5@)u4hmCH$f1t(kN5{1096DOY<drp5jPFbvkAaTJ+PfTc
z_+qZCE1nR`-V|<Te82sm-j}^6B^dj2%vH~R>$=y}6(ngBq2PGy`8nT(DsDm?yQ-_Z
ze&lUBz3ACmk+QiWp;I!OijQOpa_{M0a?VYlxa+T2X58%+|KuOc{WX8Zk?-vuhofrm
zpQu#4&^p76_34{adzJkEz5R6}#it-C>3wXKTw2uc;Axd&PJc|#XxE)ke0nYIqHTbM
z`-0wBY2$NCTrTc<Rqbu(#pD0)ZSd+3jjcBRi4Tu=-;+ALChJIpl8WIhn@>f5dwZt*
z`0>H;-oZnekCyJ;{`>LW2NO!QBbAk(oG^&;y_<hs<KWim6CXZGb@ZQnVwv<r|1gI;
z3TIkBY+#?j8v63X)u&(jW1l}f?eqEh#WSXjTC)-zU-@yIz9kqjO=S0@mGjmvJ>X!h
z%D1$Kn|Jq0v5%8ye%$W${@^_6A3C<~{wL)!Gkwo(6}f2j_4`w!b1WB@cc<Uwsmhb~
zF#2!1b?fq7#pm_~^EqbnGq|c8Z(KVuV8xx@zQqrdc<au3gtsm6z7cScPp`0m`FR3U
z$}XkQ_@lW?H+*?3Et6fk{GFg4@7ar&nXQi>QrBxa$)48oIAHGy#io6itk=feQjd7N
ze}UiHSyy)cRS4M{ocDcgp;gV1@0ouqZkw1ENnGM>Z@Jw2AU-Me6hFs%{a20Rf0piB
z(>YgN-lP0e`TUdHYNUk!tzEe2_H*&FgC8fm?e(d5{lDg|YT2qQ9YR-*T(X+-t8n)I
z_Rr-;TVKg=ZGCkwwf?c7i>djkw;FqeWzMrius5#DZ!!+m_gnM#s-*n?&BZI7cD*b~
zW0`SGQD(#6d9S$@_FO7@&v|EuO;&bj?SX^KGgW*!nUa@W3!Zs%?%MosQ?;h=WLX@r
z_0={Pwf*VQhZnas|B;%}`1GRx7rO%G#awls&EXBtvyXLYtf;z^lQlQx|M$XWl5X}p
zf1Uc86~9$8{u@`HJ?FfqTNWrJhfkBc`eCiuyQ<CS7?oDF&f6>edvZ>l!iQ_O9{Kft
zW}YeMG4a8EW#)61_V?_rKC^yUtbNJl*vf(@Ggg@HJbB02toqaa{gamKneIBlEAFe6
z%vhZAbfFzr?#x1~4vFtImdF0wvz>GBX;#nGe7DT^w_Y&(&Efl6rhDR>XzXm~|Jw{r
z3W8W4sm+xLO9^%Fi-|6LtGaosrdhd+lOH#u{){`NLN~v2#j-9A)bxHT@cHUSk=n!A
z0vvmeZ~DsLclx2oqq9A&t3HV@`K{Km?8AoNO}j$`(}V?b5<fG)e!6$9u95zxg4xzv
zmtGM_nXa01y>zO_H}`jz7uwGS3)ZVguAQSB@QI&Ut$g+pFP5N{`f4{Hbw7TSXS4bA
zdPSaCCD;ACRo5w+@O5qWec`tBLx(-5<*SWL7n%g^Ryw$9YBh6d+SIg#$<8zFzCNjX
zIhXrm9Mf#Cshiz`1+s<SG(TE&>0EER|HHV@SA8W9-xe=WdhKqob7y5VU(nn9ma6mj
zy56<M|NR~AQ#Q{{<>-y%nFV2M_9woW%CaJLJy*fZ(hwikDbK~^wbOP-Mx8B`?oqv6
zdCvd$5ux`13T++}B-wfXc$l94V(WZbWy3W+Q90`$EqC4p?);qpN6eG+TE_Avc}MKu
zrY63BTfvdQc|qiD51WmG-}56TF74YMYtBw;IPy2stX4zJE^?1$=RG$`Mz!{~j2Dxl
z9@lX%cx=8Q`0b2Wt6xrccl&?&ihpmydgZH+OSZ5+;;sC;q%8mAm%~k34DY#TZ%jLV
zFl_bIo2gbtm-*Uy+Ef(%qh^~+O}$~YJEk{Z_`$N`(wf_gjE@$nt9h>7^l)O*>KU(p
zbY&lY$EomS3ricLbYONwtz}CE=TC!l`=twKE<38N6a7nGOQY@3Cz<c<KmRT>NSN^K
zW8lV@sZl}>iYzCp@|@<1e@JQPap2AS+VVeWx*N+u!-+Z`C%*OOeRvsmwn|mgm*2Ox
z@~^$&0SjjBs^#wk<-9Yb1uHLZ6fRn^!}XwhXR%(qY1aI2WdgHQ->jZ5?Y_N#)AReb
zoc;P+UQ`}-UEP#ZuqtTUjgSoSmph-FzY#mlwn2eiTXUzz7a`FtMyo!goK=3Tk*X3<
z-MI5b^^L0Hm#n8vxev~9G77$(dna+-Jf1fTFHaQJD>I2x66x7DV`-_8>&-OBkOjXl
zPPnPtdbQ@j0iAnGIyV(wIH53~FZM#Xu4LSfZ8w=uzIyn-M20<?opa`i<CB{cGH0!3
zcya&5o9^~i?_PaL@o2c;elO?Gx2%drMpm~-*2i_9cQ>^Q<Zi8AH}^P4#)H|ROnx_J
zIjv^v&e`*YFI(^a<Ok+bvkeVYf(1(#23`>PV4N?;#vPyPm0BQqBs#}Yc)|PvtHrgM
z>=PII`0#KE_^rxg_Vp-<KJkrp)8|?70wJf(j!kYe*vHZLA#Y=Ge5!b+Sg8;D2gl88
z);AmQc`sX5Bk$wZAvY)H+0y$fYa;?D@7coXT^1*HR43HO`oq;7Z~mHQ`X>fibem2y
zuaWJa`!~b&f$1z&Q)in=a-mr<VW&zWKK=bybV76o*R-s|eUGj)>a9Pwnd|u>+jl>D
z`7X$BpYgwOBL4x`U0XArbHBHnkyvx5;#NTpcbs=)6wA4f3(GqHNts_>^J;RTWyzPx
zZw|Y3XP2+JpL!<YO>D<sqk{EUeBMZ036_tMG82`$DparEdhv~sNTuMSFGYgAF}l@v
z|GZlBvP0v@w115Ze2Z=P=ACB!;`34PK<0B!?vv^L{@UMmaxOJ(J^YFDZ%tp7Wk}!z
zuIR<?l3t!CuP(X&DpqXADN&v-Imu0LEB;P9m8*VH#&Yh$=)FfGTqNIHnOrtm;9~uQ
zQ;X02-N$`%V&|Hl*!zO-`NFC4ETymWH+<yiej0N5xoG>vLT&#G9q*sJ3hn0VT7Au}
z)_8Z@;eC%c&G^c(I6I`$>F7^$ja@&}R(k08+*ipvb;R~Y*oQY4xTYPc5AdAwqJ*O}
z*MRRx)AUB+cQ=oJFv{7z(d(qZ{Jk@-w*)aC-nvV`i{t1&jxRfRJWJ+d7tjr_2+7Qm
z688{j6!){4vrRLhhHK@b1^UNZesBC4r{Y*TvtRz>Y2O`Mh0U*KaOj90ZeNt{_BB$n
zqJc~B^;ust=kxvb-?!d*GxN!YY@UCm=TzPti3p2pP309{seLQnYQCG;nFo0*_K8^B
zh__*QG@I2maH3`GTNh`qNi6fun{I4iWHO(pv%c9x^4b;KPh~C_CN6TnCE>KdSf$)$
z_0v7`(sL7**%WQj5cT@{c>au(LiejTRh4CC993ak`|tNxcVVOIp7Zl`T-%t=g_V9;
zeQlZg2X+&&6E?HzSI+fOeBE=@J3J+*?N<4I#yfh!$6_T)gKanJb?L7=Dq<SG`kZ=x
z#AIe4Lp6V6^D~0Z7C9DOr(cAex>$8b`Ca1wW9Q#ycI)r@xh8J<-#NTT4K9@Y_5OUZ
z)AQHEeb!uyCw_T-zUf6%U4^Lw=c*u^iw7e9D;hEUII!8dl&7%4$iqsDrOm$M-r|Ov
z_WS=hF-%psy!xAxa?**e_~j3l9n|7so5Jt?tG3j)Xq&?>v9DL`7d~I2?06zrXs4E~
zL2P<u49~B#nFpEYT|L%cQ?cRmN|w;IFYKQzz3Dl#&p7Nd)3h_0*LKYKZu(EfcjoJD
z_6ujsWjdm<xABD+E1$>}Z^MJyYnHs6BW@{U-gWo2sr&ST`q_^QCkly*GnH)rxH7Qt
zS>>@)f@0S<Z9Bj1pqEU+`Qt8b3P;xY&3p7z>%itsQ@l8ibiUB=`W6u?siA&;r^2@n
zN$VUZ?=JZNI%W1B-R!G*iz<qkD|;rM@_)*^LTlUaCtE_4zb#%Z{`ZQE`0bv#;i3t)
zKDYH!GV~>~+56M(PBVDoZt-;SC5AlJFDJ$CxEg%pmDAV#-r-oen)RnD_pa1OWwrvp
z!kCw7ibpC=R+*AvI4N*LPU??}G-mbFk{Z)<75_e6<d9+Pam97P{<+0+AG0^!nVG{Y
zo)w?x&!4mB*_SJ`<XNMi?CX}TJ`j@ieCh4T+cwqvg#H?c>9LD6tU9?zNAG#+BaI8*
zTPw>nJGwugc(1y0>x#eWCoer+x_onWPe$jBW0Ov~|E{|ml0CKhf%3E|?z<CK{a4_)
z(RDTagbdT={y%4<Z|QHX`zq^I`r?!sdyL#tPW9TRN&$7>5+j?{Et2*R6it~-yK)wl
z9aUSKTG#5(s4f_=IY>y->9g4}U&c8*SiiGRjM%AIC-cH_?XJQPU(}Lko?7F-qcvc0
zz_#PbzZ@UuhrKAg^8T37JNADiK{7WZ799BJ5I3E_i0N%h5Bt+ie?FGE_NYlI^iQ(?
z`(*i>jSa1nrC;P+)ZXQ_-aP-+J*!W*C)U5Oa;)P&ukkZ$nY*wb%gNByA3e5dv!_XK
z&R$!7_;LG-D{Oh^X4ReT?I}7Xvmo2^M0(J3#y?zlpEmg#Ud=kQlx^|47gq0HmfQSo
z7QeA@(XA8AeVON6Ps_PH`?~AHvID7#!R;1aB{x3!d?{GDVEY!XD|d`8<}FlgOMUTt
z&u8;Hlj=4Vy2*Rj{rJc8IYllms`IDJ`zwb2{~86Ac!Ip<NOLnJIn?S|^cKk|S~FcZ
zqj*BldcRdwUQwnvgX6!@t}`#i7-C<{*|SWdR{i}X5syg|x3Ar|^7onLeDk!n9SLjK
zh-7WLo7)(Zy!U$3S=n=YjN5<u{V~{bYV*0Jn$uSt{JF~i<cF)r(i`#>s`lFJKd*|u
zv8hA!s^txqbj`0*3+J8qUp9H+Z__n8xjlAl6*6X_Jgp6{AMjg8URX7uW2SRnKttw)
z2OZq61#UWMdT4wU{{C5p&!N=)Ox;Gwe^(@z1%9}@kST<xckaHwmZqyuo48-HYj*89
z6!-4EsIv$6Z25CfEDR+CjXKw{MS8j9b=S-)xtwvech0hmYeqKvr1L-j&(?{_de9Y}
zRy?&#&f)KB8>Ist=l8qr;O^!-=CvzMZlA)DgQv?DcWq#pxsfB|d~4(Gw~H@+R?}Nl
zd++k9(-L#`AK8+0MweghXZ!Akb7FP({nS&ovHjjS_pMiV!ln18ufJv5`18}FVioSV
z*!-D_<>H=dLTSz4Rm0hn3g^eJoT&b|d*bX9cX@9o`(I*R8Ev`h%S1&Lhtjzws!P^)
z$<Ok0xVx+`TT)Sjr`zuATA`nErL}PvCkXIHXQci)A|tO+aqL%GdQ9AlXMI!Eb)?>L
zo-K2K8^Recx7@Se(<4#4o{Q~Nn=0!X)?FVSCko2`V@kW>J@eAvzy1!B=B#VkKk>+n
z39`<6{>@nIEuwO3;oGRMev1;Voxhr`pL*ZyuAlGfiwzsLoZ8#Cbf^8-!pZ+DvnE{J
zQHk|%Ia33JWac-&J6#`F@?9+F=;0IA+4K9~+2b=f_Mcgov`}hE^rzjw;_k}@OkVkk
z->k9m4$DL5MXDEm%2XInUeLM1bEzQP!d0gxX>xA1nVOt(?3hUnR|?D27uoE~qP!0;
zx_IR1nO1+<`}4aj;x8{%xZ3X|AvC+kDP+!;Q*sBoBfLXaNSCK>ym?z&P3POCkF1MQ
zb}fxCVBWW<-@WPG+|@a(8iwbN^vG{5e;bsp^{*mw3iAr16FN60Bup!n+Iq^X<5yqt
zR*rXvvqS&-FHcBd_Z4Q<dpKP*<At4k+GSncQ}cK`)qfw@oN>{>XWNr0HPPPMR{IXj
z4z%RxyCUP#W^c<i_r@|VRYr|ap5-=Y)_0|I|6R1?MC75HO~T6Si#05q&P<TVYrmB-
zdrEq<&Ywm5!`2GSHe1#EacbfI8}ZAo?cjS5HlZQYUSR#C?$ukxPW<yLt$uj-u(ki(
z4fom?i@HY{<s1kM%y3f*x#AdS%5y|HLX}li%=b2%wCMdD%}49&W-}ZtJ8@M1_L74a
z{|JjrE1kQ1qhQyun|bA%l3Ti*>pJtqO49y)eE5gy^=z&=8>Fr;-Shle(8eWc-X)Vx
zi~hXux_r?Qs|6K%R($x|`ZjOcdH#+)Fa6i_9(O%aCA7qxN6O_V%Z3K#-N&<L6u)`-
zbJ|jAUA3iCH|+3ge`&Oa`I=1hOYOhg;+1t5B>LXAJG5V>e$`u+_XfrsSIZw|U;cc6
zL0@+XZ_chS{Wm%}zpls+d)*-2nC%gL(SOd-mmI$(nVM93Z$BtJwfooU3%z@Nd~y@7
z@`l>Sd@yo}obsK|$ozs}^__R`4!z3wCBvMtQ~9yCx(?Uop9=RgB(!zcEa;dQG(-3>
z)5j+hyJtjh6EWYfByRKSiJae;1KHMI8XL~_@`(mds=l!1?DFZ;vs1z(kF+e=XvA^(
ziP(bA3H7sbmz@xB+n=cKxUfWXoyWCDcV04-b03K~e}7h^**e9|GT+};ZuV_`=%*=@
z{^j&8f3ZpWg7deRL@(wtyivT=xl&KV_xs*z^Fv22WY18t-gfPw%3hDRg5fO>v)6Oo
z7m`!uy77GS!F|ble+R!jsdI+IN?_yNfJvg3f0TCmMxNX-V^O`=#$RHsyU(0Dw4u&s
zfxlld|D&b1;(`w8N8DkXTx9V@;N`7i8>cG`j1w1`8_e|;+P>_?+=g6@p2s%dw(k?(
zb<y-_#YB@8O<%GF_AuT#dEO=D78m=j^hu>h{>@C6_y6j<%==Twg=v`^YV~)@Rb_}=
zv}pYAzOHw|vhcZb$>|@HHH|*^{o}m&q;u=@B$Kc;uf<>8{<vsa<ADz;MN*~q?=CO=
z`_AG^!tvOpD@&F{?Gt`=tB`xy)s8ksz3Q7m^)~x&*X^l@;VqO{;IrT@L+5Y4W3%Gk
z-|3ohvM@F1QrGO`{};MnK5^w<#LxDaCrkYocQ&fd%=p$X`?0N5<nvu2Ih~x;*6F>4
z-trMXv6FZ!Qo8?#`g>TIo$vdla_~aT)-QaEE?k@N-@%(bAlQ3b)us0lUirrx(>E~9
z@brqi-E@?*`=bqC@5@*3CViV@d@EblQt0Ob1}R;W_C&J;pTkWXHS@0;Gr4Z!F1+9Q
zENH1h!;aL&d-%@ju)daJ+^Trs?e0+SuKQ6lDw67Kvpo~UR6KY8v))jU6~d$S`N{o%
zp8_@6&equ-KUnfcx8=y{t|zI??VCPaO!WLw^m$wUEH0k*=~s8{__p&>fzkJUSG&JH
z*}QGZI@R|g{*u*8c?DOkj=$~pg4x}mvFmE#R<%d#i@s${p8Eb>ZJa>PH}0C3e2xc~
z=qY7en4|>F{Iu45-iFh=-0$DZGT$4#t;138SaE-mb7rotd-^5AZ*{NFy414HGupvh
zw<Ae1`-lS9*>&P(^S=qF&Rx`Ds&d}{chvOng^annFK(^f@4b8B;SJw94_D7JG?=V+
zxBKR_70se<ZdqD0>sI{!F4!It+bPc<*TcO3$-=B7&lQzL5*OBc#w`>pS$0?;;_3IL
zY)N^376ofgT%7Cr=mLw1OON7Q?rXCb-q~4|TyAzd{J+(|YhkJ4{<DkU=2<qroTny}
zl=-Z=p=JADb1PQKZ6W=lWuoei%X%2Eu^I;cPM*@@Q@gKp{cPJiDOZ`Foo!rMIIU%~
zhWl!kHI_f54P#a$sx^BA{4Wp)yZ`-nW86XKu4R|%L}nHQHoX1VdtY`Vn^3~Gql*tk
zEI8C!e)avEKZ<9kr^PC)J7%kOUDilq*MZ~$y{k(V`}C{)(><rluTXpYd!P0<zo<)v
z&-Vosw)Os0PXBS6yVq}r{L+lVYpWZdmfEwgD%%jdI$_!a=9mAJGZT|NC1fhLDHv9*
z6u%b0C07x-Ik<%Ty?Nl$)0>qiE3BC&f4}$koPyp<KQ*SUzWsBZUroDi)ea*sjTt)~
z<qHdU%vh9ibM^jpj?-_Rb<vcboK-cE@s`_Sj`wdF-hFPf)vGO<nshs5)--F68|&E%
zRe9o`?n?M0d@3p6C-c+;OOI>R*v_*z`+jJr-lA)&X=|c1JLc*d-F19vARj!#^nCr^
zBn_*8pX!E|XYTFn-@<rF>`dwHTaxOY3jhAzD2Xu%fBB-KwRGz$p~lGO7{~mxL8<kB
za=xaz|BO1V%RaxYlWm&WWVh=r{}tA}GoGHWIqk5_p%ooB1a(+7i`Er7aXfq-trfJy
zro{8DU5>z;u*1hzf9?9IIWe0-DwAWQ0RIkUf$CG4**_*kb3U2&?&bCbRdJ!GF-r6J
ziv?GkmV5rcw(zHc*4Zz+e}t~ilxO8i^hlqbx7#YXd7()C+#70BWn_&7e_C%`yp?;h
z%Tzhz_M_ij4HX2P?9*0M{q$+CysP$o#~kDO$6?odF5dMzZ6W7r)91UTNMql838#~h
zRRt6GeK}^Zd+J>8Gr`WM&E<AazI>SXUF4*~`18(<+&8YioR)R#`q@*z`~-A%FMBHF
z_E@3hqtfnYTkou9-2eAUx?e(W^tqVxj`b#zR}Y<ha&fkBpo*67PsR>!mCf?67hO2G
zWa*_%ll7d9j#ecv@+z=u@p<+<<nz1-TVG|z@3prR{eNwOJoBU#!p3(JeXbPxFZF3;
z=*j*y!ACdU<<RDNB0qim!#;gG|L&dim9lr?%z5^6Q{J<BEwC~*4!tfL&vGeqiP7Oz
z?{0Yq3Tulw%xz`fRJgY9P-1B1G8I1Vj|*}x$izA<KNDNIor5v!l+l*yI@2$1bW1;Z
z#MbKOrsyZJ_g^Z{eR+^sYtQskSuc*A6Fz_Mpljtfe*5{n6TP^Ooh)8;=ZDb$s7~vt
z?3$})F8SF1cV@xd)D^PTM_c=Po1ahgIr(qRj#=w=W=XA>yiN3X`_ALXwgeV4>R-Fb
zEqdau=fjwqZoQwoEIg(;WW09U<^M{_HFAP{YhJ&x%GBMHI(bDG8k@xJlgwG)6YU<g
zDc8#Xi~kQ69%JEq#-`#~I}YrfyXZf6gme5Ux5H;#<85Ev+ibo|F}E)>$orq3;wSBw
z*S09EW)g~-*72fGmE#-tgeU#`8s-=soN1&oueJ4ztBh{KYq9Pt^KYoKZZ=tNv^no+
zSFP^LOxqL=|C#l24Bz*jxn**2`oAWlOPrOH<<#RYuDI>%zO-`Z)p^f6BhT`jsf^sA
zSF%ytaUs{gc9z8<C53_!E{B)jEuP_NeR@aG9KP2#`f7KCvWP7*z4~9s%3Eb=(4>V`
z*85}sdT(vfl)T<{ZChFX)kRxWHm~#yI`8w>CSz%AV3*V-EAMpkJaO)`R@!=(C!Td-
zPoFIFF~P+k@ycPHvZB3KpFGm8Tjw0`eYvFT@oaYHb0Y8Jvcg$2=C7XJckR?|+ofTT
z_}*~emf8B|!PdjeBaX=(Xft^1w4OJLafgOR=Z~*qLDLNvS?JWMZ{$~+b1Ag%?N)OO
z_T;A#>p5OsHm|R3tyNdEu)OT7^Cq=Wi*Y8uq{i2W7aSej7aMW()$pyn!T9Wma{v3L
zXsNk%bIdHintNQ9G|pPWqaL!p*-K@+;qjJqL-TjntlpLUXWQ-^(#5r)tLqV~{mT6P
zjwiRSsFL+tm}mNP`GrIGuKjB_WQ%=QpkAbs>cZs6lG?b_;a3C8cAt}7o_V%gmn{g}
z9lI$;Lf_o*;||$RdKVAgNWZ~gD`lONA+v&aQP|f<LjNxXzsR=Uy+@8ik-^cJ@6zNo
z%`a?S17AE3xWo0~v(#lB?eEJL9r^ai<fQwHBQaT%JEs*aTCP7~;<RVk9~E^E?yBKa
zRXU({!{NN0lN6_FdC0o0K80=*egEycZ<oE4v&dhx#iQKTA;tQ`oh2FmSN!rP%`>=G
zeX-)Le_4&OfR|)#Y}|tGok1Dvvn4k3Pu}n|?n8Ld@(v5j;ybV1&t8A>F1OS6WmEl=
zz=oLAtJQyOc=WtV&KMZJtBjA?q;X7if6?h#fgHMvw-`E~Hf`B<|JFVAw`=)U*F{|q
z_<i?aB1f{(+x?Tn4Yto%&$+#KP5ooBWXH)9*FVxfRp1n(^x&uDmy`~-$IHEJ4;Q7a
zUpVXCf>_5|uZ*MH9_h-c+{(|tdS}P#51Ah$Ij<YuSh^^AkHS07wP)9FPPA9t=BKst
zVf8ZkkZT9>ITe-Mllz`Ae~3QMpU*k7SacCb@KUL7#|+E=Yu@gbz256ms$6w<r(omF
zz3O>Y*6ZVS-78Feix;YWTOZzN={Y0cTa4#DgG;M@yGx(4)-9nBt8J~8)hX>03p~u$
z$9kO87SOMipB8lDDHqTB_*Y>yUN>%~Onn)>vOlN8{Iv4Hvbd+Gn%>we{hYqewzy=m
zny~OXJN0k#E{i&*GGv)=zwwLdkiN^OH{4H3=0B`Y;`-Fwwy6HM594F0bAdCnj_zYi
zvrkZ85K(#9{Sw>n$q!#JoG_jJ;2-z@rw=yX+WgyGGIGaS8Kv_)%Ysw3y{T~Cx%p1p
zp*EM9FH1WNGbbc3Wp7WgYM63UW8sly#k}`h_D^jQ&Ek@o)4w6yd*h?mKhMnBw_s{p
zz;BVArJa?wm+tP|<>Xmz`TY0P^vU<EW?bT4&$v*B$KT6|LB_1@U994!yaneBjM?XE
zd^P;DdBXF;gkPV3>d!nb|KH@Q;WR7fIny?LI{a3~#I)J_%d({wvikzQ-K=u?F@J{o
z)6I^|KaX7B)u0i5?vP2^GJ!MSHnf;~Sw?s)kV?DO;BOcEqo&$yUFG{akxkAG%pHsF
zHlJL#=)uKp|F>J!F8X77$Fu3zwuMSdxYv0c+{0=iAobeC)6?W#jL&t!o2Nf#Zmh|_
zlI^$IE{1Ilf4Yd;>pv{DPoF<L!85&+b4^57=#nqnYgPY?ANS;8Sap3v%~>w*nbOR+
z^*cOr?%A<^+Tl7ots$Ma?2O)fK24dkSDu{Tw(D`_PmZ`fi+7%4vksB0bhZ#uWUzld
zxqFewx(!p7`){ma?VFg|5%T=FNmq@}S}R9^@AgwTRUB>C{M$9dXrt)8zorXhwVtv+
zR_?tri^cy}_T35Dd%~Xgy1LwcUw1FDFwX3x!7{sv^$%xHW}CdEg7Hgpn&GuK%w2tZ
zPOWH^cNSdDVUl%!-b#}k-@k?0jPhQe&5t<$j9^P!cw%;(oVRIw!6B<qPJ!L}o5c#g
zS%#!?d31c=wBx;4k45X=%(XiLB-^BR`Ul>>vr|iOo$HA!3#xtDSp!_NCh7ikzuvU(
zTU7|pT}B>Hrnp)Ot<G#wsRuQG&#N{rC~aF}l;CXf`s}LMa*eD5TW1!@9WKtAx>GD~
zg;b2oO;O&C4;LD4G*+6f-#^25os^8aL{1mup1E<wvr@v7H@rS_K}oq<?3zRQx{6j^
z?)Ucu(z<v5xOHv8Q+fB7N1JTb?Vh}T%ExGRD*o`YbsPLsc30Qzyg5^A$9d+@bDAdn
zxh%cNG0e1VjnDV;c$JCU+8rzWqUsvB#Wp&y#xzCGuhJ_hex+@BU_y&^y5uQ$tp_Rl
zQvD9Iy<%JzZxys%NN=_3A>M}FoE=410%ugP&6=_6wOjB+bG4j>yY~E8zc6P7W1?`b
z!F691QJW3x?&O?es43Fn`M1C9?e%!q8*v{3)F=H?a%_BjY>Tl?58Krgr3<T%x%Tzy
z9hqxzTJ+kM&LaWZtghW>I5%wapMIX(?tOr5!@((E9&sNiKC69|k!x?w^9G@puh*XT
zY8LwZGrME^A#tynN3Cjf=6Z5Z?3g`ksg533etd>Zkwwqk>;JC@xcj(gP1*F{G4%SW
zYTo<2d++N%Zu}ci^?XjpeCN4yZ0=`TdHyNQ|6%R?#Qs4{<<w6OCRgtqX0hLURetJ?
zWe<F__1Ca<Y+&f++9O-^BH~NAc9G>e$0J?Ow%k{ZeDR{<u|e}n%j=(uzZ5&yHHpsS
zoqXVP-TN5<$HR=g9{#=mr>wG0=H9){h9Cdme0@6j)1}Ej{>a31sw-vm^DpqWzICMU
zh(P4AjMB>gc|NC;Sx-jjFz<2=O!!xAUhz<WgV+4^-9@e+tpEE3TvZJDP<GmB=cz|4
zR?nMSu{x@FZfAAj+hsXVoH<h8`%S)N)ge1U=gPHnPV8x`eO!HZrs!(#D3msG6Fsre
z+(5(RRn(Q44)6KrnSMUHE~~Raf@Qz)%DrA?QZpV*TJ=WNSod5`+=j>3jFm5+>^rOS
zd6q1HQdE6&(-hl_33iXKp5f@*e_n1!pM;Y8iQ1f9a_6os=Hy^IyrVH&{_CD!`g0yk
zX>Xk9a8N3OnbmmN!KU1hx3L>ONfa$;T_Cfp>G-eBGpFl@vYxCyqx7X<-K=ZUrJwts
zwUvjLO>b7n<VaPn;l5*<dzec-dXIaZfN+Sb)QK(WJPy}HoOSlUGvjXN(x0%<>!;O)
zv>yRISGZUWr<weiBjBvO>&mwsH#jUdZ1S%4-?ey7**R}D6@^7yYCNj_N|^_b-`ab*
zQu62Gd%N6C6IplOk<n)r*0puDaBk3ERg@9nk#FJ|y(iOeiLPh0NRhhO%Hv^;GEXdC
z&0KQq|FZ5^*D4D4%Wz$??Gu~Im3DxEn=x~f`8n?WcT%puVlMgm;oS$;hQeCcKjynk
z3QtE|Q<T-bv-V!&dflW3`-%@6xVX=8EKXY@EAd+R4EKR4nT3-Kt-tTvnX*>0EMdd%
zw~0}QW;Ep#wN8Jc(0Y1f&GRT;Yug-VML*Zm54Z}mUOk>ZqpyzPNc4Agxmru7O9eG&
z%MFhFYB+Bz*7=Wl>bfOPTbopDUOoJ}>8Wh|;bm%_bBZn$b$$I8TIQ7+t90@6QKKNU
zrS8F7|MXm$c1GM}R+Zt7l>&y7&Etbq;&o5C>4qF_h?Y|Rz`9{duajzOXHdE-htsJA
zGEa@RP0T#Ka_wBl-I>8Do=MCMlh>b|SYxnZLuBao>~1}apZ<a&S+R#yay}j9Q%?Ev
zIrrP$BRv9cY8M@A;}^wDaCT(V*_AGKc8<hVog|CaYvDcf{w9B`zrp(KAG^qoz9S!`
zuX<lJzSFaOqwgH;o~3es44;PZT%Q?o?aiNZd#O($kB`e<J-uzepUCNS9`)tV5C7ot
zQuVxRdcZZ&{CSAT_x!&<=FAAby6cMBtKdT~w>Ma()QED`YAofx;QQ@4*B*2CMXx3P
z>fb(|YPCK>hyC);H(KY~8Js%!w(6Q^o>?8V{m|U_DT)t5gSw-?Nqxw(nrZ*K&n5iY
z_SxPCSMI#Ev{k?Hbn<rtH;#j<BDF%H3DRq?AFEgwv|+#W!<-G<UY^=&-f};jL!oPe
z#g|!9pYpl0Cv;7Z)6GvSH?&?a_gavl{O8l)N8i>z`dp^C?%tzU8t=}#UJ`jDG)qof
z_4pdQi+Rj{#gA1)bovUUE_@)S^f9~f-4658a<zbyDRniKO_4F_Je!Yi{VRB|{_W+(
zTDe7;yF)+eHk+k3tSW8T$7N-G+@{Ur&XZ%|N{ctEt$UM`ZhJ)Q`$@x##i!o3Mze?|
zhHcw%(CqQV-&<S0IP0A0X+9Hi<lQ5^ru=DgiffD?uH%uJ`+2d?y7yd5|1*Y9)O>j+
zTJKnOk4Md(H970lf<C`g^gi~M#s2B)!VIzF{zo4%FN&Y={Q0Vk$jN#N@mqRocYd3^
z+AZ9poN4-@C*FHLJ&4IzGc~PKO=k7uUHsD+FN8(==m$O5`W6)sZ5GE7x=J(n@#Jf|
zbN@VgAH1O@>`&aO!m5Te`>D;}S}jD5G576jJFhMB;g(<V@BSzDZt0wg%=caIOFnb>
zp?6I0QAm&Y6M=^z(lrmh{>tb4zS-bH=)~CLDK*tDAHF!Kspw94|EAvZa{Ps^X|0Yd
z@0;B3b?!P<*Pm**E=9G+`qtLzU-{G?9ToM;w5~g!ntUv!eMx)sop&NkDyO>@(vI!y
zvtM)f$L&u$nv*};=xx69Gx1|+LKnmFq{Um-b*{^}l<KQ(G2=_q|F`^$bmqP1Tr2dM
zt?1SvTl>egpX*;%^R-t_R-JR=|4nOK8Mlj10yqED-FL~D!L@ag=fT<~A#9Fm?HQ+v
zOpeYxr@`pm(YGe^lkf5$eRkqrKZ55NZJ2#M<#97J-<v&$y;Y^&R7~AI$EZK{%C5&t
z8x`3rIN}#2D?ezPmX$r*{_Yd=-MqQ-Y|YQMoM@i1-&VT)<<X<@kKM0N^32w{(&MH$
z`$&Y?inlYmN(HyJ&UpH<-cnh2mGu(YC0#Gqvm2jVw>I^@+wHxMB6EMO2%5Kb)19WL
zFJ|4#DoNb)vtoBe;<N8ACm)*^tea(gp`tDK@QsIArQt$p#hcf#ZPl9*XMcFop;IT!
zJRiN5-4}89kclK$c&zvOX{(NK``zF^V1Ja&=FYtdHDa6CB^IBwFZiJ%G&@K1{-)2F
zV(;z#imjh?ICtTbZRVD1ynczZPBfmM{%_)Z|L;q#Un`R}wGYTMmaXtUy~TGaU)4m9
zAg_wkem<M|b?V=SK0m!l-A*Q0x?tCq-O_a|(>bnO43XJg{c#e*cG;uG+c^F9X|0=F
z#?baM<>{HDbN(y83*or@_VKd_*-tz4HQ(l*?ylH!ZM$07pB0^pzcYDFFiecAHux19
zZgs%XAZbH->#|w5yFZ2KF3FLQIdE)=Lh)S_|HNjQs)bDMY*V(M%sZ`gq`c)p6Nmoo
zMIUpPT07<$Ztf0K)cK&nd*Aw8++l@(=lS-2->><V;l*~x38B-KZ{><IEHV1iw<<zp
z#e_88J2}OxZ1trLs$%y^CR>Nz>OU%E9oZi1eB(^RD(~c4n@OjO#Wh-AZM@NQ=cS5W
zNw>Pm;|!&cNv+3&=0^uvTycCbQA$%xJ^k8Ew^=G(Uo<9cm3n`2>Y1t6F6O`HO6tEo
zX}Qo_k>e8cH>ky(k^3nUvP@y~tOFaGc1@J>-0ty1TXp}kp!TZUKZ}<?-_la{wei3k
z`%R*!FY>HicS~~S{&X1;?TOb}IXAK#f2cWA((As_%P>1*!wRRlx8nA0-sKV$qmtmb
zTJ<f9;g`gjM*pHrPDHKAI&YKr)iLdV;zg@<mNgTX>fSl`!IZsdv!~1Py5k+(|5LO!
zXR&Il7~Z;*-ElG@_~*>o3CoV&vam^=b^CMfi%zv|&hL9{Wca$HN=|EhUZVO@>yOEj
ze?d#;YUZ-Ls)mNe*C=d|Rr<5`g66G<*BHv$D%OhbV$riZXd0T||Mt)2fJn0q6F2*=
zDEhegf565b2DgrN+0j2wWE{Ki^!=!02rJ9u1&_JTgdbSF%jMHr@m<c2>o#1H++W~g
z894QuB6rxN?p>4GM7n!@7pp{7vwT?gy6H{tQ~MX&(+!1Y-V(^tk=Y)4?aEfZqdOM$
z_&U|{N--W=xhpRCWo_C2yT6ug|NJL<dEkM(O?oGmUtY59#*s4z+D&2$tb>#tmFETR
ze;*rtLNBGP`rtLMXRU<_Y~qW4hWDm58=krJoki%@O(u?cmUS$9FQ+ihemUpU*1g}F
zv|@_wHtl8>mF<f9T@k!JVR2c&9j}>FcFJo9SP3@mQ`djr?;<Vaedf~3#19hXa(X!*
z?x|FZ*6dla`EYww7-Ou`Eup&y<Eq<*w*8Q*`+H3B>zx%YEh{g4V4T0VOLR)d581~@
zZ~POCSr@dy!`0;8n(D&(&oN?GSvVIo%Wcno{y)R<hUPY=BMdb>>O;WE{+jiP<T)
zbmxjB*)QfL@usY&e@>e=@yVs6$v=5!2fcR>*M9R;#FypwBt`A>7E6x(5q-yYeA{}N
z2Tfi5-9m!ljq{&=*(^9)itFUocPl@>@J+Ehx+BU!-2Kg$jPD8FZ)AUZ&hq}J^z!?M
z3p|E*(~4r+%@{xQWwDqlY6dvWj0itkRqs^hrhd0THO^q4+YZ)Q!jI>goH#M}meJ~{
zPlvzV>Ds2II$7X)-HJ!=zBD^M-ul;Pf8VX+>0Uc79&wm;?^TYH>oc*a&2P<Qc?B&~
zwRi1gvC>)5ki7Rq$B+1|CsKPR_J;GvtxL0SP!3qrcJa4*n10;#1E=g4g*kidC|e?7
z)qRQm_SyrIZ?a?z7iZk6(R;f%!7X7Y@7(9P%M4na{;vqw{aWme!^O74S<^eYN_X6O
ze11)cgJp+H)QZK|S7@87o?m=>vEr^;vDS9+_uK3zCrLc>IL`Wy^T)p|l@~!By~-~H
z>JxTsQwh-Vc^Q?u)X?I<rd>vh3Y6X^aL&$24(t_I_z<jd?zesQ1>M(AtzLIMoV4<y
zujh>uHheJ+TH^adn|@8=Fl)PXvE!v#kGmObf8^ThGlbT+DZcn}U@r&rrP-mv{&w38
zP7D3zdA()salRK%3ntDzw1u5*;iU&Q)z2N*xu@HxFRe)zN-Hb8y!5Ypl<80L`SSZ8
zq>H9JH;P#(ebco@b^8p@YdstOKCD*F^yd0-^F-EU-$f;on{?kPU9rizJKv_mcP)?j
zd@CzX@x|Ak?y>o~dWp~S>6=#7GCkfC{U~OhnRw8~Bm7QAGP?u+ZQE&(De~P}>9DT<
zvfT&oWZiR|FEV}o6ltw5dJEO(Ra-l~2n=68<x9oVM9JmGx9z<G4rr%DJykq#ziI00
zC)HaP@D|*iEYNDU%kpWs<>wQ}GI&+xJ@2?|mU_+}a9zJ*wPbm`NswIGho9E7ryl=1
zEmC<x##}}ACuc*J9lXDnO=v~f{X6saZ{|8Y)nMN#^(A|)a^4+W;_mBX%~QVF{mpix
z-#=1?bv!EGm-B5iv6rl@SbkY|{sEoS)oct20^6TDyJQ^@P`!2Vs;bD^&DX?U-e{N~
z892p9`AhB;N6*H|8`n#AbpO3`gTd#G{D$`%TT>^_^p1Xhyfq|w%f}gqQfe%d)@1J7
zt+TD3gY{JVuAkjg=4U@GwkQ)=esIS_21mIAO`G1ere<DeGVbJ_B)-<`U@qU%*AqX=
zuDa;8^L@k{q13G#4u9%r_FD4pMPQ&P&x!b}3<*tF@)I1Ft~@Dxt0AC2rH(<&;pP71
zGgoz=UiW+B^L?){2fv(F(?<Ie|1t-k!@iwO?=3hIPRA~}#jy79rk3nbQw`oTU-cN)
z$Un$5dArKJN-@=qw{X!xi_WFz?b3O7v%IynDm>M=>sE61GO4VPw9Q-ByncD*_p%J@
zhuu#9c$nM0c|QsHUtc6A`G4lp8`9#;>IbuIgmx!B<GxqVlC-C%WOCM?8@r#ii@BwR
zEoHwiS>fstn|jadB-2$p_H?1mS#0an<yv~@mkV-t>dg7-8hzAveLMH=-@n=txg8QJ
zR{Y49`_Si})_SgRcf(25#@o;D9-P*3LSy>D(-$vH@ar_5DEGrr%r@w)Ua!a$cCEe&
z)u5tN^DE}m7d5UbYe>EKJLaEI#p_48?ICB^Jf7Zj&$wQ(F#LOenbbYoeQ_Zj6K!f7
z9VZkq?8`m<p}f6dPsjdmKaLtIy|_9x_GO`J&zc<}FPao=mf!K-wB=-3T+FG2cTDXY
zv~8TX{13b?^0#5X*BpDlf=%(O9-9UWy10mRTs_I&bVJB{=FZ=|q9=0}MoxICB)eDS
zMg(_2Vd1Ctk`%9{rH$*F&pGV;d-|4u3-|WJZZS$*H+Ovc!e*Bu!XJCw^!Nc5<4;>}
z^RM{ZWxat-?!WfU^SP`)zjZX#K3Q+16q>y0vFYmx-}s-DoD8;q9=*fYh1Vu>+8p^8
zep`9O&L0#xyIa>z<Y4hsE2(K~X56$*;J*LzpOJn^aY?x7r-{eE_%U9R5NP|fZL`Cs
zkVxeyhd)POZT}?1eBjC(qYGDB&c6P)@Ws^qzK;(-zHZwxJ$aRKT$`{%;jbi@P`x>i
z!n9b}*Pqy3!(q&l%=m7FOY?fYoSmP$9$pPrd@4U*e6B^zp&3VFZ6zwrUFLo(n)C9u
zcEPLlS-UEvH|V}szgqIy#(JjwnJ(vSv-aQNOO9sP2Zi`)Xm8i}vYoTXY{5Ux*R!95
zgnmC3qW*hzZ=275>zU6&xXg07PHR*vmTlmectYdrmxXKYFS)VMYk&Nm>$@^{TSPei
zUKE^q?CkP49<M}`cYI&?P43Qbrli})h0Ydle$Y{TJO6_A#VG|zk7n%6Q`9<;_1boI
z^=xi8`<?68SGE-%o~st$nYm1&PRs1d(_pR1SN=O$PrWO<_WiTB6GNu!x9q5I;4W&`
zYCC%7ZJ+(jA|-Vr%NgyzntXUAo=lu8#l<z>U)JH_%a%DEsYjZ2xf=Mh3O*9Kr4kXi
z%x(S|#;JeV;_`l4Y}aA_cRjQw!$jfquhNpKw{#mgx18!=UNl8f!{M22ON0;S`fR?+
z4VCK{rgi_E9eH!hoXP5k>K^=ECbdn*Lb$N)fn#J*)VBP}8B?Sks&A`I;^i!3KX`xl
z$1|3D1t#pVEVJ7d6IZiEu4<EV#{E^xqE{Psp5tTvG&dx4!e;|^ZYiCZ)Ja8g0*@bd
zXunUNd3)a4`=_>a7+0+P|MB#`bYXv$H}5-dnLK@Q_Ohx@&N=NTq9$KL`_H8pH$SaY
z`myg?Yh~o#cyaFc^0!Y#bSi{oCp*Ney6p?R@xa9WiU!XNNq6%y0rv83Q%YX{&HZ&|
z)xzZu6K$$JF6vI$BUs%q{q!GEvx@4<6F0gR?5&TL<Nv<TDtEh&%j@Y;2@_n8FFCBB
zbw+Yd@~7F3g=&@4K1FEcex9(W)8p?0!Cg;RHD0Tmb}UEY!pt>$e^j}>I<|icgD@kT
z`ZLzMl}7?+1?*JdtK8P!$$q?~Y|>?o_}5oOB0lbl-X(OxvtKOOQBEQAV^b^R#>6fA
zFEaOimb`oHX!-l2Nql@aE^M=_JpTL&ueLkulY_NK`~I&`TUT)O!I?JSEo!y_tw&$~
z`^Gd=c$(*I31#ky2Sl9LPM>#XCil16x^K77R>Vnf3a@;5c`u)_XYAERukKH;+n!DH
zNh+HA_E6@zzS2u?U6xyJo7SBmc%gWCSb$^0!9|VtekgVuczVbjFz`F+$nrvJNy4q3
z69r=T4Q(zt9O9T;7&1R{qd>;)`yS6eY&|+FY>P;}0H4Y|eYr5+rpE%(E2_1>TP25<
zTWLzh7+%=BsM+nq9Cl-)pzHS-Ecf@EY4w)uIV$iy@+rp_JHGakM~xEdGj>S3pI57L
zXh>DaJv951L402Jmqh*e^-1f(FZ|xqyl&UV=f|ynI{H^vZ0J$`7?`b_$-7qOMCq<W
zSwa#iA6%F0y1ML~(%t<BFUzuU$UaeCzsY9mw%P1X=lAnn{qm1v1|RbxzE6DrB6}Rd
z4oa%UUE(y)74EVMu2GA5b+>CW&-oe0qo0MR%WVqc&DnO!%b4+mI`1nL<E2Hd@AytV
zF^OmlzH-H})AQ?`4?Fc%H2yv{KlxD74P%?j?#_2-w!T~Y+4*jvXN}k7uKgG7xhKq>
z9J->8k@?x=8r$E8%=@lbW%&NfzEbyTuJ0_)CG*$Lk^6eU`H#0?zPPE1C&Qn;XY;!D
zP5-k)Hmqd9^aUp_849Xiv+(_5@A6SRep$yo`)$fGl5!VL7al*fZ7t`@Cz*Ot&8O@o
z6Hhyv)}1wJ2)XU&omNp8GRKNr+J(8jVt?I*gnw16%s!4sO4q)6zxKzjuzw~VC1?5i
zx&j~jCAB*(o*cNuIM#30DW9A9E?+gOrf~K~M!u}*eQo{w5#Pm1^}OmAu31XYzg1oq
zI&|(y((jZf*F5ahj81*DFu5qJCuiucaO9HRB)-#+h4;1bsV?_p$b6yHGF9cL{TqjC
ze%W2~)aBmqeq8zEUv4$uv4%5;6k66#(QIFvxl>(=>B_BEjSkn7d)zK>U1ZPcoL>FC
z;7x}5tAjPOZv4AlEMmW;uj}BZ&y$xjCiYM4`I9_P=c!*<reIXlwTi0&iasAX3TLd-
zdi)?sxm?u2HCoMWMueXA4&CXM3R{DV_J}0Czni2Ra@HvS(ca$ztylD8PH;)K|LG}9
zW?k!)_0zxA@%;AGFE92r8vR^)>yh3uO+QATrjV=7-0aVUbX#65OKbo4E%*Lzh0BSv
zGaWPX#e1ZeMJm;t|5{NY`*Kb2EuP2~JkjUWvnIQ{ZLHAw9lO4)VTyg!^fekPx}Q!Z
zesmYwUAlD99$#;zonmo+Y%6wk^|BtjzWcx;-)omA^u*5H?{JeniCw{<UviPA?yd!Q
zea~vhF{>IfO}ziKjO(nI;Y~p!h69J}4_`|?D(EE6E)%ShedA|#-S!zl+J%o+sP}BU
zDnI!p=gEvETO-dt_#ixQ#>#7KL3`%tY)}1o`y0b6^S{S@9d7Mz?%-A4$0ag*9kcR|
zxBaWV_McvN=1Iy70aLSm?^oU3w4d?Qwteg@oBJ|-xfZva-CA?;$ext}&GQ=AjY||H
zEX=uL^M1ceuZlI=pDz&kQD6cS>uNi>wR!wEL;H;NB|iGS@anHty>~2a;<d9vQ_pWX
zY5kAU{N?mbHfIC)KbHi>sn2)2Saoet@s#gDX-^L>`p$SGd!toV@oCSQJDV$gOv4tN
z-HS}_-E>atmCVZwA8*ZrH_aw{`GpqxztAgQ@Q3HLPoRDE?^l(~ZegYy7wzr7ToBdt
zPvK5si)Y*0<UO~I-*MmVKGyC2F8`|b?K5KYa`ld{^q-l(G%}0(&b#T4HKoE1O|fYE
zwrQQ?lyzU!EA$r1Wlt$PP-H(l>|<ZLoP1~CKPG?fiCyc%4i$W;p3S%Phv(<g=@tsf
z;?Y_A6{23mx|mG*w0g%~ep8FgZ6|rnXO$bho7K~GDrT0KXV<BGb(6*4^XeiG7RnmQ
ziJfHrWwMj&`Qo|{`gR74JuCtH@AItC<KaE&ROziWo3C-ha^Jp|%P}X|mPdVw^__X^
z@j?rec}Z$N;_o_rfBl(z?JLhi=Wp|0`XIH%IB({H>uFyMmV|#^cu+G$)N$%*Jq_Pw
ztohE1_}q`MI5<_;7P>x9o2#&gby?@Xqqp@-6HTVhyPa~+FLQ-qnfUs-j1PZv&D%8Z
zfRGi}8ShDH|0XEzJnhkZU;3K8<-R1Q!Wm2VA3mkK|L)&1Nw%i{*EVzgiwZq;sQYZL
z)T8EiIq$EA1XbimG6)8Jui&}%XSVWOJ}bf0cIKR%Pdq`KL67oSpGMAisL6lE<E(J=
zptb&T-lAj6rp+?>e^g=1>_rR<nr1c2{+b^C(TYc(XYnzff3;zIW4KRlJ#^wy=X%4F
zn$gDA9b)ru9`jGn418a;vLbzzH&6fFe;>8gCg@#KSW;Kpl_R!b*XRDd=_yC_Y}XV#
zeRNT4{a3AUC8e#ewh5)CslLqNn4YzS{}tQmzne>yr9^%#I<wg9mZM96!CdJN{~4D>
z9Wi#kbS-D!B-_f0Skq{m*y8hlPCV5S3*39UF6vKo`tKYMRf&IUKPIl3!*0o#b#%_|
zr8e=up6&SVb#>Kek9kV>Ki)sLIP<)x)InYrGws}!>rTvcoHO;R<OJ`+X6~w@ALWbW
z?Ej1H)bo64y=SKDUIWFSj=f52gFTvLD%jI`R_?0}PnhblGxb+o+%Kn!bH2hpuf9LH
z(%t33EpljkahKfvAM6cXY2L@;58mCLS^8~C{cb+(8#1--4xdc<XEtm$XBFD|A?@3)
z8^5IHF<*#|cA9wY<i1-=x-)`y?~W5#%n_<~W&I}Ax$dr+-bsI4e=YlCvG7ivae)6L
z?uE=>Iw~(pv-LYm8RZ?C&t&aU;32%AM^3E!`1*y@JTEU2=)I(G!1mv*Ff@A0u^CE2
zOYgPal06sF#QpAy#no9Wv=6Ol;?di<YloCWwf57fMa^I29(*rpF5SE@U{UkZj0s-#
z$GJreGNdeKDfWsi`S<Y9ubyR7^poFeIkU`v`)b<RUH2T^8@DFho5qyP`7zK~Vux>8
z3IBn4aUmx1N?klR>i!xri*0YQ{Kg*B8a{oIzx=`tVZLchH>a&Nuw+`NywA>Naj9X;
zKjk+YzeXs9an!3;<V^X%|1t9{$FkzvXUvzq4CW2?Fpy>Slkx0adiRz2F1<}!b!wkE
zcz#!K`1(A^tM;98XvzHimrps<gxfq8n|)b+ZpziX?l1Gs{#f~8HDhvSZnbv4DtG>^
zjNk+J!~!QT3_cUDe1&sWY?7tvTA#Qd=2FE9p_}%lq+6aWasP8dATHWjG<W{<C=;Pu
zC%Gpy@AtH4sbtKL2q{Y0s;?^8BR=DX?F3B~r>DYOMJDXr$;hEm5pR_kBeA1i|KsW<
zcP1$=U3u%hphIo7@QcTJdUtk9IZRb}E6W_h>vPW_!u-tMZL{8AR6mimHfsIjb8~9*
z>}sBCPknr2I>Utzr-d|y%$_*xIqxlz$rAjte(|M=m!gz?clFCQs83t3^*r;Fh_~zw
zq2|0ba%WAvPgvUii!VH4deps#&BSL(>A~!O9J7Lhu78uv>}2_IKz#m{=VqH03#|Pv
zvBL7PZC32vP4D^49t23&cl;0t+N*et{r1oE|3uPE*6OY|+Y_hSpvm{p(L%!SjBo3d
z1mzR6S#&193SRK3Vm-s5-sodTTwR$ogug%iqs`5!rv1y&wB1e1_uZvKKg#b<{#CF%
z;61aE(bm?PYNzx#cBae<&Ybw}YIkExbMW!M-m-gwum7^$*V|Ef<dycJ2t$!AwX^zU
z{df<~S&}RA`1$*T(=3^nFbmD~+aJbOo$>!l*2esx$t!P|Dy^EdOy2d~>73WsnHNT-
z9Fa~Ht5Q}!ckEs-hw3yY0X@aIXWGA<@~1l;+SyYf&p$okX0_So$LEy!cJphp{VuJK
z)G|?Jxhr@#Vp+_zdaJ2bc2fM?Up*4F`pI(q&j~}8j2G;6B^GRaGxfTPP9?|PbpM!F
z_nJNH)9ciKbJLc+*0R-~e)9AAAdVkl+pmALZhrYesLFZIGK~eRKKzN5Sw2hiOsnUu
zIkyG2C;wQXZMIwa>_nqm`<;(jJYLi(Eg_%e9MYqy{ya~v{+`;e`0Tr;zW4Y0uW~5(
zA+pTVam$z5MET3Bw)1Y6i~csp`F`kY)0ICao=FUdF#VjAu0HvdLak7>pyP_2H9sdi
zB(j~|`rmbP__7rjZbxO$(X8C+r1pH4q}J84h@T|_?S}I=UwH9UpwsZB*!IkaA^tHo
zTuJdWO;Ud_OV^)R-Vu2Dc<X$Q4&T7Q-_>Ey?=^0iBIdgJq~6DN^Lh2LZzeu^E^g<s
z@`{nn{?bznuU@a~(|&c3`Kk)z-Ah*$%SyUC%)GCk`j9TNe6M6i!6Zd{&7&#LOnL5V
zC>&k*D06#;t@4a-*%1XVBojXMn%+zCV@q3H@?-VZr+06>tn4&QdVYstKfA2^v^`v9
z+ndz-r<^LTSJ5=ycjz?R-X+I<1l~tG>ufe+J9XVhdFk2?X8BcuX%9|>r6wJIaQJii
zJ#V9qmYW-ky`;`5-SF-%To8HLuPE!lyq{kd+HHDZDRpNHd*}N@FLt~v-K{)vm;7Zd
zj>M<arwLW=+<)g-(mopp3wAfz7rXuT3&`J`)3S-f|Dc~Qx3o&tqq`Q;9q)Rj-X*Kt
zNtw!DeXKeltN7-MXDb}upI`BOeN31A3$3P-U%oReOpiRvy11U{+Qnn-R~E39y*WE~
z^0KM9O_sA87@Pc`s@LUxS=jw}{?-zoH<M~B`8AF!9X@?{q1w63=T3VshP_#1z1Guf
z=b=jt?ei0-ESC%4_(S)9bM3|hXXpByvw3$oIdoENf%2vYm4yyUWpT5VWjHpp%ImCU
zWppfD|Is{r{Sv7!f&F>e(+%n-%AP)X-^#1^@|9I>C+BIjU9(D7sd?JNEb65A^Tr16
z1JCsTCv{xgtA516?2hOI#sr?2y(SCfFa3%ZzwLjpvTz1>oWe8DOMR0<f|Tc^nD_p;
z?`X&Uq5Y%9HUIO+C+c-BkUsn2tEgp@t-h_GewIS@+YnEt1vajyH~DP*Gs$eynTuHw
z|0-F}r)7PVoaQuxpWiv#f7X}h9uHcAd2F)ZEm(S>d4=%ekN_vf0HNc{G#*MTr>C1`
z%@VxTbBH5B@yG37g=Y#k_UPPX>@u+rS$%1%)f~&z=kMCLcU?Gli;HWW{Mu`G+%on|
zxL)dhhw-Aoe2#dbDIO>5LgcUhP|^SIbNMa%b(Ir+4!4)sYG2dM&{%U*mm&YjezrNC
zt*%dhp4<5+@%xU2nIAd>pB^({oWF|u)?~XCCX?f@-20c>9KAX+ll#8xs^v?A-Y)OZ
zO}KYZEb)Nvp(SfW3PbOj9sVa=-SFEZ{S{9XufP4hy*(<;lYdF`i(lHjwkat&&x`xT
zt?Nz65lo36HeXJbNW6aJ_3q_=7=ParZ+g>GwezB_yQ!X=XvY%0naie%xoC4)pIz^=
zxSREAK2NgC&V#(ut29bWb}w@}QNX+SD_1YeZ9TEp1vgheJy@>9C26}*sPhHK9WCR$
z9h<5X4z2Frx%6hv8$)@)JjQ}s=4VaM$(`@jWjw{OZMDbEbIQkl+euq=KYsGsqS@*g
zXG>wXq0?5?rxKRc{n}xRzpnI}*R{KRs%O+Oom=A4!P_UEUi{m6Isc)&RPBkU=Wh+m
z`zgLUtYx0@LGhXlpS{1Ie^b<P;Z;q_66s&H^kmf3Qa8t!(=2#8*^9rdbMk)0vzvVq
zk9ZQ#?y}jRHstm<^vvI&`RHnpCAVnG0lWA6Z>`sLv2)Cd`x2s?AP_R^Q>?`DMp?0J
z4;Nd_cb^x>&FZ<6#eBs%u%I@BBjeD{f8F0yIl60E7NqUzJMiA2rB-FfywmfxKhFQl
zx+LpD?!*`0WJ)$E*geiriFKBq&?MzD?Z29*(p2Un?N1*Z`SCn2cj@6H34%+{Xw2H;
zR@B2Js5IjUTUK(`iRtfF{lD9>?Zz{v;we)!lU-_Fm#P2x8u7QaO6ct2{u;aB8$O3-
zB>dx!Qk!0UJx(}#UhHCx?Pra2c2{Y2X5UzQ{q8~Q&%zTT5@+)99`v@IptLkaNn{5v
z3uoG!dGG24`>K7}XF1h6%r<YaZaTH!G~wsz^S>S$vh7YN+Qj9^V`NvQfBw_=2gS3!
z?@U|yV*UDS#(B5aid;GI_G<Vs{T+)Z|N8vrbQ#~pAD8B`q~yilI9_qcE#QXR{-{@f
zBK|9BO%Uy6uARKKy!e?$@?YDeIb9*@xh}_|-}HEh@VDKmw+`!D*YNrMjaL=xTb?}G
z|HgTT&ZWSPh_kYFRppB_a-|=#``-G#l*?81#G-3Cw|>sB+wlGW-16e-8Y=6aH?dpG
zrv4Ur^Fi7q?^g*^meRrdkH1{C3Jg+Hzj)}nXNA=6PUVY{Qk6?eHncX`^KcmR7q|Rq
z4pcdxX1G@GRpr#UXHOgUT~>4!jOzVT>A^9nx3~DWoy=*YohQ>9&s81ERQ1!G6}@mr
z-{Sc%E~lLOH+${A%eRs_BfmHG+uxbS=@IO_G4!>mz^8^)=i00Ec=miOo!7Z+@BX#?
zoIU*^ODh+(ZY_^)mf5?0pX}nPUONA@{QZ_nY)uV4VtGdRd{9j5x6M3zCz^eKxN)(1
z%>R406OYH-@INu}%ky1D%zN+Kb{Ef|xnjc{PPfqQ(~jH=5k4$cv5+COe_Pw@!ws1;
zrHf{E<-8B7dsQ&^+r&aI-=~pQ&nG=R`z(60>AR3A>26o%77A|gDO;B@`Ejupf4tX2
zA0;){65A=S9%XPVU)nM6t^0=qj+?heG`zl-^2hX;$7%a}uVT#DtGMp+R$sl>wdQ2_
zio1r-w-&Rw?tDCbP0$LiJ*-92n+0{;W2Q^So+$q?o$J1#R+Z1G7w1;Q{poW%?#7eP
z@;NElX1|4(`|F>%5i|Zx_C5Aex$^pE(an=zPODg9{mH*%$FqRI8_Jt+7OiX(G7yqY
zW1L{5^HIX`xcrKRSFdZu9Dd$Zd*!v{CAF<F+=<Mr3pbd(2)Z`gn1NRyPT*}o-9Jf|
z>cdJG9~j16ydJyRCs20B#i+CcjA;(BoaJ)Q1<pv>huUcO*o&TAda&vB;?B6MrawiV
zv1WYwk@reE=7Y{1&eMyZbmx6PRb}(7{FH;$^qiAM6Xv~;|G2SX>7Q<8f2UoFF+A)0
zuiE`)@d}im@?S8!Y`%E!u`6Or#1-4m|2%nXYb)#V-FFT|&XxXq`@K}(T!RI2Q<qq*
zds<-pWNzx;bGbK{O%Gu(vNPUyzsbU(=0-<FKPUfM+kjS;OTB!@o}P%W<X^Kr;NSVL
z)%k1Jyq&pm_WO^KCYRR4W_-MM_;6Z?4cp8I^IX?FT6JuHpkeXuoU^|JFRrjwJ1yQD
zclXkrycIp(-@aTht#q0;%Q;NWICsMW#?Q&(Ecrk3U5=+LVp@Hx>chj06AzvI>@(%1
z(SdCS5ls`%c?8Q=$~1`7^u%or+-N-Wv6zCO&s*cnJ(u2`yz2g1y1wqMrSa!Vj{SET
z`=@!_mucIexcJRn4z1n{?eo^*jOTyp-n?*jZV*$beh}|bJ@!U-mKxmyr~88zRdQWP
z*%Q1;lgs^~YBY!8mpiOCPR5>y-e%_4?4it=S2p|gtuqPYXM}Cml>e1d`4&2H-pYT4
zJck{%_q8j`zb)AIs*u&`p;=@3ny;V5{EnBrn7{0saKRtnwvgp7H{1Ob-ZAq4SH8UB
zc4Y^VcN@i;9Q>ly)`v=|FE(et(UCo+s{NMamKcxMlNUc0G5vad_73Uu;t}s9_N-r0
z<urSvgb4@7|E!PC&eVUZn;~-B#{3emUUP;|wATXD;;xGl$1g9q&b~Ztex~oAl}`=4
z7-SmMPo{RwPHad$*xEmBM%x~KJ^y1BlU#Oj+z}{ZE2vx8@jNqZ<9Z*#IfmU!O4l^^
zPA=`>nmysno#q((4oj^p<|hF=>wF$|o>cG2oZUEIU~0pmTqD;f_027+Jr%iGO35u5
zLJ!*8F0LqTsC3SH|2ZYud-a#<soHaum0$Xul<Vc073i24_NZ+|#+utdSDEbQ;o2eH
zSyTEqtme&&==(Pq7S6qSP+-!r7b}{08VV(L=tb6;ZtoB3yt$nzqVmg)vw2Q4C+`w<
zJ(qZB;kKea$@n+AcR~w)w=DNdIpUXiXnAL#`4q#+@ekJ@?7r|?(|p>I^|sN)Tb0C4
z+Q+VNP}qFpj)GPP(@VJurZb1vd~2F<?YU0r!T$?gCqJHSmU19r^OF@uc5lym&K5{H
zaOK0s%bQAs479~J$0`2*rfkRXuExwhNNagOFGujJSu^JU`N#67-y-Eq1fNWPcVufW
z`){XHYMTWVg~Lwep8swCs&!HMzWE;)CLb}0Kf%G2;yvqI*}>0IL8^W07UrIrmiz09
zp%Iht$%UOkp=Z^f1^syE_AaU*t3crtm!5Tkay~a7bGE_LW92^t&!7IgoA<$_oo{r-
zR(?G3zu){rlZuMD;oZF}D(Cx)B)>ee^U;swgD+Zn^9v0V=dak8a-;Oj1Obt7#ea*`
zqD+5Gci!Ut$l=vnDXa9`_Y|`ywjJN+ci`WdpN7k$w=T3a-Mg15G_CZHe^B+>8q*c$
zuDyH8!fYY-=%%FR4kq?9&&#IsJ3Lq(By-ewQki<<b%mPv{utMACDG?bH?z3j9QW*)
z`5|l8Yp0U^)<XNao0W=r8yxn|>uC6$ek8!Xs^p!uQudYIvQ?4~o$nsH!~WBI^3v+q
z2@_H)YkvpxnTTC&TUc3YBhPg8@{AeMf&oR}n;3bsJnskou2I-8E@w9}VZYst^Edqu
zZl00g+9b4~YSrzXE}r*i&a-VgVqTZ`B;eSb>A%h-H~u*Lf$Ico#L|vMPfFEqtd^J~
zoKX1UjgX&N>w!7yTrcG#TO|0>rXD=5G{uNbfuFtWzM%ep({69$6-_k-mKqT;-mSBi
z_(~<M%|0oxz4wrr$uHF^%a$_t86wZ(PrTW0_Wns<*EGM?S-Y58MS1e`jmvlcZ2A39
zNQO~P+{(=3h>)YgYW3UmmV~s`unQeLxo6wnuvao)<1g73`n<P2;Pn3fG*3y%$e`}V
zD~AMgwsUfOracg{(JemwnE$?$$&tzL?uj4xdaiu-`PqIBf3MvxyLn}iF6XHwP1nn3
zz2koTLFllxd`E4eiE&5WgEkvS_P7j{6GxPH9=zxpulYu#cUfHE@5*WUy*{_=SiPPt
znR|etogqKx{%gmoe4nJZESINnhDe68l(?Q~&A+m<v7$PAar9m>#*XcQT>sx(Rms(f
zvK4c0Q`ut|?YB*Lsxj-4W&Se9;-eeA>qT7m$VmT)nb*A7$iVaEI$>VcfZ1}BADDj*
zKUt|W)m>8f^WI%*TQ&NXMNB677}YFFW>}Z9&n08I{^_(EHj^~i*A@J|pXT2F!~gPp
zgRe(R{~!Bk+9vs7y{P;76-VUC-s?{c<MNhTo@8>M%-SbNZ1XaYkavkY`uILRJHO)I
znoDzxtlCcU{9|yD_^2=;x#>mq{Z|5lYS%@j$_1Btv~Aax{diV8Yx+vwdN<yZ4T;x8
z4}>m${7YN^?Dko~EPS&Q?utAJKGuISV`{JqYb=w4{p;;DhwmM*@0a`PnRqR4+eNE=
zx$+W5lRP%+yMNF(;K(n0JAaDrdS&r<)9Q@-lwVtQw;8cAtG#giG}9qv?&g5U)#YoM
zPv_s9eI_EtAgi}&mY2AQ(zLg4g7=<dadkQzy>(^3)VvsT1$!M~nJEi4-JgBeXn$!r
zJKv05M<RCe&yM{dBQv2a!^H2M{_6d2n`cBvcIfukWSP(H>JXW=af#O13kvVtnH;Wp
zOW3TQa=xRS(R@C;?ADl<T))dK7M_XjxoLl|RAS|W3D>m3l3nNUvq~r3DJ%C{A#N=5
z^5|JFna!rVBlo+nsG9l6`5X7Q_1`0T*>;<p->%7~c5>?f18#N_;(s%<4!_9GQg>hc
z=L_2;$G%Pc-dP{yLJI#UTemE>I{VS<$6j@-$nDx|?ggEUl)wA>tfIk@hwj^F-wK|n
z{+4m)5y3m1AO0lS+izXipqqAorRc|oJlDv|Y;92y_8UjGl>dDctKb!=UHn8q>&&;g
zS0%OY^09un6~4zhs>NgF6W@m#afgFbX4TJ2EDv;BE#-c8pXTBC^DA#$x|m&)BFA8H
z$nwR1=KY~--tx%YGwj#nmHl*%yEs1OAw#7T&nwT{j@^}yv%FIZEDom_t-LO?|4a3g
z-CL9&>uw2X*}e4k)VS5Fjw{!69lK(3-erbeR<4PK+%B~Sp_loAkM<mjc&FE5$)3F>
z{luDb!I?kLOcZc9C3o%A#Fux^&g@mUdJvsaI>-L$kH<FA`ECyG@k#4THr`wOb%nsU
zA3aZdX1p_5P&oaUyTD`9H`nZaHNX3sE2mb>6yKm067w%QjyG)8|L<##Ydki(#yUgn
z^@j`o9?u;6?H*4%a&6Ndz2iZ(^Fm})4YHnpKP|gnhQrz}V#1-zKCBVdYyV~J%4cW}
zUB$X0qsh~F)?@31J2$#M(J}vh^yBxAhnrb!nD{n4|J~+XcS&G1!wQxY;=lM`gipR3
zd|UeNbE$f!+QhBL6Mx>@r*<}*al?{#M|q3Y`R8`3M-|n+{?B*+xog&u>)r?dGk5z~
zhA-UXdgx=~dW$p86HNBD|JI6cxm^7C*^8Ys1Nr~#=3DsWXUE>PSGum8JC^3C{6}Qw
zKiMw_7o@(3{2e@<gL#do@Prp17kzrgE#F$S<kab-%S(JVKJAQu{=IM7qs$wUakU&x
z7yoR{xTN68<h)-(%VpE@wab1z>=XXDWb55D!AllJn`ahJtau~+MCsRsc-1o3?&H&!
z7p$_{tM@h{P5!{?uvttyYATzT7wxZo&Q&*UuFQJ5gWoLYW}UP8P&4nJ<CZTn-gnBg
z{)A08G25pvc}8)&|K?f|+xJcJJtunRw>Zg(ovxRjAJ(B@V4&76H+@%_D`UtP?}@*6
zRGWr8JRd%zX-%MWd8zlV8l{+{ww>)WW-WJ|+_k6La&6plW<N2Vvt|=)xT|+ax4xZn
ztIAzd<o`llo@WOwX0)%^>7NqMn0_G6K>CZ@XRc}kpIeE>hq?-nwD(x+{a476Sb0D4
z`kc7^_CIb0&1QbZVV0Hh*k_y4S8Ru)7#SKH%qm*${_Wz~8%y_}e9?9Mv*rFj)7TXa
zC!UVfW?!cA)^4p+-`=~cIlB%xyq4a4VO_M^>AxX2I4q}cynf&Y^9-?trSq6?yfTZh
z|Eycu?sCiL!fE&1P+!>>TM~n|YQ;MX`8@d0P&v0{{ygdZxBdUQPP)7)jQxh=wc5+U
z%WwTM+W%$N9J#O3i`Gw=6nN{Ze71CE@D;UH%dK4QUAf1iQFVRURd4a&SuNtnYgqYK
zwEz5fyfVserS`AIPHcBFPy9LZaP`a;?@rgbT}V|5m+M^_%Ec<AezNO_pptbqzkz%g
z$K<jV9T(KHgt|X}k6pg}?9C<mZ!#Wg_kQL-&UTw$_xSoQ##tY8XJjeysb5gMC0TrJ
zQR#~NMIvHq?>RnRjZO3qO|@p&XZ_~xvfOK;wm&rlLU-5fc{6RDp@Qti<YU(@q#Bj{
zGFOx?n}66OaKYboV!dH6UTMEmm#X{{ou>H7Y)xjzHMWZm1_C`^<uBJPy5fE8rQe!|
zGbV&p=e%{?Id{8yY4iP^n{Ur}b=+pD<f?{qN|hDmehD}JMeF#@^|e)I6iZ#xY~1Fw
zTd_K_LE_^9Q&-KJz=g{Cy{lC?)?82)3^SN2BBVV%g5}56EAyYOUy-I7P&0>DXwDhg
zN{s-wx6i#l%zqTIB7bV#g*6^|M!jK*2a2C1X=Lvzci!BydiS*X9fi5wuBXp^|6+3Y
znS+~3{a%g}-wwy_-DKL9@7M8xMaHW3t9we_p_xx20-vNU>B^WHyzrlPfW`aUPa71M
z8D_lW)B7&IqcqcEPuHubr3Zx1z4Pg~_3QVQ1*_D)+&nC<s}Y#m_#=MpB*jZykF{T$
zq*rt47>R~x&28+R{I#W2Qp>_QHGgW3)Sef6>sAOeiLUyQHlZ@&VcX2L>!+~%m{sH$
z?z%6xj_vl}sg-*fC*{})UTr<~IM-r|tL2>4HMVw(RkI$it;%cocjNT?uM<8un4fYB
zP?zz_WPB{H!rEGrpEzsNVg2&dZOQlM9FOqgU$$~*n+)HFhC7iQf9%b|8)m$G#$)YR
zk{@zC^oi=3jJa7_%lSiUlwB`rwsGcq?J_aUvHpF2a)&aH=WMl495$vCe_O2*3e4UW
zDL-d+$~6W5Q&v3>KfDUxt*&`lvPGpi?8oC4ml(MP=31+s|6hF5Io5SaU+Oe&m56R{
z&RBtz?9M{*Uxi*lvz7;j2-fdk`6tM6*|8AzN?jEW+qgNQ`S0X4|15f7_NsYq66<39
z%rs>g?den7Y!~}{yPKk9(Wi6LlFxIGZHS;opHKOW%ce_j+4o%1VsH0}-qsmVW*;=w
zEp^()i5o(XF{s{*nSF6ni<95%wSq2sGIPCG*zY@f!@tOwW#02hp_ezSr7s`)C8oLh
zZ1Mg8=Y_}J53CbWpBZ>_;%T$`*JX)ozu&#ioUCQpuElcwIRB#wQuVBV+E<8W&FsE9
zJ7pfbDEm3Nb2Fwe*Y{3)u6|lpms34r=_F~PmnDr8{!Ixye#fU&ibGh(NA;4f#*$}8
zL_#j?K2fo8--C#=6=#+n_FB2!t8pn8KS$`h;{SgnYWkTE$jzQ)`)?Y5PVHSe!}fMA
zReJ})Y45)%b8!FOX>>)oLihgSw0TJ@Z!FB-w8{1puh{fQ+>$|ab#hkl{Ec|hoErK4
zK!<Q@y;tTN+c&uio9wF$?RULe6u_U7qA0w1^MT)zyW@Yz#$Vf3aEo_o)LF%i!m6i|
z8B9aOPK!Uj?LASbTkq`xk^NJZk66d-;^i=2v}oB3J*&gKcec76*Ggl26PNioAT8kR
zhPy$+r!x;o`n5Y8J`?M4w>pF+W6r_Zd*|2GzB;?4yv5{77{3F{2HCIs9+&uuM5o<-
zJMTcpm(4|<ac?}UIK`e_X`E~E`H^I>z=vz9Ggmy}XPtK<{NKK{GmG}-wQjrgOIG$<
zQQ4HD{xcS?ded%x=ncES#7}sx!kuYeaVI-j_8%1CR1p7AF=5lOxhv;%HX0QO+8?Og
zt90kO)#EcZ+HxgQyEA3yDc?{IaQ^<*-{CQ1ljQFEOXg2`zF(_q(=xXI48mK=i=>1U
zqC>y-6;+*@ntyEbd%@}%&4#R-ZWzW_L^L*)U($Mhn4xgytn+i;?`YT(#&eNngQxWI
zm(%=@?^Y^YC|mL>_VWFe8(wc*IYo5Cs?#QZ4_C#pY|gd1F;~KJ<(1#z`oWr)-ZGxj
z6o@|+e8trFgn7i(3C8i0O@Djrd?0qM-MnbUsYS&<LmhhmCi<>_u}w|z)X#vk3o5pm
z3uPFpO7%0H`y>+9TDiU_l~KNoKXUoreJ&9jK7C2K{$4>z`fB-+$B$UA1zD6mk<wfG
z`PRis)17B-iJoZlFZbwmzO8%ydWfw{;Qz;4?5{gkyjy6>@4BxjRQ=k41&60Dc1Y5m
z!hG+E%sjC-1?h{wZ}@!S_OdrC+J1*66t)MfX)53TH-W`sYR#tRH#+4%g`esy+Vef~
z*18Qhr!DvxI&1NdO#Aou;>=fDP4n=1{boCdp_r>6>+6GipJ(;=ZruLyfX?QwkLmF>
ztHdNbjjc-(7!R{Ehh2M@-c+ua)W|$Z_oQIU%_m1>TJ*o0nVxg0HZzW7o}AtmA=SzE
zqho6Vf5r)hdomlvcGslmi9MG4`{KTk(VWn;KF3eFf4{$fPt1`cR*!CVe>%O`SkT5s
zFD2XmfXA^bpPFP9IWJXz>_6Z-|Hlu}s&`U5*)BQlxqW)t0;Mg+jVr>`0s^0%vfuSK
z=BDIR-nw>;hj;p_ZWlL&92SyV&U{)iZtqmRw-1azFDYS-{Je4A%}lSG2W9?;l+3!s
zZlBz?Y&j2CjK$1nfed|N+^mK=bvJ+TXNXvxE#m3i=b@JQ>2m%>H|OBZO+g(xr_Ih-
zKA7L@x8^eUl{X7HdiGnmZ}-2%b?n9ZlAXVm)E}M@Vmrb6N`n3M+gZ20tiG8B9glij
z``D#%cYPA;RHm!TRO4^hY}=A2S9ac9ctu<t?@Q_6JF{HN<&q|z=XdTp8_+uCbxTU~
zz0~lmJ9Rq_ve~AE_}3^LbZ$L1_2lx@mZ0#UEqm7ShsCu$73lsfn|7*cWzUgi#){%r
z_SPB&79L8;mv(>ocTl!;N7}15LYK0?otfUeWvQXx_M(;YnbJ#U@7>C=`1a$&Nu}*i
zHm<HI5|M5*;<UKB+o*O;*|yv(95t(C{Djy{lOJfRB=9Om&vwt4Ue4g$>ny?&)e$53
z+5Pe~2Z6`RO18`N7M-8|^WA^FHDPf}yxk{C%;y!BI_|#F{|kRJM>em6sV8rM$azbp
zr=BVm9(?Q~MP~EniwG=<ahh`fm5J=M;7+4zpI~0Lz26g>Pp;HDvDtF<o^|;iXLx46
z4rFZTDU{iuZ+5O#V#*nD$6tFcM)}WW_Z4RQaCpVi8M_o!8dToNhRLmxu5++0?OC0^
zWyQX0bECgKtTNDgvp>)zf0Dzj^ZS?mpLtcz#)^|a`rU*i=k?yM>H1#hl+t!HKM*o4
zQt0cNmCzruKH5Jj+;pi!)3v!;%p1O$JvsPp&El^6g|4P6;tPL^=O?lixZ53(y(IrZ
z{;uhDmOaPzW*mRm`gUgJ&(Mkdh7CVvEZgubthceF*T7-*q_C6eE7PaT{q%X6b^F+b
ziq&(@egENYf3e(JjdewKz-&j4ts#FO%*u$D6L<L$aXZX;YJg5O?=2-pui~RKoSlpM
zyH~TP8!w&DdFTO0<fV(NKj!hqE&2XfFFdKA`|8p!AGO+|;=Eoj;&WKIC8Ejmr0dVQ
zt+`jVS3W=GzPIkVkHp>+2LqI9qO4O}eWdcPxExH1*V%T<l5xW6Dpj3;b4h29T=g(l
zJ<{`h*;B!~NmEp>tevgXXp$#7>$A!xv#+nGUzRjE`S-j->BF-NR?I$VBD+g4WW!YD
ztLHT8op#RVbYNe$Bxh^j*^<ZNhs_@ctqyk8KA!UK?Bpk!8a{vC-`lX(>mtwGW(zrm
z{e0@b7c=hMUp#MTf|x;_I`7fF50|gG-uy{u)%EDy0)uG<M~`dP*OvUf6d`2!@tGFW
zqTm@Wrwpo#u6r%KnJQw}YbY3!bZ_~IP2b-x`LwdP#Y}7M`|bC6JbJhn-jH~3<7q|g
zciqGHBw~(tEqItZ^TK}Vni{LmYny{6Og?85)*$uT`)^mCYOwbs=NDc%zpK~h&i+&)
zetTkZsED`crI%&CGhH_Zr21SgX0u;wQ}_PA;=w7e+9Y_?4X2g`o&NLrf8OGA+jt+A
zTAN91)Qe~Sw(>QrX1-T{th@4@?cVn;8PA*FQDMdz@#z|uTK&`GYik$$Yf`%UL|<*E
z_S*0ZO{Otkoq}I?o>x2($+qcU^SQDZ9Z93CxTPGGb6>V^U%Pf+mdKh*zc%LG&d;}!
zmgUI(!>!|Cu*YtLETa*dF6)hKd95VB_@j?%)-xRH3jaO7HfMd&goh7TZw`9K^x#U4
zy`_}(mG`whpIHLdyhz#g?19MCMT@T0&xlWy7RcAMDirgI{^HR6<>V(fmZ?VJ*G~PJ
z%{ANZmEP&N`^}+$IFnVbURn|H?|%NA`1KKAcQa3@FnuSa$z^D9KqAVzYnE{6%h{WF
zV|VF%?<~K)A*G=1_OAmkc(14wOY<r?T{(1tl}T2H<A`PdvUvxS&D6U6^|$=EcHP8#
zqH&^u^~uAX+4sKgO=?{&ANewpb5+U2Hw&IFTswdL>=h1G8@}b5E{+UZ7`bcSjUzfM
z6(>zgh~(YZ|II{Yni=!Kb8~;p78JG#<^5}Prd^)z*{#RxpL(=^{Ia<>qo94&jXAB$
z4;t9M`TDHMgG)2{>>l06emAr?_kY{mXYTz+=@w7gcESJFecwgbt`U&2&9SJF=6t;A
zNWJ33)T9*k_x6_gRZaZXUFVyY{5e!Qx%-Fx2cx(T2HpSvlxNO<_dV!euk(%UMaiZK
zJ?H0VuK%bOFtg@&{5}7f$K_(Dc&4kTNli)#l5r5uGxs?C=v`gXqI<FW0*R;BPSw|#
zbx2^*r$AM9iK0t^uGO=Cv(BG%Hcm!yR_WR^w^`4|Z@s_%0P}&BQ+{suo!64qmRac`
ze4)R+;>^QIeZ1FyeDK`+xXSqIWJUes@sl>$&NuvgyZu8V=Z>3Iv1V^}Pw4sh{NbD&
zKd$LI!N;yHS$zJckfpfn#+k}FE)Olj?;Q3HV3yVr_Sin<`{7=P%)iVV8s=$iyt{Kw
zlc#=}*uRRsi&e_^pJcgq`1tHkyEgsvxgKwr;;)i0;aFyZw`RJ4rK92YiS_9hyz(R?
zAIkL35uR_+_}D-?BChdSuG^1y$&LQ=lRw7Abn3@eM*n74h*Nv1tP__%d!E$gIlN!9
z=A1D$@37A^N}kMXy>=si%f?FQxbiJ!*|(D{j~5h&uWNZIaZ~cl)&6~}0^iM@JumL>
zfo%t*`Yu2EpmXrZOa1^E=DR*7g^${qQ;)A=ng1_nN2G*Q&}*p)MM2jCt`!vRTCp~l
z|5}N|3FD_tLGzwV$)!7;(MVo!!*74pJCWo`rWqwcH?QB)l>aBT=kbc(-GwrZQfW_^
zPgb~XTXSeaf<?15b8CM&_ngC*Uhi6EeYm#lsjT6SJ?er-J$^ralsdPdh>KzUJKo*0
zb28r8p3A%MFWT$h&mnT%|I*tJmN&QWf3EgL-OAHAj&boDwT|`LOVaK|UD=eIEWtE!
zUyznG^X)Z<mX`eZE4XRu)Hu60W^dHk9a46-S#7g?Hm{<BU1-W%<s*zYSq1mZUcvp;
zyzYbr=N``odY_HFL{sf|R~+NIb?CI3$n4JiGd!1{7u~pU>toN|;;qF_$KNc}Oxm_>
zdx_BeUvkA!23w6k9QpHX)9S=(>+c<F<anc_Wgg2!pZ=<vwkzN8=F6`um@X9WDtNgu
zH)r+)Bh&X6K3<;S^W#+MQp;>vh4_>O>b1=IXYcGe%=r1g^vAGG&Tnl5taaL#T~OT}
z!eFs((Z+y4DV;rv=M;Y>Ouob;^GhT`{N|Yy8RY}lZr@n_T;`vDXZyQ}heMi=ra$TV
zWZ|2a-+DDwZb6r+T9z>95!P9Le?K{Idg^eY@R#Nz?e~*b3TLxt`z!lRjj?`jGjUPp
z1Ey4$vgtm@e_Re(er@Gc{Y_WTcyzz7nY7{g#T@VNjMfKdB;+R^3pUIMQ0}thJJL5V
zb+xwYY75IsgXzhK&a9ktNM_aw+Zw;Cy>nwa=k9s3vvkXW{L67gJX3rYGxC4`a^v1F
zL+RGL-!7Zv=|-Cf?_zM#HkcH!KvGP5V$-6B$x2I-c5PicV?&TqcUHSmqqEG1y8nFJ
zc2B;vcokcjOy@)!p(^I5&Z(Qlx0%g2XfyfhEwi^b^=eOd<=t4YFJENc^GEFsi{9M~
zQ|nCK+2poAvLg0bgtdA@%;Jy@jsJF(w}xi3beubRHUG`RefzX-_M8yoyn49Q=>AiV
zVn?r(x-Tm~-Ii^1J0Ey{rs_SNrCs6)ZH!@0H|&g^HA^S$<++cHlUtb#diPtO;pR=>
z6#1uU&UV99!V1s5dqTXN4KpU)Nc-wBt&6SRp(|keAMGy=X4*G|*cx}Oobue2>CN#d
zGp<Wt-&D7EHOJ1l`+R9l;pq_j^UkW~pO4=T?McgA9cz*1DY9L=Zbo%${%xnDp=xex
z);n_X?_IX%+IHOpGr!acmlhwYJKyzP=tq{uvCYv^*K8d9H~i4EeO(d5Jn>7-=HfuP
zORIhxoe4TTS>VU*BWZgdHg{dxU9YLLblS={r+j+t)HjE0knRxYD7aMoNqGJGHw%J2
z`6aI^irtky{DXDQ43i6$K9;JhcXi%-BBjfH+Q9$Fn)b!#|HfYkOyc=<p^Z1^mdLa{
z4l~Z3y!5*AYsAEli~<I%>-NmO_33P)BwNrI#o)^08m%73mhRb7GNWLZwNCi@l|Pro
zM%K7rlfS{E=PI^gN@`W_URJ9E`wy_rI~DNilZaEBJ7;qh|DBwjw@f(Zp4fURX8xLx
zXj4h4r0R~gurkqUWvkw7a+WH+5vvvu%=~?d0SD8IHGxs{iZ!cGwnx1;<QHjtW23Vv
z`1PTxU~{AXkYy!SuFSSwx1O2a%*qy(R62RXDsYFyH`gwyH7+-g=$p(w-@feitYU^(
zZ_cl}o-fyUEfivN-+yb5;N5&Rwq5=EOg#Ey&Q!)EJXpfOdh;Vk<HEW9zl;Umu2GRN
zTakO>!}ryRKF8;>S($Ke5qsQ|qPy-^wPrQrv9#GNje-BR1oUhBX<p|S>s--a`!Ce+
ztI9Rr&`%5ZZV%L*&ZaICKkb@!@ZU`b^<H1t;}d(RMri4p4gBY<C-Pnw5s=y$H09^c
zH{vl17cH!)%@xhr5>?0eA<X%o&JI_0XDQjmUb8r-AG#4YVOibk)OTN__-1VgU{;At
zHF8Ou^Z%UEVr!{)7j`N9Db&l6eQi^%`Qek`%e8;@Xz&^~?&FQsxO&^u`};>%<+Z|=
zCszCY*wZf&r#Ootc>WZba6Nvn+ibdid{NF{<hIJ^l>LzEjZ<EcwPa`JZ1%Fw3CSAn
zC+kcmYh4j{H{AV=>+_sH!i9Rvo)-zPboGw=5Z|+yW#<$9q*Ib-f4;K*npsiO&wVty
zNH~ru)UyBQAJ0R6q5%uinQeJ~=n9u`-QC4r;<W5$u$F>(OU}h(k1w@~|1SO{rP*X!
z?sCoP&mohK+V3*lPegYz{@wnwZ{>fFr|jRtog6KV6Xv`r|GH^QYjXzA+MPS%&a-@-
z=s!)>rLD-y;HBZbLp_dXqwYN7*|LGTjZMz&;A`z0;+NJvuJv7PYW(f``gJ<XpP8t6
zhO+;iSH5K0oJ0P-Vo$PrBf72cwj2#RF^&IW4{!Sgt1s?$pG;3>SeT2dtGb_=qgW?B
zH*Z<>&bixTcJSq_@JzX?H8pFO?TOe}+4Rjp{Im1eu5$=2_g<rYWL8^p#}&>WtsT6z
z<uer|mP&m-e)Hnay^`9D$7<5l*IvHOs+G4PXy1MbDdFnVf{MM4U->6reLLlSsL8e-
zuitBLFsaoXtTbDxD^hMyn|L_>ibnP87Y?5PJ{gN237fb5r^e+Ar?PYoUfRlQ)LIjC
zZ-3j3@Rf(IDQ$n@?=5a_{Y8Ii{$=-TQhW<--#Gj;^!VadsQCAit$s)SQ~}=lb8|!0
z&0AWz`~+)6vTo0{GEDz;wO`}#-!wB8%QN*3GK(e!&g*+VZ~csPfn7(fqa;ciug%_j
ztKqws#NEX6{`_^Pi`C>31eY+sp0vg8nX^_(4O`lx-)EjH2+rV*44lBxFts<`b9u>)
z>X2L6k-Pk-xZRe#W~To@vgK}Q*6*OUvTrV@UkG1zXWb{=9+m$8F85m2X_sT~_q}25
zJF!jamYsWp-xBj(McHxN@9tjk@bi^l)~C;WvN+(k=}^w~E8pAJ)z)rf2#<CV*tp=h
z9S5t&yBaNjrz4H*mz>UA=kE)S{4@XKwp`X#`*oM3tqgwF9rbagn!q(4(W`P&oBl+7
zWWODMJ4ozX|5V*|t*=>UZ|n*ay5%$9w)A-BFZO^P$BZ;gmP~N@a3InmeYfd7`KMQV
z<3e;gA8dZ*@Sl$<EdGyf`IY#nMUtlsRxh}jt6u77l+XO|r-oj}@<-9re&y}E<TCI7
zymbBc+Xv@1pRS#t8!nbnwo7UC&yZ^pB_XXT^Y>_cdY!(?Y+Zk}XOTv0nTDZt*CFe@
zeaBgTZk)7WVO-Ax&BWd_mRoBNL~L9Vw(;KG3jZq=Y5)JLzbwBdm!zCn<4}7=|AK_h
zL}e|Xqq|hHKXW|RFDm?GFt_E6*^;^cD`qoI347EM@-V|aHFH9tbNb!=X;-_lZoJ=m
zm0x)7v{k$b{O!iA>zIOyPw-^wr%Y;zosnPkCvZ{xj_K?lz8VU<U$VD<qR+*r_fI*M
z<K(Y(@+X2O*-J&ac^nKeEB{x&<@}@BWwj2k|0Hc;@;E#>z>PcO$yM`DR?fl}g*S@c
zO=}9CaHpYRV-@$5m$Ghp%dXrF@iDIbZ?I(Lw~aRUa(sWre5sbnV5-~m_ea68Ghfb2
zC0O1GVO8E-8Qv6r<=L58)pjm?OexE)w<u08c)TZMvZ(-D^s0?&ZW7$uHdBi>-bs2q
z;b(8;>Z3kl4?AQNZcCZ&&|aHY9`$;G(gKG)U!rDQ-@bx%Z(+fbo~b7lPi)$HSW064
z#ah!uj-GM@zbB@C$thPKD?Siph@PqQ<#RD-nY)$pUcXHTY;SV~RjZY6yQBB&=aIsB
zNoO*hLsyAZpG;S?*Li!RT*r4py0f<C&v?Phv5eCEZu7bRl=dy$SFv8)=KG_?Q5Cn$
zJ{f*5`F84D;E$61s;Bkb-DSfPt%A4C7IPLelm1zKq*~?3@Ber9%P!Vm<RY@YHl|uo
zqLDRk?wp!6Ys7^v%lv<`B-TLEck0%@rk$occO|}jJmFn(dxu3&hscFV+LKe1zAkz<
zE9h2@PC{Uj>Xv!xi;6v$YuMH^HMcM1pH+RWu3sg}dDe&W*z+F8SJqn=be~+fDYWH>
zb-r>zW8ob&Q~BI*KGvICitN9wn)cXxkH$W(f}L}YO|$Ruj(W=!`{{6ErLgRZr#mXI
zr#>otHPtBBpC{8^s;%tHRqg}P5o^9o@^)z#h(CSW?URu0@eLm`uG!zx54xtT{bkz2
z<hdF4s-AU>cg2)m9^R0}qg3bG<@8c-?%k+$BHwH-#a@2*Zldj`Oc(Zj5j*}Zy7u+$
zk8K`DX0fc@SLwwt*|y-6Gs9grmQNmf_YO_GD=4T_&giT0`PG&UVrB<tN#8$yuG8Yy
zzO5k=U$0K%(B8ap@rg;>rnuERM!(YP-Idr9F>~H^T@7zn=2K;_p0$<jeOP-Z(XVQc
zO46;m9)a^*Z!Y(&I{bWHwYZD$T4_n&72?yl??-0t+dB0O=Q-Q{nG!P#KAkF_es67s
za>#D&jPSMU2G-MGM6(9nOu3=4kWcWM`rP^QNqc)X=*As>ZLH(b(=fm3_)Ed|Iz~0l
z>3g45s<C+eo89fQI)0VfEJ5$PpQn~x*XLM!__?yy?dQ)f{yQir<Kg|h_&)3J$fWq<
zr+2<TtA1R0b;@EVoe=SxbJxujwYO(oKCRMh^X7B^Y$ov6N49Q=a>)6?wkKISm!a{l
zQA9NB*NW--KQwAGPS~q|`E~s6-t-;2Q|8}TZU6G5z6O8JyohP<5A2^dH`cxQghs@H
zP`;^!o0KaXUwY_de1CtT=2uY1dCt&32mNl`Y}s=4#r^Yg7nIY#y_(;!<?YlE{e^C}
z&jU8|UyV6`?bi32`njs_zIv8*{62H-U_kt-`kv&{UzrsvTQr5fTwlB9R<eg$P0>W#
zxNybTWBbG3w=><4&w6lp4#V#KEBKzxp5JLDYb&^6Wsv{Af1CI4F5^6yCVI+PGl~D#
zb$hXMzMrrBX!~>bFay_Gf2r(tcN>|<&4Gb?9v(h@k&~<8@#(jU8}bg8h`Dpmcyr5E
zM%A37GGAq<+03l=TD@2Nk#m&X=M*&v8z#@!zR$?!<f-`ZRP@D9sX7`l4soZy{J(P5
z%j&Js&tUyY$`^|_H}e+%PtBQW++1~H+RZE54LLdjlv%gM7qcYo{}9#w#&=#)JU^rJ
zZ8M&%hkiS(1y^-n?{Urvc_Om9@5WZyje9@bcRYUJhFQbvmo*8RTa7l=?%lLgbZMIV
zgb1c9CD(!yzNuJ$oVM!Z@u|8OWvg8(XFbx*c;isMv+u6Ku_Zh`FD2)+hNiJMFkOBf
zaC^0f^tY39>*jy$wF)<HkP>z0+bFO^w{c~y$oB)mIbn5gFSk{iW`6B1yM4RA^3+NT
zebY3BS6?Il-df4WIWcPD+&#h{FV<G)U%90p8}(=Z#x3On3rY^(ZLm93dgRpG`ByGy
z7L@)MUto7lWcB8(Tg?|#BLZ|E*H52rXXB^b7Hj|L+L?JD#a+Cf<vyFeGf>{a^k#tR
zN3COXZ~uxD<b9%(&(6krWzM<ZiH{o(b!inIkN2<32>x?NL1>cRT-yd-$@NFIxW7)Z
zdD8tsBR(qS_q|i<pO1)22&wO8@4I!fPRZHh_sYu~9MtXYvn<LOPi-o^$*@*Ru=k&W
z%e?URlf~}ETh;}zDV<o<u{~J4)A`7${oChl+4d%F`nK?ie&34n?<M_JHLca#CB55W
z`zkLPTb)<z^SBH)#?Gv&yu#yM`f_dW(_=X=OTXqS^txAEm~r&bD(Sm=K9}a#oNJ%N
zAO2q8qP%AFGyNXzMZX>_>vj?B31(Y<{y=KX$ApmGzud#aH*4l;bssyxpIGoZhW%B@
z&v{c_W!^N^Y|<-fIW$+Ke`&2jh2XkP`6=h;3+;Kx6nnjU<wDMTHqY}H+D65{)935n
z*{W#VsgZ2_UrSzhCfBsoJ?d{hs9tIRaz-NZ{j!zmsR9%4r*84_5niXa#r2AF(Xlf1
zKhI;;Kb@Od5Y^p3FV|J+)q#-Zy>sj(gSY8<`Q)|)T=+acyRY*1SKXCcXN9|UpLqR6
zbhc!3w502{s|)gPXvy3cU1RuR>RQ9lU!}kEW-qZ?W7SZ9Oh(3M*R4Ad5r_Id3C`-1
z%s-uxWZx@!XMb6afzyP<EqQ0Xc@j2VJEML||3M0~|9ZElyj6|6#hMrnD_R>cp5La~
zGgCLCeCvcj%MWK(GT5-(J)tR7yyXLf6!V^W?7LO(20c9Uw2=L9_`KVDKG@$gy74FI
zvDfUb&&f`|KkefF5n3kyZN+@)|4hxQFG5a92M0WNJ69<xoALe^$D~y`n~)b%BpF*6
zDkvx@7#gG+aK&xC%wx;{``~#q-n-5jbM7bo*137;?Z4-RjkDRcT#q&jlsg~K@i?l|
zXupl=zx}G6?;q;~**8kfKK<|TvX=5CM`hWBf1A}!>GZmH>7>ufQYoSG1mUIHZk-=@
zuAPu_ph`UCu-PBE=Z$4k=P+AOFiL*0Ejqo0VM>dGb<nlNSB}iub?r?5CbMTxKYe|k
zK8Nwma_MuwUllQapJSSC%;Qinh1n|bthH<C4JN^Jt#O>ck1&;NIvASvDaF~-Uc)*@
z`&zmCqSFjBQaEqFc6oR%j&<d)+mBW@$F6zreUtT<<crsa2mf}9?)t@T+u<F5BWqLm
z9c9-|pR}eVoHCm37$-A-p4jF?b9S{qzL0eMSkcj+6W<4%6yB?FagCIK<#m&Xv7c5Q
zIWfn`;Sxvf#~n-5wtP2zcf3*J$(kRh+g;|EWITPGBB;8Qt@g-lEte;MautgYODE;9
zo8PEw)((`J^DD>jnr&3rua@GcI>wLRas)4)ZF=LhVx>-akKbvIC+#V1_qRpuVPE62
z@%(OIkL&+xp3hFbBQQlT>DA>$Hth==Rd@sEI|*G`a7=#w^vCZ`tiG`4LB)%wvD196
zpK$v7BeUc2-WiOa=V{!JI52Tqe(TNKx4Ca_eQOzf{8#**kfs8Wo6k>PcYlAbiHG^Y
zlviF%t3P&zKj-xLW5?dsq`TaHNyN{ye-4JR$M2H8zCnil#)R{0UvURoXs=(iaJ^yn
z%HTy+S+%RThQwUSJU)%#i0&TYs6aKJTML@zSZ$r(m@6oJLGFmaHkYf)?`ExIIW%*A
zg8TZ1X55)9dv@K<`=7H^y2IhhVTT3z{725OeX_Y#l+)<Q?gMw2GSob-_5FUu?Z@?1
z^N{xT?#!uqcK&i44V9XHMqeH`N7;Sy+22@w(w*h+`fIt&y1X;XoF@5Z?mnCT(qs43
z%RwxW?9nxw)u)&il?aQtS{^OFne8N@n>mMDLFusUJuwNE2d1mux37G(YH6ZCf%De6
zYyZ0S-u&*ioP9ELL2J=dXP1kff3^G<+9hS*nyXgWu=n!!_UU?moThZGK0oK_(x6r1
zaWk2U?<Nc1?wkCn;K8X{C9X>!q<&g8)m1D?bl5&w(`Wk5-*dnFZA^|^{Kd@a)h73f
z+Rwk{|0tK($+YGDqDMQgiTHmG&Az~B^JT@tH{0JXxo`Y&Ih*ant%dzhys{00woG<4
zdAMG2Q*ol}5tsUAEw5I7e>>I0uvJwV*&oiRetF=gBO&)aTkl}&ypZ;{QgfF{Jb9h{
zPV9PMPK*D{6J0y{S7%kbX+O-mqL473L3~NarK-6Bk4i5&{JFnIqT<Lbk30{H1M}b5
z2i?CX+HR#7Id$Eo#_7+P`PJ1+cUIjhk}AET>UHm@ckr~$sXA6wOR7_s+ZG>H?{*Mh
zFRD=J!8ChGoosVHLqoM}%hy7qdC$5lo~*DsQZwaOy|85Si35w)c)DulZt(BaaNG5Q
zwc2S(OxF6n7hm1Z+Vf-Mg_p9TaXwo(s<xfCzBVo5|NK-T-Ak9xl=Z95=9|;?!&8P$
z$A0srW%iNYDb`+ZEu{WmyZb;;KdIYF>(dnF-GA<BN#Fiu`)S*u*28DIJvvq1z4j7(
za=2An>*(y~nfo4gF1Y$9?VO;><Tc;jyS)xHsLp;6u~l#9+ZW0bw;yQ!xUy{9HTzz<
zsgk@$4L)`CTPi>975{T@N6Oz-5|TUR9-UdUmGQXWjQ&qY)V_;Lin}i{lF3NFS76B3
zlMp|9@dnpjw>wVQv{kS!@7-h1d`#1yb7%24_J97B+ZR~MD=gc0_FnFUo64uJs{L6f
z?<9HZcY)#4i785E2^@!beO-<{4l&L8^=M*Z$@v{&>pvcS&vE|huiYUGMk?EyN<?-l
z{je3zS#Wil?~l3mlOJvN%;aMcnQ!#0f6GT(p1wu%k8qR=t1|u&=j*@!F4*t(!o2<U
zU*5gh%`%~oEr8)$q+#QetY17U4jlZ>bj!u#`BBLWYZA_jTzCAtGqy|3eE;{9>kKz0
zw|rE*WT$jIX`1tErxPJfXP94~uRYPO==X@vE~<L#U(ZeK%L45`Tc4Zzf&Jc&naZzM
zc}?uLWEWkMdnxpFTGk^|PRZkbe~nh`^ELKAYo4suyQf|`jJ5lE4pZ!nz2$Q~mIbfx
zWwJW7DBAhOH_lsavA0iNS+4w7M%Q+q(w43#a-Xti-`IJ3_NhOQWn1@#YH#@^G9#+2
z=t<-j-*YLVA5UjYy7i*^*qlfftuJNIoxVlBOMNb&A7L9hced=APoK8*F4O+#x!v2E
zl{3^u@B<IyWzj$OXE$BT%5l%Ud;abDj2RBB8XtwtVuGR)!{6RFd9_&br263!n|CY+
z_;>yZ@5$M6Su{T4dS`;lBY)}e)c)*!i8nW8KPc61oOdGjp54jSZ9#V2OXOMi+CDO#
zc(-0+62s>c*IiW)zAAb&P3Q0a2YhZ^OlM4(!UH}nGP&|0h;?4N;=9!Pn4?R(7wmR%
zQ<+_L$0tK-%kmdIogr^d_;zM!2Bq=tkn^jmC<^DQ|7Q{Ksd$B%cuTC%j#F`qPK(7b
z-dBvD^_tu1Ow9baba9>Bs^WdAcLSPaOKzV(8g*Jy^~-i|!wlW)A4+1Sb)}iRgyxDI
zH_4m0Q8n-$PssV3@lVzo?`?PQUwk9_`VkW!3$F!l?S9|yj(<Egv}!41Y{{xm8ziRr
zn--Zfr~P+MxN$qisQ4~>>1y6a2l>$U-$~apw=8irKi{$TvCtabmvh(t%Gr^x#x78G
zPpEV1jXQEH8yD}YS?L|R)-GLduaWZNeF@*KO)BnX9w=J7?ytRs&D3|{Izf(q19VOQ
zmdTk;xc0{DJ%3<X%*`*AR;fwTQtNs=-NgBX9A&rv*uP@a7Ax<FM04>6l^K^4uh~tG
zbYvF#eOy#^PAaR{n<I)n5$8Ng{p%*)e7-f@+tlvInt5M7n5=9}7WyNzZRNMEo4#(>
zH#$D|0?W;8pZAPg?>iSR*Y8X_$#7z7Izz>~*&h~Z2yOXX|Lb6Y`Pb%u=E=;~4XmAK
zA5DGnXW#K&%d-NU+uv-7?))j^-uQay{d<nTFPOEzdfD~UepZy@%dI-){ifklDy_fl
zGgRGc<k{O<ob`HMeB_F_pKX%i+oiYud-7gvyVtfCGygB=Ymk09$-%xzVY;kQn#Ly4
zn8<<!IUd0~LMQwyVSk;#oRh=fnIXG>^?vRj%>SKcKf3GnRLjFGhxv9u<kh~7jkC23
zmW##SQPB?QIK%z$wfe6J_0Kk4FOLRqzgE9Y+bHABmbzxe>DA^lB0b_xt7;r%P(Ikj
z=pTH1^**(ANt0G)NmN|gl>J__>H7H<6AyjOICJiv?VmT@^(WOYTxYo>u;S7w{q*!u
z#>OViRljzBm^Mj+|G12#UJdUad8q}vx!TT)%H8GZ-|}l`Ui(FfubD6Zon+2@cIV#l
z14o-UuO{}t7ESrcHDmLR*n<hO|4Ke|_J8z#;j(A?AHM&BU#=c<PW|%R&P6grCi;=+
z+<o8gU)y@%&#GycW*2%z^SC~;y!~y3w<p7*Jt9vw2i0u;8*w?g^Ts+y*)`1Xj;LM=
zuT$SsU{LES;%RxeWWv=_EgsR;S4s~~t!&$$GrL*-(k!*BuE(}k?XHpA!OgtxYx6{J
zbA^vHI3AW6WQ09P`tMWsv*zfB&8I^dP0ug~J4(&`bJtt$>Fw`pKif@VYx$;YTF&z!
z$!I!<awzZ2b;1lky6c;3BImNQUn;(~_J{GY$$AXW_H0_CsKOSs>8w$@$|Bn%TIzEP
ze)NVMIen}{c-qaqJU(~-70-=W7<5Tfx9QgPx93%FG%M}&xav@pKIvTHu~z?z@OMI1
zZBzMW7&tGKuD4oIS-Sb(VeSIcu!$0n1NbUJg5DdxzjxnXQtZWvDx-BLL}CN8*Z&e)
z>KpH}IImjg$GQFbJ14!3cGzb0v%kWn$I?V#&E?`#OFk3|%#AI1C6f|ZHzRjZru_ot
z1=}3<b{=@}d%=OaqWPjr)SowH1<yKn`s}5*HlO;ej>cUKtFB*i`EP}N^V@_6D<*G=
zyURB3Ug51iO_!~GG4;Eaa$MtHp(^rY+0(rm{fB>VEm)~x>7^lhQq=V9nFT-3Us&Gt
zN#GLKk=2q_c5`+uxmTaE{$BjG^}Ax<zco;6UwHcHkqm34kYM=^<GqY3F;}#-0#Ck;
zVn6)uo6e6b&))Y6Gsvv|uXU+e&fQ^s^)dHZqG$V;wCl8QihIhSFlotynq@C<sN_xD
z^8RnQ`5kBFfR%v_ax9|JY{pOSX<fRz|97;ni28wI70G_Zq$&U0u82LnyH{u0<Rc!d
z`QK*F-feVff#uowf@jrd9_xL+ulV)T;iM~;VtT87KGb%*6k_^5X8zkV^WMp;eYknH
zOxfVd<)p2eVGjN~d%`XTo&1xlTOu{>=3~bj&jkd|*x7$MbTZZ}pQZcm>lM6qOdb6e
z2Q9f*+OOvP*?#NR`{ycwyIXVGd&2^xe}}iKWPAy%G}zW@@2j4spCJ@sY?To7yGG;M
zG20hvpJwOY`abW(hwNO(z3+WQ@~&Kz|6_5E#rN@y4cFE)uQ%w~%ahaO%$q;&EN4Nh
zwD6r}?_C`d{!iO<;u_!bvlG1T%3k&V^5oC~{#VI{mIVjva#>HFUUUD(hu6>Y+}e#V
zwEW=onaFcs(;DBi7er?F*G5mBda=Uqp2576`G@@vKYFoqo2y0Cnsvfce=N#exw>#$
z>z-<@cGowzr(a<WxKMlUJg>o`t{*o7xKA@zEtg?Tys_fYD$Ad*PI_E$x$(UBA!o+)
z?$^=@$=80dy{h^5efynP?`mEK1vAZ3oVYyN=;#I`lfAc}Da>Txkr!|)J)6K$yGZ%j
zm$bhE8Ez&vcKfd88ZzCz?8dkv?VFG4!#>lt``XG~Q;v$M&evZzZ|?Rg!{`8YrjFa!
zpL@p?Ux;WZ-lg((>)ijFwC-Ov(2bknFZY7yePFTJ!_zGn-pJcsV&)SM>@5`9s~X0C
zJg?uquY1x=t^oIGAFZqmQ_9crhWRyxUTp|mub%qY>iX2DX*MsGFz%?y<_KrMo^{l9
zQuuQIQx}e86{)+V_0OnfU3~MX1{crzq`%ufwN$g(*E4)<JG?#mVnLC`p$R`*JiP1n
z9B`;EpEPN<;aq$6`bgf-agOtn7d_ST-T3ZGiROpx(Z?Bs+Z&HCS<YXYK6k~FWfR)c
z|A|M==+58J#H^L1Slnfi-yPh*Isa(h>{XV{|F3>*=1$5vD3TQ7k)yP&z23HHVum44
z=4GGS`_rP=&FHFq^Qu8-U1dP)a^?+x?kp2|rulKoT$Pv4s?*Z`TfIH_Vcrj;*qO`Z
z1a@9zzBGNu-H%=;n429|KD_nhB<mx$zb_wd-k4MOz1(eaf%5CFSV?7(r9sa=McMKj
z%~Oiq-k^Rqa;dGYdb#c-+2sajznaZhe#=4k=k(L9i81vbo|nw2e|0POMQq@TrTqN-
zb<SrCLwh!LO?f|Q=f}xyKensG2{Q{%$Y7x~|Vf@^o>)x7nVtruBg{paVt^=GG^
zFIKQ!?WCQy_1iTWzAwK{9(=pH^_{t~-1c6Zcbj_;yiwmY!KKXSMW5)GRk5qte087R
zpJFmo$5j54?B4}*qMv<tlVf5DvM9>VI=?QPS;xKpUsOoOOqB!`NAbz`N+fHRZ%Mhi
zFHx*LEtl;`*M{{o*dLrdXm6HxPb;MF%rTLKN5`sntZqu}|7X#ecsQUnYHn4-p45~p
zo6B#T{$4UcuZfp;@1f(Gds}q`zbjs@mpJHfvH0lMFNfp;%cfQ)-E&C3*ne36tl#T~
z>W6odm)EhD>xZq|_GeSZ<Mg}PFU%+M|NDI5(b;MXQAyc_{2pf3{4ToFA6u&wx2sD(
zX_8w!y?}YCOZlS*?$(<)78+kVysBJvvuEM~rK~I0Pi{5fP++)sL#cRkPS0-t0B=Sn
z5oQqv1_lm>;CS`GsfWLConT~O=w)SKU}t~;Mg|6kC5<3<N^*f-MQ#qdrl_|}&A|)|
z41Ej?3>qMH3=9kqO>Y?)7>bh<a|+_CD)R~pisK84@{?1Gi!<}m<BKbcOHy;q;|<~s
z^fL33i_lH&dT5gS!h?Z9WibnbCe&0AwWP6)i8xb>GZG6@(Ty$TydZUxnStRmF9U-X
z$UL}Xw|Wz0Y<zJ^X_8(Uy19#ZdS&ET85p)pFfgb?%>_|Q8n5{iWv*UPN+P<URes0!
z@x(APB*+TG4TXfPWhilmrlzE!8(Q``=N>CF1H%=51_oV_6X7AywULpS=z@koMhZqs
zFgluadl>@*gD@K+5FqZowS_37^~y2bYqV?s(jXQFh6nBp3`R)qecO0+D^Z5VXXeEx
z=jWBAR+Q*fq$Hz<$1EnL%u)shhS?10;gP<JDD(A-Qj7CTi;`1|(T#p`X>IM~>5L2o
z(-|4mpiT!-OB&U86K8ZqUVt|%8%Pf~12@BBW(J0TLCg$#46Y^_+G(Zv?vZ{KDM5zr
jVTIY1AsInFE=2)`t_5YjLE&M^77;l{j=AOjmA<wBR|<j*
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_sim_netlist.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_sim_netlist.v
deleted file mode 100755
index 712041c..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_sim_netlist.v
+++ /dev/null
@@ -1,5232 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:38 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode funcsim -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_processing_system7_0_0_sim_netlist.v
-// Design : scalp_zynqps_processing_system7_0_0
-// Purpose : This verilog netlist is a functional simulation representation of the design and should not be modified
-// or synthesized. This netlist cannot be used for SDF annotated simulation.
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-`timescale 1 ps / 1 ps
-
-(* C_DM_WIDTH = "4" *) (* C_DQS_WIDTH = "4" *) (* C_DQ_WIDTH = "32" *)
-(* C_EMIO_GPIO_WIDTH = "64" *) (* C_EN_EMIO_ENET0 = "0" *) (* C_EN_EMIO_ENET1 = "0" *)
-(* C_EN_EMIO_PJTAG = "0" *) (* C_EN_EMIO_TRACE = "0" *) (* C_FCLK_CLK0_BUF = "TRUE" *)
-(* C_FCLK_CLK1_BUF = "FALSE" *) (* C_FCLK_CLK2_BUF = "FALSE" *) (* C_FCLK_CLK3_BUF = "FALSE" *)
-(* C_GP0_EN_MODIFIABLE_TXN = "1" *) (* C_GP1_EN_MODIFIABLE_TXN = "1" *) (* C_INCLUDE_ACP_TRANS_CHECK = "0" *)
-(* C_INCLUDE_TRACE_BUFFER = "0" *) (* C_IRQ_F2P_MODE = "DIRECT" *) (* C_MIO_PRIMITIVE = "54" *)
-(* C_M_AXI_GP0_ENABLE_STATIC_REMAP = "0" *) (* C_M_AXI_GP0_ID_WIDTH = "12" *) (* C_M_AXI_GP0_THREAD_ID_WIDTH = "12" *)
-(* C_M_AXI_GP1_ENABLE_STATIC_REMAP = "0" *) (* C_M_AXI_GP1_ID_WIDTH = "12" *) (* C_M_AXI_GP1_THREAD_ID_WIDTH = "12" *)
-(* C_NUM_F2P_INTR_INPUTS = "1" *) (* C_PACKAGE_NAME = "clg485" *) (* C_PS7_SI_REV = "PRODUCTION" *)
-(* C_S_AXI_ACP_ARUSER_VAL = "31" *) (* C_S_AXI_ACP_AWUSER_VAL = "31" *) (* C_S_AXI_ACP_ID_WIDTH = "3" *)
-(* C_S_AXI_GP0_ID_WIDTH = "6" *) (* C_S_AXI_GP1_ID_WIDTH = "6" *) (* C_S_AXI_HP0_DATA_WIDTH = "64" *)
-(* C_S_AXI_HP0_ID_WIDTH = "6" *) (* C_S_AXI_HP1_DATA_WIDTH = "64" *) (* C_S_AXI_HP1_ID_WIDTH = "6" *)
-(* C_S_AXI_HP2_DATA_WIDTH = "64" *) (* C_S_AXI_HP2_ID_WIDTH = "6" *) (* C_S_AXI_HP3_DATA_WIDTH = "64" *)
-(* C_S_AXI_HP3_ID_WIDTH = "6" *) (* C_TRACE_BUFFER_CLOCK_DELAY = "12" *) (* C_TRACE_BUFFER_FIFO_SIZE = "128" *)
-(* C_TRACE_INTERNAL_WIDTH = "2" *) (* C_TRACE_PIPELINE_WIDTH = "8" *) (* C_USE_AXI_NONSECURE = "0" *)
-(* C_USE_DEFAULT_ACP_USER_VAL = "0" *) (* C_USE_M_AXI_GP0 = "1" *) (* C_USE_M_AXI_GP1 = "0" *)
-(* C_USE_S_AXI_ACP = "0" *) (* C_USE_S_AXI_GP0 = "0" *) (* C_USE_S_AXI_GP1 = "0" *)
-(* C_USE_S_AXI_HP0 = "0" *) (* C_USE_S_AXI_HP1 = "0" *) (* C_USE_S_AXI_HP2 = "0" *)
-(* C_USE_S_AXI_HP3 = "0" *) (* HW_HANDOFF = "scalp_zynqps_processing_system7_0_0.hwdef" *) (* POWER = "<PROCESSOR name={system} numA9Cores={2} clockFreq={750} load={0.5} /><MEMORY name={code} memType={DDR3(LowVoltage)} dataWidth={16} clockFreq={500} readRate={0.5} writeRate={0.5} /><IO interface={GPIO_Bank_1} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={1} usageRate={0.5} /><IO interface={GPIO_Bank_0} ioStandard={LVCMOS33} bidis={3} ioBank={Vcco_p0} clockFreq={1} usageRate={0.5} /><IO interface={CAN} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SPI} ioStandard={} bidis={2} ioBank={} clockFreq={159.090912} usageRate={0.5} /><IO interface={SPI} ioStandard={LVCMOS25} bidis={5} ioBank={Vcco_p1} clockFreq={159.090912} usageRate={0.5} /><IO interface={I2C} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SD} ioStandard={LVCMOS33} bidis={7} ioBank={Vcco_p0} clockFreq={97.222221} usageRate={0.5} /><IO interface={USB} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={60} usageRate={0.5} /><IO interface={GigE} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={QSPI} ioStandard={LVCMOS33} bidis={6} ioBank={Vcco_p0} clockFreq={133} usageRate={0.5} /><PLL domain={Processor} vco={1500.000} /><PLL domain={Memory} vco={1000.000} /><PLL domain={IO} vco={1750.000} /><AXI interface={M_AXI_GP0} dataWidth={32} clockFreq={125} usageRate={0.5} />/>" *)
-(* USE_TRACE_DATA_EDGE_DETECTOR = "0" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_processing_system7_v5_5_processing_system7
- (CAN0_PHY_TX,
- CAN0_PHY_RX,
- CAN1_PHY_TX,
- CAN1_PHY_RX,
- ENET0_GMII_TX_EN,
- ENET0_GMII_TX_ER,
- ENET0_MDIO_MDC,
- ENET0_MDIO_O,
- ENET0_MDIO_T,
- ENET0_PTP_DELAY_REQ_RX,
- ENET0_PTP_DELAY_REQ_TX,
- ENET0_PTP_PDELAY_REQ_RX,
- ENET0_PTP_PDELAY_REQ_TX,
- ENET0_PTP_PDELAY_RESP_RX,
- ENET0_PTP_PDELAY_RESP_TX,
- ENET0_PTP_SYNC_FRAME_RX,
- ENET0_PTP_SYNC_FRAME_TX,
- ENET0_SOF_RX,
- ENET0_SOF_TX,
- ENET0_GMII_TXD,
- ENET0_GMII_COL,
- ENET0_GMII_CRS,
- ENET0_GMII_RX_CLK,
- ENET0_GMII_RX_DV,
- ENET0_GMII_RX_ER,
- ENET0_GMII_TX_CLK,
- ENET0_MDIO_I,
- ENET0_EXT_INTIN,
- ENET0_GMII_RXD,
- ENET1_GMII_TX_EN,
- ENET1_GMII_TX_ER,
- ENET1_MDIO_MDC,
- ENET1_MDIO_O,
- ENET1_MDIO_T,
- ENET1_PTP_DELAY_REQ_RX,
- ENET1_PTP_DELAY_REQ_TX,
- ENET1_PTP_PDELAY_REQ_RX,
- ENET1_PTP_PDELAY_REQ_TX,
- ENET1_PTP_PDELAY_RESP_RX,
- ENET1_PTP_PDELAY_RESP_TX,
- ENET1_PTP_SYNC_FRAME_RX,
- ENET1_PTP_SYNC_FRAME_TX,
- ENET1_SOF_RX,
- ENET1_SOF_TX,
- ENET1_GMII_TXD,
- ENET1_GMII_COL,
- ENET1_GMII_CRS,
- ENET1_GMII_RX_CLK,
- ENET1_GMII_RX_DV,
- ENET1_GMII_RX_ER,
- ENET1_GMII_TX_CLK,
- ENET1_MDIO_I,
- ENET1_EXT_INTIN,
- ENET1_GMII_RXD,
- GPIO_I,
- GPIO_O,
- GPIO_T,
- I2C0_SDA_I,
- I2C0_SDA_O,
- I2C0_SDA_T,
- I2C0_SCL_I,
- I2C0_SCL_O,
- I2C0_SCL_T,
- I2C1_SDA_I,
- I2C1_SDA_O,
- I2C1_SDA_T,
- I2C1_SCL_I,
- I2C1_SCL_O,
- I2C1_SCL_T,
- PJTAG_TCK,
- PJTAG_TMS,
- PJTAG_TDI,
- PJTAG_TDO,
- SDIO0_CLK,
- SDIO0_CLK_FB,
- SDIO0_CMD_O,
- SDIO0_CMD_I,
- SDIO0_CMD_T,
- SDIO0_DATA_I,
- SDIO0_DATA_O,
- SDIO0_DATA_T,
- SDIO0_LED,
- SDIO0_CDN,
- SDIO0_WP,
- SDIO0_BUSPOW,
- SDIO0_BUSVOLT,
- SDIO1_CLK,
- SDIO1_CLK_FB,
- SDIO1_CMD_O,
- SDIO1_CMD_I,
- SDIO1_CMD_T,
- SDIO1_DATA_I,
- SDIO1_DATA_O,
- SDIO1_DATA_T,
- SDIO1_LED,
- SDIO1_CDN,
- SDIO1_WP,
- SDIO1_BUSPOW,
- SDIO1_BUSVOLT,
- SPI0_SCLK_I,
- SPI0_SCLK_O,
- SPI0_SCLK_T,
- SPI0_MOSI_I,
- SPI0_MOSI_O,
- SPI0_MOSI_T,
- SPI0_MISO_I,
- SPI0_MISO_O,
- SPI0_MISO_T,
- SPI0_SS_I,
- SPI0_SS_O,
- SPI0_SS1_O,
- SPI0_SS2_O,
- SPI0_SS_T,
- SPI1_SCLK_I,
- SPI1_SCLK_O,
- SPI1_SCLK_T,
- SPI1_MOSI_I,
- SPI1_MOSI_O,
- SPI1_MOSI_T,
- SPI1_MISO_I,
- SPI1_MISO_O,
- SPI1_MISO_T,
- SPI1_SS_I,
- SPI1_SS_O,
- SPI1_SS1_O,
- SPI1_SS2_O,
- SPI1_SS_T,
- UART0_DTRN,
- UART0_RTSN,
- UART0_TX,
- UART0_CTSN,
- UART0_DCDN,
- UART0_DSRN,
- UART0_RIN,
- UART0_RX,
- UART1_DTRN,
- UART1_RTSN,
- UART1_TX,
- UART1_CTSN,
- UART1_DCDN,
- UART1_DSRN,
- UART1_RIN,
- UART1_RX,
- TTC0_WAVE0_OUT,
- TTC0_WAVE1_OUT,
- TTC0_WAVE2_OUT,
- TTC0_CLK0_IN,
- TTC0_CLK1_IN,
- TTC0_CLK2_IN,
- TTC1_WAVE0_OUT,
- TTC1_WAVE1_OUT,
- TTC1_WAVE2_OUT,
- TTC1_CLK0_IN,
- TTC1_CLK1_IN,
- TTC1_CLK2_IN,
- WDT_CLK_IN,
- WDT_RST_OUT,
- TRACE_CLK,
- TRACE_CTL,
- TRACE_DATA,
- TRACE_CLK_OUT,
- USB0_PORT_INDCTL,
- USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT,
- USB1_PORT_INDCTL,
- USB1_VBUS_PWRSELECT,
- USB1_VBUS_PWRFAULT,
- SRAM_INTIN,
- M_AXI_GP0_ARESETN,
- M_AXI_GP0_ARVALID,
- M_AXI_GP0_AWVALID,
- M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY,
- M_AXI_GP0_WLAST,
- M_AXI_GP0_WVALID,
- M_AXI_GP0_ARID,
- M_AXI_GP0_AWID,
- M_AXI_GP0_WID,
- M_AXI_GP0_ARBURST,
- M_AXI_GP0_ARLOCK,
- M_AXI_GP0_ARSIZE,
- M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK,
- M_AXI_GP0_AWSIZE,
- M_AXI_GP0_ARPROT,
- M_AXI_GP0_AWPROT,
- M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR,
- M_AXI_GP0_WDATA,
- M_AXI_GP0_ARCACHE,
- M_AXI_GP0_ARLEN,
- M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE,
- M_AXI_GP0_AWLEN,
- M_AXI_GP0_AWQOS,
- M_AXI_GP0_WSTRB,
- M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY,
- M_AXI_GP0_AWREADY,
- M_AXI_GP0_BVALID,
- M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID,
- M_AXI_GP0_WREADY,
- M_AXI_GP0_BID,
- M_AXI_GP0_RID,
- M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP,
- M_AXI_GP0_RDATA,
- M_AXI_GP1_ARESETN,
- M_AXI_GP1_ARVALID,
- M_AXI_GP1_AWVALID,
- M_AXI_GP1_BREADY,
- M_AXI_GP1_RREADY,
- M_AXI_GP1_WLAST,
- M_AXI_GP1_WVALID,
- M_AXI_GP1_ARID,
- M_AXI_GP1_AWID,
- M_AXI_GP1_WID,
- M_AXI_GP1_ARBURST,
- M_AXI_GP1_ARLOCK,
- M_AXI_GP1_ARSIZE,
- M_AXI_GP1_AWBURST,
- M_AXI_GP1_AWLOCK,
- M_AXI_GP1_AWSIZE,
- M_AXI_GP1_ARPROT,
- M_AXI_GP1_AWPROT,
- M_AXI_GP1_ARADDR,
- M_AXI_GP1_AWADDR,
- M_AXI_GP1_WDATA,
- M_AXI_GP1_ARCACHE,
- M_AXI_GP1_ARLEN,
- M_AXI_GP1_ARQOS,
- M_AXI_GP1_AWCACHE,
- M_AXI_GP1_AWLEN,
- M_AXI_GP1_AWQOS,
- M_AXI_GP1_WSTRB,
- M_AXI_GP1_ACLK,
- M_AXI_GP1_ARREADY,
- M_AXI_GP1_AWREADY,
- M_AXI_GP1_BVALID,
- M_AXI_GP1_RLAST,
- M_AXI_GP1_RVALID,
- M_AXI_GP1_WREADY,
- M_AXI_GP1_BID,
- M_AXI_GP1_RID,
- M_AXI_GP1_BRESP,
- M_AXI_GP1_RRESP,
- M_AXI_GP1_RDATA,
- S_AXI_GP0_ARESETN,
- S_AXI_GP0_ARREADY,
- S_AXI_GP0_AWREADY,
- S_AXI_GP0_BVALID,
- S_AXI_GP0_RLAST,
- S_AXI_GP0_RVALID,
- S_AXI_GP0_WREADY,
- S_AXI_GP0_BRESP,
- S_AXI_GP0_RRESP,
- S_AXI_GP0_RDATA,
- S_AXI_GP0_BID,
- S_AXI_GP0_RID,
- S_AXI_GP0_ACLK,
- S_AXI_GP0_ARVALID,
- S_AXI_GP0_AWVALID,
- S_AXI_GP0_BREADY,
- S_AXI_GP0_RREADY,
- S_AXI_GP0_WLAST,
- S_AXI_GP0_WVALID,
- S_AXI_GP0_ARBURST,
- S_AXI_GP0_ARLOCK,
- S_AXI_GP0_ARSIZE,
- S_AXI_GP0_AWBURST,
- S_AXI_GP0_AWLOCK,
- S_AXI_GP0_AWSIZE,
- S_AXI_GP0_ARPROT,
- S_AXI_GP0_AWPROT,
- S_AXI_GP0_ARADDR,
- S_AXI_GP0_AWADDR,
- S_AXI_GP0_WDATA,
- S_AXI_GP0_ARCACHE,
- S_AXI_GP0_ARLEN,
- S_AXI_GP0_ARQOS,
- S_AXI_GP0_AWCACHE,
- S_AXI_GP0_AWLEN,
- S_AXI_GP0_AWQOS,
- S_AXI_GP0_WSTRB,
- S_AXI_GP0_ARID,
- S_AXI_GP0_AWID,
- S_AXI_GP0_WID,
- S_AXI_GP1_ARESETN,
- S_AXI_GP1_ARREADY,
- S_AXI_GP1_AWREADY,
- S_AXI_GP1_BVALID,
- S_AXI_GP1_RLAST,
- S_AXI_GP1_RVALID,
- S_AXI_GP1_WREADY,
- S_AXI_GP1_BRESP,
- S_AXI_GP1_RRESP,
- S_AXI_GP1_RDATA,
- S_AXI_GP1_BID,
- S_AXI_GP1_RID,
- S_AXI_GP1_ACLK,
- S_AXI_GP1_ARVALID,
- S_AXI_GP1_AWVALID,
- S_AXI_GP1_BREADY,
- S_AXI_GP1_RREADY,
- S_AXI_GP1_WLAST,
- S_AXI_GP1_WVALID,
- S_AXI_GP1_ARBURST,
- S_AXI_GP1_ARLOCK,
- S_AXI_GP1_ARSIZE,
- S_AXI_GP1_AWBURST,
- S_AXI_GP1_AWLOCK,
- S_AXI_GP1_AWSIZE,
- S_AXI_GP1_ARPROT,
- S_AXI_GP1_AWPROT,
- S_AXI_GP1_ARADDR,
- S_AXI_GP1_AWADDR,
- S_AXI_GP1_WDATA,
- S_AXI_GP1_ARCACHE,
- S_AXI_GP1_ARLEN,
- S_AXI_GP1_ARQOS,
- S_AXI_GP1_AWCACHE,
- S_AXI_GP1_AWLEN,
- S_AXI_GP1_AWQOS,
- S_AXI_GP1_WSTRB,
- S_AXI_GP1_ARID,
- S_AXI_GP1_AWID,
- S_AXI_GP1_WID,
- S_AXI_ACP_ARESETN,
- S_AXI_ACP_ARREADY,
- S_AXI_ACP_AWREADY,
- S_AXI_ACP_BVALID,
- S_AXI_ACP_RLAST,
- S_AXI_ACP_RVALID,
- S_AXI_ACP_WREADY,
- S_AXI_ACP_BRESP,
- S_AXI_ACP_RRESP,
- S_AXI_ACP_BID,
- S_AXI_ACP_RID,
- S_AXI_ACP_RDATA,
- S_AXI_ACP_ACLK,
- S_AXI_ACP_ARVALID,
- S_AXI_ACP_AWVALID,
- S_AXI_ACP_BREADY,
- S_AXI_ACP_RREADY,
- S_AXI_ACP_WLAST,
- S_AXI_ACP_WVALID,
- S_AXI_ACP_ARID,
- S_AXI_ACP_ARPROT,
- S_AXI_ACP_AWID,
- S_AXI_ACP_AWPROT,
- S_AXI_ACP_WID,
- S_AXI_ACP_ARADDR,
- S_AXI_ACP_AWADDR,
- S_AXI_ACP_ARCACHE,
- S_AXI_ACP_ARLEN,
- S_AXI_ACP_ARQOS,
- S_AXI_ACP_AWCACHE,
- S_AXI_ACP_AWLEN,
- S_AXI_ACP_AWQOS,
- S_AXI_ACP_ARBURST,
- S_AXI_ACP_ARLOCK,
- S_AXI_ACP_ARSIZE,
- S_AXI_ACP_AWBURST,
- S_AXI_ACP_AWLOCK,
- S_AXI_ACP_AWSIZE,
- S_AXI_ACP_ARUSER,
- S_AXI_ACP_AWUSER,
- S_AXI_ACP_WDATA,
- S_AXI_ACP_WSTRB,
- S_AXI_HP0_ARESETN,
- S_AXI_HP0_ARREADY,
- S_AXI_HP0_AWREADY,
- S_AXI_HP0_BVALID,
- S_AXI_HP0_RLAST,
- S_AXI_HP0_RVALID,
- S_AXI_HP0_WREADY,
- S_AXI_HP0_BRESP,
- S_AXI_HP0_RRESP,
- S_AXI_HP0_BID,
- S_AXI_HP0_RID,
- S_AXI_HP0_RDATA,
- S_AXI_HP0_RCOUNT,
- S_AXI_HP0_WCOUNT,
- S_AXI_HP0_RACOUNT,
- S_AXI_HP0_WACOUNT,
- S_AXI_HP0_ACLK,
- S_AXI_HP0_ARVALID,
- S_AXI_HP0_AWVALID,
- S_AXI_HP0_BREADY,
- S_AXI_HP0_RDISSUECAP1_EN,
- S_AXI_HP0_RREADY,
- S_AXI_HP0_WLAST,
- S_AXI_HP0_WRISSUECAP1_EN,
- S_AXI_HP0_WVALID,
- S_AXI_HP0_ARBURST,
- S_AXI_HP0_ARLOCK,
- S_AXI_HP0_ARSIZE,
- S_AXI_HP0_AWBURST,
- S_AXI_HP0_AWLOCK,
- S_AXI_HP0_AWSIZE,
- S_AXI_HP0_ARPROT,
- S_AXI_HP0_AWPROT,
- S_AXI_HP0_ARADDR,
- S_AXI_HP0_AWADDR,
- S_AXI_HP0_ARCACHE,
- S_AXI_HP0_ARLEN,
- S_AXI_HP0_ARQOS,
- S_AXI_HP0_AWCACHE,
- S_AXI_HP0_AWLEN,
- S_AXI_HP0_AWQOS,
- S_AXI_HP0_ARID,
- S_AXI_HP0_AWID,
- S_AXI_HP0_WID,
- S_AXI_HP0_WDATA,
- S_AXI_HP0_WSTRB,
- S_AXI_HP1_ARESETN,
- S_AXI_HP1_ARREADY,
- S_AXI_HP1_AWREADY,
- S_AXI_HP1_BVALID,
- S_AXI_HP1_RLAST,
- S_AXI_HP1_RVALID,
- S_AXI_HP1_WREADY,
- S_AXI_HP1_BRESP,
- S_AXI_HP1_RRESP,
- S_AXI_HP1_BID,
- S_AXI_HP1_RID,
- S_AXI_HP1_RDATA,
- S_AXI_HP1_RCOUNT,
- S_AXI_HP1_WCOUNT,
- S_AXI_HP1_RACOUNT,
- S_AXI_HP1_WACOUNT,
- S_AXI_HP1_ACLK,
- S_AXI_HP1_ARVALID,
- S_AXI_HP1_AWVALID,
- S_AXI_HP1_BREADY,
- S_AXI_HP1_RDISSUECAP1_EN,
- S_AXI_HP1_RREADY,
- S_AXI_HP1_WLAST,
- S_AXI_HP1_WRISSUECAP1_EN,
- S_AXI_HP1_WVALID,
- S_AXI_HP1_ARBURST,
- S_AXI_HP1_ARLOCK,
- S_AXI_HP1_ARSIZE,
- S_AXI_HP1_AWBURST,
- S_AXI_HP1_AWLOCK,
- S_AXI_HP1_AWSIZE,
- S_AXI_HP1_ARPROT,
- S_AXI_HP1_AWPROT,
- S_AXI_HP1_ARADDR,
- S_AXI_HP1_AWADDR,
- S_AXI_HP1_ARCACHE,
- S_AXI_HP1_ARLEN,
- S_AXI_HP1_ARQOS,
- S_AXI_HP1_AWCACHE,
- S_AXI_HP1_AWLEN,
- S_AXI_HP1_AWQOS,
- S_AXI_HP1_ARID,
- S_AXI_HP1_AWID,
- S_AXI_HP1_WID,
- S_AXI_HP1_WDATA,
- S_AXI_HP1_WSTRB,
- S_AXI_HP2_ARESETN,
- S_AXI_HP2_ARREADY,
- S_AXI_HP2_AWREADY,
- S_AXI_HP2_BVALID,
- S_AXI_HP2_RLAST,
- S_AXI_HP2_RVALID,
- S_AXI_HP2_WREADY,
- S_AXI_HP2_BRESP,
- S_AXI_HP2_RRESP,
- S_AXI_HP2_BID,
- S_AXI_HP2_RID,
- S_AXI_HP2_RDATA,
- S_AXI_HP2_RCOUNT,
- S_AXI_HP2_WCOUNT,
- S_AXI_HP2_RACOUNT,
- S_AXI_HP2_WACOUNT,
- S_AXI_HP2_ACLK,
- S_AXI_HP2_ARVALID,
- S_AXI_HP2_AWVALID,
- S_AXI_HP2_BREADY,
- S_AXI_HP2_RDISSUECAP1_EN,
- S_AXI_HP2_RREADY,
- S_AXI_HP2_WLAST,
- S_AXI_HP2_WRISSUECAP1_EN,
- S_AXI_HP2_WVALID,
- S_AXI_HP2_ARBURST,
- S_AXI_HP2_ARLOCK,
- S_AXI_HP2_ARSIZE,
- S_AXI_HP2_AWBURST,
- S_AXI_HP2_AWLOCK,
- S_AXI_HP2_AWSIZE,
- S_AXI_HP2_ARPROT,
- S_AXI_HP2_AWPROT,
- S_AXI_HP2_ARADDR,
- S_AXI_HP2_AWADDR,
- S_AXI_HP2_ARCACHE,
- S_AXI_HP2_ARLEN,
- S_AXI_HP2_ARQOS,
- S_AXI_HP2_AWCACHE,
- S_AXI_HP2_AWLEN,
- S_AXI_HP2_AWQOS,
- S_AXI_HP2_ARID,
- S_AXI_HP2_AWID,
- S_AXI_HP2_WID,
- S_AXI_HP2_WDATA,
- S_AXI_HP2_WSTRB,
- S_AXI_HP3_ARESETN,
- S_AXI_HP3_ARREADY,
- S_AXI_HP3_AWREADY,
- S_AXI_HP3_BVALID,
- S_AXI_HP3_RLAST,
- S_AXI_HP3_RVALID,
- S_AXI_HP3_WREADY,
- S_AXI_HP3_BRESP,
- S_AXI_HP3_RRESP,
- S_AXI_HP3_BID,
- S_AXI_HP3_RID,
- S_AXI_HP3_RDATA,
- S_AXI_HP3_RCOUNT,
- S_AXI_HP3_WCOUNT,
- S_AXI_HP3_RACOUNT,
- S_AXI_HP3_WACOUNT,
- S_AXI_HP3_ACLK,
- S_AXI_HP3_ARVALID,
- S_AXI_HP3_AWVALID,
- S_AXI_HP3_BREADY,
- S_AXI_HP3_RDISSUECAP1_EN,
- S_AXI_HP3_RREADY,
- S_AXI_HP3_WLAST,
- S_AXI_HP3_WRISSUECAP1_EN,
- S_AXI_HP3_WVALID,
- S_AXI_HP3_ARBURST,
- S_AXI_HP3_ARLOCK,
- S_AXI_HP3_ARSIZE,
- S_AXI_HP3_AWBURST,
- S_AXI_HP3_AWLOCK,
- S_AXI_HP3_AWSIZE,
- S_AXI_HP3_ARPROT,
- S_AXI_HP3_AWPROT,
- S_AXI_HP3_ARADDR,
- S_AXI_HP3_AWADDR,
- S_AXI_HP3_ARCACHE,
- S_AXI_HP3_ARLEN,
- S_AXI_HP3_ARQOS,
- S_AXI_HP3_AWCACHE,
- S_AXI_HP3_AWLEN,
- S_AXI_HP3_AWQOS,
- S_AXI_HP3_ARID,
- S_AXI_HP3_AWID,
- S_AXI_HP3_WID,
- S_AXI_HP3_WDATA,
- S_AXI_HP3_WSTRB,
- IRQ_P2F_DMAC_ABORT,
- IRQ_P2F_DMAC0,
- IRQ_P2F_DMAC1,
- IRQ_P2F_DMAC2,
- IRQ_P2F_DMAC3,
- IRQ_P2F_DMAC4,
- IRQ_P2F_DMAC5,
- IRQ_P2F_DMAC6,
- IRQ_P2F_DMAC7,
- IRQ_P2F_SMC,
- IRQ_P2F_QSPI,
- IRQ_P2F_CTI,
- IRQ_P2F_GPIO,
- IRQ_P2F_USB0,
- IRQ_P2F_ENET0,
- IRQ_P2F_ENET_WAKE0,
- IRQ_P2F_SDIO0,
- IRQ_P2F_I2C0,
- IRQ_P2F_SPI0,
- IRQ_P2F_UART0,
- IRQ_P2F_CAN0,
- IRQ_P2F_USB1,
- IRQ_P2F_ENET1,
- IRQ_P2F_ENET_WAKE1,
- IRQ_P2F_SDIO1,
- IRQ_P2F_I2C1,
- IRQ_P2F_SPI1,
- IRQ_P2F_UART1,
- IRQ_P2F_CAN1,
- IRQ_F2P,
- Core0_nFIQ,
- Core0_nIRQ,
- Core1_nFIQ,
- Core1_nIRQ,
- DMA0_DATYPE,
- DMA0_DAVALID,
- DMA0_DRREADY,
- DMA0_RSTN,
- DMA1_DATYPE,
- DMA1_DAVALID,
- DMA1_DRREADY,
- DMA1_RSTN,
- DMA2_DATYPE,
- DMA2_DAVALID,
- DMA2_DRREADY,
- DMA2_RSTN,
- DMA3_DATYPE,
- DMA3_DAVALID,
- DMA3_DRREADY,
- DMA3_RSTN,
- DMA0_ACLK,
- DMA0_DAREADY,
- DMA0_DRLAST,
- DMA0_DRVALID,
- DMA1_ACLK,
- DMA1_DAREADY,
- DMA1_DRLAST,
- DMA1_DRVALID,
- DMA2_ACLK,
- DMA2_DAREADY,
- DMA2_DRLAST,
- DMA2_DRVALID,
- DMA3_ACLK,
- DMA3_DAREADY,
- DMA3_DRLAST,
- DMA3_DRVALID,
- DMA0_DRTYPE,
- DMA1_DRTYPE,
- DMA2_DRTYPE,
- DMA3_DRTYPE,
- FCLK_CLK3,
- FCLK_CLK2,
- FCLK_CLK1,
- FCLK_CLK0,
- FCLK_CLKTRIG3_N,
- FCLK_CLKTRIG2_N,
- FCLK_CLKTRIG1_N,
- FCLK_CLKTRIG0_N,
- FCLK_RESET3_N,
- FCLK_RESET2_N,
- FCLK_RESET1_N,
- FCLK_RESET0_N,
- FTMD_TRACEIN_DATA,
- FTMD_TRACEIN_VALID,
- FTMD_TRACEIN_CLK,
- FTMD_TRACEIN_ATID,
- FTMT_F2P_TRIG_0,
- FTMT_F2P_TRIGACK_0,
- FTMT_F2P_TRIG_1,
- FTMT_F2P_TRIGACK_1,
- FTMT_F2P_TRIG_2,
- FTMT_F2P_TRIGACK_2,
- FTMT_F2P_TRIG_3,
- FTMT_F2P_TRIGACK_3,
- FTMT_F2P_DEBUG,
- FTMT_P2F_TRIGACK_0,
- FTMT_P2F_TRIG_0,
- FTMT_P2F_TRIGACK_1,
- FTMT_P2F_TRIG_1,
- FTMT_P2F_TRIGACK_2,
- FTMT_P2F_TRIG_2,
- FTMT_P2F_TRIGACK_3,
- FTMT_P2F_TRIG_3,
- FTMT_P2F_DEBUG,
- FPGA_IDLE_N,
- EVENT_EVENTO,
- EVENT_STANDBYWFE,
- EVENT_STANDBYWFI,
- EVENT_EVENTI,
- DDR_ARB,
- MIO,
- DDR_CAS_n,
- DDR_CKE,
- DDR_Clk_n,
- DDR_Clk,
- DDR_CS_n,
- DDR_DRSTB,
- DDR_ODT,
- DDR_RAS_n,
- DDR_WEB,
- DDR_BankAddr,
- DDR_Addr,
- DDR_VRN,
- DDR_VRP,
- DDR_DM,
- DDR_DQ,
- DDR_DQS_n,
- DDR_DQS,
- PS_SRSTB,
- PS_CLK,
- PS_PORB);
- output CAN0_PHY_TX;
- input CAN0_PHY_RX;
- output CAN1_PHY_TX;
- input CAN1_PHY_RX;
- output ENET0_GMII_TX_EN;
- output ENET0_GMII_TX_ER;
- output ENET0_MDIO_MDC;
- output ENET0_MDIO_O;
- output ENET0_MDIO_T;
- output ENET0_PTP_DELAY_REQ_RX;
- output ENET0_PTP_DELAY_REQ_TX;
- output ENET0_PTP_PDELAY_REQ_RX;
- output ENET0_PTP_PDELAY_REQ_TX;
- output ENET0_PTP_PDELAY_RESP_RX;
- output ENET0_PTP_PDELAY_RESP_TX;
- output ENET0_PTP_SYNC_FRAME_RX;
- output ENET0_PTP_SYNC_FRAME_TX;
- output ENET0_SOF_RX;
- output ENET0_SOF_TX;
- output [7:0]ENET0_GMII_TXD;
- input ENET0_GMII_COL;
- input ENET0_GMII_CRS;
- input ENET0_GMII_RX_CLK;
- input ENET0_GMII_RX_DV;
- input ENET0_GMII_RX_ER;
- input ENET0_GMII_TX_CLK;
- input ENET0_MDIO_I;
- input ENET0_EXT_INTIN;
- input [7:0]ENET0_GMII_RXD;
- output ENET1_GMII_TX_EN;
- output ENET1_GMII_TX_ER;
- output ENET1_MDIO_MDC;
- output ENET1_MDIO_O;
- output ENET1_MDIO_T;
- output ENET1_PTP_DELAY_REQ_RX;
- output ENET1_PTP_DELAY_REQ_TX;
- output ENET1_PTP_PDELAY_REQ_RX;
- output ENET1_PTP_PDELAY_REQ_TX;
- output ENET1_PTP_PDELAY_RESP_RX;
- output ENET1_PTP_PDELAY_RESP_TX;
- output ENET1_PTP_SYNC_FRAME_RX;
- output ENET1_PTP_SYNC_FRAME_TX;
- output ENET1_SOF_RX;
- output ENET1_SOF_TX;
- output [7:0]ENET1_GMII_TXD;
- input ENET1_GMII_COL;
- input ENET1_GMII_CRS;
- input ENET1_GMII_RX_CLK;
- input ENET1_GMII_RX_DV;
- input ENET1_GMII_RX_ER;
- input ENET1_GMII_TX_CLK;
- input ENET1_MDIO_I;
- input ENET1_EXT_INTIN;
- input [7:0]ENET1_GMII_RXD;
- input [63:0]GPIO_I;
- output [63:0]GPIO_O;
- output [63:0]GPIO_T;
- input I2C0_SDA_I;
- output I2C0_SDA_O;
- output I2C0_SDA_T;
- input I2C0_SCL_I;
- output I2C0_SCL_O;
- output I2C0_SCL_T;
- input I2C1_SDA_I;
- output I2C1_SDA_O;
- output I2C1_SDA_T;
- input I2C1_SCL_I;
- output I2C1_SCL_O;
- output I2C1_SCL_T;
- input PJTAG_TCK;
- input PJTAG_TMS;
- input PJTAG_TDI;
- output PJTAG_TDO;
- output SDIO0_CLK;
- input SDIO0_CLK_FB;
- output SDIO0_CMD_O;
- input SDIO0_CMD_I;
- output SDIO0_CMD_T;
- input [3:0]SDIO0_DATA_I;
- output [3:0]SDIO0_DATA_O;
- output [3:0]SDIO0_DATA_T;
- output SDIO0_LED;
- input SDIO0_CDN;
- input SDIO0_WP;
- output SDIO0_BUSPOW;
- output [2:0]SDIO0_BUSVOLT;
- output SDIO1_CLK;
- input SDIO1_CLK_FB;
- output SDIO1_CMD_O;
- input SDIO1_CMD_I;
- output SDIO1_CMD_T;
- input [3:0]SDIO1_DATA_I;
- output [3:0]SDIO1_DATA_O;
- output [3:0]SDIO1_DATA_T;
- output SDIO1_LED;
- input SDIO1_CDN;
- input SDIO1_WP;
- output SDIO1_BUSPOW;
- output [2:0]SDIO1_BUSVOLT;
- input SPI0_SCLK_I;
- output SPI0_SCLK_O;
- output SPI0_SCLK_T;
- input SPI0_MOSI_I;
- output SPI0_MOSI_O;
- output SPI0_MOSI_T;
- input SPI0_MISO_I;
- output SPI0_MISO_O;
- output SPI0_MISO_T;
- input SPI0_SS_I;
- output SPI0_SS_O;
- output SPI0_SS1_O;
- output SPI0_SS2_O;
- output SPI0_SS_T;
- input SPI1_SCLK_I;
- output SPI1_SCLK_O;
- output SPI1_SCLK_T;
- input SPI1_MOSI_I;
- output SPI1_MOSI_O;
- output SPI1_MOSI_T;
- input SPI1_MISO_I;
- output SPI1_MISO_O;
- output SPI1_MISO_T;
- input SPI1_SS_I;
- output SPI1_SS_O;
- output SPI1_SS1_O;
- output SPI1_SS2_O;
- output SPI1_SS_T;
- output UART0_DTRN;
- output UART0_RTSN;
- output UART0_TX;
- input UART0_CTSN;
- input UART0_DCDN;
- input UART0_DSRN;
- input UART0_RIN;
- input UART0_RX;
- output UART1_DTRN;
- output UART1_RTSN;
- output UART1_TX;
- input UART1_CTSN;
- input UART1_DCDN;
- input UART1_DSRN;
- input UART1_RIN;
- input UART1_RX;
- output TTC0_WAVE0_OUT;
- output TTC0_WAVE1_OUT;
- output TTC0_WAVE2_OUT;
- input TTC0_CLK0_IN;
- input TTC0_CLK1_IN;
- input TTC0_CLK2_IN;
- output TTC1_WAVE0_OUT;
- output TTC1_WAVE1_OUT;
- output TTC1_WAVE2_OUT;
- input TTC1_CLK0_IN;
- input TTC1_CLK1_IN;
- input TTC1_CLK2_IN;
- input WDT_CLK_IN;
- output WDT_RST_OUT;
- input TRACE_CLK;
- output TRACE_CTL;
- output [1:0]TRACE_DATA;
- output TRACE_CLK_OUT;
- output [1:0]USB0_PORT_INDCTL;
- output USB0_VBUS_PWRSELECT;
- input USB0_VBUS_PWRFAULT;
- output [1:0]USB1_PORT_INDCTL;
- output USB1_VBUS_PWRSELECT;
- input USB1_VBUS_PWRFAULT;
- input SRAM_INTIN;
- output M_AXI_GP0_ARESETN;
- output M_AXI_GP0_ARVALID;
- output M_AXI_GP0_AWVALID;
- output M_AXI_GP0_BREADY;
- output M_AXI_GP0_RREADY;
- output M_AXI_GP0_WLAST;
- output M_AXI_GP0_WVALID;
- output [11:0]M_AXI_GP0_ARID;
- output [11:0]M_AXI_GP0_AWID;
- output [11:0]M_AXI_GP0_WID;
- output [1:0]M_AXI_GP0_ARBURST;
- output [1:0]M_AXI_GP0_ARLOCK;
- output [2:0]M_AXI_GP0_ARSIZE;
- output [1:0]M_AXI_GP0_AWBURST;
- output [1:0]M_AXI_GP0_AWLOCK;
- output [2:0]M_AXI_GP0_AWSIZE;
- output [2:0]M_AXI_GP0_ARPROT;
- output [2:0]M_AXI_GP0_AWPROT;
- output [31:0]M_AXI_GP0_ARADDR;
- output [31:0]M_AXI_GP0_AWADDR;
- output [31:0]M_AXI_GP0_WDATA;
- output [3:0]M_AXI_GP0_ARCACHE;
- output [3:0]M_AXI_GP0_ARLEN;
- output [3:0]M_AXI_GP0_ARQOS;
- output [3:0]M_AXI_GP0_AWCACHE;
- output [3:0]M_AXI_GP0_AWLEN;
- output [3:0]M_AXI_GP0_AWQOS;
- output [3:0]M_AXI_GP0_WSTRB;
- input M_AXI_GP0_ACLK;
- input M_AXI_GP0_ARREADY;
- input M_AXI_GP0_AWREADY;
- input M_AXI_GP0_BVALID;
- input M_AXI_GP0_RLAST;
- input M_AXI_GP0_RVALID;
- input M_AXI_GP0_WREADY;
- input [11:0]M_AXI_GP0_BID;
- input [11:0]M_AXI_GP0_RID;
- input [1:0]M_AXI_GP0_BRESP;
- input [1:0]M_AXI_GP0_RRESP;
- input [31:0]M_AXI_GP0_RDATA;
- output M_AXI_GP1_ARESETN;
- output M_AXI_GP1_ARVALID;
- output M_AXI_GP1_AWVALID;
- output M_AXI_GP1_BREADY;
- output M_AXI_GP1_RREADY;
- output M_AXI_GP1_WLAST;
- output M_AXI_GP1_WVALID;
- output [11:0]M_AXI_GP1_ARID;
- output [11:0]M_AXI_GP1_AWID;
- output [11:0]M_AXI_GP1_WID;
- output [1:0]M_AXI_GP1_ARBURST;
- output [1:0]M_AXI_GP1_ARLOCK;
- output [2:0]M_AXI_GP1_ARSIZE;
- output [1:0]M_AXI_GP1_AWBURST;
- output [1:0]M_AXI_GP1_AWLOCK;
- output [2:0]M_AXI_GP1_AWSIZE;
- output [2:0]M_AXI_GP1_ARPROT;
- output [2:0]M_AXI_GP1_AWPROT;
- output [31:0]M_AXI_GP1_ARADDR;
- output [31:0]M_AXI_GP1_AWADDR;
- output [31:0]M_AXI_GP1_WDATA;
- output [3:0]M_AXI_GP1_ARCACHE;
- output [3:0]M_AXI_GP1_ARLEN;
- output [3:0]M_AXI_GP1_ARQOS;
- output [3:0]M_AXI_GP1_AWCACHE;
- output [3:0]M_AXI_GP1_AWLEN;
- output [3:0]M_AXI_GP1_AWQOS;
- output [3:0]M_AXI_GP1_WSTRB;
- input M_AXI_GP1_ACLK;
- input M_AXI_GP1_ARREADY;
- input M_AXI_GP1_AWREADY;
- input M_AXI_GP1_BVALID;
- input M_AXI_GP1_RLAST;
- input M_AXI_GP1_RVALID;
- input M_AXI_GP1_WREADY;
- input [11:0]M_AXI_GP1_BID;
- input [11:0]M_AXI_GP1_RID;
- input [1:0]M_AXI_GP1_BRESP;
- input [1:0]M_AXI_GP1_RRESP;
- input [31:0]M_AXI_GP1_RDATA;
- output S_AXI_GP0_ARESETN;
- output S_AXI_GP0_ARREADY;
- output S_AXI_GP0_AWREADY;
- output S_AXI_GP0_BVALID;
- output S_AXI_GP0_RLAST;
- output S_AXI_GP0_RVALID;
- output S_AXI_GP0_WREADY;
- output [1:0]S_AXI_GP0_BRESP;
- output [1:0]S_AXI_GP0_RRESP;
- output [31:0]S_AXI_GP0_RDATA;
- output [5:0]S_AXI_GP0_BID;
- output [5:0]S_AXI_GP0_RID;
- input S_AXI_GP0_ACLK;
- input S_AXI_GP0_ARVALID;
- input S_AXI_GP0_AWVALID;
- input S_AXI_GP0_BREADY;
- input S_AXI_GP0_RREADY;
- input S_AXI_GP0_WLAST;
- input S_AXI_GP0_WVALID;
- input [1:0]S_AXI_GP0_ARBURST;
- input [1:0]S_AXI_GP0_ARLOCK;
- input [2:0]S_AXI_GP0_ARSIZE;
- input [1:0]S_AXI_GP0_AWBURST;
- input [1:0]S_AXI_GP0_AWLOCK;
- input [2:0]S_AXI_GP0_AWSIZE;
- input [2:0]S_AXI_GP0_ARPROT;
- input [2:0]S_AXI_GP0_AWPROT;
- input [31:0]S_AXI_GP0_ARADDR;
- input [31:0]S_AXI_GP0_AWADDR;
- input [31:0]S_AXI_GP0_WDATA;
- input [3:0]S_AXI_GP0_ARCACHE;
- input [3:0]S_AXI_GP0_ARLEN;
- input [3:0]S_AXI_GP0_ARQOS;
- input [3:0]S_AXI_GP0_AWCACHE;
- input [3:0]S_AXI_GP0_AWLEN;
- input [3:0]S_AXI_GP0_AWQOS;
- input [3:0]S_AXI_GP0_WSTRB;
- input [5:0]S_AXI_GP0_ARID;
- input [5:0]S_AXI_GP0_AWID;
- input [5:0]S_AXI_GP0_WID;
- output S_AXI_GP1_ARESETN;
- output S_AXI_GP1_ARREADY;
- output S_AXI_GP1_AWREADY;
- output S_AXI_GP1_BVALID;
- output S_AXI_GP1_RLAST;
- output S_AXI_GP1_RVALID;
- output S_AXI_GP1_WREADY;
- output [1:0]S_AXI_GP1_BRESP;
- output [1:0]S_AXI_GP1_RRESP;
- output [31:0]S_AXI_GP1_RDATA;
- output [5:0]S_AXI_GP1_BID;
- output [5:0]S_AXI_GP1_RID;
- input S_AXI_GP1_ACLK;
- input S_AXI_GP1_ARVALID;
- input S_AXI_GP1_AWVALID;
- input S_AXI_GP1_BREADY;
- input S_AXI_GP1_RREADY;
- input S_AXI_GP1_WLAST;
- input S_AXI_GP1_WVALID;
- input [1:0]S_AXI_GP1_ARBURST;
- input [1:0]S_AXI_GP1_ARLOCK;
- input [2:0]S_AXI_GP1_ARSIZE;
- input [1:0]S_AXI_GP1_AWBURST;
- input [1:0]S_AXI_GP1_AWLOCK;
- input [2:0]S_AXI_GP1_AWSIZE;
- input [2:0]S_AXI_GP1_ARPROT;
- input [2:0]S_AXI_GP1_AWPROT;
- input [31:0]S_AXI_GP1_ARADDR;
- input [31:0]S_AXI_GP1_AWADDR;
- input [31:0]S_AXI_GP1_WDATA;
- input [3:0]S_AXI_GP1_ARCACHE;
- input [3:0]S_AXI_GP1_ARLEN;
- input [3:0]S_AXI_GP1_ARQOS;
- input [3:0]S_AXI_GP1_AWCACHE;
- input [3:0]S_AXI_GP1_AWLEN;
- input [3:0]S_AXI_GP1_AWQOS;
- input [3:0]S_AXI_GP1_WSTRB;
- input [5:0]S_AXI_GP1_ARID;
- input [5:0]S_AXI_GP1_AWID;
- input [5:0]S_AXI_GP1_WID;
- output S_AXI_ACP_ARESETN;
- output S_AXI_ACP_ARREADY;
- output S_AXI_ACP_AWREADY;
- output S_AXI_ACP_BVALID;
- output S_AXI_ACP_RLAST;
- output S_AXI_ACP_RVALID;
- output S_AXI_ACP_WREADY;
- output [1:0]S_AXI_ACP_BRESP;
- output [1:0]S_AXI_ACP_RRESP;
- output [2:0]S_AXI_ACP_BID;
- output [2:0]S_AXI_ACP_RID;
- output [63:0]S_AXI_ACP_RDATA;
- input S_AXI_ACP_ACLK;
- input S_AXI_ACP_ARVALID;
- input S_AXI_ACP_AWVALID;
- input S_AXI_ACP_BREADY;
- input S_AXI_ACP_RREADY;
- input S_AXI_ACP_WLAST;
- input S_AXI_ACP_WVALID;
- input [2:0]S_AXI_ACP_ARID;
- input [2:0]S_AXI_ACP_ARPROT;
- input [2:0]S_AXI_ACP_AWID;
- input [2:0]S_AXI_ACP_AWPROT;
- input [2:0]S_AXI_ACP_WID;
- input [31:0]S_AXI_ACP_ARADDR;
- input [31:0]S_AXI_ACP_AWADDR;
- input [3:0]S_AXI_ACP_ARCACHE;
- input [3:0]S_AXI_ACP_ARLEN;
- input [3:0]S_AXI_ACP_ARQOS;
- input [3:0]S_AXI_ACP_AWCACHE;
- input [3:0]S_AXI_ACP_AWLEN;
- input [3:0]S_AXI_ACP_AWQOS;
- input [1:0]S_AXI_ACP_ARBURST;
- input [1:0]S_AXI_ACP_ARLOCK;
- input [2:0]S_AXI_ACP_ARSIZE;
- input [1:0]S_AXI_ACP_AWBURST;
- input [1:0]S_AXI_ACP_AWLOCK;
- input [2:0]S_AXI_ACP_AWSIZE;
- input [4:0]S_AXI_ACP_ARUSER;
- input [4:0]S_AXI_ACP_AWUSER;
- input [63:0]S_AXI_ACP_WDATA;
- input [7:0]S_AXI_ACP_WSTRB;
- output S_AXI_HP0_ARESETN;
- output S_AXI_HP0_ARREADY;
- output S_AXI_HP0_AWREADY;
- output S_AXI_HP0_BVALID;
- output S_AXI_HP0_RLAST;
- output S_AXI_HP0_RVALID;
- output S_AXI_HP0_WREADY;
- output [1:0]S_AXI_HP0_BRESP;
- output [1:0]S_AXI_HP0_RRESP;
- output [5:0]S_AXI_HP0_BID;
- output [5:0]S_AXI_HP0_RID;
- output [63:0]S_AXI_HP0_RDATA;
- output [7:0]S_AXI_HP0_RCOUNT;
- output [7:0]S_AXI_HP0_WCOUNT;
- output [2:0]S_AXI_HP0_RACOUNT;
- output [5:0]S_AXI_HP0_WACOUNT;
- input S_AXI_HP0_ACLK;
- input S_AXI_HP0_ARVALID;
- input S_AXI_HP0_AWVALID;
- input S_AXI_HP0_BREADY;
- input S_AXI_HP0_RDISSUECAP1_EN;
- input S_AXI_HP0_RREADY;
- input S_AXI_HP0_WLAST;
- input S_AXI_HP0_WRISSUECAP1_EN;
- input S_AXI_HP0_WVALID;
- input [1:0]S_AXI_HP0_ARBURST;
- input [1:0]S_AXI_HP0_ARLOCK;
- input [2:0]S_AXI_HP0_ARSIZE;
- input [1:0]S_AXI_HP0_AWBURST;
- input [1:0]S_AXI_HP0_AWLOCK;
- input [2:0]S_AXI_HP0_AWSIZE;
- input [2:0]S_AXI_HP0_ARPROT;
- input [2:0]S_AXI_HP0_AWPROT;
- input [31:0]S_AXI_HP0_ARADDR;
- input [31:0]S_AXI_HP0_AWADDR;
- input [3:0]S_AXI_HP0_ARCACHE;
- input [3:0]S_AXI_HP0_ARLEN;
- input [3:0]S_AXI_HP0_ARQOS;
- input [3:0]S_AXI_HP0_AWCACHE;
- input [3:0]S_AXI_HP0_AWLEN;
- input [3:0]S_AXI_HP0_AWQOS;
- input [5:0]S_AXI_HP0_ARID;
- input [5:0]S_AXI_HP0_AWID;
- input [5:0]S_AXI_HP0_WID;
- input [63:0]S_AXI_HP0_WDATA;
- input [7:0]S_AXI_HP0_WSTRB;
- output S_AXI_HP1_ARESETN;
- output S_AXI_HP1_ARREADY;
- output S_AXI_HP1_AWREADY;
- output S_AXI_HP1_BVALID;
- output S_AXI_HP1_RLAST;
- output S_AXI_HP1_RVALID;
- output S_AXI_HP1_WREADY;
- output [1:0]S_AXI_HP1_BRESP;
- output [1:0]S_AXI_HP1_RRESP;
- output [5:0]S_AXI_HP1_BID;
- output [5:0]S_AXI_HP1_RID;
- output [63:0]S_AXI_HP1_RDATA;
- output [7:0]S_AXI_HP1_RCOUNT;
- output [7:0]S_AXI_HP1_WCOUNT;
- output [2:0]S_AXI_HP1_RACOUNT;
- output [5:0]S_AXI_HP1_WACOUNT;
- input S_AXI_HP1_ACLK;
- input S_AXI_HP1_ARVALID;
- input S_AXI_HP1_AWVALID;
- input S_AXI_HP1_BREADY;
- input S_AXI_HP1_RDISSUECAP1_EN;
- input S_AXI_HP1_RREADY;
- input S_AXI_HP1_WLAST;
- input S_AXI_HP1_WRISSUECAP1_EN;
- input S_AXI_HP1_WVALID;
- input [1:0]S_AXI_HP1_ARBURST;
- input [1:0]S_AXI_HP1_ARLOCK;
- input [2:0]S_AXI_HP1_ARSIZE;
- input [1:0]S_AXI_HP1_AWBURST;
- input [1:0]S_AXI_HP1_AWLOCK;
- input [2:0]S_AXI_HP1_AWSIZE;
- input [2:0]S_AXI_HP1_ARPROT;
- input [2:0]S_AXI_HP1_AWPROT;
- input [31:0]S_AXI_HP1_ARADDR;
- input [31:0]S_AXI_HP1_AWADDR;
- input [3:0]S_AXI_HP1_ARCACHE;
- input [3:0]S_AXI_HP1_ARLEN;
- input [3:0]S_AXI_HP1_ARQOS;
- input [3:0]S_AXI_HP1_AWCACHE;
- input [3:0]S_AXI_HP1_AWLEN;
- input [3:0]S_AXI_HP1_AWQOS;
- input [5:0]S_AXI_HP1_ARID;
- input [5:0]S_AXI_HP1_AWID;
- input [5:0]S_AXI_HP1_WID;
- input [63:0]S_AXI_HP1_WDATA;
- input [7:0]S_AXI_HP1_WSTRB;
- output S_AXI_HP2_ARESETN;
- output S_AXI_HP2_ARREADY;
- output S_AXI_HP2_AWREADY;
- output S_AXI_HP2_BVALID;
- output S_AXI_HP2_RLAST;
- output S_AXI_HP2_RVALID;
- output S_AXI_HP2_WREADY;
- output [1:0]S_AXI_HP2_BRESP;
- output [1:0]S_AXI_HP2_RRESP;
- output [5:0]S_AXI_HP2_BID;
- output [5:0]S_AXI_HP2_RID;
- output [63:0]S_AXI_HP2_RDATA;
- output [7:0]S_AXI_HP2_RCOUNT;
- output [7:0]S_AXI_HP2_WCOUNT;
- output [2:0]S_AXI_HP2_RACOUNT;
- output [5:0]S_AXI_HP2_WACOUNT;
- input S_AXI_HP2_ACLK;
- input S_AXI_HP2_ARVALID;
- input S_AXI_HP2_AWVALID;
- input S_AXI_HP2_BREADY;
- input S_AXI_HP2_RDISSUECAP1_EN;
- input S_AXI_HP2_RREADY;
- input S_AXI_HP2_WLAST;
- input S_AXI_HP2_WRISSUECAP1_EN;
- input S_AXI_HP2_WVALID;
- input [1:0]S_AXI_HP2_ARBURST;
- input [1:0]S_AXI_HP2_ARLOCK;
- input [2:0]S_AXI_HP2_ARSIZE;
- input [1:0]S_AXI_HP2_AWBURST;
- input [1:0]S_AXI_HP2_AWLOCK;
- input [2:0]S_AXI_HP2_AWSIZE;
- input [2:0]S_AXI_HP2_ARPROT;
- input [2:0]S_AXI_HP2_AWPROT;
- input [31:0]S_AXI_HP2_ARADDR;
- input [31:0]S_AXI_HP2_AWADDR;
- input [3:0]S_AXI_HP2_ARCACHE;
- input [3:0]S_AXI_HP2_ARLEN;
- input [3:0]S_AXI_HP2_ARQOS;
- input [3:0]S_AXI_HP2_AWCACHE;
- input [3:0]S_AXI_HP2_AWLEN;
- input [3:0]S_AXI_HP2_AWQOS;
- input [5:0]S_AXI_HP2_ARID;
- input [5:0]S_AXI_HP2_AWID;
- input [5:0]S_AXI_HP2_WID;
- input [63:0]S_AXI_HP2_WDATA;
- input [7:0]S_AXI_HP2_WSTRB;
- output S_AXI_HP3_ARESETN;
- output S_AXI_HP3_ARREADY;
- output S_AXI_HP3_AWREADY;
- output S_AXI_HP3_BVALID;
- output S_AXI_HP3_RLAST;
- output S_AXI_HP3_RVALID;
- output S_AXI_HP3_WREADY;
- output [1:0]S_AXI_HP3_BRESP;
- output [1:0]S_AXI_HP3_RRESP;
- output [5:0]S_AXI_HP3_BID;
- output [5:0]S_AXI_HP3_RID;
- output [63:0]S_AXI_HP3_RDATA;
- output [7:0]S_AXI_HP3_RCOUNT;
- output [7:0]S_AXI_HP3_WCOUNT;
- output [2:0]S_AXI_HP3_RACOUNT;
- output [5:0]S_AXI_HP3_WACOUNT;
- input S_AXI_HP3_ACLK;
- input S_AXI_HP3_ARVALID;
- input S_AXI_HP3_AWVALID;
- input S_AXI_HP3_BREADY;
- input S_AXI_HP3_RDISSUECAP1_EN;
- input S_AXI_HP3_RREADY;
- input S_AXI_HP3_WLAST;
- input S_AXI_HP3_WRISSUECAP1_EN;
- input S_AXI_HP3_WVALID;
- input [1:0]S_AXI_HP3_ARBURST;
- input [1:0]S_AXI_HP3_ARLOCK;
- input [2:0]S_AXI_HP3_ARSIZE;
- input [1:0]S_AXI_HP3_AWBURST;
- input [1:0]S_AXI_HP3_AWLOCK;
- input [2:0]S_AXI_HP3_AWSIZE;
- input [2:0]S_AXI_HP3_ARPROT;
- input [2:0]S_AXI_HP3_AWPROT;
- input [31:0]S_AXI_HP3_ARADDR;
- input [31:0]S_AXI_HP3_AWADDR;
- input [3:0]S_AXI_HP3_ARCACHE;
- input [3:0]S_AXI_HP3_ARLEN;
- input [3:0]S_AXI_HP3_ARQOS;
- input [3:0]S_AXI_HP3_AWCACHE;
- input [3:0]S_AXI_HP3_AWLEN;
- input [3:0]S_AXI_HP3_AWQOS;
- input [5:0]S_AXI_HP3_ARID;
- input [5:0]S_AXI_HP3_AWID;
- input [5:0]S_AXI_HP3_WID;
- input [63:0]S_AXI_HP3_WDATA;
- input [7:0]S_AXI_HP3_WSTRB;
- output IRQ_P2F_DMAC_ABORT;
- output IRQ_P2F_DMAC0;
- output IRQ_P2F_DMAC1;
- output IRQ_P2F_DMAC2;
- output IRQ_P2F_DMAC3;
- output IRQ_P2F_DMAC4;
- output IRQ_P2F_DMAC5;
- output IRQ_P2F_DMAC6;
- output IRQ_P2F_DMAC7;
- output IRQ_P2F_SMC;
- output IRQ_P2F_QSPI;
- output IRQ_P2F_CTI;
- output IRQ_P2F_GPIO;
- output IRQ_P2F_USB0;
- output IRQ_P2F_ENET0;
- output IRQ_P2F_ENET_WAKE0;
- output IRQ_P2F_SDIO0;
- output IRQ_P2F_I2C0;
- output IRQ_P2F_SPI0;
- output IRQ_P2F_UART0;
- output IRQ_P2F_CAN0;
- output IRQ_P2F_USB1;
- output IRQ_P2F_ENET1;
- output IRQ_P2F_ENET_WAKE1;
- output IRQ_P2F_SDIO1;
- output IRQ_P2F_I2C1;
- output IRQ_P2F_SPI1;
- output IRQ_P2F_UART1;
- output IRQ_P2F_CAN1;
- input [0:0]IRQ_F2P;
- input Core0_nFIQ;
- input Core0_nIRQ;
- input Core1_nFIQ;
- input Core1_nIRQ;
- output [1:0]DMA0_DATYPE;
- output DMA0_DAVALID;
- output DMA0_DRREADY;
- output DMA0_RSTN;
- output [1:0]DMA1_DATYPE;
- output DMA1_DAVALID;
- output DMA1_DRREADY;
- output DMA1_RSTN;
- output [1:0]DMA2_DATYPE;
- output DMA2_DAVALID;
- output DMA2_DRREADY;
- output DMA2_RSTN;
- output [1:0]DMA3_DATYPE;
- output DMA3_DAVALID;
- output DMA3_DRREADY;
- output DMA3_RSTN;
- input DMA0_ACLK;
- input DMA0_DAREADY;
- input DMA0_DRLAST;
- input DMA0_DRVALID;
- input DMA1_ACLK;
- input DMA1_DAREADY;
- input DMA1_DRLAST;
- input DMA1_DRVALID;
- input DMA2_ACLK;
- input DMA2_DAREADY;
- input DMA2_DRLAST;
- input DMA2_DRVALID;
- input DMA3_ACLK;
- input DMA3_DAREADY;
- input DMA3_DRLAST;
- input DMA3_DRVALID;
- input [1:0]DMA0_DRTYPE;
- input [1:0]DMA1_DRTYPE;
- input [1:0]DMA2_DRTYPE;
- input [1:0]DMA3_DRTYPE;
- output FCLK_CLK3;
- output FCLK_CLK2;
- output FCLK_CLK1;
- output FCLK_CLK0;
- input FCLK_CLKTRIG3_N;
- input FCLK_CLKTRIG2_N;
- input FCLK_CLKTRIG1_N;
- input FCLK_CLKTRIG0_N;
- output FCLK_RESET3_N;
- output FCLK_RESET2_N;
- output FCLK_RESET1_N;
- output FCLK_RESET0_N;
- input [31:0]FTMD_TRACEIN_DATA;
- input FTMD_TRACEIN_VALID;
- input FTMD_TRACEIN_CLK;
- input [3:0]FTMD_TRACEIN_ATID;
- input FTMT_F2P_TRIG_0;
- output FTMT_F2P_TRIGACK_0;
- input FTMT_F2P_TRIG_1;
- output FTMT_F2P_TRIGACK_1;
- input FTMT_F2P_TRIG_2;
- output FTMT_F2P_TRIGACK_2;
- input FTMT_F2P_TRIG_3;
- output FTMT_F2P_TRIGACK_3;
- input [31:0]FTMT_F2P_DEBUG;
- input FTMT_P2F_TRIGACK_0;
- output FTMT_P2F_TRIG_0;
- input FTMT_P2F_TRIGACK_1;
- output FTMT_P2F_TRIG_1;
- input FTMT_P2F_TRIGACK_2;
- output FTMT_P2F_TRIG_2;
- input FTMT_P2F_TRIGACK_3;
- output FTMT_P2F_TRIG_3;
- output [31:0]FTMT_P2F_DEBUG;
- input FPGA_IDLE_N;
- output EVENT_EVENTO;
- output [1:0]EVENT_STANDBYWFE;
- output [1:0]EVENT_STANDBYWFI;
- input EVENT_EVENTI;
- input [3:0]DDR_ARB;
- inout [53:0]MIO;
- inout DDR_CAS_n;
- inout DDR_CKE;
- inout DDR_Clk_n;
- inout DDR_Clk;
- inout DDR_CS_n;
- inout DDR_DRSTB;
- inout DDR_ODT;
- inout DDR_RAS_n;
- inout DDR_WEB;
- inout [2:0]DDR_BankAddr;
- inout [14:0]DDR_Addr;
- inout DDR_VRN;
- inout DDR_VRP;
- inout [3:0]DDR_DM;
- inout [31:0]DDR_DQ;
- inout [3:0]DDR_DQS_n;
- inout [3:0]DDR_DQS;
- inout PS_SRSTB;
- inout PS_CLK;
- inout PS_PORB;
-
- wire \<const0> ;
- wire \<const1> ;
- wire CAN0_PHY_RX;
- wire CAN0_PHY_TX;
- wire CAN1_PHY_RX;
- wire CAN1_PHY_TX;
- wire Core0_nFIQ;
- wire Core0_nIRQ;
- wire Core1_nFIQ;
- wire Core1_nIRQ;
- wire [3:0]DDR_ARB;
- wire [14:0]DDR_Addr;
- wire [2:0]DDR_BankAddr;
- wire DDR_CAS_n;
- wire DDR_CKE;
- wire DDR_CS_n;
- wire DDR_Clk;
- wire DDR_Clk_n;
- wire [3:0]DDR_DM;
- wire [31:0]DDR_DQ;
- wire [3:0]DDR_DQS;
- wire [3:0]DDR_DQS_n;
- wire DDR_DRSTB;
- wire DDR_ODT;
- wire DDR_RAS_n;
- wire DDR_VRN;
- wire DDR_VRP;
- wire DDR_WEB;
- wire DMA0_ACLK;
- wire DMA0_DAREADY;
- wire [1:0]DMA0_DATYPE;
- wire DMA0_DAVALID;
- wire DMA0_DRLAST;
- wire DMA0_DRREADY;
- wire [1:0]DMA0_DRTYPE;
- wire DMA0_DRVALID;
- wire DMA0_RSTN;
- wire DMA1_ACLK;
- wire DMA1_DAREADY;
- wire [1:0]DMA1_DATYPE;
- wire DMA1_DAVALID;
- wire DMA1_DRLAST;
- wire DMA1_DRREADY;
- wire [1:0]DMA1_DRTYPE;
- wire DMA1_DRVALID;
- wire DMA1_RSTN;
- wire DMA2_ACLK;
- wire DMA2_DAREADY;
- wire [1:0]DMA2_DATYPE;
- wire DMA2_DAVALID;
- wire DMA2_DRLAST;
- wire DMA2_DRREADY;
- wire [1:0]DMA2_DRTYPE;
- wire DMA2_DRVALID;
- wire DMA2_RSTN;
- wire DMA3_ACLK;
- wire DMA3_DAREADY;
- wire [1:0]DMA3_DATYPE;
- wire DMA3_DAVALID;
- wire DMA3_DRLAST;
- wire DMA3_DRREADY;
- wire [1:0]DMA3_DRTYPE;
- wire DMA3_DRVALID;
- wire DMA3_RSTN;
- wire ENET0_EXT_INTIN;
- wire ENET0_GMII_RX_CLK;
- wire ENET0_GMII_TX_CLK;
- wire ENET0_MDIO_I;
- wire ENET0_MDIO_MDC;
- wire ENET0_MDIO_O;
- wire ENET0_MDIO_T;
- wire ENET0_MDIO_T_n;
- wire ENET0_PTP_DELAY_REQ_RX;
- wire ENET0_PTP_DELAY_REQ_TX;
- wire ENET0_PTP_PDELAY_REQ_RX;
- wire ENET0_PTP_PDELAY_REQ_TX;
- wire ENET0_PTP_PDELAY_RESP_RX;
- wire ENET0_PTP_PDELAY_RESP_TX;
- wire ENET0_PTP_SYNC_FRAME_RX;
- wire ENET0_PTP_SYNC_FRAME_TX;
- wire ENET0_SOF_RX;
- wire ENET0_SOF_TX;
- wire ENET1_EXT_INTIN;
- wire ENET1_GMII_RX_CLK;
- wire ENET1_GMII_TX_CLK;
- wire ENET1_MDIO_I;
- wire ENET1_MDIO_MDC;
- wire ENET1_MDIO_O;
- wire ENET1_MDIO_T;
- wire ENET1_MDIO_T_n;
- wire ENET1_PTP_DELAY_REQ_RX;
- wire ENET1_PTP_DELAY_REQ_TX;
- wire ENET1_PTP_PDELAY_REQ_RX;
- wire ENET1_PTP_PDELAY_REQ_TX;
- wire ENET1_PTP_PDELAY_RESP_RX;
- wire ENET1_PTP_PDELAY_RESP_TX;
- wire ENET1_PTP_SYNC_FRAME_RX;
- wire ENET1_PTP_SYNC_FRAME_TX;
- wire ENET1_SOF_RX;
- wire ENET1_SOF_TX;
- wire EVENT_EVENTI;
- wire EVENT_EVENTO;
- wire [1:0]EVENT_STANDBYWFE;
- wire [1:0]EVENT_STANDBYWFI;
- wire FCLK_CLK0;
- wire FCLK_CLK1;
- wire FCLK_CLK2;
- wire FCLK_CLK3;
- wire [0:0]FCLK_CLK_unbuffered;
- wire FCLK_RESET0_N;
- wire FCLK_RESET1_N;
- wire FCLK_RESET2_N;
- wire FCLK_RESET3_N;
- wire FPGA_IDLE_N;
- wire FTMD_TRACEIN_CLK;
- wire [31:0]FTMT_F2P_DEBUG;
- wire FTMT_F2P_TRIGACK_0;
- wire FTMT_F2P_TRIGACK_1;
- wire FTMT_F2P_TRIGACK_2;
- wire FTMT_F2P_TRIGACK_3;
- wire FTMT_F2P_TRIG_0;
- wire FTMT_F2P_TRIG_1;
- wire FTMT_F2P_TRIG_2;
- wire FTMT_F2P_TRIG_3;
- wire [31:0]FTMT_P2F_DEBUG;
- wire FTMT_P2F_TRIGACK_0;
- wire FTMT_P2F_TRIGACK_1;
- wire FTMT_P2F_TRIGACK_2;
- wire FTMT_P2F_TRIGACK_3;
- wire FTMT_P2F_TRIG_0;
- wire FTMT_P2F_TRIG_1;
- wire FTMT_P2F_TRIG_2;
- wire FTMT_P2F_TRIG_3;
- wire [63:0]GPIO_I;
- wire [63:0]GPIO_O;
- wire [63:0]GPIO_T;
- wire I2C0_SCL_I;
- wire I2C0_SCL_O;
- wire I2C0_SCL_T;
- wire I2C0_SCL_T_n;
- wire I2C0_SDA_I;
- wire I2C0_SDA_O;
- wire I2C0_SDA_T;
- wire I2C0_SDA_T_n;
- wire I2C1_SCL_I;
- wire I2C1_SCL_O;
- wire I2C1_SCL_T;
- wire I2C1_SCL_T_n;
- wire I2C1_SDA_I;
- wire I2C1_SDA_O;
- wire I2C1_SDA_T;
- wire I2C1_SDA_T_n;
- wire [0:0]IRQ_F2P;
- wire IRQ_P2F_CAN0;
- wire IRQ_P2F_CAN1;
- wire IRQ_P2F_CTI;
- wire IRQ_P2F_DMAC0;
- wire IRQ_P2F_DMAC1;
- wire IRQ_P2F_DMAC2;
- wire IRQ_P2F_DMAC3;
- wire IRQ_P2F_DMAC4;
- wire IRQ_P2F_DMAC5;
- wire IRQ_P2F_DMAC6;
- wire IRQ_P2F_DMAC7;
- wire IRQ_P2F_DMAC_ABORT;
- wire IRQ_P2F_ENET0;
- wire IRQ_P2F_ENET1;
- wire IRQ_P2F_ENET_WAKE0;
- wire IRQ_P2F_ENET_WAKE1;
- wire IRQ_P2F_GPIO;
- wire IRQ_P2F_I2C0;
- wire IRQ_P2F_I2C1;
- wire IRQ_P2F_QSPI;
- wire IRQ_P2F_SDIO0;
- wire IRQ_P2F_SDIO1;
- wire IRQ_P2F_SMC;
- wire IRQ_P2F_SPI0;
- wire IRQ_P2F_SPI1;
- wire IRQ_P2F_UART0;
- wire IRQ_P2F_UART1;
- wire IRQ_P2F_USB0;
- wire IRQ_P2F_USB1;
- wire [53:0]MIO;
- wire M_AXI_GP0_ACLK;
- wire [31:0]M_AXI_GP0_ARADDR;
- wire [1:0]M_AXI_GP0_ARBURST;
- wire [3:0]\^M_AXI_GP0_ARCACHE ;
- wire M_AXI_GP0_ARESETN;
- wire [11:0]M_AXI_GP0_ARID;
- wire [3:0]M_AXI_GP0_ARLEN;
- wire [1:0]M_AXI_GP0_ARLOCK;
- wire [2:0]M_AXI_GP0_ARPROT;
- wire [3:0]M_AXI_GP0_ARQOS;
- wire M_AXI_GP0_ARREADY;
- wire [1:0]\^M_AXI_GP0_ARSIZE ;
- wire M_AXI_GP0_ARVALID;
- wire [31:0]M_AXI_GP0_AWADDR;
- wire [1:0]M_AXI_GP0_AWBURST;
- wire [3:0]\^M_AXI_GP0_AWCACHE ;
- wire [11:0]M_AXI_GP0_AWID;
- wire [3:0]M_AXI_GP0_AWLEN;
- wire [1:0]M_AXI_GP0_AWLOCK;
- wire [2:0]M_AXI_GP0_AWPROT;
- wire [3:0]M_AXI_GP0_AWQOS;
- wire M_AXI_GP0_AWREADY;
- wire [1:0]\^M_AXI_GP0_AWSIZE ;
- wire M_AXI_GP0_AWVALID;
- wire [11:0]M_AXI_GP0_BID;
- wire M_AXI_GP0_BREADY;
- wire [1:0]M_AXI_GP0_BRESP;
- wire M_AXI_GP0_BVALID;
- wire [31:0]M_AXI_GP0_RDATA;
- wire [11:0]M_AXI_GP0_RID;
- wire M_AXI_GP0_RLAST;
- wire M_AXI_GP0_RREADY;
- wire [1:0]M_AXI_GP0_RRESP;
- wire M_AXI_GP0_RVALID;
- wire [31:0]M_AXI_GP0_WDATA;
- wire [11:0]M_AXI_GP0_WID;
- wire M_AXI_GP0_WLAST;
- wire M_AXI_GP0_WREADY;
- wire [3:0]M_AXI_GP0_WSTRB;
- wire M_AXI_GP0_WVALID;
- wire M_AXI_GP1_ACLK;
- wire [31:0]M_AXI_GP1_ARADDR;
- wire [1:0]M_AXI_GP1_ARBURST;
- wire [3:0]\^M_AXI_GP1_ARCACHE ;
- wire M_AXI_GP1_ARESETN;
- wire [11:0]M_AXI_GP1_ARID;
- wire [3:0]M_AXI_GP1_ARLEN;
- wire [1:0]M_AXI_GP1_ARLOCK;
- wire [2:0]M_AXI_GP1_ARPROT;
- wire [3:0]M_AXI_GP1_ARQOS;
- wire M_AXI_GP1_ARREADY;
- wire [1:0]\^M_AXI_GP1_ARSIZE ;
- wire M_AXI_GP1_ARVALID;
- wire [31:0]M_AXI_GP1_AWADDR;
- wire [1:0]M_AXI_GP1_AWBURST;
- wire [3:0]\^M_AXI_GP1_AWCACHE ;
- wire [11:0]M_AXI_GP1_AWID;
- wire [3:0]M_AXI_GP1_AWLEN;
- wire [1:0]M_AXI_GP1_AWLOCK;
- wire [2:0]M_AXI_GP1_AWPROT;
- wire [3:0]M_AXI_GP1_AWQOS;
- wire M_AXI_GP1_AWREADY;
- wire [1:0]\^M_AXI_GP1_AWSIZE ;
- wire M_AXI_GP1_AWVALID;
- wire [11:0]M_AXI_GP1_BID;
- wire M_AXI_GP1_BREADY;
- wire [1:0]M_AXI_GP1_BRESP;
- wire M_AXI_GP1_BVALID;
- wire [31:0]M_AXI_GP1_RDATA;
- wire [11:0]M_AXI_GP1_RID;
- wire M_AXI_GP1_RLAST;
- wire M_AXI_GP1_RREADY;
- wire [1:0]M_AXI_GP1_RRESP;
- wire M_AXI_GP1_RVALID;
- wire [31:0]M_AXI_GP1_WDATA;
- wire [11:0]M_AXI_GP1_WID;
- wire M_AXI_GP1_WLAST;
- wire M_AXI_GP1_WREADY;
- wire [3:0]M_AXI_GP1_WSTRB;
- wire M_AXI_GP1_WVALID;
- wire PJTAG_TCK;
- wire PJTAG_TDI;
- wire PJTAG_TMS;
- wire PS_CLK;
- wire PS_PORB;
- wire PS_SRSTB;
- wire SDIO0_BUSPOW;
- wire [2:0]SDIO0_BUSVOLT;
- wire SDIO0_CDN;
- wire SDIO0_CLK;
- wire SDIO0_CLK_FB;
- wire SDIO0_CMD_I;
- wire SDIO0_CMD_O;
- wire SDIO0_CMD_T;
- wire SDIO0_CMD_T_n;
- wire [3:0]SDIO0_DATA_I;
- wire [3:0]SDIO0_DATA_O;
- wire [3:0]SDIO0_DATA_T;
- wire [3:0]SDIO0_DATA_T_n;
- wire SDIO0_LED;
- wire SDIO0_WP;
- wire SDIO1_BUSPOW;
- wire [2:0]SDIO1_BUSVOLT;
- wire SDIO1_CDN;
- wire SDIO1_CLK;
- wire SDIO1_CLK_FB;
- wire SDIO1_CMD_I;
- wire SDIO1_CMD_O;
- wire SDIO1_CMD_T;
- wire SDIO1_CMD_T_n;
- wire [3:0]SDIO1_DATA_I;
- wire [3:0]SDIO1_DATA_O;
- wire [3:0]SDIO1_DATA_T;
- wire [3:0]SDIO1_DATA_T_n;
- wire SDIO1_LED;
- wire SDIO1_WP;
- wire SPI0_MISO_I;
- wire SPI0_MISO_O;
- wire SPI0_MISO_T;
- wire SPI0_MISO_T_n;
- wire SPI0_MOSI_I;
- wire SPI0_MOSI_O;
- wire SPI0_MOSI_T;
- wire SPI0_MOSI_T_n;
- wire SPI0_SCLK_I;
- wire SPI0_SCLK_O;
- wire SPI0_SCLK_T;
- wire SPI0_SCLK_T_n;
- wire SPI0_SS1_O;
- wire SPI0_SS2_O;
- wire SPI0_SS_I;
- wire SPI0_SS_O;
- wire SPI0_SS_T;
- wire SPI0_SS_T_n;
- wire SPI1_MISO_I;
- wire SPI1_MISO_O;
- wire SPI1_MISO_T;
- wire SPI1_MISO_T_n;
- wire SPI1_MOSI_I;
- wire SPI1_MOSI_O;
- wire SPI1_MOSI_T;
- wire SPI1_MOSI_T_n;
- wire SPI1_SCLK_I;
- wire SPI1_SCLK_O;
- wire SPI1_SCLK_T;
- wire SPI1_SCLK_T_n;
- wire SPI1_SS1_O;
- wire SPI1_SS2_O;
- wire SPI1_SS_I;
- wire SPI1_SS_O;
- wire SPI1_SS_T;
- wire SPI1_SS_T_n;
- wire SRAM_INTIN;
- wire S_AXI_ACP_ACLK;
- wire [31:0]S_AXI_ACP_ARADDR;
- wire [1:0]S_AXI_ACP_ARBURST;
- wire [3:0]S_AXI_ACP_ARCACHE;
- wire S_AXI_ACP_ARESETN;
- wire [2:0]S_AXI_ACP_ARID;
- wire [3:0]S_AXI_ACP_ARLEN;
- wire [1:0]S_AXI_ACP_ARLOCK;
- wire [2:0]S_AXI_ACP_ARPROT;
- wire [3:0]S_AXI_ACP_ARQOS;
- wire S_AXI_ACP_ARREADY;
- wire [2:0]S_AXI_ACP_ARSIZE;
- wire [4:0]S_AXI_ACP_ARUSER;
- wire S_AXI_ACP_ARVALID;
- wire [31:0]S_AXI_ACP_AWADDR;
- wire [1:0]S_AXI_ACP_AWBURST;
- wire [3:0]S_AXI_ACP_AWCACHE;
- wire [2:0]S_AXI_ACP_AWID;
- wire [3:0]S_AXI_ACP_AWLEN;
- wire [1:0]S_AXI_ACP_AWLOCK;
- wire [2:0]S_AXI_ACP_AWPROT;
- wire [3:0]S_AXI_ACP_AWQOS;
- wire S_AXI_ACP_AWREADY;
- wire [2:0]S_AXI_ACP_AWSIZE;
- wire [4:0]S_AXI_ACP_AWUSER;
- wire S_AXI_ACP_AWVALID;
- wire [2:0]S_AXI_ACP_BID;
- wire S_AXI_ACP_BREADY;
- wire [1:0]S_AXI_ACP_BRESP;
- wire S_AXI_ACP_BVALID;
- wire [63:0]S_AXI_ACP_RDATA;
- wire [2:0]S_AXI_ACP_RID;
- wire S_AXI_ACP_RLAST;
- wire S_AXI_ACP_RREADY;
- wire [1:0]S_AXI_ACP_RRESP;
- wire S_AXI_ACP_RVALID;
- wire [63:0]S_AXI_ACP_WDATA;
- wire [2:0]S_AXI_ACP_WID;
- wire S_AXI_ACP_WLAST;
- wire S_AXI_ACP_WREADY;
- wire [7:0]S_AXI_ACP_WSTRB;
- wire S_AXI_ACP_WVALID;
- wire S_AXI_GP0_ACLK;
- wire [31:0]S_AXI_GP0_ARADDR;
- wire [1:0]S_AXI_GP0_ARBURST;
- wire [3:0]S_AXI_GP0_ARCACHE;
- wire S_AXI_GP0_ARESETN;
- wire [5:0]S_AXI_GP0_ARID;
- wire [3:0]S_AXI_GP0_ARLEN;
- wire [1:0]S_AXI_GP0_ARLOCK;
- wire [2:0]S_AXI_GP0_ARPROT;
- wire [3:0]S_AXI_GP0_ARQOS;
- wire S_AXI_GP0_ARREADY;
- wire [2:0]S_AXI_GP0_ARSIZE;
- wire S_AXI_GP0_ARVALID;
- wire [31:0]S_AXI_GP0_AWADDR;
- wire [1:0]S_AXI_GP0_AWBURST;
- wire [3:0]S_AXI_GP0_AWCACHE;
- wire [5:0]S_AXI_GP0_AWID;
- wire [3:0]S_AXI_GP0_AWLEN;
- wire [1:0]S_AXI_GP0_AWLOCK;
- wire [2:0]S_AXI_GP0_AWPROT;
- wire [3:0]S_AXI_GP0_AWQOS;
- wire S_AXI_GP0_AWREADY;
- wire [2:0]S_AXI_GP0_AWSIZE;
- wire S_AXI_GP0_AWVALID;
- wire [5:0]S_AXI_GP0_BID;
- wire S_AXI_GP0_BREADY;
- wire [1:0]S_AXI_GP0_BRESP;
- wire S_AXI_GP0_BVALID;
- wire [31:0]S_AXI_GP0_RDATA;
- wire [5:0]S_AXI_GP0_RID;
- wire S_AXI_GP0_RLAST;
- wire S_AXI_GP0_RREADY;
- wire [1:0]S_AXI_GP0_RRESP;
- wire S_AXI_GP0_RVALID;
- wire [31:0]S_AXI_GP0_WDATA;
- wire [5:0]S_AXI_GP0_WID;
- wire S_AXI_GP0_WLAST;
- wire S_AXI_GP0_WREADY;
- wire [3:0]S_AXI_GP0_WSTRB;
- wire S_AXI_GP0_WVALID;
- wire S_AXI_GP1_ACLK;
- wire [31:0]S_AXI_GP1_ARADDR;
- wire [1:0]S_AXI_GP1_ARBURST;
- wire [3:0]S_AXI_GP1_ARCACHE;
- wire S_AXI_GP1_ARESETN;
- wire [5:0]S_AXI_GP1_ARID;
- wire [3:0]S_AXI_GP1_ARLEN;
- wire [1:0]S_AXI_GP1_ARLOCK;
- wire [2:0]S_AXI_GP1_ARPROT;
- wire [3:0]S_AXI_GP1_ARQOS;
- wire S_AXI_GP1_ARREADY;
- wire [2:0]S_AXI_GP1_ARSIZE;
- wire S_AXI_GP1_ARVALID;
- wire [31:0]S_AXI_GP1_AWADDR;
- wire [1:0]S_AXI_GP1_AWBURST;
- wire [3:0]S_AXI_GP1_AWCACHE;
- wire [5:0]S_AXI_GP1_AWID;
- wire [3:0]S_AXI_GP1_AWLEN;
- wire [1:0]S_AXI_GP1_AWLOCK;
- wire [2:0]S_AXI_GP1_AWPROT;
- wire [3:0]S_AXI_GP1_AWQOS;
- wire S_AXI_GP1_AWREADY;
- wire [2:0]S_AXI_GP1_AWSIZE;
- wire S_AXI_GP1_AWVALID;
- wire [5:0]S_AXI_GP1_BID;
- wire S_AXI_GP1_BREADY;
- wire [1:0]S_AXI_GP1_BRESP;
- wire S_AXI_GP1_BVALID;
- wire [31:0]S_AXI_GP1_RDATA;
- wire [5:0]S_AXI_GP1_RID;
- wire S_AXI_GP1_RLAST;
- wire S_AXI_GP1_RREADY;
- wire [1:0]S_AXI_GP1_RRESP;
- wire S_AXI_GP1_RVALID;
- wire [31:0]S_AXI_GP1_WDATA;
- wire [5:0]S_AXI_GP1_WID;
- wire S_AXI_GP1_WLAST;
- wire S_AXI_GP1_WREADY;
- wire [3:0]S_AXI_GP1_WSTRB;
- wire S_AXI_GP1_WVALID;
- wire S_AXI_HP0_ACLK;
- wire [31:0]S_AXI_HP0_ARADDR;
- wire [1:0]S_AXI_HP0_ARBURST;
- wire [3:0]S_AXI_HP0_ARCACHE;
- wire S_AXI_HP0_ARESETN;
- wire [5:0]S_AXI_HP0_ARID;
- wire [3:0]S_AXI_HP0_ARLEN;
- wire [1:0]S_AXI_HP0_ARLOCK;
- wire [2:0]S_AXI_HP0_ARPROT;
- wire [3:0]S_AXI_HP0_ARQOS;
- wire S_AXI_HP0_ARREADY;
- wire [2:0]S_AXI_HP0_ARSIZE;
- wire S_AXI_HP0_ARVALID;
- wire [31:0]S_AXI_HP0_AWADDR;
- wire [1:0]S_AXI_HP0_AWBURST;
- wire [3:0]S_AXI_HP0_AWCACHE;
- wire [5:0]S_AXI_HP0_AWID;
- wire [3:0]S_AXI_HP0_AWLEN;
- wire [1:0]S_AXI_HP0_AWLOCK;
- wire [2:0]S_AXI_HP0_AWPROT;
- wire [3:0]S_AXI_HP0_AWQOS;
- wire S_AXI_HP0_AWREADY;
- wire [2:0]S_AXI_HP0_AWSIZE;
- wire S_AXI_HP0_AWVALID;
- wire [5:0]S_AXI_HP0_BID;
- wire S_AXI_HP0_BREADY;
- wire [1:0]S_AXI_HP0_BRESP;
- wire S_AXI_HP0_BVALID;
- wire [2:0]S_AXI_HP0_RACOUNT;
- wire [7:0]S_AXI_HP0_RCOUNT;
- wire [63:0]S_AXI_HP0_RDATA;
- wire S_AXI_HP0_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP0_RID;
- wire S_AXI_HP0_RLAST;
- wire S_AXI_HP0_RREADY;
- wire [1:0]S_AXI_HP0_RRESP;
- wire S_AXI_HP0_RVALID;
- wire [5:0]S_AXI_HP0_WACOUNT;
- wire [7:0]S_AXI_HP0_WCOUNT;
- wire [63:0]S_AXI_HP0_WDATA;
- wire [5:0]S_AXI_HP0_WID;
- wire S_AXI_HP0_WLAST;
- wire S_AXI_HP0_WREADY;
- wire S_AXI_HP0_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP0_WSTRB;
- wire S_AXI_HP0_WVALID;
- wire S_AXI_HP1_ACLK;
- wire [31:0]S_AXI_HP1_ARADDR;
- wire [1:0]S_AXI_HP1_ARBURST;
- wire [3:0]S_AXI_HP1_ARCACHE;
- wire S_AXI_HP1_ARESETN;
- wire [5:0]S_AXI_HP1_ARID;
- wire [3:0]S_AXI_HP1_ARLEN;
- wire [1:0]S_AXI_HP1_ARLOCK;
- wire [2:0]S_AXI_HP1_ARPROT;
- wire [3:0]S_AXI_HP1_ARQOS;
- wire S_AXI_HP1_ARREADY;
- wire [2:0]S_AXI_HP1_ARSIZE;
- wire S_AXI_HP1_ARVALID;
- wire [31:0]S_AXI_HP1_AWADDR;
- wire [1:0]S_AXI_HP1_AWBURST;
- wire [3:0]S_AXI_HP1_AWCACHE;
- wire [5:0]S_AXI_HP1_AWID;
- wire [3:0]S_AXI_HP1_AWLEN;
- wire [1:0]S_AXI_HP1_AWLOCK;
- wire [2:0]S_AXI_HP1_AWPROT;
- wire [3:0]S_AXI_HP1_AWQOS;
- wire S_AXI_HP1_AWREADY;
- wire [2:0]S_AXI_HP1_AWSIZE;
- wire S_AXI_HP1_AWVALID;
- wire [5:0]S_AXI_HP1_BID;
- wire S_AXI_HP1_BREADY;
- wire [1:0]S_AXI_HP1_BRESP;
- wire S_AXI_HP1_BVALID;
- wire [2:0]S_AXI_HP1_RACOUNT;
- wire [7:0]S_AXI_HP1_RCOUNT;
- wire [63:0]S_AXI_HP1_RDATA;
- wire S_AXI_HP1_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP1_RID;
- wire S_AXI_HP1_RLAST;
- wire S_AXI_HP1_RREADY;
- wire [1:0]S_AXI_HP1_RRESP;
- wire S_AXI_HP1_RVALID;
- wire [5:0]S_AXI_HP1_WACOUNT;
- wire [7:0]S_AXI_HP1_WCOUNT;
- wire [63:0]S_AXI_HP1_WDATA;
- wire [5:0]S_AXI_HP1_WID;
- wire S_AXI_HP1_WLAST;
- wire S_AXI_HP1_WREADY;
- wire S_AXI_HP1_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP1_WSTRB;
- wire S_AXI_HP1_WVALID;
- wire S_AXI_HP2_ACLK;
- wire [31:0]S_AXI_HP2_ARADDR;
- wire [1:0]S_AXI_HP2_ARBURST;
- wire [3:0]S_AXI_HP2_ARCACHE;
- wire S_AXI_HP2_ARESETN;
- wire [5:0]S_AXI_HP2_ARID;
- wire [3:0]S_AXI_HP2_ARLEN;
- wire [1:0]S_AXI_HP2_ARLOCK;
- wire [2:0]S_AXI_HP2_ARPROT;
- wire [3:0]S_AXI_HP2_ARQOS;
- wire S_AXI_HP2_ARREADY;
- wire [2:0]S_AXI_HP2_ARSIZE;
- wire S_AXI_HP2_ARVALID;
- wire [31:0]S_AXI_HP2_AWADDR;
- wire [1:0]S_AXI_HP2_AWBURST;
- wire [3:0]S_AXI_HP2_AWCACHE;
- wire [5:0]S_AXI_HP2_AWID;
- wire [3:0]S_AXI_HP2_AWLEN;
- wire [1:0]S_AXI_HP2_AWLOCK;
- wire [2:0]S_AXI_HP2_AWPROT;
- wire [3:0]S_AXI_HP2_AWQOS;
- wire S_AXI_HP2_AWREADY;
- wire [2:0]S_AXI_HP2_AWSIZE;
- wire S_AXI_HP2_AWVALID;
- wire [5:0]S_AXI_HP2_BID;
- wire S_AXI_HP2_BREADY;
- wire [1:0]S_AXI_HP2_BRESP;
- wire S_AXI_HP2_BVALID;
- wire [2:0]S_AXI_HP2_RACOUNT;
- wire [7:0]S_AXI_HP2_RCOUNT;
- wire [63:0]S_AXI_HP2_RDATA;
- wire S_AXI_HP2_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP2_RID;
- wire S_AXI_HP2_RLAST;
- wire S_AXI_HP2_RREADY;
- wire [1:0]S_AXI_HP2_RRESP;
- wire S_AXI_HP2_RVALID;
- wire [5:0]S_AXI_HP2_WACOUNT;
- wire [7:0]S_AXI_HP2_WCOUNT;
- wire [63:0]S_AXI_HP2_WDATA;
- wire [5:0]S_AXI_HP2_WID;
- wire S_AXI_HP2_WLAST;
- wire S_AXI_HP2_WREADY;
- wire S_AXI_HP2_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP2_WSTRB;
- wire S_AXI_HP2_WVALID;
- wire S_AXI_HP3_ACLK;
- wire [31:0]S_AXI_HP3_ARADDR;
- wire [1:0]S_AXI_HP3_ARBURST;
- wire [3:0]S_AXI_HP3_ARCACHE;
- wire S_AXI_HP3_ARESETN;
- wire [5:0]S_AXI_HP3_ARID;
- wire [3:0]S_AXI_HP3_ARLEN;
- wire [1:0]S_AXI_HP3_ARLOCK;
- wire [2:0]S_AXI_HP3_ARPROT;
- wire [3:0]S_AXI_HP3_ARQOS;
- wire S_AXI_HP3_ARREADY;
- wire [2:0]S_AXI_HP3_ARSIZE;
- wire S_AXI_HP3_ARVALID;
- wire [31:0]S_AXI_HP3_AWADDR;
- wire [1:0]S_AXI_HP3_AWBURST;
- wire [3:0]S_AXI_HP3_AWCACHE;
- wire [5:0]S_AXI_HP3_AWID;
- wire [3:0]S_AXI_HP3_AWLEN;
- wire [1:0]S_AXI_HP3_AWLOCK;
- wire [2:0]S_AXI_HP3_AWPROT;
- wire [3:0]S_AXI_HP3_AWQOS;
- wire S_AXI_HP3_AWREADY;
- wire [2:0]S_AXI_HP3_AWSIZE;
- wire S_AXI_HP3_AWVALID;
- wire [5:0]S_AXI_HP3_BID;
- wire S_AXI_HP3_BREADY;
- wire [1:0]S_AXI_HP3_BRESP;
- wire S_AXI_HP3_BVALID;
- wire [2:0]S_AXI_HP3_RACOUNT;
- wire [7:0]S_AXI_HP3_RCOUNT;
- wire [63:0]S_AXI_HP3_RDATA;
- wire S_AXI_HP3_RDISSUECAP1_EN;
- wire [5:0]S_AXI_HP3_RID;
- wire S_AXI_HP3_RLAST;
- wire S_AXI_HP3_RREADY;
- wire [1:0]S_AXI_HP3_RRESP;
- wire S_AXI_HP3_RVALID;
- wire [5:0]S_AXI_HP3_WACOUNT;
- wire [7:0]S_AXI_HP3_WCOUNT;
- wire [63:0]S_AXI_HP3_WDATA;
- wire [5:0]S_AXI_HP3_WID;
- wire S_AXI_HP3_WLAST;
- wire S_AXI_HP3_WREADY;
- wire S_AXI_HP3_WRISSUECAP1_EN;
- wire [7:0]S_AXI_HP3_WSTRB;
- wire S_AXI_HP3_WVALID;
- wire TRACE_CLK;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[0] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[1] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[2] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[3] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[4] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[5] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[6] ;
- (* RTL_KEEP = "true" *) wire \TRACE_CTL_PIPE[7] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[0] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[1] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[2] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[3] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[4] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[5] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[6] ;
- (* RTL_KEEP = "true" *) wire [1:0]\TRACE_DATA_PIPE[7] ;
- wire TTC0_CLK0_IN;
- wire TTC0_CLK1_IN;
- wire TTC0_CLK2_IN;
- wire TTC0_WAVE0_OUT;
- wire TTC0_WAVE1_OUT;
- wire TTC0_WAVE2_OUT;
- wire TTC1_CLK0_IN;
- wire TTC1_CLK1_IN;
- wire TTC1_CLK2_IN;
- wire TTC1_WAVE0_OUT;
- wire TTC1_WAVE1_OUT;
- wire TTC1_WAVE2_OUT;
- wire UART0_CTSN;
- wire UART0_DCDN;
- wire UART0_DSRN;
- wire UART0_DTRN;
- wire UART0_RIN;
- wire UART0_RTSN;
- wire UART0_RX;
- wire UART0_TX;
- wire UART1_CTSN;
- wire UART1_DCDN;
- wire UART1_DSRN;
- wire UART1_DTRN;
- wire UART1_RIN;
- wire UART1_RTSN;
- wire UART1_RX;
- wire UART1_TX;
- wire [1:0]USB0_PORT_INDCTL;
- wire USB0_VBUS_PWRFAULT;
- wire USB0_VBUS_PWRSELECT;
- wire [1:0]USB1_PORT_INDCTL;
- wire USB1_VBUS_PWRFAULT;
- wire USB1_VBUS_PWRSELECT;
- wire WDT_CLK_IN;
- wire WDT_RST_OUT;
- wire [14:0]buffered_DDR_Addr;
- wire [2:0]buffered_DDR_BankAddr;
- wire buffered_DDR_CAS_n;
- wire buffered_DDR_CKE;
- wire buffered_DDR_CS_n;
- wire buffered_DDR_Clk;
- wire buffered_DDR_Clk_n;
- wire [3:0]buffered_DDR_DM;
- wire [31:0]buffered_DDR_DQ;
- wire [3:0]buffered_DDR_DQS;
- wire [3:0]buffered_DDR_DQS_n;
- wire buffered_DDR_DRSTB;
- wire buffered_DDR_ODT;
- wire buffered_DDR_RAS_n;
- wire buffered_DDR_VRN;
- wire buffered_DDR_VRP;
- wire buffered_DDR_WEB;
- wire [53:0]buffered_MIO;
- wire buffered_PS_CLK;
- wire buffered_PS_PORB;
- wire buffered_PS_SRSTB;
- wire [63:0]gpio_out_t_n;
- wire NLW_PS7_i_EMIOENET0GMIITXEN_UNCONNECTED;
- wire NLW_PS7_i_EMIOENET0GMIITXER_UNCONNECTED;
- wire NLW_PS7_i_EMIOENET1GMIITXEN_UNCONNECTED;
- wire NLW_PS7_i_EMIOENET1GMIITXER_UNCONNECTED;
- wire NLW_PS7_i_EMIOPJTAGTDO_UNCONNECTED;
- wire NLW_PS7_i_EMIOPJTAGTDTN_UNCONNECTED;
- wire NLW_PS7_i_EMIOTRACECTL_UNCONNECTED;
- wire [7:0]NLW_PS7_i_EMIOENET0GMIITXD_UNCONNECTED;
- wire [7:0]NLW_PS7_i_EMIOENET1GMIITXD_UNCONNECTED;
- wire [31:0]NLW_PS7_i_EMIOTRACEDATA_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP0ARCACHE_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP0AWCACHE_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP1ARCACHE_UNCONNECTED;
- wire [1:1]NLW_PS7_i_MAXIGP1AWCACHE_UNCONNECTED;
-
- assign ENET0_GMII_TXD[7] = \<const0> ;
- assign ENET0_GMII_TXD[6] = \<const0> ;
- assign ENET0_GMII_TXD[5] = \<const0> ;
- assign ENET0_GMII_TXD[4] = \<const0> ;
- assign ENET0_GMII_TXD[3] = \<const0> ;
- assign ENET0_GMII_TXD[2] = \<const0> ;
- assign ENET0_GMII_TXD[1] = \<const0> ;
- assign ENET0_GMII_TXD[0] = \<const0> ;
- assign ENET0_GMII_TX_EN = \<const0> ;
- assign ENET0_GMII_TX_ER = \<const0> ;
- assign ENET1_GMII_TXD[7] = \<const0> ;
- assign ENET1_GMII_TXD[6] = \<const0> ;
- assign ENET1_GMII_TXD[5] = \<const0> ;
- assign ENET1_GMII_TXD[4] = \<const0> ;
- assign ENET1_GMII_TXD[3] = \<const0> ;
- assign ENET1_GMII_TXD[2] = \<const0> ;
- assign ENET1_GMII_TXD[1] = \<const0> ;
- assign ENET1_GMII_TXD[0] = \<const0> ;
- assign ENET1_GMII_TX_EN = \<const0> ;
- assign ENET1_GMII_TX_ER = \<const0> ;
- assign M_AXI_GP0_ARCACHE[3:2] = \^M_AXI_GP0_ARCACHE [3:2];
- assign M_AXI_GP0_ARCACHE[1] = \<const1> ;
- assign M_AXI_GP0_ARCACHE[0] = \^M_AXI_GP0_ARCACHE [0];
- assign M_AXI_GP0_ARSIZE[2] = \<const0> ;
- assign M_AXI_GP0_ARSIZE[1:0] = \^M_AXI_GP0_ARSIZE [1:0];
- assign M_AXI_GP0_AWCACHE[3:2] = \^M_AXI_GP0_AWCACHE [3:2];
- assign M_AXI_GP0_AWCACHE[1] = \<const1> ;
- assign M_AXI_GP0_AWCACHE[0] = \^M_AXI_GP0_AWCACHE [0];
- assign M_AXI_GP0_AWSIZE[2] = \<const0> ;
- assign M_AXI_GP0_AWSIZE[1:0] = \^M_AXI_GP0_AWSIZE [1:0];
- assign M_AXI_GP1_ARCACHE[3:2] = \^M_AXI_GP1_ARCACHE [3:2];
- assign M_AXI_GP1_ARCACHE[1] = \<const1> ;
- assign M_AXI_GP1_ARCACHE[0] = \^M_AXI_GP1_ARCACHE [0];
- assign M_AXI_GP1_ARSIZE[2] = \<const0> ;
- assign M_AXI_GP1_ARSIZE[1:0] = \^M_AXI_GP1_ARSIZE [1:0];
- assign M_AXI_GP1_AWCACHE[3:2] = \^M_AXI_GP1_AWCACHE [3:2];
- assign M_AXI_GP1_AWCACHE[1] = \<const1> ;
- assign M_AXI_GP1_AWCACHE[0] = \^M_AXI_GP1_AWCACHE [0];
- assign M_AXI_GP1_AWSIZE[2] = \<const0> ;
- assign M_AXI_GP1_AWSIZE[1:0] = \^M_AXI_GP1_AWSIZE [1:0];
- assign PJTAG_TDO = \<const0> ;
- assign TRACE_CLK_OUT = \<const0> ;
- assign TRACE_CTL = \TRACE_CTL_PIPE[0] ;
- assign TRACE_DATA[1:0] = \TRACE_DATA_PIPE[0] ;
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_CAS_n_BIBUF
- (.IO(buffered_DDR_CAS_n),
- .PAD(DDR_CAS_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_CKE_BIBUF
- (.IO(buffered_DDR_CKE),
- .PAD(DDR_CKE));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_CS_n_BIBUF
- (.IO(buffered_DDR_CS_n),
- .PAD(DDR_CS_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_Clk_BIBUF
- (.IO(buffered_DDR_Clk),
- .PAD(DDR_Clk));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_Clk_n_BIBUF
- (.IO(buffered_DDR_Clk_n),
- .PAD(DDR_Clk_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_DRSTB_BIBUF
- (.IO(buffered_DDR_DRSTB),
- .PAD(DDR_DRSTB));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_ODT_BIBUF
- (.IO(buffered_DDR_ODT),
- .PAD(DDR_ODT));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_RAS_n_BIBUF
- (.IO(buffered_DDR_RAS_n),
- .PAD(DDR_RAS_n));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_VRN_BIBUF
- (.IO(buffered_DDR_VRN),
- .PAD(DDR_VRN));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_VRP_BIBUF
- (.IO(buffered_DDR_VRP),
- .PAD(DDR_VRP));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF DDR_WEB_BIBUF
- (.IO(buffered_DDR_WEB),
- .PAD(DDR_WEB));
- LUT1 #(
- .INIT(2'h1))
- ENET0_MDIO_T_INST_0
- (.I0(ENET0_MDIO_T_n),
- .O(ENET0_MDIO_T));
- LUT1 #(
- .INIT(2'h1))
- ENET1_MDIO_T_INST_0
- (.I0(ENET1_MDIO_T_n),
- .O(ENET1_MDIO_T));
- GND GND
- (.G(\<const0> ));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[0]_INST_0
- (.I0(gpio_out_t_n[0]),
- .O(GPIO_T[0]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[10]_INST_0
- (.I0(gpio_out_t_n[10]),
- .O(GPIO_T[10]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[11]_INST_0
- (.I0(gpio_out_t_n[11]),
- .O(GPIO_T[11]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[12]_INST_0
- (.I0(gpio_out_t_n[12]),
- .O(GPIO_T[12]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[13]_INST_0
- (.I0(gpio_out_t_n[13]),
- .O(GPIO_T[13]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[14]_INST_0
- (.I0(gpio_out_t_n[14]),
- .O(GPIO_T[14]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[15]_INST_0
- (.I0(gpio_out_t_n[15]),
- .O(GPIO_T[15]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[16]_INST_0
- (.I0(gpio_out_t_n[16]),
- .O(GPIO_T[16]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[17]_INST_0
- (.I0(gpio_out_t_n[17]),
- .O(GPIO_T[17]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[18]_INST_0
- (.I0(gpio_out_t_n[18]),
- .O(GPIO_T[18]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[19]_INST_0
- (.I0(gpio_out_t_n[19]),
- .O(GPIO_T[19]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[1]_INST_0
- (.I0(gpio_out_t_n[1]),
- .O(GPIO_T[1]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[20]_INST_0
- (.I0(gpio_out_t_n[20]),
- .O(GPIO_T[20]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[21]_INST_0
- (.I0(gpio_out_t_n[21]),
- .O(GPIO_T[21]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[22]_INST_0
- (.I0(gpio_out_t_n[22]),
- .O(GPIO_T[22]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[23]_INST_0
- (.I0(gpio_out_t_n[23]),
- .O(GPIO_T[23]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[24]_INST_0
- (.I0(gpio_out_t_n[24]),
- .O(GPIO_T[24]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[25]_INST_0
- (.I0(gpio_out_t_n[25]),
- .O(GPIO_T[25]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[26]_INST_0
- (.I0(gpio_out_t_n[26]),
- .O(GPIO_T[26]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[27]_INST_0
- (.I0(gpio_out_t_n[27]),
- .O(GPIO_T[27]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[28]_INST_0
- (.I0(gpio_out_t_n[28]),
- .O(GPIO_T[28]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[29]_INST_0
- (.I0(gpio_out_t_n[29]),
- .O(GPIO_T[29]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[2]_INST_0
- (.I0(gpio_out_t_n[2]),
- .O(GPIO_T[2]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[30]_INST_0
- (.I0(gpio_out_t_n[30]),
- .O(GPIO_T[30]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[31]_INST_0
- (.I0(gpio_out_t_n[31]),
- .O(GPIO_T[31]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[32]_INST_0
- (.I0(gpio_out_t_n[32]),
- .O(GPIO_T[32]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[33]_INST_0
- (.I0(gpio_out_t_n[33]),
- .O(GPIO_T[33]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[34]_INST_0
- (.I0(gpio_out_t_n[34]),
- .O(GPIO_T[34]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[35]_INST_0
- (.I0(gpio_out_t_n[35]),
- .O(GPIO_T[35]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[36]_INST_0
- (.I0(gpio_out_t_n[36]),
- .O(GPIO_T[36]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[37]_INST_0
- (.I0(gpio_out_t_n[37]),
- .O(GPIO_T[37]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[38]_INST_0
- (.I0(gpio_out_t_n[38]),
- .O(GPIO_T[38]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[39]_INST_0
- (.I0(gpio_out_t_n[39]),
- .O(GPIO_T[39]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[3]_INST_0
- (.I0(gpio_out_t_n[3]),
- .O(GPIO_T[3]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[40]_INST_0
- (.I0(gpio_out_t_n[40]),
- .O(GPIO_T[40]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[41]_INST_0
- (.I0(gpio_out_t_n[41]),
- .O(GPIO_T[41]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[42]_INST_0
- (.I0(gpio_out_t_n[42]),
- .O(GPIO_T[42]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[43]_INST_0
- (.I0(gpio_out_t_n[43]),
- .O(GPIO_T[43]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[44]_INST_0
- (.I0(gpio_out_t_n[44]),
- .O(GPIO_T[44]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[45]_INST_0
- (.I0(gpio_out_t_n[45]),
- .O(GPIO_T[45]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[46]_INST_0
- (.I0(gpio_out_t_n[46]),
- .O(GPIO_T[46]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[47]_INST_0
- (.I0(gpio_out_t_n[47]),
- .O(GPIO_T[47]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[48]_INST_0
- (.I0(gpio_out_t_n[48]),
- .O(GPIO_T[48]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[49]_INST_0
- (.I0(gpio_out_t_n[49]),
- .O(GPIO_T[49]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[4]_INST_0
- (.I0(gpio_out_t_n[4]),
- .O(GPIO_T[4]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[50]_INST_0
- (.I0(gpio_out_t_n[50]),
- .O(GPIO_T[50]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[51]_INST_0
- (.I0(gpio_out_t_n[51]),
- .O(GPIO_T[51]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[52]_INST_0
- (.I0(gpio_out_t_n[52]),
- .O(GPIO_T[52]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[53]_INST_0
- (.I0(gpio_out_t_n[53]),
- .O(GPIO_T[53]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[54]_INST_0
- (.I0(gpio_out_t_n[54]),
- .O(GPIO_T[54]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[55]_INST_0
- (.I0(gpio_out_t_n[55]),
- .O(GPIO_T[55]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[56]_INST_0
- (.I0(gpio_out_t_n[56]),
- .O(GPIO_T[56]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[57]_INST_0
- (.I0(gpio_out_t_n[57]),
- .O(GPIO_T[57]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[58]_INST_0
- (.I0(gpio_out_t_n[58]),
- .O(GPIO_T[58]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[59]_INST_0
- (.I0(gpio_out_t_n[59]),
- .O(GPIO_T[59]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[5]_INST_0
- (.I0(gpio_out_t_n[5]),
- .O(GPIO_T[5]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[60]_INST_0
- (.I0(gpio_out_t_n[60]),
- .O(GPIO_T[60]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[61]_INST_0
- (.I0(gpio_out_t_n[61]),
- .O(GPIO_T[61]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[62]_INST_0
- (.I0(gpio_out_t_n[62]),
- .O(GPIO_T[62]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[63]_INST_0
- (.I0(gpio_out_t_n[63]),
- .O(GPIO_T[63]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[6]_INST_0
- (.I0(gpio_out_t_n[6]),
- .O(GPIO_T[6]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[7]_INST_0
- (.I0(gpio_out_t_n[7]),
- .O(GPIO_T[7]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[8]_INST_0
- (.I0(gpio_out_t_n[8]),
- .O(GPIO_T[8]));
- LUT1 #(
- .INIT(2'h1))
- \GPIO_T[9]_INST_0
- (.I0(gpio_out_t_n[9]),
- .O(GPIO_T[9]));
- LUT1 #(
- .INIT(2'h1))
- I2C0_SCL_T_INST_0
- (.I0(I2C0_SCL_T_n),
- .O(I2C0_SCL_T));
- LUT1 #(
- .INIT(2'h1))
- I2C0_SDA_T_INST_0
- (.I0(I2C0_SDA_T_n),
- .O(I2C0_SDA_T));
- LUT1 #(
- .INIT(2'h1))
- I2C1_SCL_T_INST_0
- (.I0(I2C1_SCL_T_n),
- .O(I2C1_SCL_T));
- LUT1 #(
- .INIT(2'h1))
- I2C1_SDA_T_INST_0
- (.I0(I2C1_SDA_T_n),
- .O(I2C1_SDA_T));
- (* BOX_TYPE = "PRIMITIVE" *)
- PS7 PS7_i
- (.DDRA(buffered_DDR_Addr),
- .DDRARB(DDR_ARB),
- .DDRBA(buffered_DDR_BankAddr),
- .DDRCASB(buffered_DDR_CAS_n),
- .DDRCKE(buffered_DDR_CKE),
- .DDRCKN(buffered_DDR_Clk_n),
- .DDRCKP(buffered_DDR_Clk),
- .DDRCSB(buffered_DDR_CS_n),
- .DDRDM(buffered_DDR_DM),
- .DDRDQ(buffered_DDR_DQ),
- .DDRDQSN(buffered_DDR_DQS_n),
- .DDRDQSP(buffered_DDR_DQS),
- .DDRDRSTB(buffered_DDR_DRSTB),
- .DDRODT(buffered_DDR_ODT),
- .DDRRASB(buffered_DDR_RAS_n),
- .DDRVRN(buffered_DDR_VRN),
- .DDRVRP(buffered_DDR_VRP),
- .DDRWEB(buffered_DDR_WEB),
- .DMA0ACLK(DMA0_ACLK),
- .DMA0DAREADY(DMA0_DAREADY),
- .DMA0DATYPE(DMA0_DATYPE),
- .DMA0DAVALID(DMA0_DAVALID),
- .DMA0DRLAST(DMA0_DRLAST),
- .DMA0DRREADY(DMA0_DRREADY),
- .DMA0DRTYPE(DMA0_DRTYPE),
- .DMA0DRVALID(DMA0_DRVALID),
- .DMA0RSTN(DMA0_RSTN),
- .DMA1ACLK(DMA1_ACLK),
- .DMA1DAREADY(DMA1_DAREADY),
- .DMA1DATYPE(DMA1_DATYPE),
- .DMA1DAVALID(DMA1_DAVALID),
- .DMA1DRLAST(DMA1_DRLAST),
- .DMA1DRREADY(DMA1_DRREADY),
- .DMA1DRTYPE(DMA1_DRTYPE),
- .DMA1DRVALID(DMA1_DRVALID),
- .DMA1RSTN(DMA1_RSTN),
- .DMA2ACLK(DMA2_ACLK),
- .DMA2DAREADY(DMA2_DAREADY),
- .DMA2DATYPE(DMA2_DATYPE),
- .DMA2DAVALID(DMA2_DAVALID),
- .DMA2DRLAST(DMA2_DRLAST),
- .DMA2DRREADY(DMA2_DRREADY),
- .DMA2DRTYPE(DMA2_DRTYPE),
- .DMA2DRVALID(DMA2_DRVALID),
- .DMA2RSTN(DMA2_RSTN),
- .DMA3ACLK(DMA3_ACLK),
- .DMA3DAREADY(DMA3_DAREADY),
- .DMA3DATYPE(DMA3_DATYPE),
- .DMA3DAVALID(DMA3_DAVALID),
- .DMA3DRLAST(DMA3_DRLAST),
- .DMA3DRREADY(DMA3_DRREADY),
- .DMA3DRTYPE(DMA3_DRTYPE),
- .DMA3DRVALID(DMA3_DRVALID),
- .DMA3RSTN(DMA3_RSTN),
- .EMIOCAN0PHYRX(CAN0_PHY_RX),
- .EMIOCAN0PHYTX(CAN0_PHY_TX),
- .EMIOCAN1PHYRX(CAN1_PHY_RX),
- .EMIOCAN1PHYTX(CAN1_PHY_TX),
- .EMIOENET0EXTINTIN(ENET0_EXT_INTIN),
- .EMIOENET0GMIICOL(1'b0),
- .EMIOENET0GMIICRS(1'b0),
- .EMIOENET0GMIIRXCLK(ENET0_GMII_RX_CLK),
- .EMIOENET0GMIIRXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .EMIOENET0GMIIRXDV(1'b0),
- .EMIOENET0GMIIRXER(1'b0),
- .EMIOENET0GMIITXCLK(ENET0_GMII_TX_CLK),
- .EMIOENET0GMIITXD(NLW_PS7_i_EMIOENET0GMIITXD_UNCONNECTED[7:0]),
- .EMIOENET0GMIITXEN(NLW_PS7_i_EMIOENET0GMIITXEN_UNCONNECTED),
- .EMIOENET0GMIITXER(NLW_PS7_i_EMIOENET0GMIITXER_UNCONNECTED),
- .EMIOENET0MDIOI(ENET0_MDIO_I),
- .EMIOENET0MDIOMDC(ENET0_MDIO_MDC),
- .EMIOENET0MDIOO(ENET0_MDIO_O),
- .EMIOENET0MDIOTN(ENET0_MDIO_T_n),
- .EMIOENET0PTPDELAYREQRX(ENET0_PTP_DELAY_REQ_RX),
- .EMIOENET0PTPDELAYREQTX(ENET0_PTP_DELAY_REQ_TX),
- .EMIOENET0PTPPDELAYREQRX(ENET0_PTP_PDELAY_REQ_RX),
- .EMIOENET0PTPPDELAYREQTX(ENET0_PTP_PDELAY_REQ_TX),
- .EMIOENET0PTPPDELAYRESPRX(ENET0_PTP_PDELAY_RESP_RX),
- .EMIOENET0PTPPDELAYRESPTX(ENET0_PTP_PDELAY_RESP_TX),
- .EMIOENET0PTPSYNCFRAMERX(ENET0_PTP_SYNC_FRAME_RX),
- .EMIOENET0PTPSYNCFRAMETX(ENET0_PTP_SYNC_FRAME_TX),
- .EMIOENET0SOFRX(ENET0_SOF_RX),
- .EMIOENET0SOFTX(ENET0_SOF_TX),
- .EMIOENET1EXTINTIN(ENET1_EXT_INTIN),
- .EMIOENET1GMIICOL(1'b0),
- .EMIOENET1GMIICRS(1'b0),
- .EMIOENET1GMIIRXCLK(ENET1_GMII_RX_CLK),
- .EMIOENET1GMIIRXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .EMIOENET1GMIIRXDV(1'b0),
- .EMIOENET1GMIIRXER(1'b0),
- .EMIOENET1GMIITXCLK(ENET1_GMII_TX_CLK),
- .EMIOENET1GMIITXD(NLW_PS7_i_EMIOENET1GMIITXD_UNCONNECTED[7:0]),
- .EMIOENET1GMIITXEN(NLW_PS7_i_EMIOENET1GMIITXEN_UNCONNECTED),
- .EMIOENET1GMIITXER(NLW_PS7_i_EMIOENET1GMIITXER_UNCONNECTED),
- .EMIOENET1MDIOI(ENET1_MDIO_I),
- .EMIOENET1MDIOMDC(ENET1_MDIO_MDC),
- .EMIOENET1MDIOO(ENET1_MDIO_O),
- .EMIOENET1MDIOTN(ENET1_MDIO_T_n),
- .EMIOENET1PTPDELAYREQRX(ENET1_PTP_DELAY_REQ_RX),
- .EMIOENET1PTPDELAYREQTX(ENET1_PTP_DELAY_REQ_TX),
- .EMIOENET1PTPPDELAYREQRX(ENET1_PTP_PDELAY_REQ_RX),
- .EMIOENET1PTPPDELAYREQTX(ENET1_PTP_PDELAY_REQ_TX),
- .EMIOENET1PTPPDELAYRESPRX(ENET1_PTP_PDELAY_RESP_RX),
- .EMIOENET1PTPPDELAYRESPTX(ENET1_PTP_PDELAY_RESP_TX),
- .EMIOENET1PTPSYNCFRAMERX(ENET1_PTP_SYNC_FRAME_RX),
- .EMIOENET1PTPSYNCFRAMETX(ENET1_PTP_SYNC_FRAME_TX),
- .EMIOENET1SOFRX(ENET1_SOF_RX),
- .EMIOENET1SOFTX(ENET1_SOF_TX),
- .EMIOGPIOI(GPIO_I),
- .EMIOGPIOO(GPIO_O),
- .EMIOGPIOTN(gpio_out_t_n),
- .EMIOI2C0SCLI(I2C0_SCL_I),
- .EMIOI2C0SCLO(I2C0_SCL_O),
- .EMIOI2C0SCLTN(I2C0_SCL_T_n),
- .EMIOI2C0SDAI(I2C0_SDA_I),
- .EMIOI2C0SDAO(I2C0_SDA_O),
- .EMIOI2C0SDATN(I2C0_SDA_T_n),
- .EMIOI2C1SCLI(I2C1_SCL_I),
- .EMIOI2C1SCLO(I2C1_SCL_O),
- .EMIOI2C1SCLTN(I2C1_SCL_T_n),
- .EMIOI2C1SDAI(I2C1_SDA_I),
- .EMIOI2C1SDAO(I2C1_SDA_O),
- .EMIOI2C1SDATN(I2C1_SDA_T_n),
- .EMIOPJTAGTCK(PJTAG_TCK),
- .EMIOPJTAGTDI(PJTAG_TDI),
- .EMIOPJTAGTDO(NLW_PS7_i_EMIOPJTAGTDO_UNCONNECTED),
- .EMIOPJTAGTDTN(NLW_PS7_i_EMIOPJTAGTDTN_UNCONNECTED),
- .EMIOPJTAGTMS(PJTAG_TMS),
- .EMIOSDIO0BUSPOW(SDIO0_BUSPOW),
- .EMIOSDIO0BUSVOLT(SDIO0_BUSVOLT),
- .EMIOSDIO0CDN(SDIO0_CDN),
- .EMIOSDIO0CLK(SDIO0_CLK),
- .EMIOSDIO0CLKFB(SDIO0_CLK_FB),
- .EMIOSDIO0CMDI(SDIO0_CMD_I),
- .EMIOSDIO0CMDO(SDIO0_CMD_O),
- .EMIOSDIO0CMDTN(SDIO0_CMD_T_n),
- .EMIOSDIO0DATAI(SDIO0_DATA_I),
- .EMIOSDIO0DATAO(SDIO0_DATA_O),
- .EMIOSDIO0DATATN(SDIO0_DATA_T_n),
- .EMIOSDIO0LED(SDIO0_LED),
- .EMIOSDIO0WP(SDIO0_WP),
- .EMIOSDIO1BUSPOW(SDIO1_BUSPOW),
- .EMIOSDIO1BUSVOLT(SDIO1_BUSVOLT),
- .EMIOSDIO1CDN(SDIO1_CDN),
- .EMIOSDIO1CLK(SDIO1_CLK),
- .EMIOSDIO1CLKFB(SDIO1_CLK_FB),
- .EMIOSDIO1CMDI(SDIO1_CMD_I),
- .EMIOSDIO1CMDO(SDIO1_CMD_O),
- .EMIOSDIO1CMDTN(SDIO1_CMD_T_n),
- .EMIOSDIO1DATAI(SDIO1_DATA_I),
- .EMIOSDIO1DATAO(SDIO1_DATA_O),
- .EMIOSDIO1DATATN(SDIO1_DATA_T_n),
- .EMIOSDIO1LED(SDIO1_LED),
- .EMIOSDIO1WP(SDIO1_WP),
- .EMIOSPI0MI(SPI0_MISO_I),
- .EMIOSPI0MO(SPI0_MOSI_O),
- .EMIOSPI0MOTN(SPI0_MOSI_T_n),
- .EMIOSPI0SCLKI(SPI0_SCLK_I),
- .EMIOSPI0SCLKO(SPI0_SCLK_O),
- .EMIOSPI0SCLKTN(SPI0_SCLK_T_n),
- .EMIOSPI0SI(SPI0_MOSI_I),
- .EMIOSPI0SO(SPI0_MISO_O),
- .EMIOSPI0SSIN(SPI0_SS_I),
- .EMIOSPI0SSNTN(SPI0_SS_T_n),
- .EMIOSPI0SSON({SPI0_SS2_O,SPI0_SS1_O,SPI0_SS_O}),
- .EMIOSPI0STN(SPI0_MISO_T_n),
- .EMIOSPI1MI(SPI1_MISO_I),
- .EMIOSPI1MO(SPI1_MOSI_O),
- .EMIOSPI1MOTN(SPI1_MOSI_T_n),
- .EMIOSPI1SCLKI(SPI1_SCLK_I),
- .EMIOSPI1SCLKO(SPI1_SCLK_O),
- .EMIOSPI1SCLKTN(SPI1_SCLK_T_n),
- .EMIOSPI1SI(SPI1_MOSI_I),
- .EMIOSPI1SO(SPI1_MISO_O),
- .EMIOSPI1SSIN(SPI1_SS_I),
- .EMIOSPI1SSNTN(SPI1_SS_T_n),
- .EMIOSPI1SSON({SPI1_SS2_O,SPI1_SS1_O,SPI1_SS_O}),
- .EMIOSPI1STN(SPI1_MISO_T_n),
- .EMIOSRAMINTIN(SRAM_INTIN),
- .EMIOTRACECLK(TRACE_CLK),
- .EMIOTRACECTL(NLW_PS7_i_EMIOTRACECTL_UNCONNECTED),
- .EMIOTRACEDATA(NLW_PS7_i_EMIOTRACEDATA_UNCONNECTED[31:0]),
- .EMIOTTC0CLKI({TTC0_CLK2_IN,TTC0_CLK1_IN,TTC0_CLK0_IN}),
- .EMIOTTC0WAVEO({TTC0_WAVE2_OUT,TTC0_WAVE1_OUT,TTC0_WAVE0_OUT}),
- .EMIOTTC1CLKI({TTC1_CLK2_IN,TTC1_CLK1_IN,TTC1_CLK0_IN}),
- .EMIOTTC1WAVEO({TTC1_WAVE2_OUT,TTC1_WAVE1_OUT,TTC1_WAVE0_OUT}),
- .EMIOUART0CTSN(UART0_CTSN),
- .EMIOUART0DCDN(UART0_DCDN),
- .EMIOUART0DSRN(UART0_DSRN),
- .EMIOUART0DTRN(UART0_DTRN),
- .EMIOUART0RIN(UART0_RIN),
- .EMIOUART0RTSN(UART0_RTSN),
- .EMIOUART0RX(UART0_RX),
- .EMIOUART0TX(UART0_TX),
- .EMIOUART1CTSN(UART1_CTSN),
- .EMIOUART1DCDN(UART1_DCDN),
- .EMIOUART1DSRN(UART1_DSRN),
- .EMIOUART1DTRN(UART1_DTRN),
- .EMIOUART1RIN(UART1_RIN),
- .EMIOUART1RTSN(UART1_RTSN),
- .EMIOUART1RX(UART1_RX),
- .EMIOUART1TX(UART1_TX),
- .EMIOUSB0PORTINDCTL(USB0_PORT_INDCTL),
- .EMIOUSB0VBUSPWRFAULT(USB0_VBUS_PWRFAULT),
- .EMIOUSB0VBUSPWRSELECT(USB0_VBUS_PWRSELECT),
- .EMIOUSB1PORTINDCTL(USB1_PORT_INDCTL),
- .EMIOUSB1VBUSPWRFAULT(USB1_VBUS_PWRFAULT),
- .EMIOUSB1VBUSPWRSELECT(USB1_VBUS_PWRSELECT),
- .EMIOWDTCLKI(WDT_CLK_IN),
- .EMIOWDTRSTO(WDT_RST_OUT),
- .EVENTEVENTI(EVENT_EVENTI),
- .EVENTEVENTO(EVENT_EVENTO),
- .EVENTSTANDBYWFE(EVENT_STANDBYWFE),
- .EVENTSTANDBYWFI(EVENT_STANDBYWFI),
- .FCLKCLK({FCLK_CLK3,FCLK_CLK2,FCLK_CLK1,FCLK_CLK_unbuffered}),
- .FCLKCLKTRIGN({1'b0,1'b0,1'b0,1'b0}),
- .FCLKRESETN({FCLK_RESET3_N,FCLK_RESET2_N,FCLK_RESET1_N,FCLK_RESET0_N}),
- .FPGAIDLEN(FPGA_IDLE_N),
- .FTMDTRACEINATID({1'b0,1'b0,1'b0,1'b0}),
- .FTMDTRACEINCLOCK(FTMD_TRACEIN_CLK),
- .FTMDTRACEINDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .FTMDTRACEINVALID(1'b0),
- .FTMTF2PDEBUG(FTMT_F2P_DEBUG),
- .FTMTF2PTRIG({FTMT_F2P_TRIG_3,FTMT_F2P_TRIG_2,FTMT_F2P_TRIG_1,FTMT_F2P_TRIG_0}),
- .FTMTF2PTRIGACK({FTMT_F2P_TRIGACK_3,FTMT_F2P_TRIGACK_2,FTMT_F2P_TRIGACK_1,FTMT_F2P_TRIGACK_0}),
- .FTMTP2FDEBUG(FTMT_P2F_DEBUG),
- .FTMTP2FTRIG({FTMT_P2F_TRIG_3,FTMT_P2F_TRIG_2,FTMT_P2F_TRIG_1,FTMT_P2F_TRIG_0}),
- .FTMTP2FTRIGACK({FTMT_P2F_TRIGACK_3,FTMT_P2F_TRIGACK_2,FTMT_P2F_TRIGACK_1,FTMT_P2F_TRIGACK_0}),
- .IRQF2P({Core1_nFIQ,Core0_nFIQ,Core1_nIRQ,Core0_nIRQ,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,IRQ_F2P}),
- .IRQP2F({IRQ_P2F_DMAC_ABORT,IRQ_P2F_DMAC7,IRQ_P2F_DMAC6,IRQ_P2F_DMAC5,IRQ_P2F_DMAC4,IRQ_P2F_DMAC3,IRQ_P2F_DMAC2,IRQ_P2F_DMAC1,IRQ_P2F_DMAC0,IRQ_P2F_SMC,IRQ_P2F_QSPI,IRQ_P2F_CTI,IRQ_P2F_GPIO,IRQ_P2F_USB0,IRQ_P2F_ENET0,IRQ_P2F_ENET_WAKE0,IRQ_P2F_SDIO0,IRQ_P2F_I2C0,IRQ_P2F_SPI0,IRQ_P2F_UART0,IRQ_P2F_CAN0,IRQ_P2F_USB1,IRQ_P2F_ENET1,IRQ_P2F_ENET_WAKE1,IRQ_P2F_SDIO1,IRQ_P2F_I2C1,IRQ_P2F_SPI1,IRQ_P2F_UART1,IRQ_P2F_CAN1}),
- .MAXIGP0ACLK(M_AXI_GP0_ACLK),
- .MAXIGP0ARADDR(M_AXI_GP0_ARADDR),
- .MAXIGP0ARBURST(M_AXI_GP0_ARBURST),
- .MAXIGP0ARCACHE(\^M_AXI_GP0_ARCACHE ),
- .MAXIGP0ARESETN(M_AXI_GP0_ARESETN),
- .MAXIGP0ARID(M_AXI_GP0_ARID),
- .MAXIGP0ARLEN(M_AXI_GP0_ARLEN),
- .MAXIGP0ARLOCK(M_AXI_GP0_ARLOCK),
- .MAXIGP0ARPROT(M_AXI_GP0_ARPROT),
- .MAXIGP0ARQOS(M_AXI_GP0_ARQOS),
- .MAXIGP0ARREADY(M_AXI_GP0_ARREADY),
- .MAXIGP0ARSIZE(\^M_AXI_GP0_ARSIZE ),
- .MAXIGP0ARVALID(M_AXI_GP0_ARVALID),
- .MAXIGP0AWADDR(M_AXI_GP0_AWADDR),
- .MAXIGP0AWBURST(M_AXI_GP0_AWBURST),
- .MAXIGP0AWCACHE(\^M_AXI_GP0_AWCACHE ),
- .MAXIGP0AWID(M_AXI_GP0_AWID),
- .MAXIGP0AWLEN(M_AXI_GP0_AWLEN),
- .MAXIGP0AWLOCK(M_AXI_GP0_AWLOCK),
- .MAXIGP0AWPROT(M_AXI_GP0_AWPROT),
- .MAXIGP0AWQOS(M_AXI_GP0_AWQOS),
- .MAXIGP0AWREADY(M_AXI_GP0_AWREADY),
- .MAXIGP0AWSIZE(\^M_AXI_GP0_AWSIZE ),
- .MAXIGP0AWVALID(M_AXI_GP0_AWVALID),
- .MAXIGP0BID(M_AXI_GP0_BID),
- .MAXIGP0BREADY(M_AXI_GP0_BREADY),
- .MAXIGP0BRESP(M_AXI_GP0_BRESP),
- .MAXIGP0BVALID(M_AXI_GP0_BVALID),
- .MAXIGP0RDATA(M_AXI_GP0_RDATA),
- .MAXIGP0RID(M_AXI_GP0_RID),
- .MAXIGP0RLAST(M_AXI_GP0_RLAST),
- .MAXIGP0RREADY(M_AXI_GP0_RREADY),
- .MAXIGP0RRESP(M_AXI_GP0_RRESP),
- .MAXIGP0RVALID(M_AXI_GP0_RVALID),
- .MAXIGP0WDATA(M_AXI_GP0_WDATA),
- .MAXIGP0WID(M_AXI_GP0_WID),
- .MAXIGP0WLAST(M_AXI_GP0_WLAST),
- .MAXIGP0WREADY(M_AXI_GP0_WREADY),
- .MAXIGP0WSTRB(M_AXI_GP0_WSTRB),
- .MAXIGP0WVALID(M_AXI_GP0_WVALID),
- .MAXIGP1ACLK(M_AXI_GP1_ACLK),
- .MAXIGP1ARADDR(M_AXI_GP1_ARADDR),
- .MAXIGP1ARBURST(M_AXI_GP1_ARBURST),
- .MAXIGP1ARCACHE(\^M_AXI_GP1_ARCACHE ),
- .MAXIGP1ARESETN(M_AXI_GP1_ARESETN),
- .MAXIGP1ARID(M_AXI_GP1_ARID),
- .MAXIGP1ARLEN(M_AXI_GP1_ARLEN),
- .MAXIGP1ARLOCK(M_AXI_GP1_ARLOCK),
- .MAXIGP1ARPROT(M_AXI_GP1_ARPROT),
- .MAXIGP1ARQOS(M_AXI_GP1_ARQOS),
- .MAXIGP1ARREADY(M_AXI_GP1_ARREADY),
- .MAXIGP1ARSIZE(\^M_AXI_GP1_ARSIZE ),
- .MAXIGP1ARVALID(M_AXI_GP1_ARVALID),
- .MAXIGP1AWADDR(M_AXI_GP1_AWADDR),
- .MAXIGP1AWBURST(M_AXI_GP1_AWBURST),
- .MAXIGP1AWCACHE(\^M_AXI_GP1_AWCACHE ),
- .MAXIGP1AWID(M_AXI_GP1_AWID),
- .MAXIGP1AWLEN(M_AXI_GP1_AWLEN),
- .MAXIGP1AWLOCK(M_AXI_GP1_AWLOCK),
- .MAXIGP1AWPROT(M_AXI_GP1_AWPROT),
- .MAXIGP1AWQOS(M_AXI_GP1_AWQOS),
- .MAXIGP1AWREADY(M_AXI_GP1_AWREADY),
- .MAXIGP1AWSIZE(\^M_AXI_GP1_AWSIZE ),
- .MAXIGP1AWVALID(M_AXI_GP1_AWVALID),
- .MAXIGP1BID(M_AXI_GP1_BID),
- .MAXIGP1BREADY(M_AXI_GP1_BREADY),
- .MAXIGP1BRESP(M_AXI_GP1_BRESP),
- .MAXIGP1BVALID(M_AXI_GP1_BVALID),
- .MAXIGP1RDATA(M_AXI_GP1_RDATA),
- .MAXIGP1RID(M_AXI_GP1_RID),
- .MAXIGP1RLAST(M_AXI_GP1_RLAST),
- .MAXIGP1RREADY(M_AXI_GP1_RREADY),
- .MAXIGP1RRESP(M_AXI_GP1_RRESP),
- .MAXIGP1RVALID(M_AXI_GP1_RVALID),
- .MAXIGP1WDATA(M_AXI_GP1_WDATA),
- .MAXIGP1WID(M_AXI_GP1_WID),
- .MAXIGP1WLAST(M_AXI_GP1_WLAST),
- .MAXIGP1WREADY(M_AXI_GP1_WREADY),
- .MAXIGP1WSTRB(M_AXI_GP1_WSTRB),
- .MAXIGP1WVALID(M_AXI_GP1_WVALID),
- .MIO(buffered_MIO),
- .PSCLK(buffered_PS_CLK),
- .PSPORB(buffered_PS_PORB),
- .PSSRSTB(buffered_PS_SRSTB),
- .SAXIACPACLK(S_AXI_ACP_ACLK),
- .SAXIACPARADDR(S_AXI_ACP_ARADDR),
- .SAXIACPARBURST(S_AXI_ACP_ARBURST),
- .SAXIACPARCACHE(S_AXI_ACP_ARCACHE),
- .SAXIACPARESETN(S_AXI_ACP_ARESETN),
- .SAXIACPARID(S_AXI_ACP_ARID),
- .SAXIACPARLEN(S_AXI_ACP_ARLEN),
- .SAXIACPARLOCK(S_AXI_ACP_ARLOCK),
- .SAXIACPARPROT(S_AXI_ACP_ARPROT),
- .SAXIACPARQOS(S_AXI_ACP_ARQOS),
- .SAXIACPARREADY(S_AXI_ACP_ARREADY),
- .SAXIACPARSIZE(S_AXI_ACP_ARSIZE[1:0]),
- .SAXIACPARUSER(S_AXI_ACP_ARUSER),
- .SAXIACPARVALID(S_AXI_ACP_ARVALID),
- .SAXIACPAWADDR(S_AXI_ACP_AWADDR),
- .SAXIACPAWBURST(S_AXI_ACP_AWBURST),
- .SAXIACPAWCACHE(S_AXI_ACP_AWCACHE),
- .SAXIACPAWID(S_AXI_ACP_AWID),
- .SAXIACPAWLEN(S_AXI_ACP_AWLEN),
- .SAXIACPAWLOCK(S_AXI_ACP_AWLOCK),
- .SAXIACPAWPROT(S_AXI_ACP_AWPROT),
- .SAXIACPAWQOS(S_AXI_ACP_AWQOS),
- .SAXIACPAWREADY(S_AXI_ACP_AWREADY),
- .SAXIACPAWSIZE(S_AXI_ACP_AWSIZE[1:0]),
- .SAXIACPAWUSER(S_AXI_ACP_AWUSER),
- .SAXIACPAWVALID(S_AXI_ACP_AWVALID),
- .SAXIACPBID(S_AXI_ACP_BID),
- .SAXIACPBREADY(S_AXI_ACP_BREADY),
- .SAXIACPBRESP(S_AXI_ACP_BRESP),
- .SAXIACPBVALID(S_AXI_ACP_BVALID),
- .SAXIACPRDATA(S_AXI_ACP_RDATA),
- .SAXIACPRID(S_AXI_ACP_RID),
- .SAXIACPRLAST(S_AXI_ACP_RLAST),
- .SAXIACPRREADY(S_AXI_ACP_RREADY),
- .SAXIACPRRESP(S_AXI_ACP_RRESP),
- .SAXIACPRVALID(S_AXI_ACP_RVALID),
- .SAXIACPWDATA(S_AXI_ACP_WDATA),
- .SAXIACPWID(S_AXI_ACP_WID),
- .SAXIACPWLAST(S_AXI_ACP_WLAST),
- .SAXIACPWREADY(S_AXI_ACP_WREADY),
- .SAXIACPWSTRB(S_AXI_ACP_WSTRB),
- .SAXIACPWVALID(S_AXI_ACP_WVALID),
- .SAXIGP0ACLK(S_AXI_GP0_ACLK),
- .SAXIGP0ARADDR(S_AXI_GP0_ARADDR),
- .SAXIGP0ARBURST(S_AXI_GP0_ARBURST),
- .SAXIGP0ARCACHE(S_AXI_GP0_ARCACHE),
- .SAXIGP0ARESETN(S_AXI_GP0_ARESETN),
- .SAXIGP0ARID(S_AXI_GP0_ARID),
- .SAXIGP0ARLEN(S_AXI_GP0_ARLEN),
- .SAXIGP0ARLOCK(S_AXI_GP0_ARLOCK),
- .SAXIGP0ARPROT(S_AXI_GP0_ARPROT),
- .SAXIGP0ARQOS(S_AXI_GP0_ARQOS),
- .SAXIGP0ARREADY(S_AXI_GP0_ARREADY),
- .SAXIGP0ARSIZE(S_AXI_GP0_ARSIZE[1:0]),
- .SAXIGP0ARVALID(S_AXI_GP0_ARVALID),
- .SAXIGP0AWADDR(S_AXI_GP0_AWADDR),
- .SAXIGP0AWBURST(S_AXI_GP0_AWBURST),
- .SAXIGP0AWCACHE(S_AXI_GP0_AWCACHE),
- .SAXIGP0AWID(S_AXI_GP0_AWID),
- .SAXIGP0AWLEN(S_AXI_GP0_AWLEN),
- .SAXIGP0AWLOCK(S_AXI_GP0_AWLOCK),
- .SAXIGP0AWPROT(S_AXI_GP0_AWPROT),
- .SAXIGP0AWQOS(S_AXI_GP0_AWQOS),
- .SAXIGP0AWREADY(S_AXI_GP0_AWREADY),
- .SAXIGP0AWSIZE(S_AXI_GP0_AWSIZE[1:0]),
- .SAXIGP0AWVALID(S_AXI_GP0_AWVALID),
- .SAXIGP0BID(S_AXI_GP0_BID),
- .SAXIGP0BREADY(S_AXI_GP0_BREADY),
- .SAXIGP0BRESP(S_AXI_GP0_BRESP),
- .SAXIGP0BVALID(S_AXI_GP0_BVALID),
- .SAXIGP0RDATA(S_AXI_GP0_RDATA),
- .SAXIGP0RID(S_AXI_GP0_RID),
- .SAXIGP0RLAST(S_AXI_GP0_RLAST),
- .SAXIGP0RREADY(S_AXI_GP0_RREADY),
- .SAXIGP0RRESP(S_AXI_GP0_RRESP),
- .SAXIGP0RVALID(S_AXI_GP0_RVALID),
- .SAXIGP0WDATA(S_AXI_GP0_WDATA),
- .SAXIGP0WID(S_AXI_GP0_WID),
- .SAXIGP0WLAST(S_AXI_GP0_WLAST),
- .SAXIGP0WREADY(S_AXI_GP0_WREADY),
- .SAXIGP0WSTRB(S_AXI_GP0_WSTRB),
- .SAXIGP0WVALID(S_AXI_GP0_WVALID),
- .SAXIGP1ACLK(S_AXI_GP1_ACLK),
- .SAXIGP1ARADDR(S_AXI_GP1_ARADDR),
- .SAXIGP1ARBURST(S_AXI_GP1_ARBURST),
- .SAXIGP1ARCACHE(S_AXI_GP1_ARCACHE),
- .SAXIGP1ARESETN(S_AXI_GP1_ARESETN),
- .SAXIGP1ARID(S_AXI_GP1_ARID),
- .SAXIGP1ARLEN(S_AXI_GP1_ARLEN),
- .SAXIGP1ARLOCK(S_AXI_GP1_ARLOCK),
- .SAXIGP1ARPROT(S_AXI_GP1_ARPROT),
- .SAXIGP1ARQOS(S_AXI_GP1_ARQOS),
- .SAXIGP1ARREADY(S_AXI_GP1_ARREADY),
- .SAXIGP1ARSIZE(S_AXI_GP1_ARSIZE[1:0]),
- .SAXIGP1ARVALID(S_AXI_GP1_ARVALID),
- .SAXIGP1AWADDR(S_AXI_GP1_AWADDR),
- .SAXIGP1AWBURST(S_AXI_GP1_AWBURST),
- .SAXIGP1AWCACHE(S_AXI_GP1_AWCACHE),
- .SAXIGP1AWID(S_AXI_GP1_AWID),
- .SAXIGP1AWLEN(S_AXI_GP1_AWLEN),
- .SAXIGP1AWLOCK(S_AXI_GP1_AWLOCK),
- .SAXIGP1AWPROT(S_AXI_GP1_AWPROT),
- .SAXIGP1AWQOS(S_AXI_GP1_AWQOS),
- .SAXIGP1AWREADY(S_AXI_GP1_AWREADY),
- .SAXIGP1AWSIZE(S_AXI_GP1_AWSIZE[1:0]),
- .SAXIGP1AWVALID(S_AXI_GP1_AWVALID),
- .SAXIGP1BID(S_AXI_GP1_BID),
- .SAXIGP1BREADY(S_AXI_GP1_BREADY),
- .SAXIGP1BRESP(S_AXI_GP1_BRESP),
- .SAXIGP1BVALID(S_AXI_GP1_BVALID),
- .SAXIGP1RDATA(S_AXI_GP1_RDATA),
- .SAXIGP1RID(S_AXI_GP1_RID),
- .SAXIGP1RLAST(S_AXI_GP1_RLAST),
- .SAXIGP1RREADY(S_AXI_GP1_RREADY),
- .SAXIGP1RRESP(S_AXI_GP1_RRESP),
- .SAXIGP1RVALID(S_AXI_GP1_RVALID),
- .SAXIGP1WDATA(S_AXI_GP1_WDATA),
- .SAXIGP1WID(S_AXI_GP1_WID),
- .SAXIGP1WLAST(S_AXI_GP1_WLAST),
- .SAXIGP1WREADY(S_AXI_GP1_WREADY),
- .SAXIGP1WSTRB(S_AXI_GP1_WSTRB),
- .SAXIGP1WVALID(S_AXI_GP1_WVALID),
- .SAXIHP0ACLK(S_AXI_HP0_ACLK),
- .SAXIHP0ARADDR(S_AXI_HP0_ARADDR),
- .SAXIHP0ARBURST(S_AXI_HP0_ARBURST),
- .SAXIHP0ARCACHE(S_AXI_HP0_ARCACHE),
- .SAXIHP0ARESETN(S_AXI_HP0_ARESETN),
- .SAXIHP0ARID(S_AXI_HP0_ARID),
- .SAXIHP0ARLEN(S_AXI_HP0_ARLEN),
- .SAXIHP0ARLOCK(S_AXI_HP0_ARLOCK),
- .SAXIHP0ARPROT(S_AXI_HP0_ARPROT),
- .SAXIHP0ARQOS(S_AXI_HP0_ARQOS),
- .SAXIHP0ARREADY(S_AXI_HP0_ARREADY),
- .SAXIHP0ARSIZE(S_AXI_HP0_ARSIZE[1:0]),
- .SAXIHP0ARVALID(S_AXI_HP0_ARVALID),
- .SAXIHP0AWADDR(S_AXI_HP0_AWADDR),
- .SAXIHP0AWBURST(S_AXI_HP0_AWBURST),
- .SAXIHP0AWCACHE(S_AXI_HP0_AWCACHE),
- .SAXIHP0AWID(S_AXI_HP0_AWID),
- .SAXIHP0AWLEN(S_AXI_HP0_AWLEN),
- .SAXIHP0AWLOCK(S_AXI_HP0_AWLOCK),
- .SAXIHP0AWPROT(S_AXI_HP0_AWPROT),
- .SAXIHP0AWQOS(S_AXI_HP0_AWQOS),
- .SAXIHP0AWREADY(S_AXI_HP0_AWREADY),
- .SAXIHP0AWSIZE(S_AXI_HP0_AWSIZE[1:0]),
- .SAXIHP0AWVALID(S_AXI_HP0_AWVALID),
- .SAXIHP0BID(S_AXI_HP0_BID),
- .SAXIHP0BREADY(S_AXI_HP0_BREADY),
- .SAXIHP0BRESP(S_AXI_HP0_BRESP),
- .SAXIHP0BVALID(S_AXI_HP0_BVALID),
- .SAXIHP0RACOUNT(S_AXI_HP0_RACOUNT),
- .SAXIHP0RCOUNT(S_AXI_HP0_RCOUNT),
- .SAXIHP0RDATA(S_AXI_HP0_RDATA),
- .SAXIHP0RDISSUECAP1EN(S_AXI_HP0_RDISSUECAP1_EN),
- .SAXIHP0RID(S_AXI_HP0_RID),
- .SAXIHP0RLAST(S_AXI_HP0_RLAST),
- .SAXIHP0RREADY(S_AXI_HP0_RREADY),
- .SAXIHP0RRESP(S_AXI_HP0_RRESP),
- .SAXIHP0RVALID(S_AXI_HP0_RVALID),
- .SAXIHP0WACOUNT(S_AXI_HP0_WACOUNT),
- .SAXIHP0WCOUNT(S_AXI_HP0_WCOUNT),
- .SAXIHP0WDATA(S_AXI_HP0_WDATA),
- .SAXIHP0WID(S_AXI_HP0_WID),
- .SAXIHP0WLAST(S_AXI_HP0_WLAST),
- .SAXIHP0WREADY(S_AXI_HP0_WREADY),
- .SAXIHP0WRISSUECAP1EN(S_AXI_HP0_WRISSUECAP1_EN),
- .SAXIHP0WSTRB(S_AXI_HP0_WSTRB),
- .SAXIHP0WVALID(S_AXI_HP0_WVALID),
- .SAXIHP1ACLK(S_AXI_HP1_ACLK),
- .SAXIHP1ARADDR(S_AXI_HP1_ARADDR),
- .SAXIHP1ARBURST(S_AXI_HP1_ARBURST),
- .SAXIHP1ARCACHE(S_AXI_HP1_ARCACHE),
- .SAXIHP1ARESETN(S_AXI_HP1_ARESETN),
- .SAXIHP1ARID(S_AXI_HP1_ARID),
- .SAXIHP1ARLEN(S_AXI_HP1_ARLEN),
- .SAXIHP1ARLOCK(S_AXI_HP1_ARLOCK),
- .SAXIHP1ARPROT(S_AXI_HP1_ARPROT),
- .SAXIHP1ARQOS(S_AXI_HP1_ARQOS),
- .SAXIHP1ARREADY(S_AXI_HP1_ARREADY),
- .SAXIHP1ARSIZE(S_AXI_HP1_ARSIZE[1:0]),
- .SAXIHP1ARVALID(S_AXI_HP1_ARVALID),
- .SAXIHP1AWADDR(S_AXI_HP1_AWADDR),
- .SAXIHP1AWBURST(S_AXI_HP1_AWBURST),
- .SAXIHP1AWCACHE(S_AXI_HP1_AWCACHE),
- .SAXIHP1AWID(S_AXI_HP1_AWID),
- .SAXIHP1AWLEN(S_AXI_HP1_AWLEN),
- .SAXIHP1AWLOCK(S_AXI_HP1_AWLOCK),
- .SAXIHP1AWPROT(S_AXI_HP1_AWPROT),
- .SAXIHP1AWQOS(S_AXI_HP1_AWQOS),
- .SAXIHP1AWREADY(S_AXI_HP1_AWREADY),
- .SAXIHP1AWSIZE(S_AXI_HP1_AWSIZE[1:0]),
- .SAXIHP1AWVALID(S_AXI_HP1_AWVALID),
- .SAXIHP1BID(S_AXI_HP1_BID),
- .SAXIHP1BREADY(S_AXI_HP1_BREADY),
- .SAXIHP1BRESP(S_AXI_HP1_BRESP),
- .SAXIHP1BVALID(S_AXI_HP1_BVALID),
- .SAXIHP1RACOUNT(S_AXI_HP1_RACOUNT),
- .SAXIHP1RCOUNT(S_AXI_HP1_RCOUNT),
- .SAXIHP1RDATA(S_AXI_HP1_RDATA),
- .SAXIHP1RDISSUECAP1EN(S_AXI_HP1_RDISSUECAP1_EN),
- .SAXIHP1RID(S_AXI_HP1_RID),
- .SAXIHP1RLAST(S_AXI_HP1_RLAST),
- .SAXIHP1RREADY(S_AXI_HP1_RREADY),
- .SAXIHP1RRESP(S_AXI_HP1_RRESP),
- .SAXIHP1RVALID(S_AXI_HP1_RVALID),
- .SAXIHP1WACOUNT(S_AXI_HP1_WACOUNT),
- .SAXIHP1WCOUNT(S_AXI_HP1_WCOUNT),
- .SAXIHP1WDATA(S_AXI_HP1_WDATA),
- .SAXIHP1WID(S_AXI_HP1_WID),
- .SAXIHP1WLAST(S_AXI_HP1_WLAST),
- .SAXIHP1WREADY(S_AXI_HP1_WREADY),
- .SAXIHP1WRISSUECAP1EN(S_AXI_HP1_WRISSUECAP1_EN),
- .SAXIHP1WSTRB(S_AXI_HP1_WSTRB),
- .SAXIHP1WVALID(S_AXI_HP1_WVALID),
- .SAXIHP2ACLK(S_AXI_HP2_ACLK),
- .SAXIHP2ARADDR(S_AXI_HP2_ARADDR),
- .SAXIHP2ARBURST(S_AXI_HP2_ARBURST),
- .SAXIHP2ARCACHE(S_AXI_HP2_ARCACHE),
- .SAXIHP2ARESETN(S_AXI_HP2_ARESETN),
- .SAXIHP2ARID(S_AXI_HP2_ARID),
- .SAXIHP2ARLEN(S_AXI_HP2_ARLEN),
- .SAXIHP2ARLOCK(S_AXI_HP2_ARLOCK),
- .SAXIHP2ARPROT(S_AXI_HP2_ARPROT),
- .SAXIHP2ARQOS(S_AXI_HP2_ARQOS),
- .SAXIHP2ARREADY(S_AXI_HP2_ARREADY),
- .SAXIHP2ARSIZE(S_AXI_HP2_ARSIZE[1:0]),
- .SAXIHP2ARVALID(S_AXI_HP2_ARVALID),
- .SAXIHP2AWADDR(S_AXI_HP2_AWADDR),
- .SAXIHP2AWBURST(S_AXI_HP2_AWBURST),
- .SAXIHP2AWCACHE(S_AXI_HP2_AWCACHE),
- .SAXIHP2AWID(S_AXI_HP2_AWID),
- .SAXIHP2AWLEN(S_AXI_HP2_AWLEN),
- .SAXIHP2AWLOCK(S_AXI_HP2_AWLOCK),
- .SAXIHP2AWPROT(S_AXI_HP2_AWPROT),
- .SAXIHP2AWQOS(S_AXI_HP2_AWQOS),
- .SAXIHP2AWREADY(S_AXI_HP2_AWREADY),
- .SAXIHP2AWSIZE(S_AXI_HP2_AWSIZE[1:0]),
- .SAXIHP2AWVALID(S_AXI_HP2_AWVALID),
- .SAXIHP2BID(S_AXI_HP2_BID),
- .SAXIHP2BREADY(S_AXI_HP2_BREADY),
- .SAXIHP2BRESP(S_AXI_HP2_BRESP),
- .SAXIHP2BVALID(S_AXI_HP2_BVALID),
- .SAXIHP2RACOUNT(S_AXI_HP2_RACOUNT),
- .SAXIHP2RCOUNT(S_AXI_HP2_RCOUNT),
- .SAXIHP2RDATA(S_AXI_HP2_RDATA),
- .SAXIHP2RDISSUECAP1EN(S_AXI_HP2_RDISSUECAP1_EN),
- .SAXIHP2RID(S_AXI_HP2_RID),
- .SAXIHP2RLAST(S_AXI_HP2_RLAST),
- .SAXIHP2RREADY(S_AXI_HP2_RREADY),
- .SAXIHP2RRESP(S_AXI_HP2_RRESP),
- .SAXIHP2RVALID(S_AXI_HP2_RVALID),
- .SAXIHP2WACOUNT(S_AXI_HP2_WACOUNT),
- .SAXIHP2WCOUNT(S_AXI_HP2_WCOUNT),
- .SAXIHP2WDATA(S_AXI_HP2_WDATA),
- .SAXIHP2WID(S_AXI_HP2_WID),
- .SAXIHP2WLAST(S_AXI_HP2_WLAST),
- .SAXIHP2WREADY(S_AXI_HP2_WREADY),
- .SAXIHP2WRISSUECAP1EN(S_AXI_HP2_WRISSUECAP1_EN),
- .SAXIHP2WSTRB(S_AXI_HP2_WSTRB),
- .SAXIHP2WVALID(S_AXI_HP2_WVALID),
- .SAXIHP3ACLK(S_AXI_HP3_ACLK),
- .SAXIHP3ARADDR(S_AXI_HP3_ARADDR),
- .SAXIHP3ARBURST(S_AXI_HP3_ARBURST),
- .SAXIHP3ARCACHE(S_AXI_HP3_ARCACHE),
- .SAXIHP3ARESETN(S_AXI_HP3_ARESETN),
- .SAXIHP3ARID(S_AXI_HP3_ARID),
- .SAXIHP3ARLEN(S_AXI_HP3_ARLEN),
- .SAXIHP3ARLOCK(S_AXI_HP3_ARLOCK),
- .SAXIHP3ARPROT(S_AXI_HP3_ARPROT),
- .SAXIHP3ARQOS(S_AXI_HP3_ARQOS),
- .SAXIHP3ARREADY(S_AXI_HP3_ARREADY),
- .SAXIHP3ARSIZE(S_AXI_HP3_ARSIZE[1:0]),
- .SAXIHP3ARVALID(S_AXI_HP3_ARVALID),
- .SAXIHP3AWADDR(S_AXI_HP3_AWADDR),
- .SAXIHP3AWBURST(S_AXI_HP3_AWBURST),
- .SAXIHP3AWCACHE(S_AXI_HP3_AWCACHE),
- .SAXIHP3AWID(S_AXI_HP3_AWID),
- .SAXIHP3AWLEN(S_AXI_HP3_AWLEN),
- .SAXIHP3AWLOCK(S_AXI_HP3_AWLOCK),
- .SAXIHP3AWPROT(S_AXI_HP3_AWPROT),
- .SAXIHP3AWQOS(S_AXI_HP3_AWQOS),
- .SAXIHP3AWREADY(S_AXI_HP3_AWREADY),
- .SAXIHP3AWSIZE(S_AXI_HP3_AWSIZE[1:0]),
- .SAXIHP3AWVALID(S_AXI_HP3_AWVALID),
- .SAXIHP3BID(S_AXI_HP3_BID),
- .SAXIHP3BREADY(S_AXI_HP3_BREADY),
- .SAXIHP3BRESP(S_AXI_HP3_BRESP),
- .SAXIHP3BVALID(S_AXI_HP3_BVALID),
- .SAXIHP3RACOUNT(S_AXI_HP3_RACOUNT),
- .SAXIHP3RCOUNT(S_AXI_HP3_RCOUNT),
- .SAXIHP3RDATA(S_AXI_HP3_RDATA),
- .SAXIHP3RDISSUECAP1EN(S_AXI_HP3_RDISSUECAP1_EN),
- .SAXIHP3RID(S_AXI_HP3_RID),
- .SAXIHP3RLAST(S_AXI_HP3_RLAST),
- .SAXIHP3RREADY(S_AXI_HP3_RREADY),
- .SAXIHP3RRESP(S_AXI_HP3_RRESP),
- .SAXIHP3RVALID(S_AXI_HP3_RVALID),
- .SAXIHP3WACOUNT(S_AXI_HP3_WACOUNT),
- .SAXIHP3WCOUNT(S_AXI_HP3_WCOUNT),
- .SAXIHP3WDATA(S_AXI_HP3_WDATA),
- .SAXIHP3WID(S_AXI_HP3_WID),
- .SAXIHP3WLAST(S_AXI_HP3_WLAST),
- .SAXIHP3WREADY(S_AXI_HP3_WREADY),
- .SAXIHP3WRISSUECAP1EN(S_AXI_HP3_WRISSUECAP1_EN),
- .SAXIHP3WSTRB(S_AXI_HP3_WSTRB),
- .SAXIHP3WVALID(S_AXI_HP3_WVALID));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF PS_CLK_BIBUF
- (.IO(buffered_PS_CLK),
- .PAD(PS_CLK));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF PS_PORB_BIBUF
- (.IO(buffered_PS_PORB),
- .PAD(PS_PORB));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF PS_SRSTB_BIBUF
- (.IO(buffered_PS_SRSTB),
- .PAD(PS_SRSTB));
- LUT1 #(
- .INIT(2'h1))
- SDIO0_CMD_T_INST_0
- (.I0(SDIO0_CMD_T_n),
- .O(SDIO0_CMD_T));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[0]_INST_0
- (.I0(SDIO0_DATA_T_n[0]),
- .O(SDIO0_DATA_T[0]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[1]_INST_0
- (.I0(SDIO0_DATA_T_n[1]),
- .O(SDIO0_DATA_T[1]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[2]_INST_0
- (.I0(SDIO0_DATA_T_n[2]),
- .O(SDIO0_DATA_T[2]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO0_DATA_T[3]_INST_0
- (.I0(SDIO0_DATA_T_n[3]),
- .O(SDIO0_DATA_T[3]));
- LUT1 #(
- .INIT(2'h1))
- SDIO1_CMD_T_INST_0
- (.I0(SDIO1_CMD_T_n),
- .O(SDIO1_CMD_T));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[0]_INST_0
- (.I0(SDIO1_DATA_T_n[0]),
- .O(SDIO1_DATA_T[0]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[1]_INST_0
- (.I0(SDIO1_DATA_T_n[1]),
- .O(SDIO1_DATA_T[1]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[2]_INST_0
- (.I0(SDIO1_DATA_T_n[2]),
- .O(SDIO1_DATA_T[2]));
- LUT1 #(
- .INIT(2'h1))
- \SDIO1_DATA_T[3]_INST_0
- (.I0(SDIO1_DATA_T_n[3]),
- .O(SDIO1_DATA_T[3]));
- LUT1 #(
- .INIT(2'h1))
- SPI0_MISO_T_INST_0
- (.I0(SPI0_MISO_T_n),
- .O(SPI0_MISO_T));
- LUT1 #(
- .INIT(2'h1))
- SPI0_MOSI_T_INST_0
- (.I0(SPI0_MOSI_T_n),
- .O(SPI0_MOSI_T));
- LUT1 #(
- .INIT(2'h1))
- SPI0_SCLK_T_INST_0
- (.I0(SPI0_SCLK_T_n),
- .O(SPI0_SCLK_T));
- LUT1 #(
- .INIT(2'h1))
- SPI0_SS_T_INST_0
- (.I0(SPI0_SS_T_n),
- .O(SPI0_SS_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_MISO_T_INST_0
- (.I0(SPI1_MISO_T_n),
- .O(SPI1_MISO_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_MOSI_T_INST_0
- (.I0(SPI1_MOSI_T_n),
- .O(SPI1_MOSI_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_SCLK_T_INST_0
- (.I0(SPI1_SCLK_T_n),
- .O(SPI1_SCLK_T));
- LUT1 #(
- .INIT(2'h1))
- SPI1_SS_T_INST_0
- (.I0(SPI1_SS_T_n),
- .O(SPI1_SS_T));
- VCC VCC
- (.P(\<const1> ));
- (* BOX_TYPE = "PRIMITIVE" *)
- BUFG \buffer_fclk_clk_0.FCLK_CLK_0_BUFG
- (.I(FCLK_CLK_unbuffered),
- .O(FCLK_CLK0));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[0].MIO_BIBUF
- (.IO(buffered_MIO[0]),
- .PAD(MIO[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[10].MIO_BIBUF
- (.IO(buffered_MIO[10]),
- .PAD(MIO[10]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[11].MIO_BIBUF
- (.IO(buffered_MIO[11]),
- .PAD(MIO[11]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[12].MIO_BIBUF
- (.IO(buffered_MIO[12]),
- .PAD(MIO[12]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[13].MIO_BIBUF
- (.IO(buffered_MIO[13]),
- .PAD(MIO[13]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[14].MIO_BIBUF
- (.IO(buffered_MIO[14]),
- .PAD(MIO[14]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[15].MIO_BIBUF
- (.IO(buffered_MIO[15]),
- .PAD(MIO[15]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[16].MIO_BIBUF
- (.IO(buffered_MIO[16]),
- .PAD(MIO[16]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[17].MIO_BIBUF
- (.IO(buffered_MIO[17]),
- .PAD(MIO[17]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[18].MIO_BIBUF
- (.IO(buffered_MIO[18]),
- .PAD(MIO[18]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[19].MIO_BIBUF
- (.IO(buffered_MIO[19]),
- .PAD(MIO[19]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[1].MIO_BIBUF
- (.IO(buffered_MIO[1]),
- .PAD(MIO[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[20].MIO_BIBUF
- (.IO(buffered_MIO[20]),
- .PAD(MIO[20]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[21].MIO_BIBUF
- (.IO(buffered_MIO[21]),
- .PAD(MIO[21]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[22].MIO_BIBUF
- (.IO(buffered_MIO[22]),
- .PAD(MIO[22]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[23].MIO_BIBUF
- (.IO(buffered_MIO[23]),
- .PAD(MIO[23]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[24].MIO_BIBUF
- (.IO(buffered_MIO[24]),
- .PAD(MIO[24]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[25].MIO_BIBUF
- (.IO(buffered_MIO[25]),
- .PAD(MIO[25]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[26].MIO_BIBUF
- (.IO(buffered_MIO[26]),
- .PAD(MIO[26]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[27].MIO_BIBUF
- (.IO(buffered_MIO[27]),
- .PAD(MIO[27]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[28].MIO_BIBUF
- (.IO(buffered_MIO[28]),
- .PAD(MIO[28]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[29].MIO_BIBUF
- (.IO(buffered_MIO[29]),
- .PAD(MIO[29]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[2].MIO_BIBUF
- (.IO(buffered_MIO[2]),
- .PAD(MIO[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[30].MIO_BIBUF
- (.IO(buffered_MIO[30]),
- .PAD(MIO[30]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[31].MIO_BIBUF
- (.IO(buffered_MIO[31]),
- .PAD(MIO[31]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[32].MIO_BIBUF
- (.IO(buffered_MIO[32]),
- .PAD(MIO[32]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[33].MIO_BIBUF
- (.IO(buffered_MIO[33]),
- .PAD(MIO[33]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[34].MIO_BIBUF
- (.IO(buffered_MIO[34]),
- .PAD(MIO[34]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[35].MIO_BIBUF
- (.IO(buffered_MIO[35]),
- .PAD(MIO[35]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[36].MIO_BIBUF
- (.IO(buffered_MIO[36]),
- .PAD(MIO[36]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[37].MIO_BIBUF
- (.IO(buffered_MIO[37]),
- .PAD(MIO[37]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[38].MIO_BIBUF
- (.IO(buffered_MIO[38]),
- .PAD(MIO[38]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[39].MIO_BIBUF
- (.IO(buffered_MIO[39]),
- .PAD(MIO[39]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[3].MIO_BIBUF
- (.IO(buffered_MIO[3]),
- .PAD(MIO[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[40].MIO_BIBUF
- (.IO(buffered_MIO[40]),
- .PAD(MIO[40]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[41].MIO_BIBUF
- (.IO(buffered_MIO[41]),
- .PAD(MIO[41]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[42].MIO_BIBUF
- (.IO(buffered_MIO[42]),
- .PAD(MIO[42]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[43].MIO_BIBUF
- (.IO(buffered_MIO[43]),
- .PAD(MIO[43]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[44].MIO_BIBUF
- (.IO(buffered_MIO[44]),
- .PAD(MIO[44]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[45].MIO_BIBUF
- (.IO(buffered_MIO[45]),
- .PAD(MIO[45]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[46].MIO_BIBUF
- (.IO(buffered_MIO[46]),
- .PAD(MIO[46]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[47].MIO_BIBUF
- (.IO(buffered_MIO[47]),
- .PAD(MIO[47]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[48].MIO_BIBUF
- (.IO(buffered_MIO[48]),
- .PAD(MIO[48]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[49].MIO_BIBUF
- (.IO(buffered_MIO[49]),
- .PAD(MIO[49]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[4].MIO_BIBUF
- (.IO(buffered_MIO[4]),
- .PAD(MIO[4]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[50].MIO_BIBUF
- (.IO(buffered_MIO[50]),
- .PAD(MIO[50]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[51].MIO_BIBUF
- (.IO(buffered_MIO[51]),
- .PAD(MIO[51]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[52].MIO_BIBUF
- (.IO(buffered_MIO[52]),
- .PAD(MIO[52]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[53].MIO_BIBUF
- (.IO(buffered_MIO[53]),
- .PAD(MIO[53]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[5].MIO_BIBUF
- (.IO(buffered_MIO[5]),
- .PAD(MIO[5]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[6].MIO_BIBUF
- (.IO(buffered_MIO[6]),
- .PAD(MIO[6]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[7].MIO_BIBUF
- (.IO(buffered_MIO[7]),
- .PAD(MIO[7]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[8].MIO_BIBUF
- (.IO(buffered_MIO[8]),
- .PAD(MIO[8]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk13[9].MIO_BIBUF
- (.IO(buffered_MIO[9]),
- .PAD(MIO[9]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk14[0].DDR_BankAddr_BIBUF
- (.IO(buffered_DDR_BankAddr[0]),
- .PAD(DDR_BankAddr[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk14[1].DDR_BankAddr_BIBUF
- (.IO(buffered_DDR_BankAddr[1]),
- .PAD(DDR_BankAddr[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk14[2].DDR_BankAddr_BIBUF
- (.IO(buffered_DDR_BankAddr[2]),
- .PAD(DDR_BankAddr[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[0].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[0]),
- .PAD(DDR_Addr[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[10].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[10]),
- .PAD(DDR_Addr[10]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[11].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[11]),
- .PAD(DDR_Addr[11]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[12].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[12]),
- .PAD(DDR_Addr[12]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[13].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[13]),
- .PAD(DDR_Addr[13]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[14].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[14]),
- .PAD(DDR_Addr[14]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[1].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[1]),
- .PAD(DDR_Addr[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[2].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[2]),
- .PAD(DDR_Addr[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[3].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[3]),
- .PAD(DDR_Addr[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[4].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[4]),
- .PAD(DDR_Addr[4]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[5].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[5]),
- .PAD(DDR_Addr[5]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[6].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[6]),
- .PAD(DDR_Addr[6]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[7].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[7]),
- .PAD(DDR_Addr[7]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[8].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[8]),
- .PAD(DDR_Addr[8]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk15[9].DDR_Addr_BIBUF
- (.IO(buffered_DDR_Addr[9]),
- .PAD(DDR_Addr[9]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[0].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[0]),
- .PAD(DDR_DM[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[1].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[1]),
- .PAD(DDR_DM[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[2].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[2]),
- .PAD(DDR_DM[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk16[3].DDR_DM_BIBUF
- (.IO(buffered_DDR_DM[3]),
- .PAD(DDR_DM[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[0].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[0]),
- .PAD(DDR_DQ[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[10].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[10]),
- .PAD(DDR_DQ[10]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[11].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[11]),
- .PAD(DDR_DQ[11]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[12].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[12]),
- .PAD(DDR_DQ[12]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[13].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[13]),
- .PAD(DDR_DQ[13]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[14].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[14]),
- .PAD(DDR_DQ[14]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[15].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[15]),
- .PAD(DDR_DQ[15]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[16].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[16]),
- .PAD(DDR_DQ[16]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[17].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[17]),
- .PAD(DDR_DQ[17]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[18].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[18]),
- .PAD(DDR_DQ[18]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[19].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[19]),
- .PAD(DDR_DQ[19]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[1].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[1]),
- .PAD(DDR_DQ[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[20].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[20]),
- .PAD(DDR_DQ[20]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[21].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[21]),
- .PAD(DDR_DQ[21]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[22].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[22]),
- .PAD(DDR_DQ[22]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[23].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[23]),
- .PAD(DDR_DQ[23]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[24].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[24]),
- .PAD(DDR_DQ[24]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[25].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[25]),
- .PAD(DDR_DQ[25]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[26].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[26]),
- .PAD(DDR_DQ[26]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[27].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[27]),
- .PAD(DDR_DQ[27]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[28].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[28]),
- .PAD(DDR_DQ[28]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[29].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[29]),
- .PAD(DDR_DQ[29]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[2].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[2]),
- .PAD(DDR_DQ[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[30].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[30]),
- .PAD(DDR_DQ[30]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[31].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[31]),
- .PAD(DDR_DQ[31]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[3].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[3]),
- .PAD(DDR_DQ[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[4].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[4]),
- .PAD(DDR_DQ[4]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[5].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[5]),
- .PAD(DDR_DQ[5]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[6].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[6]),
- .PAD(DDR_DQ[6]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[7].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[7]),
- .PAD(DDR_DQ[7]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[8].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[8]),
- .PAD(DDR_DQ[8]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk17[9].DDR_DQ_BIBUF
- (.IO(buffered_DDR_DQ[9]),
- .PAD(DDR_DQ[9]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[0].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[0]),
- .PAD(DDR_DQS_n[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[1].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[1]),
- .PAD(DDR_DQS_n[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[2].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[2]),
- .PAD(DDR_DQS_n[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk18[3].DDR_DQS_n_BIBUF
- (.IO(buffered_DDR_DQS_n[3]),
- .PAD(DDR_DQS_n[3]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[0].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[0]),
- .PAD(DDR_DQS[0]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[1].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[1]),
- .PAD(DDR_DQS[1]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[2].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[2]),
- .PAD(DDR_DQS[2]));
- (* BOX_TYPE = "PRIMITIVE" *)
- BIBUF \genblk19[3].DDR_DQS_BIBUF
- (.IO(buffered_DDR_DQS[3]),
- .PAD(DDR_DQS[3]));
- LUT1 #(
- .INIT(2'h2))
- i_0
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[0] ));
- LUT1 #(
- .INIT(2'h2))
- i_1
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[0] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_10
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[7] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_11
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[7] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_12
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[6] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_13
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[6] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_14
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[5] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_15
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[5] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_16
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[4] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_17
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[4] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_18
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[3] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_19
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[3] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_2
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[0] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_20
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[2] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_21
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[2] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_22
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[1] [1]));
- LUT1 #(
- .INIT(2'h2))
- i_23
- (.I0(1'b0),
- .O(\TRACE_DATA_PIPE[1] [0]));
- LUT1 #(
- .INIT(2'h2))
- i_3
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[7] ));
- LUT1 #(
- .INIT(2'h2))
- i_4
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[6] ));
- LUT1 #(
- .INIT(2'h2))
- i_5
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[5] ));
- LUT1 #(
- .INIT(2'h2))
- i_6
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[4] ));
- LUT1 #(
- .INIT(2'h2))
- i_7
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[3] ));
- LUT1 #(
- .INIT(2'h2))
- i_8
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[2] ));
- LUT1 #(
- .INIT(2'h2))
- i_9
- (.I0(1'b0),
- .O(\TRACE_CTL_PIPE[1] ));
-endmodule
-
-(* CHECK_LICENSE_TYPE = "scalp_zynqps_processing_system7_0_0,processing_system7_v5_5_processing_system7,{}" *) (* DowngradeIPIdentifiedWarnings = "yes" *) (* X_CORE_INFO = "processing_system7_v5_5_processing_system7,Vivado 2019.2" *)
-(* NotValidForBitStream *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix
- (SPI1_SCLK_I,
- SPI1_SCLK_O,
- SPI1_SCLK_T,
- SPI1_MOSI_I,
- SPI1_MOSI_O,
- SPI1_MOSI_T,
- SPI1_MISO_I,
- SPI1_MISO_O,
- SPI1_MISO_T,
- SPI1_SS_I,
- SPI1_SS_O,
- SPI1_SS1_O,
- SPI1_SS2_O,
- SPI1_SS_T,
- USB0_PORT_INDCTL,
- USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT,
- M_AXI_GP0_ARVALID,
- M_AXI_GP0_AWVALID,
- M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY,
- M_AXI_GP0_WLAST,
- M_AXI_GP0_WVALID,
- M_AXI_GP0_ARID,
- M_AXI_GP0_AWID,
- M_AXI_GP0_WID,
- M_AXI_GP0_ARBURST,
- M_AXI_GP0_ARLOCK,
- M_AXI_GP0_ARSIZE,
- M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK,
- M_AXI_GP0_AWSIZE,
- M_AXI_GP0_ARPROT,
- M_AXI_GP0_AWPROT,
- M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR,
- M_AXI_GP0_WDATA,
- M_AXI_GP0_ARCACHE,
- M_AXI_GP0_ARLEN,
- M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE,
- M_AXI_GP0_AWLEN,
- M_AXI_GP0_AWQOS,
- M_AXI_GP0_WSTRB,
- M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY,
- M_AXI_GP0_AWREADY,
- M_AXI_GP0_BVALID,
- M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID,
- M_AXI_GP0_WREADY,
- M_AXI_GP0_BID,
- M_AXI_GP0_RID,
- M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP,
- M_AXI_GP0_RDATA,
- FCLK_CLK0,
- FCLK_RESET0_N,
- MIO,
- DDR_CAS_n,
- DDR_CKE,
- DDR_Clk_n,
- DDR_Clk,
- DDR_CS_n,
- DDR_DRSTB,
- DDR_ODT,
- DDR_RAS_n,
- DDR_WEB,
- DDR_BankAddr,
- DDR_Addr,
- DDR_VRN,
- DDR_VRP,
- DDR_DM,
- DDR_DQ,
- DDR_DQS_n,
- DDR_DQS,
- PS_SRSTB,
- PS_CLK,
- PS_PORB);
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_I" *) input SPI1_SCLK_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_O" *) output SPI1_SCLK_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SCK_T" *) output SPI1_SCLK_T;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_I" *) input SPI1_MOSI_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_O" *) output SPI1_MOSI_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO0_T" *) output SPI1_MOSI_T;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_I" *) input SPI1_MISO_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_O" *) output SPI1_MISO_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 IO1_T" *) output SPI1_MISO_T;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_I" *) input SPI1_SS_I;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_O" *) output SPI1_SS_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS1_O" *) output SPI1_SS1_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS2_O" *) output SPI1_SS2_O;
- (* X_INTERFACE_INFO = "xilinx.com:interface:spi:1.0 SPI_1 SS_T" *) output SPI1_SS_T;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 PORT_INDCTL" *) output [1:0]USB0_PORT_INDCTL;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 VBUS_PWRSELECT" *) output USB0_VBUS_PWRSELECT;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:usbctrl:1.0 USBIND_0 VBUS_PWRFAULT" *) input USB0_VBUS_PWRFAULT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARVALID" *) output M_AXI_GP0_ARVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWVALID" *) output M_AXI_GP0_AWVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BREADY" *) output M_AXI_GP0_BREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RREADY" *) output M_AXI_GP0_RREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WLAST" *) output M_AXI_GP0_WLAST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WVALID" *) output M_AXI_GP0_WVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARID" *) output [11:0]M_AXI_GP0_ARID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWID" *) output [11:0]M_AXI_GP0_AWID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WID" *) output [11:0]M_AXI_GP0_WID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARBURST" *) output [1:0]M_AXI_GP0_ARBURST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARLOCK" *) output [1:0]M_AXI_GP0_ARLOCK;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARSIZE" *) output [2:0]M_AXI_GP0_ARSIZE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWBURST" *) output [1:0]M_AXI_GP0_AWBURST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWLOCK" *) output [1:0]M_AXI_GP0_AWLOCK;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWSIZE" *) output [2:0]M_AXI_GP0_AWSIZE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARPROT" *) output [2:0]M_AXI_GP0_ARPROT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWPROT" *) output [2:0]M_AXI_GP0_AWPROT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARADDR" *) output [31:0]M_AXI_GP0_ARADDR;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWADDR" *) output [31:0]M_AXI_GP0_AWADDR;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WDATA" *) output [31:0]M_AXI_GP0_WDATA;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARCACHE" *) output [3:0]M_AXI_GP0_ARCACHE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARLEN" *) output [3:0]M_AXI_GP0_ARLEN;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARQOS" *) output [3:0]M_AXI_GP0_ARQOS;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWCACHE" *) output [3:0]M_AXI_GP0_AWCACHE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWLEN" *) output [3:0]M_AXI_GP0_AWLEN;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWQOS" *) output [3:0]M_AXI_GP0_AWQOS;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WSTRB" *) output [3:0]M_AXI_GP0_WSTRB;
- (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 M_AXI_GP0_ACLK CLK" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME M_AXI_GP0_ACLK, ASSOCIATED_BUSIF M_AXI_GP0, FREQ_HZ 125000000, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, INSERT_VIP 0" *) input M_AXI_GP0_ACLK;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 ARREADY" *) input M_AXI_GP0_ARREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 AWREADY" *) input M_AXI_GP0_AWREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BVALID" *) input M_AXI_GP0_BVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RLAST" *) input M_AXI_GP0_RLAST;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RVALID" *) input M_AXI_GP0_RVALID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 WREADY" *) input M_AXI_GP0_WREADY;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BID" *) input [11:0]M_AXI_GP0_BID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RID" *) input [11:0]M_AXI_GP0_RID;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 BRESP" *) input [1:0]M_AXI_GP0_BRESP;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RRESP" *) input [1:0]M_AXI_GP0_RRESP;
- (* X_INTERFACE_INFO = "xilinx.com:interface:aximm:1.0 M_AXI_GP0 RDATA" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME M_AXI_GP0, SUPPORTS_NARROW_BURST 0, NUM_WRITE_OUTSTANDING 8, NUM_READ_OUTSTANDING 8, DATA_WIDTH 32, PROTOCOL AXI3, FREQ_HZ 125000000, ID_WIDTH 12, ADDR_WIDTH 32, AWUSER_WIDTH 0, ARUSER_WIDTH 0, WUSER_WIDTH 0, RUSER_WIDTH 0, BUSER_WIDTH 0, READ_WRITE_MODE READ_WRITE, HAS_BURST 1, HAS_LOCK 1, HAS_PROT 1, HAS_CACHE 1, HAS_QOS 1, HAS_REGION 0, HAS_WSTRB 1, HAS_BRESP 1, HAS_RRESP 1, MAX_BURST_LENGTH 16, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, NUM_READ_THREADS 4, NUM_WRITE_THREADS 4, RUSER_BITS_PER_BYTE 0, WUSER_BITS_PER_BYTE 0, INSERT_VIP 0" *) input [31:0]M_AXI_GP0_RDATA;
- (* X_INTERFACE_INFO = "xilinx.com:signal:clock:1.0 FCLK_CLK0 CLK" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FCLK_CLK0, FREQ_HZ 125000000, PHASE 0.000, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, INSERT_VIP 0" *) output FCLK_CLK0;
- (* X_INTERFACE_INFO = "xilinx.com:signal:reset:1.0 FCLK_RESET0_N RST" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FCLK_RESET0_N, POLARITY ACTIVE_LOW, INSERT_VIP 0" *) output FCLK_RESET0_N;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO MIO" *) inout [53:0]MIO;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CAS_N" *) inout DDR_CAS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CKE" *) inout DDR_CKE;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CK_N" *) inout DDR_Clk_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CK_P" *) inout DDR_Clk;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR CS_N" *) inout DDR_CS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR RESET_N" *) inout DDR_DRSTB;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR ODT" *) inout DDR_ODT;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR RAS_N" *) inout DDR_RAS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR WE_N" *) inout DDR_WEB;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR BA" *) inout [2:0]DDR_BankAddr;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR ADDR" *) inout [14:0]DDR_Addr;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRN" *) inout DDR_VRN;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRP" *) inout DDR_VRP;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DM" *) inout [3:0]DDR_DM;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQ" *) inout [31:0]DDR_DQ;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQS_N" *) inout [3:0]DDR_DQS_n;
- (* X_INTERFACE_INFO = "xilinx.com:interface:ddrx:1.0 DDR DQS_P" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME DDR, CAN_DEBUG false, TIMEPERIOD_PS 1250, MEMORY_TYPE COMPONENTS, DATA_WIDTH 8, CS_ENABLED true, DATA_MASK_ENABLED true, SLOT Single, MEM_ADDR_MAP ROW_COLUMN_BANK, BURST_LENGTH 8, AXI_ARBITRATION_SCHEME TDM, CAS_LATENCY 11, CAS_WRITE_LATENCY 11" *) inout [3:0]DDR_DQS;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_SRSTB" *) inout PS_SRSTB;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_CLK" *) inout PS_CLK;
- (* X_INTERFACE_INFO = "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_PORB" *) (* X_INTERFACE_PARAMETER = "XIL_INTERFACENAME FIXED_IO, CAN_DEBUG false" *) inout PS_PORB;
-
- wire [14:0]DDR_Addr;
- wire [2:0]DDR_BankAddr;
- wire DDR_CAS_n;
- wire DDR_CKE;
- wire DDR_CS_n;
- wire DDR_Clk;
- wire DDR_Clk_n;
- wire [3:0]DDR_DM;
- wire [31:0]DDR_DQ;
- wire [3:0]DDR_DQS;
- wire [3:0]DDR_DQS_n;
- wire DDR_DRSTB;
- wire DDR_ODT;
- wire DDR_RAS_n;
- wire DDR_VRN;
- wire DDR_VRP;
- wire DDR_WEB;
- wire FCLK_CLK0;
- wire FCLK_RESET0_N;
- wire [53:0]MIO;
- wire M_AXI_GP0_ACLK;
- wire [31:0]M_AXI_GP0_ARADDR;
- wire [1:0]M_AXI_GP0_ARBURST;
- wire [3:0]M_AXI_GP0_ARCACHE;
- wire [11:0]M_AXI_GP0_ARID;
- wire [3:0]M_AXI_GP0_ARLEN;
- wire [1:0]M_AXI_GP0_ARLOCK;
- wire [2:0]M_AXI_GP0_ARPROT;
- wire [3:0]M_AXI_GP0_ARQOS;
- wire M_AXI_GP0_ARREADY;
- wire [2:0]M_AXI_GP0_ARSIZE;
- wire M_AXI_GP0_ARVALID;
- wire [31:0]M_AXI_GP0_AWADDR;
- wire [1:0]M_AXI_GP0_AWBURST;
- wire [3:0]M_AXI_GP0_AWCACHE;
- wire [11:0]M_AXI_GP0_AWID;
- wire [3:0]M_AXI_GP0_AWLEN;
- wire [1:0]M_AXI_GP0_AWLOCK;
- wire [2:0]M_AXI_GP0_AWPROT;
- wire [3:0]M_AXI_GP0_AWQOS;
- wire M_AXI_GP0_AWREADY;
- wire [2:0]M_AXI_GP0_AWSIZE;
- wire M_AXI_GP0_AWVALID;
- wire [11:0]M_AXI_GP0_BID;
- wire M_AXI_GP0_BREADY;
- wire [1:0]M_AXI_GP0_BRESP;
- wire M_AXI_GP0_BVALID;
- wire [31:0]M_AXI_GP0_RDATA;
- wire [11:0]M_AXI_GP0_RID;
- wire M_AXI_GP0_RLAST;
- wire M_AXI_GP0_RREADY;
- wire [1:0]M_AXI_GP0_RRESP;
- wire M_AXI_GP0_RVALID;
- wire [31:0]M_AXI_GP0_WDATA;
- wire [11:0]M_AXI_GP0_WID;
- wire M_AXI_GP0_WLAST;
- wire M_AXI_GP0_WREADY;
- wire [3:0]M_AXI_GP0_WSTRB;
- wire M_AXI_GP0_WVALID;
- wire PS_CLK;
- wire PS_PORB;
- wire PS_SRSTB;
- wire SPI1_MISO_I;
- wire SPI1_MISO_O;
- wire SPI1_MISO_T;
- wire SPI1_MOSI_I;
- wire SPI1_MOSI_O;
- wire SPI1_MOSI_T;
- wire SPI1_SCLK_I;
- wire SPI1_SCLK_O;
- wire SPI1_SCLK_T;
- wire SPI1_SS1_O;
- wire SPI1_SS2_O;
- wire SPI1_SS_I;
- wire SPI1_SS_O;
- wire SPI1_SS_T;
- wire [1:0]USB0_PORT_INDCTL;
- wire USB0_VBUS_PWRFAULT;
- wire USB0_VBUS_PWRSELECT;
- wire NLW_inst_CAN0_PHY_TX_UNCONNECTED;
- wire NLW_inst_CAN1_PHY_TX_UNCONNECTED;
- wire NLW_inst_DMA0_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA0_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA0_RSTN_UNCONNECTED;
- wire NLW_inst_DMA1_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA1_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA1_RSTN_UNCONNECTED;
- wire NLW_inst_DMA2_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA2_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA2_RSTN_UNCONNECTED;
- wire NLW_inst_DMA3_DAVALID_UNCONNECTED;
- wire NLW_inst_DMA3_DRREADY_UNCONNECTED;
- wire NLW_inst_DMA3_RSTN_UNCONNECTED;
- wire NLW_inst_ENET0_GMII_TX_EN_UNCONNECTED;
- wire NLW_inst_ENET0_GMII_TX_ER_UNCONNECTED;
- wire NLW_inst_ENET0_MDIO_MDC_UNCONNECTED;
- wire NLW_inst_ENET0_MDIO_O_UNCONNECTED;
- wire NLW_inst_ENET0_MDIO_T_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_DELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_DELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_RESP_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_PDELAY_RESP_TX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_SYNC_FRAME_RX_UNCONNECTED;
- wire NLW_inst_ENET0_PTP_SYNC_FRAME_TX_UNCONNECTED;
- wire NLW_inst_ENET0_SOF_RX_UNCONNECTED;
- wire NLW_inst_ENET0_SOF_TX_UNCONNECTED;
- wire NLW_inst_ENET1_GMII_TX_EN_UNCONNECTED;
- wire NLW_inst_ENET1_GMII_TX_ER_UNCONNECTED;
- wire NLW_inst_ENET1_MDIO_MDC_UNCONNECTED;
- wire NLW_inst_ENET1_MDIO_O_UNCONNECTED;
- wire NLW_inst_ENET1_MDIO_T_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_DELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_DELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_REQ_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_REQ_TX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_RESP_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_PDELAY_RESP_TX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_SYNC_FRAME_RX_UNCONNECTED;
- wire NLW_inst_ENET1_PTP_SYNC_FRAME_TX_UNCONNECTED;
- wire NLW_inst_ENET1_SOF_RX_UNCONNECTED;
- wire NLW_inst_ENET1_SOF_TX_UNCONNECTED;
- wire NLW_inst_EVENT_EVENTO_UNCONNECTED;
- wire NLW_inst_FCLK_CLK1_UNCONNECTED;
- wire NLW_inst_FCLK_CLK2_UNCONNECTED;
- wire NLW_inst_FCLK_CLK3_UNCONNECTED;
- wire NLW_inst_FCLK_RESET1_N_UNCONNECTED;
- wire NLW_inst_FCLK_RESET2_N_UNCONNECTED;
- wire NLW_inst_FCLK_RESET3_N_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_0_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_1_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_2_UNCONNECTED;
- wire NLW_inst_FTMT_F2P_TRIGACK_3_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_0_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_1_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_2_UNCONNECTED;
- wire NLW_inst_FTMT_P2F_TRIG_3_UNCONNECTED;
- wire NLW_inst_I2C0_SCL_O_UNCONNECTED;
- wire NLW_inst_I2C0_SCL_T_UNCONNECTED;
- wire NLW_inst_I2C0_SDA_O_UNCONNECTED;
- wire NLW_inst_I2C0_SDA_T_UNCONNECTED;
- wire NLW_inst_I2C1_SCL_O_UNCONNECTED;
- wire NLW_inst_I2C1_SCL_T_UNCONNECTED;
- wire NLW_inst_I2C1_SDA_O_UNCONNECTED;
- wire NLW_inst_I2C1_SDA_T_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_CAN0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_CAN1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_CTI_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC2_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC3_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC4_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC5_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC6_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC7_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_DMAC_ABORT_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET_WAKE0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_ENET_WAKE1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_GPIO_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_I2C0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_I2C1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_QSPI_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SDIO0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SDIO1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SMC_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SPI0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_SPI1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_UART0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_UART1_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_USB0_UNCONNECTED;
- wire NLW_inst_IRQ_P2F_USB1_UNCONNECTED;
- wire NLW_inst_M_AXI_GP0_ARESETN_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_ARESETN_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_ARVALID_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_AWVALID_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_BREADY_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_RREADY_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_WLAST_UNCONNECTED;
- wire NLW_inst_M_AXI_GP1_WVALID_UNCONNECTED;
- wire NLW_inst_PJTAG_TDO_UNCONNECTED;
- wire NLW_inst_SDIO0_BUSPOW_UNCONNECTED;
- wire NLW_inst_SDIO0_CLK_UNCONNECTED;
- wire NLW_inst_SDIO0_CMD_O_UNCONNECTED;
- wire NLW_inst_SDIO0_CMD_T_UNCONNECTED;
- wire NLW_inst_SDIO0_LED_UNCONNECTED;
- wire NLW_inst_SDIO1_BUSPOW_UNCONNECTED;
- wire NLW_inst_SDIO1_CLK_UNCONNECTED;
- wire NLW_inst_SDIO1_CMD_O_UNCONNECTED;
- wire NLW_inst_SDIO1_CMD_T_UNCONNECTED;
- wire NLW_inst_SDIO1_LED_UNCONNECTED;
- wire NLW_inst_SPI0_MISO_O_UNCONNECTED;
- wire NLW_inst_SPI0_MISO_T_UNCONNECTED;
- wire NLW_inst_SPI0_MOSI_O_UNCONNECTED;
- wire NLW_inst_SPI0_MOSI_T_UNCONNECTED;
- wire NLW_inst_SPI0_SCLK_O_UNCONNECTED;
- wire NLW_inst_SPI0_SCLK_T_UNCONNECTED;
- wire NLW_inst_SPI0_SS1_O_UNCONNECTED;
- wire NLW_inst_SPI0_SS2_O_UNCONNECTED;
- wire NLW_inst_SPI0_SS_O_UNCONNECTED;
- wire NLW_inst_SPI0_SS_T_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_ACP_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP0_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_GP1_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP0_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP1_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP2_WREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_ARESETN_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_ARREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_AWREADY_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_BVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_RLAST_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_RVALID_UNCONNECTED;
- wire NLW_inst_S_AXI_HP3_WREADY_UNCONNECTED;
- wire NLW_inst_TRACE_CLK_OUT_UNCONNECTED;
- wire NLW_inst_TRACE_CTL_UNCONNECTED;
- wire NLW_inst_TTC0_WAVE0_OUT_UNCONNECTED;
- wire NLW_inst_TTC0_WAVE1_OUT_UNCONNECTED;
- wire NLW_inst_TTC0_WAVE2_OUT_UNCONNECTED;
- wire NLW_inst_TTC1_WAVE0_OUT_UNCONNECTED;
- wire NLW_inst_TTC1_WAVE1_OUT_UNCONNECTED;
- wire NLW_inst_TTC1_WAVE2_OUT_UNCONNECTED;
- wire NLW_inst_UART0_DTRN_UNCONNECTED;
- wire NLW_inst_UART0_RTSN_UNCONNECTED;
- wire NLW_inst_UART0_TX_UNCONNECTED;
- wire NLW_inst_UART1_DTRN_UNCONNECTED;
- wire NLW_inst_UART1_RTSN_UNCONNECTED;
- wire NLW_inst_UART1_TX_UNCONNECTED;
- wire NLW_inst_USB1_VBUS_PWRSELECT_UNCONNECTED;
- wire NLW_inst_WDT_RST_OUT_UNCONNECTED;
- wire [1:0]NLW_inst_DMA0_DATYPE_UNCONNECTED;
- wire [1:0]NLW_inst_DMA1_DATYPE_UNCONNECTED;
- wire [1:0]NLW_inst_DMA2_DATYPE_UNCONNECTED;
- wire [1:0]NLW_inst_DMA3_DATYPE_UNCONNECTED;
- wire [7:0]NLW_inst_ENET0_GMII_TXD_UNCONNECTED;
- wire [7:0]NLW_inst_ENET1_GMII_TXD_UNCONNECTED;
- wire [1:0]NLW_inst_EVENT_STANDBYWFE_UNCONNECTED;
- wire [1:0]NLW_inst_EVENT_STANDBYWFI_UNCONNECTED;
- wire [31:0]NLW_inst_FTMT_P2F_DEBUG_UNCONNECTED;
- wire [63:0]NLW_inst_GPIO_O_UNCONNECTED;
- wire [63:0]NLW_inst_GPIO_T_UNCONNECTED;
- wire [31:0]NLW_inst_M_AXI_GP1_ARADDR_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_ARBURST_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_ARCACHE_UNCONNECTED;
- wire [11:0]NLW_inst_M_AXI_GP1_ARID_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_ARLEN_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_ARLOCK_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_ARPROT_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_ARQOS_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_ARSIZE_UNCONNECTED;
- wire [31:0]NLW_inst_M_AXI_GP1_AWADDR_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_AWBURST_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_AWCACHE_UNCONNECTED;
- wire [11:0]NLW_inst_M_AXI_GP1_AWID_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_AWLEN_UNCONNECTED;
- wire [1:0]NLW_inst_M_AXI_GP1_AWLOCK_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_AWPROT_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_AWQOS_UNCONNECTED;
- wire [2:0]NLW_inst_M_AXI_GP1_AWSIZE_UNCONNECTED;
- wire [31:0]NLW_inst_M_AXI_GP1_WDATA_UNCONNECTED;
- wire [11:0]NLW_inst_M_AXI_GP1_WID_UNCONNECTED;
- wire [3:0]NLW_inst_M_AXI_GP1_WSTRB_UNCONNECTED;
- wire [2:0]NLW_inst_SDIO0_BUSVOLT_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO0_DATA_O_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO0_DATA_T_UNCONNECTED;
- wire [2:0]NLW_inst_SDIO1_BUSVOLT_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO1_DATA_O_UNCONNECTED;
- wire [3:0]NLW_inst_SDIO1_DATA_T_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_ACP_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_ACP_BRESP_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_ACP_RDATA_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_ACP_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_ACP_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP0_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP0_BRESP_UNCONNECTED;
- wire [31:0]NLW_inst_S_AXI_GP0_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP0_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP0_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP1_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP1_BRESP_UNCONNECTED;
- wire [31:0]NLW_inst_S_AXI_GP1_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_GP1_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_GP1_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP0_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP0_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP0_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP0_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP0_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP0_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP0_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP0_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP0_WCOUNT_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP1_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP1_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP1_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP1_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP1_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP1_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP1_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP1_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP1_WCOUNT_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP2_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP2_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP2_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP2_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP2_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP2_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP2_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP2_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP2_WCOUNT_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP3_BID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP3_BRESP_UNCONNECTED;
- wire [2:0]NLW_inst_S_AXI_HP3_RACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP3_RCOUNT_UNCONNECTED;
- wire [63:0]NLW_inst_S_AXI_HP3_RDATA_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP3_RID_UNCONNECTED;
- wire [1:0]NLW_inst_S_AXI_HP3_RRESP_UNCONNECTED;
- wire [5:0]NLW_inst_S_AXI_HP3_WACOUNT_UNCONNECTED;
- wire [7:0]NLW_inst_S_AXI_HP3_WCOUNT_UNCONNECTED;
- wire [1:0]NLW_inst_TRACE_DATA_UNCONNECTED;
- wire [1:0]NLW_inst_USB1_PORT_INDCTL_UNCONNECTED;
-
- (* C_DM_WIDTH = "4" *)
- (* C_DQS_WIDTH = "4" *)
- (* C_DQ_WIDTH = "32" *)
- (* C_EMIO_GPIO_WIDTH = "64" *)
- (* C_EN_EMIO_ENET0 = "0" *)
- (* C_EN_EMIO_ENET1 = "0" *)
- (* C_EN_EMIO_PJTAG = "0" *)
- (* C_EN_EMIO_TRACE = "0" *)
- (* C_FCLK_CLK0_BUF = "TRUE" *)
- (* C_FCLK_CLK1_BUF = "FALSE" *)
- (* C_FCLK_CLK2_BUF = "FALSE" *)
- (* C_FCLK_CLK3_BUF = "FALSE" *)
- (* C_GP0_EN_MODIFIABLE_TXN = "1" *)
- (* C_GP1_EN_MODIFIABLE_TXN = "1" *)
- (* C_INCLUDE_ACP_TRANS_CHECK = "0" *)
- (* C_INCLUDE_TRACE_BUFFER = "0" *)
- (* C_IRQ_F2P_MODE = "DIRECT" *)
- (* C_MIO_PRIMITIVE = "54" *)
- (* C_M_AXI_GP0_ENABLE_STATIC_REMAP = "0" *)
- (* C_M_AXI_GP0_ID_WIDTH = "12" *)
- (* C_M_AXI_GP0_THREAD_ID_WIDTH = "12" *)
- (* C_M_AXI_GP1_ENABLE_STATIC_REMAP = "0" *)
- (* C_M_AXI_GP1_ID_WIDTH = "12" *)
- (* C_M_AXI_GP1_THREAD_ID_WIDTH = "12" *)
- (* C_NUM_F2P_INTR_INPUTS = "1" *)
- (* C_PACKAGE_NAME = "clg485" *)
- (* C_PS7_SI_REV = "PRODUCTION" *)
- (* C_S_AXI_ACP_ARUSER_VAL = "31" *)
- (* C_S_AXI_ACP_AWUSER_VAL = "31" *)
- (* C_S_AXI_ACP_ID_WIDTH = "3" *)
- (* C_S_AXI_GP0_ID_WIDTH = "6" *)
- (* C_S_AXI_GP1_ID_WIDTH = "6" *)
- (* C_S_AXI_HP0_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP0_ID_WIDTH = "6" *)
- (* C_S_AXI_HP1_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP1_ID_WIDTH = "6" *)
- (* C_S_AXI_HP2_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP2_ID_WIDTH = "6" *)
- (* C_S_AXI_HP3_DATA_WIDTH = "64" *)
- (* C_S_AXI_HP3_ID_WIDTH = "6" *)
- (* C_TRACE_BUFFER_CLOCK_DELAY = "12" *)
- (* C_TRACE_BUFFER_FIFO_SIZE = "128" *)
- (* C_TRACE_INTERNAL_WIDTH = "2" *)
- (* C_TRACE_PIPELINE_WIDTH = "8" *)
- (* C_USE_AXI_NONSECURE = "0" *)
- (* C_USE_DEFAULT_ACP_USER_VAL = "0" *)
- (* C_USE_M_AXI_GP0 = "1" *)
- (* C_USE_M_AXI_GP1 = "0" *)
- (* C_USE_S_AXI_ACP = "0" *)
- (* C_USE_S_AXI_GP0 = "0" *)
- (* C_USE_S_AXI_GP1 = "0" *)
- (* C_USE_S_AXI_HP0 = "0" *)
- (* C_USE_S_AXI_HP1 = "0" *)
- (* C_USE_S_AXI_HP2 = "0" *)
- (* C_USE_S_AXI_HP3 = "0" *)
- (* HW_HANDOFF = "scalp_zynqps_processing_system7_0_0.hwdef" *)
- (* POWER = "<PROCESSOR name={system} numA9Cores={2} clockFreq={750} load={0.5} /><MEMORY name={code} memType={DDR3(LowVoltage)} dataWidth={16} clockFreq={500} readRate={0.5} writeRate={0.5} /><IO interface={GPIO_Bank_1} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={1} usageRate={0.5} /><IO interface={GPIO_Bank_0} ioStandard={LVCMOS33} bidis={3} ioBank={Vcco_p0} clockFreq={1} usageRate={0.5} /><IO interface={CAN} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SPI} ioStandard={} bidis={2} ioBank={} clockFreq={159.090912} usageRate={0.5} /><IO interface={SPI} ioStandard={LVCMOS25} bidis={5} ioBank={Vcco_p1} clockFreq={159.090912} usageRate={0.5} /><IO interface={I2C} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={UART} ioStandard={LVCMOS25} bidis={2} ioBank={Vcco_p1} clockFreq={97.222221} usageRate={0.5} /><IO interface={SD} ioStandard={LVCMOS33} bidis={7} ioBank={Vcco_p0} clockFreq={97.222221} usageRate={0.5} /><IO interface={USB} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={60} usageRate={0.5} /><IO interface={GigE} ioStandard={LVCMOS25} bidis={12} ioBank={Vcco_p1} clockFreq={125.000000} usageRate={0.5} /><IO interface={QSPI} ioStandard={LVCMOS33} bidis={6} ioBank={Vcco_p0} clockFreq={133} usageRate={0.5} /><PLL domain={Processor} vco={1500.000} /><PLL domain={Memory} vco={1000.000} /><PLL domain={IO} vco={1750.000} /><AXI interface={M_AXI_GP0} dataWidth={32} clockFreq={125} usageRate={0.5} />/>" *)
- (* USE_TRACE_DATA_EDGE_DETECTOR = "0" *)
- decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_processing_system7_v5_5_processing_system7 inst
- (.CAN0_PHY_RX(1'b0),
- .CAN0_PHY_TX(NLW_inst_CAN0_PHY_TX_UNCONNECTED),
- .CAN1_PHY_RX(1'b0),
- .CAN1_PHY_TX(NLW_inst_CAN1_PHY_TX_UNCONNECTED),
- .Core0_nFIQ(1'b0),
- .Core0_nIRQ(1'b0),
- .Core1_nFIQ(1'b0),
- .Core1_nIRQ(1'b0),
- .DDR_ARB({1'b0,1'b0,1'b0,1'b0}),
- .DDR_Addr(DDR_Addr),
- .DDR_BankAddr(DDR_BankAddr),
- .DDR_CAS_n(DDR_CAS_n),
- .DDR_CKE(DDR_CKE),
- .DDR_CS_n(DDR_CS_n),
- .DDR_Clk(DDR_Clk),
- .DDR_Clk_n(DDR_Clk_n),
- .DDR_DM(DDR_DM),
- .DDR_DQ(DDR_DQ),
- .DDR_DQS(DDR_DQS),
- .DDR_DQS_n(DDR_DQS_n),
- .DDR_DRSTB(DDR_DRSTB),
- .DDR_ODT(DDR_ODT),
- .DDR_RAS_n(DDR_RAS_n),
- .DDR_VRN(DDR_VRN),
- .DDR_VRP(DDR_VRP),
- .DDR_WEB(DDR_WEB),
- .DMA0_ACLK(1'b0),
- .DMA0_DAREADY(1'b0),
- .DMA0_DATYPE(NLW_inst_DMA0_DATYPE_UNCONNECTED[1:0]),
- .DMA0_DAVALID(NLW_inst_DMA0_DAVALID_UNCONNECTED),
- .DMA0_DRLAST(1'b0),
- .DMA0_DRREADY(NLW_inst_DMA0_DRREADY_UNCONNECTED),
- .DMA0_DRTYPE({1'b0,1'b0}),
- .DMA0_DRVALID(1'b0),
- .DMA0_RSTN(NLW_inst_DMA0_RSTN_UNCONNECTED),
- .DMA1_ACLK(1'b0),
- .DMA1_DAREADY(1'b0),
- .DMA1_DATYPE(NLW_inst_DMA1_DATYPE_UNCONNECTED[1:0]),
- .DMA1_DAVALID(NLW_inst_DMA1_DAVALID_UNCONNECTED),
- .DMA1_DRLAST(1'b0),
- .DMA1_DRREADY(NLW_inst_DMA1_DRREADY_UNCONNECTED),
- .DMA1_DRTYPE({1'b0,1'b0}),
- .DMA1_DRVALID(1'b0),
- .DMA1_RSTN(NLW_inst_DMA1_RSTN_UNCONNECTED),
- .DMA2_ACLK(1'b0),
- .DMA2_DAREADY(1'b0),
- .DMA2_DATYPE(NLW_inst_DMA2_DATYPE_UNCONNECTED[1:0]),
- .DMA2_DAVALID(NLW_inst_DMA2_DAVALID_UNCONNECTED),
- .DMA2_DRLAST(1'b0),
- .DMA2_DRREADY(NLW_inst_DMA2_DRREADY_UNCONNECTED),
- .DMA2_DRTYPE({1'b0,1'b0}),
- .DMA2_DRVALID(1'b0),
- .DMA2_RSTN(NLW_inst_DMA2_RSTN_UNCONNECTED),
- .DMA3_ACLK(1'b0),
- .DMA3_DAREADY(1'b0),
- .DMA3_DATYPE(NLW_inst_DMA3_DATYPE_UNCONNECTED[1:0]),
- .DMA3_DAVALID(NLW_inst_DMA3_DAVALID_UNCONNECTED),
- .DMA3_DRLAST(1'b0),
- .DMA3_DRREADY(NLW_inst_DMA3_DRREADY_UNCONNECTED),
- .DMA3_DRTYPE({1'b0,1'b0}),
- .DMA3_DRVALID(1'b0),
- .DMA3_RSTN(NLW_inst_DMA3_RSTN_UNCONNECTED),
- .ENET0_EXT_INTIN(1'b0),
- .ENET0_GMII_COL(1'b0),
- .ENET0_GMII_CRS(1'b0),
- .ENET0_GMII_RXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .ENET0_GMII_RX_CLK(1'b0),
- .ENET0_GMII_RX_DV(1'b0),
- .ENET0_GMII_RX_ER(1'b0),
- .ENET0_GMII_TXD(NLW_inst_ENET0_GMII_TXD_UNCONNECTED[7:0]),
- .ENET0_GMII_TX_CLK(1'b0),
- .ENET0_GMII_TX_EN(NLW_inst_ENET0_GMII_TX_EN_UNCONNECTED),
- .ENET0_GMII_TX_ER(NLW_inst_ENET0_GMII_TX_ER_UNCONNECTED),
- .ENET0_MDIO_I(1'b0),
- .ENET0_MDIO_MDC(NLW_inst_ENET0_MDIO_MDC_UNCONNECTED),
- .ENET0_MDIO_O(NLW_inst_ENET0_MDIO_O_UNCONNECTED),
- .ENET0_MDIO_T(NLW_inst_ENET0_MDIO_T_UNCONNECTED),
- .ENET0_PTP_DELAY_REQ_RX(NLW_inst_ENET0_PTP_DELAY_REQ_RX_UNCONNECTED),
- .ENET0_PTP_DELAY_REQ_TX(NLW_inst_ENET0_PTP_DELAY_REQ_TX_UNCONNECTED),
- .ENET0_PTP_PDELAY_REQ_RX(NLW_inst_ENET0_PTP_PDELAY_REQ_RX_UNCONNECTED),
- .ENET0_PTP_PDELAY_REQ_TX(NLW_inst_ENET0_PTP_PDELAY_REQ_TX_UNCONNECTED),
- .ENET0_PTP_PDELAY_RESP_RX(NLW_inst_ENET0_PTP_PDELAY_RESP_RX_UNCONNECTED),
- .ENET0_PTP_PDELAY_RESP_TX(NLW_inst_ENET0_PTP_PDELAY_RESP_TX_UNCONNECTED),
- .ENET0_PTP_SYNC_FRAME_RX(NLW_inst_ENET0_PTP_SYNC_FRAME_RX_UNCONNECTED),
- .ENET0_PTP_SYNC_FRAME_TX(NLW_inst_ENET0_PTP_SYNC_FRAME_TX_UNCONNECTED),
- .ENET0_SOF_RX(NLW_inst_ENET0_SOF_RX_UNCONNECTED),
- .ENET0_SOF_TX(NLW_inst_ENET0_SOF_TX_UNCONNECTED),
- .ENET1_EXT_INTIN(1'b0),
- .ENET1_GMII_COL(1'b0),
- .ENET1_GMII_CRS(1'b0),
- .ENET1_GMII_RXD({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .ENET1_GMII_RX_CLK(1'b0),
- .ENET1_GMII_RX_DV(1'b0),
- .ENET1_GMII_RX_ER(1'b0),
- .ENET1_GMII_TXD(NLW_inst_ENET1_GMII_TXD_UNCONNECTED[7:0]),
- .ENET1_GMII_TX_CLK(1'b0),
- .ENET1_GMII_TX_EN(NLW_inst_ENET1_GMII_TX_EN_UNCONNECTED),
- .ENET1_GMII_TX_ER(NLW_inst_ENET1_GMII_TX_ER_UNCONNECTED),
- .ENET1_MDIO_I(1'b0),
- .ENET1_MDIO_MDC(NLW_inst_ENET1_MDIO_MDC_UNCONNECTED),
- .ENET1_MDIO_O(NLW_inst_ENET1_MDIO_O_UNCONNECTED),
- .ENET1_MDIO_T(NLW_inst_ENET1_MDIO_T_UNCONNECTED),
- .ENET1_PTP_DELAY_REQ_RX(NLW_inst_ENET1_PTP_DELAY_REQ_RX_UNCONNECTED),
- .ENET1_PTP_DELAY_REQ_TX(NLW_inst_ENET1_PTP_DELAY_REQ_TX_UNCONNECTED),
- .ENET1_PTP_PDELAY_REQ_RX(NLW_inst_ENET1_PTP_PDELAY_REQ_RX_UNCONNECTED),
- .ENET1_PTP_PDELAY_REQ_TX(NLW_inst_ENET1_PTP_PDELAY_REQ_TX_UNCONNECTED),
- .ENET1_PTP_PDELAY_RESP_RX(NLW_inst_ENET1_PTP_PDELAY_RESP_RX_UNCONNECTED),
- .ENET1_PTP_PDELAY_RESP_TX(NLW_inst_ENET1_PTP_PDELAY_RESP_TX_UNCONNECTED),
- .ENET1_PTP_SYNC_FRAME_RX(NLW_inst_ENET1_PTP_SYNC_FRAME_RX_UNCONNECTED),
- .ENET1_PTP_SYNC_FRAME_TX(NLW_inst_ENET1_PTP_SYNC_FRAME_TX_UNCONNECTED),
- .ENET1_SOF_RX(NLW_inst_ENET1_SOF_RX_UNCONNECTED),
- .ENET1_SOF_TX(NLW_inst_ENET1_SOF_TX_UNCONNECTED),
- .EVENT_EVENTI(1'b0),
- .EVENT_EVENTO(NLW_inst_EVENT_EVENTO_UNCONNECTED),
- .EVENT_STANDBYWFE(NLW_inst_EVENT_STANDBYWFE_UNCONNECTED[1:0]),
- .EVENT_STANDBYWFI(NLW_inst_EVENT_STANDBYWFI_UNCONNECTED[1:0]),
- .FCLK_CLK0(FCLK_CLK0),
- .FCLK_CLK1(NLW_inst_FCLK_CLK1_UNCONNECTED),
- .FCLK_CLK2(NLW_inst_FCLK_CLK2_UNCONNECTED),
- .FCLK_CLK3(NLW_inst_FCLK_CLK3_UNCONNECTED),
- .FCLK_CLKTRIG0_N(1'b0),
- .FCLK_CLKTRIG1_N(1'b0),
- .FCLK_CLKTRIG2_N(1'b0),
- .FCLK_CLKTRIG3_N(1'b0),
- .FCLK_RESET0_N(FCLK_RESET0_N),
- .FCLK_RESET1_N(NLW_inst_FCLK_RESET1_N_UNCONNECTED),
- .FCLK_RESET2_N(NLW_inst_FCLK_RESET2_N_UNCONNECTED),
- .FCLK_RESET3_N(NLW_inst_FCLK_RESET3_N_UNCONNECTED),
- .FPGA_IDLE_N(1'b0),
- .FTMD_TRACEIN_ATID({1'b0,1'b0,1'b0,1'b0}),
- .FTMD_TRACEIN_CLK(1'b0),
- .FTMD_TRACEIN_DATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .FTMD_TRACEIN_VALID(1'b0),
- .FTMT_F2P_DEBUG({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .FTMT_F2P_TRIGACK_0(NLW_inst_FTMT_F2P_TRIGACK_0_UNCONNECTED),
- .FTMT_F2P_TRIGACK_1(NLW_inst_FTMT_F2P_TRIGACK_1_UNCONNECTED),
- .FTMT_F2P_TRIGACK_2(NLW_inst_FTMT_F2P_TRIGACK_2_UNCONNECTED),
- .FTMT_F2P_TRIGACK_3(NLW_inst_FTMT_F2P_TRIGACK_3_UNCONNECTED),
- .FTMT_F2P_TRIG_0(1'b0),
- .FTMT_F2P_TRIG_1(1'b0),
- .FTMT_F2P_TRIG_2(1'b0),
- .FTMT_F2P_TRIG_3(1'b0),
- .FTMT_P2F_DEBUG(NLW_inst_FTMT_P2F_DEBUG_UNCONNECTED[31:0]),
- .FTMT_P2F_TRIGACK_0(1'b0),
- .FTMT_P2F_TRIGACK_1(1'b0),
- .FTMT_P2F_TRIGACK_2(1'b0),
- .FTMT_P2F_TRIGACK_3(1'b0),
- .FTMT_P2F_TRIG_0(NLW_inst_FTMT_P2F_TRIG_0_UNCONNECTED),
- .FTMT_P2F_TRIG_1(NLW_inst_FTMT_P2F_TRIG_1_UNCONNECTED),
- .FTMT_P2F_TRIG_2(NLW_inst_FTMT_P2F_TRIG_2_UNCONNECTED),
- .FTMT_P2F_TRIG_3(NLW_inst_FTMT_P2F_TRIG_3_UNCONNECTED),
- .GPIO_I({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .GPIO_O(NLW_inst_GPIO_O_UNCONNECTED[63:0]),
- .GPIO_T(NLW_inst_GPIO_T_UNCONNECTED[63:0]),
- .I2C0_SCL_I(1'b0),
- .I2C0_SCL_O(NLW_inst_I2C0_SCL_O_UNCONNECTED),
- .I2C0_SCL_T(NLW_inst_I2C0_SCL_T_UNCONNECTED),
- .I2C0_SDA_I(1'b0),
- .I2C0_SDA_O(NLW_inst_I2C0_SDA_O_UNCONNECTED),
- .I2C0_SDA_T(NLW_inst_I2C0_SDA_T_UNCONNECTED),
- .I2C1_SCL_I(1'b0),
- .I2C1_SCL_O(NLW_inst_I2C1_SCL_O_UNCONNECTED),
- .I2C1_SCL_T(NLW_inst_I2C1_SCL_T_UNCONNECTED),
- .I2C1_SDA_I(1'b0),
- .I2C1_SDA_O(NLW_inst_I2C1_SDA_O_UNCONNECTED),
- .I2C1_SDA_T(NLW_inst_I2C1_SDA_T_UNCONNECTED),
- .IRQ_F2P(1'b0),
- .IRQ_P2F_CAN0(NLW_inst_IRQ_P2F_CAN0_UNCONNECTED),
- .IRQ_P2F_CAN1(NLW_inst_IRQ_P2F_CAN1_UNCONNECTED),
- .IRQ_P2F_CTI(NLW_inst_IRQ_P2F_CTI_UNCONNECTED),
- .IRQ_P2F_DMAC0(NLW_inst_IRQ_P2F_DMAC0_UNCONNECTED),
- .IRQ_P2F_DMAC1(NLW_inst_IRQ_P2F_DMAC1_UNCONNECTED),
- .IRQ_P2F_DMAC2(NLW_inst_IRQ_P2F_DMAC2_UNCONNECTED),
- .IRQ_P2F_DMAC3(NLW_inst_IRQ_P2F_DMAC3_UNCONNECTED),
- .IRQ_P2F_DMAC4(NLW_inst_IRQ_P2F_DMAC4_UNCONNECTED),
- .IRQ_P2F_DMAC5(NLW_inst_IRQ_P2F_DMAC5_UNCONNECTED),
- .IRQ_P2F_DMAC6(NLW_inst_IRQ_P2F_DMAC6_UNCONNECTED),
- .IRQ_P2F_DMAC7(NLW_inst_IRQ_P2F_DMAC7_UNCONNECTED),
- .IRQ_P2F_DMAC_ABORT(NLW_inst_IRQ_P2F_DMAC_ABORT_UNCONNECTED),
- .IRQ_P2F_ENET0(NLW_inst_IRQ_P2F_ENET0_UNCONNECTED),
- .IRQ_P2F_ENET1(NLW_inst_IRQ_P2F_ENET1_UNCONNECTED),
- .IRQ_P2F_ENET_WAKE0(NLW_inst_IRQ_P2F_ENET_WAKE0_UNCONNECTED),
- .IRQ_P2F_ENET_WAKE1(NLW_inst_IRQ_P2F_ENET_WAKE1_UNCONNECTED),
- .IRQ_P2F_GPIO(NLW_inst_IRQ_P2F_GPIO_UNCONNECTED),
- .IRQ_P2F_I2C0(NLW_inst_IRQ_P2F_I2C0_UNCONNECTED),
- .IRQ_P2F_I2C1(NLW_inst_IRQ_P2F_I2C1_UNCONNECTED),
- .IRQ_P2F_QSPI(NLW_inst_IRQ_P2F_QSPI_UNCONNECTED),
- .IRQ_P2F_SDIO0(NLW_inst_IRQ_P2F_SDIO0_UNCONNECTED),
- .IRQ_P2F_SDIO1(NLW_inst_IRQ_P2F_SDIO1_UNCONNECTED),
- .IRQ_P2F_SMC(NLW_inst_IRQ_P2F_SMC_UNCONNECTED),
- .IRQ_P2F_SPI0(NLW_inst_IRQ_P2F_SPI0_UNCONNECTED),
- .IRQ_P2F_SPI1(NLW_inst_IRQ_P2F_SPI1_UNCONNECTED),
- .IRQ_P2F_UART0(NLW_inst_IRQ_P2F_UART0_UNCONNECTED),
- .IRQ_P2F_UART1(NLW_inst_IRQ_P2F_UART1_UNCONNECTED),
- .IRQ_P2F_USB0(NLW_inst_IRQ_P2F_USB0_UNCONNECTED),
- .IRQ_P2F_USB1(NLW_inst_IRQ_P2F_USB1_UNCONNECTED),
- .MIO(MIO),
- .M_AXI_GP0_ACLK(M_AXI_GP0_ACLK),
- .M_AXI_GP0_ARADDR(M_AXI_GP0_ARADDR),
- .M_AXI_GP0_ARBURST(M_AXI_GP0_ARBURST),
- .M_AXI_GP0_ARCACHE(M_AXI_GP0_ARCACHE),
- .M_AXI_GP0_ARESETN(NLW_inst_M_AXI_GP0_ARESETN_UNCONNECTED),
- .M_AXI_GP0_ARID(M_AXI_GP0_ARID),
- .M_AXI_GP0_ARLEN(M_AXI_GP0_ARLEN),
- .M_AXI_GP0_ARLOCK(M_AXI_GP0_ARLOCK),
- .M_AXI_GP0_ARPROT(M_AXI_GP0_ARPROT),
- .M_AXI_GP0_ARQOS(M_AXI_GP0_ARQOS),
- .M_AXI_GP0_ARREADY(M_AXI_GP0_ARREADY),
- .M_AXI_GP0_ARSIZE(M_AXI_GP0_ARSIZE),
- .M_AXI_GP0_ARVALID(M_AXI_GP0_ARVALID),
- .M_AXI_GP0_AWADDR(M_AXI_GP0_AWADDR),
- .M_AXI_GP0_AWBURST(M_AXI_GP0_AWBURST),
- .M_AXI_GP0_AWCACHE(M_AXI_GP0_AWCACHE),
- .M_AXI_GP0_AWID(M_AXI_GP0_AWID),
- .M_AXI_GP0_AWLEN(M_AXI_GP0_AWLEN),
- .M_AXI_GP0_AWLOCK(M_AXI_GP0_AWLOCK),
- .M_AXI_GP0_AWPROT(M_AXI_GP0_AWPROT),
- .M_AXI_GP0_AWQOS(M_AXI_GP0_AWQOS),
- .M_AXI_GP0_AWREADY(M_AXI_GP0_AWREADY),
- .M_AXI_GP0_AWSIZE(M_AXI_GP0_AWSIZE),
- .M_AXI_GP0_AWVALID(M_AXI_GP0_AWVALID),
- .M_AXI_GP0_BID(M_AXI_GP0_BID),
- .M_AXI_GP0_BREADY(M_AXI_GP0_BREADY),
- .M_AXI_GP0_BRESP(M_AXI_GP0_BRESP),
- .M_AXI_GP0_BVALID(M_AXI_GP0_BVALID),
- .M_AXI_GP0_RDATA(M_AXI_GP0_RDATA),
- .M_AXI_GP0_RID(M_AXI_GP0_RID),
- .M_AXI_GP0_RLAST(M_AXI_GP0_RLAST),
- .M_AXI_GP0_RREADY(M_AXI_GP0_RREADY),
- .M_AXI_GP0_RRESP(M_AXI_GP0_RRESP),
- .M_AXI_GP0_RVALID(M_AXI_GP0_RVALID),
- .M_AXI_GP0_WDATA(M_AXI_GP0_WDATA),
- .M_AXI_GP0_WID(M_AXI_GP0_WID),
- .M_AXI_GP0_WLAST(M_AXI_GP0_WLAST),
- .M_AXI_GP0_WREADY(M_AXI_GP0_WREADY),
- .M_AXI_GP0_WSTRB(M_AXI_GP0_WSTRB),
- .M_AXI_GP0_WVALID(M_AXI_GP0_WVALID),
- .M_AXI_GP1_ACLK(1'b0),
- .M_AXI_GP1_ARADDR(NLW_inst_M_AXI_GP1_ARADDR_UNCONNECTED[31:0]),
- .M_AXI_GP1_ARBURST(NLW_inst_M_AXI_GP1_ARBURST_UNCONNECTED[1:0]),
- .M_AXI_GP1_ARCACHE(NLW_inst_M_AXI_GP1_ARCACHE_UNCONNECTED[3:0]),
- .M_AXI_GP1_ARESETN(NLW_inst_M_AXI_GP1_ARESETN_UNCONNECTED),
- .M_AXI_GP1_ARID(NLW_inst_M_AXI_GP1_ARID_UNCONNECTED[11:0]),
- .M_AXI_GP1_ARLEN(NLW_inst_M_AXI_GP1_ARLEN_UNCONNECTED[3:0]),
- .M_AXI_GP1_ARLOCK(NLW_inst_M_AXI_GP1_ARLOCK_UNCONNECTED[1:0]),
- .M_AXI_GP1_ARPROT(NLW_inst_M_AXI_GP1_ARPROT_UNCONNECTED[2:0]),
- .M_AXI_GP1_ARQOS(NLW_inst_M_AXI_GP1_ARQOS_UNCONNECTED[3:0]),
- .M_AXI_GP1_ARREADY(1'b0),
- .M_AXI_GP1_ARSIZE(NLW_inst_M_AXI_GP1_ARSIZE_UNCONNECTED[2:0]),
- .M_AXI_GP1_ARVALID(NLW_inst_M_AXI_GP1_ARVALID_UNCONNECTED),
- .M_AXI_GP1_AWADDR(NLW_inst_M_AXI_GP1_AWADDR_UNCONNECTED[31:0]),
- .M_AXI_GP1_AWBURST(NLW_inst_M_AXI_GP1_AWBURST_UNCONNECTED[1:0]),
- .M_AXI_GP1_AWCACHE(NLW_inst_M_AXI_GP1_AWCACHE_UNCONNECTED[3:0]),
- .M_AXI_GP1_AWID(NLW_inst_M_AXI_GP1_AWID_UNCONNECTED[11:0]),
- .M_AXI_GP1_AWLEN(NLW_inst_M_AXI_GP1_AWLEN_UNCONNECTED[3:0]),
- .M_AXI_GP1_AWLOCK(NLW_inst_M_AXI_GP1_AWLOCK_UNCONNECTED[1:0]),
- .M_AXI_GP1_AWPROT(NLW_inst_M_AXI_GP1_AWPROT_UNCONNECTED[2:0]),
- .M_AXI_GP1_AWQOS(NLW_inst_M_AXI_GP1_AWQOS_UNCONNECTED[3:0]),
- .M_AXI_GP1_AWREADY(1'b0),
- .M_AXI_GP1_AWSIZE(NLW_inst_M_AXI_GP1_AWSIZE_UNCONNECTED[2:0]),
- .M_AXI_GP1_AWVALID(NLW_inst_M_AXI_GP1_AWVALID_UNCONNECTED),
- .M_AXI_GP1_BID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .M_AXI_GP1_BREADY(NLW_inst_M_AXI_GP1_BREADY_UNCONNECTED),
- .M_AXI_GP1_BRESP({1'b0,1'b0}),
- .M_AXI_GP1_BVALID(1'b0),
- .M_AXI_GP1_RDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .M_AXI_GP1_RID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .M_AXI_GP1_RLAST(1'b0),
- .M_AXI_GP1_RREADY(NLW_inst_M_AXI_GP1_RREADY_UNCONNECTED),
- .M_AXI_GP1_RRESP({1'b0,1'b0}),
- .M_AXI_GP1_RVALID(1'b0),
- .M_AXI_GP1_WDATA(NLW_inst_M_AXI_GP1_WDATA_UNCONNECTED[31:0]),
- .M_AXI_GP1_WID(NLW_inst_M_AXI_GP1_WID_UNCONNECTED[11:0]),
- .M_AXI_GP1_WLAST(NLW_inst_M_AXI_GP1_WLAST_UNCONNECTED),
- .M_AXI_GP1_WREADY(1'b0),
- .M_AXI_GP1_WSTRB(NLW_inst_M_AXI_GP1_WSTRB_UNCONNECTED[3:0]),
- .M_AXI_GP1_WVALID(NLW_inst_M_AXI_GP1_WVALID_UNCONNECTED),
- .PJTAG_TCK(1'b0),
- .PJTAG_TDI(1'b0),
- .PJTAG_TDO(NLW_inst_PJTAG_TDO_UNCONNECTED),
- .PJTAG_TMS(1'b0),
- .PS_CLK(PS_CLK),
- .PS_PORB(PS_PORB),
- .PS_SRSTB(PS_SRSTB),
- .SDIO0_BUSPOW(NLW_inst_SDIO0_BUSPOW_UNCONNECTED),
- .SDIO0_BUSVOLT(NLW_inst_SDIO0_BUSVOLT_UNCONNECTED[2:0]),
- .SDIO0_CDN(1'b0),
- .SDIO0_CLK(NLW_inst_SDIO0_CLK_UNCONNECTED),
- .SDIO0_CLK_FB(1'b0),
- .SDIO0_CMD_I(1'b0),
- .SDIO0_CMD_O(NLW_inst_SDIO0_CMD_O_UNCONNECTED),
- .SDIO0_CMD_T(NLW_inst_SDIO0_CMD_T_UNCONNECTED),
- .SDIO0_DATA_I({1'b0,1'b0,1'b0,1'b0}),
- .SDIO0_DATA_O(NLW_inst_SDIO0_DATA_O_UNCONNECTED[3:0]),
- .SDIO0_DATA_T(NLW_inst_SDIO0_DATA_T_UNCONNECTED[3:0]),
- .SDIO0_LED(NLW_inst_SDIO0_LED_UNCONNECTED),
- .SDIO0_WP(1'b0),
- .SDIO1_BUSPOW(NLW_inst_SDIO1_BUSPOW_UNCONNECTED),
- .SDIO1_BUSVOLT(NLW_inst_SDIO1_BUSVOLT_UNCONNECTED[2:0]),
- .SDIO1_CDN(1'b0),
- .SDIO1_CLK(NLW_inst_SDIO1_CLK_UNCONNECTED),
- .SDIO1_CLK_FB(1'b0),
- .SDIO1_CMD_I(1'b0),
- .SDIO1_CMD_O(NLW_inst_SDIO1_CMD_O_UNCONNECTED),
- .SDIO1_CMD_T(NLW_inst_SDIO1_CMD_T_UNCONNECTED),
- .SDIO1_DATA_I({1'b0,1'b0,1'b0,1'b0}),
- .SDIO1_DATA_O(NLW_inst_SDIO1_DATA_O_UNCONNECTED[3:0]),
- .SDIO1_DATA_T(NLW_inst_SDIO1_DATA_T_UNCONNECTED[3:0]),
- .SDIO1_LED(NLW_inst_SDIO1_LED_UNCONNECTED),
- .SDIO1_WP(1'b0),
- .SPI0_MISO_I(1'b0),
- .SPI0_MISO_O(NLW_inst_SPI0_MISO_O_UNCONNECTED),
- .SPI0_MISO_T(NLW_inst_SPI0_MISO_T_UNCONNECTED),
- .SPI0_MOSI_I(1'b0),
- .SPI0_MOSI_O(NLW_inst_SPI0_MOSI_O_UNCONNECTED),
- .SPI0_MOSI_T(NLW_inst_SPI0_MOSI_T_UNCONNECTED),
- .SPI0_SCLK_I(1'b0),
- .SPI0_SCLK_O(NLW_inst_SPI0_SCLK_O_UNCONNECTED),
- .SPI0_SCLK_T(NLW_inst_SPI0_SCLK_T_UNCONNECTED),
- .SPI0_SS1_O(NLW_inst_SPI0_SS1_O_UNCONNECTED),
- .SPI0_SS2_O(NLW_inst_SPI0_SS2_O_UNCONNECTED),
- .SPI0_SS_I(1'b0),
- .SPI0_SS_O(NLW_inst_SPI0_SS_O_UNCONNECTED),
- .SPI0_SS_T(NLW_inst_SPI0_SS_T_UNCONNECTED),
- .SPI1_MISO_I(SPI1_MISO_I),
- .SPI1_MISO_O(SPI1_MISO_O),
- .SPI1_MISO_T(SPI1_MISO_T),
- .SPI1_MOSI_I(SPI1_MOSI_I),
- .SPI1_MOSI_O(SPI1_MOSI_O),
- .SPI1_MOSI_T(SPI1_MOSI_T),
- .SPI1_SCLK_I(SPI1_SCLK_I),
- .SPI1_SCLK_O(SPI1_SCLK_O),
- .SPI1_SCLK_T(SPI1_SCLK_T),
- .SPI1_SS1_O(SPI1_SS1_O),
- .SPI1_SS2_O(SPI1_SS2_O),
- .SPI1_SS_I(SPI1_SS_I),
- .SPI1_SS_O(SPI1_SS_O),
- .SPI1_SS_T(SPI1_SS_T),
- .SRAM_INTIN(1'b0),
- .S_AXI_ACP_ACLK(1'b0),
- .S_AXI_ACP_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARBURST({1'b0,1'b0}),
- .S_AXI_ACP_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARESETN(NLW_inst_S_AXI_ACP_ARESETN_UNCONNECTED),
- .S_AXI_ACP_ARID({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARLOCK({1'b0,1'b0}),
- .S_AXI_ACP_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARREADY(NLW_inst_S_AXI_ACP_ARREADY_UNCONNECTED),
- .S_AXI_ACP_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARUSER({1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_ARVALID(1'b0),
- .S_AXI_ACP_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWBURST({1'b0,1'b0}),
- .S_AXI_ACP_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWID({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWLOCK({1'b0,1'b0}),
- .S_AXI_ACP_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWREADY(NLW_inst_S_AXI_ACP_AWREADY_UNCONNECTED),
- .S_AXI_ACP_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWUSER({1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_AWVALID(1'b0),
- .S_AXI_ACP_BID(NLW_inst_S_AXI_ACP_BID_UNCONNECTED[2:0]),
- .S_AXI_ACP_BREADY(1'b0),
- .S_AXI_ACP_BRESP(NLW_inst_S_AXI_ACP_BRESP_UNCONNECTED[1:0]),
- .S_AXI_ACP_BVALID(NLW_inst_S_AXI_ACP_BVALID_UNCONNECTED),
- .S_AXI_ACP_RDATA(NLW_inst_S_AXI_ACP_RDATA_UNCONNECTED[63:0]),
- .S_AXI_ACP_RID(NLW_inst_S_AXI_ACP_RID_UNCONNECTED[2:0]),
- .S_AXI_ACP_RLAST(NLW_inst_S_AXI_ACP_RLAST_UNCONNECTED),
- .S_AXI_ACP_RREADY(1'b0),
- .S_AXI_ACP_RRESP(NLW_inst_S_AXI_ACP_RRESP_UNCONNECTED[1:0]),
- .S_AXI_ACP_RVALID(NLW_inst_S_AXI_ACP_RVALID_UNCONNECTED),
- .S_AXI_ACP_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_WID({1'b0,1'b0,1'b0}),
- .S_AXI_ACP_WLAST(1'b0),
- .S_AXI_ACP_WREADY(NLW_inst_S_AXI_ACP_WREADY_UNCONNECTED),
- .S_AXI_ACP_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_ACP_WVALID(1'b0),
- .S_AXI_GP0_ACLK(1'b0),
- .S_AXI_GP0_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARBURST({1'b0,1'b0}),
- .S_AXI_GP0_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARESETN(NLW_inst_S_AXI_GP0_ARESETN_UNCONNECTED),
- .S_AXI_GP0_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARLOCK({1'b0,1'b0}),
- .S_AXI_GP0_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARREADY(NLW_inst_S_AXI_GP0_ARREADY_UNCONNECTED),
- .S_AXI_GP0_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_ARVALID(1'b0),
- .S_AXI_GP0_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWBURST({1'b0,1'b0}),
- .S_AXI_GP0_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWLOCK({1'b0,1'b0}),
- .S_AXI_GP0_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWREADY(NLW_inst_S_AXI_GP0_AWREADY_UNCONNECTED),
- .S_AXI_GP0_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP0_AWVALID(1'b0),
- .S_AXI_GP0_BID(NLW_inst_S_AXI_GP0_BID_UNCONNECTED[5:0]),
- .S_AXI_GP0_BREADY(1'b0),
- .S_AXI_GP0_BRESP(NLW_inst_S_AXI_GP0_BRESP_UNCONNECTED[1:0]),
- .S_AXI_GP0_BVALID(NLW_inst_S_AXI_GP0_BVALID_UNCONNECTED),
- .S_AXI_GP0_RDATA(NLW_inst_S_AXI_GP0_RDATA_UNCONNECTED[31:0]),
- .S_AXI_GP0_RID(NLW_inst_S_AXI_GP0_RID_UNCONNECTED[5:0]),
- .S_AXI_GP0_RLAST(NLW_inst_S_AXI_GP0_RLAST_UNCONNECTED),
- .S_AXI_GP0_RREADY(1'b0),
- .S_AXI_GP0_RRESP(NLW_inst_S_AXI_GP0_RRESP_UNCONNECTED[1:0]),
- .S_AXI_GP0_RVALID(NLW_inst_S_AXI_GP0_RVALID_UNCONNECTED),
- .S_AXI_GP0_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_WLAST(1'b0),
- .S_AXI_GP0_WREADY(NLW_inst_S_AXI_GP0_WREADY_UNCONNECTED),
- .S_AXI_GP0_WSTRB({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP0_WVALID(1'b0),
- .S_AXI_GP1_ACLK(1'b0),
- .S_AXI_GP1_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARBURST({1'b0,1'b0}),
- .S_AXI_GP1_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARESETN(NLW_inst_S_AXI_GP1_ARESETN_UNCONNECTED),
- .S_AXI_GP1_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARLOCK({1'b0,1'b0}),
- .S_AXI_GP1_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARREADY(NLW_inst_S_AXI_GP1_ARREADY_UNCONNECTED),
- .S_AXI_GP1_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_ARVALID(1'b0),
- .S_AXI_GP1_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWBURST({1'b0,1'b0}),
- .S_AXI_GP1_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWLOCK({1'b0,1'b0}),
- .S_AXI_GP1_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWREADY(NLW_inst_S_AXI_GP1_AWREADY_UNCONNECTED),
- .S_AXI_GP1_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_GP1_AWVALID(1'b0),
- .S_AXI_GP1_BID(NLW_inst_S_AXI_GP1_BID_UNCONNECTED[5:0]),
- .S_AXI_GP1_BREADY(1'b0),
- .S_AXI_GP1_BRESP(NLW_inst_S_AXI_GP1_BRESP_UNCONNECTED[1:0]),
- .S_AXI_GP1_BVALID(NLW_inst_S_AXI_GP1_BVALID_UNCONNECTED),
- .S_AXI_GP1_RDATA(NLW_inst_S_AXI_GP1_RDATA_UNCONNECTED[31:0]),
- .S_AXI_GP1_RID(NLW_inst_S_AXI_GP1_RID_UNCONNECTED[5:0]),
- .S_AXI_GP1_RLAST(NLW_inst_S_AXI_GP1_RLAST_UNCONNECTED),
- .S_AXI_GP1_RREADY(1'b0),
- .S_AXI_GP1_RRESP(NLW_inst_S_AXI_GP1_RRESP_UNCONNECTED[1:0]),
- .S_AXI_GP1_RVALID(NLW_inst_S_AXI_GP1_RVALID_UNCONNECTED),
- .S_AXI_GP1_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_WLAST(1'b0),
- .S_AXI_GP1_WREADY(NLW_inst_S_AXI_GP1_WREADY_UNCONNECTED),
- .S_AXI_GP1_WSTRB({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_GP1_WVALID(1'b0),
- .S_AXI_HP0_ACLK(1'b0),
- .S_AXI_HP0_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARBURST({1'b0,1'b0}),
- .S_AXI_HP0_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARESETN(NLW_inst_S_AXI_HP0_ARESETN_UNCONNECTED),
- .S_AXI_HP0_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP0_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARREADY(NLW_inst_S_AXI_HP0_ARREADY_UNCONNECTED),
- .S_AXI_HP0_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_ARVALID(1'b0),
- .S_AXI_HP0_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWBURST({1'b0,1'b0}),
- .S_AXI_HP0_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP0_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWREADY(NLW_inst_S_AXI_HP0_AWREADY_UNCONNECTED),
- .S_AXI_HP0_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP0_AWVALID(1'b0),
- .S_AXI_HP0_BID(NLW_inst_S_AXI_HP0_BID_UNCONNECTED[5:0]),
- .S_AXI_HP0_BREADY(1'b0),
- .S_AXI_HP0_BRESP(NLW_inst_S_AXI_HP0_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP0_BVALID(NLW_inst_S_AXI_HP0_BVALID_UNCONNECTED),
- .S_AXI_HP0_RACOUNT(NLW_inst_S_AXI_HP0_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP0_RCOUNT(NLW_inst_S_AXI_HP0_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP0_RDATA(NLW_inst_S_AXI_HP0_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP0_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP0_RID(NLW_inst_S_AXI_HP0_RID_UNCONNECTED[5:0]),
- .S_AXI_HP0_RLAST(NLW_inst_S_AXI_HP0_RLAST_UNCONNECTED),
- .S_AXI_HP0_RREADY(1'b0),
- .S_AXI_HP0_RRESP(NLW_inst_S_AXI_HP0_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP0_RVALID(NLW_inst_S_AXI_HP0_RVALID_UNCONNECTED),
- .S_AXI_HP0_WACOUNT(NLW_inst_S_AXI_HP0_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP0_WCOUNT(NLW_inst_S_AXI_HP0_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP0_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_WLAST(1'b0),
- .S_AXI_HP0_WREADY(NLW_inst_S_AXI_HP0_WREADY_UNCONNECTED),
- .S_AXI_HP0_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP0_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP0_WVALID(1'b0),
- .S_AXI_HP1_ACLK(1'b0),
- .S_AXI_HP1_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARBURST({1'b0,1'b0}),
- .S_AXI_HP1_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARESETN(NLW_inst_S_AXI_HP1_ARESETN_UNCONNECTED),
- .S_AXI_HP1_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP1_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARREADY(NLW_inst_S_AXI_HP1_ARREADY_UNCONNECTED),
- .S_AXI_HP1_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_ARVALID(1'b0),
- .S_AXI_HP1_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWBURST({1'b0,1'b0}),
- .S_AXI_HP1_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP1_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWREADY(NLW_inst_S_AXI_HP1_AWREADY_UNCONNECTED),
- .S_AXI_HP1_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP1_AWVALID(1'b0),
- .S_AXI_HP1_BID(NLW_inst_S_AXI_HP1_BID_UNCONNECTED[5:0]),
- .S_AXI_HP1_BREADY(1'b0),
- .S_AXI_HP1_BRESP(NLW_inst_S_AXI_HP1_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP1_BVALID(NLW_inst_S_AXI_HP1_BVALID_UNCONNECTED),
- .S_AXI_HP1_RACOUNT(NLW_inst_S_AXI_HP1_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP1_RCOUNT(NLW_inst_S_AXI_HP1_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP1_RDATA(NLW_inst_S_AXI_HP1_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP1_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP1_RID(NLW_inst_S_AXI_HP1_RID_UNCONNECTED[5:0]),
- .S_AXI_HP1_RLAST(NLW_inst_S_AXI_HP1_RLAST_UNCONNECTED),
- .S_AXI_HP1_RREADY(1'b0),
- .S_AXI_HP1_RRESP(NLW_inst_S_AXI_HP1_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP1_RVALID(NLW_inst_S_AXI_HP1_RVALID_UNCONNECTED),
- .S_AXI_HP1_WACOUNT(NLW_inst_S_AXI_HP1_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP1_WCOUNT(NLW_inst_S_AXI_HP1_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP1_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_WLAST(1'b0),
- .S_AXI_HP1_WREADY(NLW_inst_S_AXI_HP1_WREADY_UNCONNECTED),
- .S_AXI_HP1_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP1_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP1_WVALID(1'b0),
- .S_AXI_HP2_ACLK(1'b0),
- .S_AXI_HP2_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARBURST({1'b0,1'b0}),
- .S_AXI_HP2_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARESETN(NLW_inst_S_AXI_HP2_ARESETN_UNCONNECTED),
- .S_AXI_HP2_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP2_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARREADY(NLW_inst_S_AXI_HP2_ARREADY_UNCONNECTED),
- .S_AXI_HP2_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_ARVALID(1'b0),
- .S_AXI_HP2_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWBURST({1'b0,1'b0}),
- .S_AXI_HP2_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP2_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWREADY(NLW_inst_S_AXI_HP2_AWREADY_UNCONNECTED),
- .S_AXI_HP2_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP2_AWVALID(1'b0),
- .S_AXI_HP2_BID(NLW_inst_S_AXI_HP2_BID_UNCONNECTED[5:0]),
- .S_AXI_HP2_BREADY(1'b0),
- .S_AXI_HP2_BRESP(NLW_inst_S_AXI_HP2_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP2_BVALID(NLW_inst_S_AXI_HP2_BVALID_UNCONNECTED),
- .S_AXI_HP2_RACOUNT(NLW_inst_S_AXI_HP2_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP2_RCOUNT(NLW_inst_S_AXI_HP2_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP2_RDATA(NLW_inst_S_AXI_HP2_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP2_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP2_RID(NLW_inst_S_AXI_HP2_RID_UNCONNECTED[5:0]),
- .S_AXI_HP2_RLAST(NLW_inst_S_AXI_HP2_RLAST_UNCONNECTED),
- .S_AXI_HP2_RREADY(1'b0),
- .S_AXI_HP2_RRESP(NLW_inst_S_AXI_HP2_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP2_RVALID(NLW_inst_S_AXI_HP2_RVALID_UNCONNECTED),
- .S_AXI_HP2_WACOUNT(NLW_inst_S_AXI_HP2_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP2_WCOUNT(NLW_inst_S_AXI_HP2_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP2_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_WLAST(1'b0),
- .S_AXI_HP2_WREADY(NLW_inst_S_AXI_HP2_WREADY_UNCONNECTED),
- .S_AXI_HP2_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP2_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP2_WVALID(1'b0),
- .S_AXI_HP3_ACLK(1'b0),
- .S_AXI_HP3_ARADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARBURST({1'b0,1'b0}),
- .S_AXI_HP3_ARCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARESETN(NLW_inst_S_AXI_HP3_ARESETN_UNCONNECTED),
- .S_AXI_HP3_ARID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARLOCK({1'b0,1'b0}),
- .S_AXI_HP3_ARPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARREADY(NLW_inst_S_AXI_HP3_ARREADY_UNCONNECTED),
- .S_AXI_HP3_ARSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_ARVALID(1'b0),
- .S_AXI_HP3_AWADDR({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWBURST({1'b0,1'b0}),
- .S_AXI_HP3_AWCACHE({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWLEN({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWLOCK({1'b0,1'b0}),
- .S_AXI_HP3_AWPROT({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWQOS({1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWREADY(NLW_inst_S_AXI_HP3_AWREADY_UNCONNECTED),
- .S_AXI_HP3_AWSIZE({1'b0,1'b0,1'b0}),
- .S_AXI_HP3_AWVALID(1'b0),
- .S_AXI_HP3_BID(NLW_inst_S_AXI_HP3_BID_UNCONNECTED[5:0]),
- .S_AXI_HP3_BREADY(1'b0),
- .S_AXI_HP3_BRESP(NLW_inst_S_AXI_HP3_BRESP_UNCONNECTED[1:0]),
- .S_AXI_HP3_BVALID(NLW_inst_S_AXI_HP3_BVALID_UNCONNECTED),
- .S_AXI_HP3_RACOUNT(NLW_inst_S_AXI_HP3_RACOUNT_UNCONNECTED[2:0]),
- .S_AXI_HP3_RCOUNT(NLW_inst_S_AXI_HP3_RCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP3_RDATA(NLW_inst_S_AXI_HP3_RDATA_UNCONNECTED[63:0]),
- .S_AXI_HP3_RDISSUECAP1_EN(1'b0),
- .S_AXI_HP3_RID(NLW_inst_S_AXI_HP3_RID_UNCONNECTED[5:0]),
- .S_AXI_HP3_RLAST(NLW_inst_S_AXI_HP3_RLAST_UNCONNECTED),
- .S_AXI_HP3_RREADY(1'b0),
- .S_AXI_HP3_RRESP(NLW_inst_S_AXI_HP3_RRESP_UNCONNECTED[1:0]),
- .S_AXI_HP3_RVALID(NLW_inst_S_AXI_HP3_RVALID_UNCONNECTED),
- .S_AXI_HP3_WACOUNT(NLW_inst_S_AXI_HP3_WACOUNT_UNCONNECTED[5:0]),
- .S_AXI_HP3_WCOUNT(NLW_inst_S_AXI_HP3_WCOUNT_UNCONNECTED[7:0]),
- .S_AXI_HP3_WDATA({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_WID({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_WLAST(1'b0),
- .S_AXI_HP3_WREADY(NLW_inst_S_AXI_HP3_WREADY_UNCONNECTED),
- .S_AXI_HP3_WRISSUECAP1_EN(1'b0),
- .S_AXI_HP3_WSTRB({1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0,1'b0}),
- .S_AXI_HP3_WVALID(1'b0),
- .TRACE_CLK(1'b0),
- .TRACE_CLK_OUT(NLW_inst_TRACE_CLK_OUT_UNCONNECTED),
- .TRACE_CTL(NLW_inst_TRACE_CTL_UNCONNECTED),
- .TRACE_DATA(NLW_inst_TRACE_DATA_UNCONNECTED[1:0]),
- .TTC0_CLK0_IN(1'b0),
- .TTC0_CLK1_IN(1'b0),
- .TTC0_CLK2_IN(1'b0),
- .TTC0_WAVE0_OUT(NLW_inst_TTC0_WAVE0_OUT_UNCONNECTED),
- .TTC0_WAVE1_OUT(NLW_inst_TTC0_WAVE1_OUT_UNCONNECTED),
- .TTC0_WAVE2_OUT(NLW_inst_TTC0_WAVE2_OUT_UNCONNECTED),
- .TTC1_CLK0_IN(1'b0),
- .TTC1_CLK1_IN(1'b0),
- .TTC1_CLK2_IN(1'b0),
- .TTC1_WAVE0_OUT(NLW_inst_TTC1_WAVE0_OUT_UNCONNECTED),
- .TTC1_WAVE1_OUT(NLW_inst_TTC1_WAVE1_OUT_UNCONNECTED),
- .TTC1_WAVE2_OUT(NLW_inst_TTC1_WAVE2_OUT_UNCONNECTED),
- .UART0_CTSN(1'b0),
- .UART0_DCDN(1'b0),
- .UART0_DSRN(1'b0),
- .UART0_DTRN(NLW_inst_UART0_DTRN_UNCONNECTED),
- .UART0_RIN(1'b0),
- .UART0_RTSN(NLW_inst_UART0_RTSN_UNCONNECTED),
- .UART0_RX(1'b1),
- .UART0_TX(NLW_inst_UART0_TX_UNCONNECTED),
- .UART1_CTSN(1'b0),
- .UART1_DCDN(1'b0),
- .UART1_DSRN(1'b0),
- .UART1_DTRN(NLW_inst_UART1_DTRN_UNCONNECTED),
- .UART1_RIN(1'b0),
- .UART1_RTSN(NLW_inst_UART1_RTSN_UNCONNECTED),
- .UART1_RX(1'b1),
- .UART1_TX(NLW_inst_UART1_TX_UNCONNECTED),
- .USB0_PORT_INDCTL(USB0_PORT_INDCTL),
- .USB0_VBUS_PWRFAULT(USB0_VBUS_PWRFAULT),
- .USB0_VBUS_PWRSELECT(USB0_VBUS_PWRSELECT),
- .USB1_PORT_INDCTL(NLW_inst_USB1_PORT_INDCTL_UNCONNECTED[1:0]),
- .USB1_VBUS_PWRFAULT(1'b0),
- .USB1_VBUS_PWRSELECT(NLW_inst_USB1_VBUS_PWRSELECT_UNCONNECTED),
- .WDT_CLK_IN(1'b0),
- .WDT_RST_OUT(NLW_inst_WDT_RST_OUT_UNCONNECTED));
-endmodule
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_stub.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_stub.v
deleted file mode 100755
index e29603e..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/ip/2019.2/b32362bd6ba3a9e9/scalp_zynqps_processing_system7_0_0_stub.v
+++ /dev/null
@@ -1,111 +0,0 @@
-// Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-// --------------------------------------------------------------------------------
-// Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
-// Date : Mon Sep 7 11:58:38 2020
-// Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
-// Command : write_verilog -force -mode synth_stub -rename_top decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix -prefix
-// decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix_ scalp_zynqps_processing_system7_0_0_stub.v
-// Design : scalp_zynqps_processing_system7_0_0
-// Purpose : Stub declaration of top-level module interface
-// Device : xc7z015clg485-2
-// --------------------------------------------------------------------------------
-
-// This empty module with port declaration file causes synthesis tools to infer a black box for IP.
-// The synthesis directives are for Synopsys Synplify support to prevent IO buffer insertion.
-// Please paste the declaration into a Verilog source file or add the file as an additional source.
-(* X_CORE_INFO = "processing_system7_v5_5_processing_system7,Vivado 2019.2" *)
-module decalper_eb_ot_sdeen_pot_pi_dehcac_xnilix(SPI1_SCLK_I, SPI1_SCLK_O, SPI1_SCLK_T,
- SPI1_MOSI_I, SPI1_MOSI_O, SPI1_MOSI_T, SPI1_MISO_I, SPI1_MISO_O, SPI1_MISO_T, SPI1_SS_I,
- SPI1_SS_O, SPI1_SS1_O, SPI1_SS2_O, SPI1_SS_T, USB0_PORT_INDCTL, USB0_VBUS_PWRSELECT,
- USB0_VBUS_PWRFAULT, M_AXI_GP0_ARVALID, M_AXI_GP0_AWVALID, M_AXI_GP0_BREADY,
- M_AXI_GP0_RREADY, M_AXI_GP0_WLAST, M_AXI_GP0_WVALID, M_AXI_GP0_ARID, M_AXI_GP0_AWID,
- M_AXI_GP0_WID, M_AXI_GP0_ARBURST, M_AXI_GP0_ARLOCK, M_AXI_GP0_ARSIZE, M_AXI_GP0_AWBURST,
- M_AXI_GP0_AWLOCK, M_AXI_GP0_AWSIZE, M_AXI_GP0_ARPROT, M_AXI_GP0_AWPROT, M_AXI_GP0_ARADDR,
- M_AXI_GP0_AWADDR, M_AXI_GP0_WDATA, M_AXI_GP0_ARCACHE, M_AXI_GP0_ARLEN, M_AXI_GP0_ARQOS,
- M_AXI_GP0_AWCACHE, M_AXI_GP0_AWLEN, M_AXI_GP0_AWQOS, M_AXI_GP0_WSTRB, M_AXI_GP0_ACLK,
- M_AXI_GP0_ARREADY, M_AXI_GP0_AWREADY, M_AXI_GP0_BVALID, M_AXI_GP0_RLAST,
- M_AXI_GP0_RVALID, M_AXI_GP0_WREADY, M_AXI_GP0_BID, M_AXI_GP0_RID, M_AXI_GP0_BRESP,
- M_AXI_GP0_RRESP, M_AXI_GP0_RDATA, FCLK_CLK0, FCLK_RESET0_N, MIO, DDR_CAS_n, DDR_CKE, DDR_Clk_n,
- DDR_Clk, DDR_CS_n, DDR_DRSTB, DDR_ODT, DDR_RAS_n, DDR_WEB, DDR_BankAddr, DDR_Addr, DDR_VRN,
- DDR_VRP, DDR_DM, DDR_DQ, DDR_DQS_n, DDR_DQS, PS_SRSTB, PS_CLK, PS_PORB)
-/* synthesis syn_black_box black_box_pad_pin="SPI1_SCLK_I,SPI1_SCLK_O,SPI1_SCLK_T,SPI1_MOSI_I,SPI1_MOSI_O,SPI1_MOSI_T,SPI1_MISO_I,SPI1_MISO_O,SPI1_MISO_T,SPI1_SS_I,SPI1_SS_O,SPI1_SS1_O,SPI1_SS2_O,SPI1_SS_T,USB0_PORT_INDCTL[1:0],USB0_VBUS_PWRSELECT,USB0_VBUS_PWRFAULT,M_AXI_GP0_ARVALID,M_AXI_GP0_AWVALID,M_AXI_GP0_BREADY,M_AXI_GP0_RREADY,M_AXI_GP0_WLAST,M_AXI_GP0_WVALID,M_AXI_GP0_ARID[11:0],M_AXI_GP0_AWID[11:0],M_AXI_GP0_WID[11:0],M_AXI_GP0_ARBURST[1:0],M_AXI_GP0_ARLOCK[1:0],M_AXI_GP0_ARSIZE[2:0],M_AXI_GP0_AWBURST[1:0],M_AXI_GP0_AWLOCK[1:0],M_AXI_GP0_AWSIZE[2:0],M_AXI_GP0_ARPROT[2:0],M_AXI_GP0_AWPROT[2:0],M_AXI_GP0_ARADDR[31:0],M_AXI_GP0_AWADDR[31:0],M_AXI_GP0_WDATA[31:0],M_AXI_GP0_ARCACHE[3:0],M_AXI_GP0_ARLEN[3:0],M_AXI_GP0_ARQOS[3:0],M_AXI_GP0_AWCACHE[3:0],M_AXI_GP0_AWLEN[3:0],M_AXI_GP0_AWQOS[3:0],M_AXI_GP0_WSTRB[3:0],M_AXI_GP0_ACLK,M_AXI_GP0_ARREADY,M_AXI_GP0_AWREADY,M_AXI_GP0_BVALID,M_AXI_GP0_RLAST,M_AXI_GP0_RVALID,M_AXI_GP0_WREADY,M_AXI_GP0_BID[11:0],M_AXI_GP0_RID[11:0],M_AXI_GP0_BRESP[1:0],M_AXI_GP0_RRESP[1:0],M_AXI_GP0_RDATA[31:0],FCLK_CLK0,FCLK_RESET0_N,MIO[53:0],DDR_CAS_n,DDR_CKE,DDR_Clk_n,DDR_Clk,DDR_CS_n,DDR_DRSTB,DDR_ODT,DDR_RAS_n,DDR_WEB,DDR_BankAddr[2:0],DDR_Addr[14:0],DDR_VRN,DDR_VRP,DDR_DM[3:0],DDR_DQ[31:0],DDR_DQS_n[3:0],DDR_DQS[3:0],PS_SRSTB,PS_CLK,PS_PORB" */;
- input SPI1_SCLK_I;
- output SPI1_SCLK_O;
- output SPI1_SCLK_T;
- input SPI1_MOSI_I;
- output SPI1_MOSI_O;
- output SPI1_MOSI_T;
- input SPI1_MISO_I;
- output SPI1_MISO_O;
- output SPI1_MISO_T;
- input SPI1_SS_I;
- output SPI1_SS_O;
- output SPI1_SS1_O;
- output SPI1_SS2_O;
- output SPI1_SS_T;
- output [1:0]USB0_PORT_INDCTL;
- output USB0_VBUS_PWRSELECT;
- input USB0_VBUS_PWRFAULT;
- output M_AXI_GP0_ARVALID;
- output M_AXI_GP0_AWVALID;
- output M_AXI_GP0_BREADY;
- output M_AXI_GP0_RREADY;
- output M_AXI_GP0_WLAST;
- output M_AXI_GP0_WVALID;
- output [11:0]M_AXI_GP0_ARID;
- output [11:0]M_AXI_GP0_AWID;
- output [11:0]M_AXI_GP0_WID;
- output [1:0]M_AXI_GP0_ARBURST;
- output [1:0]M_AXI_GP0_ARLOCK;
- output [2:0]M_AXI_GP0_ARSIZE;
- output [1:0]M_AXI_GP0_AWBURST;
- output [1:0]M_AXI_GP0_AWLOCK;
- output [2:0]M_AXI_GP0_AWSIZE;
- output [2:0]M_AXI_GP0_ARPROT;
- output [2:0]M_AXI_GP0_AWPROT;
- output [31:0]M_AXI_GP0_ARADDR;
- output [31:0]M_AXI_GP0_AWADDR;
- output [31:0]M_AXI_GP0_WDATA;
- output [3:0]M_AXI_GP0_ARCACHE;
- output [3:0]M_AXI_GP0_ARLEN;
- output [3:0]M_AXI_GP0_ARQOS;
- output [3:0]M_AXI_GP0_AWCACHE;
- output [3:0]M_AXI_GP0_AWLEN;
- output [3:0]M_AXI_GP0_AWQOS;
- output [3:0]M_AXI_GP0_WSTRB;
- input M_AXI_GP0_ACLK;
- input M_AXI_GP0_ARREADY;
- input M_AXI_GP0_AWREADY;
- input M_AXI_GP0_BVALID;
- input M_AXI_GP0_RLAST;
- input M_AXI_GP0_RVALID;
- input M_AXI_GP0_WREADY;
- input [11:0]M_AXI_GP0_BID;
- input [11:0]M_AXI_GP0_RID;
- input [1:0]M_AXI_GP0_BRESP;
- input [1:0]M_AXI_GP0_RRESP;
- input [31:0]M_AXI_GP0_RDATA;
- output FCLK_CLK0;
- output FCLK_RESET0_N;
- inout [53:0]MIO;
- inout DDR_CAS_n;
- inout DDR_CKE;
- inout DDR_Clk_n;
- inout DDR_Clk;
- inout DDR_CS_n;
- inout DDR_DRSTB;
- inout DDR_ODT;
- inout DDR_RAS_n;
- inout DDR_WEB;
- inout [2:0]DDR_BankAddr;
- inout [14:0]DDR_Addr;
- inout DDR_VRN;
- inout DDR_VRP;
- inout [3:0]DDR_DM;
- inout [31:0]DDR_DQ;
- inout [3:0]DDR_DQS_n;
- inout [3:0]DDR_DQS;
- inout PS_SRSTB;
- inout PS_CLK;
- inout PS_PORB;
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/wt/webtalk_pa.xml b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/wt/webtalk_pa.xml
deleted file mode 100644
index 327dde7..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/wt/webtalk_pa.xml
+++ /dev/null
@@ -1,52 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" ?>
-<document>
-<!--The data in this file is primarily intended for consumption by Xilinx tools.
-The structure and the elements are likely to change over the next few releases.
-This means code written to parse this file will need to be revisited each subsequent release.-->
-<application name="pa" timeStamp="Mon Sep 7 13:34:51 2020">
-<section name="Project Information" visible="false">
-<property name="ProjectID" value="4f59540fcef14713bed3e418c6dd0597" type="ProjectID"/>
-<property name="ProjectIteration" value="1" type="ProjectIteration"/>
-</section>
-<section name="PlanAhead Usage" visible="true">
-<item name="Project Data">
-<property name="SrcSetCount" value="1" type="SrcSetCount"/>
-<property name="ConstraintSetCount" value="1" type="ConstraintSetCount"/>
-<property name="DesignMode" value="RTL" type="DesignMode"/>
-<property name="SynthesisStrategy" value="Vivado Synthesis Defaults" type="SynthesisStrategy"/>
-<property name="ImplStrategy" value="Vivado Implementation Defaults" type="ImplStrategy"/>
-</item>
-<item name="Java Command Handlers">
-<property name="FileExit" value="1" type="JavaHandler"/>
-<property name="ManageCompositeTargets" value="1" type="JavaHandler"/>
-<property name="RunSynthesis" value="1" type="JavaHandler"/>
-<property name="ViewInstTempl" value="1" type="JavaHandler"/>
-<property name="ViewTaskSynthesis" value="1" type="JavaHandler"/>
-</item>
-<item name="Gui Handlers">
-<property name="BaseDialog_OK" value="2" type="GuiHandlerData"/>
-<property name="FileSetPanel_FILE_SET_PANEL_TREE" value="14" type="GuiHandlerData"/>
-<property name="FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_CHECKPOINT" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_CONSTRAINTS" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_EXPORT" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_FILE" value="2" type="GuiHandlerData"/>
-<property name="MainMenuMgr_IMPORT" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_IP" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_PROJECT" value="1" type="GuiHandlerData"/>
-<property name="MainMenuMgr_TEXT_EDITOR" value="1" type="GuiHandlerData"/>
-<property name="PACommandNames_EXIT" value="1" type="GuiHandlerData"/>
-<property name="PACommandNames_GENERATE_COMPOSITE_FILE" value="2" type="GuiHandlerData"/>
-<property name="PACommandNames_GOTO_NETLIST_DESIGN" value="1" type="GuiHandlerData"/>
-<property name="PACommandNames_VIEW_INST_TEMPL" value="1" type="GuiHandlerData"/>
-<property name="PAViews_PROJECT_SUMMARY" value="1" type="GuiHandlerData"/>
-<property name="SimpleOutputProductDialog_GENERATE_OUTPUT_PRODUCTS_IMMEDIATELY" value="1" type="GuiHandlerData"/>
-</item>
-<item name="Other">
-<property name="GuiMode" value="130" type="GuiMode"/>
-<property name="BatchMode" value="0" type="BatchMode"/>
-<property name="TclMode" value="123" type="TclMode"/>
-</item>
-</section>
-</application>
-</document>
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/README.txt
deleted file mode 100644
index 023052c..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/README.txt
+++ /dev/null
@@ -1 +0,0 @@
-The files in this directory structure are automatically generated and managed by Vivado. Editing these files is not recommended.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v
deleted file mode 100644
index efcfe97..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v
+++ /dev/null
@@ -1,68 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 6
-
-`timescale 1ns/1ps
-
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_gnd_constant_0 (
- dout
-);
-
-output wire [0 : 0] dout;
-
- xlconstant_v1_1_6_xlconstant #(
- .CONST_WIDTH(1),
- .CONST_VAL('H0)
- ) inst (
- .dout(dout)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v
deleted file mode 100644
index 561083e..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v
+++ /dev/null
@@ -1,612 +0,0 @@
-
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-
-`timescale 1ns/1ps
-
-module scalp_zynqps_processing_system7_0_0 (
-SPI1_SCLK_I,
-SPI1_SCLK_O,
-SPI1_SCLK_T,
-SPI1_MOSI_I,
-SPI1_MOSI_O,
-SPI1_MOSI_T,
-SPI1_MISO_I,
-SPI1_MISO_O,
-SPI1_MISO_T,
-SPI1_SS_I,
-SPI1_SS_O,
-SPI1_SS1_O,
-SPI1_SS2_O,
-SPI1_SS_T,
-USB0_PORT_INDCTL,
-USB0_VBUS_PWRSELECT,
-USB0_VBUS_PWRFAULT,
-M_AXI_GP0_ARVALID,
-M_AXI_GP0_AWVALID,
-M_AXI_GP0_BREADY,
-M_AXI_GP0_RREADY,
-M_AXI_GP0_WLAST,
-M_AXI_GP0_WVALID,
-M_AXI_GP0_ARID,
-M_AXI_GP0_AWID,
-M_AXI_GP0_WID,
-M_AXI_GP0_ARBURST,
-M_AXI_GP0_ARLOCK,
-M_AXI_GP0_ARSIZE,
-M_AXI_GP0_AWBURST,
-M_AXI_GP0_AWLOCK,
-M_AXI_GP0_AWSIZE,
-M_AXI_GP0_ARPROT,
-M_AXI_GP0_AWPROT,
-M_AXI_GP0_ARADDR,
-M_AXI_GP0_AWADDR,
-M_AXI_GP0_WDATA,
-M_AXI_GP0_ARCACHE,
-M_AXI_GP0_ARLEN,
-M_AXI_GP0_ARQOS,
-M_AXI_GP0_AWCACHE,
-M_AXI_GP0_AWLEN,
-M_AXI_GP0_AWQOS,
-M_AXI_GP0_WSTRB,
-M_AXI_GP0_ACLK,
-M_AXI_GP0_ARREADY,
-M_AXI_GP0_AWREADY,
-M_AXI_GP0_BVALID,
-M_AXI_GP0_RLAST,
-M_AXI_GP0_RVALID,
-M_AXI_GP0_WREADY,
-M_AXI_GP0_BID,
-M_AXI_GP0_RID,
-M_AXI_GP0_BRESP,
-M_AXI_GP0_RRESP,
-M_AXI_GP0_RDATA,
-FCLK_CLK0,
-FCLK_RESET0_N,
-MIO,
-DDR_CAS_n,
-DDR_CKE,
-DDR_Clk_n,
-DDR_Clk,
-DDR_CS_n,
-DDR_DRSTB,
-DDR_ODT,
-DDR_RAS_n,
-DDR_WEB,
-DDR_BankAddr,
-DDR_Addr,
-DDR_VRN,
-DDR_VRP,
-DDR_DM,
-DDR_DQ,
-DDR_DQS_n,
-DDR_DQS,
-PS_SRSTB,
-PS_CLK,
-PS_PORB
-);
-input SPI1_SCLK_I;
-output SPI1_SCLK_O;
-output SPI1_SCLK_T;
-input SPI1_MOSI_I;
-output SPI1_MOSI_O;
-output SPI1_MOSI_T;
-input SPI1_MISO_I;
-output SPI1_MISO_O;
-output SPI1_MISO_T;
-input SPI1_SS_I;
-output SPI1_SS_O;
-output SPI1_SS1_O;
-output SPI1_SS2_O;
-output SPI1_SS_T;
-output [1 : 0] USB0_PORT_INDCTL;
-output USB0_VBUS_PWRSELECT;
-input USB0_VBUS_PWRFAULT;
-output M_AXI_GP0_ARVALID;
-output M_AXI_GP0_AWVALID;
-output M_AXI_GP0_BREADY;
-output M_AXI_GP0_RREADY;
-output M_AXI_GP0_WLAST;
-output M_AXI_GP0_WVALID;
-output [11 : 0] M_AXI_GP0_ARID;
-output [11 : 0] M_AXI_GP0_AWID;
-output [11 : 0] M_AXI_GP0_WID;
-output [1 : 0] M_AXI_GP0_ARBURST;
-output [1 : 0] M_AXI_GP0_ARLOCK;
-output [2 : 0] M_AXI_GP0_ARSIZE;
-output [1 : 0] M_AXI_GP0_AWBURST;
-output [1 : 0] M_AXI_GP0_AWLOCK;
-output [2 : 0] M_AXI_GP0_AWSIZE;
-output [2 : 0] M_AXI_GP0_ARPROT;
-output [2 : 0] M_AXI_GP0_AWPROT;
-output [31 : 0] M_AXI_GP0_ARADDR;
-output [31 : 0] M_AXI_GP0_AWADDR;
-output [31 : 0] M_AXI_GP0_WDATA;
-output [3 : 0] M_AXI_GP0_ARCACHE;
-output [3 : 0] M_AXI_GP0_ARLEN;
-output [3 : 0] M_AXI_GP0_ARQOS;
-output [3 : 0] M_AXI_GP0_AWCACHE;
-output [3 : 0] M_AXI_GP0_AWLEN;
-output [3 : 0] M_AXI_GP0_AWQOS;
-output [3 : 0] M_AXI_GP0_WSTRB;
-input M_AXI_GP0_ACLK;
-input M_AXI_GP0_ARREADY;
-input M_AXI_GP0_AWREADY;
-input M_AXI_GP0_BVALID;
-input M_AXI_GP0_RLAST;
-input M_AXI_GP0_RVALID;
-input M_AXI_GP0_WREADY;
-input [11 : 0] M_AXI_GP0_BID;
-input [11 : 0] M_AXI_GP0_RID;
-input [1 : 0] M_AXI_GP0_BRESP;
-input [1 : 0] M_AXI_GP0_RRESP;
-input [31 : 0] M_AXI_GP0_RDATA;
-output FCLK_CLK0;
-output FCLK_RESET0_N;
-input [53 : 0] MIO;
-input DDR_CAS_n;
-input DDR_CKE;
-input DDR_Clk_n;
-input DDR_Clk;
-input DDR_CS_n;
-input DDR_DRSTB;
-input DDR_ODT;
-input DDR_RAS_n;
-input DDR_WEB;
-input [2 : 0] DDR_BankAddr;
-input [14 : 0] DDR_Addr;
-input DDR_VRN;
-input DDR_VRP;
-input [3 : 0] DDR_DM;
-input [31 : 0] DDR_DQ;
-input [3 : 0] DDR_DQS_n;
-input [3 : 0] DDR_DQS;
-input PS_SRSTB;
-input PS_CLK;
-input PS_PORB;
-
- processing_system7_vip_v1_0_8 #(
- .C_USE_M_AXI_GP0(1),
- .C_USE_M_AXI_GP1(0),
- .C_USE_S_AXI_ACP(0),
- .C_USE_S_AXI_GP0(0),
- .C_USE_S_AXI_GP1(0),
- .C_USE_S_AXI_HP0(0),
- .C_USE_S_AXI_HP1(0),
- .C_USE_S_AXI_HP2(0),
- .C_USE_S_AXI_HP3(0),
- .C_S_AXI_HP0_DATA_WIDTH(64),
- .C_S_AXI_HP1_DATA_WIDTH(64),
- .C_S_AXI_HP2_DATA_WIDTH(64),
- .C_S_AXI_HP3_DATA_WIDTH(64),
- .C_HIGH_OCM_EN(0),
- .C_FCLK_CLK0_FREQ(125.0),
- .C_FCLK_CLK1_FREQ(10.0),
- .C_FCLK_CLK2_FREQ(10.0),
- .C_FCLK_CLK3_FREQ(10.0),
- .C_M_AXI_GP0_ENABLE_STATIC_REMAP(0),
- .C_M_AXI_GP1_ENABLE_STATIC_REMAP(0),
- .C_M_AXI_GP0_THREAD_ID_WIDTH (12),
- .C_M_AXI_GP1_THREAD_ID_WIDTH (12)
- ) inst (
- .M_AXI_GP0_ARVALID(M_AXI_GP0_ARVALID),
- .M_AXI_GP0_AWVALID(M_AXI_GP0_AWVALID),
- .M_AXI_GP0_BREADY(M_AXI_GP0_BREADY),
- .M_AXI_GP0_RREADY(M_AXI_GP0_RREADY),
- .M_AXI_GP0_WLAST(M_AXI_GP0_WLAST),
- .M_AXI_GP0_WVALID(M_AXI_GP0_WVALID),
- .M_AXI_GP0_ARID(M_AXI_GP0_ARID),
- .M_AXI_GP0_AWID(M_AXI_GP0_AWID),
- .M_AXI_GP0_WID(M_AXI_GP0_WID),
- .M_AXI_GP0_ARBURST(M_AXI_GP0_ARBURST),
- .M_AXI_GP0_ARLOCK(M_AXI_GP0_ARLOCK),
- .M_AXI_GP0_ARSIZE(M_AXI_GP0_ARSIZE),
- .M_AXI_GP0_AWBURST(M_AXI_GP0_AWBURST),
- .M_AXI_GP0_AWLOCK(M_AXI_GP0_AWLOCK),
- .M_AXI_GP0_AWSIZE(M_AXI_GP0_AWSIZE),
- .M_AXI_GP0_ARPROT(M_AXI_GP0_ARPROT),
- .M_AXI_GP0_AWPROT(M_AXI_GP0_AWPROT),
- .M_AXI_GP0_ARADDR(M_AXI_GP0_ARADDR),
- .M_AXI_GP0_AWADDR(M_AXI_GP0_AWADDR),
- .M_AXI_GP0_WDATA(M_AXI_GP0_WDATA),
- .M_AXI_GP0_ARCACHE(M_AXI_GP0_ARCACHE),
- .M_AXI_GP0_ARLEN(M_AXI_GP0_ARLEN),
- .M_AXI_GP0_ARQOS(M_AXI_GP0_ARQOS),
- .M_AXI_GP0_AWCACHE(M_AXI_GP0_AWCACHE),
- .M_AXI_GP0_AWLEN(M_AXI_GP0_AWLEN),
- .M_AXI_GP0_AWQOS(M_AXI_GP0_AWQOS),
- .M_AXI_GP0_WSTRB(M_AXI_GP0_WSTRB),
- .M_AXI_GP0_ACLK(M_AXI_GP0_ACLK),
- .M_AXI_GP0_ARREADY(M_AXI_GP0_ARREADY),
- .M_AXI_GP0_AWREADY(M_AXI_GP0_AWREADY),
- .M_AXI_GP0_BVALID(M_AXI_GP0_BVALID),
- .M_AXI_GP0_RLAST(M_AXI_GP0_RLAST),
- .M_AXI_GP0_RVALID(M_AXI_GP0_RVALID),
- .M_AXI_GP0_WREADY(M_AXI_GP0_WREADY),
- .M_AXI_GP0_BID(M_AXI_GP0_BID),
- .M_AXI_GP0_RID(M_AXI_GP0_RID),
- .M_AXI_GP0_BRESP(M_AXI_GP0_BRESP),
- .M_AXI_GP0_RRESP(M_AXI_GP0_RRESP),
- .M_AXI_GP0_RDATA(M_AXI_GP0_RDATA),
- .M_AXI_GP1_ARVALID(),
- .M_AXI_GP1_AWVALID(),
- .M_AXI_GP1_BREADY(),
- .M_AXI_GP1_RREADY(),
- .M_AXI_GP1_WLAST(),
- .M_AXI_GP1_WVALID(),
- .M_AXI_GP1_ARID(),
- .M_AXI_GP1_AWID(),
- .M_AXI_GP1_WID(),
- .M_AXI_GP1_ARBURST(),
- .M_AXI_GP1_ARLOCK(),
- .M_AXI_GP1_ARSIZE(),
- .M_AXI_GP1_AWBURST(),
- .M_AXI_GP1_AWLOCK(),
- .M_AXI_GP1_AWSIZE(),
- .M_AXI_GP1_ARPROT(),
- .M_AXI_GP1_AWPROT(),
- .M_AXI_GP1_ARADDR(),
- .M_AXI_GP1_AWADDR(),
- .M_AXI_GP1_WDATA(),
- .M_AXI_GP1_ARCACHE(),
- .M_AXI_GP1_ARLEN(),
- .M_AXI_GP1_ARQOS(),
- .M_AXI_GP1_AWCACHE(),
- .M_AXI_GP1_AWLEN(),
- .M_AXI_GP1_AWQOS(),
- .M_AXI_GP1_WSTRB(),
- .M_AXI_GP1_ACLK(1'B0),
- .M_AXI_GP1_ARREADY(1'B0),
- .M_AXI_GP1_AWREADY(1'B0),
- .M_AXI_GP1_BVALID(1'B0),
- .M_AXI_GP1_RLAST(1'B0),
- .M_AXI_GP1_RVALID(1'B0),
- .M_AXI_GP1_WREADY(1'B0),
- .M_AXI_GP1_BID(12'B0),
- .M_AXI_GP1_RID(12'B0),
- .M_AXI_GP1_BRESP(2'B0),
- .M_AXI_GP1_RRESP(2'B0),
- .M_AXI_GP1_RDATA(32'B0),
- .S_AXI_GP0_ARREADY(),
- .S_AXI_GP0_AWREADY(),
- .S_AXI_GP0_BVALID(),
- .S_AXI_GP0_RLAST(),
- .S_AXI_GP0_RVALID(),
- .S_AXI_GP0_WREADY(),
- .S_AXI_GP0_BRESP(),
- .S_AXI_GP0_RRESP(),
- .S_AXI_GP0_RDATA(),
- .S_AXI_GP0_BID(),
- .S_AXI_GP0_RID(),
- .S_AXI_GP0_ACLK(1'B0),
- .S_AXI_GP0_ARVALID(1'B0),
- .S_AXI_GP0_AWVALID(1'B0),
- .S_AXI_GP0_BREADY(1'B0),
- .S_AXI_GP0_RREADY(1'B0),
- .S_AXI_GP0_WLAST(1'B0),
- .S_AXI_GP0_WVALID(1'B0),
- .S_AXI_GP0_ARBURST(2'B0),
- .S_AXI_GP0_ARLOCK(2'B0),
- .S_AXI_GP0_ARSIZE(3'B0),
- .S_AXI_GP0_AWBURST(2'B0),
- .S_AXI_GP0_AWLOCK(2'B0),
- .S_AXI_GP0_AWSIZE(3'B0),
- .S_AXI_GP0_ARPROT(3'B0),
- .S_AXI_GP0_AWPROT(3'B0),
- .S_AXI_GP0_ARADDR(32'B0),
- .S_AXI_GP0_AWADDR(32'B0),
- .S_AXI_GP0_WDATA(32'B0),
- .S_AXI_GP0_ARCACHE(4'B0),
- .S_AXI_GP0_ARLEN(4'B0),
- .S_AXI_GP0_ARQOS(4'B0),
- .S_AXI_GP0_AWCACHE(4'B0),
- .S_AXI_GP0_AWLEN(4'B0),
- .S_AXI_GP0_AWQOS(4'B0),
- .S_AXI_GP0_WSTRB(4'B0),
- .S_AXI_GP0_ARID(6'B0),
- .S_AXI_GP0_AWID(6'B0),
- .S_AXI_GP0_WID(6'B0),
- .S_AXI_GP1_ARREADY(),
- .S_AXI_GP1_AWREADY(),
- .S_AXI_GP1_BVALID(),
- .S_AXI_GP1_RLAST(),
- .S_AXI_GP1_RVALID(),
- .S_AXI_GP1_WREADY(),
- .S_AXI_GP1_BRESP(),
- .S_AXI_GP1_RRESP(),
- .S_AXI_GP1_RDATA(),
- .S_AXI_GP1_BID(),
- .S_AXI_GP1_RID(),
- .S_AXI_GP1_ACLK(1'B0),
- .S_AXI_GP1_ARVALID(1'B0),
- .S_AXI_GP1_AWVALID(1'B0),
- .S_AXI_GP1_BREADY(1'B0),
- .S_AXI_GP1_RREADY(1'B0),
- .S_AXI_GP1_WLAST(1'B0),
- .S_AXI_GP1_WVALID(1'B0),
- .S_AXI_GP1_ARBURST(2'B0),
- .S_AXI_GP1_ARLOCK(2'B0),
- .S_AXI_GP1_ARSIZE(3'B0),
- .S_AXI_GP1_AWBURST(2'B0),
- .S_AXI_GP1_AWLOCK(2'B0),
- .S_AXI_GP1_AWSIZE(3'B0),
- .S_AXI_GP1_ARPROT(3'B0),
- .S_AXI_GP1_AWPROT(3'B0),
- .S_AXI_GP1_ARADDR(32'B0),
- .S_AXI_GP1_AWADDR(32'B0),
- .S_AXI_GP1_WDATA(32'B0),
- .S_AXI_GP1_ARCACHE(4'B0),
- .S_AXI_GP1_ARLEN(4'B0),
- .S_AXI_GP1_ARQOS(4'B0),
- .S_AXI_GP1_AWCACHE(4'B0),
- .S_AXI_GP1_AWLEN(4'B0),
- .S_AXI_GP1_AWQOS(4'B0),
- .S_AXI_GP1_WSTRB(4'B0),
- .S_AXI_GP1_ARID(6'B0),
- .S_AXI_GP1_AWID(6'B0),
- .S_AXI_GP1_WID(6'B0),
- .S_AXI_ACP_ARREADY(),
- .S_AXI_ACP_AWREADY(),
- .S_AXI_ACP_BVALID(),
- .S_AXI_ACP_RLAST(),
- .S_AXI_ACP_RVALID(),
- .S_AXI_ACP_WREADY(),
- .S_AXI_ACP_BRESP(),
- .S_AXI_ACP_RRESP(),
- .S_AXI_ACP_BID(),
- .S_AXI_ACP_RID(),
- .S_AXI_ACP_RDATA(),
- .S_AXI_ACP_ACLK(1'B0),
- .S_AXI_ACP_ARVALID(1'B0),
- .S_AXI_ACP_AWVALID(1'B0),
- .S_AXI_ACP_BREADY(1'B0),
- .S_AXI_ACP_RREADY(1'B0),
- .S_AXI_ACP_WLAST(1'B0),
- .S_AXI_ACP_WVALID(1'B0),
- .S_AXI_ACP_ARID(3'B0),
- .S_AXI_ACP_ARPROT(3'B0),
- .S_AXI_ACP_AWID(3'B0),
- .S_AXI_ACP_AWPROT(3'B0),
- .S_AXI_ACP_WID(3'B0),
- .S_AXI_ACP_ARADDR(32'B0),
- .S_AXI_ACP_AWADDR(32'B0),
- .S_AXI_ACP_ARCACHE(4'B0),
- .S_AXI_ACP_ARLEN(4'B0),
- .S_AXI_ACP_ARQOS(4'B0),
- .S_AXI_ACP_AWCACHE(4'B0),
- .S_AXI_ACP_AWLEN(4'B0),
- .S_AXI_ACP_AWQOS(4'B0),
- .S_AXI_ACP_ARBURST(2'B0),
- .S_AXI_ACP_ARLOCK(2'B0),
- .S_AXI_ACP_ARSIZE(3'B0),
- .S_AXI_ACP_AWBURST(2'B0),
- .S_AXI_ACP_AWLOCK(2'B0),
- .S_AXI_ACP_AWSIZE(3'B0),
- .S_AXI_ACP_ARUSER(5'B0),
- .S_AXI_ACP_AWUSER(5'B0),
- .S_AXI_ACP_WDATA(64'B0),
- .S_AXI_ACP_WSTRB(8'B0),
- .S_AXI_HP0_ARREADY(),
- .S_AXI_HP0_AWREADY(),
- .S_AXI_HP0_BVALID(),
- .S_AXI_HP0_RLAST(),
- .S_AXI_HP0_RVALID(),
- .S_AXI_HP0_WREADY(),
- .S_AXI_HP0_BRESP(),
- .S_AXI_HP0_RRESP(),
- .S_AXI_HP0_BID(),
- .S_AXI_HP0_RID(),
- .S_AXI_HP0_RDATA(),
- .S_AXI_HP0_ACLK(1'B0),
- .S_AXI_HP0_ARVALID(1'B0),
- .S_AXI_HP0_AWVALID(1'B0),
- .S_AXI_HP0_BREADY(1'B0),
- .S_AXI_HP0_RREADY(1'B0),
- .S_AXI_HP0_WLAST(1'B0),
- .S_AXI_HP0_WVALID(1'B0),
- .S_AXI_HP0_ARBURST(2'B0),
- .S_AXI_HP0_ARLOCK(2'B0),
- .S_AXI_HP0_ARSIZE(3'B0),
- .S_AXI_HP0_AWBURST(2'B0),
- .S_AXI_HP0_AWLOCK(2'B0),
- .S_AXI_HP0_AWSIZE(3'B0),
- .S_AXI_HP0_ARPROT(3'B0),
- .S_AXI_HP0_AWPROT(3'B0),
- .S_AXI_HP0_ARADDR(32'B0),
- .S_AXI_HP0_AWADDR(32'B0),
- .S_AXI_HP0_ARCACHE(4'B0),
- .S_AXI_HP0_ARLEN(4'B0),
- .S_AXI_HP0_ARQOS(4'B0),
- .S_AXI_HP0_AWCACHE(4'B0),
- .S_AXI_HP0_AWLEN(4'B0),
- .S_AXI_HP0_AWQOS(4'B0),
- .S_AXI_HP0_ARID(6'B0),
- .S_AXI_HP0_AWID(6'B0),
- .S_AXI_HP0_WID(6'B0),
- .S_AXI_HP0_WDATA(64'B0),
- .S_AXI_HP0_WSTRB(8'B0),
- .S_AXI_HP1_ARREADY(),
- .S_AXI_HP1_AWREADY(),
- .S_AXI_HP1_BVALID(),
- .S_AXI_HP1_RLAST(),
- .S_AXI_HP1_RVALID(),
- .S_AXI_HP1_WREADY(),
- .S_AXI_HP1_BRESP(),
- .S_AXI_HP1_RRESP(),
- .S_AXI_HP1_BID(),
- .S_AXI_HP1_RID(),
- .S_AXI_HP1_RDATA(),
- .S_AXI_HP1_ACLK(1'B0),
- .S_AXI_HP1_ARVALID(1'B0),
- .S_AXI_HP1_AWVALID(1'B0),
- .S_AXI_HP1_BREADY(1'B0),
- .S_AXI_HP1_RREADY(1'B0),
- .S_AXI_HP1_WLAST(1'B0),
- .S_AXI_HP1_WVALID(1'B0),
- .S_AXI_HP1_ARBURST(2'B0),
- .S_AXI_HP1_ARLOCK(2'B0),
- .S_AXI_HP1_ARSIZE(3'B0),
- .S_AXI_HP1_AWBURST(2'B0),
- .S_AXI_HP1_AWLOCK(2'B0),
- .S_AXI_HP1_AWSIZE(3'B0),
- .S_AXI_HP1_ARPROT(3'B0),
- .S_AXI_HP1_AWPROT(3'B0),
- .S_AXI_HP1_ARADDR(32'B0),
- .S_AXI_HP1_AWADDR(32'B0),
- .S_AXI_HP1_ARCACHE(4'B0),
- .S_AXI_HP1_ARLEN(4'B0),
- .S_AXI_HP1_ARQOS(4'B0),
- .S_AXI_HP1_AWCACHE(4'B0),
- .S_AXI_HP1_AWLEN(4'B0),
- .S_AXI_HP1_AWQOS(4'B0),
- .S_AXI_HP1_ARID(6'B0),
- .S_AXI_HP1_AWID(6'B0),
- .S_AXI_HP1_WID(6'B0),
- .S_AXI_HP1_WDATA(64'B0),
- .S_AXI_HP1_WSTRB(8'B0),
- .S_AXI_HP2_ARREADY(),
- .S_AXI_HP2_AWREADY(),
- .S_AXI_HP2_BVALID(),
- .S_AXI_HP2_RLAST(),
- .S_AXI_HP2_RVALID(),
- .S_AXI_HP2_WREADY(),
- .S_AXI_HP2_BRESP(),
- .S_AXI_HP2_RRESP(),
- .S_AXI_HP2_BID(),
- .S_AXI_HP2_RID(),
- .S_AXI_HP2_RDATA(),
- .S_AXI_HP2_ACLK(1'B0),
- .S_AXI_HP2_ARVALID(1'B0),
- .S_AXI_HP2_AWVALID(1'B0),
- .S_AXI_HP2_BREADY(1'B0),
- .S_AXI_HP2_RREADY(1'B0),
- .S_AXI_HP2_WLAST(1'B0),
- .S_AXI_HP2_WVALID(1'B0),
- .S_AXI_HP2_ARBURST(2'B0),
- .S_AXI_HP2_ARLOCK(2'B0),
- .S_AXI_HP2_ARSIZE(3'B0),
- .S_AXI_HP2_AWBURST(2'B0),
- .S_AXI_HP2_AWLOCK(2'B0),
- .S_AXI_HP2_AWSIZE(3'B0),
- .S_AXI_HP2_ARPROT(3'B0),
- .S_AXI_HP2_AWPROT(3'B0),
- .S_AXI_HP2_ARADDR(32'B0),
- .S_AXI_HP2_AWADDR(32'B0),
- .S_AXI_HP2_ARCACHE(4'B0),
- .S_AXI_HP2_ARLEN(4'B0),
- .S_AXI_HP2_ARQOS(4'B0),
- .S_AXI_HP2_AWCACHE(4'B0),
- .S_AXI_HP2_AWLEN(4'B0),
- .S_AXI_HP2_AWQOS(4'B0),
- .S_AXI_HP2_ARID(6'B0),
- .S_AXI_HP2_AWID(6'B0),
- .S_AXI_HP2_WID(6'B0),
- .S_AXI_HP2_WDATA(64'B0),
- .S_AXI_HP2_WSTRB(8'B0),
- .S_AXI_HP3_ARREADY(),
- .S_AXI_HP3_AWREADY(),
- .S_AXI_HP3_BVALID(),
- .S_AXI_HP3_RLAST(),
- .S_AXI_HP3_RVALID(),
- .S_AXI_HP3_WREADY(),
- .S_AXI_HP3_BRESP(),
- .S_AXI_HP3_RRESP(),
- .S_AXI_HP3_BID(),
- .S_AXI_HP3_RID(),
- .S_AXI_HP3_RDATA(),
- .S_AXI_HP3_ACLK(1'B0),
- .S_AXI_HP3_ARVALID(1'B0),
- .S_AXI_HP3_AWVALID(1'B0),
- .S_AXI_HP3_BREADY(1'B0),
- .S_AXI_HP3_RREADY(1'B0),
- .S_AXI_HP3_WLAST(1'B0),
- .S_AXI_HP3_WVALID(1'B0),
- .S_AXI_HP3_ARBURST(2'B0),
- .S_AXI_HP3_ARLOCK(2'B0),
- .S_AXI_HP3_ARSIZE(3'B0),
- .S_AXI_HP3_AWBURST(2'B0),
- .S_AXI_HP3_AWLOCK(2'B0),
- .S_AXI_HP3_AWSIZE(3'B0),
- .S_AXI_HP3_ARPROT(3'B0),
- .S_AXI_HP3_AWPROT(3'B0),
- .S_AXI_HP3_ARADDR(32'B0),
- .S_AXI_HP3_AWADDR(32'B0),
- .S_AXI_HP3_ARCACHE(4'B0),
- .S_AXI_HP3_ARLEN(4'B0),
- .S_AXI_HP3_ARQOS(4'B0),
- .S_AXI_HP3_AWCACHE(4'B0),
- .S_AXI_HP3_AWLEN(4'B0),
- .S_AXI_HP3_AWQOS(4'B0),
- .S_AXI_HP3_ARID(6'B0),
- .S_AXI_HP3_AWID(6'B0),
- .S_AXI_HP3_WID(6'B0),
- .S_AXI_HP3_WDATA(64'B0),
- .S_AXI_HP3_WSTRB(8'B0),
- .FCLK_CLK0(FCLK_CLK0),
-
- .FCLK_CLK1(),
-
- .FCLK_CLK2(),
-
- .FCLK_CLK3(),
- .FCLK_RESET0_N(FCLK_RESET0_N),
- .FCLK_RESET1_N(),
- .FCLK_RESET2_N(),
- .FCLK_RESET3_N(),
- .IRQ_F2P(16'B0),
- .PS_SRSTB(PS_SRSTB),
- .PS_CLK(PS_CLK),
- .PS_PORB(PS_PORB)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v
deleted file mode 100644
index 065a526..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v
+++ /dev/null
@@ -1,74 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:util_vector_logic:2.0
-// IP Revision: 1
-
-`timescale 1ns/1ps
-
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_util_vector_logic_0_0 (
- Op1,
- Op2,
- Res
-);
-
-input wire [0 : 0] Op1;
-input wire [0 : 0] Op2;
-output wire [0 : 0] Res;
-
- util_vector_logic_v2_0_1_util_vector_logic #(
- .C_OPERATION("or"),
- .C_SIZE(1)
- ) inst (
- .Op1(Op1),
- .Op2(Op2),
- .Res(Res)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v
deleted file mode 100644
index 7a36d0d..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v
+++ /dev/null
@@ -1,72 +0,0 @@
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:util_vector_logic:2.0
-// IP Revision: 1
-
-`timescale 1ns/1ps
-
-(* DowngradeIPIdentifiedWarnings = "yes" *)
-module scalp_zynqps_util_vector_logic_1_0 (
- Op1,
- Res
-);
-
-input wire [0 : 0] Op1;
-output wire [0 : 0] Res;
-
- util_vector_logic_v2_0_1_util_vector_logic #(
- .C_OPERATION("not"),
- .C_SIZE(1)
- ) inst (
- .Op1(Op1),
- .Op2(1'B0),
- .Res(Res)
- );
-endmodule
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd
deleted file mode 100644
index e32bf26..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd
+++ /dev/null
@@ -1,62 +0,0 @@
--- (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
---
--- This file contains confidential and proprietary information
--- of Xilinx, Inc. and is protected under U.S. and
--- international copyright and other intellectual property
--- laws.
---
--- DISCLAIMER
--- This disclaimer is not a license and does not grant any
--- rights to the materials distributed herewith. Except as
--- otherwise provided in a valid license issued to you by
--- Xilinx, and to the maximum extent permitted by applicable
--- law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
--- WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
--- AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
--- BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
--- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
--- (2) Xilinx shall not be liable (whether in contract or tort,
--- including negligence, or under any other theory of
--- liability) for any loss or damage of any kind or nature
--- related to, arising under or in connection with these
--- materials, including for any direct, or any indirect,
--- special, incidental, or consequential loss or damage
--- (including loss of data, profits, goodwill, or any type of
--- loss or damage suffered as a result of any action brought
--- by a third party) even if such damage or loss was
--- reasonably foreseeable or Xilinx had been advised of the
--- possibility of the same.
---
--- CRITICAL APPLICATIONS
--- Xilinx products are not designed or intended to be fail-
--- safe, or for use in any application requiring fail-safe
--- performance, such as life-support or safety devices or
--- systems, Class III medical devices, nuclear facilities,
--- applications related to the deployment of airbags, or any
--- other applications that could lead to death, personal
--- injury, or severe property or environmental damage
--- (individually and collectively, "Critical
--- Applications"). Customer assumes the sole risk and
--- liability of any use of Xilinx products in Critical
--- Applications, subject only to applicable laws and
--- regulations governing limitations on product liability.
---
--- THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
--- PART OF THIS FILE AT ALL TIMES.
---
--- DO NOT MODIFY THIS FILE.
-
-LIBRARY ieee;
-USE ieee.std_logic_1164.ALL;
-USE ieee.numeric_std.ALL;
-
-ENTITY scalp_zynqps_vio_0_0 IS
-PORT (
-CLK : IN STD_LOGIC;
-
-probe_out0 : OUT STD_LOGIC_VECTOR(0 DOWNTO 0) := "0"
-);
-END scalp_zynqps_vio_0_0;
-ARCHITECTURE scalp_zynqps_vio_0_0_arch OF scalp_zynqps_vio_0_0 IS
-BEGIN
-END scalp_zynqps_vio_0_0_arch;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd
deleted file mode 100644
index 2212d12..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/bd/scalp_zynqps/2019.2/lin64/.scripts/scalp_zynqps/sim/scalp_zynqps.vhd
+++ /dev/null
@@ -1,361 +0,0 @@
---Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-----------------------------------------------------------------------------------
---Tool Version: Vivado v.2019.2 (lin64) Build 2708876 Wed Nov 6 21:39:14 MST 2019
---Date : Mon Sep 7 11:52:31 2020
---Host : xps13-debian running 64-bit Debian GNU/Linux 10 (buster)
---Command : generate_target scalp_zynqps.bd
---Design : scalp_zynqps
---Purpose : IP block netlist
-----------------------------------------------------------------------------------
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-library UNISIM;
-use UNISIM.VCOMPONENTS.ALL;
-entity scalp_zynqps is
- port (
- DDR_addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_ba : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_cas_n : inout STD_LOGIC;
- DDR_ck_n : inout STD_LOGIC;
- DDR_ck_p : inout STD_LOGIC;
- DDR_cke : inout STD_LOGIC;
- DDR_cs_n : inout STD_LOGIC;
- DDR_dm : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dq : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_dqs_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_dqs_p : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_odt : inout STD_LOGIC;
- DDR_ras_n : inout STD_LOGIC;
- DDR_reset_n : inout STD_LOGIC;
- DDR_we_n : inout STD_LOGIC;
- FIXED_IO_ddr_vrn : inout STD_LOGIC;
- FIXED_IO_ddr_vrp : inout STD_LOGIC;
- FIXED_IO_mio : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- FIXED_IO_ps_clk : inout STD_LOGIC;
- FIXED_IO_ps_porb : inout STD_LOGIC;
- FIXED_IO_ps_srstb : inout STD_LOGIC;
- FclkClk0xCO : out STD_LOGIC;
- FclkReset0xRO : out STD_LOGIC_VECTOR ( 0 to 0 );
- Spi1MOSIxSO : out STD_LOGIC;
- Spi1SSxSO : out STD_LOGIC;
- Spi1SclkxCO : out STD_LOGIC;
- Usb0VBusPwrFaultxSI : in STD_LOGIC
- );
- attribute CORE_GENERATION_INFO : string;
- attribute CORE_GENERATION_INFO of scalp_zynqps : entity is "scalp_zynqps,IP_Integrator,{x_ipVendor=xilinx.com,x_ipLibrary=BlockDiagram,x_ipName=scalp_zynqps,x_ipVersion=1.00.a,x_ipLanguage=VHDL,numBlks=5,numReposBlks=5,numNonXlnxBlks=0,numHierBlks=0,maxHierDepth=0,numSysgenBlks=0,numHlsBlks=0,numHdlrefBlks=0,numPkgbdBlks=0,bdsource=USER,synth_mode=OOC_per_IP}";
- attribute HW_HANDOFF : string;
- attribute HW_HANDOFF of scalp_zynqps : entity is "scalp_zynqps.hwdef";
-end scalp_zynqps;
-
-architecture STRUCTURE of scalp_zynqps is
- component scalp_zynqps_gnd_constant_0 is
- port (
- dout : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_gnd_constant_0;
- component scalp_zynqps_processing_system7_0_0 is
- port (
- SPI1_SCLK_I : in STD_LOGIC;
- SPI1_SCLK_O : out STD_LOGIC;
- SPI1_SCLK_T : out STD_LOGIC;
- SPI1_MOSI_I : in STD_LOGIC;
- SPI1_MOSI_O : out STD_LOGIC;
- SPI1_MOSI_T : out STD_LOGIC;
- SPI1_MISO_I : in STD_LOGIC;
- SPI1_MISO_O : out STD_LOGIC;
- SPI1_MISO_T : out STD_LOGIC;
- SPI1_SS_I : in STD_LOGIC;
- SPI1_SS_O : out STD_LOGIC;
- SPI1_SS1_O : out STD_LOGIC;
- SPI1_SS2_O : out STD_LOGIC;
- SPI1_SS_T : out STD_LOGIC;
- USB0_PORT_INDCTL : out STD_LOGIC_VECTOR ( 1 downto 0 );
- USB0_VBUS_PWRSELECT : out STD_LOGIC;
- USB0_VBUS_PWRFAULT : in STD_LOGIC;
- M_AXI_GP0_ARVALID : out STD_LOGIC;
- M_AXI_GP0_AWVALID : out STD_LOGIC;
- M_AXI_GP0_BREADY : out STD_LOGIC;
- M_AXI_GP0_RREADY : out STD_LOGIC;
- M_AXI_GP0_WLAST : out STD_LOGIC;
- M_AXI_GP0_WVALID : out STD_LOGIC;
- M_AXI_GP0_ARID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_AWID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_WID : out STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_ARBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_ARLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_ARSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_AWBURST : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_AWLOCK : out STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_AWSIZE : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_ARPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_AWPROT : out STD_LOGIC_VECTOR ( 2 downto 0 );
- M_AXI_GP0_ARADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_AWADDR : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_WDATA : out STD_LOGIC_VECTOR ( 31 downto 0 );
- M_AXI_GP0_ARCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ARLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ARQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWCACHE : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWLEN : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_AWQOS : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_WSTRB : out STD_LOGIC_VECTOR ( 3 downto 0 );
- M_AXI_GP0_ACLK : in STD_LOGIC;
- M_AXI_GP0_ARREADY : in STD_LOGIC;
- M_AXI_GP0_AWREADY : in STD_LOGIC;
- M_AXI_GP0_BVALID : in STD_LOGIC;
- M_AXI_GP0_RLAST : in STD_LOGIC;
- M_AXI_GP0_RVALID : in STD_LOGIC;
- M_AXI_GP0_WREADY : in STD_LOGIC;
- M_AXI_GP0_BID : in STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_RID : in STD_LOGIC_VECTOR ( 11 downto 0 );
- M_AXI_GP0_BRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_RRESP : in STD_LOGIC_VECTOR ( 1 downto 0 );
- M_AXI_GP0_RDATA : in STD_LOGIC_VECTOR ( 31 downto 0 );
- FCLK_CLK0 : out STD_LOGIC;
- FCLK_RESET0_N : out STD_LOGIC;
- MIO : inout STD_LOGIC_VECTOR ( 53 downto 0 );
- DDR_CAS_n : inout STD_LOGIC;
- DDR_CKE : inout STD_LOGIC;
- DDR_Clk_n : inout STD_LOGIC;
- DDR_Clk : inout STD_LOGIC;
- DDR_CS_n : inout STD_LOGIC;
- DDR_DRSTB : inout STD_LOGIC;
- DDR_ODT : inout STD_LOGIC;
- DDR_RAS_n : inout STD_LOGIC;
- DDR_WEB : inout STD_LOGIC;
- DDR_BankAddr : inout STD_LOGIC_VECTOR ( 2 downto 0 );
- DDR_Addr : inout STD_LOGIC_VECTOR ( 14 downto 0 );
- DDR_VRN : inout STD_LOGIC;
- DDR_VRP : inout STD_LOGIC;
- DDR_DM : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_DQ : inout STD_LOGIC_VECTOR ( 31 downto 0 );
- DDR_DQS_n : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- DDR_DQS : inout STD_LOGIC_VECTOR ( 3 downto 0 );
- PS_SRSTB : inout STD_LOGIC;
- PS_CLK : inout STD_LOGIC;
- PS_PORB : inout STD_LOGIC
- );
- end component scalp_zynqps_processing_system7_0_0;
- component scalp_zynqps_util_vector_logic_0_0 is
- port (
- Op1 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Op2 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Res : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_util_vector_logic_0_0;
- component scalp_zynqps_util_vector_logic_1_0 is
- port (
- Op1 : in STD_LOGIC_VECTOR ( 0 to 0 );
- Res : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_util_vector_logic_1_0;
- component scalp_zynqps_vio_0_0 is
- port (
- clk : in STD_LOGIC;
- probe_out0 : out STD_LOGIC_VECTOR ( 0 to 0 )
- );
- end component scalp_zynqps_vio_0_0;
- signal USB0_VBUS_PWRFAULT_0_1 : STD_LOGIC;
- signal gnd_constant_dout : STD_LOGIC_VECTOR ( 0 to 0 );
- signal processing_system7_0_DDR_ADDR : STD_LOGIC_VECTOR ( 14 downto 0 );
- signal processing_system7_0_DDR_BA : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal processing_system7_0_DDR_CAS_N : STD_LOGIC;
- signal processing_system7_0_DDR_CKE : STD_LOGIC;
- signal processing_system7_0_DDR_CK_N : STD_LOGIC;
- signal processing_system7_0_DDR_CK_P : STD_LOGIC;
- signal processing_system7_0_DDR_CS_N : STD_LOGIC;
- signal processing_system7_0_DDR_DM : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_DQ : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal processing_system7_0_DDR_DQS_N : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_DQS_P : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal processing_system7_0_DDR_ODT : STD_LOGIC;
- signal processing_system7_0_DDR_RAS_N : STD_LOGIC;
- signal processing_system7_0_DDR_RESET_N : STD_LOGIC;
- signal processing_system7_0_DDR_WE_N : STD_LOGIC;
- signal processing_system7_0_FCLK_CLK0 : STD_LOGIC;
- signal processing_system7_0_FCLK_RESET0_N : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_DDR_VRN : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_DDR_VRP : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_MIO : STD_LOGIC_VECTOR ( 53 downto 0 );
- signal processing_system7_0_FIXED_IO_PS_CLK : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_PS_PORB : STD_LOGIC;
- signal processing_system7_0_FIXED_IO_PS_SRSTB : STD_LOGIC;
- signal processing_system7_0_SPI1_MOSI_O : STD_LOGIC;
- signal processing_system7_0_SPI1_SCLK_O : STD_LOGIC;
- signal processing_system7_0_SPI1_SS_O : STD_LOGIC;
- signal util_vector_logic_0_Res : STD_LOGIC_VECTOR ( 0 to 0 );
- signal util_vector_logic_1_Res : STD_LOGIC_VECTOR ( 0 to 0 );
- signal vio_0_probe_out0 : STD_LOGIC_VECTOR ( 0 to 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_AWVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_BREADY_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_RREADY_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_WLAST_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_WVALID_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MISO_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MISO_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_MOSI_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SCLK_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS1_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS2_O_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_SPI1_SS_T_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED : STD_LOGIC;
- signal NLW_processing_system7_0_M_AXI_GP0_ARADDR_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARBURST_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARCACHE_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARLEN_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARLOCK_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARPROT_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARQOS_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_ARSIZE_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWADDR_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWBURST_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWCACHE_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWLEN_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWLOCK_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWPROT_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWQOS_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_AWSIZE_UNCONNECTED : STD_LOGIC_VECTOR ( 2 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WDATA_UNCONNECTED : STD_LOGIC_VECTOR ( 31 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WID_UNCONNECTED : STD_LOGIC_VECTOR ( 11 downto 0 );
- signal NLW_processing_system7_0_M_AXI_GP0_WSTRB_UNCONNECTED : STD_LOGIC_VECTOR ( 3 downto 0 );
- signal NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED : STD_LOGIC_VECTOR ( 1 downto 0 );
- attribute X_INTERFACE_INFO : string;
- attribute X_INTERFACE_INFO of DDR_cas_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CAS_N";
- attribute X_INTERFACE_INFO of DDR_ck_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CK_N";
- attribute X_INTERFACE_INFO of DDR_ck_p : signal is "xilinx.com:interface:ddrx:1.0 DDR CK_P";
- attribute X_INTERFACE_INFO of DDR_cke : signal is "xilinx.com:interface:ddrx:1.0 DDR CKE";
- attribute X_INTERFACE_INFO of DDR_cs_n : signal is "xilinx.com:interface:ddrx:1.0 DDR CS_N";
- attribute X_INTERFACE_INFO of DDR_odt : signal is "xilinx.com:interface:ddrx:1.0 DDR ODT";
- attribute X_INTERFACE_INFO of DDR_ras_n : signal is "xilinx.com:interface:ddrx:1.0 DDR RAS_N";
- attribute X_INTERFACE_INFO of DDR_reset_n : signal is "xilinx.com:interface:ddrx:1.0 DDR RESET_N";
- attribute X_INTERFACE_INFO of DDR_we_n : signal is "xilinx.com:interface:ddrx:1.0 DDR WE_N";
- attribute X_INTERFACE_INFO of FIXED_IO_ddr_vrn : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRN";
- attribute X_INTERFACE_PARAMETER : string;
- attribute X_INTERFACE_PARAMETER of FIXED_IO_ddr_vrn : signal is "XIL_INTERFACENAME FIXED_IO, CAN_DEBUG false";
- attribute X_INTERFACE_INFO of FIXED_IO_ddr_vrp : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO DDR_VRP";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_clk : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_CLK";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_porb : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_PORB";
- attribute X_INTERFACE_INFO of FIXED_IO_ps_srstb : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO PS_SRSTB";
- attribute X_INTERFACE_INFO of FclkClk0xCO : signal is "xilinx.com:signal:clock:1.0 CLK.FCLKCLK0XCO CLK";
- attribute X_INTERFACE_PARAMETER of FclkClk0xCO : signal is "XIL_INTERFACENAME CLK.FCLKCLK0XCO, CLK_DOMAIN scalp_zynqps_processing_system7_0_0_FCLK_CLK0, FREQ_HZ 125000000, INSERT_VIP 0, PHASE 0.000";
- attribute X_INTERFACE_INFO of DDR_addr : signal is "xilinx.com:interface:ddrx:1.0 DDR ADDR";
- attribute X_INTERFACE_PARAMETER of DDR_addr : signal is "XIL_INTERFACENAME DDR, AXI_ARBITRATION_SCHEME TDM, BURST_LENGTH 8, CAN_DEBUG false, CAS_LATENCY 11, CAS_WRITE_LATENCY 11, CS_ENABLED true, DATA_MASK_ENABLED true, DATA_WIDTH 8, MEMORY_TYPE COMPONENTS, MEM_ADDR_MAP ROW_COLUMN_BANK, SLOT Single, TIMEPERIOD_PS 1250";
- attribute X_INTERFACE_INFO of DDR_ba : signal is "xilinx.com:interface:ddrx:1.0 DDR BA";
- attribute X_INTERFACE_INFO of DDR_dm : signal is "xilinx.com:interface:ddrx:1.0 DDR DM";
- attribute X_INTERFACE_INFO of DDR_dq : signal is "xilinx.com:interface:ddrx:1.0 DDR DQ";
- attribute X_INTERFACE_INFO of DDR_dqs_n : signal is "xilinx.com:interface:ddrx:1.0 DDR DQS_N";
- attribute X_INTERFACE_INFO of DDR_dqs_p : signal is "xilinx.com:interface:ddrx:1.0 DDR DQS_P";
- attribute X_INTERFACE_INFO of FIXED_IO_mio : signal is "xilinx.com:display_processing_system7:fixedio:1.0 FIXED_IO MIO";
-begin
- FclkClk0xCO <= processing_system7_0_FCLK_CLK0;
- FclkReset0xRO(0) <= util_vector_logic_0_Res(0);
- Spi1MOSIxSO <= processing_system7_0_SPI1_MOSI_O;
- Spi1SSxSO <= processing_system7_0_SPI1_SS_O;
- Spi1SclkxCO <= processing_system7_0_SPI1_SCLK_O;
- USB0_VBUS_PWRFAULT_0_1 <= Usb0VBusPwrFaultxSI;
-gnd_constant: component scalp_zynqps_gnd_constant_0
- port map (
- dout(0) => gnd_constant_dout(0)
- );
-processing_system7_0: component scalp_zynqps_processing_system7_0_0
- port map (
- DDR_Addr(14 downto 0) => DDR_addr(14 downto 0),
- DDR_BankAddr(2 downto 0) => DDR_ba(2 downto 0),
- DDR_CAS_n => DDR_cas_n,
- DDR_CKE => DDR_cke,
- DDR_CS_n => DDR_cs_n,
- DDR_Clk => DDR_ck_p,
- DDR_Clk_n => DDR_ck_n,
- DDR_DM(3 downto 0) => DDR_dm(3 downto 0),
- DDR_DQ(31 downto 0) => DDR_dq(31 downto 0),
- DDR_DQS(3 downto 0) => DDR_dqs_p(3 downto 0),
- DDR_DQS_n(3 downto 0) => DDR_dqs_n(3 downto 0),
- DDR_DRSTB => DDR_reset_n,
- DDR_ODT => DDR_odt,
- DDR_RAS_n => DDR_ras_n,
- DDR_VRN => FIXED_IO_ddr_vrn,
- DDR_VRP => FIXED_IO_ddr_vrp,
- DDR_WEB => DDR_we_n,
- FCLK_CLK0 => processing_system7_0_FCLK_CLK0,
- FCLK_RESET0_N => processing_system7_0_FCLK_RESET0_N,
- MIO(53 downto 0) => FIXED_IO_mio(53 downto 0),
- M_AXI_GP0_ACLK => processing_system7_0_FCLK_CLK0,
- M_AXI_GP0_ARADDR(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARADDR_UNCONNECTED(31 downto 0),
- M_AXI_GP0_ARBURST(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARBURST_UNCONNECTED(1 downto 0),
- M_AXI_GP0_ARCACHE(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARCACHE_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_ARLEN(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARLEN_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARLOCK(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARLOCK_UNCONNECTED(1 downto 0),
- M_AXI_GP0_ARPROT(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARPROT_UNCONNECTED(2 downto 0),
- M_AXI_GP0_ARQOS(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARQOS_UNCONNECTED(3 downto 0),
- M_AXI_GP0_ARREADY => '0',
- M_AXI_GP0_ARSIZE(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_ARSIZE_UNCONNECTED(2 downto 0),
- M_AXI_GP0_ARVALID => NLW_processing_system7_0_M_AXI_GP0_ARVALID_UNCONNECTED,
- M_AXI_GP0_AWADDR(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWADDR_UNCONNECTED(31 downto 0),
- M_AXI_GP0_AWBURST(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWBURST_UNCONNECTED(1 downto 0),
- M_AXI_GP0_AWCACHE(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWCACHE_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_AWLEN(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWLEN_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWLOCK(1 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWLOCK_UNCONNECTED(1 downto 0),
- M_AXI_GP0_AWPROT(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWPROT_UNCONNECTED(2 downto 0),
- M_AXI_GP0_AWQOS(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWQOS_UNCONNECTED(3 downto 0),
- M_AXI_GP0_AWREADY => '0',
- M_AXI_GP0_AWSIZE(2 downto 0) => NLW_processing_system7_0_M_AXI_GP0_AWSIZE_UNCONNECTED(2 downto 0),
- M_AXI_GP0_AWVALID => NLW_processing_system7_0_M_AXI_GP0_AWVALID_UNCONNECTED,
- M_AXI_GP0_BID(11 downto 0) => B"000000000000",
- M_AXI_GP0_BREADY => NLW_processing_system7_0_M_AXI_GP0_BREADY_UNCONNECTED,
- M_AXI_GP0_BRESP(1 downto 0) => B"00",
- M_AXI_GP0_BVALID => '0',
- M_AXI_GP0_RDATA(31 downto 0) => B"00000000000000000000000000000000",
- M_AXI_GP0_RID(11 downto 0) => B"000000000000",
- M_AXI_GP0_RLAST => '0',
- M_AXI_GP0_RREADY => NLW_processing_system7_0_M_AXI_GP0_RREADY_UNCONNECTED,
- M_AXI_GP0_RRESP(1 downto 0) => B"00",
- M_AXI_GP0_RVALID => '0',
- M_AXI_GP0_WDATA(31 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WDATA_UNCONNECTED(31 downto 0),
- M_AXI_GP0_WID(11 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WID_UNCONNECTED(11 downto 0),
- M_AXI_GP0_WLAST => NLW_processing_system7_0_M_AXI_GP0_WLAST_UNCONNECTED,
- M_AXI_GP0_WREADY => '0',
- M_AXI_GP0_WSTRB(3 downto 0) => NLW_processing_system7_0_M_AXI_GP0_WSTRB_UNCONNECTED(3 downto 0),
- M_AXI_GP0_WVALID => NLW_processing_system7_0_M_AXI_GP0_WVALID_UNCONNECTED,
- PS_CLK => FIXED_IO_ps_clk,
- PS_PORB => FIXED_IO_ps_porb,
- PS_SRSTB => FIXED_IO_ps_srstb,
- SPI1_MISO_I => gnd_constant_dout(0),
- SPI1_MISO_O => NLW_processing_system7_0_SPI1_MISO_O_UNCONNECTED,
- SPI1_MISO_T => NLW_processing_system7_0_SPI1_MISO_T_UNCONNECTED,
- SPI1_MOSI_I => gnd_constant_dout(0),
- SPI1_MOSI_O => processing_system7_0_SPI1_MOSI_O,
- SPI1_MOSI_T => NLW_processing_system7_0_SPI1_MOSI_T_UNCONNECTED,
- SPI1_SCLK_I => gnd_constant_dout(0),
- SPI1_SCLK_O => processing_system7_0_SPI1_SCLK_O,
- SPI1_SCLK_T => NLW_processing_system7_0_SPI1_SCLK_T_UNCONNECTED,
- SPI1_SS1_O => NLW_processing_system7_0_SPI1_SS1_O_UNCONNECTED,
- SPI1_SS2_O => NLW_processing_system7_0_SPI1_SS2_O_UNCONNECTED,
- SPI1_SS_I => gnd_constant_dout(0),
- SPI1_SS_O => processing_system7_0_SPI1_SS_O,
- SPI1_SS_T => NLW_processing_system7_0_SPI1_SS_T_UNCONNECTED,
- USB0_PORT_INDCTL(1 downto 0) => NLW_processing_system7_0_USB0_PORT_INDCTL_UNCONNECTED(1 downto 0),
- USB0_VBUS_PWRFAULT => USB0_VBUS_PWRFAULT_0_1,
- USB0_VBUS_PWRSELECT => NLW_processing_system7_0_USB0_VBUS_PWRSELECT_UNCONNECTED
- );
-util_vector_logic_0: component scalp_zynqps_util_vector_logic_0_0
- port map (
- Op1(0) => util_vector_logic_1_Res(0),
- Op2(0) => vio_0_probe_out0(0),
- Res(0) => util_vector_logic_0_Res(0)
- );
-util_vector_logic_1: component scalp_zynqps_util_vector_logic_1_0
- port map (
- Op1(0) => processing_system7_0_FCLK_RESET0_N,
- Res(0) => util_vector_logic_1_Res(0)
- );
-vio_0: component scalp_zynqps_vio_0_0
- port map (
- clk => processing_system7_0_FCLK_CLK0,
- probe_out0(0) => vio_0_probe_out0(0)
- );
-end STRUCTURE;
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/mem_init_files/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/README.txt
deleted file mode 100644
index 3cd3d87..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/README.txt
+++ /dev/null
@@ -1,83 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required
-# to simulate the design for a simulator, the directory structure
-# and the generated exported files.
-#
-################################################################################
-
-1. Simulate Design
-
-To simulate design, cd to the simulator directory and execute the script.
-
-For example:-
-
-% cd questa
-% ./top.sh
-
-The export simulation flow requires the Xilinx pre-compiled simulation library
-components for the target simulator. These components are referred using the
-'-lib_map_path' switch. If this switch is specified, then the export simulation
-will automatically set this library path in the generated script and update,
-copy the simulator setup file(s) in the exported directory.
-
-If '-lib_map_path' is not specified, then the pre-compiled simulation library
-information will not be included in the exported scripts and that may cause
-simulation errors when running this script. Alternatively, you can provide the
-library information using this switch while executing the generated script.
-
-For example:-
-
-% ./top.sh -lib_map_path /design/questa/clibs
-
-Please refer to the generated script header 'Prerequisite' section for more details.
-
-2. Directory Structure
-
-By default, if the -directory switch is not specified, export_simulation will
-create the following directory structure:-
-
-<current_working_directory>/export_sim/<simulator>
-
-For example, if the current working directory is /tmp/test, export_simulation
-will create the following directory path:-
-
-/tmp/test/export_sim/questa
-
-If -directory switch is specified, export_simulation will create a simulator
-sub-directory under the specified directory path.
-
-For example, 'export_simulation -directory /tmp/test/my_test_area/func_sim'
-command will create the following directory:-
-
-/tmp/test/my_test_area/func_sim/questa
-
-By default, if -simulator is not specified, export_simulation will create a
-simulator sub-directory for each simulator and export the files for each simulator
-in this sub-directory respectively.
-
-IMPORTANT: Please note that the simulation library path must be specified manually
-in the generated script for the respective simulator. Please refer to the generated
-script header 'Prerequisite' section for more details.
-
-3. Exported script and files
-
-Export simulation will create the driver shell script, setup files and copy the
-design sources in the output directory path.
-
-By default, when the -script_name switch is not specified, export_simulation will
-create the following script name:-
-
-<simulation_top>.sh (Unix)
-When exporting the files for an IP using the -of_objects switch, export_simulation
-will create the following script name:-
-
-<ip-name>.sh (Unix)
-Export simulation will create the setup files for the target simulator specified
-with the -simulator switch.
-
-For example, if the target simulator is "ies", export_simulation will create the
-'cds.lib', 'hdl.var' and design library diectories and mappings in the 'cds.lib'
-file.
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/README.txt
deleted file mode 100644
index 00160c0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/README.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'compile', 'elaborate' and 'simulate' functions
-implemented in the script file for the 3-step flow. These functions are called
-from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/file_info.txt
deleted file mode 100644
index 2af2242..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps.sh
deleted file mode 100755
index 8db0d04..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps.sh
+++ /dev/null
@@ -1,152 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Aldec Active-HDL Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- compile
- simulate
-}
-
-# RUN_STEP: <compile>
-compile()
-{
- # Compile design files
- source compile.do 2>&1 | tee -a compile.log
-
-}
-
-# RUN_STEP: <simulate>
-simulate()
-{
- runvsimsa -l simulate.log -do "do {simulate.do}"
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
- map_setup_file $2
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- map_setup_file $2
- esac
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Map library.cfg file
-map_setup_file()
-{
- file="library.cfg"
- lib_map_path=""
- if [[ ($1 != "") ]]; then
- lib_map_path="$1"
- fi
- if [[ ($lib_map_path != "") ]]; then
- src_file="$lib_map_path/$file"
- if [[ -e $src_file ]]; then
- vmap -link $lib_map_path
- fi
- fi
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(compile.log elaboration.log simulate.log dataset.asdb work activehdl)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/activehdl/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/README.txt
deleted file mode 100644
index 5029d36..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/README.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'execute' function for the single-step flow. This
-function is called from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/file_info.txt
deleted file mode 100644
index dbced05..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps.sh
deleted file mode 100755
index 4285e73..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps.sh
+++ /dev/null
@@ -1,184 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Cadence Incisive Enterprise Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-# Directory path for design sources and include directories (if any) wrt this path
-ref_dir="."
-
-# Override directory with 'export_sim_ref_dir' env path value if set in the shell
-if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then
- ref_dir="$export_sim_ref_dir"
-fi
-
-# Set the compiled library directory
-ref_lib_dir="."
-
-# Command line options
-irun_opts="-64bit -v93 -relax -access +rwc -namemap_mixgen"
-
-# Design libraries
-design_libs=(xilinx_vip xlconstant_v1_1_6 xil_defaultlib axi_infrastructure_v1_1_0 axi_vip_v1_1_6 processing_system7_vip_v1_0_8 util_vector_logic_v2_0_1)
-
-# Simulation root library directory
-sim_lib_dir="ies_lib"
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- execute
-}
-
-# RUN_STEP: <execute>
-execute()
-{
- irun $irun_opts \
- -reflib "$ref_lib_dir/unisim:unisim" \
- -reflib "$ref_lib_dir/unisims_ver:unisims_ver" \
- -reflib "$ref_lib_dir/secureip:secureip" \
- -reflib "$ref_lib_dir/unimacro:unimacro" \
- -reflib "$ref_lib_dir/unimacro_ver:unimacro_ver" \
- -top xil_defaultlib.scalp_zynqps \
- -f run.f \
- -top glbl \
- glbl.v \
- +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" \
- +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" \
- +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include"
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- else
- ref_lib_dir=$2
- fi
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- esac
-
- create_lib_dir
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Create design library directory paths
-create_lib_dir()
-{
- if [[ -e $sim_lib_dir ]]; then
- rm -rf $sim_lib_dir
- fi
-
- for (( i=0; i<${#design_libs[*]}; i++ )); do
- lib="${design_libs[i]}"
- lib_dir="$sim_lib_dir/$lib"
- if [[ ! -e $lib_dir ]]; then
- mkdir -p $lib_dir
- fi
- done
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(ncsim.key irun.key irun.log waves.shm irun.history .simvision INCA_libs)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-
- create_lib_dir
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/ies/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/README.txt
deleted file mode 100644
index 00160c0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/README.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'compile', 'elaborate' and 'simulate' functions
-implemented in the script file for the 3-step flow. These functions are called
-from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/file_info.txt
deleted file mode 100644
index 2af2242..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps.sh
deleted file mode 100755
index e3676a8..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps.sh
+++ /dev/null
@@ -1,167 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Mentor Graphics ModelSim Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- compile
- simulate
-}
-
-# RUN_STEP: <compile>
-compile()
-{
- # Compile design files
- source compile.do 2>&1 | tee -a compile.log
-
-}
-
-# RUN_STEP: <simulate>
-simulate()
-{
- vsim -64 -c -do "do {simulate.do}" -l simulate.log
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
- copy_setup_file $2
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- copy_setup_file $2
- esac
-
- create_lib_dir
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Copy modelsim.ini file
-copy_setup_file()
-{
- file="modelsim.ini"
- if [[ ($1 != "") ]]; then
- lib_map_path="$1"
- else
- lib_map_path="/home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/compile_simlib/modelsim"
- fi
- if [[ ($lib_map_path != "") ]]; then
- src_file="$lib_map_path/$file"
- cp $src_file .
- fi
-}
-
-# Create design library directory
-create_lib_dir()
-{
- lib_dir="modelsim_lib"
- if [[ -e $lib_dir ]]; then
- rm -rf $lib_dir
- fi
-
- mkdir $lib_dir
-
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(compile.log elaborate.log simulate.log vsim.wlf modelsim_lib)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-
- create_lib_dir
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/modelsim/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/README.txt
deleted file mode 100644
index 00160c0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/README.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'compile', 'elaborate' and 'simulate' functions
-implemented in the script file for the 3-step flow. These functions are called
-from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/file_info.txt
deleted file mode 100644
index 2af2242..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps.sh
deleted file mode 100755
index 761bbdd..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps.sh
+++ /dev/null
@@ -1,174 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Mentor Graphics Questa Advanced Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- compile
- elaborate
- simulate
-}
-
-# RUN_STEP: <compile>
-compile()
-{
- # Compile design files
- source compile.do 2>&1 | tee -a compile.log
-
-}
-
-# RUN_STEP: <elaborate>
-elaborate()
-{
- source elaborate.do 2>&1 | tee -a elaborate.log
-}
-
-# RUN_STEP: <simulate>
-simulate()
-{
- vsim -64 -c -do "do {simulate.do}" -l simulate.log
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
- copy_setup_file $2
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- copy_setup_file $2
- esac
-
- create_lib_dir
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Copy modelsim.ini file
-copy_setup_file()
-{
- file="modelsim.ini"
- if [[ ($1 != "") ]]; then
- lib_map_path="$1"
- else
- lib_map_path="/home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/compile_simlib/questa"
- fi
- if [[ ($lib_map_path != "") ]]; then
- src_file="$lib_map_path/$file"
- cp $src_file .
- fi
-}
-
-# Create design library directory
-create_lib_dir()
-{
- lib_dir="questa_lib"
- if [[ -e $lib_dir ]]; then
- rm -rf $lib_dir
- fi
-
- mkdir $lib_dir
-
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(compile.log elaborate.log simulate.log vsim.wlf questa_lib)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-
- create_lib_dir
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/questa/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/README.txt
deleted file mode 100644
index 00160c0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/README.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'compile', 'elaborate' and 'simulate' functions
-implemented in the script file for the 3-step flow. These functions are called
-from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/file_info.txt
deleted file mode 100644
index 2af2242..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps.sh
deleted file mode 100755
index 0c47f84..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps.sh
+++ /dev/null
@@ -1,153 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Aldec Riviera-PRO Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- compile
- simulate
-}
-
-# RUN_STEP: <compile>
-compile()
-{
- # Compile design files
- source compile.do 2>&1 | tee -a compile.log
-
-}
-
-# RUN_STEP: <simulate>
-simulate()
-{
- runvsimsa -l simulate.log -do "do {simulate.do}"
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
- map_setup_file $2
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- map_setup_file $2
- esac
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Map library.cfg file
-map_setup_file()
-{
- file="library.cfg"
- if [[ ($1 != "") ]]; then
- lib_map_path="$1"
- else
- lib_map_path="/home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/compile_simlib/riviera"
- fi
- if [[ ($lib_map_path != "") ]]; then
- src_file="$lib_map_path/$file"
- if [[ -e $src_file ]]; then
- vmap -link $lib_map_path
- fi
- fi
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(compile.log elaboration.log simulate.log dataset.asdb work riviera)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/riviera/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/README.txt
deleted file mode 100644
index 00160c0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/README.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'compile', 'elaborate' and 'simulate' functions
-implemented in the script file for the 3-step flow. These functions are called
-from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/file_info.txt
deleted file mode 100644
index dbced05..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps.sh
deleted file mode 100755
index 1b1eb0d..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps.sh
+++ /dev/null
@@ -1,267 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Synopsys Verilog Compiler Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-# Directory path for design sources and include directories (if any) wrt this path
-ref_dir="."
-
-# Override directory with 'export_sim_ref_dir' env path value if set in the shell
-if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then
- ref_dir="$export_sim_ref_dir"
-fi
-
-# Command line options
-vlogan_opts="-full64"
-vhdlan_opts="-full64"
-vcs_elab_opts="-full64 -debug_pp -t ps -licqueue -l elaborate.log"
-vcs_sim_opts="-ucli -licqueue -l simulate.log"
-
-# Design libraries
-design_libs=(xilinx_vip xlconstant_v1_1_6 xil_defaultlib axi_infrastructure_v1_1_0 axi_vip_v1_1_6 processing_system7_vip_v1_0_8 util_vector_logic_v2_0_1)
-
-# Simulation root library directory
-sim_lib_dir="vcs_lib"
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- compile
- elaborate
- simulate
-}
-
-# RUN_STEP: <compile>
-compile()
-{
- # Compile design files
- vlogan -work xilinx_vip $vlogan_opts -sverilog +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv" \
- "/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work xlconstant_v1_1_6 $vlogan_opts +v2k +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work xil_defaultlib $vlogan_opts +v2k +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work axi_infrastructure_v1_1_0 $vlogan_opts +v2k +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work axi_vip_v1_1_6 $vlogan_opts -sverilog +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work processing_system7_vip_v1_0_8 $vlogan_opts -sverilog +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work xil_defaultlib $vlogan_opts +v2k +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work util_vector_logic_v2_0_1 $vlogan_opts +v2k +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v" \
- 2>&1 | tee -a vlogan.log
-
- vlogan -work xil_defaultlib $vlogan_opts +v2k +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v" \
- 2>&1 | tee -a vlogan.log
-
- vhdlan -work xil_defaultlib $vhdlan_opts \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd" \
- "$ref_dir/../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd" \
- 2>&1 | tee -a vhdlan.log
-
-
- vlogan -work xil_defaultlib $vlogan_opts +v2k \
- glbl.v \
- 2>&1 | tee -a vlogan.log
-
-}
-
-# RUN_STEP: <elaborate>
-elaborate()
-{
- vcs $vcs_elab_opts xil_defaultlib.scalp_zynqps xil_defaultlib.glbl -o scalp_zynqps_simv
-}
-
-# RUN_STEP: <simulate>
-simulate()
-{
- ./scalp_zynqps_simv $vcs_sim_opts -do simulate.do
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
- create_lib_mappings $2
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- create_lib_mappings $2
- esac
-
- create_lib_dir
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Define design library mappings
-create_lib_mappings()
-{
- file="synopsys_sim.setup"
- if [[ -e $file ]]; then
- if [[ ($1 == "") ]]; then
- return
- else
- rm -rf $file
- fi
- fi
-
- touch $file
-
- if [[ ($1 != "") ]]; then
- lib_map_path="$1"
- else
- lib_map_path="/home/jo/Documents/Projets/Hepia/scalp_firmware/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.cache/compile_simlib/vcs"
- fi
-
- for (( i=0; i<${#design_libs[*]}; i++ )); do
- lib="${design_libs[i]}"
- mapping="$lib:$sim_lib_dir/$lib"
- echo $mapping >> $file
- done
-
- if [[ ($lib_map_path != "") ]]; then
- incl_ref="OTHERS=$lib_map_path/synopsys_sim.setup"
- echo $incl_ref >> $file
- fi
-}
-
-# Create design library directory paths
-create_lib_dir()
-{
- if [[ -e $sim_lib_dir ]]; then
- rm -rf $sim_lib_dir
- fi
-
- for (( i=0; i<${#design_libs[*]}; i++ )); do
- lib="${design_libs[i]}"
- lib_dir="$sim_lib_dir/$lib"
- if [[ ! -e $lib_dir ]]; then
- mkdir -p $lib_dir
- fi
- done
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(ucli.key scalp_zynqps_simv vlogan.log vhdlan.log compile.log elaborate.log simulate.log .vlogansetup.env .vlogansetup.args .vcs_lib_lock scirocco_command.log 64 AN.DB csrc scalp_zynqps_simv.daidir)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-
- create_lib_dir
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/vcs/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/README.txt
deleted file mode 100644
index 5029d36..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/README.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'execute' function for the single-step flow. This
-function is called from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/file_info.txt
deleted file mode 100644
index dbced05..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/file_info.txt
+++ /dev/null
@@ -1,21 +0,0 @@
-axi4stream_vip_axi4streampc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_axi4streampc.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_axi4pc.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_axi4pc.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xil_common_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/xil_common_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_pkg.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_pkg.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi4stream_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi4stream_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/axi_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-clk_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/clk_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-rst_vip_if.sv,systemverilog,xilinx_vip,../../../../../../../../../../../../../opt/Xilinx/Vivado/2019.2/data/xilinx_vip/hdl/rst_vip_if.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-xlconstant_v1_1_vl_rfs.v,verilog,xlconstant_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/34f7/hdl/xlconstant_v1_1_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_infrastructure_v1_1_vl_rfs.v,verilog,axi_infrastructure_v1_1_0,../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl/axi_infrastructure_v1_1_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-axi_vip_v1_1_vl_rfs.sv,systemverilog,axi_vip_v1_1_6,../../../../../.scripts/scalp_zynqps/ipshared/dc12/hdl/axi_vip_v1_1_vl_rfs.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-processing_system7_vip_v1_0_vl_rfs.sv,systemverilog,processing_system7_vip_v1_0_8,../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl/processing_system7_vip_v1_0_vl_rfs.sv,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-util_vector_logic_v2_0_vl_rfs.v,verilog,util_vector_logic_v2_0_1,../../../../../.scripts/scalp_zynqps/ipshared/2137/hdl/util_vector_logic_v2_0_vl_rfs.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool> qemu_rst;
- void start_of_simulation();
-
- xsc::common_cpp::properties prop;
-
-};
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/ps7_init.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/ps7_init.tcl
deleted file mode 100755
index 304b14b..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/ps7_init.tcl
+++ /dev/null
@@ -1,835 +0,0 @@
-proc ps7_pll_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_3_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x0007FFFF 0x00001079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0x7FDFFFFC 0x270872B0
- mask_write 0XF8006024 0x0FFFFFC3 0x00000000
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00000003 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x0003F03F 0x0003C008
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x00010000 0x00000000
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x00000200 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFCF 0x40000001
- mask_write 0XF800611C 0x7FFFFFCF 0x40000001
- mask_write 0XF8006120 0x7FFFFFCF 0x40000000
- mask_write 0XF8006124 0x7FFFFFCF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0x6FFFFEFE 0x00040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000703FF 0x000003FF
- mask_write 0XF800620C 0x000703FF 0x000003FF
- mask_write 0XF8006210 0x000703FF 0x000003FF
- mask_write 0XF8006214 0x000703FF 0x000003FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF5 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000001 0x00000001
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FEFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x000003FF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x000003FF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_3_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_3_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_2_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF8006078 0x03FFFFFF 0x00455111
- mask_write 0XF800607C 0x000FFFFF 0x00032222
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x00007FFF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_2_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_2_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-proc ps7_pll_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000110 0x003FFFF0 0x001452C0
- mask_write 0XF8000100 0x0007F000 0x0001E000
- mask_write 0XF8000100 0x00000010 0x00000010
- mask_write 0XF8000100 0x00000001 0x00000001
- mask_write 0XF8000100 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000001
- mask_write 0XF8000100 0x00000010 0x00000000
- mask_write 0XF8000120 0x1F003F30 0x1F000200
- mask_write 0XF8000114 0x003FFFF0 0x001F42C0
- mask_write 0XF8000104 0x0007F000 0x00014000
- mask_write 0XF8000104 0x00000010 0x00000010
- mask_write 0XF8000104 0x00000001 0x00000001
- mask_write 0XF8000104 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000002
- mask_write 0XF8000104 0x00000010 0x00000000
- mask_write 0XF8000124 0xFFF00003 0x0C200003
- mask_write 0XF8000118 0x003FFFF0 0x00113220
- mask_write 0XF8000108 0x0007F000 0x00023000
- mask_write 0XF8000108 0x00000010 0x00000010
- mask_write 0XF8000108 0x00000001 0x00000001
- mask_write 0XF8000108 0x00000001 0x00000000
- mask_poll 0XF800010C 0x00000004
- mask_write 0XF8000108 0x00000010 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_clock_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000128 0x03F03F01 0x00203101
- mask_write 0XF8000138 0x00000011 0x00000001
- mask_write 0XF8000140 0x03F03F71 0x00100E01
- mask_write 0XF800014C 0x00003F31 0x00000D01
- mask_write 0XF8000150 0x00003F33 0x00001202
- mask_write 0XF8000154 0x00003F33 0x00001203
- mask_write 0XF8000158 0x00003F33 0x00000B03
- mask_write 0XF800015C 0x03F03F33 0x00101202
- mask_write 0XF8000160 0x007F007F 0x00000000
- mask_write 0XF8000168 0x00003F31 0x00000901
- mask_write 0XF8000170 0x03F03F30 0x00200700
- mask_write 0XF80001C4 0x00000001 0x00000001
- mask_write 0XF800012C 0x01FFCCCD 0x01FEC84D
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_ddr_init_data_1_0 {} {
- mask_write 0XF8006000 0x0001FFFF 0x00000084
- mask_write 0XF8006004 0x1FFFFFFF 0x00081079
- mask_write 0XF8006008 0x03FFFFFF 0x03C0780F
- mask_write 0XF800600C 0x03FFFFFF 0x02001001
- mask_write 0XF8006010 0x03FFFFFF 0x00014001
- mask_write 0XF8006014 0x001FFFFF 0x00041419
- mask_write 0XF8006018 0xF7FFFFFF 0x44A250D2
- mask_write 0XF800601C 0xFFFFFFFF 0x720238E5
- mask_write 0XF8006020 0xFFFFFFFC 0x272872B0
- mask_write 0XF8006024 0x0FFFFFFF 0x0000003C
- mask_write 0XF8006028 0x00003FFF 0x00002007
- mask_write 0XF800602C 0xFFFFFFFF 0x00000008
- mask_write 0XF8006030 0xFFFFFFFF 0x00040930
- mask_write 0XF8006034 0x13FF3FFF 0x00011564
- mask_write 0XF8006038 0x00001FC3 0x00000000
- mask_write 0XF800603C 0x000FFFFF 0x00000666
- mask_write 0XF8006040 0xFFFFFFFF 0xFFFF0000
- mask_write 0XF8006044 0x0FFFFFFF 0x0FF55555
- mask_write 0XF8006048 0x3FFFFFFF 0x0003C248
- mask_write 0XF8006050 0xFF0F8FFF 0x77010800
- mask_write 0XF8006058 0x0001FFFF 0x00000101
- mask_write 0XF800605C 0x0000FFFF 0x00005003
- mask_write 0XF8006060 0x000017FF 0x0000003E
- mask_write 0XF8006064 0x00021FE0 0x00020000
- mask_write 0XF8006068 0x03FFFFFF 0x00284141
- mask_write 0XF800606C 0x0000FFFF 0x00001610
- mask_write 0XF80060A0 0x00FFFFFF 0x00008000
- mask_write 0XF80060A4 0xFFFFFFFF 0x10200802
- mask_write 0XF80060A8 0x0FFFFFFF 0x0620BEBC
- mask_write 0XF80060AC 0x000001FF 0x000001EA
- mask_write 0XF80060B0 0x1FFFFFFF 0x1CFFFFFF
- mask_write 0XF80060B4 0x000007FF 0x00000200
- mask_write 0XF80060B8 0x01FFFFFF 0x00200066
- mask_write 0XF80060C4 0x00000003 0x00000000
- mask_write 0XF80060C8 0x000000FF 0x00000000
- mask_write 0XF80060DC 0x00000001 0x00000000
- mask_write 0XF80060F0 0x0000FFFF 0x00000000
- mask_write 0XF80060F4 0x0000000F 0x00000008
- mask_write 0XF8006114 0x000000FF 0x00000000
- mask_write 0XF8006118 0x7FFFFFFF 0x40000001
- mask_write 0XF800611C 0x7FFFFFFF 0x40000001
- mask_write 0XF8006120 0x7FFFFFFF 0x40000000
- mask_write 0XF8006124 0x7FFFFFFF 0x40000000
- mask_write 0XF800612C 0x000FFFFF 0x00028000
- mask_write 0XF8006130 0x000FFFFF 0x00028000
- mask_write 0XF8006134 0x000FFFFF 0x00028000
- mask_write 0XF8006138 0x000FFFFF 0x00028000
- mask_write 0XF8006140 0x000FFFFF 0x00000035
- mask_write 0XF8006144 0x000FFFFF 0x00000035
- mask_write 0XF8006148 0x000FFFFF 0x00000035
- mask_write 0XF800614C 0x000FFFFF 0x00000035
- mask_write 0XF8006154 0x000FFFFF 0x00000080
- mask_write 0XF8006158 0x000FFFFF 0x00000080
- mask_write 0XF800615C 0x000FFFFF 0x00000080
- mask_write 0XF8006160 0x000FFFFF 0x00000080
- mask_write 0XF8006168 0x001FFFFF 0x000000F5
- mask_write 0XF800616C 0x001FFFFF 0x000000F5
- mask_write 0XF8006170 0x001FFFFF 0x000000F5
- mask_write 0XF8006174 0x001FFFFF 0x000000F5
- mask_write 0XF800617C 0x000FFFFF 0x000000C0
- mask_write 0XF8006180 0x000FFFFF 0x000000C0
- mask_write 0XF8006184 0x000FFFFF 0x000000C0
- mask_write 0XF8006188 0x000FFFFF 0x000000C0
- mask_write 0XF8006190 0xFFFFFFFF 0x10040080
- mask_write 0XF8006194 0x000FFFFF 0x0001FC82
- mask_write 0XF8006204 0xFFFFFFFF 0x00000000
- mask_write 0XF8006208 0x000F03FF 0x000803FF
- mask_write 0XF800620C 0x000F03FF 0x000803FF
- mask_write 0XF8006210 0x000F03FF 0x000803FF
- mask_write 0XF8006214 0x000F03FF 0x000803FF
- mask_write 0XF8006218 0x000F03FF 0x000003FF
- mask_write 0XF800621C 0x000F03FF 0x000003FF
- mask_write 0XF8006220 0x000F03FF 0x000003FF
- mask_write 0XF8006224 0x000F03FF 0x000003FF
- mask_write 0XF80062A8 0x00000FF7 0x00000000
- mask_write 0XF80062AC 0xFFFFFFFF 0x00000000
- mask_write 0XF80062B0 0x003FFFFF 0x00005115
- mask_write 0XF80062B4 0x0003FFFF 0x0000119E
- mask_poll 0XF8000B74 0x00002000
- mask_write 0XF8006000 0x0001FFFF 0x00000085
- mask_poll 0XF8006054 0x00000007
-}
-proc ps7_mio_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B40 0x00000FFF 0x00000600
- mask_write 0XF8000B44 0x00000FFF 0x00000600
- mask_write 0XF8000B48 0x00000FFF 0x00000672
- mask_write 0XF8000B4C 0x00000FFF 0x00000800
- mask_write 0XF8000B50 0x00000FFF 0x00000674
- mask_write 0XF8000B54 0x00000FFF 0x00000800
- mask_write 0XF8000B58 0x00000FFF 0x00000600
- mask_write 0XF8000B5C 0xFFFFFFFF 0x0018C068
- mask_write 0XF8000B60 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B64 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B68 0xFFFFFFFF 0x00F98068
- mask_write 0XF8000B6C 0x000073FF 0x00000220
- mask_write 0XF8000B70 0x00000021 0x00000021
- mask_write 0XF8000B70 0x00000021 0x00000020
- mask_write 0XF8000B70 0x07FFFFFF 0x00000823
- mask_write 0XF8000700 0x00003FFF 0x00001600
- mask_write 0XF8000704 0x00003FFF 0x00001602
- mask_write 0XF8000708 0x00003FFF 0x00000602
- mask_write 0XF800070C 0x00003FFF 0x00000602
- mask_write 0XF8000710 0x00003FFF 0x00000602
- mask_write 0XF8000714 0x00003FFF 0x00000602
- mask_write 0XF8000718 0x00003FFF 0x00000602
- mask_write 0XF800071C 0x00003FFF 0x00000600
- mask_write 0XF8000720 0x00003FFF 0x00000600
- mask_write 0XF8000724 0x00003F01 0x00001601
- mask_write 0XF8000728 0x00003FFF 0x00001680
- mask_write 0XF800072C 0x00003FFF 0x00001680
- mask_write 0XF8000730 0x00003FFF 0x00001680
- mask_write 0XF8000734 0x00003FFF 0x00001680
- mask_write 0XF8000738 0x00003FFF 0x00001680
- mask_write 0XF800073C 0x00003FFF 0x00001680
- mask_write 0XF8000740 0x00003FFF 0x00001402
- mask_write 0XF8000744 0x00003FFF 0x00001402
- mask_write 0XF8000748 0x00003FFF 0x00001402
- mask_write 0XF800074C 0x00003FFF 0x00001402
- mask_write 0XF8000750 0x00003FFF 0x00001402
- mask_write 0XF8000754 0x00003FFF 0x00001402
- mask_write 0XF8000758 0x00003FFF 0x00001403
- mask_write 0XF800075C 0x00003FFF 0x00001403
- mask_write 0XF8000760 0x00003FFF 0x00001403
- mask_write 0XF8000764 0x00003FFF 0x00001403
- mask_write 0XF8000768 0x00003FFF 0x00001403
- mask_write 0XF800076C 0x00003FFF 0x00001403
- mask_write 0XF8000770 0x00003FFF 0x00001404
- mask_write 0XF8000774 0x00003FFF 0x00001405
- mask_write 0XF8000778 0x00003FFF 0x00001404
- mask_write 0XF800077C 0x00003FFF 0x00001405
- mask_write 0XF8000780 0x00003FFF 0x00001404
- mask_write 0XF8000784 0x00003FFF 0x00001404
- mask_write 0XF8000788 0x00003FFF 0x00001404
- mask_write 0XF800078C 0x00003FFF 0x00001404
- mask_write 0XF8000790 0x00003FFF 0x00001405
- mask_write 0XF8000794 0x00003FFF 0x00001404
- mask_write 0XF8000798 0x00003FFF 0x00001404
- mask_write 0XF800079C 0x00003FFF 0x00001404
- mask_write 0XF80007A0 0x00003FFF 0x000014A0
- mask_write 0XF80007A4 0x00003FFF 0x000014A0
- mask_write 0XF80007A8 0x00003FFF 0x000014A0
- mask_write 0XF80007AC 0x00003FFF 0x00001400
- mask_write 0XF80007B0 0x00003FFF 0x00001400
- mask_write 0XF80007B4 0x00003FFF 0x000014A0
- mask_write 0XF80007B8 0x00003FFF 0x000014E1
- mask_write 0XF80007BC 0x00003FFF 0x000014E0
- mask_write 0XF80007C0 0x00003FFF 0x000014E0
- mask_write 0XF80007C4 0x00003FFF 0x000014E1
- mask_write 0XF80007C8 0x00003FFF 0x00001440
- mask_write 0XF80007CC 0x00003FFF 0x00001440
- mask_write 0XF80007D0 0x00003FFF 0x00001420
- mask_write 0XF80007D4 0x00003FFF 0x00001421
- mask_write 0XF8000834 0x003F003F 0x00090039
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_peripherals_init_data_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000B48 0x00000180 0x00000180
- mask_write 0XF8000B4C 0x00000180 0x00000000
- mask_write 0XF8000B50 0x00000180 0x00000180
- mask_write 0XF8000B54 0x00000180 0x00000000
- mwr -force 0XF8000004 0x0000767B
- mask_write 0XE0001034 0x000000FF 0x00000006
- mask_write 0XE0001018 0x0000FFFF 0x0000007C
- mask_write 0XE0001000 0x000001FF 0x00000017
- mask_write 0XE0001004 0x00000FFF 0x00000020
- mask_write 0XE0000034 0x000000FF 0x00000006
- mask_write 0XE0000018 0x0000FFFF 0x0000007C
- mask_write 0XE0000000 0x000001FF 0x00000017
- mask_write 0XE0000004 0x00000FFF 0x00000020
- mask_write 0XE000D000 0x00080000 0x00080000
- mask_write 0XF8007000 0x20000000 0x00000000
-}
-proc ps7_post_config_1_0 {} {
- mwr -force 0XF8000008 0x0000DF0D
- mask_write 0XF8000900 0x0000000F 0x0000000F
- mask_write 0XF8000240 0xFFFFFFFF 0x00000000
- mwr -force 0XF8000004 0x0000767B
-}
-proc ps7_debug_1_0 {} {
- mwr -force 0XF8898FB0 0xC5ACCE55
- mwr -force 0XF8899FB0 0xC5ACCE55
- mwr -force 0XF8809FB0 0xC5ACCE55
-}
-set PCW_SILICON_VER_1_0 "0x0"
-set PCW_SILICON_VER_2_0 "0x1"
-set PCW_SILICON_VER_3_0 "0x2"
-set APU_FREQ 750000000
-
-
-
-proc mask_poll { addr mask } {
- set count 1
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- while { $maskedval == 0 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval & $mask}]
- set count [ expr { $count + 1 } ]
- if { $count == 100000000 } {
- puts "Timeout Reached. Mask poll failed at ADDRESS: $addr MASK: $mask"
- break
- }
- }
-}
-
-
-
-proc mask_delay { addr val } {
- set delay [ get_number_of_cycles_for_delay $val ]
- perf_reset_and_start_timer
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- while { $maskedval == 1 } {
- set curval "0x[string range [mrd $addr] end-8 end]"
- set maskedval [expr {$curval < $delay}]
- }
- perf_reset_clock
-}
-
-proc ps_version { } {
- set si_ver "0x[string range [mrd 0xF8007080] end-8 end]"
- set mask_sil_ver "0x[expr {$si_ver >> 28}]"
- return $mask_sil_ver;
-}
-
-proc ps7_post_config {} {
- set saved_mode [configparams force-mem-accesses]
- configparams force-mem-accesses 1
-
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_post_config_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_post_config_2_0
- } else {
- ps7_post_config_3_0
- }
- configparams force-mem-accesses $saved_mode
-}
-
-proc ps7_debug {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
-
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_debug_1_0
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_debug_2_0
- } else {
- ps7_debug_3_0
- }
-}
-proc ps7_init {} {
- variable PCW_SILICON_VER_1_0
- variable PCW_SILICON_VER_2_0
- variable PCW_SILICON_VER_3_0
- set sil_ver [ps_version]
- if { $sil_ver == $PCW_SILICON_VER_1_0} {
- ps7_mio_init_data_1_0
- ps7_pll_init_data_1_0
- ps7_clock_init_data_1_0
- ps7_ddr_init_data_1_0
- ps7_peripherals_init_data_1_0
- #puts "PCW Silicon Version : 1.0"
- } elseif { $sil_ver == $PCW_SILICON_VER_2_0 } {
- ps7_mio_init_data_2_0
- ps7_pll_init_data_2_0
- ps7_clock_init_data_2_0
- ps7_ddr_init_data_2_0
- ps7_peripherals_init_data_2_0
- #puts "PCW Silicon Version : 2.0"
- } else {
- ps7_mio_init_data_3_0
- ps7_pll_init_data_3_0
- ps7_clock_init_data_3_0
- ps7_ddr_init_data_3_0
- ps7_peripherals_init_data_3_0
- #puts "PCW Silicon Version : 3.0"
- }
-}
-
-
-# For delay calculation using global timer
-
-# start timer
- proc perf_start_clock { } {
-
- #writing SCU_GLOBAL_TIMER_CONTROL register
-
- mask_write 0xF8F00208 0x00000109 0x00000009
-}
-
-# stop timer and reset timer count regs
- proc perf_reset_clock { } {
- perf_disable_clock
- mask_write 0xF8F00200 0xFFFFFFFF 0x00000000
- mask_write 0xF8F00204 0xFFFFFFFF 0x00000000
-}
-
-# Compute mask for given delay in miliseconds
-proc get_number_of_cycles_for_delay { delay } {
-
- # GTC is always clocked at 1/2 of the CPU frequency (CPU_3x2x)
- variable APU_FREQ
- return [ expr ($delay * $APU_FREQ /(2 * 1000))]
-}
-
-
-# stop timer
-proc perf_disable_clock {} {
- mask_write 0xF8F00208 0xFFFFFFFF 0x00000000
-}
-
-proc perf_reset_and_start_timer {} {
- perf_reset_clock
- perf_start_clock
-}
-
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps.sh b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps.sh
deleted file mode 100755
index c84ca08..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps.sh
+++ /dev/null
@@ -1,184 +0,0 @@
-#!/bin/bash -f
-#*********************************************************************************************************
-# Vivado (TM) v2019.2 (64-bit)
-#
-# Filename : scalp_zynqps.sh
-# Simulator : Cadence Xcelium Parallel Simulator
-# Description : Simulation script for compiling, elaborating and verifying the project source files.
-# The script will automatically create the design libraries sub-directories in the run
-# directory, add the library logical mappings in the simulator setup file, create default
-# 'do/prj' file, execute compilation, elaboration and simulation steps.
-#
-# Generated by Vivado on Mon Sep 07 11:53:40 CEST 2020
-# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019
-#
-# Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.
-#
-# usage: scalp_zynqps.sh [-help]
-# usage: scalp_zynqps.sh [-lib_map_path]
-# usage: scalp_zynqps.sh [-noclean_files]
-# usage: scalp_zynqps.sh [-reset_run]
-#
-# Prerequisite:- To compile and run simulation, you must compile the Xilinx simulation libraries using the
-# 'compile_simlib' TCL command. For more information about this command, run 'compile_simlib -help' in the
-# Vivado Tcl Shell. Once the libraries have been compiled successfully, specify the -lib_map_path switch
-# that points to these libraries and rerun export_simulation. For more information about this switch please
-# type 'export_simulation -help' in the Tcl shell.
-#
-# You can also point to the simulation libraries by either replacing the <SPECIFY_COMPILED_LIB_PATH> in this
-# script with the compiled library directory path or specify this path with the '-lib_map_path' switch when
-# executing this script. Please type 'scalp_zynqps.sh -help' for more information.
-#
-# Additional references - 'Xilinx Vivado Design Suite User Guide:Logic simulation (UG900)'
-#
-#*********************************************************************************************************
-
-# Directory path for design sources and include directories (if any) wrt this path
-ref_dir="."
-
-# Override directory with 'export_sim_ref_dir' env path value if set in the shell
-if [[ (! -z "$export_sim_ref_dir") && ($export_sim_ref_dir != "") ]]; then
- ref_dir="$export_sim_ref_dir"
-fi
-
-# Set the compiled library directory
-ref_lib_dir="."
-
-# Command line options
-xrun_opts="-64bit -v93 -relax -access +rwc -namemap_mixgen"
-
-# Design libraries
-design_libs=(xilinx_vip xlconstant_v1_1_6 xil_defaultlib axi_infrastructure_v1_1_0 axi_vip_v1_1_6 processing_system7_vip_v1_0_8 util_vector_logic_v2_0_1)
-
-# Simulation root library directory
-sim_lib_dir="xcelium_lib"
-
-# Script info
-echo -e "scalp_zynqps.sh - Script generated by export_simulation (Vivado v2019.2 (64-bit)-id)\n"
-
-# Main steps
-run()
-{
- check_args $# $1
- setup $1 $2
- execute
-}
-
-# RUN_STEP: <execute>
-execute()
-{
- xrun $xrun_opts \
- -reflib "$ref_lib_dir/unisim:unisim" \
- -reflib "$ref_lib_dir/unisims_ver:unisims_ver" \
- -reflib "$ref_lib_dir/secureip:secureip" \
- -reflib "$ref_lib_dir/unimacro:unimacro" \
- -reflib "$ref_lib_dir/unimacro_ver:unimacro_ver" \
- -top xil_defaultlib.scalp_zynqps \
- -f run.f \
- -top glbl \
- glbl.v \
- +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" \
- +incdir+"$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog" \
- +incdir+"../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl" \
- +incdir+"/opt/Xilinx/Vivado/2019.2/data/xilinx_vip/include"
-}
-
-# STEP: setup
-setup()
-{
- case $1 in
- "-lib_map_path" )
- if [[ ($2 == "") ]]; then
- echo -e "ERROR: Simulation library directory path not specified (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- else
- ref_lib_dir=$2
- fi
- ;;
- "-reset_run" )
- reset_run
- echo -e "INFO: Simulation run files deleted.\n"
- exit 0
- ;;
- "-noclean_files" )
- # do not remove previous data
- ;;
- * )
- esac
-
- create_lib_dir
-
- # Add any setup/initialization commands here:-
-
- # <user specific commands>
-
-}
-
-# Create design library directory paths
-create_lib_dir()
-{
- if [[ -e $sim_lib_dir ]]; then
- rm -rf $sim_lib_dir
- fi
-
- for (( i=0; i<${#design_libs[*]}; i++ )); do
- lib="${design_libs[i]}"
- lib_dir="$sim_lib_dir/$lib"
- if [[ ! -e $lib_dir ]]; then
- mkdir -p $lib_dir
- fi
- done
-}
-
-# Delete generated data from the previous run
-reset_run()
-{
- files_to_remove=(xmsim.key xrun.key xrun.log waves.shm xrun.history .simvision xcelium.d xcelium)
- for (( i=0; i<${#files_to_remove[*]}; i++ )); do
- file="${files_to_remove[i]}"
- if [[ -e $file ]]; then
- rm -rf $file
- fi
- done
-
- create_lib_dir
-}
-
-# Check command line arguments
-check_args()
-{
- if [[ ($1 == 1 ) && ($2 != "-lib_map_path" && $2 != "-noclean_files" && $2 != "-reset_run" && $2 != "-help" && $2 != "-h") ]]; then
- echo -e "ERROR: Unknown option specified '$2' (type \"./scalp_zynqps.sh -help\" for more information)\n"
- exit 1
- fi
-
- if [[ ($2 == "-help" || $2 == "-h") ]]; then
- usage
- fi
-}
-
-# Script usage
-usage()
-{
- msg="Usage: scalp_zynqps.sh [-help]\n\
-Usage: scalp_zynqps.sh [-lib_map_path]\n\
-Usage: scalp_zynqps.sh [-reset_run]\n\
-Usage: scalp_zynqps.sh [-noclean_files]\n\n\
-[-help] -- Print help information for this script\n\n\
-[-lib_map_path <path>] -- Compiled simulation library directory path. The simulation library is compiled\n\
-using the compile_simlib tcl command. Please see 'compile_simlib -help' for more information.\n\n\
-[-reset_run] -- Recreate simulator setup files and library mappings for a clean run. The generated files\n\
-from the previous run will be removed. If you don't want to remove the simulator generated files, use the\n\
--noclean_files switch.\n\n\
-[-noclean_files] -- Reset previous run, but do not remove simulator generated files from the previous run.\n\n"
- echo -e $msg
- exit 1
-}
-
-# Launch script
-run $1 $2
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_gnd_constant_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_gnd_constant_0.h
deleted file mode 100755
index ed20803..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_gnd_constant_0.h
+++ /dev/null
@@ -1,67 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _scalp_zynqps_gnd_constant_0_H_
-#define _scalp_zynqps_gnd_constant_0_H_
-
-#include "xlconstant_v1_1_6.h"
-#include "systemc.h"
-class scalp_zynqps_gnd_constant_0 : public sc_module {
- public:
-xlconstant_v1_1_6<1,0> mod;
- sc_out< sc_bv<1> > dout;
-scalp_zynqps_gnd_constant_0 (sc_core::sc_module_name name) :sc_module(name), mod("mod") {
- mod.dout(dout);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0.h
deleted file mode 100755
index 218c2a2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-#include "scalp_zynqps_processing_system7_0_0_sc.h"
-
-class DllExport scalp_zynqps_processing_system7_0_0 : public scalp_zynqps_processing_system7_0_0_sc
-{
-public:
-
- scalp_zynqps_processing_system7_0_0(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0();
-
- // module pin-to-pin RTL interface
-
- sc_core::sc_in< bool > SPI1_SCLK_I;
- sc_core::sc_out< bool > SPI1_SCLK_O;
- sc_core::sc_out< bool > SPI1_SCLK_T;
- sc_core::sc_in< bool > SPI1_MOSI_I;
- sc_core::sc_out< bool > SPI1_MOSI_O;
- sc_core::sc_out< bool > SPI1_MOSI_T;
- sc_core::sc_in< bool > SPI1_MISO_I;
- sc_core::sc_out< bool > SPI1_MISO_O;
- sc_core::sc_out< bool > SPI1_MISO_T;
- sc_core::sc_in< bool > SPI1_SS_I;
- sc_core::sc_out< bool > SPI1_SS_O;
- sc_core::sc_out< bool > SPI1_SS1_O;
- sc_core::sc_out< bool > SPI1_SS2_O;
- sc_core::sc_out< bool > SPI1_SS_T;
- sc_core::sc_out< sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out< bool > USB0_VBUS_PWRSELECT;
- sc_core::sc_in< bool > USB0_VBUS_PWRFAULT;
- sc_core::sc_out< bool > M_AXI_GP0_ARVALID;
- sc_core::sc_out< bool > M_AXI_GP0_AWVALID;
- sc_core::sc_out< bool > M_AXI_GP0_BREADY;
- sc_core::sc_out< bool > M_AXI_GP0_RREADY;
- sc_core::sc_out< bool > M_AXI_GP0_WLAST;
- sc_core::sc_out< bool > M_AXI_GP0_WVALID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_ARID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_AWID;
- sc_core::sc_out< sc_dt::sc_bv<12> > M_AXI_GP0_WID;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_ARLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARSIZE;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWBURST;
- sc_core::sc_out< sc_dt::sc_bv<2> > M_AXI_GP0_AWLOCK;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWSIZE;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_ARPROT;
- sc_core::sc_out< sc_dt::sc_bv<3> > M_AXI_GP0_AWPROT;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_ARADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_AWADDR;
- sc_core::sc_out< sc_dt::sc_bv<32> > M_AXI_GP0_WDATA;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_ARQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWCACHE;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWLEN;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_AWQOS;
- sc_core::sc_out< sc_dt::sc_bv<4> > M_AXI_GP0_WSTRB;
- sc_core::sc_in< bool > M_AXI_GP0_ACLK;
- sc_core::sc_in< bool > M_AXI_GP0_ARREADY;
- sc_core::sc_in< bool > M_AXI_GP0_AWREADY;
- sc_core::sc_in< bool > M_AXI_GP0_BVALID;
- sc_core::sc_in< bool > M_AXI_GP0_RLAST;
- sc_core::sc_in< bool > M_AXI_GP0_RVALID;
- sc_core::sc_in< bool > M_AXI_GP0_WREADY;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_BID;
- sc_core::sc_in< sc_dt::sc_bv<12> > M_AXI_GP0_RID;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_BRESP;
- sc_core::sc_in< sc_dt::sc_bv<2> > M_AXI_GP0_RRESP;
- sc_core::sc_in< sc_dt::sc_bv<32> > M_AXI_GP0_RDATA;
- sc_core::sc_out< bool > FCLK_CLK0;
- sc_core::sc_out< bool > FCLK_RESET0_N;
- sc_core::sc_out< sc_dt::sc_bv<54> > MIO;
- sc_core::sc_out< bool > DDR_CAS_n;
- sc_core::sc_out< bool > DDR_CKE;
- sc_core::sc_out< bool > DDR_Clk_n;
- sc_core::sc_out< bool > DDR_Clk;
- sc_core::sc_out< bool > DDR_CS_n;
- sc_core::sc_out< bool > DDR_DRSTB;
- sc_core::sc_out< bool > DDR_ODT;
- sc_core::sc_out< bool > DDR_RAS_n;
- sc_core::sc_out< bool > DDR_WEB;
- sc_core::sc_out< sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_out< sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_out< bool > DDR_VRN;
- sc_core::sc_out< bool > DDR_VRP;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_out< sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_out< sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_out< bool > PS_SRSTB;
- sc_core::sc_out< bool > PS_CLK;
- sc_core::sc_out< bool > PS_PORB;
-
-protected:
-
- virtual void before_end_of_elaboration();
-
-private:
-
- xtlm::xaximm_xtlm2pin_t<32,32,12,1,1,1,1,1>* mp_M_AXI_GP0_transactor;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_ARLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_ARLOCK_converter_signal;
- xsc::common::scalar2vectorN_converter<2>* mp_M_AXI_GP0_AWLOCK_converter;
- sc_signal< bool > m_M_AXI_GP0_AWLOCK_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_ARLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_ARLEN_converter_signal;
- xsc::common::vector2vector_converter<8,4>* mp_M_AXI_GP0_AWLEN_converter;
- sc_signal< sc_bv<8> > m_M_AXI_GP0_AWLEN_converter_signal;
- sc_signal< bool > m_M_AXI_GP0_transactor_rst_signal;
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0_sc.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0_sc.h
deleted file mode 100755
index b41eca2..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/scalp_zynqps_processing_system7_0_0_sc.h
+++ /dev/null
@@ -1,93 +0,0 @@
-#ifndef IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-#define IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
-
-// (c) Copyright 1995-2020 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-#ifndef XTLM
-#include "xtlm.h"
-#endif
-
-#ifndef SYSTEMC_INCLUDED
-#include <systemc>
-#endif
-
-#if defined(_MSC_VER)
-#define DllExport __declspec(dllexport)
-#elif defined(__GNUC__)
-#define DllExport __attribute__ ((visibility("default")))
-#else
-#define DllExport
-#endif
-
-class processing_system7_v5_5_tlm;
-
-class DllExport scalp_zynqps_processing_system7_0_0_sc : public sc_core::sc_module
-{
-public:
-
- scalp_zynqps_processing_system7_0_0_sc(const sc_core::sc_module_name& nm);
- virtual ~scalp_zynqps_processing_system7_0_0_sc();
-
-public: // module socket-to-socket TLM interface
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
-
-protected:
-
- processing_system7_v5_5_tlm* mp_impl;
-
-private:
-
- scalp_zynqps_processing_system7_0_0_sc(const scalp_zynqps_processing_system7_0_0_sc&);
- const scalp_zynqps_processing_system7_0_0_sc& operator=(const scalp_zynqps_processing_system7_0_0_sc&);
-
-};
-
-#endif // IP_SCALP_ZYNQPS_PROCESSING_SYSTEM7_0_0_SC_H_
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xilinx-zynq.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xilinx-zynq.h
deleted file mode 100755
index 6d14b94..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xilinx-zynq.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * Xilinx SystemC/TLM-2.0 Zynq Wrapper.
- *
- * Written by Edgar E. Iglesias <edgar.iglesias@xilinx.com>
- *
- * Copyright (c) 2016, Xilinx Inc.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#include "systemc.h"
-
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
-
-#include "remote-port-tlm.h"
-#include "remote-port-tlm-memory-master.h"
-#include "remote-port-tlm-memory-slave.h"
-#include "remote-port-tlm-wires.h"
-
-class xilinx_zynq
-: public remoteport_tlm
-{
-private:
- remoteport_tlm_memory_master rp_m_axi_gp0;
- remoteport_tlm_memory_master rp_m_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_gp0;
- remoteport_tlm_memory_slave rp_s_axi_gp1;
-
- remoteport_tlm_memory_slave rp_s_axi_hp0;
- remoteport_tlm_memory_slave rp_s_axi_hp1;
- remoteport_tlm_memory_slave rp_s_axi_hp2;
- remoteport_tlm_memory_slave rp_s_axi_hp3;
-
- remoteport_tlm_memory_slave rp_s_axi_acp;
-
- remoteport_tlm_wires rp_wires_in;
- remoteport_tlm_wires rp_wires_out;
- remoteport_tlm_wires rp_irq_out;
-
-public:
- /*
- * M_AXI_GP 0 - 1.
- * These sockets represent the High speed PS to PL interfaces.
- * These are AXI Slave ports on the PS side and AXI Master ports
- * on the PL side.
- *
- * Used to transfer data from the PS to the PL.
- */
- tlm_utils::simple_initiator_socket<remoteport_tlm_memory_master> *m_axi_gp[2];
-
- /*
- * S_AXI_GP0 - 1.
- * These sockets represent the High speed IO Coherent PL to PS
- * interfaces.
- *
- * HP0 - 3.
- * These sockets represent the High performance dataflow PL to PS interfaces.
- *
- * ACP
- * Accelerator Coherency Port, used to transfered coherent data to
- * the PS via the Cortex-A9 subsystem.
- *
- * These are AXI Master ports on the PS side and AXI Slave ports
- * on the PL side.
- *
- * Used to transfer data from the PL to the PS.
- */
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_gp[2];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_hp[4];
- tlm_utils::simple_target_socket<remoteport_tlm_memory_slave> *s_axi_acp;
-
- /* PL (fabric) to PS interrupt signals. */
- sc_vector<sc_signal<bool> > pl2ps_irq;
-
- /* PS to PL Interrupt signals. */
- sc_vector<sc_signal<bool> > ps2pl_irq;
-
- /* FPGA out resets. */
- sc_vector<sc_signal<bool> > ps2pl_rst;
-
- xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr);
- //xilinx_zynq(sc_core::sc_module_name name, const char *sk_descr,
- // Iremoteport_tlm_sync *sync = NULL);
-};
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xlconstant_v1_1_6.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xlconstant_v1_1_6.h
deleted file mode 100755
index 73a7cd3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xcelium/xlconstant_v1_1_6.h
+++ /dev/null
@@ -1,69 +0,0 @@
-// (c) Copyright 1995-2014 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:xlconstant:1.1
-// IP Revision: 1
-
-#ifndef _xlconstant_v1_1_6_H_
-#define _xlconstant_v1_1_6_H_
-
-#include "systemc.h"
-template<int CONST_WIDTH,int CONST_VAL>
-SC_MODULE(xlconstant_v1_1_6) {
- public:
- sc_out< sc_bv<CONST_WIDTH> > dout;
- void init() {
- dout.write(CONST_VAL);
- }
- SC_CTOR(xlconstant_v1_1_6) {
- SC_METHOD(init);
- }
-};
-
-#endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/README.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/README.txt
deleted file mode 100644
index 00160c0..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/README.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-################################################################################
-# Vivado (TM) v2019.2 (64-bit)
-#
-# README.txt: Please read the sections below to understand the steps required to
-# run the exported script and information about the source files.
-#
-# Generated by export_simulation on Mon Sep 07 11:53:40 CEST 2020
-#
-################################################################################
-
-1. How to run the generated simulation script:-
-
-From the shell prompt in the current directory, issue the following command:-
-
-./scalp_zynqps.sh
-
-This command will launch the 'compile', 'elaborate' and 'simulate' functions
-implemented in the script file for the 3-step flow. These functions are called
-from the main 'run' function in the script file.
-
-The 'run' function first executes the 'setup' function, the purpose of which is to
-create simulator specific setup files, create design library mappings and library
-directories and copy 'glbl.v' from the Vivado software install location into the
-current directory.
-
-The 'setup' function is also used for removing the simulator generated data in
-order to reset the current directory to the original state when export_simulation
-was launched from Vivado. This generated data can be removed by specifying the
-'-reset_run' switch to the './scalp_zynqps.sh' script.
-
-./scalp_zynqps.sh -reset_run
-
-To keep the generated data from the previous run but regenerate the setup files and
-library directories, use the '-noclean_files' switch.
-
-./scalp_zynqps.sh -noclean_files
-
-For more information on the script, please type './scalp_zynqps.sh -help'.
-
-2. Additional design information files:-
-
-export_simulation generates following additional file that can be used for fetching
-the design files information or for integrating with external custom scripts.
-
-Name : file_info.txt
-Purpose: This file contains detail design file information based on the compile order
- when export_simulation was executed from Vivado. The file contains information
- about the file type, name, whether it is part of the IP, associated library
- and the file path information.
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/b_transport_converter.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/b_transport_converter.h
deleted file mode 100755
index 10539ef..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/b_transport_converter.h
+++ /dev/null
@@ -1,170 +0,0 @@
-// (c) Copyright(C) 2013 - 2018 by Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-
-#ifndef _B_TRANSPORT_CONVERTER_H_
-#define _B_TRANSPORT_CONVERTER_H_
-
-#include <systemc>
-#include "tlm_utils/simple_target_socket.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include <utility>
-#include <vector>
-
-template<int IN_WIDTH, int OUT_WIDTH>
-class b_transport_converter: public sc_core::sc_module
-{
- enum TLM_IF_TYPE
- {
- B_TRANSPORT = 0,
- NB_TRANSPORT,
- TRANSPORT_DBG,
- DMI_IF,
- INVALID_IF
- };
- typedef std::vector<std::pair<sc_dt::uint64, sc_dt::uint64>> addr_range_list;
-
- public:
- SC_HAS_PROCESS(b_transport_converter);
- b_transport_converter<IN_WIDTH, OUT_WIDTH>(sc_core::sc_module_name name):
- sc_module(name)
- {
- target_socket.register_b_transport(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::b_transport);
- initiator_socket.register_nb_transport_bw(
- this, &b_transport_converter<IN_WIDTH, OUT_WIDTH>::nb_transport_bw);
-
- }
-
- //simple tlm target/initiator socket...
- tlm_utils::simple_target_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, IN_WIDTH> target_socket;
- tlm_utils::simple_initiator_socket<b_transport_converter<IN_WIDTH, OUT_WIDTH>, OUT_WIDTH> initiator_socket;
-
-
- public:
- void b_transport(tlm::tlm_generic_payload& payload, sc_core::sc_time& time)
- {
- tlm::tlm_phase phase = tlm::BEGIN_REQ; //for nb_transport_fw
- switch(get_tlm_if_type(payload.get_address()))
- {
- case B_TRANSPORT:
- initiator_socket->b_transport(payload, time);
- break;
-
- case NB_TRANSPORT:
- initiator_socket->nb_transport_fw(payload, phase, time);
- wait(resp_complete_event); //! Wait for the response to complete
- break;
-
- case TRANSPORT_DBG:
- initiator_socket->transport_dbg(payload);
- break;
-
- case DMI_IF:
- break;
-
- default:
- SC_REPORT_ERROR(this->name(), "Address not mapped to any of the TLM IF type");
- }
- }
-
- tlm::tlm_sync_enum
- nb_transport_bw(tlm::tlm_generic_payload& payload,
- tlm::tlm_phase& phase, sc_core::sc_time& time)
- {
- if(phase == tlm::BEGIN_RESP) {
- resp_complete_event.notify();
- phase = tlm::END_RESP;
- return tlm::TLM_UPDATED;
- }
- return tlm::TLM_ACCEPTED;
- }
-
- private:
- TLM_IF_TYPE get_tlm_if_type(unsigned long long address)
- {
- //check for b_transport addresses
- for(auto& addr_range: m_b_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return B_TRANSPORT;
- }
- }
-
- //check for nb_transport addresses
- for(auto& addr_range: m_nb_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return NB_TRANSPORT;
- }
- }
- //check for dbg_transport addresses
- for(auto& addr_range: m_dbg_transport_addr_list) {
- if(address >= addr_range.first && address < addr_range.second) {
- return TRANSPORT_DBG;
- }
- }
-
- //By default return NB_TRANSPORT
- return NB_TRANSPORT;
- }
-
- //Start and End Address List for each of interfaces...
- static addr_range_list m_b_transport_addr_list;
- static addr_range_list m_nb_transport_addr_list;
- static addr_range_list m_dbg_transport_addr_list;
-
- //event to notify completion of transaction
- sc_core::sc_event resp_complete_event;
-};
-
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_b_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_nb_transport_addr_list = {std::make_pair(0, 0)};
-template<int IN_WIDTH, int OUT_WIDTH>
-typename b_transport_converter<IN_WIDTH,OUT_WIDTH>::addr_range_list b_transport_converter<IN_WIDTH,OUT_WIDTH>::m_dbg_transport_addr_list = {std::make_pair(0, 0)};
-
-
-#endif /* _B_TRANSPORT_CONVERTER_H_ */
-
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/cmd.tcl b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/cmd.tcl
deleted file mode 100644
index eef7a0f..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/cmd.tcl
+++ /dev/null
@@ -1,12 +0,0 @@
-set curr_wave [current_wave_config]
-if { [string length $curr_wave] == 0 } {
- if { [llength [get_objects]] > 0} {
- add_wave /
- set_property needs_save false [current_wave_config]
- } else {
- send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
- }
-}
-
-run -all
-quit
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/file_info.txt b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/file_info.txt
deleted file mode 100644
index 2c975a3..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/file_info.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-scalp_zynqps_gnd_constant_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_gnd_constant_0/sim/scalp_zynqps_gnd_constant_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_processing_system7_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0/sim/scalp_zynqps_processing_system7_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_0_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_0_0/sim/scalp_zynqps_util_vector_logic_0_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_util_vector_logic_1_0.v,verilog,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_util_vector_logic_1_0/sim/scalp_zynqps_util_vector_logic_1_0.v,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps_vio_0_0.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_vio_0_0/sim/scalp_zynqps_vio_0_0.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-scalp_zynqps.vhd,vhdl,xil_defaultlib,../../../../../.scripts/scalp_zynqps/sim/scalp_zynqps.vhd,incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="$ref_dir/../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/ec67/hdl"incdir="../../../../../.scripts/scalp_zynqps/ipshared/2d50/hdl"incdir="../../../../../.scripts/scalp_zynqps/ip/scalp_zynqps_processing_system7_0_0"incdir="../../../../../.scripts/scalp_zynqps/ipshared/1b7e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/122e/hdl/verilog"incdir="../../../../../.scripts/scalp_zynqps/ipshared/46fd/hdl"
-glbl.v,Verilog,xil_defaultlib,glbl.v
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/glbl.v b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/glbl.v
deleted file mode 100644
index be64233..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/glbl.v
+++ /dev/null
@@ -1,71 +0,0 @@
-// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
-`ifndef GLBL
-`define GLBL
-`timescale 1 ps / 1 ps
-
-module glbl ();
-
- parameter ROC_WIDTH = 100000;
- parameter TOC_WIDTH = 0;
-
-//-------- STARTUP Globals --------------
- wire GSR;
- wire GTS;
- wire GWE;
- wire PRLD;
- tri1 p_up_tmp;
- tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
-
- wire PROGB_GLBL;
- wire CCLKO_GLBL;
- wire FCSBO_GLBL;
- wire [3:0] DO_GLBL;
- wire [3:0] DI_GLBL;
-
- reg GSR_int;
- reg GTS_int;
- reg PRLD_int;
-
-//-------- JTAG Globals --------------
- wire JTAG_TDO_GLBL;
- wire JTAG_TCK_GLBL;
- wire JTAG_TDI_GLBL;
- wire JTAG_TMS_GLBL;
- wire JTAG_TRST_GLBL;
-
- reg JTAG_CAPTURE_GLBL;
- reg JTAG_RESET_GLBL;
- reg JTAG_SHIFT_GLBL;
- reg JTAG_UPDATE_GLBL;
- reg JTAG_RUNTEST_GLBL;
-
- reg JTAG_SEL1_GLBL = 0;
- reg JTAG_SEL2_GLBL = 0 ;
- reg JTAG_SEL3_GLBL = 0;
- reg JTAG_SEL4_GLBL = 0;
-
- reg JTAG_USER_TDO1_GLBL = 1'bz;
- reg JTAG_USER_TDO2_GLBL = 1'bz;
- reg JTAG_USER_TDO3_GLBL = 1'bz;
- reg JTAG_USER_TDO4_GLBL = 1'bz;
-
- assign (strong1, weak0) GSR = GSR_int;
- assign (strong1, weak0) GTS = GTS_int;
- assign (weak1, weak0) PRLD = PRLD_int;
-
- initial begin
- GSR_int = 1'b1;
- PRLD_int = 1'b1;
- #(ROC_WIDTH)
- GSR_int = 1'b0;
- PRLD_int = 1'b0;
- end
-
- initial begin
- GTS_int = 1'b1;
- #(TOC_WIDTH)
- GTS_int = 1'b0;
- end
-
-endmodule
-`endif
diff --git a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/processing_system7_v5_5_tlm.h b/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/processing_system7_v5_5_tlm.h
deleted file mode 100755
index bdf5c50..0000000
--- a/soc/vivado/scalp_zynqps/2019.2/lin64/scalp_zynqps/scalp_zynqps.ip_user_files/sim_scripts/scalp_zynqps/xsim/processing_system7_v5_5_tlm.h
+++ /dev/null
@@ -1,232 +0,0 @@
-
-
-// (c) Copyright 1995-2013 Xilinx, Inc. All rights reserved.
-//
-// This file contains confidential and proprietary information
-// of Xilinx, Inc. and is protected under U.S. and
-// international copyright and other intellectual property
-// laws.
-//
-// DISCLAIMER
-// This disclaimer is not a license and does not grant any
-// rights to the materials distributed herewith. Except as
-// otherwise provided in a valid license issued to you by
-// Xilinx, and to the maximum extent permitted by applicable
-// law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
-// WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
-// AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
-// BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
-// INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
-// (2) Xilinx shall not be liable (whether in contract or tort,
-// including negligence, or under any other theory of
-// liability) for any loss or damage of any kind or nature
-// related to, arising under or in connection with these
-// materials, including for any direct, or any indirect,
-// special, incidental, or consequential loss or damage
-// (including loss of data, profits, goodwill, or any type of
-// loss or damage suffered as a result of any action brought
-// by a third party) even if such damage or loss was
-// reasonably foreseeable or Xilinx had been advised of the
-// possibility of the same.
-//
-// CRITICAL APPLICATIONS
-// Xilinx products are not designed or intended to be fail-
-// safe, or for use in any application requiring fail-safe
-// performance, such as life-support or safety devices or
-// systems, Class III medical devices, nuclear facilities,
-// applications related to the deployment of airbags, or any
-// other applications that could lead to death, personal
-// injury, or severe property or environmental damage
-// (individually and collectively, "Critical
-// Applications"). Customer assumes the sole risk and
-// liability of any use of Xilinx products in Critical
-// Applications, subject only to applicable laws and
-// regulations governing limitations on product liability.
-//
-// THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
-// PART OF THIS FILE AT ALL TIMES.
-//
-// DO NOT MODIFY THIS FILE.
-
-
-// IP VLNV: xilinx.com:ip:processing_system7_vip:1.0
-// IP Revision: 1
-#ifndef __PS7_H__
-#define __PS7_H__
-
-#include "systemc.h"
-#include "xtlm.h"
-#include "xtlm_adaptors/xaximm_xtlm2tlm.h"
-#include "xtlm_adaptors/xaximm_tlm2xtlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/simple_target_socket.h"
-#include "genattr.h"
-#include "xilinx-zynq.h"
-#include "b_transport_converter.h"
-
-/***************************************************************************************
-*
-* A Simple Converter which converts Remote-port's simplae_intiator_sockets<32>->b_transport()
-* calls to xTLM sockets bn_transport_x() calls..
-*
-* This is Only specific to remote-port so not creating seperate header for it.
-*
-***************************************************************************************/
-template <int IN_WIDTH, int OUT_WIDTH>
-class rptlm2xtlm_converter : public sc_module{
- public:
- tlm::tlm_target_socket<IN_WIDTH> target_socket;
- xtlm::xtlm_aximm_initiator_socket wr_socket;
- xtlm::xtlm_aximm_initiator_socket rd_socket;
- rptlm2xtlm_converter<IN_WIDTH, OUT_WIDTH>(sc_module_name name);//:sc_module(name)
- void registerUserExtensionHandlerCallback(
- void (*callback)(xtlm::aximm_payload*,
- const tlm::tlm_generic_payload*));
-
- private:
- b_transport_converter<IN_WIDTH, OUT_WIDTH> m_btrans_conv;
- xtlm::xaximm_tlm2xtlm_t<OUT_WIDTH> xtlm_bridge;
-};
-
-/***************************************************************************************
-* Global method, get registered with tlm2xtlm bridge
-* This function is called when tlm2xtlm bridge convert tlm payload to xtlm payload.
-*
-* caller: tlm2xtlm bridge
-* purpose: To get master id and other parameters out of genattr_extension
-* and use master id to AxUSER PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void get_extensions_from_tlm(xtlm::aximm_payload* xtlm_pay, const tlm::tlm_generic_payload* gp);
-
-/***************************************************************************************
-* Global method, get registered with xtlm2tlm bridge
-* This function is called when xtlm2tlm bridge convert xtlm payload to tlm payload.
-*
-* caller: xtlm2tlm bridge
-* purpose: To create and add master id and other parameters to genattr_extension.
-* Master id red from AxID PIN of xtlm payload.
-*
-*
-***************************************************************************************/
-extern void add_extensions_to_tlm(const xtlm::aximm_payload* xtlm_pay, tlm::tlm_generic_payload* gp);
-
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-// //
-// File: processing_system7_tlm.h //
-// //
-// Description: zynq_ultra_ps_e_tlm class is a sc_module, act as intermediate layer between //
-// xilinx_zynq qemu wrapper and Vivado generated systemc simulation ip wrapper. //
-// it's basically created for supporting tlm based xilinx_zynq from xtlm based vivado //
-// generated systemc wrapper. this wrapper is live only when SELECTED_SIM_MODEL is set //
-// to tlm. it's also act as bridge between vivado wrapper and xilinx_zynq wrapper. //
-// it fill the the gap between input/output ports of vivado generated wrapper to //
-// xilinx_zynq wrapper signals. This wrapper is auto generated by ttcl scripts //
-// based on IP configuration in vivado. //
-// //
-// //
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-//////////////////////////////////////////////////////////////////////////////////////////////////////////////////
-class processing_system7_v5_5_tlm : public sc_core::sc_module {
-
- public:
- // Non-AXI ports are declared here
- sc_core::sc_in<bool> SPI1_SCLK_I;
- sc_core::sc_out<bool> SPI1_SCLK_O;
- sc_core::sc_out<bool> SPI1_SCLK_T;
- sc_core::sc_in<bool> SPI1_MOSI_I;
- sc_core::sc_out<bool> SPI1_MOSI_O;
- sc_core::sc_out<bool> SPI1_MOSI_T;
- sc_core::sc_in<bool> SPI1_MISO_I;
- sc_core::sc_out<bool> SPI1_MISO_O;
- sc_core::sc_out<bool> SPI1_MISO_T;
- sc_core::sc_in<bool> SPI1_SS_I;
- sc_core::sc_out<bool> SPI1_SS_O;
- sc_core::sc_out<bool> SPI1_SS1_O;
- sc_core::sc_out<bool> SPI1_SS2_O;
- sc_core::sc_out<bool> SPI1_SS_T;
- sc_core::sc_out<sc_dt::sc_bv<2> > USB0_PORT_INDCTL;
- sc_core::sc_out<bool> USB0_VBUS_PWRSELECT;
- sc_core::sc_in<bool> USB0_VBUS_PWRFAULT;
- sc_core::sc_in<bool> M_AXI_GP0_ACLK;
- sc_core::sc_out<bool> FCLK_CLK0;
- sc_core::sc_out<bool> FCLK_RESET0_N;
- sc_core::sc_inout<sc_dt::sc_bv<54> > MIO;
- sc_core::sc_inout<bool> DDR_CAS_n;
- sc_core::sc_inout<bool> DDR_CKE;
- sc_core::sc_inout<bool> DDR_Clk_n;
- sc_core::sc_inout<bool> DDR_Clk;
- sc_core::sc_inout<bool> DDR_CS_n;
- sc_core::sc_inout<bool> DDR_DRSTB;
- sc_core::sc_inout<bool> DDR_ODT;
- sc_core::sc_inout<bool> DDR_RAS_n;
- sc_core::sc_inout<bool> DDR_WEB;
- sc_core::sc_inout<sc_dt::sc_bv<3> > DDR_BankAddr;
- sc_core::sc_inout<sc_dt::sc_bv<15> > DDR_Addr;
- sc_core::sc_inout<bool> DDR_VRN;
- sc_core::sc_inout<bool> DDR_VRP;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DM;
- sc_core::sc_inout<sc_dt::sc_bv<32> > DDR_DQ;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS_n;
- sc_core::sc_inout<sc_dt::sc_bv<4> > DDR_DQS;
- sc_core::sc_inout<bool> PS_SRSTB;
- sc_core::sc_inout<bool> PS_CLK;
- sc_core::sc_inout<bool> PS_PORB;
-
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_wr_socket;
- xtlm::xtlm_aximm_initiator_socket* M_AXI_GP0_rd_socket;
-
- //constructor having three paramters
- // 1. module name in sc_module_name objec,
- // 2. reference to map object of name and integer value pairs
- // 3. reference to map object of name and string value pairs
- // All the model parameters (integer and string) which are configuration parameters
- // of Processing System 7 IP propogated from Vivado
-processing_system7_v5_5_tlm(sc_core::sc_module_name name,
- xsc::common_cpp::properties&);
-
- ~processing_system7_v5_5_tlm();
- SC_HAS_PROCESS(processing_system7_v5_5_tlm);
-
- private:
-
- //zynq tlm wrapper provided by Edgar
- //module with interfaces of standard tlm
- //and input/output ports at signal level
- xilinx_zynq* m_zynq_tlm_model;
-
- // Xtlm2tlm_t Bridges
- // Converts Xtlm transactions to tlm transactions
- // Bridge's Xtlm wr/rd target sockets binds with
- // xtlm initiator sockets of processing_system7_tlm and tlm simple initiator
- // socket with xilinx_zynq's target socket
-
- // This Bridges converts b_transport to nb_transports and also
- // Converts tlm transactions to xtlm transactions.
- // Bridge's tlm simple target socket binds with
- // simple initiator socket of xilinx_zynqmp and xtlm
- // socket with xilinx_zynq's simple target socket
- rptlm2xtlm_converter<32, 32> m_rp_bridge_M_AXI_GP0;
-
- // sc_clocks for generating pl clocks
- // output pins FCLK_CLK0..3 are drived by these clocks
- sc_core::sc_clock FCLK_CLK0_clk;
-
-
- //Method which is sentive to FCLK_CLK0_clk sc_clock object
- //FCLK_CLK0 pin written based on FCLK_CLK0_clk clock value
- void trigger_FCLK_CLK0_pin();
-
- //FCLK_RESET0 output reset pin get toggle when emio bank 2's 31th signal gets toggled
- //EMIO[2] bank 31th(GPIO[95] signal)acts as reset signal to the PL(refer Zynq UltraScale+ TRM, page no:761)
- void FCLK_RESET0_N_trigger();
-
- sc_signal<bool>