diff --git a/designs/vivado/scalp_router_firmware/2020.2/src/hdl/scalp_router_firmware.vhd b/designs/vivado/scalp_router_firmware/2020.2/src/hdl/scalp_router_firmware.vhd
index 4551a3284e931468fa4124710ba5be9025bbd3db..7d9efd071529fee74c99ba96da4aa2c5b1e27140 100644
--- a/designs/vivado/scalp_router_firmware/2020.2/src/hdl/scalp_router_firmware.vhd
+++ b/designs/vivado/scalp_router_firmware/2020.2/src/hdl/scalp_router_firmware.vhd
@@ -15,7 +15,7 @@
-- Tool version: 2020.2
-- Description: scalp_router_firmware
--
--- Last update: 2021-09-07
+-- Last update: 2021-09-15
--
---------------------------------------------------------------------------------
@@ -556,21 +556,50 @@ architecture arch of scalp_router_firmware is
signal DebugBackPressureResetxR : t_rx_back_pressure_reset := C_NO_RX_BACK_PRESSURE_RESET;
-- Attributes
- attribute mark_debug : string;
- attribute keep : string;
+ attribute mark_debug : string;
+ attribute keep : string;
-- Clocks
- attribute keep of PSSysClkxC : signal is "true";
- attribute keep of GTRefClk0xC : signal is "true";
- attribute keep of GTRefClk1xC : signal is "true";
- attribute keep of AuroraClkSlavexC : signal is "true";
- attribute keep of AuroraClkMasterxC : signal is "true";
+ attribute keep of PSSysClkxC : signal is "true";
+ attribute keep of GTRefClk0xC : signal is "true";
+ attribute keep of GTRefClk1xC : signal is "true";
+ attribute keep of AuroraClkSlavexC : signal is "true";
+ attribute keep of AuroraClkMasterxC : signal is "true";
-- Scalp Router
- attribute mark_debug of EastTXM2SxD : signal is "true";
- attribute keep of EastTXM2SxD : signal is "true";
- attribute mark_debug of EastTXS2MxD : signal is "true";
- attribute keep of EastTXS2MxD : signal is "true";
- attribute mark_debug of LocNetAddrxD : signal is "true";
- attribute keep of LocNetAddrxD : signal is "true";
+ attribute mark_debug of NorthRXM2SxD : signal is "true";
+ attribute keep of NorthRXM2SxD : signal is "true";
+ attribute mark_debug of NorthRXS2MxD : signal is "true";
+ attribute keep of NorthRXS2MxD : signal is "true";
+ attribute mark_debug of NorthTXM2SxD : signal is "true";
+ attribute keep of NorthTXM2SxD : signal is "true";
+ attribute mark_debug of NorthTXS2MxD : signal is "true";
+ attribute keep of NorthTXS2MxD : signal is "true";
+ attribute mark_debug of EastRXM2SxD : signal is "true";
+ attribute keep of EastRXM2SxD : signal is "true";
+ attribute mark_debug of EastRXS2MxD : signal is "true";
+ attribute keep of EastRXS2MxD : signal is "true";
+ attribute mark_debug of EastTXM2SxD : signal is "true";
+ attribute keep of EastTXM2SxD : signal is "true";
+ attribute mark_debug of EastTXS2MxD : signal is "true";
+ attribute keep of EastTXS2MxD : signal is "true";
+ attribute mark_debug of SouthRXM2SxD : signal is "true";
+ attribute keep of SouthRXM2SxD : signal is "true";
+ attribute mark_debug of SouthRXS2MxD : signal is "true";
+ attribute keep of SouthRXS2MxD : signal is "true";
+ attribute mark_debug of SouthTXM2SxD : signal is "true";
+ attribute keep of SouthTXM2SxD : signal is "true";
+ attribute mark_debug of SouthTXS2MxD : signal is "true";
+ attribute keep of SouthTXS2MxD : signal is "true";
+ attribute mark_debug of WestRXM2SxD : signal is "true";
+ attribute keep of WestRXM2SxD : signal is "true";
+ attribute mark_debug of WestRXS2MxD : signal is "true";
+ attribute keep of WestRXS2MxD : signal is "true";
+ attribute mark_debug of WestTXM2SxD : signal is "true";
+ attribute keep of WestTXM2SxD : signal is "true";
+ attribute mark_debug of WestTXS2MxD : signal is "true";
+ attribute keep of WestTXS2MxD : signal is "true";
+ attribute mark_debug of LocNetAddrxD : signal is "true";
+ attribute keep of LocNetAddrxD : signal is "true";
+ --
begin
@@ -1170,6 +1199,7 @@ begin
RXFifoRdDataxP : process (AuroraClkMasterxC.UserClkxC,
ScalpRouterResetxRNA) is
+ variable HeaderCountxD : integer := 0;
begin -- process RXFifoRdDataxP
if ScalpRouterResetxRNA = '0' then
RXFifoRdDataStatexD <= E_RD_IDLE;
@@ -1177,6 +1207,7 @@ begin
ScalpPacketReadDataxD <= (others => '0');
ScalpPacketStatusxD(C_RD_VALID) <= '0';
ScalpPacketStatusxD(C_RD_LAST) <= '0';
+ -- HeaderCountxD := 0;
elsif rising_edge(AuroraClkMasterxC.UserClkxC) then
-- Default Values
RXFifoTXS2MxS.ReadyxS <= '0';
@@ -1186,17 +1217,30 @@ begin
ScalpPacketStatusxD(C_RD_WAIT_NEXT) <= '0';
RXFifoRdDataStatexD <= RXFifoRdDataStatexD;
RXFifoRdDataStateNextxD <= RXFifoRdDataStateNextxD;
+ -- HeaderCountxD := HeaderCountxD;
case RXFifoRdDataStatexD is
when E_RD_IDLE =>
if ScalpPacketCtrlxD(C_RD_NEW_PACKET) = '1' then
ScalpPacketStatusxD(C_RD_LAST) <= '0';
+ RXFifoRdDataStatexD <= E_RD_WORD;
+ -- HeaderCountxD := 0;
end if;
when E_RD_WORD =>
if RXFifoTXM2SxD.ValidxS = '1' and ScalpPacketCtrlxD(C_RD_NEXT) = '0' then
- RXFifoTXS2MxS.ReadyxS <= '1';
- ScalpPacketReadDataxD <= RXFifoTXM2SxD.DataxD;
+
+ -- if HeaderCountxD = 0 then
+ -- ScalpPacketReadDataxD <= change_endian_ul(RXFifoTXM2SxD.DataxD);
+ -- elsif HeaderCountxD = 1 then
+ -- ScalpPacketReadDataxD <= change_endian_ul(RXFifoTXM2SxD.DataxD);
+ -- elsif HeaderCountxD = 2 then
+ -- ScalpPacketReadDataxD <= change_endian_ul("0000000000000000" & RXFifoTXM2SxD.DataxD(15 downto 0));
+ -- else
+ -- ScalpPacketReadDataxD <= change_endian_ul(RXFifoTXM2SxD.DataxD);
+ -- end if;
+
+ ScalpPacketReadDataxD <= change_endian_ul(RXFifoTXM2SxD.DataxD);
ScalpPacketStatusxD(C_RD_VALID) <= '1';
RXFifoRdDataStatexD <= E_RD_NEXT;
RXFifoRdDataStateNextxD <= E_RD_WORD;
@@ -1208,12 +1252,14 @@ begin
end if;
when E_RD_NEXT =>
- ScalpPacketReadDataxD <= RXFifoTXM2SxD.DataxD;
+ ScalpPacketReadDataxD <= change_endian_ul(RXFifoTXM2SxD.DataxD);
ScalpPacketStatusxD(C_RD_VALID) <= '1';
ScalpPacketStatusxD(C_RD_WAIT_NEXT) <= '1';
if ScalpPacketCtrlxD(C_RD_NEXT) = '1' then
- RXFifoRdDataStatexD <= RXFifoRdDataStateNextxD;
+ RXFifoTXS2MxS.ReadyxS <= '1';
+ RXFifoRdDataStatexD <= RXFifoRdDataStateNextxD;
+ -- HeaderCountxD := HeaderCountxD + 1;
end if;
when others => null;