diff --git a/tools/config/scalp_router_firmware.json b/tools/config/scalp_router_firmware.json new file mode 100644 index 0000000000000000000000000000000000000000..df2dd20dc36ad083f64af98b0a40125337bea7ec --- /dev/null +++ b/tools/config/scalp_router_firmware.json @@ -0,0 +1,90 @@ +{ + "author" : { + "name" : "Joachim Schmidt", + "email" : "<joachim.schmidt@hesge.ch>" + }, + "project" : { + "name" : "scalp_router_firmware", + "type" : "DESIGN_PRJ_TYPE", + "category" : "DESIGNS", + "vivado_version" : "2020.2", + "target_language" : "VHDL", + "vhdl_version" : "VHDL 2008" + }, + "hardware" : { + "part_name" : "xc7z015clg485-2", + "board_name" : "hepia-cores.ch:scalp_node:part0:0.1" + }, + "constraints" : { + "scalp_firmware" : "enable", + "ibert_constraints" : "disable", + "debug" : "enable", + "timing_constraints" : "enable" + }, + "components" : { + "packages" : { + "aurora_drp_pkg" : { + "enable" : "true" + }, + "aurora_status_pkg" : { + "enable" : "true" + }, + "axi4_pkg" : { + "enable" : "true" + } + }, + "soc" : { + "scalp_zynqps" : "enable" + }, + "ips" : { + "scalp_router" : { + "hdl" : "enable", + "xci" : { + } + }, + "scalp_rx_link_layer" : { + "hdl" : "enable", + "xci" : { + } + }, + "scalp_aurora_phy" : { + "hdl" : "enable", + "xci" : { + "east_channel" : "enable", + "north_channel" : "enable", + "south_channel" : "enable", + "west_channel" : "enable" + } + }, + "scalp_aurora_phy_rx_fifo" : + { + "hdl" : "enable", + "xci" : { + "axis_data_fifo" : "enable" + } + }, + "scalp_design_aurora_clk" : { + "hdl" : "disable", + "xci" : { + "scalp_aurora_clk" : "enable" + } + }, + "scalp_design_debug" : { + "hdl" : "disable", + "xci" : { + "data_counter" : "disable", + "vio_axi_cnt_ctrl" : "disable", + "vio_status" : "enable", + "vio_user_resets" : "enable" + } + }, + "scalp_axis_fifo_wrapper" : + { + "hdl" : "enable", + "xci" : { + "scalp_axis_fifo" : "enable" + } + } + } + } +}