From f3b37fa5e0d0ed45f9317115db745a8a0b0eca13 Mon Sep 17 00:00:00 2001
From: ThePurpleOne <jonas@stirnemann.xyz>
Date: Fri, 17 Jun 2022 01:03:29 +0200
Subject: [PATCH] Added software assembly
---
.../__pycache__/circ_manager.cpython-310.pyc | Bin 0 -> 2190 bytes
.../instruction_test.lsn | 3 +-
CPU/logi_compiler_sources/instructions.circ | 1029 +++++++++++++++++
CPU/logi_compiler_sources/logi_compiler.py | 30 +-
CPU/logi_compiler_sources/prog.lsn | 106 ++
.../rom_base_BACKUP.circ | 309 +++++
6 files changed, 1461 insertions(+), 16 deletions(-)
create mode 100644 CPU/logi_compiler_sources/__pycache__/circ_manager.cpython-310.pyc
create mode 100644 CPU/logi_compiler_sources/instructions.circ
create mode 100644 CPU/logi_compiler_sources/prog.lsn
create mode 100644 CPU/logi_compiler_sources/rom_base_BACKUP.circ
diff --git a/CPU/logi_compiler_sources/__pycache__/circ_manager.cpython-310.pyc b/CPU/logi_compiler_sources/__pycache__/circ_manager.cpython-310.pyc
new file mode 100644
index 0000000000000000000000000000000000000000..329add6f065ebccbd5199dc115f9d07d32847e0d
GIT binary patch
literal 2190
zcmd1j<>g{vU|^V>vN|c3gMr~Oh=Yuo85kHG7#J9e%@`OMQW#Pga~N_NqZk=MY^EHh
zD5eyK6s8>JDCQLA6qXi-C>D2y6xI~B7KRkIW~M0C6sBMXP4<@{6EzucvFB#yWv1lk
z`Xw`hM4%YNW?^7pa0XeU#=yW(!cfAP!r07I#9P9Y#k_!}gfWY?hG8L7Fav~N!?2Js
zm_d`t?-obAud8Q(V{ou0+b#Bt#Nxz~lA>G8#g)aknDUEnu@oehWZYuO%FoOz0{KIe
zF^Z!oH7Btovn+KbLlGwf1H&&TC#x6_*8oq)nBvOf_?-N7IPDw|8k3Wso*AE<pIeZb
zlUfvCoL^d$oLU@{oLQ6{pPQJMn4VgsS5SG2w<r}N6%VqI2jmSl1_lN$Mgc}1#v*P8
z28Lv)SK$;BELaT~7#LC+q8L*cqL@+`qnJ~eQkX%(n8K36+QJaUn!=XC-og;Ymco(3
z*}@RTp28K(pvirU+c~o+*%#u3s*hX>P!N)lS*(zplUQ7=kXfuyTAZ4qP?E2ZSWu9f
zm!gncnp2WlkdvyQo}8aoT#}eqqOJh)TYhn3UWr0x9!RA^Qettcf*#0+5Od&0hr$d?
zNm0nmD=sN2O)kmI&nt#$EY8dYnT;f+5ajQxkdj)QnVy%LqL5Un;1lepP+U@)lA2ed
zrx22n3RaL=tdIz|Bqy`DL?J&-0p>u3^30M9g+#d1D^iQVY6+#E1&k$3DU8jG3mIz|
z;+bn0K&dE&X(3|@vm`?eLp*B=LokCTi(eIQQGRYb$je|K-(m;(yEL<;2$Uo>*@{51
zbc?khv8Xr|9F4cwDsppD@{^-P(o;)Zb5e6t^Gb@HDnk;}{StFii+C9r7*;agVku6|
zNdu=Y2m#7qw>aYCGxIV_;^QSj$pe(!1sKH`t3;6EQ4gjh8DuXksc<kbFo04MICsne
zWkSYUrWB@H<`m{ymK2s+))dxSwi-qkhFJSr_8PVnHZg`2)@-IC#TteM3?+;;Of@WN
zOwEib>^1D-3=5eU8S;3bGR){QHEbyy<_xuLH7qr(<_xtgHEb!I*-S;&DO_MScQ#Xz
zE7(?^TBa1<TIL$I6uxYxB5#m<ArClA`Ta6k7#SEcbr=~KUiL6BFuVl$9vq%8LB6`h
zWRUa{6uK`J7#J8bIhYt2UV@63Of@D3hD<*YH-UkHL6hm0bUaef#K$M5q<}MGeqL%`
z$t~vMk|IrxB0&ZQhFjc8nR$stmGPjo6U9}KUmPD1pOcza62%Q+7iFerlti(DIFV6o
z#U-f)@sYP!lk-dSN^Y^F=A`CAVu_Q1fuRWG*jv#25)Vs+@oC^xg0Mvv6opz03=Axc
zFv!8k!zjfl!NkD`f-H<2P#F--)WGtoN(ad|dXNl>+X9T_4GKDN0suL%h9Qe#0pmhY
z5@z(%WGdokU|@*iF3B$_N-Zg=tjNtN5&-!H>>)4#(sYYGJ+&l0!q>+b<am&IT#Qx1
z$c}=_Cxc2#SmI*^c@kDMgAyOa?i9v_jJ3=)%nO)6#T6(~f!QoIjBqw<3LBUWc54dz
zLdIH_8kPl2DXb|RU~v$eGldJxW?sNt!?KW(kpXHtvTAOy3b5)LCNLXWHOm6#8fK7A
zaN^_fyTt-3&~7p3WG3BWG`Pi_lb?KxB`+~IHHyO-TIStiOuWTfo|#gTaf`VuF(-=2
z(Cij#Sz=CUswOKWD0!2MQWHy3q4_(Cr#Q95v81FZGpV#BHHsS&cg`7^IVs=_ugMBd
zhDEBNFxLbTN}%}QC@xI`Cs?%96~&L1md!x%A;rMJz{7|Pxu85yB~m5rj418((DeIh
za)1gKkSF8gZ*j%P=jNxB=A_2Q-{OgnFDy;Wfy%JQ$EV~c$Hx~5f!qkneMO2OmNbaq
zL?u88rU+Dzfz%d*7#s{NOdPBnEF5Ay%wQQ!wkY<B+#J1>{9JG`Sp-TdMWBKTTvCG7
gAbA~Z0m#@}95xUK+JQ=eVvrCI8z|3kFblB(0NiI3;s5{u
literal 0
HcmV?d00001
diff --git a/CPU/logi_compiler_sources/instruction_test.lsn b/CPU/logi_compiler_sources/instruction_test.lsn
index a1903dd..02ca9b7 100644
--- a/CPU/logi_compiler_sources/instruction_test.lsn
+++ b/CPU/logi_compiler_sources/instruction_test.lsn
@@ -42,11 +42,12 @@ fonction:
r0 = r0 + r0
br [r7]
-# Lecture et écriture mémoire
+# Lecture RAM -> REG BANK
ld r0,0x20[r2]
ld r3,0b1010[r4]
ld r3,3[r4]
+# écriture mémoire REG BANK -> RAM
st r0,0x2A[r2]
st r1,19[r3]
diff --git a/CPU/logi_compiler_sources/instructions.circ b/CPU/logi_compiler_sources/instructions.circ
new file mode 100644
index 0000000..0c9c875
--- /dev/null
+++ b/CPU/logi_compiler_sources/instructions.circ
@@ -0,0 +1,1029 @@
+<?xml version="1.0" ?>
+<project source="2.10.1" version="1.0">
+
+This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
+
+ <lib desc="#Wiring" name="0">
+
+
+ <tool name="Splitter">
+
+
+ <a name="fanout" val="32"/>
+
+
+ <a name="incoming" val="32"/>
+
+
+ </tool>
+
+
+ </lib>
+
+
+ <lib desc="#Gates" name="1"/>
+
+
+ <lib desc="#Plexers" name="2"/>
+
+
+ <lib desc="#Arithmetic" name="3"/>
+
+
+ <lib desc="#Memory" name="4"/>
+
+
+ <lib desc="#I/O" name="5"/>
+
+
+ <lib desc="#HDL-IP" name="6"/>
+
+
+ <lib desc="#Base" name="7">
+
+
+ <tool name="Text Tool">
+
+
+ <a name="text" val=""/>
+
+
+ <a name="font" val="SansSerif plain 12"/>
+
+
+ <a name="halign" val="center"/>
+
+
+ <a name="valign" val="base"/>
+
+
+ </tool>
+
+
+ </lib>
+
+
+ <main name="rom"/>
+
+
+ <options>
+
+
+ <a name="gateUndefined" val="ignore"/>
+
+
+ <a name="simlimit" val="1000"/>
+
+
+ <a name="simrand" val="0"/>
+
+
+ <a name="tickmain" val="half_period"/>
+
+
+ </options>
+
+
+ <mappings>
+
+
+ <tool lib="7" map="Button2" name="Menu Tool"/>
+
+
+ <tool lib="7" map="Ctrl Button1" name="Menu Tool"/>
+
+
+ <tool lib="7" map="Button3" name="Menu Tool"/>
+
+
+ </mappings>
+
+
+ <toolbar>
+
+
+ <tool lib="7" name="Poke Tool"/>
+
+
+ <tool lib="7" name="Edit Tool"/>
+
+
+ <tool lib="7" name="Text Tool">
+
+
+ <a name="text" val=""/>
+
+
+ <a name="font" val="SansSerif plain 12"/>
+
+
+ <a name="halign" val="center"/>
+
+
+ <a name="valign" val="base"/>
+
+
+ </tool>
+
+
+ <sep/>
+
+
+ <tool lib="0" name="Pin">
+
+
+ <a name="tristate" val="false"/>
+
+
+ </tool>
+
+
+ <tool lib="0" name="Pin">
+
+
+ <a name="facing" val="west"/>
+
+
+ <a name="output" val="true"/>
+
+
+ <a name="labelloc" val="east"/>
+
+
+ </tool>
+
+
+ <tool lib="1" name="NOT Gate"/>
+
+
+ <tool lib="1" name="AND Gate"/>
+
+
+ <tool lib="1" name="OR Gate"/>
+
+
+ </toolbar>
+
+
+ <circuit name="rom">
+
+
+ <a name="circuit" val="rom"/>
+
+
+ <a name="clabel" val=""/>
+
+
+ <a name="clabelup" val="east"/>
+
+
+ <a name="clabelfont" val="SansSerif plain 12"/>
+
+
+ <a name="circuitvhdl" val="false"/>
+
+
+ <a name="circuitvhdlpath" val=""/>
+
+
+ <wire from="(410,680)" to="(450,680)"/>
+
+
+ <wire from="(300,810)" to="(370,810)"/>
+
+
+ <wire from="(550,180)" to="(660,180)"/>
+
+
+ <wire from="(260,180)" to="(370,180)"/>
+
+
+ <wire from="(180,510)" to="(190,510)"/>
+
+
+ <wire from="(550,240)" to="(660,240)"/>
+
+
+ <wire from="(590,750)" to="(660,750)"/>
+
+
+ <wire from="(300,190)" to="(370,190)"/>
+
+
+ <wire from="(590,310)" to="(660,310)"/>
+
+
+ <wire from="(260,240)" to="(370,240)"/>
+
+
+ <wire from="(980,650)" to="(1000,650)"/>
+
+
+ <wire from="(590,250)" to="(660,250)"/>
+
+
+ <wire from="(590,190)" to="(660,190)"/>
+
+
+ <wire from="(300,750)" to="(370,750)"/>
+
+
+ <wire from="(300,310)" to="(370,310)"/>
+
+
+ <wire from="(550,400)" to="(660,400)"/>
+
+
+ <wire from="(590,550)" to="(660,550)"/>
+
+
+ <wire from="(550,680)" to="(660,680)"/>
+
+
+ <wire from="(260,620)" to="(370,620)"/>
+
+
+ <wire from="(260,400)" to="(370,400)"/>
+
+
+ <wire from="(300,550)" to="(370,550)"/>
+
+
+ <wire from="(300,630)" to="(370,630)"/>
+
+
+ <wire from="(550,620)" to="(660,620)"/>
+
+
+ <wire from="(260,680)" to="(370,680)"/>
+
+
+ <wire from="(550,280)" to="(660,280)"/>
+
+
+ <wire from="(180,480)" to="(390,480)"/>
+
+
+ <wire from="(260,340)" to="(370,340)"/>
+
+
+ <wire from="(590,690)" to="(660,690)"/>
+
+
+ <wire from="(300,690)" to="(370,690)"/>
+
+
+ <wire from="(300,250)" to="(370,250)"/>
+
+
+ <wire from="(550,780)" to="(660,780)"/>
+
+
+ <wire from="(260,520)" to="(370,520)"/>
+
+
+ <wire from="(410,300)" to="(450,300)"/>
+
+
+ <wire from="(260,740)" to="(370,740)"/>
+
+
+ <wire from="(550,340)" to="(660,340)"/>
+
+
+ <wire from="(550,560)" to="(660,560)"/>
+
+
+ <wire from="(260,560)" to="(370,560)"/>
+
+
+ <wire from="(590,630)" to="(660,630)"/>
+
+
+ <wire from="(550,740)" to="(660,740)"/>
+
+
+ <wire from="(700,680)" to="(740,680)"/>
+
+
+ <wire from="(300,610)" to="(370,610)"/>
+
+
+ <wire from="(300,790)" to="(370,790)"/>
+
+
+ <wire from="(550,440)" to="(660,440)"/>
+
+
+ <wire from="(260,780)" to="(370,780)"/>
+
+
+ <wire from="(550,520)" to="(660,520)"/>
+
+
+ <wire from="(590,210)" to="(660,210)"/>
+
+
+ <wire from="(300,390)" to="(370,390)"/>
+
+
+ <wire from="(300,730)" to="(370,730)"/>
+
+
+ <wire from="(300,230)" to="(370,230)"/>
+
+
+ <wire from="(550,580)" to="(660,580)"/>
+
+
+ <wire from="(260,720)" to="(370,720)"/>
+
+
+ <wire from="(590,270)" to="(660,270)"/>
+
+
+ <wire from="(140,490)" to="(160,490)"/>
+
+
+ <wire from="(260,280)" to="(370,280)"/>
+
+
+ <wire from="(300,670)" to="(370,670)"/>
+
+
+ <wire from="(300,450)" to="(370,450)"/>
+
+
+ <wire from="(550,140)" to="(660,140)"/>
+
+
+ <wire from="(260,360)" to="(370,360)"/>
+
+
+ <wire from="(260,800)" to="(370,800)"/>
+
+
+ <wire from="(260,600)" to="(370,600)"/>
+
+
+ <wire from="(590,590)" to="(660,590)"/>
+
+
+ <wire from="(550,700)" to="(660,700)"/>
+
+
+ <wire from="(260,420)" to="(370,420)"/>
+
+
+ <wire from="(300,350)" to="(370,350)"/>
+
+
+ <wire from="(300,570)" to="(370,570)"/>
+
+
+ <wire from="(590,370)" to="(660,370)"/>
+
+
+ <wire from="(590,150)" to="(660,150)"/>
+
+
+ <wire from="(300,290)" to="(370,290)"/>
+
+
+ <wire from="(550,820)" to="(660,820)"/>
+
+
+ <wire from="(590,810)" to="(660,810)"/>
+
+
+ <wire from="(260,300)" to="(370,300)"/>
+
+
+ <wire from="(550,200)" to="(660,200)"/>
+
+
+ <wire from="(680,460)" to="(680,480)"/>
+
+
+ <wire from="(810,740)" to="(910,740)"/>
+
+
+ <wire from="(550,640)" to="(660,640)"/>
+
+
+ <wire from="(180,490)" to="(180,510)"/>
+
+
+ <wire from="(260,660)" to="(370,660)"/>
+
+
+ <wire from="(390,480)" to="(390,520)"/>
+
+
+ <wire from="(590,430)" to="(660,430)"/>
+
+
+ <wire from="(550,260)" to="(660,260)"/>
+
+
+ <wire from="(300,590)" to="(370,590)"/>
+
+
+ <wire from="(860,730)" to="(910,730)"/>
+
+
+ <wire from="(590,350)" to="(660,350)"/>
+
+
+ <wire from="(260,380)" to="(370,380)"/>
+
+
+ <wire from="(300,530)" to="(370,530)"/>
+
+
+ <wire from="(550,320)" to="(660,320)"/>
+
+
+ <wire from="(590,710)" to="(660,710)"/>
+
+
+ <wire from="(260,320)" to="(370,320)"/>
+
+
+ <wire from="(950,740)" to="(1000,740)"/>
+
+
+ <wire from="(550,760)" to="(660,760)"/>
+
+
+ <wire from="(590,650)" to="(660,650)"/>
+
+
+ <wire from="(260,540)" to="(370,540)"/>
+
+
+ <wire from="(550,540)" to="(660,540)"/>
+
+
+ <wire from="(260,760)" to="(370,760)"/>
+
+
+ <wire from="(300,710)" to="(370,710)"/>
+
+
+ <wire from="(300,410)" to="(370,410)"/>
+
+
+ <wire from="(590,530)" to="(660,530)"/>
+
+
+ <wire from="(260,220)" to="(370,220)"/>
+
+
+ <wire from="(590,330)" to="(660,330)"/>
+
+
+ <wire from="(300,770)" to="(370,770)"/>
+
+
+ <wire from="(590,770)" to="(660,770)"/>
+
+
+ <wire from="(550,220)" to="(660,220)"/>
+
+
+ <wire from="(300,170)" to="(370,170)"/>
+
+
+ <wire from="(590,410)" to="(660,410)"/>
+
+
+ <wire from="(300,830)" to="(370,830)"/>
+
+
+ <wire from="(550,380)" to="(660,380)"/>
+
+
+ <wire from="(260,160)" to="(370,160)"/>
+
+
+ <wire from="(590,830)" to="(660,830)"/>
+
+
+ <wire from="(550,160)" to="(660,160)"/>
+
+
+ <wire from="(920,820)" to="(930,820)"/>
+
+
+ <wire from="(860,750)" to="(910,750)"/>
+
+
+ <wire from="(590,790)" to="(660,790)"/>
+
+
+ <wire from="(1000,650)" to="(1000,740)"/>
+
+
+ <wire from="(590,570)" to="(660,570)"/>
+
+
+ <wire from="(260,640)" to="(370,640)"/>
+
+
+ <wire from="(810,720)" to="(910,720)"/>
+
+
+ <wire from="(550,660)" to="(660,660)"/>
+
+
+ <wire from="(590,170)" to="(660,170)"/>
+
+
+ <wire from="(590,610)" to="(660,610)"/>
+
+
+ <wire from="(550,720)" to="(660,720)"/>
+
+
+ <wire from="(260,580)" to="(370,580)"/>
+
+
+ <wire from="(300,330)" to="(370,330)"/>
+
+
+ <wire from="(260,440)" to="(370,440)"/>
+
+
+ <wire from="(550,360)" to="(660,360)"/>
+
+
+ <wire from="(590,450)" to="(660,450)"/>
+
+
+ <wire from="(390,480)" to="(680,480)"/>
+
+
+ <wire from="(590,670)" to="(660,670)"/>
+
+
+ <wire from="(700,300)" to="(740,300)"/>
+
+
+ <wire from="(300,270)" to="(370,270)"/>
+
+
+ <wire from="(550,800)" to="(660,800)"/>
+
+
+ <wire from="(590,390)" to="(660,390)"/>
+
+
+ <wire from="(590,730)" to="(660,730)"/>
+
+
+ <wire from="(930,760)" to="(930,820)"/>
+
+
+ <wire from="(1000,740)" to="(1030,740)"/>
+
+
+ <wire from="(260,200)" to="(370,200)"/>
+
+
+ <wire from="(260,820)" to="(370,820)"/>
+
+
+ <wire from="(300,370)" to="(370,370)"/>
+
+
+ <wire from="(300,150)" to="(370,150)"/>
+
+
+ <wire from="(300,430)" to="(370,430)"/>
+
+
+ <wire from="(550,420)" to="(660,420)"/>
+
+
+ <wire from="(260,140)" to="(370,140)"/>
+
+
+ <wire from="(590,230)" to="(660,230)"/>
+
+
+ <wire from="(680,480)" to="(680,520)"/>
+
+
+ <wire from="(260,260)" to="(370,260)"/>
+
+
+ <wire from="(590,290)" to="(660,290)"/>
+
+
+ <wire from="(300,650)" to="(370,650)"/>
+
+
+ <wire from="(390,460)" to="(390,480)"/>
+
+
+ <wire from="(300,210)" to="(370,210)"/>
+
+
+ <wire from="(260,700)" to="(370,700)"/>
+
+
+ <wire from="(550,300)" to="(660,300)"/>
+
+
+ <wire from="(550,600)" to="(660,600)"/>
+
+
+ <comp lib="0" loc="(920,820)" name="Tunnel">
+
+
+ <a name="facing" val="east"/>
+
+
+ <a name="width" val="2"/>
+
+
+ <a name="label" val="sel"/>
+
+
+ </comp>
+
+
+ <comp lib="2" loc="(410,300)" name="Multiplexer">
+
+
+ <a name="select" val="5"/>
+
+
+ <a name="width" val="16"/>
+
+
+ </comp>
+
+
+ <comp lib="2" loc="(700,300)" name="Multiplexer">
+
+
+ <a name="select" val="5"/>
+
+
+ <a name="width" val="16"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(980,650)" name="Probe">
+
+
+ <a name="radix" val="16"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(810,720)" name="Tunnel">
+
+
+ <a name="facing" val="east"/>
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux0"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(160,490)" name="Splitter">
+
+
+ <a name="incoming" val="7"/>
+
+
+ <a name="appear" val="center"/>
+
+
+ <a name="bit1" val="0"/>
+
+
+ <a name="bit2" val="0"/>
+
+
+ <a name="bit3" val="0"/>
+
+
+ <a name="bit4" val="0"/>
+
+
+ <a name="bit5" val="1"/>
+
+
+ <a name="bit6" val="1"/>
+
+
+ </comp>
+
+
+ <comp lib="2" loc="(410,680)" name="Multiplexer">
+
+
+ <a name="selloc" val="tr"/>
+
+
+ <a name="select" val="5"/>
+
+
+ <a name="width" val="16"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(450,680)" name="Tunnel">
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux1"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(740,300)" name="Tunnel">
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux2"/>
+
+
+ </comp>
+
+
+ <comp lib="2" loc="(700,680)" name="Multiplexer">
+
+
+ <a name="selloc" val="tr"/>
+
+
+ <a name="select" val="5"/>
+
+
+ <a name="width" val="16"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(190,510)" name="Tunnel">
+
+
+ <a name="width" val="2"/>
+
+
+ <a name="label" val="sel"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(1030,740)" name="Pin">
+
+
+ <a name="facing" val="west"/>
+
+
+ <a name="output" val="true"/>
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="data_out"/>
+
+
+ <a name="labelloc" val="east"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(450,300)" name="Tunnel">
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux0"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(860,730)" name="Tunnel">
+
+
+ <a name="facing" val="east"/>
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux1"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(860,750)" name="Tunnel">
+
+
+ <a name="facing" val="east"/>
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux3"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(810,740)" name="Tunnel">
+
+
+ <a name="facing" val="east"/>
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux2"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(140,490)" name="Pin">
+
+
+ <a name="width" val="7"/>
+
+
+ <a name="tristate" val="false"/>
+
+
+ <a name="label" val="addr"/>
+
+
+ </comp>
+
+
+ <comp lib="2" loc="(950,740)" name="Multiplexer">
+
+
+ <a name="select" val="2"/>
+
+
+ <a name="width" val="16"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(740,680)" name="Tunnel">
+
+
+ <a name="width" val="16"/>
+
+
+ <a name="label" val="mux3"/>
+
+
+ </comp>
+
+
+ <comp lib="0" loc="(260, 140)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000000000010000"/>
+ </comp>
+ <comp lib="0" loc="(300, 150)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1100001000000000"/>
+ </comp>
+ <comp lib="0" loc="(260, 160)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000010001110111"/>
+ </comp>
+ <comp lib="0" loc="(300, 170)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b0001011001010000"/>
+ </comp>
+ <comp lib="0" loc="(260, 180)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1010100000001011"/>
+ </comp>
+ <comp lib="0" loc="(300, 190)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000010001100001"/>
+ </comp>
+ <comp lib="0" loc="(260, 200)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b0001011001010000"/>
+ </comp>
+ <comp lib="0" loc="(300, 210)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1010100000001110"/>
+ </comp>
+ <comp lib="0" loc="(260, 220)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000010001100100"/>
+ </comp>
+ <comp lib="0" loc="(300, 230)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b0001011001010000"/>
+ </comp>
+ <comp lib="0" loc="(260, 240)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1010100000001000"/>
+ </comp>
+ <comp lib="0" loc="(300, 250)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000010001100100"/>
+ </comp>
+ <comp lib="0" loc="(260, 260)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b0001011001010000"/>
+ </comp>
+ <comp lib="0" loc="(300, 270)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1010100000001000"/>
+ </comp>
+ <comp lib="0" loc="(260, 280)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1011111111110010"/>
+ </comp>
+ <comp lib="0" loc="(300, 290)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000100001100100"/>
+ </comp>
+ <comp lib="0" loc="(260, 300)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000101001100100"/>
+ </comp>
+ <comp lib="0" loc="(300, 310)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1111111000000000"/>
+ </comp>
+ <comp lib="0" loc="(260, 320)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000100010011100"/>
+ </comp>
+ <comp lib="0" loc="(300, 330)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000101010011100"/>
+ </comp>
+ <comp lib="0" loc="(260, 340)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1111111000000000"/>
+ </comp>
+ <comp lib="0" loc="(300, 350)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000100000110010"/>
+ </comp>
+ <comp lib="0" loc="(260, 360)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000101011001110"/>
+ </comp>
+ <comp lib="0" loc="(300, 370)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1111111000000000"/>
+ </comp>
+ <comp lib="0" loc="(260, 380)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000100011001110"/>
+ </comp>
+ <comp lib="0" loc="(300, 390)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1000101000110010"/>
+ </comp>
+ <comp lib="0" loc="(260, 400)" name="Constant">
+ <a name="width" val="16"/>
+ <a name="value" val="0b1111111000000000"/>
+ </comp>
+ </circuit>
+
+
+</project>
diff --git a/CPU/logi_compiler_sources/logi_compiler.py b/CPU/logi_compiler_sources/logi_compiler.py
index 257afc1..4500f1c 100755
--- a/CPU/logi_compiler_sources/logi_compiler.py
+++ b/CPU/logi_compiler_sources/logi_compiler.py
@@ -11,8 +11,8 @@ from circ_manager import CircManager
def error_message(message, error_level='FATAL ERROR'):
if error_level is not None:
- print '***', error_level, '***'
- print message
+ print( '***', error_level, '***')
+ print( message)
sys.exit(0)
@@ -78,9 +78,9 @@ class LogiCompiler():
error_message('On line ' + str(self.current_line))
if instruction.data is not None:
if instruction.data is 'label':
- print operands[0][0]
+ print( operands[0][0])
else:
- print instruction.data, ' : ', ' '.join(operands[0])
+ print( instruction.data, ' : ', ' '.join(operands[0]))
binary_list.append(instruction.data)
else:
error_message('On line ' + str(self.current_line))
@@ -156,7 +156,7 @@ class LogiCompiler():
def __get_binary_from_2_operands(self, operands, line_nbr, label_with_line):
if operands[0] not in LogiCompiler.opcode:
- print 'Error:', operands[0], 'not reconized'
+ print( 'Error:', operands[0], 'not reconized')
return
opcode = LogiCompiler.opcode[operands[0]]
# bcz / bcn / bcc / bcv
@@ -192,7 +192,7 @@ class LogiCompiler():
def __get_binary_from_3_operands(self, operands):
if operands[1] not in LogiCompiler.opcode:
- print 'Error:', operands[1], 'not reconized'
+ print( 'Error:', operands[1], 'not reconized')
return
# Affectation
opcode = LogiCompiler.opcode[operands[1]]
@@ -209,7 +209,7 @@ class LogiCompiler():
reserved = '000000000'
return opcode + result + reserved
if operands[2] not in LogiCompiler.opcode:
- print 'Error:', operands[2], 'not reconized'
+ print( 'Error:', operands[2], 'not reconized')
return
# asr / not
opcode = LogiCompiler.opcode[operands[2]]
@@ -256,7 +256,7 @@ class LogiCompiler():
# add / sub / shift / or / and
else:
if operands[3] not in LogiCompiler.opcode:
- print 'Error:', operands[3], 'not reconized'
+ print( 'Error:', operands[3], 'not reconized')
return
opcode = LogiCompiler.opcode[operands[3]]
result = LogiCompiler.register[operands[0]]
@@ -272,9 +272,9 @@ class LogiCompiler():
def __get_binary_from_10_operands(self, operands):
# GR / GW
if operands[0] not in LogiCompiler.opcode:
- print 'Error:', operands[0], 'not reconized'
+ print( 'Error:', operands[0], 'not reconized')
return
- print(operands)
+ print((operands))
opcode = LogiCompiler.opcode[operands[0]]
data = LogiCompiler.register[operands[2]]
ah = LogiCompiler.register[operands[5]]
@@ -307,10 +307,10 @@ class LogiCompiler():
def __bin_to_binary(self, binnum, bits):
if len(binnum) > bits+2:
- print binnum, 'size must not be longer than', bits, 'bits'
+ print( binnum, 'size must not be longer than', bits, 'bits')
return
elif len(binnum) <= 2:
- print binnum, 'is too short'
+ print( binnum, 'is too short')
return
return binnum[2:].zfill(bits)
@@ -323,7 +323,7 @@ class LogiCompiler():
if __name__ == '__main__':
if len(sys.argv) != 3:
- print 'usage: ./logi_compiler lsn_assembly_file output_file.circ'
+ print( 'usage: ./logi_compiler lsn_assembly_file output_file.circ')
sys.exit(0)
in_file = sys.argv[1]
out_file = sys.argv[2]
@@ -331,7 +331,7 @@ if __name__ == '__main__':
logicomp = LogiCompiler()
binary_list = logicomp.get_binary_list(assembly)
if len(binary_list) > 128:
- print len(binary_list), 'instructions found. Max limit is 128'
+ print( len(binary_list), 'instructions found. Max limit is 128')
sys.exit(0)
circ_manager = CircManager()
circ_manager.append_constant_from_binary_list(binary_list)
@@ -341,4 +341,4 @@ if __name__ == '__main__':
for char in circ_manager.get_XML():
f.write(char)
f.close()
- print out_file, 'successfully generated'
+ print( out_file, 'successfully generated')
diff --git a/CPU/logi_compiler_sources/prog.lsn b/CPU/logi_compiler_sources/prog.lsn
new file mode 100644
index 0000000..6a76f29
--- /dev/null
+++ b/CPU/logi_compiler_sources/prog.lsn
@@ -0,0 +1,106 @@
+# ############# PERIPHERALS ADDRESSES ############
+# 0x10 UART BLUETOOTH IN
+# 0x11 PWM WHEEL RIGHT
+# 0x12 PWM WHEEL LEFT
+# ################################################
+
+
+# ################# KEYS RECEIVED ################
+# 0x77 'w'
+# 0x61 'a'
+# 0x73 's'
+# 0x64 'd'
+# ################################################
+
+
+# ################### MOVEMENTS ##################
+# -100 = 0x9C
+# -50 = 0xCE
+# ! GO FORWARD
+# RIGHT = LEFT = 100
+
+# ! GO BACKWARD
+# RIGHT = LEFT = -100
+
+# ! GO LEFT
+# RIGHT = 50
+# LEFT = -50
+
+# ! GO RIGHT
+# RIGHT = -50
+# LEFT = 50
+# ################################################
+
+
+loop:
+# SET ADDR TO READ UART
+r0 = 0x10
+
+# LOAD UART VALUE FROM RAM TO r1
+ld r1,0[r0]
+
+# r2 and r3 IS A TEMP BUFFER TO CHECK VALUE
+# CHECK FOR W
+r2 = 0x77
+r3 = r1 - r2
+# IF THE UART IN == 'w' , GO FORWARD
+bcz goforward
+
+# CHECK FOR A
+r2 = 0x61
+r3 = r1 - r2
+# IF THE UART IN == 'a' , GO LEFT
+bcz goleft
+
+# CHECK FOR S
+r2 = 0x64
+r3 = r1 - r2
+# IF THE UART IN == 's' , GO BACKWARD
+bcz gobackward
+
+# CHECK FOR d
+r2 = 0x64
+r3 = r1 - r2
+# IF THE UART IN == 'd' , GO RIGHT
+bcz goleft
+
+# BRANCH LOOP - GET BACK UP TO LOOP LABEL
+b loop
+
+
+
+
+
+# ############# FONCTIONS MOVEMENTS ############
+# r4 FOR PWM RIGHT
+# r5 FOR PWM LEFT
+# FONCTION TO SET REGS AT FORWARD
+goforward:
+r4 = 100
+r5 = 100
+br [r7]
+
+# FONCTION TO SET REGS AT FORWARD
+gobackward:
+r4 = 0x9C
+r5 = 0x9C
+br [r7]
+
+# FONCTION TO SET REGS AT FORWARD
+goleft:
+r4 = 50
+r5 = 0xCE
+br [r7]
+
+# FONCTION TO SET REGS AT FORWARD
+goright:
+r4 = 0xCE
+r5 = 50
+br [r7]
+# ################################################
+
+
+
+
+
+
diff --git a/CPU/logi_compiler_sources/rom_base_BACKUP.circ b/CPU/logi_compiler_sources/rom_base_BACKUP.circ
new file mode 100644
index 0000000..19fca5f
--- /dev/null
+++ b/CPU/logi_compiler_sources/rom_base_BACKUP.circ
@@ -0,0 +1,309 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project source="2.10.1" version="1.0">
+This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
+<lib desc="#Wiring" name="0">
+ <tool name="Splitter">
+ <a name="fanout" val="32"/>
+ <a name="incoming" val="32"/>
+ </tool>
+ </lib>
+ <lib desc="#Gates" name="1"/>
+ <lib desc="#Plexers" name="2"/>
+ <lib desc="#Arithmetic" name="3"/>
+ <lib desc="#Memory" name="4"/>
+ <lib desc="#I/O" name="5"/>
+ <lib desc="#HDL-IP" name="6"/>
+ <lib desc="#Base" name="7">
+ <tool name="Text Tool">
+ <a name="text" val=""/>
+ <a name="font" val="SansSerif plain 12"/>
+ <a name="halign" val="center"/>
+ <a name="valign" val="base"/>
+ </tool>
+ </lib>
+ <main name="rom"/>
+ <options>
+ <a name="gateUndefined" val="ignore"/>
+ <a name="simlimit" val="1000"/>
+ <a name="simrand" val="0"/>
+ <a name="tickmain" val="half_period"/>
+ </options>
+ <mappings>
+ <tool lib="7" map="Button2" name="Menu Tool"/>
+ <tool lib="7" map="Ctrl Button1" name="Menu Tool"/>
+ <tool lib="7" map="Button3" name="Menu Tool"/>
+ </mappings>
+ <toolbar>
+ <tool lib="7" name="Poke Tool"/>
+ <tool lib="7" name="Edit Tool"/>
+ <tool lib="7" name="Text Tool">
+ <a name="text" val=""/>
+ <a name="font" val="SansSerif plain 12"/>
+ <a name="halign" val="center"/>
+ <a name="valign" val="base"/>
+ </tool>
+ <sep/>
+ <tool lib="0" name="Pin">
+ <a name="tristate" val="false"/>
+ </tool>
+ <tool lib="0" name="Pin">
+ <a name="facing" val="west"/>
+ <a name="output" val="true"/>
+ <a name="labelloc" val="east"/>
+ </tool>
+ <tool lib="1" name="NOT Gate"/>
+ <tool lib="1" name="AND Gate"/>
+ <tool lib="1" name="OR Gate"/>
+ </toolbar>
+ <circuit name="rom">
+ <a name="circuit" val="rom"/>
+ <a name="clabel" val=""/>
+ <a name="clabelup" val="east"/>
+ <a name="clabelfont" val="SansSerif plain 12"/>
+ <a name="circuitvhdl" val="false"/>
+ <a name="circuitvhdlpath" val=""/>
+ <wire from="(410,680)" to="(450,680)"/>
+ <wire from="(300,810)" to="(370,810)"/>
+ <wire from="(550,180)" to="(660,180)"/>
+ <wire from="(260,180)" to="(370,180)"/>
+ <wire from="(180,510)" to="(190,510)"/>
+ <wire from="(550,240)" to="(660,240)"/>
+ <wire from="(590,750)" to="(660,750)"/>
+ <wire from="(300,190)" to="(370,190)"/>
+ <wire from="(590,310)" to="(660,310)"/>
+ <wire from="(260,240)" to="(370,240)"/>
+ <wire from="(980,650)" to="(1000,650)"/>
+ <wire from="(590,250)" to="(660,250)"/>
+ <wire from="(590,190)" to="(660,190)"/>
+ <wire from="(300,750)" to="(370,750)"/>
+ <wire from="(300,310)" to="(370,310)"/>
+ <wire from="(550,400)" to="(660,400)"/>
+ <wire from="(590,550)" to="(660,550)"/>
+ <wire from="(550,680)" to="(660,680)"/>
+ <wire from="(260,620)" to="(370,620)"/>
+ <wire from="(260,400)" to="(370,400)"/>
+ <wire from="(300,550)" to="(370,550)"/>
+ <wire from="(300,630)" to="(370,630)"/>
+ <wire from="(550,620)" to="(660,620)"/>
+ <wire from="(260,680)" to="(370,680)"/>
+ <wire from="(550,280)" to="(660,280)"/>
+ <wire from="(180,480)" to="(390,480)"/>
+ <wire from="(260,340)" to="(370,340)"/>
+ <wire from="(590,690)" to="(660,690)"/>
+ <wire from="(300,690)" to="(370,690)"/>
+ <wire from="(300,250)" to="(370,250)"/>
+ <wire from="(550,780)" to="(660,780)"/>
+ <wire from="(260,520)" to="(370,520)"/>
+ <wire from="(410,300)" to="(450,300)"/>
+ <wire from="(260,740)" to="(370,740)"/>
+ <wire from="(550,340)" to="(660,340)"/>
+ <wire from="(550,560)" to="(660,560)"/>
+ <wire from="(260,560)" to="(370,560)"/>
+ <wire from="(590,630)" to="(660,630)"/>
+ <wire from="(550,740)" to="(660,740)"/>
+ <wire from="(700,680)" to="(740,680)"/>
+ <wire from="(300,610)" to="(370,610)"/>
+ <wire from="(300,790)" to="(370,790)"/>
+ <wire from="(550,440)" to="(660,440)"/>
+ <wire from="(260,780)" to="(370,780)"/>
+ <wire from="(550,520)" to="(660,520)"/>
+ <wire from="(590,210)" to="(660,210)"/>
+ <wire from="(300,390)" to="(370,390)"/>
+ <wire from="(300,730)" to="(370,730)"/>
+ <wire from="(300,230)" to="(370,230)"/>
+ <wire from="(550,580)" to="(660,580)"/>
+ <wire from="(260,720)" to="(370,720)"/>
+ <wire from="(590,270)" to="(660,270)"/>
+ <wire from="(140,490)" to="(160,490)"/>
+ <wire from="(260,280)" to="(370,280)"/>
+ <wire from="(300,670)" to="(370,670)"/>
+ <wire from="(300,450)" to="(370,450)"/>
+ <wire from="(550,140)" to="(660,140)"/>
+ <wire from="(260,360)" to="(370,360)"/>
+ <wire from="(260,800)" to="(370,800)"/>
+ <wire from="(260,600)" to="(370,600)"/>
+ <wire from="(590,590)" to="(660,590)"/>
+ <wire from="(550,700)" to="(660,700)"/>
+ <wire from="(260,420)" to="(370,420)"/>
+ <wire from="(300,350)" to="(370,350)"/>
+ <wire from="(300,570)" to="(370,570)"/>
+ <wire from="(590,370)" to="(660,370)"/>
+ <wire from="(590,150)" to="(660,150)"/>
+ <wire from="(300,290)" to="(370,290)"/>
+ <wire from="(550,820)" to="(660,820)"/>
+ <wire from="(590,810)" to="(660,810)"/>
+ <wire from="(260,300)" to="(370,300)"/>
+ <wire from="(550,200)" to="(660,200)"/>
+ <wire from="(680,460)" to="(680,480)"/>
+ <wire from="(810,740)" to="(910,740)"/>
+ <wire from="(550,640)" to="(660,640)"/>
+ <wire from="(180,490)" to="(180,510)"/>
+ <wire from="(260,660)" to="(370,660)"/>
+ <wire from="(390,480)" to="(390,520)"/>
+ <wire from="(590,430)" to="(660,430)"/>
+ <wire from="(550,260)" to="(660,260)"/>
+ <wire from="(300,590)" to="(370,590)"/>
+ <wire from="(860,730)" to="(910,730)"/>
+ <wire from="(590,350)" to="(660,350)"/>
+ <wire from="(260,380)" to="(370,380)"/>
+ <wire from="(300,530)" to="(370,530)"/>
+ <wire from="(550,320)" to="(660,320)"/>
+ <wire from="(590,710)" to="(660,710)"/>
+ <wire from="(260,320)" to="(370,320)"/>
+ <wire from="(950,740)" to="(1000,740)"/>
+ <wire from="(550,760)" to="(660,760)"/>
+ <wire from="(590,650)" to="(660,650)"/>
+ <wire from="(260,540)" to="(370,540)"/>
+ <wire from="(550,540)" to="(660,540)"/>
+ <wire from="(260,760)" to="(370,760)"/>
+ <wire from="(300,710)" to="(370,710)"/>
+ <wire from="(300,410)" to="(370,410)"/>
+ <wire from="(590,530)" to="(660,530)"/>
+ <wire from="(260,220)" to="(370,220)"/>
+ <wire from="(590,330)" to="(660,330)"/>
+ <wire from="(300,770)" to="(370,770)"/>
+ <wire from="(590,770)" to="(660,770)"/>
+ <wire from="(550,220)" to="(660,220)"/>
+ <wire from="(300,170)" to="(370,170)"/>
+ <wire from="(590,410)" to="(660,410)"/>
+ <wire from="(300,830)" to="(370,830)"/>
+ <wire from="(550,380)" to="(660,380)"/>
+ <wire from="(260,160)" to="(370,160)"/>
+ <wire from="(590,830)" to="(660,830)"/>
+ <wire from="(550,160)" to="(660,160)"/>
+ <wire from="(920,820)" to="(930,820)"/>
+ <wire from="(860,750)" to="(910,750)"/>
+ <wire from="(590,790)" to="(660,790)"/>
+ <wire from="(1000,650)" to="(1000,740)"/>
+ <wire from="(590,570)" to="(660,570)"/>
+ <wire from="(260,640)" to="(370,640)"/>
+ <wire from="(810,720)" to="(910,720)"/>
+ <wire from="(550,660)" to="(660,660)"/>
+ <wire from="(590,170)" to="(660,170)"/>
+ <wire from="(590,610)" to="(660,610)"/>
+ <wire from="(550,720)" to="(660,720)"/>
+ <wire from="(260,580)" to="(370,580)"/>
+ <wire from="(300,330)" to="(370,330)"/>
+ <wire from="(260,440)" to="(370,440)"/>
+ <wire from="(550,360)" to="(660,360)"/>
+ <wire from="(590,450)" to="(660,450)"/>
+ <wire from="(390,480)" to="(680,480)"/>
+ <wire from="(590,670)" to="(660,670)"/>
+ <wire from="(700,300)" to="(740,300)"/>
+ <wire from="(300,270)" to="(370,270)"/>
+ <wire from="(550,800)" to="(660,800)"/>
+ <wire from="(590,390)" to="(660,390)"/>
+ <wire from="(590,730)" to="(660,730)"/>
+ <wire from="(930,760)" to="(930,820)"/>
+ <wire from="(1000,740)" to="(1030,740)"/>
+ <wire from="(260,200)" to="(370,200)"/>
+ <wire from="(260,820)" to="(370,820)"/>
+ <wire from="(300,370)" to="(370,370)"/>
+ <wire from="(300,150)" to="(370,150)"/>
+ <wire from="(300,430)" to="(370,430)"/>
+ <wire from="(550,420)" to="(660,420)"/>
+ <wire from="(260,140)" to="(370,140)"/>
+ <wire from="(590,230)" to="(660,230)"/>
+ <wire from="(680,480)" to="(680,520)"/>
+ <wire from="(260,260)" to="(370,260)"/>
+ <wire from="(590,290)" to="(660,290)"/>
+ <wire from="(300,650)" to="(370,650)"/>
+ <wire from="(390,460)" to="(390,480)"/>
+ <wire from="(300,210)" to="(370,210)"/>
+ <wire from="(260,700)" to="(370,700)"/>
+ <wire from="(550,300)" to="(660,300)"/>
+ <wire from="(550,600)" to="(660,600)"/>
+ <comp lib="0" loc="(920,820)" name="Tunnel">
+ <a name="facing" val="east"/>
+ <a name="width" val="2"/>
+ <a name="label" val="sel"/>
+ </comp>
+ <comp lib="2" loc="(410,300)" name="Multiplexer">
+ <a name="select" val="5"/>
+ <a name="width" val="16"/>
+ </comp>
+ <comp lib="2" loc="(700,300)" name="Multiplexer">
+ <a name="select" val="5"/>
+ <a name="width" val="16"/>
+ </comp>
+ <comp lib="0" loc="(980,650)" name="Probe">
+ <a name="radix" val="16"/>
+ </comp>
+ <comp lib="0" loc="(810,720)" name="Tunnel">
+ <a name="facing" val="east"/>
+ <a name="width" val="16"/>
+ <a name="label" val="mux0"/>
+ </comp>
+ <comp lib="0" loc="(160,490)" name="Splitter">
+ <a name="incoming" val="7"/>
+ <a name="appear" val="center"/>
+ <a name="bit1" val="0"/>
+ <a name="bit2" val="0"/>
+ <a name="bit3" val="0"/>
+ <a name="bit4" val="0"/>
+ <a name="bit5" val="1"/>
+ <a name="bit6" val="1"/>
+ </comp>
+ <comp lib="2" loc="(410,680)" name="Multiplexer">
+ <a name="selloc" val="tr"/>
+ <a name="select" val="5"/>
+ <a name="width" val="16"/>
+ </comp>
+ <comp lib="0" loc="(450,680)" name="Tunnel">
+ <a name="width" val="16"/>
+ <a name="label" val="mux1"/>
+ </comp>
+ <comp lib="0" loc="(740,300)" name="Tunnel">
+ <a name="width" val="16"/>
+ <a name="label" val="mux2"/>
+ </comp>
+ <comp lib="2" loc="(700,680)" name="Multiplexer">
+ <a name="selloc" val="tr"/>
+ <a name="select" val="5"/>
+ <a name="width" val="16"/>
+ </comp>
+ <comp lib="0" loc="(190,510)" name="Tunnel">
+ <a name="width" val="2"/>
+ <a name="label" val="sel"/>
+ </comp>
+ <comp lib="0" loc="(1030,740)" name="Pin">
+ <a name="facing" val="west"/>
+ <a name="output" val="true"/>
+ <a name="width" val="16"/>
+ <a name="label" val="data_out"/>
+ <a name="labelloc" val="east"/>
+ </comp>
+ <comp lib="0" loc="(450,300)" name="Tunnel">
+ <a name="width" val="16"/>
+ <a name="label" val="mux0"/>
+ </comp>
+ <comp lib="0" loc="(860,730)" name="Tunnel">
+ <a name="facing" val="east"/>
+ <a name="width" val="16"/>
+ <a name="label" val="mux1"/>
+ </comp>
+ <comp lib="0" loc="(860,750)" name="Tunnel">
+ <a name="facing" val="east"/>
+ <a name="width" val="16"/>
+ <a name="label" val="mux3"/>
+ </comp>
+ <comp lib="0" loc="(810,740)" name="Tunnel">
+ <a name="facing" val="east"/>
+ <a name="width" val="16"/>
+ <a name="label" val="mux2"/>
+ </comp>
+ <comp lib="0" loc="(140,490)" name="Pin">
+ <a name="width" val="7"/>
+ <a name="tristate" val="false"/>
+ <a name="label" val="addr"/>
+ </comp>
+ <comp lib="2" loc="(950,740)" name="Multiplexer">
+ <a name="select" val="2"/>
+ <a name="width" val="16"/>
+ </comp>
+ <comp lib="0" loc="(740,680)" name="Tunnel">
+ <a name="width" val="16"/>
+ <a name="label" val="mux3"/>
+ </comp>
+ </circuit>
+</project>
--
GitLab