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Commit 222cb024 authored by adrian.spycher's avatar adrian.spycher
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chore: rename macro REG for the ide

parent a77246de
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#include "ide.h"
#include <stdint.h>
#include "guest/pmio.h"
#include "shared/ide_regs.h"
#include <stdint.h>
// --- DEFINE ---
......@@ -15,7 +15,8 @@
*/
static void wait_drive() {
while ((inb(IDE_STATUS_REG) & 0xC0) != 0x40);
// 0xC0 = 0b1100'0000, 0x40 = 0b0100'0000
while ((inb(REG_IDE_ST) & 0xC0) != 0x40);
}
/**
......@@ -26,11 +27,11 @@ static void pio_prepare(uint32_t sector) {
wait_drive();
outb(IDE_DATA_BASE_REG+2, 1); // sector count
outb(IDE_DATA_BASE_REG+3, sector & 0xff); // send bits 0-7 of LBA
outb(IDE_DATA_BASE_REG+4, (sector >> 8) & 0xff); // send bits 8-15 of LBA
outb(IDE_DATA_BASE_REG+5, (sector >> 16) & 0xff); // send bits 16-23 of LBA
outb(IDE_DATA_BASE_REG+6, ((sector >> 24) & 0x0f) | 0xe0); // send bits 24-27 of LBA + set LBA mode; 0xe0 = 11100000b;
outb(REG_IDE_DATA+2, 1); // sector count
outb(REG_IDE_DATA+3, sector & 0xff); // send bits 0-7 of LBA
outb(REG_IDE_DATA+4, (sector >> 8) & 0xff); // send bits 8-15 of LBA
outb(REG_IDE_DATA+5, (sector >> 16) & 0xff); // send bits 16-23 of LBA
outb(REG_IDE_DATA+6, ((sector >> 24) & 0x0f) | 0xe0); // send bits 24-27 of LBA + set LBA mode; 0xe0 = 11100000b;
}
// --- FUNCTION ---
......@@ -39,13 +40,13 @@ void ide_phys_write_sector(uint32_t sector, void *data) {
pio_prepare(sector);
outb(IDE_CMD_REG, 0x30); // command port: write with retry
outb(REG_IDE_CMD, 0x30); // command port: write with retry
wait_drive();
uint16_t *d = (uint16_t *)data;
for (int i = 0; i < MAX_LOOP_IDE_DATA; i++) {
outw(IDE_DATA_BASE_REG, *d);
outw(REG_IDE_DATA, *d);
d++;
}
}
......
......@@ -22,10 +22,6 @@
#define REG_GFX_INIT_CMD 0x4E700100
#define REG_GFX_INIT_DATA 0x4E700200
#define REG_IDE_ST 0x1F7
#define REG_IDE_CMD 0x1F7
#define REG_IDE_DATA 0x1F0
// --- SHARED STRUCT ---
typedef struct {
......
#ifndef _IDE_REGS_H_
#define _IDE_REGS_H_
#define IDE_STATUS_REG 0x1F7 // Status register on the primary bus (read-only)
#define IDE_CMD_REG 0x1F7 // Command register on the primary bus (write-only)
#define IDE_DATA_BASE_REG 0x1F0 // Base port on primary bus (write-only)
#define REG_IDE_ST 0x1F7 // Status register on the primary bus (read-only)
#define REG_IDE_CMD 0x1F7 // Command register on the primary bus (write-only)
#define REG_IDE_DATA 0x1F0 // Base port on primary bus (write-only)
#define SECTOR_SIZE 512
#define MAX_SECTOR_NUM ((1UL << 28) - 1)
......
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