initial commit

.gitignore

+target
+.cargo
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.vscode/extensions.json

+{
+	// See https://go.microsoft.com/fwlink/?LinkId=827846 to learn about workspace recommendations.
+	// Extension identifier format: ${publisher}.${name}. Example: vscode.csharp
+
+	// List of extensions which should be recommended for users of this workspace.
+	"recommendations": [
+		"rust-lang.rust-analyzer",
+		"marus25.cortex-debug",
+	],
+	// List of extensions recommended by VS Code that should not be recommended for users of this workspace.
+	"unwantedRecommendations": [
+		
+	]
+}

.vscode/launch.json

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+            "request": "launch",
+            "name": "Debug (OpenOCD)",
+            "servertype": "openocd",
+            "cwd": "${workspaceRoot}",
+            "preLaunchTask": "Cargo Build (debug)",
+            "executable": "./target/thumbv7em-none-eabihf/debug/projet-rust",
+            "device": "STM32F303VCT6",
+            "configFiles": [
+                "interface/stlink-v2-1.cfg",
+                "target/stm32l4x.cfg"
+            ],
+            "postLaunchCommands": [
+                "monitor arm semihosting enable",
+                "break main"
+            ]
+        }
+    ]
+}
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.vscode/tasks.json

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+                "build",
+            ],
+            "problemMatcher": [
+                "$rustc"
+            ],
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        },
+        {
+            "label": "Cargo Build (release)",
+            "type": "process",
+            "command": "cargo",
+            "args": [
+                "build",
+                "--release"
+            ],
+            "problemMatcher": [
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+            ],
+            "group": "build"
+        },
+        {
+            "label": "Cargo Clean",
+            "type": "process",
+            "command": "cargo",
+            "args": [
+                "clean"
+            ],
+            "problemMatcher": [],
+            "group": "build"
+        },
+    ]
+}
\ No newline at end of file

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Cargo.toml

+[package]
+authors = ["michael.divia <michael.divia@etu.hesge.ch>"]
+edition = "2018"
+readme = "README.md"
+name = "projet-rust"
+version = "0.1.0"
+
+[dependencies]
+cortex-m = "0.7.7"
+cortex-m-rt = "0.7.3"
+cortex-m-semihosting = "0.5.0"
+panic-halt = "0.2.0"
+
+[dependencies.stm32l4xx-hal]
+version = "0.7.1"
+features = ["rt", "stm32l476"] # rt is for runtime, provides interrupts
+
+[dev-dependencies]
+usb-device = "0.2.3"
+usbd-serial = "0.1.0"
+heapless = "0.5"
+
+# Change this import as required for your MCU.
+# stm32-hal2 = { version = "^1.5.5", features = ["l4x6", "l4rt"]}
+
+# this lets you use `cargo fix`!
+[[bin]]
+name = "projet-rust"
+test = false
+bench = false
+
+[profile.release]
+codegen-units = 1 # better optimizations
+debug = true # symbols are nice and they don't increase the size on Flash
+lto = true # better optimizations

build.rs

+//! This build script copies the `memory.x` file from the crate root into
+//! a directory where the linker can always find it at build time.
+//! For many projects this is optional, as the linker always searches the
+//! project root directory -- wherever `Cargo.toml` is. However, if you
+//! are using a workspace or have a more complicated build setup, this
+//! build script becomes required. Additionally, by requesting that
+//! Cargo re-run the build script whenever `memory.x` is changed,
+//! updating `memory.x` ensures a rebuild of the application with the
+//! new memory settings.
+//!
+//! The build script also sets the linker flags to tell it which link script to use.
+
+use std::env;
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+
+fn main() {
+    // Put `memory.x` in our output directory and ensure it's
+    // on the linker search path.
+    let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+    File::create(out.join("memory.x"))
+        .unwrap()
+        .write_all(include_bytes!("memory.x"))
+        .unwrap();
+    println!("cargo:rustc-link-search={}", out.display());
+
+    // By default, Cargo will re-run a build script whenever
+    // any file in the project changes. By specifying `memory.x`
+    // here, we ensure the build script is only re-run when
+    // `memory.x` is changed.
+    println!("cargo:rerun-if-changed=memory.x");
+
+    // Specify linker arguments.
+
+    // `--nmagic` is required if memory section addresses are not aligned to 0x10000,
+    // for example the FLASH and RAM sections in your `memory.x`.
+    // See https://github.com/rust-embedded/cortex-m-quickstart/pull/95
+    println!("cargo:rustc-link-arg=--nmagic");
+
+    // Set the linker script to the one provided by cortex-m-rt.
+    println!("cargo:rustc-link-arg=-Tlink.x");
+}

memory.x

+MEMORY
+{
+  /* NOTE 1 K = 1 KiBi = 1024 bytes */
+  /* TODO Adjust these memory regions to match your device memory layout */
+  /* These values correspond to the LM3S6965, one of the few devices QEMU can emulate */
+  FLASH : ORIGIN = 0x08000000, LENGTH = 1M
+  RAM : ORIGIN = 0x20000000, LENGTH = 96K
+}
+
+/* This is where the call stack will be allocated. */
+/* The stack is of the full descending type. */
+/* You may want to use this variable to locate the call stack and static
+   variables in different memory regions. Below is shown the default value */
+/* _stack_start = ORIGIN(RAM) + LENGTH(RAM); */
+
+/* You can use this symbol to customize the location of the .text section */
+/* If omitted the .text section will be placed right after the .vector_table
+   section */
+/* This is required only on microcontrollers that store some configuration right
+   after the vector table */
+/* _stext = ORIGIN(FLASH) + 0x400; */
+
+/* Example of putting non-initialized variables into custom RAM locations. */
+/* This assumes you have defined a region RAM2 above, and in the Rust
+   sources added the attribute `#[link_section = ".ram2bss"]` to the data
+   you want to place there. */
+/* Note that the section will not be zero-initialized by the runtime! */
+/* SECTIONS {
+     .ram2bss (NOLOAD) : ALIGN(4) {
+       *(.ram2bss);
+       . = ALIGN(4);
+     } > RAM2
+   } INSERT AFTER .bss;
+*/

src/main.rs

+#![no_std]
+#![no_main]
+
+extern crate panic_halt;
+
+use cortex_m_rt::entry;
+use cortex_m_semihosting::hprintln;
+
+use stm32l4xx_hal as hal;
+
+use crate::hal::i2c;
+use crate::hal::i2c::I2c;
+
+use crate::hal::prelude::*;
+
+#[entry]
+fn main() -> ! {
+    hprintln! {"Nucleo-l476RG is alive !"};
+
+    /*
+        setup peripherals
+    */
+
+    let periphs = hal::stm32::Peripherals::take().unwrap();
+    let mut flash = periphs.FLASH.constrain(); // .constrain();
+    let mut rcc = periphs.RCC.constrain();
+    let mut pwr = periphs.PWR.constrain(&mut rcc.apb1r1);
+    // let mut gpioa = periphs.GPIOA.split(&mut rcc.ahb2);
+    let mut gpiob = periphs.GPIOB.split(&mut rcc.ahb2);
+    let clocks = rcc.cfgr.freeze(&mut flash.acr, &mut pwr);
+
+    /*
+        setup gpios
+    */
+
+    // let mut led = gpioa
+    //     .pa5
+    //     .into_push_pull_output(&mut gpioa.moder, &mut gpioa.otyper);
+
+    /*
+        setup i2c
+    */
+
+    let mut scl = gpiob.pb13.into_alternate_open_drain::<4>(
+        &mut gpiob.moder,
+        &mut gpiob.otyper,
+        &mut gpiob.afrh,
+    );
+    scl.internal_pull_up(&mut gpiob.pupdr, true);
+
+    let mut sda = gpiob.pb14.into_alternate_open_drain::<4>(
+        &mut gpiob.moder,
+        &mut gpiob.otyper,
+        &mut gpiob.afrh,
+    );
+    sda.internal_pull_up(&mut gpiob.pupdr, true);
+
+    let mut i2c = I2c::i2c2(
+        periphs.I2C2,
+        (scl, sda),
+        i2c::Config::new(100.kHz(), clocks),
+        &mut rcc.apb1r1,
+    );
+
+    let mut buffer = [0u8; 4];
+    const MPL115A2_ADDR: u8 = 0x60;
+
+    /*
+        Main loop
+    */
+
+    
+    i2c.write_read(MPL115A2_ADDR, &[0x04], &mut buffer).unwrap();
+    hprintln!("TEST: {}", buffer[0]);
+    
+    loop{
+        continue;
+    }
+}