wip: studying vmcs structure

docs/vmcs.md

@@ -51,3 +51,34 @@ on the logical processor
     - The `vmlaunch` instruction requires a VMCS whose _launch_ state is
     **"clear"**
     - Successful execution of the instruction changes the state to **"launched"**
+
+## Organization of VMCS data
+
+- Guest-state area
+- Host-state area
+- VM-execution control fields
+- VM-exit control fields
+- VM-entry control fields
+- VM-exit information fields
+
+### Guest-state area
+
+#### Guest Register State
+
+- Control registers (e.g. CR0, CR3, CR4)
+- Debug register -- DR7
+- RSP, RIP and RFLAGS
+- For the following registers -- CS, SS, DS, ES, FS, GS, LDTR and TR
+    - Selector (16 bits)
+    - Base address (64 bits)
+    - Segment limit (32 bits)
+    - Access rights (32 bits)
+        - _"The low 16 bits correspond to bits 23:8 of the upper 32 bits of a 64-bit segment descriptor. While bits
+        19:16 of code-segment and data-segment descriptors correspond to the upper 4 bits of the segment
+        limit, the corresponding bits (bits 11:8) are reserved in this VMCS field._"
+        - _"Bit 16 indicates an unusable segment. Attempts to use such a segment fault except in 64-bit mode.
+        In general, a segment register is unusable if it has been loaded with a null selector."_
+        - _"Bits 31:17 are reserved"_ 
+
+![VMCS Format of Access Rights Low](./figs/vmcs/format_access_rights_lo.png) 
+![VMCS Format of Access Rights High](./figs/vmcs/format_access_rights_hi.png)