Makefile

CC := clang
CFLAGS := -g -pedantic -Wall -Wextra -std=c2x
LDFLAGS := -fsanitize=address -fsanitize=leak -fsanitize=undefined -lm
TARGET := orphan

all: $(TARGET)

$(TARGET): orphan.o
	@printf "=================== Building executable ===================\n"
	$(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)
	@printf "\n"

%.o: %.c
	@printf "================== Building object files ==================\n"
	$(CC) $(CFLAGS) -c $<
	@printf "\n"

.PHONY: clean

clean:
	rm -f *.o $(TARGET)