feat: uint16_transfer done

mem2lcd_G4/src/dma.h

@@ -13,13 +13,13 @@
 #define P2M				0x02
 #define P2P				0x03
 
-#define BURST4 0x04
-#define WORD32_TRANSFER 0x2
+#define BURST1 0x0
+#define HALFWORD16_TRANSFER 0x1
 #define INCREMENT 1
 #define TERMINAL_INTERRUPT 0x80000000
 
-#define DMA_CFG ((BURST4 << 12) | (BURST4 << 15) \
-		| (WORD32_TRANSFER << 18) | (WORD32_TRANSFER << 21) | (INCREMENT << 26) | (INCREMENT << 27) | \
+#define DMA_CFG ((BURST1 << 12) | (BURST1 << 15) \
+		| (HALFWORD16_TRANSFER << 18) | (HALFWORD16_TRANSFER << 21) | \
 		TERMINAL_INTERRUPT)
 
 void DMA_Init(uint32_t *src, uint32_t *dest, uint32_t len, uint32_t LLI);

mem2lcd_G4/src/dma_ssp_etu.c

@@ -51,7 +51,6 @@ void init_dma_ssp0()
 void ssp_DMA_uint16_transfer(uint16_t *words, uint16_t word_len, bool is_incr)
 {
 	LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)words;	//DMA_SRC;
-	LPC_GPDMACH0->DMACCControl = (word_len & 0xFFF) | DMA_CFG;
-
+	LPC_GPDMACH0->DMACCControl = (word_len & 0xFFF) | DMA_CFG | (is_incr << 26) | (is_incr << 27);
 }
 

mem2lcd_G4/src/labo_dma_mem2lcd_etu.c

@@ -54,7 +54,16 @@ void DMA_IRQHandler()
 // initiate the first transfer by calling send_dma_order()
 void write_spi(uint8_t cmd, data_type_t cmd_type, uint16_t *data, uint32_t byte_len)
 {
-
+	switch (cmd_type) {
+		case COORD:
+			break;
+		case DATA_PTR:
+			break;
+		case DATA_RPT:
+			break;
+		default:
+			break;
+	}
 }