PetaLinux scalp_safe_petalinux project in debug version about the switch...

PetaLinux scalp_safe_petalinux project in debug version about the switch sja1105.  Transitional commitment.

README.md

@@ -23,7 +23,7 @@ Run the following command from a terminal.
 $ source /<XILINX_INSTALL_FOLDER>/PetaLinux/2020.2/bin/settings.sh
 ```
 
-In my case /<XILINX\_INSTALL\_FOLDER>/ corresponds to /tools/Xilinx/.
+In my case **\<XILINX\_INSTALL\_FOLDER\>** corresponds to /tools/Xilinx/.
 
 **Check that the "rsync" tool is installed.**
 
@@ -53,6 +53,16 @@ $ git checkout SCALP-SAFE-v0.01
 
 ### FPGA scalp_safe_firmware creation
 
+First of all... Go to the **board_files** folder of the GIT **scalp_firmware** deposit. [Scalp Firmware - Board files](https://gitedu.hesge.ch/soma/scalp_firmware/-/tree/master/board_files)
+
+And follow these instructions...
+
+The **scalp_node** folder can be copied into **\<Vivado directory\>/\<version\>/data/boards/board_files** to add **SCALP node** support in Vivado. The definition "hepia-cores.ch:scalp_node:part0:0.1" can then be used as a proper board definition for project creation. This board definition is currently blank and does not provide full board definition but it will evolve in the future and should be used for new project creation.
+
+**In your case, the definition is already present in the scalp_safe_firmware project. However, if the scalp_node folder is not copied, the creation of the project will fail.**
+
+Next...
+
 ```
 $ cd <SCALP_PROJECT_FOLDER>/scalp_firmware/designs/vivado/scalp_safe_firmware/2020.2/lin64/
 $ source setup.sh
@@ -166,46 +176,125 @@ In my case **\<path-to-hw\>** corresponds to /home/jo/Documents/Projets/Hepia/sc
 
 ```
 
-### Build the PetaLinux project
+### Bug in the U-Boot config with the selection of the ZYNQ_SPI driver
+
+Despite the fact that the ZYNQ_SPI driver is preselected in the U-Boot configuration specific to the SCALP board, this configuration is not automatically taken into account. Therefore, it is necessary to select the ZYNQ_SPI driver manually.
+
+First, you need to open the U-Boot configuration menu, after cleaning up the project.
 
 ```
 $ petalinux-build -x mrproper -f
+$ petalinux-config -c u-boot
+```
+
+Please select...
+
+```
+U-Boot 2020.01 Configuration
+    Device Drivers  --->
+    -*- SPI Support  --->
+        [*]   Zynq SPI driver (select with spacebar)
+```
+
+Then select 3 times EXIT...
+
+And save the configuration.
+
+**You can eventually go back to the U-Boot configuration menu to check that the ZYNQ_SPI driver has been taken into account.**
+
+### Build the PetaLinux project
+
+```
 $ petalinux-build
 ```
 
 The produced binary files can be found in the **./images/linux** folder.
 
+**You can possibly check that the ZYNQ_SPI driver has been compiled.**
+
+```
+
+```
+
+### Creation of the basic image of the U-Boot environment
+
+The image content can be produced by using the **mkenvimage** command.
+
+```
+$ echo -e "custom_board_name=\"Zynq Scalp Board\"\ncustom_board_version=\"RevB 2008\"\ncustom_board_vendor=\"Hepia CoRES - LSN\"" > images/linux/scalp-u-boot.env
+$ /tools/u-boot-tools/mkenvimage -s 0x20000 -o images/linux/scalp-u-boot.env.bin images/linux/scalp-u-boot.env
+```
+
+In my case, I copied the tools produced by U-Boot into the **/tools/u-boot-tools/** folder.
+
 ### QSPI firmware packaging
 
 ```
-$ petalinux-package --boot --fsbl images/linux/zynq_fsbl.elf --fpga images/linux/system.bit --u-boot --kernel --offset 0x520000
+$ petalinux-package --boot --fsbl images/linux/zynq_fsbl.elf --fpga images/linux/system.bit --u-boot --kernel --offset 0x540000 --dtb images/linux/system.dtb --offset 0x520000 --force
+
+$ petalinux-package --boot --fsbl images/linux/zynq_fsbl.elf --offset 0x0 --fpga images/linux/system.bit --u-boot --add images/linux/scalp-u-boot.env.bin --offset 0x500000 --kernel --offset 0x540000 --dtb images/linux/system.dtb --offset 0x520000 --force
+```
+
+The produced binary file can be found in the **./images/linux** folder. The **FIT image** of the Linux kernel is located at the address **0x540000**.
+
+Below is the partitioning of the flash memory.
+
 ```
+/* FSBL + safe bitstream (design with only Zynq) + U-Boot */
+/* Size : 5242880 Bytes */
+partition@boot {
+    label = "boot";
+    reg = <0x0 0x500000>;
+};
+        
+/* Safe U-Boot Env. */
+/* Size : 131072 Bytes */
+partition@bootenv {
+    label = "bootenv";
+    reg = <0x500000 0x20000>;
+};
 
-The produced binary file can be found in the **./images/linux** folder. This is copied in **0x520000** offset in the final image.
+/* Safe DTB */
+/* Size : 131072 Bytes */
+partition@dtb {
+    label = "dtb";
+    reg = <0x520000 0x20000>;
+};
+
+/* Safe Fit Image */
+/* Size : 28049408 Bytes */
+partition@fitimage {
+    label = "fitimage";
+    reg = <0x540000 0x1ac0000>;
+};
+```
 
 ### Flash firmware on QSPI memory
 
+**First of all, to flash the board, it is necessary to set switch SW1 (BOOT MODE) in JTAG mode. Then, once the card is flashed, it is necessary to set switch SW1 back in QSPI mode and reconnect the board.**
+
 If you are using a single JTAG probe.
 
 ```
 $ program_flash -f images/linux/BOOT.BIN -offset 0 -flash_type qspi-x4-single -fsbl images/linux/zynq_fsbl.elf -cable type xilinx_tcf url TCP:127.0.0.1:3121
 ```
 
-The **program_flash** command is located in the Vivado installation folder.
+The **program_flash** command is located in the Vitis installation folder **/tools/Xilinx/Vitis/2020.2/bin/program_flash**.
 
 If you use several JTAG probes.
 
 ```
 $ program_flash -jtagtarget
 
+> Available targets and devices:
 > JTAG chain configuration
 > --------------------------------------------------
 > 1 Digilent 210299AFC175 
-> 	2    jsn-JTAG-HS3-210299AFC175-4ba00477-0  (name arm_dap  idcode 4ba00477)
+> 	2    jsn-JTAG-HS3-210299AFC175-4ba00477-0  (name arm_dap  idcode 4ba00477) <-- target id 2
 > 	3    jsn-JTAG-HS3-210299AFC175-0373b093-0  (name xc7z015  idcode 0373b093)
-> 4 Xilinx 00001a3719fe01 
-> 	5    jsn-DLC10-00001a3719fe01-4ba00477-0  (name arm_dap  idcode 4ba00477)
->	6    jsn-DLC10-00001a3719fe01-0373b093-0  (name xc7z015  idcode 0373b093)
+> 4 Digilent 210299AFB167 
+> 	5    jsn-JTAG-HS3-210299AFB167-4ba00477-0  (name arm_dap  idcode 4ba00477) <-- target id 5
+> 	6    jsn-JTAG-HS3-210299AFB167-0373b093-0  (name xc7z015  idcode 0373b093)
 
 $ program_flash -f images/linux/BOOT.BIN -offset 0 -flash_type qspi-x4-single -fsbl images/linux/zynq_fsbl.elf -target_id 2 -url TCP:127.0.0.1:3121
 

scalp_safe_petalinux/.petalinux/metadata

 PETALINUX_VER=2020.2
 VALIDATE_HW_CHKSUM=1
 HARDWARE_PATH=/home/jo/Documents/Projets/Hepia/scalp_project/scalp_firmware/designs/vivado/scalp_safe_firmware/2020.2/lin64/scalp_safe_firmware/scalp_safe_firmware.xsa
-HARDWARE_CHECKSUM=86e69a2505aca58b710730ddd68dd848
+HARDWARE_CHECKSUM=c0e54849f94ffc5aaa53e1cad4e1235f
 YOCTO_SDK=5ff8fc5f85d1566b314bb73eaa378212
 RFSCONFIG_CHKSUM=7fb2a289957dc67ab720c7cb67e09ee0

scalp_safe_petalinux/project-spec/configs/config

@@ -105,16 +105,16 @@ CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART1_FLAGS="bootenv"
 #
 # partition 2
 #
-CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_NAME="fitimage"
-CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_SIZE=0x1AC0000
-CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_FLAGS="fitimage"
+CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_NAME="dtb"
+CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_SIZE=0x20000
+CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART2_FLAGS="dtb"
 
 #
 # partition 3
 #
-CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_NAME="dtb"
-CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_SIZE=0x20000
-CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_FLAGS="dtb"
+CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_NAME="fitimage"
+CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_SIZE=0x1AC0000
+CONFIG_SUBSYSTEM_FLASH_PS7_QSPI_0_BANKLESS_PART3_FLAGS="fitimage"
 
 #
 # partition 4
@@ -195,7 +195,7 @@ CONFIG_SUBSYSTEM_EXTRA_DT_FILES=""
 #
 CONFIG_SUBSYSTEM_BOOTARGS_AUTO=y
 CONFIG_SUBSYSTEM_BOOTARGS_EARLYPRINTK=y
-
+CONFIG_SUBSYSTEM_BOOTARGS_GENERATED="console=ttyPS0,115200 earlycon"
 CONFIG_SUBSYSTEM_DEVICETREE_COMPILER_FLAGS="-@"
 # CONFIG_SUBSYSTEM_DTB_OVERLAY is not set
 # CONFIG_SUBSYSTEM_REMOVE_PL_DTB is not set
@@ -290,4 +290,3 @@ CONFIG_YOCTO_NETWORK_SSTATE_FEEDS_URL="http://petalinux.xilinx.com/sswreleases/r
 # User Layers
 #
 CONFIG_USER_LAYER_0=""
-CONFIG_SUBSYSTEM_BOOTARGS_GENERATED="console=ttyPS0,115200 earlycon"

scalp_safe_petalinux/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi

@@ -89,35 +89,36 @@
         /* m25p,fast-read; */
         #address-cells = <1>;
         #size-cells = <1>;
-        
-        /* FSBL + safe bitstream (design with only Zynq) + U-Boot + (devicetree) => BOOT.BIN */
-        /* Size : 5242880 Bytes */
-        partition@boot {       
-            label = "boot";
-            reg = <0x0 0x500000>;
     };
     
-        /* Safe U-Boot Env. */
-        /* Size : 131072 Bytes */
-        partition@bootenv {       
-            label = "bootenv";
-            reg = <0x500000 0x20000>;
-        };
+    //     /* FSBL + safe bitstream (design with only Zynq) + U-Boot */
+    //     /* Size : 5242880 Bytes */
+    //     partition@boot {       
+    //         label = "boot";
+    //         reg = <0x0 0x500000>;
+    //     };
         
-        /* Safe Fit Image */
-        /* Size : 28049408 Bytes */
-        partition@fitimage {            
-            label = "fitimage";
-            reg = <0x520000 0x1ac0000>;
-        };
+    //     /* Safe U-Boot Env. */
+    //     /* Size : 131072 Bytes */
+    //     partition@bootenv {       
+    //         label = "bootenv";
+    //         reg = <0x500000 0x20000>;
+    //     };
 
-        /* Safe DTB */
-        /* Size : 131072 Bytes */
-        partition@dtb {            
-            label = "dtb";
-            reg = <0x1ac0000 0x20000>;
-        };
-    };
+    //     /* Safe DTB */
+    //     /* Size : 131072 Bytes */
+    //     partition@dtb {            
+    //         label = "dtb";
+    //         reg = <0x520000 0x20000>;
+    //     };
+
+    //     /* Safe Fit Image */
+    //     /* Size : 28049408 Bytes */
+    //     partition@fitimage {            
+    //         label = "fitimage";
+    //         reg = <0x540000 0x1ac0000>;
+    //     };
+    // };
 };
 
 /* Switch Ethernet 5 ports - SPI0 - MIO 40, 41, 42, 45 */
@@ -157,14 +158,14 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
             
-			port@0 {
+			swp0_east: port@0 {
 				label = "swp0_east";
 				phy-mode = "rgmii";
 				reg = <0>;
-                sja1105,role-phy;
+                //sja1105,role-phy;
 
                 fixed-link {
-					speed = <1000>;
+					speed = <10>;
 					full-duplex;
 				};
 			};
@@ -173,46 +174,46 @@
 				ethernet = <&gem0>;
 				phy-mode = "rgmii";
 				reg = <1>;
-                sja1105,role-phy;
+                //sja1105,role-phy;
 				
 				fixed-link {
-					speed = <1000>;
+					speed = <10>;
 					full-duplex;
 				};
 			};
             
-			port@2 {
+			swp2_bottom: port@2 {
 				label = "swp2_bottom";
 				phy-mode = "rgmii";
 				reg = <2>;
-                sja1105,role-mac;
+                //sja1105,role-mac;
 
                 fixed-link {
-					speed = <1000>;
+					speed = <10>;
 					full-duplex;
 				};
 			};
             
-			port@3 {
+			swp3_top: port@3 {
 				label = "swp3_top";
 				phy-mode = "rgmii";
 				reg = <3>;
-                sja1105,role-phy;
+                //sja1105,role-phy;
 
                 fixed-link {
-					speed = <1000>;
+					speed = <10>;
 					full-duplex;
 				};
 			};
             
-            port@4 {
+            swp4_west: port@4 {
 				label = "swp4_west";
 				phy-mode = "rgmii";
 				reg = <4>;
-                sja1105,role-mac;
+                //sja1105,role-mac;
 
                 fixed-link {
-					speed = <1000>;
+					speed = <10>;
 					full-duplex;
 				};
 			};			
@@ -220,13 +221,21 @@
 	};
 };
 
-/* spi2 */
-&spi1 {
-    u-boot,dm-pre-reloc;
-    is-decoded-cs = <0>;
-	num-cs = <3>;
-	status = "okay";
-};
+// &spi0 {
+//       bus-num = <0>;
+//       status = "okay";
+
+//       /* SCALP specific SJA1105T driver */
+//       sja1105@0 {
+//                 reg = <0>;
+//                 #address-cells = <1>;
+//                 #size-cells = <0>;
+//                 compatible = "scalp,sja1105t";
+//                 reset-gpios = <&gpio0 44 GPIO_ACTIVE_LOW>;
+//                 spi-max-frequency = <12000000>;
+//                 spi-cpha;
+//       };
+// };
 
 /* ethernet0 */
 &gem0 {
@@ -237,7 +246,7 @@
       //local-mac-address = [00 0a 35 00 00 00];
 
       fixed-link {
-		  speed = <1000>;
+		  speed = <10>;
 	      full-duplex;
 	  };
 
@@ -246,6 +255,16 @@
 	  //};
 };
 
+/* spi2 */
+&spi1 {
+    u-boot,dm-pre-reloc;
+    is-decoded-cs = <0>;
+	num-cs = <3>;
+	status = "okay";
+};
+
+
+
 &gpio0 {
 	emio-gpio-width = <64>;
 	gpio-mask-high = <0x0>;

scalp_safe_petalinux/project-spec/meta-user/recipes-bsp/u-boot/files/platform-top.h

@@ -10,10 +10,10 @@
     "SCALP_BOOT_PARTITION_SIZE=0x500000\0"                              \
     "SCALP_BOOTENV_PARTITION_OFFSET=0x500000\0"                         \
     "SCALP_BOOTENV_PARTITION_SIZE=0x20000\0"                            \
-    "SCALP_FITIMAGE_PARTITION_OFFSET=0x520000\0"                        \
+    "SCALP_FITIMAGE_PARTITION_OFFSET=0x540000\0"                        \
     "SCALP_FITIMAGE_PARTITION_SIZE=0x1AC0000\0"                         \
     "SCALP_FITIMAGE_LOAD_OFFSET=0x2000000\0"                            \
-    "SCALP_DTB_PARTITION_OFFSET=0x1AC0000\0"                            \
+    "SCALP_DTB_PARTITION_OFFSET=0x520000\0"                            \
     "SCALP_DTB_PARTITION_SIZE=0x20000\0"                                \
     "load_scalp_fitimage=sf probe 0 0 0 && sf read ${SCALP_FITIMAGE_LOAD_OFFSET} ${SCALP_FITIMAGE_PARTITION_OFFSET} ${SCALP_FITIMAGE_PARTITION_SIZE}\0" \
     "macmemaddr=0x1000000\0"                                            \
@@ -39,7 +39,7 @@
     "setenv bootargs \"ip=${ipaddr}:::::eth0\"\0"                       \
     "setup_eth=run readmac buildmac buildip\0"                          \
     "boot_from_qspi=run setup_eth && run load_scalp_fitimage && iminfo ${SCALP_FITIMAGE_LOAD_OFFSET} && bootm ${SCALP_FITIMAGE_LOAD_OFFSET}\0" \
-    "custom_autoboot=echo Scalp board autoboot && sja1105 init && run boot_from_qspi\0" \
+    "custom_autoboot=echo Scalp board autoboot && run boot_from_qspi\0" \
     "baudrate=115200\0"                                                 \
     "bootargs=ip=${ipaddr}:::::eth0\0"                                  \
     "bootdelay=2\0"                                                     \

scalp_safe_petalinux/project-spec/meta-user/recipes-bsp/u-boot/files/scalp_uboot.cfg

@@ -38,17 +38,36 @@ CONFIG_MTD_UBI=y
 CONFIG_MTD_UBI_WL_THRESHOLD=4096
 CONFIG_MTD_UBI_BEB_LIMIT=20
 # CONFIG_MTD_UBI_FASTMAP is not set
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_ZYNQ_SPI=y
+CONFIG_ZYNQ_QSPI=y
 CONFIG_RGMII=y
-CONFIG_XILINX_SPI=y
 CONFIG_FS_JFFS2=y
 CONFIG_RBTREE=y
 CONFIG_LZO=y
 CONFIG_ENV_OFFSET=0x0
 CONFIG_ENV_ADDR=0x500000
-CONFIG_XILINX_OF_BOARD_DTB_ADDR=0x1AC0000
+CONFIG_XILINX_OF_BOARD_DTB_ADDR=0x520000
 CONFIG_PACKING=y
 CONFIG_CMD_SJA1105=y
 CONFIG_SCALP_SJA1105=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINMUX=y
+# CONFIG_PINCONF is not set
+CONFIG_PINCONF_RECURSIVE=y
+# CONFIG_PINCTRL_AT91 is not set
+# CONFIG_PINCTRL_AT91PIO4 is not set
+# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_STM32 is not set
+# CONFIG_PINCTRL_STMFX is not set
+CONFIG_DEFAULT_DEVICE_TREE="zynq-scalp"
 # CONFIG_OF_SEPARATE is not set
 CONFIG_OF_EMBED=y
-CONFIG_DEFAULT_DEVICE_TREE="zynq-scalp"
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+# CONFIG_MDIO_MUX_I2CREG is not set
+# CONFIG_MVMDIO is not set
\ No newline at end of file

scalp_safe_petalinux/project-spec/meta-user/recipes-kernel/linux/linux-xlnx/scalp-linux-mtdcore-config-name.patch

+diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
+index 6cc7ecb0c788..1867f1a41d82 100644
+--- a/drivers/mtd/mtdcore.c
++++ b/drivers/mtd/mtdcore.c
+@@ -563,7 +563,9 @@ static int mtd_nvmem_add(struct mtd_info *mtd)
+ 
+ 	config.id = -1;
+ 	config.dev = &mtd->dev;
+-	config.name = mtd->name;
++    /* MODIF JOACHIM */
++	config.name = dev_name(&mtd->dev);
++    /* FIN MODIF JOACHIM */
+ 	config.owner = THIS_MODULE;
+ 	config.reg_read = mtd_nvmem_reg_read;
+ 	config.size = mtd->size;