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soma
scalp_firmware
Commits
8b7824bf
Commit
8b7824bf
authored
4 years ago
by
joachim.schmidt
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updated Scalp Router for debugging
parent
55633824
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designs/vivado/scalp_firmware/2020.2/src/hdl/scalp_firmware.vhd
+28
-16
28 additions, 16 deletions
...s/vivado/scalp_firmware/2020.2/src/hdl/scalp_firmware.vhd
with
28 additions
and
16 deletions
designs/vivado/scalp_firmware/2020.2/src/hdl/scalp_firmware.vhd
+
28
−
16
View file @
8b7824bf
...
@@ -15,7 +15,7 @@
...
@@ -15,7 +15,7 @@
-- Tool version: 2020.2
-- Tool version: 2020.2
-- Description: scalp_firmware
-- Description: scalp_firmware
--
--
-- Last update: 2021-05-0
6
-- Last update: 2021-05-0
7
--
--
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
...
@@ -539,10 +539,10 @@ architecture arch of scalp_firmware is
...
@@ -539,10 +539,10 @@ architecture arch of scalp_firmware is
-- attribute keep of NorthTXM2SxD : signal is "true";
-- attribute keep of NorthTXM2SxD : signal is "true";
-- attribute mark_debug of NorthTXS2MxD : signal is "true";
-- attribute mark_debug of NorthTXS2MxD : signal is "true";
-- attribute keep of NorthTXS2MxD : signal is "true";
-- attribute keep of NorthTXS2MxD : signal is "true";
--
attribute mark_debug of EastTXM2SxD : signal is "true";
attribute
mark_debug
of
EastTXM2SxD
:
signal
is
"true"
;
--
attribute keep of EastTXM2SxD : signal is "true";
attribute
keep
of
EastTXM2SxD
:
signal
is
"true"
;
--
attribute mark_debug of EastTXS2MxD : signal is "true";
attribute
mark_debug
of
EastTXS2MxD
:
signal
is
"true"
;
--
attribute keep of EastTXS2MxD : signal is "true";
attribute
keep
of
EastTXS2MxD
:
signal
is
"true"
;
-- attribute mark_debug of SouthTXM2SxD : signal is "true";
-- attribute mark_debug of SouthTXM2SxD : signal is "true";
-- attribute keep of SouthTXM2SxD : signal is "true";
-- attribute keep of SouthTXM2SxD : signal is "true";
-- attribute mark_debug of SouthTXS2MxD : signal is "true";
-- attribute mark_debug of SouthTXS2MxD : signal is "true";
...
@@ -1124,17 +1124,29 @@ begin
...
@@ -1124,17 +1124,29 @@ begin
TXAxiss2mVectorxDI
=>
TXAxiss2mVectorxD
,
TXAxiss2mVectorxDI
=>
TXAxiss2mVectorxD
,
QoSVectorxDI
=>
QoSVectorxD
);
QoSVectorxDI
=>
QoSVectorxD
);
ScalpAxis2SPxI
:
entity
work
.
scalp_axis_to_sp
ReadLocalxP
:
process
(
AuroraClkMasterxC
.
UserClkxC
,
generic
map
(
ScalpRouterResetxRNA
)
is
C_SCALP_PACKET_PAYLOAD_SIZE
=>
C_SCALP_PACKET_PAYLOAD_SIZE
,
begin
-- process ReadLocalxP
C_SCALP_RANDOM_READY
=>
C_SCALP_RANDOM_READY
)
if
ScalpRouterResetxRNA
=
'0'
then
port
map
(
TXAxiss2mVectorxD
(
C_LOCAL_IF_ID
)
.
ReadyxS
<=
'0'
;
SysClkxCI
=>
AuroraClkMasterxC
.
UserClkxC
,
elsif
rising_edge
(
AuroraClkMasterxC
.
UserClkxC
)
then
SysRstxRNAI
=>
ScalpRouterResetxRNA
,
if
TXAxism2sVectorxD
(
C_LOCAL_IF_ID
)
.
ValidxS
=
'1'
then
ScalpAxism2sxDI
=>
TXAxism2sVectorxD
(
C_LOCAL_IF_ID
),
TXAxiss2mVectorxD
(
C_LOCAL_IF_ID
)
.
ReadyxS
<=
'1'
;
ScalpAxiss2mxDO
=>
TXAxiss2mVectorxD
(
C_LOCAL_IF_ID
),
end
if
;
ScalpPacketxDO
=>
ScalpPacketLocalxD
,
end
if
;
ScalpPacketValidxSO
=>
ScalpPacketValidLocalxS
);
end
process
ReadLocalxP
;
-- ScalpAxis2SPxI : entity work.scalp_axis_to_sp
-- generic map (
-- C_SCALP_PACKET_PAYLOAD_SIZE => C_SCALP_PACKET_PAYLOAD_SIZE,
-- C_SCALP_RANDOM_READY => C_SCALP_RANDOM_READY)
-- port map (
-- SysClkxCI => AuroraClkMasterxC.UserClkxC,
-- SysRstxRNAI => ScalpRouterResetxRNA,
-- ScalpAxism2sxDI => TXAxism2sVectorxD(C_LOCAL_IF_ID),
-- ScalpAxiss2mxDO => TXAxiss2mVectorxD(C_LOCAL_IF_ID),
-- ScalpPacketxDO => ScalpPacketLocalxD,
-- ScalpPacketValidxSO => ScalpPacketValidLocalxS);
WritePacketxB
:
block
is
WritePacketxB
:
block
is
begin
-- block WritePacketxB
begin
-- block WritePacketxB
...
...
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