Add the copyright again, don't know if this is trivial enough to don't be copyrighted

microblaze-demo/microblaze-demo.srcs/sources_1/new/mb_top.vhd

+--Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
+--Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.
 ----------------------------------------------------------------------------------
 --Tool Version: Vivado v.2024.1.2 (lin64) Build 5164865 Thu Sep  5 14:36:28 MDT 2024
 --Date        : Tue Mar  4 22:03:33 2025
@@ -6,10 +8,12 @@
 --Design      : mb_design_1_wrapper
 --Purpose     : IP block netlist
 ----------------------------------------------------------------------------------
+
 library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;
 library UNISIM;
 use UNISIM.VCOMPONENTS.ALL;
+
 entity mb_design_1_wrapper is
   Generic (
     -- Hog build info
@@ -37,6 +41,7 @@ architecture STRUCTURE of mb_design_1_wrapper is
       hog_global_sha_i_0 : in STD_LOGIC_VECTOR ( 31 downto 0 )
       );
   end component mb_design_1;
+
 begin
   mb_design_1_i: component mb_design_1
     port map (