Version of the SCALP project created from the vivado_project_creator project...

Version of the SCALP project created from the vivado_project_creator project manager and integrating the Zynq SoC part.

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/.prompt_colors.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/.prompt_colors.tcl

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: Console color print utility
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/clean_prj_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/clean_prj_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Cleanup project directory
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/create_prj_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/create_prj_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Create Vivado project
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/create_prj_scalp_firmware.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/create_prj_scalp_firmware.tcl

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: TCL script for re-creating Vivado project 'scalp_firmware'
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 
@@ -24,6 +24,8 @@ source utils.tcl
 
 set PRJ_DIR ".."
 set prj_name "scalp_firmware"
+set PKG_DIR "${PRJ_DIR}/../../../../../packages"
+set SOC_DIR "${PRJ_DIR}/../../../../../soc/"
 
 # Set project type
 set PRJ_TYPE "DESIGN_PRJ_TYPE"
@@ -36,12 +38,8 @@ set src_dir "${PRJ_DIR}/../src"
 set ip_dir "${PRJ_DIR}/../../../../../ips/hw"
 set comp_dir "${ip_dir}/$prj_name"
 set comp_src_dir "${comp_dir}/src"
-# USER DEFINE
-set lib_dir "${PRJ_DIR}/../../../../../lib/${prj_name}_hdl_lib/hw/src"
-#set PRJ_ZYNPS "scalp_zynqps"
-#set zynqps_dir "${PRJ_DIR}/../../../../../soc/hw/${scalp_zynqps}/src"
-##
-
+set pkg_src_dir "${PKG_DIR}/hw"
+set soc_src_dir "${SOC_DIR}/hw"
 print_status "Set directory paths" "OK"
 
 # Create the project
@@ -62,22 +60,19 @@ if {$PRJ_TYPE == "DESIGN_PRJ_TYPE"} {
 	# add HDL sources
 	set vhdl_src_file_list [findFiles $src_dir/hdl *.vhd]
 	set verilog_src_file_list [findFiles $src_dir/hdl *.v]
-    #USER DEFINE
-    set vhdl_lib_src_file_list [findFiles $lib_dir/hdl *.vhd]
-    set verilog_lib_src_file_list [findFiles $lib_dir/hdl *.v]
-    ##
-	set vhdl_src_file_list [list {*}$vhdl_src_file_list {*}$vhdl_lib_src_file_list]
-    set verilog_src_file_list [list {*}$verilog_src_file_list {*}$verilog_lib_src_file_list]
-    ##
 	set hdl_src_file_list [list {*}$vhdl_src_file_list {*}$verilog_src_file_list]
-    
 	add_files -norecurse $hdl_src_file_list    
 	# add the constraints file (XDC)
-	add_files -fileset constrs_1 -norecurse  $src_dir/constrs/${prj_name}.xdc
-    # USER DEFINE
-    add_files -fileset constrs_1 -norecurse  $src_dir/constrs/ibert_constraints.xdc
 	add_files -fileset constrs_1 -norecurse $src_dir/constrs/debug.xdc
+	set_property is_enabled true [get_files $src_dir/constrs/debug.xdc]
+	add_files -fileset constrs_1 -norecurse  $src_dir/constrs/ibert_constraints.xdc
+	set_property is_enabled false [get_files $src_dir/constrs/ibert_constraints.xdc]
 	add_files -fileset constrs_1 -norecurse $src_dir/constrs/timing_constraints.xdc
+	set_property is_enabled true [get_files $src_dir/constrs/timing_constraints.xdc]
+	add_files -fileset constrs_1 -norecurse $src_dir/constrs/scalp_firmware.xdc
+	set_property is_enabled true [get_files $src_dir/constrs/scalp_firmware.xdc]
+
+	#add_files -fileset constrs_1 -norecurse  $src_dir/constrs/${prj_name}.xdc
 	# add IPs source file
 	#read_ip $src_dir/custom_ip/ip_0/ip_0.xci
 } elseif {$PRJ_TYPE == "COMP_PRJ_TYPE"} {
@@ -85,15 +80,7 @@ if {$PRJ_TYPE == "DESIGN_PRJ_TYPE"} {
 	# add the project component
 	set vhdl_src_file_list [findFiles $comp_src_dir/hdl *.vhd]
 	set verilog_src_file_list [findFiles $comp_src_dir/hdl *.v]
-    #USER DEFINE
-    set vhdl_lib_src_file_list [findFiles $lib_dir/hdl *.vhd]    
-    set verilog_lib_src_file_list [findFiles $lib_dir/hdl *.v]
-
-    set vhdl_src_file_list [list {*}$vhdl_src_file_list {*}$vhdl_lib_src_file_list]
-    set verilog_src_file_list [list {*}$verilog_src_file_list {*}$verilog_lib_src_file_list]
-    ##
 	set hdl_src_file_list [list {*}$vhdl_src_file_list {*}$verilog_src_file_list]
-    
 	add_files -norecurse $hdl_src_file_list
 	# add IPs source file
 	#read_ip $comp_src_dir/ip_core/ip_0/ip_0.xci
@@ -106,9 +93,13 @@ foreach j $vhdl_src_file_list {
     set_property file_type {VHDL 2008} [get_files  $j]
     print_status "VHDL 2008 mode configured for the file $j" "OK"
 }
-
 print_status "VHDL 2008 mode configured for project sources" "OK"
 
+#----------------------------------------------------------------
+# Add constraints files
+#----------------------------------------------------------------
+
+
 # Set packages libraries if any
 #set_property library library_name [get_files  $src_dir/hdl/package_name.vhd]
 #update_compile_order -fileset sources_1
@@ -142,9 +133,78 @@ foreach j $vhdl_sim_file_list {
     set_property file_type {VHDL 2008} [get_files  $j]
     print_status "VHDL 2008 mode configured for the file $j" "OK"
 }
-
 print_status "VHDL 2008 mode configured for testbench sources" "OK"
 
+# Add packages sources
+if {$PRJ_TYPE == "DESIGN_PRJ_TYPE"} {
+	set vhdl_pkg_file_list [findFiles ${PRJ_DIR}/../../../../../packages/hw/aurora_drp_pkg/src/hdl *.vhd]
+	add_files -norecurse $vhdl_pkg_file_list
+	foreach j $vhdl_pkg_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+	set vhdl_pkg_file_list [findFiles ${PRJ_DIR}/../../../../../packages/hw/aurora_status_pkg/src/hdl *.vhd]
+	add_files -norecurse $vhdl_pkg_file_list
+	foreach j $vhdl_pkg_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+	set vhdl_pkg_file_list [findFiles ${PRJ_DIR}/../../../../../packages/hw/axi4_pkg/src/hdl *.vhd]
+	add_files -norecurse $vhdl_pkg_file_list
+	foreach j $vhdl_pkg_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+} elseif {$PRJ_TYPE == "COMP_PRJ_TYPE"} {
+	set vhdl_pkg_file_list [findFiles ${PRJ_DIR}/../../../../../packages/hw/aurora_drp_pkg/src/hdl *.vhd]
+	add_files -norecurse $vhdl_pkg_file_list
+	foreach j $vhdl_pkg_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+	set vhdl_pkg_file_list [findFiles ${PRJ_DIR}/../../../../../packages/hw/aurora_status_pkg/src/hdl *.vhd]
+	add_files -norecurse $vhdl_pkg_file_list
+	foreach j $vhdl_pkg_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+	set vhdl_pkg_file_list [findFiles ${PRJ_DIR}/../../../../../packages/hw/axi4_pkg/src/hdl *.vhd]
+	add_files -norecurse $vhdl_pkg_file_list
+	foreach j $vhdl_pkg_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+}
+print_status "Add packages sources" "OK"
+print_status "VHDL 2008 mode configured for packages sources" "OK"
+
+# Add SoC wrapper sources files
+if {$PRJ_TYPE == "DESIGN_PRJ_TYPE"} {
+	set vhdl_soc_file_list [findFiles ${PRJ_DIR}/../../../../../soc/hw/scalp_zynqps/src/hdl *.vhd]
+	add_files -norecurse $vhdl_soc_file_list
+	foreach j $vhdl_soc_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+} elseif {$PRJ_TYPE == "COMP_PRJ_TYPE"} {
+	set vhdl_soc_file_list [findFiles ${PRJ_DIR}/../../../../../soc/hw/scalp_zynqps/src/hdl *.vhd]
+	add_files -norecurse $vhdl_soc_file_list
+	foreach j $vhdl_soc_file_list {
+		set_property file_type {VHDL 2008} [get_files  $j]
+		print_status "VHDL 2008 mode configured for the file $j" "OK"
+		set_property is_enabled true [get_files $j]
+	}
+}
+print_status "Add SoC wrapper sources" "OK"
+print_status "VHDL 2008 mode configured for SoC wrapper sources" "OK"
+
 # Set the completion time
 set end_time [clock format [clock seconds] -format {%b. %d, %Y %I:%M:%S %p}]
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/export_hw_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/export_hw_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Export the hardware design to SDK
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/export_hw_scalp_firmware.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/export_hw_scalp_firmware.tcl

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: Export the hardware design to SDK
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/gen_bitstream_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/gen_bitstream_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Generate bitstream file
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/gen_bitstream_scalp_firmware.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/gen_bitstream_scalp_firmware.tcl

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: TCL script used to generate bitstream file
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/gen_sw_apps_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/gen_sw_apps_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Generate software application
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/gen_sw_apps_scalp_firmware.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/gen_sw_apps_scalp_firmware.tcl

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: TCL script used to generate software application
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/load_bitstream_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/load_bitstream_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Load bitstream file
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/load_bitstream_scalp_firmware.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/load_bitstream_scalp_firmware.tcl

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: TCL script used to load FPGA bitstream
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/load_sw_app_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/load_sw_app_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Load software application
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/load_sw_app_scalp_firmware.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/load_sw_app_scalp_firmware.tcl

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: TCL script used to load software application
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/open_prj_scalp_firmware.sh → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/open_prj_scalp_firmware.sh

@@ -17,7 +17,7 @@
 # Tool version: 2019.2
 # Description: Create Vivado project
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/.scripts/utils.tcl → designs/vivado/scalp_firmware/2019.2/lin64/.scripts/utils.tcl

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: Project management utilities
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################
 

designs/vivado/scalp_firmware_old/2019.2/lin64/setup.sh → designs/vivado/scalp_firmware/2019.2/lin64/setup.sh

@@ -15,7 +15,7 @@
 # Tool version: 2019.2
 # Description: TCL script creating aliases for Vivado project management scripts
 #
-# Last update: 2020-09-03 11:28:21
+# Last update: 2020-09-21 13:34:23
 #
 ##################################################################################