Updated the HDL scalp_firmware project to Vivado version 2020.2. This update concerns VHDL, TCL and XCI (IP Core) files.

Design scalp_firmware with 4 interfaces (north, east, south, west) and an example of the process of sending data in the form of packets and receiving data in the form of packets.

Firmware with four GTP interfaces (north, east, south, west) and congestion management and with Zynq SoC.

Firmware with four GTP interfaces (north, east, south, west) and congestion management and with Zynq SoC.

Updated the scalp_firmware reference design with some corrections on back pressure management. Back pressure management is external to the IP core scalp_aurora_pyh. The next update is to integrate it to the IP core.